1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
44 #include "fold-const.h"
47 #include "hard-reg-set.h"
50 #include "basic-block.h"
54 #include "stringpool.h"
55 #include "insn-config.h"
67 #include "langhooks.h"
74 struct target_rtl default_target_rtl
;
76 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
79 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
81 /* Commonly used modes. */
83 machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
84 machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
85 machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
86 machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
88 /* Datastructures maintained for currently processed function in RTL form. */
90 struct rtl_data x_rtl
;
92 /* Indexed by pseudo register number, gives the rtx for that pseudo.
93 Allocated in parallel with regno_pointer_align.
94 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
95 with length attribute nested in top level structures. */
99 /* This is *not* reset after each function. It gives each CODE_LABEL
100 in the entire compilation a unique label number. */
102 static GTY(()) int label_num
= 1;
104 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
105 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
106 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
107 is set only for MODE_INT and MODE_VECTOR_INT modes. */
109 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
113 REAL_VALUE_TYPE dconst0
;
114 REAL_VALUE_TYPE dconst1
;
115 REAL_VALUE_TYPE dconst2
;
116 REAL_VALUE_TYPE dconstm1
;
117 REAL_VALUE_TYPE dconsthalf
;
119 /* Record fixed-point constant 0 and 1. */
120 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
121 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
123 /* We make one copy of (const_int C) where C is in
124 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
125 to save space during the compilation and simplify comparisons of
128 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
130 /* Standard pieces of rtx, to be substituted directly into things. */
133 rtx simple_return_rtx
;
136 /* Marker used for denoting an INSN, which should never be accessed (i.e.,
137 this pointer should normally never be dereferenced), but is required to be
138 distinct from NULL_RTX. Currently used by peephole2 pass. */
139 rtx_insn
*invalid_insn_rtx
;
141 /* A hash table storing CONST_INTs whose absolute value is greater
142 than MAX_SAVED_CONST_INT. */
144 struct const_int_hasher
: ggc_cache_hasher
<rtx
>
146 typedef HOST_WIDE_INT compare_type
;
148 static hashval_t
hash (rtx i
);
149 static bool equal (rtx i
, HOST_WIDE_INT h
);
152 static GTY ((cache
)) hash_table
<const_int_hasher
> *const_int_htab
;
154 struct const_wide_int_hasher
: ggc_cache_hasher
<rtx
>
156 static hashval_t
hash (rtx x
);
157 static bool equal (rtx x
, rtx y
);
160 static GTY ((cache
)) hash_table
<const_wide_int_hasher
> *const_wide_int_htab
;
162 /* A hash table storing register attribute structures. */
163 struct reg_attr_hasher
: ggc_cache_hasher
<reg_attrs
*>
165 static hashval_t
hash (reg_attrs
*x
);
166 static bool equal (reg_attrs
*a
, reg_attrs
*b
);
169 static GTY ((cache
)) hash_table
<reg_attr_hasher
> *reg_attrs_htab
;
171 /* A hash table storing all CONST_DOUBLEs. */
172 struct const_double_hasher
: ggc_cache_hasher
<rtx
>
174 static hashval_t
hash (rtx x
);
175 static bool equal (rtx x
, rtx y
);
178 static GTY ((cache
)) hash_table
<const_double_hasher
> *const_double_htab
;
180 /* A hash table storing all CONST_FIXEDs. */
181 struct const_fixed_hasher
: ggc_cache_hasher
<rtx
>
183 static hashval_t
hash (rtx x
);
184 static bool equal (rtx x
, rtx y
);
187 static GTY ((cache
)) hash_table
<const_fixed_hasher
> *const_fixed_htab
;
189 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
190 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
191 #define first_label_num (crtl->emit.x_first_label_num)
193 static void set_used_decls (tree
);
194 static void mark_label_nuses (rtx
);
195 #if TARGET_SUPPORTS_WIDE_INT
196 static rtx
lookup_const_wide_int (rtx
);
198 static rtx
lookup_const_double (rtx
);
199 static rtx
lookup_const_fixed (rtx
);
200 static reg_attrs
*get_reg_attrs (tree
, int);
201 static rtx
gen_const_vector (machine_mode
, int);
202 static void copy_rtx_if_shared_1 (rtx
*orig
);
204 /* Probability of the conditional branch currently proceeded by try_split.
205 Set to -1 otherwise. */
206 int split_branch_probability
= -1;
208 /* Returns a hash code for X (which is a really a CONST_INT). */
211 const_int_hasher::hash (rtx x
)
213 return (hashval_t
) INTVAL (x
);
216 /* Returns nonzero if the value represented by X (which is really a
217 CONST_INT) is the same as that given by Y (which is really a
221 const_int_hasher::equal (rtx x
, HOST_WIDE_INT y
)
223 return (INTVAL (x
) == y
);
226 #if TARGET_SUPPORTS_WIDE_INT
227 /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
230 const_wide_int_hasher::hash (rtx x
)
233 unsigned HOST_WIDE_INT hash
= 0;
236 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
237 hash
+= CONST_WIDE_INT_ELT (xr
, i
);
239 return (hashval_t
) hash
;
242 /* Returns nonzero if the value represented by X (which is really a
243 CONST_WIDE_INT) is the same as that given by Y (which is really a
247 const_wide_int_hasher::equal (rtx x
, rtx y
)
252 if (CONST_WIDE_INT_NUNITS (xr
) != CONST_WIDE_INT_NUNITS (yr
))
255 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
256 if (CONST_WIDE_INT_ELT (xr
, i
) != CONST_WIDE_INT_ELT (yr
, i
))
263 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
265 const_double_hasher::hash (rtx x
)
267 const_rtx
const value
= x
;
270 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (value
) == VOIDmode
)
271 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
274 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
275 /* MODE is used in the comparison, so it should be in the hash. */
276 h
^= GET_MODE (value
);
281 /* Returns nonzero if the value represented by X (really a ...)
282 is the same as that represented by Y (really a ...) */
284 const_double_hasher::equal (rtx x
, rtx y
)
286 const_rtx
const a
= x
, b
= y
;
288 if (GET_MODE (a
) != GET_MODE (b
))
290 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (a
) == VOIDmode
)
291 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
292 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
294 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
295 CONST_DOUBLE_REAL_VALUE (b
));
298 /* Returns a hash code for X (which is really a CONST_FIXED). */
301 const_fixed_hasher::hash (rtx x
)
303 const_rtx
const value
= x
;
306 h
= fixed_hash (CONST_FIXED_VALUE (value
));
307 /* MODE is used in the comparison, so it should be in the hash. */
308 h
^= GET_MODE (value
);
312 /* Returns nonzero if the value represented by X is the same as that
316 const_fixed_hasher::equal (rtx x
, rtx y
)
318 const_rtx
const a
= x
, b
= y
;
320 if (GET_MODE (a
) != GET_MODE (b
))
322 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
325 /* Return true if the given memory attributes are equal. */
328 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
334 return (p
->alias
== q
->alias
335 && p
->offset_known_p
== q
->offset_known_p
336 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
337 && p
->size_known_p
== q
->size_known_p
338 && (!p
->size_known_p
|| p
->size
== q
->size
)
339 && p
->align
== q
->align
340 && p
->addrspace
== q
->addrspace
341 && (p
->expr
== q
->expr
342 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
343 && operand_equal_p (p
->expr
, q
->expr
, 0))));
346 /* Set MEM's memory attributes so that they are the same as ATTRS. */
349 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
351 /* If everything is the default, we can just clear the attributes. */
352 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
359 || !mem_attrs_eq_p (attrs
, MEM_ATTRS (mem
)))
361 MEM_ATTRS (mem
) = ggc_alloc
<mem_attrs
> ();
362 memcpy (MEM_ATTRS (mem
), attrs
, sizeof (mem_attrs
));
366 /* Returns a hash code for X (which is a really a reg_attrs *). */
369 reg_attr_hasher::hash (reg_attrs
*x
)
371 const reg_attrs
*const p
= x
;
373 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
376 /* Returns nonzero if the value represented by X is the same as that given by
380 reg_attr_hasher::equal (reg_attrs
*x
, reg_attrs
*y
)
382 const reg_attrs
*const p
= x
;
383 const reg_attrs
*const q
= y
;
385 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
387 /* Allocate a new reg_attrs structure and insert it into the hash table if
388 one identical to it is not already in the table. We are doing this for
392 get_reg_attrs (tree decl
, int offset
)
396 /* If everything is the default, we can just return zero. */
397 if (decl
== 0 && offset
== 0)
401 attrs
.offset
= offset
;
403 reg_attrs
**slot
= reg_attrs_htab
->find_slot (&attrs
, INSERT
);
406 *slot
= ggc_alloc
<reg_attrs
> ();
407 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
415 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
416 and to block register equivalences to be seen across this insn. */
421 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
422 MEM_VOLATILE_P (x
) = true;
428 /* Set the mode and register number of X to MODE and REGNO. */
431 set_mode_and_regno (rtx x
, machine_mode mode
, unsigned int regno
)
433 unsigned int nregs
= (HARD_REGISTER_NUM_P (regno
)
434 ? hard_regno_nregs
[regno
][mode
]
436 PUT_MODE_RAW (x
, mode
);
437 set_regno_raw (x
, regno
, nregs
);
440 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
441 don't attempt to share with the various global pieces of rtl (such as
442 frame_pointer_rtx). */
445 gen_raw_REG (machine_mode mode
, unsigned int regno
)
447 rtx x
= rtx_alloc_stat (REG MEM_STAT_INFO
);
448 set_mode_and_regno (x
, mode
, regno
);
449 REG_ATTRS (x
) = NULL
;
450 ORIGINAL_REGNO (x
) = regno
;
454 /* There are some RTL codes that require special attention; the generation
455 functions do the raw handling. If you add to this list, modify
456 special_rtx in gengenrtl.c as well. */
459 gen_rtx_EXPR_LIST (machine_mode mode
, rtx expr
, rtx expr_list
)
461 return as_a
<rtx_expr_list
*> (gen_rtx_fmt_ee (EXPR_LIST
, mode
, expr
,
466 gen_rtx_INSN_LIST (machine_mode mode
, rtx insn
, rtx insn_list
)
468 return as_a
<rtx_insn_list
*> (gen_rtx_fmt_ue (INSN_LIST
, mode
, insn
,
473 gen_rtx_INSN (machine_mode mode
, rtx_insn
*prev_insn
, rtx_insn
*next_insn
,
474 basic_block bb
, rtx pattern
, int location
, int code
,
477 return as_a
<rtx_insn
*> (gen_rtx_fmt_uuBeiie (INSN
, mode
,
478 prev_insn
, next_insn
,
479 bb
, pattern
, location
, code
,
484 gen_rtx_CONST_INT (machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
486 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
487 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
489 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
490 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
491 return const_true_rtx
;
494 /* Look up the CONST_INT in the hash table. */
495 rtx
*slot
= const_int_htab
->find_slot_with_hash (arg
, (hashval_t
) arg
,
498 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
504 gen_int_mode (HOST_WIDE_INT c
, machine_mode mode
)
506 return GEN_INT (trunc_int_for_mode (c
, mode
));
509 /* CONST_DOUBLEs might be created from pairs of integers, or from
510 REAL_VALUE_TYPEs. Also, their length is known only at run time,
511 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
513 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
514 hash table. If so, return its counterpart; otherwise add it
515 to the hash table and return it. */
517 lookup_const_double (rtx real
)
519 rtx
*slot
= const_double_htab
->find_slot (real
, INSERT
);
526 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
527 VALUE in mode MODE. */
529 const_double_from_real_value (REAL_VALUE_TYPE value
, machine_mode mode
)
531 rtx real
= rtx_alloc (CONST_DOUBLE
);
532 PUT_MODE (real
, mode
);
536 return lookup_const_double (real
);
539 /* Determine whether FIXED, a CONST_FIXED, already exists in the
540 hash table. If so, return its counterpart; otherwise add it
541 to the hash table and return it. */
544 lookup_const_fixed (rtx fixed
)
546 rtx
*slot
= const_fixed_htab
->find_slot (fixed
, INSERT
);
553 /* Return a CONST_FIXED rtx for a fixed-point value specified by
554 VALUE in mode MODE. */
557 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, machine_mode mode
)
559 rtx fixed
= rtx_alloc (CONST_FIXED
);
560 PUT_MODE (fixed
, mode
);
564 return lookup_const_fixed (fixed
);
567 #if TARGET_SUPPORTS_WIDE_INT == 0
568 /* Constructs double_int from rtx CST. */
571 rtx_to_double_int (const_rtx cst
)
575 if (CONST_INT_P (cst
))
576 r
= double_int::from_shwi (INTVAL (cst
));
577 else if (CONST_DOUBLE_AS_INT_P (cst
))
579 r
.low
= CONST_DOUBLE_LOW (cst
);
580 r
.high
= CONST_DOUBLE_HIGH (cst
);
589 #if TARGET_SUPPORTS_WIDE_INT
590 /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
591 If so, return its counterpart; otherwise add it to the hash table and
595 lookup_const_wide_int (rtx wint
)
597 rtx
*slot
= const_wide_int_htab
->find_slot (wint
, INSERT
);
605 /* Return an rtx constant for V, given that the constant has mode MODE.
606 The returned rtx will be a CONST_INT if V fits, otherwise it will be
607 a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
608 (if TARGET_SUPPORTS_WIDE_INT). */
611 immed_wide_int_const (const wide_int_ref
&v
, machine_mode mode
)
613 unsigned int len
= v
.get_len ();
614 unsigned int prec
= GET_MODE_PRECISION (mode
);
616 /* Allow truncation but not extension since we do not know if the
617 number is signed or unsigned. */
618 gcc_assert (prec
<= v
.get_precision ());
620 if (len
< 2 || prec
<= HOST_BITS_PER_WIDE_INT
)
621 return gen_int_mode (v
.elt (0), mode
);
623 #if TARGET_SUPPORTS_WIDE_INT
627 unsigned int blocks_needed
628 = (prec
+ HOST_BITS_PER_WIDE_INT
- 1) / HOST_BITS_PER_WIDE_INT
;
630 if (len
> blocks_needed
)
633 value
= const_wide_int_alloc (len
);
635 /* It is so tempting to just put the mode in here. Must control
637 PUT_MODE (value
, VOIDmode
);
638 CWI_PUT_NUM_ELEM (value
, len
);
640 for (i
= 0; i
< len
; i
++)
641 CONST_WIDE_INT_ELT (value
, i
) = v
.elt (i
);
643 return lookup_const_wide_int (value
);
646 return immed_double_const (v
.elt (0), v
.elt (1), mode
);
650 #if TARGET_SUPPORTS_WIDE_INT == 0
651 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
652 of ints: I0 is the low-order word and I1 is the high-order word.
653 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
654 implied upper bits are copies of the high bit of i1. The value
655 itself is neither signed nor unsigned. Do not use this routine for
656 non-integer modes; convert to REAL_VALUE_TYPE and use
657 CONST_DOUBLE_FROM_REAL_VALUE. */
660 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, machine_mode mode
)
665 /* There are the following cases (note that there are no modes with
666 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
668 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
670 2) If the value of the integer fits into HOST_WIDE_INT anyway
671 (i.e., i1 consists only from copies of the sign bit, and sign
672 of i0 and i1 are the same), then we return a CONST_INT for i0.
673 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
674 if (mode
!= VOIDmode
)
676 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
677 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
678 /* We can get a 0 for an error mark. */
679 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
680 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
681 || GET_MODE_CLASS (mode
) == MODE_POINTER_BOUNDS
);
683 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
684 return gen_int_mode (i0
, mode
);
687 /* If this integer fits in one word, return a CONST_INT. */
688 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
691 /* We use VOIDmode for integers. */
692 value
= rtx_alloc (CONST_DOUBLE
);
693 PUT_MODE (value
, VOIDmode
);
695 CONST_DOUBLE_LOW (value
) = i0
;
696 CONST_DOUBLE_HIGH (value
) = i1
;
698 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
699 XWINT (value
, i
) = 0;
701 return lookup_const_double (value
);
706 gen_rtx_REG (machine_mode mode
, unsigned int regno
)
708 /* In case the MD file explicitly references the frame pointer, have
709 all such references point to the same frame pointer. This is
710 used during frame pointer elimination to distinguish the explicit
711 references to these registers from pseudos that happened to be
714 If we have eliminated the frame pointer or arg pointer, we will
715 be using it as a normal register, for example as a spill
716 register. In such cases, we might be accessing it in a mode that
717 is not Pmode and therefore cannot use the pre-allocated rtx.
719 Also don't do this when we are making new REGs in reload, since
720 we don't want to get confused with the real pointers. */
722 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
724 if (regno
== FRAME_POINTER_REGNUM
725 && (!reload_completed
|| frame_pointer_needed
))
726 return frame_pointer_rtx
;
728 if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
729 && regno
== HARD_FRAME_POINTER_REGNUM
730 && (!reload_completed
|| frame_pointer_needed
))
731 return hard_frame_pointer_rtx
;
732 #if !HARD_FRAME_POINTER_IS_ARG_POINTER
733 if (FRAME_POINTER_REGNUM
!= ARG_POINTER_REGNUM
734 && regno
== ARG_POINTER_REGNUM
)
735 return arg_pointer_rtx
;
737 #ifdef RETURN_ADDRESS_POINTER_REGNUM
738 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
739 return return_address_pointer_rtx
;
741 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
742 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
743 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
744 return pic_offset_table_rtx
;
745 if (regno
== STACK_POINTER_REGNUM
)
746 return stack_pointer_rtx
;
750 /* If the per-function register table has been set up, try to re-use
751 an existing entry in that table to avoid useless generation of RTL.
753 This code is disabled for now until we can fix the various backends
754 which depend on having non-shared hard registers in some cases. Long
755 term we want to re-enable this code as it can significantly cut down
756 on the amount of useless RTL that gets generated.
758 We'll also need to fix some code that runs after reload that wants to
759 set ORIGINAL_REGNO. */
764 && regno
< FIRST_PSEUDO_REGISTER
765 && reg_raw_mode
[regno
] == mode
)
766 return regno_reg_rtx
[regno
];
769 return gen_raw_REG (mode
, regno
);
773 gen_rtx_MEM (machine_mode mode
, rtx addr
)
775 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
777 /* This field is not cleared by the mere allocation of the rtx, so
784 /* Generate a memory referring to non-trapping constant memory. */
787 gen_const_mem (machine_mode mode
, rtx addr
)
789 rtx mem
= gen_rtx_MEM (mode
, addr
);
790 MEM_READONLY_P (mem
) = 1;
791 MEM_NOTRAP_P (mem
) = 1;
795 /* Generate a MEM referring to fixed portions of the frame, e.g., register
799 gen_frame_mem (machine_mode mode
, rtx addr
)
801 rtx mem
= gen_rtx_MEM (mode
, addr
);
802 MEM_NOTRAP_P (mem
) = 1;
803 set_mem_alias_set (mem
, get_frame_alias_set ());
807 /* Generate a MEM referring to a temporary use of the stack, not part
808 of the fixed stack frame. For example, something which is pushed
809 by a target splitter. */
811 gen_tmp_stack_mem (machine_mode mode
, rtx addr
)
813 rtx mem
= gen_rtx_MEM (mode
, addr
);
814 MEM_NOTRAP_P (mem
) = 1;
815 if (!cfun
->calls_alloca
)
816 set_mem_alias_set (mem
, get_frame_alias_set ());
820 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
821 this construct would be valid, and false otherwise. */
824 validate_subreg (machine_mode omode
, machine_mode imode
,
825 const_rtx reg
, unsigned int offset
)
827 unsigned int isize
= GET_MODE_SIZE (imode
);
828 unsigned int osize
= GET_MODE_SIZE (omode
);
830 /* All subregs must be aligned. */
831 if (offset
% osize
!= 0)
834 /* The subreg offset cannot be outside the inner object. */
838 /* ??? This should not be here. Temporarily continue to allow word_mode
839 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
840 Generally, backends are doing something sketchy but it'll take time to
842 if (omode
== word_mode
)
844 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
845 is the culprit here, and not the backends. */
846 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
848 /* Allow component subregs of complex and vector. Though given the below
849 extraction rules, it's not always clear what that means. */
850 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
851 && GET_MODE_INNER (imode
) == omode
)
853 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
854 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
855 represent this. It's questionable if this ought to be represented at
856 all -- why can't this all be hidden in post-reload splitters that make
857 arbitrarily mode changes to the registers themselves. */
858 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
860 /* Subregs involving floating point modes are not allowed to
861 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
862 (subreg:SI (reg:DF) 0) isn't. */
863 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
865 if (! (isize
== osize
866 /* LRA can use subreg to store a floating point value in
867 an integer mode. Although the floating point and the
868 integer modes need the same number of hard registers,
869 the size of floating point mode can be less than the
870 integer mode. LRA also uses subregs for a register
871 should be used in different mode in on insn. */
876 /* Paradoxical subregs must have offset zero. */
880 /* This is a normal subreg. Verify that the offset is representable. */
882 /* For hard registers, we already have most of these rules collected in
883 subreg_offset_representable_p. */
884 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
886 unsigned int regno
= REGNO (reg
);
888 #ifdef CANNOT_CHANGE_MODE_CLASS
889 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
890 && GET_MODE_INNER (imode
) == omode
)
892 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
896 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
899 /* For pseudo registers, we want most of the same checks. Namely:
900 If the register no larger than a word, the subreg must be lowpart.
901 If the register is larger than a word, the subreg must be the lowpart
902 of a subword. A subreg does *not* perform arbitrary bit extraction.
903 Given that we've already checked mode/offset alignment, we only have
904 to check subword subregs here. */
905 if (osize
< UNITS_PER_WORD
906 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
908 machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
909 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
910 if (offset
% UNITS_PER_WORD
!= low_off
)
917 gen_rtx_SUBREG (machine_mode mode
, rtx reg
, int offset
)
919 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
920 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
923 /* Generate a SUBREG representing the least-significant part of REG if MODE
924 is smaller than mode of REG, otherwise paradoxical SUBREG. */
927 gen_lowpart_SUBREG (machine_mode mode
, rtx reg
)
931 inmode
= GET_MODE (reg
);
932 if (inmode
== VOIDmode
)
934 return gen_rtx_SUBREG (mode
, reg
,
935 subreg_lowpart_offset (mode
, inmode
));
939 gen_rtx_VAR_LOCATION (machine_mode mode
, tree decl
, rtx loc
,
940 enum var_init_status status
)
942 rtx x
= gen_rtx_fmt_te (VAR_LOCATION
, mode
, decl
, loc
);
943 PAT_VAR_LOCATION_STATUS (x
) = status
;
948 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
951 gen_rtvec (int n
, ...)
959 /* Don't allocate an empty rtvec... */
966 rt_val
= rtvec_alloc (n
);
968 for (i
= 0; i
< n
; i
++)
969 rt_val
->elem
[i
] = va_arg (p
, rtx
);
976 gen_rtvec_v (int n
, rtx
*argp
)
981 /* Don't allocate an empty rtvec... */
985 rt_val
= rtvec_alloc (n
);
987 for (i
= 0; i
< n
; i
++)
988 rt_val
->elem
[i
] = *argp
++;
994 gen_rtvec_v (int n
, rtx_insn
**argp
)
999 /* Don't allocate an empty rtvec... */
1003 rt_val
= rtvec_alloc (n
);
1005 for (i
= 0; i
< n
; i
++)
1006 rt_val
->elem
[i
] = *argp
++;
1012 /* Return the number of bytes between the start of an OUTER_MODE
1013 in-memory value and the start of an INNER_MODE in-memory value,
1014 given that the former is a lowpart of the latter. It may be a
1015 paradoxical lowpart, in which case the offset will be negative
1016 on big-endian targets. */
1019 byte_lowpart_offset (machine_mode outer_mode
,
1020 machine_mode inner_mode
)
1022 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
1023 return subreg_lowpart_offset (outer_mode
, inner_mode
);
1025 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
1028 /* Generate a REG rtx for a new pseudo register of mode MODE.
1029 This pseudo is assigned the next sequential register number. */
1032 gen_reg_rtx (machine_mode mode
)
1035 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
1037 gcc_assert (can_create_pseudo_p ());
1039 /* If a virtual register with bigger mode alignment is generated,
1040 increase stack alignment estimation because it might be spilled
1042 if (SUPPORTS_STACK_ALIGNMENT
1043 && crtl
->stack_alignment_estimated
< align
1044 && !crtl
->stack_realign_processed
)
1046 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
1047 if (crtl
->stack_alignment_estimated
< min_align
)
1048 crtl
->stack_alignment_estimated
= min_align
;
1051 if (generating_concat_p
1052 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
1053 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
1055 /* For complex modes, don't make a single pseudo.
1056 Instead, make a CONCAT of two pseudos.
1057 This allows noncontiguous allocation of the real and imaginary parts,
1058 which makes much better code. Besides, allocating DCmode
1059 pseudos overstrains reload on some machines like the 386. */
1060 rtx realpart
, imagpart
;
1061 machine_mode partmode
= GET_MODE_INNER (mode
);
1063 realpart
= gen_reg_rtx (partmode
);
1064 imagpart
= gen_reg_rtx (partmode
);
1065 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
1068 /* Do not call gen_reg_rtx with uninitialized crtl. */
1069 gcc_assert (crtl
->emit
.regno_pointer_align_length
);
1071 /* Make sure regno_pointer_align, and regno_reg_rtx are large
1072 enough to have an element for this pseudo reg number. */
1074 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
1076 int old_size
= crtl
->emit
.regno_pointer_align_length
;
1080 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
1081 memset (tmp
+ old_size
, 0, old_size
);
1082 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
1084 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
1085 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
1086 regno_reg_rtx
= new1
;
1088 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
1091 val
= gen_raw_REG (mode
, reg_rtx_no
);
1092 regno_reg_rtx
[reg_rtx_no
++] = val
;
1096 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1099 reg_is_parm_p (rtx reg
)
1103 gcc_assert (REG_P (reg
));
1104 decl
= REG_EXPR (reg
);
1105 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
1108 /* Update NEW with the same attributes as REG, but with OFFSET added
1109 to the REG_OFFSET. */
1112 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
1114 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
1115 REG_OFFSET (reg
) + offset
);
1118 /* Generate a register with same attributes as REG, but with OFFSET
1119 added to the REG_OFFSET. */
1122 gen_rtx_REG_offset (rtx reg
, machine_mode mode
, unsigned int regno
,
1125 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
1127 update_reg_offset (new_rtx
, reg
, offset
);
1131 /* Generate a new pseudo-register with the same attributes as REG, but
1132 with OFFSET added to the REG_OFFSET. */
1135 gen_reg_rtx_offset (rtx reg
, machine_mode mode
, int offset
)
1137 rtx new_rtx
= gen_reg_rtx (mode
);
1139 update_reg_offset (new_rtx
, reg
, offset
);
1143 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1144 new register is a (possibly paradoxical) lowpart of the old one. */
1147 adjust_reg_mode (rtx reg
, machine_mode mode
)
1149 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
1150 PUT_MODE (reg
, mode
);
1153 /* Copy REG's attributes from X, if X has any attributes. If REG and X
1154 have different modes, REG is a (possibly paradoxical) lowpart of X. */
1157 set_reg_attrs_from_value (rtx reg
, rtx x
)
1160 bool can_be_reg_pointer
= true;
1162 /* Don't call mark_reg_pointer for incompatible pointer sign
1164 while (GET_CODE (x
) == SIGN_EXTEND
1165 || GET_CODE (x
) == ZERO_EXTEND
1166 || GET_CODE (x
) == TRUNCATE
1167 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
1169 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
1170 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
1171 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
1172 can_be_reg_pointer
= false;
1177 /* Hard registers can be reused for multiple purposes within the same
1178 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1179 on them is wrong. */
1180 if (HARD_REGISTER_P (reg
))
1183 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1186 if (MEM_OFFSET_KNOWN_P (x
))
1187 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1188 MEM_OFFSET (x
) + offset
);
1189 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1190 mark_reg_pointer (reg
, 0);
1195 update_reg_offset (reg
, x
, offset
);
1196 if (can_be_reg_pointer
&& REG_POINTER (x
))
1197 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1201 /* Generate a REG rtx for a new pseudo register, copying the mode
1202 and attributes from X. */
1205 gen_reg_rtx_and_attrs (rtx x
)
1207 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1208 set_reg_attrs_from_value (reg
, x
);
1212 /* Set the register attributes for registers contained in PARM_RTX.
1213 Use needed values from memory attributes of MEM. */
1216 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1218 if (REG_P (parm_rtx
))
1219 set_reg_attrs_from_value (parm_rtx
, mem
);
1220 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1222 /* Check for a NULL entry in the first slot, used to indicate that the
1223 parameter goes both on the stack and in registers. */
1224 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1225 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1227 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1228 if (REG_P (XEXP (x
, 0)))
1229 REG_ATTRS (XEXP (x
, 0))
1230 = get_reg_attrs (MEM_EXPR (mem
),
1231 INTVAL (XEXP (x
, 1)));
1236 /* Set the REG_ATTRS for registers in value X, given that X represents
1240 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1245 if (GET_CODE (x
) == SUBREG
)
1247 gcc_assert (subreg_lowpart_p (x
));
1252 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1253 DECL_MODE (tdecl
)));
1254 if (GET_CODE (x
) == CONCAT
)
1256 if (REG_P (XEXP (x
, 0)))
1257 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1258 if (REG_P (XEXP (x
, 1)))
1259 REG_ATTRS (XEXP (x
, 1))
1260 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1262 if (GET_CODE (x
) == PARALLEL
)
1266 /* Check for a NULL entry, used to indicate that the parameter goes
1267 both on the stack and in registers. */
1268 if (XEXP (XVECEXP (x
, 0, 0), 0))
1273 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1275 rtx y
= XVECEXP (x
, 0, i
);
1276 if (REG_P (XEXP (y
, 0)))
1277 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1282 /* Assign the RTX X to declaration T. */
1285 set_decl_rtl (tree t
, rtx x
)
1287 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1289 set_reg_attrs_for_decl_rtl (t
, x
);
1292 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1293 if the ABI requires the parameter to be passed by reference. */
1296 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1298 DECL_INCOMING_RTL (t
) = x
;
1299 if (x
&& !by_reference_p
)
1300 set_reg_attrs_for_decl_rtl (t
, x
);
1303 /* Identify REG (which may be a CONCAT) as a user register. */
1306 mark_user_reg (rtx reg
)
1308 if (GET_CODE (reg
) == CONCAT
)
1310 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1311 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1315 gcc_assert (REG_P (reg
));
1316 REG_USERVAR_P (reg
) = 1;
1320 /* Identify REG as a probable pointer register and show its alignment
1321 as ALIGN, if nonzero. */
1324 mark_reg_pointer (rtx reg
, int align
)
1326 if (! REG_POINTER (reg
))
1328 REG_POINTER (reg
) = 1;
1331 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1333 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1334 /* We can no-longer be sure just how aligned this pointer is. */
1335 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1338 /* Return 1 plus largest pseudo reg number used in the current function. */
1346 /* Return 1 + the largest label number used so far in the current function. */
1349 max_label_num (void)
1354 /* Return first label number used in this function (if any were used). */
1357 get_first_label_num (void)
1359 return first_label_num
;
1362 /* If the rtx for label was created during the expansion of a nested
1363 function, then first_label_num won't include this label number.
1364 Fix this now so that array indices work later. */
1367 maybe_set_first_label_num (rtx x
)
1369 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1370 first_label_num
= CODE_LABEL_NUMBER (x
);
1373 /* Return a value representing some low-order bits of X, where the number
1374 of low-order bits is given by MODE. Note that no conversion is done
1375 between floating-point and fixed-point values, rather, the bit
1376 representation is returned.
1378 This function handles the cases in common between gen_lowpart, below,
1379 and two variants in cse.c and combine.c. These are the cases that can
1380 be safely handled at all points in the compilation.
1382 If this is not a case we can handle, return 0. */
1385 gen_lowpart_common (machine_mode mode
, rtx x
)
1387 int msize
= GET_MODE_SIZE (mode
);
1390 machine_mode innermode
;
1392 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1393 so we have to make one up. Yuk. */
1394 innermode
= GET_MODE (x
);
1396 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1397 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1398 else if (innermode
== VOIDmode
)
1399 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1401 xsize
= GET_MODE_SIZE (innermode
);
1403 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1405 if (innermode
== mode
)
1408 /* MODE must occupy no more words than the mode of X. */
1409 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1410 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1413 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1414 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1417 offset
= subreg_lowpart_offset (mode
, innermode
);
1419 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1420 && (GET_MODE_CLASS (mode
) == MODE_INT
1421 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1423 /* If we are getting the low-order part of something that has been
1424 sign- or zero-extended, we can either just use the object being
1425 extended or make a narrower extension. If we want an even smaller
1426 piece than the size of the object being extended, call ourselves
1429 This case is used mostly by combine and cse. */
1431 if (GET_MODE (XEXP (x
, 0)) == mode
)
1433 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1434 return gen_lowpart_common (mode
, XEXP (x
, 0));
1435 else if (msize
< xsize
)
1436 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1438 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1439 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1440 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1441 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1443 /* Otherwise, we can't do this. */
1448 gen_highpart (machine_mode mode
, rtx x
)
1450 unsigned int msize
= GET_MODE_SIZE (mode
);
1453 /* This case loses if X is a subreg. To catch bugs early,
1454 complain if an invalid MODE is used even in other cases. */
1455 gcc_assert (msize
<= UNITS_PER_WORD
1456 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1458 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1459 subreg_highpart_offset (mode
, GET_MODE (x
)));
1460 gcc_assert (result
);
1462 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1463 the target if we have a MEM. gen_highpart must return a valid operand,
1464 emitting code if necessary to do so. */
1467 result
= validize_mem (result
);
1468 gcc_assert (result
);
1474 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1475 be VOIDmode constant. */
1477 gen_highpart_mode (machine_mode outermode
, machine_mode innermode
, rtx exp
)
1479 if (GET_MODE (exp
) != VOIDmode
)
1481 gcc_assert (GET_MODE (exp
) == innermode
);
1482 return gen_highpart (outermode
, exp
);
1484 return simplify_gen_subreg (outermode
, exp
, innermode
,
1485 subreg_highpart_offset (outermode
, innermode
));
1488 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1491 subreg_lowpart_offset (machine_mode outermode
, machine_mode innermode
)
1493 unsigned int offset
= 0;
1494 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1498 if (WORDS_BIG_ENDIAN
)
1499 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1500 if (BYTES_BIG_ENDIAN
)
1501 offset
+= difference
% UNITS_PER_WORD
;
1507 /* Return offset in bytes to get OUTERMODE high part
1508 of the value in mode INNERMODE stored in memory in target format. */
1510 subreg_highpart_offset (machine_mode outermode
, machine_mode innermode
)
1512 unsigned int offset
= 0;
1513 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1515 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1519 if (! WORDS_BIG_ENDIAN
)
1520 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1521 if (! BYTES_BIG_ENDIAN
)
1522 offset
+= difference
% UNITS_PER_WORD
;
1528 /* Return 1 iff X, assumed to be a SUBREG,
1529 refers to the least significant part of its containing reg.
1530 If X is not a SUBREG, always return 1 (it is its own low part!). */
1533 subreg_lowpart_p (const_rtx x
)
1535 if (GET_CODE (x
) != SUBREG
)
1537 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1540 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1541 == SUBREG_BYTE (x
));
1544 /* Return true if X is a paradoxical subreg, false otherwise. */
1546 paradoxical_subreg_p (const_rtx x
)
1548 if (GET_CODE (x
) != SUBREG
)
1550 return (GET_MODE_PRECISION (GET_MODE (x
))
1551 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1554 /* Return subword OFFSET of operand OP.
1555 The word number, OFFSET, is interpreted as the word number starting
1556 at the low-order address. OFFSET 0 is the low-order word if not
1557 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1559 If we cannot extract the required word, we return zero. Otherwise,
1560 an rtx corresponding to the requested word will be returned.
1562 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1563 reload has completed, a valid address will always be returned. After
1564 reload, if a valid address cannot be returned, we return zero.
1566 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1567 it is the responsibility of the caller.
1569 MODE is the mode of OP in case it is a CONST_INT.
1571 ??? This is still rather broken for some cases. The problem for the
1572 moment is that all callers of this thing provide no 'goal mode' to
1573 tell us to work with. This exists because all callers were written
1574 in a word based SUBREG world.
1575 Now use of this function can be deprecated by simplify_subreg in most
1580 operand_subword (rtx op
, unsigned int offset
, int validate_address
, machine_mode mode
)
1582 if (mode
== VOIDmode
)
1583 mode
= GET_MODE (op
);
1585 gcc_assert (mode
!= VOIDmode
);
1587 /* If OP is narrower than a word, fail. */
1589 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1592 /* If we want a word outside OP, return zero. */
1594 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1597 /* Form a new MEM at the requested address. */
1600 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1602 if (! validate_address
)
1605 else if (reload_completed
)
1607 if (! strict_memory_address_addr_space_p (word_mode
,
1609 MEM_ADDR_SPACE (op
)))
1613 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1616 /* Rest can be handled by simplify_subreg. */
1617 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1620 /* Similar to `operand_subword', but never return 0. If we can't
1621 extract the required subword, put OP into a register and try again.
1622 The second attempt must succeed. We always validate the address in
1625 MODE is the mode of OP, in case it is CONST_INT. */
1628 operand_subword_force (rtx op
, unsigned int offset
, machine_mode mode
)
1630 rtx result
= operand_subword (op
, offset
, 1, mode
);
1635 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1637 /* If this is a register which can not be accessed by words, copy it
1638 to a pseudo register. */
1640 op
= copy_to_reg (op
);
1642 op
= force_reg (mode
, op
);
1645 result
= operand_subword (op
, offset
, 1, mode
);
1646 gcc_assert (result
);
1651 /* Returns 1 if both MEM_EXPR can be considered equal
1655 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1660 if (! expr1
|| ! expr2
)
1663 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1666 return operand_equal_p (expr1
, expr2
, 0);
1669 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1670 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1674 get_mem_align_offset (rtx mem
, unsigned int align
)
1677 unsigned HOST_WIDE_INT offset
;
1679 /* This function can't use
1680 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1681 || (MAX (MEM_ALIGN (mem),
1682 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1686 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1688 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1689 for <variable>. get_inner_reference doesn't handle it and
1690 even if it did, the alignment in that case needs to be determined
1691 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1692 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1693 isn't sufficiently aligned, the object it is in might be. */
1694 gcc_assert (MEM_P (mem
));
1695 expr
= MEM_EXPR (mem
);
1696 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1699 offset
= MEM_OFFSET (mem
);
1702 if (DECL_ALIGN (expr
) < align
)
1705 else if (INDIRECT_REF_P (expr
))
1707 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1710 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1714 tree inner
= TREE_OPERAND (expr
, 0);
1715 tree field
= TREE_OPERAND (expr
, 1);
1716 tree byte_offset
= component_ref_field_offset (expr
);
1717 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1720 || !tree_fits_uhwi_p (byte_offset
)
1721 || !tree_fits_uhwi_p (bit_offset
))
1724 offset
+= tree_to_uhwi (byte_offset
);
1725 offset
+= tree_to_uhwi (bit_offset
) / BITS_PER_UNIT
;
1727 if (inner
== NULL_TREE
)
1729 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1730 < (unsigned int) align
)
1734 else if (DECL_P (inner
))
1736 if (DECL_ALIGN (inner
) < align
)
1740 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1748 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1751 /* Given REF (a MEM) and T, either the type of X or the expression
1752 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1753 if we are making a new object of this type. BITPOS is nonzero if
1754 there is an offset outstanding on T that will be applied later. */
1757 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1758 HOST_WIDE_INT bitpos
)
1760 HOST_WIDE_INT apply_bitpos
= 0;
1762 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1765 /* It can happen that type_for_mode was given a mode for which there
1766 is no language-level type. In which case it returns NULL, which
1771 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1772 if (type
== error_mark_node
)
1775 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1776 wrong answer, as it assumes that DECL_RTL already has the right alias
1777 info. Callers should not set DECL_RTL until after the call to
1778 set_mem_attributes. */
1779 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1781 memset (&attrs
, 0, sizeof (attrs
));
1783 /* Get the alias set from the expression or type (perhaps using a
1784 front-end routine) and use it. */
1785 attrs
.alias
= get_alias_set (t
);
1787 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1788 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1790 /* Default values from pre-existing memory attributes if present. */
1791 refattrs
= MEM_ATTRS (ref
);
1794 /* ??? Can this ever happen? Calling this routine on a MEM that
1795 already carries memory attributes should probably be invalid. */
1796 attrs
.expr
= refattrs
->expr
;
1797 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1798 attrs
.offset
= refattrs
->offset
;
1799 attrs
.size_known_p
= refattrs
->size_known_p
;
1800 attrs
.size
= refattrs
->size
;
1801 attrs
.align
= refattrs
->align
;
1804 /* Otherwise, default values from the mode of the MEM reference. */
1807 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1808 gcc_assert (!defattrs
->expr
);
1809 gcc_assert (!defattrs
->offset_known_p
);
1811 /* Respect mode size. */
1812 attrs
.size_known_p
= defattrs
->size_known_p
;
1813 attrs
.size
= defattrs
->size
;
1814 /* ??? Is this really necessary? We probably should always get
1815 the size from the type below. */
1817 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1818 if T is an object, always compute the object alignment below. */
1820 attrs
.align
= defattrs
->align
;
1822 attrs
.align
= BITS_PER_UNIT
;
1823 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1824 e.g. if the type carries an alignment attribute. Should we be
1825 able to simply always use TYPE_ALIGN? */
1828 /* We can set the alignment from the type if we are making an object,
1829 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1830 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1831 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1833 /* If the size is known, we can set that. */
1834 tree new_size
= TYPE_SIZE_UNIT (type
);
1836 /* The address-space is that of the type. */
1837 as
= TYPE_ADDR_SPACE (type
);
1839 /* If T is not a type, we may be able to deduce some more information about
1845 if (TREE_THIS_VOLATILE (t
))
1846 MEM_VOLATILE_P (ref
) = 1;
1848 /* Now remove any conversions: they don't change what the underlying
1849 object is. Likewise for SAVE_EXPR. */
1850 while (CONVERT_EXPR_P (t
)
1851 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1852 || TREE_CODE (t
) == SAVE_EXPR
)
1853 t
= TREE_OPERAND (t
, 0);
1855 /* Note whether this expression can trap. */
1856 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1858 base
= get_base_address (t
);
1862 && TREE_READONLY (base
)
1863 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1864 && !TREE_THIS_VOLATILE (base
))
1865 MEM_READONLY_P (ref
) = 1;
1867 /* Mark static const strings readonly as well. */
1868 if (TREE_CODE (base
) == STRING_CST
1869 && TREE_READONLY (base
)
1870 && TREE_STATIC (base
))
1871 MEM_READONLY_P (ref
) = 1;
1873 /* Address-space information is on the base object. */
1874 if (TREE_CODE (base
) == MEM_REF
1875 || TREE_CODE (base
) == TARGET_MEM_REF
)
1876 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1879 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1882 /* If this expression uses it's parent's alias set, mark it such
1883 that we won't change it. */
1884 if (component_uses_parent_alias_set_from (t
) != NULL_TREE
)
1885 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1887 /* If this is a decl, set the attributes of the MEM from it. */
1891 attrs
.offset_known_p
= true;
1893 apply_bitpos
= bitpos
;
1894 new_size
= DECL_SIZE_UNIT (t
);
1897 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1898 else if (CONSTANT_CLASS_P (t
))
1901 /* If this is a field reference, record it. */
1902 else if (TREE_CODE (t
) == COMPONENT_REF
)
1905 attrs
.offset_known_p
= true;
1907 apply_bitpos
= bitpos
;
1908 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1909 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1912 /* If this is an array reference, look for an outer field reference. */
1913 else if (TREE_CODE (t
) == ARRAY_REF
)
1915 tree off_tree
= size_zero_node
;
1916 /* We can't modify t, because we use it at the end of the
1922 tree index
= TREE_OPERAND (t2
, 1);
1923 tree low_bound
= array_ref_low_bound (t2
);
1924 tree unit_size
= array_ref_element_size (t2
);
1926 /* We assume all arrays have sizes that are a multiple of a byte.
1927 First subtract the lower bound, if any, in the type of the
1928 index, then convert to sizetype and multiply by the size of
1929 the array element. */
1930 if (! integer_zerop (low_bound
))
1931 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1934 off_tree
= size_binop (PLUS_EXPR
,
1935 size_binop (MULT_EXPR
,
1936 fold_convert (sizetype
,
1940 t2
= TREE_OPERAND (t2
, 0);
1942 while (TREE_CODE (t2
) == ARRAY_REF
);
1945 || TREE_CODE (t2
) == COMPONENT_REF
)
1948 attrs
.offset_known_p
= false;
1949 if (tree_fits_uhwi_p (off_tree
))
1951 attrs
.offset_known_p
= true;
1952 attrs
.offset
= tree_to_uhwi (off_tree
);
1953 apply_bitpos
= bitpos
;
1956 /* Else do not record a MEM_EXPR. */
1959 /* If this is an indirect reference, record it. */
1960 else if (TREE_CODE (t
) == MEM_REF
1961 || TREE_CODE (t
) == TARGET_MEM_REF
)
1964 attrs
.offset_known_p
= true;
1966 apply_bitpos
= bitpos
;
1969 /* Compute the alignment. */
1970 unsigned int obj_align
;
1971 unsigned HOST_WIDE_INT obj_bitpos
;
1972 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1973 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1974 if (obj_bitpos
!= 0)
1975 obj_align
= (obj_bitpos
& -obj_bitpos
);
1976 attrs
.align
= MAX (attrs
.align
, obj_align
);
1979 if (tree_fits_uhwi_p (new_size
))
1981 attrs
.size_known_p
= true;
1982 attrs
.size
= tree_to_uhwi (new_size
);
1985 /* If we modified OFFSET based on T, then subtract the outstanding
1986 bit position offset. Similarly, increase the size of the accessed
1987 object to contain the negative offset. */
1990 gcc_assert (attrs
.offset_known_p
);
1991 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1992 if (attrs
.size_known_p
)
1993 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1996 /* Now set the attributes we computed above. */
1997 attrs
.addrspace
= as
;
1998 set_mem_attrs (ref
, &attrs
);
2002 set_mem_attributes (rtx ref
, tree t
, int objectp
)
2004 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
2007 /* Set the alias set of MEM to SET. */
2010 set_mem_alias_set (rtx mem
, alias_set_type set
)
2012 struct mem_attrs attrs
;
2014 /* If the new and old alias sets don't conflict, something is wrong. */
2015 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
2016 attrs
= *get_mem_attrs (mem
);
2018 set_mem_attrs (mem
, &attrs
);
2021 /* Set the address space of MEM to ADDRSPACE (target-defined). */
2024 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
2026 struct mem_attrs attrs
;
2028 attrs
= *get_mem_attrs (mem
);
2029 attrs
.addrspace
= addrspace
;
2030 set_mem_attrs (mem
, &attrs
);
2033 /* Set the alignment of MEM to ALIGN bits. */
2036 set_mem_align (rtx mem
, unsigned int align
)
2038 struct mem_attrs attrs
;
2040 attrs
= *get_mem_attrs (mem
);
2041 attrs
.align
= align
;
2042 set_mem_attrs (mem
, &attrs
);
2045 /* Set the expr for MEM to EXPR. */
2048 set_mem_expr (rtx mem
, tree expr
)
2050 struct mem_attrs attrs
;
2052 attrs
= *get_mem_attrs (mem
);
2054 set_mem_attrs (mem
, &attrs
);
2057 /* Set the offset of MEM to OFFSET. */
2060 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
2062 struct mem_attrs attrs
;
2064 attrs
= *get_mem_attrs (mem
);
2065 attrs
.offset_known_p
= true;
2066 attrs
.offset
= offset
;
2067 set_mem_attrs (mem
, &attrs
);
2070 /* Clear the offset of MEM. */
2073 clear_mem_offset (rtx mem
)
2075 struct mem_attrs attrs
;
2077 attrs
= *get_mem_attrs (mem
);
2078 attrs
.offset_known_p
= false;
2079 set_mem_attrs (mem
, &attrs
);
2082 /* Set the size of MEM to SIZE. */
2085 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
2087 struct mem_attrs attrs
;
2089 attrs
= *get_mem_attrs (mem
);
2090 attrs
.size_known_p
= true;
2092 set_mem_attrs (mem
, &attrs
);
2095 /* Clear the size of MEM. */
2098 clear_mem_size (rtx mem
)
2100 struct mem_attrs attrs
;
2102 attrs
= *get_mem_attrs (mem
);
2103 attrs
.size_known_p
= false;
2104 set_mem_attrs (mem
, &attrs
);
2107 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2108 and its address changed to ADDR. (VOIDmode means don't change the mode.
2109 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2110 returned memory location is required to be valid. INPLACE is true if any
2111 changes can be made directly to MEMREF or false if MEMREF must be treated
2114 The memory attributes are not changed. */
2117 change_address_1 (rtx memref
, machine_mode mode
, rtx addr
, int validate
,
2123 gcc_assert (MEM_P (memref
));
2124 as
= MEM_ADDR_SPACE (memref
);
2125 if (mode
== VOIDmode
)
2126 mode
= GET_MODE (memref
);
2128 addr
= XEXP (memref
, 0);
2129 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
2130 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2133 /* Don't validate address for LRA. LRA can make the address valid
2134 by itself in most efficient way. */
2135 if (validate
&& !lra_in_progress
)
2137 if (reload_in_progress
|| reload_completed
)
2138 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2140 addr
= memory_address_addr_space (mode
, addr
, as
);
2143 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2148 XEXP (memref
, 0) = addr
;
2152 new_rtx
= gen_rtx_MEM (mode
, addr
);
2153 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2157 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2158 way we are changing MEMREF, so we only preserve the alias set. */
2161 change_address (rtx memref
, machine_mode mode
, rtx addr
)
2163 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1, false);
2164 machine_mode mmode
= GET_MODE (new_rtx
);
2165 struct mem_attrs attrs
, *defattrs
;
2167 attrs
= *get_mem_attrs (memref
);
2168 defattrs
= mode_mem_attrs
[(int) mmode
];
2169 attrs
.expr
= NULL_TREE
;
2170 attrs
.offset_known_p
= false;
2171 attrs
.size_known_p
= defattrs
->size_known_p
;
2172 attrs
.size
= defattrs
->size
;
2173 attrs
.align
= defattrs
->align
;
2175 /* If there are no changes, just return the original memory reference. */
2176 if (new_rtx
== memref
)
2178 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2181 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2182 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2185 set_mem_attrs (new_rtx
, &attrs
);
2189 /* Return a memory reference like MEMREF, but with its mode changed
2190 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2191 nonzero, the memory address is forced to be valid.
2192 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2193 and the caller is responsible for adjusting MEMREF base register.
2194 If ADJUST_OBJECT is zero, the underlying object associated with the
2195 memory reference is left unchanged and the caller is responsible for
2196 dealing with it. Otherwise, if the new memory reference is outside
2197 the underlying object, even partially, then the object is dropped.
2198 SIZE, if nonzero, is the size of an access in cases where MODE
2199 has no inherent size. */
2202 adjust_address_1 (rtx memref
, machine_mode mode
, HOST_WIDE_INT offset
,
2203 int validate
, int adjust_address
, int adjust_object
,
2206 rtx addr
= XEXP (memref
, 0);
2208 machine_mode address_mode
;
2210 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2211 unsigned HOST_WIDE_INT max_align
;
2212 #ifdef POINTERS_EXTEND_UNSIGNED
2213 machine_mode pointer_mode
2214 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2217 /* VOIDmode means no mode change for change_address_1. */
2218 if (mode
== VOIDmode
)
2219 mode
= GET_MODE (memref
);
2221 /* Take the size of non-BLKmode accesses from the mode. */
2222 defattrs
= mode_mem_attrs
[(int) mode
];
2223 if (defattrs
->size_known_p
)
2224 size
= defattrs
->size
;
2226 /* If there are no changes, just return the original memory reference. */
2227 if (mode
== GET_MODE (memref
) && !offset
2228 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2229 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2233 /* ??? Prefer to create garbage instead of creating shared rtl.
2234 This may happen even if offset is nonzero -- consider
2235 (plus (plus reg reg) const_int) -- so do this always. */
2236 addr
= copy_rtx (addr
);
2238 /* Convert a possibly large offset to a signed value within the
2239 range of the target address space. */
2240 address_mode
= get_address_mode (memref
);
2241 pbits
= GET_MODE_BITSIZE (address_mode
);
2242 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2244 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2245 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2251 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2252 object, we can merge it into the LO_SUM. */
2253 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2255 && (unsigned HOST_WIDE_INT
) offset
2256 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2257 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2258 plus_constant (address_mode
,
2259 XEXP (addr
, 1), offset
));
2260 #ifdef POINTERS_EXTEND_UNSIGNED
2261 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2262 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2263 the fact that pointers are not allowed to overflow. */
2264 else if (POINTERS_EXTEND_UNSIGNED
> 0
2265 && GET_CODE (addr
) == ZERO_EXTEND
2266 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2267 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2268 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2269 plus_constant (pointer_mode
,
2270 XEXP (addr
, 0), offset
));
2273 addr
= plus_constant (address_mode
, addr
, offset
);
2276 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
, false);
2278 /* If the address is a REG, change_address_1 rightfully returns memref,
2279 but this would destroy memref's MEM_ATTRS. */
2280 if (new_rtx
== memref
&& offset
!= 0)
2281 new_rtx
= copy_rtx (new_rtx
);
2283 /* Conservatively drop the object if we don't know where we start from. */
2284 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2286 attrs
.expr
= NULL_TREE
;
2290 /* Compute the new values of the memory attributes due to this adjustment.
2291 We add the offsets and update the alignment. */
2292 if (attrs
.offset_known_p
)
2294 attrs
.offset
+= offset
;
2296 /* Drop the object if the new left end is not within its bounds. */
2297 if (adjust_object
&& attrs
.offset
< 0)
2299 attrs
.expr
= NULL_TREE
;
2304 /* Compute the new alignment by taking the MIN of the alignment and the
2305 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2309 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2310 attrs
.align
= MIN (attrs
.align
, max_align
);
2315 /* Drop the object if the new right end is not within its bounds. */
2316 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2318 attrs
.expr
= NULL_TREE
;
2321 attrs
.size_known_p
= true;
2324 else if (attrs
.size_known_p
)
2326 gcc_assert (!adjust_object
);
2327 attrs
.size
-= offset
;
2328 /* ??? The store_by_pieces machinery generates negative sizes,
2329 so don't assert for that here. */
2332 set_mem_attrs (new_rtx
, &attrs
);
2337 /* Return a memory reference like MEMREF, but with its mode changed
2338 to MODE and its address changed to ADDR, which is assumed to be
2339 MEMREF offset by OFFSET bytes. If VALIDATE is
2340 nonzero, the memory address is forced to be valid. */
2343 adjust_automodify_address_1 (rtx memref
, machine_mode mode
, rtx addr
,
2344 HOST_WIDE_INT offset
, int validate
)
2346 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
, false);
2347 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2350 /* Return a memory reference like MEMREF, but whose address is changed by
2351 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2352 known to be in OFFSET (possibly 1). */
2355 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2357 rtx new_rtx
, addr
= XEXP (memref
, 0);
2358 machine_mode address_mode
;
2359 struct mem_attrs attrs
, *defattrs
;
2361 attrs
= *get_mem_attrs (memref
);
2362 address_mode
= get_address_mode (memref
);
2363 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2365 /* At this point we don't know _why_ the address is invalid. It
2366 could have secondary memory references, multiplies or anything.
2368 However, if we did go and rearrange things, we can wind up not
2369 being able to recognize the magic around pic_offset_table_rtx.
2370 This stuff is fragile, and is yet another example of why it is
2371 bad to expose PIC machinery too early. */
2372 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2374 && GET_CODE (addr
) == PLUS
2375 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2377 addr
= force_reg (GET_MODE (addr
), addr
);
2378 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2381 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2382 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1, false);
2384 /* If there are no changes, just return the original memory reference. */
2385 if (new_rtx
== memref
)
2388 /* Update the alignment to reflect the offset. Reset the offset, which
2390 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2391 attrs
.offset_known_p
= false;
2392 attrs
.size_known_p
= defattrs
->size_known_p
;
2393 attrs
.size
= defattrs
->size
;
2394 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2395 set_mem_attrs (new_rtx
, &attrs
);
2399 /* Return a memory reference like MEMREF, but with its address changed to
2400 ADDR. The caller is asserting that the actual piece of memory pointed
2401 to is the same, just the form of the address is being changed, such as
2402 by putting something into a register. INPLACE is true if any changes
2403 can be made directly to MEMREF or false if MEMREF must be treated as
2407 replace_equiv_address (rtx memref
, rtx addr
, bool inplace
)
2409 /* change_address_1 copies the memory attribute structure without change
2410 and that's exactly what we want here. */
2411 update_temp_slot_address (XEXP (memref
, 0), addr
);
2412 return change_address_1 (memref
, VOIDmode
, addr
, 1, inplace
);
2415 /* Likewise, but the reference is not required to be valid. */
2418 replace_equiv_address_nv (rtx memref
, rtx addr
, bool inplace
)
2420 return change_address_1 (memref
, VOIDmode
, addr
, 0, inplace
);
2423 /* Return a memory reference like MEMREF, but with its mode widened to
2424 MODE and offset by OFFSET. This would be used by targets that e.g.
2425 cannot issue QImode memory operations and have to use SImode memory
2426 operations plus masking logic. */
2429 widen_memory_access (rtx memref
, machine_mode mode
, HOST_WIDE_INT offset
)
2431 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2432 struct mem_attrs attrs
;
2433 unsigned int size
= GET_MODE_SIZE (mode
);
2435 /* If there are no changes, just return the original memory reference. */
2436 if (new_rtx
== memref
)
2439 attrs
= *get_mem_attrs (new_rtx
);
2441 /* If we don't know what offset we were at within the expression, then
2442 we can't know if we've overstepped the bounds. */
2443 if (! attrs
.offset_known_p
)
2444 attrs
.expr
= NULL_TREE
;
2448 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2450 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2451 tree offset
= component_ref_field_offset (attrs
.expr
);
2453 if (! DECL_SIZE_UNIT (field
))
2455 attrs
.expr
= NULL_TREE
;
2459 /* Is the field at least as large as the access? If so, ok,
2460 otherwise strip back to the containing structure. */
2461 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2462 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2463 && attrs
.offset
>= 0)
2466 if (! tree_fits_uhwi_p (offset
))
2468 attrs
.expr
= NULL_TREE
;
2472 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2473 attrs
.offset
+= tree_to_uhwi (offset
);
2474 attrs
.offset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
2477 /* Similarly for the decl. */
2478 else if (DECL_P (attrs
.expr
)
2479 && DECL_SIZE_UNIT (attrs
.expr
)
2480 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2481 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2482 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2486 /* The widened memory access overflows the expression, which means
2487 that it could alias another expression. Zap it. */
2488 attrs
.expr
= NULL_TREE
;
2494 attrs
.offset_known_p
= false;
2496 /* The widened memory may alias other stuff, so zap the alias set. */
2497 /* ??? Maybe use get_alias_set on any remaining expression. */
2499 attrs
.size_known_p
= true;
2501 set_mem_attrs (new_rtx
, &attrs
);
2505 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2506 static GTY(()) tree spill_slot_decl
;
2509 get_spill_slot_decl (bool force_build_p
)
2511 tree d
= spill_slot_decl
;
2513 struct mem_attrs attrs
;
2515 if (d
|| !force_build_p
)
2518 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2519 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2520 DECL_ARTIFICIAL (d
) = 1;
2521 DECL_IGNORED_P (d
) = 1;
2523 spill_slot_decl
= d
;
2525 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2526 MEM_NOTRAP_P (rd
) = 1;
2527 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2528 attrs
.alias
= new_alias_set ();
2530 set_mem_attrs (rd
, &attrs
);
2531 SET_DECL_RTL (d
, rd
);
2536 /* Given MEM, a result from assign_stack_local, fill in the memory
2537 attributes as appropriate for a register allocator spill slot.
2538 These slots are not aliasable by other memory. We arrange for
2539 them all to use a single MEM_EXPR, so that the aliasing code can
2540 work properly in the case of shared spill slots. */
2543 set_mem_attrs_for_spill (rtx mem
)
2545 struct mem_attrs attrs
;
2548 attrs
= *get_mem_attrs (mem
);
2549 attrs
.expr
= get_spill_slot_decl (true);
2550 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2551 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2553 /* We expect the incoming memory to be of the form:
2554 (mem:MODE (plus (reg sfp) (const_int offset)))
2555 with perhaps the plus missing for offset = 0. */
2556 addr
= XEXP (mem
, 0);
2557 attrs
.offset_known_p
= true;
2559 if (GET_CODE (addr
) == PLUS
2560 && CONST_INT_P (XEXP (addr
, 1)))
2561 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2563 set_mem_attrs (mem
, &attrs
);
2564 MEM_NOTRAP_P (mem
) = 1;
2567 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2570 gen_label_rtx (void)
2572 return as_a
<rtx_code_label
*> (
2573 gen_rtx_CODE_LABEL (VOIDmode
, NULL_RTX
, NULL_RTX
,
2574 NULL
, label_num
++, NULL
));
2577 /* For procedure integration. */
2579 /* Install new pointers to the first and last insns in the chain.
2580 Also, set cur_insn_uid to one higher than the last in use.
2581 Used for an inline-procedure after copying the insn chain. */
2584 set_new_first_and_last_insn (rtx_insn
*first
, rtx_insn
*last
)
2588 set_first_insn (first
);
2589 set_last_insn (last
);
2592 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2594 int debug_count
= 0;
2596 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2597 cur_debug_insn_uid
= 0;
2599 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2600 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2601 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2604 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2605 if (DEBUG_INSN_P (insn
))
2610 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2612 cur_debug_insn_uid
++;
2615 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2616 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2621 /* Go through all the RTL insn bodies and copy any invalid shared
2622 structure. This routine should only be called once. */
2625 unshare_all_rtl_1 (rtx_insn
*insn
)
2627 /* Unshare just about everything else. */
2628 unshare_all_rtl_in_chain (insn
);
2630 /* Make sure the addresses of stack slots found outside the insn chain
2631 (such as, in DECL_RTL of a variable) are not shared
2632 with the insn chain.
2634 This special care is necessary when the stack slot MEM does not
2635 actually appear in the insn chain. If it does appear, its address
2636 is unshared from all else at that point. */
2637 stack_slot_list
= safe_as_a
<rtx_expr_list
*> (
2638 copy_rtx_if_shared (stack_slot_list
));
2641 /* Go through all the RTL insn bodies and copy any invalid shared
2642 structure, again. This is a fairly expensive thing to do so it
2643 should be done sparingly. */
2646 unshare_all_rtl_again (rtx_insn
*insn
)
2651 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2654 reset_used_flags (PATTERN (p
));
2655 reset_used_flags (REG_NOTES (p
));
2657 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2660 /* Make sure that virtual stack slots are not shared. */
2661 set_used_decls (DECL_INITIAL (cfun
->decl
));
2663 /* Make sure that virtual parameters are not shared. */
2664 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2665 set_used_flags (DECL_RTL (decl
));
2667 reset_used_flags (stack_slot_list
);
2669 unshare_all_rtl_1 (insn
);
2673 unshare_all_rtl (void)
2675 unshare_all_rtl_1 (get_insns ());
2680 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2681 Recursively does the same for subexpressions. */
2684 verify_rtx_sharing (rtx orig
, rtx insn
)
2689 const char *format_ptr
;
2694 code
= GET_CODE (x
);
2696 /* These types may be freely shared. */
2712 /* SCRATCH must be shared because they represent distinct values. */
2715 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2716 clobbers or clobbers of hard registers that originated as pseudos.
2717 This is needed to allow safe register renaming. */
2718 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2719 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2724 if (shared_const_p (orig
))
2729 /* A MEM is allowed to be shared if its address is constant. */
2730 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2731 || reload_completed
|| reload_in_progress
)
2740 /* This rtx may not be shared. If it has already been seen,
2741 replace it with a copy of itself. */
2742 #ifdef ENABLE_CHECKING
2743 if (RTX_FLAG (x
, used
))
2745 error ("invalid rtl sharing found in the insn");
2747 error ("shared rtx");
2749 internal_error ("internal consistency failure");
2752 gcc_assert (!RTX_FLAG (x
, used
));
2754 RTX_FLAG (x
, used
) = 1;
2756 /* Now scan the subexpressions recursively. */
2758 format_ptr
= GET_RTX_FORMAT (code
);
2760 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2762 switch (*format_ptr
++)
2765 verify_rtx_sharing (XEXP (x
, i
), insn
);
2769 if (XVEC (x
, i
) != NULL
)
2772 int len
= XVECLEN (x
, i
);
2774 for (j
= 0; j
< len
; j
++)
2776 /* We allow sharing of ASM_OPERANDS inside single
2778 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2779 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2781 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2783 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2792 /* Reset used-flags for INSN. */
2795 reset_insn_used_flags (rtx insn
)
2797 gcc_assert (INSN_P (insn
));
2798 reset_used_flags (PATTERN (insn
));
2799 reset_used_flags (REG_NOTES (insn
));
2801 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2804 /* Go through all the RTL insn bodies and clear all the USED bits. */
2807 reset_all_used_flags (void)
2811 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2814 rtx pat
= PATTERN (p
);
2815 if (GET_CODE (pat
) != SEQUENCE
)
2816 reset_insn_used_flags (p
);
2819 gcc_assert (REG_NOTES (p
) == NULL
);
2820 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2822 rtx insn
= XVECEXP (pat
, 0, i
);
2824 reset_insn_used_flags (insn
);
2830 /* Verify sharing in INSN. */
2833 verify_insn_sharing (rtx insn
)
2835 gcc_assert (INSN_P (insn
));
2836 reset_used_flags (PATTERN (insn
));
2837 reset_used_flags (REG_NOTES (insn
));
2839 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2842 /* Go through all the RTL insn bodies and check that there is no unexpected
2843 sharing in between the subexpressions. */
2846 verify_rtl_sharing (void)
2850 timevar_push (TV_VERIFY_RTL_SHARING
);
2852 reset_all_used_flags ();
2854 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2857 rtx pat
= PATTERN (p
);
2858 if (GET_CODE (pat
) != SEQUENCE
)
2859 verify_insn_sharing (p
);
2861 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2863 rtx insn
= XVECEXP (pat
, 0, i
);
2865 verify_insn_sharing (insn
);
2869 reset_all_used_flags ();
2871 timevar_pop (TV_VERIFY_RTL_SHARING
);
2874 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2875 Assumes the mark bits are cleared at entry. */
2878 unshare_all_rtl_in_chain (rtx_insn
*insn
)
2880 for (; insn
; insn
= NEXT_INSN (insn
))
2883 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2884 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2886 CALL_INSN_FUNCTION_USAGE (insn
)
2887 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2891 /* Go through all virtual stack slots of a function and mark them as
2892 shared. We never replace the DECL_RTLs themselves with a copy,
2893 but expressions mentioned into a DECL_RTL cannot be shared with
2894 expressions in the instruction stream.
2896 Note that reload may convert pseudo registers into memories in-place.
2897 Pseudo registers are always shared, but MEMs never are. Thus if we
2898 reset the used flags on MEMs in the instruction stream, we must set
2899 them again on MEMs that appear in DECL_RTLs. */
2902 set_used_decls (tree blk
)
2907 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2908 if (DECL_RTL_SET_P (t
))
2909 set_used_flags (DECL_RTL (t
));
2911 /* Now process sub-blocks. */
2912 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2916 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2917 Recursively does the same for subexpressions. Uses
2918 copy_rtx_if_shared_1 to reduce stack space. */
2921 copy_rtx_if_shared (rtx orig
)
2923 copy_rtx_if_shared_1 (&orig
);
2927 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2928 use. Recursively does the same for subexpressions. */
2931 copy_rtx_if_shared_1 (rtx
*orig1
)
2937 const char *format_ptr
;
2941 /* Repeat is used to turn tail-recursion into iteration. */
2948 code
= GET_CODE (x
);
2950 /* These types may be freely shared. */
2966 /* SCRATCH must be shared because they represent distinct values. */
2969 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2970 clobbers or clobbers of hard registers that originated as pseudos.
2971 This is needed to allow safe register renaming. */
2972 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2973 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2978 if (shared_const_p (x
))
2988 /* The chain of insns is not being copied. */
2995 /* This rtx may not be shared. If it has already been seen,
2996 replace it with a copy of itself. */
2998 if (RTX_FLAG (x
, used
))
3000 x
= shallow_copy_rtx (x
);
3003 RTX_FLAG (x
, used
) = 1;
3005 /* Now scan the subexpressions recursively.
3006 We can store any replaced subexpressions directly into X
3007 since we know X is not shared! Any vectors in X
3008 must be copied if X was copied. */
3010 format_ptr
= GET_RTX_FORMAT (code
);
3011 length
= GET_RTX_LENGTH (code
);
3014 for (i
= 0; i
< length
; i
++)
3016 switch (*format_ptr
++)
3020 copy_rtx_if_shared_1 (last_ptr
);
3021 last_ptr
= &XEXP (x
, i
);
3025 if (XVEC (x
, i
) != NULL
)
3028 int len
= XVECLEN (x
, i
);
3030 /* Copy the vector iff I copied the rtx and the length
3032 if (copied
&& len
> 0)
3033 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
3035 /* Call recursively on all inside the vector. */
3036 for (j
= 0; j
< len
; j
++)
3039 copy_rtx_if_shared_1 (last_ptr
);
3040 last_ptr
= &XVECEXP (x
, i
, j
);
3055 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
3058 mark_used_flags (rtx x
, int flag
)
3062 const char *format_ptr
;
3065 /* Repeat is used to turn tail-recursion into iteration. */
3070 code
= GET_CODE (x
);
3072 /* These types may be freely shared so we needn't do any resetting
3096 /* The chain of insns is not being copied. */
3103 RTX_FLAG (x
, used
) = flag
;
3105 format_ptr
= GET_RTX_FORMAT (code
);
3106 length
= GET_RTX_LENGTH (code
);
3108 for (i
= 0; i
< length
; i
++)
3110 switch (*format_ptr
++)
3118 mark_used_flags (XEXP (x
, i
), flag
);
3122 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3123 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
3129 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3130 to look for shared sub-parts. */
3133 reset_used_flags (rtx x
)
3135 mark_used_flags (x
, 0);
3138 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3139 to look for shared sub-parts. */
3142 set_used_flags (rtx x
)
3144 mark_used_flags (x
, 1);
3147 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3148 Return X or the rtx for the pseudo reg the value of X was copied into.
3149 OTHER must be valid as a SET_DEST. */
3152 make_safe_from (rtx x
, rtx other
)
3155 switch (GET_CODE (other
))
3158 other
= SUBREG_REG (other
);
3160 case STRICT_LOW_PART
:
3163 other
= XEXP (other
, 0);
3172 && GET_CODE (x
) != SUBREG
)
3174 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
3175 || reg_mentioned_p (other
, x
))))
3177 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3178 emit_move_insn (temp
, x
);
3184 /* Emission of insns (adding them to the doubly-linked list). */
3186 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3189 get_last_insn_anywhere (void)
3191 struct sequence_stack
*seq
;
3192 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
3198 /* Return the first nonnote insn emitted in current sequence or current
3199 function. This routine looks inside SEQUENCEs. */
3202 get_first_nonnote_insn (void)
3204 rtx_insn
*insn
= get_insns ();
3209 for (insn
= next_insn (insn
);
3210 insn
&& NOTE_P (insn
);
3211 insn
= next_insn (insn
))
3215 if (NONJUMP_INSN_P (insn
)
3216 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3217 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3224 /* Return the last nonnote insn emitted in current sequence or current
3225 function. This routine looks inside SEQUENCEs. */
3228 get_last_nonnote_insn (void)
3230 rtx_insn
*insn
= get_last_insn ();
3235 for (insn
= previous_insn (insn
);
3236 insn
&& NOTE_P (insn
);
3237 insn
= previous_insn (insn
))
3241 if (NONJUMP_INSN_P (insn
))
3242 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
3243 insn
= seq
->insn (seq
->len () - 1);
3250 /* Return the number of actual (non-debug) insns emitted in this
3254 get_max_insn_count (void)
3256 int n
= cur_insn_uid
;
3258 /* The table size must be stable across -g, to avoid codegen
3259 differences due to debug insns, and not be affected by
3260 -fmin-insn-uid, to avoid excessive table size and to simplify
3261 debugging of -fcompare-debug failures. */
3262 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3263 n
-= cur_debug_insn_uid
;
3265 n
-= MIN_NONDEBUG_INSN_UID
;
3271 /* Return the next insn. If it is a SEQUENCE, return the first insn
3275 next_insn (rtx_insn
*insn
)
3279 insn
= NEXT_INSN (insn
);
3280 if (insn
&& NONJUMP_INSN_P (insn
)
3281 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3282 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3288 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3292 previous_insn (rtx_insn
*insn
)
3296 insn
= PREV_INSN (insn
);
3297 if (insn
&& NONJUMP_INSN_P (insn
))
3298 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
3299 insn
= seq
->insn (seq
->len () - 1);
3305 /* Return the next insn after INSN that is not a NOTE. This routine does not
3306 look inside SEQUENCEs. */
3309 next_nonnote_insn (rtx uncast_insn
)
3311 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3314 insn
= NEXT_INSN (insn
);
3315 if (insn
== 0 || !NOTE_P (insn
))
3322 /* Return the next insn after INSN that is not a NOTE, but stop the
3323 search before we enter another basic block. This routine does not
3324 look inside SEQUENCEs. */
3327 next_nonnote_insn_bb (rtx_insn
*insn
)
3331 insn
= NEXT_INSN (insn
);
3332 if (insn
== 0 || !NOTE_P (insn
))
3334 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3341 /* Return the previous insn before INSN that is not a NOTE. This routine does
3342 not look inside SEQUENCEs. */
3345 prev_nonnote_insn (rtx uncast_insn
)
3347 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3351 insn
= PREV_INSN (insn
);
3352 if (insn
== 0 || !NOTE_P (insn
))
3359 /* Return the previous insn before INSN that is not a NOTE, but stop
3360 the search before we enter another basic block. This routine does
3361 not look inside SEQUENCEs. */
3364 prev_nonnote_insn_bb (rtx uncast_insn
)
3366 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3370 insn
= PREV_INSN (insn
);
3371 if (insn
== 0 || !NOTE_P (insn
))
3373 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3380 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3381 routine does not look inside SEQUENCEs. */
3384 next_nondebug_insn (rtx uncast_insn
)
3386 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3390 insn
= NEXT_INSN (insn
);
3391 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3398 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3399 This routine does not look inside SEQUENCEs. */
3402 prev_nondebug_insn (rtx uncast_insn
)
3404 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3408 insn
= PREV_INSN (insn
);
3409 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3416 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3417 This routine does not look inside SEQUENCEs. */
3420 next_nonnote_nondebug_insn (rtx uncast_insn
)
3422 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3426 insn
= NEXT_INSN (insn
);
3427 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3434 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3435 This routine does not look inside SEQUENCEs. */
3438 prev_nonnote_nondebug_insn (rtx uncast_insn
)
3440 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3444 insn
= PREV_INSN (insn
);
3445 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3452 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3453 or 0, if there is none. This routine does not look inside
3457 next_real_insn (rtx uncast_insn
)
3459 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3463 insn
= NEXT_INSN (insn
);
3464 if (insn
== 0 || INSN_P (insn
))
3471 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3472 or 0, if there is none. This routine does not look inside
3476 prev_real_insn (rtx uncast_insn
)
3478 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3482 insn
= PREV_INSN (insn
);
3483 if (insn
== 0 || INSN_P (insn
))
3490 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3491 This routine does not look inside SEQUENCEs. */
3494 last_call_insn (void)
3498 for (insn
= get_last_insn ();
3499 insn
&& !CALL_P (insn
);
3500 insn
= PREV_INSN (insn
))
3503 return safe_as_a
<rtx_call_insn
*> (insn
);
3506 /* Find the next insn after INSN that really does something. This routine
3507 does not look inside SEQUENCEs. After reload this also skips over
3508 standalone USE and CLOBBER insn. */
3511 active_insn_p (const_rtx insn
)
3513 return (CALL_P (insn
) || JUMP_P (insn
)
3514 || JUMP_TABLE_DATA_P (insn
) /* FIXME */
3515 || (NONJUMP_INSN_P (insn
)
3516 && (! reload_completed
3517 || (GET_CODE (PATTERN (insn
)) != USE
3518 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3522 next_active_insn (rtx uncast_insn
)
3524 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3528 insn
= NEXT_INSN (insn
);
3529 if (insn
== 0 || active_insn_p (insn
))
3536 /* Find the last insn before INSN that really does something. This routine
3537 does not look inside SEQUENCEs. After reload this also skips over
3538 standalone USE and CLOBBER insn. */
3541 prev_active_insn (rtx uncast_insn
)
3543 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3547 insn
= PREV_INSN (insn
);
3548 if (insn
== 0 || active_insn_p (insn
))
3555 /* Return the next insn that uses CC0 after INSN, which is assumed to
3556 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3557 applied to the result of this function should yield INSN).
3559 Normally, this is simply the next insn. However, if a REG_CC_USER note
3560 is present, it contains the insn that uses CC0.
3562 Return 0 if we can't find the insn. */
3565 next_cc0_user (rtx uncast_insn
)
3567 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3569 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3572 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3574 insn
= next_nonnote_insn (insn
);
3575 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3576 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3578 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3584 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3585 note, it is the previous insn. */
3588 prev_cc0_setter (rtx_insn
*insn
)
3590 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3593 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3595 insn
= prev_nonnote_insn (insn
);
3596 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3602 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3605 find_auto_inc (const_rtx x
, const_rtx reg
)
3607 subrtx_iterator::array_type array
;
3608 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
3610 const_rtx x
= *iter
;
3611 if (GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
3612 && rtx_equal_p (reg
, XEXP (x
, 0)))
3619 /* Increment the label uses for all labels present in rtx. */
3622 mark_label_nuses (rtx x
)
3628 code
= GET_CODE (x
);
3629 if (code
== LABEL_REF
&& LABEL_P (LABEL_REF_LABEL (x
)))
3630 LABEL_NUSES (LABEL_REF_LABEL (x
))++;
3632 fmt
= GET_RTX_FORMAT (code
);
3633 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3636 mark_label_nuses (XEXP (x
, i
));
3637 else if (fmt
[i
] == 'E')
3638 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3639 mark_label_nuses (XVECEXP (x
, i
, j
));
3644 /* Try splitting insns that can be split for better scheduling.
3645 PAT is the pattern which might split.
3646 TRIAL is the insn providing PAT.
3647 LAST is nonzero if we should return the last insn of the sequence produced.
3649 If this routine succeeds in splitting, it returns the first or last
3650 replacement insn depending on the value of LAST. Otherwise, it
3651 returns TRIAL. If the insn to be returned can be split, it will be. */
3654 try_split (rtx pat
, rtx_insn
*trial
, int last
)
3656 rtx_insn
*before
= PREV_INSN (trial
);
3657 rtx_insn
*after
= NEXT_INSN (trial
);
3659 rtx_insn
*seq
, *tem
;
3661 rtx_insn
*insn_last
, *insn
;
3663 rtx_insn
*call_insn
= NULL
;
3665 /* We're not good at redistributing frame information. */
3666 if (RTX_FRAME_RELATED_P (trial
))
3669 if (any_condjump_p (trial
)
3670 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3671 split_branch_probability
= XINT (note
, 0);
3672 probability
= split_branch_probability
;
3674 seq
= split_insns (pat
, trial
);
3676 split_branch_probability
= -1;
3681 /* Avoid infinite loop if any insn of the result matches
3682 the original pattern. */
3686 if (INSN_P (insn_last
)
3687 && rtx_equal_p (PATTERN (insn_last
), pat
))
3689 if (!NEXT_INSN (insn_last
))
3691 insn_last
= NEXT_INSN (insn_last
);
3694 /* We will be adding the new sequence to the function. The splitters
3695 may have introduced invalid RTL sharing, so unshare the sequence now. */
3696 unshare_all_rtl_in_chain (seq
);
3698 /* Mark labels and copy flags. */
3699 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3704 CROSSING_JUMP_P (insn
) = CROSSING_JUMP_P (trial
);
3705 mark_jump_label (PATTERN (insn
), insn
, 0);
3707 if (probability
!= -1
3708 && any_condjump_p (insn
)
3709 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3711 /* We can preserve the REG_BR_PROB notes only if exactly
3712 one jump is created, otherwise the machine description
3713 is responsible for this step using
3714 split_branch_probability variable. */
3715 gcc_assert (njumps
== 1);
3716 add_int_reg_note (insn
, REG_BR_PROB
, probability
);
3721 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3722 in SEQ and copy any additional information across. */
3725 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3731 gcc_assert (call_insn
== NULL_RTX
);
3734 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3735 target may have explicitly specified. */
3736 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3739 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3741 /* If the old call was a sibling call, the new one must
3743 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3745 /* If the new call is the last instruction in the sequence,
3746 it will effectively replace the old call in-situ. Otherwise
3747 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3748 so that it comes immediately after the new call. */
3749 if (NEXT_INSN (insn
))
3750 for (next
= NEXT_INSN (trial
);
3751 next
&& NOTE_P (next
);
3752 next
= NEXT_INSN (next
))
3753 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3756 add_insn_after (next
, insn
, NULL
);
3762 /* Copy notes, particularly those related to the CFG. */
3763 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3765 switch (REG_NOTE_KIND (note
))
3768 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3774 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3777 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3781 case REG_NON_LOCAL_GOTO
:
3782 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3785 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3791 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3793 rtx reg
= XEXP (note
, 0);
3794 if (!FIND_REG_INC_NOTE (insn
, reg
)
3795 && find_auto_inc (PATTERN (insn
), reg
))
3796 add_reg_note (insn
, REG_INC
, reg
);
3802 fixup_args_size_notes (NULL
, insn_last
, INTVAL (XEXP (note
, 0)));
3806 gcc_assert (call_insn
!= NULL_RTX
);
3807 add_reg_note (call_insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3815 /* If there are LABELS inside the split insns increment the
3816 usage count so we don't delete the label. */
3820 while (insn
!= NULL_RTX
)
3822 /* JUMP_P insns have already been "marked" above. */
3823 if (NONJUMP_INSN_P (insn
))
3824 mark_label_nuses (PATTERN (insn
));
3826 insn
= PREV_INSN (insn
);
3830 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3832 delete_insn (trial
);
3834 /* Recursively call try_split for each new insn created; by the
3835 time control returns here that insn will be fully split, so
3836 set LAST and continue from the insn after the one returned.
3837 We can't use next_active_insn here since AFTER may be a note.
3838 Ignore deleted insns, which can be occur if not optimizing. */
3839 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3840 if (! tem
->deleted () && INSN_P (tem
))
3841 tem
= try_split (PATTERN (tem
), tem
, 1);
3843 /* Return either the first or the last insn, depending on which was
3846 ? (after
? PREV_INSN (after
) : get_last_insn ())
3847 : NEXT_INSN (before
);
3850 /* Make and return an INSN rtx, initializing all its slots.
3851 Store PATTERN in the pattern slots. */
3854 make_insn_raw (rtx pattern
)
3858 insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
3860 INSN_UID (insn
) = cur_insn_uid
++;
3861 PATTERN (insn
) = pattern
;
3862 INSN_CODE (insn
) = -1;
3863 REG_NOTES (insn
) = NULL
;
3864 INSN_LOCATION (insn
) = curr_insn_location ();
3865 BLOCK_FOR_INSN (insn
) = NULL
;
3867 #ifdef ENABLE_RTL_CHECKING
3870 && (returnjump_p (insn
)
3871 || (GET_CODE (insn
) == SET
3872 && SET_DEST (insn
) == pc_rtx
)))
3874 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3882 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3885 make_debug_insn_raw (rtx pattern
)
3887 rtx_debug_insn
*insn
;
3889 insn
= as_a
<rtx_debug_insn
*> (rtx_alloc (DEBUG_INSN
));
3890 INSN_UID (insn
) = cur_debug_insn_uid
++;
3891 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3892 INSN_UID (insn
) = cur_insn_uid
++;
3894 PATTERN (insn
) = pattern
;
3895 INSN_CODE (insn
) = -1;
3896 REG_NOTES (insn
) = NULL
;
3897 INSN_LOCATION (insn
) = curr_insn_location ();
3898 BLOCK_FOR_INSN (insn
) = NULL
;
3903 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3906 make_jump_insn_raw (rtx pattern
)
3908 rtx_jump_insn
*insn
;
3910 insn
= as_a
<rtx_jump_insn
*> (rtx_alloc (JUMP_INSN
));
3911 INSN_UID (insn
) = cur_insn_uid
++;
3913 PATTERN (insn
) = pattern
;
3914 INSN_CODE (insn
) = -1;
3915 REG_NOTES (insn
) = NULL
;
3916 JUMP_LABEL (insn
) = NULL
;
3917 INSN_LOCATION (insn
) = curr_insn_location ();
3918 BLOCK_FOR_INSN (insn
) = NULL
;
3923 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3926 make_call_insn_raw (rtx pattern
)
3928 rtx_call_insn
*insn
;
3930 insn
= as_a
<rtx_call_insn
*> (rtx_alloc (CALL_INSN
));
3931 INSN_UID (insn
) = cur_insn_uid
++;
3933 PATTERN (insn
) = pattern
;
3934 INSN_CODE (insn
) = -1;
3935 REG_NOTES (insn
) = NULL
;
3936 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3937 INSN_LOCATION (insn
) = curr_insn_location ();
3938 BLOCK_FOR_INSN (insn
) = NULL
;
3943 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3946 make_note_raw (enum insn_note subtype
)
3948 /* Some notes are never created this way at all. These notes are
3949 only created by patching out insns. */
3950 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3951 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3953 rtx_note
*note
= as_a
<rtx_note
*> (rtx_alloc (NOTE
));
3954 INSN_UID (note
) = cur_insn_uid
++;
3955 NOTE_KIND (note
) = subtype
;
3956 BLOCK_FOR_INSN (note
) = NULL
;
3957 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3961 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3962 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3963 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3966 link_insn_into_chain (rtx_insn
*insn
, rtx_insn
*prev
, rtx_insn
*next
)
3968 SET_PREV_INSN (insn
) = prev
;
3969 SET_NEXT_INSN (insn
) = next
;
3972 SET_NEXT_INSN (prev
) = insn
;
3973 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3975 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (prev
));
3976 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = insn
;
3981 SET_PREV_INSN (next
) = insn
;
3982 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3984 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (next
));
3985 SET_PREV_INSN (sequence
->insn (0)) = insn
;
3989 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3991 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (insn
));
3992 SET_PREV_INSN (sequence
->insn (0)) = prev
;
3993 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = next
;
3997 /* Add INSN to the end of the doubly-linked list.
3998 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
4001 add_insn (rtx_insn
*insn
)
4003 rtx_insn
*prev
= get_last_insn ();
4004 link_insn_into_chain (insn
, prev
, NULL
);
4005 if (NULL
== get_insns ())
4006 set_first_insn (insn
);
4007 set_last_insn (insn
);
4010 /* Add INSN into the doubly-linked list after insn AFTER. */
4013 add_insn_after_nobb (rtx_insn
*insn
, rtx_insn
*after
)
4015 rtx_insn
*next
= NEXT_INSN (after
);
4017 gcc_assert (!optimize
|| !after
->deleted ());
4019 link_insn_into_chain (insn
, after
, next
);
4023 struct sequence_stack
*seq
;
4025 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4026 if (after
== seq
->last
)
4034 /* Add INSN into the doubly-linked list before insn BEFORE. */
4037 add_insn_before_nobb (rtx_insn
*insn
, rtx_insn
*before
)
4039 rtx_insn
*prev
= PREV_INSN (before
);
4041 gcc_assert (!optimize
|| !before
->deleted ());
4043 link_insn_into_chain (insn
, prev
, before
);
4047 struct sequence_stack
*seq
;
4049 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4050 if (before
== seq
->first
)
4060 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
4061 If BB is NULL, an attempt is made to infer the bb from before.
4063 This and the next function should be the only functions called
4064 to insert an insn once delay slots have been filled since only
4065 they know how to update a SEQUENCE. */
4068 add_insn_after (rtx uncast_insn
, rtx uncast_after
, basic_block bb
)
4070 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4071 rtx_insn
*after
= as_a
<rtx_insn
*> (uncast_after
);
4072 add_insn_after_nobb (insn
, after
);
4073 if (!BARRIER_P (after
)
4074 && !BARRIER_P (insn
)
4075 && (bb
= BLOCK_FOR_INSN (after
)))
4077 set_block_for_insn (insn
, bb
);
4079 df_insn_rescan (insn
);
4080 /* Should not happen as first in the BB is always
4081 either NOTE or LABEL. */
4082 if (BB_END (bb
) == after
4083 /* Avoid clobbering of structure when creating new BB. */
4084 && !BARRIER_P (insn
)
4085 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
4090 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4091 If BB is NULL, an attempt is made to infer the bb from before.
4093 This and the previous function should be the only functions called
4094 to insert an insn once delay slots have been filled since only
4095 they know how to update a SEQUENCE. */
4098 add_insn_before (rtx uncast_insn
, rtx uncast_before
, basic_block bb
)
4100 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4101 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4102 add_insn_before_nobb (insn
, before
);
4105 && !BARRIER_P (before
)
4106 && !BARRIER_P (insn
))
4107 bb
= BLOCK_FOR_INSN (before
);
4111 set_block_for_insn (insn
, bb
);
4113 df_insn_rescan (insn
);
4114 /* Should not happen as first in the BB is always either NOTE or
4116 gcc_assert (BB_HEAD (bb
) != insn
4117 /* Avoid clobbering of structure when creating new BB. */
4119 || NOTE_INSN_BASIC_BLOCK_P (insn
));
4123 /* Replace insn with an deleted instruction note. */
4126 set_insn_deleted (rtx insn
)
4129 df_insn_delete (as_a
<rtx_insn
*> (insn
));
4130 PUT_CODE (insn
, NOTE
);
4131 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
4135 /* Unlink INSN from the insn chain.
4137 This function knows how to handle sequences.
4139 This function does not invalidate data flow information associated with
4140 INSN (i.e. does not call df_insn_delete). That makes this function
4141 usable for only disconnecting an insn from the chain, and re-emit it
4144 To later insert INSN elsewhere in the insn chain via add_insn and
4145 similar functions, PREV_INSN and NEXT_INSN must be nullified by
4146 the caller. Nullifying them here breaks many insn chain walks.
4148 To really delete an insn and related DF information, use delete_insn. */
4151 remove_insn (rtx uncast_insn
)
4153 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4154 rtx_insn
*next
= NEXT_INSN (insn
);
4155 rtx_insn
*prev
= PREV_INSN (insn
);
4160 SET_NEXT_INSN (prev
) = next
;
4161 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
4163 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (prev
));
4164 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = next
;
4169 struct sequence_stack
*seq
;
4171 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4172 if (insn
== seq
->first
)
4183 SET_PREV_INSN (next
) = prev
;
4184 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
4186 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (next
));
4187 SET_PREV_INSN (sequence
->insn (0)) = prev
;
4192 struct sequence_stack
*seq
;
4194 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4195 if (insn
== seq
->last
)
4204 /* Fix up basic block boundaries, if necessary. */
4205 if (!BARRIER_P (insn
)
4206 && (bb
= BLOCK_FOR_INSN (insn
)))
4208 if (BB_HEAD (bb
) == insn
)
4210 /* Never ever delete the basic block note without deleting whole
4212 gcc_assert (!NOTE_P (insn
));
4213 BB_HEAD (bb
) = next
;
4215 if (BB_END (bb
) == insn
)
4220 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4223 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4225 gcc_assert (call_insn
&& CALL_P (call_insn
));
4227 /* Put the register usage information on the CALL. If there is already
4228 some usage information, put ours at the end. */
4229 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4233 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4234 link
= XEXP (link
, 1))
4237 XEXP (link
, 1) = call_fusage
;
4240 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4243 /* Delete all insns made since FROM.
4244 FROM becomes the new last instruction. */
4247 delete_insns_since (rtx_insn
*from
)
4252 SET_NEXT_INSN (from
) = 0;
4253 set_last_insn (from
);
4256 /* This function is deprecated, please use sequences instead.
4258 Move a consecutive bunch of insns to a different place in the chain.
4259 The insns to be moved are those between FROM and TO.
4260 They are moved to a new position after the insn AFTER.
4261 AFTER must not be FROM or TO or any insn in between.
4263 This function does not know about SEQUENCEs and hence should not be
4264 called after delay-slot filling has been done. */
4267 reorder_insns_nobb (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4269 #ifdef ENABLE_CHECKING
4271 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4272 gcc_assert (after
!= x
);
4273 gcc_assert (after
!= to
);
4276 /* Splice this bunch out of where it is now. */
4277 if (PREV_INSN (from
))
4278 SET_NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4280 SET_PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4281 if (get_last_insn () == to
)
4282 set_last_insn (PREV_INSN (from
));
4283 if (get_insns () == from
)
4284 set_first_insn (NEXT_INSN (to
));
4286 /* Make the new neighbors point to it and it to them. */
4287 if (NEXT_INSN (after
))
4288 SET_PREV_INSN (NEXT_INSN (after
)) = to
;
4290 SET_NEXT_INSN (to
) = NEXT_INSN (after
);
4291 SET_PREV_INSN (from
) = after
;
4292 SET_NEXT_INSN (after
) = from
;
4293 if (after
== get_last_insn ())
4297 /* Same as function above, but take care to update BB boundaries. */
4299 reorder_insns (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4301 rtx_insn
*prev
= PREV_INSN (from
);
4302 basic_block bb
, bb2
;
4304 reorder_insns_nobb (from
, to
, after
);
4306 if (!BARRIER_P (after
)
4307 && (bb
= BLOCK_FOR_INSN (after
)))
4310 df_set_bb_dirty (bb
);
4312 if (!BARRIER_P (from
)
4313 && (bb2
= BLOCK_FOR_INSN (from
)))
4315 if (BB_END (bb2
) == to
)
4316 BB_END (bb2
) = prev
;
4317 df_set_bb_dirty (bb2
);
4320 if (BB_END (bb
) == after
)
4323 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4325 df_insn_change_bb (x
, bb
);
4330 /* Emit insn(s) of given code and pattern
4331 at a specified place within the doubly-linked list.
4333 All of the emit_foo global entry points accept an object
4334 X which is either an insn list or a PATTERN of a single
4337 There are thus a few canonical ways to generate code and
4338 emit it at a specific place in the instruction stream. For
4339 example, consider the instruction named SPOT and the fact that
4340 we would like to emit some instructions before SPOT. We might
4344 ... emit the new instructions ...
4345 insns_head = get_insns ();
4348 emit_insn_before (insns_head, SPOT);
4350 It used to be common to generate SEQUENCE rtl instead, but that
4351 is a relic of the past which no longer occurs. The reason is that
4352 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4353 generated would almost certainly die right after it was created. */
4356 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4357 rtx_insn
*(*make_raw
) (rtx
))
4361 gcc_assert (before
);
4364 return safe_as_a
<rtx_insn
*> (last
);
4366 switch (GET_CODE (x
))
4375 insn
= as_a
<rtx_insn
*> (x
);
4378 rtx_insn
*next
= NEXT_INSN (insn
);
4379 add_insn_before (insn
, before
, bb
);
4385 #ifdef ENABLE_RTL_CHECKING
4392 last
= (*make_raw
) (x
);
4393 add_insn_before (last
, before
, bb
);
4397 return safe_as_a
<rtx_insn
*> (last
);
4400 /* Make X be output before the instruction BEFORE. */
4403 emit_insn_before_noloc (rtx x
, rtx_insn
*before
, basic_block bb
)
4405 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4408 /* Make an instruction with body X and code JUMP_INSN
4409 and output it before the instruction BEFORE. */
4412 emit_jump_insn_before_noloc (rtx x
, rtx_insn
*before
)
4414 return as_a
<rtx_jump_insn
*> (
4415 emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4416 make_jump_insn_raw
));
4419 /* Make an instruction with body X and code CALL_INSN
4420 and output it before the instruction BEFORE. */
4423 emit_call_insn_before_noloc (rtx x
, rtx_insn
*before
)
4425 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4426 make_call_insn_raw
);
4429 /* Make an instruction with body X and code DEBUG_INSN
4430 and output it before the instruction BEFORE. */
4433 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4435 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4436 make_debug_insn_raw
);
4439 /* Make an insn of code BARRIER
4440 and output it before the insn BEFORE. */
4443 emit_barrier_before (rtx before
)
4445 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4447 INSN_UID (insn
) = cur_insn_uid
++;
4449 add_insn_before (insn
, before
, NULL
);
4453 /* Emit the label LABEL before the insn BEFORE. */
4456 emit_label_before (rtx label
, rtx_insn
*before
)
4458 gcc_checking_assert (INSN_UID (label
) == 0);
4459 INSN_UID (label
) = cur_insn_uid
++;
4460 add_insn_before (label
, before
, NULL
);
4461 return as_a
<rtx_code_label
*> (label
);
4464 /* Helper for emit_insn_after, handles lists of instructions
4468 emit_insn_after_1 (rtx_insn
*first
, rtx uncast_after
, basic_block bb
)
4470 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4472 rtx_insn
*after_after
;
4473 if (!bb
&& !BARRIER_P (after
))
4474 bb
= BLOCK_FOR_INSN (after
);
4478 df_set_bb_dirty (bb
);
4479 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4480 if (!BARRIER_P (last
))
4482 set_block_for_insn (last
, bb
);
4483 df_insn_rescan (last
);
4485 if (!BARRIER_P (last
))
4487 set_block_for_insn (last
, bb
);
4488 df_insn_rescan (last
);
4490 if (BB_END (bb
) == after
)
4494 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4497 after_after
= NEXT_INSN (after
);
4499 SET_NEXT_INSN (after
) = first
;
4500 SET_PREV_INSN (first
) = after
;
4501 SET_NEXT_INSN (last
) = after_after
;
4503 SET_PREV_INSN (after_after
) = last
;
4505 if (after
== get_last_insn ())
4506 set_last_insn (last
);
4512 emit_pattern_after_noloc (rtx x
, rtx uncast_after
, basic_block bb
,
4513 rtx_insn
*(*make_raw
)(rtx
))
4515 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4516 rtx_insn
*last
= after
;
4523 switch (GET_CODE (x
))
4532 last
= emit_insn_after_1 (as_a
<rtx_insn
*> (x
), after
, bb
);
4535 #ifdef ENABLE_RTL_CHECKING
4542 last
= (*make_raw
) (x
);
4543 add_insn_after (last
, after
, bb
);
4550 /* Make X be output after the insn AFTER and set the BB of insn. If
4551 BB is NULL, an attempt is made to infer the BB from AFTER. */
4554 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4556 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4560 /* Make an insn of code JUMP_INSN with body X
4561 and output it after the insn AFTER. */
4564 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4566 return as_a
<rtx_jump_insn
*> (
4567 emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
));
4570 /* Make an instruction with body X and code CALL_INSN
4571 and output it after the instruction AFTER. */
4574 emit_call_insn_after_noloc (rtx x
, rtx after
)
4576 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4579 /* Make an instruction with body X and code CALL_INSN
4580 and output it after the instruction AFTER. */
4583 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4585 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4588 /* Make an insn of code BARRIER
4589 and output it after the insn AFTER. */
4592 emit_barrier_after (rtx after
)
4594 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4596 INSN_UID (insn
) = cur_insn_uid
++;
4598 add_insn_after (insn
, after
, NULL
);
4602 /* Emit the label LABEL after the insn AFTER. */
4605 emit_label_after (rtx label
, rtx_insn
*after
)
4607 gcc_checking_assert (INSN_UID (label
) == 0);
4608 INSN_UID (label
) = cur_insn_uid
++;
4609 add_insn_after (label
, after
, NULL
);
4610 return as_a
<rtx_insn
*> (label
);
4613 /* Notes require a bit of special handling: Some notes need to have their
4614 BLOCK_FOR_INSN set, others should never have it set, and some should
4615 have it set or clear depending on the context. */
4617 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4618 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4619 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4622 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4626 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4627 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4630 /* Notes for var tracking and EH region markers can appear between or
4631 inside basic blocks. If the caller is emitting on the basic block
4632 boundary, do not set BLOCK_FOR_INSN on the new note. */
4633 case NOTE_INSN_VAR_LOCATION
:
4634 case NOTE_INSN_CALL_ARG_LOCATION
:
4635 case NOTE_INSN_EH_REGION_BEG
:
4636 case NOTE_INSN_EH_REGION_END
:
4637 return on_bb_boundary_p
;
4639 /* Otherwise, BLOCK_FOR_INSN must be set. */
4645 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4648 emit_note_after (enum insn_note subtype
, rtx_insn
*after
)
4650 rtx_note
*note
= make_note_raw (subtype
);
4651 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4652 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4654 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4655 add_insn_after_nobb (note
, after
);
4657 add_insn_after (note
, after
, bb
);
4661 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4664 emit_note_before (enum insn_note subtype
, rtx_insn
*before
)
4666 rtx_note
*note
= make_note_raw (subtype
);
4667 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4668 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4670 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4671 add_insn_before_nobb (note
, before
);
4673 add_insn_before (note
, before
, bb
);
4677 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4678 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4681 emit_pattern_after_setloc (rtx pattern
, rtx uncast_after
, int loc
,
4682 rtx_insn
*(*make_raw
) (rtx
))
4684 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4685 rtx_insn
*last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4687 if (pattern
== NULL_RTX
|| !loc
)
4690 after
= NEXT_INSN (after
);
4693 if (active_insn_p (after
)
4694 && !JUMP_TABLE_DATA_P (after
) /* FIXME */
4695 && !INSN_LOCATION (after
))
4696 INSN_LOCATION (after
) = loc
;
4699 after
= NEXT_INSN (after
);
4704 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4705 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4709 emit_pattern_after (rtx pattern
, rtx uncast_after
, bool skip_debug_insns
,
4710 rtx_insn
*(*make_raw
) (rtx
))
4712 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4713 rtx_insn
*prev
= after
;
4715 if (skip_debug_insns
)
4716 while (DEBUG_INSN_P (prev
))
4717 prev
= PREV_INSN (prev
);
4720 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4723 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4726 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4728 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4730 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4733 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4735 emit_insn_after (rtx pattern
, rtx after
)
4737 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4740 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4742 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4744 return as_a
<rtx_jump_insn
*> (
4745 emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
));
4748 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4750 emit_jump_insn_after (rtx pattern
, rtx after
)
4752 return as_a
<rtx_jump_insn
*> (
4753 emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
));
4756 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4758 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4760 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4763 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4765 emit_call_insn_after (rtx pattern
, rtx after
)
4767 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4770 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4772 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4774 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4777 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4779 emit_debug_insn_after (rtx pattern
, rtx after
)
4781 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4784 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4785 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4786 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4790 emit_pattern_before_setloc (rtx pattern
, rtx uncast_before
, int loc
, bool insnp
,
4791 rtx_insn
*(*make_raw
) (rtx
))
4793 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4794 rtx_insn
*first
= PREV_INSN (before
);
4795 rtx_insn
*last
= emit_pattern_before_noloc (pattern
, before
,
4796 insnp
? before
: NULL_RTX
,
4799 if (pattern
== NULL_RTX
|| !loc
)
4803 first
= get_insns ();
4805 first
= NEXT_INSN (first
);
4808 if (active_insn_p (first
)
4809 && !JUMP_TABLE_DATA_P (first
) /* FIXME */
4810 && !INSN_LOCATION (first
))
4811 INSN_LOCATION (first
) = loc
;
4814 first
= NEXT_INSN (first
);
4819 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4820 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4821 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4822 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4825 emit_pattern_before (rtx pattern
, rtx uncast_before
, bool skip_debug_insns
,
4826 bool insnp
, rtx_insn
*(*make_raw
) (rtx
))
4828 rtx_insn
*before
= safe_as_a
<rtx_insn
*> (uncast_before
);
4829 rtx_insn
*next
= before
;
4831 if (skip_debug_insns
)
4832 while (DEBUG_INSN_P (next
))
4833 next
= PREV_INSN (next
);
4836 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4839 return emit_pattern_before_noloc (pattern
, before
,
4840 insnp
? before
: NULL_RTX
,
4844 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4846 emit_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4848 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4852 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4854 emit_insn_before (rtx pattern
, rtx before
)
4856 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4859 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4861 emit_jump_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4863 return as_a
<rtx_jump_insn
*> (
4864 emit_pattern_before_setloc (pattern
, before
, loc
, false,
4865 make_jump_insn_raw
));
4868 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4870 emit_jump_insn_before (rtx pattern
, rtx before
)
4872 return as_a
<rtx_jump_insn
*> (
4873 emit_pattern_before (pattern
, before
, true, false,
4874 make_jump_insn_raw
));
4877 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4879 emit_call_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4881 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4882 make_call_insn_raw
);
4885 /* Like emit_call_insn_before_noloc,
4886 but set insn_location according to BEFORE. */
4888 emit_call_insn_before (rtx pattern
, rtx_insn
*before
)
4890 return emit_pattern_before (pattern
, before
, true, false,
4891 make_call_insn_raw
);
4894 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4896 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4898 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4899 make_debug_insn_raw
);
4902 /* Like emit_debug_insn_before_noloc,
4903 but set insn_location according to BEFORE. */
4905 emit_debug_insn_before (rtx pattern
, rtx_insn
*before
)
4907 return emit_pattern_before (pattern
, before
, false, false,
4908 make_debug_insn_raw
);
4911 /* Take X and emit it at the end of the doubly-linked
4914 Returns the last insn emitted. */
4919 rtx_insn
*last
= get_last_insn ();
4925 switch (GET_CODE (x
))
4934 insn
= as_a
<rtx_insn
*> (x
);
4937 rtx_insn
*next
= NEXT_INSN (insn
);
4944 #ifdef ENABLE_RTL_CHECKING
4945 case JUMP_TABLE_DATA
:
4952 last
= make_insn_raw (x
);
4960 /* Make an insn of code DEBUG_INSN with pattern X
4961 and add it to the end of the doubly-linked list. */
4964 emit_debug_insn (rtx x
)
4966 rtx_insn
*last
= get_last_insn ();
4972 switch (GET_CODE (x
))
4981 insn
= as_a
<rtx_insn
*> (x
);
4984 rtx_insn
*next
= NEXT_INSN (insn
);
4991 #ifdef ENABLE_RTL_CHECKING
4992 case JUMP_TABLE_DATA
:
4999 last
= make_debug_insn_raw (x
);
5007 /* Make an insn of code JUMP_INSN with pattern X
5008 and add it to the end of the doubly-linked list. */
5011 emit_jump_insn (rtx x
)
5013 rtx_insn
*last
= NULL
;
5016 switch (GET_CODE (x
))
5025 insn
= as_a
<rtx_insn
*> (x
);
5028 rtx_insn
*next
= NEXT_INSN (insn
);
5035 #ifdef ENABLE_RTL_CHECKING
5036 case JUMP_TABLE_DATA
:
5043 last
= make_jump_insn_raw (x
);
5051 /* Make an insn of code CALL_INSN with pattern X
5052 and add it to the end of the doubly-linked list. */
5055 emit_call_insn (rtx x
)
5059 switch (GET_CODE (x
))
5068 insn
= emit_insn (x
);
5071 #ifdef ENABLE_RTL_CHECKING
5073 case JUMP_TABLE_DATA
:
5079 insn
= make_call_insn_raw (x
);
5087 /* Add the label LABEL to the end of the doubly-linked list. */
5090 emit_label (rtx uncast_label
)
5092 rtx_code_label
*label
= as_a
<rtx_code_label
*> (uncast_label
);
5094 gcc_checking_assert (INSN_UID (label
) == 0);
5095 INSN_UID (label
) = cur_insn_uid
++;
5100 /* Make an insn of code JUMP_TABLE_DATA
5101 and add it to the end of the doubly-linked list. */
5103 rtx_jump_table_data
*
5104 emit_jump_table_data (rtx table
)
5106 rtx_jump_table_data
*jump_table_data
=
5107 as_a
<rtx_jump_table_data
*> (rtx_alloc (JUMP_TABLE_DATA
));
5108 INSN_UID (jump_table_data
) = cur_insn_uid
++;
5109 PATTERN (jump_table_data
) = table
;
5110 BLOCK_FOR_INSN (jump_table_data
) = NULL
;
5111 add_insn (jump_table_data
);
5112 return jump_table_data
;
5115 /* Make an insn of code BARRIER
5116 and add it to the end of the doubly-linked list. */
5121 rtx_barrier
*barrier
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
5122 INSN_UID (barrier
) = cur_insn_uid
++;
5127 /* Emit a copy of note ORIG. */
5130 emit_note_copy (rtx_note
*orig
)
5132 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
5133 rtx_note
*note
= make_note_raw (kind
);
5134 NOTE_DATA (note
) = NOTE_DATA (orig
);
5139 /* Make an insn of code NOTE or type NOTE_NO
5140 and add it to the end of the doubly-linked list. */
5143 emit_note (enum insn_note kind
)
5145 rtx_note
*note
= make_note_raw (kind
);
5150 /* Emit a clobber of lvalue X. */
5153 emit_clobber (rtx x
)
5155 /* CONCATs should not appear in the insn stream. */
5156 if (GET_CODE (x
) == CONCAT
)
5158 emit_clobber (XEXP (x
, 0));
5159 return emit_clobber (XEXP (x
, 1));
5161 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
5164 /* Return a sequence of insns to clobber lvalue X. */
5178 /* Emit a use of rvalue X. */
5183 /* CONCATs should not appear in the insn stream. */
5184 if (GET_CODE (x
) == CONCAT
)
5186 emit_use (XEXP (x
, 0));
5187 return emit_use (XEXP (x
, 1));
5189 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
5192 /* Return a sequence of insns to use rvalue X. */
5206 /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5207 Return the set in INSN that such notes describe, or NULL if the notes
5208 have no meaning for INSN. */
5211 set_for_reg_notes (rtx insn
)
5218 pat
= PATTERN (insn
);
5219 if (GET_CODE (pat
) == PARALLEL
)
5221 /* We do not use single_set because that ignores SETs of unused
5222 registers. REG_EQUAL and REG_EQUIV notes really do require the
5223 PARALLEL to have a single SET. */
5224 if (multiple_sets (insn
))
5226 pat
= XVECEXP (pat
, 0, 0);
5229 if (GET_CODE (pat
) != SET
)
5232 reg
= SET_DEST (pat
);
5234 /* Notes apply to the contents of a STRICT_LOW_PART. */
5235 if (GET_CODE (reg
) == STRICT_LOW_PART
)
5236 reg
= XEXP (reg
, 0);
5238 /* Check that we have a register. */
5239 if (!(REG_P (reg
) || GET_CODE (reg
) == SUBREG
))
5245 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5246 note of this type already exists, remove it first. */
5249 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5251 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5257 if (!set_for_reg_notes (insn
))
5260 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5261 It serves no useful purpose and breaks eliminate_regs. */
5262 if (GET_CODE (datum
) == ASM_OPERANDS
)
5265 /* Notes with side effects are dangerous. Even if the side-effect
5266 initially mirrors one in PATTERN (INSN), later optimizations
5267 might alter the way that the final register value is calculated
5268 and so move or alter the side-effect in some way. The note would
5269 then no longer be a valid substitution for SET_SRC. */
5270 if (side_effects_p (datum
))
5279 XEXP (note
, 0) = datum
;
5282 add_reg_note (insn
, kind
, datum
);
5283 note
= REG_NOTES (insn
);
5290 df_notes_rescan (as_a
<rtx_insn
*> (insn
));
5299 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5301 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5303 rtx set
= set_for_reg_notes (insn
);
5305 if (set
&& SET_DEST (set
) == dst
)
5306 return set_unique_reg_note (insn
, kind
, datum
);
5310 /* Return an indication of which type of insn should have X as a body.
5311 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5313 static enum rtx_code
5314 classify_insn (rtx x
)
5318 if (GET_CODE (x
) == CALL
)
5320 if (ANY_RETURN_P (x
))
5322 if (GET_CODE (x
) == SET
)
5324 if (SET_DEST (x
) == pc_rtx
)
5326 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5331 if (GET_CODE (x
) == PARALLEL
)
5334 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5335 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5337 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5338 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5340 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5341 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5347 /* Emit the rtl pattern X as an appropriate kind of insn.
5348 If X is a label, it is simply added into the insn chain. */
5353 enum rtx_code code
= classify_insn (x
);
5358 return emit_label (x
);
5360 return emit_insn (x
);
5363 rtx_insn
*insn
= emit_jump_insn (x
);
5364 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5365 return emit_barrier ();
5369 return emit_call_insn (x
);
5371 return emit_debug_insn (x
);
5377 /* Space for free sequence stack entries. */
5378 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5380 /* Begin emitting insns to a sequence. If this sequence will contain
5381 something that might cause the compiler to pop arguments to function
5382 calls (because those pops have previously been deferred; see
5383 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5384 before calling this function. That will ensure that the deferred
5385 pops are not accidentally emitted in the middle of this sequence. */
5388 start_sequence (void)
5390 struct sequence_stack
*tem
;
5392 if (free_sequence_stack
!= NULL
)
5394 tem
= free_sequence_stack
;
5395 free_sequence_stack
= tem
->next
;
5398 tem
= ggc_alloc
<sequence_stack
> ();
5400 tem
->next
= get_current_sequence ()->next
;
5401 tem
->first
= get_insns ();
5402 tem
->last
= get_last_insn ();
5403 get_current_sequence ()->next
= tem
;
5409 /* Set up the insn chain starting with FIRST as the current sequence,
5410 saving the previously current one. See the documentation for
5411 start_sequence for more information about how to use this function. */
5414 push_to_sequence (rtx_insn
*first
)
5420 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5423 set_first_insn (first
);
5424 set_last_insn (last
);
5427 /* Like push_to_sequence, but take the last insn as an argument to avoid
5428 looping through the list. */
5431 push_to_sequence2 (rtx_insn
*first
, rtx_insn
*last
)
5435 set_first_insn (first
);
5436 set_last_insn (last
);
5439 /* Set up the outer-level insn chain
5440 as the current sequence, saving the previously current one. */
5443 push_topmost_sequence (void)
5445 struct sequence_stack
*top
;
5449 top
= get_topmost_sequence ();
5450 set_first_insn (top
->first
);
5451 set_last_insn (top
->last
);
5454 /* After emitting to the outer-level insn chain, update the outer-level
5455 insn chain, and restore the previous saved state. */
5458 pop_topmost_sequence (void)
5460 struct sequence_stack
*top
;
5462 top
= get_topmost_sequence ();
5463 top
->first
= get_insns ();
5464 top
->last
= get_last_insn ();
5469 /* After emitting to a sequence, restore previous saved state.
5471 To get the contents of the sequence just made, you must call
5472 `get_insns' *before* calling here.
5474 If the compiler might have deferred popping arguments while
5475 generating this sequence, and this sequence will not be immediately
5476 inserted into the instruction stream, use do_pending_stack_adjust
5477 before calling get_insns. That will ensure that the deferred
5478 pops are inserted into this sequence, and not into some random
5479 location in the instruction stream. See INHIBIT_DEFER_POP for more
5480 information about deferred popping of arguments. */
5485 struct sequence_stack
*tem
= get_current_sequence ()->next
;
5487 set_first_insn (tem
->first
);
5488 set_last_insn (tem
->last
);
5489 get_current_sequence ()->next
= tem
->next
;
5491 memset (tem
, 0, sizeof (*tem
));
5492 tem
->next
= free_sequence_stack
;
5493 free_sequence_stack
= tem
;
5496 /* Return 1 if currently emitting into a sequence. */
5499 in_sequence_p (void)
5501 return get_current_sequence ()->next
!= 0;
5504 /* Put the various virtual registers into REGNO_REG_RTX. */
5507 init_virtual_regs (void)
5509 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5510 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5511 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5512 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5513 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5514 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5515 = virtual_preferred_stack_boundary_rtx
;
5519 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5520 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5521 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5522 static int copy_insn_n_scratches
;
5524 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5525 copied an ASM_OPERANDS.
5526 In that case, it is the original input-operand vector. */
5527 static rtvec orig_asm_operands_vector
;
5529 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5530 copied an ASM_OPERANDS.
5531 In that case, it is the copied input-operand vector. */
5532 static rtvec copy_asm_operands_vector
;
5534 /* Likewise for the constraints vector. */
5535 static rtvec orig_asm_constraints_vector
;
5536 static rtvec copy_asm_constraints_vector
;
5538 /* Recursively create a new copy of an rtx for copy_insn.
5539 This function differs from copy_rtx in that it handles SCRATCHes and
5540 ASM_OPERANDs properly.
5541 Normally, this function is not used directly; use copy_insn as front end.
5542 However, you could first copy an insn pattern with copy_insn and then use
5543 this function afterwards to properly copy any REG_NOTEs containing
5547 copy_insn_1 (rtx orig
)
5552 const char *format_ptr
;
5557 code
= GET_CODE (orig
);
5572 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5573 clobbers or clobbers of hard registers that originated as pseudos.
5574 This is needed to allow safe register renaming. */
5575 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
5576 && ORIGINAL_REGNO (XEXP (orig
, 0)) == REGNO (XEXP (orig
, 0)))
5581 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5582 if (copy_insn_scratch_in
[i
] == orig
)
5583 return copy_insn_scratch_out
[i
];
5587 if (shared_const_p (orig
))
5591 /* A MEM with a constant address is not sharable. The problem is that
5592 the constant address may need to be reloaded. If the mem is shared,
5593 then reloading one copy of this mem will cause all copies to appear
5594 to have been reloaded. */
5600 /* Copy the various flags, fields, and other information. We assume
5601 that all fields need copying, and then clear the fields that should
5602 not be copied. That is the sensible default behavior, and forces
5603 us to explicitly document why we are *not* copying a flag. */
5604 copy
= shallow_copy_rtx (orig
);
5606 /* We do not copy the USED flag, which is used as a mark bit during
5607 walks over the RTL. */
5608 RTX_FLAG (copy
, used
) = 0;
5610 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5613 RTX_FLAG (copy
, jump
) = 0;
5614 RTX_FLAG (copy
, call
) = 0;
5615 RTX_FLAG (copy
, frame_related
) = 0;
5618 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5620 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5621 switch (*format_ptr
++)
5624 if (XEXP (orig
, i
) != NULL
)
5625 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5630 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5631 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5632 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5633 XVEC (copy
, i
) = copy_asm_operands_vector
;
5634 else if (XVEC (orig
, i
) != NULL
)
5636 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5637 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5638 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5649 /* These are left unchanged. */
5656 if (code
== SCRATCH
)
5658 i
= copy_insn_n_scratches
++;
5659 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5660 copy_insn_scratch_in
[i
] = orig
;
5661 copy_insn_scratch_out
[i
] = copy
;
5663 else if (code
== ASM_OPERANDS
)
5665 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5666 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5667 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5668 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5674 /* Create a new copy of an rtx.
5675 This function differs from copy_rtx in that it handles SCRATCHes and
5676 ASM_OPERANDs properly.
5677 INSN doesn't really have to be a full INSN; it could be just the
5680 copy_insn (rtx insn
)
5682 copy_insn_n_scratches
= 0;
5683 orig_asm_operands_vector
= 0;
5684 orig_asm_constraints_vector
= 0;
5685 copy_asm_operands_vector
= 0;
5686 copy_asm_constraints_vector
= 0;
5687 return copy_insn_1 (insn
);
5690 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5691 on that assumption that INSN itself remains in its original place. */
5694 copy_delay_slot_insn (rtx_insn
*insn
)
5696 /* Copy INSN with its rtx_code, all its notes, location etc. */
5697 insn
= as_a
<rtx_insn
*> (copy_rtx (insn
));
5698 INSN_UID (insn
) = cur_insn_uid
++;
5702 /* Initialize data structures and variables in this file
5703 before generating rtl for each function. */
5708 set_first_insn (NULL
);
5709 set_last_insn (NULL
);
5710 if (MIN_NONDEBUG_INSN_UID
)
5711 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5714 cur_debug_insn_uid
= 1;
5715 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5716 first_label_num
= label_num
;
5717 get_current_sequence ()->next
= NULL
;
5719 /* Init the tables that describe all the pseudo regs. */
5721 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5723 crtl
->emit
.regno_pointer_align
5724 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5726 regno_reg_rtx
= ggc_vec_alloc
<rtx
> (crtl
->emit
.regno_pointer_align_length
);
5728 /* Put copies of all the hard registers into regno_reg_rtx. */
5729 memcpy (regno_reg_rtx
,
5730 initial_regno_reg_rtx
,
5731 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5733 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5734 init_virtual_regs ();
5736 /* Indicate that the virtual registers and stack locations are
5738 REG_POINTER (stack_pointer_rtx
) = 1;
5739 REG_POINTER (frame_pointer_rtx
) = 1;
5740 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5741 REG_POINTER (arg_pointer_rtx
) = 1;
5743 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5744 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5745 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5746 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5747 REG_POINTER (virtual_cfa_rtx
) = 1;
5749 #ifdef STACK_BOUNDARY
5750 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5751 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5752 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5753 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5755 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5756 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5757 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5758 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5759 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5762 #ifdef INIT_EXPANDERS
5767 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5770 gen_const_vector (machine_mode mode
, int constant
)
5777 units
= GET_MODE_NUNITS (mode
);
5778 inner
= GET_MODE_INNER (mode
);
5780 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5782 v
= rtvec_alloc (units
);
5784 /* We need to call this function after we set the scalar const_tiny_rtx
5786 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5788 for (i
= 0; i
< units
; ++i
)
5789 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5791 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5795 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5796 all elements are zero, and the one vector when all elements are one. */
5798 gen_rtx_CONST_VECTOR (machine_mode mode
, rtvec v
)
5800 machine_mode inner
= GET_MODE_INNER (mode
);
5801 int nunits
= GET_MODE_NUNITS (mode
);
5805 /* Check to see if all of the elements have the same value. */
5806 x
= RTVEC_ELT (v
, nunits
- 1);
5807 for (i
= nunits
- 2; i
>= 0; i
--)
5808 if (RTVEC_ELT (v
, i
) != x
)
5811 /* If the values are all the same, check to see if we can use one of the
5812 standard constant vectors. */
5815 if (x
== CONST0_RTX (inner
))
5816 return CONST0_RTX (mode
);
5817 else if (x
== CONST1_RTX (inner
))
5818 return CONST1_RTX (mode
);
5819 else if (x
== CONSTM1_RTX (inner
))
5820 return CONSTM1_RTX (mode
);
5823 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5826 /* Initialise global register information required by all functions. */
5829 init_emit_regs (void)
5835 /* Reset register attributes */
5836 reg_attrs_htab
->empty ();
5838 /* We need reg_raw_mode, so initialize the modes now. */
5839 init_reg_modes_target ();
5841 /* Assign register numbers to the globally defined register rtx. */
5842 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5843 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5844 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5845 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5846 virtual_incoming_args_rtx
=
5847 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5848 virtual_stack_vars_rtx
=
5849 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5850 virtual_stack_dynamic_rtx
=
5851 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5852 virtual_outgoing_args_rtx
=
5853 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5854 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5855 virtual_preferred_stack_boundary_rtx
=
5856 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5858 /* Initialize RTL for commonly used hard registers. These are
5859 copied into regno_reg_rtx as we begin to compile each function. */
5860 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5861 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5863 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5864 return_address_pointer_rtx
5865 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5868 pic_offset_table_rtx
= NULL_RTX
;
5869 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5870 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5872 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5874 mode
= (machine_mode
) i
;
5875 attrs
= ggc_cleared_alloc
<mem_attrs
> ();
5876 attrs
->align
= BITS_PER_UNIT
;
5877 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5878 if (mode
!= BLKmode
)
5880 attrs
->size_known_p
= true;
5881 attrs
->size
= GET_MODE_SIZE (mode
);
5882 if (STRICT_ALIGNMENT
)
5883 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5885 mode_mem_attrs
[i
] = attrs
;
5889 /* Initialize global machine_mode variables. */
5892 init_derived_machine_modes (void)
5894 byte_mode
= VOIDmode
;
5895 word_mode
= VOIDmode
;
5897 for (machine_mode mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5899 mode
= GET_MODE_WIDER_MODE (mode
))
5901 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5902 && byte_mode
== VOIDmode
)
5905 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5906 && word_mode
== VOIDmode
)
5910 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5913 /* Create some permanent unique rtl objects shared between all functions. */
5916 init_emit_once (void)
5920 machine_mode double_mode
;
5922 /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
5923 CONST_FIXED, and memory attribute hash tables. */
5924 const_int_htab
= hash_table
<const_int_hasher
>::create_ggc (37);
5926 #if TARGET_SUPPORTS_WIDE_INT
5927 const_wide_int_htab
= hash_table
<const_wide_int_hasher
>::create_ggc (37);
5929 const_double_htab
= hash_table
<const_double_hasher
>::create_ggc (37);
5931 const_fixed_htab
= hash_table
<const_fixed_hasher
>::create_ggc (37);
5933 reg_attrs_htab
= hash_table
<reg_attr_hasher
>::create_ggc (37);
5935 #ifdef INIT_EXPANDERS
5936 /* This is to initialize {init|mark|free}_machine_status before the first
5937 call to push_function_context_to. This is needed by the Chill front
5938 end which calls push_function_context_to before the first call to
5939 init_function_start. */
5943 /* Create the unique rtx's for certain rtx codes and operand values. */
5945 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5946 tries to use these variables. */
5947 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5948 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5949 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5951 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5952 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5953 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5955 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5957 double_mode
= mode_for_size (DOUBLE_TYPE_SIZE
, MODE_FLOAT
, 0);
5959 real_from_integer (&dconst0
, double_mode
, 0, SIGNED
);
5960 real_from_integer (&dconst1
, double_mode
, 1, SIGNED
);
5961 real_from_integer (&dconst2
, double_mode
, 2, SIGNED
);
5966 dconsthalf
= dconst1
;
5967 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5969 for (i
= 0; i
< 3; i
++)
5971 const REAL_VALUE_TYPE
*const r
=
5972 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5974 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5976 mode
= GET_MODE_WIDER_MODE (mode
))
5977 const_tiny_rtx
[i
][(int) mode
] =
5978 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5980 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5982 mode
= GET_MODE_WIDER_MODE (mode
))
5983 const_tiny_rtx
[i
][(int) mode
] =
5984 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5986 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5988 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5990 mode
= GET_MODE_WIDER_MODE (mode
))
5991 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5993 for (mode
= MIN_MODE_PARTIAL_INT
;
5994 mode
<= MAX_MODE_PARTIAL_INT
;
5995 mode
= (machine_mode
)((int)(mode
) + 1))
5996 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5999 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
6001 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
6003 mode
= GET_MODE_WIDER_MODE (mode
))
6004 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
6006 for (mode
= MIN_MODE_PARTIAL_INT
;
6007 mode
<= MAX_MODE_PARTIAL_INT
;
6008 mode
= (machine_mode
)((int)(mode
) + 1))
6009 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
6011 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
6013 mode
= GET_MODE_WIDER_MODE (mode
))
6015 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
6016 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
6019 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
6021 mode
= GET_MODE_WIDER_MODE (mode
))
6023 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
6024 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
6027 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
6029 mode
= GET_MODE_WIDER_MODE (mode
))
6031 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6032 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6033 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
6036 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
6038 mode
= GET_MODE_WIDER_MODE (mode
))
6040 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6041 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6044 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
6046 mode
= GET_MODE_WIDER_MODE (mode
))
6048 FCONST0 (mode
).data
.high
= 0;
6049 FCONST0 (mode
).data
.low
= 0;
6050 FCONST0 (mode
).mode
= mode
;
6051 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6052 FCONST0 (mode
), mode
);
6055 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
6057 mode
= GET_MODE_WIDER_MODE (mode
))
6059 FCONST0 (mode
).data
.high
= 0;
6060 FCONST0 (mode
).data
.low
= 0;
6061 FCONST0 (mode
).mode
= mode
;
6062 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6063 FCONST0 (mode
), mode
);
6066 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
6068 mode
= GET_MODE_WIDER_MODE (mode
))
6070 FCONST0 (mode
).data
.high
= 0;
6071 FCONST0 (mode
).data
.low
= 0;
6072 FCONST0 (mode
).mode
= mode
;
6073 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6074 FCONST0 (mode
), mode
);
6076 /* We store the value 1. */
6077 FCONST1 (mode
).data
.high
= 0;
6078 FCONST1 (mode
).data
.low
= 0;
6079 FCONST1 (mode
).mode
= mode
;
6081 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6082 HOST_BITS_PER_DOUBLE_INT
,
6083 SIGNED_FIXED_POINT_MODE_P (mode
));
6084 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6085 FCONST1 (mode
), mode
);
6088 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
6090 mode
= GET_MODE_WIDER_MODE (mode
))
6092 FCONST0 (mode
).data
.high
= 0;
6093 FCONST0 (mode
).data
.low
= 0;
6094 FCONST0 (mode
).mode
= mode
;
6095 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6096 FCONST0 (mode
), mode
);
6098 /* We store the value 1. */
6099 FCONST1 (mode
).data
.high
= 0;
6100 FCONST1 (mode
).data
.low
= 0;
6101 FCONST1 (mode
).mode
= mode
;
6103 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6104 HOST_BITS_PER_DOUBLE_INT
,
6105 SIGNED_FIXED_POINT_MODE_P (mode
));
6106 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6107 FCONST1 (mode
), mode
);
6110 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
6112 mode
= GET_MODE_WIDER_MODE (mode
))
6114 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6117 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
6119 mode
= GET_MODE_WIDER_MODE (mode
))
6121 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6124 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
6126 mode
= GET_MODE_WIDER_MODE (mode
))
6128 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6129 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6132 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
6134 mode
= GET_MODE_WIDER_MODE (mode
))
6136 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6137 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6140 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
6141 if (GET_MODE_CLASS ((machine_mode
) i
) == MODE_CC
)
6142 const_tiny_rtx
[0][i
] = const0_rtx
;
6144 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
6145 if (STORE_FLAG_VALUE
== 1)
6146 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
6148 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_POINTER_BOUNDS
);
6150 mode
= GET_MODE_WIDER_MODE (mode
))
6152 wide_int wi_zero
= wi::zero (GET_MODE_PRECISION (mode
));
6153 const_tiny_rtx
[0][mode
] = immed_wide_int_const (wi_zero
, mode
);
6156 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
6157 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
6158 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
6159 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
6160 invalid_insn_rtx
= gen_rtx_INSN (VOIDmode
,
6164 /*pattern=*/NULL_RTX
,
6167 /*reg_notes=*/NULL_RTX
);
6170 /* Produce exact duplicate of insn INSN after AFTER.
6171 Care updating of libcall regions if present. */
6174 emit_copy_of_insn_after (rtx_insn
*insn
, rtx_insn
*after
)
6179 switch (GET_CODE (insn
))
6182 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
6186 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
6187 CROSSING_JUMP_P (new_rtx
) = CROSSING_JUMP_P (insn
);
6191 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
6195 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
6196 if (CALL_INSN_FUNCTION_USAGE (insn
))
6197 CALL_INSN_FUNCTION_USAGE (new_rtx
)
6198 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
6199 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
6200 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
6201 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
6202 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
6203 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
6210 /* Update LABEL_NUSES. */
6211 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
6213 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
6215 /* If the old insn is frame related, then so is the new one. This is
6216 primarily needed for IA-64 unwind info which marks epilogue insns,
6217 which may be duplicated by the basic block reordering code. */
6218 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
6220 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6221 will make them. REG_LABEL_TARGETs are created there too, but are
6222 supposed to be sticky, so we copy them. */
6223 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
6224 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
6226 if (GET_CODE (link
) == EXPR_LIST
)
6227 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
6228 copy_insn_1 (XEXP (link
, 0)));
6230 add_shallow_copy_of_reg_note (new_rtx
, link
);
6233 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6237 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6239 gen_hard_reg_clobber (machine_mode mode
, unsigned int regno
)
6241 if (hard_reg_clobbers
[mode
][regno
])
6242 return hard_reg_clobbers
[mode
][regno
];
6244 return (hard_reg_clobbers
[mode
][regno
] =
6245 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6248 location_t prologue_location
;
6249 location_t epilogue_location
;
6251 /* Hold current location information and last location information, so the
6252 datastructures are built lazily only when some instructions in given
6253 place are needed. */
6254 static location_t curr_location
;
6256 /* Allocate insn location datastructure. */
6258 insn_locations_init (void)
6260 prologue_location
= epilogue_location
= 0;
6261 curr_location
= UNKNOWN_LOCATION
;
6264 /* At the end of emit stage, clear current location. */
6266 insn_locations_finalize (void)
6268 epilogue_location
= curr_location
;
6269 curr_location
= UNKNOWN_LOCATION
;
6272 /* Set current location. */
6274 set_curr_insn_location (location_t location
)
6276 curr_location
= location
;
6279 /* Get current location. */
6281 curr_insn_location (void)
6283 return curr_location
;
6286 /* Return lexical scope block insn belongs to. */
6288 insn_scope (const rtx_insn
*insn
)
6290 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6293 /* Return line number of the statement that produced this insn. */
6295 insn_line (const rtx_insn
*insn
)
6297 return LOCATION_LINE (INSN_LOCATION (insn
));
6300 /* Return source file of the statement that produced this insn. */
6302 insn_file (const rtx_insn
*insn
)
6304 return LOCATION_FILE (INSN_LOCATION (insn
));
6307 /* Return expanded location of the statement that produced this insn. */
6309 insn_location (const rtx_insn
*insn
)
6311 return expand_location (INSN_LOCATION (insn
));
6314 /* Return true if memory model MODEL requires a pre-operation (release-style)
6315 barrier or a post-operation (acquire-style) barrier. While not universal,
6316 this function matches behavior of several targets. */
6319 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6321 switch (model
& MEMMODEL_MASK
)
6323 case MEMMODEL_RELAXED
:
6324 case MEMMODEL_CONSUME
:
6326 case MEMMODEL_RELEASE
:
6327 case MEMMODEL_SYNC_RELEASE
:
6329 case MEMMODEL_ACQUIRE
:
6330 case MEMMODEL_SYNC_ACQUIRE
:
6332 case MEMMODEL_ACQ_REL
:
6333 case MEMMODEL_SEQ_CST
:
6334 case MEMMODEL_SYNC_SEQ_CST
:
6341 #include "gt-emit-rtl.h"