1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
42 #include "basic-block.h"
47 #include "stringpool.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "langhooks.h"
61 struct target_rtl default_target_rtl
;
63 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
66 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
68 /* Commonly used modes. */
70 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
71 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
72 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
73 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
75 /* Datastructures maintained for currently processed function in RTL form. */
77 struct rtl_data x_rtl
;
79 /* Indexed by pseudo register number, gives the rtx for that pseudo.
80 Allocated in parallel with regno_pointer_align.
81 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
82 with length attribute nested in top level structures. */
86 /* This is *not* reset after each function. It gives each CODE_LABEL
87 in the entire compilation a unique label number. */
89 static GTY(()) int label_num
= 1;
91 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
92 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
93 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
94 is set only for MODE_INT and MODE_VECTOR_INT modes. */
96 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
100 REAL_VALUE_TYPE dconst0
;
101 REAL_VALUE_TYPE dconst1
;
102 REAL_VALUE_TYPE dconst2
;
103 REAL_VALUE_TYPE dconstm1
;
104 REAL_VALUE_TYPE dconsthalf
;
106 /* Record fixed-point constant 0 and 1. */
107 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
108 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
110 /* We make one copy of (const_int C) where C is in
111 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
112 to save space during the compilation and simplify comparisons of
115 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
117 /* Standard pieces of rtx, to be substituted directly into things. */
120 rtx simple_return_rtx
;
123 /* A hash table storing CONST_INTs whose absolute value is greater
124 than MAX_SAVED_CONST_INT. */
126 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
127 htab_t const_int_htab
;
129 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
130 htab_t const_wide_int_htab
;
132 /* A hash table storing register attribute structures. */
133 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
134 htab_t reg_attrs_htab
;
136 /* A hash table storing all CONST_DOUBLEs. */
137 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
138 htab_t const_double_htab
;
140 /* A hash table storing all CONST_FIXEDs. */
141 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
142 htab_t const_fixed_htab
;
144 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
145 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
146 #define first_label_num (crtl->emit.x_first_label_num)
148 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
149 static void set_used_decls (tree
);
150 static void mark_label_nuses (rtx
);
151 static hashval_t
const_int_htab_hash (const void *);
152 static int const_int_htab_eq (const void *, const void *);
153 #if TARGET_SUPPORTS_WIDE_INT
154 static hashval_t
const_wide_int_htab_hash (const void *);
155 static int const_wide_int_htab_eq (const void *, const void *);
156 static rtx
lookup_const_wide_int (rtx
);
158 static hashval_t
const_double_htab_hash (const void *);
159 static int const_double_htab_eq (const void *, const void *);
160 static rtx
lookup_const_double (rtx
);
161 static hashval_t
const_fixed_htab_hash (const void *);
162 static int const_fixed_htab_eq (const void *, const void *);
163 static rtx
lookup_const_fixed (rtx
);
164 static hashval_t
reg_attrs_htab_hash (const void *);
165 static int reg_attrs_htab_eq (const void *, const void *);
166 static reg_attrs
*get_reg_attrs (tree
, int);
167 static rtx
gen_const_vector (enum machine_mode
, int);
168 static void copy_rtx_if_shared_1 (rtx
*orig
);
170 /* Probability of the conditional branch currently proceeded by try_split.
171 Set to -1 otherwise. */
172 int split_branch_probability
= -1;
174 /* Returns a hash code for X (which is a really a CONST_INT). */
177 const_int_htab_hash (const void *x
)
179 return (hashval_t
) INTVAL ((const_rtx
) x
);
182 /* Returns nonzero if the value represented by X (which is really a
183 CONST_INT) is the same as that given by Y (which is really a
187 const_int_htab_eq (const void *x
, const void *y
)
189 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
192 #if TARGET_SUPPORTS_WIDE_INT
193 /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
196 const_wide_int_htab_hash (const void *x
)
199 HOST_WIDE_INT hash
= 0;
200 const_rtx xr
= (const_rtx
) x
;
202 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
203 hash
+= CONST_WIDE_INT_ELT (xr
, i
);
205 return (hashval_t
) hash
;
208 /* Returns nonzero if the value represented by X (which is really a
209 CONST_WIDE_INT) is the same as that given by Y (which is really a
213 const_wide_int_htab_eq (const void *x
, const void *y
)
216 const_rtx xr
= (const_rtx
) x
;
217 const_rtx yr
= (const_rtx
) y
;
218 if (CONST_WIDE_INT_NUNITS (xr
) != CONST_WIDE_INT_NUNITS (yr
))
221 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
222 if (CONST_WIDE_INT_ELT (xr
, i
) != CONST_WIDE_INT_ELT (yr
, i
))
229 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
231 const_double_htab_hash (const void *x
)
233 const_rtx
const value
= (const_rtx
) x
;
236 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (value
) == VOIDmode
)
237 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
240 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
241 /* MODE is used in the comparison, so it should be in the hash. */
242 h
^= GET_MODE (value
);
247 /* Returns nonzero if the value represented by X (really a ...)
248 is the same as that represented by Y (really a ...) */
250 const_double_htab_eq (const void *x
, const void *y
)
252 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
254 if (GET_MODE (a
) != GET_MODE (b
))
256 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (a
) == VOIDmode
)
257 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
258 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
260 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
261 CONST_DOUBLE_REAL_VALUE (b
));
264 /* Returns a hash code for X (which is really a CONST_FIXED). */
267 const_fixed_htab_hash (const void *x
)
269 const_rtx
const value
= (const_rtx
) x
;
272 h
= fixed_hash (CONST_FIXED_VALUE (value
));
273 /* MODE is used in the comparison, so it should be in the hash. */
274 h
^= GET_MODE (value
);
278 /* Returns nonzero if the value represented by X (really a ...)
279 is the same as that represented by Y (really a ...). */
282 const_fixed_htab_eq (const void *x
, const void *y
)
284 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
286 if (GET_MODE (a
) != GET_MODE (b
))
288 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
291 /* Return true if the given memory attributes are equal. */
294 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
296 return (p
->alias
== q
->alias
297 && p
->offset_known_p
== q
->offset_known_p
298 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
299 && p
->size_known_p
== q
->size_known_p
300 && (!p
->size_known_p
|| p
->size
== q
->size
)
301 && p
->align
== q
->align
302 && p
->addrspace
== q
->addrspace
303 && (p
->expr
== q
->expr
304 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
305 && operand_equal_p (p
->expr
, q
->expr
, 0))));
308 /* Set MEM's memory attributes so that they are the same as ATTRS. */
311 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
313 /* If everything is the default, we can just clear the attributes. */
314 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
321 || !mem_attrs_eq_p (attrs
, MEM_ATTRS (mem
)))
323 MEM_ATTRS (mem
) = ggc_alloc_mem_attrs ();
324 memcpy (MEM_ATTRS (mem
), attrs
, sizeof (mem_attrs
));
328 /* Returns a hash code for X (which is a really a reg_attrs *). */
331 reg_attrs_htab_hash (const void *x
)
333 const reg_attrs
*const p
= (const reg_attrs
*) x
;
335 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
338 /* Returns nonzero if the value represented by X (which is really a
339 reg_attrs *) is the same as that given by Y (which is also really a
343 reg_attrs_htab_eq (const void *x
, const void *y
)
345 const reg_attrs
*const p
= (const reg_attrs
*) x
;
346 const reg_attrs
*const q
= (const reg_attrs
*) y
;
348 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
350 /* Allocate a new reg_attrs structure and insert it into the hash table if
351 one identical to it is not already in the table. We are doing this for
355 get_reg_attrs (tree decl
, int offset
)
360 /* If everything is the default, we can just return zero. */
361 if (decl
== 0 && offset
== 0)
365 attrs
.offset
= offset
;
367 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
370 *slot
= ggc_alloc_reg_attrs ();
371 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
374 return (reg_attrs
*) *slot
;
379 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
380 and to block register equivalences to be seen across this insn. */
385 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
386 MEM_VOLATILE_P (x
) = true;
392 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
393 don't attempt to share with the various global pieces of rtl (such as
394 frame_pointer_rtx). */
397 gen_raw_REG (enum machine_mode mode
, int regno
)
399 rtx x
= gen_rtx_raw_REG (mode
, regno
);
400 ORIGINAL_REGNO (x
) = regno
;
404 /* There are some RTL codes that require special attention; the generation
405 functions do the raw handling. If you add to this list, modify
406 special_rtx in gengenrtl.c as well. */
409 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
413 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
414 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
416 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
417 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
418 return const_true_rtx
;
421 /* Look up the CONST_INT in the hash table. */
422 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
423 (hashval_t
) arg
, INSERT
);
425 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
431 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
433 return GEN_INT (trunc_int_for_mode (c
, mode
));
436 /* CONST_DOUBLEs might be created from pairs of integers, or from
437 REAL_VALUE_TYPEs. Also, their length is known only at run time,
438 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
440 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
441 hash table. If so, return its counterpart; otherwise add it
442 to the hash table and return it. */
444 lookup_const_double (rtx real
)
446 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
453 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
454 VALUE in mode MODE. */
456 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
458 rtx real
= rtx_alloc (CONST_DOUBLE
);
459 PUT_MODE (real
, mode
);
463 return lookup_const_double (real
);
466 /* Determine whether FIXED, a CONST_FIXED, already exists in the
467 hash table. If so, return its counterpart; otherwise add it
468 to the hash table and return it. */
471 lookup_const_fixed (rtx fixed
)
473 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
480 /* Return a CONST_FIXED rtx for a fixed-point value specified by
481 VALUE in mode MODE. */
484 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
486 rtx fixed
= rtx_alloc (CONST_FIXED
);
487 PUT_MODE (fixed
, mode
);
491 return lookup_const_fixed (fixed
);
494 #if TARGET_SUPPORTS_WIDE_INT == 0
495 /* Constructs double_int from rtx CST. */
498 rtx_to_double_int (const_rtx cst
)
502 if (CONST_INT_P (cst
))
503 r
= double_int::from_shwi (INTVAL (cst
));
504 else if (CONST_DOUBLE_AS_INT_P (cst
))
506 r
.low
= CONST_DOUBLE_LOW (cst
);
507 r
.high
= CONST_DOUBLE_HIGH (cst
);
516 #if TARGET_SUPPORTS_WIDE_INT
517 /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
518 If so, return its counterpart; otherwise add it to the hash table and
522 lookup_const_wide_int (rtx wint
)
524 void **slot
= htab_find_slot (const_wide_int_htab
, wint
, INSERT
);
532 /* Return an rtx constant for V, given that the constant has mode MODE.
533 The returned rtx will be a CONST_INT if V fits, otherwise it will be
534 a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
535 (if TARGET_SUPPORTS_WIDE_INT). */
538 immed_wide_int_const (const wide_int_ref
&v
, enum machine_mode mode
)
540 unsigned int len
= v
.get_len ();
541 unsigned int prec
= GET_MODE_PRECISION (mode
);
543 /* Allow truncation but not extension since we do not know if the
544 number is signed or unsigned. */
545 gcc_assert (prec
<= v
.get_precision ());
547 if (len
< 2 || prec
<= HOST_BITS_PER_WIDE_INT
)
548 return gen_int_mode (v
.elt (0), mode
);
550 #if TARGET_SUPPORTS_WIDE_INT
554 unsigned int blocks_needed
555 = (prec
+ HOST_BITS_PER_WIDE_INT
- 1) / HOST_BITS_PER_WIDE_INT
;
557 if (len
> blocks_needed
)
560 value
= const_wide_int_alloc (len
);
562 /* It is so tempting to just put the mode in here. Must control
564 PUT_MODE (value
, VOIDmode
);
565 CWI_PUT_NUM_ELEM (value
, len
);
567 for (i
= 0; i
< len
; i
++)
568 CONST_WIDE_INT_ELT (value
, i
) = v
.elt (i
);
570 return lookup_const_wide_int (value
);
573 return immed_double_const (v
.elt (0), v
.elt (1), mode
);
577 #if TARGET_SUPPORTS_WIDE_INT == 0
578 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
579 of ints: I0 is the low-order word and I1 is the high-order word.
580 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
581 implied upper bits are copies of the high bit of i1. The value
582 itself is neither signed nor unsigned. Do not use this routine for
583 non-integer modes; convert to REAL_VALUE_TYPE and use
584 CONST_DOUBLE_FROM_REAL_VALUE. */
587 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
592 /* There are the following cases (note that there are no modes with
593 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
595 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
597 2) If the value of the integer fits into HOST_WIDE_INT anyway
598 (i.e., i1 consists only from copies of the sign bit, and sign
599 of i0 and i1 are the same), then we return a CONST_INT for i0.
600 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
601 if (mode
!= VOIDmode
)
603 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
604 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
605 /* We can get a 0 for an error mark. */
606 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
607 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
609 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
610 return gen_int_mode (i0
, mode
);
613 /* If this integer fits in one word, return a CONST_INT. */
614 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
617 /* We use VOIDmode for integers. */
618 value
= rtx_alloc (CONST_DOUBLE
);
619 PUT_MODE (value
, VOIDmode
);
621 CONST_DOUBLE_LOW (value
) = i0
;
622 CONST_DOUBLE_HIGH (value
) = i1
;
624 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
625 XWINT (value
, i
) = 0;
627 return lookup_const_double (value
);
632 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
634 /* In case the MD file explicitly references the frame pointer, have
635 all such references point to the same frame pointer. This is
636 used during frame pointer elimination to distinguish the explicit
637 references to these registers from pseudos that happened to be
640 If we have eliminated the frame pointer or arg pointer, we will
641 be using it as a normal register, for example as a spill
642 register. In such cases, we might be accessing it in a mode that
643 is not Pmode and therefore cannot use the pre-allocated rtx.
645 Also don't do this when we are making new REGs in reload, since
646 we don't want to get confused with the real pointers. */
648 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
650 if (regno
== FRAME_POINTER_REGNUM
651 && (!reload_completed
|| frame_pointer_needed
))
652 return frame_pointer_rtx
;
653 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
654 if (regno
== HARD_FRAME_POINTER_REGNUM
655 && (!reload_completed
|| frame_pointer_needed
))
656 return hard_frame_pointer_rtx
;
658 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
659 if (regno
== ARG_POINTER_REGNUM
)
660 return arg_pointer_rtx
;
662 #ifdef RETURN_ADDRESS_POINTER_REGNUM
663 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
664 return return_address_pointer_rtx
;
666 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
667 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
668 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
669 return pic_offset_table_rtx
;
670 if (regno
== STACK_POINTER_REGNUM
)
671 return stack_pointer_rtx
;
675 /* If the per-function register table has been set up, try to re-use
676 an existing entry in that table to avoid useless generation of RTL.
678 This code is disabled for now until we can fix the various backends
679 which depend on having non-shared hard registers in some cases. Long
680 term we want to re-enable this code as it can significantly cut down
681 on the amount of useless RTL that gets generated.
683 We'll also need to fix some code that runs after reload that wants to
684 set ORIGINAL_REGNO. */
689 && regno
< FIRST_PSEUDO_REGISTER
690 && reg_raw_mode
[regno
] == mode
)
691 return regno_reg_rtx
[regno
];
694 return gen_raw_REG (mode
, regno
);
698 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
700 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
702 /* This field is not cleared by the mere allocation of the rtx, so
709 /* Generate a memory referring to non-trapping constant memory. */
712 gen_const_mem (enum machine_mode mode
, rtx addr
)
714 rtx mem
= gen_rtx_MEM (mode
, addr
);
715 MEM_READONLY_P (mem
) = 1;
716 MEM_NOTRAP_P (mem
) = 1;
720 /* Generate a MEM referring to fixed portions of the frame, e.g., register
724 gen_frame_mem (enum machine_mode mode
, rtx addr
)
726 rtx mem
= gen_rtx_MEM (mode
, addr
);
727 MEM_NOTRAP_P (mem
) = 1;
728 set_mem_alias_set (mem
, get_frame_alias_set ());
732 /* Generate a MEM referring to a temporary use of the stack, not part
733 of the fixed stack frame. For example, something which is pushed
734 by a target splitter. */
736 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
738 rtx mem
= gen_rtx_MEM (mode
, addr
);
739 MEM_NOTRAP_P (mem
) = 1;
740 if (!cfun
->calls_alloca
)
741 set_mem_alias_set (mem
, get_frame_alias_set ());
745 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
746 this construct would be valid, and false otherwise. */
749 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
750 const_rtx reg
, unsigned int offset
)
752 unsigned int isize
= GET_MODE_SIZE (imode
);
753 unsigned int osize
= GET_MODE_SIZE (omode
);
755 /* All subregs must be aligned. */
756 if (offset
% osize
!= 0)
759 /* The subreg offset cannot be outside the inner object. */
763 /* ??? This should not be here. Temporarily continue to allow word_mode
764 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
765 Generally, backends are doing something sketchy but it'll take time to
767 if (omode
== word_mode
)
769 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
770 is the culprit here, and not the backends. */
771 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
773 /* Allow component subregs of complex and vector. Though given the below
774 extraction rules, it's not always clear what that means. */
775 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
776 && GET_MODE_INNER (imode
) == omode
)
778 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
779 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
780 represent this. It's questionable if this ought to be represented at
781 all -- why can't this all be hidden in post-reload splitters that make
782 arbitrarily mode changes to the registers themselves. */
783 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
785 /* Subregs involving floating point modes are not allowed to
786 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
787 (subreg:SI (reg:DF) 0) isn't. */
788 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
790 if (! (isize
== osize
791 /* LRA can use subreg to store a floating point value in
792 an integer mode. Although the floating point and the
793 integer modes need the same number of hard registers,
794 the size of floating point mode can be less than the
795 integer mode. LRA also uses subregs for a register
796 should be used in different mode in on insn. */
801 /* Paradoxical subregs must have offset zero. */
805 /* This is a normal subreg. Verify that the offset is representable. */
807 /* For hard registers, we already have most of these rules collected in
808 subreg_offset_representable_p. */
809 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
811 unsigned int regno
= REGNO (reg
);
813 #ifdef CANNOT_CHANGE_MODE_CLASS
814 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
815 && GET_MODE_INNER (imode
) == omode
)
817 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
821 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
824 /* For pseudo registers, we want most of the same checks. Namely:
825 If the register no larger than a word, the subreg must be lowpart.
826 If the register is larger than a word, the subreg must be the lowpart
827 of a subword. A subreg does *not* perform arbitrary bit extraction.
828 Given that we've already checked mode/offset alignment, we only have
829 to check subword subregs here. */
830 if (osize
< UNITS_PER_WORD
831 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
833 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
834 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
835 if (offset
% UNITS_PER_WORD
!= low_off
)
842 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
844 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
845 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
848 /* Generate a SUBREG representing the least-significant part of REG if MODE
849 is smaller than mode of REG, otherwise paradoxical SUBREG. */
852 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
854 enum machine_mode inmode
;
856 inmode
= GET_MODE (reg
);
857 if (inmode
== VOIDmode
)
859 return gen_rtx_SUBREG (mode
, reg
,
860 subreg_lowpart_offset (mode
, inmode
));
864 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
867 gen_rtvec (int n
, ...)
875 /* Don't allocate an empty rtvec... */
882 rt_val
= rtvec_alloc (n
);
884 for (i
= 0; i
< n
; i
++)
885 rt_val
->elem
[i
] = va_arg (p
, rtx
);
892 gen_rtvec_v (int n
, rtx
*argp
)
897 /* Don't allocate an empty rtvec... */
901 rt_val
= rtvec_alloc (n
);
903 for (i
= 0; i
< n
; i
++)
904 rt_val
->elem
[i
] = *argp
++;
909 /* Return the number of bytes between the start of an OUTER_MODE
910 in-memory value and the start of an INNER_MODE in-memory value,
911 given that the former is a lowpart of the latter. It may be a
912 paradoxical lowpart, in which case the offset will be negative
913 on big-endian targets. */
916 byte_lowpart_offset (enum machine_mode outer_mode
,
917 enum machine_mode inner_mode
)
919 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
920 return subreg_lowpart_offset (outer_mode
, inner_mode
);
922 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
925 /* Generate a REG rtx for a new pseudo register of mode MODE.
926 This pseudo is assigned the next sequential register number. */
929 gen_reg_rtx (enum machine_mode mode
)
932 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
934 gcc_assert (can_create_pseudo_p ());
936 /* If a virtual register with bigger mode alignment is generated,
937 increase stack alignment estimation because it might be spilled
939 if (SUPPORTS_STACK_ALIGNMENT
940 && crtl
->stack_alignment_estimated
< align
941 && !crtl
->stack_realign_processed
)
943 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
944 if (crtl
->stack_alignment_estimated
< min_align
)
945 crtl
->stack_alignment_estimated
= min_align
;
948 if (generating_concat_p
949 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
950 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
952 /* For complex modes, don't make a single pseudo.
953 Instead, make a CONCAT of two pseudos.
954 This allows noncontiguous allocation of the real and imaginary parts,
955 which makes much better code. Besides, allocating DCmode
956 pseudos overstrains reload on some machines like the 386. */
957 rtx realpart
, imagpart
;
958 enum machine_mode partmode
= GET_MODE_INNER (mode
);
960 realpart
= gen_reg_rtx (partmode
);
961 imagpart
= gen_reg_rtx (partmode
);
962 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
965 /* Do not call gen_reg_rtx with uninitialized crtl. */
966 gcc_assert (crtl
->emit
.regno_pointer_align_length
);
968 /* Make sure regno_pointer_align, and regno_reg_rtx are large
969 enough to have an element for this pseudo reg number. */
971 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
973 int old_size
= crtl
->emit
.regno_pointer_align_length
;
977 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
978 memset (tmp
+ old_size
, 0, old_size
);
979 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
981 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
982 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
983 regno_reg_rtx
= new1
;
985 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
988 val
= gen_raw_REG (mode
, reg_rtx_no
);
989 regno_reg_rtx
[reg_rtx_no
++] = val
;
993 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
996 reg_is_parm_p (rtx reg
)
1000 gcc_assert (REG_P (reg
));
1001 decl
= REG_EXPR (reg
);
1002 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
1005 /* Update NEW with the same attributes as REG, but with OFFSET added
1006 to the REG_OFFSET. */
1009 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
1011 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
1012 REG_OFFSET (reg
) + offset
);
1015 /* Generate a register with same attributes as REG, but with OFFSET
1016 added to the REG_OFFSET. */
1019 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
1022 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
1024 update_reg_offset (new_rtx
, reg
, offset
);
1028 /* Generate a new pseudo-register with the same attributes as REG, but
1029 with OFFSET added to the REG_OFFSET. */
1032 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
1034 rtx new_rtx
= gen_reg_rtx (mode
);
1036 update_reg_offset (new_rtx
, reg
, offset
);
1040 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1041 new register is a (possibly paradoxical) lowpart of the old one. */
1044 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
1046 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
1047 PUT_MODE (reg
, mode
);
1050 /* Copy REG's attributes from X, if X has any attributes. If REG and X
1051 have different modes, REG is a (possibly paradoxical) lowpart of X. */
1054 set_reg_attrs_from_value (rtx reg
, rtx x
)
1057 bool can_be_reg_pointer
= true;
1059 /* Don't call mark_reg_pointer for incompatible pointer sign
1061 while (GET_CODE (x
) == SIGN_EXTEND
1062 || GET_CODE (x
) == ZERO_EXTEND
1063 || GET_CODE (x
) == TRUNCATE
1064 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
1066 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
1067 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
1068 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
1069 can_be_reg_pointer
= false;
1074 /* Hard registers can be reused for multiple purposes within the same
1075 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1076 on them is wrong. */
1077 if (HARD_REGISTER_P (reg
))
1080 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1083 if (MEM_OFFSET_KNOWN_P (x
))
1084 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1085 MEM_OFFSET (x
) + offset
);
1086 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1087 mark_reg_pointer (reg
, 0);
1092 update_reg_offset (reg
, x
, offset
);
1093 if (can_be_reg_pointer
&& REG_POINTER (x
))
1094 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1098 /* Generate a REG rtx for a new pseudo register, copying the mode
1099 and attributes from X. */
1102 gen_reg_rtx_and_attrs (rtx x
)
1104 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1105 set_reg_attrs_from_value (reg
, x
);
1109 /* Set the register attributes for registers contained in PARM_RTX.
1110 Use needed values from memory attributes of MEM. */
1113 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1115 if (REG_P (parm_rtx
))
1116 set_reg_attrs_from_value (parm_rtx
, mem
);
1117 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1119 /* Check for a NULL entry in the first slot, used to indicate that the
1120 parameter goes both on the stack and in registers. */
1121 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1122 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1124 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1125 if (REG_P (XEXP (x
, 0)))
1126 REG_ATTRS (XEXP (x
, 0))
1127 = get_reg_attrs (MEM_EXPR (mem
),
1128 INTVAL (XEXP (x
, 1)));
1133 /* Set the REG_ATTRS for registers in value X, given that X represents
1137 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1139 if (GET_CODE (x
) == SUBREG
)
1141 gcc_assert (subreg_lowpart_p (x
));
1146 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1148 if (GET_CODE (x
) == CONCAT
)
1150 if (REG_P (XEXP (x
, 0)))
1151 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1152 if (REG_P (XEXP (x
, 1)))
1153 REG_ATTRS (XEXP (x
, 1))
1154 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1156 if (GET_CODE (x
) == PARALLEL
)
1160 /* Check for a NULL entry, used to indicate that the parameter goes
1161 both on the stack and in registers. */
1162 if (XEXP (XVECEXP (x
, 0, 0), 0))
1167 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1169 rtx y
= XVECEXP (x
, 0, i
);
1170 if (REG_P (XEXP (y
, 0)))
1171 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1176 /* Assign the RTX X to declaration T. */
1179 set_decl_rtl (tree t
, rtx x
)
1181 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1183 set_reg_attrs_for_decl_rtl (t
, x
);
1186 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1187 if the ABI requires the parameter to be passed by reference. */
1190 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1192 DECL_INCOMING_RTL (t
) = x
;
1193 if (x
&& !by_reference_p
)
1194 set_reg_attrs_for_decl_rtl (t
, x
);
1197 /* Identify REG (which may be a CONCAT) as a user register. */
1200 mark_user_reg (rtx reg
)
1202 if (GET_CODE (reg
) == CONCAT
)
1204 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1205 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1209 gcc_assert (REG_P (reg
));
1210 REG_USERVAR_P (reg
) = 1;
1214 /* Identify REG as a probable pointer register and show its alignment
1215 as ALIGN, if nonzero. */
1218 mark_reg_pointer (rtx reg
, int align
)
1220 if (! REG_POINTER (reg
))
1222 REG_POINTER (reg
) = 1;
1225 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1227 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1228 /* We can no-longer be sure just how aligned this pointer is. */
1229 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1232 /* Return 1 plus largest pseudo reg number used in the current function. */
1240 /* Return 1 + the largest label number used so far in the current function. */
1243 max_label_num (void)
1248 /* Return first label number used in this function (if any were used). */
1251 get_first_label_num (void)
1253 return first_label_num
;
1256 /* If the rtx for label was created during the expansion of a nested
1257 function, then first_label_num won't include this label number.
1258 Fix this now so that array indices work later. */
1261 maybe_set_first_label_num (rtx x
)
1263 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1264 first_label_num
= CODE_LABEL_NUMBER (x
);
1267 /* Return a value representing some low-order bits of X, where the number
1268 of low-order bits is given by MODE. Note that no conversion is done
1269 between floating-point and fixed-point values, rather, the bit
1270 representation is returned.
1272 This function handles the cases in common between gen_lowpart, below,
1273 and two variants in cse.c and combine.c. These are the cases that can
1274 be safely handled at all points in the compilation.
1276 If this is not a case we can handle, return 0. */
1279 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1281 int msize
= GET_MODE_SIZE (mode
);
1284 enum machine_mode innermode
;
1286 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1287 so we have to make one up. Yuk. */
1288 innermode
= GET_MODE (x
);
1290 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1291 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1292 else if (innermode
== VOIDmode
)
1293 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1295 xsize
= GET_MODE_SIZE (innermode
);
1297 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1299 if (innermode
== mode
)
1302 /* MODE must occupy no more words than the mode of X. */
1303 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1304 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1307 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1308 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1311 offset
= subreg_lowpart_offset (mode
, innermode
);
1313 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1314 && (GET_MODE_CLASS (mode
) == MODE_INT
1315 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1317 /* If we are getting the low-order part of something that has been
1318 sign- or zero-extended, we can either just use the object being
1319 extended or make a narrower extension. If we want an even smaller
1320 piece than the size of the object being extended, call ourselves
1323 This case is used mostly by combine and cse. */
1325 if (GET_MODE (XEXP (x
, 0)) == mode
)
1327 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1328 return gen_lowpart_common (mode
, XEXP (x
, 0));
1329 else if (msize
< xsize
)
1330 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1332 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1333 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1334 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1335 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1337 /* Otherwise, we can't do this. */
1342 gen_highpart (enum machine_mode mode
, rtx x
)
1344 unsigned int msize
= GET_MODE_SIZE (mode
);
1347 /* This case loses if X is a subreg. To catch bugs early,
1348 complain if an invalid MODE is used even in other cases. */
1349 gcc_assert (msize
<= UNITS_PER_WORD
1350 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1352 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1353 subreg_highpart_offset (mode
, GET_MODE (x
)));
1354 gcc_assert (result
);
1356 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1357 the target if we have a MEM. gen_highpart must return a valid operand,
1358 emitting code if necessary to do so. */
1361 result
= validize_mem (result
);
1362 gcc_assert (result
);
1368 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1369 be VOIDmode constant. */
1371 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1373 if (GET_MODE (exp
) != VOIDmode
)
1375 gcc_assert (GET_MODE (exp
) == innermode
);
1376 return gen_highpart (outermode
, exp
);
1378 return simplify_gen_subreg (outermode
, exp
, innermode
,
1379 subreg_highpart_offset (outermode
, innermode
));
1382 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1385 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1387 unsigned int offset
= 0;
1388 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1392 if (WORDS_BIG_ENDIAN
)
1393 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1394 if (BYTES_BIG_ENDIAN
)
1395 offset
+= difference
% UNITS_PER_WORD
;
1401 /* Return offset in bytes to get OUTERMODE high part
1402 of the value in mode INNERMODE stored in memory in target format. */
1404 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1406 unsigned int offset
= 0;
1407 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1409 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1413 if (! WORDS_BIG_ENDIAN
)
1414 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1415 if (! BYTES_BIG_ENDIAN
)
1416 offset
+= difference
% UNITS_PER_WORD
;
1422 /* Return 1 iff X, assumed to be a SUBREG,
1423 refers to the least significant part of its containing reg.
1424 If X is not a SUBREG, always return 1 (it is its own low part!). */
1427 subreg_lowpart_p (const_rtx x
)
1429 if (GET_CODE (x
) != SUBREG
)
1431 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1434 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1435 == SUBREG_BYTE (x
));
1438 /* Return true if X is a paradoxical subreg, false otherwise. */
1440 paradoxical_subreg_p (const_rtx x
)
1442 if (GET_CODE (x
) != SUBREG
)
1444 return (GET_MODE_PRECISION (GET_MODE (x
))
1445 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1448 /* Return subword OFFSET of operand OP.
1449 The word number, OFFSET, is interpreted as the word number starting
1450 at the low-order address. OFFSET 0 is the low-order word if not
1451 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1453 If we cannot extract the required word, we return zero. Otherwise,
1454 an rtx corresponding to the requested word will be returned.
1456 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1457 reload has completed, a valid address will always be returned. After
1458 reload, if a valid address cannot be returned, we return zero.
1460 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1461 it is the responsibility of the caller.
1463 MODE is the mode of OP in case it is a CONST_INT.
1465 ??? This is still rather broken for some cases. The problem for the
1466 moment is that all callers of this thing provide no 'goal mode' to
1467 tell us to work with. This exists because all callers were written
1468 in a word based SUBREG world.
1469 Now use of this function can be deprecated by simplify_subreg in most
1474 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1476 if (mode
== VOIDmode
)
1477 mode
= GET_MODE (op
);
1479 gcc_assert (mode
!= VOIDmode
);
1481 /* If OP is narrower than a word, fail. */
1483 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1486 /* If we want a word outside OP, return zero. */
1488 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1491 /* Form a new MEM at the requested address. */
1494 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1496 if (! validate_address
)
1499 else if (reload_completed
)
1501 if (! strict_memory_address_addr_space_p (word_mode
,
1503 MEM_ADDR_SPACE (op
)))
1507 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1510 /* Rest can be handled by simplify_subreg. */
1511 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1514 /* Similar to `operand_subword', but never return 0. If we can't
1515 extract the required subword, put OP into a register and try again.
1516 The second attempt must succeed. We always validate the address in
1519 MODE is the mode of OP, in case it is CONST_INT. */
1522 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1524 rtx result
= operand_subword (op
, offset
, 1, mode
);
1529 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1531 /* If this is a register which can not be accessed by words, copy it
1532 to a pseudo register. */
1534 op
= copy_to_reg (op
);
1536 op
= force_reg (mode
, op
);
1539 result
= operand_subword (op
, offset
, 1, mode
);
1540 gcc_assert (result
);
1545 /* Returns 1 if both MEM_EXPR can be considered equal
1549 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1554 if (! expr1
|| ! expr2
)
1557 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1560 return operand_equal_p (expr1
, expr2
, 0);
1563 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1564 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1568 get_mem_align_offset (rtx mem
, unsigned int align
)
1571 unsigned HOST_WIDE_INT offset
;
1573 /* This function can't use
1574 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1575 || (MAX (MEM_ALIGN (mem),
1576 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1580 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1582 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1583 for <variable>. get_inner_reference doesn't handle it and
1584 even if it did, the alignment in that case needs to be determined
1585 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1586 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1587 isn't sufficiently aligned, the object it is in might be. */
1588 gcc_assert (MEM_P (mem
));
1589 expr
= MEM_EXPR (mem
);
1590 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1593 offset
= MEM_OFFSET (mem
);
1596 if (DECL_ALIGN (expr
) < align
)
1599 else if (INDIRECT_REF_P (expr
))
1601 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1604 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1608 tree inner
= TREE_OPERAND (expr
, 0);
1609 tree field
= TREE_OPERAND (expr
, 1);
1610 tree byte_offset
= component_ref_field_offset (expr
);
1611 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1614 || !tree_fits_uhwi_p (byte_offset
)
1615 || !tree_fits_uhwi_p (bit_offset
))
1618 offset
+= tree_to_uhwi (byte_offset
);
1619 offset
+= tree_to_uhwi (bit_offset
) / BITS_PER_UNIT
;
1621 if (inner
== NULL_TREE
)
1623 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1624 < (unsigned int) align
)
1628 else if (DECL_P (inner
))
1630 if (DECL_ALIGN (inner
) < align
)
1634 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1642 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1645 /* Given REF (a MEM) and T, either the type of X or the expression
1646 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1647 if we are making a new object of this type. BITPOS is nonzero if
1648 there is an offset outstanding on T that will be applied later. */
1651 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1652 HOST_WIDE_INT bitpos
)
1654 HOST_WIDE_INT apply_bitpos
= 0;
1656 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1659 /* It can happen that type_for_mode was given a mode for which there
1660 is no language-level type. In which case it returns NULL, which
1665 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1666 if (type
== error_mark_node
)
1669 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1670 wrong answer, as it assumes that DECL_RTL already has the right alias
1671 info. Callers should not set DECL_RTL until after the call to
1672 set_mem_attributes. */
1673 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1675 memset (&attrs
, 0, sizeof (attrs
));
1677 /* Get the alias set from the expression or type (perhaps using a
1678 front-end routine) and use it. */
1679 attrs
.alias
= get_alias_set (t
);
1681 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1682 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1684 /* Default values from pre-existing memory attributes if present. */
1685 refattrs
= MEM_ATTRS (ref
);
1688 /* ??? Can this ever happen? Calling this routine on a MEM that
1689 already carries memory attributes should probably be invalid. */
1690 attrs
.expr
= refattrs
->expr
;
1691 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1692 attrs
.offset
= refattrs
->offset
;
1693 attrs
.size_known_p
= refattrs
->size_known_p
;
1694 attrs
.size
= refattrs
->size
;
1695 attrs
.align
= refattrs
->align
;
1698 /* Otherwise, default values from the mode of the MEM reference. */
1701 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1702 gcc_assert (!defattrs
->expr
);
1703 gcc_assert (!defattrs
->offset_known_p
);
1705 /* Respect mode size. */
1706 attrs
.size_known_p
= defattrs
->size_known_p
;
1707 attrs
.size
= defattrs
->size
;
1708 /* ??? Is this really necessary? We probably should always get
1709 the size from the type below. */
1711 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1712 if T is an object, always compute the object alignment below. */
1714 attrs
.align
= defattrs
->align
;
1716 attrs
.align
= BITS_PER_UNIT
;
1717 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1718 e.g. if the type carries an alignment attribute. Should we be
1719 able to simply always use TYPE_ALIGN? */
1722 /* We can set the alignment from the type if we are making an object,
1723 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1724 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1725 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1727 /* If the size is known, we can set that. */
1728 tree new_size
= TYPE_SIZE_UNIT (type
);
1730 /* The address-space is that of the type. */
1731 as
= TYPE_ADDR_SPACE (type
);
1733 /* If T is not a type, we may be able to deduce some more information about
1739 if (TREE_THIS_VOLATILE (t
))
1740 MEM_VOLATILE_P (ref
) = 1;
1742 /* Now remove any conversions: they don't change what the underlying
1743 object is. Likewise for SAVE_EXPR. */
1744 while (CONVERT_EXPR_P (t
)
1745 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1746 || TREE_CODE (t
) == SAVE_EXPR
)
1747 t
= TREE_OPERAND (t
, 0);
1749 /* Note whether this expression can trap. */
1750 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1752 base
= get_base_address (t
);
1756 && TREE_READONLY (base
)
1757 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1758 && !TREE_THIS_VOLATILE (base
))
1759 MEM_READONLY_P (ref
) = 1;
1761 /* Mark static const strings readonly as well. */
1762 if (TREE_CODE (base
) == STRING_CST
1763 && TREE_READONLY (base
)
1764 && TREE_STATIC (base
))
1765 MEM_READONLY_P (ref
) = 1;
1767 /* Address-space information is on the base object. */
1768 if (TREE_CODE (base
) == MEM_REF
1769 || TREE_CODE (base
) == TARGET_MEM_REF
)
1770 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1773 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1776 /* If this expression uses it's parent's alias set, mark it such
1777 that we won't change it. */
1778 if (component_uses_parent_alias_set_from (t
) != NULL_TREE
)
1779 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1781 /* If this is a decl, set the attributes of the MEM from it. */
1785 attrs
.offset_known_p
= true;
1787 apply_bitpos
= bitpos
;
1788 new_size
= DECL_SIZE_UNIT (t
);
1791 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1792 else if (CONSTANT_CLASS_P (t
))
1795 /* If this is a field reference, record it. */
1796 else if (TREE_CODE (t
) == COMPONENT_REF
)
1799 attrs
.offset_known_p
= true;
1801 apply_bitpos
= bitpos
;
1802 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1803 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1806 /* If this is an array reference, look for an outer field reference. */
1807 else if (TREE_CODE (t
) == ARRAY_REF
)
1809 tree off_tree
= size_zero_node
;
1810 /* We can't modify t, because we use it at the end of the
1816 tree index
= TREE_OPERAND (t2
, 1);
1817 tree low_bound
= array_ref_low_bound (t2
);
1818 tree unit_size
= array_ref_element_size (t2
);
1820 /* We assume all arrays have sizes that are a multiple of a byte.
1821 First subtract the lower bound, if any, in the type of the
1822 index, then convert to sizetype and multiply by the size of
1823 the array element. */
1824 if (! integer_zerop (low_bound
))
1825 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1828 off_tree
= size_binop (PLUS_EXPR
,
1829 size_binop (MULT_EXPR
,
1830 fold_convert (sizetype
,
1834 t2
= TREE_OPERAND (t2
, 0);
1836 while (TREE_CODE (t2
) == ARRAY_REF
);
1839 || TREE_CODE (t2
) == COMPONENT_REF
)
1842 attrs
.offset_known_p
= false;
1843 if (tree_fits_uhwi_p (off_tree
))
1845 attrs
.offset_known_p
= true;
1846 attrs
.offset
= tree_to_uhwi (off_tree
);
1847 apply_bitpos
= bitpos
;
1850 /* Else do not record a MEM_EXPR. */
1853 /* If this is an indirect reference, record it. */
1854 else if (TREE_CODE (t
) == MEM_REF
1855 || TREE_CODE (t
) == TARGET_MEM_REF
)
1858 attrs
.offset_known_p
= true;
1860 apply_bitpos
= bitpos
;
1863 /* Compute the alignment. */
1864 unsigned int obj_align
;
1865 unsigned HOST_WIDE_INT obj_bitpos
;
1866 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1867 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1868 if (obj_bitpos
!= 0)
1869 obj_align
= (obj_bitpos
& -obj_bitpos
);
1870 attrs
.align
= MAX (attrs
.align
, obj_align
);
1873 if (tree_fits_uhwi_p (new_size
))
1875 attrs
.size_known_p
= true;
1876 attrs
.size
= tree_to_uhwi (new_size
);
1879 /* If we modified OFFSET based on T, then subtract the outstanding
1880 bit position offset. Similarly, increase the size of the accessed
1881 object to contain the negative offset. */
1884 gcc_assert (attrs
.offset_known_p
);
1885 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1886 if (attrs
.size_known_p
)
1887 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1890 /* Now set the attributes we computed above. */
1891 attrs
.addrspace
= as
;
1892 set_mem_attrs (ref
, &attrs
);
1896 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1898 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1901 /* Set the alias set of MEM to SET. */
1904 set_mem_alias_set (rtx mem
, alias_set_type set
)
1906 struct mem_attrs attrs
;
1908 /* If the new and old alias sets don't conflict, something is wrong. */
1909 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1910 attrs
= *get_mem_attrs (mem
);
1912 set_mem_attrs (mem
, &attrs
);
1915 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1918 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
1920 struct mem_attrs attrs
;
1922 attrs
= *get_mem_attrs (mem
);
1923 attrs
.addrspace
= addrspace
;
1924 set_mem_attrs (mem
, &attrs
);
1927 /* Set the alignment of MEM to ALIGN bits. */
1930 set_mem_align (rtx mem
, unsigned int align
)
1932 struct mem_attrs attrs
;
1934 attrs
= *get_mem_attrs (mem
);
1935 attrs
.align
= align
;
1936 set_mem_attrs (mem
, &attrs
);
1939 /* Set the expr for MEM to EXPR. */
1942 set_mem_expr (rtx mem
, tree expr
)
1944 struct mem_attrs attrs
;
1946 attrs
= *get_mem_attrs (mem
);
1948 set_mem_attrs (mem
, &attrs
);
1951 /* Set the offset of MEM to OFFSET. */
1954 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
1956 struct mem_attrs attrs
;
1958 attrs
= *get_mem_attrs (mem
);
1959 attrs
.offset_known_p
= true;
1960 attrs
.offset
= offset
;
1961 set_mem_attrs (mem
, &attrs
);
1964 /* Clear the offset of MEM. */
1967 clear_mem_offset (rtx mem
)
1969 struct mem_attrs attrs
;
1971 attrs
= *get_mem_attrs (mem
);
1972 attrs
.offset_known_p
= false;
1973 set_mem_attrs (mem
, &attrs
);
1976 /* Set the size of MEM to SIZE. */
1979 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
1981 struct mem_attrs attrs
;
1983 attrs
= *get_mem_attrs (mem
);
1984 attrs
.size_known_p
= true;
1986 set_mem_attrs (mem
, &attrs
);
1989 /* Clear the size of MEM. */
1992 clear_mem_size (rtx mem
)
1994 struct mem_attrs attrs
;
1996 attrs
= *get_mem_attrs (mem
);
1997 attrs
.size_known_p
= false;
1998 set_mem_attrs (mem
, &attrs
);
2001 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2002 and its address changed to ADDR. (VOIDmode means don't change the mode.
2003 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2004 returned memory location is required to be valid. The memory
2005 attributes are not changed. */
2008 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
2013 gcc_assert (MEM_P (memref
));
2014 as
= MEM_ADDR_SPACE (memref
);
2015 if (mode
== VOIDmode
)
2016 mode
= GET_MODE (memref
);
2018 addr
= XEXP (memref
, 0);
2019 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
2020 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2023 /* Don't validate address for LRA. LRA can make the address valid
2024 by itself in most efficient way. */
2025 if (validate
&& !lra_in_progress
)
2027 if (reload_in_progress
|| reload_completed
)
2028 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2030 addr
= memory_address_addr_space (mode
, addr
, as
);
2033 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2036 new_rtx
= gen_rtx_MEM (mode
, addr
);
2037 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2041 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2042 way we are changing MEMREF, so we only preserve the alias set. */
2045 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
2047 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1);
2048 enum machine_mode mmode
= GET_MODE (new_rtx
);
2049 struct mem_attrs attrs
, *defattrs
;
2051 attrs
= *get_mem_attrs (memref
);
2052 defattrs
= mode_mem_attrs
[(int) mmode
];
2053 attrs
.expr
= NULL_TREE
;
2054 attrs
.offset_known_p
= false;
2055 attrs
.size_known_p
= defattrs
->size_known_p
;
2056 attrs
.size
= defattrs
->size
;
2057 attrs
.align
= defattrs
->align
;
2059 /* If there are no changes, just return the original memory reference. */
2060 if (new_rtx
== memref
)
2062 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2065 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2066 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2069 set_mem_attrs (new_rtx
, &attrs
);
2073 /* Return a memory reference like MEMREF, but with its mode changed
2074 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2075 nonzero, the memory address is forced to be valid.
2076 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2077 and the caller is responsible for adjusting MEMREF base register.
2078 If ADJUST_OBJECT is zero, the underlying object associated with the
2079 memory reference is left unchanged and the caller is responsible for
2080 dealing with it. Otherwise, if the new memory reference is outside
2081 the underlying object, even partially, then the object is dropped.
2082 SIZE, if nonzero, is the size of an access in cases where MODE
2083 has no inherent size. */
2086 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
2087 int validate
, int adjust_address
, int adjust_object
,
2090 rtx addr
= XEXP (memref
, 0);
2092 enum machine_mode address_mode
;
2094 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2095 unsigned HOST_WIDE_INT max_align
;
2096 #ifdef POINTERS_EXTEND_UNSIGNED
2097 enum machine_mode pointer_mode
2098 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2101 /* VOIDmode means no mode change for change_address_1. */
2102 if (mode
== VOIDmode
)
2103 mode
= GET_MODE (memref
);
2105 /* Take the size of non-BLKmode accesses from the mode. */
2106 defattrs
= mode_mem_attrs
[(int) mode
];
2107 if (defattrs
->size_known_p
)
2108 size
= defattrs
->size
;
2110 /* If there are no changes, just return the original memory reference. */
2111 if (mode
== GET_MODE (memref
) && !offset
2112 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2113 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2117 /* ??? Prefer to create garbage instead of creating shared rtl.
2118 This may happen even if offset is nonzero -- consider
2119 (plus (plus reg reg) const_int) -- so do this always. */
2120 addr
= copy_rtx (addr
);
2122 /* Convert a possibly large offset to a signed value within the
2123 range of the target address space. */
2124 address_mode
= get_address_mode (memref
);
2125 pbits
= GET_MODE_BITSIZE (address_mode
);
2126 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2128 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2129 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2135 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2136 object, we can merge it into the LO_SUM. */
2137 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2139 && (unsigned HOST_WIDE_INT
) offset
2140 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2141 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2142 plus_constant (address_mode
,
2143 XEXP (addr
, 1), offset
));
2144 #ifdef POINTERS_EXTEND_UNSIGNED
2145 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2146 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2147 the fact that pointers are not allowed to overflow. */
2148 else if (POINTERS_EXTEND_UNSIGNED
> 0
2149 && GET_CODE (addr
) == ZERO_EXTEND
2150 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2151 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2152 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2153 plus_constant (pointer_mode
,
2154 XEXP (addr
, 0), offset
));
2157 addr
= plus_constant (address_mode
, addr
, offset
);
2160 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
);
2162 /* If the address is a REG, change_address_1 rightfully returns memref,
2163 but this would destroy memref's MEM_ATTRS. */
2164 if (new_rtx
== memref
&& offset
!= 0)
2165 new_rtx
= copy_rtx (new_rtx
);
2167 /* Conservatively drop the object if we don't know where we start from. */
2168 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2170 attrs
.expr
= NULL_TREE
;
2174 /* Compute the new values of the memory attributes due to this adjustment.
2175 We add the offsets and update the alignment. */
2176 if (attrs
.offset_known_p
)
2178 attrs
.offset
+= offset
;
2180 /* Drop the object if the new left end is not within its bounds. */
2181 if (adjust_object
&& attrs
.offset
< 0)
2183 attrs
.expr
= NULL_TREE
;
2188 /* Compute the new alignment by taking the MIN of the alignment and the
2189 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2193 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2194 attrs
.align
= MIN (attrs
.align
, max_align
);
2199 /* Drop the object if the new right end is not within its bounds. */
2200 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2202 attrs
.expr
= NULL_TREE
;
2205 attrs
.size_known_p
= true;
2208 else if (attrs
.size_known_p
)
2210 gcc_assert (!adjust_object
);
2211 attrs
.size
-= offset
;
2212 /* ??? The store_by_pieces machinery generates negative sizes,
2213 so don't assert for that here. */
2216 set_mem_attrs (new_rtx
, &attrs
);
2221 /* Return a memory reference like MEMREF, but with its mode changed
2222 to MODE and its address changed to ADDR, which is assumed to be
2223 MEMREF offset by OFFSET bytes. If VALIDATE is
2224 nonzero, the memory address is forced to be valid. */
2227 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2228 HOST_WIDE_INT offset
, int validate
)
2230 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2231 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2234 /* Return a memory reference like MEMREF, but whose address is changed by
2235 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2236 known to be in OFFSET (possibly 1). */
2239 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2241 rtx new_rtx
, addr
= XEXP (memref
, 0);
2242 enum machine_mode address_mode
;
2243 struct mem_attrs attrs
, *defattrs
;
2245 attrs
= *get_mem_attrs (memref
);
2246 address_mode
= get_address_mode (memref
);
2247 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2249 /* At this point we don't know _why_ the address is invalid. It
2250 could have secondary memory references, multiplies or anything.
2252 However, if we did go and rearrange things, we can wind up not
2253 being able to recognize the magic around pic_offset_table_rtx.
2254 This stuff is fragile, and is yet another example of why it is
2255 bad to expose PIC machinery too early. */
2256 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2258 && GET_CODE (addr
) == PLUS
2259 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2261 addr
= force_reg (GET_MODE (addr
), addr
);
2262 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2265 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2266 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1);
2268 /* If there are no changes, just return the original memory reference. */
2269 if (new_rtx
== memref
)
2272 /* Update the alignment to reflect the offset. Reset the offset, which
2274 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2275 attrs
.offset_known_p
= false;
2276 attrs
.size_known_p
= defattrs
->size_known_p
;
2277 attrs
.size
= defattrs
->size
;
2278 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2279 set_mem_attrs (new_rtx
, &attrs
);
2283 /* Return a memory reference like MEMREF, but with its address changed to
2284 ADDR. The caller is asserting that the actual piece of memory pointed
2285 to is the same, just the form of the address is being changed, such as
2286 by putting something into a register. */
2289 replace_equiv_address (rtx memref
, rtx addr
)
2291 /* change_address_1 copies the memory attribute structure without change
2292 and that's exactly what we want here. */
2293 update_temp_slot_address (XEXP (memref
, 0), addr
);
2294 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2297 /* Likewise, but the reference is not required to be valid. */
2300 replace_equiv_address_nv (rtx memref
, rtx addr
)
2302 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2305 /* Return a memory reference like MEMREF, but with its mode widened to
2306 MODE and offset by OFFSET. This would be used by targets that e.g.
2307 cannot issue QImode memory operations and have to use SImode memory
2308 operations plus masking logic. */
2311 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2313 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2314 struct mem_attrs attrs
;
2315 unsigned int size
= GET_MODE_SIZE (mode
);
2317 /* If there are no changes, just return the original memory reference. */
2318 if (new_rtx
== memref
)
2321 attrs
= *get_mem_attrs (new_rtx
);
2323 /* If we don't know what offset we were at within the expression, then
2324 we can't know if we've overstepped the bounds. */
2325 if (! attrs
.offset_known_p
)
2326 attrs
.expr
= NULL_TREE
;
2330 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2332 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2333 tree offset
= component_ref_field_offset (attrs
.expr
);
2335 if (! DECL_SIZE_UNIT (field
))
2337 attrs
.expr
= NULL_TREE
;
2341 /* Is the field at least as large as the access? If so, ok,
2342 otherwise strip back to the containing structure. */
2343 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2344 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2345 && attrs
.offset
>= 0)
2348 if (! tree_fits_uhwi_p (offset
))
2350 attrs
.expr
= NULL_TREE
;
2354 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2355 attrs
.offset
+= tree_to_uhwi (offset
);
2356 attrs
.offset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
2359 /* Similarly for the decl. */
2360 else if (DECL_P (attrs
.expr
)
2361 && DECL_SIZE_UNIT (attrs
.expr
)
2362 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2363 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2364 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2368 /* The widened memory access overflows the expression, which means
2369 that it could alias another expression. Zap it. */
2370 attrs
.expr
= NULL_TREE
;
2376 attrs
.offset_known_p
= false;
2378 /* The widened memory may alias other stuff, so zap the alias set. */
2379 /* ??? Maybe use get_alias_set on any remaining expression. */
2381 attrs
.size_known_p
= true;
2383 set_mem_attrs (new_rtx
, &attrs
);
2387 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2388 static GTY(()) tree spill_slot_decl
;
2391 get_spill_slot_decl (bool force_build_p
)
2393 tree d
= spill_slot_decl
;
2395 struct mem_attrs attrs
;
2397 if (d
|| !force_build_p
)
2400 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2401 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2402 DECL_ARTIFICIAL (d
) = 1;
2403 DECL_IGNORED_P (d
) = 1;
2405 spill_slot_decl
= d
;
2407 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2408 MEM_NOTRAP_P (rd
) = 1;
2409 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2410 attrs
.alias
= new_alias_set ();
2412 set_mem_attrs (rd
, &attrs
);
2413 SET_DECL_RTL (d
, rd
);
2418 /* Given MEM, a result from assign_stack_local, fill in the memory
2419 attributes as appropriate for a register allocator spill slot.
2420 These slots are not aliasable by other memory. We arrange for
2421 them all to use a single MEM_EXPR, so that the aliasing code can
2422 work properly in the case of shared spill slots. */
2425 set_mem_attrs_for_spill (rtx mem
)
2427 struct mem_attrs attrs
;
2430 attrs
= *get_mem_attrs (mem
);
2431 attrs
.expr
= get_spill_slot_decl (true);
2432 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2433 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2435 /* We expect the incoming memory to be of the form:
2436 (mem:MODE (plus (reg sfp) (const_int offset)))
2437 with perhaps the plus missing for offset = 0. */
2438 addr
= XEXP (mem
, 0);
2439 attrs
.offset_known_p
= true;
2441 if (GET_CODE (addr
) == PLUS
2442 && CONST_INT_P (XEXP (addr
, 1)))
2443 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2445 set_mem_attrs (mem
, &attrs
);
2446 MEM_NOTRAP_P (mem
) = 1;
2449 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2452 gen_label_rtx (void)
2454 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2455 NULL
, label_num
++, NULL
);
2458 /* For procedure integration. */
2460 /* Install new pointers to the first and last insns in the chain.
2461 Also, set cur_insn_uid to one higher than the last in use.
2462 Used for an inline-procedure after copying the insn chain. */
2465 set_new_first_and_last_insn (rtx first
, rtx last
)
2469 set_first_insn (first
);
2470 set_last_insn (last
);
2473 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2475 int debug_count
= 0;
2477 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2478 cur_debug_insn_uid
= 0;
2480 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2481 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2482 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2485 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2486 if (DEBUG_INSN_P (insn
))
2491 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2493 cur_debug_insn_uid
++;
2496 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2497 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2502 /* Go through all the RTL insn bodies and copy any invalid shared
2503 structure. This routine should only be called once. */
2506 unshare_all_rtl_1 (rtx insn
)
2508 /* Unshare just about everything else. */
2509 unshare_all_rtl_in_chain (insn
);
2511 /* Make sure the addresses of stack slots found outside the insn chain
2512 (such as, in DECL_RTL of a variable) are not shared
2513 with the insn chain.
2515 This special care is necessary when the stack slot MEM does not
2516 actually appear in the insn chain. If it does appear, its address
2517 is unshared from all else at that point. */
2518 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2521 /* Go through all the RTL insn bodies and copy any invalid shared
2522 structure, again. This is a fairly expensive thing to do so it
2523 should be done sparingly. */
2526 unshare_all_rtl_again (rtx insn
)
2531 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2534 reset_used_flags (PATTERN (p
));
2535 reset_used_flags (REG_NOTES (p
));
2537 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2540 /* Make sure that virtual stack slots are not shared. */
2541 set_used_decls (DECL_INITIAL (cfun
->decl
));
2543 /* Make sure that virtual parameters are not shared. */
2544 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2545 set_used_flags (DECL_RTL (decl
));
2547 reset_used_flags (stack_slot_list
);
2549 unshare_all_rtl_1 (insn
);
2553 unshare_all_rtl (void)
2555 unshare_all_rtl_1 (get_insns ());
2560 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2561 Recursively does the same for subexpressions. */
2564 verify_rtx_sharing (rtx orig
, rtx insn
)
2569 const char *format_ptr
;
2574 code
= GET_CODE (x
);
2576 /* These types may be freely shared. */
2592 /* SCRATCH must be shared because they represent distinct values. */
2595 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2596 clobbers or clobbers of hard registers that originated as pseudos.
2597 This is needed to allow safe register renaming. */
2598 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2599 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2604 if (shared_const_p (orig
))
2609 /* A MEM is allowed to be shared if its address is constant. */
2610 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2611 || reload_completed
|| reload_in_progress
)
2620 /* This rtx may not be shared. If it has already been seen,
2621 replace it with a copy of itself. */
2622 #ifdef ENABLE_CHECKING
2623 if (RTX_FLAG (x
, used
))
2625 error ("invalid rtl sharing found in the insn");
2627 error ("shared rtx");
2629 internal_error ("internal consistency failure");
2632 gcc_assert (!RTX_FLAG (x
, used
));
2634 RTX_FLAG (x
, used
) = 1;
2636 /* Now scan the subexpressions recursively. */
2638 format_ptr
= GET_RTX_FORMAT (code
);
2640 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2642 switch (*format_ptr
++)
2645 verify_rtx_sharing (XEXP (x
, i
), insn
);
2649 if (XVEC (x
, i
) != NULL
)
2652 int len
= XVECLEN (x
, i
);
2654 for (j
= 0; j
< len
; j
++)
2656 /* We allow sharing of ASM_OPERANDS inside single
2658 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2659 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2661 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2663 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2672 /* Reset used-flags for INSN. */
2675 reset_insn_used_flags (rtx insn
)
2677 gcc_assert (INSN_P (insn
));
2678 reset_used_flags (PATTERN (insn
));
2679 reset_used_flags (REG_NOTES (insn
));
2681 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2684 /* Go through all the RTL insn bodies and clear all the USED bits. */
2687 reset_all_used_flags (void)
2691 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2694 rtx pat
= PATTERN (p
);
2695 if (GET_CODE (pat
) != SEQUENCE
)
2696 reset_insn_used_flags (p
);
2699 gcc_assert (REG_NOTES (p
) == NULL
);
2700 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2701 reset_insn_used_flags (XVECEXP (pat
, 0, i
));
2706 /* Verify sharing in INSN. */
2709 verify_insn_sharing (rtx insn
)
2711 gcc_assert (INSN_P (insn
));
2712 reset_used_flags (PATTERN (insn
));
2713 reset_used_flags (REG_NOTES (insn
));
2715 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2718 /* Go through all the RTL insn bodies and check that there is no unexpected
2719 sharing in between the subexpressions. */
2722 verify_rtl_sharing (void)
2726 timevar_push (TV_VERIFY_RTL_SHARING
);
2728 reset_all_used_flags ();
2730 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2733 rtx pat
= PATTERN (p
);
2734 if (GET_CODE (pat
) != SEQUENCE
)
2735 verify_insn_sharing (p
);
2737 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2738 verify_insn_sharing (XVECEXP (pat
, 0, i
));
2741 reset_all_used_flags ();
2743 timevar_pop (TV_VERIFY_RTL_SHARING
);
2746 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2747 Assumes the mark bits are cleared at entry. */
2750 unshare_all_rtl_in_chain (rtx insn
)
2752 for (; insn
; insn
= NEXT_INSN (insn
))
2755 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2756 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2758 CALL_INSN_FUNCTION_USAGE (insn
)
2759 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2763 /* Go through all virtual stack slots of a function and mark them as
2764 shared. We never replace the DECL_RTLs themselves with a copy,
2765 but expressions mentioned into a DECL_RTL cannot be shared with
2766 expressions in the instruction stream.
2768 Note that reload may convert pseudo registers into memories in-place.
2769 Pseudo registers are always shared, but MEMs never are. Thus if we
2770 reset the used flags on MEMs in the instruction stream, we must set
2771 them again on MEMs that appear in DECL_RTLs. */
2774 set_used_decls (tree blk
)
2779 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2780 if (DECL_RTL_SET_P (t
))
2781 set_used_flags (DECL_RTL (t
));
2783 /* Now process sub-blocks. */
2784 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2788 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2789 Recursively does the same for subexpressions. Uses
2790 copy_rtx_if_shared_1 to reduce stack space. */
2793 copy_rtx_if_shared (rtx orig
)
2795 copy_rtx_if_shared_1 (&orig
);
2799 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2800 use. Recursively does the same for subexpressions. */
2803 copy_rtx_if_shared_1 (rtx
*orig1
)
2809 const char *format_ptr
;
2813 /* Repeat is used to turn tail-recursion into iteration. */
2820 code
= GET_CODE (x
);
2822 /* These types may be freely shared. */
2838 /* SCRATCH must be shared because they represent distinct values. */
2841 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2842 clobbers or clobbers of hard registers that originated as pseudos.
2843 This is needed to allow safe register renaming. */
2844 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2845 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2850 if (shared_const_p (x
))
2860 /* The chain of insns is not being copied. */
2867 /* This rtx may not be shared. If it has already been seen,
2868 replace it with a copy of itself. */
2870 if (RTX_FLAG (x
, used
))
2872 x
= shallow_copy_rtx (x
);
2875 RTX_FLAG (x
, used
) = 1;
2877 /* Now scan the subexpressions recursively.
2878 We can store any replaced subexpressions directly into X
2879 since we know X is not shared! Any vectors in X
2880 must be copied if X was copied. */
2882 format_ptr
= GET_RTX_FORMAT (code
);
2883 length
= GET_RTX_LENGTH (code
);
2886 for (i
= 0; i
< length
; i
++)
2888 switch (*format_ptr
++)
2892 copy_rtx_if_shared_1 (last_ptr
);
2893 last_ptr
= &XEXP (x
, i
);
2897 if (XVEC (x
, i
) != NULL
)
2900 int len
= XVECLEN (x
, i
);
2902 /* Copy the vector iff I copied the rtx and the length
2904 if (copied
&& len
> 0)
2905 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2907 /* Call recursively on all inside the vector. */
2908 for (j
= 0; j
< len
; j
++)
2911 copy_rtx_if_shared_1 (last_ptr
);
2912 last_ptr
= &XVECEXP (x
, i
, j
);
2927 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2930 mark_used_flags (rtx x
, int flag
)
2934 const char *format_ptr
;
2937 /* Repeat is used to turn tail-recursion into iteration. */
2942 code
= GET_CODE (x
);
2944 /* These types may be freely shared so we needn't do any resetting
2968 /* The chain of insns is not being copied. */
2975 RTX_FLAG (x
, used
) = flag
;
2977 format_ptr
= GET_RTX_FORMAT (code
);
2978 length
= GET_RTX_LENGTH (code
);
2980 for (i
= 0; i
< length
; i
++)
2982 switch (*format_ptr
++)
2990 mark_used_flags (XEXP (x
, i
), flag
);
2994 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2995 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
3001 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3002 to look for shared sub-parts. */
3005 reset_used_flags (rtx x
)
3007 mark_used_flags (x
, 0);
3010 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3011 to look for shared sub-parts. */
3014 set_used_flags (rtx x
)
3016 mark_used_flags (x
, 1);
3019 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3020 Return X or the rtx for the pseudo reg the value of X was copied into.
3021 OTHER must be valid as a SET_DEST. */
3024 make_safe_from (rtx x
, rtx other
)
3027 switch (GET_CODE (other
))
3030 other
= SUBREG_REG (other
);
3032 case STRICT_LOW_PART
:
3035 other
= XEXP (other
, 0);
3044 && GET_CODE (x
) != SUBREG
)
3046 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
3047 || reg_mentioned_p (other
, x
))))
3049 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3050 emit_move_insn (temp
, x
);
3056 /* Emission of insns (adding them to the doubly-linked list). */
3058 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3061 get_last_insn_anywhere (void)
3063 struct sequence_stack
*stack
;
3064 if (get_last_insn ())
3065 return get_last_insn ();
3066 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3067 if (stack
->last
!= 0)
3072 /* Return the first nonnote insn emitted in current sequence or current
3073 function. This routine looks inside SEQUENCEs. */
3076 get_first_nonnote_insn (void)
3078 rtx insn
= get_insns ();
3083 for (insn
= next_insn (insn
);
3084 insn
&& NOTE_P (insn
);
3085 insn
= next_insn (insn
))
3089 if (NONJUMP_INSN_P (insn
)
3090 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3091 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3098 /* Return the last nonnote insn emitted in current sequence or current
3099 function. This routine looks inside SEQUENCEs. */
3102 get_last_nonnote_insn (void)
3104 rtx insn
= get_last_insn ();
3109 for (insn
= previous_insn (insn
);
3110 insn
&& NOTE_P (insn
);
3111 insn
= previous_insn (insn
))
3115 if (NONJUMP_INSN_P (insn
)
3116 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3117 insn
= XVECEXP (PATTERN (insn
), 0,
3118 XVECLEN (PATTERN (insn
), 0) - 1);
3125 /* Return the number of actual (non-debug) insns emitted in this
3129 get_max_insn_count (void)
3131 int n
= cur_insn_uid
;
3133 /* The table size must be stable across -g, to avoid codegen
3134 differences due to debug insns, and not be affected by
3135 -fmin-insn-uid, to avoid excessive table size and to simplify
3136 debugging of -fcompare-debug failures. */
3137 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3138 n
-= cur_debug_insn_uid
;
3140 n
-= MIN_NONDEBUG_INSN_UID
;
3146 /* Return the next insn. If it is a SEQUENCE, return the first insn
3150 next_insn (rtx insn
)
3154 insn
= NEXT_INSN (insn
);
3155 if (insn
&& NONJUMP_INSN_P (insn
)
3156 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3157 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3163 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3167 previous_insn (rtx insn
)
3171 insn
= PREV_INSN (insn
);
3172 if (insn
&& NONJUMP_INSN_P (insn
)
3173 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3174 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3180 /* Return the next insn after INSN that is not a NOTE. This routine does not
3181 look inside SEQUENCEs. */
3184 next_nonnote_insn (rtx insn
)
3188 insn
= NEXT_INSN (insn
);
3189 if (insn
== 0 || !NOTE_P (insn
))
3196 /* Return the next insn after INSN that is not a NOTE, but stop the
3197 search before we enter another basic block. This routine does not
3198 look inside SEQUENCEs. */
3201 next_nonnote_insn_bb (rtx insn
)
3205 insn
= NEXT_INSN (insn
);
3206 if (insn
== 0 || !NOTE_P (insn
))
3208 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3215 /* Return the previous insn before INSN that is not a NOTE. This routine does
3216 not look inside SEQUENCEs. */
3219 prev_nonnote_insn (rtx insn
)
3223 insn
= PREV_INSN (insn
);
3224 if (insn
== 0 || !NOTE_P (insn
))
3231 /* Return the previous insn before INSN that is not a NOTE, but stop
3232 the search before we enter another basic block. This routine does
3233 not look inside SEQUENCEs. */
3236 prev_nonnote_insn_bb (rtx insn
)
3240 insn
= PREV_INSN (insn
);
3241 if (insn
== 0 || !NOTE_P (insn
))
3243 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3250 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3251 routine does not look inside SEQUENCEs. */
3254 next_nondebug_insn (rtx insn
)
3258 insn
= NEXT_INSN (insn
);
3259 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3266 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3267 This routine does not look inside SEQUENCEs. */
3270 prev_nondebug_insn (rtx insn
)
3274 insn
= PREV_INSN (insn
);
3275 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3282 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3283 This routine does not look inside SEQUENCEs. */
3286 next_nonnote_nondebug_insn (rtx insn
)
3290 insn
= NEXT_INSN (insn
);
3291 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3298 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3299 This routine does not look inside SEQUENCEs. */
3302 prev_nonnote_nondebug_insn (rtx insn
)
3306 insn
= PREV_INSN (insn
);
3307 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3314 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3315 or 0, if there is none. This routine does not look inside
3319 next_real_insn (rtx insn
)
3323 insn
= NEXT_INSN (insn
);
3324 if (insn
== 0 || INSN_P (insn
))
3331 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3332 or 0, if there is none. This routine does not look inside
3336 prev_real_insn (rtx insn
)
3340 insn
= PREV_INSN (insn
);
3341 if (insn
== 0 || INSN_P (insn
))
3348 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3349 This routine does not look inside SEQUENCEs. */
3352 last_call_insn (void)
3356 for (insn
= get_last_insn ();
3357 insn
&& !CALL_P (insn
);
3358 insn
= PREV_INSN (insn
))
3364 /* Find the next insn after INSN that really does something. This routine
3365 does not look inside SEQUENCEs. After reload this also skips over
3366 standalone USE and CLOBBER insn. */
3369 active_insn_p (const_rtx insn
)
3371 return (CALL_P (insn
) || JUMP_P (insn
)
3372 || JUMP_TABLE_DATA_P (insn
) /* FIXME */
3373 || (NONJUMP_INSN_P (insn
)
3374 && (! reload_completed
3375 || (GET_CODE (PATTERN (insn
)) != USE
3376 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3380 next_active_insn (rtx insn
)
3384 insn
= NEXT_INSN (insn
);
3385 if (insn
== 0 || active_insn_p (insn
))
3392 /* Find the last insn before INSN that really does something. This routine
3393 does not look inside SEQUENCEs. After reload this also skips over
3394 standalone USE and CLOBBER insn. */
3397 prev_active_insn (rtx insn
)
3401 insn
= PREV_INSN (insn
);
3402 if (insn
== 0 || active_insn_p (insn
))
3410 /* Return the next insn that uses CC0 after INSN, which is assumed to
3411 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3412 applied to the result of this function should yield INSN).
3414 Normally, this is simply the next insn. However, if a REG_CC_USER note
3415 is present, it contains the insn that uses CC0.
3417 Return 0 if we can't find the insn. */
3420 next_cc0_user (rtx insn
)
3422 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3425 return XEXP (note
, 0);
3427 insn
= next_nonnote_insn (insn
);
3428 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3429 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3431 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3437 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3438 note, it is the previous insn. */
3441 prev_cc0_setter (rtx insn
)
3443 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3446 return XEXP (note
, 0);
3448 insn
= prev_nonnote_insn (insn
);
3449 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3456 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3459 find_auto_inc (rtx
*xp
, void *data
)
3462 rtx reg
= (rtx
) data
;
3464 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3467 switch (GET_CODE (x
))
3475 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3486 /* Increment the label uses for all labels present in rtx. */
3489 mark_label_nuses (rtx x
)
3495 code
= GET_CODE (x
);
3496 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3497 LABEL_NUSES (XEXP (x
, 0))++;
3499 fmt
= GET_RTX_FORMAT (code
);
3500 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3503 mark_label_nuses (XEXP (x
, i
));
3504 else if (fmt
[i
] == 'E')
3505 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3506 mark_label_nuses (XVECEXP (x
, i
, j
));
3511 /* Try splitting insns that can be split for better scheduling.
3512 PAT is the pattern which might split.
3513 TRIAL is the insn providing PAT.
3514 LAST is nonzero if we should return the last insn of the sequence produced.
3516 If this routine succeeds in splitting, it returns the first or last
3517 replacement insn depending on the value of LAST. Otherwise, it
3518 returns TRIAL. If the insn to be returned can be split, it will be. */
3521 try_split (rtx pat
, rtx trial
, int last
)
3523 rtx before
= PREV_INSN (trial
);
3524 rtx after
= NEXT_INSN (trial
);
3525 int has_barrier
= 0;
3528 rtx insn_last
, insn
;
3530 rtx call_insn
= NULL_RTX
;
3532 /* We're not good at redistributing frame information. */
3533 if (RTX_FRAME_RELATED_P (trial
))
3536 if (any_condjump_p (trial
)
3537 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3538 split_branch_probability
= XINT (note
, 0);
3539 probability
= split_branch_probability
;
3541 seq
= split_insns (pat
, trial
);
3543 split_branch_probability
= -1;
3545 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3546 We may need to handle this specially. */
3547 if (after
&& BARRIER_P (after
))
3550 after
= NEXT_INSN (after
);
3556 /* Avoid infinite loop if any insn of the result matches
3557 the original pattern. */
3561 if (INSN_P (insn_last
)
3562 && rtx_equal_p (PATTERN (insn_last
), pat
))
3564 if (!NEXT_INSN (insn_last
))
3566 insn_last
= NEXT_INSN (insn_last
);
3569 /* We will be adding the new sequence to the function. The splitters
3570 may have introduced invalid RTL sharing, so unshare the sequence now. */
3571 unshare_all_rtl_in_chain (seq
);
3574 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3578 mark_jump_label (PATTERN (insn
), insn
, 0);
3580 if (probability
!= -1
3581 && any_condjump_p (insn
)
3582 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3584 /* We can preserve the REG_BR_PROB notes only if exactly
3585 one jump is created, otherwise the machine description
3586 is responsible for this step using
3587 split_branch_probability variable. */
3588 gcc_assert (njumps
== 1);
3589 add_int_reg_note (insn
, REG_BR_PROB
, probability
);
3594 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3595 in SEQ and copy any additional information across. */
3598 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3603 gcc_assert (call_insn
== NULL_RTX
);
3606 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3607 target may have explicitly specified. */
3608 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3611 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3613 /* If the old call was a sibling call, the new one must
3615 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3617 /* If the new call is the last instruction in the sequence,
3618 it will effectively replace the old call in-situ. Otherwise
3619 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3620 so that it comes immediately after the new call. */
3621 if (NEXT_INSN (insn
))
3622 for (next
= NEXT_INSN (trial
);
3623 next
&& NOTE_P (next
);
3624 next
= NEXT_INSN (next
))
3625 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3628 add_insn_after (next
, insn
, NULL
);
3634 /* Copy notes, particularly those related to the CFG. */
3635 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3637 switch (REG_NOTE_KIND (note
))
3640 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3646 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3649 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3653 case REG_NON_LOCAL_GOTO
:
3654 case REG_CROSSING_JUMP
:
3655 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3658 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3664 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3666 rtx reg
= XEXP (note
, 0);
3667 if (!FIND_REG_INC_NOTE (insn
, reg
)
3668 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3669 add_reg_note (insn
, REG_INC
, reg
);
3675 fixup_args_size_notes (NULL_RTX
, insn_last
, INTVAL (XEXP (note
, 0)));
3679 gcc_assert (call_insn
!= NULL_RTX
);
3680 add_reg_note (call_insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3688 /* If there are LABELS inside the split insns increment the
3689 usage count so we don't delete the label. */
3693 while (insn
!= NULL_RTX
)
3695 /* JUMP_P insns have already been "marked" above. */
3696 if (NONJUMP_INSN_P (insn
))
3697 mark_label_nuses (PATTERN (insn
));
3699 insn
= PREV_INSN (insn
);
3703 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3705 delete_insn (trial
);
3707 emit_barrier_after (tem
);
3709 /* Recursively call try_split for each new insn created; by the
3710 time control returns here that insn will be fully split, so
3711 set LAST and continue from the insn after the one returned.
3712 We can't use next_active_insn here since AFTER may be a note.
3713 Ignore deleted insns, which can be occur if not optimizing. */
3714 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3715 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3716 tem
= try_split (PATTERN (tem
), tem
, 1);
3718 /* Return either the first or the last insn, depending on which was
3721 ? (after
? PREV_INSN (after
) : get_last_insn ())
3722 : NEXT_INSN (before
);
3725 /* Make and return an INSN rtx, initializing all its slots.
3726 Store PATTERN in the pattern slots. */
3729 make_insn_raw (rtx pattern
)
3733 insn
= rtx_alloc (INSN
);
3735 INSN_UID (insn
) = cur_insn_uid
++;
3736 PATTERN (insn
) = pattern
;
3737 INSN_CODE (insn
) = -1;
3738 REG_NOTES (insn
) = NULL
;
3739 INSN_LOCATION (insn
) = curr_insn_location ();
3740 BLOCK_FOR_INSN (insn
) = NULL
;
3742 #ifdef ENABLE_RTL_CHECKING
3745 && (returnjump_p (insn
)
3746 || (GET_CODE (insn
) == SET
3747 && SET_DEST (insn
) == pc_rtx
)))
3749 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3757 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3760 make_debug_insn_raw (rtx pattern
)
3764 insn
= rtx_alloc (DEBUG_INSN
);
3765 INSN_UID (insn
) = cur_debug_insn_uid
++;
3766 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3767 INSN_UID (insn
) = cur_insn_uid
++;
3769 PATTERN (insn
) = pattern
;
3770 INSN_CODE (insn
) = -1;
3771 REG_NOTES (insn
) = NULL
;
3772 INSN_LOCATION (insn
) = curr_insn_location ();
3773 BLOCK_FOR_INSN (insn
) = NULL
;
3778 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3781 make_jump_insn_raw (rtx pattern
)
3785 insn
= rtx_alloc (JUMP_INSN
);
3786 INSN_UID (insn
) = cur_insn_uid
++;
3788 PATTERN (insn
) = pattern
;
3789 INSN_CODE (insn
) = -1;
3790 REG_NOTES (insn
) = NULL
;
3791 JUMP_LABEL (insn
) = NULL
;
3792 INSN_LOCATION (insn
) = curr_insn_location ();
3793 BLOCK_FOR_INSN (insn
) = NULL
;
3798 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3801 make_call_insn_raw (rtx pattern
)
3805 insn
= rtx_alloc (CALL_INSN
);
3806 INSN_UID (insn
) = cur_insn_uid
++;
3808 PATTERN (insn
) = pattern
;
3809 INSN_CODE (insn
) = -1;
3810 REG_NOTES (insn
) = NULL
;
3811 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3812 INSN_LOCATION (insn
) = curr_insn_location ();
3813 BLOCK_FOR_INSN (insn
) = NULL
;
3818 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3821 make_note_raw (enum insn_note subtype
)
3823 /* Some notes are never created this way at all. These notes are
3824 only created by patching out insns. */
3825 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3826 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3828 rtx note
= rtx_alloc (NOTE
);
3829 INSN_UID (note
) = cur_insn_uid
++;
3830 NOTE_KIND (note
) = subtype
;
3831 BLOCK_FOR_INSN (note
) = NULL
;
3832 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3836 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3837 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3838 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3841 link_insn_into_chain (rtx insn
, rtx prev
, rtx next
)
3843 PREV_INSN (insn
) = prev
;
3844 NEXT_INSN (insn
) = next
;
3847 NEXT_INSN (prev
) = insn
;
3848 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3850 rtx sequence
= PATTERN (prev
);
3851 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3856 PREV_INSN (next
) = insn
;
3857 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3858 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3861 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3863 rtx sequence
= PATTERN (insn
);
3864 PREV_INSN (XVECEXP (sequence
, 0, 0)) = prev
;
3865 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3869 /* Add INSN to the end of the doubly-linked list.
3870 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3875 rtx prev
= get_last_insn ();
3876 link_insn_into_chain (insn
, prev
, NULL
);
3877 if (NULL
== get_insns ())
3878 set_first_insn (insn
);
3879 set_last_insn (insn
);
3882 /* Add INSN into the doubly-linked list after insn AFTER. */
3885 add_insn_after_nobb (rtx insn
, rtx after
)
3887 rtx next
= NEXT_INSN (after
);
3889 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3891 link_insn_into_chain (insn
, after
, next
);
3895 if (get_last_insn () == after
)
3896 set_last_insn (insn
);
3899 struct sequence_stack
*stack
= seq_stack
;
3900 /* Scan all pending sequences too. */
3901 for (; stack
; stack
= stack
->next
)
3902 if (after
== stack
->last
)
3911 /* Add INSN into the doubly-linked list before insn BEFORE. */
3914 add_insn_before_nobb (rtx insn
, rtx before
)
3916 rtx prev
= PREV_INSN (before
);
3918 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3920 link_insn_into_chain (insn
, prev
, before
);
3924 if (get_insns () == before
)
3925 set_first_insn (insn
);
3928 struct sequence_stack
*stack
= seq_stack
;
3929 /* Scan all pending sequences too. */
3930 for (; stack
; stack
= stack
->next
)
3931 if (before
== stack
->first
)
3933 stack
->first
= insn
;
3942 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
3943 If BB is NULL, an attempt is made to infer the bb from before.
3945 This and the next function should be the only functions called
3946 to insert an insn once delay slots have been filled since only
3947 they know how to update a SEQUENCE. */
3950 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3952 add_insn_after_nobb (insn
, after
);
3953 if (!BARRIER_P (after
)
3954 && !BARRIER_P (insn
)
3955 && (bb
= BLOCK_FOR_INSN (after
)))
3957 set_block_for_insn (insn
, bb
);
3959 df_insn_rescan (insn
);
3960 /* Should not happen as first in the BB is always
3961 either NOTE or LABEL. */
3962 if (BB_END (bb
) == after
3963 /* Avoid clobbering of structure when creating new BB. */
3964 && !BARRIER_P (insn
)
3965 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3970 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
3971 If BB is NULL, an attempt is made to infer the bb from before.
3973 This and the previous function should be the only functions called
3974 to insert an insn once delay slots have been filled since only
3975 they know how to update a SEQUENCE. */
3978 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
3980 add_insn_before_nobb (insn
, before
);
3983 && !BARRIER_P (before
)
3984 && !BARRIER_P (insn
))
3985 bb
= BLOCK_FOR_INSN (before
);
3989 set_block_for_insn (insn
, bb
);
3991 df_insn_rescan (insn
);
3992 /* Should not happen as first in the BB is always either NOTE or
3994 gcc_assert (BB_HEAD (bb
) != insn
3995 /* Avoid clobbering of structure when creating new BB. */
3997 || NOTE_INSN_BASIC_BLOCK_P (insn
));
4001 /* Replace insn with an deleted instruction note. */
4004 set_insn_deleted (rtx insn
)
4007 df_insn_delete (insn
);
4008 PUT_CODE (insn
, NOTE
);
4009 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
4013 /* Unlink INSN from the insn chain.
4015 This function knows how to handle sequences.
4017 This function does not invalidate data flow information associated with
4018 INSN (i.e. does not call df_insn_delete). That makes this function
4019 usable for only disconnecting an insn from the chain, and re-emit it
4022 To later insert INSN elsewhere in the insn chain via add_insn and
4023 similar functions, PREV_INSN and NEXT_INSN must be nullified by
4024 the caller. Nullifying them here breaks many insn chain walks.
4026 To really delete an insn and related DF information, use delete_insn. */
4029 remove_insn (rtx insn
)
4031 rtx next
= NEXT_INSN (insn
);
4032 rtx prev
= PREV_INSN (insn
);
4037 NEXT_INSN (prev
) = next
;
4038 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
4040 rtx sequence
= PATTERN (prev
);
4041 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
4044 else if (get_insns () == insn
)
4047 PREV_INSN (next
) = NULL
;
4048 set_first_insn (next
);
4052 struct sequence_stack
*stack
= seq_stack
;
4053 /* Scan all pending sequences too. */
4054 for (; stack
; stack
= stack
->next
)
4055 if (insn
== stack
->first
)
4057 stack
->first
= next
;
4066 PREV_INSN (next
) = prev
;
4067 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
4068 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
4070 else if (get_last_insn () == insn
)
4071 set_last_insn (prev
);
4074 struct sequence_stack
*stack
= seq_stack
;
4075 /* Scan all pending sequences too. */
4076 for (; stack
; stack
= stack
->next
)
4077 if (insn
== stack
->last
)
4086 /* Fix up basic block boundaries, if necessary. */
4087 if (!BARRIER_P (insn
)
4088 && (bb
= BLOCK_FOR_INSN (insn
)))
4090 if (BB_HEAD (bb
) == insn
)
4092 /* Never ever delete the basic block note without deleting whole
4094 gcc_assert (!NOTE_P (insn
));
4095 BB_HEAD (bb
) = next
;
4097 if (BB_END (bb
) == insn
)
4102 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4105 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4107 gcc_assert (call_insn
&& CALL_P (call_insn
));
4109 /* Put the register usage information on the CALL. If there is already
4110 some usage information, put ours at the end. */
4111 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4115 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4116 link
= XEXP (link
, 1))
4119 XEXP (link
, 1) = call_fusage
;
4122 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4125 /* Delete all insns made since FROM.
4126 FROM becomes the new last instruction. */
4129 delete_insns_since (rtx from
)
4134 NEXT_INSN (from
) = 0;
4135 set_last_insn (from
);
4138 /* This function is deprecated, please use sequences instead.
4140 Move a consecutive bunch of insns to a different place in the chain.
4141 The insns to be moved are those between FROM and TO.
4142 They are moved to a new position after the insn AFTER.
4143 AFTER must not be FROM or TO or any insn in between.
4145 This function does not know about SEQUENCEs and hence should not be
4146 called after delay-slot filling has been done. */
4149 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
4151 #ifdef ENABLE_CHECKING
4153 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4154 gcc_assert (after
!= x
);
4155 gcc_assert (after
!= to
);
4158 /* Splice this bunch out of where it is now. */
4159 if (PREV_INSN (from
))
4160 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4162 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4163 if (get_last_insn () == to
)
4164 set_last_insn (PREV_INSN (from
));
4165 if (get_insns () == from
)
4166 set_first_insn (NEXT_INSN (to
));
4168 /* Make the new neighbors point to it and it to them. */
4169 if (NEXT_INSN (after
))
4170 PREV_INSN (NEXT_INSN (after
)) = to
;
4172 NEXT_INSN (to
) = NEXT_INSN (after
);
4173 PREV_INSN (from
) = after
;
4174 NEXT_INSN (after
) = from
;
4175 if (after
== get_last_insn ())
4179 /* Same as function above, but take care to update BB boundaries. */
4181 reorder_insns (rtx from
, rtx to
, rtx after
)
4183 rtx prev
= PREV_INSN (from
);
4184 basic_block bb
, bb2
;
4186 reorder_insns_nobb (from
, to
, after
);
4188 if (!BARRIER_P (after
)
4189 && (bb
= BLOCK_FOR_INSN (after
)))
4192 df_set_bb_dirty (bb
);
4194 if (!BARRIER_P (from
)
4195 && (bb2
= BLOCK_FOR_INSN (from
)))
4197 if (BB_END (bb2
) == to
)
4198 BB_END (bb2
) = prev
;
4199 df_set_bb_dirty (bb2
);
4202 if (BB_END (bb
) == after
)
4205 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4207 df_insn_change_bb (x
, bb
);
4212 /* Emit insn(s) of given code and pattern
4213 at a specified place within the doubly-linked list.
4215 All of the emit_foo global entry points accept an object
4216 X which is either an insn list or a PATTERN of a single
4219 There are thus a few canonical ways to generate code and
4220 emit it at a specific place in the instruction stream. For
4221 example, consider the instruction named SPOT and the fact that
4222 we would like to emit some instructions before SPOT. We might
4226 ... emit the new instructions ...
4227 insns_head = get_insns ();
4230 emit_insn_before (insns_head, SPOT);
4232 It used to be common to generate SEQUENCE rtl instead, but that
4233 is a relic of the past which no longer occurs. The reason is that
4234 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4235 generated would almost certainly die right after it was created. */
4238 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4239 rtx (*make_raw
) (rtx
))
4243 gcc_assert (before
);
4248 switch (GET_CODE (x
))
4260 rtx next
= NEXT_INSN (insn
);
4261 add_insn_before (insn
, before
, bb
);
4267 #ifdef ENABLE_RTL_CHECKING
4274 last
= (*make_raw
) (x
);
4275 add_insn_before (last
, before
, bb
);
4282 /* Make X be output before the instruction BEFORE. */
4285 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
4287 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4290 /* Make an instruction with body X and code JUMP_INSN
4291 and output it before the instruction BEFORE. */
4294 emit_jump_insn_before_noloc (rtx x
, rtx before
)
4296 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4297 make_jump_insn_raw
);
4300 /* Make an instruction with body X and code CALL_INSN
4301 and output it before the instruction BEFORE. */
4304 emit_call_insn_before_noloc (rtx x
, rtx before
)
4306 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4307 make_call_insn_raw
);
4310 /* Make an instruction with body X and code DEBUG_INSN
4311 and output it before the instruction BEFORE. */
4314 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4316 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4317 make_debug_insn_raw
);
4320 /* Make an insn of code BARRIER
4321 and output it before the insn BEFORE. */
4324 emit_barrier_before (rtx before
)
4326 rtx insn
= rtx_alloc (BARRIER
);
4328 INSN_UID (insn
) = cur_insn_uid
++;
4330 add_insn_before (insn
, before
, NULL
);
4334 /* Emit the label LABEL before the insn BEFORE. */
4337 emit_label_before (rtx label
, rtx before
)
4339 gcc_checking_assert (INSN_UID (label
) == 0);
4340 INSN_UID (label
) = cur_insn_uid
++;
4341 add_insn_before (label
, before
, NULL
);
4345 /* Helper for emit_insn_after, handles lists of instructions
4349 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
4353 if (!bb
&& !BARRIER_P (after
))
4354 bb
= BLOCK_FOR_INSN (after
);
4358 df_set_bb_dirty (bb
);
4359 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4360 if (!BARRIER_P (last
))
4362 set_block_for_insn (last
, bb
);
4363 df_insn_rescan (last
);
4365 if (!BARRIER_P (last
))
4367 set_block_for_insn (last
, bb
);
4368 df_insn_rescan (last
);
4370 if (BB_END (bb
) == after
)
4374 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4377 after_after
= NEXT_INSN (after
);
4379 NEXT_INSN (after
) = first
;
4380 PREV_INSN (first
) = after
;
4381 NEXT_INSN (last
) = after_after
;
4383 PREV_INSN (after_after
) = last
;
4385 if (after
== get_last_insn ())
4386 set_last_insn (last
);
4392 emit_pattern_after_noloc (rtx x
, rtx after
, basic_block bb
,
4393 rtx (*make_raw
)(rtx
))
4402 switch (GET_CODE (x
))
4411 last
= emit_insn_after_1 (x
, after
, bb
);
4414 #ifdef ENABLE_RTL_CHECKING
4421 last
= (*make_raw
) (x
);
4422 add_insn_after (last
, after
, bb
);
4429 /* Make X be output after the insn AFTER and set the BB of insn. If
4430 BB is NULL, an attempt is made to infer the BB from AFTER. */
4433 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4435 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4439 /* Make an insn of code JUMP_INSN with body X
4440 and output it after the insn AFTER. */
4443 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4445 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4448 /* Make an instruction with body X and code CALL_INSN
4449 and output it after the instruction AFTER. */
4452 emit_call_insn_after_noloc (rtx x
, rtx after
)
4454 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4457 /* Make an instruction with body X and code CALL_INSN
4458 and output it after the instruction AFTER. */
4461 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4463 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4466 /* Make an insn of code BARRIER
4467 and output it after the insn AFTER. */
4470 emit_barrier_after (rtx after
)
4472 rtx insn
= rtx_alloc (BARRIER
);
4474 INSN_UID (insn
) = cur_insn_uid
++;
4476 add_insn_after (insn
, after
, NULL
);
4480 /* Emit the label LABEL after the insn AFTER. */
4483 emit_label_after (rtx label
, rtx after
)
4485 gcc_checking_assert (INSN_UID (label
) == 0);
4486 INSN_UID (label
) = cur_insn_uid
++;
4487 add_insn_after (label
, after
, NULL
);
4491 /* Notes require a bit of special handling: Some notes need to have their
4492 BLOCK_FOR_INSN set, others should never have it set, and some should
4493 have it set or clear depending on the context. */
4495 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4496 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4497 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4500 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4504 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4505 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4508 /* Notes for var tracking and EH region markers can appear between or
4509 inside basic blocks. If the caller is emitting on the basic block
4510 boundary, do not set BLOCK_FOR_INSN on the new note. */
4511 case NOTE_INSN_VAR_LOCATION
:
4512 case NOTE_INSN_CALL_ARG_LOCATION
:
4513 case NOTE_INSN_EH_REGION_BEG
:
4514 case NOTE_INSN_EH_REGION_END
:
4515 return on_bb_boundary_p
;
4517 /* Otherwise, BLOCK_FOR_INSN must be set. */
4523 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4526 emit_note_after (enum insn_note subtype
, rtx after
)
4528 rtx note
= make_note_raw (subtype
);
4529 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4530 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4532 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4533 add_insn_after_nobb (note
, after
);
4535 add_insn_after (note
, after
, bb
);
4539 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4542 emit_note_before (enum insn_note subtype
, rtx before
)
4544 rtx note
= make_note_raw (subtype
);
4545 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4546 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4548 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4549 add_insn_before_nobb (note
, before
);
4551 add_insn_before (note
, before
, bb
);
4555 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4556 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4559 emit_pattern_after_setloc (rtx pattern
, rtx after
, int loc
,
4560 rtx (*make_raw
) (rtx
))
4562 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4564 if (pattern
== NULL_RTX
|| !loc
)
4567 after
= NEXT_INSN (after
);
4570 if (active_insn_p (after
) && !INSN_LOCATION (after
))
4571 INSN_LOCATION (after
) = loc
;
4574 after
= NEXT_INSN (after
);
4579 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4580 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4584 emit_pattern_after (rtx pattern
, rtx after
, bool skip_debug_insns
,
4585 rtx (*make_raw
) (rtx
))
4589 if (skip_debug_insns
)
4590 while (DEBUG_INSN_P (prev
))
4591 prev
= PREV_INSN (prev
);
4594 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4597 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4600 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4602 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4604 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4607 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4609 emit_insn_after (rtx pattern
, rtx after
)
4611 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4614 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4616 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4618 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4621 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4623 emit_jump_insn_after (rtx pattern
, rtx after
)
4625 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4628 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4630 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4632 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4635 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4637 emit_call_insn_after (rtx pattern
, rtx after
)
4639 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4642 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4644 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4646 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4649 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4651 emit_debug_insn_after (rtx pattern
, rtx after
)
4653 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4656 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4657 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4658 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4662 emit_pattern_before_setloc (rtx pattern
, rtx before
, int loc
, bool insnp
,
4663 rtx (*make_raw
) (rtx
))
4665 rtx first
= PREV_INSN (before
);
4666 rtx last
= emit_pattern_before_noloc (pattern
, before
,
4667 insnp
? before
: NULL_RTX
,
4670 if (pattern
== NULL_RTX
|| !loc
)
4674 first
= get_insns ();
4676 first
= NEXT_INSN (first
);
4679 if (active_insn_p (first
) && !INSN_LOCATION (first
))
4680 INSN_LOCATION (first
) = loc
;
4683 first
= NEXT_INSN (first
);
4688 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4689 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4690 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4691 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4694 emit_pattern_before (rtx pattern
, rtx before
, bool skip_debug_insns
,
4695 bool insnp
, rtx (*make_raw
) (rtx
))
4699 if (skip_debug_insns
)
4700 while (DEBUG_INSN_P (next
))
4701 next
= PREV_INSN (next
);
4704 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4707 return emit_pattern_before_noloc (pattern
, before
,
4708 insnp
? before
: NULL_RTX
,
4712 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4714 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4716 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4720 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4722 emit_insn_before (rtx pattern
, rtx before
)
4724 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4727 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4729 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4731 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4732 make_jump_insn_raw
);
4735 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4737 emit_jump_insn_before (rtx pattern
, rtx before
)
4739 return emit_pattern_before (pattern
, before
, true, false,
4740 make_jump_insn_raw
);
4743 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4745 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4747 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4748 make_call_insn_raw
);
4751 /* Like emit_call_insn_before_noloc,
4752 but set insn_location according to BEFORE. */
4754 emit_call_insn_before (rtx pattern
, rtx before
)
4756 return emit_pattern_before (pattern
, before
, true, false,
4757 make_call_insn_raw
);
4760 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4762 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4764 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4765 make_debug_insn_raw
);
4768 /* Like emit_debug_insn_before_noloc,
4769 but set insn_location according to BEFORE. */
4771 emit_debug_insn_before (rtx pattern
, rtx before
)
4773 return emit_pattern_before (pattern
, before
, false, false,
4774 make_debug_insn_raw
);
4777 /* Take X and emit it at the end of the doubly-linked
4780 Returns the last insn emitted. */
4785 rtx last
= get_last_insn ();
4791 switch (GET_CODE (x
))
4803 rtx next
= NEXT_INSN (insn
);
4810 #ifdef ENABLE_RTL_CHECKING
4811 case JUMP_TABLE_DATA
:
4818 last
= make_insn_raw (x
);
4826 /* Make an insn of code DEBUG_INSN with pattern X
4827 and add it to the end of the doubly-linked list. */
4830 emit_debug_insn (rtx x
)
4832 rtx last
= get_last_insn ();
4838 switch (GET_CODE (x
))
4850 rtx next
= NEXT_INSN (insn
);
4857 #ifdef ENABLE_RTL_CHECKING
4858 case JUMP_TABLE_DATA
:
4865 last
= make_debug_insn_raw (x
);
4873 /* Make an insn of code JUMP_INSN with pattern X
4874 and add it to the end of the doubly-linked list. */
4877 emit_jump_insn (rtx x
)
4879 rtx last
= NULL_RTX
, insn
;
4881 switch (GET_CODE (x
))
4893 rtx next
= NEXT_INSN (insn
);
4900 #ifdef ENABLE_RTL_CHECKING
4901 case JUMP_TABLE_DATA
:
4908 last
= make_jump_insn_raw (x
);
4916 /* Make an insn of code CALL_INSN with pattern X
4917 and add it to the end of the doubly-linked list. */
4920 emit_call_insn (rtx x
)
4924 switch (GET_CODE (x
))
4933 insn
= emit_insn (x
);
4936 #ifdef ENABLE_RTL_CHECKING
4938 case JUMP_TABLE_DATA
:
4944 insn
= make_call_insn_raw (x
);
4952 /* Add the label LABEL to the end of the doubly-linked list. */
4955 emit_label (rtx label
)
4957 gcc_checking_assert (INSN_UID (label
) == 0);
4958 INSN_UID (label
) = cur_insn_uid
++;
4963 /* Make an insn of code JUMP_TABLE_DATA
4964 and add it to the end of the doubly-linked list. */
4967 emit_jump_table_data (rtx table
)
4969 rtx jump_table_data
= rtx_alloc (JUMP_TABLE_DATA
);
4970 INSN_UID (jump_table_data
) = cur_insn_uid
++;
4971 PATTERN (jump_table_data
) = table
;
4972 BLOCK_FOR_INSN (jump_table_data
) = NULL
;
4973 add_insn (jump_table_data
);
4974 return jump_table_data
;
4977 /* Make an insn of code BARRIER
4978 and add it to the end of the doubly-linked list. */
4983 rtx barrier
= rtx_alloc (BARRIER
);
4984 INSN_UID (barrier
) = cur_insn_uid
++;
4989 /* Emit a copy of note ORIG. */
4992 emit_note_copy (rtx orig
)
4994 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
4995 rtx note
= make_note_raw (kind
);
4996 NOTE_DATA (note
) = NOTE_DATA (orig
);
5001 /* Make an insn of code NOTE or type NOTE_NO
5002 and add it to the end of the doubly-linked list. */
5005 emit_note (enum insn_note kind
)
5007 rtx note
= make_note_raw (kind
);
5012 /* Emit a clobber of lvalue X. */
5015 emit_clobber (rtx x
)
5017 /* CONCATs should not appear in the insn stream. */
5018 if (GET_CODE (x
) == CONCAT
)
5020 emit_clobber (XEXP (x
, 0));
5021 return emit_clobber (XEXP (x
, 1));
5023 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
5026 /* Return a sequence of insns to clobber lvalue X. */
5040 /* Emit a use of rvalue X. */
5045 /* CONCATs should not appear in the insn stream. */
5046 if (GET_CODE (x
) == CONCAT
)
5048 emit_use (XEXP (x
, 0));
5049 return emit_use (XEXP (x
, 1));
5051 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
5054 /* Return a sequence of insns to use rvalue X. */
5068 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5069 note of this type already exists, remove it first. */
5072 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5074 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5080 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5081 has multiple sets (some callers assume single_set
5082 means the insn only has one set, when in fact it
5083 means the insn only has one * useful * set). */
5084 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
5090 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5091 It serves no useful purpose and breaks eliminate_regs. */
5092 if (GET_CODE (datum
) == ASM_OPERANDS
)
5097 XEXP (note
, 0) = datum
;
5098 df_notes_rescan (insn
);
5106 XEXP (note
, 0) = datum
;
5112 add_reg_note (insn
, kind
, datum
);
5118 df_notes_rescan (insn
);
5124 return REG_NOTES (insn
);
5127 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5129 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5131 rtx set
= single_set (insn
);
5133 if (set
&& SET_DEST (set
) == dst
)
5134 return set_unique_reg_note (insn
, kind
, datum
);
5138 /* Return an indication of which type of insn should have X as a body.
5139 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5141 static enum rtx_code
5142 classify_insn (rtx x
)
5146 if (GET_CODE (x
) == CALL
)
5148 if (ANY_RETURN_P (x
))
5150 if (GET_CODE (x
) == SET
)
5152 if (SET_DEST (x
) == pc_rtx
)
5154 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5159 if (GET_CODE (x
) == PARALLEL
)
5162 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5163 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5165 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5166 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5168 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5169 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5175 /* Emit the rtl pattern X as an appropriate kind of insn.
5176 If X is a label, it is simply added into the insn chain. */
5181 enum rtx_code code
= classify_insn (x
);
5186 return emit_label (x
);
5188 return emit_insn (x
);
5191 rtx insn
= emit_jump_insn (x
);
5192 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5193 return emit_barrier ();
5197 return emit_call_insn (x
);
5199 return emit_debug_insn (x
);
5205 /* Space for free sequence stack entries. */
5206 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5208 /* Begin emitting insns to a sequence. If this sequence will contain
5209 something that might cause the compiler to pop arguments to function
5210 calls (because those pops have previously been deferred; see
5211 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5212 before calling this function. That will ensure that the deferred
5213 pops are not accidentally emitted in the middle of this sequence. */
5216 start_sequence (void)
5218 struct sequence_stack
*tem
;
5220 if (free_sequence_stack
!= NULL
)
5222 tem
= free_sequence_stack
;
5223 free_sequence_stack
= tem
->next
;
5226 tem
= ggc_alloc_sequence_stack ();
5228 tem
->next
= seq_stack
;
5229 tem
->first
= get_insns ();
5230 tem
->last
= get_last_insn ();
5238 /* Set up the insn chain starting with FIRST as the current sequence,
5239 saving the previously current one. See the documentation for
5240 start_sequence for more information about how to use this function. */
5243 push_to_sequence (rtx first
)
5249 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5252 set_first_insn (first
);
5253 set_last_insn (last
);
5256 /* Like push_to_sequence, but take the last insn as an argument to avoid
5257 looping through the list. */
5260 push_to_sequence2 (rtx first
, rtx last
)
5264 set_first_insn (first
);
5265 set_last_insn (last
);
5268 /* Set up the outer-level insn chain
5269 as the current sequence, saving the previously current one. */
5272 push_topmost_sequence (void)
5274 struct sequence_stack
*stack
, *top
= NULL
;
5278 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5281 set_first_insn (top
->first
);
5282 set_last_insn (top
->last
);
5285 /* After emitting to the outer-level insn chain, update the outer-level
5286 insn chain, and restore the previous saved state. */
5289 pop_topmost_sequence (void)
5291 struct sequence_stack
*stack
, *top
= NULL
;
5293 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5296 top
->first
= get_insns ();
5297 top
->last
= get_last_insn ();
5302 /* After emitting to a sequence, restore previous saved state.
5304 To get the contents of the sequence just made, you must call
5305 `get_insns' *before* calling here.
5307 If the compiler might have deferred popping arguments while
5308 generating this sequence, and this sequence will not be immediately
5309 inserted into the instruction stream, use do_pending_stack_adjust
5310 before calling get_insns. That will ensure that the deferred
5311 pops are inserted into this sequence, and not into some random
5312 location in the instruction stream. See INHIBIT_DEFER_POP for more
5313 information about deferred popping of arguments. */
5318 struct sequence_stack
*tem
= seq_stack
;
5320 set_first_insn (tem
->first
);
5321 set_last_insn (tem
->last
);
5322 seq_stack
= tem
->next
;
5324 memset (tem
, 0, sizeof (*tem
));
5325 tem
->next
= free_sequence_stack
;
5326 free_sequence_stack
= tem
;
5329 /* Return 1 if currently emitting into a sequence. */
5332 in_sequence_p (void)
5334 return seq_stack
!= 0;
5337 /* Put the various virtual registers into REGNO_REG_RTX. */
5340 init_virtual_regs (void)
5342 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5343 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5344 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5345 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5346 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5347 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5348 = virtual_preferred_stack_boundary_rtx
;
5352 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5353 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5354 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5355 static int copy_insn_n_scratches
;
5357 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5358 copied an ASM_OPERANDS.
5359 In that case, it is the original input-operand vector. */
5360 static rtvec orig_asm_operands_vector
;
5362 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5363 copied an ASM_OPERANDS.
5364 In that case, it is the copied input-operand vector. */
5365 static rtvec copy_asm_operands_vector
;
5367 /* Likewise for the constraints vector. */
5368 static rtvec orig_asm_constraints_vector
;
5369 static rtvec copy_asm_constraints_vector
;
5371 /* Recursively create a new copy of an rtx for copy_insn.
5372 This function differs from copy_rtx in that it handles SCRATCHes and
5373 ASM_OPERANDs properly.
5374 Normally, this function is not used directly; use copy_insn as front end.
5375 However, you could first copy an insn pattern with copy_insn and then use
5376 this function afterwards to properly copy any REG_NOTEs containing
5380 copy_insn_1 (rtx orig
)
5385 const char *format_ptr
;
5390 code
= GET_CODE (orig
);
5405 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5406 clobbers or clobbers of hard registers that originated as pseudos.
5407 This is needed to allow safe register renaming. */
5408 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
5409 && ORIGINAL_REGNO (XEXP (orig
, 0)) == REGNO (XEXP (orig
, 0)))
5414 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5415 if (copy_insn_scratch_in
[i
] == orig
)
5416 return copy_insn_scratch_out
[i
];
5420 if (shared_const_p (orig
))
5424 /* A MEM with a constant address is not sharable. The problem is that
5425 the constant address may need to be reloaded. If the mem is shared,
5426 then reloading one copy of this mem will cause all copies to appear
5427 to have been reloaded. */
5433 /* Copy the various flags, fields, and other information. We assume
5434 that all fields need copying, and then clear the fields that should
5435 not be copied. That is the sensible default behavior, and forces
5436 us to explicitly document why we are *not* copying a flag. */
5437 copy
= shallow_copy_rtx (orig
);
5439 /* We do not copy the USED flag, which is used as a mark bit during
5440 walks over the RTL. */
5441 RTX_FLAG (copy
, used
) = 0;
5443 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5446 RTX_FLAG (copy
, jump
) = 0;
5447 RTX_FLAG (copy
, call
) = 0;
5448 RTX_FLAG (copy
, frame_related
) = 0;
5451 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5453 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5454 switch (*format_ptr
++)
5457 if (XEXP (orig
, i
) != NULL
)
5458 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5463 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5464 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5465 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5466 XVEC (copy
, i
) = copy_asm_operands_vector
;
5467 else if (XVEC (orig
, i
) != NULL
)
5469 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5470 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5471 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5482 /* These are left unchanged. */
5489 if (code
== SCRATCH
)
5491 i
= copy_insn_n_scratches
++;
5492 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5493 copy_insn_scratch_in
[i
] = orig
;
5494 copy_insn_scratch_out
[i
] = copy
;
5496 else if (code
== ASM_OPERANDS
)
5498 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5499 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5500 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5501 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5507 /* Create a new copy of an rtx.
5508 This function differs from copy_rtx in that it handles SCRATCHes and
5509 ASM_OPERANDs properly.
5510 INSN doesn't really have to be a full INSN; it could be just the
5513 copy_insn (rtx insn
)
5515 copy_insn_n_scratches
= 0;
5516 orig_asm_operands_vector
= 0;
5517 orig_asm_constraints_vector
= 0;
5518 copy_asm_operands_vector
= 0;
5519 copy_asm_constraints_vector
= 0;
5520 return copy_insn_1 (insn
);
5523 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5524 on that assumption that INSN itself remains in its original place. */
5527 copy_delay_slot_insn (rtx insn
)
5529 /* Copy INSN with its rtx_code, all its notes, location etc. */
5530 insn
= copy_rtx (insn
);
5531 INSN_UID (insn
) = cur_insn_uid
++;
5535 /* Initialize data structures and variables in this file
5536 before generating rtl for each function. */
5541 set_first_insn (NULL
);
5542 set_last_insn (NULL
);
5543 if (MIN_NONDEBUG_INSN_UID
)
5544 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5547 cur_debug_insn_uid
= 1;
5548 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5549 first_label_num
= label_num
;
5552 /* Init the tables that describe all the pseudo regs. */
5554 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5556 crtl
->emit
.regno_pointer_align
5557 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5559 regno_reg_rtx
= ggc_alloc_vec_rtx (crtl
->emit
.regno_pointer_align_length
);
5561 /* Put copies of all the hard registers into regno_reg_rtx. */
5562 memcpy (regno_reg_rtx
,
5563 initial_regno_reg_rtx
,
5564 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5566 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5567 init_virtual_regs ();
5569 /* Indicate that the virtual registers and stack locations are
5571 REG_POINTER (stack_pointer_rtx
) = 1;
5572 REG_POINTER (frame_pointer_rtx
) = 1;
5573 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5574 REG_POINTER (arg_pointer_rtx
) = 1;
5576 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5577 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5578 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5579 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5580 REG_POINTER (virtual_cfa_rtx
) = 1;
5582 #ifdef STACK_BOUNDARY
5583 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5584 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5585 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5586 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5588 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5589 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5590 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5591 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5592 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5595 #ifdef INIT_EXPANDERS
5600 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5603 gen_const_vector (enum machine_mode mode
, int constant
)
5608 enum machine_mode inner
;
5610 units
= GET_MODE_NUNITS (mode
);
5611 inner
= GET_MODE_INNER (mode
);
5613 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5615 v
= rtvec_alloc (units
);
5617 /* We need to call this function after we set the scalar const_tiny_rtx
5619 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5621 for (i
= 0; i
< units
; ++i
)
5622 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5624 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5628 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5629 all elements are zero, and the one vector when all elements are one. */
5631 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5633 enum machine_mode inner
= GET_MODE_INNER (mode
);
5634 int nunits
= GET_MODE_NUNITS (mode
);
5638 /* Check to see if all of the elements have the same value. */
5639 x
= RTVEC_ELT (v
, nunits
- 1);
5640 for (i
= nunits
- 2; i
>= 0; i
--)
5641 if (RTVEC_ELT (v
, i
) != x
)
5644 /* If the values are all the same, check to see if we can use one of the
5645 standard constant vectors. */
5648 if (x
== CONST0_RTX (inner
))
5649 return CONST0_RTX (mode
);
5650 else if (x
== CONST1_RTX (inner
))
5651 return CONST1_RTX (mode
);
5652 else if (x
== CONSTM1_RTX (inner
))
5653 return CONSTM1_RTX (mode
);
5656 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5659 /* Initialise global register information required by all functions. */
5662 init_emit_regs (void)
5665 enum machine_mode mode
;
5668 /* Reset register attributes */
5669 htab_empty (reg_attrs_htab
);
5671 /* We need reg_raw_mode, so initialize the modes now. */
5672 init_reg_modes_target ();
5674 /* Assign register numbers to the globally defined register rtx. */
5675 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5676 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5677 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5678 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5679 virtual_incoming_args_rtx
=
5680 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5681 virtual_stack_vars_rtx
=
5682 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5683 virtual_stack_dynamic_rtx
=
5684 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5685 virtual_outgoing_args_rtx
=
5686 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5687 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5688 virtual_preferred_stack_boundary_rtx
=
5689 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5691 /* Initialize RTL for commonly used hard registers. These are
5692 copied into regno_reg_rtx as we begin to compile each function. */
5693 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5694 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5696 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5697 return_address_pointer_rtx
5698 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5701 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5702 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5704 pic_offset_table_rtx
= NULL_RTX
;
5706 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5708 mode
= (enum machine_mode
) i
;
5709 attrs
= ggc_alloc_cleared_mem_attrs ();
5710 attrs
->align
= BITS_PER_UNIT
;
5711 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5712 if (mode
!= BLKmode
)
5714 attrs
->size_known_p
= true;
5715 attrs
->size
= GET_MODE_SIZE (mode
);
5716 if (STRICT_ALIGNMENT
)
5717 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5719 mode_mem_attrs
[i
] = attrs
;
5723 /* Create some permanent unique rtl objects shared between all functions. */
5726 init_emit_once (void)
5729 enum machine_mode mode
;
5730 enum machine_mode double_mode
;
5732 /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
5733 CONST_FIXED, and memory attribute hash tables. */
5734 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5735 const_int_htab_eq
, NULL
);
5737 #if TARGET_SUPPORTS_WIDE_INT
5738 const_wide_int_htab
= htab_create_ggc (37, const_wide_int_htab_hash
,
5739 const_wide_int_htab_eq
, NULL
);
5741 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5742 const_double_htab_eq
, NULL
);
5744 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5745 const_fixed_htab_eq
, NULL
);
5747 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5748 reg_attrs_htab_eq
, NULL
);
5750 /* Compute the word and byte modes. */
5752 byte_mode
= VOIDmode
;
5753 word_mode
= VOIDmode
;
5754 double_mode
= VOIDmode
;
5756 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5758 mode
= GET_MODE_WIDER_MODE (mode
))
5760 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5761 && byte_mode
== VOIDmode
)
5764 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5765 && word_mode
== VOIDmode
)
5769 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5771 mode
= GET_MODE_WIDER_MODE (mode
))
5773 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5774 && double_mode
== VOIDmode
)
5778 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5780 #ifdef INIT_EXPANDERS
5781 /* This is to initialize {init|mark|free}_machine_status before the first
5782 call to push_function_context_to. This is needed by the Chill front
5783 end which calls push_function_context_to before the first call to
5784 init_function_start. */
5788 /* Create the unique rtx's for certain rtx codes and operand values. */
5790 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5791 tries to use these variables. */
5792 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5793 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5794 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5796 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5797 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5798 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5800 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5802 real_from_integer (&dconst0
, double_mode
, 0, SIGNED
);
5803 real_from_integer (&dconst1
, double_mode
, 1, SIGNED
);
5804 real_from_integer (&dconst2
, double_mode
, 2, SIGNED
);
5809 dconsthalf
= dconst1
;
5810 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5812 for (i
= 0; i
< 3; i
++)
5814 const REAL_VALUE_TYPE
*const r
=
5815 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5817 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5819 mode
= GET_MODE_WIDER_MODE (mode
))
5820 const_tiny_rtx
[i
][(int) mode
] =
5821 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5823 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5825 mode
= GET_MODE_WIDER_MODE (mode
))
5826 const_tiny_rtx
[i
][(int) mode
] =
5827 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5829 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5831 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5833 mode
= GET_MODE_WIDER_MODE (mode
))
5834 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5836 for (mode
= MIN_MODE_PARTIAL_INT
;
5837 mode
<= MAX_MODE_PARTIAL_INT
;
5838 mode
= (enum machine_mode
)((int)(mode
) + 1))
5839 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5842 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5844 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5846 mode
= GET_MODE_WIDER_MODE (mode
))
5847 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5849 for (mode
= MIN_MODE_PARTIAL_INT
;
5850 mode
<= MAX_MODE_PARTIAL_INT
;
5851 mode
= (enum machine_mode
)((int)(mode
) + 1))
5852 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5854 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5856 mode
= GET_MODE_WIDER_MODE (mode
))
5858 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5859 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5862 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5864 mode
= GET_MODE_WIDER_MODE (mode
))
5866 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5867 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5870 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5872 mode
= GET_MODE_WIDER_MODE (mode
))
5874 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5875 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5876 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
5879 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5881 mode
= GET_MODE_WIDER_MODE (mode
))
5883 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5884 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5887 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5889 mode
= GET_MODE_WIDER_MODE (mode
))
5891 FCONST0 (mode
).data
.high
= 0;
5892 FCONST0 (mode
).data
.low
= 0;
5893 FCONST0 (mode
).mode
= mode
;
5894 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5895 FCONST0 (mode
), mode
);
5898 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5900 mode
= GET_MODE_WIDER_MODE (mode
))
5902 FCONST0 (mode
).data
.high
= 0;
5903 FCONST0 (mode
).data
.low
= 0;
5904 FCONST0 (mode
).mode
= mode
;
5905 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5906 FCONST0 (mode
), mode
);
5909 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5911 mode
= GET_MODE_WIDER_MODE (mode
))
5913 FCONST0 (mode
).data
.high
= 0;
5914 FCONST0 (mode
).data
.low
= 0;
5915 FCONST0 (mode
).mode
= mode
;
5916 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5917 FCONST0 (mode
), mode
);
5919 /* We store the value 1. */
5920 FCONST1 (mode
).data
.high
= 0;
5921 FCONST1 (mode
).data
.low
= 0;
5922 FCONST1 (mode
).mode
= mode
;
5924 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5925 HOST_BITS_PER_DOUBLE_INT
,
5926 SIGNED_FIXED_POINT_MODE_P (mode
));
5927 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5928 FCONST1 (mode
), mode
);
5931 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5933 mode
= GET_MODE_WIDER_MODE (mode
))
5935 FCONST0 (mode
).data
.high
= 0;
5936 FCONST0 (mode
).data
.low
= 0;
5937 FCONST0 (mode
).mode
= mode
;
5938 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5939 FCONST0 (mode
), mode
);
5941 /* We store the value 1. */
5942 FCONST1 (mode
).data
.high
= 0;
5943 FCONST1 (mode
).data
.low
= 0;
5944 FCONST1 (mode
).mode
= mode
;
5946 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5947 HOST_BITS_PER_DOUBLE_INT
,
5948 SIGNED_FIXED_POINT_MODE_P (mode
));
5949 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5950 FCONST1 (mode
), mode
);
5953 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5955 mode
= GET_MODE_WIDER_MODE (mode
))
5957 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5960 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
5962 mode
= GET_MODE_WIDER_MODE (mode
))
5964 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5967 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
5969 mode
= GET_MODE_WIDER_MODE (mode
))
5971 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5972 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5975 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
5977 mode
= GET_MODE_WIDER_MODE (mode
))
5979 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5980 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5983 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5984 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5985 const_tiny_rtx
[0][i
] = const0_rtx
;
5987 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5988 if (STORE_FLAG_VALUE
== 1)
5989 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5991 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
5992 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
5993 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
5994 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
5997 /* Produce exact duplicate of insn INSN after AFTER.
5998 Care updating of libcall regions if present. */
6001 emit_copy_of_insn_after (rtx insn
, rtx after
)
6005 switch (GET_CODE (insn
))
6008 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
6012 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
6016 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
6020 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
6021 if (CALL_INSN_FUNCTION_USAGE (insn
))
6022 CALL_INSN_FUNCTION_USAGE (new_rtx
)
6023 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
6024 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
6025 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
6026 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
6027 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
6028 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
6035 /* Update LABEL_NUSES. */
6036 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
6038 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
6040 /* If the old insn is frame related, then so is the new one. This is
6041 primarily needed for IA-64 unwind info which marks epilogue insns,
6042 which may be duplicated by the basic block reordering code. */
6043 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
6045 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6046 will make them. REG_LABEL_TARGETs are created there too, but are
6047 supposed to be sticky, so we copy them. */
6048 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
6049 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
6051 if (GET_CODE (link
) == EXPR_LIST
)
6052 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
6053 copy_insn_1 (XEXP (link
, 0)));
6055 add_shallow_copy_of_reg_note (new_rtx
, link
);
6058 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6062 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6064 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
6066 if (hard_reg_clobbers
[mode
][regno
])
6067 return hard_reg_clobbers
[mode
][regno
];
6069 return (hard_reg_clobbers
[mode
][regno
] =
6070 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6073 location_t prologue_location
;
6074 location_t epilogue_location
;
6076 /* Hold current location information and last location information, so the
6077 datastructures are built lazily only when some instructions in given
6078 place are needed. */
6079 static location_t curr_location
;
6081 /* Allocate insn location datastructure. */
6083 insn_locations_init (void)
6085 prologue_location
= epilogue_location
= 0;
6086 curr_location
= UNKNOWN_LOCATION
;
6089 /* At the end of emit stage, clear current location. */
6091 insn_locations_finalize (void)
6093 epilogue_location
= curr_location
;
6094 curr_location
= UNKNOWN_LOCATION
;
6097 /* Set current location. */
6099 set_curr_insn_location (location_t location
)
6101 curr_location
= location
;
6104 /* Get current location. */
6106 curr_insn_location (void)
6108 return curr_location
;
6111 /* Return lexical scope block insn belongs to. */
6113 insn_scope (const_rtx insn
)
6115 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6118 /* Return line number of the statement that produced this insn. */
6120 insn_line (const_rtx insn
)
6122 return LOCATION_LINE (INSN_LOCATION (insn
));
6125 /* Return source file of the statement that produced this insn. */
6127 insn_file (const_rtx insn
)
6129 return LOCATION_FILE (INSN_LOCATION (insn
));
6132 /* Return true if memory model MODEL requires a pre-operation (release-style)
6133 barrier or a post-operation (acquire-style) barrier. While not universal,
6134 this function matches behavior of several targets. */
6137 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6139 switch (model
& MEMMODEL_MASK
)
6141 case MEMMODEL_RELAXED
:
6142 case MEMMODEL_CONSUME
:
6144 case MEMMODEL_RELEASE
:
6146 case MEMMODEL_ACQUIRE
:
6148 case MEMMODEL_ACQ_REL
:
6149 case MEMMODEL_SEQ_CST
:
6156 #include "gt-emit-rtl.h"