1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
43 #include "double-int.h"
51 #include "fold-const.h"
54 #include "hard-reg-set.h"
57 #include "basic-block.h"
61 #include "stringpool.h"
63 #include "statistics.h"
64 #include "fixed-value.h"
65 #include "insn-config.h"
77 #include "langhooks.h"
84 struct target_rtl default_target_rtl
;
86 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
89 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
91 /* Commonly used modes. */
93 machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
94 machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
95 machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
96 machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
98 /* Datastructures maintained for currently processed function in RTL form. */
100 struct rtl_data x_rtl
;
102 /* Indexed by pseudo register number, gives the rtx for that pseudo.
103 Allocated in parallel with regno_pointer_align.
104 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
105 with length attribute nested in top level structures. */
109 /* This is *not* reset after each function. It gives each CODE_LABEL
110 in the entire compilation a unique label number. */
112 static GTY(()) int label_num
= 1;
114 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
115 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
116 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
117 is set only for MODE_INT and MODE_VECTOR_INT modes. */
119 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
123 REAL_VALUE_TYPE dconst0
;
124 REAL_VALUE_TYPE dconst1
;
125 REAL_VALUE_TYPE dconst2
;
126 REAL_VALUE_TYPE dconstm1
;
127 REAL_VALUE_TYPE dconsthalf
;
129 /* Record fixed-point constant 0 and 1. */
130 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
131 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
133 /* We make one copy of (const_int C) where C is in
134 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
135 to save space during the compilation and simplify comparisons of
138 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
140 /* Standard pieces of rtx, to be substituted directly into things. */
143 rtx simple_return_rtx
;
146 /* A hash table storing CONST_INTs whose absolute value is greater
147 than MAX_SAVED_CONST_INT. */
149 struct const_int_hasher
: ggc_cache_hasher
<rtx
>
151 typedef HOST_WIDE_INT compare_type
;
153 static hashval_t
hash (rtx i
);
154 static bool equal (rtx i
, HOST_WIDE_INT h
);
157 static GTY ((cache
)) hash_table
<const_int_hasher
> *const_int_htab
;
159 struct const_wide_int_hasher
: ggc_cache_hasher
<rtx
>
161 static hashval_t
hash (rtx x
);
162 static bool equal (rtx x
, rtx y
);
165 static GTY ((cache
)) hash_table
<const_wide_int_hasher
> *const_wide_int_htab
;
167 /* A hash table storing register attribute structures. */
168 struct reg_attr_hasher
: ggc_cache_hasher
<reg_attrs
*>
170 static hashval_t
hash (reg_attrs
*x
);
171 static bool equal (reg_attrs
*a
, reg_attrs
*b
);
174 static GTY ((cache
)) hash_table
<reg_attr_hasher
> *reg_attrs_htab
;
176 /* A hash table storing all CONST_DOUBLEs. */
177 struct const_double_hasher
: ggc_cache_hasher
<rtx
>
179 static hashval_t
hash (rtx x
);
180 static bool equal (rtx x
, rtx y
);
183 static GTY ((cache
)) hash_table
<const_double_hasher
> *const_double_htab
;
185 /* A hash table storing all CONST_FIXEDs. */
186 struct const_fixed_hasher
: ggc_cache_hasher
<rtx
>
188 static hashval_t
hash (rtx x
);
189 static bool equal (rtx x
, rtx y
);
192 static GTY ((cache
)) hash_table
<const_fixed_hasher
> *const_fixed_htab
;
194 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
195 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
196 #define first_label_num (crtl->emit.x_first_label_num)
198 static void set_used_decls (tree
);
199 static void mark_label_nuses (rtx
);
200 #if TARGET_SUPPORTS_WIDE_INT
201 static rtx
lookup_const_wide_int (rtx
);
203 static rtx
lookup_const_double (rtx
);
204 static rtx
lookup_const_fixed (rtx
);
205 static reg_attrs
*get_reg_attrs (tree
, int);
206 static rtx
gen_const_vector (machine_mode
, int);
207 static void copy_rtx_if_shared_1 (rtx
*orig
);
209 /* Probability of the conditional branch currently proceeded by try_split.
210 Set to -1 otherwise. */
211 int split_branch_probability
= -1;
213 /* Returns a hash code for X (which is a really a CONST_INT). */
216 const_int_hasher::hash (rtx x
)
218 return (hashval_t
) INTVAL (x
);
221 /* Returns nonzero if the value represented by X (which is really a
222 CONST_INT) is the same as that given by Y (which is really a
226 const_int_hasher::equal (rtx x
, HOST_WIDE_INT y
)
228 return (INTVAL (x
) == y
);
231 #if TARGET_SUPPORTS_WIDE_INT
232 /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
235 const_wide_int_hasher::hash (rtx x
)
238 unsigned HOST_WIDE_INT hash
= 0;
241 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
242 hash
+= CONST_WIDE_INT_ELT (xr
, i
);
244 return (hashval_t
) hash
;
247 /* Returns nonzero if the value represented by X (which is really a
248 CONST_WIDE_INT) is the same as that given by Y (which is really a
252 const_wide_int_hasher::equal (rtx x
, rtx y
)
257 if (CONST_WIDE_INT_NUNITS (xr
) != CONST_WIDE_INT_NUNITS (yr
))
260 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
261 if (CONST_WIDE_INT_ELT (xr
, i
) != CONST_WIDE_INT_ELT (yr
, i
))
268 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
270 const_double_hasher::hash (rtx x
)
272 const_rtx
const value
= x
;
275 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (value
) == VOIDmode
)
276 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
279 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
280 /* MODE is used in the comparison, so it should be in the hash. */
281 h
^= GET_MODE (value
);
286 /* Returns nonzero if the value represented by X (really a ...)
287 is the same as that represented by Y (really a ...) */
289 const_double_hasher::equal (rtx x
, rtx y
)
291 const_rtx
const a
= x
, b
= y
;
293 if (GET_MODE (a
) != GET_MODE (b
))
295 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (a
) == VOIDmode
)
296 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
297 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
299 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
300 CONST_DOUBLE_REAL_VALUE (b
));
303 /* Returns a hash code for X (which is really a CONST_FIXED). */
306 const_fixed_hasher::hash (rtx x
)
308 const_rtx
const value
= x
;
311 h
= fixed_hash (CONST_FIXED_VALUE (value
));
312 /* MODE is used in the comparison, so it should be in the hash. */
313 h
^= GET_MODE (value
);
317 /* Returns nonzero if the value represented by X is the same as that
321 const_fixed_hasher::equal (rtx x
, rtx y
)
323 const_rtx
const a
= x
, b
= y
;
325 if (GET_MODE (a
) != GET_MODE (b
))
327 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
330 /* Return true if the given memory attributes are equal. */
333 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
339 return (p
->alias
== q
->alias
340 && p
->offset_known_p
== q
->offset_known_p
341 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
342 && p
->size_known_p
== q
->size_known_p
343 && (!p
->size_known_p
|| p
->size
== q
->size
)
344 && p
->align
== q
->align
345 && p
->addrspace
== q
->addrspace
346 && (p
->expr
== q
->expr
347 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
348 && operand_equal_p (p
->expr
, q
->expr
, 0))));
351 /* Set MEM's memory attributes so that they are the same as ATTRS. */
354 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
356 /* If everything is the default, we can just clear the attributes. */
357 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
364 || !mem_attrs_eq_p (attrs
, MEM_ATTRS (mem
)))
366 MEM_ATTRS (mem
) = ggc_alloc
<mem_attrs
> ();
367 memcpy (MEM_ATTRS (mem
), attrs
, sizeof (mem_attrs
));
371 /* Returns a hash code for X (which is a really a reg_attrs *). */
374 reg_attr_hasher::hash (reg_attrs
*x
)
376 const reg_attrs
*const p
= x
;
378 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
381 /* Returns nonzero if the value represented by X is the same as that given by
385 reg_attr_hasher::equal (reg_attrs
*x
, reg_attrs
*y
)
387 const reg_attrs
*const p
= x
;
388 const reg_attrs
*const q
= y
;
390 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
392 /* Allocate a new reg_attrs structure and insert it into the hash table if
393 one identical to it is not already in the table. We are doing this for
397 get_reg_attrs (tree decl
, int offset
)
401 /* If everything is the default, we can just return zero. */
402 if (decl
== 0 && offset
== 0)
406 attrs
.offset
= offset
;
408 reg_attrs
**slot
= reg_attrs_htab
->find_slot (&attrs
, INSERT
);
411 *slot
= ggc_alloc
<reg_attrs
> ();
412 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
420 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
421 and to block register equivalences to be seen across this insn. */
426 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
427 MEM_VOLATILE_P (x
) = true;
433 /* Set the mode and register number of X to MODE and REGNO. */
436 set_mode_and_regno (rtx x
, machine_mode mode
, unsigned int regno
)
438 PUT_MODE_RAW (x
, mode
);
439 SET_REGNO_RAW (x
, regno
);
442 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
443 don't attempt to share with the various global pieces of rtl (such as
444 frame_pointer_rtx). */
447 gen_raw_REG (machine_mode mode
, unsigned int regno
)
449 rtx x
= rtx_alloc_stat (REG PASS_MEM_STAT
);
450 set_mode_and_regno (x
, mode
, regno
);
451 REG_ATTRS (x
) = NULL
;
452 ORIGINAL_REGNO (x
) = regno
;
456 /* There are some RTL codes that require special attention; the generation
457 functions do the raw handling. If you add to this list, modify
458 special_rtx in gengenrtl.c as well. */
461 gen_rtx_EXPR_LIST (machine_mode mode
, rtx expr
, rtx expr_list
)
463 return as_a
<rtx_expr_list
*> (gen_rtx_fmt_ee (EXPR_LIST
, mode
, expr
,
468 gen_rtx_INSN_LIST (machine_mode mode
, rtx insn
, rtx insn_list
)
470 return as_a
<rtx_insn_list
*> (gen_rtx_fmt_ue (INSN_LIST
, mode
, insn
,
475 gen_rtx_INSN (machine_mode mode
, rtx_insn
*prev_insn
, rtx_insn
*next_insn
,
476 basic_block bb
, rtx pattern
, int location
, int code
,
479 return as_a
<rtx_insn
*> (gen_rtx_fmt_uuBeiie (INSN
, mode
,
480 prev_insn
, next_insn
,
481 bb
, pattern
, location
, code
,
486 gen_rtx_CONST_INT (machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
488 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
489 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
491 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
492 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
493 return const_true_rtx
;
496 /* Look up the CONST_INT in the hash table. */
497 rtx
*slot
= const_int_htab
->find_slot_with_hash (arg
, (hashval_t
) arg
,
500 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
506 gen_int_mode (HOST_WIDE_INT c
, machine_mode mode
)
508 return GEN_INT (trunc_int_for_mode (c
, mode
));
511 /* CONST_DOUBLEs might be created from pairs of integers, or from
512 REAL_VALUE_TYPEs. Also, their length is known only at run time,
513 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
515 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
516 hash table. If so, return its counterpart; otherwise add it
517 to the hash table and return it. */
519 lookup_const_double (rtx real
)
521 rtx
*slot
= const_double_htab
->find_slot (real
, INSERT
);
528 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
529 VALUE in mode MODE. */
531 const_double_from_real_value (REAL_VALUE_TYPE value
, machine_mode mode
)
533 rtx real
= rtx_alloc (CONST_DOUBLE
);
534 PUT_MODE (real
, mode
);
538 return lookup_const_double (real
);
541 /* Determine whether FIXED, a CONST_FIXED, already exists in the
542 hash table. If so, return its counterpart; otherwise add it
543 to the hash table and return it. */
546 lookup_const_fixed (rtx fixed
)
548 rtx
*slot
= const_fixed_htab
->find_slot (fixed
, INSERT
);
555 /* Return a CONST_FIXED rtx for a fixed-point value specified by
556 VALUE in mode MODE. */
559 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, machine_mode mode
)
561 rtx fixed
= rtx_alloc (CONST_FIXED
);
562 PUT_MODE (fixed
, mode
);
566 return lookup_const_fixed (fixed
);
569 #if TARGET_SUPPORTS_WIDE_INT == 0
570 /* Constructs double_int from rtx CST. */
573 rtx_to_double_int (const_rtx cst
)
577 if (CONST_INT_P (cst
))
578 r
= double_int::from_shwi (INTVAL (cst
));
579 else if (CONST_DOUBLE_AS_INT_P (cst
))
581 r
.low
= CONST_DOUBLE_LOW (cst
);
582 r
.high
= CONST_DOUBLE_HIGH (cst
);
591 #if TARGET_SUPPORTS_WIDE_INT
592 /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
593 If so, return its counterpart; otherwise add it to the hash table and
597 lookup_const_wide_int (rtx wint
)
599 rtx
*slot
= const_wide_int_htab
->find_slot (wint
, INSERT
);
607 /* Return an rtx constant for V, given that the constant has mode MODE.
608 The returned rtx will be a CONST_INT if V fits, otherwise it will be
609 a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
610 (if TARGET_SUPPORTS_WIDE_INT). */
613 immed_wide_int_const (const wide_int_ref
&v
, machine_mode mode
)
615 unsigned int len
= v
.get_len ();
616 unsigned int prec
= GET_MODE_PRECISION (mode
);
618 /* Allow truncation but not extension since we do not know if the
619 number is signed or unsigned. */
620 gcc_assert (prec
<= v
.get_precision ());
622 if (len
< 2 || prec
<= HOST_BITS_PER_WIDE_INT
)
623 return gen_int_mode (v
.elt (0), mode
);
625 #if TARGET_SUPPORTS_WIDE_INT
629 unsigned int blocks_needed
630 = (prec
+ HOST_BITS_PER_WIDE_INT
- 1) / HOST_BITS_PER_WIDE_INT
;
632 if (len
> blocks_needed
)
635 value
= const_wide_int_alloc (len
);
637 /* It is so tempting to just put the mode in here. Must control
639 PUT_MODE (value
, VOIDmode
);
640 CWI_PUT_NUM_ELEM (value
, len
);
642 for (i
= 0; i
< len
; i
++)
643 CONST_WIDE_INT_ELT (value
, i
) = v
.elt (i
);
645 return lookup_const_wide_int (value
);
648 return immed_double_const (v
.elt (0), v
.elt (1), mode
);
652 #if TARGET_SUPPORTS_WIDE_INT == 0
653 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
654 of ints: I0 is the low-order word and I1 is the high-order word.
655 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
656 implied upper bits are copies of the high bit of i1. The value
657 itself is neither signed nor unsigned. Do not use this routine for
658 non-integer modes; convert to REAL_VALUE_TYPE and use
659 CONST_DOUBLE_FROM_REAL_VALUE. */
662 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, machine_mode mode
)
667 /* There are the following cases (note that there are no modes with
668 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
670 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
672 2) If the value of the integer fits into HOST_WIDE_INT anyway
673 (i.e., i1 consists only from copies of the sign bit, and sign
674 of i0 and i1 are the same), then we return a CONST_INT for i0.
675 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
676 if (mode
!= VOIDmode
)
678 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
679 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
680 /* We can get a 0 for an error mark. */
681 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
682 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
683 || GET_MODE_CLASS (mode
) == MODE_POINTER_BOUNDS
);
685 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
686 return gen_int_mode (i0
, mode
);
689 /* If this integer fits in one word, return a CONST_INT. */
690 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
693 /* We use VOIDmode for integers. */
694 value
= rtx_alloc (CONST_DOUBLE
);
695 PUT_MODE (value
, VOIDmode
);
697 CONST_DOUBLE_LOW (value
) = i0
;
698 CONST_DOUBLE_HIGH (value
) = i1
;
700 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
701 XWINT (value
, i
) = 0;
703 return lookup_const_double (value
);
708 gen_rtx_REG (machine_mode mode
, unsigned int regno
)
710 /* In case the MD file explicitly references the frame pointer, have
711 all such references point to the same frame pointer. This is
712 used during frame pointer elimination to distinguish the explicit
713 references to these registers from pseudos that happened to be
716 If we have eliminated the frame pointer or arg pointer, we will
717 be using it as a normal register, for example as a spill
718 register. In such cases, we might be accessing it in a mode that
719 is not Pmode and therefore cannot use the pre-allocated rtx.
721 Also don't do this when we are making new REGs in reload, since
722 we don't want to get confused with the real pointers. */
724 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
726 if (regno
== FRAME_POINTER_REGNUM
727 && (!reload_completed
|| frame_pointer_needed
))
728 return frame_pointer_rtx
;
730 if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
731 && regno
== HARD_FRAME_POINTER_REGNUM
732 && (!reload_completed
|| frame_pointer_needed
))
733 return hard_frame_pointer_rtx
;
734 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
735 if (regno
== ARG_POINTER_REGNUM
)
736 return arg_pointer_rtx
;
738 #ifdef RETURN_ADDRESS_POINTER_REGNUM
739 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
740 return return_address_pointer_rtx
;
742 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
743 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
744 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
745 return pic_offset_table_rtx
;
746 if (regno
== STACK_POINTER_REGNUM
)
747 return stack_pointer_rtx
;
751 /* If the per-function register table has been set up, try to re-use
752 an existing entry in that table to avoid useless generation of RTL.
754 This code is disabled for now until we can fix the various backends
755 which depend on having non-shared hard registers in some cases. Long
756 term we want to re-enable this code as it can significantly cut down
757 on the amount of useless RTL that gets generated.
759 We'll also need to fix some code that runs after reload that wants to
760 set ORIGINAL_REGNO. */
765 && regno
< FIRST_PSEUDO_REGISTER
766 && reg_raw_mode
[regno
] == mode
)
767 return regno_reg_rtx
[regno
];
770 return gen_raw_REG (mode
, regno
);
774 gen_rtx_MEM (machine_mode mode
, rtx addr
)
776 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
778 /* This field is not cleared by the mere allocation of the rtx, so
785 /* Generate a memory referring to non-trapping constant memory. */
788 gen_const_mem (machine_mode mode
, rtx addr
)
790 rtx mem
= gen_rtx_MEM (mode
, addr
);
791 MEM_READONLY_P (mem
) = 1;
792 MEM_NOTRAP_P (mem
) = 1;
796 /* Generate a MEM referring to fixed portions of the frame, e.g., register
800 gen_frame_mem (machine_mode mode
, rtx addr
)
802 rtx mem
= gen_rtx_MEM (mode
, addr
);
803 MEM_NOTRAP_P (mem
) = 1;
804 set_mem_alias_set (mem
, get_frame_alias_set ());
808 /* Generate a MEM referring to a temporary use of the stack, not part
809 of the fixed stack frame. For example, something which is pushed
810 by a target splitter. */
812 gen_tmp_stack_mem (machine_mode mode
, rtx addr
)
814 rtx mem
= gen_rtx_MEM (mode
, addr
);
815 MEM_NOTRAP_P (mem
) = 1;
816 if (!cfun
->calls_alloca
)
817 set_mem_alias_set (mem
, get_frame_alias_set ());
821 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
822 this construct would be valid, and false otherwise. */
825 validate_subreg (machine_mode omode
, machine_mode imode
,
826 const_rtx reg
, unsigned int offset
)
828 unsigned int isize
= GET_MODE_SIZE (imode
);
829 unsigned int osize
= GET_MODE_SIZE (omode
);
831 /* All subregs must be aligned. */
832 if (offset
% osize
!= 0)
835 /* The subreg offset cannot be outside the inner object. */
839 /* ??? This should not be here. Temporarily continue to allow word_mode
840 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
841 Generally, backends are doing something sketchy but it'll take time to
843 if (omode
== word_mode
)
845 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
846 is the culprit here, and not the backends. */
847 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
849 /* Allow component subregs of complex and vector. Though given the below
850 extraction rules, it's not always clear what that means. */
851 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
852 && GET_MODE_INNER (imode
) == omode
)
854 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
855 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
856 represent this. It's questionable if this ought to be represented at
857 all -- why can't this all be hidden in post-reload splitters that make
858 arbitrarily mode changes to the registers themselves. */
859 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
861 /* Subregs involving floating point modes are not allowed to
862 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
863 (subreg:SI (reg:DF) 0) isn't. */
864 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
866 if (! (isize
== osize
867 /* LRA can use subreg to store a floating point value in
868 an integer mode. Although the floating point and the
869 integer modes need the same number of hard registers,
870 the size of floating point mode can be less than the
871 integer mode. LRA also uses subregs for a register
872 should be used in different mode in on insn. */
877 /* Paradoxical subregs must have offset zero. */
881 /* This is a normal subreg. Verify that the offset is representable. */
883 /* For hard registers, we already have most of these rules collected in
884 subreg_offset_representable_p. */
885 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
887 unsigned int regno
= REGNO (reg
);
889 #ifdef CANNOT_CHANGE_MODE_CLASS
890 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
891 && GET_MODE_INNER (imode
) == omode
)
893 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
897 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
900 /* For pseudo registers, we want most of the same checks. Namely:
901 If the register no larger than a word, the subreg must be lowpart.
902 If the register is larger than a word, the subreg must be the lowpart
903 of a subword. A subreg does *not* perform arbitrary bit extraction.
904 Given that we've already checked mode/offset alignment, we only have
905 to check subword subregs here. */
906 if (osize
< UNITS_PER_WORD
907 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
909 machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
910 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
911 if (offset
% UNITS_PER_WORD
!= low_off
)
918 gen_rtx_SUBREG (machine_mode mode
, rtx reg
, int offset
)
920 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
921 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
924 /* Generate a SUBREG representing the least-significant part of REG if MODE
925 is smaller than mode of REG, otherwise paradoxical SUBREG. */
928 gen_lowpart_SUBREG (machine_mode mode
, rtx reg
)
932 inmode
= GET_MODE (reg
);
933 if (inmode
== VOIDmode
)
935 return gen_rtx_SUBREG (mode
, reg
,
936 subreg_lowpart_offset (mode
, inmode
));
940 gen_rtx_VAR_LOCATION (machine_mode mode
, tree decl
, rtx loc
,
941 enum var_init_status status
)
943 rtx x
= gen_rtx_fmt_te (VAR_LOCATION
, mode
, decl
, loc
);
944 PAT_VAR_LOCATION_STATUS (x
) = status
;
949 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
952 gen_rtvec (int n
, ...)
960 /* Don't allocate an empty rtvec... */
967 rt_val
= rtvec_alloc (n
);
969 for (i
= 0; i
< n
; i
++)
970 rt_val
->elem
[i
] = va_arg (p
, rtx
);
977 gen_rtvec_v (int n
, rtx
*argp
)
982 /* Don't allocate an empty rtvec... */
986 rt_val
= rtvec_alloc (n
);
988 for (i
= 0; i
< n
; i
++)
989 rt_val
->elem
[i
] = *argp
++;
995 gen_rtvec_v (int n
, rtx_insn
**argp
)
1000 /* Don't allocate an empty rtvec... */
1004 rt_val
= rtvec_alloc (n
);
1006 for (i
= 0; i
< n
; i
++)
1007 rt_val
->elem
[i
] = *argp
++;
1013 /* Return the number of bytes between the start of an OUTER_MODE
1014 in-memory value and the start of an INNER_MODE in-memory value,
1015 given that the former is a lowpart of the latter. It may be a
1016 paradoxical lowpart, in which case the offset will be negative
1017 on big-endian targets. */
1020 byte_lowpart_offset (machine_mode outer_mode
,
1021 machine_mode inner_mode
)
1023 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
1024 return subreg_lowpart_offset (outer_mode
, inner_mode
);
1026 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
1029 /* Generate a REG rtx for a new pseudo register of mode MODE.
1030 This pseudo is assigned the next sequential register number. */
1033 gen_reg_rtx (machine_mode mode
)
1036 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
1038 gcc_assert (can_create_pseudo_p ());
1040 /* If a virtual register with bigger mode alignment is generated,
1041 increase stack alignment estimation because it might be spilled
1043 if (SUPPORTS_STACK_ALIGNMENT
1044 && crtl
->stack_alignment_estimated
< align
1045 && !crtl
->stack_realign_processed
)
1047 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
1048 if (crtl
->stack_alignment_estimated
< min_align
)
1049 crtl
->stack_alignment_estimated
= min_align
;
1052 if (generating_concat_p
1053 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
1054 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
1056 /* For complex modes, don't make a single pseudo.
1057 Instead, make a CONCAT of two pseudos.
1058 This allows noncontiguous allocation of the real and imaginary parts,
1059 which makes much better code. Besides, allocating DCmode
1060 pseudos overstrains reload on some machines like the 386. */
1061 rtx realpart
, imagpart
;
1062 machine_mode partmode
= GET_MODE_INNER (mode
);
1064 realpart
= gen_reg_rtx (partmode
);
1065 imagpart
= gen_reg_rtx (partmode
);
1066 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
1069 /* Do not call gen_reg_rtx with uninitialized crtl. */
1070 gcc_assert (crtl
->emit
.regno_pointer_align_length
);
1072 /* Make sure regno_pointer_align, and regno_reg_rtx are large
1073 enough to have an element for this pseudo reg number. */
1075 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
1077 int old_size
= crtl
->emit
.regno_pointer_align_length
;
1081 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
1082 memset (tmp
+ old_size
, 0, old_size
);
1083 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
1085 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
1086 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
1087 regno_reg_rtx
= new1
;
1089 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
1092 val
= gen_raw_REG (mode
, reg_rtx_no
);
1093 regno_reg_rtx
[reg_rtx_no
++] = val
;
1097 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1100 reg_is_parm_p (rtx reg
)
1104 gcc_assert (REG_P (reg
));
1105 decl
= REG_EXPR (reg
);
1106 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
1109 /* Update NEW with the same attributes as REG, but with OFFSET added
1110 to the REG_OFFSET. */
1113 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
1115 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
1116 REG_OFFSET (reg
) + offset
);
1119 /* Generate a register with same attributes as REG, but with OFFSET
1120 added to the REG_OFFSET. */
1123 gen_rtx_REG_offset (rtx reg
, machine_mode mode
, unsigned int regno
,
1126 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
1128 update_reg_offset (new_rtx
, reg
, offset
);
1132 /* Generate a new pseudo-register with the same attributes as REG, but
1133 with OFFSET added to the REG_OFFSET. */
1136 gen_reg_rtx_offset (rtx reg
, machine_mode mode
, int offset
)
1138 rtx new_rtx
= gen_reg_rtx (mode
);
1140 update_reg_offset (new_rtx
, reg
, offset
);
1144 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1145 new register is a (possibly paradoxical) lowpart of the old one. */
1148 adjust_reg_mode (rtx reg
, machine_mode mode
)
1150 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
1151 PUT_MODE (reg
, mode
);
1154 /* Copy REG's attributes from X, if X has any attributes. If REG and X
1155 have different modes, REG is a (possibly paradoxical) lowpart of X. */
1158 set_reg_attrs_from_value (rtx reg
, rtx x
)
1161 bool can_be_reg_pointer
= true;
1163 /* Don't call mark_reg_pointer for incompatible pointer sign
1165 while (GET_CODE (x
) == SIGN_EXTEND
1166 || GET_CODE (x
) == ZERO_EXTEND
1167 || GET_CODE (x
) == TRUNCATE
1168 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
1170 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
1171 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
1172 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
1173 can_be_reg_pointer
= false;
1178 /* Hard registers can be reused for multiple purposes within the same
1179 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1180 on them is wrong. */
1181 if (HARD_REGISTER_P (reg
))
1184 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1187 if (MEM_OFFSET_KNOWN_P (x
))
1188 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1189 MEM_OFFSET (x
) + offset
);
1190 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1191 mark_reg_pointer (reg
, 0);
1196 update_reg_offset (reg
, x
, offset
);
1197 if (can_be_reg_pointer
&& REG_POINTER (x
))
1198 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1202 /* Generate a REG rtx for a new pseudo register, copying the mode
1203 and attributes from X. */
1206 gen_reg_rtx_and_attrs (rtx x
)
1208 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1209 set_reg_attrs_from_value (reg
, x
);
1213 /* Set the register attributes for registers contained in PARM_RTX.
1214 Use needed values from memory attributes of MEM. */
1217 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1219 if (REG_P (parm_rtx
))
1220 set_reg_attrs_from_value (parm_rtx
, mem
);
1221 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1223 /* Check for a NULL entry in the first slot, used to indicate that the
1224 parameter goes both on the stack and in registers. */
1225 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1226 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1228 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1229 if (REG_P (XEXP (x
, 0)))
1230 REG_ATTRS (XEXP (x
, 0))
1231 = get_reg_attrs (MEM_EXPR (mem
),
1232 INTVAL (XEXP (x
, 1)));
1237 /* Set the REG_ATTRS for registers in value X, given that X represents
1241 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1243 if (GET_CODE (x
) == SUBREG
)
1245 gcc_assert (subreg_lowpart_p (x
));
1250 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1252 if (GET_CODE (x
) == CONCAT
)
1254 if (REG_P (XEXP (x
, 0)))
1255 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1256 if (REG_P (XEXP (x
, 1)))
1257 REG_ATTRS (XEXP (x
, 1))
1258 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1260 if (GET_CODE (x
) == PARALLEL
)
1264 /* Check for a NULL entry, used to indicate that the parameter goes
1265 both on the stack and in registers. */
1266 if (XEXP (XVECEXP (x
, 0, 0), 0))
1271 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1273 rtx y
= XVECEXP (x
, 0, i
);
1274 if (REG_P (XEXP (y
, 0)))
1275 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1280 /* Assign the RTX X to declaration T. */
1283 set_decl_rtl (tree t
, rtx x
)
1285 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1287 set_reg_attrs_for_decl_rtl (t
, x
);
1290 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1291 if the ABI requires the parameter to be passed by reference. */
1294 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1296 DECL_INCOMING_RTL (t
) = x
;
1297 if (x
&& !by_reference_p
)
1298 set_reg_attrs_for_decl_rtl (t
, x
);
1301 /* Identify REG (which may be a CONCAT) as a user register. */
1304 mark_user_reg (rtx reg
)
1306 if (GET_CODE (reg
) == CONCAT
)
1308 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1309 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1313 gcc_assert (REG_P (reg
));
1314 REG_USERVAR_P (reg
) = 1;
1318 /* Identify REG as a probable pointer register and show its alignment
1319 as ALIGN, if nonzero. */
1322 mark_reg_pointer (rtx reg
, int align
)
1324 if (! REG_POINTER (reg
))
1326 REG_POINTER (reg
) = 1;
1329 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1331 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1332 /* We can no-longer be sure just how aligned this pointer is. */
1333 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1336 /* Return 1 plus largest pseudo reg number used in the current function. */
1344 /* Return 1 + the largest label number used so far in the current function. */
1347 max_label_num (void)
1352 /* Return first label number used in this function (if any were used). */
1355 get_first_label_num (void)
1357 return first_label_num
;
1360 /* If the rtx for label was created during the expansion of a nested
1361 function, then first_label_num won't include this label number.
1362 Fix this now so that array indices work later. */
1365 maybe_set_first_label_num (rtx x
)
1367 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1368 first_label_num
= CODE_LABEL_NUMBER (x
);
1371 /* Return a value representing some low-order bits of X, where the number
1372 of low-order bits is given by MODE. Note that no conversion is done
1373 between floating-point and fixed-point values, rather, the bit
1374 representation is returned.
1376 This function handles the cases in common between gen_lowpart, below,
1377 and two variants in cse.c and combine.c. These are the cases that can
1378 be safely handled at all points in the compilation.
1380 If this is not a case we can handle, return 0. */
1383 gen_lowpart_common (machine_mode mode
, rtx x
)
1385 int msize
= GET_MODE_SIZE (mode
);
1388 machine_mode innermode
;
1390 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1391 so we have to make one up. Yuk. */
1392 innermode
= GET_MODE (x
);
1394 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1395 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1396 else if (innermode
== VOIDmode
)
1397 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1399 xsize
= GET_MODE_SIZE (innermode
);
1401 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1403 if (innermode
== mode
)
1406 /* MODE must occupy no more words than the mode of X. */
1407 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1408 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1411 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1412 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1415 offset
= subreg_lowpart_offset (mode
, innermode
);
1417 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1418 && (GET_MODE_CLASS (mode
) == MODE_INT
1419 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1421 /* If we are getting the low-order part of something that has been
1422 sign- or zero-extended, we can either just use the object being
1423 extended or make a narrower extension. If we want an even smaller
1424 piece than the size of the object being extended, call ourselves
1427 This case is used mostly by combine and cse. */
1429 if (GET_MODE (XEXP (x
, 0)) == mode
)
1431 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1432 return gen_lowpart_common (mode
, XEXP (x
, 0));
1433 else if (msize
< xsize
)
1434 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1436 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1437 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1438 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1439 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1441 /* Otherwise, we can't do this. */
1446 gen_highpart (machine_mode mode
, rtx x
)
1448 unsigned int msize
= GET_MODE_SIZE (mode
);
1451 /* This case loses if X is a subreg. To catch bugs early,
1452 complain if an invalid MODE is used even in other cases. */
1453 gcc_assert (msize
<= UNITS_PER_WORD
1454 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1456 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1457 subreg_highpart_offset (mode
, GET_MODE (x
)));
1458 gcc_assert (result
);
1460 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1461 the target if we have a MEM. gen_highpart must return a valid operand,
1462 emitting code if necessary to do so. */
1465 result
= validize_mem (result
);
1466 gcc_assert (result
);
1472 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1473 be VOIDmode constant. */
1475 gen_highpart_mode (machine_mode outermode
, machine_mode innermode
, rtx exp
)
1477 if (GET_MODE (exp
) != VOIDmode
)
1479 gcc_assert (GET_MODE (exp
) == innermode
);
1480 return gen_highpart (outermode
, exp
);
1482 return simplify_gen_subreg (outermode
, exp
, innermode
,
1483 subreg_highpart_offset (outermode
, innermode
));
1486 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1489 subreg_lowpart_offset (machine_mode outermode
, machine_mode innermode
)
1491 unsigned int offset
= 0;
1492 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1496 if (WORDS_BIG_ENDIAN
)
1497 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1498 if (BYTES_BIG_ENDIAN
)
1499 offset
+= difference
% UNITS_PER_WORD
;
1505 /* Return offset in bytes to get OUTERMODE high part
1506 of the value in mode INNERMODE stored in memory in target format. */
1508 subreg_highpart_offset (machine_mode outermode
, machine_mode innermode
)
1510 unsigned int offset
= 0;
1511 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1513 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1517 if (! WORDS_BIG_ENDIAN
)
1518 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1519 if (! BYTES_BIG_ENDIAN
)
1520 offset
+= difference
% UNITS_PER_WORD
;
1526 /* Return 1 iff X, assumed to be a SUBREG,
1527 refers to the least significant part of its containing reg.
1528 If X is not a SUBREG, always return 1 (it is its own low part!). */
1531 subreg_lowpart_p (const_rtx x
)
1533 if (GET_CODE (x
) != SUBREG
)
1535 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1538 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1539 == SUBREG_BYTE (x
));
1542 /* Return true if X is a paradoxical subreg, false otherwise. */
1544 paradoxical_subreg_p (const_rtx x
)
1546 if (GET_CODE (x
) != SUBREG
)
1548 return (GET_MODE_PRECISION (GET_MODE (x
))
1549 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1552 /* Return subword OFFSET of operand OP.
1553 The word number, OFFSET, is interpreted as the word number starting
1554 at the low-order address. OFFSET 0 is the low-order word if not
1555 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1557 If we cannot extract the required word, we return zero. Otherwise,
1558 an rtx corresponding to the requested word will be returned.
1560 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1561 reload has completed, a valid address will always be returned. After
1562 reload, if a valid address cannot be returned, we return zero.
1564 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1565 it is the responsibility of the caller.
1567 MODE is the mode of OP in case it is a CONST_INT.
1569 ??? This is still rather broken for some cases. The problem for the
1570 moment is that all callers of this thing provide no 'goal mode' to
1571 tell us to work with. This exists because all callers were written
1572 in a word based SUBREG world.
1573 Now use of this function can be deprecated by simplify_subreg in most
1578 operand_subword (rtx op
, unsigned int offset
, int validate_address
, machine_mode mode
)
1580 if (mode
== VOIDmode
)
1581 mode
= GET_MODE (op
);
1583 gcc_assert (mode
!= VOIDmode
);
1585 /* If OP is narrower than a word, fail. */
1587 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1590 /* If we want a word outside OP, return zero. */
1592 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1595 /* Form a new MEM at the requested address. */
1598 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1600 if (! validate_address
)
1603 else if (reload_completed
)
1605 if (! strict_memory_address_addr_space_p (word_mode
,
1607 MEM_ADDR_SPACE (op
)))
1611 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1614 /* Rest can be handled by simplify_subreg. */
1615 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1618 /* Similar to `operand_subword', but never return 0. If we can't
1619 extract the required subword, put OP into a register and try again.
1620 The second attempt must succeed. We always validate the address in
1623 MODE is the mode of OP, in case it is CONST_INT. */
1626 operand_subword_force (rtx op
, unsigned int offset
, machine_mode mode
)
1628 rtx result
= operand_subword (op
, offset
, 1, mode
);
1633 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1635 /* If this is a register which can not be accessed by words, copy it
1636 to a pseudo register. */
1638 op
= copy_to_reg (op
);
1640 op
= force_reg (mode
, op
);
1643 result
= operand_subword (op
, offset
, 1, mode
);
1644 gcc_assert (result
);
1649 /* Returns 1 if both MEM_EXPR can be considered equal
1653 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1658 if (! expr1
|| ! expr2
)
1661 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1664 return operand_equal_p (expr1
, expr2
, 0);
1667 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1668 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1672 get_mem_align_offset (rtx mem
, unsigned int align
)
1675 unsigned HOST_WIDE_INT offset
;
1677 /* This function can't use
1678 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1679 || (MAX (MEM_ALIGN (mem),
1680 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1684 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1686 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1687 for <variable>. get_inner_reference doesn't handle it and
1688 even if it did, the alignment in that case needs to be determined
1689 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1690 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1691 isn't sufficiently aligned, the object it is in might be. */
1692 gcc_assert (MEM_P (mem
));
1693 expr
= MEM_EXPR (mem
);
1694 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1697 offset
= MEM_OFFSET (mem
);
1700 if (DECL_ALIGN (expr
) < align
)
1703 else if (INDIRECT_REF_P (expr
))
1705 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1708 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1712 tree inner
= TREE_OPERAND (expr
, 0);
1713 tree field
= TREE_OPERAND (expr
, 1);
1714 tree byte_offset
= component_ref_field_offset (expr
);
1715 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1718 || !tree_fits_uhwi_p (byte_offset
)
1719 || !tree_fits_uhwi_p (bit_offset
))
1722 offset
+= tree_to_uhwi (byte_offset
);
1723 offset
+= tree_to_uhwi (bit_offset
) / BITS_PER_UNIT
;
1725 if (inner
== NULL_TREE
)
1727 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1728 < (unsigned int) align
)
1732 else if (DECL_P (inner
))
1734 if (DECL_ALIGN (inner
) < align
)
1738 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1746 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1749 /* Given REF (a MEM) and T, either the type of X or the expression
1750 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1751 if we are making a new object of this type. BITPOS is nonzero if
1752 there is an offset outstanding on T that will be applied later. */
1755 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1756 HOST_WIDE_INT bitpos
)
1758 HOST_WIDE_INT apply_bitpos
= 0;
1760 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1763 /* It can happen that type_for_mode was given a mode for which there
1764 is no language-level type. In which case it returns NULL, which
1769 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1770 if (type
== error_mark_node
)
1773 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1774 wrong answer, as it assumes that DECL_RTL already has the right alias
1775 info. Callers should not set DECL_RTL until after the call to
1776 set_mem_attributes. */
1777 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1779 memset (&attrs
, 0, sizeof (attrs
));
1781 /* Get the alias set from the expression or type (perhaps using a
1782 front-end routine) and use it. */
1783 attrs
.alias
= get_alias_set (t
);
1785 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1786 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1788 /* Default values from pre-existing memory attributes if present. */
1789 refattrs
= MEM_ATTRS (ref
);
1792 /* ??? Can this ever happen? Calling this routine on a MEM that
1793 already carries memory attributes should probably be invalid. */
1794 attrs
.expr
= refattrs
->expr
;
1795 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1796 attrs
.offset
= refattrs
->offset
;
1797 attrs
.size_known_p
= refattrs
->size_known_p
;
1798 attrs
.size
= refattrs
->size
;
1799 attrs
.align
= refattrs
->align
;
1802 /* Otherwise, default values from the mode of the MEM reference. */
1805 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1806 gcc_assert (!defattrs
->expr
);
1807 gcc_assert (!defattrs
->offset_known_p
);
1809 /* Respect mode size. */
1810 attrs
.size_known_p
= defattrs
->size_known_p
;
1811 attrs
.size
= defattrs
->size
;
1812 /* ??? Is this really necessary? We probably should always get
1813 the size from the type below. */
1815 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1816 if T is an object, always compute the object alignment below. */
1818 attrs
.align
= defattrs
->align
;
1820 attrs
.align
= BITS_PER_UNIT
;
1821 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1822 e.g. if the type carries an alignment attribute. Should we be
1823 able to simply always use TYPE_ALIGN? */
1826 /* We can set the alignment from the type if we are making an object,
1827 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1828 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1829 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1831 /* If the size is known, we can set that. */
1832 tree new_size
= TYPE_SIZE_UNIT (type
);
1834 /* The address-space is that of the type. */
1835 as
= TYPE_ADDR_SPACE (type
);
1837 /* If T is not a type, we may be able to deduce some more information about
1843 if (TREE_THIS_VOLATILE (t
))
1844 MEM_VOLATILE_P (ref
) = 1;
1846 /* Now remove any conversions: they don't change what the underlying
1847 object is. Likewise for SAVE_EXPR. */
1848 while (CONVERT_EXPR_P (t
)
1849 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1850 || TREE_CODE (t
) == SAVE_EXPR
)
1851 t
= TREE_OPERAND (t
, 0);
1853 /* Note whether this expression can trap. */
1854 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1856 base
= get_base_address (t
);
1860 && TREE_READONLY (base
)
1861 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1862 && !TREE_THIS_VOLATILE (base
))
1863 MEM_READONLY_P (ref
) = 1;
1865 /* Mark static const strings readonly as well. */
1866 if (TREE_CODE (base
) == STRING_CST
1867 && TREE_READONLY (base
)
1868 && TREE_STATIC (base
))
1869 MEM_READONLY_P (ref
) = 1;
1871 /* Address-space information is on the base object. */
1872 if (TREE_CODE (base
) == MEM_REF
1873 || TREE_CODE (base
) == TARGET_MEM_REF
)
1874 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1877 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1880 /* If this expression uses it's parent's alias set, mark it such
1881 that we won't change it. */
1882 if (component_uses_parent_alias_set_from (t
) != NULL_TREE
)
1883 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1885 /* If this is a decl, set the attributes of the MEM from it. */
1889 attrs
.offset_known_p
= true;
1891 apply_bitpos
= bitpos
;
1892 new_size
= DECL_SIZE_UNIT (t
);
1895 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1896 else if (CONSTANT_CLASS_P (t
))
1899 /* If this is a field reference, record it. */
1900 else if (TREE_CODE (t
) == COMPONENT_REF
)
1903 attrs
.offset_known_p
= true;
1905 apply_bitpos
= bitpos
;
1906 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1907 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1910 /* If this is an array reference, look for an outer field reference. */
1911 else if (TREE_CODE (t
) == ARRAY_REF
)
1913 tree off_tree
= size_zero_node
;
1914 /* We can't modify t, because we use it at the end of the
1920 tree index
= TREE_OPERAND (t2
, 1);
1921 tree low_bound
= array_ref_low_bound (t2
);
1922 tree unit_size
= array_ref_element_size (t2
);
1924 /* We assume all arrays have sizes that are a multiple of a byte.
1925 First subtract the lower bound, if any, in the type of the
1926 index, then convert to sizetype and multiply by the size of
1927 the array element. */
1928 if (! integer_zerop (low_bound
))
1929 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1932 off_tree
= size_binop (PLUS_EXPR
,
1933 size_binop (MULT_EXPR
,
1934 fold_convert (sizetype
,
1938 t2
= TREE_OPERAND (t2
, 0);
1940 while (TREE_CODE (t2
) == ARRAY_REF
);
1943 || TREE_CODE (t2
) == COMPONENT_REF
)
1946 attrs
.offset_known_p
= false;
1947 if (tree_fits_uhwi_p (off_tree
))
1949 attrs
.offset_known_p
= true;
1950 attrs
.offset
= tree_to_uhwi (off_tree
);
1951 apply_bitpos
= bitpos
;
1954 /* Else do not record a MEM_EXPR. */
1957 /* If this is an indirect reference, record it. */
1958 else if (TREE_CODE (t
) == MEM_REF
1959 || TREE_CODE (t
) == TARGET_MEM_REF
)
1962 attrs
.offset_known_p
= true;
1964 apply_bitpos
= bitpos
;
1967 /* Compute the alignment. */
1968 unsigned int obj_align
;
1969 unsigned HOST_WIDE_INT obj_bitpos
;
1970 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1971 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1972 if (obj_bitpos
!= 0)
1973 obj_align
= (obj_bitpos
& -obj_bitpos
);
1974 attrs
.align
= MAX (attrs
.align
, obj_align
);
1977 if (tree_fits_uhwi_p (new_size
))
1979 attrs
.size_known_p
= true;
1980 attrs
.size
= tree_to_uhwi (new_size
);
1983 /* If we modified OFFSET based on T, then subtract the outstanding
1984 bit position offset. Similarly, increase the size of the accessed
1985 object to contain the negative offset. */
1988 gcc_assert (attrs
.offset_known_p
);
1989 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1990 if (attrs
.size_known_p
)
1991 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1994 /* Now set the attributes we computed above. */
1995 attrs
.addrspace
= as
;
1996 set_mem_attrs (ref
, &attrs
);
2000 set_mem_attributes (rtx ref
, tree t
, int objectp
)
2002 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
2005 /* Set the alias set of MEM to SET. */
2008 set_mem_alias_set (rtx mem
, alias_set_type set
)
2010 struct mem_attrs attrs
;
2012 /* If the new and old alias sets don't conflict, something is wrong. */
2013 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
2014 attrs
= *get_mem_attrs (mem
);
2016 set_mem_attrs (mem
, &attrs
);
2019 /* Set the address space of MEM to ADDRSPACE (target-defined). */
2022 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
2024 struct mem_attrs attrs
;
2026 attrs
= *get_mem_attrs (mem
);
2027 attrs
.addrspace
= addrspace
;
2028 set_mem_attrs (mem
, &attrs
);
2031 /* Set the alignment of MEM to ALIGN bits. */
2034 set_mem_align (rtx mem
, unsigned int align
)
2036 struct mem_attrs attrs
;
2038 attrs
= *get_mem_attrs (mem
);
2039 attrs
.align
= align
;
2040 set_mem_attrs (mem
, &attrs
);
2043 /* Set the expr for MEM to EXPR. */
2046 set_mem_expr (rtx mem
, tree expr
)
2048 struct mem_attrs attrs
;
2050 attrs
= *get_mem_attrs (mem
);
2052 set_mem_attrs (mem
, &attrs
);
2055 /* Set the offset of MEM to OFFSET. */
2058 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
2060 struct mem_attrs attrs
;
2062 attrs
= *get_mem_attrs (mem
);
2063 attrs
.offset_known_p
= true;
2064 attrs
.offset
= offset
;
2065 set_mem_attrs (mem
, &attrs
);
2068 /* Clear the offset of MEM. */
2071 clear_mem_offset (rtx mem
)
2073 struct mem_attrs attrs
;
2075 attrs
= *get_mem_attrs (mem
);
2076 attrs
.offset_known_p
= false;
2077 set_mem_attrs (mem
, &attrs
);
2080 /* Set the size of MEM to SIZE. */
2083 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
2085 struct mem_attrs attrs
;
2087 attrs
= *get_mem_attrs (mem
);
2088 attrs
.size_known_p
= true;
2090 set_mem_attrs (mem
, &attrs
);
2093 /* Clear the size of MEM. */
2096 clear_mem_size (rtx mem
)
2098 struct mem_attrs attrs
;
2100 attrs
= *get_mem_attrs (mem
);
2101 attrs
.size_known_p
= false;
2102 set_mem_attrs (mem
, &attrs
);
2105 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2106 and its address changed to ADDR. (VOIDmode means don't change the mode.
2107 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2108 returned memory location is required to be valid. INPLACE is true if any
2109 changes can be made directly to MEMREF or false if MEMREF must be treated
2112 The memory attributes are not changed. */
2115 change_address_1 (rtx memref
, machine_mode mode
, rtx addr
, int validate
,
2121 gcc_assert (MEM_P (memref
));
2122 as
= MEM_ADDR_SPACE (memref
);
2123 if (mode
== VOIDmode
)
2124 mode
= GET_MODE (memref
);
2126 addr
= XEXP (memref
, 0);
2127 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
2128 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2131 /* Don't validate address for LRA. LRA can make the address valid
2132 by itself in most efficient way. */
2133 if (validate
&& !lra_in_progress
)
2135 if (reload_in_progress
|| reload_completed
)
2136 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2138 addr
= memory_address_addr_space (mode
, addr
, as
);
2141 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2146 XEXP (memref
, 0) = addr
;
2150 new_rtx
= gen_rtx_MEM (mode
, addr
);
2151 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2155 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2156 way we are changing MEMREF, so we only preserve the alias set. */
2159 change_address (rtx memref
, machine_mode mode
, rtx addr
)
2161 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1, false);
2162 machine_mode mmode
= GET_MODE (new_rtx
);
2163 struct mem_attrs attrs
, *defattrs
;
2165 attrs
= *get_mem_attrs (memref
);
2166 defattrs
= mode_mem_attrs
[(int) mmode
];
2167 attrs
.expr
= NULL_TREE
;
2168 attrs
.offset_known_p
= false;
2169 attrs
.size_known_p
= defattrs
->size_known_p
;
2170 attrs
.size
= defattrs
->size
;
2171 attrs
.align
= defattrs
->align
;
2173 /* If there are no changes, just return the original memory reference. */
2174 if (new_rtx
== memref
)
2176 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2179 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2180 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2183 set_mem_attrs (new_rtx
, &attrs
);
2187 /* Return a memory reference like MEMREF, but with its mode changed
2188 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2189 nonzero, the memory address is forced to be valid.
2190 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2191 and the caller is responsible for adjusting MEMREF base register.
2192 If ADJUST_OBJECT is zero, the underlying object associated with the
2193 memory reference is left unchanged and the caller is responsible for
2194 dealing with it. Otherwise, if the new memory reference is outside
2195 the underlying object, even partially, then the object is dropped.
2196 SIZE, if nonzero, is the size of an access in cases where MODE
2197 has no inherent size. */
2200 adjust_address_1 (rtx memref
, machine_mode mode
, HOST_WIDE_INT offset
,
2201 int validate
, int adjust_address
, int adjust_object
,
2204 rtx addr
= XEXP (memref
, 0);
2206 machine_mode address_mode
;
2208 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2209 unsigned HOST_WIDE_INT max_align
;
2210 #ifdef POINTERS_EXTEND_UNSIGNED
2211 machine_mode pointer_mode
2212 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2215 /* VOIDmode means no mode change for change_address_1. */
2216 if (mode
== VOIDmode
)
2217 mode
= GET_MODE (memref
);
2219 /* Take the size of non-BLKmode accesses from the mode. */
2220 defattrs
= mode_mem_attrs
[(int) mode
];
2221 if (defattrs
->size_known_p
)
2222 size
= defattrs
->size
;
2224 /* If there are no changes, just return the original memory reference. */
2225 if (mode
== GET_MODE (memref
) && !offset
2226 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2227 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2231 /* ??? Prefer to create garbage instead of creating shared rtl.
2232 This may happen even if offset is nonzero -- consider
2233 (plus (plus reg reg) const_int) -- so do this always. */
2234 addr
= copy_rtx (addr
);
2236 /* Convert a possibly large offset to a signed value within the
2237 range of the target address space. */
2238 address_mode
= get_address_mode (memref
);
2239 pbits
= GET_MODE_BITSIZE (address_mode
);
2240 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2242 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2243 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2249 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2250 object, we can merge it into the LO_SUM. */
2251 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2253 && (unsigned HOST_WIDE_INT
) offset
2254 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2255 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2256 plus_constant (address_mode
,
2257 XEXP (addr
, 1), offset
));
2258 #ifdef POINTERS_EXTEND_UNSIGNED
2259 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2260 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2261 the fact that pointers are not allowed to overflow. */
2262 else if (POINTERS_EXTEND_UNSIGNED
> 0
2263 && GET_CODE (addr
) == ZERO_EXTEND
2264 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2265 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2266 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2267 plus_constant (pointer_mode
,
2268 XEXP (addr
, 0), offset
));
2271 addr
= plus_constant (address_mode
, addr
, offset
);
2274 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
, false);
2276 /* If the address is a REG, change_address_1 rightfully returns memref,
2277 but this would destroy memref's MEM_ATTRS. */
2278 if (new_rtx
== memref
&& offset
!= 0)
2279 new_rtx
= copy_rtx (new_rtx
);
2281 /* Conservatively drop the object if we don't know where we start from. */
2282 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2284 attrs
.expr
= NULL_TREE
;
2288 /* Compute the new values of the memory attributes due to this adjustment.
2289 We add the offsets and update the alignment. */
2290 if (attrs
.offset_known_p
)
2292 attrs
.offset
+= offset
;
2294 /* Drop the object if the new left end is not within its bounds. */
2295 if (adjust_object
&& attrs
.offset
< 0)
2297 attrs
.expr
= NULL_TREE
;
2302 /* Compute the new alignment by taking the MIN of the alignment and the
2303 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2307 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2308 attrs
.align
= MIN (attrs
.align
, max_align
);
2313 /* Drop the object if the new right end is not within its bounds. */
2314 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2316 attrs
.expr
= NULL_TREE
;
2319 attrs
.size_known_p
= true;
2322 else if (attrs
.size_known_p
)
2324 gcc_assert (!adjust_object
);
2325 attrs
.size
-= offset
;
2326 /* ??? The store_by_pieces machinery generates negative sizes,
2327 so don't assert for that here. */
2330 set_mem_attrs (new_rtx
, &attrs
);
2335 /* Return a memory reference like MEMREF, but with its mode changed
2336 to MODE and its address changed to ADDR, which is assumed to be
2337 MEMREF offset by OFFSET bytes. If VALIDATE is
2338 nonzero, the memory address is forced to be valid. */
2341 adjust_automodify_address_1 (rtx memref
, machine_mode mode
, rtx addr
,
2342 HOST_WIDE_INT offset
, int validate
)
2344 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
, false);
2345 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2348 /* Return a memory reference like MEMREF, but whose address is changed by
2349 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2350 known to be in OFFSET (possibly 1). */
2353 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2355 rtx new_rtx
, addr
= XEXP (memref
, 0);
2356 machine_mode address_mode
;
2357 struct mem_attrs attrs
, *defattrs
;
2359 attrs
= *get_mem_attrs (memref
);
2360 address_mode
= get_address_mode (memref
);
2361 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2363 /* At this point we don't know _why_ the address is invalid. It
2364 could have secondary memory references, multiplies or anything.
2366 However, if we did go and rearrange things, we can wind up not
2367 being able to recognize the magic around pic_offset_table_rtx.
2368 This stuff is fragile, and is yet another example of why it is
2369 bad to expose PIC machinery too early. */
2370 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2372 && GET_CODE (addr
) == PLUS
2373 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2375 addr
= force_reg (GET_MODE (addr
), addr
);
2376 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2379 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2380 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1, false);
2382 /* If there are no changes, just return the original memory reference. */
2383 if (new_rtx
== memref
)
2386 /* Update the alignment to reflect the offset. Reset the offset, which
2388 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2389 attrs
.offset_known_p
= false;
2390 attrs
.size_known_p
= defattrs
->size_known_p
;
2391 attrs
.size
= defattrs
->size
;
2392 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2393 set_mem_attrs (new_rtx
, &attrs
);
2397 /* Return a memory reference like MEMREF, but with its address changed to
2398 ADDR. The caller is asserting that the actual piece of memory pointed
2399 to is the same, just the form of the address is being changed, such as
2400 by putting something into a register. INPLACE is true if any changes
2401 can be made directly to MEMREF or false if MEMREF must be treated as
2405 replace_equiv_address (rtx memref
, rtx addr
, bool inplace
)
2407 /* change_address_1 copies the memory attribute structure without change
2408 and that's exactly what we want here. */
2409 update_temp_slot_address (XEXP (memref
, 0), addr
);
2410 return change_address_1 (memref
, VOIDmode
, addr
, 1, inplace
);
2413 /* Likewise, but the reference is not required to be valid. */
2416 replace_equiv_address_nv (rtx memref
, rtx addr
, bool inplace
)
2418 return change_address_1 (memref
, VOIDmode
, addr
, 0, inplace
);
2421 /* Return a memory reference like MEMREF, but with its mode widened to
2422 MODE and offset by OFFSET. This would be used by targets that e.g.
2423 cannot issue QImode memory operations and have to use SImode memory
2424 operations plus masking logic. */
2427 widen_memory_access (rtx memref
, machine_mode mode
, HOST_WIDE_INT offset
)
2429 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2430 struct mem_attrs attrs
;
2431 unsigned int size
= GET_MODE_SIZE (mode
);
2433 /* If there are no changes, just return the original memory reference. */
2434 if (new_rtx
== memref
)
2437 attrs
= *get_mem_attrs (new_rtx
);
2439 /* If we don't know what offset we were at within the expression, then
2440 we can't know if we've overstepped the bounds. */
2441 if (! attrs
.offset_known_p
)
2442 attrs
.expr
= NULL_TREE
;
2446 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2448 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2449 tree offset
= component_ref_field_offset (attrs
.expr
);
2451 if (! DECL_SIZE_UNIT (field
))
2453 attrs
.expr
= NULL_TREE
;
2457 /* Is the field at least as large as the access? If so, ok,
2458 otherwise strip back to the containing structure. */
2459 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2460 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2461 && attrs
.offset
>= 0)
2464 if (! tree_fits_uhwi_p (offset
))
2466 attrs
.expr
= NULL_TREE
;
2470 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2471 attrs
.offset
+= tree_to_uhwi (offset
);
2472 attrs
.offset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
2475 /* Similarly for the decl. */
2476 else if (DECL_P (attrs
.expr
)
2477 && DECL_SIZE_UNIT (attrs
.expr
)
2478 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2479 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2480 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2484 /* The widened memory access overflows the expression, which means
2485 that it could alias another expression. Zap it. */
2486 attrs
.expr
= NULL_TREE
;
2492 attrs
.offset_known_p
= false;
2494 /* The widened memory may alias other stuff, so zap the alias set. */
2495 /* ??? Maybe use get_alias_set on any remaining expression. */
2497 attrs
.size_known_p
= true;
2499 set_mem_attrs (new_rtx
, &attrs
);
2503 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2504 static GTY(()) tree spill_slot_decl
;
2507 get_spill_slot_decl (bool force_build_p
)
2509 tree d
= spill_slot_decl
;
2511 struct mem_attrs attrs
;
2513 if (d
|| !force_build_p
)
2516 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2517 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2518 DECL_ARTIFICIAL (d
) = 1;
2519 DECL_IGNORED_P (d
) = 1;
2521 spill_slot_decl
= d
;
2523 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2524 MEM_NOTRAP_P (rd
) = 1;
2525 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2526 attrs
.alias
= new_alias_set ();
2528 set_mem_attrs (rd
, &attrs
);
2529 SET_DECL_RTL (d
, rd
);
2534 /* Given MEM, a result from assign_stack_local, fill in the memory
2535 attributes as appropriate for a register allocator spill slot.
2536 These slots are not aliasable by other memory. We arrange for
2537 them all to use a single MEM_EXPR, so that the aliasing code can
2538 work properly in the case of shared spill slots. */
2541 set_mem_attrs_for_spill (rtx mem
)
2543 struct mem_attrs attrs
;
2546 attrs
= *get_mem_attrs (mem
);
2547 attrs
.expr
= get_spill_slot_decl (true);
2548 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2549 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2551 /* We expect the incoming memory to be of the form:
2552 (mem:MODE (plus (reg sfp) (const_int offset)))
2553 with perhaps the plus missing for offset = 0. */
2554 addr
= XEXP (mem
, 0);
2555 attrs
.offset_known_p
= true;
2557 if (GET_CODE (addr
) == PLUS
2558 && CONST_INT_P (XEXP (addr
, 1)))
2559 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2561 set_mem_attrs (mem
, &attrs
);
2562 MEM_NOTRAP_P (mem
) = 1;
2565 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2568 gen_label_rtx (void)
2570 return as_a
<rtx_code_label
*> (
2571 gen_rtx_CODE_LABEL (VOIDmode
, NULL_RTX
, NULL_RTX
,
2572 NULL
, label_num
++, NULL
));
2575 /* For procedure integration. */
2577 /* Install new pointers to the first and last insns in the chain.
2578 Also, set cur_insn_uid to one higher than the last in use.
2579 Used for an inline-procedure after copying the insn chain. */
2582 set_new_first_and_last_insn (rtx_insn
*first
, rtx_insn
*last
)
2586 set_first_insn (first
);
2587 set_last_insn (last
);
2590 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2592 int debug_count
= 0;
2594 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2595 cur_debug_insn_uid
= 0;
2597 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2598 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2599 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2602 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2603 if (DEBUG_INSN_P (insn
))
2608 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2610 cur_debug_insn_uid
++;
2613 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2614 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2619 /* Go through all the RTL insn bodies and copy any invalid shared
2620 structure. This routine should only be called once. */
2623 unshare_all_rtl_1 (rtx_insn
*insn
)
2625 /* Unshare just about everything else. */
2626 unshare_all_rtl_in_chain (insn
);
2628 /* Make sure the addresses of stack slots found outside the insn chain
2629 (such as, in DECL_RTL of a variable) are not shared
2630 with the insn chain.
2632 This special care is necessary when the stack slot MEM does not
2633 actually appear in the insn chain. If it does appear, its address
2634 is unshared from all else at that point. */
2635 stack_slot_list
= safe_as_a
<rtx_expr_list
*> (
2636 copy_rtx_if_shared (stack_slot_list
));
2639 /* Go through all the RTL insn bodies and copy any invalid shared
2640 structure, again. This is a fairly expensive thing to do so it
2641 should be done sparingly. */
2644 unshare_all_rtl_again (rtx_insn
*insn
)
2649 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2652 reset_used_flags (PATTERN (p
));
2653 reset_used_flags (REG_NOTES (p
));
2655 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2658 /* Make sure that virtual stack slots are not shared. */
2659 set_used_decls (DECL_INITIAL (cfun
->decl
));
2661 /* Make sure that virtual parameters are not shared. */
2662 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2663 set_used_flags (DECL_RTL (decl
));
2665 reset_used_flags (stack_slot_list
);
2667 unshare_all_rtl_1 (insn
);
2671 unshare_all_rtl (void)
2673 unshare_all_rtl_1 (get_insns ());
2678 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2679 Recursively does the same for subexpressions. */
2682 verify_rtx_sharing (rtx orig
, rtx insn
)
2687 const char *format_ptr
;
2692 code
= GET_CODE (x
);
2694 /* These types may be freely shared. */
2710 /* SCRATCH must be shared because they represent distinct values. */
2713 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2714 clobbers or clobbers of hard registers that originated as pseudos.
2715 This is needed to allow safe register renaming. */
2716 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2717 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2722 if (shared_const_p (orig
))
2727 /* A MEM is allowed to be shared if its address is constant. */
2728 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2729 || reload_completed
|| reload_in_progress
)
2738 /* This rtx may not be shared. If it has already been seen,
2739 replace it with a copy of itself. */
2740 #ifdef ENABLE_CHECKING
2741 if (RTX_FLAG (x
, used
))
2743 error ("invalid rtl sharing found in the insn");
2745 error ("shared rtx");
2747 internal_error ("internal consistency failure");
2750 gcc_assert (!RTX_FLAG (x
, used
));
2752 RTX_FLAG (x
, used
) = 1;
2754 /* Now scan the subexpressions recursively. */
2756 format_ptr
= GET_RTX_FORMAT (code
);
2758 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2760 switch (*format_ptr
++)
2763 verify_rtx_sharing (XEXP (x
, i
), insn
);
2767 if (XVEC (x
, i
) != NULL
)
2770 int len
= XVECLEN (x
, i
);
2772 for (j
= 0; j
< len
; j
++)
2774 /* We allow sharing of ASM_OPERANDS inside single
2776 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2777 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2779 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2781 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2790 /* Reset used-flags for INSN. */
2793 reset_insn_used_flags (rtx insn
)
2795 gcc_assert (INSN_P (insn
));
2796 reset_used_flags (PATTERN (insn
));
2797 reset_used_flags (REG_NOTES (insn
));
2799 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2802 /* Go through all the RTL insn bodies and clear all the USED bits. */
2805 reset_all_used_flags (void)
2809 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2812 rtx pat
= PATTERN (p
);
2813 if (GET_CODE (pat
) != SEQUENCE
)
2814 reset_insn_used_flags (p
);
2817 gcc_assert (REG_NOTES (p
) == NULL
);
2818 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2820 rtx insn
= XVECEXP (pat
, 0, i
);
2822 reset_insn_used_flags (insn
);
2828 /* Verify sharing in INSN. */
2831 verify_insn_sharing (rtx insn
)
2833 gcc_assert (INSN_P (insn
));
2834 reset_used_flags (PATTERN (insn
));
2835 reset_used_flags (REG_NOTES (insn
));
2837 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2840 /* Go through all the RTL insn bodies and check that there is no unexpected
2841 sharing in between the subexpressions. */
2844 verify_rtl_sharing (void)
2848 timevar_push (TV_VERIFY_RTL_SHARING
);
2850 reset_all_used_flags ();
2852 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2855 rtx pat
= PATTERN (p
);
2856 if (GET_CODE (pat
) != SEQUENCE
)
2857 verify_insn_sharing (p
);
2859 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2861 rtx insn
= XVECEXP (pat
, 0, i
);
2863 verify_insn_sharing (insn
);
2867 reset_all_used_flags ();
2869 timevar_pop (TV_VERIFY_RTL_SHARING
);
2872 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2873 Assumes the mark bits are cleared at entry. */
2876 unshare_all_rtl_in_chain (rtx_insn
*insn
)
2878 for (; insn
; insn
= NEXT_INSN (insn
))
2881 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2882 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2884 CALL_INSN_FUNCTION_USAGE (insn
)
2885 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2889 /* Go through all virtual stack slots of a function and mark them as
2890 shared. We never replace the DECL_RTLs themselves with a copy,
2891 but expressions mentioned into a DECL_RTL cannot be shared with
2892 expressions in the instruction stream.
2894 Note that reload may convert pseudo registers into memories in-place.
2895 Pseudo registers are always shared, but MEMs never are. Thus if we
2896 reset the used flags on MEMs in the instruction stream, we must set
2897 them again on MEMs that appear in DECL_RTLs. */
2900 set_used_decls (tree blk
)
2905 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2906 if (DECL_RTL_SET_P (t
))
2907 set_used_flags (DECL_RTL (t
));
2909 /* Now process sub-blocks. */
2910 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2914 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2915 Recursively does the same for subexpressions. Uses
2916 copy_rtx_if_shared_1 to reduce stack space. */
2919 copy_rtx_if_shared (rtx orig
)
2921 copy_rtx_if_shared_1 (&orig
);
2925 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2926 use. Recursively does the same for subexpressions. */
2929 copy_rtx_if_shared_1 (rtx
*orig1
)
2935 const char *format_ptr
;
2939 /* Repeat is used to turn tail-recursion into iteration. */
2946 code
= GET_CODE (x
);
2948 /* These types may be freely shared. */
2964 /* SCRATCH must be shared because they represent distinct values. */
2967 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2968 clobbers or clobbers of hard registers that originated as pseudos.
2969 This is needed to allow safe register renaming. */
2970 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2971 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2976 if (shared_const_p (x
))
2986 /* The chain of insns is not being copied. */
2993 /* This rtx may not be shared. If it has already been seen,
2994 replace it with a copy of itself. */
2996 if (RTX_FLAG (x
, used
))
2998 x
= shallow_copy_rtx (x
);
3001 RTX_FLAG (x
, used
) = 1;
3003 /* Now scan the subexpressions recursively.
3004 We can store any replaced subexpressions directly into X
3005 since we know X is not shared! Any vectors in X
3006 must be copied if X was copied. */
3008 format_ptr
= GET_RTX_FORMAT (code
);
3009 length
= GET_RTX_LENGTH (code
);
3012 for (i
= 0; i
< length
; i
++)
3014 switch (*format_ptr
++)
3018 copy_rtx_if_shared_1 (last_ptr
);
3019 last_ptr
= &XEXP (x
, i
);
3023 if (XVEC (x
, i
) != NULL
)
3026 int len
= XVECLEN (x
, i
);
3028 /* Copy the vector iff I copied the rtx and the length
3030 if (copied
&& len
> 0)
3031 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
3033 /* Call recursively on all inside the vector. */
3034 for (j
= 0; j
< len
; j
++)
3037 copy_rtx_if_shared_1 (last_ptr
);
3038 last_ptr
= &XVECEXP (x
, i
, j
);
3053 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
3056 mark_used_flags (rtx x
, int flag
)
3060 const char *format_ptr
;
3063 /* Repeat is used to turn tail-recursion into iteration. */
3068 code
= GET_CODE (x
);
3070 /* These types may be freely shared so we needn't do any resetting
3094 /* The chain of insns is not being copied. */
3101 RTX_FLAG (x
, used
) = flag
;
3103 format_ptr
= GET_RTX_FORMAT (code
);
3104 length
= GET_RTX_LENGTH (code
);
3106 for (i
= 0; i
< length
; i
++)
3108 switch (*format_ptr
++)
3116 mark_used_flags (XEXP (x
, i
), flag
);
3120 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3121 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
3127 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3128 to look for shared sub-parts. */
3131 reset_used_flags (rtx x
)
3133 mark_used_flags (x
, 0);
3136 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3137 to look for shared sub-parts. */
3140 set_used_flags (rtx x
)
3142 mark_used_flags (x
, 1);
3145 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3146 Return X or the rtx for the pseudo reg the value of X was copied into.
3147 OTHER must be valid as a SET_DEST. */
3150 make_safe_from (rtx x
, rtx other
)
3153 switch (GET_CODE (other
))
3156 other
= SUBREG_REG (other
);
3158 case STRICT_LOW_PART
:
3161 other
= XEXP (other
, 0);
3170 && GET_CODE (x
) != SUBREG
)
3172 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
3173 || reg_mentioned_p (other
, x
))))
3175 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3176 emit_move_insn (temp
, x
);
3182 /* Emission of insns (adding them to the doubly-linked list). */
3184 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3187 get_last_insn_anywhere (void)
3189 struct sequence_stack
*seq
;
3190 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
3196 /* Return the first nonnote insn emitted in current sequence or current
3197 function. This routine looks inside SEQUENCEs. */
3200 get_first_nonnote_insn (void)
3202 rtx_insn
*insn
= get_insns ();
3207 for (insn
= next_insn (insn
);
3208 insn
&& NOTE_P (insn
);
3209 insn
= next_insn (insn
))
3213 if (NONJUMP_INSN_P (insn
)
3214 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3215 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3222 /* Return the last nonnote insn emitted in current sequence or current
3223 function. This routine looks inside SEQUENCEs. */
3226 get_last_nonnote_insn (void)
3228 rtx_insn
*insn
= get_last_insn ();
3233 for (insn
= previous_insn (insn
);
3234 insn
&& NOTE_P (insn
);
3235 insn
= previous_insn (insn
))
3239 if (NONJUMP_INSN_P (insn
))
3240 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
3241 insn
= seq
->insn (seq
->len () - 1);
3248 /* Return the number of actual (non-debug) insns emitted in this
3252 get_max_insn_count (void)
3254 int n
= cur_insn_uid
;
3256 /* The table size must be stable across -g, to avoid codegen
3257 differences due to debug insns, and not be affected by
3258 -fmin-insn-uid, to avoid excessive table size and to simplify
3259 debugging of -fcompare-debug failures. */
3260 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3261 n
-= cur_debug_insn_uid
;
3263 n
-= MIN_NONDEBUG_INSN_UID
;
3269 /* Return the next insn. If it is a SEQUENCE, return the first insn
3273 next_insn (rtx_insn
*insn
)
3277 insn
= NEXT_INSN (insn
);
3278 if (insn
&& NONJUMP_INSN_P (insn
)
3279 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3280 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3286 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3290 previous_insn (rtx_insn
*insn
)
3294 insn
= PREV_INSN (insn
);
3295 if (insn
&& NONJUMP_INSN_P (insn
))
3296 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
3297 insn
= seq
->insn (seq
->len () - 1);
3303 /* Return the next insn after INSN that is not a NOTE. This routine does not
3304 look inside SEQUENCEs. */
3307 next_nonnote_insn (rtx uncast_insn
)
3309 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3312 insn
= NEXT_INSN (insn
);
3313 if (insn
== 0 || !NOTE_P (insn
))
3320 /* Return the next insn after INSN that is not a NOTE, but stop the
3321 search before we enter another basic block. This routine does not
3322 look inside SEQUENCEs. */
3325 next_nonnote_insn_bb (rtx_insn
*insn
)
3329 insn
= NEXT_INSN (insn
);
3330 if (insn
== 0 || !NOTE_P (insn
))
3332 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3339 /* Return the previous insn before INSN that is not a NOTE. This routine does
3340 not look inside SEQUENCEs. */
3343 prev_nonnote_insn (rtx uncast_insn
)
3345 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3349 insn
= PREV_INSN (insn
);
3350 if (insn
== 0 || !NOTE_P (insn
))
3357 /* Return the previous insn before INSN that is not a NOTE, but stop
3358 the search before we enter another basic block. This routine does
3359 not look inside SEQUENCEs. */
3362 prev_nonnote_insn_bb (rtx uncast_insn
)
3364 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3368 insn
= PREV_INSN (insn
);
3369 if (insn
== 0 || !NOTE_P (insn
))
3371 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3378 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3379 routine does not look inside SEQUENCEs. */
3382 next_nondebug_insn (rtx uncast_insn
)
3384 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3388 insn
= NEXT_INSN (insn
);
3389 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3396 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3397 This routine does not look inside SEQUENCEs. */
3400 prev_nondebug_insn (rtx uncast_insn
)
3402 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3406 insn
= PREV_INSN (insn
);
3407 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3414 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3415 This routine does not look inside SEQUENCEs. */
3418 next_nonnote_nondebug_insn (rtx uncast_insn
)
3420 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3424 insn
= NEXT_INSN (insn
);
3425 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3432 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3433 This routine does not look inside SEQUENCEs. */
3436 prev_nonnote_nondebug_insn (rtx uncast_insn
)
3438 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3442 insn
= PREV_INSN (insn
);
3443 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3450 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3451 or 0, if there is none. This routine does not look inside
3455 next_real_insn (rtx uncast_insn
)
3457 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3461 insn
= NEXT_INSN (insn
);
3462 if (insn
== 0 || INSN_P (insn
))
3469 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3470 or 0, if there is none. This routine does not look inside
3474 prev_real_insn (rtx uncast_insn
)
3476 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3480 insn
= PREV_INSN (insn
);
3481 if (insn
== 0 || INSN_P (insn
))
3488 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3489 This routine does not look inside SEQUENCEs. */
3492 last_call_insn (void)
3496 for (insn
= get_last_insn ();
3497 insn
&& !CALL_P (insn
);
3498 insn
= PREV_INSN (insn
))
3501 return safe_as_a
<rtx_call_insn
*> (insn
);
3504 /* Find the next insn after INSN that really does something. This routine
3505 does not look inside SEQUENCEs. After reload this also skips over
3506 standalone USE and CLOBBER insn. */
3509 active_insn_p (const_rtx insn
)
3511 return (CALL_P (insn
) || JUMP_P (insn
)
3512 || JUMP_TABLE_DATA_P (insn
) /* FIXME */
3513 || (NONJUMP_INSN_P (insn
)
3514 && (! reload_completed
3515 || (GET_CODE (PATTERN (insn
)) != USE
3516 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3520 next_active_insn (rtx uncast_insn
)
3522 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3526 insn
= NEXT_INSN (insn
);
3527 if (insn
== 0 || active_insn_p (insn
))
3534 /* Find the last insn before INSN that really does something. This routine
3535 does not look inside SEQUENCEs. After reload this also skips over
3536 standalone USE and CLOBBER insn. */
3539 prev_active_insn (rtx uncast_insn
)
3541 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3545 insn
= PREV_INSN (insn
);
3546 if (insn
== 0 || active_insn_p (insn
))
3553 /* Return the next insn that uses CC0 after INSN, which is assumed to
3554 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3555 applied to the result of this function should yield INSN).
3557 Normally, this is simply the next insn. However, if a REG_CC_USER note
3558 is present, it contains the insn that uses CC0.
3560 Return 0 if we can't find the insn. */
3563 next_cc0_user (rtx uncast_insn
)
3565 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3567 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3570 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3572 insn
= next_nonnote_insn (insn
);
3573 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3574 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3576 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3582 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3583 note, it is the previous insn. */
3586 prev_cc0_setter (rtx_insn
*insn
)
3588 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3591 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3593 insn
= prev_nonnote_insn (insn
);
3594 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3600 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3603 find_auto_inc (const_rtx x
, const_rtx reg
)
3605 subrtx_iterator::array_type array
;
3606 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
3608 const_rtx x
= *iter
;
3609 if (GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
3610 && rtx_equal_p (reg
, XEXP (x
, 0)))
3617 /* Increment the label uses for all labels present in rtx. */
3620 mark_label_nuses (rtx x
)
3626 code
= GET_CODE (x
);
3627 if (code
== LABEL_REF
&& LABEL_P (LABEL_REF_LABEL (x
)))
3628 LABEL_NUSES (LABEL_REF_LABEL (x
))++;
3630 fmt
= GET_RTX_FORMAT (code
);
3631 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3634 mark_label_nuses (XEXP (x
, i
));
3635 else if (fmt
[i
] == 'E')
3636 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3637 mark_label_nuses (XVECEXP (x
, i
, j
));
3642 /* Try splitting insns that can be split for better scheduling.
3643 PAT is the pattern which might split.
3644 TRIAL is the insn providing PAT.
3645 LAST is nonzero if we should return the last insn of the sequence produced.
3647 If this routine succeeds in splitting, it returns the first or last
3648 replacement insn depending on the value of LAST. Otherwise, it
3649 returns TRIAL. If the insn to be returned can be split, it will be. */
3652 try_split (rtx pat
, rtx uncast_trial
, int last
)
3654 rtx_insn
*trial
= as_a
<rtx_insn
*> (uncast_trial
);
3655 rtx_insn
*before
= PREV_INSN (trial
);
3656 rtx_insn
*after
= NEXT_INSN (trial
);
3658 rtx_insn
*seq
, *tem
;
3660 rtx_insn
*insn_last
, *insn
;
3662 rtx call_insn
= NULL_RTX
;
3664 /* We're not good at redistributing frame information. */
3665 if (RTX_FRAME_RELATED_P (trial
))
3668 if (any_condjump_p (trial
)
3669 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3670 split_branch_probability
= XINT (note
, 0);
3671 probability
= split_branch_probability
;
3673 seq
= safe_as_a
<rtx_insn
*> (split_insns (pat
, trial
));
3675 split_branch_probability
= -1;
3680 /* Avoid infinite loop if any insn of the result matches
3681 the original pattern. */
3685 if (INSN_P (insn_last
)
3686 && rtx_equal_p (PATTERN (insn_last
), pat
))
3688 if (!NEXT_INSN (insn_last
))
3690 insn_last
= NEXT_INSN (insn_last
);
3693 /* We will be adding the new sequence to the function. The splitters
3694 may have introduced invalid RTL sharing, so unshare the sequence now. */
3695 unshare_all_rtl_in_chain (seq
);
3697 /* Mark labels and copy flags. */
3698 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3703 CROSSING_JUMP_P (insn
) = CROSSING_JUMP_P (trial
);
3704 mark_jump_label (PATTERN (insn
), insn
, 0);
3706 if (probability
!= -1
3707 && any_condjump_p (insn
)
3708 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3710 /* We can preserve the REG_BR_PROB notes only if exactly
3711 one jump is created, otherwise the machine description
3712 is responsible for this step using
3713 split_branch_probability variable. */
3714 gcc_assert (njumps
== 1);
3715 add_int_reg_note (insn
, REG_BR_PROB
, probability
);
3720 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3721 in SEQ and copy any additional information across. */
3724 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3730 gcc_assert (call_insn
== NULL_RTX
);
3733 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3734 target may have explicitly specified. */
3735 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3738 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3740 /* If the old call was a sibling call, the new one must
3742 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3744 /* If the new call is the last instruction in the sequence,
3745 it will effectively replace the old call in-situ. Otherwise
3746 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3747 so that it comes immediately after the new call. */
3748 if (NEXT_INSN (insn
))
3749 for (next
= NEXT_INSN (trial
);
3750 next
&& NOTE_P (next
);
3751 next
= NEXT_INSN (next
))
3752 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3755 add_insn_after (next
, insn
, NULL
);
3761 /* Copy notes, particularly those related to the CFG. */
3762 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3764 switch (REG_NOTE_KIND (note
))
3767 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3773 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3776 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3780 case REG_NON_LOCAL_GOTO
:
3781 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3784 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3790 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3792 rtx reg
= XEXP (note
, 0);
3793 if (!FIND_REG_INC_NOTE (insn
, reg
)
3794 && find_auto_inc (PATTERN (insn
), reg
))
3795 add_reg_note (insn
, REG_INC
, reg
);
3801 fixup_args_size_notes (NULL
, insn_last
, INTVAL (XEXP (note
, 0)));
3805 gcc_assert (call_insn
!= NULL_RTX
);
3806 add_reg_note (call_insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3814 /* If there are LABELS inside the split insns increment the
3815 usage count so we don't delete the label. */
3819 while (insn
!= NULL_RTX
)
3821 /* JUMP_P insns have already been "marked" above. */
3822 if (NONJUMP_INSN_P (insn
))
3823 mark_label_nuses (PATTERN (insn
));
3825 insn
= PREV_INSN (insn
);
3829 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3831 delete_insn (trial
);
3833 /* Recursively call try_split for each new insn created; by the
3834 time control returns here that insn will be fully split, so
3835 set LAST and continue from the insn after the one returned.
3836 We can't use next_active_insn here since AFTER may be a note.
3837 Ignore deleted insns, which can be occur if not optimizing. */
3838 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3839 if (! tem
->deleted () && INSN_P (tem
))
3840 tem
= try_split (PATTERN (tem
), tem
, 1);
3842 /* Return either the first or the last insn, depending on which was
3845 ? (after
? PREV_INSN (after
) : get_last_insn ())
3846 : NEXT_INSN (before
);
3849 /* Make and return an INSN rtx, initializing all its slots.
3850 Store PATTERN in the pattern slots. */
3853 make_insn_raw (rtx pattern
)
3857 insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
3859 INSN_UID (insn
) = cur_insn_uid
++;
3860 PATTERN (insn
) = pattern
;
3861 INSN_CODE (insn
) = -1;
3862 REG_NOTES (insn
) = NULL
;
3863 INSN_LOCATION (insn
) = curr_insn_location ();
3864 BLOCK_FOR_INSN (insn
) = NULL
;
3866 #ifdef ENABLE_RTL_CHECKING
3869 && (returnjump_p (insn
)
3870 || (GET_CODE (insn
) == SET
3871 && SET_DEST (insn
) == pc_rtx
)))
3873 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3881 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3884 make_debug_insn_raw (rtx pattern
)
3886 rtx_debug_insn
*insn
;
3888 insn
= as_a
<rtx_debug_insn
*> (rtx_alloc (DEBUG_INSN
));
3889 INSN_UID (insn
) = cur_debug_insn_uid
++;
3890 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3891 INSN_UID (insn
) = cur_insn_uid
++;
3893 PATTERN (insn
) = pattern
;
3894 INSN_CODE (insn
) = -1;
3895 REG_NOTES (insn
) = NULL
;
3896 INSN_LOCATION (insn
) = curr_insn_location ();
3897 BLOCK_FOR_INSN (insn
) = NULL
;
3902 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3905 make_jump_insn_raw (rtx pattern
)
3907 rtx_jump_insn
*insn
;
3909 insn
= as_a
<rtx_jump_insn
*> (rtx_alloc (JUMP_INSN
));
3910 INSN_UID (insn
) = cur_insn_uid
++;
3912 PATTERN (insn
) = pattern
;
3913 INSN_CODE (insn
) = -1;
3914 REG_NOTES (insn
) = NULL
;
3915 JUMP_LABEL (insn
) = NULL
;
3916 INSN_LOCATION (insn
) = curr_insn_location ();
3917 BLOCK_FOR_INSN (insn
) = NULL
;
3922 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3925 make_call_insn_raw (rtx pattern
)
3927 rtx_call_insn
*insn
;
3929 insn
= as_a
<rtx_call_insn
*> (rtx_alloc (CALL_INSN
));
3930 INSN_UID (insn
) = cur_insn_uid
++;
3932 PATTERN (insn
) = pattern
;
3933 INSN_CODE (insn
) = -1;
3934 REG_NOTES (insn
) = NULL
;
3935 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3936 INSN_LOCATION (insn
) = curr_insn_location ();
3937 BLOCK_FOR_INSN (insn
) = NULL
;
3942 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3945 make_note_raw (enum insn_note subtype
)
3947 /* Some notes are never created this way at all. These notes are
3948 only created by patching out insns. */
3949 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3950 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3952 rtx_note
*note
= as_a
<rtx_note
*> (rtx_alloc (NOTE
));
3953 INSN_UID (note
) = cur_insn_uid
++;
3954 NOTE_KIND (note
) = subtype
;
3955 BLOCK_FOR_INSN (note
) = NULL
;
3956 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3960 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3961 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3962 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3965 link_insn_into_chain (rtx_insn
*insn
, rtx_insn
*prev
, rtx_insn
*next
)
3967 SET_PREV_INSN (insn
) = prev
;
3968 SET_NEXT_INSN (insn
) = next
;
3971 SET_NEXT_INSN (prev
) = insn
;
3972 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3974 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (prev
));
3975 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = insn
;
3980 SET_PREV_INSN (next
) = insn
;
3981 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3983 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (next
));
3984 SET_PREV_INSN (sequence
->insn (0)) = insn
;
3988 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3990 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (insn
));
3991 SET_PREV_INSN (sequence
->insn (0)) = prev
;
3992 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = next
;
3996 /* Add INSN to the end of the doubly-linked list.
3997 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
4000 add_insn (rtx_insn
*insn
)
4002 rtx_insn
*prev
= get_last_insn ();
4003 link_insn_into_chain (insn
, prev
, NULL
);
4004 if (NULL
== get_insns ())
4005 set_first_insn (insn
);
4006 set_last_insn (insn
);
4009 /* Add INSN into the doubly-linked list after insn AFTER. */
4012 add_insn_after_nobb (rtx_insn
*insn
, rtx_insn
*after
)
4014 rtx_insn
*next
= NEXT_INSN (after
);
4016 gcc_assert (!optimize
|| !after
->deleted ());
4018 link_insn_into_chain (insn
, after
, next
);
4022 struct sequence_stack
*seq
;
4024 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4025 if (after
== seq
->last
)
4033 /* Add INSN into the doubly-linked list before insn BEFORE. */
4036 add_insn_before_nobb (rtx_insn
*insn
, rtx_insn
*before
)
4038 rtx_insn
*prev
= PREV_INSN (before
);
4040 gcc_assert (!optimize
|| !before
->deleted ());
4042 link_insn_into_chain (insn
, prev
, before
);
4046 struct sequence_stack
*seq
;
4048 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4049 if (before
== seq
->first
)
4059 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
4060 If BB is NULL, an attempt is made to infer the bb from before.
4062 This and the next function should be the only functions called
4063 to insert an insn once delay slots have been filled since only
4064 they know how to update a SEQUENCE. */
4067 add_insn_after (rtx uncast_insn
, rtx uncast_after
, basic_block bb
)
4069 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4070 rtx_insn
*after
= as_a
<rtx_insn
*> (uncast_after
);
4071 add_insn_after_nobb (insn
, after
);
4072 if (!BARRIER_P (after
)
4073 && !BARRIER_P (insn
)
4074 && (bb
= BLOCK_FOR_INSN (after
)))
4076 set_block_for_insn (insn
, bb
);
4078 df_insn_rescan (insn
);
4079 /* Should not happen as first in the BB is always
4080 either NOTE or LABEL. */
4081 if (BB_END (bb
) == after
4082 /* Avoid clobbering of structure when creating new BB. */
4083 && !BARRIER_P (insn
)
4084 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
4089 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4090 If BB is NULL, an attempt is made to infer the bb from before.
4092 This and the previous function should be the only functions called
4093 to insert an insn once delay slots have been filled since only
4094 they know how to update a SEQUENCE. */
4097 add_insn_before (rtx uncast_insn
, rtx uncast_before
, basic_block bb
)
4099 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4100 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4101 add_insn_before_nobb (insn
, before
);
4104 && !BARRIER_P (before
)
4105 && !BARRIER_P (insn
))
4106 bb
= BLOCK_FOR_INSN (before
);
4110 set_block_for_insn (insn
, bb
);
4112 df_insn_rescan (insn
);
4113 /* Should not happen as first in the BB is always either NOTE or
4115 gcc_assert (BB_HEAD (bb
) != insn
4116 /* Avoid clobbering of structure when creating new BB. */
4118 || NOTE_INSN_BASIC_BLOCK_P (insn
));
4122 /* Replace insn with an deleted instruction note. */
4125 set_insn_deleted (rtx insn
)
4128 df_insn_delete (as_a
<rtx_insn
*> (insn
));
4129 PUT_CODE (insn
, NOTE
);
4130 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
4134 /* Unlink INSN from the insn chain.
4136 This function knows how to handle sequences.
4138 This function does not invalidate data flow information associated with
4139 INSN (i.e. does not call df_insn_delete). That makes this function
4140 usable for only disconnecting an insn from the chain, and re-emit it
4143 To later insert INSN elsewhere in the insn chain via add_insn and
4144 similar functions, PREV_INSN and NEXT_INSN must be nullified by
4145 the caller. Nullifying them here breaks many insn chain walks.
4147 To really delete an insn and related DF information, use delete_insn. */
4150 remove_insn (rtx uncast_insn
)
4152 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4153 rtx_insn
*next
= NEXT_INSN (insn
);
4154 rtx_insn
*prev
= PREV_INSN (insn
);
4159 SET_NEXT_INSN (prev
) = next
;
4160 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
4162 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (prev
));
4163 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = next
;
4168 struct sequence_stack
*seq
;
4170 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4171 if (insn
== seq
->first
)
4182 SET_PREV_INSN (next
) = prev
;
4183 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
4185 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (next
));
4186 SET_PREV_INSN (sequence
->insn (0)) = prev
;
4191 struct sequence_stack
*seq
;
4193 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4194 if (insn
== seq
->last
)
4203 /* Fix up basic block boundaries, if necessary. */
4204 if (!BARRIER_P (insn
)
4205 && (bb
= BLOCK_FOR_INSN (insn
)))
4207 if (BB_HEAD (bb
) == insn
)
4209 /* Never ever delete the basic block note without deleting whole
4211 gcc_assert (!NOTE_P (insn
));
4212 BB_HEAD (bb
) = next
;
4214 if (BB_END (bb
) == insn
)
4219 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4222 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4224 gcc_assert (call_insn
&& CALL_P (call_insn
));
4226 /* Put the register usage information on the CALL. If there is already
4227 some usage information, put ours at the end. */
4228 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4232 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4233 link
= XEXP (link
, 1))
4236 XEXP (link
, 1) = call_fusage
;
4239 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4242 /* Delete all insns made since FROM.
4243 FROM becomes the new last instruction. */
4246 delete_insns_since (rtx_insn
*from
)
4251 SET_NEXT_INSN (from
) = 0;
4252 set_last_insn (from
);
4255 /* This function is deprecated, please use sequences instead.
4257 Move a consecutive bunch of insns to a different place in the chain.
4258 The insns to be moved are those between FROM and TO.
4259 They are moved to a new position after the insn AFTER.
4260 AFTER must not be FROM or TO or any insn in between.
4262 This function does not know about SEQUENCEs and hence should not be
4263 called after delay-slot filling has been done. */
4266 reorder_insns_nobb (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4268 #ifdef ENABLE_CHECKING
4270 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4271 gcc_assert (after
!= x
);
4272 gcc_assert (after
!= to
);
4275 /* Splice this bunch out of where it is now. */
4276 if (PREV_INSN (from
))
4277 SET_NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4279 SET_PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4280 if (get_last_insn () == to
)
4281 set_last_insn (PREV_INSN (from
));
4282 if (get_insns () == from
)
4283 set_first_insn (NEXT_INSN (to
));
4285 /* Make the new neighbors point to it and it to them. */
4286 if (NEXT_INSN (after
))
4287 SET_PREV_INSN (NEXT_INSN (after
)) = to
;
4289 SET_NEXT_INSN (to
) = NEXT_INSN (after
);
4290 SET_PREV_INSN (from
) = after
;
4291 SET_NEXT_INSN (after
) = from
;
4292 if (after
== get_last_insn ())
4296 /* Same as function above, but take care to update BB boundaries. */
4298 reorder_insns (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4300 rtx_insn
*prev
= PREV_INSN (from
);
4301 basic_block bb
, bb2
;
4303 reorder_insns_nobb (from
, to
, after
);
4305 if (!BARRIER_P (after
)
4306 && (bb
= BLOCK_FOR_INSN (after
)))
4309 df_set_bb_dirty (bb
);
4311 if (!BARRIER_P (from
)
4312 && (bb2
= BLOCK_FOR_INSN (from
)))
4314 if (BB_END (bb2
) == to
)
4315 BB_END (bb2
) = prev
;
4316 df_set_bb_dirty (bb2
);
4319 if (BB_END (bb
) == after
)
4322 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4324 df_insn_change_bb (x
, bb
);
4329 /* Emit insn(s) of given code and pattern
4330 at a specified place within the doubly-linked list.
4332 All of the emit_foo global entry points accept an object
4333 X which is either an insn list or a PATTERN of a single
4336 There are thus a few canonical ways to generate code and
4337 emit it at a specific place in the instruction stream. For
4338 example, consider the instruction named SPOT and the fact that
4339 we would like to emit some instructions before SPOT. We might
4343 ... emit the new instructions ...
4344 insns_head = get_insns ();
4347 emit_insn_before (insns_head, SPOT);
4349 It used to be common to generate SEQUENCE rtl instead, but that
4350 is a relic of the past which no longer occurs. The reason is that
4351 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4352 generated would almost certainly die right after it was created. */
4355 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4356 rtx_insn
*(*make_raw
) (rtx
))
4360 gcc_assert (before
);
4363 return safe_as_a
<rtx_insn
*> (last
);
4365 switch (GET_CODE (x
))
4374 insn
= as_a
<rtx_insn
*> (x
);
4377 rtx_insn
*next
= NEXT_INSN (insn
);
4378 add_insn_before (insn
, before
, bb
);
4384 #ifdef ENABLE_RTL_CHECKING
4391 last
= (*make_raw
) (x
);
4392 add_insn_before (last
, before
, bb
);
4396 return safe_as_a
<rtx_insn
*> (last
);
4399 /* Make X be output before the instruction BEFORE. */
4402 emit_insn_before_noloc (rtx x
, rtx_insn
*before
, basic_block bb
)
4404 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4407 /* Make an instruction with body X and code JUMP_INSN
4408 and output it before the instruction BEFORE. */
4411 emit_jump_insn_before_noloc (rtx x
, rtx_insn
*before
)
4413 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4414 make_jump_insn_raw
);
4417 /* Make an instruction with body X and code CALL_INSN
4418 and output it before the instruction BEFORE. */
4421 emit_call_insn_before_noloc (rtx x
, rtx_insn
*before
)
4423 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4424 make_call_insn_raw
);
4427 /* Make an instruction with body X and code DEBUG_INSN
4428 and output it before the instruction BEFORE. */
4431 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4433 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4434 make_debug_insn_raw
);
4437 /* Make an insn of code BARRIER
4438 and output it before the insn BEFORE. */
4441 emit_barrier_before (rtx before
)
4443 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4445 INSN_UID (insn
) = cur_insn_uid
++;
4447 add_insn_before (insn
, before
, NULL
);
4451 /* Emit the label LABEL before the insn BEFORE. */
4454 emit_label_before (rtx label
, rtx_insn
*before
)
4456 gcc_checking_assert (INSN_UID (label
) == 0);
4457 INSN_UID (label
) = cur_insn_uid
++;
4458 add_insn_before (label
, before
, NULL
);
4459 return as_a
<rtx_insn
*> (label
);
4462 /* Helper for emit_insn_after, handles lists of instructions
4466 emit_insn_after_1 (rtx_insn
*first
, rtx uncast_after
, basic_block bb
)
4468 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4470 rtx_insn
*after_after
;
4471 if (!bb
&& !BARRIER_P (after
))
4472 bb
= BLOCK_FOR_INSN (after
);
4476 df_set_bb_dirty (bb
);
4477 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4478 if (!BARRIER_P (last
))
4480 set_block_for_insn (last
, bb
);
4481 df_insn_rescan (last
);
4483 if (!BARRIER_P (last
))
4485 set_block_for_insn (last
, bb
);
4486 df_insn_rescan (last
);
4488 if (BB_END (bb
) == after
)
4492 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4495 after_after
= NEXT_INSN (after
);
4497 SET_NEXT_INSN (after
) = first
;
4498 SET_PREV_INSN (first
) = after
;
4499 SET_NEXT_INSN (last
) = after_after
;
4501 SET_PREV_INSN (after_after
) = last
;
4503 if (after
== get_last_insn ())
4504 set_last_insn (last
);
4510 emit_pattern_after_noloc (rtx x
, rtx uncast_after
, basic_block bb
,
4511 rtx_insn
*(*make_raw
)(rtx
))
4513 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4514 rtx_insn
*last
= after
;
4521 switch (GET_CODE (x
))
4530 last
= emit_insn_after_1 (as_a
<rtx_insn
*> (x
), after
, bb
);
4533 #ifdef ENABLE_RTL_CHECKING
4540 last
= (*make_raw
) (x
);
4541 add_insn_after (last
, after
, bb
);
4548 /* Make X be output after the insn AFTER and set the BB of insn. If
4549 BB is NULL, an attempt is made to infer the BB from AFTER. */
4552 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4554 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4558 /* Make an insn of code JUMP_INSN with body X
4559 and output it after the insn AFTER. */
4562 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4564 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4567 /* Make an instruction with body X and code CALL_INSN
4568 and output it after the instruction AFTER. */
4571 emit_call_insn_after_noloc (rtx x
, rtx after
)
4573 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4576 /* Make an instruction with body X and code CALL_INSN
4577 and output it after the instruction AFTER. */
4580 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4582 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4585 /* Make an insn of code BARRIER
4586 and output it after the insn AFTER. */
4589 emit_barrier_after (rtx after
)
4591 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4593 INSN_UID (insn
) = cur_insn_uid
++;
4595 add_insn_after (insn
, after
, NULL
);
4599 /* Emit the label LABEL after the insn AFTER. */
4602 emit_label_after (rtx label
, rtx_insn
*after
)
4604 gcc_checking_assert (INSN_UID (label
) == 0);
4605 INSN_UID (label
) = cur_insn_uid
++;
4606 add_insn_after (label
, after
, NULL
);
4607 return as_a
<rtx_insn
*> (label
);
4610 /* Notes require a bit of special handling: Some notes need to have their
4611 BLOCK_FOR_INSN set, others should never have it set, and some should
4612 have it set or clear depending on the context. */
4614 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4615 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4616 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4619 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4623 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4624 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4627 /* Notes for var tracking and EH region markers can appear between or
4628 inside basic blocks. If the caller is emitting on the basic block
4629 boundary, do not set BLOCK_FOR_INSN on the new note. */
4630 case NOTE_INSN_VAR_LOCATION
:
4631 case NOTE_INSN_CALL_ARG_LOCATION
:
4632 case NOTE_INSN_EH_REGION_BEG
:
4633 case NOTE_INSN_EH_REGION_END
:
4634 return on_bb_boundary_p
;
4636 /* Otherwise, BLOCK_FOR_INSN must be set. */
4642 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4645 emit_note_after (enum insn_note subtype
, rtx_insn
*after
)
4647 rtx_note
*note
= make_note_raw (subtype
);
4648 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4649 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4651 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4652 add_insn_after_nobb (note
, after
);
4654 add_insn_after (note
, after
, bb
);
4658 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4661 emit_note_before (enum insn_note subtype
, rtx_insn
*before
)
4663 rtx_note
*note
= make_note_raw (subtype
);
4664 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4665 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4667 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4668 add_insn_before_nobb (note
, before
);
4670 add_insn_before (note
, before
, bb
);
4674 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4675 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4678 emit_pattern_after_setloc (rtx pattern
, rtx uncast_after
, int loc
,
4679 rtx_insn
*(*make_raw
) (rtx
))
4681 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4682 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4684 if (pattern
== NULL_RTX
|| !loc
)
4685 return safe_as_a
<rtx_insn
*> (last
);
4687 after
= NEXT_INSN (after
);
4690 if (active_insn_p (after
)
4691 && !JUMP_TABLE_DATA_P (after
) /* FIXME */
4692 && !INSN_LOCATION (after
))
4693 INSN_LOCATION (after
) = loc
;
4696 after
= NEXT_INSN (after
);
4698 return safe_as_a
<rtx_insn
*> (last
);
4701 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4702 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4706 emit_pattern_after (rtx pattern
, rtx uncast_after
, bool skip_debug_insns
,
4707 rtx_insn
*(*make_raw
) (rtx
))
4709 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4710 rtx_insn
*prev
= after
;
4712 if (skip_debug_insns
)
4713 while (DEBUG_INSN_P (prev
))
4714 prev
= PREV_INSN (prev
);
4717 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4720 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4723 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4725 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4727 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4730 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4732 emit_insn_after (rtx pattern
, rtx after
)
4734 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4737 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4739 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4741 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4744 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4746 emit_jump_insn_after (rtx pattern
, rtx after
)
4748 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4751 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4753 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4755 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4758 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4760 emit_call_insn_after (rtx pattern
, rtx after
)
4762 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4765 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4767 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4769 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4772 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4774 emit_debug_insn_after (rtx pattern
, rtx after
)
4776 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4779 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4780 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4781 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4785 emit_pattern_before_setloc (rtx pattern
, rtx uncast_before
, int loc
, bool insnp
,
4786 rtx_insn
*(*make_raw
) (rtx
))
4788 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4789 rtx_insn
*first
= PREV_INSN (before
);
4790 rtx_insn
*last
= emit_pattern_before_noloc (pattern
, before
,
4791 insnp
? before
: NULL_RTX
,
4794 if (pattern
== NULL_RTX
|| !loc
)
4798 first
= get_insns ();
4800 first
= NEXT_INSN (first
);
4803 if (active_insn_p (first
)
4804 && !JUMP_TABLE_DATA_P (first
) /* FIXME */
4805 && !INSN_LOCATION (first
))
4806 INSN_LOCATION (first
) = loc
;
4809 first
= NEXT_INSN (first
);
4814 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4815 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4816 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4817 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4820 emit_pattern_before (rtx pattern
, rtx uncast_before
, bool skip_debug_insns
,
4821 bool insnp
, rtx_insn
*(*make_raw
) (rtx
))
4823 rtx_insn
*before
= safe_as_a
<rtx_insn
*> (uncast_before
);
4824 rtx_insn
*next
= before
;
4826 if (skip_debug_insns
)
4827 while (DEBUG_INSN_P (next
))
4828 next
= PREV_INSN (next
);
4831 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4834 return emit_pattern_before_noloc (pattern
, before
,
4835 insnp
? before
: NULL_RTX
,
4839 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4841 emit_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4843 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4847 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4849 emit_insn_before (rtx pattern
, rtx before
)
4851 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4854 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4856 emit_jump_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4858 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4859 make_jump_insn_raw
);
4862 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4864 emit_jump_insn_before (rtx pattern
, rtx before
)
4866 return emit_pattern_before (pattern
, before
, true, false,
4867 make_jump_insn_raw
);
4870 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4872 emit_call_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4874 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4875 make_call_insn_raw
);
4878 /* Like emit_call_insn_before_noloc,
4879 but set insn_location according to BEFORE. */
4881 emit_call_insn_before (rtx pattern
, rtx_insn
*before
)
4883 return emit_pattern_before (pattern
, before
, true, false,
4884 make_call_insn_raw
);
4887 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4889 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4891 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4892 make_debug_insn_raw
);
4895 /* Like emit_debug_insn_before_noloc,
4896 but set insn_location according to BEFORE. */
4898 emit_debug_insn_before (rtx pattern
, rtx_insn
*before
)
4900 return emit_pattern_before (pattern
, before
, false, false,
4901 make_debug_insn_raw
);
4904 /* Take X and emit it at the end of the doubly-linked
4907 Returns the last insn emitted. */
4912 rtx_insn
*last
= get_last_insn ();
4918 switch (GET_CODE (x
))
4927 insn
= as_a
<rtx_insn
*> (x
);
4930 rtx_insn
*next
= NEXT_INSN (insn
);
4937 #ifdef ENABLE_RTL_CHECKING
4938 case JUMP_TABLE_DATA
:
4945 last
= make_insn_raw (x
);
4953 /* Make an insn of code DEBUG_INSN with pattern X
4954 and add it to the end of the doubly-linked list. */
4957 emit_debug_insn (rtx x
)
4959 rtx_insn
*last
= get_last_insn ();
4965 switch (GET_CODE (x
))
4974 insn
= as_a
<rtx_insn
*> (x
);
4977 rtx_insn
*next
= NEXT_INSN (insn
);
4984 #ifdef ENABLE_RTL_CHECKING
4985 case JUMP_TABLE_DATA
:
4992 last
= make_debug_insn_raw (x
);
5000 /* Make an insn of code JUMP_INSN with pattern X
5001 and add it to the end of the doubly-linked list. */
5004 emit_jump_insn (rtx x
)
5006 rtx_insn
*last
= NULL
;
5009 switch (GET_CODE (x
))
5018 insn
= as_a
<rtx_insn
*> (x
);
5021 rtx_insn
*next
= NEXT_INSN (insn
);
5028 #ifdef ENABLE_RTL_CHECKING
5029 case JUMP_TABLE_DATA
:
5036 last
= make_jump_insn_raw (x
);
5044 /* Make an insn of code CALL_INSN with pattern X
5045 and add it to the end of the doubly-linked list. */
5048 emit_call_insn (rtx x
)
5052 switch (GET_CODE (x
))
5061 insn
= emit_insn (x
);
5064 #ifdef ENABLE_RTL_CHECKING
5066 case JUMP_TABLE_DATA
:
5072 insn
= make_call_insn_raw (x
);
5080 /* Add the label LABEL to the end of the doubly-linked list. */
5083 emit_label (rtx label
)
5085 gcc_checking_assert (INSN_UID (label
) == 0);
5086 INSN_UID (label
) = cur_insn_uid
++;
5087 add_insn (as_a
<rtx_insn
*> (label
));
5088 return as_a
<rtx_insn
*> (label
);
5091 /* Make an insn of code JUMP_TABLE_DATA
5092 and add it to the end of the doubly-linked list. */
5094 rtx_jump_table_data
*
5095 emit_jump_table_data (rtx table
)
5097 rtx_jump_table_data
*jump_table_data
=
5098 as_a
<rtx_jump_table_data
*> (rtx_alloc (JUMP_TABLE_DATA
));
5099 INSN_UID (jump_table_data
) = cur_insn_uid
++;
5100 PATTERN (jump_table_data
) = table
;
5101 BLOCK_FOR_INSN (jump_table_data
) = NULL
;
5102 add_insn (jump_table_data
);
5103 return jump_table_data
;
5106 /* Make an insn of code BARRIER
5107 and add it to the end of the doubly-linked list. */
5112 rtx_barrier
*barrier
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
5113 INSN_UID (barrier
) = cur_insn_uid
++;
5118 /* Emit a copy of note ORIG. */
5121 emit_note_copy (rtx_note
*orig
)
5123 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
5124 rtx_note
*note
= make_note_raw (kind
);
5125 NOTE_DATA (note
) = NOTE_DATA (orig
);
5130 /* Make an insn of code NOTE or type NOTE_NO
5131 and add it to the end of the doubly-linked list. */
5134 emit_note (enum insn_note kind
)
5136 rtx_note
*note
= make_note_raw (kind
);
5141 /* Emit a clobber of lvalue X. */
5144 emit_clobber (rtx x
)
5146 /* CONCATs should not appear in the insn stream. */
5147 if (GET_CODE (x
) == CONCAT
)
5149 emit_clobber (XEXP (x
, 0));
5150 return emit_clobber (XEXP (x
, 1));
5152 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
5155 /* Return a sequence of insns to clobber lvalue X. */
5169 /* Emit a use of rvalue X. */
5174 /* CONCATs should not appear in the insn stream. */
5175 if (GET_CODE (x
) == CONCAT
)
5177 emit_use (XEXP (x
, 0));
5178 return emit_use (XEXP (x
, 1));
5180 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
5183 /* Return a sequence of insns to use rvalue X. */
5197 /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5198 Return the set in INSN that such notes describe, or NULL if the notes
5199 have no meaning for INSN. */
5202 set_for_reg_notes (rtx insn
)
5209 pat
= PATTERN (insn
);
5210 if (GET_CODE (pat
) == PARALLEL
)
5212 /* We do not use single_set because that ignores SETs of unused
5213 registers. REG_EQUAL and REG_EQUIV notes really do require the
5214 PARALLEL to have a single SET. */
5215 if (multiple_sets (insn
))
5217 pat
= XVECEXP (pat
, 0, 0);
5220 if (GET_CODE (pat
) != SET
)
5223 reg
= SET_DEST (pat
);
5225 /* Notes apply to the contents of a STRICT_LOW_PART. */
5226 if (GET_CODE (reg
) == STRICT_LOW_PART
)
5227 reg
= XEXP (reg
, 0);
5229 /* Check that we have a register. */
5230 if (!(REG_P (reg
) || GET_CODE (reg
) == SUBREG
))
5236 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5237 note of this type already exists, remove it first. */
5240 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5242 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5248 if (!set_for_reg_notes (insn
))
5251 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5252 It serves no useful purpose and breaks eliminate_regs. */
5253 if (GET_CODE (datum
) == ASM_OPERANDS
)
5256 /* Notes with side effects are dangerous. Even if the side-effect
5257 initially mirrors one in PATTERN (INSN), later optimizations
5258 might alter the way that the final register value is calculated
5259 and so move or alter the side-effect in some way. The note would
5260 then no longer be a valid substitution for SET_SRC. */
5261 if (side_effects_p (datum
))
5270 XEXP (note
, 0) = datum
;
5273 add_reg_note (insn
, kind
, datum
);
5274 note
= REG_NOTES (insn
);
5281 df_notes_rescan (as_a
<rtx_insn
*> (insn
));
5290 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5292 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5294 rtx set
= set_for_reg_notes (insn
);
5296 if (set
&& SET_DEST (set
) == dst
)
5297 return set_unique_reg_note (insn
, kind
, datum
);
5301 /* Return an indication of which type of insn should have X as a body.
5302 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5304 static enum rtx_code
5305 classify_insn (rtx x
)
5309 if (GET_CODE (x
) == CALL
)
5311 if (ANY_RETURN_P (x
))
5313 if (GET_CODE (x
) == SET
)
5315 if (SET_DEST (x
) == pc_rtx
)
5317 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5322 if (GET_CODE (x
) == PARALLEL
)
5325 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5326 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5328 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5329 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5331 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5332 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5338 /* Emit the rtl pattern X as an appropriate kind of insn.
5339 If X is a label, it is simply added into the insn chain. */
5344 enum rtx_code code
= classify_insn (x
);
5349 return emit_label (x
);
5351 return emit_insn (x
);
5354 rtx_insn
*insn
= emit_jump_insn (x
);
5355 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5356 return emit_barrier ();
5360 return emit_call_insn (x
);
5362 return emit_debug_insn (x
);
5368 /* Space for free sequence stack entries. */
5369 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5371 /* Begin emitting insns to a sequence. If this sequence will contain
5372 something that might cause the compiler to pop arguments to function
5373 calls (because those pops have previously been deferred; see
5374 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5375 before calling this function. That will ensure that the deferred
5376 pops are not accidentally emitted in the middle of this sequence. */
5379 start_sequence (void)
5381 struct sequence_stack
*tem
;
5383 if (free_sequence_stack
!= NULL
)
5385 tem
= free_sequence_stack
;
5386 free_sequence_stack
= tem
->next
;
5389 tem
= ggc_alloc
<sequence_stack
> ();
5391 tem
->next
= get_current_sequence ()->next
;
5392 tem
->first
= get_insns ();
5393 tem
->last
= get_last_insn ();
5394 get_current_sequence ()->next
= tem
;
5400 /* Set up the insn chain starting with FIRST as the current sequence,
5401 saving the previously current one. See the documentation for
5402 start_sequence for more information about how to use this function. */
5405 push_to_sequence (rtx_insn
*first
)
5411 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5414 set_first_insn (first
);
5415 set_last_insn (last
);
5418 /* Like push_to_sequence, but take the last insn as an argument to avoid
5419 looping through the list. */
5422 push_to_sequence2 (rtx_insn
*first
, rtx_insn
*last
)
5426 set_first_insn (first
);
5427 set_last_insn (last
);
5430 /* Set up the outer-level insn chain
5431 as the current sequence, saving the previously current one. */
5434 push_topmost_sequence (void)
5436 struct sequence_stack
*top
;
5440 top
= get_topmost_sequence ();
5441 set_first_insn (top
->first
);
5442 set_last_insn (top
->last
);
5445 /* After emitting to the outer-level insn chain, update the outer-level
5446 insn chain, and restore the previous saved state. */
5449 pop_topmost_sequence (void)
5451 struct sequence_stack
*top
;
5453 top
= get_topmost_sequence ();
5454 top
->first
= get_insns ();
5455 top
->last
= get_last_insn ();
5460 /* After emitting to a sequence, restore previous saved state.
5462 To get the contents of the sequence just made, you must call
5463 `get_insns' *before* calling here.
5465 If the compiler might have deferred popping arguments while
5466 generating this sequence, and this sequence will not be immediately
5467 inserted into the instruction stream, use do_pending_stack_adjust
5468 before calling get_insns. That will ensure that the deferred
5469 pops are inserted into this sequence, and not into some random
5470 location in the instruction stream. See INHIBIT_DEFER_POP for more
5471 information about deferred popping of arguments. */
5476 struct sequence_stack
*tem
= get_current_sequence ()->next
;
5478 set_first_insn (tem
->first
);
5479 set_last_insn (tem
->last
);
5480 get_current_sequence ()->next
= tem
->next
;
5482 memset (tem
, 0, sizeof (*tem
));
5483 tem
->next
= free_sequence_stack
;
5484 free_sequence_stack
= tem
;
5487 /* Return 1 if currently emitting into a sequence. */
5490 in_sequence_p (void)
5492 return get_current_sequence ()->next
!= 0;
5495 /* Put the various virtual registers into REGNO_REG_RTX. */
5498 init_virtual_regs (void)
5500 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5501 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5502 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5503 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5504 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5505 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5506 = virtual_preferred_stack_boundary_rtx
;
5510 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5511 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5512 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5513 static int copy_insn_n_scratches
;
5515 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5516 copied an ASM_OPERANDS.
5517 In that case, it is the original input-operand vector. */
5518 static rtvec orig_asm_operands_vector
;
5520 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5521 copied an ASM_OPERANDS.
5522 In that case, it is the copied input-operand vector. */
5523 static rtvec copy_asm_operands_vector
;
5525 /* Likewise for the constraints vector. */
5526 static rtvec orig_asm_constraints_vector
;
5527 static rtvec copy_asm_constraints_vector
;
5529 /* Recursively create a new copy of an rtx for copy_insn.
5530 This function differs from copy_rtx in that it handles SCRATCHes and
5531 ASM_OPERANDs properly.
5532 Normally, this function is not used directly; use copy_insn as front end.
5533 However, you could first copy an insn pattern with copy_insn and then use
5534 this function afterwards to properly copy any REG_NOTEs containing
5538 copy_insn_1 (rtx orig
)
5543 const char *format_ptr
;
5548 code
= GET_CODE (orig
);
5563 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5564 clobbers or clobbers of hard registers that originated as pseudos.
5565 This is needed to allow safe register renaming. */
5566 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
5567 && ORIGINAL_REGNO (XEXP (orig
, 0)) == REGNO (XEXP (orig
, 0)))
5572 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5573 if (copy_insn_scratch_in
[i
] == orig
)
5574 return copy_insn_scratch_out
[i
];
5578 if (shared_const_p (orig
))
5582 /* A MEM with a constant address is not sharable. The problem is that
5583 the constant address may need to be reloaded. If the mem is shared,
5584 then reloading one copy of this mem will cause all copies to appear
5585 to have been reloaded. */
5591 /* Copy the various flags, fields, and other information. We assume
5592 that all fields need copying, and then clear the fields that should
5593 not be copied. That is the sensible default behavior, and forces
5594 us to explicitly document why we are *not* copying a flag. */
5595 copy
= shallow_copy_rtx (orig
);
5597 /* We do not copy the USED flag, which is used as a mark bit during
5598 walks over the RTL. */
5599 RTX_FLAG (copy
, used
) = 0;
5601 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5604 RTX_FLAG (copy
, jump
) = 0;
5605 RTX_FLAG (copy
, call
) = 0;
5606 RTX_FLAG (copy
, frame_related
) = 0;
5609 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5611 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5612 switch (*format_ptr
++)
5615 if (XEXP (orig
, i
) != NULL
)
5616 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5621 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5622 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5623 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5624 XVEC (copy
, i
) = copy_asm_operands_vector
;
5625 else if (XVEC (orig
, i
) != NULL
)
5627 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5628 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5629 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5640 /* These are left unchanged. */
5647 if (code
== SCRATCH
)
5649 i
= copy_insn_n_scratches
++;
5650 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5651 copy_insn_scratch_in
[i
] = orig
;
5652 copy_insn_scratch_out
[i
] = copy
;
5654 else if (code
== ASM_OPERANDS
)
5656 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5657 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5658 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5659 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5665 /* Create a new copy of an rtx.
5666 This function differs from copy_rtx in that it handles SCRATCHes and
5667 ASM_OPERANDs properly.
5668 INSN doesn't really have to be a full INSN; it could be just the
5671 copy_insn (rtx insn
)
5673 copy_insn_n_scratches
= 0;
5674 orig_asm_operands_vector
= 0;
5675 orig_asm_constraints_vector
= 0;
5676 copy_asm_operands_vector
= 0;
5677 copy_asm_constraints_vector
= 0;
5678 return copy_insn_1 (insn
);
5681 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5682 on that assumption that INSN itself remains in its original place. */
5685 copy_delay_slot_insn (rtx_insn
*insn
)
5687 /* Copy INSN with its rtx_code, all its notes, location etc. */
5688 insn
= as_a
<rtx_insn
*> (copy_rtx (insn
));
5689 INSN_UID (insn
) = cur_insn_uid
++;
5693 /* Initialize data structures and variables in this file
5694 before generating rtl for each function. */
5699 set_first_insn (NULL
);
5700 set_last_insn (NULL
);
5701 if (MIN_NONDEBUG_INSN_UID
)
5702 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5705 cur_debug_insn_uid
= 1;
5706 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5707 first_label_num
= label_num
;
5708 get_current_sequence ()->next
= NULL
;
5710 /* Init the tables that describe all the pseudo regs. */
5712 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5714 crtl
->emit
.regno_pointer_align
5715 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5717 regno_reg_rtx
= ggc_vec_alloc
<rtx
> (crtl
->emit
.regno_pointer_align_length
);
5719 /* Put copies of all the hard registers into regno_reg_rtx. */
5720 memcpy (regno_reg_rtx
,
5721 initial_regno_reg_rtx
,
5722 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5724 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5725 init_virtual_regs ();
5727 /* Indicate that the virtual registers and stack locations are
5729 REG_POINTER (stack_pointer_rtx
) = 1;
5730 REG_POINTER (frame_pointer_rtx
) = 1;
5731 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5732 REG_POINTER (arg_pointer_rtx
) = 1;
5734 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5735 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5736 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5737 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5738 REG_POINTER (virtual_cfa_rtx
) = 1;
5740 #ifdef STACK_BOUNDARY
5741 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5742 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5743 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5744 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5746 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5747 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5748 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5749 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5750 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5753 #ifdef INIT_EXPANDERS
5758 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5761 gen_const_vector (machine_mode mode
, int constant
)
5768 units
= GET_MODE_NUNITS (mode
);
5769 inner
= GET_MODE_INNER (mode
);
5771 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5773 v
= rtvec_alloc (units
);
5775 /* We need to call this function after we set the scalar const_tiny_rtx
5777 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5779 for (i
= 0; i
< units
; ++i
)
5780 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5782 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5786 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5787 all elements are zero, and the one vector when all elements are one. */
5789 gen_rtx_CONST_VECTOR (machine_mode mode
, rtvec v
)
5791 machine_mode inner
= GET_MODE_INNER (mode
);
5792 int nunits
= GET_MODE_NUNITS (mode
);
5796 /* Check to see if all of the elements have the same value. */
5797 x
= RTVEC_ELT (v
, nunits
- 1);
5798 for (i
= nunits
- 2; i
>= 0; i
--)
5799 if (RTVEC_ELT (v
, i
) != x
)
5802 /* If the values are all the same, check to see if we can use one of the
5803 standard constant vectors. */
5806 if (x
== CONST0_RTX (inner
))
5807 return CONST0_RTX (mode
);
5808 else if (x
== CONST1_RTX (inner
))
5809 return CONST1_RTX (mode
);
5810 else if (x
== CONSTM1_RTX (inner
))
5811 return CONSTM1_RTX (mode
);
5814 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5817 /* Initialise global register information required by all functions. */
5820 init_emit_regs (void)
5826 /* Reset register attributes */
5827 reg_attrs_htab
->empty ();
5829 /* We need reg_raw_mode, so initialize the modes now. */
5830 init_reg_modes_target ();
5832 /* Assign register numbers to the globally defined register rtx. */
5833 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5834 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5835 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5836 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5837 virtual_incoming_args_rtx
=
5838 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5839 virtual_stack_vars_rtx
=
5840 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5841 virtual_stack_dynamic_rtx
=
5842 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5843 virtual_outgoing_args_rtx
=
5844 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5845 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5846 virtual_preferred_stack_boundary_rtx
=
5847 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5849 /* Initialize RTL for commonly used hard registers. These are
5850 copied into regno_reg_rtx as we begin to compile each function. */
5851 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5852 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5854 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5855 return_address_pointer_rtx
5856 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5859 pic_offset_table_rtx
= NULL_RTX
;
5860 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5861 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5863 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5865 mode
= (machine_mode
) i
;
5866 attrs
= ggc_cleared_alloc
<mem_attrs
> ();
5867 attrs
->align
= BITS_PER_UNIT
;
5868 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5869 if (mode
!= BLKmode
)
5871 attrs
->size_known_p
= true;
5872 attrs
->size
= GET_MODE_SIZE (mode
);
5873 if (STRICT_ALIGNMENT
)
5874 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5876 mode_mem_attrs
[i
] = attrs
;
5880 /* Initialize global machine_mode variables. */
5883 init_derived_machine_modes (void)
5885 byte_mode
= VOIDmode
;
5886 word_mode
= VOIDmode
;
5888 for (machine_mode mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5890 mode
= GET_MODE_WIDER_MODE (mode
))
5892 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5893 && byte_mode
== VOIDmode
)
5896 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5897 && word_mode
== VOIDmode
)
5901 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5904 /* Create some permanent unique rtl objects shared between all functions. */
5907 init_emit_once (void)
5911 machine_mode double_mode
;
5913 /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
5914 CONST_FIXED, and memory attribute hash tables. */
5915 const_int_htab
= hash_table
<const_int_hasher
>::create_ggc (37);
5917 #if TARGET_SUPPORTS_WIDE_INT
5918 const_wide_int_htab
= hash_table
<const_wide_int_hasher
>::create_ggc (37);
5920 const_double_htab
= hash_table
<const_double_hasher
>::create_ggc (37);
5922 const_fixed_htab
= hash_table
<const_fixed_hasher
>::create_ggc (37);
5924 reg_attrs_htab
= hash_table
<reg_attr_hasher
>::create_ggc (37);
5926 #ifdef INIT_EXPANDERS
5927 /* This is to initialize {init|mark|free}_machine_status before the first
5928 call to push_function_context_to. This is needed by the Chill front
5929 end which calls push_function_context_to before the first call to
5930 init_function_start. */
5934 /* Create the unique rtx's for certain rtx codes and operand values. */
5936 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5937 tries to use these variables. */
5938 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5939 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5940 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5942 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5943 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5944 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5946 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5948 double_mode
= mode_for_size (DOUBLE_TYPE_SIZE
, MODE_FLOAT
, 0);
5950 real_from_integer (&dconst0
, double_mode
, 0, SIGNED
);
5951 real_from_integer (&dconst1
, double_mode
, 1, SIGNED
);
5952 real_from_integer (&dconst2
, double_mode
, 2, SIGNED
);
5957 dconsthalf
= dconst1
;
5958 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5960 for (i
= 0; i
< 3; i
++)
5962 const REAL_VALUE_TYPE
*const r
=
5963 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5965 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5967 mode
= GET_MODE_WIDER_MODE (mode
))
5968 const_tiny_rtx
[i
][(int) mode
] =
5969 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5971 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5973 mode
= GET_MODE_WIDER_MODE (mode
))
5974 const_tiny_rtx
[i
][(int) mode
] =
5975 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5977 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5979 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5981 mode
= GET_MODE_WIDER_MODE (mode
))
5982 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5984 for (mode
= MIN_MODE_PARTIAL_INT
;
5985 mode
<= MAX_MODE_PARTIAL_INT
;
5986 mode
= (machine_mode
)((int)(mode
) + 1))
5987 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5990 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5992 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5994 mode
= GET_MODE_WIDER_MODE (mode
))
5995 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5997 for (mode
= MIN_MODE_PARTIAL_INT
;
5998 mode
<= MAX_MODE_PARTIAL_INT
;
5999 mode
= (machine_mode
)((int)(mode
) + 1))
6000 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
6002 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
6004 mode
= GET_MODE_WIDER_MODE (mode
))
6006 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
6007 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
6010 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
6012 mode
= GET_MODE_WIDER_MODE (mode
))
6014 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
6015 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
6018 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
6020 mode
= GET_MODE_WIDER_MODE (mode
))
6022 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6023 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6024 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
6027 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
6029 mode
= GET_MODE_WIDER_MODE (mode
))
6031 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6032 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6035 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
6037 mode
= GET_MODE_WIDER_MODE (mode
))
6039 FCONST0 (mode
).data
.high
= 0;
6040 FCONST0 (mode
).data
.low
= 0;
6041 FCONST0 (mode
).mode
= mode
;
6042 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6043 FCONST0 (mode
), mode
);
6046 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
6048 mode
= GET_MODE_WIDER_MODE (mode
))
6050 FCONST0 (mode
).data
.high
= 0;
6051 FCONST0 (mode
).data
.low
= 0;
6052 FCONST0 (mode
).mode
= mode
;
6053 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6054 FCONST0 (mode
), mode
);
6057 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
6059 mode
= GET_MODE_WIDER_MODE (mode
))
6061 FCONST0 (mode
).data
.high
= 0;
6062 FCONST0 (mode
).data
.low
= 0;
6063 FCONST0 (mode
).mode
= mode
;
6064 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6065 FCONST0 (mode
), mode
);
6067 /* We store the value 1. */
6068 FCONST1 (mode
).data
.high
= 0;
6069 FCONST1 (mode
).data
.low
= 0;
6070 FCONST1 (mode
).mode
= mode
;
6072 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6073 HOST_BITS_PER_DOUBLE_INT
,
6074 SIGNED_FIXED_POINT_MODE_P (mode
));
6075 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6076 FCONST1 (mode
), mode
);
6079 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
6081 mode
= GET_MODE_WIDER_MODE (mode
))
6083 FCONST0 (mode
).data
.high
= 0;
6084 FCONST0 (mode
).data
.low
= 0;
6085 FCONST0 (mode
).mode
= mode
;
6086 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6087 FCONST0 (mode
), mode
);
6089 /* We store the value 1. */
6090 FCONST1 (mode
).data
.high
= 0;
6091 FCONST1 (mode
).data
.low
= 0;
6092 FCONST1 (mode
).mode
= mode
;
6094 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6095 HOST_BITS_PER_DOUBLE_INT
,
6096 SIGNED_FIXED_POINT_MODE_P (mode
));
6097 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6098 FCONST1 (mode
), mode
);
6101 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
6103 mode
= GET_MODE_WIDER_MODE (mode
))
6105 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6108 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
6110 mode
= GET_MODE_WIDER_MODE (mode
))
6112 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6115 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
6117 mode
= GET_MODE_WIDER_MODE (mode
))
6119 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6120 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6123 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
6125 mode
= GET_MODE_WIDER_MODE (mode
))
6127 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6128 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6131 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
6132 if (GET_MODE_CLASS ((machine_mode
) i
) == MODE_CC
)
6133 const_tiny_rtx
[0][i
] = const0_rtx
;
6135 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
6136 if (STORE_FLAG_VALUE
== 1)
6137 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
6139 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_POINTER_BOUNDS
);
6141 mode
= GET_MODE_WIDER_MODE (mode
))
6143 wide_int wi_zero
= wi::zero (GET_MODE_PRECISION (mode
));
6144 const_tiny_rtx
[0][mode
] = immed_wide_int_const (wi_zero
, mode
);
6147 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
6148 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
6149 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
6150 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
6153 /* Produce exact duplicate of insn INSN after AFTER.
6154 Care updating of libcall regions if present. */
6157 emit_copy_of_insn_after (rtx_insn
*insn
, rtx_insn
*after
)
6162 switch (GET_CODE (insn
))
6165 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
6169 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
6170 CROSSING_JUMP_P (new_rtx
) = CROSSING_JUMP_P (insn
);
6174 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
6178 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
6179 if (CALL_INSN_FUNCTION_USAGE (insn
))
6180 CALL_INSN_FUNCTION_USAGE (new_rtx
)
6181 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
6182 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
6183 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
6184 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
6185 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
6186 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
6193 /* Update LABEL_NUSES. */
6194 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
6196 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
6198 /* If the old insn is frame related, then so is the new one. This is
6199 primarily needed for IA-64 unwind info which marks epilogue insns,
6200 which may be duplicated by the basic block reordering code. */
6201 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
6203 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6204 will make them. REG_LABEL_TARGETs are created there too, but are
6205 supposed to be sticky, so we copy them. */
6206 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
6207 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
6209 if (GET_CODE (link
) == EXPR_LIST
)
6210 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
6211 copy_insn_1 (XEXP (link
, 0)));
6213 add_shallow_copy_of_reg_note (new_rtx
, link
);
6216 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6220 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6222 gen_hard_reg_clobber (machine_mode mode
, unsigned int regno
)
6224 if (hard_reg_clobbers
[mode
][regno
])
6225 return hard_reg_clobbers
[mode
][regno
];
6227 return (hard_reg_clobbers
[mode
][regno
] =
6228 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6231 location_t prologue_location
;
6232 location_t epilogue_location
;
6234 /* Hold current location information and last location information, so the
6235 datastructures are built lazily only when some instructions in given
6236 place are needed. */
6237 static location_t curr_location
;
6239 /* Allocate insn location datastructure. */
6241 insn_locations_init (void)
6243 prologue_location
= epilogue_location
= 0;
6244 curr_location
= UNKNOWN_LOCATION
;
6247 /* At the end of emit stage, clear current location. */
6249 insn_locations_finalize (void)
6251 epilogue_location
= curr_location
;
6252 curr_location
= UNKNOWN_LOCATION
;
6255 /* Set current location. */
6257 set_curr_insn_location (location_t location
)
6259 curr_location
= location
;
6262 /* Get current location. */
6264 curr_insn_location (void)
6266 return curr_location
;
6269 /* Return lexical scope block insn belongs to. */
6271 insn_scope (const rtx_insn
*insn
)
6273 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6276 /* Return line number of the statement that produced this insn. */
6278 insn_line (const rtx_insn
*insn
)
6280 return LOCATION_LINE (INSN_LOCATION (insn
));
6283 /* Return source file of the statement that produced this insn. */
6285 insn_file (const rtx_insn
*insn
)
6287 return LOCATION_FILE (INSN_LOCATION (insn
));
6290 /* Return expanded location of the statement that produced this insn. */
6292 insn_location (const rtx_insn
*insn
)
6294 return expand_location (INSN_LOCATION (insn
));
6297 /* Return true if memory model MODEL requires a pre-operation (release-style)
6298 barrier or a post-operation (acquire-style) barrier. While not universal,
6299 this function matches behavior of several targets. */
6302 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6304 switch (model
& MEMMODEL_MASK
)
6306 case MEMMODEL_RELAXED
:
6307 case MEMMODEL_CONSUME
:
6309 case MEMMODEL_RELEASE
:
6310 case MEMMODEL_SYNC_RELEASE
:
6312 case MEMMODEL_ACQUIRE
:
6313 case MEMMODEL_SYNC_ACQUIRE
:
6315 case MEMMODEL_ACQ_REL
:
6316 case MEMMODEL_SEQ_CST
:
6317 case MEMMODEL_SYNC_SEQ_CST
:
6324 #include "gt-emit-rtl.h"