1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
43 #include "double-int.h"
51 #include "fold-const.h"
54 #include "hard-reg-set.h"
57 #include "basic-block.h"
61 #include "stringpool.h"
63 #include "statistics.h"
64 #include "fixed-value.h"
65 #include "insn-config.h"
77 #include "langhooks.h"
84 struct target_rtl default_target_rtl
;
86 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
89 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
91 /* Commonly used modes. */
93 machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
94 machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
95 machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
96 machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
98 /* Datastructures maintained for currently processed function in RTL form. */
100 struct rtl_data x_rtl
;
102 /* Indexed by pseudo register number, gives the rtx for that pseudo.
103 Allocated in parallel with regno_pointer_align.
104 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
105 with length attribute nested in top level structures. */
109 /* This is *not* reset after each function. It gives each CODE_LABEL
110 in the entire compilation a unique label number. */
112 static GTY(()) int label_num
= 1;
114 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
115 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
116 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
117 is set only for MODE_INT and MODE_VECTOR_INT modes. */
119 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
123 REAL_VALUE_TYPE dconst0
;
124 REAL_VALUE_TYPE dconst1
;
125 REAL_VALUE_TYPE dconst2
;
126 REAL_VALUE_TYPE dconstm1
;
127 REAL_VALUE_TYPE dconsthalf
;
129 /* Record fixed-point constant 0 and 1. */
130 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
131 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
133 /* We make one copy of (const_int C) where C is in
134 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
135 to save space during the compilation and simplify comparisons of
138 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
140 /* Standard pieces of rtx, to be substituted directly into things. */
143 rtx simple_return_rtx
;
146 /* A hash table storing CONST_INTs whose absolute value is greater
147 than MAX_SAVED_CONST_INT. */
149 struct const_int_hasher
: ggc_cache_hasher
<rtx
>
151 typedef HOST_WIDE_INT compare_type
;
153 static hashval_t
hash (rtx i
);
154 static bool equal (rtx i
, HOST_WIDE_INT h
);
157 static GTY ((cache
)) hash_table
<const_int_hasher
> *const_int_htab
;
159 struct const_wide_int_hasher
: ggc_cache_hasher
<rtx
>
161 static hashval_t
hash (rtx x
);
162 static bool equal (rtx x
, rtx y
);
165 static GTY ((cache
)) hash_table
<const_wide_int_hasher
> *const_wide_int_htab
;
167 /* A hash table storing register attribute structures. */
168 struct reg_attr_hasher
: ggc_cache_hasher
<reg_attrs
*>
170 static hashval_t
hash (reg_attrs
*x
);
171 static bool equal (reg_attrs
*a
, reg_attrs
*b
);
174 static GTY ((cache
)) hash_table
<reg_attr_hasher
> *reg_attrs_htab
;
176 /* A hash table storing all CONST_DOUBLEs. */
177 struct const_double_hasher
: ggc_cache_hasher
<rtx
>
179 static hashval_t
hash (rtx x
);
180 static bool equal (rtx x
, rtx y
);
183 static GTY ((cache
)) hash_table
<const_double_hasher
> *const_double_htab
;
185 /* A hash table storing all CONST_FIXEDs. */
186 struct const_fixed_hasher
: ggc_cache_hasher
<rtx
>
188 static hashval_t
hash (rtx x
);
189 static bool equal (rtx x
, rtx y
);
192 static GTY ((cache
)) hash_table
<const_fixed_hasher
> *const_fixed_htab
;
194 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
195 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
196 #define first_label_num (crtl->emit.x_first_label_num)
198 static void set_used_decls (tree
);
199 static void mark_label_nuses (rtx
);
200 #if TARGET_SUPPORTS_WIDE_INT
201 static rtx
lookup_const_wide_int (rtx
);
203 static rtx
lookup_const_double (rtx
);
204 static rtx
lookup_const_fixed (rtx
);
205 static reg_attrs
*get_reg_attrs (tree
, int);
206 static rtx
gen_const_vector (machine_mode
, int);
207 static void copy_rtx_if_shared_1 (rtx
*orig
);
209 /* Probability of the conditional branch currently proceeded by try_split.
210 Set to -1 otherwise. */
211 int split_branch_probability
= -1;
213 /* Returns a hash code for X (which is a really a CONST_INT). */
216 const_int_hasher::hash (rtx x
)
218 return (hashval_t
) INTVAL (x
);
221 /* Returns nonzero if the value represented by X (which is really a
222 CONST_INT) is the same as that given by Y (which is really a
226 const_int_hasher::equal (rtx x
, HOST_WIDE_INT y
)
228 return (INTVAL (x
) == y
);
231 #if TARGET_SUPPORTS_WIDE_INT
232 /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
235 const_wide_int_hasher::hash (rtx x
)
238 unsigned HOST_WIDE_INT hash
= 0;
241 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
242 hash
+= CONST_WIDE_INT_ELT (xr
, i
);
244 return (hashval_t
) hash
;
247 /* Returns nonzero if the value represented by X (which is really a
248 CONST_WIDE_INT) is the same as that given by Y (which is really a
252 const_wide_int_hasher::equal (rtx x
, rtx y
)
257 if (CONST_WIDE_INT_NUNITS (xr
) != CONST_WIDE_INT_NUNITS (yr
))
260 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
261 if (CONST_WIDE_INT_ELT (xr
, i
) != CONST_WIDE_INT_ELT (yr
, i
))
268 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
270 const_double_hasher::hash (rtx x
)
272 const_rtx
const value
= x
;
275 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (value
) == VOIDmode
)
276 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
279 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
280 /* MODE is used in the comparison, so it should be in the hash. */
281 h
^= GET_MODE (value
);
286 /* Returns nonzero if the value represented by X (really a ...)
287 is the same as that represented by Y (really a ...) */
289 const_double_hasher::equal (rtx x
, rtx y
)
291 const_rtx
const a
= x
, b
= y
;
293 if (GET_MODE (a
) != GET_MODE (b
))
295 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (a
) == VOIDmode
)
296 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
297 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
299 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
300 CONST_DOUBLE_REAL_VALUE (b
));
303 /* Returns a hash code for X (which is really a CONST_FIXED). */
306 const_fixed_hasher::hash (rtx x
)
308 const_rtx
const value
= x
;
311 h
= fixed_hash (CONST_FIXED_VALUE (value
));
312 /* MODE is used in the comparison, so it should be in the hash. */
313 h
^= GET_MODE (value
);
317 /* Returns nonzero if the value represented by X is the same as that
321 const_fixed_hasher::equal (rtx x
, rtx y
)
323 const_rtx
const a
= x
, b
= y
;
325 if (GET_MODE (a
) != GET_MODE (b
))
327 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
330 /* Return true if the given memory attributes are equal. */
333 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
339 return (p
->alias
== q
->alias
340 && p
->offset_known_p
== q
->offset_known_p
341 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
342 && p
->size_known_p
== q
->size_known_p
343 && (!p
->size_known_p
|| p
->size
== q
->size
)
344 && p
->align
== q
->align
345 && p
->addrspace
== q
->addrspace
346 && (p
->expr
== q
->expr
347 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
348 && operand_equal_p (p
->expr
, q
->expr
, 0))));
351 /* Set MEM's memory attributes so that they are the same as ATTRS. */
354 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
356 /* If everything is the default, we can just clear the attributes. */
357 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
364 || !mem_attrs_eq_p (attrs
, MEM_ATTRS (mem
)))
366 MEM_ATTRS (mem
) = ggc_alloc
<mem_attrs
> ();
367 memcpy (MEM_ATTRS (mem
), attrs
, sizeof (mem_attrs
));
371 /* Returns a hash code for X (which is a really a reg_attrs *). */
374 reg_attr_hasher::hash (reg_attrs
*x
)
376 const reg_attrs
*const p
= x
;
378 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
381 /* Returns nonzero if the value represented by X is the same as that given by
385 reg_attr_hasher::equal (reg_attrs
*x
, reg_attrs
*y
)
387 const reg_attrs
*const p
= x
;
388 const reg_attrs
*const q
= y
;
390 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
392 /* Allocate a new reg_attrs structure and insert it into the hash table if
393 one identical to it is not already in the table. We are doing this for
397 get_reg_attrs (tree decl
, int offset
)
401 /* If everything is the default, we can just return zero. */
402 if (decl
== 0 && offset
== 0)
406 attrs
.offset
= offset
;
408 reg_attrs
**slot
= reg_attrs_htab
->find_slot (&attrs
, INSERT
);
411 *slot
= ggc_alloc
<reg_attrs
> ();
412 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
420 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
421 and to block register equivalences to be seen across this insn. */
426 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
427 MEM_VOLATILE_P (x
) = true;
433 /* Set the mode and register number of X to MODE and REGNO. */
436 set_mode_and_regno (rtx x
, machine_mode mode
, unsigned int regno
)
438 unsigned int nregs
= (HARD_REGISTER_NUM_P (regno
)
439 ? hard_regno_nregs
[regno
][mode
]
441 PUT_MODE_RAW (x
, mode
);
442 set_regno_raw (x
, regno
, nregs
);
445 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
446 don't attempt to share with the various global pieces of rtl (such as
447 frame_pointer_rtx). */
450 gen_raw_REG (machine_mode mode
, unsigned int regno
)
452 rtx x
= rtx_alloc_stat (REG PASS_MEM_STAT
);
453 set_mode_and_regno (x
, mode
, regno
);
454 REG_ATTRS (x
) = NULL
;
455 ORIGINAL_REGNO (x
) = regno
;
459 /* There are some RTL codes that require special attention; the generation
460 functions do the raw handling. If you add to this list, modify
461 special_rtx in gengenrtl.c as well. */
464 gen_rtx_EXPR_LIST (machine_mode mode
, rtx expr
, rtx expr_list
)
466 return as_a
<rtx_expr_list
*> (gen_rtx_fmt_ee (EXPR_LIST
, mode
, expr
,
471 gen_rtx_INSN_LIST (machine_mode mode
, rtx insn
, rtx insn_list
)
473 return as_a
<rtx_insn_list
*> (gen_rtx_fmt_ue (INSN_LIST
, mode
, insn
,
478 gen_rtx_INSN (machine_mode mode
, rtx_insn
*prev_insn
, rtx_insn
*next_insn
,
479 basic_block bb
, rtx pattern
, int location
, int code
,
482 return as_a
<rtx_insn
*> (gen_rtx_fmt_uuBeiie (INSN
, mode
,
483 prev_insn
, next_insn
,
484 bb
, pattern
, location
, code
,
489 gen_rtx_CONST_INT (machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
491 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
492 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
494 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
495 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
496 return const_true_rtx
;
499 /* Look up the CONST_INT in the hash table. */
500 rtx
*slot
= const_int_htab
->find_slot_with_hash (arg
, (hashval_t
) arg
,
503 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
509 gen_int_mode (HOST_WIDE_INT c
, machine_mode mode
)
511 return GEN_INT (trunc_int_for_mode (c
, mode
));
514 /* CONST_DOUBLEs might be created from pairs of integers, or from
515 REAL_VALUE_TYPEs. Also, their length is known only at run time,
516 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
518 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
519 hash table. If so, return its counterpart; otherwise add it
520 to the hash table and return it. */
522 lookup_const_double (rtx real
)
524 rtx
*slot
= const_double_htab
->find_slot (real
, INSERT
);
531 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
532 VALUE in mode MODE. */
534 const_double_from_real_value (REAL_VALUE_TYPE value
, machine_mode mode
)
536 rtx real
= rtx_alloc (CONST_DOUBLE
);
537 PUT_MODE (real
, mode
);
541 return lookup_const_double (real
);
544 /* Determine whether FIXED, a CONST_FIXED, already exists in the
545 hash table. If so, return its counterpart; otherwise add it
546 to the hash table and return it. */
549 lookup_const_fixed (rtx fixed
)
551 rtx
*slot
= const_fixed_htab
->find_slot (fixed
, INSERT
);
558 /* Return a CONST_FIXED rtx for a fixed-point value specified by
559 VALUE in mode MODE. */
562 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, machine_mode mode
)
564 rtx fixed
= rtx_alloc (CONST_FIXED
);
565 PUT_MODE (fixed
, mode
);
569 return lookup_const_fixed (fixed
);
572 #if TARGET_SUPPORTS_WIDE_INT == 0
573 /* Constructs double_int from rtx CST. */
576 rtx_to_double_int (const_rtx cst
)
580 if (CONST_INT_P (cst
))
581 r
= double_int::from_shwi (INTVAL (cst
));
582 else if (CONST_DOUBLE_AS_INT_P (cst
))
584 r
.low
= CONST_DOUBLE_LOW (cst
);
585 r
.high
= CONST_DOUBLE_HIGH (cst
);
594 #if TARGET_SUPPORTS_WIDE_INT
595 /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
596 If so, return its counterpart; otherwise add it to the hash table and
600 lookup_const_wide_int (rtx wint
)
602 rtx
*slot
= const_wide_int_htab
->find_slot (wint
, INSERT
);
610 /* Return an rtx constant for V, given that the constant has mode MODE.
611 The returned rtx will be a CONST_INT if V fits, otherwise it will be
612 a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
613 (if TARGET_SUPPORTS_WIDE_INT). */
616 immed_wide_int_const (const wide_int_ref
&v
, machine_mode mode
)
618 unsigned int len
= v
.get_len ();
619 unsigned int prec
= GET_MODE_PRECISION (mode
);
621 /* Allow truncation but not extension since we do not know if the
622 number is signed or unsigned. */
623 gcc_assert (prec
<= v
.get_precision ());
625 if (len
< 2 || prec
<= HOST_BITS_PER_WIDE_INT
)
626 return gen_int_mode (v
.elt (0), mode
);
628 #if TARGET_SUPPORTS_WIDE_INT
632 unsigned int blocks_needed
633 = (prec
+ HOST_BITS_PER_WIDE_INT
- 1) / HOST_BITS_PER_WIDE_INT
;
635 if (len
> blocks_needed
)
638 value
= const_wide_int_alloc (len
);
640 /* It is so tempting to just put the mode in here. Must control
642 PUT_MODE (value
, VOIDmode
);
643 CWI_PUT_NUM_ELEM (value
, len
);
645 for (i
= 0; i
< len
; i
++)
646 CONST_WIDE_INT_ELT (value
, i
) = v
.elt (i
);
648 return lookup_const_wide_int (value
);
651 return immed_double_const (v
.elt (0), v
.elt (1), mode
);
655 #if TARGET_SUPPORTS_WIDE_INT == 0
656 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
657 of ints: I0 is the low-order word and I1 is the high-order word.
658 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
659 implied upper bits are copies of the high bit of i1. The value
660 itself is neither signed nor unsigned. Do not use this routine for
661 non-integer modes; convert to REAL_VALUE_TYPE and use
662 CONST_DOUBLE_FROM_REAL_VALUE. */
665 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, machine_mode mode
)
670 /* There are the following cases (note that there are no modes with
671 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
673 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
675 2) If the value of the integer fits into HOST_WIDE_INT anyway
676 (i.e., i1 consists only from copies of the sign bit, and sign
677 of i0 and i1 are the same), then we return a CONST_INT for i0.
678 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
679 if (mode
!= VOIDmode
)
681 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
682 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
683 /* We can get a 0 for an error mark. */
684 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
685 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
686 || GET_MODE_CLASS (mode
) == MODE_POINTER_BOUNDS
);
688 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
689 return gen_int_mode (i0
, mode
);
692 /* If this integer fits in one word, return a CONST_INT. */
693 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
696 /* We use VOIDmode for integers. */
697 value
= rtx_alloc (CONST_DOUBLE
);
698 PUT_MODE (value
, VOIDmode
);
700 CONST_DOUBLE_LOW (value
) = i0
;
701 CONST_DOUBLE_HIGH (value
) = i1
;
703 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
704 XWINT (value
, i
) = 0;
706 return lookup_const_double (value
);
711 gen_rtx_REG (machine_mode mode
, unsigned int regno
)
713 /* In case the MD file explicitly references the frame pointer, have
714 all such references point to the same frame pointer. This is
715 used during frame pointer elimination to distinguish the explicit
716 references to these registers from pseudos that happened to be
719 If we have eliminated the frame pointer or arg pointer, we will
720 be using it as a normal register, for example as a spill
721 register. In such cases, we might be accessing it in a mode that
722 is not Pmode and therefore cannot use the pre-allocated rtx.
724 Also don't do this when we are making new REGs in reload, since
725 we don't want to get confused with the real pointers. */
727 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
729 if (regno
== FRAME_POINTER_REGNUM
730 && (!reload_completed
|| frame_pointer_needed
))
731 return frame_pointer_rtx
;
733 if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
734 && regno
== HARD_FRAME_POINTER_REGNUM
735 && (!reload_completed
|| frame_pointer_needed
))
736 return hard_frame_pointer_rtx
;
737 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
738 if (regno
== ARG_POINTER_REGNUM
)
739 return arg_pointer_rtx
;
741 #ifdef RETURN_ADDRESS_POINTER_REGNUM
742 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
743 return return_address_pointer_rtx
;
745 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
746 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
747 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
748 return pic_offset_table_rtx
;
749 if (regno
== STACK_POINTER_REGNUM
)
750 return stack_pointer_rtx
;
754 /* If the per-function register table has been set up, try to re-use
755 an existing entry in that table to avoid useless generation of RTL.
757 This code is disabled for now until we can fix the various backends
758 which depend on having non-shared hard registers in some cases. Long
759 term we want to re-enable this code as it can significantly cut down
760 on the amount of useless RTL that gets generated.
762 We'll also need to fix some code that runs after reload that wants to
763 set ORIGINAL_REGNO. */
768 && regno
< FIRST_PSEUDO_REGISTER
769 && reg_raw_mode
[regno
] == mode
)
770 return regno_reg_rtx
[regno
];
773 return gen_raw_REG (mode
, regno
);
777 gen_rtx_MEM (machine_mode mode
, rtx addr
)
779 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
781 /* This field is not cleared by the mere allocation of the rtx, so
788 /* Generate a memory referring to non-trapping constant memory. */
791 gen_const_mem (machine_mode mode
, rtx addr
)
793 rtx mem
= gen_rtx_MEM (mode
, addr
);
794 MEM_READONLY_P (mem
) = 1;
795 MEM_NOTRAP_P (mem
) = 1;
799 /* Generate a MEM referring to fixed portions of the frame, e.g., register
803 gen_frame_mem (machine_mode mode
, rtx addr
)
805 rtx mem
= gen_rtx_MEM (mode
, addr
);
806 MEM_NOTRAP_P (mem
) = 1;
807 set_mem_alias_set (mem
, get_frame_alias_set ());
811 /* Generate a MEM referring to a temporary use of the stack, not part
812 of the fixed stack frame. For example, something which is pushed
813 by a target splitter. */
815 gen_tmp_stack_mem (machine_mode mode
, rtx addr
)
817 rtx mem
= gen_rtx_MEM (mode
, addr
);
818 MEM_NOTRAP_P (mem
) = 1;
819 if (!cfun
->calls_alloca
)
820 set_mem_alias_set (mem
, get_frame_alias_set ());
824 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
825 this construct would be valid, and false otherwise. */
828 validate_subreg (machine_mode omode
, machine_mode imode
,
829 const_rtx reg
, unsigned int offset
)
831 unsigned int isize
= GET_MODE_SIZE (imode
);
832 unsigned int osize
= GET_MODE_SIZE (omode
);
834 /* All subregs must be aligned. */
835 if (offset
% osize
!= 0)
838 /* The subreg offset cannot be outside the inner object. */
842 /* ??? This should not be here. Temporarily continue to allow word_mode
843 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
844 Generally, backends are doing something sketchy but it'll take time to
846 if (omode
== word_mode
)
848 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
849 is the culprit here, and not the backends. */
850 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
852 /* Allow component subregs of complex and vector. Though given the below
853 extraction rules, it's not always clear what that means. */
854 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
855 && GET_MODE_INNER (imode
) == omode
)
857 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
858 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
859 represent this. It's questionable if this ought to be represented at
860 all -- why can't this all be hidden in post-reload splitters that make
861 arbitrarily mode changes to the registers themselves. */
862 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
864 /* Subregs involving floating point modes are not allowed to
865 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
866 (subreg:SI (reg:DF) 0) isn't. */
867 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
869 if (! (isize
== osize
870 /* LRA can use subreg to store a floating point value in
871 an integer mode. Although the floating point and the
872 integer modes need the same number of hard registers,
873 the size of floating point mode can be less than the
874 integer mode. LRA also uses subregs for a register
875 should be used in different mode in on insn. */
880 /* Paradoxical subregs must have offset zero. */
884 /* This is a normal subreg. Verify that the offset is representable. */
886 /* For hard registers, we already have most of these rules collected in
887 subreg_offset_representable_p. */
888 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
890 unsigned int regno
= REGNO (reg
);
892 #ifdef CANNOT_CHANGE_MODE_CLASS
893 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
894 && GET_MODE_INNER (imode
) == omode
)
896 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
900 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
903 /* For pseudo registers, we want most of the same checks. Namely:
904 If the register no larger than a word, the subreg must be lowpart.
905 If the register is larger than a word, the subreg must be the lowpart
906 of a subword. A subreg does *not* perform arbitrary bit extraction.
907 Given that we've already checked mode/offset alignment, we only have
908 to check subword subregs here. */
909 if (osize
< UNITS_PER_WORD
910 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
912 machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
913 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
914 if (offset
% UNITS_PER_WORD
!= low_off
)
921 gen_rtx_SUBREG (machine_mode mode
, rtx reg
, int offset
)
923 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
924 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
927 /* Generate a SUBREG representing the least-significant part of REG if MODE
928 is smaller than mode of REG, otherwise paradoxical SUBREG. */
931 gen_lowpart_SUBREG (machine_mode mode
, rtx reg
)
935 inmode
= GET_MODE (reg
);
936 if (inmode
== VOIDmode
)
938 return gen_rtx_SUBREG (mode
, reg
,
939 subreg_lowpart_offset (mode
, inmode
));
943 gen_rtx_VAR_LOCATION (machine_mode mode
, tree decl
, rtx loc
,
944 enum var_init_status status
)
946 rtx x
= gen_rtx_fmt_te (VAR_LOCATION
, mode
, decl
, loc
);
947 PAT_VAR_LOCATION_STATUS (x
) = status
;
952 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
955 gen_rtvec (int n
, ...)
963 /* Don't allocate an empty rtvec... */
970 rt_val
= rtvec_alloc (n
);
972 for (i
= 0; i
< n
; i
++)
973 rt_val
->elem
[i
] = va_arg (p
, rtx
);
980 gen_rtvec_v (int n
, rtx
*argp
)
985 /* Don't allocate an empty rtvec... */
989 rt_val
= rtvec_alloc (n
);
991 for (i
= 0; i
< n
; i
++)
992 rt_val
->elem
[i
] = *argp
++;
998 gen_rtvec_v (int n
, rtx_insn
**argp
)
1003 /* Don't allocate an empty rtvec... */
1007 rt_val
= rtvec_alloc (n
);
1009 for (i
= 0; i
< n
; i
++)
1010 rt_val
->elem
[i
] = *argp
++;
1016 /* Return the number of bytes between the start of an OUTER_MODE
1017 in-memory value and the start of an INNER_MODE in-memory value,
1018 given that the former is a lowpart of the latter. It may be a
1019 paradoxical lowpart, in which case the offset will be negative
1020 on big-endian targets. */
1023 byte_lowpart_offset (machine_mode outer_mode
,
1024 machine_mode inner_mode
)
1026 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
1027 return subreg_lowpart_offset (outer_mode
, inner_mode
);
1029 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
1032 /* Generate a REG rtx for a new pseudo register of mode MODE.
1033 This pseudo is assigned the next sequential register number. */
1036 gen_reg_rtx (machine_mode mode
)
1039 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
1041 gcc_assert (can_create_pseudo_p ());
1043 /* If a virtual register with bigger mode alignment is generated,
1044 increase stack alignment estimation because it might be spilled
1046 if (SUPPORTS_STACK_ALIGNMENT
1047 && crtl
->stack_alignment_estimated
< align
1048 && !crtl
->stack_realign_processed
)
1050 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
1051 if (crtl
->stack_alignment_estimated
< min_align
)
1052 crtl
->stack_alignment_estimated
= min_align
;
1055 if (generating_concat_p
1056 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
1057 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
1059 /* For complex modes, don't make a single pseudo.
1060 Instead, make a CONCAT of two pseudos.
1061 This allows noncontiguous allocation of the real and imaginary parts,
1062 which makes much better code. Besides, allocating DCmode
1063 pseudos overstrains reload on some machines like the 386. */
1064 rtx realpart
, imagpart
;
1065 machine_mode partmode
= GET_MODE_INNER (mode
);
1067 realpart
= gen_reg_rtx (partmode
);
1068 imagpart
= gen_reg_rtx (partmode
);
1069 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
1072 /* Do not call gen_reg_rtx with uninitialized crtl. */
1073 gcc_assert (crtl
->emit
.regno_pointer_align_length
);
1075 /* Make sure regno_pointer_align, and regno_reg_rtx are large
1076 enough to have an element for this pseudo reg number. */
1078 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
1080 int old_size
= crtl
->emit
.regno_pointer_align_length
;
1084 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
1085 memset (tmp
+ old_size
, 0, old_size
);
1086 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
1088 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
1089 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
1090 regno_reg_rtx
= new1
;
1092 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
1095 val
= gen_raw_REG (mode
, reg_rtx_no
);
1096 regno_reg_rtx
[reg_rtx_no
++] = val
;
1100 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1103 reg_is_parm_p (rtx reg
)
1107 gcc_assert (REG_P (reg
));
1108 decl
= REG_EXPR (reg
);
1109 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
1112 /* Update NEW with the same attributes as REG, but with OFFSET added
1113 to the REG_OFFSET. */
1116 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
1118 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
1119 REG_OFFSET (reg
) + offset
);
1122 /* Generate a register with same attributes as REG, but with OFFSET
1123 added to the REG_OFFSET. */
1126 gen_rtx_REG_offset (rtx reg
, machine_mode mode
, unsigned int regno
,
1129 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
1131 update_reg_offset (new_rtx
, reg
, offset
);
1135 /* Generate a new pseudo-register with the same attributes as REG, but
1136 with OFFSET added to the REG_OFFSET. */
1139 gen_reg_rtx_offset (rtx reg
, machine_mode mode
, int offset
)
1141 rtx new_rtx
= gen_reg_rtx (mode
);
1143 update_reg_offset (new_rtx
, reg
, offset
);
1147 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1148 new register is a (possibly paradoxical) lowpart of the old one. */
1151 adjust_reg_mode (rtx reg
, machine_mode mode
)
1153 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
1154 PUT_MODE (reg
, mode
);
1157 /* Copy REG's attributes from X, if X has any attributes. If REG and X
1158 have different modes, REG is a (possibly paradoxical) lowpart of X. */
1161 set_reg_attrs_from_value (rtx reg
, rtx x
)
1164 bool can_be_reg_pointer
= true;
1166 /* Don't call mark_reg_pointer for incompatible pointer sign
1168 while (GET_CODE (x
) == SIGN_EXTEND
1169 || GET_CODE (x
) == ZERO_EXTEND
1170 || GET_CODE (x
) == TRUNCATE
1171 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
1173 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
1174 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
1175 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
1176 can_be_reg_pointer
= false;
1181 /* Hard registers can be reused for multiple purposes within the same
1182 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1183 on them is wrong. */
1184 if (HARD_REGISTER_P (reg
))
1187 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1190 if (MEM_OFFSET_KNOWN_P (x
))
1191 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1192 MEM_OFFSET (x
) + offset
);
1193 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1194 mark_reg_pointer (reg
, 0);
1199 update_reg_offset (reg
, x
, offset
);
1200 if (can_be_reg_pointer
&& REG_POINTER (x
))
1201 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1205 /* Generate a REG rtx for a new pseudo register, copying the mode
1206 and attributes from X. */
1209 gen_reg_rtx_and_attrs (rtx x
)
1211 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1212 set_reg_attrs_from_value (reg
, x
);
1216 /* Set the register attributes for registers contained in PARM_RTX.
1217 Use needed values from memory attributes of MEM. */
1220 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1222 if (REG_P (parm_rtx
))
1223 set_reg_attrs_from_value (parm_rtx
, mem
);
1224 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1226 /* Check for a NULL entry in the first slot, used to indicate that the
1227 parameter goes both on the stack and in registers. */
1228 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1229 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1231 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1232 if (REG_P (XEXP (x
, 0)))
1233 REG_ATTRS (XEXP (x
, 0))
1234 = get_reg_attrs (MEM_EXPR (mem
),
1235 INTVAL (XEXP (x
, 1)));
1240 /* Set the REG_ATTRS for registers in value X, given that X represents
1244 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1246 if (GET_CODE (x
) == SUBREG
)
1248 gcc_assert (subreg_lowpart_p (x
));
1253 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1255 if (GET_CODE (x
) == CONCAT
)
1257 if (REG_P (XEXP (x
, 0)))
1258 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1259 if (REG_P (XEXP (x
, 1)))
1260 REG_ATTRS (XEXP (x
, 1))
1261 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1263 if (GET_CODE (x
) == PARALLEL
)
1267 /* Check for a NULL entry, used to indicate that the parameter goes
1268 both on the stack and in registers. */
1269 if (XEXP (XVECEXP (x
, 0, 0), 0))
1274 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1276 rtx y
= XVECEXP (x
, 0, i
);
1277 if (REG_P (XEXP (y
, 0)))
1278 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1283 /* Assign the RTX X to declaration T. */
1286 set_decl_rtl (tree t
, rtx x
)
1288 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1290 set_reg_attrs_for_decl_rtl (t
, x
);
1293 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1294 if the ABI requires the parameter to be passed by reference. */
1297 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1299 DECL_INCOMING_RTL (t
) = x
;
1300 if (x
&& !by_reference_p
)
1301 set_reg_attrs_for_decl_rtl (t
, x
);
1304 /* Identify REG (which may be a CONCAT) as a user register. */
1307 mark_user_reg (rtx reg
)
1309 if (GET_CODE (reg
) == CONCAT
)
1311 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1312 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1316 gcc_assert (REG_P (reg
));
1317 REG_USERVAR_P (reg
) = 1;
1321 /* Identify REG as a probable pointer register and show its alignment
1322 as ALIGN, if nonzero. */
1325 mark_reg_pointer (rtx reg
, int align
)
1327 if (! REG_POINTER (reg
))
1329 REG_POINTER (reg
) = 1;
1332 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1334 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1335 /* We can no-longer be sure just how aligned this pointer is. */
1336 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1339 /* Return 1 plus largest pseudo reg number used in the current function. */
1347 /* Return 1 + the largest label number used so far in the current function. */
1350 max_label_num (void)
1355 /* Return first label number used in this function (if any were used). */
1358 get_first_label_num (void)
1360 return first_label_num
;
1363 /* If the rtx for label was created during the expansion of a nested
1364 function, then first_label_num won't include this label number.
1365 Fix this now so that array indices work later. */
1368 maybe_set_first_label_num (rtx x
)
1370 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1371 first_label_num
= CODE_LABEL_NUMBER (x
);
1374 /* Return a value representing some low-order bits of X, where the number
1375 of low-order bits is given by MODE. Note that no conversion is done
1376 between floating-point and fixed-point values, rather, the bit
1377 representation is returned.
1379 This function handles the cases in common between gen_lowpart, below,
1380 and two variants in cse.c and combine.c. These are the cases that can
1381 be safely handled at all points in the compilation.
1383 If this is not a case we can handle, return 0. */
1386 gen_lowpart_common (machine_mode mode
, rtx x
)
1388 int msize
= GET_MODE_SIZE (mode
);
1391 machine_mode innermode
;
1393 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1394 so we have to make one up. Yuk. */
1395 innermode
= GET_MODE (x
);
1397 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1398 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1399 else if (innermode
== VOIDmode
)
1400 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1402 xsize
= GET_MODE_SIZE (innermode
);
1404 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1406 if (innermode
== mode
)
1409 /* MODE must occupy no more words than the mode of X. */
1410 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1411 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1414 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1415 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1418 offset
= subreg_lowpart_offset (mode
, innermode
);
1420 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1421 && (GET_MODE_CLASS (mode
) == MODE_INT
1422 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1424 /* If we are getting the low-order part of something that has been
1425 sign- or zero-extended, we can either just use the object being
1426 extended or make a narrower extension. If we want an even smaller
1427 piece than the size of the object being extended, call ourselves
1430 This case is used mostly by combine and cse. */
1432 if (GET_MODE (XEXP (x
, 0)) == mode
)
1434 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1435 return gen_lowpart_common (mode
, XEXP (x
, 0));
1436 else if (msize
< xsize
)
1437 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1439 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1440 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1441 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1442 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1444 /* Otherwise, we can't do this. */
1449 gen_highpart (machine_mode mode
, rtx x
)
1451 unsigned int msize
= GET_MODE_SIZE (mode
);
1454 /* This case loses if X is a subreg. To catch bugs early,
1455 complain if an invalid MODE is used even in other cases. */
1456 gcc_assert (msize
<= UNITS_PER_WORD
1457 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1459 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1460 subreg_highpart_offset (mode
, GET_MODE (x
)));
1461 gcc_assert (result
);
1463 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1464 the target if we have a MEM. gen_highpart must return a valid operand,
1465 emitting code if necessary to do so. */
1468 result
= validize_mem (result
);
1469 gcc_assert (result
);
1475 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1476 be VOIDmode constant. */
1478 gen_highpart_mode (machine_mode outermode
, machine_mode innermode
, rtx exp
)
1480 if (GET_MODE (exp
) != VOIDmode
)
1482 gcc_assert (GET_MODE (exp
) == innermode
);
1483 return gen_highpart (outermode
, exp
);
1485 return simplify_gen_subreg (outermode
, exp
, innermode
,
1486 subreg_highpart_offset (outermode
, innermode
));
1489 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1492 subreg_lowpart_offset (machine_mode outermode
, machine_mode innermode
)
1494 unsigned int offset
= 0;
1495 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1499 if (WORDS_BIG_ENDIAN
)
1500 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1501 if (BYTES_BIG_ENDIAN
)
1502 offset
+= difference
% UNITS_PER_WORD
;
1508 /* Return offset in bytes to get OUTERMODE high part
1509 of the value in mode INNERMODE stored in memory in target format. */
1511 subreg_highpart_offset (machine_mode outermode
, machine_mode innermode
)
1513 unsigned int offset
= 0;
1514 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1516 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1520 if (! WORDS_BIG_ENDIAN
)
1521 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1522 if (! BYTES_BIG_ENDIAN
)
1523 offset
+= difference
% UNITS_PER_WORD
;
1529 /* Return 1 iff X, assumed to be a SUBREG,
1530 refers to the least significant part of its containing reg.
1531 If X is not a SUBREG, always return 1 (it is its own low part!). */
1534 subreg_lowpart_p (const_rtx x
)
1536 if (GET_CODE (x
) != SUBREG
)
1538 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1541 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1542 == SUBREG_BYTE (x
));
1545 /* Return true if X is a paradoxical subreg, false otherwise. */
1547 paradoxical_subreg_p (const_rtx x
)
1549 if (GET_CODE (x
) != SUBREG
)
1551 return (GET_MODE_PRECISION (GET_MODE (x
))
1552 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1555 /* Return subword OFFSET of operand OP.
1556 The word number, OFFSET, is interpreted as the word number starting
1557 at the low-order address. OFFSET 0 is the low-order word if not
1558 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1560 If we cannot extract the required word, we return zero. Otherwise,
1561 an rtx corresponding to the requested word will be returned.
1563 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1564 reload has completed, a valid address will always be returned. After
1565 reload, if a valid address cannot be returned, we return zero.
1567 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1568 it is the responsibility of the caller.
1570 MODE is the mode of OP in case it is a CONST_INT.
1572 ??? This is still rather broken for some cases. The problem for the
1573 moment is that all callers of this thing provide no 'goal mode' to
1574 tell us to work with. This exists because all callers were written
1575 in a word based SUBREG world.
1576 Now use of this function can be deprecated by simplify_subreg in most
1581 operand_subword (rtx op
, unsigned int offset
, int validate_address
, machine_mode mode
)
1583 if (mode
== VOIDmode
)
1584 mode
= GET_MODE (op
);
1586 gcc_assert (mode
!= VOIDmode
);
1588 /* If OP is narrower than a word, fail. */
1590 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1593 /* If we want a word outside OP, return zero. */
1595 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1598 /* Form a new MEM at the requested address. */
1601 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1603 if (! validate_address
)
1606 else if (reload_completed
)
1608 if (! strict_memory_address_addr_space_p (word_mode
,
1610 MEM_ADDR_SPACE (op
)))
1614 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1617 /* Rest can be handled by simplify_subreg. */
1618 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1621 /* Similar to `operand_subword', but never return 0. If we can't
1622 extract the required subword, put OP into a register and try again.
1623 The second attempt must succeed. We always validate the address in
1626 MODE is the mode of OP, in case it is CONST_INT. */
1629 operand_subword_force (rtx op
, unsigned int offset
, machine_mode mode
)
1631 rtx result
= operand_subword (op
, offset
, 1, mode
);
1636 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1638 /* If this is a register which can not be accessed by words, copy it
1639 to a pseudo register. */
1641 op
= copy_to_reg (op
);
1643 op
= force_reg (mode
, op
);
1646 result
= operand_subword (op
, offset
, 1, mode
);
1647 gcc_assert (result
);
1652 /* Returns 1 if both MEM_EXPR can be considered equal
1656 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1661 if (! expr1
|| ! expr2
)
1664 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1667 return operand_equal_p (expr1
, expr2
, 0);
1670 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1671 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1675 get_mem_align_offset (rtx mem
, unsigned int align
)
1678 unsigned HOST_WIDE_INT offset
;
1680 /* This function can't use
1681 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1682 || (MAX (MEM_ALIGN (mem),
1683 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1687 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1689 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1690 for <variable>. get_inner_reference doesn't handle it and
1691 even if it did, the alignment in that case needs to be determined
1692 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1693 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1694 isn't sufficiently aligned, the object it is in might be. */
1695 gcc_assert (MEM_P (mem
));
1696 expr
= MEM_EXPR (mem
);
1697 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1700 offset
= MEM_OFFSET (mem
);
1703 if (DECL_ALIGN (expr
) < align
)
1706 else if (INDIRECT_REF_P (expr
))
1708 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1711 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1715 tree inner
= TREE_OPERAND (expr
, 0);
1716 tree field
= TREE_OPERAND (expr
, 1);
1717 tree byte_offset
= component_ref_field_offset (expr
);
1718 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1721 || !tree_fits_uhwi_p (byte_offset
)
1722 || !tree_fits_uhwi_p (bit_offset
))
1725 offset
+= tree_to_uhwi (byte_offset
);
1726 offset
+= tree_to_uhwi (bit_offset
) / BITS_PER_UNIT
;
1728 if (inner
== NULL_TREE
)
1730 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1731 < (unsigned int) align
)
1735 else if (DECL_P (inner
))
1737 if (DECL_ALIGN (inner
) < align
)
1741 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1749 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1752 /* Given REF (a MEM) and T, either the type of X or the expression
1753 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1754 if we are making a new object of this type. BITPOS is nonzero if
1755 there is an offset outstanding on T that will be applied later. */
1758 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1759 HOST_WIDE_INT bitpos
)
1761 HOST_WIDE_INT apply_bitpos
= 0;
1763 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1766 /* It can happen that type_for_mode was given a mode for which there
1767 is no language-level type. In which case it returns NULL, which
1772 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1773 if (type
== error_mark_node
)
1776 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1777 wrong answer, as it assumes that DECL_RTL already has the right alias
1778 info. Callers should not set DECL_RTL until after the call to
1779 set_mem_attributes. */
1780 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1782 memset (&attrs
, 0, sizeof (attrs
));
1784 /* Get the alias set from the expression or type (perhaps using a
1785 front-end routine) and use it. */
1786 attrs
.alias
= get_alias_set (t
);
1788 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1789 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1791 /* Default values from pre-existing memory attributes if present. */
1792 refattrs
= MEM_ATTRS (ref
);
1795 /* ??? Can this ever happen? Calling this routine on a MEM that
1796 already carries memory attributes should probably be invalid. */
1797 attrs
.expr
= refattrs
->expr
;
1798 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1799 attrs
.offset
= refattrs
->offset
;
1800 attrs
.size_known_p
= refattrs
->size_known_p
;
1801 attrs
.size
= refattrs
->size
;
1802 attrs
.align
= refattrs
->align
;
1805 /* Otherwise, default values from the mode of the MEM reference. */
1808 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1809 gcc_assert (!defattrs
->expr
);
1810 gcc_assert (!defattrs
->offset_known_p
);
1812 /* Respect mode size. */
1813 attrs
.size_known_p
= defattrs
->size_known_p
;
1814 attrs
.size
= defattrs
->size
;
1815 /* ??? Is this really necessary? We probably should always get
1816 the size from the type below. */
1818 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1819 if T is an object, always compute the object alignment below. */
1821 attrs
.align
= defattrs
->align
;
1823 attrs
.align
= BITS_PER_UNIT
;
1824 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1825 e.g. if the type carries an alignment attribute. Should we be
1826 able to simply always use TYPE_ALIGN? */
1829 /* We can set the alignment from the type if we are making an object,
1830 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1831 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1832 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1834 /* If the size is known, we can set that. */
1835 tree new_size
= TYPE_SIZE_UNIT (type
);
1837 /* The address-space is that of the type. */
1838 as
= TYPE_ADDR_SPACE (type
);
1840 /* If T is not a type, we may be able to deduce some more information about
1846 if (TREE_THIS_VOLATILE (t
))
1847 MEM_VOLATILE_P (ref
) = 1;
1849 /* Now remove any conversions: they don't change what the underlying
1850 object is. Likewise for SAVE_EXPR. */
1851 while (CONVERT_EXPR_P (t
)
1852 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1853 || TREE_CODE (t
) == SAVE_EXPR
)
1854 t
= TREE_OPERAND (t
, 0);
1856 /* Note whether this expression can trap. */
1857 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1859 base
= get_base_address (t
);
1863 && TREE_READONLY (base
)
1864 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1865 && !TREE_THIS_VOLATILE (base
))
1866 MEM_READONLY_P (ref
) = 1;
1868 /* Mark static const strings readonly as well. */
1869 if (TREE_CODE (base
) == STRING_CST
1870 && TREE_READONLY (base
)
1871 && TREE_STATIC (base
))
1872 MEM_READONLY_P (ref
) = 1;
1874 /* Address-space information is on the base object. */
1875 if (TREE_CODE (base
) == MEM_REF
1876 || TREE_CODE (base
) == TARGET_MEM_REF
)
1877 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1880 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1883 /* If this expression uses it's parent's alias set, mark it such
1884 that we won't change it. */
1885 if (component_uses_parent_alias_set_from (t
) != NULL_TREE
)
1886 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1888 /* If this is a decl, set the attributes of the MEM from it. */
1892 attrs
.offset_known_p
= true;
1894 apply_bitpos
= bitpos
;
1895 new_size
= DECL_SIZE_UNIT (t
);
1898 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1899 else if (CONSTANT_CLASS_P (t
))
1902 /* If this is a field reference, record it. */
1903 else if (TREE_CODE (t
) == COMPONENT_REF
)
1906 attrs
.offset_known_p
= true;
1908 apply_bitpos
= bitpos
;
1909 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1910 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1913 /* If this is an array reference, look for an outer field reference. */
1914 else if (TREE_CODE (t
) == ARRAY_REF
)
1916 tree off_tree
= size_zero_node
;
1917 /* We can't modify t, because we use it at the end of the
1923 tree index
= TREE_OPERAND (t2
, 1);
1924 tree low_bound
= array_ref_low_bound (t2
);
1925 tree unit_size
= array_ref_element_size (t2
);
1927 /* We assume all arrays have sizes that are a multiple of a byte.
1928 First subtract the lower bound, if any, in the type of the
1929 index, then convert to sizetype and multiply by the size of
1930 the array element. */
1931 if (! integer_zerop (low_bound
))
1932 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1935 off_tree
= size_binop (PLUS_EXPR
,
1936 size_binop (MULT_EXPR
,
1937 fold_convert (sizetype
,
1941 t2
= TREE_OPERAND (t2
, 0);
1943 while (TREE_CODE (t2
) == ARRAY_REF
);
1946 || TREE_CODE (t2
) == COMPONENT_REF
)
1949 attrs
.offset_known_p
= false;
1950 if (tree_fits_uhwi_p (off_tree
))
1952 attrs
.offset_known_p
= true;
1953 attrs
.offset
= tree_to_uhwi (off_tree
);
1954 apply_bitpos
= bitpos
;
1957 /* Else do not record a MEM_EXPR. */
1960 /* If this is an indirect reference, record it. */
1961 else if (TREE_CODE (t
) == MEM_REF
1962 || TREE_CODE (t
) == TARGET_MEM_REF
)
1965 attrs
.offset_known_p
= true;
1967 apply_bitpos
= bitpos
;
1970 /* Compute the alignment. */
1971 unsigned int obj_align
;
1972 unsigned HOST_WIDE_INT obj_bitpos
;
1973 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1974 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1975 if (obj_bitpos
!= 0)
1976 obj_align
= (obj_bitpos
& -obj_bitpos
);
1977 attrs
.align
= MAX (attrs
.align
, obj_align
);
1980 if (tree_fits_uhwi_p (new_size
))
1982 attrs
.size_known_p
= true;
1983 attrs
.size
= tree_to_uhwi (new_size
);
1986 /* If we modified OFFSET based on T, then subtract the outstanding
1987 bit position offset. Similarly, increase the size of the accessed
1988 object to contain the negative offset. */
1991 gcc_assert (attrs
.offset_known_p
);
1992 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1993 if (attrs
.size_known_p
)
1994 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1997 /* Now set the attributes we computed above. */
1998 attrs
.addrspace
= as
;
1999 set_mem_attrs (ref
, &attrs
);
2003 set_mem_attributes (rtx ref
, tree t
, int objectp
)
2005 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
2008 /* Set the alias set of MEM to SET. */
2011 set_mem_alias_set (rtx mem
, alias_set_type set
)
2013 struct mem_attrs attrs
;
2015 /* If the new and old alias sets don't conflict, something is wrong. */
2016 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
2017 attrs
= *get_mem_attrs (mem
);
2019 set_mem_attrs (mem
, &attrs
);
2022 /* Set the address space of MEM to ADDRSPACE (target-defined). */
2025 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
2027 struct mem_attrs attrs
;
2029 attrs
= *get_mem_attrs (mem
);
2030 attrs
.addrspace
= addrspace
;
2031 set_mem_attrs (mem
, &attrs
);
2034 /* Set the alignment of MEM to ALIGN bits. */
2037 set_mem_align (rtx mem
, unsigned int align
)
2039 struct mem_attrs attrs
;
2041 attrs
= *get_mem_attrs (mem
);
2042 attrs
.align
= align
;
2043 set_mem_attrs (mem
, &attrs
);
2046 /* Set the expr for MEM to EXPR. */
2049 set_mem_expr (rtx mem
, tree expr
)
2051 struct mem_attrs attrs
;
2053 attrs
= *get_mem_attrs (mem
);
2055 set_mem_attrs (mem
, &attrs
);
2058 /* Set the offset of MEM to OFFSET. */
2061 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
2063 struct mem_attrs attrs
;
2065 attrs
= *get_mem_attrs (mem
);
2066 attrs
.offset_known_p
= true;
2067 attrs
.offset
= offset
;
2068 set_mem_attrs (mem
, &attrs
);
2071 /* Clear the offset of MEM. */
2074 clear_mem_offset (rtx mem
)
2076 struct mem_attrs attrs
;
2078 attrs
= *get_mem_attrs (mem
);
2079 attrs
.offset_known_p
= false;
2080 set_mem_attrs (mem
, &attrs
);
2083 /* Set the size of MEM to SIZE. */
2086 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
2088 struct mem_attrs attrs
;
2090 attrs
= *get_mem_attrs (mem
);
2091 attrs
.size_known_p
= true;
2093 set_mem_attrs (mem
, &attrs
);
2096 /* Clear the size of MEM. */
2099 clear_mem_size (rtx mem
)
2101 struct mem_attrs attrs
;
2103 attrs
= *get_mem_attrs (mem
);
2104 attrs
.size_known_p
= false;
2105 set_mem_attrs (mem
, &attrs
);
2108 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2109 and its address changed to ADDR. (VOIDmode means don't change the mode.
2110 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2111 returned memory location is required to be valid. INPLACE is true if any
2112 changes can be made directly to MEMREF or false if MEMREF must be treated
2115 The memory attributes are not changed. */
2118 change_address_1 (rtx memref
, machine_mode mode
, rtx addr
, int validate
,
2124 gcc_assert (MEM_P (memref
));
2125 as
= MEM_ADDR_SPACE (memref
);
2126 if (mode
== VOIDmode
)
2127 mode
= GET_MODE (memref
);
2129 addr
= XEXP (memref
, 0);
2130 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
2131 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2134 /* Don't validate address for LRA. LRA can make the address valid
2135 by itself in most efficient way. */
2136 if (validate
&& !lra_in_progress
)
2138 if (reload_in_progress
|| reload_completed
)
2139 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2141 addr
= memory_address_addr_space (mode
, addr
, as
);
2144 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2149 XEXP (memref
, 0) = addr
;
2153 new_rtx
= gen_rtx_MEM (mode
, addr
);
2154 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2158 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2159 way we are changing MEMREF, so we only preserve the alias set. */
2162 change_address (rtx memref
, machine_mode mode
, rtx addr
)
2164 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1, false);
2165 machine_mode mmode
= GET_MODE (new_rtx
);
2166 struct mem_attrs attrs
, *defattrs
;
2168 attrs
= *get_mem_attrs (memref
);
2169 defattrs
= mode_mem_attrs
[(int) mmode
];
2170 attrs
.expr
= NULL_TREE
;
2171 attrs
.offset_known_p
= false;
2172 attrs
.size_known_p
= defattrs
->size_known_p
;
2173 attrs
.size
= defattrs
->size
;
2174 attrs
.align
= defattrs
->align
;
2176 /* If there are no changes, just return the original memory reference. */
2177 if (new_rtx
== memref
)
2179 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2182 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2183 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2186 set_mem_attrs (new_rtx
, &attrs
);
2190 /* Return a memory reference like MEMREF, but with its mode changed
2191 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2192 nonzero, the memory address is forced to be valid.
2193 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2194 and the caller is responsible for adjusting MEMREF base register.
2195 If ADJUST_OBJECT is zero, the underlying object associated with the
2196 memory reference is left unchanged and the caller is responsible for
2197 dealing with it. Otherwise, if the new memory reference is outside
2198 the underlying object, even partially, then the object is dropped.
2199 SIZE, if nonzero, is the size of an access in cases where MODE
2200 has no inherent size. */
2203 adjust_address_1 (rtx memref
, machine_mode mode
, HOST_WIDE_INT offset
,
2204 int validate
, int adjust_address
, int adjust_object
,
2207 rtx addr
= XEXP (memref
, 0);
2209 machine_mode address_mode
;
2211 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2212 unsigned HOST_WIDE_INT max_align
;
2213 #ifdef POINTERS_EXTEND_UNSIGNED
2214 machine_mode pointer_mode
2215 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2218 /* VOIDmode means no mode change for change_address_1. */
2219 if (mode
== VOIDmode
)
2220 mode
= GET_MODE (memref
);
2222 /* Take the size of non-BLKmode accesses from the mode. */
2223 defattrs
= mode_mem_attrs
[(int) mode
];
2224 if (defattrs
->size_known_p
)
2225 size
= defattrs
->size
;
2227 /* If there are no changes, just return the original memory reference. */
2228 if (mode
== GET_MODE (memref
) && !offset
2229 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2230 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2234 /* ??? Prefer to create garbage instead of creating shared rtl.
2235 This may happen even if offset is nonzero -- consider
2236 (plus (plus reg reg) const_int) -- so do this always. */
2237 addr
= copy_rtx (addr
);
2239 /* Convert a possibly large offset to a signed value within the
2240 range of the target address space. */
2241 address_mode
= get_address_mode (memref
);
2242 pbits
= GET_MODE_BITSIZE (address_mode
);
2243 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2245 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2246 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2252 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2253 object, we can merge it into the LO_SUM. */
2254 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2256 && (unsigned HOST_WIDE_INT
) offset
2257 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2258 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2259 plus_constant (address_mode
,
2260 XEXP (addr
, 1), offset
));
2261 #ifdef POINTERS_EXTEND_UNSIGNED
2262 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2263 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2264 the fact that pointers are not allowed to overflow. */
2265 else if (POINTERS_EXTEND_UNSIGNED
> 0
2266 && GET_CODE (addr
) == ZERO_EXTEND
2267 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2268 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2269 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2270 plus_constant (pointer_mode
,
2271 XEXP (addr
, 0), offset
));
2274 addr
= plus_constant (address_mode
, addr
, offset
);
2277 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
, false);
2279 /* If the address is a REG, change_address_1 rightfully returns memref,
2280 but this would destroy memref's MEM_ATTRS. */
2281 if (new_rtx
== memref
&& offset
!= 0)
2282 new_rtx
= copy_rtx (new_rtx
);
2284 /* Conservatively drop the object if we don't know where we start from. */
2285 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2287 attrs
.expr
= NULL_TREE
;
2291 /* Compute the new values of the memory attributes due to this adjustment.
2292 We add the offsets and update the alignment. */
2293 if (attrs
.offset_known_p
)
2295 attrs
.offset
+= offset
;
2297 /* Drop the object if the new left end is not within its bounds. */
2298 if (adjust_object
&& attrs
.offset
< 0)
2300 attrs
.expr
= NULL_TREE
;
2305 /* Compute the new alignment by taking the MIN of the alignment and the
2306 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2310 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2311 attrs
.align
= MIN (attrs
.align
, max_align
);
2316 /* Drop the object if the new right end is not within its bounds. */
2317 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2319 attrs
.expr
= NULL_TREE
;
2322 attrs
.size_known_p
= true;
2325 else if (attrs
.size_known_p
)
2327 gcc_assert (!adjust_object
);
2328 attrs
.size
-= offset
;
2329 /* ??? The store_by_pieces machinery generates negative sizes,
2330 so don't assert for that here. */
2333 set_mem_attrs (new_rtx
, &attrs
);
2338 /* Return a memory reference like MEMREF, but with its mode changed
2339 to MODE and its address changed to ADDR, which is assumed to be
2340 MEMREF offset by OFFSET bytes. If VALIDATE is
2341 nonzero, the memory address is forced to be valid. */
2344 adjust_automodify_address_1 (rtx memref
, machine_mode mode
, rtx addr
,
2345 HOST_WIDE_INT offset
, int validate
)
2347 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
, false);
2348 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2351 /* Return a memory reference like MEMREF, but whose address is changed by
2352 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2353 known to be in OFFSET (possibly 1). */
2356 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2358 rtx new_rtx
, addr
= XEXP (memref
, 0);
2359 machine_mode address_mode
;
2360 struct mem_attrs attrs
, *defattrs
;
2362 attrs
= *get_mem_attrs (memref
);
2363 address_mode
= get_address_mode (memref
);
2364 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2366 /* At this point we don't know _why_ the address is invalid. It
2367 could have secondary memory references, multiplies or anything.
2369 However, if we did go and rearrange things, we can wind up not
2370 being able to recognize the magic around pic_offset_table_rtx.
2371 This stuff is fragile, and is yet another example of why it is
2372 bad to expose PIC machinery too early. */
2373 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2375 && GET_CODE (addr
) == PLUS
2376 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2378 addr
= force_reg (GET_MODE (addr
), addr
);
2379 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2382 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2383 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1, false);
2385 /* If there are no changes, just return the original memory reference. */
2386 if (new_rtx
== memref
)
2389 /* Update the alignment to reflect the offset. Reset the offset, which
2391 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2392 attrs
.offset_known_p
= false;
2393 attrs
.size_known_p
= defattrs
->size_known_p
;
2394 attrs
.size
= defattrs
->size
;
2395 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2396 set_mem_attrs (new_rtx
, &attrs
);
2400 /* Return a memory reference like MEMREF, but with its address changed to
2401 ADDR. The caller is asserting that the actual piece of memory pointed
2402 to is the same, just the form of the address is being changed, such as
2403 by putting something into a register. INPLACE is true if any changes
2404 can be made directly to MEMREF or false if MEMREF must be treated as
2408 replace_equiv_address (rtx memref
, rtx addr
, bool inplace
)
2410 /* change_address_1 copies the memory attribute structure without change
2411 and that's exactly what we want here. */
2412 update_temp_slot_address (XEXP (memref
, 0), addr
);
2413 return change_address_1 (memref
, VOIDmode
, addr
, 1, inplace
);
2416 /* Likewise, but the reference is not required to be valid. */
2419 replace_equiv_address_nv (rtx memref
, rtx addr
, bool inplace
)
2421 return change_address_1 (memref
, VOIDmode
, addr
, 0, inplace
);
2424 /* Return a memory reference like MEMREF, but with its mode widened to
2425 MODE and offset by OFFSET. This would be used by targets that e.g.
2426 cannot issue QImode memory operations and have to use SImode memory
2427 operations plus masking logic. */
2430 widen_memory_access (rtx memref
, machine_mode mode
, HOST_WIDE_INT offset
)
2432 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2433 struct mem_attrs attrs
;
2434 unsigned int size
= GET_MODE_SIZE (mode
);
2436 /* If there are no changes, just return the original memory reference. */
2437 if (new_rtx
== memref
)
2440 attrs
= *get_mem_attrs (new_rtx
);
2442 /* If we don't know what offset we were at within the expression, then
2443 we can't know if we've overstepped the bounds. */
2444 if (! attrs
.offset_known_p
)
2445 attrs
.expr
= NULL_TREE
;
2449 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2451 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2452 tree offset
= component_ref_field_offset (attrs
.expr
);
2454 if (! DECL_SIZE_UNIT (field
))
2456 attrs
.expr
= NULL_TREE
;
2460 /* Is the field at least as large as the access? If so, ok,
2461 otherwise strip back to the containing structure. */
2462 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2463 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2464 && attrs
.offset
>= 0)
2467 if (! tree_fits_uhwi_p (offset
))
2469 attrs
.expr
= NULL_TREE
;
2473 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2474 attrs
.offset
+= tree_to_uhwi (offset
);
2475 attrs
.offset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
2478 /* Similarly for the decl. */
2479 else if (DECL_P (attrs
.expr
)
2480 && DECL_SIZE_UNIT (attrs
.expr
)
2481 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2482 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2483 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2487 /* The widened memory access overflows the expression, which means
2488 that it could alias another expression. Zap it. */
2489 attrs
.expr
= NULL_TREE
;
2495 attrs
.offset_known_p
= false;
2497 /* The widened memory may alias other stuff, so zap the alias set. */
2498 /* ??? Maybe use get_alias_set on any remaining expression. */
2500 attrs
.size_known_p
= true;
2502 set_mem_attrs (new_rtx
, &attrs
);
2506 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2507 static GTY(()) tree spill_slot_decl
;
2510 get_spill_slot_decl (bool force_build_p
)
2512 tree d
= spill_slot_decl
;
2514 struct mem_attrs attrs
;
2516 if (d
|| !force_build_p
)
2519 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2520 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2521 DECL_ARTIFICIAL (d
) = 1;
2522 DECL_IGNORED_P (d
) = 1;
2524 spill_slot_decl
= d
;
2526 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2527 MEM_NOTRAP_P (rd
) = 1;
2528 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2529 attrs
.alias
= new_alias_set ();
2531 set_mem_attrs (rd
, &attrs
);
2532 SET_DECL_RTL (d
, rd
);
2537 /* Given MEM, a result from assign_stack_local, fill in the memory
2538 attributes as appropriate for a register allocator spill slot.
2539 These slots are not aliasable by other memory. We arrange for
2540 them all to use a single MEM_EXPR, so that the aliasing code can
2541 work properly in the case of shared spill slots. */
2544 set_mem_attrs_for_spill (rtx mem
)
2546 struct mem_attrs attrs
;
2549 attrs
= *get_mem_attrs (mem
);
2550 attrs
.expr
= get_spill_slot_decl (true);
2551 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2552 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2554 /* We expect the incoming memory to be of the form:
2555 (mem:MODE (plus (reg sfp) (const_int offset)))
2556 with perhaps the plus missing for offset = 0. */
2557 addr
= XEXP (mem
, 0);
2558 attrs
.offset_known_p
= true;
2560 if (GET_CODE (addr
) == PLUS
2561 && CONST_INT_P (XEXP (addr
, 1)))
2562 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2564 set_mem_attrs (mem
, &attrs
);
2565 MEM_NOTRAP_P (mem
) = 1;
2568 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2571 gen_label_rtx (void)
2573 return as_a
<rtx_code_label
*> (
2574 gen_rtx_CODE_LABEL (VOIDmode
, NULL_RTX
, NULL_RTX
,
2575 NULL
, label_num
++, NULL
));
2578 /* For procedure integration. */
2580 /* Install new pointers to the first and last insns in the chain.
2581 Also, set cur_insn_uid to one higher than the last in use.
2582 Used for an inline-procedure after copying the insn chain. */
2585 set_new_first_and_last_insn (rtx_insn
*first
, rtx_insn
*last
)
2589 set_first_insn (first
);
2590 set_last_insn (last
);
2593 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2595 int debug_count
= 0;
2597 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2598 cur_debug_insn_uid
= 0;
2600 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2601 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2602 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2605 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2606 if (DEBUG_INSN_P (insn
))
2611 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2613 cur_debug_insn_uid
++;
2616 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2617 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2622 /* Go through all the RTL insn bodies and copy any invalid shared
2623 structure. This routine should only be called once. */
2626 unshare_all_rtl_1 (rtx_insn
*insn
)
2628 /* Unshare just about everything else. */
2629 unshare_all_rtl_in_chain (insn
);
2631 /* Make sure the addresses of stack slots found outside the insn chain
2632 (such as, in DECL_RTL of a variable) are not shared
2633 with the insn chain.
2635 This special care is necessary when the stack slot MEM does not
2636 actually appear in the insn chain. If it does appear, its address
2637 is unshared from all else at that point. */
2638 stack_slot_list
= safe_as_a
<rtx_expr_list
*> (
2639 copy_rtx_if_shared (stack_slot_list
));
2642 /* Go through all the RTL insn bodies and copy any invalid shared
2643 structure, again. This is a fairly expensive thing to do so it
2644 should be done sparingly. */
2647 unshare_all_rtl_again (rtx_insn
*insn
)
2652 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2655 reset_used_flags (PATTERN (p
));
2656 reset_used_flags (REG_NOTES (p
));
2658 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2661 /* Make sure that virtual stack slots are not shared. */
2662 set_used_decls (DECL_INITIAL (cfun
->decl
));
2664 /* Make sure that virtual parameters are not shared. */
2665 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2666 set_used_flags (DECL_RTL (decl
));
2668 reset_used_flags (stack_slot_list
);
2670 unshare_all_rtl_1 (insn
);
2674 unshare_all_rtl (void)
2676 unshare_all_rtl_1 (get_insns ());
2681 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2682 Recursively does the same for subexpressions. */
2685 verify_rtx_sharing (rtx orig
, rtx insn
)
2690 const char *format_ptr
;
2695 code
= GET_CODE (x
);
2697 /* These types may be freely shared. */
2713 /* SCRATCH must be shared because they represent distinct values. */
2716 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2717 clobbers or clobbers of hard registers that originated as pseudos.
2718 This is needed to allow safe register renaming. */
2719 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2720 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2725 if (shared_const_p (orig
))
2730 /* A MEM is allowed to be shared if its address is constant. */
2731 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2732 || reload_completed
|| reload_in_progress
)
2741 /* This rtx may not be shared. If it has already been seen,
2742 replace it with a copy of itself. */
2743 #ifdef ENABLE_CHECKING
2744 if (RTX_FLAG (x
, used
))
2746 error ("invalid rtl sharing found in the insn");
2748 error ("shared rtx");
2750 internal_error ("internal consistency failure");
2753 gcc_assert (!RTX_FLAG (x
, used
));
2755 RTX_FLAG (x
, used
) = 1;
2757 /* Now scan the subexpressions recursively. */
2759 format_ptr
= GET_RTX_FORMAT (code
);
2761 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2763 switch (*format_ptr
++)
2766 verify_rtx_sharing (XEXP (x
, i
), insn
);
2770 if (XVEC (x
, i
) != NULL
)
2773 int len
= XVECLEN (x
, i
);
2775 for (j
= 0; j
< len
; j
++)
2777 /* We allow sharing of ASM_OPERANDS inside single
2779 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2780 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2782 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2784 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2793 /* Reset used-flags for INSN. */
2796 reset_insn_used_flags (rtx insn
)
2798 gcc_assert (INSN_P (insn
));
2799 reset_used_flags (PATTERN (insn
));
2800 reset_used_flags (REG_NOTES (insn
));
2802 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2805 /* Go through all the RTL insn bodies and clear all the USED bits. */
2808 reset_all_used_flags (void)
2812 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2815 rtx pat
= PATTERN (p
);
2816 if (GET_CODE (pat
) != SEQUENCE
)
2817 reset_insn_used_flags (p
);
2820 gcc_assert (REG_NOTES (p
) == NULL
);
2821 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2823 rtx insn
= XVECEXP (pat
, 0, i
);
2825 reset_insn_used_flags (insn
);
2831 /* Verify sharing in INSN. */
2834 verify_insn_sharing (rtx insn
)
2836 gcc_assert (INSN_P (insn
));
2837 reset_used_flags (PATTERN (insn
));
2838 reset_used_flags (REG_NOTES (insn
));
2840 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2843 /* Go through all the RTL insn bodies and check that there is no unexpected
2844 sharing in between the subexpressions. */
2847 verify_rtl_sharing (void)
2851 timevar_push (TV_VERIFY_RTL_SHARING
);
2853 reset_all_used_flags ();
2855 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2858 rtx pat
= PATTERN (p
);
2859 if (GET_CODE (pat
) != SEQUENCE
)
2860 verify_insn_sharing (p
);
2862 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2864 rtx insn
= XVECEXP (pat
, 0, i
);
2866 verify_insn_sharing (insn
);
2870 reset_all_used_flags ();
2872 timevar_pop (TV_VERIFY_RTL_SHARING
);
2875 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2876 Assumes the mark bits are cleared at entry. */
2879 unshare_all_rtl_in_chain (rtx_insn
*insn
)
2881 for (; insn
; insn
= NEXT_INSN (insn
))
2884 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2885 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2887 CALL_INSN_FUNCTION_USAGE (insn
)
2888 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2892 /* Go through all virtual stack slots of a function and mark them as
2893 shared. We never replace the DECL_RTLs themselves with a copy,
2894 but expressions mentioned into a DECL_RTL cannot be shared with
2895 expressions in the instruction stream.
2897 Note that reload may convert pseudo registers into memories in-place.
2898 Pseudo registers are always shared, but MEMs never are. Thus if we
2899 reset the used flags on MEMs in the instruction stream, we must set
2900 them again on MEMs that appear in DECL_RTLs. */
2903 set_used_decls (tree blk
)
2908 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2909 if (DECL_RTL_SET_P (t
))
2910 set_used_flags (DECL_RTL (t
));
2912 /* Now process sub-blocks. */
2913 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2917 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2918 Recursively does the same for subexpressions. Uses
2919 copy_rtx_if_shared_1 to reduce stack space. */
2922 copy_rtx_if_shared (rtx orig
)
2924 copy_rtx_if_shared_1 (&orig
);
2928 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2929 use. Recursively does the same for subexpressions. */
2932 copy_rtx_if_shared_1 (rtx
*orig1
)
2938 const char *format_ptr
;
2942 /* Repeat is used to turn tail-recursion into iteration. */
2949 code
= GET_CODE (x
);
2951 /* These types may be freely shared. */
2967 /* SCRATCH must be shared because they represent distinct values. */
2970 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2971 clobbers or clobbers of hard registers that originated as pseudos.
2972 This is needed to allow safe register renaming. */
2973 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2974 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2979 if (shared_const_p (x
))
2989 /* The chain of insns is not being copied. */
2996 /* This rtx may not be shared. If it has already been seen,
2997 replace it with a copy of itself. */
2999 if (RTX_FLAG (x
, used
))
3001 x
= shallow_copy_rtx (x
);
3004 RTX_FLAG (x
, used
) = 1;
3006 /* Now scan the subexpressions recursively.
3007 We can store any replaced subexpressions directly into X
3008 since we know X is not shared! Any vectors in X
3009 must be copied if X was copied. */
3011 format_ptr
= GET_RTX_FORMAT (code
);
3012 length
= GET_RTX_LENGTH (code
);
3015 for (i
= 0; i
< length
; i
++)
3017 switch (*format_ptr
++)
3021 copy_rtx_if_shared_1 (last_ptr
);
3022 last_ptr
= &XEXP (x
, i
);
3026 if (XVEC (x
, i
) != NULL
)
3029 int len
= XVECLEN (x
, i
);
3031 /* Copy the vector iff I copied the rtx and the length
3033 if (copied
&& len
> 0)
3034 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
3036 /* Call recursively on all inside the vector. */
3037 for (j
= 0; j
< len
; j
++)
3040 copy_rtx_if_shared_1 (last_ptr
);
3041 last_ptr
= &XVECEXP (x
, i
, j
);
3056 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
3059 mark_used_flags (rtx x
, int flag
)
3063 const char *format_ptr
;
3066 /* Repeat is used to turn tail-recursion into iteration. */
3071 code
= GET_CODE (x
);
3073 /* These types may be freely shared so we needn't do any resetting
3097 /* The chain of insns is not being copied. */
3104 RTX_FLAG (x
, used
) = flag
;
3106 format_ptr
= GET_RTX_FORMAT (code
);
3107 length
= GET_RTX_LENGTH (code
);
3109 for (i
= 0; i
< length
; i
++)
3111 switch (*format_ptr
++)
3119 mark_used_flags (XEXP (x
, i
), flag
);
3123 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3124 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
3130 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3131 to look for shared sub-parts. */
3134 reset_used_flags (rtx x
)
3136 mark_used_flags (x
, 0);
3139 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3140 to look for shared sub-parts. */
3143 set_used_flags (rtx x
)
3145 mark_used_flags (x
, 1);
3148 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3149 Return X or the rtx for the pseudo reg the value of X was copied into.
3150 OTHER must be valid as a SET_DEST. */
3153 make_safe_from (rtx x
, rtx other
)
3156 switch (GET_CODE (other
))
3159 other
= SUBREG_REG (other
);
3161 case STRICT_LOW_PART
:
3164 other
= XEXP (other
, 0);
3173 && GET_CODE (x
) != SUBREG
)
3175 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
3176 || reg_mentioned_p (other
, x
))))
3178 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3179 emit_move_insn (temp
, x
);
3185 /* Emission of insns (adding them to the doubly-linked list). */
3187 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3190 get_last_insn_anywhere (void)
3192 struct sequence_stack
*seq
;
3193 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
3199 /* Return the first nonnote insn emitted in current sequence or current
3200 function. This routine looks inside SEQUENCEs. */
3203 get_first_nonnote_insn (void)
3205 rtx_insn
*insn
= get_insns ();
3210 for (insn
= next_insn (insn
);
3211 insn
&& NOTE_P (insn
);
3212 insn
= next_insn (insn
))
3216 if (NONJUMP_INSN_P (insn
)
3217 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3218 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3225 /* Return the last nonnote insn emitted in current sequence or current
3226 function. This routine looks inside SEQUENCEs. */
3229 get_last_nonnote_insn (void)
3231 rtx_insn
*insn
= get_last_insn ();
3236 for (insn
= previous_insn (insn
);
3237 insn
&& NOTE_P (insn
);
3238 insn
= previous_insn (insn
))
3242 if (NONJUMP_INSN_P (insn
))
3243 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
3244 insn
= seq
->insn (seq
->len () - 1);
3251 /* Return the number of actual (non-debug) insns emitted in this
3255 get_max_insn_count (void)
3257 int n
= cur_insn_uid
;
3259 /* The table size must be stable across -g, to avoid codegen
3260 differences due to debug insns, and not be affected by
3261 -fmin-insn-uid, to avoid excessive table size and to simplify
3262 debugging of -fcompare-debug failures. */
3263 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3264 n
-= cur_debug_insn_uid
;
3266 n
-= MIN_NONDEBUG_INSN_UID
;
3272 /* Return the next insn. If it is a SEQUENCE, return the first insn
3276 next_insn (rtx_insn
*insn
)
3280 insn
= NEXT_INSN (insn
);
3281 if (insn
&& NONJUMP_INSN_P (insn
)
3282 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3283 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3289 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3293 previous_insn (rtx_insn
*insn
)
3297 insn
= PREV_INSN (insn
);
3298 if (insn
&& NONJUMP_INSN_P (insn
))
3299 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
3300 insn
= seq
->insn (seq
->len () - 1);
3306 /* Return the next insn after INSN that is not a NOTE. This routine does not
3307 look inside SEQUENCEs. */
3310 next_nonnote_insn (rtx uncast_insn
)
3312 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3315 insn
= NEXT_INSN (insn
);
3316 if (insn
== 0 || !NOTE_P (insn
))
3323 /* Return the next insn after INSN that is not a NOTE, but stop the
3324 search before we enter another basic block. This routine does not
3325 look inside SEQUENCEs. */
3328 next_nonnote_insn_bb (rtx_insn
*insn
)
3332 insn
= NEXT_INSN (insn
);
3333 if (insn
== 0 || !NOTE_P (insn
))
3335 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3342 /* Return the previous insn before INSN that is not a NOTE. This routine does
3343 not look inside SEQUENCEs. */
3346 prev_nonnote_insn (rtx uncast_insn
)
3348 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3352 insn
= PREV_INSN (insn
);
3353 if (insn
== 0 || !NOTE_P (insn
))
3360 /* Return the previous insn before INSN that is not a NOTE, but stop
3361 the search before we enter another basic block. This routine does
3362 not look inside SEQUENCEs. */
3365 prev_nonnote_insn_bb (rtx uncast_insn
)
3367 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3371 insn
= PREV_INSN (insn
);
3372 if (insn
== 0 || !NOTE_P (insn
))
3374 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3381 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3382 routine does not look inside SEQUENCEs. */
3385 next_nondebug_insn (rtx uncast_insn
)
3387 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3391 insn
= NEXT_INSN (insn
);
3392 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3399 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3400 This routine does not look inside SEQUENCEs. */
3403 prev_nondebug_insn (rtx uncast_insn
)
3405 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3409 insn
= PREV_INSN (insn
);
3410 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3417 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3418 This routine does not look inside SEQUENCEs. */
3421 next_nonnote_nondebug_insn (rtx uncast_insn
)
3423 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3427 insn
= NEXT_INSN (insn
);
3428 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3435 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3436 This routine does not look inside SEQUENCEs. */
3439 prev_nonnote_nondebug_insn (rtx uncast_insn
)
3441 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3445 insn
= PREV_INSN (insn
);
3446 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3453 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3454 or 0, if there is none. This routine does not look inside
3458 next_real_insn (rtx uncast_insn
)
3460 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3464 insn
= NEXT_INSN (insn
);
3465 if (insn
== 0 || INSN_P (insn
))
3472 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3473 or 0, if there is none. This routine does not look inside
3477 prev_real_insn (rtx uncast_insn
)
3479 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3483 insn
= PREV_INSN (insn
);
3484 if (insn
== 0 || INSN_P (insn
))
3491 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3492 This routine does not look inside SEQUENCEs. */
3495 last_call_insn (void)
3499 for (insn
= get_last_insn ();
3500 insn
&& !CALL_P (insn
);
3501 insn
= PREV_INSN (insn
))
3504 return safe_as_a
<rtx_call_insn
*> (insn
);
3507 /* Find the next insn after INSN that really does something. This routine
3508 does not look inside SEQUENCEs. After reload this also skips over
3509 standalone USE and CLOBBER insn. */
3512 active_insn_p (const_rtx insn
)
3514 return (CALL_P (insn
) || JUMP_P (insn
)
3515 || JUMP_TABLE_DATA_P (insn
) /* FIXME */
3516 || (NONJUMP_INSN_P (insn
)
3517 && (! reload_completed
3518 || (GET_CODE (PATTERN (insn
)) != USE
3519 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3523 next_active_insn (rtx uncast_insn
)
3525 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3529 insn
= NEXT_INSN (insn
);
3530 if (insn
== 0 || active_insn_p (insn
))
3537 /* Find the last insn before INSN that really does something. This routine
3538 does not look inside SEQUENCEs. After reload this also skips over
3539 standalone USE and CLOBBER insn. */
3542 prev_active_insn (rtx uncast_insn
)
3544 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3548 insn
= PREV_INSN (insn
);
3549 if (insn
== 0 || active_insn_p (insn
))
3556 /* Return the next insn that uses CC0 after INSN, which is assumed to
3557 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3558 applied to the result of this function should yield INSN).
3560 Normally, this is simply the next insn. However, if a REG_CC_USER note
3561 is present, it contains the insn that uses CC0.
3563 Return 0 if we can't find the insn. */
3566 next_cc0_user (rtx uncast_insn
)
3568 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3570 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3573 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3575 insn
= next_nonnote_insn (insn
);
3576 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3577 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3579 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3585 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3586 note, it is the previous insn. */
3589 prev_cc0_setter (rtx_insn
*insn
)
3591 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3594 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3596 insn
= prev_nonnote_insn (insn
);
3597 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3603 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3606 find_auto_inc (const_rtx x
, const_rtx reg
)
3608 subrtx_iterator::array_type array
;
3609 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
3611 const_rtx x
= *iter
;
3612 if (GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
3613 && rtx_equal_p (reg
, XEXP (x
, 0)))
3620 /* Increment the label uses for all labels present in rtx. */
3623 mark_label_nuses (rtx x
)
3629 code
= GET_CODE (x
);
3630 if (code
== LABEL_REF
&& LABEL_P (LABEL_REF_LABEL (x
)))
3631 LABEL_NUSES (LABEL_REF_LABEL (x
))++;
3633 fmt
= GET_RTX_FORMAT (code
);
3634 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3637 mark_label_nuses (XEXP (x
, i
));
3638 else if (fmt
[i
] == 'E')
3639 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3640 mark_label_nuses (XVECEXP (x
, i
, j
));
3645 /* Try splitting insns that can be split for better scheduling.
3646 PAT is the pattern which might split.
3647 TRIAL is the insn providing PAT.
3648 LAST is nonzero if we should return the last insn of the sequence produced.
3650 If this routine succeeds in splitting, it returns the first or last
3651 replacement insn depending on the value of LAST. Otherwise, it
3652 returns TRIAL. If the insn to be returned can be split, it will be. */
3655 try_split (rtx pat
, rtx uncast_trial
, int last
)
3657 rtx_insn
*trial
= as_a
<rtx_insn
*> (uncast_trial
);
3658 rtx_insn
*before
= PREV_INSN (trial
);
3659 rtx_insn
*after
= NEXT_INSN (trial
);
3661 rtx_insn
*seq
, *tem
;
3663 rtx_insn
*insn_last
, *insn
;
3665 rtx call_insn
= NULL_RTX
;
3667 /* We're not good at redistributing frame information. */
3668 if (RTX_FRAME_RELATED_P (trial
))
3671 if (any_condjump_p (trial
)
3672 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3673 split_branch_probability
= XINT (note
, 0);
3674 probability
= split_branch_probability
;
3676 seq
= safe_as_a
<rtx_insn
*> (split_insns (pat
, trial
));
3678 split_branch_probability
= -1;
3683 /* Avoid infinite loop if any insn of the result matches
3684 the original pattern. */
3688 if (INSN_P (insn_last
)
3689 && rtx_equal_p (PATTERN (insn_last
), pat
))
3691 if (!NEXT_INSN (insn_last
))
3693 insn_last
= NEXT_INSN (insn_last
);
3696 /* We will be adding the new sequence to the function. The splitters
3697 may have introduced invalid RTL sharing, so unshare the sequence now. */
3698 unshare_all_rtl_in_chain (seq
);
3700 /* Mark labels and copy flags. */
3701 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3706 CROSSING_JUMP_P (insn
) = CROSSING_JUMP_P (trial
);
3707 mark_jump_label (PATTERN (insn
), insn
, 0);
3709 if (probability
!= -1
3710 && any_condjump_p (insn
)
3711 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3713 /* We can preserve the REG_BR_PROB notes only if exactly
3714 one jump is created, otherwise the machine description
3715 is responsible for this step using
3716 split_branch_probability variable. */
3717 gcc_assert (njumps
== 1);
3718 add_int_reg_note (insn
, REG_BR_PROB
, probability
);
3723 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3724 in SEQ and copy any additional information across. */
3727 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3733 gcc_assert (call_insn
== NULL_RTX
);
3736 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3737 target may have explicitly specified. */
3738 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3741 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3743 /* If the old call was a sibling call, the new one must
3745 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3747 /* If the new call is the last instruction in the sequence,
3748 it will effectively replace the old call in-situ. Otherwise
3749 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3750 so that it comes immediately after the new call. */
3751 if (NEXT_INSN (insn
))
3752 for (next
= NEXT_INSN (trial
);
3753 next
&& NOTE_P (next
);
3754 next
= NEXT_INSN (next
))
3755 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3758 add_insn_after (next
, insn
, NULL
);
3764 /* Copy notes, particularly those related to the CFG. */
3765 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3767 switch (REG_NOTE_KIND (note
))
3770 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3776 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3779 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3783 case REG_NON_LOCAL_GOTO
:
3784 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3787 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3793 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3795 rtx reg
= XEXP (note
, 0);
3796 if (!FIND_REG_INC_NOTE (insn
, reg
)
3797 && find_auto_inc (PATTERN (insn
), reg
))
3798 add_reg_note (insn
, REG_INC
, reg
);
3804 fixup_args_size_notes (NULL
, insn_last
, INTVAL (XEXP (note
, 0)));
3808 gcc_assert (call_insn
!= NULL_RTX
);
3809 add_reg_note (call_insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3817 /* If there are LABELS inside the split insns increment the
3818 usage count so we don't delete the label. */
3822 while (insn
!= NULL_RTX
)
3824 /* JUMP_P insns have already been "marked" above. */
3825 if (NONJUMP_INSN_P (insn
))
3826 mark_label_nuses (PATTERN (insn
));
3828 insn
= PREV_INSN (insn
);
3832 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3834 delete_insn (trial
);
3836 /* Recursively call try_split for each new insn created; by the
3837 time control returns here that insn will be fully split, so
3838 set LAST and continue from the insn after the one returned.
3839 We can't use next_active_insn here since AFTER may be a note.
3840 Ignore deleted insns, which can be occur if not optimizing. */
3841 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3842 if (! tem
->deleted () && INSN_P (tem
))
3843 tem
= try_split (PATTERN (tem
), tem
, 1);
3845 /* Return either the first or the last insn, depending on which was
3848 ? (after
? PREV_INSN (after
) : get_last_insn ())
3849 : NEXT_INSN (before
);
3852 /* Make and return an INSN rtx, initializing all its slots.
3853 Store PATTERN in the pattern slots. */
3856 make_insn_raw (rtx pattern
)
3860 insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
3862 INSN_UID (insn
) = cur_insn_uid
++;
3863 PATTERN (insn
) = pattern
;
3864 INSN_CODE (insn
) = -1;
3865 REG_NOTES (insn
) = NULL
;
3866 INSN_LOCATION (insn
) = curr_insn_location ();
3867 BLOCK_FOR_INSN (insn
) = NULL
;
3869 #ifdef ENABLE_RTL_CHECKING
3872 && (returnjump_p (insn
)
3873 || (GET_CODE (insn
) == SET
3874 && SET_DEST (insn
) == pc_rtx
)))
3876 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3884 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3887 make_debug_insn_raw (rtx pattern
)
3889 rtx_debug_insn
*insn
;
3891 insn
= as_a
<rtx_debug_insn
*> (rtx_alloc (DEBUG_INSN
));
3892 INSN_UID (insn
) = cur_debug_insn_uid
++;
3893 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3894 INSN_UID (insn
) = cur_insn_uid
++;
3896 PATTERN (insn
) = pattern
;
3897 INSN_CODE (insn
) = -1;
3898 REG_NOTES (insn
) = NULL
;
3899 INSN_LOCATION (insn
) = curr_insn_location ();
3900 BLOCK_FOR_INSN (insn
) = NULL
;
3905 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3908 make_jump_insn_raw (rtx pattern
)
3910 rtx_jump_insn
*insn
;
3912 insn
= as_a
<rtx_jump_insn
*> (rtx_alloc (JUMP_INSN
));
3913 INSN_UID (insn
) = cur_insn_uid
++;
3915 PATTERN (insn
) = pattern
;
3916 INSN_CODE (insn
) = -1;
3917 REG_NOTES (insn
) = NULL
;
3918 JUMP_LABEL (insn
) = NULL
;
3919 INSN_LOCATION (insn
) = curr_insn_location ();
3920 BLOCK_FOR_INSN (insn
) = NULL
;
3925 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3928 make_call_insn_raw (rtx pattern
)
3930 rtx_call_insn
*insn
;
3932 insn
= as_a
<rtx_call_insn
*> (rtx_alloc (CALL_INSN
));
3933 INSN_UID (insn
) = cur_insn_uid
++;
3935 PATTERN (insn
) = pattern
;
3936 INSN_CODE (insn
) = -1;
3937 REG_NOTES (insn
) = NULL
;
3938 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3939 INSN_LOCATION (insn
) = curr_insn_location ();
3940 BLOCK_FOR_INSN (insn
) = NULL
;
3945 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3948 make_note_raw (enum insn_note subtype
)
3950 /* Some notes are never created this way at all. These notes are
3951 only created by patching out insns. */
3952 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3953 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3955 rtx_note
*note
= as_a
<rtx_note
*> (rtx_alloc (NOTE
));
3956 INSN_UID (note
) = cur_insn_uid
++;
3957 NOTE_KIND (note
) = subtype
;
3958 BLOCK_FOR_INSN (note
) = NULL
;
3959 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3963 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3964 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3965 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3968 link_insn_into_chain (rtx_insn
*insn
, rtx_insn
*prev
, rtx_insn
*next
)
3970 SET_PREV_INSN (insn
) = prev
;
3971 SET_NEXT_INSN (insn
) = next
;
3974 SET_NEXT_INSN (prev
) = insn
;
3975 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3977 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (prev
));
3978 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = insn
;
3983 SET_PREV_INSN (next
) = insn
;
3984 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3986 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (next
));
3987 SET_PREV_INSN (sequence
->insn (0)) = insn
;
3991 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3993 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (insn
));
3994 SET_PREV_INSN (sequence
->insn (0)) = prev
;
3995 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = next
;
3999 /* Add INSN to the end of the doubly-linked list.
4000 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
4003 add_insn (rtx_insn
*insn
)
4005 rtx_insn
*prev
= get_last_insn ();
4006 link_insn_into_chain (insn
, prev
, NULL
);
4007 if (NULL
== get_insns ())
4008 set_first_insn (insn
);
4009 set_last_insn (insn
);
4012 /* Add INSN into the doubly-linked list after insn AFTER. */
4015 add_insn_after_nobb (rtx_insn
*insn
, rtx_insn
*after
)
4017 rtx_insn
*next
= NEXT_INSN (after
);
4019 gcc_assert (!optimize
|| !after
->deleted ());
4021 link_insn_into_chain (insn
, after
, next
);
4025 struct sequence_stack
*seq
;
4027 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4028 if (after
== seq
->last
)
4036 /* Add INSN into the doubly-linked list before insn BEFORE. */
4039 add_insn_before_nobb (rtx_insn
*insn
, rtx_insn
*before
)
4041 rtx_insn
*prev
= PREV_INSN (before
);
4043 gcc_assert (!optimize
|| !before
->deleted ());
4045 link_insn_into_chain (insn
, prev
, before
);
4049 struct sequence_stack
*seq
;
4051 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4052 if (before
== seq
->first
)
4062 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
4063 If BB is NULL, an attempt is made to infer the bb from before.
4065 This and the next function should be the only functions called
4066 to insert an insn once delay slots have been filled since only
4067 they know how to update a SEQUENCE. */
4070 add_insn_after (rtx uncast_insn
, rtx uncast_after
, basic_block bb
)
4072 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4073 rtx_insn
*after
= as_a
<rtx_insn
*> (uncast_after
);
4074 add_insn_after_nobb (insn
, after
);
4075 if (!BARRIER_P (after
)
4076 && !BARRIER_P (insn
)
4077 && (bb
= BLOCK_FOR_INSN (after
)))
4079 set_block_for_insn (insn
, bb
);
4081 df_insn_rescan (insn
);
4082 /* Should not happen as first in the BB is always
4083 either NOTE or LABEL. */
4084 if (BB_END (bb
) == after
4085 /* Avoid clobbering of structure when creating new BB. */
4086 && !BARRIER_P (insn
)
4087 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
4092 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4093 If BB is NULL, an attempt is made to infer the bb from before.
4095 This and the previous function should be the only functions called
4096 to insert an insn once delay slots have been filled since only
4097 they know how to update a SEQUENCE. */
4100 add_insn_before (rtx uncast_insn
, rtx uncast_before
, basic_block bb
)
4102 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4103 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4104 add_insn_before_nobb (insn
, before
);
4107 && !BARRIER_P (before
)
4108 && !BARRIER_P (insn
))
4109 bb
= BLOCK_FOR_INSN (before
);
4113 set_block_for_insn (insn
, bb
);
4115 df_insn_rescan (insn
);
4116 /* Should not happen as first in the BB is always either NOTE or
4118 gcc_assert (BB_HEAD (bb
) != insn
4119 /* Avoid clobbering of structure when creating new BB. */
4121 || NOTE_INSN_BASIC_BLOCK_P (insn
));
4125 /* Replace insn with an deleted instruction note. */
4128 set_insn_deleted (rtx insn
)
4131 df_insn_delete (as_a
<rtx_insn
*> (insn
));
4132 PUT_CODE (insn
, NOTE
);
4133 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
4137 /* Unlink INSN from the insn chain.
4139 This function knows how to handle sequences.
4141 This function does not invalidate data flow information associated with
4142 INSN (i.e. does not call df_insn_delete). That makes this function
4143 usable for only disconnecting an insn from the chain, and re-emit it
4146 To later insert INSN elsewhere in the insn chain via add_insn and
4147 similar functions, PREV_INSN and NEXT_INSN must be nullified by
4148 the caller. Nullifying them here breaks many insn chain walks.
4150 To really delete an insn and related DF information, use delete_insn. */
4153 remove_insn (rtx uncast_insn
)
4155 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4156 rtx_insn
*next
= NEXT_INSN (insn
);
4157 rtx_insn
*prev
= PREV_INSN (insn
);
4162 SET_NEXT_INSN (prev
) = next
;
4163 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
4165 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (prev
));
4166 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = next
;
4171 struct sequence_stack
*seq
;
4173 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4174 if (insn
== seq
->first
)
4185 SET_PREV_INSN (next
) = prev
;
4186 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
4188 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (next
));
4189 SET_PREV_INSN (sequence
->insn (0)) = prev
;
4194 struct sequence_stack
*seq
;
4196 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4197 if (insn
== seq
->last
)
4206 /* Fix up basic block boundaries, if necessary. */
4207 if (!BARRIER_P (insn
)
4208 && (bb
= BLOCK_FOR_INSN (insn
)))
4210 if (BB_HEAD (bb
) == insn
)
4212 /* Never ever delete the basic block note without deleting whole
4214 gcc_assert (!NOTE_P (insn
));
4215 BB_HEAD (bb
) = next
;
4217 if (BB_END (bb
) == insn
)
4222 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4225 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4227 gcc_assert (call_insn
&& CALL_P (call_insn
));
4229 /* Put the register usage information on the CALL. If there is already
4230 some usage information, put ours at the end. */
4231 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4235 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4236 link
= XEXP (link
, 1))
4239 XEXP (link
, 1) = call_fusage
;
4242 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4245 /* Delete all insns made since FROM.
4246 FROM becomes the new last instruction. */
4249 delete_insns_since (rtx_insn
*from
)
4254 SET_NEXT_INSN (from
) = 0;
4255 set_last_insn (from
);
4258 /* This function is deprecated, please use sequences instead.
4260 Move a consecutive bunch of insns to a different place in the chain.
4261 The insns to be moved are those between FROM and TO.
4262 They are moved to a new position after the insn AFTER.
4263 AFTER must not be FROM or TO or any insn in between.
4265 This function does not know about SEQUENCEs and hence should not be
4266 called after delay-slot filling has been done. */
4269 reorder_insns_nobb (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4271 #ifdef ENABLE_CHECKING
4273 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4274 gcc_assert (after
!= x
);
4275 gcc_assert (after
!= to
);
4278 /* Splice this bunch out of where it is now. */
4279 if (PREV_INSN (from
))
4280 SET_NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4282 SET_PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4283 if (get_last_insn () == to
)
4284 set_last_insn (PREV_INSN (from
));
4285 if (get_insns () == from
)
4286 set_first_insn (NEXT_INSN (to
));
4288 /* Make the new neighbors point to it and it to them. */
4289 if (NEXT_INSN (after
))
4290 SET_PREV_INSN (NEXT_INSN (after
)) = to
;
4292 SET_NEXT_INSN (to
) = NEXT_INSN (after
);
4293 SET_PREV_INSN (from
) = after
;
4294 SET_NEXT_INSN (after
) = from
;
4295 if (after
== get_last_insn ())
4299 /* Same as function above, but take care to update BB boundaries. */
4301 reorder_insns (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4303 rtx_insn
*prev
= PREV_INSN (from
);
4304 basic_block bb
, bb2
;
4306 reorder_insns_nobb (from
, to
, after
);
4308 if (!BARRIER_P (after
)
4309 && (bb
= BLOCK_FOR_INSN (after
)))
4312 df_set_bb_dirty (bb
);
4314 if (!BARRIER_P (from
)
4315 && (bb2
= BLOCK_FOR_INSN (from
)))
4317 if (BB_END (bb2
) == to
)
4318 BB_END (bb2
) = prev
;
4319 df_set_bb_dirty (bb2
);
4322 if (BB_END (bb
) == after
)
4325 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4327 df_insn_change_bb (x
, bb
);
4332 /* Emit insn(s) of given code and pattern
4333 at a specified place within the doubly-linked list.
4335 All of the emit_foo global entry points accept an object
4336 X which is either an insn list or a PATTERN of a single
4339 There are thus a few canonical ways to generate code and
4340 emit it at a specific place in the instruction stream. For
4341 example, consider the instruction named SPOT and the fact that
4342 we would like to emit some instructions before SPOT. We might
4346 ... emit the new instructions ...
4347 insns_head = get_insns ();
4350 emit_insn_before (insns_head, SPOT);
4352 It used to be common to generate SEQUENCE rtl instead, but that
4353 is a relic of the past which no longer occurs. The reason is that
4354 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4355 generated would almost certainly die right after it was created. */
4358 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4359 rtx_insn
*(*make_raw
) (rtx
))
4363 gcc_assert (before
);
4366 return safe_as_a
<rtx_insn
*> (last
);
4368 switch (GET_CODE (x
))
4377 insn
= as_a
<rtx_insn
*> (x
);
4380 rtx_insn
*next
= NEXT_INSN (insn
);
4381 add_insn_before (insn
, before
, bb
);
4387 #ifdef ENABLE_RTL_CHECKING
4394 last
= (*make_raw
) (x
);
4395 add_insn_before (last
, before
, bb
);
4399 return safe_as_a
<rtx_insn
*> (last
);
4402 /* Make X be output before the instruction BEFORE. */
4405 emit_insn_before_noloc (rtx x
, rtx_insn
*before
, basic_block bb
)
4407 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4410 /* Make an instruction with body X and code JUMP_INSN
4411 and output it before the instruction BEFORE. */
4414 emit_jump_insn_before_noloc (rtx x
, rtx_insn
*before
)
4416 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4417 make_jump_insn_raw
);
4420 /* Make an instruction with body X and code CALL_INSN
4421 and output it before the instruction BEFORE. */
4424 emit_call_insn_before_noloc (rtx x
, rtx_insn
*before
)
4426 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4427 make_call_insn_raw
);
4430 /* Make an instruction with body X and code DEBUG_INSN
4431 and output it before the instruction BEFORE. */
4434 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4436 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4437 make_debug_insn_raw
);
4440 /* Make an insn of code BARRIER
4441 and output it before the insn BEFORE. */
4444 emit_barrier_before (rtx before
)
4446 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4448 INSN_UID (insn
) = cur_insn_uid
++;
4450 add_insn_before (insn
, before
, NULL
);
4454 /* Emit the label LABEL before the insn BEFORE. */
4457 emit_label_before (rtx label
, rtx_insn
*before
)
4459 gcc_checking_assert (INSN_UID (label
) == 0);
4460 INSN_UID (label
) = cur_insn_uid
++;
4461 add_insn_before (label
, before
, NULL
);
4462 return as_a
<rtx_insn
*> (label
);
4465 /* Helper for emit_insn_after, handles lists of instructions
4469 emit_insn_after_1 (rtx_insn
*first
, rtx uncast_after
, basic_block bb
)
4471 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4473 rtx_insn
*after_after
;
4474 if (!bb
&& !BARRIER_P (after
))
4475 bb
= BLOCK_FOR_INSN (after
);
4479 df_set_bb_dirty (bb
);
4480 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4481 if (!BARRIER_P (last
))
4483 set_block_for_insn (last
, bb
);
4484 df_insn_rescan (last
);
4486 if (!BARRIER_P (last
))
4488 set_block_for_insn (last
, bb
);
4489 df_insn_rescan (last
);
4491 if (BB_END (bb
) == after
)
4495 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4498 after_after
= NEXT_INSN (after
);
4500 SET_NEXT_INSN (after
) = first
;
4501 SET_PREV_INSN (first
) = after
;
4502 SET_NEXT_INSN (last
) = after_after
;
4504 SET_PREV_INSN (after_after
) = last
;
4506 if (after
== get_last_insn ())
4507 set_last_insn (last
);
4513 emit_pattern_after_noloc (rtx x
, rtx uncast_after
, basic_block bb
,
4514 rtx_insn
*(*make_raw
)(rtx
))
4516 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4517 rtx_insn
*last
= after
;
4524 switch (GET_CODE (x
))
4533 last
= emit_insn_after_1 (as_a
<rtx_insn
*> (x
), after
, bb
);
4536 #ifdef ENABLE_RTL_CHECKING
4543 last
= (*make_raw
) (x
);
4544 add_insn_after (last
, after
, bb
);
4551 /* Make X be output after the insn AFTER and set the BB of insn. If
4552 BB is NULL, an attempt is made to infer the BB from AFTER. */
4555 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4557 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4561 /* Make an insn of code JUMP_INSN with body X
4562 and output it after the insn AFTER. */
4565 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4567 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4570 /* Make an instruction with body X and code CALL_INSN
4571 and output it after the instruction AFTER. */
4574 emit_call_insn_after_noloc (rtx x
, rtx after
)
4576 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4579 /* Make an instruction with body X and code CALL_INSN
4580 and output it after the instruction AFTER. */
4583 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4585 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4588 /* Make an insn of code BARRIER
4589 and output it after the insn AFTER. */
4592 emit_barrier_after (rtx after
)
4594 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4596 INSN_UID (insn
) = cur_insn_uid
++;
4598 add_insn_after (insn
, after
, NULL
);
4602 /* Emit the label LABEL after the insn AFTER. */
4605 emit_label_after (rtx label
, rtx_insn
*after
)
4607 gcc_checking_assert (INSN_UID (label
) == 0);
4608 INSN_UID (label
) = cur_insn_uid
++;
4609 add_insn_after (label
, after
, NULL
);
4610 return as_a
<rtx_insn
*> (label
);
4613 /* Notes require a bit of special handling: Some notes need to have their
4614 BLOCK_FOR_INSN set, others should never have it set, and some should
4615 have it set or clear depending on the context. */
4617 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4618 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4619 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4622 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4626 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4627 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4630 /* Notes for var tracking and EH region markers can appear between or
4631 inside basic blocks. If the caller is emitting on the basic block
4632 boundary, do not set BLOCK_FOR_INSN on the new note. */
4633 case NOTE_INSN_VAR_LOCATION
:
4634 case NOTE_INSN_CALL_ARG_LOCATION
:
4635 case NOTE_INSN_EH_REGION_BEG
:
4636 case NOTE_INSN_EH_REGION_END
:
4637 return on_bb_boundary_p
;
4639 /* Otherwise, BLOCK_FOR_INSN must be set. */
4645 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4648 emit_note_after (enum insn_note subtype
, rtx_insn
*after
)
4650 rtx_note
*note
= make_note_raw (subtype
);
4651 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4652 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4654 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4655 add_insn_after_nobb (note
, after
);
4657 add_insn_after (note
, after
, bb
);
4661 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4664 emit_note_before (enum insn_note subtype
, rtx_insn
*before
)
4666 rtx_note
*note
= make_note_raw (subtype
);
4667 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4668 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4670 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4671 add_insn_before_nobb (note
, before
);
4673 add_insn_before (note
, before
, bb
);
4677 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4678 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4681 emit_pattern_after_setloc (rtx pattern
, rtx uncast_after
, int loc
,
4682 rtx_insn
*(*make_raw
) (rtx
))
4684 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4685 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4687 if (pattern
== NULL_RTX
|| !loc
)
4688 return safe_as_a
<rtx_insn
*> (last
);
4690 after
= NEXT_INSN (after
);
4693 if (active_insn_p (after
)
4694 && !JUMP_TABLE_DATA_P (after
) /* FIXME */
4695 && !INSN_LOCATION (after
))
4696 INSN_LOCATION (after
) = loc
;
4699 after
= NEXT_INSN (after
);
4701 return safe_as_a
<rtx_insn
*> (last
);
4704 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4705 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4709 emit_pattern_after (rtx pattern
, rtx uncast_after
, bool skip_debug_insns
,
4710 rtx_insn
*(*make_raw
) (rtx
))
4712 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4713 rtx_insn
*prev
= after
;
4715 if (skip_debug_insns
)
4716 while (DEBUG_INSN_P (prev
))
4717 prev
= PREV_INSN (prev
);
4720 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4723 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4726 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4728 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4730 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4733 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4735 emit_insn_after (rtx pattern
, rtx after
)
4737 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4740 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4742 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4744 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4747 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4749 emit_jump_insn_after (rtx pattern
, rtx after
)
4751 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4754 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4756 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4758 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4761 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4763 emit_call_insn_after (rtx pattern
, rtx after
)
4765 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4768 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4770 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4772 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4775 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4777 emit_debug_insn_after (rtx pattern
, rtx after
)
4779 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4782 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4783 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4784 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4788 emit_pattern_before_setloc (rtx pattern
, rtx uncast_before
, int loc
, bool insnp
,
4789 rtx_insn
*(*make_raw
) (rtx
))
4791 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4792 rtx_insn
*first
= PREV_INSN (before
);
4793 rtx_insn
*last
= emit_pattern_before_noloc (pattern
, before
,
4794 insnp
? before
: NULL_RTX
,
4797 if (pattern
== NULL_RTX
|| !loc
)
4801 first
= get_insns ();
4803 first
= NEXT_INSN (first
);
4806 if (active_insn_p (first
)
4807 && !JUMP_TABLE_DATA_P (first
) /* FIXME */
4808 && !INSN_LOCATION (first
))
4809 INSN_LOCATION (first
) = loc
;
4812 first
= NEXT_INSN (first
);
4817 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4818 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4819 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4820 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4823 emit_pattern_before (rtx pattern
, rtx uncast_before
, bool skip_debug_insns
,
4824 bool insnp
, rtx_insn
*(*make_raw
) (rtx
))
4826 rtx_insn
*before
= safe_as_a
<rtx_insn
*> (uncast_before
);
4827 rtx_insn
*next
= before
;
4829 if (skip_debug_insns
)
4830 while (DEBUG_INSN_P (next
))
4831 next
= PREV_INSN (next
);
4834 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4837 return emit_pattern_before_noloc (pattern
, before
,
4838 insnp
? before
: NULL_RTX
,
4842 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4844 emit_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4846 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4850 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4852 emit_insn_before (rtx pattern
, rtx before
)
4854 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4857 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4859 emit_jump_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4861 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4862 make_jump_insn_raw
);
4865 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4867 emit_jump_insn_before (rtx pattern
, rtx before
)
4869 return emit_pattern_before (pattern
, before
, true, false,
4870 make_jump_insn_raw
);
4873 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4875 emit_call_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4877 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4878 make_call_insn_raw
);
4881 /* Like emit_call_insn_before_noloc,
4882 but set insn_location according to BEFORE. */
4884 emit_call_insn_before (rtx pattern
, rtx_insn
*before
)
4886 return emit_pattern_before (pattern
, before
, true, false,
4887 make_call_insn_raw
);
4890 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4892 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4894 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4895 make_debug_insn_raw
);
4898 /* Like emit_debug_insn_before_noloc,
4899 but set insn_location according to BEFORE. */
4901 emit_debug_insn_before (rtx pattern
, rtx_insn
*before
)
4903 return emit_pattern_before (pattern
, before
, false, false,
4904 make_debug_insn_raw
);
4907 /* Take X and emit it at the end of the doubly-linked
4910 Returns the last insn emitted. */
4915 rtx_insn
*last
= get_last_insn ();
4921 switch (GET_CODE (x
))
4930 insn
= as_a
<rtx_insn
*> (x
);
4933 rtx_insn
*next
= NEXT_INSN (insn
);
4940 #ifdef ENABLE_RTL_CHECKING
4941 case JUMP_TABLE_DATA
:
4948 last
= make_insn_raw (x
);
4956 /* Make an insn of code DEBUG_INSN with pattern X
4957 and add it to the end of the doubly-linked list. */
4960 emit_debug_insn (rtx x
)
4962 rtx_insn
*last
= get_last_insn ();
4968 switch (GET_CODE (x
))
4977 insn
= as_a
<rtx_insn
*> (x
);
4980 rtx_insn
*next
= NEXT_INSN (insn
);
4987 #ifdef ENABLE_RTL_CHECKING
4988 case JUMP_TABLE_DATA
:
4995 last
= make_debug_insn_raw (x
);
5003 /* Make an insn of code JUMP_INSN with pattern X
5004 and add it to the end of the doubly-linked list. */
5007 emit_jump_insn (rtx x
)
5009 rtx_insn
*last
= NULL
;
5012 switch (GET_CODE (x
))
5021 insn
= as_a
<rtx_insn
*> (x
);
5024 rtx_insn
*next
= NEXT_INSN (insn
);
5031 #ifdef ENABLE_RTL_CHECKING
5032 case JUMP_TABLE_DATA
:
5039 last
= make_jump_insn_raw (x
);
5047 /* Make an insn of code CALL_INSN with pattern X
5048 and add it to the end of the doubly-linked list. */
5051 emit_call_insn (rtx x
)
5055 switch (GET_CODE (x
))
5064 insn
= emit_insn (x
);
5067 #ifdef ENABLE_RTL_CHECKING
5069 case JUMP_TABLE_DATA
:
5075 insn
= make_call_insn_raw (x
);
5083 /* Add the label LABEL to the end of the doubly-linked list. */
5086 emit_label (rtx label
)
5088 gcc_checking_assert (INSN_UID (label
) == 0);
5089 INSN_UID (label
) = cur_insn_uid
++;
5090 add_insn (as_a
<rtx_insn
*> (label
));
5091 return as_a
<rtx_insn
*> (label
);
5094 /* Make an insn of code JUMP_TABLE_DATA
5095 and add it to the end of the doubly-linked list. */
5097 rtx_jump_table_data
*
5098 emit_jump_table_data (rtx table
)
5100 rtx_jump_table_data
*jump_table_data
=
5101 as_a
<rtx_jump_table_data
*> (rtx_alloc (JUMP_TABLE_DATA
));
5102 INSN_UID (jump_table_data
) = cur_insn_uid
++;
5103 PATTERN (jump_table_data
) = table
;
5104 BLOCK_FOR_INSN (jump_table_data
) = NULL
;
5105 add_insn (jump_table_data
);
5106 return jump_table_data
;
5109 /* Make an insn of code BARRIER
5110 and add it to the end of the doubly-linked list. */
5115 rtx_barrier
*barrier
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
5116 INSN_UID (barrier
) = cur_insn_uid
++;
5121 /* Emit a copy of note ORIG. */
5124 emit_note_copy (rtx_note
*orig
)
5126 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
5127 rtx_note
*note
= make_note_raw (kind
);
5128 NOTE_DATA (note
) = NOTE_DATA (orig
);
5133 /* Make an insn of code NOTE or type NOTE_NO
5134 and add it to the end of the doubly-linked list. */
5137 emit_note (enum insn_note kind
)
5139 rtx_note
*note
= make_note_raw (kind
);
5144 /* Emit a clobber of lvalue X. */
5147 emit_clobber (rtx x
)
5149 /* CONCATs should not appear in the insn stream. */
5150 if (GET_CODE (x
) == CONCAT
)
5152 emit_clobber (XEXP (x
, 0));
5153 return emit_clobber (XEXP (x
, 1));
5155 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
5158 /* Return a sequence of insns to clobber lvalue X. */
5172 /* Emit a use of rvalue X. */
5177 /* CONCATs should not appear in the insn stream. */
5178 if (GET_CODE (x
) == CONCAT
)
5180 emit_use (XEXP (x
, 0));
5181 return emit_use (XEXP (x
, 1));
5183 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
5186 /* Return a sequence of insns to use rvalue X. */
5200 /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5201 Return the set in INSN that such notes describe, or NULL if the notes
5202 have no meaning for INSN. */
5205 set_for_reg_notes (rtx insn
)
5212 pat
= PATTERN (insn
);
5213 if (GET_CODE (pat
) == PARALLEL
)
5215 /* We do not use single_set because that ignores SETs of unused
5216 registers. REG_EQUAL and REG_EQUIV notes really do require the
5217 PARALLEL to have a single SET. */
5218 if (multiple_sets (insn
))
5220 pat
= XVECEXP (pat
, 0, 0);
5223 if (GET_CODE (pat
) != SET
)
5226 reg
= SET_DEST (pat
);
5228 /* Notes apply to the contents of a STRICT_LOW_PART. */
5229 if (GET_CODE (reg
) == STRICT_LOW_PART
)
5230 reg
= XEXP (reg
, 0);
5232 /* Check that we have a register. */
5233 if (!(REG_P (reg
) || GET_CODE (reg
) == SUBREG
))
5239 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5240 note of this type already exists, remove it first. */
5243 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5245 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5251 if (!set_for_reg_notes (insn
))
5254 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5255 It serves no useful purpose and breaks eliminate_regs. */
5256 if (GET_CODE (datum
) == ASM_OPERANDS
)
5259 /* Notes with side effects are dangerous. Even if the side-effect
5260 initially mirrors one in PATTERN (INSN), later optimizations
5261 might alter the way that the final register value is calculated
5262 and so move or alter the side-effect in some way. The note would
5263 then no longer be a valid substitution for SET_SRC. */
5264 if (side_effects_p (datum
))
5273 XEXP (note
, 0) = datum
;
5276 add_reg_note (insn
, kind
, datum
);
5277 note
= REG_NOTES (insn
);
5284 df_notes_rescan (as_a
<rtx_insn
*> (insn
));
5293 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5295 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5297 rtx set
= set_for_reg_notes (insn
);
5299 if (set
&& SET_DEST (set
) == dst
)
5300 return set_unique_reg_note (insn
, kind
, datum
);
5304 /* Return an indication of which type of insn should have X as a body.
5305 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5307 static enum rtx_code
5308 classify_insn (rtx x
)
5312 if (GET_CODE (x
) == CALL
)
5314 if (ANY_RETURN_P (x
))
5316 if (GET_CODE (x
) == SET
)
5318 if (SET_DEST (x
) == pc_rtx
)
5320 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5325 if (GET_CODE (x
) == PARALLEL
)
5328 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5329 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5331 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5332 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5334 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5335 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5341 /* Emit the rtl pattern X as an appropriate kind of insn.
5342 If X is a label, it is simply added into the insn chain. */
5347 enum rtx_code code
= classify_insn (x
);
5352 return emit_label (x
);
5354 return emit_insn (x
);
5357 rtx_insn
*insn
= emit_jump_insn (x
);
5358 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5359 return emit_barrier ();
5363 return emit_call_insn (x
);
5365 return emit_debug_insn (x
);
5371 /* Space for free sequence stack entries. */
5372 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5374 /* Begin emitting insns to a sequence. If this sequence will contain
5375 something that might cause the compiler to pop arguments to function
5376 calls (because those pops have previously been deferred; see
5377 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5378 before calling this function. That will ensure that the deferred
5379 pops are not accidentally emitted in the middle of this sequence. */
5382 start_sequence (void)
5384 struct sequence_stack
*tem
;
5386 if (free_sequence_stack
!= NULL
)
5388 tem
= free_sequence_stack
;
5389 free_sequence_stack
= tem
->next
;
5392 tem
= ggc_alloc
<sequence_stack
> ();
5394 tem
->next
= get_current_sequence ()->next
;
5395 tem
->first
= get_insns ();
5396 tem
->last
= get_last_insn ();
5397 get_current_sequence ()->next
= tem
;
5403 /* Set up the insn chain starting with FIRST as the current sequence,
5404 saving the previously current one. See the documentation for
5405 start_sequence for more information about how to use this function. */
5408 push_to_sequence (rtx_insn
*first
)
5414 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5417 set_first_insn (first
);
5418 set_last_insn (last
);
5421 /* Like push_to_sequence, but take the last insn as an argument to avoid
5422 looping through the list. */
5425 push_to_sequence2 (rtx_insn
*first
, rtx_insn
*last
)
5429 set_first_insn (first
);
5430 set_last_insn (last
);
5433 /* Set up the outer-level insn chain
5434 as the current sequence, saving the previously current one. */
5437 push_topmost_sequence (void)
5439 struct sequence_stack
*top
;
5443 top
= get_topmost_sequence ();
5444 set_first_insn (top
->first
);
5445 set_last_insn (top
->last
);
5448 /* After emitting to the outer-level insn chain, update the outer-level
5449 insn chain, and restore the previous saved state. */
5452 pop_topmost_sequence (void)
5454 struct sequence_stack
*top
;
5456 top
= get_topmost_sequence ();
5457 top
->first
= get_insns ();
5458 top
->last
= get_last_insn ();
5463 /* After emitting to a sequence, restore previous saved state.
5465 To get the contents of the sequence just made, you must call
5466 `get_insns' *before* calling here.
5468 If the compiler might have deferred popping arguments while
5469 generating this sequence, and this sequence will not be immediately
5470 inserted into the instruction stream, use do_pending_stack_adjust
5471 before calling get_insns. That will ensure that the deferred
5472 pops are inserted into this sequence, and not into some random
5473 location in the instruction stream. See INHIBIT_DEFER_POP for more
5474 information about deferred popping of arguments. */
5479 struct sequence_stack
*tem
= get_current_sequence ()->next
;
5481 set_first_insn (tem
->first
);
5482 set_last_insn (tem
->last
);
5483 get_current_sequence ()->next
= tem
->next
;
5485 memset (tem
, 0, sizeof (*tem
));
5486 tem
->next
= free_sequence_stack
;
5487 free_sequence_stack
= tem
;
5490 /* Return 1 if currently emitting into a sequence. */
5493 in_sequence_p (void)
5495 return get_current_sequence ()->next
!= 0;
5498 /* Put the various virtual registers into REGNO_REG_RTX. */
5501 init_virtual_regs (void)
5503 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5504 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5505 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5506 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5507 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5508 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5509 = virtual_preferred_stack_boundary_rtx
;
5513 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5514 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5515 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5516 static int copy_insn_n_scratches
;
5518 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5519 copied an ASM_OPERANDS.
5520 In that case, it is the original input-operand vector. */
5521 static rtvec orig_asm_operands_vector
;
5523 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5524 copied an ASM_OPERANDS.
5525 In that case, it is the copied input-operand vector. */
5526 static rtvec copy_asm_operands_vector
;
5528 /* Likewise for the constraints vector. */
5529 static rtvec orig_asm_constraints_vector
;
5530 static rtvec copy_asm_constraints_vector
;
5532 /* Recursively create a new copy of an rtx for copy_insn.
5533 This function differs from copy_rtx in that it handles SCRATCHes and
5534 ASM_OPERANDs properly.
5535 Normally, this function is not used directly; use copy_insn as front end.
5536 However, you could first copy an insn pattern with copy_insn and then use
5537 this function afterwards to properly copy any REG_NOTEs containing
5541 copy_insn_1 (rtx orig
)
5546 const char *format_ptr
;
5551 code
= GET_CODE (orig
);
5566 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5567 clobbers or clobbers of hard registers that originated as pseudos.
5568 This is needed to allow safe register renaming. */
5569 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
5570 && ORIGINAL_REGNO (XEXP (orig
, 0)) == REGNO (XEXP (orig
, 0)))
5575 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5576 if (copy_insn_scratch_in
[i
] == orig
)
5577 return copy_insn_scratch_out
[i
];
5581 if (shared_const_p (orig
))
5585 /* A MEM with a constant address is not sharable. The problem is that
5586 the constant address may need to be reloaded. If the mem is shared,
5587 then reloading one copy of this mem will cause all copies to appear
5588 to have been reloaded. */
5594 /* Copy the various flags, fields, and other information. We assume
5595 that all fields need copying, and then clear the fields that should
5596 not be copied. That is the sensible default behavior, and forces
5597 us to explicitly document why we are *not* copying a flag. */
5598 copy
= shallow_copy_rtx (orig
);
5600 /* We do not copy the USED flag, which is used as a mark bit during
5601 walks over the RTL. */
5602 RTX_FLAG (copy
, used
) = 0;
5604 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5607 RTX_FLAG (copy
, jump
) = 0;
5608 RTX_FLAG (copy
, call
) = 0;
5609 RTX_FLAG (copy
, frame_related
) = 0;
5612 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5614 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5615 switch (*format_ptr
++)
5618 if (XEXP (orig
, i
) != NULL
)
5619 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5624 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5625 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5626 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5627 XVEC (copy
, i
) = copy_asm_operands_vector
;
5628 else if (XVEC (orig
, i
) != NULL
)
5630 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5631 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5632 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5643 /* These are left unchanged. */
5650 if (code
== SCRATCH
)
5652 i
= copy_insn_n_scratches
++;
5653 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5654 copy_insn_scratch_in
[i
] = orig
;
5655 copy_insn_scratch_out
[i
] = copy
;
5657 else if (code
== ASM_OPERANDS
)
5659 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5660 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5661 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5662 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5668 /* Create a new copy of an rtx.
5669 This function differs from copy_rtx in that it handles SCRATCHes and
5670 ASM_OPERANDs properly.
5671 INSN doesn't really have to be a full INSN; it could be just the
5674 copy_insn (rtx insn
)
5676 copy_insn_n_scratches
= 0;
5677 orig_asm_operands_vector
= 0;
5678 orig_asm_constraints_vector
= 0;
5679 copy_asm_operands_vector
= 0;
5680 copy_asm_constraints_vector
= 0;
5681 return copy_insn_1 (insn
);
5684 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5685 on that assumption that INSN itself remains in its original place. */
5688 copy_delay_slot_insn (rtx_insn
*insn
)
5690 /* Copy INSN with its rtx_code, all its notes, location etc. */
5691 insn
= as_a
<rtx_insn
*> (copy_rtx (insn
));
5692 INSN_UID (insn
) = cur_insn_uid
++;
5696 /* Initialize data structures and variables in this file
5697 before generating rtl for each function. */
5702 set_first_insn (NULL
);
5703 set_last_insn (NULL
);
5704 if (MIN_NONDEBUG_INSN_UID
)
5705 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5708 cur_debug_insn_uid
= 1;
5709 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5710 first_label_num
= label_num
;
5711 get_current_sequence ()->next
= NULL
;
5713 /* Init the tables that describe all the pseudo regs. */
5715 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5717 crtl
->emit
.regno_pointer_align
5718 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5720 regno_reg_rtx
= ggc_vec_alloc
<rtx
> (crtl
->emit
.regno_pointer_align_length
);
5722 /* Put copies of all the hard registers into regno_reg_rtx. */
5723 memcpy (regno_reg_rtx
,
5724 initial_regno_reg_rtx
,
5725 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5727 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5728 init_virtual_regs ();
5730 /* Indicate that the virtual registers and stack locations are
5732 REG_POINTER (stack_pointer_rtx
) = 1;
5733 REG_POINTER (frame_pointer_rtx
) = 1;
5734 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5735 REG_POINTER (arg_pointer_rtx
) = 1;
5737 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5738 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5739 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5740 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5741 REG_POINTER (virtual_cfa_rtx
) = 1;
5743 #ifdef STACK_BOUNDARY
5744 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5745 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5746 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5747 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5749 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5750 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5751 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5752 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5753 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5756 #ifdef INIT_EXPANDERS
5761 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5764 gen_const_vector (machine_mode mode
, int constant
)
5771 units
= GET_MODE_NUNITS (mode
);
5772 inner
= GET_MODE_INNER (mode
);
5774 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5776 v
= rtvec_alloc (units
);
5778 /* We need to call this function after we set the scalar const_tiny_rtx
5780 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5782 for (i
= 0; i
< units
; ++i
)
5783 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5785 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5789 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5790 all elements are zero, and the one vector when all elements are one. */
5792 gen_rtx_CONST_VECTOR (machine_mode mode
, rtvec v
)
5794 machine_mode inner
= GET_MODE_INNER (mode
);
5795 int nunits
= GET_MODE_NUNITS (mode
);
5799 /* Check to see if all of the elements have the same value. */
5800 x
= RTVEC_ELT (v
, nunits
- 1);
5801 for (i
= nunits
- 2; i
>= 0; i
--)
5802 if (RTVEC_ELT (v
, i
) != x
)
5805 /* If the values are all the same, check to see if we can use one of the
5806 standard constant vectors. */
5809 if (x
== CONST0_RTX (inner
))
5810 return CONST0_RTX (mode
);
5811 else if (x
== CONST1_RTX (inner
))
5812 return CONST1_RTX (mode
);
5813 else if (x
== CONSTM1_RTX (inner
))
5814 return CONSTM1_RTX (mode
);
5817 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5820 /* Initialise global register information required by all functions. */
5823 init_emit_regs (void)
5829 /* Reset register attributes */
5830 reg_attrs_htab
->empty ();
5832 /* We need reg_raw_mode, so initialize the modes now. */
5833 init_reg_modes_target ();
5835 /* Assign register numbers to the globally defined register rtx. */
5836 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5837 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5838 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5839 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5840 virtual_incoming_args_rtx
=
5841 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5842 virtual_stack_vars_rtx
=
5843 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5844 virtual_stack_dynamic_rtx
=
5845 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5846 virtual_outgoing_args_rtx
=
5847 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5848 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5849 virtual_preferred_stack_boundary_rtx
=
5850 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5852 /* Initialize RTL for commonly used hard registers. These are
5853 copied into regno_reg_rtx as we begin to compile each function. */
5854 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5855 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5857 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5858 return_address_pointer_rtx
5859 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5862 pic_offset_table_rtx
= NULL_RTX
;
5863 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5864 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5866 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5868 mode
= (machine_mode
) i
;
5869 attrs
= ggc_cleared_alloc
<mem_attrs
> ();
5870 attrs
->align
= BITS_PER_UNIT
;
5871 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5872 if (mode
!= BLKmode
)
5874 attrs
->size_known_p
= true;
5875 attrs
->size
= GET_MODE_SIZE (mode
);
5876 if (STRICT_ALIGNMENT
)
5877 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5879 mode_mem_attrs
[i
] = attrs
;
5883 /* Initialize global machine_mode variables. */
5886 init_derived_machine_modes (void)
5888 byte_mode
= VOIDmode
;
5889 word_mode
= VOIDmode
;
5891 for (machine_mode mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5893 mode
= GET_MODE_WIDER_MODE (mode
))
5895 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5896 && byte_mode
== VOIDmode
)
5899 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5900 && word_mode
== VOIDmode
)
5904 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5907 /* Create some permanent unique rtl objects shared between all functions. */
5910 init_emit_once (void)
5914 machine_mode double_mode
;
5916 /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
5917 CONST_FIXED, and memory attribute hash tables. */
5918 const_int_htab
= hash_table
<const_int_hasher
>::create_ggc (37);
5920 #if TARGET_SUPPORTS_WIDE_INT
5921 const_wide_int_htab
= hash_table
<const_wide_int_hasher
>::create_ggc (37);
5923 const_double_htab
= hash_table
<const_double_hasher
>::create_ggc (37);
5925 const_fixed_htab
= hash_table
<const_fixed_hasher
>::create_ggc (37);
5927 reg_attrs_htab
= hash_table
<reg_attr_hasher
>::create_ggc (37);
5929 #ifdef INIT_EXPANDERS
5930 /* This is to initialize {init|mark|free}_machine_status before the first
5931 call to push_function_context_to. This is needed by the Chill front
5932 end which calls push_function_context_to before the first call to
5933 init_function_start. */
5937 /* Create the unique rtx's for certain rtx codes and operand values. */
5939 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5940 tries to use these variables. */
5941 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5942 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5943 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5945 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5946 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5947 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5949 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5951 double_mode
= mode_for_size (DOUBLE_TYPE_SIZE
, MODE_FLOAT
, 0);
5953 real_from_integer (&dconst0
, double_mode
, 0, SIGNED
);
5954 real_from_integer (&dconst1
, double_mode
, 1, SIGNED
);
5955 real_from_integer (&dconst2
, double_mode
, 2, SIGNED
);
5960 dconsthalf
= dconst1
;
5961 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5963 for (i
= 0; i
< 3; i
++)
5965 const REAL_VALUE_TYPE
*const r
=
5966 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5968 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5970 mode
= GET_MODE_WIDER_MODE (mode
))
5971 const_tiny_rtx
[i
][(int) mode
] =
5972 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5974 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5976 mode
= GET_MODE_WIDER_MODE (mode
))
5977 const_tiny_rtx
[i
][(int) mode
] =
5978 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5980 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5982 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5984 mode
= GET_MODE_WIDER_MODE (mode
))
5985 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5987 for (mode
= MIN_MODE_PARTIAL_INT
;
5988 mode
<= MAX_MODE_PARTIAL_INT
;
5989 mode
= (machine_mode
)((int)(mode
) + 1))
5990 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5993 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5995 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5997 mode
= GET_MODE_WIDER_MODE (mode
))
5998 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
6000 for (mode
= MIN_MODE_PARTIAL_INT
;
6001 mode
<= MAX_MODE_PARTIAL_INT
;
6002 mode
= (machine_mode
)((int)(mode
) + 1))
6003 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
6005 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
6007 mode
= GET_MODE_WIDER_MODE (mode
))
6009 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
6010 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
6013 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
6015 mode
= GET_MODE_WIDER_MODE (mode
))
6017 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
6018 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
6021 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
6023 mode
= GET_MODE_WIDER_MODE (mode
))
6025 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6026 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6027 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
6030 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
6032 mode
= GET_MODE_WIDER_MODE (mode
))
6034 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6035 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6038 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
6040 mode
= GET_MODE_WIDER_MODE (mode
))
6042 FCONST0 (mode
).data
.high
= 0;
6043 FCONST0 (mode
).data
.low
= 0;
6044 FCONST0 (mode
).mode
= mode
;
6045 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6046 FCONST0 (mode
), mode
);
6049 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
6051 mode
= GET_MODE_WIDER_MODE (mode
))
6053 FCONST0 (mode
).data
.high
= 0;
6054 FCONST0 (mode
).data
.low
= 0;
6055 FCONST0 (mode
).mode
= mode
;
6056 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6057 FCONST0 (mode
), mode
);
6060 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
6062 mode
= GET_MODE_WIDER_MODE (mode
))
6064 FCONST0 (mode
).data
.high
= 0;
6065 FCONST0 (mode
).data
.low
= 0;
6066 FCONST0 (mode
).mode
= mode
;
6067 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6068 FCONST0 (mode
), mode
);
6070 /* We store the value 1. */
6071 FCONST1 (mode
).data
.high
= 0;
6072 FCONST1 (mode
).data
.low
= 0;
6073 FCONST1 (mode
).mode
= mode
;
6075 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6076 HOST_BITS_PER_DOUBLE_INT
,
6077 SIGNED_FIXED_POINT_MODE_P (mode
));
6078 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6079 FCONST1 (mode
), mode
);
6082 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
6084 mode
= GET_MODE_WIDER_MODE (mode
))
6086 FCONST0 (mode
).data
.high
= 0;
6087 FCONST0 (mode
).data
.low
= 0;
6088 FCONST0 (mode
).mode
= mode
;
6089 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6090 FCONST0 (mode
), mode
);
6092 /* We store the value 1. */
6093 FCONST1 (mode
).data
.high
= 0;
6094 FCONST1 (mode
).data
.low
= 0;
6095 FCONST1 (mode
).mode
= mode
;
6097 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6098 HOST_BITS_PER_DOUBLE_INT
,
6099 SIGNED_FIXED_POINT_MODE_P (mode
));
6100 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6101 FCONST1 (mode
), mode
);
6104 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
6106 mode
= GET_MODE_WIDER_MODE (mode
))
6108 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6111 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
6113 mode
= GET_MODE_WIDER_MODE (mode
))
6115 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6118 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
6120 mode
= GET_MODE_WIDER_MODE (mode
))
6122 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6123 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6126 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
6128 mode
= GET_MODE_WIDER_MODE (mode
))
6130 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6131 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6134 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
6135 if (GET_MODE_CLASS ((machine_mode
) i
) == MODE_CC
)
6136 const_tiny_rtx
[0][i
] = const0_rtx
;
6138 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
6139 if (STORE_FLAG_VALUE
== 1)
6140 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
6142 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_POINTER_BOUNDS
);
6144 mode
= GET_MODE_WIDER_MODE (mode
))
6146 wide_int wi_zero
= wi::zero (GET_MODE_PRECISION (mode
));
6147 const_tiny_rtx
[0][mode
] = immed_wide_int_const (wi_zero
, mode
);
6150 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
6151 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
6152 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
6153 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
6156 /* Produce exact duplicate of insn INSN after AFTER.
6157 Care updating of libcall regions if present. */
6160 emit_copy_of_insn_after (rtx_insn
*insn
, rtx_insn
*after
)
6165 switch (GET_CODE (insn
))
6168 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
6172 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
6173 CROSSING_JUMP_P (new_rtx
) = CROSSING_JUMP_P (insn
);
6177 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
6181 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
6182 if (CALL_INSN_FUNCTION_USAGE (insn
))
6183 CALL_INSN_FUNCTION_USAGE (new_rtx
)
6184 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
6185 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
6186 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
6187 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
6188 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
6189 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
6196 /* Update LABEL_NUSES. */
6197 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
6199 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
6201 /* If the old insn is frame related, then so is the new one. This is
6202 primarily needed for IA-64 unwind info which marks epilogue insns,
6203 which may be duplicated by the basic block reordering code. */
6204 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
6206 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6207 will make them. REG_LABEL_TARGETs are created there too, but are
6208 supposed to be sticky, so we copy them. */
6209 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
6210 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
6212 if (GET_CODE (link
) == EXPR_LIST
)
6213 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
6214 copy_insn_1 (XEXP (link
, 0)));
6216 add_shallow_copy_of_reg_note (new_rtx
, link
);
6219 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6223 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6225 gen_hard_reg_clobber (machine_mode mode
, unsigned int regno
)
6227 if (hard_reg_clobbers
[mode
][regno
])
6228 return hard_reg_clobbers
[mode
][regno
];
6230 return (hard_reg_clobbers
[mode
][regno
] =
6231 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6234 location_t prologue_location
;
6235 location_t epilogue_location
;
6237 /* Hold current location information and last location information, so the
6238 datastructures are built lazily only when some instructions in given
6239 place are needed. */
6240 static location_t curr_location
;
6242 /* Allocate insn location datastructure. */
6244 insn_locations_init (void)
6246 prologue_location
= epilogue_location
= 0;
6247 curr_location
= UNKNOWN_LOCATION
;
6250 /* At the end of emit stage, clear current location. */
6252 insn_locations_finalize (void)
6254 epilogue_location
= curr_location
;
6255 curr_location
= UNKNOWN_LOCATION
;
6258 /* Set current location. */
6260 set_curr_insn_location (location_t location
)
6262 curr_location
= location
;
6265 /* Get current location. */
6267 curr_insn_location (void)
6269 return curr_location
;
6272 /* Return lexical scope block insn belongs to. */
6274 insn_scope (const rtx_insn
*insn
)
6276 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6279 /* Return line number of the statement that produced this insn. */
6281 insn_line (const rtx_insn
*insn
)
6283 return LOCATION_LINE (INSN_LOCATION (insn
));
6286 /* Return source file of the statement that produced this insn. */
6288 insn_file (const rtx_insn
*insn
)
6290 return LOCATION_FILE (INSN_LOCATION (insn
));
6293 /* Return expanded location of the statement that produced this insn. */
6295 insn_location (const rtx_insn
*insn
)
6297 return expand_location (INSN_LOCATION (insn
));
6300 /* Return true if memory model MODEL requires a pre-operation (release-style)
6301 barrier or a post-operation (acquire-style) barrier. While not universal,
6302 this function matches behavior of several targets. */
6305 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6307 switch (model
& MEMMODEL_MASK
)
6309 case MEMMODEL_RELAXED
:
6310 case MEMMODEL_CONSUME
:
6312 case MEMMODEL_RELEASE
:
6313 case MEMMODEL_SYNC_RELEASE
:
6315 case MEMMODEL_ACQUIRE
:
6316 case MEMMODEL_SYNC_ACQUIRE
:
6318 case MEMMODEL_ACQ_REL
:
6319 case MEMMODEL_SEQ_CST
:
6320 case MEMMODEL_SYNC_SEQ_CST
:
6327 #include "gt-emit-rtl.h"