1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2013 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
46 #include "hard-reg-set.h"
48 #include "insn-config.h"
51 #include "basic-block.h"
54 #include "langhooks.h"
59 struct target_rtl default_target_rtl
;
61 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
64 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
66 /* Commonly used modes. */
68 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
69 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
70 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
71 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
73 /* Datastructures maintained for currently processed function in RTL form. */
75 struct rtl_data x_rtl
;
77 /* Indexed by pseudo register number, gives the rtx for that pseudo.
78 Allocated in parallel with regno_pointer_align.
79 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
80 with length attribute nested in top level structures. */
84 /* This is *not* reset after each function. It gives each CODE_LABEL
85 in the entire compilation a unique label number. */
87 static GTY(()) int label_num
= 1;
89 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
90 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
91 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
92 is set only for MODE_INT and MODE_VECTOR_INT modes. */
94 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
98 REAL_VALUE_TYPE dconst0
;
99 REAL_VALUE_TYPE dconst1
;
100 REAL_VALUE_TYPE dconst2
;
101 REAL_VALUE_TYPE dconstm1
;
102 REAL_VALUE_TYPE dconsthalf
;
104 /* Record fixed-point constant 0 and 1. */
105 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
106 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
108 /* We make one copy of (const_int C) where C is in
109 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
110 to save space during the compilation and simplify comparisons of
113 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
115 /* Standard pieces of rtx, to be substituted directly into things. */
118 rtx simple_return_rtx
;
121 /* A hash table storing CONST_INTs whose absolute value is greater
122 than MAX_SAVED_CONST_INT. */
124 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
125 htab_t const_int_htab
;
127 /* A hash table storing memory attribute structures. */
128 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
129 htab_t mem_attrs_htab
;
131 /* A hash table storing register attribute structures. */
132 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
133 htab_t reg_attrs_htab
;
135 /* A hash table storing all CONST_DOUBLEs. */
136 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
137 htab_t const_double_htab
;
139 /* A hash table storing all CONST_FIXEDs. */
140 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
141 htab_t const_fixed_htab
;
143 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
144 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
145 #define first_label_num (crtl->emit.x_first_label_num)
147 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
148 static void set_used_decls (tree
);
149 static void mark_label_nuses (rtx
);
150 static hashval_t
const_int_htab_hash (const void *);
151 static int const_int_htab_eq (const void *, const void *);
152 static hashval_t
const_double_htab_hash (const void *);
153 static int const_double_htab_eq (const void *, const void *);
154 static rtx
lookup_const_double (rtx
);
155 static hashval_t
const_fixed_htab_hash (const void *);
156 static int const_fixed_htab_eq (const void *, const void *);
157 static rtx
lookup_const_fixed (rtx
);
158 static hashval_t
mem_attrs_htab_hash (const void *);
159 static int mem_attrs_htab_eq (const void *, const void *);
160 static hashval_t
reg_attrs_htab_hash (const void *);
161 static int reg_attrs_htab_eq (const void *, const void *);
162 static reg_attrs
*get_reg_attrs (tree
, int);
163 static rtx
gen_const_vector (enum machine_mode
, int);
164 static void copy_rtx_if_shared_1 (rtx
*orig
);
166 /* Probability of the conditional branch currently proceeded by try_split.
167 Set to -1 otherwise. */
168 int split_branch_probability
= -1;
170 /* Returns a hash code for X (which is a really a CONST_INT). */
173 const_int_htab_hash (const void *x
)
175 return (hashval_t
) INTVAL ((const_rtx
) x
);
178 /* Returns nonzero if the value represented by X (which is really a
179 CONST_INT) is the same as that given by Y (which is really a
183 const_int_htab_eq (const void *x
, const void *y
)
185 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
188 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
190 const_double_htab_hash (const void *x
)
192 const_rtx
const value
= (const_rtx
) x
;
195 if (GET_MODE (value
) == VOIDmode
)
196 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
199 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
200 /* MODE is used in the comparison, so it should be in the hash. */
201 h
^= GET_MODE (value
);
206 /* Returns nonzero if the value represented by X (really a ...)
207 is the same as that represented by Y (really a ...) */
209 const_double_htab_eq (const void *x
, const void *y
)
211 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
213 if (GET_MODE (a
) != GET_MODE (b
))
215 if (GET_MODE (a
) == VOIDmode
)
216 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
217 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
219 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
220 CONST_DOUBLE_REAL_VALUE (b
));
223 /* Returns a hash code for X (which is really a CONST_FIXED). */
226 const_fixed_htab_hash (const void *x
)
228 const_rtx
const value
= (const_rtx
) x
;
231 h
= fixed_hash (CONST_FIXED_VALUE (value
));
232 /* MODE is used in the comparison, so it should be in the hash. */
233 h
^= GET_MODE (value
);
237 /* Returns nonzero if the value represented by X (really a ...)
238 is the same as that represented by Y (really a ...). */
241 const_fixed_htab_eq (const void *x
, const void *y
)
243 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
245 if (GET_MODE (a
) != GET_MODE (b
))
247 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
250 /* Returns a hash code for X (which is a really a mem_attrs *). */
253 mem_attrs_htab_hash (const void *x
)
255 const mem_attrs
*const p
= (const mem_attrs
*) x
;
257 return (p
->alias
^ (p
->align
* 1000)
258 ^ (p
->addrspace
* 4000)
259 ^ ((p
->offset_known_p
? p
->offset
: 0) * 50000)
260 ^ ((p
->size_known_p
? p
->size
: 0) * 2500000)
261 ^ (size_t) iterative_hash_expr (p
->expr
, 0));
264 /* Return true if the given memory attributes are equal. */
267 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
269 return (p
->alias
== q
->alias
270 && p
->offset_known_p
== q
->offset_known_p
271 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
272 && p
->size_known_p
== q
->size_known_p
273 && (!p
->size_known_p
|| p
->size
== q
->size
)
274 && p
->align
== q
->align
275 && p
->addrspace
== q
->addrspace
276 && (p
->expr
== q
->expr
277 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
278 && operand_equal_p (p
->expr
, q
->expr
, 0))));
281 /* Returns nonzero if the value represented by X (which is really a
282 mem_attrs *) is the same as that given by Y (which is also really a
286 mem_attrs_htab_eq (const void *x
, const void *y
)
288 return mem_attrs_eq_p ((const mem_attrs
*) x
, (const mem_attrs
*) y
);
291 /* Set MEM's memory attributes so that they are the same as ATTRS. */
294 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
298 /* If everything is the default, we can just clear the attributes. */
299 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
305 slot
= htab_find_slot (mem_attrs_htab
, attrs
, INSERT
);
308 *slot
= ggc_alloc_mem_attrs ();
309 memcpy (*slot
, attrs
, sizeof (mem_attrs
));
312 MEM_ATTRS (mem
) = (mem_attrs
*) *slot
;
315 /* Returns a hash code for X (which is a really a reg_attrs *). */
318 reg_attrs_htab_hash (const void *x
)
320 const reg_attrs
*const p
= (const reg_attrs
*) x
;
322 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
325 /* Returns nonzero if the value represented by X (which is really a
326 reg_attrs *) is the same as that given by Y (which is also really a
330 reg_attrs_htab_eq (const void *x
, const void *y
)
332 const reg_attrs
*const p
= (const reg_attrs
*) x
;
333 const reg_attrs
*const q
= (const reg_attrs
*) y
;
335 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
337 /* Allocate a new reg_attrs structure and insert it into the hash table if
338 one identical to it is not already in the table. We are doing this for
342 get_reg_attrs (tree decl
, int offset
)
347 /* If everything is the default, we can just return zero. */
348 if (decl
== 0 && offset
== 0)
352 attrs
.offset
= offset
;
354 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
357 *slot
= ggc_alloc_reg_attrs ();
358 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
361 return (reg_attrs
*) *slot
;
366 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
367 and to block register equivalences to be seen across this insn. */
372 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
373 MEM_VOLATILE_P (x
) = true;
379 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
380 don't attempt to share with the various global pieces of rtl (such as
381 frame_pointer_rtx). */
384 gen_raw_REG (enum machine_mode mode
, int regno
)
386 rtx x
= gen_rtx_raw_REG (mode
, regno
);
387 ORIGINAL_REGNO (x
) = regno
;
391 /* There are some RTL codes that require special attention; the generation
392 functions do the raw handling. If you add to this list, modify
393 special_rtx in gengenrtl.c as well. */
396 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
400 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
401 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
403 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
404 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
405 return const_true_rtx
;
408 /* Look up the CONST_INT in the hash table. */
409 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
410 (hashval_t
) arg
, INSERT
);
412 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
418 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
420 return GEN_INT (trunc_int_for_mode (c
, mode
));
423 /* CONST_DOUBLEs might be created from pairs of integers, or from
424 REAL_VALUE_TYPEs. Also, their length is known only at run time,
425 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
427 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
428 hash table. If so, return its counterpart; otherwise add it
429 to the hash table and return it. */
431 lookup_const_double (rtx real
)
433 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
440 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
441 VALUE in mode MODE. */
443 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
445 rtx real
= rtx_alloc (CONST_DOUBLE
);
446 PUT_MODE (real
, mode
);
450 return lookup_const_double (real
);
453 /* Determine whether FIXED, a CONST_FIXED, already exists in the
454 hash table. If so, return its counterpart; otherwise add it
455 to the hash table and return it. */
458 lookup_const_fixed (rtx fixed
)
460 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
467 /* Return a CONST_FIXED rtx for a fixed-point value specified by
468 VALUE in mode MODE. */
471 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
473 rtx fixed
= rtx_alloc (CONST_FIXED
);
474 PUT_MODE (fixed
, mode
);
478 return lookup_const_fixed (fixed
);
481 /* Constructs double_int from rtx CST. */
484 rtx_to_double_int (const_rtx cst
)
488 if (CONST_INT_P (cst
))
489 r
= double_int::from_shwi (INTVAL (cst
));
490 else if (CONST_DOUBLE_AS_INT_P (cst
))
492 r
.low
= CONST_DOUBLE_LOW (cst
);
493 r
.high
= CONST_DOUBLE_HIGH (cst
);
502 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
506 immed_double_int_const (double_int i
, enum machine_mode mode
)
508 return immed_double_const (i
.low
, i
.high
, mode
);
511 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
512 of ints: I0 is the low-order word and I1 is the high-order word.
513 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
514 implied upper bits are copies of the high bit of i1. The value
515 itself is neither signed nor unsigned. Do not use this routine for
516 non-integer modes; convert to REAL_VALUE_TYPE and use
517 CONST_DOUBLE_FROM_REAL_VALUE. */
520 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
525 /* There are the following cases (note that there are no modes with
526 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
528 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
530 2) If the value of the integer fits into HOST_WIDE_INT anyway
531 (i.e., i1 consists only from copies of the sign bit, and sign
532 of i0 and i1 are the same), then we return a CONST_INT for i0.
533 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
534 if (mode
!= VOIDmode
)
536 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
537 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
538 /* We can get a 0 for an error mark. */
539 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
540 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
542 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
543 return gen_int_mode (i0
, mode
);
546 /* If this integer fits in one word, return a CONST_INT. */
547 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
550 /* We use VOIDmode for integers. */
551 value
= rtx_alloc (CONST_DOUBLE
);
552 PUT_MODE (value
, VOIDmode
);
554 CONST_DOUBLE_LOW (value
) = i0
;
555 CONST_DOUBLE_HIGH (value
) = i1
;
557 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
558 XWINT (value
, i
) = 0;
560 return lookup_const_double (value
);
564 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
566 /* In case the MD file explicitly references the frame pointer, have
567 all such references point to the same frame pointer. This is
568 used during frame pointer elimination to distinguish the explicit
569 references to these registers from pseudos that happened to be
572 If we have eliminated the frame pointer or arg pointer, we will
573 be using it as a normal register, for example as a spill
574 register. In such cases, we might be accessing it in a mode that
575 is not Pmode and therefore cannot use the pre-allocated rtx.
577 Also don't do this when we are making new REGs in reload, since
578 we don't want to get confused with the real pointers. */
580 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
582 if (regno
== FRAME_POINTER_REGNUM
583 && (!reload_completed
|| frame_pointer_needed
))
584 return frame_pointer_rtx
;
585 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
586 if (regno
== HARD_FRAME_POINTER_REGNUM
587 && (!reload_completed
|| frame_pointer_needed
))
588 return hard_frame_pointer_rtx
;
590 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
591 if (regno
== ARG_POINTER_REGNUM
)
592 return arg_pointer_rtx
;
594 #ifdef RETURN_ADDRESS_POINTER_REGNUM
595 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
596 return return_address_pointer_rtx
;
598 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
599 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
600 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
601 return pic_offset_table_rtx
;
602 if (regno
== STACK_POINTER_REGNUM
)
603 return stack_pointer_rtx
;
607 /* If the per-function register table has been set up, try to re-use
608 an existing entry in that table to avoid useless generation of RTL.
610 This code is disabled for now until we can fix the various backends
611 which depend on having non-shared hard registers in some cases. Long
612 term we want to re-enable this code as it can significantly cut down
613 on the amount of useless RTL that gets generated.
615 We'll also need to fix some code that runs after reload that wants to
616 set ORIGINAL_REGNO. */
621 && regno
< FIRST_PSEUDO_REGISTER
622 && reg_raw_mode
[regno
] == mode
)
623 return regno_reg_rtx
[regno
];
626 return gen_raw_REG (mode
, regno
);
630 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
632 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
634 /* This field is not cleared by the mere allocation of the rtx, so
641 /* Generate a memory referring to non-trapping constant memory. */
644 gen_const_mem (enum machine_mode mode
, rtx addr
)
646 rtx mem
= gen_rtx_MEM (mode
, addr
);
647 MEM_READONLY_P (mem
) = 1;
648 MEM_NOTRAP_P (mem
) = 1;
652 /* Generate a MEM referring to fixed portions of the frame, e.g., register
656 gen_frame_mem (enum machine_mode mode
, rtx addr
)
658 rtx mem
= gen_rtx_MEM (mode
, addr
);
659 MEM_NOTRAP_P (mem
) = 1;
660 set_mem_alias_set (mem
, get_frame_alias_set ());
664 /* Generate a MEM referring to a temporary use of the stack, not part
665 of the fixed stack frame. For example, something which is pushed
666 by a target splitter. */
668 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
670 rtx mem
= gen_rtx_MEM (mode
, addr
);
671 MEM_NOTRAP_P (mem
) = 1;
672 if (!cfun
->calls_alloca
)
673 set_mem_alias_set (mem
, get_frame_alias_set ());
677 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
678 this construct would be valid, and false otherwise. */
681 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
682 const_rtx reg
, unsigned int offset
)
684 unsigned int isize
= GET_MODE_SIZE (imode
);
685 unsigned int osize
= GET_MODE_SIZE (omode
);
687 /* All subregs must be aligned. */
688 if (offset
% osize
!= 0)
691 /* The subreg offset cannot be outside the inner object. */
695 /* ??? This should not be here. Temporarily continue to allow word_mode
696 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
697 Generally, backends are doing something sketchy but it'll take time to
699 if (omode
== word_mode
)
701 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
702 is the culprit here, and not the backends. */
703 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
705 /* Allow component subregs of complex and vector. Though given the below
706 extraction rules, it's not always clear what that means. */
707 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
708 && GET_MODE_INNER (imode
) == omode
)
710 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
711 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
712 represent this. It's questionable if this ought to be represented at
713 all -- why can't this all be hidden in post-reload splitters that make
714 arbitrarily mode changes to the registers themselves. */
715 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
717 /* Subregs involving floating point modes are not allowed to
718 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
719 (subreg:SI (reg:DF) 0) isn't. */
720 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
722 if (! (isize
== osize
723 /* LRA can use subreg to store a floating point value in
724 an integer mode. Although the floating point and the
725 integer modes need the same number of hard registers,
726 the size of floating point mode can be less than the
727 integer mode. LRA also uses subregs for a register
728 should be used in different mode in on insn. */
733 /* Paradoxical subregs must have offset zero. */
737 /* This is a normal subreg. Verify that the offset is representable. */
739 /* For hard registers, we already have most of these rules collected in
740 subreg_offset_representable_p. */
741 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
743 unsigned int regno
= REGNO (reg
);
745 #ifdef CANNOT_CHANGE_MODE_CLASS
746 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
747 && GET_MODE_INNER (imode
) == omode
)
749 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
753 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
756 /* For pseudo registers, we want most of the same checks. Namely:
757 If the register no larger than a word, the subreg must be lowpart.
758 If the register is larger than a word, the subreg must be the lowpart
759 of a subword. A subreg does *not* perform arbitrary bit extraction.
760 Given that we've already checked mode/offset alignment, we only have
761 to check subword subregs here. */
762 if (osize
< UNITS_PER_WORD
763 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
765 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
766 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
767 if (offset
% UNITS_PER_WORD
!= low_off
)
774 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
776 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
777 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
780 /* Generate a SUBREG representing the least-significant part of REG if MODE
781 is smaller than mode of REG, otherwise paradoxical SUBREG. */
784 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
786 enum machine_mode inmode
;
788 inmode
= GET_MODE (reg
);
789 if (inmode
== VOIDmode
)
791 return gen_rtx_SUBREG (mode
, reg
,
792 subreg_lowpart_offset (mode
, inmode
));
796 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
799 gen_rtvec (int n
, ...)
807 /* Don't allocate an empty rtvec... */
814 rt_val
= rtvec_alloc (n
);
816 for (i
= 0; i
< n
; i
++)
817 rt_val
->elem
[i
] = va_arg (p
, rtx
);
824 gen_rtvec_v (int n
, rtx
*argp
)
829 /* Don't allocate an empty rtvec... */
833 rt_val
= rtvec_alloc (n
);
835 for (i
= 0; i
< n
; i
++)
836 rt_val
->elem
[i
] = *argp
++;
841 /* Return the number of bytes between the start of an OUTER_MODE
842 in-memory value and the start of an INNER_MODE in-memory value,
843 given that the former is a lowpart of the latter. It may be a
844 paradoxical lowpart, in which case the offset will be negative
845 on big-endian targets. */
848 byte_lowpart_offset (enum machine_mode outer_mode
,
849 enum machine_mode inner_mode
)
851 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
852 return subreg_lowpart_offset (outer_mode
, inner_mode
);
854 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
857 /* Generate a REG rtx for a new pseudo register of mode MODE.
858 This pseudo is assigned the next sequential register number. */
861 gen_reg_rtx (enum machine_mode mode
)
864 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
866 gcc_assert (can_create_pseudo_p ());
868 /* If a virtual register with bigger mode alignment is generated,
869 increase stack alignment estimation because it might be spilled
871 if (SUPPORTS_STACK_ALIGNMENT
872 && crtl
->stack_alignment_estimated
< align
873 && !crtl
->stack_realign_processed
)
875 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
876 if (crtl
->stack_alignment_estimated
< min_align
)
877 crtl
->stack_alignment_estimated
= min_align
;
880 if (generating_concat_p
881 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
882 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
884 /* For complex modes, don't make a single pseudo.
885 Instead, make a CONCAT of two pseudos.
886 This allows noncontiguous allocation of the real and imaginary parts,
887 which makes much better code. Besides, allocating DCmode
888 pseudos overstrains reload on some machines like the 386. */
889 rtx realpart
, imagpart
;
890 enum machine_mode partmode
= GET_MODE_INNER (mode
);
892 realpart
= gen_reg_rtx (partmode
);
893 imagpart
= gen_reg_rtx (partmode
);
894 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
897 /* Make sure regno_pointer_align, and regno_reg_rtx are large
898 enough to have an element for this pseudo reg number. */
900 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
902 int old_size
= crtl
->emit
.regno_pointer_align_length
;
906 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
907 memset (tmp
+ old_size
, 0, old_size
);
908 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
910 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
911 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
912 regno_reg_rtx
= new1
;
914 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
917 val
= gen_raw_REG (mode
, reg_rtx_no
);
918 regno_reg_rtx
[reg_rtx_no
++] = val
;
922 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
925 reg_is_parm_p (rtx reg
)
929 gcc_assert (REG_P (reg
));
930 decl
= REG_EXPR (reg
);
931 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
934 /* Update NEW with the same attributes as REG, but with OFFSET added
935 to the REG_OFFSET. */
938 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
940 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
941 REG_OFFSET (reg
) + offset
);
944 /* Generate a register with same attributes as REG, but with OFFSET
945 added to the REG_OFFSET. */
948 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
951 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
953 update_reg_offset (new_rtx
, reg
, offset
);
957 /* Generate a new pseudo-register with the same attributes as REG, but
958 with OFFSET added to the REG_OFFSET. */
961 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
963 rtx new_rtx
= gen_reg_rtx (mode
);
965 update_reg_offset (new_rtx
, reg
, offset
);
969 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
970 new register is a (possibly paradoxical) lowpart of the old one. */
973 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
975 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
976 PUT_MODE (reg
, mode
);
979 /* Copy REG's attributes from X, if X has any attributes. If REG and X
980 have different modes, REG is a (possibly paradoxical) lowpart of X. */
983 set_reg_attrs_from_value (rtx reg
, rtx x
)
986 bool can_be_reg_pointer
= true;
988 /* Don't call mark_reg_pointer for incompatible pointer sign
990 while (GET_CODE (x
) == SIGN_EXTEND
991 || GET_CODE (x
) == ZERO_EXTEND
992 || GET_CODE (x
) == TRUNCATE
993 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
995 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
996 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
997 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
998 can_be_reg_pointer
= false;
1003 /* Hard registers can be reused for multiple purposes within the same
1004 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1005 on them is wrong. */
1006 if (HARD_REGISTER_P (reg
))
1009 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1012 if (MEM_OFFSET_KNOWN_P (x
))
1013 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1014 MEM_OFFSET (x
) + offset
);
1015 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1016 mark_reg_pointer (reg
, 0);
1021 update_reg_offset (reg
, x
, offset
);
1022 if (can_be_reg_pointer
&& REG_POINTER (x
))
1023 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1027 /* Generate a REG rtx for a new pseudo register, copying the mode
1028 and attributes from X. */
1031 gen_reg_rtx_and_attrs (rtx x
)
1033 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1034 set_reg_attrs_from_value (reg
, x
);
1038 /* Set the register attributes for registers contained in PARM_RTX.
1039 Use needed values from memory attributes of MEM. */
1042 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1044 if (REG_P (parm_rtx
))
1045 set_reg_attrs_from_value (parm_rtx
, mem
);
1046 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1048 /* Check for a NULL entry in the first slot, used to indicate that the
1049 parameter goes both on the stack and in registers. */
1050 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1051 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1053 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1054 if (REG_P (XEXP (x
, 0)))
1055 REG_ATTRS (XEXP (x
, 0))
1056 = get_reg_attrs (MEM_EXPR (mem
),
1057 INTVAL (XEXP (x
, 1)));
1062 /* Set the REG_ATTRS for registers in value X, given that X represents
1066 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1068 if (GET_CODE (x
) == SUBREG
)
1070 gcc_assert (subreg_lowpart_p (x
));
1075 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1077 if (GET_CODE (x
) == CONCAT
)
1079 if (REG_P (XEXP (x
, 0)))
1080 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1081 if (REG_P (XEXP (x
, 1)))
1082 REG_ATTRS (XEXP (x
, 1))
1083 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1085 if (GET_CODE (x
) == PARALLEL
)
1089 /* Check for a NULL entry, used to indicate that the parameter goes
1090 both on the stack and in registers. */
1091 if (XEXP (XVECEXP (x
, 0, 0), 0))
1096 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1098 rtx y
= XVECEXP (x
, 0, i
);
1099 if (REG_P (XEXP (y
, 0)))
1100 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1105 /* Assign the RTX X to declaration T. */
1108 set_decl_rtl (tree t
, rtx x
)
1110 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1112 set_reg_attrs_for_decl_rtl (t
, x
);
1115 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1116 if the ABI requires the parameter to be passed by reference. */
1119 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1121 DECL_INCOMING_RTL (t
) = x
;
1122 if (x
&& !by_reference_p
)
1123 set_reg_attrs_for_decl_rtl (t
, x
);
1126 /* Identify REG (which may be a CONCAT) as a user register. */
1129 mark_user_reg (rtx reg
)
1131 if (GET_CODE (reg
) == CONCAT
)
1133 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1134 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1138 gcc_assert (REG_P (reg
));
1139 REG_USERVAR_P (reg
) = 1;
1143 /* Identify REG as a probable pointer register and show its alignment
1144 as ALIGN, if nonzero. */
1147 mark_reg_pointer (rtx reg
, int align
)
1149 if (! REG_POINTER (reg
))
1151 REG_POINTER (reg
) = 1;
1154 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1156 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1157 /* We can no-longer be sure just how aligned this pointer is. */
1158 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1161 /* Return 1 plus largest pseudo reg number used in the current function. */
1169 /* Return 1 + the largest label number used so far in the current function. */
1172 max_label_num (void)
1177 /* Return first label number used in this function (if any were used). */
1180 get_first_label_num (void)
1182 return first_label_num
;
1185 /* If the rtx for label was created during the expansion of a nested
1186 function, then first_label_num won't include this label number.
1187 Fix this now so that array indices work later. */
1190 maybe_set_first_label_num (rtx x
)
1192 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1193 first_label_num
= CODE_LABEL_NUMBER (x
);
1196 /* Return a value representing some low-order bits of X, where the number
1197 of low-order bits is given by MODE. Note that no conversion is done
1198 between floating-point and fixed-point values, rather, the bit
1199 representation is returned.
1201 This function handles the cases in common between gen_lowpart, below,
1202 and two variants in cse.c and combine.c. These are the cases that can
1203 be safely handled at all points in the compilation.
1205 If this is not a case we can handle, return 0. */
1208 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1210 int msize
= GET_MODE_SIZE (mode
);
1213 enum machine_mode innermode
;
1215 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1216 so we have to make one up. Yuk. */
1217 innermode
= GET_MODE (x
);
1219 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1220 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1221 else if (innermode
== VOIDmode
)
1222 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1224 xsize
= GET_MODE_SIZE (innermode
);
1226 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1228 if (innermode
== mode
)
1231 /* MODE must occupy no more words than the mode of X. */
1232 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1233 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1236 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1237 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1240 offset
= subreg_lowpart_offset (mode
, innermode
);
1242 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1243 && (GET_MODE_CLASS (mode
) == MODE_INT
1244 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1246 /* If we are getting the low-order part of something that has been
1247 sign- or zero-extended, we can either just use the object being
1248 extended or make a narrower extension. If we want an even smaller
1249 piece than the size of the object being extended, call ourselves
1252 This case is used mostly by combine and cse. */
1254 if (GET_MODE (XEXP (x
, 0)) == mode
)
1256 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1257 return gen_lowpart_common (mode
, XEXP (x
, 0));
1258 else if (msize
< xsize
)
1259 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1261 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1262 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1263 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1264 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1266 /* Otherwise, we can't do this. */
1271 gen_highpart (enum machine_mode mode
, rtx x
)
1273 unsigned int msize
= GET_MODE_SIZE (mode
);
1276 /* This case loses if X is a subreg. To catch bugs early,
1277 complain if an invalid MODE is used even in other cases. */
1278 gcc_assert (msize
<= UNITS_PER_WORD
1279 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1281 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1282 subreg_highpart_offset (mode
, GET_MODE (x
)));
1283 gcc_assert (result
);
1285 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1286 the target if we have a MEM. gen_highpart must return a valid operand,
1287 emitting code if necessary to do so. */
1290 result
= validize_mem (result
);
1291 gcc_assert (result
);
1297 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1298 be VOIDmode constant. */
1300 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1302 if (GET_MODE (exp
) != VOIDmode
)
1304 gcc_assert (GET_MODE (exp
) == innermode
);
1305 return gen_highpart (outermode
, exp
);
1307 return simplify_gen_subreg (outermode
, exp
, innermode
,
1308 subreg_highpart_offset (outermode
, innermode
));
1311 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1314 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1316 unsigned int offset
= 0;
1317 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1321 if (WORDS_BIG_ENDIAN
)
1322 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1323 if (BYTES_BIG_ENDIAN
)
1324 offset
+= difference
% UNITS_PER_WORD
;
1330 /* Return offset in bytes to get OUTERMODE high part
1331 of the value in mode INNERMODE stored in memory in target format. */
1333 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1335 unsigned int offset
= 0;
1336 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1338 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1342 if (! WORDS_BIG_ENDIAN
)
1343 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1344 if (! BYTES_BIG_ENDIAN
)
1345 offset
+= difference
% UNITS_PER_WORD
;
1351 /* Return 1 iff X, assumed to be a SUBREG,
1352 refers to the least significant part of its containing reg.
1353 If X is not a SUBREG, always return 1 (it is its own low part!). */
1356 subreg_lowpart_p (const_rtx x
)
1358 if (GET_CODE (x
) != SUBREG
)
1360 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1363 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1364 == SUBREG_BYTE (x
));
1367 /* Return true if X is a paradoxical subreg, false otherwise. */
1369 paradoxical_subreg_p (const_rtx x
)
1371 if (GET_CODE (x
) != SUBREG
)
1373 return (GET_MODE_PRECISION (GET_MODE (x
))
1374 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1377 /* Return subword OFFSET of operand OP.
1378 The word number, OFFSET, is interpreted as the word number starting
1379 at the low-order address. OFFSET 0 is the low-order word if not
1380 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1382 If we cannot extract the required word, we return zero. Otherwise,
1383 an rtx corresponding to the requested word will be returned.
1385 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1386 reload has completed, a valid address will always be returned. After
1387 reload, if a valid address cannot be returned, we return zero.
1389 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1390 it is the responsibility of the caller.
1392 MODE is the mode of OP in case it is a CONST_INT.
1394 ??? This is still rather broken for some cases. The problem for the
1395 moment is that all callers of this thing provide no 'goal mode' to
1396 tell us to work with. This exists because all callers were written
1397 in a word based SUBREG world.
1398 Now use of this function can be deprecated by simplify_subreg in most
1403 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1405 if (mode
== VOIDmode
)
1406 mode
= GET_MODE (op
);
1408 gcc_assert (mode
!= VOIDmode
);
1410 /* If OP is narrower than a word, fail. */
1412 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1415 /* If we want a word outside OP, return zero. */
1417 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1420 /* Form a new MEM at the requested address. */
1423 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1425 if (! validate_address
)
1428 else if (reload_completed
)
1430 if (! strict_memory_address_addr_space_p (word_mode
,
1432 MEM_ADDR_SPACE (op
)))
1436 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1439 /* Rest can be handled by simplify_subreg. */
1440 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1443 /* Similar to `operand_subword', but never return 0. If we can't
1444 extract the required subword, put OP into a register and try again.
1445 The second attempt must succeed. We always validate the address in
1448 MODE is the mode of OP, in case it is CONST_INT. */
1451 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1453 rtx result
= operand_subword (op
, offset
, 1, mode
);
1458 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1460 /* If this is a register which can not be accessed by words, copy it
1461 to a pseudo register. */
1463 op
= copy_to_reg (op
);
1465 op
= force_reg (mode
, op
);
1468 result
= operand_subword (op
, offset
, 1, mode
);
1469 gcc_assert (result
);
1474 /* Returns 1 if both MEM_EXPR can be considered equal
1478 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1483 if (! expr1
|| ! expr2
)
1486 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1489 return operand_equal_p (expr1
, expr2
, 0);
1492 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1493 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1497 get_mem_align_offset (rtx mem
, unsigned int align
)
1500 unsigned HOST_WIDE_INT offset
;
1502 /* This function can't use
1503 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1504 || (MAX (MEM_ALIGN (mem),
1505 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1509 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1511 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1512 for <variable>. get_inner_reference doesn't handle it and
1513 even if it did, the alignment in that case needs to be determined
1514 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1515 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1516 isn't sufficiently aligned, the object it is in might be. */
1517 gcc_assert (MEM_P (mem
));
1518 expr
= MEM_EXPR (mem
);
1519 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1522 offset
= MEM_OFFSET (mem
);
1525 if (DECL_ALIGN (expr
) < align
)
1528 else if (INDIRECT_REF_P (expr
))
1530 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1533 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1537 tree inner
= TREE_OPERAND (expr
, 0);
1538 tree field
= TREE_OPERAND (expr
, 1);
1539 tree byte_offset
= component_ref_field_offset (expr
);
1540 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1543 || !host_integerp (byte_offset
, 1)
1544 || !host_integerp (bit_offset
, 1))
1547 offset
+= tree_low_cst (byte_offset
, 1);
1548 offset
+= tree_low_cst (bit_offset
, 1) / BITS_PER_UNIT
;
1550 if (inner
== NULL_TREE
)
1552 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1553 < (unsigned int) align
)
1557 else if (DECL_P (inner
))
1559 if (DECL_ALIGN (inner
) < align
)
1563 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1571 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1574 /* Given REF (a MEM) and T, either the type of X or the expression
1575 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1576 if we are making a new object of this type. BITPOS is nonzero if
1577 there is an offset outstanding on T that will be applied later. */
1580 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1581 HOST_WIDE_INT bitpos
)
1583 HOST_WIDE_INT apply_bitpos
= 0;
1585 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1588 /* It can happen that type_for_mode was given a mode for which there
1589 is no language-level type. In which case it returns NULL, which
1594 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1595 if (type
== error_mark_node
)
1598 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1599 wrong answer, as it assumes that DECL_RTL already has the right alias
1600 info. Callers should not set DECL_RTL until after the call to
1601 set_mem_attributes. */
1602 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1604 memset (&attrs
, 0, sizeof (attrs
));
1606 /* Get the alias set from the expression or type (perhaps using a
1607 front-end routine) and use it. */
1608 attrs
.alias
= get_alias_set (t
);
1610 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1611 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1613 /* Default values from pre-existing memory attributes if present. */
1614 refattrs
= MEM_ATTRS (ref
);
1617 /* ??? Can this ever happen? Calling this routine on a MEM that
1618 already carries memory attributes should probably be invalid. */
1619 attrs
.expr
= refattrs
->expr
;
1620 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1621 attrs
.offset
= refattrs
->offset
;
1622 attrs
.size_known_p
= refattrs
->size_known_p
;
1623 attrs
.size
= refattrs
->size
;
1624 attrs
.align
= refattrs
->align
;
1627 /* Otherwise, default values from the mode of the MEM reference. */
1630 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1631 gcc_assert (!defattrs
->expr
);
1632 gcc_assert (!defattrs
->offset_known_p
);
1634 /* Respect mode size. */
1635 attrs
.size_known_p
= defattrs
->size_known_p
;
1636 attrs
.size
= defattrs
->size
;
1637 /* ??? Is this really necessary? We probably should always get
1638 the size from the type below. */
1640 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1641 if T is an object, always compute the object alignment below. */
1643 attrs
.align
= defattrs
->align
;
1645 attrs
.align
= BITS_PER_UNIT
;
1646 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1647 e.g. if the type carries an alignment attribute. Should we be
1648 able to simply always use TYPE_ALIGN? */
1651 /* We can set the alignment from the type if we are making an object,
1652 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1653 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1654 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1656 /* If the size is known, we can set that. */
1657 tree new_size
= TYPE_SIZE_UNIT (type
);
1659 /* The address-space is that of the type. */
1660 as
= TYPE_ADDR_SPACE (type
);
1662 /* If T is not a type, we may be able to deduce some more information about
1668 if (TREE_THIS_VOLATILE (t
))
1669 MEM_VOLATILE_P (ref
) = 1;
1671 /* Now remove any conversions: they don't change what the underlying
1672 object is. Likewise for SAVE_EXPR. */
1673 while (CONVERT_EXPR_P (t
)
1674 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1675 || TREE_CODE (t
) == SAVE_EXPR
)
1676 t
= TREE_OPERAND (t
, 0);
1678 /* Note whether this expression can trap. */
1679 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1681 base
= get_base_address (t
);
1685 && TREE_READONLY (base
)
1686 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1687 && !TREE_THIS_VOLATILE (base
))
1688 MEM_READONLY_P (ref
) = 1;
1690 /* Mark static const strings readonly as well. */
1691 if (TREE_CODE (base
) == STRING_CST
1692 && TREE_READONLY (base
)
1693 && TREE_STATIC (base
))
1694 MEM_READONLY_P (ref
) = 1;
1696 /* Address-space information is on the base object. */
1697 if (TREE_CODE (base
) == MEM_REF
1698 || TREE_CODE (base
) == TARGET_MEM_REF
)
1699 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1702 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1705 /* If this expression uses it's parent's alias set, mark it such
1706 that we won't change it. */
1707 if (component_uses_parent_alias_set (t
))
1708 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1710 /* If this is a decl, set the attributes of the MEM from it. */
1714 attrs
.offset_known_p
= true;
1716 apply_bitpos
= bitpos
;
1717 new_size
= DECL_SIZE_UNIT (t
);
1720 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1721 else if (CONSTANT_CLASS_P (t
))
1724 /* If this is a field reference, record it. */
1725 else if (TREE_CODE (t
) == COMPONENT_REF
)
1728 attrs
.offset_known_p
= true;
1730 apply_bitpos
= bitpos
;
1731 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1732 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1735 /* If this is an array reference, look for an outer field reference. */
1736 else if (TREE_CODE (t
) == ARRAY_REF
)
1738 tree off_tree
= size_zero_node
;
1739 /* We can't modify t, because we use it at the end of the
1745 tree index
= TREE_OPERAND (t2
, 1);
1746 tree low_bound
= array_ref_low_bound (t2
);
1747 tree unit_size
= array_ref_element_size (t2
);
1749 /* We assume all arrays have sizes that are a multiple of a byte.
1750 First subtract the lower bound, if any, in the type of the
1751 index, then convert to sizetype and multiply by the size of
1752 the array element. */
1753 if (! integer_zerop (low_bound
))
1754 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1757 off_tree
= size_binop (PLUS_EXPR
,
1758 size_binop (MULT_EXPR
,
1759 fold_convert (sizetype
,
1763 t2
= TREE_OPERAND (t2
, 0);
1765 while (TREE_CODE (t2
) == ARRAY_REF
);
1768 || TREE_CODE (t2
) == COMPONENT_REF
)
1771 attrs
.offset_known_p
= false;
1772 if (host_integerp (off_tree
, 1))
1774 attrs
.offset_known_p
= true;
1775 attrs
.offset
= tree_low_cst (off_tree
, 1);
1776 apply_bitpos
= bitpos
;
1779 /* Else do not record a MEM_EXPR. */
1782 /* If this is an indirect reference, record it. */
1783 else if (TREE_CODE (t
) == MEM_REF
1784 || TREE_CODE (t
) == TARGET_MEM_REF
)
1787 attrs
.offset_known_p
= true;
1789 apply_bitpos
= bitpos
;
1792 /* Compute the alignment. */
1793 unsigned int obj_align
;
1794 unsigned HOST_WIDE_INT obj_bitpos
;
1795 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1796 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1797 if (obj_bitpos
!= 0)
1798 obj_align
= (obj_bitpos
& -obj_bitpos
);
1799 attrs
.align
= MAX (attrs
.align
, obj_align
);
1802 if (host_integerp (new_size
, 1))
1804 attrs
.size_known_p
= true;
1805 attrs
.size
= tree_low_cst (new_size
, 1);
1808 /* If we modified OFFSET based on T, then subtract the outstanding
1809 bit position offset. Similarly, increase the size of the accessed
1810 object to contain the negative offset. */
1813 gcc_assert (attrs
.offset_known_p
);
1814 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1815 if (attrs
.size_known_p
)
1816 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1819 /* Now set the attributes we computed above. */
1820 attrs
.addrspace
= as
;
1821 set_mem_attrs (ref
, &attrs
);
1825 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1827 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1830 /* Set the alias set of MEM to SET. */
1833 set_mem_alias_set (rtx mem
, alias_set_type set
)
1835 struct mem_attrs attrs
;
1837 /* If the new and old alias sets don't conflict, something is wrong. */
1838 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1839 attrs
= *get_mem_attrs (mem
);
1841 set_mem_attrs (mem
, &attrs
);
1844 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1847 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
1849 struct mem_attrs attrs
;
1851 attrs
= *get_mem_attrs (mem
);
1852 attrs
.addrspace
= addrspace
;
1853 set_mem_attrs (mem
, &attrs
);
1856 /* Set the alignment of MEM to ALIGN bits. */
1859 set_mem_align (rtx mem
, unsigned int align
)
1861 struct mem_attrs attrs
;
1863 attrs
= *get_mem_attrs (mem
);
1864 attrs
.align
= align
;
1865 set_mem_attrs (mem
, &attrs
);
1868 /* Set the expr for MEM to EXPR. */
1871 set_mem_expr (rtx mem
, tree expr
)
1873 struct mem_attrs attrs
;
1875 attrs
= *get_mem_attrs (mem
);
1877 set_mem_attrs (mem
, &attrs
);
1880 /* Set the offset of MEM to OFFSET. */
1883 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
1885 struct mem_attrs attrs
;
1887 attrs
= *get_mem_attrs (mem
);
1888 attrs
.offset_known_p
= true;
1889 attrs
.offset
= offset
;
1890 set_mem_attrs (mem
, &attrs
);
1893 /* Clear the offset of MEM. */
1896 clear_mem_offset (rtx mem
)
1898 struct mem_attrs attrs
;
1900 attrs
= *get_mem_attrs (mem
);
1901 attrs
.offset_known_p
= false;
1902 set_mem_attrs (mem
, &attrs
);
1905 /* Set the size of MEM to SIZE. */
1908 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
1910 struct mem_attrs attrs
;
1912 attrs
= *get_mem_attrs (mem
);
1913 attrs
.size_known_p
= true;
1915 set_mem_attrs (mem
, &attrs
);
1918 /* Clear the size of MEM. */
1921 clear_mem_size (rtx mem
)
1923 struct mem_attrs attrs
;
1925 attrs
= *get_mem_attrs (mem
);
1926 attrs
.size_known_p
= false;
1927 set_mem_attrs (mem
, &attrs
);
1930 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1931 and its address changed to ADDR. (VOIDmode means don't change the mode.
1932 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1933 returned memory location is required to be valid. The memory
1934 attributes are not changed. */
1937 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1942 gcc_assert (MEM_P (memref
));
1943 as
= MEM_ADDR_SPACE (memref
);
1944 if (mode
== VOIDmode
)
1945 mode
= GET_MODE (memref
);
1947 addr
= XEXP (memref
, 0);
1948 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1949 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
1954 if (reload_in_progress
|| reload_completed
)
1955 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
1957 addr
= memory_address_addr_space (mode
, addr
, as
);
1960 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1963 new_rtx
= gen_rtx_MEM (mode
, addr
);
1964 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
1968 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1969 way we are changing MEMREF, so we only preserve the alias set. */
1972 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1974 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1);
1975 enum machine_mode mmode
= GET_MODE (new_rtx
);
1976 struct mem_attrs attrs
, *defattrs
;
1978 attrs
= *get_mem_attrs (memref
);
1979 defattrs
= mode_mem_attrs
[(int) mmode
];
1980 attrs
.expr
= NULL_TREE
;
1981 attrs
.offset_known_p
= false;
1982 attrs
.size_known_p
= defattrs
->size_known_p
;
1983 attrs
.size
= defattrs
->size
;
1984 attrs
.align
= defattrs
->align
;
1986 /* If there are no changes, just return the original memory reference. */
1987 if (new_rtx
== memref
)
1989 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
1992 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1993 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
1996 set_mem_attrs (new_rtx
, &attrs
);
2000 /* Return a memory reference like MEMREF, but with its mode changed
2001 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2002 nonzero, the memory address is forced to be valid.
2003 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2004 and the caller is responsible for adjusting MEMREF base register.
2005 If ADJUST_OBJECT is zero, the underlying object associated with the
2006 memory reference is left unchanged and the caller is responsible for
2007 dealing with it. Otherwise, if the new memory reference is outside
2008 the underlying object, even partially, then the object is dropped.
2009 SIZE, if nonzero, is the size of an access in cases where MODE
2010 has no inherent size. */
2013 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
2014 int validate
, int adjust_address
, int adjust_object
,
2017 rtx addr
= XEXP (memref
, 0);
2019 enum machine_mode address_mode
;
2021 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2022 unsigned HOST_WIDE_INT max_align
;
2023 #ifdef POINTERS_EXTEND_UNSIGNED
2024 enum machine_mode pointer_mode
2025 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2028 /* VOIDmode means no mode change for change_address_1. */
2029 if (mode
== VOIDmode
)
2030 mode
= GET_MODE (memref
);
2032 /* Take the size of non-BLKmode accesses from the mode. */
2033 defattrs
= mode_mem_attrs
[(int) mode
];
2034 if (defattrs
->size_known_p
)
2035 size
= defattrs
->size
;
2037 /* If there are no changes, just return the original memory reference. */
2038 if (mode
== GET_MODE (memref
) && !offset
2039 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2040 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2044 /* ??? Prefer to create garbage instead of creating shared rtl.
2045 This may happen even if offset is nonzero -- consider
2046 (plus (plus reg reg) const_int) -- so do this always. */
2047 addr
= copy_rtx (addr
);
2049 /* Convert a possibly large offset to a signed value within the
2050 range of the target address space. */
2051 address_mode
= get_address_mode (memref
);
2052 pbits
= GET_MODE_BITSIZE (address_mode
);
2053 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2055 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2056 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2062 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2063 object, we can merge it into the LO_SUM. */
2064 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2066 && (unsigned HOST_WIDE_INT
) offset
2067 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2068 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2069 plus_constant (address_mode
,
2070 XEXP (addr
, 1), offset
));
2071 #ifdef POINTERS_EXTEND_UNSIGNED
2072 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2073 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2074 the fact that pointers are not allowed to overflow. */
2075 else if (POINTERS_EXTEND_UNSIGNED
> 0
2076 && GET_CODE (addr
) == ZERO_EXTEND
2077 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2078 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2079 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2080 plus_constant (pointer_mode
,
2081 XEXP (addr
, 0), offset
));
2084 addr
= plus_constant (address_mode
, addr
, offset
);
2087 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
);
2089 /* If the address is a REG, change_address_1 rightfully returns memref,
2090 but this would destroy memref's MEM_ATTRS. */
2091 if (new_rtx
== memref
&& offset
!= 0)
2092 new_rtx
= copy_rtx (new_rtx
);
2094 /* Conservatively drop the object if we don't know where we start from. */
2095 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2097 attrs
.expr
= NULL_TREE
;
2101 /* Compute the new values of the memory attributes due to this adjustment.
2102 We add the offsets and update the alignment. */
2103 if (attrs
.offset_known_p
)
2105 attrs
.offset
+= offset
;
2107 /* Drop the object if the new left end is not within its bounds. */
2108 if (adjust_object
&& attrs
.offset
< 0)
2110 attrs
.expr
= NULL_TREE
;
2115 /* Compute the new alignment by taking the MIN of the alignment and the
2116 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2120 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2121 attrs
.align
= MIN (attrs
.align
, max_align
);
2126 /* Drop the object if the new right end is not within its bounds. */
2127 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2129 attrs
.expr
= NULL_TREE
;
2132 attrs
.size_known_p
= true;
2135 else if (attrs
.size_known_p
)
2137 gcc_assert (!adjust_object
);
2138 attrs
.size
-= offset
;
2139 /* ??? The store_by_pieces machinery generates negative sizes,
2140 so don't assert for that here. */
2143 set_mem_attrs (new_rtx
, &attrs
);
2148 /* Return a memory reference like MEMREF, but with its mode changed
2149 to MODE and its address changed to ADDR, which is assumed to be
2150 MEMREF offset by OFFSET bytes. If VALIDATE is
2151 nonzero, the memory address is forced to be valid. */
2154 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2155 HOST_WIDE_INT offset
, int validate
)
2157 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2158 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2161 /* Return a memory reference like MEMREF, but whose address is changed by
2162 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2163 known to be in OFFSET (possibly 1). */
2166 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2168 rtx new_rtx
, addr
= XEXP (memref
, 0);
2169 enum machine_mode address_mode
;
2170 struct mem_attrs attrs
, *defattrs
;
2172 attrs
= *get_mem_attrs (memref
);
2173 address_mode
= get_address_mode (memref
);
2174 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2176 /* At this point we don't know _why_ the address is invalid. It
2177 could have secondary memory references, multiplies or anything.
2179 However, if we did go and rearrange things, we can wind up not
2180 being able to recognize the magic around pic_offset_table_rtx.
2181 This stuff is fragile, and is yet another example of why it is
2182 bad to expose PIC machinery too early. */
2183 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2185 && GET_CODE (addr
) == PLUS
2186 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2188 addr
= force_reg (GET_MODE (addr
), addr
);
2189 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2192 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2193 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1);
2195 /* If there are no changes, just return the original memory reference. */
2196 if (new_rtx
== memref
)
2199 /* Update the alignment to reflect the offset. Reset the offset, which
2201 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2202 attrs
.offset_known_p
= false;
2203 attrs
.size_known_p
= defattrs
->size_known_p
;
2204 attrs
.size
= defattrs
->size
;
2205 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2206 set_mem_attrs (new_rtx
, &attrs
);
2210 /* Return a memory reference like MEMREF, but with its address changed to
2211 ADDR. The caller is asserting that the actual piece of memory pointed
2212 to is the same, just the form of the address is being changed, such as
2213 by putting something into a register. */
2216 replace_equiv_address (rtx memref
, rtx addr
)
2218 /* change_address_1 copies the memory attribute structure without change
2219 and that's exactly what we want here. */
2220 update_temp_slot_address (XEXP (memref
, 0), addr
);
2221 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2224 /* Likewise, but the reference is not required to be valid. */
2227 replace_equiv_address_nv (rtx memref
, rtx addr
)
2229 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2232 /* Return a memory reference like MEMREF, but with its mode widened to
2233 MODE and offset by OFFSET. This would be used by targets that e.g.
2234 cannot issue QImode memory operations and have to use SImode memory
2235 operations plus masking logic. */
2238 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2240 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2241 struct mem_attrs attrs
;
2242 unsigned int size
= GET_MODE_SIZE (mode
);
2244 /* If there are no changes, just return the original memory reference. */
2245 if (new_rtx
== memref
)
2248 attrs
= *get_mem_attrs (new_rtx
);
2250 /* If we don't know what offset we were at within the expression, then
2251 we can't know if we've overstepped the bounds. */
2252 if (! attrs
.offset_known_p
)
2253 attrs
.expr
= NULL_TREE
;
2257 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2259 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2260 tree offset
= component_ref_field_offset (attrs
.expr
);
2262 if (! DECL_SIZE_UNIT (field
))
2264 attrs
.expr
= NULL_TREE
;
2268 /* Is the field at least as large as the access? If so, ok,
2269 otherwise strip back to the containing structure. */
2270 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2271 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2272 && attrs
.offset
>= 0)
2275 if (! host_integerp (offset
, 1))
2277 attrs
.expr
= NULL_TREE
;
2281 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2282 attrs
.offset
+= tree_low_cst (offset
, 1);
2283 attrs
.offset
+= (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2286 /* Similarly for the decl. */
2287 else if (DECL_P (attrs
.expr
)
2288 && DECL_SIZE_UNIT (attrs
.expr
)
2289 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2290 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2291 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2295 /* The widened memory access overflows the expression, which means
2296 that it could alias another expression. Zap it. */
2297 attrs
.expr
= NULL_TREE
;
2303 attrs
.offset_known_p
= false;
2305 /* The widened memory may alias other stuff, so zap the alias set. */
2306 /* ??? Maybe use get_alias_set on any remaining expression. */
2308 attrs
.size_known_p
= true;
2310 set_mem_attrs (new_rtx
, &attrs
);
2314 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2315 static GTY(()) tree spill_slot_decl
;
2318 get_spill_slot_decl (bool force_build_p
)
2320 tree d
= spill_slot_decl
;
2322 struct mem_attrs attrs
;
2324 if (d
|| !force_build_p
)
2327 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2328 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2329 DECL_ARTIFICIAL (d
) = 1;
2330 DECL_IGNORED_P (d
) = 1;
2332 spill_slot_decl
= d
;
2334 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2335 MEM_NOTRAP_P (rd
) = 1;
2336 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2337 attrs
.alias
= new_alias_set ();
2339 set_mem_attrs (rd
, &attrs
);
2340 SET_DECL_RTL (d
, rd
);
2345 /* Given MEM, a result from assign_stack_local, fill in the memory
2346 attributes as appropriate for a register allocator spill slot.
2347 These slots are not aliasable by other memory. We arrange for
2348 them all to use a single MEM_EXPR, so that the aliasing code can
2349 work properly in the case of shared spill slots. */
2352 set_mem_attrs_for_spill (rtx mem
)
2354 struct mem_attrs attrs
;
2357 attrs
= *get_mem_attrs (mem
);
2358 attrs
.expr
= get_spill_slot_decl (true);
2359 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2360 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2362 /* We expect the incoming memory to be of the form:
2363 (mem:MODE (plus (reg sfp) (const_int offset)))
2364 with perhaps the plus missing for offset = 0. */
2365 addr
= XEXP (mem
, 0);
2366 attrs
.offset_known_p
= true;
2368 if (GET_CODE (addr
) == PLUS
2369 && CONST_INT_P (XEXP (addr
, 1)))
2370 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2372 set_mem_attrs (mem
, &attrs
);
2373 MEM_NOTRAP_P (mem
) = 1;
2376 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2379 gen_label_rtx (void)
2381 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2382 NULL
, label_num
++, NULL
);
2385 /* For procedure integration. */
2387 /* Install new pointers to the first and last insns in the chain.
2388 Also, set cur_insn_uid to one higher than the last in use.
2389 Used for an inline-procedure after copying the insn chain. */
2392 set_new_first_and_last_insn (rtx first
, rtx last
)
2396 set_first_insn (first
);
2397 set_last_insn (last
);
2400 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2402 int debug_count
= 0;
2404 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2405 cur_debug_insn_uid
= 0;
2407 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2408 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2409 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2412 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2413 if (DEBUG_INSN_P (insn
))
2418 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2420 cur_debug_insn_uid
++;
2423 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2424 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2429 /* Go through all the RTL insn bodies and copy any invalid shared
2430 structure. This routine should only be called once. */
2433 unshare_all_rtl_1 (rtx insn
)
2435 /* Unshare just about everything else. */
2436 unshare_all_rtl_in_chain (insn
);
2438 /* Make sure the addresses of stack slots found outside the insn chain
2439 (such as, in DECL_RTL of a variable) are not shared
2440 with the insn chain.
2442 This special care is necessary when the stack slot MEM does not
2443 actually appear in the insn chain. If it does appear, its address
2444 is unshared from all else at that point. */
2445 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2448 /* Go through all the RTL insn bodies and copy any invalid shared
2449 structure, again. This is a fairly expensive thing to do so it
2450 should be done sparingly. */
2453 unshare_all_rtl_again (rtx insn
)
2458 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2461 reset_used_flags (PATTERN (p
));
2462 reset_used_flags (REG_NOTES (p
));
2464 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2467 /* Make sure that virtual stack slots are not shared. */
2468 set_used_decls (DECL_INITIAL (cfun
->decl
));
2470 /* Make sure that virtual parameters are not shared. */
2471 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2472 set_used_flags (DECL_RTL (decl
));
2474 reset_used_flags (stack_slot_list
);
2476 unshare_all_rtl_1 (insn
);
2480 unshare_all_rtl (void)
2482 unshare_all_rtl_1 (get_insns ());
2487 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2488 Recursively does the same for subexpressions. */
2491 verify_rtx_sharing (rtx orig
, rtx insn
)
2496 const char *format_ptr
;
2501 code
= GET_CODE (x
);
2503 /* These types may be freely shared. */
2519 /* SCRATCH must be shared because they represent distinct values. */
2522 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2523 clobbers or clobbers of hard registers that originated as pseudos.
2524 This is needed to allow safe register renaming. */
2525 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2526 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2531 if (shared_const_p (orig
))
2536 /* A MEM is allowed to be shared if its address is constant. */
2537 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2538 || reload_completed
|| reload_in_progress
)
2547 /* This rtx may not be shared. If it has already been seen,
2548 replace it with a copy of itself. */
2549 #ifdef ENABLE_CHECKING
2550 if (RTX_FLAG (x
, used
))
2552 error ("invalid rtl sharing found in the insn");
2554 error ("shared rtx");
2556 internal_error ("internal consistency failure");
2559 gcc_assert (!RTX_FLAG (x
, used
));
2561 RTX_FLAG (x
, used
) = 1;
2563 /* Now scan the subexpressions recursively. */
2565 format_ptr
= GET_RTX_FORMAT (code
);
2567 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2569 switch (*format_ptr
++)
2572 verify_rtx_sharing (XEXP (x
, i
), insn
);
2576 if (XVEC (x
, i
) != NULL
)
2579 int len
= XVECLEN (x
, i
);
2581 for (j
= 0; j
< len
; j
++)
2583 /* We allow sharing of ASM_OPERANDS inside single
2585 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2586 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2588 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2590 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2599 /* Go through all the RTL insn bodies and clear all the USED bits. */
2602 reset_all_used_flags (void)
2606 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2609 reset_used_flags (PATTERN (p
));
2610 reset_used_flags (REG_NOTES (p
));
2612 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2613 if (GET_CODE (PATTERN (p
)) == SEQUENCE
)
2616 rtx q
, sequence
= PATTERN (p
);
2618 for (i
= 0; i
< XVECLEN (sequence
, 0); i
++)
2620 q
= XVECEXP (sequence
, 0, i
);
2621 gcc_assert (INSN_P (q
));
2622 reset_used_flags (PATTERN (q
));
2623 reset_used_flags (REG_NOTES (q
));
2625 reset_used_flags (CALL_INSN_FUNCTION_USAGE (q
));
2631 /* Go through all the RTL insn bodies and check that there is no unexpected
2632 sharing in between the subexpressions. */
2635 verify_rtl_sharing (void)
2639 timevar_push (TV_VERIFY_RTL_SHARING
);
2641 reset_all_used_flags ();
2643 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2646 verify_rtx_sharing (PATTERN (p
), p
);
2647 verify_rtx_sharing (REG_NOTES (p
), p
);
2649 verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (p
), p
);
2652 reset_all_used_flags ();
2654 timevar_pop (TV_VERIFY_RTL_SHARING
);
2657 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2658 Assumes the mark bits are cleared at entry. */
2661 unshare_all_rtl_in_chain (rtx insn
)
2663 for (; insn
; insn
= NEXT_INSN (insn
))
2666 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2667 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2669 CALL_INSN_FUNCTION_USAGE (insn
)
2670 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2674 /* Go through all virtual stack slots of a function and mark them as
2675 shared. We never replace the DECL_RTLs themselves with a copy,
2676 but expressions mentioned into a DECL_RTL cannot be shared with
2677 expressions in the instruction stream.
2679 Note that reload may convert pseudo registers into memories in-place.
2680 Pseudo registers are always shared, but MEMs never are. Thus if we
2681 reset the used flags on MEMs in the instruction stream, we must set
2682 them again on MEMs that appear in DECL_RTLs. */
2685 set_used_decls (tree blk
)
2690 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2691 if (DECL_RTL_SET_P (t
))
2692 set_used_flags (DECL_RTL (t
));
2694 /* Now process sub-blocks. */
2695 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2699 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2700 Recursively does the same for subexpressions. Uses
2701 copy_rtx_if_shared_1 to reduce stack space. */
2704 copy_rtx_if_shared (rtx orig
)
2706 copy_rtx_if_shared_1 (&orig
);
2710 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2711 use. Recursively does the same for subexpressions. */
2714 copy_rtx_if_shared_1 (rtx
*orig1
)
2720 const char *format_ptr
;
2724 /* Repeat is used to turn tail-recursion into iteration. */
2731 code
= GET_CODE (x
);
2733 /* These types may be freely shared. */
2749 /* SCRATCH must be shared because they represent distinct values. */
2752 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2753 clobbers or clobbers of hard registers that originated as pseudos.
2754 This is needed to allow safe register renaming. */
2755 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2756 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2761 if (shared_const_p (x
))
2771 /* The chain of insns is not being copied. */
2778 /* This rtx may not be shared. If it has already been seen,
2779 replace it with a copy of itself. */
2781 if (RTX_FLAG (x
, used
))
2783 x
= shallow_copy_rtx (x
);
2786 RTX_FLAG (x
, used
) = 1;
2788 /* Now scan the subexpressions recursively.
2789 We can store any replaced subexpressions directly into X
2790 since we know X is not shared! Any vectors in X
2791 must be copied if X was copied. */
2793 format_ptr
= GET_RTX_FORMAT (code
);
2794 length
= GET_RTX_LENGTH (code
);
2797 for (i
= 0; i
< length
; i
++)
2799 switch (*format_ptr
++)
2803 copy_rtx_if_shared_1 (last_ptr
);
2804 last_ptr
= &XEXP (x
, i
);
2808 if (XVEC (x
, i
) != NULL
)
2811 int len
= XVECLEN (x
, i
);
2813 /* Copy the vector iff I copied the rtx and the length
2815 if (copied
&& len
> 0)
2816 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2818 /* Call recursively on all inside the vector. */
2819 for (j
= 0; j
< len
; j
++)
2822 copy_rtx_if_shared_1 (last_ptr
);
2823 last_ptr
= &XVECEXP (x
, i
, j
);
2838 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2841 mark_used_flags (rtx x
, int flag
)
2845 const char *format_ptr
;
2848 /* Repeat is used to turn tail-recursion into iteration. */
2853 code
= GET_CODE (x
);
2855 /* These types may be freely shared so we needn't do any resetting
2879 /* The chain of insns is not being copied. */
2886 RTX_FLAG (x
, used
) = flag
;
2888 format_ptr
= GET_RTX_FORMAT (code
);
2889 length
= GET_RTX_LENGTH (code
);
2891 for (i
= 0; i
< length
; i
++)
2893 switch (*format_ptr
++)
2901 mark_used_flags (XEXP (x
, i
), flag
);
2905 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2906 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
2912 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2913 to look for shared sub-parts. */
2916 reset_used_flags (rtx x
)
2918 mark_used_flags (x
, 0);
2921 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2922 to look for shared sub-parts. */
2925 set_used_flags (rtx x
)
2927 mark_used_flags (x
, 1);
2930 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2931 Return X or the rtx for the pseudo reg the value of X was copied into.
2932 OTHER must be valid as a SET_DEST. */
2935 make_safe_from (rtx x
, rtx other
)
2938 switch (GET_CODE (other
))
2941 other
= SUBREG_REG (other
);
2943 case STRICT_LOW_PART
:
2946 other
= XEXP (other
, 0);
2955 && GET_CODE (x
) != SUBREG
)
2957 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2958 || reg_mentioned_p (other
, x
))))
2960 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2961 emit_move_insn (temp
, x
);
2967 /* Emission of insns (adding them to the doubly-linked list). */
2969 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2972 get_last_insn_anywhere (void)
2974 struct sequence_stack
*stack
;
2975 if (get_last_insn ())
2976 return get_last_insn ();
2977 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2978 if (stack
->last
!= 0)
2983 /* Return the first nonnote insn emitted in current sequence or current
2984 function. This routine looks inside SEQUENCEs. */
2987 get_first_nonnote_insn (void)
2989 rtx insn
= get_insns ();
2994 for (insn
= next_insn (insn
);
2995 insn
&& NOTE_P (insn
);
2996 insn
= next_insn (insn
))
3000 if (NONJUMP_INSN_P (insn
)
3001 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3002 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3009 /* Return the last nonnote insn emitted in current sequence or current
3010 function. This routine looks inside SEQUENCEs. */
3013 get_last_nonnote_insn (void)
3015 rtx insn
= get_last_insn ();
3020 for (insn
= previous_insn (insn
);
3021 insn
&& NOTE_P (insn
);
3022 insn
= previous_insn (insn
))
3026 if (NONJUMP_INSN_P (insn
)
3027 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3028 insn
= XVECEXP (PATTERN (insn
), 0,
3029 XVECLEN (PATTERN (insn
), 0) - 1);
3036 /* Return the number of actual (non-debug) insns emitted in this
3040 get_max_insn_count (void)
3042 int n
= cur_insn_uid
;
3044 /* The table size must be stable across -g, to avoid codegen
3045 differences due to debug insns, and not be affected by
3046 -fmin-insn-uid, to avoid excessive table size and to simplify
3047 debugging of -fcompare-debug failures. */
3048 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3049 n
-= cur_debug_insn_uid
;
3051 n
-= MIN_NONDEBUG_INSN_UID
;
3057 /* Return the next insn. If it is a SEQUENCE, return the first insn
3061 next_insn (rtx insn
)
3065 insn
= NEXT_INSN (insn
);
3066 if (insn
&& NONJUMP_INSN_P (insn
)
3067 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3068 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3074 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3078 previous_insn (rtx insn
)
3082 insn
= PREV_INSN (insn
);
3083 if (insn
&& NONJUMP_INSN_P (insn
)
3084 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3085 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3091 /* Return the next insn after INSN that is not a NOTE. This routine does not
3092 look inside SEQUENCEs. */
3095 next_nonnote_insn (rtx insn
)
3099 insn
= NEXT_INSN (insn
);
3100 if (insn
== 0 || !NOTE_P (insn
))
3107 /* Return the next insn after INSN that is not a NOTE, but stop the
3108 search before we enter another basic block. This routine does not
3109 look inside SEQUENCEs. */
3112 next_nonnote_insn_bb (rtx insn
)
3116 insn
= NEXT_INSN (insn
);
3117 if (insn
== 0 || !NOTE_P (insn
))
3119 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3126 /* Return the previous insn before INSN that is not a NOTE. This routine does
3127 not look inside SEQUENCEs. */
3130 prev_nonnote_insn (rtx insn
)
3134 insn
= PREV_INSN (insn
);
3135 if (insn
== 0 || !NOTE_P (insn
))
3142 /* Return the previous insn before INSN that is not a NOTE, but stop
3143 the search before we enter another basic block. This routine does
3144 not look inside SEQUENCEs. */
3147 prev_nonnote_insn_bb (rtx insn
)
3151 insn
= PREV_INSN (insn
);
3152 if (insn
== 0 || !NOTE_P (insn
))
3154 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3161 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3162 routine does not look inside SEQUENCEs. */
3165 next_nondebug_insn (rtx insn
)
3169 insn
= NEXT_INSN (insn
);
3170 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3177 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3178 This routine does not look inside SEQUENCEs. */
3181 prev_nondebug_insn (rtx insn
)
3185 insn
= PREV_INSN (insn
);
3186 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3193 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3194 This routine does not look inside SEQUENCEs. */
3197 next_nonnote_nondebug_insn (rtx insn
)
3201 insn
= NEXT_INSN (insn
);
3202 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3209 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3210 This routine does not look inside SEQUENCEs. */
3213 prev_nonnote_nondebug_insn (rtx insn
)
3217 insn
= PREV_INSN (insn
);
3218 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3225 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3226 or 0, if there is none. This routine does not look inside
3230 next_real_insn (rtx insn
)
3234 insn
= NEXT_INSN (insn
);
3235 if (insn
== 0 || INSN_P (insn
))
3242 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3243 or 0, if there is none. This routine does not look inside
3247 prev_real_insn (rtx insn
)
3251 insn
= PREV_INSN (insn
);
3252 if (insn
== 0 || INSN_P (insn
))
3259 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3260 This routine does not look inside SEQUENCEs. */
3263 last_call_insn (void)
3267 for (insn
= get_last_insn ();
3268 insn
&& !CALL_P (insn
);
3269 insn
= PREV_INSN (insn
))
3275 /* Find the next insn after INSN that really does something. This routine
3276 does not look inside SEQUENCEs. After reload this also skips over
3277 standalone USE and CLOBBER insn. */
3280 active_insn_p (const_rtx insn
)
3282 return (CALL_P (insn
) || JUMP_P (insn
)
3283 || JUMP_TABLE_DATA_P (insn
) /* FIXME */
3284 || (NONJUMP_INSN_P (insn
)
3285 && (! reload_completed
3286 || (GET_CODE (PATTERN (insn
)) != USE
3287 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3291 next_active_insn (rtx insn
)
3295 insn
= NEXT_INSN (insn
);
3296 if (insn
== 0 || active_insn_p (insn
))
3303 /* Find the last insn before INSN that really does something. This routine
3304 does not look inside SEQUENCEs. After reload this also skips over
3305 standalone USE and CLOBBER insn. */
3308 prev_active_insn (rtx insn
)
3312 insn
= PREV_INSN (insn
);
3313 if (insn
== 0 || active_insn_p (insn
))
3320 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3323 next_label (rtx insn
)
3327 insn
= NEXT_INSN (insn
);
3328 if (insn
== 0 || LABEL_P (insn
))
3335 /* Return the last label to mark the same position as LABEL. Return LABEL
3336 itself if it is null or any return rtx. */
3339 skip_consecutive_labels (rtx label
)
3343 if (label
&& ANY_RETURN_P (label
))
3346 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
3354 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3355 and REG_CC_USER notes so we can find it. */
3358 link_cc0_insns (rtx insn
)
3360 rtx user
= next_nonnote_insn (insn
);
3362 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
3363 user
= XVECEXP (PATTERN (user
), 0, 0);
3365 add_reg_note (user
, REG_CC_SETTER
, insn
);
3366 add_reg_note (insn
, REG_CC_USER
, user
);
3369 /* Return the next insn that uses CC0 after INSN, which is assumed to
3370 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3371 applied to the result of this function should yield INSN).
3373 Normally, this is simply the next insn. However, if a REG_CC_USER note
3374 is present, it contains the insn that uses CC0.
3376 Return 0 if we can't find the insn. */
3379 next_cc0_user (rtx insn
)
3381 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3384 return XEXP (note
, 0);
3386 insn
= next_nonnote_insn (insn
);
3387 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3388 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3390 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3396 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3397 note, it is the previous insn. */
3400 prev_cc0_setter (rtx insn
)
3402 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3405 return XEXP (note
, 0);
3407 insn
= prev_nonnote_insn (insn
);
3408 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3415 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3418 find_auto_inc (rtx
*xp
, void *data
)
3421 rtx reg
= (rtx
) data
;
3423 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3426 switch (GET_CODE (x
))
3434 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3445 /* Increment the label uses for all labels present in rtx. */
3448 mark_label_nuses (rtx x
)
3454 code
= GET_CODE (x
);
3455 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3456 LABEL_NUSES (XEXP (x
, 0))++;
3458 fmt
= GET_RTX_FORMAT (code
);
3459 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3462 mark_label_nuses (XEXP (x
, i
));
3463 else if (fmt
[i
] == 'E')
3464 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3465 mark_label_nuses (XVECEXP (x
, i
, j
));
3470 /* Try splitting insns that can be split for better scheduling.
3471 PAT is the pattern which might split.
3472 TRIAL is the insn providing PAT.
3473 LAST is nonzero if we should return the last insn of the sequence produced.
3475 If this routine succeeds in splitting, it returns the first or last
3476 replacement insn depending on the value of LAST. Otherwise, it
3477 returns TRIAL. If the insn to be returned can be split, it will be. */
3480 try_split (rtx pat
, rtx trial
, int last
)
3482 rtx before
= PREV_INSN (trial
);
3483 rtx after
= NEXT_INSN (trial
);
3484 int has_barrier
= 0;
3487 rtx insn_last
, insn
;
3490 /* We're not good at redistributing frame information. */
3491 if (RTX_FRAME_RELATED_P (trial
))
3494 if (any_condjump_p (trial
)
3495 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3496 split_branch_probability
= INTVAL (XEXP (note
, 0));
3497 probability
= split_branch_probability
;
3499 seq
= split_insns (pat
, trial
);
3501 split_branch_probability
= -1;
3503 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3504 We may need to handle this specially. */
3505 if (after
&& BARRIER_P (after
))
3508 after
= NEXT_INSN (after
);
3514 /* Avoid infinite loop if any insn of the result matches
3515 the original pattern. */
3519 if (INSN_P (insn_last
)
3520 && rtx_equal_p (PATTERN (insn_last
), pat
))
3522 if (!NEXT_INSN (insn_last
))
3524 insn_last
= NEXT_INSN (insn_last
);
3527 /* We will be adding the new sequence to the function. The splitters
3528 may have introduced invalid RTL sharing, so unshare the sequence now. */
3529 unshare_all_rtl_in_chain (seq
);
3532 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3536 mark_jump_label (PATTERN (insn
), insn
, 0);
3538 if (probability
!= -1
3539 && any_condjump_p (insn
)
3540 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3542 /* We can preserve the REG_BR_PROB notes only if exactly
3543 one jump is created, otherwise the machine description
3544 is responsible for this step using
3545 split_branch_probability variable. */
3546 gcc_assert (njumps
== 1);
3547 add_reg_note (insn
, REG_BR_PROB
, GEN_INT (probability
));
3552 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3553 in SEQ and copy any additional information across. */
3556 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3561 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3562 target may have explicitly specified. */
3563 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3566 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3568 /* If the old call was a sibling call, the new one must
3570 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3572 /* If the new call is the last instruction in the sequence,
3573 it will effectively replace the old call in-situ. Otherwise
3574 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3575 so that it comes immediately after the new call. */
3576 if (NEXT_INSN (insn
))
3577 for (next
= NEXT_INSN (trial
);
3578 next
&& NOTE_P (next
);
3579 next
= NEXT_INSN (next
))
3580 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3583 add_insn_after (next
, insn
, NULL
);
3589 /* Copy notes, particularly those related to the CFG. */
3590 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3592 switch (REG_NOTE_KIND (note
))
3595 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3601 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3604 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3608 case REG_NON_LOCAL_GOTO
:
3609 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3612 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3618 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3620 rtx reg
= XEXP (note
, 0);
3621 if (!FIND_REG_INC_NOTE (insn
, reg
)
3622 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3623 add_reg_note (insn
, REG_INC
, reg
);
3629 fixup_args_size_notes (NULL_RTX
, insn_last
, INTVAL (XEXP (note
, 0)));
3637 /* If there are LABELS inside the split insns increment the
3638 usage count so we don't delete the label. */
3642 while (insn
!= NULL_RTX
)
3644 /* JUMP_P insns have already been "marked" above. */
3645 if (NONJUMP_INSN_P (insn
))
3646 mark_label_nuses (PATTERN (insn
));
3648 insn
= PREV_INSN (insn
);
3652 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3654 delete_insn (trial
);
3656 emit_barrier_after (tem
);
3658 /* Recursively call try_split for each new insn created; by the
3659 time control returns here that insn will be fully split, so
3660 set LAST and continue from the insn after the one returned.
3661 We can't use next_active_insn here since AFTER may be a note.
3662 Ignore deleted insns, which can be occur if not optimizing. */
3663 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3664 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3665 tem
= try_split (PATTERN (tem
), tem
, 1);
3667 /* Return either the first or the last insn, depending on which was
3670 ? (after
? PREV_INSN (after
) : get_last_insn ())
3671 : NEXT_INSN (before
);
3674 /* Make and return an INSN rtx, initializing all its slots.
3675 Store PATTERN in the pattern slots. */
3678 make_insn_raw (rtx pattern
)
3682 insn
= rtx_alloc (INSN
);
3684 INSN_UID (insn
) = cur_insn_uid
++;
3685 PATTERN (insn
) = pattern
;
3686 INSN_CODE (insn
) = -1;
3687 REG_NOTES (insn
) = NULL
;
3688 INSN_LOCATION (insn
) = curr_insn_location ();
3689 BLOCK_FOR_INSN (insn
) = NULL
;
3691 #ifdef ENABLE_RTL_CHECKING
3694 && (returnjump_p (insn
)
3695 || (GET_CODE (insn
) == SET
3696 && SET_DEST (insn
) == pc_rtx
)))
3698 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3706 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3709 make_debug_insn_raw (rtx pattern
)
3713 insn
= rtx_alloc (DEBUG_INSN
);
3714 INSN_UID (insn
) = cur_debug_insn_uid
++;
3715 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3716 INSN_UID (insn
) = cur_insn_uid
++;
3718 PATTERN (insn
) = pattern
;
3719 INSN_CODE (insn
) = -1;
3720 REG_NOTES (insn
) = NULL
;
3721 INSN_LOCATION (insn
) = curr_insn_location ();
3722 BLOCK_FOR_INSN (insn
) = NULL
;
3727 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3730 make_jump_insn_raw (rtx pattern
)
3734 insn
= rtx_alloc (JUMP_INSN
);
3735 INSN_UID (insn
) = cur_insn_uid
++;
3737 PATTERN (insn
) = pattern
;
3738 INSN_CODE (insn
) = -1;
3739 REG_NOTES (insn
) = NULL
;
3740 JUMP_LABEL (insn
) = NULL
;
3741 INSN_LOCATION (insn
) = curr_insn_location ();
3742 BLOCK_FOR_INSN (insn
) = NULL
;
3747 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3750 make_call_insn_raw (rtx pattern
)
3754 insn
= rtx_alloc (CALL_INSN
);
3755 INSN_UID (insn
) = cur_insn_uid
++;
3757 PATTERN (insn
) = pattern
;
3758 INSN_CODE (insn
) = -1;
3759 REG_NOTES (insn
) = NULL
;
3760 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3761 INSN_LOCATION (insn
) = curr_insn_location ();
3762 BLOCK_FOR_INSN (insn
) = NULL
;
3767 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3770 make_note_raw (enum insn_note subtype
)
3772 /* Some notes are never created this way at all. These notes are
3773 only created by patching out insns. */
3774 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3775 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3777 rtx note
= rtx_alloc (NOTE
);
3778 INSN_UID (note
) = cur_insn_uid
++;
3779 NOTE_KIND (note
) = subtype
;
3780 BLOCK_FOR_INSN (note
) = NULL
;
3781 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3785 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3786 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3787 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3790 link_insn_into_chain (rtx insn
, rtx prev
, rtx next
)
3792 PREV_INSN (insn
) = prev
;
3793 NEXT_INSN (insn
) = next
;
3796 NEXT_INSN (prev
) = insn
;
3797 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3799 rtx sequence
= PATTERN (prev
);
3800 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3805 PREV_INSN (next
) = insn
;
3806 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3807 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3811 /* Add INSN to the end of the doubly-linked list.
3812 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3817 rtx prev
= get_last_insn ();
3818 link_insn_into_chain (insn
, prev
, NULL
);
3819 if (NULL
== get_insns ())
3820 set_first_insn (insn
);
3821 set_last_insn (insn
);
3824 /* Add INSN into the doubly-linked list after insn AFTER. */
3827 add_insn_after_nobb (rtx insn
, rtx after
)
3829 rtx next
= NEXT_INSN (after
);
3831 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3833 link_insn_into_chain (insn
, after
, next
);
3837 if (get_last_insn () == after
)
3838 set_last_insn (insn
);
3841 struct sequence_stack
*stack
= seq_stack
;
3842 /* Scan all pending sequences too. */
3843 for (; stack
; stack
= stack
->next
)
3844 if (after
== stack
->last
)
3853 /* Add INSN into the doubly-linked list before insn BEFORE. */
3856 add_insn_before_nobb (rtx insn
, rtx before
)
3858 rtx prev
= PREV_INSN (before
);
3860 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3862 link_insn_into_chain (insn
, prev
, before
);
3866 if (get_insns () == before
)
3867 set_first_insn (insn
);
3870 struct sequence_stack
*stack
= seq_stack
;
3871 /* Scan all pending sequences too. */
3872 for (; stack
; stack
= stack
->next
)
3873 if (before
== stack
->first
)
3875 stack
->first
= insn
;
3884 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
3885 If BB is NULL, an attempt is made to infer the bb from before.
3887 This and the next function should be the only functions called
3888 to insert an insn once delay slots have been filled since only
3889 they know how to update a SEQUENCE. */
3892 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3894 add_insn_after_nobb (insn
, after
);
3895 if (!BARRIER_P (after
)
3896 && !BARRIER_P (insn
)
3897 && (bb
= BLOCK_FOR_INSN (after
)))
3899 set_block_for_insn (insn
, bb
);
3901 df_insn_rescan (insn
);
3902 /* Should not happen as first in the BB is always
3903 either NOTE or LABEL. */
3904 if (BB_END (bb
) == after
3905 /* Avoid clobbering of structure when creating new BB. */
3906 && !BARRIER_P (insn
)
3907 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3912 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
3913 If BB is NULL, an attempt is made to infer the bb from before.
3915 This and the previous function should be the only functions called
3916 to insert an insn once delay slots have been filled since only
3917 they know how to update a SEQUENCE. */
3920 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
3922 add_insn_before_nobb (insn
, before
);
3925 && !BARRIER_P (before
)
3926 && !BARRIER_P (insn
))
3927 bb
= BLOCK_FOR_INSN (before
);
3931 set_block_for_insn (insn
, bb
);
3933 df_insn_rescan (insn
);
3934 /* Should not happen as first in the BB is always either NOTE or
3936 gcc_assert (BB_HEAD (bb
) != insn
3937 /* Avoid clobbering of structure when creating new BB. */
3939 || NOTE_INSN_BASIC_BLOCK_P (insn
));
3943 /* Replace insn with an deleted instruction note. */
3946 set_insn_deleted (rtx insn
)
3949 df_insn_delete (insn
);
3950 PUT_CODE (insn
, NOTE
);
3951 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
3955 /* Unlink INSN from the insn chain.
3957 This function knows how to handle sequences.
3959 This function does not invalidate data flow information associated with
3960 INSN (i.e. does not call df_insn_delete). That makes this function
3961 usable for only disconnecting an insn from the chain, and re-emit it
3964 To later insert INSN elsewhere in the insn chain via add_insn and
3965 similar functions, PREV_INSN and NEXT_INSN must be nullified by
3966 the caller. Nullifying them here breaks many insn chain walks.
3968 To really delete an insn and related DF information, use delete_insn. */
3971 remove_insn (rtx insn
)
3973 rtx next
= NEXT_INSN (insn
);
3974 rtx prev
= PREV_INSN (insn
);
3979 NEXT_INSN (prev
) = next
;
3980 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3982 rtx sequence
= PATTERN (prev
);
3983 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3986 else if (get_insns () == insn
)
3989 PREV_INSN (next
) = NULL
;
3990 set_first_insn (next
);
3994 struct sequence_stack
*stack
= seq_stack
;
3995 /* Scan all pending sequences too. */
3996 for (; stack
; stack
= stack
->next
)
3997 if (insn
== stack
->first
)
3999 stack
->first
= next
;
4008 PREV_INSN (next
) = prev
;
4009 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
4010 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
4012 else if (get_last_insn () == insn
)
4013 set_last_insn (prev
);
4016 struct sequence_stack
*stack
= seq_stack
;
4017 /* Scan all pending sequences too. */
4018 for (; stack
; stack
= stack
->next
)
4019 if (insn
== stack
->last
)
4028 /* Fix up basic block boundaries, if necessary. */
4029 if (!BARRIER_P (insn
)
4030 && (bb
= BLOCK_FOR_INSN (insn
)))
4032 if (BB_HEAD (bb
) == insn
)
4034 /* Never ever delete the basic block note without deleting whole
4036 gcc_assert (!NOTE_P (insn
));
4037 BB_HEAD (bb
) = next
;
4039 if (BB_END (bb
) == insn
)
4044 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4047 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4049 gcc_assert (call_insn
&& CALL_P (call_insn
));
4051 /* Put the register usage information on the CALL. If there is already
4052 some usage information, put ours at the end. */
4053 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4057 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4058 link
= XEXP (link
, 1))
4061 XEXP (link
, 1) = call_fusage
;
4064 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4067 /* Delete all insns made since FROM.
4068 FROM becomes the new last instruction. */
4071 delete_insns_since (rtx from
)
4076 NEXT_INSN (from
) = 0;
4077 set_last_insn (from
);
4080 /* This function is deprecated, please use sequences instead.
4082 Move a consecutive bunch of insns to a different place in the chain.
4083 The insns to be moved are those between FROM and TO.
4084 They are moved to a new position after the insn AFTER.
4085 AFTER must not be FROM or TO or any insn in between.
4087 This function does not know about SEQUENCEs and hence should not be
4088 called after delay-slot filling has been done. */
4091 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
4093 #ifdef ENABLE_CHECKING
4095 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4096 gcc_assert (after
!= x
);
4097 gcc_assert (after
!= to
);
4100 /* Splice this bunch out of where it is now. */
4101 if (PREV_INSN (from
))
4102 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4104 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4105 if (get_last_insn () == to
)
4106 set_last_insn (PREV_INSN (from
));
4107 if (get_insns () == from
)
4108 set_first_insn (NEXT_INSN (to
));
4110 /* Make the new neighbors point to it and it to them. */
4111 if (NEXT_INSN (after
))
4112 PREV_INSN (NEXT_INSN (after
)) = to
;
4114 NEXT_INSN (to
) = NEXT_INSN (after
);
4115 PREV_INSN (from
) = after
;
4116 NEXT_INSN (after
) = from
;
4117 if (after
== get_last_insn())
4121 /* Same as function above, but take care to update BB boundaries. */
4123 reorder_insns (rtx from
, rtx to
, rtx after
)
4125 rtx prev
= PREV_INSN (from
);
4126 basic_block bb
, bb2
;
4128 reorder_insns_nobb (from
, to
, after
);
4130 if (!BARRIER_P (after
)
4131 && (bb
= BLOCK_FOR_INSN (after
)))
4134 df_set_bb_dirty (bb
);
4136 if (!BARRIER_P (from
)
4137 && (bb2
= BLOCK_FOR_INSN (from
)))
4139 if (BB_END (bb2
) == to
)
4140 BB_END (bb2
) = prev
;
4141 df_set_bb_dirty (bb2
);
4144 if (BB_END (bb
) == after
)
4147 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4149 df_insn_change_bb (x
, bb
);
4154 /* Emit insn(s) of given code and pattern
4155 at a specified place within the doubly-linked list.
4157 All of the emit_foo global entry points accept an object
4158 X which is either an insn list or a PATTERN of a single
4161 There are thus a few canonical ways to generate code and
4162 emit it at a specific place in the instruction stream. For
4163 example, consider the instruction named SPOT and the fact that
4164 we would like to emit some instructions before SPOT. We might
4168 ... emit the new instructions ...
4169 insns_head = get_insns ();
4172 emit_insn_before (insns_head, SPOT);
4174 It used to be common to generate SEQUENCE rtl instead, but that
4175 is a relic of the past which no longer occurs. The reason is that
4176 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4177 generated would almost certainly die right after it was created. */
4180 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4181 rtx (*make_raw
) (rtx
))
4185 gcc_assert (before
);
4190 switch (GET_CODE (x
))
4202 rtx next
= NEXT_INSN (insn
);
4203 add_insn_before (insn
, before
, bb
);
4209 #ifdef ENABLE_RTL_CHECKING
4216 last
= (*make_raw
) (x
);
4217 add_insn_before (last
, before
, bb
);
4224 /* Make X be output before the instruction BEFORE. */
4227 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
4229 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4232 /* Make an instruction with body X and code JUMP_INSN
4233 and output it before the instruction BEFORE. */
4236 emit_jump_insn_before_noloc (rtx x
, rtx before
)
4238 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4239 make_jump_insn_raw
);
4242 /* Make an instruction with body X and code CALL_INSN
4243 and output it before the instruction BEFORE. */
4246 emit_call_insn_before_noloc (rtx x
, rtx before
)
4248 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4249 make_call_insn_raw
);
4252 /* Make an instruction with body X and code DEBUG_INSN
4253 and output it before the instruction BEFORE. */
4256 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4258 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4259 make_debug_insn_raw
);
4262 /* Make an insn of code BARRIER
4263 and output it before the insn BEFORE. */
4266 emit_barrier_before (rtx before
)
4268 rtx insn
= rtx_alloc (BARRIER
);
4270 INSN_UID (insn
) = cur_insn_uid
++;
4272 add_insn_before (insn
, before
, NULL
);
4276 /* Emit the label LABEL before the insn BEFORE. */
4279 emit_label_before (rtx label
, rtx before
)
4281 gcc_checking_assert (INSN_UID (label
) == 0);
4282 INSN_UID (label
) = cur_insn_uid
++;
4283 add_insn_before (label
, before
, NULL
);
4287 /* Helper for emit_insn_after, handles lists of instructions
4291 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
4295 if (!bb
&& !BARRIER_P (after
))
4296 bb
= BLOCK_FOR_INSN (after
);
4300 df_set_bb_dirty (bb
);
4301 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4302 if (!BARRIER_P (last
))
4304 set_block_for_insn (last
, bb
);
4305 df_insn_rescan (last
);
4307 if (!BARRIER_P (last
))
4309 set_block_for_insn (last
, bb
);
4310 df_insn_rescan (last
);
4312 if (BB_END (bb
) == after
)
4316 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4319 after_after
= NEXT_INSN (after
);
4321 NEXT_INSN (after
) = first
;
4322 PREV_INSN (first
) = after
;
4323 NEXT_INSN (last
) = after_after
;
4325 PREV_INSN (after_after
) = last
;
4327 if (after
== get_last_insn())
4328 set_last_insn (last
);
4334 emit_pattern_after_noloc (rtx x
, rtx after
, basic_block bb
,
4335 rtx (*make_raw
)(rtx
))
4344 switch (GET_CODE (x
))
4353 last
= emit_insn_after_1 (x
, after
, bb
);
4356 #ifdef ENABLE_RTL_CHECKING
4363 last
= (*make_raw
) (x
);
4364 add_insn_after (last
, after
, bb
);
4371 /* Make X be output after the insn AFTER and set the BB of insn. If
4372 BB is NULL, an attempt is made to infer the BB from AFTER. */
4375 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4377 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4381 /* Make an insn of code JUMP_INSN with body X
4382 and output it after the insn AFTER. */
4385 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4387 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4390 /* Make an instruction with body X and code CALL_INSN
4391 and output it after the instruction AFTER. */
4394 emit_call_insn_after_noloc (rtx x
, rtx after
)
4396 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4399 /* Make an instruction with body X and code CALL_INSN
4400 and output it after the instruction AFTER. */
4403 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4405 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4408 /* Make an insn of code BARRIER
4409 and output it after the insn AFTER. */
4412 emit_barrier_after (rtx after
)
4414 rtx insn
= rtx_alloc (BARRIER
);
4416 INSN_UID (insn
) = cur_insn_uid
++;
4418 add_insn_after (insn
, after
, NULL
);
4422 /* Emit the label LABEL after the insn AFTER. */
4425 emit_label_after (rtx label
, rtx after
)
4427 gcc_checking_assert (INSN_UID (label
) == 0);
4428 INSN_UID (label
) = cur_insn_uid
++;
4429 add_insn_after (label
, after
, NULL
);
4433 /* Notes require a bit of special handling: Some notes need to have their
4434 BLOCK_FOR_INSN set, others should never have it set, and some should
4435 have it set or clear depending on the context. */
4437 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4438 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4439 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4442 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4446 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4447 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4450 /* Notes for var tracking and EH region markers can appear between or
4451 inside basic blocks. If the caller is emitting on the basic block
4452 boundary, do not set BLOCK_FOR_INSN on the new note. */
4453 case NOTE_INSN_VAR_LOCATION
:
4454 case NOTE_INSN_CALL_ARG_LOCATION
:
4455 case NOTE_INSN_EH_REGION_BEG
:
4456 case NOTE_INSN_EH_REGION_END
:
4457 return on_bb_boundary_p
;
4459 /* Otherwise, BLOCK_FOR_INSN must be set. */
4465 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4468 emit_note_after (enum insn_note subtype
, rtx after
)
4470 rtx note
= make_note_raw (subtype
);
4471 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4472 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4474 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4475 add_insn_after_nobb (note
, after
);
4477 add_insn_after (note
, after
, bb
);
4481 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4484 emit_note_before (enum insn_note subtype
, rtx before
)
4486 rtx note
= make_note_raw (subtype
);
4487 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4488 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4490 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4491 add_insn_before_nobb (note
, before
);
4493 add_insn_before (note
, before
, bb
);
4497 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4498 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4501 emit_pattern_after_setloc (rtx pattern
, rtx after
, int loc
,
4502 rtx (*make_raw
) (rtx
))
4504 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4506 if (pattern
== NULL_RTX
|| !loc
)
4509 after
= NEXT_INSN (after
);
4512 if (active_insn_p (after
) && !INSN_LOCATION (after
))
4513 INSN_LOCATION (after
) = loc
;
4516 after
= NEXT_INSN (after
);
4521 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4522 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4526 emit_pattern_after (rtx pattern
, rtx after
, bool skip_debug_insns
,
4527 rtx (*make_raw
) (rtx
))
4531 if (skip_debug_insns
)
4532 while (DEBUG_INSN_P (prev
))
4533 prev
= PREV_INSN (prev
);
4536 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4539 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4542 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4544 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4546 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4549 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4551 emit_insn_after (rtx pattern
, rtx after
)
4553 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4556 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4558 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4560 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4563 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4565 emit_jump_insn_after (rtx pattern
, rtx after
)
4567 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4570 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4572 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4574 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4577 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4579 emit_call_insn_after (rtx pattern
, rtx after
)
4581 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4584 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4586 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4588 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4591 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4593 emit_debug_insn_after (rtx pattern
, rtx after
)
4595 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4598 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4599 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4600 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4604 emit_pattern_before_setloc (rtx pattern
, rtx before
, int loc
, bool insnp
,
4605 rtx (*make_raw
) (rtx
))
4607 rtx first
= PREV_INSN (before
);
4608 rtx last
= emit_pattern_before_noloc (pattern
, before
,
4609 insnp
? before
: NULL_RTX
,
4612 if (pattern
== NULL_RTX
|| !loc
)
4616 first
= get_insns ();
4618 first
= NEXT_INSN (first
);
4621 if (active_insn_p (first
) && !INSN_LOCATION (first
))
4622 INSN_LOCATION (first
) = loc
;
4625 first
= NEXT_INSN (first
);
4630 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4631 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4632 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4633 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4636 emit_pattern_before (rtx pattern
, rtx before
, bool skip_debug_insns
,
4637 bool insnp
, rtx (*make_raw
) (rtx
))
4641 if (skip_debug_insns
)
4642 while (DEBUG_INSN_P (next
))
4643 next
= PREV_INSN (next
);
4646 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4649 return emit_pattern_before_noloc (pattern
, before
,
4650 insnp
? before
: NULL_RTX
,
4654 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4656 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4658 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4662 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4664 emit_insn_before (rtx pattern
, rtx before
)
4666 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4669 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4671 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4673 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4674 make_jump_insn_raw
);
4677 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4679 emit_jump_insn_before (rtx pattern
, rtx before
)
4681 return emit_pattern_before (pattern
, before
, true, false,
4682 make_jump_insn_raw
);
4685 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4687 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4689 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4690 make_call_insn_raw
);
4693 /* Like emit_call_insn_before_noloc,
4694 but set insn_location according to BEFORE. */
4696 emit_call_insn_before (rtx pattern
, rtx before
)
4698 return emit_pattern_before (pattern
, before
, true, false,
4699 make_call_insn_raw
);
4702 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4704 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4706 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4707 make_debug_insn_raw
);
4710 /* Like emit_debug_insn_before_noloc,
4711 but set insn_location according to BEFORE. */
4713 emit_debug_insn_before (rtx pattern
, rtx before
)
4715 return emit_pattern_before (pattern
, before
, false, false,
4716 make_debug_insn_raw
);
4719 /* Take X and emit it at the end of the doubly-linked
4722 Returns the last insn emitted. */
4727 rtx last
= get_last_insn();
4733 switch (GET_CODE (x
))
4745 rtx next
= NEXT_INSN (insn
);
4752 #ifdef ENABLE_RTL_CHECKING
4753 case JUMP_TABLE_DATA
:
4760 last
= make_insn_raw (x
);
4768 /* Make an insn of code DEBUG_INSN with pattern X
4769 and add it to the end of the doubly-linked list. */
4772 emit_debug_insn (rtx x
)
4774 rtx last
= get_last_insn();
4780 switch (GET_CODE (x
))
4792 rtx next
= NEXT_INSN (insn
);
4799 #ifdef ENABLE_RTL_CHECKING
4800 case JUMP_TABLE_DATA
:
4807 last
= make_debug_insn_raw (x
);
4815 /* Make an insn of code JUMP_INSN with pattern X
4816 and add it to the end of the doubly-linked list. */
4819 emit_jump_insn (rtx x
)
4821 rtx last
= NULL_RTX
, insn
;
4823 switch (GET_CODE (x
))
4835 rtx next
= NEXT_INSN (insn
);
4842 #ifdef ENABLE_RTL_CHECKING
4843 case JUMP_TABLE_DATA
:
4850 last
= make_jump_insn_raw (x
);
4858 /* Make an insn of code CALL_INSN with pattern X
4859 and add it to the end of the doubly-linked list. */
4862 emit_call_insn (rtx x
)
4866 switch (GET_CODE (x
))
4875 insn
= emit_insn (x
);
4878 #ifdef ENABLE_RTL_CHECKING
4880 case JUMP_TABLE_DATA
:
4886 insn
= make_call_insn_raw (x
);
4894 /* Add the label LABEL to the end of the doubly-linked list. */
4897 emit_label (rtx label
)
4899 gcc_checking_assert (INSN_UID (label
) == 0);
4900 INSN_UID (label
) = cur_insn_uid
++;
4905 /* Make an insn of code JUMP_TABLE_DATA
4906 and add it to the end of the doubly-linked list. */
4909 emit_jump_table_data (rtx table
)
4911 rtx jump_table_data
= rtx_alloc (JUMP_TABLE_DATA
);
4912 INSN_UID (jump_table_data
) = cur_insn_uid
++;
4913 PATTERN (jump_table_data
) = table
;
4914 BLOCK_FOR_INSN (jump_table_data
) = NULL
;
4915 add_insn (jump_table_data
);
4916 return jump_table_data
;
4919 /* Make an insn of code BARRIER
4920 and add it to the end of the doubly-linked list. */
4925 rtx barrier
= rtx_alloc (BARRIER
);
4926 INSN_UID (barrier
) = cur_insn_uid
++;
4931 /* Emit a copy of note ORIG. */
4934 emit_note_copy (rtx orig
)
4936 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
4937 rtx note
= make_note_raw (kind
);
4938 NOTE_DATA (note
) = NOTE_DATA (orig
);
4943 /* Make an insn of code NOTE or type NOTE_NO
4944 and add it to the end of the doubly-linked list. */
4947 emit_note (enum insn_note kind
)
4949 rtx note
= make_note_raw (kind
);
4954 /* Emit a clobber of lvalue X. */
4957 emit_clobber (rtx x
)
4959 /* CONCATs should not appear in the insn stream. */
4960 if (GET_CODE (x
) == CONCAT
)
4962 emit_clobber (XEXP (x
, 0));
4963 return emit_clobber (XEXP (x
, 1));
4965 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
4968 /* Return a sequence of insns to clobber lvalue X. */
4982 /* Emit a use of rvalue X. */
4987 /* CONCATs should not appear in the insn stream. */
4988 if (GET_CODE (x
) == CONCAT
)
4990 emit_use (XEXP (x
, 0));
4991 return emit_use (XEXP (x
, 1));
4993 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
4996 /* Return a sequence of insns to use rvalue X. */
5010 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5011 note of this type already exists, remove it first. */
5014 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5016 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5022 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5023 has multiple sets (some callers assume single_set
5024 means the insn only has one set, when in fact it
5025 means the insn only has one * useful * set). */
5026 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
5032 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5033 It serves no useful purpose and breaks eliminate_regs. */
5034 if (GET_CODE (datum
) == ASM_OPERANDS
)
5039 XEXP (note
, 0) = datum
;
5040 df_notes_rescan (insn
);
5048 XEXP (note
, 0) = datum
;
5054 add_reg_note (insn
, kind
, datum
);
5060 df_notes_rescan (insn
);
5066 return REG_NOTES (insn
);
5069 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5071 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5073 rtx set
= single_set (insn
);
5075 if (set
&& SET_DEST (set
) == dst
)
5076 return set_unique_reg_note (insn
, kind
, datum
);
5080 /* Return an indication of which type of insn should have X as a body.
5081 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5083 static enum rtx_code
5084 classify_insn (rtx x
)
5088 if (GET_CODE (x
) == CALL
)
5090 if (ANY_RETURN_P (x
))
5092 if (GET_CODE (x
) == SET
)
5094 if (SET_DEST (x
) == pc_rtx
)
5096 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5101 if (GET_CODE (x
) == PARALLEL
)
5104 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5105 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5107 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5108 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5110 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5111 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5117 /* Emit the rtl pattern X as an appropriate kind of insn.
5118 If X is a label, it is simply added into the insn chain. */
5123 enum rtx_code code
= classify_insn (x
);
5128 return emit_label (x
);
5130 return emit_insn (x
);
5133 rtx insn
= emit_jump_insn (x
);
5134 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5135 return emit_barrier ();
5139 return emit_call_insn (x
);
5141 return emit_debug_insn (x
);
5147 /* Space for free sequence stack entries. */
5148 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5150 /* Begin emitting insns to a sequence. If this sequence will contain
5151 something that might cause the compiler to pop arguments to function
5152 calls (because those pops have previously been deferred; see
5153 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5154 before calling this function. That will ensure that the deferred
5155 pops are not accidentally emitted in the middle of this sequence. */
5158 start_sequence (void)
5160 struct sequence_stack
*tem
;
5162 if (free_sequence_stack
!= NULL
)
5164 tem
= free_sequence_stack
;
5165 free_sequence_stack
= tem
->next
;
5168 tem
= ggc_alloc_sequence_stack ();
5170 tem
->next
= seq_stack
;
5171 tem
->first
= get_insns ();
5172 tem
->last
= get_last_insn ();
5180 /* Set up the insn chain starting with FIRST as the current sequence,
5181 saving the previously current one. See the documentation for
5182 start_sequence for more information about how to use this function. */
5185 push_to_sequence (rtx first
)
5191 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5194 set_first_insn (first
);
5195 set_last_insn (last
);
5198 /* Like push_to_sequence, but take the last insn as an argument to avoid
5199 looping through the list. */
5202 push_to_sequence2 (rtx first
, rtx last
)
5206 set_first_insn (first
);
5207 set_last_insn (last
);
5210 /* Set up the outer-level insn chain
5211 as the current sequence, saving the previously current one. */
5214 push_topmost_sequence (void)
5216 struct sequence_stack
*stack
, *top
= NULL
;
5220 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5223 set_first_insn (top
->first
);
5224 set_last_insn (top
->last
);
5227 /* After emitting to the outer-level insn chain, update the outer-level
5228 insn chain, and restore the previous saved state. */
5231 pop_topmost_sequence (void)
5233 struct sequence_stack
*stack
, *top
= NULL
;
5235 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5238 top
->first
= get_insns ();
5239 top
->last
= get_last_insn ();
5244 /* After emitting to a sequence, restore previous saved state.
5246 To get the contents of the sequence just made, you must call
5247 `get_insns' *before* calling here.
5249 If the compiler might have deferred popping arguments while
5250 generating this sequence, and this sequence will not be immediately
5251 inserted into the instruction stream, use do_pending_stack_adjust
5252 before calling get_insns. That will ensure that the deferred
5253 pops are inserted into this sequence, and not into some random
5254 location in the instruction stream. See INHIBIT_DEFER_POP for more
5255 information about deferred popping of arguments. */
5260 struct sequence_stack
*tem
= seq_stack
;
5262 set_first_insn (tem
->first
);
5263 set_last_insn (tem
->last
);
5264 seq_stack
= tem
->next
;
5266 memset (tem
, 0, sizeof (*tem
));
5267 tem
->next
= free_sequence_stack
;
5268 free_sequence_stack
= tem
;
5271 /* Return 1 if currently emitting into a sequence. */
5274 in_sequence_p (void)
5276 return seq_stack
!= 0;
5279 /* Put the various virtual registers into REGNO_REG_RTX. */
5282 init_virtual_regs (void)
5284 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5285 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5286 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5287 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5288 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5289 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5290 = virtual_preferred_stack_boundary_rtx
;
5294 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5295 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5296 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5297 static int copy_insn_n_scratches
;
5299 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5300 copied an ASM_OPERANDS.
5301 In that case, it is the original input-operand vector. */
5302 static rtvec orig_asm_operands_vector
;
5304 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5305 copied an ASM_OPERANDS.
5306 In that case, it is the copied input-operand vector. */
5307 static rtvec copy_asm_operands_vector
;
5309 /* Likewise for the constraints vector. */
5310 static rtvec orig_asm_constraints_vector
;
5311 static rtvec copy_asm_constraints_vector
;
5313 /* Recursively create a new copy of an rtx for copy_insn.
5314 This function differs from copy_rtx in that it handles SCRATCHes and
5315 ASM_OPERANDs properly.
5316 Normally, this function is not used directly; use copy_insn as front end.
5317 However, you could first copy an insn pattern with copy_insn and then use
5318 this function afterwards to properly copy any REG_NOTEs containing
5322 copy_insn_1 (rtx orig
)
5327 const char *format_ptr
;
5332 code
= GET_CODE (orig
);
5347 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5348 clobbers or clobbers of hard registers that originated as pseudos.
5349 This is needed to allow safe register renaming. */
5350 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
5351 && ORIGINAL_REGNO (XEXP (orig
, 0)) == REGNO (XEXP (orig
, 0)))
5356 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5357 if (copy_insn_scratch_in
[i
] == orig
)
5358 return copy_insn_scratch_out
[i
];
5362 if (shared_const_p (orig
))
5366 /* A MEM with a constant address is not sharable. The problem is that
5367 the constant address may need to be reloaded. If the mem is shared,
5368 then reloading one copy of this mem will cause all copies to appear
5369 to have been reloaded. */
5375 /* Copy the various flags, fields, and other information. We assume
5376 that all fields need copying, and then clear the fields that should
5377 not be copied. That is the sensible default behavior, and forces
5378 us to explicitly document why we are *not* copying a flag. */
5379 copy
= shallow_copy_rtx (orig
);
5381 /* We do not copy the USED flag, which is used as a mark bit during
5382 walks over the RTL. */
5383 RTX_FLAG (copy
, used
) = 0;
5385 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5388 RTX_FLAG (copy
, jump
) = 0;
5389 RTX_FLAG (copy
, call
) = 0;
5390 RTX_FLAG (copy
, frame_related
) = 0;
5393 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5395 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5396 switch (*format_ptr
++)
5399 if (XEXP (orig
, i
) != NULL
)
5400 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5405 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5406 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5407 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5408 XVEC (copy
, i
) = copy_asm_operands_vector
;
5409 else if (XVEC (orig
, i
) != NULL
)
5411 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5412 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5413 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5424 /* These are left unchanged. */
5431 if (code
== SCRATCH
)
5433 i
= copy_insn_n_scratches
++;
5434 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5435 copy_insn_scratch_in
[i
] = orig
;
5436 copy_insn_scratch_out
[i
] = copy
;
5438 else if (code
== ASM_OPERANDS
)
5440 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5441 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5442 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5443 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5449 /* Create a new copy of an rtx.
5450 This function differs from copy_rtx in that it handles SCRATCHes and
5451 ASM_OPERANDs properly.
5452 INSN doesn't really have to be a full INSN; it could be just the
5455 copy_insn (rtx insn
)
5457 copy_insn_n_scratches
= 0;
5458 orig_asm_operands_vector
= 0;
5459 orig_asm_constraints_vector
= 0;
5460 copy_asm_operands_vector
= 0;
5461 copy_asm_constraints_vector
= 0;
5462 return copy_insn_1 (insn
);
5465 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5466 on that assumption that INSN itself remains in its original place. */
5469 copy_delay_slot_insn (rtx insn
)
5471 /* Copy INSN with its rtx_code, all its notes, location etc. */
5472 insn
= copy_rtx (insn
);
5473 INSN_UID (insn
) = cur_insn_uid
++;
5477 /* Initialize data structures and variables in this file
5478 before generating rtl for each function. */
5483 set_first_insn (NULL
);
5484 set_last_insn (NULL
);
5485 if (MIN_NONDEBUG_INSN_UID
)
5486 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5489 cur_debug_insn_uid
= 1;
5490 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5491 first_label_num
= label_num
;
5494 /* Init the tables that describe all the pseudo regs. */
5496 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5498 crtl
->emit
.regno_pointer_align
5499 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5501 regno_reg_rtx
= ggc_alloc_vec_rtx (crtl
->emit
.regno_pointer_align_length
);
5503 /* Put copies of all the hard registers into regno_reg_rtx. */
5504 memcpy (regno_reg_rtx
,
5505 initial_regno_reg_rtx
,
5506 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5508 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5509 init_virtual_regs ();
5511 /* Indicate that the virtual registers and stack locations are
5513 REG_POINTER (stack_pointer_rtx
) = 1;
5514 REG_POINTER (frame_pointer_rtx
) = 1;
5515 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5516 REG_POINTER (arg_pointer_rtx
) = 1;
5518 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5519 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5520 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5521 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5522 REG_POINTER (virtual_cfa_rtx
) = 1;
5524 #ifdef STACK_BOUNDARY
5525 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5526 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5527 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5528 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5530 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5531 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5532 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5533 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5534 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5537 #ifdef INIT_EXPANDERS
5542 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5545 gen_const_vector (enum machine_mode mode
, int constant
)
5550 enum machine_mode inner
;
5552 units
= GET_MODE_NUNITS (mode
);
5553 inner
= GET_MODE_INNER (mode
);
5555 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5557 v
= rtvec_alloc (units
);
5559 /* We need to call this function after we set the scalar const_tiny_rtx
5561 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5563 for (i
= 0; i
< units
; ++i
)
5564 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5566 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5570 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5571 all elements are zero, and the one vector when all elements are one. */
5573 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5575 enum machine_mode inner
= GET_MODE_INNER (mode
);
5576 int nunits
= GET_MODE_NUNITS (mode
);
5580 /* Check to see if all of the elements have the same value. */
5581 x
= RTVEC_ELT (v
, nunits
- 1);
5582 for (i
= nunits
- 2; i
>= 0; i
--)
5583 if (RTVEC_ELT (v
, i
) != x
)
5586 /* If the values are all the same, check to see if we can use one of the
5587 standard constant vectors. */
5590 if (x
== CONST0_RTX (inner
))
5591 return CONST0_RTX (mode
);
5592 else if (x
== CONST1_RTX (inner
))
5593 return CONST1_RTX (mode
);
5594 else if (x
== CONSTM1_RTX (inner
))
5595 return CONSTM1_RTX (mode
);
5598 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5601 /* Initialise global register information required by all functions. */
5604 init_emit_regs (void)
5607 enum machine_mode mode
;
5610 /* Reset register attributes */
5611 htab_empty (reg_attrs_htab
);
5613 /* We need reg_raw_mode, so initialize the modes now. */
5614 init_reg_modes_target ();
5616 /* Assign register numbers to the globally defined register rtx. */
5617 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5618 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5619 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5620 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5621 virtual_incoming_args_rtx
=
5622 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5623 virtual_stack_vars_rtx
=
5624 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5625 virtual_stack_dynamic_rtx
=
5626 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5627 virtual_outgoing_args_rtx
=
5628 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5629 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5630 virtual_preferred_stack_boundary_rtx
=
5631 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5633 /* Initialize RTL for commonly used hard registers. These are
5634 copied into regno_reg_rtx as we begin to compile each function. */
5635 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5636 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5638 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5639 return_address_pointer_rtx
5640 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5643 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5644 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5646 pic_offset_table_rtx
= NULL_RTX
;
5648 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5650 mode
= (enum machine_mode
) i
;
5651 attrs
= ggc_alloc_cleared_mem_attrs ();
5652 attrs
->align
= BITS_PER_UNIT
;
5653 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5654 if (mode
!= BLKmode
)
5656 attrs
->size_known_p
= true;
5657 attrs
->size
= GET_MODE_SIZE (mode
);
5658 if (STRICT_ALIGNMENT
)
5659 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5661 mode_mem_attrs
[i
] = attrs
;
5665 /* Create some permanent unique rtl objects shared between all functions. */
5668 init_emit_once (void)
5671 enum machine_mode mode
;
5672 enum machine_mode double_mode
;
5674 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5676 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5677 const_int_htab_eq
, NULL
);
5679 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5680 const_double_htab_eq
, NULL
);
5682 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5683 const_fixed_htab_eq
, NULL
);
5685 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5686 mem_attrs_htab_eq
, NULL
);
5687 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5688 reg_attrs_htab_eq
, NULL
);
5690 /* Compute the word and byte modes. */
5692 byte_mode
= VOIDmode
;
5693 word_mode
= VOIDmode
;
5694 double_mode
= VOIDmode
;
5696 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5698 mode
= GET_MODE_WIDER_MODE (mode
))
5700 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5701 && byte_mode
== VOIDmode
)
5704 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5705 && word_mode
== VOIDmode
)
5709 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5711 mode
= GET_MODE_WIDER_MODE (mode
))
5713 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5714 && double_mode
== VOIDmode
)
5718 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5720 #ifdef INIT_EXPANDERS
5721 /* This is to initialize {init|mark|free}_machine_status before the first
5722 call to push_function_context_to. This is needed by the Chill front
5723 end which calls push_function_context_to before the first call to
5724 init_function_start. */
5728 /* Create the unique rtx's for certain rtx codes and operand values. */
5730 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5731 tries to use these variables. */
5732 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5733 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5734 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5736 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5737 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5738 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5740 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5742 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5743 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5744 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5749 dconsthalf
= dconst1
;
5750 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5752 for (i
= 0; i
< 3; i
++)
5754 const REAL_VALUE_TYPE
*const r
=
5755 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5757 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5759 mode
= GET_MODE_WIDER_MODE (mode
))
5760 const_tiny_rtx
[i
][(int) mode
] =
5761 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5763 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5765 mode
= GET_MODE_WIDER_MODE (mode
))
5766 const_tiny_rtx
[i
][(int) mode
] =
5767 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5769 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5771 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5773 mode
= GET_MODE_WIDER_MODE (mode
))
5774 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5776 for (mode
= MIN_MODE_PARTIAL_INT
;
5777 mode
<= MAX_MODE_PARTIAL_INT
;
5778 mode
= (enum machine_mode
)((int)(mode
) + 1))
5779 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5782 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5784 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5786 mode
= GET_MODE_WIDER_MODE (mode
))
5787 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5789 for (mode
= MIN_MODE_PARTIAL_INT
;
5790 mode
<= MAX_MODE_PARTIAL_INT
;
5791 mode
= (enum machine_mode
)((int)(mode
) + 1))
5792 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5794 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5796 mode
= GET_MODE_WIDER_MODE (mode
))
5798 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5799 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5802 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5804 mode
= GET_MODE_WIDER_MODE (mode
))
5806 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5807 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5810 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5812 mode
= GET_MODE_WIDER_MODE (mode
))
5814 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5815 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5816 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
5819 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5821 mode
= GET_MODE_WIDER_MODE (mode
))
5823 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5824 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5827 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5829 mode
= GET_MODE_WIDER_MODE (mode
))
5831 FCONST0(mode
).data
.high
= 0;
5832 FCONST0(mode
).data
.low
= 0;
5833 FCONST0(mode
).mode
= mode
;
5834 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5835 FCONST0 (mode
), mode
);
5838 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5840 mode
= GET_MODE_WIDER_MODE (mode
))
5842 FCONST0(mode
).data
.high
= 0;
5843 FCONST0(mode
).data
.low
= 0;
5844 FCONST0(mode
).mode
= mode
;
5845 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5846 FCONST0 (mode
), mode
);
5849 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5851 mode
= GET_MODE_WIDER_MODE (mode
))
5853 FCONST0(mode
).data
.high
= 0;
5854 FCONST0(mode
).data
.low
= 0;
5855 FCONST0(mode
).mode
= mode
;
5856 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5857 FCONST0 (mode
), mode
);
5859 /* We store the value 1. */
5860 FCONST1(mode
).data
.high
= 0;
5861 FCONST1(mode
).data
.low
= 0;
5862 FCONST1(mode
).mode
= mode
;
5864 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5865 HOST_BITS_PER_DOUBLE_INT
,
5866 SIGNED_FIXED_POINT_MODE_P (mode
));
5867 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5868 FCONST1 (mode
), mode
);
5871 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5873 mode
= GET_MODE_WIDER_MODE (mode
))
5875 FCONST0(mode
).data
.high
= 0;
5876 FCONST0(mode
).data
.low
= 0;
5877 FCONST0(mode
).mode
= mode
;
5878 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5879 FCONST0 (mode
), mode
);
5881 /* We store the value 1. */
5882 FCONST1(mode
).data
.high
= 0;
5883 FCONST1(mode
).data
.low
= 0;
5884 FCONST1(mode
).mode
= mode
;
5886 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5887 HOST_BITS_PER_DOUBLE_INT
,
5888 SIGNED_FIXED_POINT_MODE_P (mode
));
5889 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5890 FCONST1 (mode
), mode
);
5893 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5895 mode
= GET_MODE_WIDER_MODE (mode
))
5897 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5900 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
5902 mode
= GET_MODE_WIDER_MODE (mode
))
5904 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5907 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
5909 mode
= GET_MODE_WIDER_MODE (mode
))
5911 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5912 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5915 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
5917 mode
= GET_MODE_WIDER_MODE (mode
))
5919 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5920 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5923 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5924 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5925 const_tiny_rtx
[0][i
] = const0_rtx
;
5927 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5928 if (STORE_FLAG_VALUE
== 1)
5929 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5931 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
5932 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
5933 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
5934 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
5937 /* Produce exact duplicate of insn INSN after AFTER.
5938 Care updating of libcall regions if present. */
5941 emit_copy_of_insn_after (rtx insn
, rtx after
)
5945 switch (GET_CODE (insn
))
5948 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5952 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5956 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
5960 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5961 if (CALL_INSN_FUNCTION_USAGE (insn
))
5962 CALL_INSN_FUNCTION_USAGE (new_rtx
)
5963 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5964 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
5965 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
5966 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
5967 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
5968 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
5975 /* Update LABEL_NUSES. */
5976 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
5978 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
5980 /* If the old insn is frame related, then so is the new one. This is
5981 primarily needed for IA-64 unwind info which marks epilogue insns,
5982 which may be duplicated by the basic block reordering code. */
5983 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
5985 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5986 will make them. REG_LABEL_TARGETs are created there too, but are
5987 supposed to be sticky, so we copy them. */
5988 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5989 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
5991 if (GET_CODE (link
) == EXPR_LIST
)
5992 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
5993 copy_insn_1 (XEXP (link
, 0)));
5995 add_reg_note (new_rtx
, REG_NOTE_KIND (link
), XEXP (link
, 0));
5998 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6002 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6004 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
6006 if (hard_reg_clobbers
[mode
][regno
])
6007 return hard_reg_clobbers
[mode
][regno
];
6009 return (hard_reg_clobbers
[mode
][regno
] =
6010 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6013 location_t prologue_location
;
6014 location_t epilogue_location
;
6016 /* Hold current location information and last location information, so the
6017 datastructures are built lazily only when some instructions in given
6018 place are needed. */
6019 static location_t curr_location
;
6021 /* Allocate insn location datastructure. */
6023 insn_locations_init (void)
6025 prologue_location
= epilogue_location
= 0;
6026 curr_location
= UNKNOWN_LOCATION
;
6029 /* At the end of emit stage, clear current location. */
6031 insn_locations_finalize (void)
6033 epilogue_location
= curr_location
;
6034 curr_location
= UNKNOWN_LOCATION
;
6037 /* Set current location. */
6039 set_curr_insn_location (location_t location
)
6041 curr_location
= location
;
6044 /* Get current location. */
6046 curr_insn_location (void)
6048 return curr_location
;
6051 /* Return lexical scope block insn belongs to. */
6053 insn_scope (const_rtx insn
)
6055 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6058 /* Return line number of the statement that produced this insn. */
6060 insn_line (const_rtx insn
)
6062 return LOCATION_LINE (INSN_LOCATION (insn
));
6065 /* Return source file of the statement that produced this insn. */
6067 insn_file (const_rtx insn
)
6069 return LOCATION_FILE (INSN_LOCATION (insn
));
6072 /* Return true if memory model MODEL requires a pre-operation (release-style)
6073 barrier or a post-operation (acquire-style) barrier. While not universal,
6074 this function matches behavior of several targets. */
6077 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6079 switch (model
& MEMMODEL_MASK
)
6081 case MEMMODEL_RELAXED
:
6082 case MEMMODEL_CONSUME
:
6084 case MEMMODEL_RELEASE
:
6086 case MEMMODEL_ACQUIRE
:
6088 case MEMMODEL_ACQ_REL
:
6089 case MEMMODEL_SEQ_CST
:
6096 #include "gt-emit-rtl.h"