1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num
= 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num
;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num
;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers
;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl
[GR_MAX
];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
110 REAL_VALUE_TYPE dconst0
;
111 REAL_VALUE_TYPE dconst1
;
112 REAL_VALUE_TYPE dconst2
;
113 REAL_VALUE_TYPE dconstm1
;
115 /* All references to the following fixed hard registers go through
116 these unique rtl objects. On machines where the frame-pointer and
117 arg-pointer are the same register, they use the same unique object.
119 After register allocation, other rtl objects which used to be pseudo-regs
120 may be clobbered to refer to the frame-pointer register.
121 But references that were originally to the frame-pointer can be
122 distinguished from the others because they contain frame_pointer_rtx.
124 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
125 tricky: until register elimination has taken place hard_frame_pointer_rtx
126 should be used if it is being set, and frame_pointer_rtx otherwise. After
127 register elimination hard_frame_pointer_rtx should always be used.
128 On machines where the two registers are same (most) then these are the
131 In an inline procedure, the stack and frame pointer rtxs may not be
132 used for anything else. */
133 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
134 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
135 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
136 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
137 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
139 /* This is used to implement __builtin_return_address for some machines.
140 See for instance the MIPS port. */
141 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
143 /* We make one copy of (const_int C) where C is in
144 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
145 to save space during the compilation and simplify comparisons of
148 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
150 /* A hash table storing CONST_INTs whose absolute value is greater
151 than MAX_SAVED_CONST_INT. */
153 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
154 htab_t const_int_htab
;
156 /* A hash table storing memory attribute structures. */
157 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
158 htab_t mem_attrs_htab
;
160 /* A hash table storing register attribute structures. */
161 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
162 htab_t reg_attrs_htab
;
164 /* A hash table storing all CONST_DOUBLEs. */
165 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
166 htab_t const_double_htab
;
168 #define first_insn (cfun->emit->x_first_insn)
169 #define last_insn (cfun->emit->x_last_insn)
170 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
171 #define last_linenum (cfun->emit->x_last_linenum)
172 #define last_filename (cfun->emit->x_last_filename)
173 #define first_label_num (cfun->emit->x_first_label_num)
175 static rtx make_jump_insn_raw
PARAMS ((rtx
));
176 static rtx make_call_insn_raw
PARAMS ((rtx
));
177 static rtx find_line_note
PARAMS ((rtx
));
178 static rtx change_address_1
PARAMS ((rtx
, enum machine_mode
, rtx
,
180 static void unshare_all_rtl_1
PARAMS ((rtx
));
181 static void unshare_all_decls
PARAMS ((tree
));
182 static void reset_used_decls
PARAMS ((tree
));
183 static void mark_label_nuses
PARAMS ((rtx
));
184 static hashval_t const_int_htab_hash
PARAMS ((const void *));
185 static int const_int_htab_eq
PARAMS ((const void *,
187 static hashval_t const_double_htab_hash
PARAMS ((const void *));
188 static int const_double_htab_eq
PARAMS ((const void *,
190 static rtx lookup_const_double
PARAMS ((rtx
));
191 static hashval_t mem_attrs_htab_hash
PARAMS ((const void *));
192 static int mem_attrs_htab_eq
PARAMS ((const void *,
194 static mem_attrs
*get_mem_attrs
PARAMS ((HOST_WIDE_INT
, tree
, rtx
,
197 static hashval_t reg_attrs_htab_hash
PARAMS ((const void *));
198 static int reg_attrs_htab_eq
PARAMS ((const void *,
200 static reg_attrs
*get_reg_attrs
PARAMS ((tree
, int));
201 static tree component_ref_for_mem_expr
PARAMS ((tree
));
202 static rtx gen_const_vector_0
PARAMS ((enum machine_mode
));
204 /* Probability of the conditional branch currently proceeded by try_split.
205 Set to -1 otherwise. */
206 int split_branch_probability
= -1;
208 /* Returns a hash code for X (which is a really a CONST_INT). */
211 const_int_htab_hash (x
)
214 return (hashval_t
) INTVAL ((struct rtx_def
*) x
);
217 /* Returns nonzero if the value represented by X (which is really a
218 CONST_INT) is the same as that given by Y (which is really a
222 const_int_htab_eq (x
, y
)
226 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
229 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
231 const_double_htab_hash (x
)
237 if (GET_MODE (value
) == VOIDmode
)
238 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
241 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
242 /* MODE is used in the comparison, so it should be in the hash. */
243 h
^= GET_MODE (value
);
248 /* Returns nonzero if the value represented by X (really a ...)
249 is the same as that represented by Y (really a ...) */
251 const_double_htab_eq (x
, y
)
255 rtx a
= (rtx
)x
, b
= (rtx
)y
;
257 if (GET_MODE (a
) != GET_MODE (b
))
259 if (GET_MODE (a
) == VOIDmode
)
260 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
261 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
263 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
264 CONST_DOUBLE_REAL_VALUE (b
));
267 /* Returns a hash code for X (which is a really a mem_attrs *). */
270 mem_attrs_htab_hash (x
)
273 mem_attrs
*p
= (mem_attrs
*) x
;
275 return (p
->alias
^ (p
->align
* 1000)
276 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
277 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
281 /* Returns nonzero if the value represented by X (which is really a
282 mem_attrs *) is the same as that given by Y (which is also really a
286 mem_attrs_htab_eq (x
, y
)
290 mem_attrs
*p
= (mem_attrs
*) x
;
291 mem_attrs
*q
= (mem_attrs
*) y
;
293 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
294 && p
->size
== q
->size
&& p
->align
== q
->align
);
297 /* Allocate a new mem_attrs structure and insert it into the hash table if
298 one identical to it is not already in the table. We are doing this for
302 get_mem_attrs (alias
, expr
, offset
, size
, align
, mode
)
308 enum machine_mode mode
;
313 /* If everything is the default, we can just return zero. */
314 if (alias
== 0 && expr
== 0 && offset
== 0
316 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
317 && (align
== BITS_PER_UNIT
319 && mode
!= BLKmode
&& align
== GET_MODE_ALIGNMENT (mode
))))
324 attrs
.offset
= offset
;
328 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
331 *slot
= ggc_alloc (sizeof (mem_attrs
));
332 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
338 /* Returns a hash code for X (which is a really a reg_attrs *). */
341 reg_attrs_htab_hash (x
)
344 reg_attrs
*p
= (reg_attrs
*) x
;
346 return ((p
->offset
* 1000) ^ (long) p
->decl
);
349 /* Returns non-zero if the value represented by X (which is really a
350 reg_attrs *) is the same as that given by Y (which is also really a
354 reg_attrs_htab_eq (x
, y
)
358 reg_attrs
*p
= (reg_attrs
*) x
;
359 reg_attrs
*q
= (reg_attrs
*) y
;
361 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
363 /* Allocate a new reg_attrs structure and insert it into the hash table if
364 one identical to it is not already in the table. We are doing this for
368 get_reg_attrs (decl
, offset
)
375 /* If everything is the default, we can just return zero. */
376 if (decl
== 0 && offset
== 0)
380 attrs
.offset
= offset
;
382 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
385 *slot
= ggc_alloc (sizeof (reg_attrs
));
386 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
392 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
393 don't attempt to share with the various global pieces of rtl (such as
394 frame_pointer_rtx). */
397 gen_raw_REG (mode
, regno
)
398 enum machine_mode mode
;
401 rtx x
= gen_rtx_raw_REG (mode
, regno
);
402 ORIGINAL_REGNO (x
) = regno
;
406 /* There are some RTL codes that require special attention; the generation
407 functions do the raw handling. If you add to this list, modify
408 special_rtx in gengenrtl.c as well. */
411 gen_rtx_CONST_INT (mode
, arg
)
412 enum machine_mode mode ATTRIBUTE_UNUSED
;
417 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
418 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
420 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
421 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
422 return const_true_rtx
;
425 /* Look up the CONST_INT in the hash table. */
426 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
427 (hashval_t
) arg
, INSERT
);
429 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
435 gen_int_mode (c
, mode
)
437 enum machine_mode mode
;
439 return GEN_INT (trunc_int_for_mode (c
, mode
));
442 /* CONST_DOUBLEs might be created from pairs of integers, or from
443 REAL_VALUE_TYPEs. Also, their length is known only at run time,
444 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
446 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
447 hash table. If so, return its counterpart; otherwise add it
448 to the hash table and return it. */
450 lookup_const_double (real
)
453 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
460 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
461 VALUE in mode MODE. */
463 const_double_from_real_value (value
, mode
)
464 REAL_VALUE_TYPE value
;
465 enum machine_mode mode
;
467 rtx real
= rtx_alloc (CONST_DOUBLE
);
468 PUT_MODE (real
, mode
);
470 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
472 return lookup_const_double (real
);
475 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
476 of ints: I0 is the low-order word and I1 is the high-order word.
477 Do not use this routine for non-integer modes; convert to
478 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
481 immed_double_const (i0
, i1
, mode
)
482 HOST_WIDE_INT i0
, i1
;
483 enum machine_mode mode
;
488 if (mode
!= VOIDmode
)
491 if (GET_MODE_CLASS (mode
) != MODE_INT
492 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
493 /* We can get a 0 for an error mark. */
494 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
495 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
498 /* We clear out all bits that don't belong in MODE, unless they and
499 our sign bit are all one. So we get either a reasonable negative
500 value or a reasonable unsigned value for this mode. */
501 width
= GET_MODE_BITSIZE (mode
);
502 if (width
< HOST_BITS_PER_WIDE_INT
503 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
504 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
505 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
506 else if (width
== HOST_BITS_PER_WIDE_INT
507 && ! (i1
== ~0 && i0
< 0))
509 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
510 /* We cannot represent this value as a constant. */
513 /* If this would be an entire word for the target, but is not for
514 the host, then sign-extend on the host so that the number will
515 look the same way on the host that it would on the target.
517 For example, when building a 64 bit alpha hosted 32 bit sparc
518 targeted compiler, then we want the 32 bit unsigned value -1 to be
519 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
520 The latter confuses the sparc backend. */
522 if (width
< HOST_BITS_PER_WIDE_INT
523 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
524 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
526 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
529 ??? Strictly speaking, this is wrong if we create a CONST_INT for
530 a large unsigned constant with the size of MODE being
531 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
532 in a wider mode. In that case we will mis-interpret it as a
535 Unfortunately, the only alternative is to make a CONST_DOUBLE for
536 any constant in any mode if it is an unsigned constant larger
537 than the maximum signed integer in an int on the host. However,
538 doing this will break everyone that always expects to see a
539 CONST_INT for SImode and smaller.
541 We have always been making CONST_INTs in this case, so nothing
542 new is being broken. */
544 if (width
<= HOST_BITS_PER_WIDE_INT
)
545 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
548 /* If this integer fits in one word, return a CONST_INT. */
549 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
552 /* We use VOIDmode for integers. */
553 value
= rtx_alloc (CONST_DOUBLE
);
554 PUT_MODE (value
, VOIDmode
);
556 CONST_DOUBLE_LOW (value
) = i0
;
557 CONST_DOUBLE_HIGH (value
) = i1
;
559 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
560 XWINT (value
, i
) = 0;
562 return lookup_const_double (value
);
566 gen_rtx_REG (mode
, regno
)
567 enum machine_mode mode
;
570 /* In case the MD file explicitly references the frame pointer, have
571 all such references point to the same frame pointer. This is
572 used during frame pointer elimination to distinguish the explicit
573 references to these registers from pseudos that happened to be
576 If we have eliminated the frame pointer or arg pointer, we will
577 be using it as a normal register, for example as a spill
578 register. In such cases, we might be accessing it in a mode that
579 is not Pmode and therefore cannot use the pre-allocated rtx.
581 Also don't do this when we are making new REGs in reload, since
582 we don't want to get confused with the real pointers. */
584 if (mode
== Pmode
&& !reload_in_progress
)
586 if (regno
== FRAME_POINTER_REGNUM
587 && (!reload_completed
|| frame_pointer_needed
))
588 return frame_pointer_rtx
;
589 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
590 if (regno
== HARD_FRAME_POINTER_REGNUM
591 && (!reload_completed
|| frame_pointer_needed
))
592 return hard_frame_pointer_rtx
;
594 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
595 if (regno
== ARG_POINTER_REGNUM
)
596 return arg_pointer_rtx
;
598 #ifdef RETURN_ADDRESS_POINTER_REGNUM
599 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
600 return return_address_pointer_rtx
;
602 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
603 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
604 return pic_offset_table_rtx
;
605 if (regno
== STACK_POINTER_REGNUM
)
606 return stack_pointer_rtx
;
610 /* If the per-function register table has been set up, try to re-use
611 an existing entry in that table to avoid useless generation of RTL.
613 This code is disabled for now until we can fix the various backends
614 which depend on having non-shared hard registers in some cases. Long
615 term we want to re-enable this code as it can significantly cut down
616 on the amount of useless RTL that gets generated.
618 We'll also need to fix some code that runs after reload that wants to
619 set ORIGINAL_REGNO. */
624 && regno
< FIRST_PSEUDO_REGISTER
625 && reg_raw_mode
[regno
] == mode
)
626 return regno_reg_rtx
[regno
];
629 return gen_raw_REG (mode
, regno
);
633 gen_rtx_MEM (mode
, addr
)
634 enum machine_mode mode
;
637 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
639 /* This field is not cleared by the mere allocation of the rtx, so
647 gen_rtx_SUBREG (mode
, reg
, offset
)
648 enum machine_mode mode
;
652 /* This is the most common failure type.
653 Catch it early so we can see who does it. */
654 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
657 /* This check isn't usable right now because combine will
658 throw arbitrary crap like a CALL into a SUBREG in
659 gen_lowpart_for_combine so we must just eat it. */
661 /* Check for this too. */
662 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
665 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
668 /* Generate a SUBREG representing the least-significant part of REG if MODE
669 is smaller than mode of REG, otherwise paradoxical SUBREG. */
672 gen_lowpart_SUBREG (mode
, reg
)
673 enum machine_mode mode
;
676 enum machine_mode inmode
;
678 inmode
= GET_MODE (reg
);
679 if (inmode
== VOIDmode
)
681 return gen_rtx_SUBREG (mode
, reg
,
682 subreg_lowpart_offset (mode
, inmode
));
685 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
687 ** This routine generates an RTX of the size specified by
688 ** <code>, which is an RTX code. The RTX structure is initialized
689 ** from the arguments <element1> through <elementn>, which are
690 ** interpreted according to the specific RTX type's format. The
691 ** special machine mode associated with the rtx (if any) is specified
694 ** gen_rtx can be invoked in a way which resembles the lisp-like
695 ** rtx it will generate. For example, the following rtx structure:
697 ** (plus:QI (mem:QI (reg:SI 1))
698 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
700 ** ...would be generated by the following C code:
702 ** gen_rtx (PLUS, QImode,
703 ** gen_rtx (MEM, QImode,
704 ** gen_rtx (REG, SImode, 1)),
705 ** gen_rtx (MEM, QImode,
706 ** gen_rtx (PLUS, SImode,
707 ** gen_rtx (REG, SImode, 2),
708 ** gen_rtx (REG, SImode, 3)))),
713 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
715 int i
; /* Array indices... */
716 const char *fmt
; /* Current rtx's format... */
717 rtx rt_val
; /* RTX to return to caller... */
720 VA_FIXEDARG (p
, enum rtx_code
, code
);
721 VA_FIXEDARG (p
, enum machine_mode
, mode
);
726 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
731 HOST_WIDE_INT arg0
= va_arg (p
, HOST_WIDE_INT
);
732 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
734 rt_val
= immed_double_const (arg0
, arg1
, mode
);
739 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
743 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
747 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
748 rt_val
->mode
= mode
; /* Store the machine mode... */
750 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
751 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
755 case '0': /* Unused field. */
758 case 'i': /* An integer? */
759 XINT (rt_val
, i
) = va_arg (p
, int);
762 case 'w': /* A wide integer? */
763 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
766 case 's': /* A string? */
767 XSTR (rt_val
, i
) = va_arg (p
, char *);
770 case 'e': /* An expression? */
771 case 'u': /* An insn? Same except when printing. */
772 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
775 case 'E': /* An RTX vector? */
776 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
779 case 'b': /* A bitmap? */
780 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
783 case 't': /* A tree? */
784 XTREE (rt_val
, i
) = va_arg (p
, tree
);
798 /* gen_rtvec (n, [rt1, ..., rtn])
800 ** This routine creates an rtvec and stores within it the
801 ** pointers to rtx's which are its arguments.
806 gen_rtvec
VPARAMS ((int n
, ...))
812 VA_FIXEDARG (p
, int, n
);
815 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
817 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
819 for (i
= 0; i
< n
; i
++)
820 vector
[i
] = va_arg (p
, rtx
);
822 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
826 return gen_rtvec_v (save_n
, vector
);
830 gen_rtvec_v (n
, argp
)
838 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
840 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
842 for (i
= 0; i
< n
; i
++)
843 rt_val
->elem
[i
] = *argp
++;
848 /* Generate a REG rtx for a new pseudo register of mode MODE.
849 This pseudo is assigned the next sequential register number. */
853 enum machine_mode mode
;
855 struct function
*f
= cfun
;
858 /* Don't let anything called after initial flow analysis create new
863 if (generating_concat_p
864 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
865 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
867 /* For complex modes, don't make a single pseudo.
868 Instead, make a CONCAT of two pseudos.
869 This allows noncontiguous allocation of the real and imaginary parts,
870 which makes much better code. Besides, allocating DCmode
871 pseudos overstrains reload on some machines like the 386. */
872 rtx realpart
, imagpart
;
873 enum machine_mode partmode
= GET_MODE_INNER (mode
);
875 realpart
= gen_reg_rtx (partmode
);
876 imagpart
= gen_reg_rtx (partmode
);
877 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
880 /* Make sure regno_pointer_align, and regno_reg_rtx are large
881 enough to have an element for this pseudo reg number. */
883 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
885 int old_size
= f
->emit
->regno_pointer_align_length
;
889 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
890 memset (new + old_size
, 0, old_size
);
891 f
->emit
->regno_pointer_align
= (unsigned char *) new;
893 new1
= (rtx
*) ggc_realloc (f
->emit
->x_regno_reg_rtx
,
894 old_size
* 2 * sizeof (rtx
));
895 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
896 regno_reg_rtx
= new1
;
898 f
->emit
->regno_pointer_align_length
= old_size
* 2;
901 val
= gen_raw_REG (mode
, reg_rtx_no
);
902 regno_reg_rtx
[reg_rtx_no
++] = val
;
906 /* Generate an register with same attributes as REG,
907 but offsetted by OFFSET. */
910 gen_rtx_REG_offset (reg
, mode
, regno
, offset
)
911 enum machine_mode mode
;
916 rtx
new = gen_rtx_REG (mode
, regno
);
917 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
918 REG_OFFSET (reg
) + offset
);
922 /* Set the decl for MEM to DECL. */
925 set_reg_attrs_from_mem (reg
, mem
)
929 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
931 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
934 /* Set the register attributes for registers contained in PARM_RTX.
935 Use needed values from memory attributes of MEM. */
938 set_reg_attrs_for_parm (parm_rtx
, mem
)
942 if (GET_CODE (parm_rtx
) == REG
)
943 set_reg_attrs_from_mem (parm_rtx
, mem
);
944 else if (GET_CODE (parm_rtx
) == PARALLEL
)
946 /* Check for a NULL entry in the first slot, used to indicate that the
947 parameter goes both on the stack and in registers. */
948 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
949 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
951 rtx x
= XVECEXP (parm_rtx
, 0, i
);
952 if (GET_CODE (XEXP (x
, 0)) == REG
)
953 REG_ATTRS (XEXP (x
, 0))
954 = get_reg_attrs (MEM_EXPR (mem
),
955 INTVAL (XEXP (x
, 1)));
960 /* Assign the RTX X to declaration T. */
966 DECL_CHECK (t
)->decl
.rtl
= x
;
970 /* For register, we maitain the reverse information too. */
971 if (GET_CODE (x
) == REG
)
972 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
973 else if (GET_CODE (x
) == SUBREG
)
974 REG_ATTRS (SUBREG_REG (x
))
975 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
976 if (GET_CODE (x
) == CONCAT
)
978 if (REG_P (XEXP (x
, 0)))
979 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
980 if (REG_P (XEXP (x
, 1)))
981 REG_ATTRS (XEXP (x
, 1))
982 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
984 if (GET_CODE (x
) == PARALLEL
)
987 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
989 rtx y
= XVECEXP (x
, 0, i
);
990 if (REG_P (XEXP (y
, 0)))
991 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
996 /* Identify REG (which may be a CONCAT) as a user register. */
1002 if (GET_CODE (reg
) == CONCAT
)
1004 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1005 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1007 else if (GET_CODE (reg
) == REG
)
1008 REG_USERVAR_P (reg
) = 1;
1013 /* Identify REG as a probable pointer register and show its alignment
1014 as ALIGN, if nonzero. */
1017 mark_reg_pointer (reg
, align
)
1021 if (! REG_POINTER (reg
))
1023 REG_POINTER (reg
) = 1;
1026 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1028 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1029 /* We can no-longer be sure just how aligned this pointer is */
1030 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1033 /* Return 1 plus largest pseudo reg number used in the current function. */
1041 /* Return 1 + the largest label number used so far in the current function. */
1046 if (last_label_num
&& label_num
== base_label_num
)
1047 return last_label_num
;
1051 /* Return first label number used in this function (if any were used). */
1054 get_first_label_num ()
1056 return first_label_num
;
1059 /* Return the final regno of X, which is a SUBREG of a hard
1062 subreg_hard_regno (x
, check_mode
)
1066 enum machine_mode mode
= GET_MODE (x
);
1067 unsigned int byte_offset
, base_regno
, final_regno
;
1068 rtx reg
= SUBREG_REG (x
);
1070 /* This is where we attempt to catch illegal subregs
1071 created by the compiler. */
1072 if (GET_CODE (x
) != SUBREG
1073 || GET_CODE (reg
) != REG
)
1075 base_regno
= REGNO (reg
);
1076 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
1078 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
1081 /* Catch non-congruent offsets too. */
1082 byte_offset
= SUBREG_BYTE (x
);
1083 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
1086 final_regno
= subreg_regno (x
);
1091 /* Return a value representing some low-order bits of X, where the number
1092 of low-order bits is given by MODE. Note that no conversion is done
1093 between floating-point and fixed-point values, rather, the bit
1094 representation is returned.
1096 This function handles the cases in common between gen_lowpart, below,
1097 and two variants in cse.c and combine.c. These are the cases that can
1098 be safely handled at all points in the compilation.
1100 If this is not a case we can handle, return 0. */
1103 gen_lowpart_common (mode
, x
)
1104 enum machine_mode mode
;
1107 int msize
= GET_MODE_SIZE (mode
);
1108 int xsize
= GET_MODE_SIZE (GET_MODE (x
));
1111 if (GET_MODE (x
) == mode
)
1114 /* MODE must occupy no more words than the mode of X. */
1115 if (GET_MODE (x
) != VOIDmode
1116 && ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1117 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
1120 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1121 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1122 && GET_MODE (x
) != VOIDmode
&& msize
> xsize
)
1125 offset
= subreg_lowpart_offset (mode
, GET_MODE (x
));
1127 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1128 && (GET_MODE_CLASS (mode
) == MODE_INT
1129 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1131 /* If we are getting the low-order part of something that has been
1132 sign- or zero-extended, we can either just use the object being
1133 extended or make a narrower extension. If we want an even smaller
1134 piece than the size of the object being extended, call ourselves
1137 This case is used mostly by combine and cse. */
1139 if (GET_MODE (XEXP (x
, 0)) == mode
)
1141 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1142 return gen_lowpart_common (mode
, XEXP (x
, 0));
1143 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
1144 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1146 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
1147 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
)
1148 return simplify_gen_subreg (mode
, x
, GET_MODE (x
), offset
);
1149 else if ((GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
1150 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
)
1151 && GET_MODE (x
) == VOIDmode
)
1152 return simplify_gen_subreg (mode
, x
, int_mode_for_mode (mode
), offset
);
1153 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1154 from the low-order part of the constant. */
1155 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1156 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1157 && GET_MODE (x
) == VOIDmode
1158 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
1160 /* If MODE is twice the host word size, X is already the desired
1161 representation. Otherwise, if MODE is wider than a word, we can't
1162 do this. If MODE is exactly a word, return just one CONST_INT. */
1164 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
1166 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
1168 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
1169 return (GET_CODE (x
) == CONST_INT
? x
1170 : GEN_INT (CONST_DOUBLE_LOW (x
)));
1173 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1174 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
1175 : CONST_DOUBLE_LOW (x
));
1177 /* Sign extend to HOST_WIDE_INT. */
1178 val
= trunc_int_for_mode (val
, mode
);
1180 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
1185 /* The floating-point emulator can handle all conversions between
1186 FP and integer operands. This simplifies reload because it
1187 doesn't have to deal with constructs like (subreg:DI
1188 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1189 /* Single-precision floats are always 32-bits and double-precision
1190 floats are always 64-bits. */
1192 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1193 && GET_MODE_BITSIZE (mode
) == 32
1194 && GET_CODE (x
) == CONST_INT
)
1197 long i
= INTVAL (x
);
1199 real_from_target (&r
, &i
, mode
);
1200 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1202 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1203 && GET_MODE_BITSIZE (mode
) == 64
1204 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
1205 && GET_MODE (x
) == VOIDmode
)
1208 HOST_WIDE_INT low
, high
;
1211 if (GET_CODE (x
) == CONST_INT
)
1214 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
1218 low
= CONST_DOUBLE_LOW (x
);
1219 high
= CONST_DOUBLE_HIGH (x
);
1222 if (HOST_BITS_PER_WIDE_INT
> 32)
1223 high
= low
>> 31 >> 1;
1225 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1227 if (WORDS_BIG_ENDIAN
)
1228 i
[0] = high
, i
[1] = low
;
1230 i
[0] = low
, i
[1] = high
;
1232 real_from_target (&r
, i
, mode
);
1233 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1235 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1236 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1237 && GET_CODE (x
) == CONST_DOUBLE
1238 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
1241 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
1242 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
1244 /* Convert 'r' into an array of four 32-bit words in target word
1246 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
1247 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
1250 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[3 * endian
]);
1253 i
[3 - 3 * endian
] = 0;
1256 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
+ 2 * endian
);
1257 i
[2 - 2 * endian
] = 0;
1258 i
[3 - 2 * endian
] = 0;
1261 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
1262 i
[3 - 3 * endian
] = 0;
1265 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
1270 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1272 #if HOST_BITS_PER_WIDE_INT == 32
1273 return immed_double_const (i
[3 * endian
], i
[1 + endian
], mode
);
1275 if (HOST_BITS_PER_WIDE_INT
!= 64)
1278 return immed_double_const ((((unsigned long) i
[3 * endian
])
1279 | ((HOST_WIDE_INT
) i
[1 + endian
] << 32)),
1280 (((unsigned long) i
[2 - endian
])
1281 | ((HOST_WIDE_INT
) i
[3 - 3 * endian
] << 32)),
1286 /* Otherwise, we can't do this. */
1290 /* Return the real part (which has mode MODE) of a complex value X.
1291 This always comes at the low address in memory. */
1294 gen_realpart (mode
, x
)
1295 enum machine_mode mode
;
1298 if (WORDS_BIG_ENDIAN
1299 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1301 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1303 ("can't access real part of complex value in hard register");
1304 else if (WORDS_BIG_ENDIAN
)
1305 return gen_highpart (mode
, x
);
1307 return gen_lowpart (mode
, x
);
1310 /* Return the imaginary part (which has mode MODE) of a complex value X.
1311 This always comes at the high address in memory. */
1314 gen_imagpart (mode
, x
)
1315 enum machine_mode mode
;
1318 if (WORDS_BIG_ENDIAN
)
1319 return gen_lowpart (mode
, x
);
1320 else if (! WORDS_BIG_ENDIAN
1321 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1323 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1325 ("can't access imaginary part of complex value in hard register");
1327 return gen_highpart (mode
, x
);
1330 /* Return 1 iff X, assumed to be a SUBREG,
1331 refers to the real part of the complex value in its containing reg.
1332 Complex values are always stored with the real part in the first word,
1333 regardless of WORDS_BIG_ENDIAN. */
1336 subreg_realpart_p (x
)
1339 if (GET_CODE (x
) != SUBREG
)
1342 return ((unsigned int) SUBREG_BYTE (x
)
1343 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1346 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1347 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1348 least-significant part of X.
1349 MODE specifies how big a part of X to return;
1350 it usually should not be larger than a word.
1351 If X is a MEM whose address is a QUEUED, the value may be so also. */
1354 gen_lowpart (mode
, x
)
1355 enum machine_mode mode
;
1358 rtx result
= gen_lowpart_common (mode
, x
);
1362 else if (GET_CODE (x
) == REG
)
1364 /* Must be a hard reg that's not valid in MODE. */
1365 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1370 else if (GET_CODE (x
) == MEM
)
1372 /* The only additional case we can do is MEM. */
1375 /* The following exposes the use of "x" to CSE. */
1376 if (GET_MODE_SIZE (GET_MODE (x
)) <= UNITS_PER_WORD
1377 && SCALAR_INT_MODE_P (GET_MODE (x
))
1378 && ! no_new_pseudos
)
1379 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1381 if (WORDS_BIG_ENDIAN
)
1382 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1383 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1385 if (BYTES_BIG_ENDIAN
)
1386 /* Adjust the address so that the address-after-the-data
1388 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1389 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1391 return adjust_address (x
, mode
, offset
);
1393 else if (GET_CODE (x
) == ADDRESSOF
)
1394 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1399 /* Like `gen_lowpart', but refer to the most significant part.
1400 This is used to access the imaginary part of a complex number. */
1403 gen_highpart (mode
, x
)
1404 enum machine_mode mode
;
1407 unsigned int msize
= GET_MODE_SIZE (mode
);
1410 /* This case loses if X is a subreg. To catch bugs early,
1411 complain if an invalid MODE is used even in other cases. */
1412 if (msize
> UNITS_PER_WORD
1413 && msize
!= GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1416 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1417 subreg_highpart_offset (mode
, GET_MODE (x
)));
1419 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1420 the target if we have a MEM. gen_highpart must return a valid operand,
1421 emitting code if necessary to do so. */
1422 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1423 result
= validize_mem (result
);
1430 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1431 be VOIDmode constant. */
1433 gen_highpart_mode (outermode
, innermode
, exp
)
1434 enum machine_mode outermode
, innermode
;
1437 if (GET_MODE (exp
) != VOIDmode
)
1439 if (GET_MODE (exp
) != innermode
)
1441 return gen_highpart (outermode
, exp
);
1443 return simplify_gen_subreg (outermode
, exp
, innermode
,
1444 subreg_highpart_offset (outermode
, innermode
));
1447 /* Return offset in bytes to get OUTERMODE low part
1448 of the value in mode INNERMODE stored in memory in target format. */
1451 subreg_lowpart_offset (outermode
, innermode
)
1452 enum machine_mode outermode
, innermode
;
1454 unsigned int offset
= 0;
1455 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1459 if (WORDS_BIG_ENDIAN
)
1460 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1461 if (BYTES_BIG_ENDIAN
)
1462 offset
+= difference
% UNITS_PER_WORD
;
1468 /* Return offset in bytes to get OUTERMODE high part
1469 of the value in mode INNERMODE stored in memory in target format. */
1471 subreg_highpart_offset (outermode
, innermode
)
1472 enum machine_mode outermode
, innermode
;
1474 unsigned int offset
= 0;
1475 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1477 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1482 if (! WORDS_BIG_ENDIAN
)
1483 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1484 if (! BYTES_BIG_ENDIAN
)
1485 offset
+= difference
% UNITS_PER_WORD
;
1491 /* Return 1 iff X, assumed to be a SUBREG,
1492 refers to the least significant part of its containing reg.
1493 If X is not a SUBREG, always return 1 (it is its own low part!). */
1496 subreg_lowpart_p (x
)
1499 if (GET_CODE (x
) != SUBREG
)
1501 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1504 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1505 == SUBREG_BYTE (x
));
1509 /* Helper routine for all the constant cases of operand_subword.
1510 Some places invoke this directly. */
1513 constant_subword (op
, offset
, mode
)
1516 enum machine_mode mode
;
1518 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1521 /* If OP is already an integer word, return it. */
1522 if (GET_MODE_CLASS (mode
) == MODE_INT
1523 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1526 /* The output is some bits, the width of the target machine's word.
1527 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1529 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1530 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1531 && GET_MODE_BITSIZE (mode
) == 64
1532 && GET_CODE (op
) == CONST_DOUBLE
)
1537 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1538 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1540 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1541 which the words are written depends on the word endianness.
1542 ??? This is a potential portability problem and should
1543 be fixed at some point.
1545 We must exercise caution with the sign bit. By definition there
1546 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1547 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1548 So we explicitly mask and sign-extend as necessary. */
1549 if (BITS_PER_WORD
== 32)
1552 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1553 return GEN_INT (val
);
1555 #if HOST_BITS_PER_WIDE_INT >= 64
1556 else if (BITS_PER_WORD
>= 64 && offset
== 0)
1558 val
= k
[! WORDS_BIG_ENDIAN
];
1559 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1560 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1561 return GEN_INT (val
);
1564 else if (BITS_PER_WORD
== 16)
1566 val
= k
[offset
>> 1];
1567 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1569 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1570 return GEN_INT (val
);
1575 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1576 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1577 && GET_MODE_BITSIZE (mode
) > 64
1578 && GET_CODE (op
) == CONST_DOUBLE
)
1583 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1584 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1586 if (BITS_PER_WORD
== 32)
1589 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1590 return GEN_INT (val
);
1592 #if HOST_BITS_PER_WIDE_INT >= 64
1593 else if (BITS_PER_WORD
>= 64 && offset
<= 1)
1595 val
= k
[offset
* 2 + ! WORDS_BIG_ENDIAN
];
1596 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1597 val
|= (HOST_WIDE_INT
) k
[offset
* 2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1598 return GEN_INT (val
);
1605 /* Single word float is a little harder, since single- and double-word
1606 values often do not have the same high-order bits. We have already
1607 verified that we want the only defined word of the single-word value. */
1608 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1609 && GET_MODE_BITSIZE (mode
) == 32
1610 && GET_CODE (op
) == CONST_DOUBLE
)
1615 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1616 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1618 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1620 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1622 if (BITS_PER_WORD
== 16)
1624 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1626 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1629 return GEN_INT (val
);
1632 /* The only remaining cases that we can handle are integers.
1633 Convert to proper endianness now since these cases need it.
1634 At this point, offset == 0 means the low-order word.
1636 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1637 in general. However, if OP is (const_int 0), we can just return
1640 if (op
== const0_rtx
)
1643 if (GET_MODE_CLASS (mode
) != MODE_INT
1644 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1645 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1648 if (WORDS_BIG_ENDIAN
)
1649 offset
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - offset
;
1651 /* Find out which word on the host machine this value is in and get
1652 it from the constant. */
1653 val
= (offset
/ size_ratio
== 0
1654 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1655 : (GET_CODE (op
) == CONST_INT
1656 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1658 /* Get the value we want into the low bits of val. */
1659 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1660 val
= ((val
>> ((offset
% size_ratio
) * BITS_PER_WORD
)));
1662 val
= trunc_int_for_mode (val
, word_mode
);
1664 return GEN_INT (val
);
1667 /* Return subword OFFSET of operand OP.
1668 The word number, OFFSET, is interpreted as the word number starting
1669 at the low-order address. OFFSET 0 is the low-order word if not
1670 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1672 If we cannot extract the required word, we return zero. Otherwise,
1673 an rtx corresponding to the requested word will be returned.
1675 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1676 reload has completed, a valid address will always be returned. After
1677 reload, if a valid address cannot be returned, we return zero.
1679 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1680 it is the responsibility of the caller.
1682 MODE is the mode of OP in case it is a CONST_INT.
1684 ??? This is still rather broken for some cases. The problem for the
1685 moment is that all callers of this thing provide no 'goal mode' to
1686 tell us to work with. This exists because all callers were written
1687 in a word based SUBREG world.
1688 Now use of this function can be deprecated by simplify_subreg in most
1693 operand_subword (op
, offset
, validate_address
, mode
)
1695 unsigned int offset
;
1696 int validate_address
;
1697 enum machine_mode mode
;
1699 if (mode
== VOIDmode
)
1700 mode
= GET_MODE (op
);
1702 if (mode
== VOIDmode
)
1705 /* If OP is narrower than a word, fail. */
1707 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1710 /* If we want a word outside OP, return zero. */
1712 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1715 /* Form a new MEM at the requested address. */
1716 if (GET_CODE (op
) == MEM
)
1718 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1720 if (! validate_address
)
1723 else if (reload_completed
)
1725 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1729 return replace_equiv_address (new, XEXP (new, 0));
1732 /* Rest can be handled by simplify_subreg. */
1733 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1736 /* Similar to `operand_subword', but never return 0. If we can't extract
1737 the required subword, put OP into a register and try again. If that fails,
1738 abort. We always validate the address in this case.
1740 MODE is the mode of OP, in case it is CONST_INT. */
1743 operand_subword_force (op
, offset
, mode
)
1745 unsigned int offset
;
1746 enum machine_mode mode
;
1748 rtx result
= operand_subword (op
, offset
, 1, mode
);
1753 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1755 /* If this is a register which can not be accessed by words, copy it
1756 to a pseudo register. */
1757 if (GET_CODE (op
) == REG
)
1758 op
= copy_to_reg (op
);
1760 op
= force_reg (mode
, op
);
1763 result
= operand_subword (op
, offset
, 1, mode
);
1770 /* Given a compare instruction, swap the operands.
1771 A test instruction is changed into a compare of 0 against the operand. */
1774 reverse_comparison (insn
)
1777 rtx body
= PATTERN (insn
);
1780 if (GET_CODE (body
) == SET
)
1781 comp
= SET_SRC (body
);
1783 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1785 if (GET_CODE (comp
) == COMPARE
)
1787 rtx op0
= XEXP (comp
, 0);
1788 rtx op1
= XEXP (comp
, 1);
1789 XEXP (comp
, 0) = op1
;
1790 XEXP (comp
, 1) = op0
;
1794 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1795 CONST0_RTX (GET_MODE (comp
)), comp
);
1796 if (GET_CODE (body
) == SET
)
1797 SET_SRC (body
) = new;
1799 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1803 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1804 or (2) a component ref of something variable. Represent the later with
1805 a NULL expression. */
1808 component_ref_for_mem_expr (ref
)
1811 tree inner
= TREE_OPERAND (ref
, 0);
1813 if (TREE_CODE (inner
) == COMPONENT_REF
)
1814 inner
= component_ref_for_mem_expr (inner
);
1817 tree placeholder_ptr
= 0;
1819 /* Now remove any conversions: they don't change what the underlying
1820 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1821 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1822 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1823 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1824 || TREE_CODE (inner
) == SAVE_EXPR
1825 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1826 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1827 inner
= find_placeholder (inner
, &placeholder_ptr
);
1829 inner
= TREE_OPERAND (inner
, 0);
1831 if (! DECL_P (inner
))
1835 if (inner
== TREE_OPERAND (ref
, 0))
1838 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1839 TREE_OPERAND (ref
, 1));
1842 /* Given REF, a MEM, and T, either the type of X or the expression
1843 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1844 if we are making a new object of this type. BITPOS is nonzero if
1845 there is an offset outstanding on T that will be applied later. */
1848 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, bitpos
)
1852 HOST_WIDE_INT bitpos
;
1854 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1855 tree expr
= MEM_EXPR (ref
);
1856 rtx offset
= MEM_OFFSET (ref
);
1857 rtx size
= MEM_SIZE (ref
);
1858 unsigned int align
= MEM_ALIGN (ref
);
1859 HOST_WIDE_INT apply_bitpos
= 0;
1862 /* It can happen that type_for_mode was given a mode for which there
1863 is no language-level type. In which case it returns NULL, which
1868 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1870 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1871 wrong answer, as it assumes that DECL_RTL already has the right alias
1872 info. Callers should not set DECL_RTL until after the call to
1873 set_mem_attributes. */
1874 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1877 /* Get the alias set from the expression or type (perhaps using a
1878 front-end routine) and use it. */
1879 alias
= get_alias_set (t
);
1881 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1882 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1883 RTX_UNCHANGING_P (ref
)
1884 |= ((lang_hooks
.honor_readonly
1885 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1886 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1888 /* If we are making an object of this type, or if this is a DECL, we know
1889 that it is a scalar if the type is not an aggregate. */
1890 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1891 MEM_SCALAR_P (ref
) = 1;
1893 /* We can set the alignment from the type if we are making an object,
1894 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1895 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1896 align
= MAX (align
, TYPE_ALIGN (type
));
1898 /* If the size is known, we can set that. */
1899 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1900 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1902 /* If T is not a type, we may be able to deduce some more information about
1906 maybe_set_unchanging (ref
, t
);
1907 if (TREE_THIS_VOLATILE (t
))
1908 MEM_VOLATILE_P (ref
) = 1;
1910 /* Now remove any conversions: they don't change what the underlying
1911 object is. Likewise for SAVE_EXPR. */
1912 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1913 || TREE_CODE (t
) == NON_LVALUE_EXPR
1914 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1915 || TREE_CODE (t
) == SAVE_EXPR
)
1916 t
= TREE_OPERAND (t
, 0);
1918 /* If this expression can't be addressed (e.g., it contains a reference
1919 to a non-addressable field), show we don't change its alias set. */
1920 if (! can_address_p (t
))
1921 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1923 /* If this is a decl, set the attributes of the MEM from it. */
1927 offset
= const0_rtx
;
1928 apply_bitpos
= bitpos
;
1929 size
= (DECL_SIZE_UNIT (t
)
1930 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1931 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1932 align
= DECL_ALIGN (t
);
1935 /* If this is a constant, we know the alignment. */
1936 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1938 align
= TYPE_ALIGN (type
);
1939 #ifdef CONSTANT_ALIGNMENT
1940 align
= CONSTANT_ALIGNMENT (t
, align
);
1944 /* If this is a field reference and not a bit-field, record it. */
1945 /* ??? There is some information that can be gleened from bit-fields,
1946 such as the word offset in the structure that might be modified.
1947 But skip it for now. */
1948 else if (TREE_CODE (t
) == COMPONENT_REF
1949 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1951 expr
= component_ref_for_mem_expr (t
);
1952 offset
= const0_rtx
;
1953 apply_bitpos
= bitpos
;
1954 /* ??? Any reason the field size would be different than
1955 the size we got from the type? */
1958 /* If this is an array reference, look for an outer field reference. */
1959 else if (TREE_CODE (t
) == ARRAY_REF
)
1961 tree off_tree
= size_zero_node
;
1965 tree index
= TREE_OPERAND (t
, 1);
1966 tree array
= TREE_OPERAND (t
, 0);
1967 tree domain
= TYPE_DOMAIN (TREE_TYPE (array
));
1968 tree low_bound
= (domain
? TYPE_MIN_VALUE (domain
) : 0);
1969 tree unit_size
= TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array
)));
1971 /* We assume all arrays have sizes that are a multiple of a byte.
1972 First subtract the lower bound, if any, in the type of the
1973 index, then convert to sizetype and multiply by the size of the
1975 if (low_bound
!= 0 && ! integer_zerop (low_bound
))
1976 index
= fold (build (MINUS_EXPR
, TREE_TYPE (index
),
1979 /* If the index has a self-referential type, pass it to a
1980 WITH_RECORD_EXPR; if the component size is, pass our
1981 component to one. */
1982 if (! TREE_CONSTANT (index
)
1983 && contains_placeholder_p (index
))
1984 index
= build (WITH_RECORD_EXPR
, TREE_TYPE (index
), index
, t
);
1985 if (! TREE_CONSTANT (unit_size
)
1986 && contains_placeholder_p (unit_size
))
1987 unit_size
= build (WITH_RECORD_EXPR
, sizetype
,
1991 = fold (build (PLUS_EXPR
, sizetype
,
1992 fold (build (MULT_EXPR
, sizetype
,
1996 t
= TREE_OPERAND (t
, 0);
1998 while (TREE_CODE (t
) == ARRAY_REF
);
2004 if (host_integerp (off_tree
, 1))
2006 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
2007 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
2008 align
= DECL_ALIGN (t
);
2009 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
2011 offset
= GEN_INT (ioff
);
2012 apply_bitpos
= bitpos
;
2015 else if (TREE_CODE (t
) == COMPONENT_REF
)
2017 expr
= component_ref_for_mem_expr (t
);
2018 if (host_integerp (off_tree
, 1))
2020 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
2021 apply_bitpos
= bitpos
;
2023 /* ??? Any reason the field size would be different than
2024 the size we got from the type? */
2026 else if (flag_argument_noalias
> 1
2027 && TREE_CODE (t
) == INDIRECT_REF
2028 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
2035 /* If this is a Fortran indirect argument reference, record the
2037 else if (flag_argument_noalias
> 1
2038 && TREE_CODE (t
) == INDIRECT_REF
2039 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
2046 /* If we modified OFFSET based on T, then subtract the outstanding
2047 bit position offset. Similarly, increase the size of the accessed
2048 object to contain the negative offset. */
2051 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
2053 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
2056 /* Now set the attributes we computed above. */
2058 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
2060 /* If this is already known to be a scalar or aggregate, we are done. */
2061 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
2064 /* If it is a reference into an aggregate, this is part of an aggregate.
2065 Otherwise we don't know. */
2066 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
2067 || TREE_CODE (t
) == ARRAY_RANGE_REF
2068 || TREE_CODE (t
) == BIT_FIELD_REF
)
2069 MEM_IN_STRUCT_P (ref
) = 1;
2073 set_mem_attributes (ref
, t
, objectp
)
2078 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
2081 /* Set the decl for MEM to DECL. */
2084 set_mem_attrs_from_reg (mem
, reg
)
2089 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
2090 GEN_INT (REG_OFFSET (reg
)),
2091 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
2094 /* Set the alias set of MEM to SET. */
2097 set_mem_alias_set (mem
, set
)
2101 #ifdef ENABLE_CHECKING
2102 /* If the new and old alias sets don't conflict, something is wrong. */
2103 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
2107 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
2108 MEM_SIZE (mem
), MEM_ALIGN (mem
),
2112 /* Set the alignment of MEM to ALIGN bits. */
2115 set_mem_align (mem
, align
)
2119 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
2120 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
2124 /* Set the expr for MEM to EXPR. */
2127 set_mem_expr (mem
, expr
)
2132 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
2133 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
2136 /* Set the offset of MEM to OFFSET. */
2139 set_mem_offset (mem
, offset
)
2142 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
2143 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
2147 /* Set the size of MEM to SIZE. */
2150 set_mem_size (mem
, size
)
2153 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
2154 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
2158 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2159 and its address changed to ADDR. (VOIDmode means don't change the mode.
2160 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2161 returned memory location is required to be valid. The memory
2162 attributes are not changed. */
2165 change_address_1 (memref
, mode
, addr
, validate
)
2167 enum machine_mode mode
;
2173 if (GET_CODE (memref
) != MEM
)
2175 if (mode
== VOIDmode
)
2176 mode
= GET_MODE (memref
);
2178 addr
= XEXP (memref
, 0);
2182 if (reload_in_progress
|| reload_completed
)
2184 if (! memory_address_p (mode
, addr
))
2188 addr
= memory_address (mode
, addr
);
2191 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2194 new = gen_rtx_MEM (mode
, addr
);
2195 MEM_COPY_ATTRIBUTES (new, memref
);
2199 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2200 way we are changing MEMREF, so we only preserve the alias set. */
2203 change_address (memref
, mode
, addr
)
2205 enum machine_mode mode
;
2208 rtx
new = change_address_1 (memref
, mode
, addr
, 1);
2209 enum machine_mode mmode
= GET_MODE (new);
2212 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0,
2213 mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
)),
2214 (mmode
== BLKmode
? BITS_PER_UNIT
2215 : GET_MODE_ALIGNMENT (mmode
)),
2221 /* Return a memory reference like MEMREF, but with its mode changed
2222 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2223 nonzero, the memory address is forced to be valid.
2224 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2225 and caller is responsible for adjusting MEMREF base register. */
2228 adjust_address_1 (memref
, mode
, offset
, validate
, adjust
)
2230 enum machine_mode mode
;
2231 HOST_WIDE_INT offset
;
2232 int validate
, adjust
;
2234 rtx addr
= XEXP (memref
, 0);
2236 rtx memoffset
= MEM_OFFSET (memref
);
2238 unsigned int memalign
= MEM_ALIGN (memref
);
2240 /* ??? Prefer to create garbage instead of creating shared rtl.
2241 This may happen even if offset is nonzero -- consider
2242 (plus (plus reg reg) const_int) -- so do this always. */
2243 addr
= copy_rtx (addr
);
2247 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2248 object, we can merge it into the LO_SUM. */
2249 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2251 && (unsigned HOST_WIDE_INT
) offset
2252 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2253 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
2254 plus_constant (XEXP (addr
, 1), offset
));
2256 addr
= plus_constant (addr
, offset
);
2259 new = change_address_1 (memref
, mode
, addr
, validate
);
2261 /* Compute the new values of the memory attributes due to this adjustment.
2262 We add the offsets and update the alignment. */
2264 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
2266 /* Compute the new alignment by taking the MIN of the alignment and the
2267 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2272 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
2274 /* We can compute the size in a number of ways. */
2275 if (GET_MODE (new) != BLKmode
)
2276 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2277 else if (MEM_SIZE (memref
))
2278 size
= plus_constant (MEM_SIZE (memref
), -offset
);
2280 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
2281 memoffset
, size
, memalign
, GET_MODE (new));
2283 /* At some point, we should validate that this offset is within the object,
2284 if all the appropriate values are known. */
2288 /* Return a memory reference like MEMREF, but with its mode changed
2289 to MODE and its address changed to ADDR, which is assumed to be
2290 MEMREF offseted by OFFSET bytes. If VALIDATE is
2291 nonzero, the memory address is forced to be valid. */
2294 adjust_automodify_address_1 (memref
, mode
, addr
, offset
, validate
)
2296 enum machine_mode mode
;
2298 HOST_WIDE_INT offset
;
2301 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2302 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2305 /* Return a memory reference like MEMREF, but whose address is changed by
2306 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2307 known to be in OFFSET (possibly 1). */
2310 offset_address (memref
, offset
, pow2
)
2315 rtx
new, addr
= XEXP (memref
, 0);
2317 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2319 /* At this point we don't know _why_ the address is invalid. It
2320 could have secondary memory refereces, multiplies or anything.
2322 However, if we did go and rearrange things, we can wind up not
2323 being able to recognize the magic around pic_offset_table_rtx.
2324 This stuff is fragile, and is yet another example of why it is
2325 bad to expose PIC machinery too early. */
2326 if (! memory_address_p (GET_MODE (memref
), new)
2327 && GET_CODE (addr
) == PLUS
2328 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2330 addr
= force_reg (GET_MODE (addr
), addr
);
2331 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2334 update_temp_slot_address (XEXP (memref
, 0), new);
2335 new = change_address_1 (memref
, VOIDmode
, new, 1);
2337 /* Update the alignment to reflect the offset. Reset the offset, which
2340 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2341 MIN (MEM_ALIGN (memref
),
2342 (unsigned HOST_WIDE_INT
) pow2
* BITS_PER_UNIT
),
2347 /* Return a memory reference like MEMREF, but with its address changed to
2348 ADDR. The caller is asserting that the actual piece of memory pointed
2349 to is the same, just the form of the address is being changed, such as
2350 by putting something into a register. */
2353 replace_equiv_address (memref
, addr
)
2357 /* change_address_1 copies the memory attribute structure without change
2358 and that's exactly what we want here. */
2359 update_temp_slot_address (XEXP (memref
, 0), addr
);
2360 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2363 /* Likewise, but the reference is not required to be valid. */
2366 replace_equiv_address_nv (memref
, addr
)
2370 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2373 /* Return a memory reference like MEMREF, but with its mode widened to
2374 MODE and offset by OFFSET. This would be used by targets that e.g.
2375 cannot issue QImode memory operations and have to use SImode memory
2376 operations plus masking logic. */
2379 widen_memory_access (memref
, mode
, offset
)
2381 enum machine_mode mode
;
2382 HOST_WIDE_INT offset
;
2384 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2385 tree expr
= MEM_EXPR (new);
2386 rtx memoffset
= MEM_OFFSET (new);
2387 unsigned int size
= GET_MODE_SIZE (mode
);
2389 /* If we don't know what offset we were at within the expression, then
2390 we can't know if we've overstepped the bounds. */
2396 if (TREE_CODE (expr
) == COMPONENT_REF
)
2398 tree field
= TREE_OPERAND (expr
, 1);
2400 if (! DECL_SIZE_UNIT (field
))
2406 /* Is the field at least as large as the access? If so, ok,
2407 otherwise strip back to the containing structure. */
2408 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2409 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2410 && INTVAL (memoffset
) >= 0)
2413 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2419 expr
= TREE_OPERAND (expr
, 0);
2420 memoffset
= (GEN_INT (INTVAL (memoffset
)
2421 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2422 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2425 /* Similarly for the decl. */
2426 else if (DECL_P (expr
)
2427 && DECL_SIZE_UNIT (expr
)
2428 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2429 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2430 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2434 /* The widened memory access overflows the expression, which means
2435 that it could alias another expression. Zap it. */
2442 memoffset
= NULL_RTX
;
2444 /* The widened memory may alias other stuff, so zap the alias set. */
2445 /* ??? Maybe use get_alias_set on any remaining expression. */
2447 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2448 MEM_ALIGN (new), mode
);
2453 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2458 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2459 NULL
, label_num
++, NULL
);
2462 /* For procedure integration. */
2464 /* Install new pointers to the first and last insns in the chain.
2465 Also, set cur_insn_uid to one higher than the last in use.
2466 Used for an inline-procedure after copying the insn chain. */
2469 set_new_first_and_last_insn (first
, last
)
2478 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2479 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2484 /* Set the range of label numbers found in the current function.
2485 This is used when belatedly compiling an inline function. */
2488 set_new_first_and_last_label_num (first
, last
)
2491 base_label_num
= label_num
;
2492 first_label_num
= first
;
2493 last_label_num
= last
;
2496 /* Set the last label number found in the current function.
2497 This is used when belatedly compiling an inline function. */
2500 set_new_last_label_num (last
)
2503 base_label_num
= label_num
;
2504 last_label_num
= last
;
2507 /* Restore all variables describing the current status from the structure *P.
2508 This is used after a nested function. */
2511 restore_emit_status (p
)
2512 struct function
*p ATTRIBUTE_UNUSED
;
2517 /* Go through all the RTL insn bodies and copy any invalid shared
2518 structure. This routine should only be called once. */
2521 unshare_all_rtl (fndecl
, insn
)
2527 /* Make sure that virtual parameters are not shared. */
2528 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2529 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2531 /* Make sure that virtual stack slots are not shared. */
2532 unshare_all_decls (DECL_INITIAL (fndecl
));
2534 /* Unshare just about everything else. */
2535 unshare_all_rtl_1 (insn
);
2537 /* Make sure the addresses of stack slots found outside the insn chain
2538 (such as, in DECL_RTL of a variable) are not shared
2539 with the insn chain.
2541 This special care is necessary when the stack slot MEM does not
2542 actually appear in the insn chain. If it does appear, its address
2543 is unshared from all else at that point. */
2544 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2547 /* Go through all the RTL insn bodies and copy any invalid shared
2548 structure, again. This is a fairly expensive thing to do so it
2549 should be done sparingly. */
2552 unshare_all_rtl_again (insn
)
2558 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2561 reset_used_flags (PATTERN (p
));
2562 reset_used_flags (REG_NOTES (p
));
2563 reset_used_flags (LOG_LINKS (p
));
2566 /* Make sure that virtual stack slots are not shared. */
2567 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2569 /* Make sure that virtual parameters are not shared. */
2570 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2571 reset_used_flags (DECL_RTL (decl
));
2573 reset_used_flags (stack_slot_list
);
2575 unshare_all_rtl (cfun
->decl
, insn
);
2578 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2579 Assumes the mark bits are cleared at entry. */
2582 unshare_all_rtl_1 (insn
)
2585 for (; insn
; insn
= NEXT_INSN (insn
))
2588 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2589 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2590 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2594 /* Go through all virtual stack slots of a function and copy any
2595 shared structure. */
2597 unshare_all_decls (blk
)
2602 /* Copy shared decls. */
2603 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2604 if (DECL_RTL_SET_P (t
))
2605 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2607 /* Now process sub-blocks. */
2608 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2609 unshare_all_decls (t
);
2612 /* Go through all virtual stack slots of a function and mark them as
2615 reset_used_decls (blk
)
2621 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2622 if (DECL_RTL_SET_P (t
))
2623 reset_used_flags (DECL_RTL (t
));
2625 /* Now process sub-blocks. */
2626 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2627 reset_used_decls (t
);
2630 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2631 placed in the result directly, rather than being copied. MAY_SHARE is
2632 either a MEM of an EXPR_LIST of MEMs. */
2635 copy_most_rtx (orig
, may_share
)
2642 const char *format_ptr
;
2644 if (orig
== may_share
2645 || (GET_CODE (may_share
) == EXPR_LIST
2646 && in_expr_list_p (may_share
, orig
)))
2649 code
= GET_CODE (orig
);
2667 copy
= rtx_alloc (code
);
2668 PUT_MODE (copy
, GET_MODE (orig
));
2669 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2670 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2671 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2672 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2673 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2675 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2677 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2679 switch (*format_ptr
++)
2682 XEXP (copy
, i
) = XEXP (orig
, i
);
2683 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2684 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2688 XEXP (copy
, i
) = XEXP (orig
, i
);
2693 XVEC (copy
, i
) = XVEC (orig
, i
);
2694 if (XVEC (orig
, i
) != NULL
)
2696 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2697 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2698 XVECEXP (copy
, i
, j
)
2699 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2704 XWINT (copy
, i
) = XWINT (orig
, i
);
2709 XINT (copy
, i
) = XINT (orig
, i
);
2713 XTREE (copy
, i
) = XTREE (orig
, i
);
2718 XSTR (copy
, i
) = XSTR (orig
, i
);
2722 /* Copy this through the wide int field; that's safest. */
2723 X0WINT (copy
, i
) = X0WINT (orig
, i
);
2733 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2734 Recursively does the same for subexpressions. */
2737 copy_rtx_if_shared (orig
)
2743 const char *format_ptr
;
2749 code
= GET_CODE (x
);
2751 /* These types may be freely shared. */
2765 /* SCRATCH must be shared because they represent distinct values. */
2769 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2770 a LABEL_REF, it isn't sharable. */
2771 if (GET_CODE (XEXP (x
, 0)) == PLUS
2772 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2773 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2782 /* The chain of insns is not being copied. */
2786 /* A MEM is allowed to be shared if its address is constant.
2788 We used to allow sharing of MEMs which referenced
2789 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2790 that can lose. instantiate_virtual_regs will not unshare
2791 the MEMs, and combine may change the structure of the address
2792 because it looks safe and profitable in one context, but
2793 in some other context it creates unrecognizable RTL. */
2794 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
2803 /* This rtx may not be shared. If it has already been seen,
2804 replace it with a copy of itself. */
2806 if (RTX_FLAG (x
, used
))
2810 copy
= rtx_alloc (code
);
2812 (sizeof (*copy
) - sizeof (copy
->fld
)
2813 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
2817 RTX_FLAG (x
, used
) = 1;
2819 /* Now scan the subexpressions recursively.
2820 We can store any replaced subexpressions directly into X
2821 since we know X is not shared! Any vectors in X
2822 must be copied if X was copied. */
2824 format_ptr
= GET_RTX_FORMAT (code
);
2826 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2828 switch (*format_ptr
++)
2831 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
2835 if (XVEC (x
, i
) != NULL
)
2838 int len
= XVECLEN (x
, i
);
2840 if (copied
&& len
> 0)
2841 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2842 for (j
= 0; j
< len
; j
++)
2843 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
2851 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2852 to look for shared sub-parts. */
2855 reset_used_flags (x
)
2860 const char *format_ptr
;
2865 code
= GET_CODE (x
);
2867 /* These types may be freely shared so we needn't do any resetting
2889 /* The chain of insns is not being copied. */
2896 RTX_FLAG (x
, used
) = 0;
2898 format_ptr
= GET_RTX_FORMAT (code
);
2899 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2901 switch (*format_ptr
++)
2904 reset_used_flags (XEXP (x
, i
));
2908 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2909 reset_used_flags (XVECEXP (x
, i
, j
));
2915 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2916 Return X or the rtx for the pseudo reg the value of X was copied into.
2917 OTHER must be valid as a SET_DEST. */
2920 make_safe_from (x
, other
)
2924 switch (GET_CODE (other
))
2927 other
= SUBREG_REG (other
);
2929 case STRICT_LOW_PART
:
2932 other
= XEXP (other
, 0);
2938 if ((GET_CODE (other
) == MEM
2940 && GET_CODE (x
) != REG
2941 && GET_CODE (x
) != SUBREG
)
2942 || (GET_CODE (other
) == REG
2943 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2944 || reg_mentioned_p (other
, x
))))
2946 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2947 emit_move_insn (temp
, x
);
2953 /* Emission of insns (adding them to the doubly-linked list). */
2955 /* Return the first insn of the current sequence or current function. */
2963 /* Specify a new insn as the first in the chain. */
2966 set_first_insn (insn
)
2969 if (PREV_INSN (insn
) != 0)
2974 /* Return the last insn emitted in current sequence or current function. */
2982 /* Specify a new insn as the last in the chain. */
2985 set_last_insn (insn
)
2988 if (NEXT_INSN (insn
) != 0)
2993 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2996 get_last_insn_anywhere ()
2998 struct sequence_stack
*stack
;
3001 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3002 if (stack
->last
!= 0)
3007 /* Return the first nonnote insn emitted in current sequence or current
3008 function. This routine looks inside SEQUENCEs. */
3011 get_first_nonnote_insn ()
3013 rtx insn
= first_insn
;
3017 insn
= next_insn (insn
);
3018 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3025 /* Return the last nonnote insn emitted in current sequence or current
3026 function. This routine looks inside SEQUENCEs. */
3029 get_last_nonnote_insn ()
3031 rtx insn
= last_insn
;
3035 insn
= previous_insn (insn
);
3036 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3043 /* Return a number larger than any instruction's uid in this function. */
3048 return cur_insn_uid
;
3051 /* Renumber instructions so that no instruction UIDs are wasted. */
3054 renumber_insns (stream
)
3059 /* If we're not supposed to renumber instructions, don't. */
3060 if (!flag_renumber_insns
)
3063 /* If there aren't that many instructions, then it's not really
3064 worth renumbering them. */
3065 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
3070 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3073 fprintf (stream
, "Renumbering insn %d to %d\n",
3074 INSN_UID (insn
), cur_insn_uid
);
3075 INSN_UID (insn
) = cur_insn_uid
++;
3079 /* Return the next insn. If it is a SEQUENCE, return the first insn
3088 insn
= NEXT_INSN (insn
);
3089 if (insn
&& GET_CODE (insn
) == INSN
3090 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3091 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3097 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3101 previous_insn (insn
)
3106 insn
= PREV_INSN (insn
);
3107 if (insn
&& GET_CODE (insn
) == INSN
3108 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3109 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3115 /* Return the next insn after INSN that is not a NOTE. This routine does not
3116 look inside SEQUENCEs. */
3119 next_nonnote_insn (insn
)
3124 insn
= NEXT_INSN (insn
);
3125 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3132 /* Return the previous insn before INSN that is not a NOTE. This routine does
3133 not look inside SEQUENCEs. */
3136 prev_nonnote_insn (insn
)
3141 insn
= PREV_INSN (insn
);
3142 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3149 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3150 or 0, if there is none. This routine does not look inside
3154 next_real_insn (insn
)
3159 insn
= NEXT_INSN (insn
);
3160 if (insn
== 0 || GET_CODE (insn
) == INSN
3161 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
3168 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3169 or 0, if there is none. This routine does not look inside
3173 prev_real_insn (insn
)
3178 insn
= PREV_INSN (insn
);
3179 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
3180 || GET_CODE (insn
) == JUMP_INSN
)
3187 /* Find the next insn after INSN that really does something. This routine
3188 does not look inside SEQUENCEs. Until reload has completed, this is the
3189 same as next_real_insn. */
3192 active_insn_p (insn
)
3195 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
3196 || (GET_CODE (insn
) == INSN
3197 && (! reload_completed
3198 || (GET_CODE (PATTERN (insn
)) != USE
3199 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3203 next_active_insn (insn
)
3208 insn
= NEXT_INSN (insn
);
3209 if (insn
== 0 || active_insn_p (insn
))
3216 /* Find the last insn before INSN that really does something. This routine
3217 does not look inside SEQUENCEs. Until reload has completed, this is the
3218 same as prev_real_insn. */
3221 prev_active_insn (insn
)
3226 insn
= PREV_INSN (insn
);
3227 if (insn
== 0 || active_insn_p (insn
))
3234 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3242 insn
= NEXT_INSN (insn
);
3243 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3250 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3258 insn
= PREV_INSN (insn
);
3259 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3267 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3268 and REG_CC_USER notes so we can find it. */
3271 link_cc0_insns (insn
)
3274 rtx user
= next_nonnote_insn (insn
);
3276 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3277 user
= XVECEXP (PATTERN (user
), 0, 0);
3279 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3281 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3284 /* Return the next insn that uses CC0 after INSN, which is assumed to
3285 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3286 applied to the result of this function should yield INSN).
3288 Normally, this is simply the next insn. However, if a REG_CC_USER note
3289 is present, it contains the insn that uses CC0.
3291 Return 0 if we can't find the insn. */
3294 next_cc0_user (insn
)
3297 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3300 return XEXP (note
, 0);
3302 insn
= next_nonnote_insn (insn
);
3303 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3304 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3306 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3312 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3313 note, it is the previous insn. */
3316 prev_cc0_setter (insn
)
3319 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3322 return XEXP (note
, 0);
3324 insn
= prev_nonnote_insn (insn
);
3325 if (! sets_cc0_p (PATTERN (insn
)))
3332 /* Increment the label uses for all labels present in rtx. */
3335 mark_label_nuses (x
)
3342 code
= GET_CODE (x
);
3343 if (code
== LABEL_REF
)
3344 LABEL_NUSES (XEXP (x
, 0))++;
3346 fmt
= GET_RTX_FORMAT (code
);
3347 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3350 mark_label_nuses (XEXP (x
, i
));
3351 else if (fmt
[i
] == 'E')
3352 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3353 mark_label_nuses (XVECEXP (x
, i
, j
));
3358 /* Try splitting insns that can be split for better scheduling.
3359 PAT is the pattern which might split.
3360 TRIAL is the insn providing PAT.
3361 LAST is nonzero if we should return the last insn of the sequence produced.
3363 If this routine succeeds in splitting, it returns the first or last
3364 replacement insn depending on the value of LAST. Otherwise, it
3365 returns TRIAL. If the insn to be returned can be split, it will be. */
3368 try_split (pat
, trial
, last
)
3372 rtx before
= PREV_INSN (trial
);
3373 rtx after
= NEXT_INSN (trial
);
3374 int has_barrier
= 0;
3379 if (any_condjump_p (trial
)
3380 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3381 split_branch_probability
= INTVAL (XEXP (note
, 0));
3382 probability
= split_branch_probability
;
3384 seq
= split_insns (pat
, trial
);
3386 split_branch_probability
= -1;
3388 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3389 We may need to handle this specially. */
3390 if (after
&& GET_CODE (after
) == BARRIER
)
3393 after
= NEXT_INSN (after
);
3398 /* Sometimes there will be only one insn in that list, this case will
3399 normally arise only when we want it in turn to be split (SFmode on
3400 the 29k is an example). */
3401 if (NEXT_INSN (seq
) != NULL_RTX
)
3403 rtx insn_last
, insn
;
3406 /* Avoid infinite loop if any insn of the result matches
3407 the original pattern. */
3411 if (INSN_P (insn_last
)
3412 && rtx_equal_p (PATTERN (insn_last
), pat
))
3414 if (NEXT_INSN (insn_last
) == NULL_RTX
)
3416 insn_last
= NEXT_INSN (insn_last
);
3421 while (insn
!= NULL_RTX
)
3423 if (GET_CODE (insn
) == JUMP_INSN
)
3425 mark_jump_label (PATTERN (insn
), insn
, 0);
3427 if (probability
!= -1
3428 && any_condjump_p (insn
)
3429 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3431 /* We can preserve the REG_BR_PROB notes only if exactly
3432 one jump is created, otherwise the machine description
3433 is responsible for this step using
3434 split_branch_probability variable. */
3438 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3439 GEN_INT (probability
),
3444 insn
= PREV_INSN (insn
);
3447 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3448 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3449 if (GET_CODE (trial
) == CALL_INSN
)
3452 while (insn
!= NULL_RTX
)
3454 if (GET_CODE (insn
) == CALL_INSN
)
3455 CALL_INSN_FUNCTION_USAGE (insn
)
3456 = CALL_INSN_FUNCTION_USAGE (trial
);
3458 insn
= PREV_INSN (insn
);
3462 /* Copy notes, particularly those related to the CFG. */
3463 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3465 switch (REG_NOTE_KIND (note
))
3469 while (insn
!= NULL_RTX
)
3471 if (GET_CODE (insn
) == CALL_INSN
3472 || (flag_non_call_exceptions
3473 && may_trap_p (PATTERN (insn
))))
3475 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3478 insn
= PREV_INSN (insn
);
3484 case REG_ALWAYS_RETURN
:
3486 while (insn
!= NULL_RTX
)
3488 if (GET_CODE (insn
) == CALL_INSN
)
3490 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3493 insn
= PREV_INSN (insn
);
3497 case REG_NON_LOCAL_GOTO
:
3499 while (insn
!= NULL_RTX
)
3501 if (GET_CODE (insn
) == JUMP_INSN
)
3503 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3506 insn
= PREV_INSN (insn
);
3515 /* If there are LABELS inside the split insns increment the
3516 usage count so we don't delete the label. */
3517 if (GET_CODE (trial
) == INSN
)
3520 while (insn
!= NULL_RTX
)
3522 if (GET_CODE (insn
) == INSN
)
3523 mark_label_nuses (PATTERN (insn
));
3525 insn
= PREV_INSN (insn
);
3529 tem
= emit_insn_after_scope (seq
, trial
, INSN_SCOPE (trial
));
3531 delete_insn (trial
);
3533 emit_barrier_after (tem
);
3535 /* Recursively call try_split for each new insn created; by the
3536 time control returns here that insn will be fully split, so
3537 set LAST and continue from the insn after the one returned.
3538 We can't use next_active_insn here since AFTER may be a note.
3539 Ignore deleted insns, which can be occur if not optimizing. */
3540 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3541 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3542 tem
= try_split (PATTERN (tem
), tem
, 1);
3544 /* Avoid infinite loop if the result matches the original pattern. */
3545 else if (rtx_equal_p (PATTERN (seq
), pat
))
3549 PATTERN (trial
) = PATTERN (seq
);
3550 INSN_CODE (trial
) = -1;
3551 try_split (PATTERN (trial
), trial
, last
);
3554 /* Return either the first or the last insn, depending on which was
3557 ? (after
? PREV_INSN (after
) : last_insn
)
3558 : NEXT_INSN (before
);
3564 /* Make and return an INSN rtx, initializing all its slots.
3565 Store PATTERN in the pattern slots. */
3568 make_insn_raw (pattern
)
3573 insn
= rtx_alloc (INSN
);
3575 INSN_UID (insn
) = cur_insn_uid
++;
3576 PATTERN (insn
) = pattern
;
3577 INSN_CODE (insn
) = -1;
3578 LOG_LINKS (insn
) = NULL
;
3579 REG_NOTES (insn
) = NULL
;
3580 INSN_SCOPE (insn
) = NULL
;
3581 BLOCK_FOR_INSN (insn
) = NULL
;
3583 #ifdef ENABLE_RTL_CHECKING
3586 && (returnjump_p (insn
)
3587 || (GET_CODE (insn
) == SET
3588 && SET_DEST (insn
) == pc_rtx
)))
3590 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3598 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3601 make_jump_insn_raw (pattern
)
3606 insn
= rtx_alloc (JUMP_INSN
);
3607 INSN_UID (insn
) = cur_insn_uid
++;
3609 PATTERN (insn
) = pattern
;
3610 INSN_CODE (insn
) = -1;
3611 LOG_LINKS (insn
) = NULL
;
3612 REG_NOTES (insn
) = NULL
;
3613 JUMP_LABEL (insn
) = NULL
;
3614 INSN_SCOPE (insn
) = NULL
;
3615 BLOCK_FOR_INSN (insn
) = NULL
;
3620 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3623 make_call_insn_raw (pattern
)
3628 insn
= rtx_alloc (CALL_INSN
);
3629 INSN_UID (insn
) = cur_insn_uid
++;
3631 PATTERN (insn
) = pattern
;
3632 INSN_CODE (insn
) = -1;
3633 LOG_LINKS (insn
) = NULL
;
3634 REG_NOTES (insn
) = NULL
;
3635 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3636 INSN_SCOPE (insn
) = NULL
;
3637 BLOCK_FOR_INSN (insn
) = NULL
;
3642 /* Add INSN to the end of the doubly-linked list.
3643 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3649 PREV_INSN (insn
) = last_insn
;
3650 NEXT_INSN (insn
) = 0;
3652 if (NULL
!= last_insn
)
3653 NEXT_INSN (last_insn
) = insn
;
3655 if (NULL
== first_insn
)
3661 /* Add INSN into the doubly-linked list after insn AFTER. This and
3662 the next should be the only functions called to insert an insn once
3663 delay slots have been filled since only they know how to update a
3667 add_insn_after (insn
, after
)
3670 rtx next
= NEXT_INSN (after
);
3673 if (optimize
&& INSN_DELETED_P (after
))
3676 NEXT_INSN (insn
) = next
;
3677 PREV_INSN (insn
) = after
;
3681 PREV_INSN (next
) = insn
;
3682 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3683 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3685 else if (last_insn
== after
)
3689 struct sequence_stack
*stack
= seq_stack
;
3690 /* Scan all pending sequences too. */
3691 for (; stack
; stack
= stack
->next
)
3692 if (after
== stack
->last
)
3702 if (GET_CODE (after
) != BARRIER
3703 && GET_CODE (insn
) != BARRIER
3704 && (bb
= BLOCK_FOR_INSN (after
)))
3706 set_block_for_insn (insn
, bb
);
3708 bb
->flags
|= BB_DIRTY
;
3709 /* Should not happen as first in the BB is always
3710 either NOTE or LABEL. */
3711 if (bb
->end
== after
3712 /* Avoid clobbering of structure when creating new BB. */
3713 && GET_CODE (insn
) != BARRIER
3714 && (GET_CODE (insn
) != NOTE
3715 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3719 NEXT_INSN (after
) = insn
;
3720 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3722 rtx sequence
= PATTERN (after
);
3723 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3727 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3728 the previous should be the only functions called to insert an insn once
3729 delay slots have been filled since only they know how to update a
3733 add_insn_before (insn
, before
)
3736 rtx prev
= PREV_INSN (before
);
3739 if (optimize
&& INSN_DELETED_P (before
))
3742 PREV_INSN (insn
) = prev
;
3743 NEXT_INSN (insn
) = before
;
3747 NEXT_INSN (prev
) = insn
;
3748 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3750 rtx sequence
= PATTERN (prev
);
3751 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3754 else if (first_insn
== before
)
3758 struct sequence_stack
*stack
= seq_stack
;
3759 /* Scan all pending sequences too. */
3760 for (; stack
; stack
= stack
->next
)
3761 if (before
== stack
->first
)
3763 stack
->first
= insn
;
3771 if (GET_CODE (before
) != BARRIER
3772 && GET_CODE (insn
) != BARRIER
3773 && (bb
= BLOCK_FOR_INSN (before
)))
3775 set_block_for_insn (insn
, bb
);
3777 bb
->flags
|= BB_DIRTY
;
3778 /* Should not happen as first in the BB is always
3779 either NOTE or LABEl. */
3780 if (bb
->head
== insn
3781 /* Avoid clobbering of structure when creating new BB. */
3782 && GET_CODE (insn
) != BARRIER
3783 && (GET_CODE (insn
) != NOTE
3784 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3788 PREV_INSN (before
) = insn
;
3789 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3790 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3793 /* Remove an insn from its doubly-linked list. This function knows how
3794 to handle sequences. */
3799 rtx next
= NEXT_INSN (insn
);
3800 rtx prev
= PREV_INSN (insn
);
3805 NEXT_INSN (prev
) = next
;
3806 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3808 rtx sequence
= PATTERN (prev
);
3809 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3812 else if (first_insn
== insn
)
3816 struct sequence_stack
*stack
= seq_stack
;
3817 /* Scan all pending sequences too. */
3818 for (; stack
; stack
= stack
->next
)
3819 if (insn
== stack
->first
)
3821 stack
->first
= next
;
3831 PREV_INSN (next
) = prev
;
3832 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3833 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3835 else if (last_insn
== insn
)
3839 struct sequence_stack
*stack
= seq_stack
;
3840 /* Scan all pending sequences too. */
3841 for (; stack
; stack
= stack
->next
)
3842 if (insn
== stack
->last
)
3851 if (GET_CODE (insn
) != BARRIER
3852 && (bb
= BLOCK_FOR_INSN (insn
)))
3855 bb
->flags
|= BB_DIRTY
;
3856 if (bb
->head
== insn
)
3858 /* Never ever delete the basic block note without deleting whole
3860 if (GET_CODE (insn
) == NOTE
)
3864 if (bb
->end
== insn
)
3869 /* Delete all insns made since FROM.
3870 FROM becomes the new last instruction. */
3873 delete_insns_since (from
)
3879 NEXT_INSN (from
) = 0;
3883 /* This function is deprecated, please use sequences instead.
3885 Move a consecutive bunch of insns to a different place in the chain.
3886 The insns to be moved are those between FROM and TO.
3887 They are moved to a new position after the insn AFTER.
3888 AFTER must not be FROM or TO or any insn in between.
3890 This function does not know about SEQUENCEs and hence should not be
3891 called after delay-slot filling has been done. */
3894 reorder_insns_nobb (from
, to
, after
)
3895 rtx from
, to
, after
;
3897 /* Splice this bunch out of where it is now. */
3898 if (PREV_INSN (from
))
3899 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3901 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3902 if (last_insn
== to
)
3903 last_insn
= PREV_INSN (from
);
3904 if (first_insn
== from
)
3905 first_insn
= NEXT_INSN (to
);
3907 /* Make the new neighbors point to it and it to them. */
3908 if (NEXT_INSN (after
))
3909 PREV_INSN (NEXT_INSN (after
)) = to
;
3911 NEXT_INSN (to
) = NEXT_INSN (after
);
3912 PREV_INSN (from
) = after
;
3913 NEXT_INSN (after
) = from
;
3914 if (after
== last_insn
)
3918 /* Same as function above, but take care to update BB boundaries. */
3920 reorder_insns (from
, to
, after
)
3921 rtx from
, to
, after
;
3923 rtx prev
= PREV_INSN (from
);
3924 basic_block bb
, bb2
;
3926 reorder_insns_nobb (from
, to
, after
);
3928 if (GET_CODE (after
) != BARRIER
3929 && (bb
= BLOCK_FOR_INSN (after
)))
3932 bb
->flags
|= BB_DIRTY
;
3934 if (GET_CODE (from
) != BARRIER
3935 && (bb2
= BLOCK_FOR_INSN (from
)))
3939 bb2
->flags
|= BB_DIRTY
;
3942 if (bb
->end
== after
)
3945 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3946 set_block_for_insn (x
, bb
);
3950 /* Return the line note insn preceding INSN. */
3953 find_line_note (insn
)
3956 if (no_line_numbers
)
3959 for (; insn
; insn
= PREV_INSN (insn
))
3960 if (GET_CODE (insn
) == NOTE
3961 && NOTE_LINE_NUMBER (insn
) >= 0)
3967 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3968 of the moved insns when debugging. This may insert a note between AFTER
3969 and FROM, and another one after TO. */
3972 reorder_insns_with_line_notes (from
, to
, after
)
3973 rtx from
, to
, after
;
3975 rtx from_line
= find_line_note (from
);
3976 rtx after_line
= find_line_note (after
);
3978 reorder_insns (from
, to
, after
);
3980 if (from_line
== after_line
)
3984 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3985 NOTE_LINE_NUMBER (from_line
),
3988 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3989 NOTE_LINE_NUMBER (after_line
),
3993 /* Remove unnecessary notes from the instruction stream. */
3996 remove_unnecessary_notes ()
3998 rtx block_stack
= NULL_RTX
;
3999 rtx eh_stack
= NULL_RTX
;
4004 /* We must not remove the first instruction in the function because
4005 the compiler depends on the first instruction being a note. */
4006 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
4008 /* Remember what's next. */
4009 next
= NEXT_INSN (insn
);
4011 /* We're only interested in notes. */
4012 if (GET_CODE (insn
) != NOTE
)
4015 switch (NOTE_LINE_NUMBER (insn
))
4017 case NOTE_INSN_DELETED
:
4018 case NOTE_INSN_LOOP_END_TOP_COND
:
4022 case NOTE_INSN_EH_REGION_BEG
:
4023 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
4026 case NOTE_INSN_EH_REGION_END
:
4027 /* Too many end notes. */
4028 if (eh_stack
== NULL_RTX
)
4030 /* Mismatched nesting. */
4031 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
4034 eh_stack
= XEXP (eh_stack
, 1);
4035 free_INSN_LIST_node (tmp
);
4038 case NOTE_INSN_BLOCK_BEG
:
4039 /* By now, all notes indicating lexical blocks should have
4040 NOTE_BLOCK filled in. */
4041 if (NOTE_BLOCK (insn
) == NULL_TREE
)
4043 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
4046 case NOTE_INSN_BLOCK_END
:
4047 /* Too many end notes. */
4048 if (block_stack
== NULL_RTX
)
4050 /* Mismatched nesting. */
4051 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
4054 block_stack
= XEXP (block_stack
, 1);
4055 free_INSN_LIST_node (tmp
);
4057 /* Scan back to see if there are any non-note instructions
4058 between INSN and the beginning of this block. If not,
4059 then there is no PC range in the generated code that will
4060 actually be in this block, so there's no point in
4061 remembering the existence of the block. */
4062 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
4064 /* This block contains a real instruction. Note that we
4065 don't include labels; if the only thing in the block
4066 is a label, then there are still no PC values that
4067 lie within the block. */
4071 /* We're only interested in NOTEs. */
4072 if (GET_CODE (tmp
) != NOTE
)
4075 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
4077 /* We just verified that this BLOCK matches us with
4078 the block_stack check above. Never delete the
4079 BLOCK for the outermost scope of the function; we
4080 can refer to names from that scope even if the
4081 block notes are messed up. */
4082 if (! is_body_block (NOTE_BLOCK (insn
))
4083 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
4090 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
4091 /* There's a nested block. We need to leave the
4092 current block in place since otherwise the debugger
4093 wouldn't be able to show symbols from our block in
4094 the nested block. */
4100 /* Too many begin notes. */
4101 if (block_stack
|| eh_stack
)
4106 /* Emit insn(s) of given code and pattern
4107 at a specified place within the doubly-linked list.
4109 All of the emit_foo global entry points accept an object
4110 X which is either an insn list or a PATTERN of a single
4113 There are thus a few canonical ways to generate code and
4114 emit it at a specific place in the instruction stream. For
4115 example, consider the instruction named SPOT and the fact that
4116 we would like to emit some instructions before SPOT. We might
4120 ... emit the new instructions ...
4121 insns_head = get_insns ();
4124 emit_insn_before (insns_head, SPOT);
4126 It used to be common to generate SEQUENCE rtl instead, but that
4127 is a relic of the past which no longer occurs. The reason is that
4128 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4129 generated would almost certainly die right after it was created. */
4131 /* Make X be output before the instruction BEFORE. */
4134 emit_insn_before (x
, before
)
4140 #ifdef ENABLE_RTL_CHECKING
4141 if (before
== NULL_RTX
)
4148 switch (GET_CODE (x
))
4159 rtx next
= NEXT_INSN (insn
);
4160 add_insn_before (insn
, before
);
4166 #ifdef ENABLE_RTL_CHECKING
4173 last
= make_insn_raw (x
);
4174 add_insn_before (last
, before
);
4181 /* Make an instruction with body X and code JUMP_INSN
4182 and output it before the instruction BEFORE. */
4185 emit_jump_insn_before (x
, before
)
4188 rtx insn
, last
= NULL_RTX
;
4190 #ifdef ENABLE_RTL_CHECKING
4191 if (before
== NULL_RTX
)
4195 switch (GET_CODE (x
))
4206 rtx next
= NEXT_INSN (insn
);
4207 add_insn_before (insn
, before
);
4213 #ifdef ENABLE_RTL_CHECKING
4220 last
= make_jump_insn_raw (x
);
4221 add_insn_before (last
, before
);
4228 /* Make an instruction with body X and code CALL_INSN
4229 and output it before the instruction BEFORE. */
4232 emit_call_insn_before (x
, before
)
4235 rtx last
= NULL_RTX
, insn
;
4237 #ifdef ENABLE_RTL_CHECKING
4238 if (before
== NULL_RTX
)
4242 switch (GET_CODE (x
))
4253 rtx next
= NEXT_INSN (insn
);
4254 add_insn_before (insn
, before
);
4260 #ifdef ENABLE_RTL_CHECKING
4267 last
= make_call_insn_raw (x
);
4268 add_insn_before (last
, before
);
4275 /* Make an insn of code BARRIER
4276 and output it before the insn BEFORE. */
4279 emit_barrier_before (before
)
4282 rtx insn
= rtx_alloc (BARRIER
);
4284 INSN_UID (insn
) = cur_insn_uid
++;
4286 add_insn_before (insn
, before
);
4290 /* Emit the label LABEL before the insn BEFORE. */
4293 emit_label_before (label
, before
)
4296 /* This can be called twice for the same label as a result of the
4297 confusion that follows a syntax error! So make it harmless. */
4298 if (INSN_UID (label
) == 0)
4300 INSN_UID (label
) = cur_insn_uid
++;
4301 add_insn_before (label
, before
);
4307 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4310 emit_note_before (subtype
, before
)
4314 rtx note
= rtx_alloc (NOTE
);
4315 INSN_UID (note
) = cur_insn_uid
++;
4316 NOTE_SOURCE_FILE (note
) = 0;
4317 NOTE_LINE_NUMBER (note
) = subtype
;
4318 BLOCK_FOR_INSN (note
) = NULL
;
4320 add_insn_before (note
, before
);
4324 /* Helper for emit_insn_after, handles lists of instructions
4327 static rtx emit_insn_after_1
PARAMS ((rtx
, rtx
));
4330 emit_insn_after_1 (first
, after
)
4337 if (GET_CODE (after
) != BARRIER
4338 && (bb
= BLOCK_FOR_INSN (after
)))
4340 bb
->flags
|= BB_DIRTY
;
4341 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4342 if (GET_CODE (last
) != BARRIER
)
4343 set_block_for_insn (last
, bb
);
4344 if (GET_CODE (last
) != BARRIER
)
4345 set_block_for_insn (last
, bb
);
4346 if (bb
->end
== after
)
4350 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4353 after_after
= NEXT_INSN (after
);
4355 NEXT_INSN (after
) = first
;
4356 PREV_INSN (first
) = after
;
4357 NEXT_INSN (last
) = after_after
;
4359 PREV_INSN (after_after
) = last
;
4361 if (after
== last_insn
)
4366 /* Make X be output after the insn AFTER. */
4369 emit_insn_after (x
, after
)
4374 #ifdef ENABLE_RTL_CHECKING
4375 if (after
== NULL_RTX
)
4382 switch (GET_CODE (x
))
4390 last
= emit_insn_after_1 (x
, after
);
4393 #ifdef ENABLE_RTL_CHECKING
4400 last
= make_insn_raw (x
);
4401 add_insn_after (last
, after
);
4408 /* Similar to emit_insn_after, except that line notes are to be inserted so
4409 as to act as if this insn were at FROM. */
4412 emit_insn_after_with_line_notes (x
, after
, from
)
4415 rtx from_line
= find_line_note (from
);
4416 rtx after_line
= find_line_note (after
);
4417 rtx insn
= emit_insn_after (x
, after
);
4420 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
4421 NOTE_LINE_NUMBER (from_line
),
4425 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
4426 NOTE_LINE_NUMBER (after_line
),
4430 /* Make an insn of code JUMP_INSN with body X
4431 and output it after the insn AFTER. */
4434 emit_jump_insn_after (x
, after
)
4439 #ifdef ENABLE_RTL_CHECKING
4440 if (after
== NULL_RTX
)
4444 switch (GET_CODE (x
))
4452 last
= emit_insn_after_1 (x
, after
);
4455 #ifdef ENABLE_RTL_CHECKING
4462 last
= make_jump_insn_raw (x
);
4463 add_insn_after (last
, after
);
4470 /* Make an instruction with body X and code CALL_INSN
4471 and output it after the instruction AFTER. */
4474 emit_call_insn_after (x
, after
)
4479 #ifdef ENABLE_RTL_CHECKING
4480 if (after
== NULL_RTX
)
4484 switch (GET_CODE (x
))
4492 last
= emit_insn_after_1 (x
, after
);
4495 #ifdef ENABLE_RTL_CHECKING
4502 last
= make_call_insn_raw (x
);
4503 add_insn_after (last
, after
);
4510 /* Make an insn of code BARRIER
4511 and output it after the insn AFTER. */
4514 emit_barrier_after (after
)
4517 rtx insn
= rtx_alloc (BARRIER
);
4519 INSN_UID (insn
) = cur_insn_uid
++;
4521 add_insn_after (insn
, after
);
4525 /* Emit the label LABEL after the insn AFTER. */
4528 emit_label_after (label
, after
)
4531 /* This can be called twice for the same label
4532 as a result of the confusion that follows a syntax error!
4533 So make it harmless. */
4534 if (INSN_UID (label
) == 0)
4536 INSN_UID (label
) = cur_insn_uid
++;
4537 add_insn_after (label
, after
);
4543 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4546 emit_note_after (subtype
, after
)
4550 rtx note
= rtx_alloc (NOTE
);
4551 INSN_UID (note
) = cur_insn_uid
++;
4552 NOTE_SOURCE_FILE (note
) = 0;
4553 NOTE_LINE_NUMBER (note
) = subtype
;
4554 BLOCK_FOR_INSN (note
) = NULL
;
4555 add_insn_after (note
, after
);
4559 /* Emit a line note for FILE and LINE after the insn AFTER. */
4562 emit_line_note_after (file
, line
, after
)
4569 if (no_line_numbers
&& line
> 0)
4575 note
= rtx_alloc (NOTE
);
4576 INSN_UID (note
) = cur_insn_uid
++;
4577 NOTE_SOURCE_FILE (note
) = file
;
4578 NOTE_LINE_NUMBER (note
) = line
;
4579 BLOCK_FOR_INSN (note
) = NULL
;
4580 add_insn_after (note
, after
);
4584 /* Like emit_insn_after, but set INSN_SCOPE according to SCOPE. */
4586 emit_insn_after_scope (pattern
, after
, scope
)
4590 rtx last
= emit_insn_after (pattern
, after
);
4592 after
= NEXT_INSN (after
);
4595 if (active_insn_p (after
))
4596 INSN_SCOPE (after
) = scope
;
4599 after
= NEXT_INSN (after
);
4604 /* Like emit_jump_insn_after, but set INSN_SCOPE according to SCOPE. */
4606 emit_jump_insn_after_scope (pattern
, after
, scope
)
4610 rtx last
= emit_jump_insn_after (pattern
, after
);
4612 after
= NEXT_INSN (after
);
4615 if (active_insn_p (after
))
4616 INSN_SCOPE (after
) = scope
;
4619 after
= NEXT_INSN (after
);
4624 /* Like emit_call_insn_after, but set INSN_SCOPE according to SCOPE. */
4626 emit_call_insn_after_scope (pattern
, after
, scope
)
4630 rtx last
= emit_call_insn_after (pattern
, after
);
4632 after
= NEXT_INSN (after
);
4635 if (active_insn_p (after
))
4636 INSN_SCOPE (after
) = scope
;
4639 after
= NEXT_INSN (after
);
4644 /* Like emit_insn_before, but set INSN_SCOPE according to SCOPE. */
4646 emit_insn_before_scope (pattern
, before
, scope
)
4647 rtx pattern
, before
;
4650 rtx first
= PREV_INSN (before
);
4651 rtx last
= emit_insn_before (pattern
, before
);
4653 first
= NEXT_INSN (first
);
4656 if (active_insn_p (first
))
4657 INSN_SCOPE (first
) = scope
;
4660 first
= NEXT_INSN (first
);
4665 /* Take X and emit it at the end of the doubly-linked
4668 Returns the last insn emitted. */
4674 rtx last
= last_insn
;
4680 switch (GET_CODE (x
))
4691 rtx next
= NEXT_INSN (insn
);
4698 #ifdef ENABLE_RTL_CHECKING
4705 last
= make_insn_raw (x
);
4713 /* Make an insn of code JUMP_INSN with pattern X
4714 and add it to the end of the doubly-linked list. */
4720 rtx last
= NULL_RTX
, insn
;
4722 switch (GET_CODE (x
))
4733 rtx next
= NEXT_INSN (insn
);
4740 #ifdef ENABLE_RTL_CHECKING
4747 last
= make_jump_insn_raw (x
);
4755 /* Make an insn of code CALL_INSN with pattern X
4756 and add it to the end of the doubly-linked list. */
4764 switch (GET_CODE (x
))
4772 insn
= emit_insn (x
);
4775 #ifdef ENABLE_RTL_CHECKING
4782 insn
= make_call_insn_raw (x
);
4790 /* Add the label LABEL to the end of the doubly-linked list. */
4796 /* This can be called twice for the same label
4797 as a result of the confusion that follows a syntax error!
4798 So make it harmless. */
4799 if (INSN_UID (label
) == 0)
4801 INSN_UID (label
) = cur_insn_uid
++;
4807 /* Make an insn of code BARRIER
4808 and add it to the end of the doubly-linked list. */
4813 rtx barrier
= rtx_alloc (BARRIER
);
4814 INSN_UID (barrier
) = cur_insn_uid
++;
4819 /* Make an insn of code NOTE
4820 with data-fields specified by FILE and LINE
4821 and add it to the end of the doubly-linked list,
4822 but only if line-numbers are desired for debugging info. */
4825 emit_line_note (file
, line
)
4829 set_file_and_line_for_stmt (file
, line
);
4832 if (no_line_numbers
)
4836 return emit_note (file
, line
);
4839 /* Make an insn of code NOTE
4840 with data-fields specified by FILE and LINE
4841 and add it to the end of the doubly-linked list.
4842 If it is a line-number NOTE, omit it if it matches the previous one. */
4845 emit_note (file
, line
)
4853 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
4854 && line
== last_linenum
)
4856 last_filename
= file
;
4857 last_linenum
= line
;
4860 if (no_line_numbers
&& line
> 0)
4866 note
= rtx_alloc (NOTE
);
4867 INSN_UID (note
) = cur_insn_uid
++;
4868 NOTE_SOURCE_FILE (note
) = file
;
4869 NOTE_LINE_NUMBER (note
) = line
;
4870 BLOCK_FOR_INSN (note
) = NULL
;
4875 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4878 emit_line_note_force (file
, line
)
4883 return emit_line_note (file
, line
);
4886 /* Cause next statement to emit a line note even if the line number
4887 has not changed. This is used at the beginning of a function. */
4890 force_next_line_note ()
4895 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4896 note of this type already exists, remove it first. */
4899 set_unique_reg_note (insn
, kind
, datum
)
4904 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4910 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4911 has multiple sets (some callers assume single_set
4912 means the insn only has one set, when in fact it
4913 means the insn only has one * useful * set). */
4914 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4921 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4922 It serves no useful purpose and breaks eliminate_regs. */
4923 if (GET_CODE (datum
) == ASM_OPERANDS
)
4933 XEXP (note
, 0) = datum
;
4937 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4938 return REG_NOTES (insn
);
4941 /* Return an indication of which type of insn should have X as a body.
4942 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4948 if (GET_CODE (x
) == CODE_LABEL
)
4950 if (GET_CODE (x
) == CALL
)
4952 if (GET_CODE (x
) == RETURN
)
4954 if (GET_CODE (x
) == SET
)
4956 if (SET_DEST (x
) == pc_rtx
)
4958 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4963 if (GET_CODE (x
) == PARALLEL
)
4966 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4967 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4969 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4970 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4972 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4973 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4979 /* Emit the rtl pattern X as an appropriate kind of insn.
4980 If X is a label, it is simply added into the insn chain. */
4986 enum rtx_code code
= classify_insn (x
);
4988 if (code
== CODE_LABEL
)
4989 return emit_label (x
);
4990 else if (code
== INSN
)
4991 return emit_insn (x
);
4992 else if (code
== JUMP_INSN
)
4994 rtx insn
= emit_jump_insn (x
);
4995 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4996 return emit_barrier ();
4999 else if (code
== CALL_INSN
)
5000 return emit_call_insn (x
);
5005 /* Space for free sequence stack entries. */
5006 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
5008 /* Begin emitting insns to a sequence which can be packaged in an
5009 RTL_EXPR. If this sequence will contain something that might cause
5010 the compiler to pop arguments to function calls (because those
5011 pops have previously been deferred; see INHIBIT_DEFER_POP for more
5012 details), use do_pending_stack_adjust before calling this function.
5013 That will ensure that the deferred pops are not accidentally
5014 emitted in the middle of this sequence. */
5019 struct sequence_stack
*tem
;
5021 if (free_sequence_stack
!= NULL
)
5023 tem
= free_sequence_stack
;
5024 free_sequence_stack
= tem
->next
;
5027 tem
= (struct sequence_stack
*) ggc_alloc (sizeof (struct sequence_stack
));
5029 tem
->next
= seq_stack
;
5030 tem
->first
= first_insn
;
5031 tem
->last
= last_insn
;
5032 tem
->sequence_rtl_expr
= seq_rtl_expr
;
5040 /* Similarly, but indicate that this sequence will be placed in T, an
5041 RTL_EXPR. See the documentation for start_sequence for more
5042 information about how to use this function. */
5045 start_sequence_for_rtl_expr (t
)
5053 /* Set up the insn chain starting with FIRST as the current sequence,
5054 saving the previously current one. See the documentation for
5055 start_sequence for more information about how to use this function. */
5058 push_to_sequence (first
)
5065 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
5071 /* Set up the insn chain from a chain stort in FIRST to LAST. */
5074 push_to_full_sequence (first
, last
)
5080 /* We really should have the end of the insn chain here. */
5081 if (last
&& NEXT_INSN (last
))
5085 /* Set up the outer-level insn chain
5086 as the current sequence, saving the previously current one. */
5089 push_topmost_sequence ()
5091 struct sequence_stack
*stack
, *top
= NULL
;
5095 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5098 first_insn
= top
->first
;
5099 last_insn
= top
->last
;
5100 seq_rtl_expr
= top
->sequence_rtl_expr
;
5103 /* After emitting to the outer-level insn chain, update the outer-level
5104 insn chain, and restore the previous saved state. */
5107 pop_topmost_sequence ()
5109 struct sequence_stack
*stack
, *top
= NULL
;
5111 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5114 top
->first
= first_insn
;
5115 top
->last
= last_insn
;
5116 /* ??? Why don't we save seq_rtl_expr here? */
5121 /* After emitting to a sequence, restore previous saved state.
5123 To get the contents of the sequence just made, you must call
5124 `get_insns' *before* calling here.
5126 If the compiler might have deferred popping arguments while
5127 generating this sequence, and this sequence will not be immediately
5128 inserted into the instruction stream, use do_pending_stack_adjust
5129 before calling get_insns. That will ensure that the deferred
5130 pops are inserted into this sequence, and not into some random
5131 location in the instruction stream. See INHIBIT_DEFER_POP for more
5132 information about deferred popping of arguments. */
5137 struct sequence_stack
*tem
= seq_stack
;
5139 first_insn
= tem
->first
;
5140 last_insn
= tem
->last
;
5141 seq_rtl_expr
= tem
->sequence_rtl_expr
;
5142 seq_stack
= tem
->next
;
5144 memset (tem
, 0, sizeof (*tem
));
5145 tem
->next
= free_sequence_stack
;
5146 free_sequence_stack
= tem
;
5149 /* This works like end_sequence, but records the old sequence in FIRST
5153 end_full_sequence (first
, last
)
5156 *first
= first_insn
;
5161 /* Return 1 if currently emitting into a sequence. */
5166 return seq_stack
!= 0;
5169 /* Put the various virtual registers into REGNO_REG_RTX. */
5172 init_virtual_regs (es
)
5173 struct emit_status
*es
;
5175 rtx
*ptr
= es
->x_regno_reg_rtx
;
5176 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5177 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5178 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5179 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5180 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5184 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5185 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5186 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5187 static int copy_insn_n_scratches
;
5189 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5190 copied an ASM_OPERANDS.
5191 In that case, it is the original input-operand vector. */
5192 static rtvec orig_asm_operands_vector
;
5194 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5195 copied an ASM_OPERANDS.
5196 In that case, it is the copied input-operand vector. */
5197 static rtvec copy_asm_operands_vector
;
5199 /* Likewise for the constraints vector. */
5200 static rtvec orig_asm_constraints_vector
;
5201 static rtvec copy_asm_constraints_vector
;
5203 /* Recursively create a new copy of an rtx for copy_insn.
5204 This function differs from copy_rtx in that it handles SCRATCHes and
5205 ASM_OPERANDs properly.
5206 Normally, this function is not used directly; use copy_insn as front end.
5207 However, you could first copy an insn pattern with copy_insn and then use
5208 this function afterwards to properly copy any REG_NOTEs containing
5218 const char *format_ptr
;
5220 code
= GET_CODE (orig
);
5237 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5238 if (copy_insn_scratch_in
[i
] == orig
)
5239 return copy_insn_scratch_out
[i
];
5243 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5244 a LABEL_REF, it isn't sharable. */
5245 if (GET_CODE (XEXP (orig
, 0)) == PLUS
5246 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
5247 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
5251 /* A MEM with a constant address is not sharable. The problem is that
5252 the constant address may need to be reloaded. If the mem is shared,
5253 then reloading one copy of this mem will cause all copies to appear
5254 to have been reloaded. */
5260 copy
= rtx_alloc (code
);
5262 /* Copy the various flags, and other information. We assume that
5263 all fields need copying, and then clear the fields that should
5264 not be copied. That is the sensible default behavior, and forces
5265 us to explicitly document why we are *not* copying a flag. */
5266 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
5268 /* We do not copy the USED flag, which is used as a mark bit during
5269 walks over the RTL. */
5270 RTX_FLAG (copy
, used
) = 0;
5272 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5273 if (GET_RTX_CLASS (code
) == 'i')
5275 RTX_FLAG (copy
, jump
) = 0;
5276 RTX_FLAG (copy
, call
) = 0;
5277 RTX_FLAG (copy
, frame_related
) = 0;
5280 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5282 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5284 copy
->fld
[i
] = orig
->fld
[i
];
5285 switch (*format_ptr
++)
5288 if (XEXP (orig
, i
) != NULL
)
5289 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5294 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5295 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5296 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5297 XVEC (copy
, i
) = copy_asm_operands_vector
;
5298 else if (XVEC (orig
, i
) != NULL
)
5300 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5301 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5302 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5313 /* These are left unchanged. */
5321 if (code
== SCRATCH
)
5323 i
= copy_insn_n_scratches
++;
5324 if (i
>= MAX_RECOG_OPERANDS
)
5326 copy_insn_scratch_in
[i
] = orig
;
5327 copy_insn_scratch_out
[i
] = copy
;
5329 else if (code
== ASM_OPERANDS
)
5331 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5332 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5333 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5334 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5340 /* Create a new copy of an rtx.
5341 This function differs from copy_rtx in that it handles SCRATCHes and
5342 ASM_OPERANDs properly.
5343 INSN doesn't really have to be a full INSN; it could be just the
5349 copy_insn_n_scratches
= 0;
5350 orig_asm_operands_vector
= 0;
5351 orig_asm_constraints_vector
= 0;
5352 copy_asm_operands_vector
= 0;
5353 copy_asm_constraints_vector
= 0;
5354 return copy_insn_1 (insn
);
5357 /* Initialize data structures and variables in this file
5358 before generating rtl for each function. */
5363 struct function
*f
= cfun
;
5365 f
->emit
= (struct emit_status
*) ggc_alloc (sizeof (struct emit_status
));
5368 seq_rtl_expr
= NULL
;
5370 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5373 first_label_num
= label_num
;
5377 /* Init the tables that describe all the pseudo regs. */
5379 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5381 f
->emit
->regno_pointer_align
5382 = (unsigned char *) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5383 * sizeof (unsigned char));
5386 = (rtx
*) ggc_alloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
));
5388 /* Put copies of all the hard registers into regno_reg_rtx. */
5389 memcpy (regno_reg_rtx
,
5390 static_regno_reg_rtx
,
5391 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5393 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5394 init_virtual_regs (f
->emit
);
5396 /* Indicate that the virtual registers and stack locations are
5398 REG_POINTER (stack_pointer_rtx
) = 1;
5399 REG_POINTER (frame_pointer_rtx
) = 1;
5400 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5401 REG_POINTER (arg_pointer_rtx
) = 1;
5403 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5404 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5405 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5406 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5407 REG_POINTER (virtual_cfa_rtx
) = 1;
5409 #ifdef STACK_BOUNDARY
5410 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5411 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5412 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5413 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5415 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5416 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5417 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5418 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5419 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5422 #ifdef INIT_EXPANDERS
5427 /* Generate the constant 0. */
5430 gen_const_vector_0 (mode
)
5431 enum machine_mode mode
;
5436 enum machine_mode inner
;
5438 units
= GET_MODE_NUNITS (mode
);
5439 inner
= GET_MODE_INNER (mode
);
5441 v
= rtvec_alloc (units
);
5443 /* We need to call this function after we to set CONST0_RTX first. */
5444 if (!CONST0_RTX (inner
))
5447 for (i
= 0; i
< units
; ++i
)
5448 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5450 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5454 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5455 all elements are zero. */
5457 gen_rtx_CONST_VECTOR (mode
, v
)
5458 enum machine_mode mode
;
5461 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5464 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5465 if (RTVEC_ELT (v
, i
) != inner_zero
)
5466 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5467 return CONST0_RTX (mode
);
5470 /* Create some permanent unique rtl objects shared between all functions.
5471 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5474 init_emit_once (line_numbers
)
5478 enum machine_mode mode
;
5479 enum machine_mode double_mode
;
5481 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5483 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5484 const_int_htab_eq
, NULL
);
5486 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5487 const_double_htab_eq
, NULL
);
5489 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5490 mem_attrs_htab_eq
, NULL
);
5491 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5492 reg_attrs_htab_eq
, NULL
);
5494 no_line_numbers
= ! line_numbers
;
5496 /* Compute the word and byte modes. */
5498 byte_mode
= VOIDmode
;
5499 word_mode
= VOIDmode
;
5500 double_mode
= VOIDmode
;
5502 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5503 mode
= GET_MODE_WIDER_MODE (mode
))
5505 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5506 && byte_mode
== VOIDmode
)
5509 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5510 && word_mode
== VOIDmode
)
5514 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5515 mode
= GET_MODE_WIDER_MODE (mode
))
5517 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5518 && double_mode
== VOIDmode
)
5522 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5524 /* Assign register numbers to the globally defined register rtx.
5525 This must be done at runtime because the register number field
5526 is in a union and some compilers can't initialize unions. */
5528 pc_rtx
= gen_rtx (PC
, VOIDmode
);
5529 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
5530 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5531 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5532 if (hard_frame_pointer_rtx
== 0)
5533 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5534 HARD_FRAME_POINTER_REGNUM
);
5535 if (arg_pointer_rtx
== 0)
5536 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5537 virtual_incoming_args_rtx
=
5538 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5539 virtual_stack_vars_rtx
=
5540 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5541 virtual_stack_dynamic_rtx
=
5542 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5543 virtual_outgoing_args_rtx
=
5544 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5545 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5547 /* Initialize RTL for commonly used hard registers. These are
5548 copied into regno_reg_rtx as we begin to compile each function. */
5549 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5550 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5552 #ifdef INIT_EXPANDERS
5553 /* This is to initialize {init|mark|free}_machine_status before the first
5554 call to push_function_context_to. This is needed by the Chill front
5555 end which calls push_function_context_to before the first call to
5556 init_function_start. */
5560 /* Create the unique rtx's for certain rtx codes and operand values. */
5562 /* Don't use gen_rtx here since gen_rtx in this case
5563 tries to use these variables. */
5564 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5565 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5566 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5568 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5569 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5570 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5572 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5574 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5575 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5576 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5577 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5579 for (i
= 0; i
<= 2; i
++)
5581 REAL_VALUE_TYPE
*r
=
5582 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5584 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5585 mode
= GET_MODE_WIDER_MODE (mode
))
5586 const_tiny_rtx
[i
][(int) mode
] =
5587 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5589 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5591 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5592 mode
= GET_MODE_WIDER_MODE (mode
))
5593 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5595 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5597 mode
= GET_MODE_WIDER_MODE (mode
))
5598 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5601 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5603 mode
= GET_MODE_WIDER_MODE (mode
))
5604 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5606 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5608 mode
= GET_MODE_WIDER_MODE (mode
))
5609 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5611 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5612 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5613 const_tiny_rtx
[0][i
] = const0_rtx
;
5615 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5616 if (STORE_FLAG_VALUE
== 1)
5617 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5619 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5620 return_address_pointer_rtx
5621 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5625 struct_value_rtx
= STRUCT_VALUE
;
5627 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
5630 #ifdef STRUCT_VALUE_INCOMING
5631 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
5633 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5634 struct_value_incoming_rtx
5635 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
5637 struct_value_incoming_rtx
= struct_value_rtx
;
5641 #ifdef STATIC_CHAIN_REGNUM
5642 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5644 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5645 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5646 static_chain_incoming_rtx
5647 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5650 static_chain_incoming_rtx
= static_chain_rtx
;
5654 static_chain_rtx
= STATIC_CHAIN
;
5656 #ifdef STATIC_CHAIN_INCOMING
5657 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5659 static_chain_incoming_rtx
= static_chain_rtx
;
5663 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5664 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5667 /* Query and clear/ restore no_line_numbers. This is used by the
5668 switch / case handling in stmt.c to give proper line numbers in
5669 warnings about unreachable code. */
5672 force_line_numbers ()
5674 int old
= no_line_numbers
;
5676 no_line_numbers
= 0;
5678 force_next_line_note ();
5683 restore_line_number_status (old_value
)
5686 no_line_numbers
= old_value
;
5689 /* Produce exact duplicate of insn INSN after AFTER.
5690 Care updating of libcall regions if present. */
5693 emit_copy_of_insn_after (insn
, after
)
5697 rtx note1
, note2
, link
;
5699 switch (GET_CODE (insn
))
5702 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5706 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5710 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5711 if (CALL_INSN_FUNCTION_USAGE (insn
))
5712 CALL_INSN_FUNCTION_USAGE (new)
5713 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5714 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5715 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5722 /* Update LABEL_NUSES. */
5723 mark_jump_label (PATTERN (new), new, 0);
5725 INSN_SCOPE (new) = INSN_SCOPE (insn
);
5727 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5729 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5730 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5732 if (GET_CODE (link
) == EXPR_LIST
)
5734 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5739 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5744 /* Fix the libcall sequences. */
5745 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5748 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5750 XEXP (note1
, 0) = p
;
5751 XEXP (note2
, 0) = new;
5753 INSN_CODE (new) = INSN_CODE (insn
);
5757 #include "gt-emit-rtl.h"