1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
43 #include "double-int.h"
51 #include "fold-const.h"
54 #include "hard-reg-set.h"
57 #include "basic-block.h"
61 #include "stringpool.h"
63 #include "statistics.h"
64 #include "fixed-value.h"
65 #include "insn-config.h"
77 #include "langhooks.h"
84 struct target_rtl default_target_rtl
;
86 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
89 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
91 /* Commonly used modes. */
93 machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
94 machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
95 machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
96 machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
98 /* Datastructures maintained for currently processed function in RTL form. */
100 struct rtl_data x_rtl
;
102 /* Indexed by pseudo register number, gives the rtx for that pseudo.
103 Allocated in parallel with regno_pointer_align.
104 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
105 with length attribute nested in top level structures. */
109 /* This is *not* reset after each function. It gives each CODE_LABEL
110 in the entire compilation a unique label number. */
112 static GTY(()) int label_num
= 1;
114 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
115 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
116 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
117 is set only for MODE_INT and MODE_VECTOR_INT modes. */
119 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
123 REAL_VALUE_TYPE dconst0
;
124 REAL_VALUE_TYPE dconst1
;
125 REAL_VALUE_TYPE dconst2
;
126 REAL_VALUE_TYPE dconstm1
;
127 REAL_VALUE_TYPE dconsthalf
;
129 /* Record fixed-point constant 0 and 1. */
130 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
131 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
133 /* We make one copy of (const_int C) where C is in
134 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
135 to save space during the compilation and simplify comparisons of
138 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
140 /* Standard pieces of rtx, to be substituted directly into things. */
143 rtx simple_return_rtx
;
146 /* A hash table storing CONST_INTs whose absolute value is greater
147 than MAX_SAVED_CONST_INT. */
149 struct const_int_hasher
: ggc_cache_hasher
<rtx
>
151 typedef HOST_WIDE_INT compare_type
;
153 static hashval_t
hash (rtx i
);
154 static bool equal (rtx i
, HOST_WIDE_INT h
);
157 static GTY ((cache
)) hash_table
<const_int_hasher
> *const_int_htab
;
159 struct const_wide_int_hasher
: ggc_cache_hasher
<rtx
>
161 static hashval_t
hash (rtx x
);
162 static bool equal (rtx x
, rtx y
);
165 static GTY ((cache
)) hash_table
<const_wide_int_hasher
> *const_wide_int_htab
;
167 /* A hash table storing register attribute structures. */
168 struct reg_attr_hasher
: ggc_cache_hasher
<reg_attrs
*>
170 static hashval_t
hash (reg_attrs
*x
);
171 static bool equal (reg_attrs
*a
, reg_attrs
*b
);
174 static GTY ((cache
)) hash_table
<reg_attr_hasher
> *reg_attrs_htab
;
176 /* A hash table storing all CONST_DOUBLEs. */
177 struct const_double_hasher
: ggc_cache_hasher
<rtx
>
179 static hashval_t
hash (rtx x
);
180 static bool equal (rtx x
, rtx y
);
183 static GTY ((cache
)) hash_table
<const_double_hasher
> *const_double_htab
;
185 /* A hash table storing all CONST_FIXEDs. */
186 struct const_fixed_hasher
: ggc_cache_hasher
<rtx
>
188 static hashval_t
hash (rtx x
);
189 static bool equal (rtx x
, rtx y
);
192 static GTY ((cache
)) hash_table
<const_fixed_hasher
> *const_fixed_htab
;
194 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
195 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
196 #define first_label_num (crtl->emit.x_first_label_num)
198 static void set_used_decls (tree
);
199 static void mark_label_nuses (rtx
);
200 #if TARGET_SUPPORTS_WIDE_INT
201 static rtx
lookup_const_wide_int (rtx
);
203 static rtx
lookup_const_double (rtx
);
204 static rtx
lookup_const_fixed (rtx
);
205 static reg_attrs
*get_reg_attrs (tree
, int);
206 static rtx
gen_const_vector (machine_mode
, int);
207 static void copy_rtx_if_shared_1 (rtx
*orig
);
209 /* Probability of the conditional branch currently proceeded by try_split.
210 Set to -1 otherwise. */
211 int split_branch_probability
= -1;
213 /* Returns a hash code for X (which is a really a CONST_INT). */
216 const_int_hasher::hash (rtx x
)
218 return (hashval_t
) INTVAL (x
);
221 /* Returns nonzero if the value represented by X (which is really a
222 CONST_INT) is the same as that given by Y (which is really a
226 const_int_hasher::equal (rtx x
, HOST_WIDE_INT y
)
228 return (INTVAL (x
) == y
);
231 #if TARGET_SUPPORTS_WIDE_INT
232 /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
235 const_wide_int_hasher::hash (rtx x
)
238 unsigned HOST_WIDE_INT hash
= 0;
241 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
242 hash
+= CONST_WIDE_INT_ELT (xr
, i
);
244 return (hashval_t
) hash
;
247 /* Returns nonzero if the value represented by X (which is really a
248 CONST_WIDE_INT) is the same as that given by Y (which is really a
252 const_wide_int_hasher::equal (rtx x
, rtx y
)
257 if (CONST_WIDE_INT_NUNITS (xr
) != CONST_WIDE_INT_NUNITS (yr
))
260 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
261 if (CONST_WIDE_INT_ELT (xr
, i
) != CONST_WIDE_INT_ELT (yr
, i
))
268 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
270 const_double_hasher::hash (rtx x
)
272 const_rtx
const value
= x
;
275 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (value
) == VOIDmode
)
276 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
279 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
280 /* MODE is used in the comparison, so it should be in the hash. */
281 h
^= GET_MODE (value
);
286 /* Returns nonzero if the value represented by X (really a ...)
287 is the same as that represented by Y (really a ...) */
289 const_double_hasher::equal (rtx x
, rtx y
)
291 const_rtx
const a
= x
, b
= y
;
293 if (GET_MODE (a
) != GET_MODE (b
))
295 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (a
) == VOIDmode
)
296 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
297 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
299 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
300 CONST_DOUBLE_REAL_VALUE (b
));
303 /* Returns a hash code for X (which is really a CONST_FIXED). */
306 const_fixed_hasher::hash (rtx x
)
308 const_rtx
const value
= x
;
311 h
= fixed_hash (CONST_FIXED_VALUE (value
));
312 /* MODE is used in the comparison, so it should be in the hash. */
313 h
^= GET_MODE (value
);
317 /* Returns nonzero if the value represented by X is the same as that
321 const_fixed_hasher::equal (rtx x
, rtx y
)
323 const_rtx
const a
= x
, b
= y
;
325 if (GET_MODE (a
) != GET_MODE (b
))
327 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
330 /* Return true if the given memory attributes are equal. */
333 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
339 return (p
->alias
== q
->alias
340 && p
->offset_known_p
== q
->offset_known_p
341 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
342 && p
->size_known_p
== q
->size_known_p
343 && (!p
->size_known_p
|| p
->size
== q
->size
)
344 && p
->align
== q
->align
345 && p
->addrspace
== q
->addrspace
346 && (p
->expr
== q
->expr
347 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
348 && operand_equal_p (p
->expr
, q
->expr
, 0))));
351 /* Set MEM's memory attributes so that they are the same as ATTRS. */
354 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
356 /* If everything is the default, we can just clear the attributes. */
357 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
364 || !mem_attrs_eq_p (attrs
, MEM_ATTRS (mem
)))
366 MEM_ATTRS (mem
) = ggc_alloc
<mem_attrs
> ();
367 memcpy (MEM_ATTRS (mem
), attrs
, sizeof (mem_attrs
));
371 /* Returns a hash code for X (which is a really a reg_attrs *). */
374 reg_attr_hasher::hash (reg_attrs
*x
)
376 const reg_attrs
*const p
= x
;
378 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
381 /* Returns nonzero if the value represented by X is the same as that given by
385 reg_attr_hasher::equal (reg_attrs
*x
, reg_attrs
*y
)
387 const reg_attrs
*const p
= x
;
388 const reg_attrs
*const q
= y
;
390 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
392 /* Allocate a new reg_attrs structure and insert it into the hash table if
393 one identical to it is not already in the table. We are doing this for
397 get_reg_attrs (tree decl
, int offset
)
401 /* If everything is the default, we can just return zero. */
402 if (decl
== 0 && offset
== 0)
406 attrs
.offset
= offset
;
408 reg_attrs
**slot
= reg_attrs_htab
->find_slot (&attrs
, INSERT
);
411 *slot
= ggc_alloc
<reg_attrs
> ();
412 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
420 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
421 and to block register equivalences to be seen across this insn. */
426 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
427 MEM_VOLATILE_P (x
) = true;
433 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
434 don't attempt to share with the various global pieces of rtl (such as
435 frame_pointer_rtx). */
438 gen_raw_REG (machine_mode mode
, int regno
)
440 rtx x
= rtx_alloc_stat (REG PASS_MEM_STAT
);
442 SET_REGNO_RAW (x
, regno
);
443 REG_ATTRS (x
) = NULL
;
444 ORIGINAL_REGNO (x
) = regno
;
448 /* There are some RTL codes that require special attention; the generation
449 functions do the raw handling. If you add to this list, modify
450 special_rtx in gengenrtl.c as well. */
453 gen_rtx_EXPR_LIST (machine_mode mode
, rtx expr
, rtx expr_list
)
455 return as_a
<rtx_expr_list
*> (gen_rtx_fmt_ee (EXPR_LIST
, mode
, expr
,
460 gen_rtx_INSN_LIST (machine_mode mode
, rtx insn
, rtx insn_list
)
462 return as_a
<rtx_insn_list
*> (gen_rtx_fmt_ue (INSN_LIST
, mode
, insn
,
467 gen_rtx_INSN (machine_mode mode
, rtx_insn
*prev_insn
, rtx_insn
*next_insn
,
468 basic_block bb
, rtx pattern
, int location
, int code
,
471 return as_a
<rtx_insn
*> (gen_rtx_fmt_uuBeiie (INSN
, mode
,
472 prev_insn
, next_insn
,
473 bb
, pattern
, location
, code
,
478 gen_rtx_CONST_INT (machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
480 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
481 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
483 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
484 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
485 return const_true_rtx
;
488 /* Look up the CONST_INT in the hash table. */
489 rtx
*slot
= const_int_htab
->find_slot_with_hash (arg
, (hashval_t
) arg
,
492 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
498 gen_int_mode (HOST_WIDE_INT c
, machine_mode mode
)
500 return GEN_INT (trunc_int_for_mode (c
, mode
));
503 /* CONST_DOUBLEs might be created from pairs of integers, or from
504 REAL_VALUE_TYPEs. Also, their length is known only at run time,
505 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
507 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
508 hash table. If so, return its counterpart; otherwise add it
509 to the hash table and return it. */
511 lookup_const_double (rtx real
)
513 rtx
*slot
= const_double_htab
->find_slot (real
, INSERT
);
520 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
521 VALUE in mode MODE. */
523 const_double_from_real_value (REAL_VALUE_TYPE value
, machine_mode mode
)
525 rtx real
= rtx_alloc (CONST_DOUBLE
);
526 PUT_MODE (real
, mode
);
530 return lookup_const_double (real
);
533 /* Determine whether FIXED, a CONST_FIXED, already exists in the
534 hash table. If so, return its counterpart; otherwise add it
535 to the hash table and return it. */
538 lookup_const_fixed (rtx fixed
)
540 rtx
*slot
= const_fixed_htab
->find_slot (fixed
, INSERT
);
547 /* Return a CONST_FIXED rtx for a fixed-point value specified by
548 VALUE in mode MODE. */
551 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, machine_mode mode
)
553 rtx fixed
= rtx_alloc (CONST_FIXED
);
554 PUT_MODE (fixed
, mode
);
558 return lookup_const_fixed (fixed
);
561 #if TARGET_SUPPORTS_WIDE_INT == 0
562 /* Constructs double_int from rtx CST. */
565 rtx_to_double_int (const_rtx cst
)
569 if (CONST_INT_P (cst
))
570 r
= double_int::from_shwi (INTVAL (cst
));
571 else if (CONST_DOUBLE_AS_INT_P (cst
))
573 r
.low
= CONST_DOUBLE_LOW (cst
);
574 r
.high
= CONST_DOUBLE_HIGH (cst
);
583 #if TARGET_SUPPORTS_WIDE_INT
584 /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
585 If so, return its counterpart; otherwise add it to the hash table and
589 lookup_const_wide_int (rtx wint
)
591 rtx
*slot
= const_wide_int_htab
->find_slot (wint
, INSERT
);
599 /* Return an rtx constant for V, given that the constant has mode MODE.
600 The returned rtx will be a CONST_INT if V fits, otherwise it will be
601 a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
602 (if TARGET_SUPPORTS_WIDE_INT). */
605 immed_wide_int_const (const wide_int_ref
&v
, machine_mode mode
)
607 unsigned int len
= v
.get_len ();
608 unsigned int prec
= GET_MODE_PRECISION (mode
);
610 /* Allow truncation but not extension since we do not know if the
611 number is signed or unsigned. */
612 gcc_assert (prec
<= v
.get_precision ());
614 if (len
< 2 || prec
<= HOST_BITS_PER_WIDE_INT
)
615 return gen_int_mode (v
.elt (0), mode
);
617 #if TARGET_SUPPORTS_WIDE_INT
621 unsigned int blocks_needed
622 = (prec
+ HOST_BITS_PER_WIDE_INT
- 1) / HOST_BITS_PER_WIDE_INT
;
624 if (len
> blocks_needed
)
627 value
= const_wide_int_alloc (len
);
629 /* It is so tempting to just put the mode in here. Must control
631 PUT_MODE (value
, VOIDmode
);
632 CWI_PUT_NUM_ELEM (value
, len
);
634 for (i
= 0; i
< len
; i
++)
635 CONST_WIDE_INT_ELT (value
, i
) = v
.elt (i
);
637 return lookup_const_wide_int (value
);
640 return immed_double_const (v
.elt (0), v
.elt (1), mode
);
644 #if TARGET_SUPPORTS_WIDE_INT == 0
645 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
646 of ints: I0 is the low-order word and I1 is the high-order word.
647 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
648 implied upper bits are copies of the high bit of i1. The value
649 itself is neither signed nor unsigned. Do not use this routine for
650 non-integer modes; convert to REAL_VALUE_TYPE and use
651 CONST_DOUBLE_FROM_REAL_VALUE. */
654 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, machine_mode mode
)
659 /* There are the following cases (note that there are no modes with
660 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
662 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
664 2) If the value of the integer fits into HOST_WIDE_INT anyway
665 (i.e., i1 consists only from copies of the sign bit, and sign
666 of i0 and i1 are the same), then we return a CONST_INT for i0.
667 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
668 if (mode
!= VOIDmode
)
670 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
671 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
672 /* We can get a 0 for an error mark. */
673 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
674 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
675 || GET_MODE_CLASS (mode
) == MODE_POINTER_BOUNDS
);
677 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
678 return gen_int_mode (i0
, mode
);
681 /* If this integer fits in one word, return a CONST_INT. */
682 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
685 /* We use VOIDmode for integers. */
686 value
= rtx_alloc (CONST_DOUBLE
);
687 PUT_MODE (value
, VOIDmode
);
689 CONST_DOUBLE_LOW (value
) = i0
;
690 CONST_DOUBLE_HIGH (value
) = i1
;
692 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
693 XWINT (value
, i
) = 0;
695 return lookup_const_double (value
);
700 gen_rtx_REG (machine_mode mode
, unsigned int regno
)
702 /* In case the MD file explicitly references the frame pointer, have
703 all such references point to the same frame pointer. This is
704 used during frame pointer elimination to distinguish the explicit
705 references to these registers from pseudos that happened to be
708 If we have eliminated the frame pointer or arg pointer, we will
709 be using it as a normal register, for example as a spill
710 register. In such cases, we might be accessing it in a mode that
711 is not Pmode and therefore cannot use the pre-allocated rtx.
713 Also don't do this when we are making new REGs in reload, since
714 we don't want to get confused with the real pointers. */
716 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
718 if (regno
== FRAME_POINTER_REGNUM
719 && (!reload_completed
|| frame_pointer_needed
))
720 return frame_pointer_rtx
;
722 if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
723 && regno
== HARD_FRAME_POINTER_REGNUM
724 && (!reload_completed
|| frame_pointer_needed
))
725 return hard_frame_pointer_rtx
;
726 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
727 if (regno
== ARG_POINTER_REGNUM
)
728 return arg_pointer_rtx
;
730 #ifdef RETURN_ADDRESS_POINTER_REGNUM
731 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
732 return return_address_pointer_rtx
;
734 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
735 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
736 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
737 return pic_offset_table_rtx
;
738 if (regno
== STACK_POINTER_REGNUM
)
739 return stack_pointer_rtx
;
743 /* If the per-function register table has been set up, try to re-use
744 an existing entry in that table to avoid useless generation of RTL.
746 This code is disabled for now until we can fix the various backends
747 which depend on having non-shared hard registers in some cases. Long
748 term we want to re-enable this code as it can significantly cut down
749 on the amount of useless RTL that gets generated.
751 We'll also need to fix some code that runs after reload that wants to
752 set ORIGINAL_REGNO. */
757 && regno
< FIRST_PSEUDO_REGISTER
758 && reg_raw_mode
[regno
] == mode
)
759 return regno_reg_rtx
[regno
];
762 return gen_raw_REG (mode
, regno
);
766 gen_rtx_MEM (machine_mode mode
, rtx addr
)
768 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
770 /* This field is not cleared by the mere allocation of the rtx, so
777 /* Generate a memory referring to non-trapping constant memory. */
780 gen_const_mem (machine_mode mode
, rtx addr
)
782 rtx mem
= gen_rtx_MEM (mode
, addr
);
783 MEM_READONLY_P (mem
) = 1;
784 MEM_NOTRAP_P (mem
) = 1;
788 /* Generate a MEM referring to fixed portions of the frame, e.g., register
792 gen_frame_mem (machine_mode mode
, rtx addr
)
794 rtx mem
= gen_rtx_MEM (mode
, addr
);
795 MEM_NOTRAP_P (mem
) = 1;
796 set_mem_alias_set (mem
, get_frame_alias_set ());
800 /* Generate a MEM referring to a temporary use of the stack, not part
801 of the fixed stack frame. For example, something which is pushed
802 by a target splitter. */
804 gen_tmp_stack_mem (machine_mode mode
, rtx addr
)
806 rtx mem
= gen_rtx_MEM (mode
, addr
);
807 MEM_NOTRAP_P (mem
) = 1;
808 if (!cfun
->calls_alloca
)
809 set_mem_alias_set (mem
, get_frame_alias_set ());
813 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
814 this construct would be valid, and false otherwise. */
817 validate_subreg (machine_mode omode
, machine_mode imode
,
818 const_rtx reg
, unsigned int offset
)
820 unsigned int isize
= GET_MODE_SIZE (imode
);
821 unsigned int osize
= GET_MODE_SIZE (omode
);
823 /* All subregs must be aligned. */
824 if (offset
% osize
!= 0)
827 /* The subreg offset cannot be outside the inner object. */
831 /* ??? This should not be here. Temporarily continue to allow word_mode
832 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
833 Generally, backends are doing something sketchy but it'll take time to
835 if (omode
== word_mode
)
837 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
838 is the culprit here, and not the backends. */
839 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
841 /* Allow component subregs of complex and vector. Though given the below
842 extraction rules, it's not always clear what that means. */
843 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
844 && GET_MODE_INNER (imode
) == omode
)
846 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
847 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
848 represent this. It's questionable if this ought to be represented at
849 all -- why can't this all be hidden in post-reload splitters that make
850 arbitrarily mode changes to the registers themselves. */
851 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
853 /* Subregs involving floating point modes are not allowed to
854 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
855 (subreg:SI (reg:DF) 0) isn't. */
856 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
858 if (! (isize
== osize
859 /* LRA can use subreg to store a floating point value in
860 an integer mode. Although the floating point and the
861 integer modes need the same number of hard registers,
862 the size of floating point mode can be less than the
863 integer mode. LRA also uses subregs for a register
864 should be used in different mode in on insn. */
869 /* Paradoxical subregs must have offset zero. */
873 /* This is a normal subreg. Verify that the offset is representable. */
875 /* For hard registers, we already have most of these rules collected in
876 subreg_offset_representable_p. */
877 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
879 unsigned int regno
= REGNO (reg
);
881 #ifdef CANNOT_CHANGE_MODE_CLASS
882 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
883 && GET_MODE_INNER (imode
) == omode
)
885 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
889 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
892 /* For pseudo registers, we want most of the same checks. Namely:
893 If the register no larger than a word, the subreg must be lowpart.
894 If the register is larger than a word, the subreg must be the lowpart
895 of a subword. A subreg does *not* perform arbitrary bit extraction.
896 Given that we've already checked mode/offset alignment, we only have
897 to check subword subregs here. */
898 if (osize
< UNITS_PER_WORD
899 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
901 machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
902 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
903 if (offset
% UNITS_PER_WORD
!= low_off
)
910 gen_rtx_SUBREG (machine_mode mode
, rtx reg
, int offset
)
912 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
913 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
916 /* Generate a SUBREG representing the least-significant part of REG if MODE
917 is smaller than mode of REG, otherwise paradoxical SUBREG. */
920 gen_lowpart_SUBREG (machine_mode mode
, rtx reg
)
924 inmode
= GET_MODE (reg
);
925 if (inmode
== VOIDmode
)
927 return gen_rtx_SUBREG (mode
, reg
,
928 subreg_lowpart_offset (mode
, inmode
));
932 gen_rtx_VAR_LOCATION (machine_mode mode
, tree decl
, rtx loc
,
933 enum var_init_status status
)
935 rtx x
= gen_rtx_fmt_te (VAR_LOCATION
, mode
, decl
, loc
);
936 PAT_VAR_LOCATION_STATUS (x
) = status
;
941 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
944 gen_rtvec (int n
, ...)
952 /* Don't allocate an empty rtvec... */
959 rt_val
= rtvec_alloc (n
);
961 for (i
= 0; i
< n
; i
++)
962 rt_val
->elem
[i
] = va_arg (p
, rtx
);
969 gen_rtvec_v (int n
, rtx
*argp
)
974 /* Don't allocate an empty rtvec... */
978 rt_val
= rtvec_alloc (n
);
980 for (i
= 0; i
< n
; i
++)
981 rt_val
->elem
[i
] = *argp
++;
987 gen_rtvec_v (int n
, rtx_insn
**argp
)
992 /* Don't allocate an empty rtvec... */
996 rt_val
= rtvec_alloc (n
);
998 for (i
= 0; i
< n
; i
++)
999 rt_val
->elem
[i
] = *argp
++;
1005 /* Return the number of bytes between the start of an OUTER_MODE
1006 in-memory value and the start of an INNER_MODE in-memory value,
1007 given that the former is a lowpart of the latter. It may be a
1008 paradoxical lowpart, in which case the offset will be negative
1009 on big-endian targets. */
1012 byte_lowpart_offset (machine_mode outer_mode
,
1013 machine_mode inner_mode
)
1015 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
1016 return subreg_lowpart_offset (outer_mode
, inner_mode
);
1018 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
1021 /* Generate a REG rtx for a new pseudo register of mode MODE.
1022 This pseudo is assigned the next sequential register number. */
1025 gen_reg_rtx (machine_mode mode
)
1028 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
1030 gcc_assert (can_create_pseudo_p ());
1032 /* If a virtual register with bigger mode alignment is generated,
1033 increase stack alignment estimation because it might be spilled
1035 if (SUPPORTS_STACK_ALIGNMENT
1036 && crtl
->stack_alignment_estimated
< align
1037 && !crtl
->stack_realign_processed
)
1039 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
1040 if (crtl
->stack_alignment_estimated
< min_align
)
1041 crtl
->stack_alignment_estimated
= min_align
;
1044 if (generating_concat_p
1045 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
1046 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
1048 /* For complex modes, don't make a single pseudo.
1049 Instead, make a CONCAT of two pseudos.
1050 This allows noncontiguous allocation of the real and imaginary parts,
1051 which makes much better code. Besides, allocating DCmode
1052 pseudos overstrains reload on some machines like the 386. */
1053 rtx realpart
, imagpart
;
1054 machine_mode partmode
= GET_MODE_INNER (mode
);
1056 realpart
= gen_reg_rtx (partmode
);
1057 imagpart
= gen_reg_rtx (partmode
);
1058 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
1061 /* Do not call gen_reg_rtx with uninitialized crtl. */
1062 gcc_assert (crtl
->emit
.regno_pointer_align_length
);
1064 /* Make sure regno_pointer_align, and regno_reg_rtx are large
1065 enough to have an element for this pseudo reg number. */
1067 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
1069 int old_size
= crtl
->emit
.regno_pointer_align_length
;
1073 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
1074 memset (tmp
+ old_size
, 0, old_size
);
1075 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
1077 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
1078 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
1079 regno_reg_rtx
= new1
;
1081 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
1084 val
= gen_raw_REG (mode
, reg_rtx_no
);
1085 regno_reg_rtx
[reg_rtx_no
++] = val
;
1089 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1092 reg_is_parm_p (rtx reg
)
1096 gcc_assert (REG_P (reg
));
1097 decl
= REG_EXPR (reg
);
1098 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
1101 /* Update NEW with the same attributes as REG, but with OFFSET added
1102 to the REG_OFFSET. */
1105 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
1107 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
1108 REG_OFFSET (reg
) + offset
);
1111 /* Generate a register with same attributes as REG, but with OFFSET
1112 added to the REG_OFFSET. */
1115 gen_rtx_REG_offset (rtx reg
, machine_mode mode
, unsigned int regno
,
1118 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
1120 update_reg_offset (new_rtx
, reg
, offset
);
1124 /* Generate a new pseudo-register with the same attributes as REG, but
1125 with OFFSET added to the REG_OFFSET. */
1128 gen_reg_rtx_offset (rtx reg
, machine_mode mode
, int offset
)
1130 rtx new_rtx
= gen_reg_rtx (mode
);
1132 update_reg_offset (new_rtx
, reg
, offset
);
1136 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1137 new register is a (possibly paradoxical) lowpart of the old one. */
1140 adjust_reg_mode (rtx reg
, machine_mode mode
)
1142 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
1143 PUT_MODE (reg
, mode
);
1146 /* Copy REG's attributes from X, if X has any attributes. If REG and X
1147 have different modes, REG is a (possibly paradoxical) lowpart of X. */
1150 set_reg_attrs_from_value (rtx reg
, rtx x
)
1153 bool can_be_reg_pointer
= true;
1155 /* Don't call mark_reg_pointer for incompatible pointer sign
1157 while (GET_CODE (x
) == SIGN_EXTEND
1158 || GET_CODE (x
) == ZERO_EXTEND
1159 || GET_CODE (x
) == TRUNCATE
1160 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
1162 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
1163 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
1164 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
1165 can_be_reg_pointer
= false;
1170 /* Hard registers can be reused for multiple purposes within the same
1171 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1172 on them is wrong. */
1173 if (HARD_REGISTER_P (reg
))
1176 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1179 if (MEM_OFFSET_KNOWN_P (x
))
1180 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1181 MEM_OFFSET (x
) + offset
);
1182 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1183 mark_reg_pointer (reg
, 0);
1188 update_reg_offset (reg
, x
, offset
);
1189 if (can_be_reg_pointer
&& REG_POINTER (x
))
1190 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1194 /* Generate a REG rtx for a new pseudo register, copying the mode
1195 and attributes from X. */
1198 gen_reg_rtx_and_attrs (rtx x
)
1200 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1201 set_reg_attrs_from_value (reg
, x
);
1205 /* Set the register attributes for registers contained in PARM_RTX.
1206 Use needed values from memory attributes of MEM. */
1209 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1211 if (REG_P (parm_rtx
))
1212 set_reg_attrs_from_value (parm_rtx
, mem
);
1213 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1215 /* Check for a NULL entry in the first slot, used to indicate that the
1216 parameter goes both on the stack and in registers. */
1217 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1218 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1220 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1221 if (REG_P (XEXP (x
, 0)))
1222 REG_ATTRS (XEXP (x
, 0))
1223 = get_reg_attrs (MEM_EXPR (mem
),
1224 INTVAL (XEXP (x
, 1)));
1229 /* Set the REG_ATTRS for registers in value X, given that X represents
1233 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1235 if (GET_CODE (x
) == SUBREG
)
1237 gcc_assert (subreg_lowpart_p (x
));
1242 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1244 if (GET_CODE (x
) == CONCAT
)
1246 if (REG_P (XEXP (x
, 0)))
1247 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1248 if (REG_P (XEXP (x
, 1)))
1249 REG_ATTRS (XEXP (x
, 1))
1250 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1252 if (GET_CODE (x
) == PARALLEL
)
1256 /* Check for a NULL entry, used to indicate that the parameter goes
1257 both on the stack and in registers. */
1258 if (XEXP (XVECEXP (x
, 0, 0), 0))
1263 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1265 rtx y
= XVECEXP (x
, 0, i
);
1266 if (REG_P (XEXP (y
, 0)))
1267 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1272 /* Assign the RTX X to declaration T. */
1275 set_decl_rtl (tree t
, rtx x
)
1277 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1279 set_reg_attrs_for_decl_rtl (t
, x
);
1282 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1283 if the ABI requires the parameter to be passed by reference. */
1286 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1288 DECL_INCOMING_RTL (t
) = x
;
1289 if (x
&& !by_reference_p
)
1290 set_reg_attrs_for_decl_rtl (t
, x
);
1293 /* Identify REG (which may be a CONCAT) as a user register. */
1296 mark_user_reg (rtx reg
)
1298 if (GET_CODE (reg
) == CONCAT
)
1300 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1301 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1305 gcc_assert (REG_P (reg
));
1306 REG_USERVAR_P (reg
) = 1;
1310 /* Identify REG as a probable pointer register and show its alignment
1311 as ALIGN, if nonzero. */
1314 mark_reg_pointer (rtx reg
, int align
)
1316 if (! REG_POINTER (reg
))
1318 REG_POINTER (reg
) = 1;
1321 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1323 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1324 /* We can no-longer be sure just how aligned this pointer is. */
1325 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1328 /* Return 1 plus largest pseudo reg number used in the current function. */
1336 /* Return 1 + the largest label number used so far in the current function. */
1339 max_label_num (void)
1344 /* Return first label number used in this function (if any were used). */
1347 get_first_label_num (void)
1349 return first_label_num
;
1352 /* If the rtx for label was created during the expansion of a nested
1353 function, then first_label_num won't include this label number.
1354 Fix this now so that array indices work later. */
1357 maybe_set_first_label_num (rtx x
)
1359 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1360 first_label_num
= CODE_LABEL_NUMBER (x
);
1363 /* Return a value representing some low-order bits of X, where the number
1364 of low-order bits is given by MODE. Note that no conversion is done
1365 between floating-point and fixed-point values, rather, the bit
1366 representation is returned.
1368 This function handles the cases in common between gen_lowpart, below,
1369 and two variants in cse.c and combine.c. These are the cases that can
1370 be safely handled at all points in the compilation.
1372 If this is not a case we can handle, return 0. */
1375 gen_lowpart_common (machine_mode mode
, rtx x
)
1377 int msize
= GET_MODE_SIZE (mode
);
1380 machine_mode innermode
;
1382 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1383 so we have to make one up. Yuk. */
1384 innermode
= GET_MODE (x
);
1386 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1387 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1388 else if (innermode
== VOIDmode
)
1389 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1391 xsize
= GET_MODE_SIZE (innermode
);
1393 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1395 if (innermode
== mode
)
1398 /* MODE must occupy no more words than the mode of X. */
1399 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1400 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1403 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1404 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1407 offset
= subreg_lowpart_offset (mode
, innermode
);
1409 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1410 && (GET_MODE_CLASS (mode
) == MODE_INT
1411 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1413 /* If we are getting the low-order part of something that has been
1414 sign- or zero-extended, we can either just use the object being
1415 extended or make a narrower extension. If we want an even smaller
1416 piece than the size of the object being extended, call ourselves
1419 This case is used mostly by combine and cse. */
1421 if (GET_MODE (XEXP (x
, 0)) == mode
)
1423 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1424 return gen_lowpart_common (mode
, XEXP (x
, 0));
1425 else if (msize
< xsize
)
1426 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1428 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1429 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1430 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1431 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1433 /* Otherwise, we can't do this. */
1438 gen_highpart (machine_mode mode
, rtx x
)
1440 unsigned int msize
= GET_MODE_SIZE (mode
);
1443 /* This case loses if X is a subreg. To catch bugs early,
1444 complain if an invalid MODE is used even in other cases. */
1445 gcc_assert (msize
<= UNITS_PER_WORD
1446 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1448 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1449 subreg_highpart_offset (mode
, GET_MODE (x
)));
1450 gcc_assert (result
);
1452 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1453 the target if we have a MEM. gen_highpart must return a valid operand,
1454 emitting code if necessary to do so. */
1457 result
= validize_mem (result
);
1458 gcc_assert (result
);
1464 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1465 be VOIDmode constant. */
1467 gen_highpart_mode (machine_mode outermode
, machine_mode innermode
, rtx exp
)
1469 if (GET_MODE (exp
) != VOIDmode
)
1471 gcc_assert (GET_MODE (exp
) == innermode
);
1472 return gen_highpart (outermode
, exp
);
1474 return simplify_gen_subreg (outermode
, exp
, innermode
,
1475 subreg_highpart_offset (outermode
, innermode
));
1478 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1481 subreg_lowpart_offset (machine_mode outermode
, machine_mode innermode
)
1483 unsigned int offset
= 0;
1484 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1488 if (WORDS_BIG_ENDIAN
)
1489 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1490 if (BYTES_BIG_ENDIAN
)
1491 offset
+= difference
% UNITS_PER_WORD
;
1497 /* Return offset in bytes to get OUTERMODE high part
1498 of the value in mode INNERMODE stored in memory in target format. */
1500 subreg_highpart_offset (machine_mode outermode
, machine_mode innermode
)
1502 unsigned int offset
= 0;
1503 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1505 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1509 if (! WORDS_BIG_ENDIAN
)
1510 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1511 if (! BYTES_BIG_ENDIAN
)
1512 offset
+= difference
% UNITS_PER_WORD
;
1518 /* Return 1 iff X, assumed to be a SUBREG,
1519 refers to the least significant part of its containing reg.
1520 If X is not a SUBREG, always return 1 (it is its own low part!). */
1523 subreg_lowpart_p (const_rtx x
)
1525 if (GET_CODE (x
) != SUBREG
)
1527 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1530 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1531 == SUBREG_BYTE (x
));
1534 /* Return true if X is a paradoxical subreg, false otherwise. */
1536 paradoxical_subreg_p (const_rtx x
)
1538 if (GET_CODE (x
) != SUBREG
)
1540 return (GET_MODE_PRECISION (GET_MODE (x
))
1541 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1544 /* Return subword OFFSET of operand OP.
1545 The word number, OFFSET, is interpreted as the word number starting
1546 at the low-order address. OFFSET 0 is the low-order word if not
1547 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1549 If we cannot extract the required word, we return zero. Otherwise,
1550 an rtx corresponding to the requested word will be returned.
1552 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1553 reload has completed, a valid address will always be returned. After
1554 reload, if a valid address cannot be returned, we return zero.
1556 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1557 it is the responsibility of the caller.
1559 MODE is the mode of OP in case it is a CONST_INT.
1561 ??? This is still rather broken for some cases. The problem for the
1562 moment is that all callers of this thing provide no 'goal mode' to
1563 tell us to work with. This exists because all callers were written
1564 in a word based SUBREG world.
1565 Now use of this function can be deprecated by simplify_subreg in most
1570 operand_subword (rtx op
, unsigned int offset
, int validate_address
, machine_mode mode
)
1572 if (mode
== VOIDmode
)
1573 mode
= GET_MODE (op
);
1575 gcc_assert (mode
!= VOIDmode
);
1577 /* If OP is narrower than a word, fail. */
1579 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1582 /* If we want a word outside OP, return zero. */
1584 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1587 /* Form a new MEM at the requested address. */
1590 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1592 if (! validate_address
)
1595 else if (reload_completed
)
1597 if (! strict_memory_address_addr_space_p (word_mode
,
1599 MEM_ADDR_SPACE (op
)))
1603 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1606 /* Rest can be handled by simplify_subreg. */
1607 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1610 /* Similar to `operand_subword', but never return 0. If we can't
1611 extract the required subword, put OP into a register and try again.
1612 The second attempt must succeed. We always validate the address in
1615 MODE is the mode of OP, in case it is CONST_INT. */
1618 operand_subword_force (rtx op
, unsigned int offset
, machine_mode mode
)
1620 rtx result
= operand_subword (op
, offset
, 1, mode
);
1625 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1627 /* If this is a register which can not be accessed by words, copy it
1628 to a pseudo register. */
1630 op
= copy_to_reg (op
);
1632 op
= force_reg (mode
, op
);
1635 result
= operand_subword (op
, offset
, 1, mode
);
1636 gcc_assert (result
);
1641 /* Returns 1 if both MEM_EXPR can be considered equal
1645 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1650 if (! expr1
|| ! expr2
)
1653 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1656 return operand_equal_p (expr1
, expr2
, 0);
1659 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1660 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1664 get_mem_align_offset (rtx mem
, unsigned int align
)
1667 unsigned HOST_WIDE_INT offset
;
1669 /* This function can't use
1670 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1671 || (MAX (MEM_ALIGN (mem),
1672 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1676 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1678 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1679 for <variable>. get_inner_reference doesn't handle it and
1680 even if it did, the alignment in that case needs to be determined
1681 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1682 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1683 isn't sufficiently aligned, the object it is in might be. */
1684 gcc_assert (MEM_P (mem
));
1685 expr
= MEM_EXPR (mem
);
1686 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1689 offset
= MEM_OFFSET (mem
);
1692 if (DECL_ALIGN (expr
) < align
)
1695 else if (INDIRECT_REF_P (expr
))
1697 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1700 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1704 tree inner
= TREE_OPERAND (expr
, 0);
1705 tree field
= TREE_OPERAND (expr
, 1);
1706 tree byte_offset
= component_ref_field_offset (expr
);
1707 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1710 || !tree_fits_uhwi_p (byte_offset
)
1711 || !tree_fits_uhwi_p (bit_offset
))
1714 offset
+= tree_to_uhwi (byte_offset
);
1715 offset
+= tree_to_uhwi (bit_offset
) / BITS_PER_UNIT
;
1717 if (inner
== NULL_TREE
)
1719 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1720 < (unsigned int) align
)
1724 else if (DECL_P (inner
))
1726 if (DECL_ALIGN (inner
) < align
)
1730 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1738 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1741 /* Given REF (a MEM) and T, either the type of X or the expression
1742 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1743 if we are making a new object of this type. BITPOS is nonzero if
1744 there is an offset outstanding on T that will be applied later. */
1747 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1748 HOST_WIDE_INT bitpos
)
1750 HOST_WIDE_INT apply_bitpos
= 0;
1752 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1755 /* It can happen that type_for_mode was given a mode for which there
1756 is no language-level type. In which case it returns NULL, which
1761 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1762 if (type
== error_mark_node
)
1765 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1766 wrong answer, as it assumes that DECL_RTL already has the right alias
1767 info. Callers should not set DECL_RTL until after the call to
1768 set_mem_attributes. */
1769 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1771 memset (&attrs
, 0, sizeof (attrs
));
1773 /* Get the alias set from the expression or type (perhaps using a
1774 front-end routine) and use it. */
1775 attrs
.alias
= get_alias_set (t
);
1777 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1778 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1780 /* Default values from pre-existing memory attributes if present. */
1781 refattrs
= MEM_ATTRS (ref
);
1784 /* ??? Can this ever happen? Calling this routine on a MEM that
1785 already carries memory attributes should probably be invalid. */
1786 attrs
.expr
= refattrs
->expr
;
1787 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1788 attrs
.offset
= refattrs
->offset
;
1789 attrs
.size_known_p
= refattrs
->size_known_p
;
1790 attrs
.size
= refattrs
->size
;
1791 attrs
.align
= refattrs
->align
;
1794 /* Otherwise, default values from the mode of the MEM reference. */
1797 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1798 gcc_assert (!defattrs
->expr
);
1799 gcc_assert (!defattrs
->offset_known_p
);
1801 /* Respect mode size. */
1802 attrs
.size_known_p
= defattrs
->size_known_p
;
1803 attrs
.size
= defattrs
->size
;
1804 /* ??? Is this really necessary? We probably should always get
1805 the size from the type below. */
1807 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1808 if T is an object, always compute the object alignment below. */
1810 attrs
.align
= defattrs
->align
;
1812 attrs
.align
= BITS_PER_UNIT
;
1813 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1814 e.g. if the type carries an alignment attribute. Should we be
1815 able to simply always use TYPE_ALIGN? */
1818 /* We can set the alignment from the type if we are making an object,
1819 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1820 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1821 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1823 /* If the size is known, we can set that. */
1824 tree new_size
= TYPE_SIZE_UNIT (type
);
1826 /* The address-space is that of the type. */
1827 as
= TYPE_ADDR_SPACE (type
);
1829 /* If T is not a type, we may be able to deduce some more information about
1835 if (TREE_THIS_VOLATILE (t
))
1836 MEM_VOLATILE_P (ref
) = 1;
1838 /* Now remove any conversions: they don't change what the underlying
1839 object is. Likewise for SAVE_EXPR. */
1840 while (CONVERT_EXPR_P (t
)
1841 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1842 || TREE_CODE (t
) == SAVE_EXPR
)
1843 t
= TREE_OPERAND (t
, 0);
1845 /* Note whether this expression can trap. */
1846 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1848 base
= get_base_address (t
);
1852 && TREE_READONLY (base
)
1853 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1854 && !TREE_THIS_VOLATILE (base
))
1855 MEM_READONLY_P (ref
) = 1;
1857 /* Mark static const strings readonly as well. */
1858 if (TREE_CODE (base
) == STRING_CST
1859 && TREE_READONLY (base
)
1860 && TREE_STATIC (base
))
1861 MEM_READONLY_P (ref
) = 1;
1863 /* Address-space information is on the base object. */
1864 if (TREE_CODE (base
) == MEM_REF
1865 || TREE_CODE (base
) == TARGET_MEM_REF
)
1866 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1869 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1872 /* If this expression uses it's parent's alias set, mark it such
1873 that we won't change it. */
1874 if (component_uses_parent_alias_set_from (t
) != NULL_TREE
)
1875 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1877 /* If this is a decl, set the attributes of the MEM from it. */
1881 attrs
.offset_known_p
= true;
1883 apply_bitpos
= bitpos
;
1884 new_size
= DECL_SIZE_UNIT (t
);
1887 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1888 else if (CONSTANT_CLASS_P (t
))
1891 /* If this is a field reference, record it. */
1892 else if (TREE_CODE (t
) == COMPONENT_REF
)
1895 attrs
.offset_known_p
= true;
1897 apply_bitpos
= bitpos
;
1898 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1899 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1902 /* If this is an array reference, look for an outer field reference. */
1903 else if (TREE_CODE (t
) == ARRAY_REF
)
1905 tree off_tree
= size_zero_node
;
1906 /* We can't modify t, because we use it at the end of the
1912 tree index
= TREE_OPERAND (t2
, 1);
1913 tree low_bound
= array_ref_low_bound (t2
);
1914 tree unit_size
= array_ref_element_size (t2
);
1916 /* We assume all arrays have sizes that are a multiple of a byte.
1917 First subtract the lower bound, if any, in the type of the
1918 index, then convert to sizetype and multiply by the size of
1919 the array element. */
1920 if (! integer_zerop (low_bound
))
1921 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1924 off_tree
= size_binop (PLUS_EXPR
,
1925 size_binop (MULT_EXPR
,
1926 fold_convert (sizetype
,
1930 t2
= TREE_OPERAND (t2
, 0);
1932 while (TREE_CODE (t2
) == ARRAY_REF
);
1935 || TREE_CODE (t2
) == COMPONENT_REF
)
1938 attrs
.offset_known_p
= false;
1939 if (tree_fits_uhwi_p (off_tree
))
1941 attrs
.offset_known_p
= true;
1942 attrs
.offset
= tree_to_uhwi (off_tree
);
1943 apply_bitpos
= bitpos
;
1946 /* Else do not record a MEM_EXPR. */
1949 /* If this is an indirect reference, record it. */
1950 else if (TREE_CODE (t
) == MEM_REF
1951 || TREE_CODE (t
) == TARGET_MEM_REF
)
1954 attrs
.offset_known_p
= true;
1956 apply_bitpos
= bitpos
;
1959 /* Compute the alignment. */
1960 unsigned int obj_align
;
1961 unsigned HOST_WIDE_INT obj_bitpos
;
1962 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1963 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1964 if (obj_bitpos
!= 0)
1965 obj_align
= (obj_bitpos
& -obj_bitpos
);
1966 attrs
.align
= MAX (attrs
.align
, obj_align
);
1969 if (tree_fits_uhwi_p (new_size
))
1971 attrs
.size_known_p
= true;
1972 attrs
.size
= tree_to_uhwi (new_size
);
1975 /* If we modified OFFSET based on T, then subtract the outstanding
1976 bit position offset. Similarly, increase the size of the accessed
1977 object to contain the negative offset. */
1980 gcc_assert (attrs
.offset_known_p
);
1981 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1982 if (attrs
.size_known_p
)
1983 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1986 /* Now set the attributes we computed above. */
1987 attrs
.addrspace
= as
;
1988 set_mem_attrs (ref
, &attrs
);
1992 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1994 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1997 /* Set the alias set of MEM to SET. */
2000 set_mem_alias_set (rtx mem
, alias_set_type set
)
2002 struct mem_attrs attrs
;
2004 /* If the new and old alias sets don't conflict, something is wrong. */
2005 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
2006 attrs
= *get_mem_attrs (mem
);
2008 set_mem_attrs (mem
, &attrs
);
2011 /* Set the address space of MEM to ADDRSPACE (target-defined). */
2014 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
2016 struct mem_attrs attrs
;
2018 attrs
= *get_mem_attrs (mem
);
2019 attrs
.addrspace
= addrspace
;
2020 set_mem_attrs (mem
, &attrs
);
2023 /* Set the alignment of MEM to ALIGN bits. */
2026 set_mem_align (rtx mem
, unsigned int align
)
2028 struct mem_attrs attrs
;
2030 attrs
= *get_mem_attrs (mem
);
2031 attrs
.align
= align
;
2032 set_mem_attrs (mem
, &attrs
);
2035 /* Set the expr for MEM to EXPR. */
2038 set_mem_expr (rtx mem
, tree expr
)
2040 struct mem_attrs attrs
;
2042 attrs
= *get_mem_attrs (mem
);
2044 set_mem_attrs (mem
, &attrs
);
2047 /* Set the offset of MEM to OFFSET. */
2050 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
2052 struct mem_attrs attrs
;
2054 attrs
= *get_mem_attrs (mem
);
2055 attrs
.offset_known_p
= true;
2056 attrs
.offset
= offset
;
2057 set_mem_attrs (mem
, &attrs
);
2060 /* Clear the offset of MEM. */
2063 clear_mem_offset (rtx mem
)
2065 struct mem_attrs attrs
;
2067 attrs
= *get_mem_attrs (mem
);
2068 attrs
.offset_known_p
= false;
2069 set_mem_attrs (mem
, &attrs
);
2072 /* Set the size of MEM to SIZE. */
2075 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
2077 struct mem_attrs attrs
;
2079 attrs
= *get_mem_attrs (mem
);
2080 attrs
.size_known_p
= true;
2082 set_mem_attrs (mem
, &attrs
);
2085 /* Clear the size of MEM. */
2088 clear_mem_size (rtx mem
)
2090 struct mem_attrs attrs
;
2092 attrs
= *get_mem_attrs (mem
);
2093 attrs
.size_known_p
= false;
2094 set_mem_attrs (mem
, &attrs
);
2097 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2098 and its address changed to ADDR. (VOIDmode means don't change the mode.
2099 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2100 returned memory location is required to be valid. INPLACE is true if any
2101 changes can be made directly to MEMREF or false if MEMREF must be treated
2104 The memory attributes are not changed. */
2107 change_address_1 (rtx memref
, machine_mode mode
, rtx addr
, int validate
,
2113 gcc_assert (MEM_P (memref
));
2114 as
= MEM_ADDR_SPACE (memref
);
2115 if (mode
== VOIDmode
)
2116 mode
= GET_MODE (memref
);
2118 addr
= XEXP (memref
, 0);
2119 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
2120 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2123 /* Don't validate address for LRA. LRA can make the address valid
2124 by itself in most efficient way. */
2125 if (validate
&& !lra_in_progress
)
2127 if (reload_in_progress
|| reload_completed
)
2128 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2130 addr
= memory_address_addr_space (mode
, addr
, as
);
2133 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2138 XEXP (memref
, 0) = addr
;
2142 new_rtx
= gen_rtx_MEM (mode
, addr
);
2143 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2147 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2148 way we are changing MEMREF, so we only preserve the alias set. */
2151 change_address (rtx memref
, machine_mode mode
, rtx addr
)
2153 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1, false);
2154 machine_mode mmode
= GET_MODE (new_rtx
);
2155 struct mem_attrs attrs
, *defattrs
;
2157 attrs
= *get_mem_attrs (memref
);
2158 defattrs
= mode_mem_attrs
[(int) mmode
];
2159 attrs
.expr
= NULL_TREE
;
2160 attrs
.offset_known_p
= false;
2161 attrs
.size_known_p
= defattrs
->size_known_p
;
2162 attrs
.size
= defattrs
->size
;
2163 attrs
.align
= defattrs
->align
;
2165 /* If there are no changes, just return the original memory reference. */
2166 if (new_rtx
== memref
)
2168 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2171 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2172 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2175 set_mem_attrs (new_rtx
, &attrs
);
2179 /* Return a memory reference like MEMREF, but with its mode changed
2180 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2181 nonzero, the memory address is forced to be valid.
2182 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2183 and the caller is responsible for adjusting MEMREF base register.
2184 If ADJUST_OBJECT is zero, the underlying object associated with the
2185 memory reference is left unchanged and the caller is responsible for
2186 dealing with it. Otherwise, if the new memory reference is outside
2187 the underlying object, even partially, then the object is dropped.
2188 SIZE, if nonzero, is the size of an access in cases where MODE
2189 has no inherent size. */
2192 adjust_address_1 (rtx memref
, machine_mode mode
, HOST_WIDE_INT offset
,
2193 int validate
, int adjust_address
, int adjust_object
,
2196 rtx addr
= XEXP (memref
, 0);
2198 machine_mode address_mode
;
2200 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2201 unsigned HOST_WIDE_INT max_align
;
2202 #ifdef POINTERS_EXTEND_UNSIGNED
2203 machine_mode pointer_mode
2204 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2207 /* VOIDmode means no mode change for change_address_1. */
2208 if (mode
== VOIDmode
)
2209 mode
= GET_MODE (memref
);
2211 /* Take the size of non-BLKmode accesses from the mode. */
2212 defattrs
= mode_mem_attrs
[(int) mode
];
2213 if (defattrs
->size_known_p
)
2214 size
= defattrs
->size
;
2216 /* If there are no changes, just return the original memory reference. */
2217 if (mode
== GET_MODE (memref
) && !offset
2218 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2219 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2223 /* ??? Prefer to create garbage instead of creating shared rtl.
2224 This may happen even if offset is nonzero -- consider
2225 (plus (plus reg reg) const_int) -- so do this always. */
2226 addr
= copy_rtx (addr
);
2228 /* Convert a possibly large offset to a signed value within the
2229 range of the target address space. */
2230 address_mode
= get_address_mode (memref
);
2231 pbits
= GET_MODE_BITSIZE (address_mode
);
2232 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2234 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2235 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2241 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2242 object, we can merge it into the LO_SUM. */
2243 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2245 && (unsigned HOST_WIDE_INT
) offset
2246 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2247 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2248 plus_constant (address_mode
,
2249 XEXP (addr
, 1), offset
));
2250 #ifdef POINTERS_EXTEND_UNSIGNED
2251 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2252 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2253 the fact that pointers are not allowed to overflow. */
2254 else if (POINTERS_EXTEND_UNSIGNED
> 0
2255 && GET_CODE (addr
) == ZERO_EXTEND
2256 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2257 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2258 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2259 plus_constant (pointer_mode
,
2260 XEXP (addr
, 0), offset
));
2263 addr
= plus_constant (address_mode
, addr
, offset
);
2266 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
, false);
2268 /* If the address is a REG, change_address_1 rightfully returns memref,
2269 but this would destroy memref's MEM_ATTRS. */
2270 if (new_rtx
== memref
&& offset
!= 0)
2271 new_rtx
= copy_rtx (new_rtx
);
2273 /* Conservatively drop the object if we don't know where we start from. */
2274 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2276 attrs
.expr
= NULL_TREE
;
2280 /* Compute the new values of the memory attributes due to this adjustment.
2281 We add the offsets and update the alignment. */
2282 if (attrs
.offset_known_p
)
2284 attrs
.offset
+= offset
;
2286 /* Drop the object if the new left end is not within its bounds. */
2287 if (adjust_object
&& attrs
.offset
< 0)
2289 attrs
.expr
= NULL_TREE
;
2294 /* Compute the new alignment by taking the MIN of the alignment and the
2295 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2299 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2300 attrs
.align
= MIN (attrs
.align
, max_align
);
2305 /* Drop the object if the new right end is not within its bounds. */
2306 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2308 attrs
.expr
= NULL_TREE
;
2311 attrs
.size_known_p
= true;
2314 else if (attrs
.size_known_p
)
2316 gcc_assert (!adjust_object
);
2317 attrs
.size
-= offset
;
2318 /* ??? The store_by_pieces machinery generates negative sizes,
2319 so don't assert for that here. */
2322 set_mem_attrs (new_rtx
, &attrs
);
2327 /* Return a memory reference like MEMREF, but with its mode changed
2328 to MODE and its address changed to ADDR, which is assumed to be
2329 MEMREF offset by OFFSET bytes. If VALIDATE is
2330 nonzero, the memory address is forced to be valid. */
2333 adjust_automodify_address_1 (rtx memref
, machine_mode mode
, rtx addr
,
2334 HOST_WIDE_INT offset
, int validate
)
2336 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
, false);
2337 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2340 /* Return a memory reference like MEMREF, but whose address is changed by
2341 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2342 known to be in OFFSET (possibly 1). */
2345 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2347 rtx new_rtx
, addr
= XEXP (memref
, 0);
2348 machine_mode address_mode
;
2349 struct mem_attrs attrs
, *defattrs
;
2351 attrs
= *get_mem_attrs (memref
);
2352 address_mode
= get_address_mode (memref
);
2353 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2355 /* At this point we don't know _why_ the address is invalid. It
2356 could have secondary memory references, multiplies or anything.
2358 However, if we did go and rearrange things, we can wind up not
2359 being able to recognize the magic around pic_offset_table_rtx.
2360 This stuff is fragile, and is yet another example of why it is
2361 bad to expose PIC machinery too early. */
2362 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2364 && GET_CODE (addr
) == PLUS
2365 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2367 addr
= force_reg (GET_MODE (addr
), addr
);
2368 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2371 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2372 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1, false);
2374 /* If there are no changes, just return the original memory reference. */
2375 if (new_rtx
== memref
)
2378 /* Update the alignment to reflect the offset. Reset the offset, which
2380 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2381 attrs
.offset_known_p
= false;
2382 attrs
.size_known_p
= defattrs
->size_known_p
;
2383 attrs
.size
= defattrs
->size
;
2384 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2385 set_mem_attrs (new_rtx
, &attrs
);
2389 /* Return a memory reference like MEMREF, but with its address changed to
2390 ADDR. The caller is asserting that the actual piece of memory pointed
2391 to is the same, just the form of the address is being changed, such as
2392 by putting something into a register. INPLACE is true if any changes
2393 can be made directly to MEMREF or false if MEMREF must be treated as
2397 replace_equiv_address (rtx memref
, rtx addr
, bool inplace
)
2399 /* change_address_1 copies the memory attribute structure without change
2400 and that's exactly what we want here. */
2401 update_temp_slot_address (XEXP (memref
, 0), addr
);
2402 return change_address_1 (memref
, VOIDmode
, addr
, 1, inplace
);
2405 /* Likewise, but the reference is not required to be valid. */
2408 replace_equiv_address_nv (rtx memref
, rtx addr
, bool inplace
)
2410 return change_address_1 (memref
, VOIDmode
, addr
, 0, inplace
);
2413 /* Return a memory reference like MEMREF, but with its mode widened to
2414 MODE and offset by OFFSET. This would be used by targets that e.g.
2415 cannot issue QImode memory operations and have to use SImode memory
2416 operations plus masking logic. */
2419 widen_memory_access (rtx memref
, machine_mode mode
, HOST_WIDE_INT offset
)
2421 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2422 struct mem_attrs attrs
;
2423 unsigned int size
= GET_MODE_SIZE (mode
);
2425 /* If there are no changes, just return the original memory reference. */
2426 if (new_rtx
== memref
)
2429 attrs
= *get_mem_attrs (new_rtx
);
2431 /* If we don't know what offset we were at within the expression, then
2432 we can't know if we've overstepped the bounds. */
2433 if (! attrs
.offset_known_p
)
2434 attrs
.expr
= NULL_TREE
;
2438 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2440 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2441 tree offset
= component_ref_field_offset (attrs
.expr
);
2443 if (! DECL_SIZE_UNIT (field
))
2445 attrs
.expr
= NULL_TREE
;
2449 /* Is the field at least as large as the access? If so, ok,
2450 otherwise strip back to the containing structure. */
2451 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2452 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2453 && attrs
.offset
>= 0)
2456 if (! tree_fits_uhwi_p (offset
))
2458 attrs
.expr
= NULL_TREE
;
2462 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2463 attrs
.offset
+= tree_to_uhwi (offset
);
2464 attrs
.offset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
2467 /* Similarly for the decl. */
2468 else if (DECL_P (attrs
.expr
)
2469 && DECL_SIZE_UNIT (attrs
.expr
)
2470 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2471 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2472 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2476 /* The widened memory access overflows the expression, which means
2477 that it could alias another expression. Zap it. */
2478 attrs
.expr
= NULL_TREE
;
2484 attrs
.offset_known_p
= false;
2486 /* The widened memory may alias other stuff, so zap the alias set. */
2487 /* ??? Maybe use get_alias_set on any remaining expression. */
2489 attrs
.size_known_p
= true;
2491 set_mem_attrs (new_rtx
, &attrs
);
2495 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2496 static GTY(()) tree spill_slot_decl
;
2499 get_spill_slot_decl (bool force_build_p
)
2501 tree d
= spill_slot_decl
;
2503 struct mem_attrs attrs
;
2505 if (d
|| !force_build_p
)
2508 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2509 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2510 DECL_ARTIFICIAL (d
) = 1;
2511 DECL_IGNORED_P (d
) = 1;
2513 spill_slot_decl
= d
;
2515 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2516 MEM_NOTRAP_P (rd
) = 1;
2517 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2518 attrs
.alias
= new_alias_set ();
2520 set_mem_attrs (rd
, &attrs
);
2521 SET_DECL_RTL (d
, rd
);
2526 /* Given MEM, a result from assign_stack_local, fill in the memory
2527 attributes as appropriate for a register allocator spill slot.
2528 These slots are not aliasable by other memory. We arrange for
2529 them all to use a single MEM_EXPR, so that the aliasing code can
2530 work properly in the case of shared spill slots. */
2533 set_mem_attrs_for_spill (rtx mem
)
2535 struct mem_attrs attrs
;
2538 attrs
= *get_mem_attrs (mem
);
2539 attrs
.expr
= get_spill_slot_decl (true);
2540 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2541 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2543 /* We expect the incoming memory to be of the form:
2544 (mem:MODE (plus (reg sfp) (const_int offset)))
2545 with perhaps the plus missing for offset = 0. */
2546 addr
= XEXP (mem
, 0);
2547 attrs
.offset_known_p
= true;
2549 if (GET_CODE (addr
) == PLUS
2550 && CONST_INT_P (XEXP (addr
, 1)))
2551 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2553 set_mem_attrs (mem
, &attrs
);
2554 MEM_NOTRAP_P (mem
) = 1;
2557 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2560 gen_label_rtx (void)
2562 return as_a
<rtx_code_label
*> (
2563 gen_rtx_CODE_LABEL (VOIDmode
, NULL_RTX
, NULL_RTX
,
2564 NULL
, label_num
++, NULL
));
2567 /* For procedure integration. */
2569 /* Install new pointers to the first and last insns in the chain.
2570 Also, set cur_insn_uid to one higher than the last in use.
2571 Used for an inline-procedure after copying the insn chain. */
2574 set_new_first_and_last_insn (rtx_insn
*first
, rtx_insn
*last
)
2578 set_first_insn (first
);
2579 set_last_insn (last
);
2582 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2584 int debug_count
= 0;
2586 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2587 cur_debug_insn_uid
= 0;
2589 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2590 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2591 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2594 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2595 if (DEBUG_INSN_P (insn
))
2600 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2602 cur_debug_insn_uid
++;
2605 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2606 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2611 /* Go through all the RTL insn bodies and copy any invalid shared
2612 structure. This routine should only be called once. */
2615 unshare_all_rtl_1 (rtx_insn
*insn
)
2617 /* Unshare just about everything else. */
2618 unshare_all_rtl_in_chain (insn
);
2620 /* Make sure the addresses of stack slots found outside the insn chain
2621 (such as, in DECL_RTL of a variable) are not shared
2622 with the insn chain.
2624 This special care is necessary when the stack slot MEM does not
2625 actually appear in the insn chain. If it does appear, its address
2626 is unshared from all else at that point. */
2627 stack_slot_list
= safe_as_a
<rtx_expr_list
*> (
2628 copy_rtx_if_shared (stack_slot_list
));
2631 /* Go through all the RTL insn bodies and copy any invalid shared
2632 structure, again. This is a fairly expensive thing to do so it
2633 should be done sparingly. */
2636 unshare_all_rtl_again (rtx_insn
*insn
)
2641 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2644 reset_used_flags (PATTERN (p
));
2645 reset_used_flags (REG_NOTES (p
));
2647 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2650 /* Make sure that virtual stack slots are not shared. */
2651 set_used_decls (DECL_INITIAL (cfun
->decl
));
2653 /* Make sure that virtual parameters are not shared. */
2654 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2655 set_used_flags (DECL_RTL (decl
));
2657 reset_used_flags (stack_slot_list
);
2659 unshare_all_rtl_1 (insn
);
2663 unshare_all_rtl (void)
2665 unshare_all_rtl_1 (get_insns ());
2670 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2671 Recursively does the same for subexpressions. */
2674 verify_rtx_sharing (rtx orig
, rtx insn
)
2679 const char *format_ptr
;
2684 code
= GET_CODE (x
);
2686 /* These types may be freely shared. */
2702 /* SCRATCH must be shared because they represent distinct values. */
2705 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2706 clobbers or clobbers of hard registers that originated as pseudos.
2707 This is needed to allow safe register renaming. */
2708 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2709 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2714 if (shared_const_p (orig
))
2719 /* A MEM is allowed to be shared if its address is constant. */
2720 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2721 || reload_completed
|| reload_in_progress
)
2730 /* This rtx may not be shared. If it has already been seen,
2731 replace it with a copy of itself. */
2732 #ifdef ENABLE_CHECKING
2733 if (RTX_FLAG (x
, used
))
2735 error ("invalid rtl sharing found in the insn");
2737 error ("shared rtx");
2739 internal_error ("internal consistency failure");
2742 gcc_assert (!RTX_FLAG (x
, used
));
2744 RTX_FLAG (x
, used
) = 1;
2746 /* Now scan the subexpressions recursively. */
2748 format_ptr
= GET_RTX_FORMAT (code
);
2750 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2752 switch (*format_ptr
++)
2755 verify_rtx_sharing (XEXP (x
, i
), insn
);
2759 if (XVEC (x
, i
) != NULL
)
2762 int len
= XVECLEN (x
, i
);
2764 for (j
= 0; j
< len
; j
++)
2766 /* We allow sharing of ASM_OPERANDS inside single
2768 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2769 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2771 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2773 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2782 /* Reset used-flags for INSN. */
2785 reset_insn_used_flags (rtx insn
)
2787 gcc_assert (INSN_P (insn
));
2788 reset_used_flags (PATTERN (insn
));
2789 reset_used_flags (REG_NOTES (insn
));
2791 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2794 /* Go through all the RTL insn bodies and clear all the USED bits. */
2797 reset_all_used_flags (void)
2801 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2804 rtx pat
= PATTERN (p
);
2805 if (GET_CODE (pat
) != SEQUENCE
)
2806 reset_insn_used_flags (p
);
2809 gcc_assert (REG_NOTES (p
) == NULL
);
2810 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2812 rtx insn
= XVECEXP (pat
, 0, i
);
2814 reset_insn_used_flags (insn
);
2820 /* Verify sharing in INSN. */
2823 verify_insn_sharing (rtx insn
)
2825 gcc_assert (INSN_P (insn
));
2826 reset_used_flags (PATTERN (insn
));
2827 reset_used_flags (REG_NOTES (insn
));
2829 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2832 /* Go through all the RTL insn bodies and check that there is no unexpected
2833 sharing in between the subexpressions. */
2836 verify_rtl_sharing (void)
2840 timevar_push (TV_VERIFY_RTL_SHARING
);
2842 reset_all_used_flags ();
2844 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2847 rtx pat
= PATTERN (p
);
2848 if (GET_CODE (pat
) != SEQUENCE
)
2849 verify_insn_sharing (p
);
2851 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2853 rtx insn
= XVECEXP (pat
, 0, i
);
2855 verify_insn_sharing (insn
);
2859 reset_all_used_flags ();
2861 timevar_pop (TV_VERIFY_RTL_SHARING
);
2864 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2865 Assumes the mark bits are cleared at entry. */
2868 unshare_all_rtl_in_chain (rtx_insn
*insn
)
2870 for (; insn
; insn
= NEXT_INSN (insn
))
2873 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2874 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2876 CALL_INSN_FUNCTION_USAGE (insn
)
2877 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2881 /* Go through all virtual stack slots of a function and mark them as
2882 shared. We never replace the DECL_RTLs themselves with a copy,
2883 but expressions mentioned into a DECL_RTL cannot be shared with
2884 expressions in the instruction stream.
2886 Note that reload may convert pseudo registers into memories in-place.
2887 Pseudo registers are always shared, but MEMs never are. Thus if we
2888 reset the used flags on MEMs in the instruction stream, we must set
2889 them again on MEMs that appear in DECL_RTLs. */
2892 set_used_decls (tree blk
)
2897 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2898 if (DECL_RTL_SET_P (t
))
2899 set_used_flags (DECL_RTL (t
));
2901 /* Now process sub-blocks. */
2902 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2906 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2907 Recursively does the same for subexpressions. Uses
2908 copy_rtx_if_shared_1 to reduce stack space. */
2911 copy_rtx_if_shared (rtx orig
)
2913 copy_rtx_if_shared_1 (&orig
);
2917 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2918 use. Recursively does the same for subexpressions. */
2921 copy_rtx_if_shared_1 (rtx
*orig1
)
2927 const char *format_ptr
;
2931 /* Repeat is used to turn tail-recursion into iteration. */
2938 code
= GET_CODE (x
);
2940 /* These types may be freely shared. */
2956 /* SCRATCH must be shared because they represent distinct values. */
2959 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2960 clobbers or clobbers of hard registers that originated as pseudos.
2961 This is needed to allow safe register renaming. */
2962 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2963 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2968 if (shared_const_p (x
))
2978 /* The chain of insns is not being copied. */
2985 /* This rtx may not be shared. If it has already been seen,
2986 replace it with a copy of itself. */
2988 if (RTX_FLAG (x
, used
))
2990 x
= shallow_copy_rtx (x
);
2993 RTX_FLAG (x
, used
) = 1;
2995 /* Now scan the subexpressions recursively.
2996 We can store any replaced subexpressions directly into X
2997 since we know X is not shared! Any vectors in X
2998 must be copied if X was copied. */
3000 format_ptr
= GET_RTX_FORMAT (code
);
3001 length
= GET_RTX_LENGTH (code
);
3004 for (i
= 0; i
< length
; i
++)
3006 switch (*format_ptr
++)
3010 copy_rtx_if_shared_1 (last_ptr
);
3011 last_ptr
= &XEXP (x
, i
);
3015 if (XVEC (x
, i
) != NULL
)
3018 int len
= XVECLEN (x
, i
);
3020 /* Copy the vector iff I copied the rtx and the length
3022 if (copied
&& len
> 0)
3023 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
3025 /* Call recursively on all inside the vector. */
3026 for (j
= 0; j
< len
; j
++)
3029 copy_rtx_if_shared_1 (last_ptr
);
3030 last_ptr
= &XVECEXP (x
, i
, j
);
3045 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
3048 mark_used_flags (rtx x
, int flag
)
3052 const char *format_ptr
;
3055 /* Repeat is used to turn tail-recursion into iteration. */
3060 code
= GET_CODE (x
);
3062 /* These types may be freely shared so we needn't do any resetting
3086 /* The chain of insns is not being copied. */
3093 RTX_FLAG (x
, used
) = flag
;
3095 format_ptr
= GET_RTX_FORMAT (code
);
3096 length
= GET_RTX_LENGTH (code
);
3098 for (i
= 0; i
< length
; i
++)
3100 switch (*format_ptr
++)
3108 mark_used_flags (XEXP (x
, i
), flag
);
3112 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3113 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
3119 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3120 to look for shared sub-parts. */
3123 reset_used_flags (rtx x
)
3125 mark_used_flags (x
, 0);
3128 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3129 to look for shared sub-parts. */
3132 set_used_flags (rtx x
)
3134 mark_used_flags (x
, 1);
3137 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3138 Return X or the rtx for the pseudo reg the value of X was copied into.
3139 OTHER must be valid as a SET_DEST. */
3142 make_safe_from (rtx x
, rtx other
)
3145 switch (GET_CODE (other
))
3148 other
= SUBREG_REG (other
);
3150 case STRICT_LOW_PART
:
3153 other
= XEXP (other
, 0);
3162 && GET_CODE (x
) != SUBREG
)
3164 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
3165 || reg_mentioned_p (other
, x
))))
3167 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3168 emit_move_insn (temp
, x
);
3174 /* Emission of insns (adding them to the doubly-linked list). */
3176 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3179 get_last_insn_anywhere (void)
3181 struct sequence_stack
*seq
;
3182 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
3188 /* Return the first nonnote insn emitted in current sequence or current
3189 function. This routine looks inside SEQUENCEs. */
3192 get_first_nonnote_insn (void)
3194 rtx_insn
*insn
= get_insns ();
3199 for (insn
= next_insn (insn
);
3200 insn
&& NOTE_P (insn
);
3201 insn
= next_insn (insn
))
3205 if (NONJUMP_INSN_P (insn
)
3206 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3207 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3214 /* Return the last nonnote insn emitted in current sequence or current
3215 function. This routine looks inside SEQUENCEs. */
3218 get_last_nonnote_insn (void)
3220 rtx_insn
*insn
= get_last_insn ();
3225 for (insn
= previous_insn (insn
);
3226 insn
&& NOTE_P (insn
);
3227 insn
= previous_insn (insn
))
3231 if (NONJUMP_INSN_P (insn
))
3232 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
3233 insn
= seq
->insn (seq
->len () - 1);
3240 /* Return the number of actual (non-debug) insns emitted in this
3244 get_max_insn_count (void)
3246 int n
= cur_insn_uid
;
3248 /* The table size must be stable across -g, to avoid codegen
3249 differences due to debug insns, and not be affected by
3250 -fmin-insn-uid, to avoid excessive table size and to simplify
3251 debugging of -fcompare-debug failures. */
3252 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3253 n
-= cur_debug_insn_uid
;
3255 n
-= MIN_NONDEBUG_INSN_UID
;
3261 /* Return the next insn. If it is a SEQUENCE, return the first insn
3265 next_insn (rtx_insn
*insn
)
3269 insn
= NEXT_INSN (insn
);
3270 if (insn
&& NONJUMP_INSN_P (insn
)
3271 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3272 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3278 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3282 previous_insn (rtx_insn
*insn
)
3286 insn
= PREV_INSN (insn
);
3287 if (insn
&& NONJUMP_INSN_P (insn
))
3288 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
3289 insn
= seq
->insn (seq
->len () - 1);
3295 /* Return the next insn after INSN that is not a NOTE. This routine does not
3296 look inside SEQUENCEs. */
3299 next_nonnote_insn (rtx uncast_insn
)
3301 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3304 insn
= NEXT_INSN (insn
);
3305 if (insn
== 0 || !NOTE_P (insn
))
3312 /* Return the next insn after INSN that is not a NOTE, but stop the
3313 search before we enter another basic block. This routine does not
3314 look inside SEQUENCEs. */
3317 next_nonnote_insn_bb (rtx_insn
*insn
)
3321 insn
= NEXT_INSN (insn
);
3322 if (insn
== 0 || !NOTE_P (insn
))
3324 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3331 /* Return the previous insn before INSN that is not a NOTE. This routine does
3332 not look inside SEQUENCEs. */
3335 prev_nonnote_insn (rtx uncast_insn
)
3337 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3341 insn
= PREV_INSN (insn
);
3342 if (insn
== 0 || !NOTE_P (insn
))
3349 /* Return the previous insn before INSN that is not a NOTE, but stop
3350 the search before we enter another basic block. This routine does
3351 not look inside SEQUENCEs. */
3354 prev_nonnote_insn_bb (rtx uncast_insn
)
3356 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3360 insn
= PREV_INSN (insn
);
3361 if (insn
== 0 || !NOTE_P (insn
))
3363 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3370 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3371 routine does not look inside SEQUENCEs. */
3374 next_nondebug_insn (rtx uncast_insn
)
3376 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3380 insn
= NEXT_INSN (insn
);
3381 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3388 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3389 This routine does not look inside SEQUENCEs. */
3392 prev_nondebug_insn (rtx uncast_insn
)
3394 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3398 insn
= PREV_INSN (insn
);
3399 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3406 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3407 This routine does not look inside SEQUENCEs. */
3410 next_nonnote_nondebug_insn (rtx uncast_insn
)
3412 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3416 insn
= NEXT_INSN (insn
);
3417 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3424 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3425 This routine does not look inside SEQUENCEs. */
3428 prev_nonnote_nondebug_insn (rtx uncast_insn
)
3430 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3434 insn
= PREV_INSN (insn
);
3435 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3442 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3443 or 0, if there is none. This routine does not look inside
3447 next_real_insn (rtx uncast_insn
)
3449 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3453 insn
= NEXT_INSN (insn
);
3454 if (insn
== 0 || INSN_P (insn
))
3461 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3462 or 0, if there is none. This routine does not look inside
3466 prev_real_insn (rtx uncast_insn
)
3468 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3472 insn
= PREV_INSN (insn
);
3473 if (insn
== 0 || INSN_P (insn
))
3480 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3481 This routine does not look inside SEQUENCEs. */
3484 last_call_insn (void)
3488 for (insn
= get_last_insn ();
3489 insn
&& !CALL_P (insn
);
3490 insn
= PREV_INSN (insn
))
3493 return safe_as_a
<rtx_call_insn
*> (insn
);
3496 /* Find the next insn after INSN that really does something. This routine
3497 does not look inside SEQUENCEs. After reload this also skips over
3498 standalone USE and CLOBBER insn. */
3501 active_insn_p (const_rtx insn
)
3503 return (CALL_P (insn
) || JUMP_P (insn
)
3504 || JUMP_TABLE_DATA_P (insn
) /* FIXME */
3505 || (NONJUMP_INSN_P (insn
)
3506 && (! reload_completed
3507 || (GET_CODE (PATTERN (insn
)) != USE
3508 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3512 next_active_insn (rtx uncast_insn
)
3514 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3518 insn
= NEXT_INSN (insn
);
3519 if (insn
== 0 || active_insn_p (insn
))
3526 /* Find the last insn before INSN that really does something. This routine
3527 does not look inside SEQUENCEs. After reload this also skips over
3528 standalone USE and CLOBBER insn. */
3531 prev_active_insn (rtx uncast_insn
)
3533 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3537 insn
= PREV_INSN (insn
);
3538 if (insn
== 0 || active_insn_p (insn
))
3545 /* Return the next insn that uses CC0 after INSN, which is assumed to
3546 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3547 applied to the result of this function should yield INSN).
3549 Normally, this is simply the next insn. However, if a REG_CC_USER note
3550 is present, it contains the insn that uses CC0.
3552 Return 0 if we can't find the insn. */
3555 next_cc0_user (rtx uncast_insn
)
3557 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3559 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3562 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3564 insn
= next_nonnote_insn (insn
);
3565 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3566 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3568 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3574 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3575 note, it is the previous insn. */
3578 prev_cc0_setter (rtx_insn
*insn
)
3580 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3583 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3585 insn
= prev_nonnote_insn (insn
);
3586 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3592 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3595 find_auto_inc (const_rtx x
, const_rtx reg
)
3597 subrtx_iterator::array_type array
;
3598 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
3600 const_rtx x
= *iter
;
3601 if (GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
3602 && rtx_equal_p (reg
, XEXP (x
, 0)))
3609 /* Increment the label uses for all labels present in rtx. */
3612 mark_label_nuses (rtx x
)
3618 code
= GET_CODE (x
);
3619 if (code
== LABEL_REF
&& LABEL_P (LABEL_REF_LABEL (x
)))
3620 LABEL_NUSES (LABEL_REF_LABEL (x
))++;
3622 fmt
= GET_RTX_FORMAT (code
);
3623 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3626 mark_label_nuses (XEXP (x
, i
));
3627 else if (fmt
[i
] == 'E')
3628 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3629 mark_label_nuses (XVECEXP (x
, i
, j
));
3634 /* Try splitting insns that can be split for better scheduling.
3635 PAT is the pattern which might split.
3636 TRIAL is the insn providing PAT.
3637 LAST is nonzero if we should return the last insn of the sequence produced.
3639 If this routine succeeds in splitting, it returns the first or last
3640 replacement insn depending on the value of LAST. Otherwise, it
3641 returns TRIAL. If the insn to be returned can be split, it will be. */
3644 try_split (rtx pat
, rtx uncast_trial
, int last
)
3646 rtx_insn
*trial
= as_a
<rtx_insn
*> (uncast_trial
);
3647 rtx_insn
*before
= PREV_INSN (trial
);
3648 rtx_insn
*after
= NEXT_INSN (trial
);
3650 rtx_insn
*seq
, *tem
;
3652 rtx_insn
*insn_last
, *insn
;
3654 rtx call_insn
= NULL_RTX
;
3656 /* We're not good at redistributing frame information. */
3657 if (RTX_FRAME_RELATED_P (trial
))
3660 if (any_condjump_p (trial
)
3661 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3662 split_branch_probability
= XINT (note
, 0);
3663 probability
= split_branch_probability
;
3665 seq
= safe_as_a
<rtx_insn
*> (split_insns (pat
, trial
));
3667 split_branch_probability
= -1;
3672 /* Avoid infinite loop if any insn of the result matches
3673 the original pattern. */
3677 if (INSN_P (insn_last
)
3678 && rtx_equal_p (PATTERN (insn_last
), pat
))
3680 if (!NEXT_INSN (insn_last
))
3682 insn_last
= NEXT_INSN (insn_last
);
3685 /* We will be adding the new sequence to the function. The splitters
3686 may have introduced invalid RTL sharing, so unshare the sequence now. */
3687 unshare_all_rtl_in_chain (seq
);
3689 /* Mark labels and copy flags. */
3690 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3695 CROSSING_JUMP_P (insn
) = CROSSING_JUMP_P (trial
);
3696 mark_jump_label (PATTERN (insn
), insn
, 0);
3698 if (probability
!= -1
3699 && any_condjump_p (insn
)
3700 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3702 /* We can preserve the REG_BR_PROB notes only if exactly
3703 one jump is created, otherwise the machine description
3704 is responsible for this step using
3705 split_branch_probability variable. */
3706 gcc_assert (njumps
== 1);
3707 add_int_reg_note (insn
, REG_BR_PROB
, probability
);
3712 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3713 in SEQ and copy any additional information across. */
3716 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3722 gcc_assert (call_insn
== NULL_RTX
);
3725 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3726 target may have explicitly specified. */
3727 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3730 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3732 /* If the old call was a sibling call, the new one must
3734 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3736 /* If the new call is the last instruction in the sequence,
3737 it will effectively replace the old call in-situ. Otherwise
3738 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3739 so that it comes immediately after the new call. */
3740 if (NEXT_INSN (insn
))
3741 for (next
= NEXT_INSN (trial
);
3742 next
&& NOTE_P (next
);
3743 next
= NEXT_INSN (next
))
3744 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3747 add_insn_after (next
, insn
, NULL
);
3753 /* Copy notes, particularly those related to the CFG. */
3754 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3756 switch (REG_NOTE_KIND (note
))
3759 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3765 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3768 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3772 case REG_NON_LOCAL_GOTO
:
3773 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3776 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3782 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3784 rtx reg
= XEXP (note
, 0);
3785 if (!FIND_REG_INC_NOTE (insn
, reg
)
3786 && find_auto_inc (PATTERN (insn
), reg
))
3787 add_reg_note (insn
, REG_INC
, reg
);
3793 fixup_args_size_notes (NULL
, insn_last
, INTVAL (XEXP (note
, 0)));
3797 gcc_assert (call_insn
!= NULL_RTX
);
3798 add_reg_note (call_insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3806 /* If there are LABELS inside the split insns increment the
3807 usage count so we don't delete the label. */
3811 while (insn
!= NULL_RTX
)
3813 /* JUMP_P insns have already been "marked" above. */
3814 if (NONJUMP_INSN_P (insn
))
3815 mark_label_nuses (PATTERN (insn
));
3817 insn
= PREV_INSN (insn
);
3821 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3823 delete_insn (trial
);
3825 /* Recursively call try_split for each new insn created; by the
3826 time control returns here that insn will be fully split, so
3827 set LAST and continue from the insn after the one returned.
3828 We can't use next_active_insn here since AFTER may be a note.
3829 Ignore deleted insns, which can be occur if not optimizing. */
3830 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3831 if (! tem
->deleted () && INSN_P (tem
))
3832 tem
= try_split (PATTERN (tem
), tem
, 1);
3834 /* Return either the first or the last insn, depending on which was
3837 ? (after
? PREV_INSN (after
) : get_last_insn ())
3838 : NEXT_INSN (before
);
3841 /* Make and return an INSN rtx, initializing all its slots.
3842 Store PATTERN in the pattern slots. */
3845 make_insn_raw (rtx pattern
)
3849 insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
3851 INSN_UID (insn
) = cur_insn_uid
++;
3852 PATTERN (insn
) = pattern
;
3853 INSN_CODE (insn
) = -1;
3854 REG_NOTES (insn
) = NULL
;
3855 INSN_LOCATION (insn
) = curr_insn_location ();
3856 BLOCK_FOR_INSN (insn
) = NULL
;
3858 #ifdef ENABLE_RTL_CHECKING
3861 && (returnjump_p (insn
)
3862 || (GET_CODE (insn
) == SET
3863 && SET_DEST (insn
) == pc_rtx
)))
3865 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3873 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3876 make_debug_insn_raw (rtx pattern
)
3878 rtx_debug_insn
*insn
;
3880 insn
= as_a
<rtx_debug_insn
*> (rtx_alloc (DEBUG_INSN
));
3881 INSN_UID (insn
) = cur_debug_insn_uid
++;
3882 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3883 INSN_UID (insn
) = cur_insn_uid
++;
3885 PATTERN (insn
) = pattern
;
3886 INSN_CODE (insn
) = -1;
3887 REG_NOTES (insn
) = NULL
;
3888 INSN_LOCATION (insn
) = curr_insn_location ();
3889 BLOCK_FOR_INSN (insn
) = NULL
;
3894 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3897 make_jump_insn_raw (rtx pattern
)
3899 rtx_jump_insn
*insn
;
3901 insn
= as_a
<rtx_jump_insn
*> (rtx_alloc (JUMP_INSN
));
3902 INSN_UID (insn
) = cur_insn_uid
++;
3904 PATTERN (insn
) = pattern
;
3905 INSN_CODE (insn
) = -1;
3906 REG_NOTES (insn
) = NULL
;
3907 JUMP_LABEL (insn
) = NULL
;
3908 INSN_LOCATION (insn
) = curr_insn_location ();
3909 BLOCK_FOR_INSN (insn
) = NULL
;
3914 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3917 make_call_insn_raw (rtx pattern
)
3919 rtx_call_insn
*insn
;
3921 insn
= as_a
<rtx_call_insn
*> (rtx_alloc (CALL_INSN
));
3922 INSN_UID (insn
) = cur_insn_uid
++;
3924 PATTERN (insn
) = pattern
;
3925 INSN_CODE (insn
) = -1;
3926 REG_NOTES (insn
) = NULL
;
3927 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3928 INSN_LOCATION (insn
) = curr_insn_location ();
3929 BLOCK_FOR_INSN (insn
) = NULL
;
3934 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3937 make_note_raw (enum insn_note subtype
)
3939 /* Some notes are never created this way at all. These notes are
3940 only created by patching out insns. */
3941 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3942 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3944 rtx_note
*note
= as_a
<rtx_note
*> (rtx_alloc (NOTE
));
3945 INSN_UID (note
) = cur_insn_uid
++;
3946 NOTE_KIND (note
) = subtype
;
3947 BLOCK_FOR_INSN (note
) = NULL
;
3948 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3952 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3953 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3954 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3957 link_insn_into_chain (rtx_insn
*insn
, rtx_insn
*prev
, rtx_insn
*next
)
3959 SET_PREV_INSN (insn
) = prev
;
3960 SET_NEXT_INSN (insn
) = next
;
3963 SET_NEXT_INSN (prev
) = insn
;
3964 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3966 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (prev
));
3967 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = insn
;
3972 SET_PREV_INSN (next
) = insn
;
3973 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3975 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (next
));
3976 SET_PREV_INSN (sequence
->insn (0)) = insn
;
3980 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3982 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (insn
));
3983 SET_PREV_INSN (sequence
->insn (0)) = prev
;
3984 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = next
;
3988 /* Add INSN to the end of the doubly-linked list.
3989 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3992 add_insn (rtx_insn
*insn
)
3994 rtx_insn
*prev
= get_last_insn ();
3995 link_insn_into_chain (insn
, prev
, NULL
);
3996 if (NULL
== get_insns ())
3997 set_first_insn (insn
);
3998 set_last_insn (insn
);
4001 /* Add INSN into the doubly-linked list after insn AFTER. */
4004 add_insn_after_nobb (rtx_insn
*insn
, rtx_insn
*after
)
4006 rtx_insn
*next
= NEXT_INSN (after
);
4008 gcc_assert (!optimize
|| !after
->deleted ());
4010 link_insn_into_chain (insn
, after
, next
);
4014 struct sequence_stack
*seq
;
4016 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4017 if (after
== seq
->last
)
4025 /* Add INSN into the doubly-linked list before insn BEFORE. */
4028 add_insn_before_nobb (rtx_insn
*insn
, rtx_insn
*before
)
4030 rtx_insn
*prev
= PREV_INSN (before
);
4032 gcc_assert (!optimize
|| !before
->deleted ());
4034 link_insn_into_chain (insn
, prev
, before
);
4038 struct sequence_stack
*seq
;
4040 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4041 if (before
== seq
->first
)
4051 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
4052 If BB is NULL, an attempt is made to infer the bb from before.
4054 This and the next function should be the only functions called
4055 to insert an insn once delay slots have been filled since only
4056 they know how to update a SEQUENCE. */
4059 add_insn_after (rtx uncast_insn
, rtx uncast_after
, basic_block bb
)
4061 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4062 rtx_insn
*after
= as_a
<rtx_insn
*> (uncast_after
);
4063 add_insn_after_nobb (insn
, after
);
4064 if (!BARRIER_P (after
)
4065 && !BARRIER_P (insn
)
4066 && (bb
= BLOCK_FOR_INSN (after
)))
4068 set_block_for_insn (insn
, bb
);
4070 df_insn_rescan (insn
);
4071 /* Should not happen as first in the BB is always
4072 either NOTE or LABEL. */
4073 if (BB_END (bb
) == after
4074 /* Avoid clobbering of structure when creating new BB. */
4075 && !BARRIER_P (insn
)
4076 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
4081 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4082 If BB is NULL, an attempt is made to infer the bb from before.
4084 This and the previous function should be the only functions called
4085 to insert an insn once delay slots have been filled since only
4086 they know how to update a SEQUENCE. */
4089 add_insn_before (rtx uncast_insn
, rtx uncast_before
, basic_block bb
)
4091 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4092 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4093 add_insn_before_nobb (insn
, before
);
4096 && !BARRIER_P (before
)
4097 && !BARRIER_P (insn
))
4098 bb
= BLOCK_FOR_INSN (before
);
4102 set_block_for_insn (insn
, bb
);
4104 df_insn_rescan (insn
);
4105 /* Should not happen as first in the BB is always either NOTE or
4107 gcc_assert (BB_HEAD (bb
) != insn
4108 /* Avoid clobbering of structure when creating new BB. */
4110 || NOTE_INSN_BASIC_BLOCK_P (insn
));
4114 /* Replace insn with an deleted instruction note. */
4117 set_insn_deleted (rtx insn
)
4120 df_insn_delete (as_a
<rtx_insn
*> (insn
));
4121 PUT_CODE (insn
, NOTE
);
4122 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
4126 /* Unlink INSN from the insn chain.
4128 This function knows how to handle sequences.
4130 This function does not invalidate data flow information associated with
4131 INSN (i.e. does not call df_insn_delete). That makes this function
4132 usable for only disconnecting an insn from the chain, and re-emit it
4135 To later insert INSN elsewhere in the insn chain via add_insn and
4136 similar functions, PREV_INSN and NEXT_INSN must be nullified by
4137 the caller. Nullifying them here breaks many insn chain walks.
4139 To really delete an insn and related DF information, use delete_insn. */
4142 remove_insn (rtx uncast_insn
)
4144 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4145 rtx_insn
*next
= NEXT_INSN (insn
);
4146 rtx_insn
*prev
= PREV_INSN (insn
);
4151 SET_NEXT_INSN (prev
) = next
;
4152 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
4154 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (prev
));
4155 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = next
;
4160 struct sequence_stack
*seq
;
4162 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4163 if (insn
== seq
->first
)
4174 SET_PREV_INSN (next
) = prev
;
4175 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
4177 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (next
));
4178 SET_PREV_INSN (sequence
->insn (0)) = prev
;
4183 struct sequence_stack
*seq
;
4185 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4186 if (insn
== seq
->last
)
4195 /* Fix up basic block boundaries, if necessary. */
4196 if (!BARRIER_P (insn
)
4197 && (bb
= BLOCK_FOR_INSN (insn
)))
4199 if (BB_HEAD (bb
) == insn
)
4201 /* Never ever delete the basic block note without deleting whole
4203 gcc_assert (!NOTE_P (insn
));
4204 BB_HEAD (bb
) = next
;
4206 if (BB_END (bb
) == insn
)
4211 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4214 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4216 gcc_assert (call_insn
&& CALL_P (call_insn
));
4218 /* Put the register usage information on the CALL. If there is already
4219 some usage information, put ours at the end. */
4220 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4224 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4225 link
= XEXP (link
, 1))
4228 XEXP (link
, 1) = call_fusage
;
4231 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4234 /* Delete all insns made since FROM.
4235 FROM becomes the new last instruction. */
4238 delete_insns_since (rtx_insn
*from
)
4243 SET_NEXT_INSN (from
) = 0;
4244 set_last_insn (from
);
4247 /* This function is deprecated, please use sequences instead.
4249 Move a consecutive bunch of insns to a different place in the chain.
4250 The insns to be moved are those between FROM and TO.
4251 They are moved to a new position after the insn AFTER.
4252 AFTER must not be FROM or TO or any insn in between.
4254 This function does not know about SEQUENCEs and hence should not be
4255 called after delay-slot filling has been done. */
4258 reorder_insns_nobb (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4260 #ifdef ENABLE_CHECKING
4262 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4263 gcc_assert (after
!= x
);
4264 gcc_assert (after
!= to
);
4267 /* Splice this bunch out of where it is now. */
4268 if (PREV_INSN (from
))
4269 SET_NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4271 SET_PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4272 if (get_last_insn () == to
)
4273 set_last_insn (PREV_INSN (from
));
4274 if (get_insns () == from
)
4275 set_first_insn (NEXT_INSN (to
));
4277 /* Make the new neighbors point to it and it to them. */
4278 if (NEXT_INSN (after
))
4279 SET_PREV_INSN (NEXT_INSN (after
)) = to
;
4281 SET_NEXT_INSN (to
) = NEXT_INSN (after
);
4282 SET_PREV_INSN (from
) = after
;
4283 SET_NEXT_INSN (after
) = from
;
4284 if (after
== get_last_insn ())
4288 /* Same as function above, but take care to update BB boundaries. */
4290 reorder_insns (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4292 rtx_insn
*prev
= PREV_INSN (from
);
4293 basic_block bb
, bb2
;
4295 reorder_insns_nobb (from
, to
, after
);
4297 if (!BARRIER_P (after
)
4298 && (bb
= BLOCK_FOR_INSN (after
)))
4301 df_set_bb_dirty (bb
);
4303 if (!BARRIER_P (from
)
4304 && (bb2
= BLOCK_FOR_INSN (from
)))
4306 if (BB_END (bb2
) == to
)
4307 BB_END (bb2
) = prev
;
4308 df_set_bb_dirty (bb2
);
4311 if (BB_END (bb
) == after
)
4314 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4316 df_insn_change_bb (x
, bb
);
4321 /* Emit insn(s) of given code and pattern
4322 at a specified place within the doubly-linked list.
4324 All of the emit_foo global entry points accept an object
4325 X which is either an insn list or a PATTERN of a single
4328 There are thus a few canonical ways to generate code and
4329 emit it at a specific place in the instruction stream. For
4330 example, consider the instruction named SPOT and the fact that
4331 we would like to emit some instructions before SPOT. We might
4335 ... emit the new instructions ...
4336 insns_head = get_insns ();
4339 emit_insn_before (insns_head, SPOT);
4341 It used to be common to generate SEQUENCE rtl instead, but that
4342 is a relic of the past which no longer occurs. The reason is that
4343 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4344 generated would almost certainly die right after it was created. */
4347 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4348 rtx_insn
*(*make_raw
) (rtx
))
4352 gcc_assert (before
);
4355 return safe_as_a
<rtx_insn
*> (last
);
4357 switch (GET_CODE (x
))
4366 insn
= as_a
<rtx_insn
*> (x
);
4369 rtx_insn
*next
= NEXT_INSN (insn
);
4370 add_insn_before (insn
, before
, bb
);
4376 #ifdef ENABLE_RTL_CHECKING
4383 last
= (*make_raw
) (x
);
4384 add_insn_before (last
, before
, bb
);
4388 return safe_as_a
<rtx_insn
*> (last
);
4391 /* Make X be output before the instruction BEFORE. */
4394 emit_insn_before_noloc (rtx x
, rtx_insn
*before
, basic_block bb
)
4396 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4399 /* Make an instruction with body X and code JUMP_INSN
4400 and output it before the instruction BEFORE. */
4403 emit_jump_insn_before_noloc (rtx x
, rtx_insn
*before
)
4405 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4406 make_jump_insn_raw
);
4409 /* Make an instruction with body X and code CALL_INSN
4410 and output it before the instruction BEFORE. */
4413 emit_call_insn_before_noloc (rtx x
, rtx_insn
*before
)
4415 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4416 make_call_insn_raw
);
4419 /* Make an instruction with body X and code DEBUG_INSN
4420 and output it before the instruction BEFORE. */
4423 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4425 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4426 make_debug_insn_raw
);
4429 /* Make an insn of code BARRIER
4430 and output it before the insn BEFORE. */
4433 emit_barrier_before (rtx before
)
4435 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4437 INSN_UID (insn
) = cur_insn_uid
++;
4439 add_insn_before (insn
, before
, NULL
);
4443 /* Emit the label LABEL before the insn BEFORE. */
4446 emit_label_before (rtx label
, rtx_insn
*before
)
4448 gcc_checking_assert (INSN_UID (label
) == 0);
4449 INSN_UID (label
) = cur_insn_uid
++;
4450 add_insn_before (label
, before
, NULL
);
4451 return as_a
<rtx_insn
*> (label
);
4454 /* Helper for emit_insn_after, handles lists of instructions
4458 emit_insn_after_1 (rtx_insn
*first
, rtx uncast_after
, basic_block bb
)
4460 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4462 rtx_insn
*after_after
;
4463 if (!bb
&& !BARRIER_P (after
))
4464 bb
= BLOCK_FOR_INSN (after
);
4468 df_set_bb_dirty (bb
);
4469 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4470 if (!BARRIER_P (last
))
4472 set_block_for_insn (last
, bb
);
4473 df_insn_rescan (last
);
4475 if (!BARRIER_P (last
))
4477 set_block_for_insn (last
, bb
);
4478 df_insn_rescan (last
);
4480 if (BB_END (bb
) == after
)
4484 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4487 after_after
= NEXT_INSN (after
);
4489 SET_NEXT_INSN (after
) = first
;
4490 SET_PREV_INSN (first
) = after
;
4491 SET_NEXT_INSN (last
) = after_after
;
4493 SET_PREV_INSN (after_after
) = last
;
4495 if (after
== get_last_insn ())
4496 set_last_insn (last
);
4502 emit_pattern_after_noloc (rtx x
, rtx uncast_after
, basic_block bb
,
4503 rtx_insn
*(*make_raw
)(rtx
))
4505 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4506 rtx_insn
*last
= after
;
4513 switch (GET_CODE (x
))
4522 last
= emit_insn_after_1 (as_a
<rtx_insn
*> (x
), after
, bb
);
4525 #ifdef ENABLE_RTL_CHECKING
4532 last
= (*make_raw
) (x
);
4533 add_insn_after (last
, after
, bb
);
4540 /* Make X be output after the insn AFTER and set the BB of insn. If
4541 BB is NULL, an attempt is made to infer the BB from AFTER. */
4544 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4546 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4550 /* Make an insn of code JUMP_INSN with body X
4551 and output it after the insn AFTER. */
4554 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4556 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4559 /* Make an instruction with body X and code CALL_INSN
4560 and output it after the instruction AFTER. */
4563 emit_call_insn_after_noloc (rtx x
, rtx after
)
4565 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4568 /* Make an instruction with body X and code CALL_INSN
4569 and output it after the instruction AFTER. */
4572 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4574 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4577 /* Make an insn of code BARRIER
4578 and output it after the insn AFTER. */
4581 emit_barrier_after (rtx after
)
4583 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4585 INSN_UID (insn
) = cur_insn_uid
++;
4587 add_insn_after (insn
, after
, NULL
);
4591 /* Emit the label LABEL after the insn AFTER. */
4594 emit_label_after (rtx label
, rtx_insn
*after
)
4596 gcc_checking_assert (INSN_UID (label
) == 0);
4597 INSN_UID (label
) = cur_insn_uid
++;
4598 add_insn_after (label
, after
, NULL
);
4599 return as_a
<rtx_insn
*> (label
);
4602 /* Notes require a bit of special handling: Some notes need to have their
4603 BLOCK_FOR_INSN set, others should never have it set, and some should
4604 have it set or clear depending on the context. */
4606 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4607 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4608 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4611 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4615 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4616 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4619 /* Notes for var tracking and EH region markers can appear between or
4620 inside basic blocks. If the caller is emitting on the basic block
4621 boundary, do not set BLOCK_FOR_INSN on the new note. */
4622 case NOTE_INSN_VAR_LOCATION
:
4623 case NOTE_INSN_CALL_ARG_LOCATION
:
4624 case NOTE_INSN_EH_REGION_BEG
:
4625 case NOTE_INSN_EH_REGION_END
:
4626 return on_bb_boundary_p
;
4628 /* Otherwise, BLOCK_FOR_INSN must be set. */
4634 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4637 emit_note_after (enum insn_note subtype
, rtx_insn
*after
)
4639 rtx_note
*note
= make_note_raw (subtype
);
4640 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4641 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4643 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4644 add_insn_after_nobb (note
, after
);
4646 add_insn_after (note
, after
, bb
);
4650 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4653 emit_note_before (enum insn_note subtype
, rtx_insn
*before
)
4655 rtx_note
*note
= make_note_raw (subtype
);
4656 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4657 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4659 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4660 add_insn_before_nobb (note
, before
);
4662 add_insn_before (note
, before
, bb
);
4666 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4667 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4670 emit_pattern_after_setloc (rtx pattern
, rtx uncast_after
, int loc
,
4671 rtx_insn
*(*make_raw
) (rtx
))
4673 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4674 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4676 if (pattern
== NULL_RTX
|| !loc
)
4677 return safe_as_a
<rtx_insn
*> (last
);
4679 after
= NEXT_INSN (after
);
4682 if (active_insn_p (after
)
4683 && !JUMP_TABLE_DATA_P (after
) /* FIXME */
4684 && !INSN_LOCATION (after
))
4685 INSN_LOCATION (after
) = loc
;
4688 after
= NEXT_INSN (after
);
4690 return safe_as_a
<rtx_insn
*> (last
);
4693 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4694 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4698 emit_pattern_after (rtx pattern
, rtx uncast_after
, bool skip_debug_insns
,
4699 rtx_insn
*(*make_raw
) (rtx
))
4701 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4702 rtx_insn
*prev
= after
;
4704 if (skip_debug_insns
)
4705 while (DEBUG_INSN_P (prev
))
4706 prev
= PREV_INSN (prev
);
4709 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4712 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4715 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4717 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4719 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4722 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4724 emit_insn_after (rtx pattern
, rtx after
)
4726 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4729 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4731 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4733 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4736 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4738 emit_jump_insn_after (rtx pattern
, rtx after
)
4740 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4743 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4745 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4747 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4750 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4752 emit_call_insn_after (rtx pattern
, rtx after
)
4754 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4757 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4759 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4761 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4764 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4766 emit_debug_insn_after (rtx pattern
, rtx after
)
4768 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4771 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4772 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4773 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4777 emit_pattern_before_setloc (rtx pattern
, rtx uncast_before
, int loc
, bool insnp
,
4778 rtx_insn
*(*make_raw
) (rtx
))
4780 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4781 rtx_insn
*first
= PREV_INSN (before
);
4782 rtx_insn
*last
= emit_pattern_before_noloc (pattern
, before
,
4783 insnp
? before
: NULL_RTX
,
4786 if (pattern
== NULL_RTX
|| !loc
)
4790 first
= get_insns ();
4792 first
= NEXT_INSN (first
);
4795 if (active_insn_p (first
)
4796 && !JUMP_TABLE_DATA_P (first
) /* FIXME */
4797 && !INSN_LOCATION (first
))
4798 INSN_LOCATION (first
) = loc
;
4801 first
= NEXT_INSN (first
);
4806 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4807 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4808 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4809 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4812 emit_pattern_before (rtx pattern
, rtx uncast_before
, bool skip_debug_insns
,
4813 bool insnp
, rtx_insn
*(*make_raw
) (rtx
))
4815 rtx_insn
*before
= safe_as_a
<rtx_insn
*> (uncast_before
);
4816 rtx_insn
*next
= before
;
4818 if (skip_debug_insns
)
4819 while (DEBUG_INSN_P (next
))
4820 next
= PREV_INSN (next
);
4823 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4826 return emit_pattern_before_noloc (pattern
, before
,
4827 insnp
? before
: NULL_RTX
,
4831 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4833 emit_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4835 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4839 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4841 emit_insn_before (rtx pattern
, rtx before
)
4843 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4846 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4848 emit_jump_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4850 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4851 make_jump_insn_raw
);
4854 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4856 emit_jump_insn_before (rtx pattern
, rtx before
)
4858 return emit_pattern_before (pattern
, before
, true, false,
4859 make_jump_insn_raw
);
4862 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4864 emit_call_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4866 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4867 make_call_insn_raw
);
4870 /* Like emit_call_insn_before_noloc,
4871 but set insn_location according to BEFORE. */
4873 emit_call_insn_before (rtx pattern
, rtx_insn
*before
)
4875 return emit_pattern_before (pattern
, before
, true, false,
4876 make_call_insn_raw
);
4879 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4881 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4883 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4884 make_debug_insn_raw
);
4887 /* Like emit_debug_insn_before_noloc,
4888 but set insn_location according to BEFORE. */
4890 emit_debug_insn_before (rtx pattern
, rtx_insn
*before
)
4892 return emit_pattern_before (pattern
, before
, false, false,
4893 make_debug_insn_raw
);
4896 /* Take X and emit it at the end of the doubly-linked
4899 Returns the last insn emitted. */
4904 rtx_insn
*last
= get_last_insn ();
4910 switch (GET_CODE (x
))
4919 insn
= as_a
<rtx_insn
*> (x
);
4922 rtx_insn
*next
= NEXT_INSN (insn
);
4929 #ifdef ENABLE_RTL_CHECKING
4930 case JUMP_TABLE_DATA
:
4937 last
= make_insn_raw (x
);
4945 /* Make an insn of code DEBUG_INSN with pattern X
4946 and add it to the end of the doubly-linked list. */
4949 emit_debug_insn (rtx x
)
4951 rtx_insn
*last
= get_last_insn ();
4957 switch (GET_CODE (x
))
4966 insn
= as_a
<rtx_insn
*> (x
);
4969 rtx_insn
*next
= NEXT_INSN (insn
);
4976 #ifdef ENABLE_RTL_CHECKING
4977 case JUMP_TABLE_DATA
:
4984 last
= make_debug_insn_raw (x
);
4992 /* Make an insn of code JUMP_INSN with pattern X
4993 and add it to the end of the doubly-linked list. */
4996 emit_jump_insn (rtx x
)
4998 rtx_insn
*last
= NULL
;
5001 switch (GET_CODE (x
))
5010 insn
= as_a
<rtx_insn
*> (x
);
5013 rtx_insn
*next
= NEXT_INSN (insn
);
5020 #ifdef ENABLE_RTL_CHECKING
5021 case JUMP_TABLE_DATA
:
5028 last
= make_jump_insn_raw (x
);
5036 /* Make an insn of code CALL_INSN with pattern X
5037 and add it to the end of the doubly-linked list. */
5040 emit_call_insn (rtx x
)
5044 switch (GET_CODE (x
))
5053 insn
= emit_insn (x
);
5056 #ifdef ENABLE_RTL_CHECKING
5058 case JUMP_TABLE_DATA
:
5064 insn
= make_call_insn_raw (x
);
5072 /* Add the label LABEL to the end of the doubly-linked list. */
5075 emit_label (rtx label
)
5077 gcc_checking_assert (INSN_UID (label
) == 0);
5078 INSN_UID (label
) = cur_insn_uid
++;
5079 add_insn (as_a
<rtx_insn
*> (label
));
5080 return as_a
<rtx_insn
*> (label
);
5083 /* Make an insn of code JUMP_TABLE_DATA
5084 and add it to the end of the doubly-linked list. */
5086 rtx_jump_table_data
*
5087 emit_jump_table_data (rtx table
)
5089 rtx_jump_table_data
*jump_table_data
=
5090 as_a
<rtx_jump_table_data
*> (rtx_alloc (JUMP_TABLE_DATA
));
5091 INSN_UID (jump_table_data
) = cur_insn_uid
++;
5092 PATTERN (jump_table_data
) = table
;
5093 BLOCK_FOR_INSN (jump_table_data
) = NULL
;
5094 add_insn (jump_table_data
);
5095 return jump_table_data
;
5098 /* Make an insn of code BARRIER
5099 and add it to the end of the doubly-linked list. */
5104 rtx_barrier
*barrier
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
5105 INSN_UID (barrier
) = cur_insn_uid
++;
5110 /* Emit a copy of note ORIG. */
5113 emit_note_copy (rtx_note
*orig
)
5115 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
5116 rtx_note
*note
= make_note_raw (kind
);
5117 NOTE_DATA (note
) = NOTE_DATA (orig
);
5122 /* Make an insn of code NOTE or type NOTE_NO
5123 and add it to the end of the doubly-linked list. */
5126 emit_note (enum insn_note kind
)
5128 rtx_note
*note
= make_note_raw (kind
);
5133 /* Emit a clobber of lvalue X. */
5136 emit_clobber (rtx x
)
5138 /* CONCATs should not appear in the insn stream. */
5139 if (GET_CODE (x
) == CONCAT
)
5141 emit_clobber (XEXP (x
, 0));
5142 return emit_clobber (XEXP (x
, 1));
5144 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
5147 /* Return a sequence of insns to clobber lvalue X. */
5161 /* Emit a use of rvalue X. */
5166 /* CONCATs should not appear in the insn stream. */
5167 if (GET_CODE (x
) == CONCAT
)
5169 emit_use (XEXP (x
, 0));
5170 return emit_use (XEXP (x
, 1));
5172 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
5175 /* Return a sequence of insns to use rvalue X. */
5189 /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5190 Return the set in INSN that such notes describe, or NULL if the notes
5191 have no meaning for INSN. */
5194 set_for_reg_notes (rtx insn
)
5201 pat
= PATTERN (insn
);
5202 if (GET_CODE (pat
) == PARALLEL
)
5204 /* We do not use single_set because that ignores SETs of unused
5205 registers. REG_EQUAL and REG_EQUIV notes really do require the
5206 PARALLEL to have a single SET. */
5207 if (multiple_sets (insn
))
5209 pat
= XVECEXP (pat
, 0, 0);
5212 if (GET_CODE (pat
) != SET
)
5215 reg
= SET_DEST (pat
);
5217 /* Notes apply to the contents of a STRICT_LOW_PART. */
5218 if (GET_CODE (reg
) == STRICT_LOW_PART
)
5219 reg
= XEXP (reg
, 0);
5221 /* Check that we have a register. */
5222 if (!(REG_P (reg
) || GET_CODE (reg
) == SUBREG
))
5228 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5229 note of this type already exists, remove it first. */
5232 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5234 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5240 if (!set_for_reg_notes (insn
))
5243 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5244 It serves no useful purpose and breaks eliminate_regs. */
5245 if (GET_CODE (datum
) == ASM_OPERANDS
)
5248 /* Notes with side effects are dangerous. Even if the side-effect
5249 initially mirrors one in PATTERN (INSN), later optimizations
5250 might alter the way that the final register value is calculated
5251 and so move or alter the side-effect in some way. The note would
5252 then no longer be a valid substitution for SET_SRC. */
5253 if (side_effects_p (datum
))
5262 XEXP (note
, 0) = datum
;
5265 add_reg_note (insn
, kind
, datum
);
5266 note
= REG_NOTES (insn
);
5273 df_notes_rescan (as_a
<rtx_insn
*> (insn
));
5282 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5284 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5286 rtx set
= set_for_reg_notes (insn
);
5288 if (set
&& SET_DEST (set
) == dst
)
5289 return set_unique_reg_note (insn
, kind
, datum
);
5293 /* Return an indication of which type of insn should have X as a body.
5294 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5296 static enum rtx_code
5297 classify_insn (rtx x
)
5301 if (GET_CODE (x
) == CALL
)
5303 if (ANY_RETURN_P (x
))
5305 if (GET_CODE (x
) == SET
)
5307 if (SET_DEST (x
) == pc_rtx
)
5309 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5314 if (GET_CODE (x
) == PARALLEL
)
5317 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5318 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5320 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5321 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5323 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5324 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5330 /* Emit the rtl pattern X as an appropriate kind of insn.
5331 If X is a label, it is simply added into the insn chain. */
5336 enum rtx_code code
= classify_insn (x
);
5341 return emit_label (x
);
5343 return emit_insn (x
);
5346 rtx_insn
*insn
= emit_jump_insn (x
);
5347 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5348 return emit_barrier ();
5352 return emit_call_insn (x
);
5354 return emit_debug_insn (x
);
5360 /* Space for free sequence stack entries. */
5361 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5363 /* Begin emitting insns to a sequence. If this sequence will contain
5364 something that might cause the compiler to pop arguments to function
5365 calls (because those pops have previously been deferred; see
5366 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5367 before calling this function. That will ensure that the deferred
5368 pops are not accidentally emitted in the middle of this sequence. */
5371 start_sequence (void)
5373 struct sequence_stack
*tem
;
5375 if (free_sequence_stack
!= NULL
)
5377 tem
= free_sequence_stack
;
5378 free_sequence_stack
= tem
->next
;
5381 tem
= ggc_alloc
<sequence_stack
> ();
5383 tem
->next
= get_current_sequence ()->next
;
5384 tem
->first
= get_insns ();
5385 tem
->last
= get_last_insn ();
5386 get_current_sequence ()->next
= tem
;
5392 /* Set up the insn chain starting with FIRST as the current sequence,
5393 saving the previously current one. See the documentation for
5394 start_sequence for more information about how to use this function. */
5397 push_to_sequence (rtx_insn
*first
)
5403 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5406 set_first_insn (first
);
5407 set_last_insn (last
);
5410 /* Like push_to_sequence, but take the last insn as an argument to avoid
5411 looping through the list. */
5414 push_to_sequence2 (rtx_insn
*first
, rtx_insn
*last
)
5418 set_first_insn (first
);
5419 set_last_insn (last
);
5422 /* Set up the outer-level insn chain
5423 as the current sequence, saving the previously current one. */
5426 push_topmost_sequence (void)
5428 struct sequence_stack
*top
;
5432 top
= get_topmost_sequence ();
5433 set_first_insn (top
->first
);
5434 set_last_insn (top
->last
);
5437 /* After emitting to the outer-level insn chain, update the outer-level
5438 insn chain, and restore the previous saved state. */
5441 pop_topmost_sequence (void)
5443 struct sequence_stack
*top
;
5445 top
= get_topmost_sequence ();
5446 top
->first
= get_insns ();
5447 top
->last
= get_last_insn ();
5452 /* After emitting to a sequence, restore previous saved state.
5454 To get the contents of the sequence just made, you must call
5455 `get_insns' *before* calling here.
5457 If the compiler might have deferred popping arguments while
5458 generating this sequence, and this sequence will not be immediately
5459 inserted into the instruction stream, use do_pending_stack_adjust
5460 before calling get_insns. That will ensure that the deferred
5461 pops are inserted into this sequence, and not into some random
5462 location in the instruction stream. See INHIBIT_DEFER_POP for more
5463 information about deferred popping of arguments. */
5468 struct sequence_stack
*tem
= get_current_sequence ()->next
;
5470 set_first_insn (tem
->first
);
5471 set_last_insn (tem
->last
);
5472 get_current_sequence ()->next
= tem
->next
;
5474 memset (tem
, 0, sizeof (*tem
));
5475 tem
->next
= free_sequence_stack
;
5476 free_sequence_stack
= tem
;
5479 /* Return 1 if currently emitting into a sequence. */
5482 in_sequence_p (void)
5484 return get_current_sequence ()->next
!= 0;
5487 /* Put the various virtual registers into REGNO_REG_RTX. */
5490 init_virtual_regs (void)
5492 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5493 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5494 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5495 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5496 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5497 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5498 = virtual_preferred_stack_boundary_rtx
;
5502 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5503 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5504 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5505 static int copy_insn_n_scratches
;
5507 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5508 copied an ASM_OPERANDS.
5509 In that case, it is the original input-operand vector. */
5510 static rtvec orig_asm_operands_vector
;
5512 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5513 copied an ASM_OPERANDS.
5514 In that case, it is the copied input-operand vector. */
5515 static rtvec copy_asm_operands_vector
;
5517 /* Likewise for the constraints vector. */
5518 static rtvec orig_asm_constraints_vector
;
5519 static rtvec copy_asm_constraints_vector
;
5521 /* Recursively create a new copy of an rtx for copy_insn.
5522 This function differs from copy_rtx in that it handles SCRATCHes and
5523 ASM_OPERANDs properly.
5524 Normally, this function is not used directly; use copy_insn as front end.
5525 However, you could first copy an insn pattern with copy_insn and then use
5526 this function afterwards to properly copy any REG_NOTEs containing
5530 copy_insn_1 (rtx orig
)
5535 const char *format_ptr
;
5540 code
= GET_CODE (orig
);
5555 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5556 clobbers or clobbers of hard registers that originated as pseudos.
5557 This is needed to allow safe register renaming. */
5558 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
5559 && ORIGINAL_REGNO (XEXP (orig
, 0)) == REGNO (XEXP (orig
, 0)))
5564 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5565 if (copy_insn_scratch_in
[i
] == orig
)
5566 return copy_insn_scratch_out
[i
];
5570 if (shared_const_p (orig
))
5574 /* A MEM with a constant address is not sharable. The problem is that
5575 the constant address may need to be reloaded. If the mem is shared,
5576 then reloading one copy of this mem will cause all copies to appear
5577 to have been reloaded. */
5583 /* Copy the various flags, fields, and other information. We assume
5584 that all fields need copying, and then clear the fields that should
5585 not be copied. That is the sensible default behavior, and forces
5586 us to explicitly document why we are *not* copying a flag. */
5587 copy
= shallow_copy_rtx (orig
);
5589 /* We do not copy the USED flag, which is used as a mark bit during
5590 walks over the RTL. */
5591 RTX_FLAG (copy
, used
) = 0;
5593 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5596 RTX_FLAG (copy
, jump
) = 0;
5597 RTX_FLAG (copy
, call
) = 0;
5598 RTX_FLAG (copy
, frame_related
) = 0;
5601 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5603 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5604 switch (*format_ptr
++)
5607 if (XEXP (orig
, i
) != NULL
)
5608 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5613 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5614 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5615 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5616 XVEC (copy
, i
) = copy_asm_operands_vector
;
5617 else if (XVEC (orig
, i
) != NULL
)
5619 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5620 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5621 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5632 /* These are left unchanged. */
5639 if (code
== SCRATCH
)
5641 i
= copy_insn_n_scratches
++;
5642 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5643 copy_insn_scratch_in
[i
] = orig
;
5644 copy_insn_scratch_out
[i
] = copy
;
5646 else if (code
== ASM_OPERANDS
)
5648 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5649 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5650 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5651 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5657 /* Create a new copy of an rtx.
5658 This function differs from copy_rtx in that it handles SCRATCHes and
5659 ASM_OPERANDs properly.
5660 INSN doesn't really have to be a full INSN; it could be just the
5663 copy_insn (rtx insn
)
5665 copy_insn_n_scratches
= 0;
5666 orig_asm_operands_vector
= 0;
5667 orig_asm_constraints_vector
= 0;
5668 copy_asm_operands_vector
= 0;
5669 copy_asm_constraints_vector
= 0;
5670 return copy_insn_1 (insn
);
5673 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5674 on that assumption that INSN itself remains in its original place. */
5677 copy_delay_slot_insn (rtx_insn
*insn
)
5679 /* Copy INSN with its rtx_code, all its notes, location etc. */
5680 insn
= as_a
<rtx_insn
*> (copy_rtx (insn
));
5681 INSN_UID (insn
) = cur_insn_uid
++;
5685 /* Initialize data structures and variables in this file
5686 before generating rtl for each function. */
5691 set_first_insn (NULL
);
5692 set_last_insn (NULL
);
5693 if (MIN_NONDEBUG_INSN_UID
)
5694 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5697 cur_debug_insn_uid
= 1;
5698 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5699 first_label_num
= label_num
;
5700 get_current_sequence ()->next
= NULL
;
5702 /* Init the tables that describe all the pseudo regs. */
5704 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5706 crtl
->emit
.regno_pointer_align
5707 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5709 regno_reg_rtx
= ggc_vec_alloc
<rtx
> (crtl
->emit
.regno_pointer_align_length
);
5711 /* Put copies of all the hard registers into regno_reg_rtx. */
5712 memcpy (regno_reg_rtx
,
5713 initial_regno_reg_rtx
,
5714 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5716 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5717 init_virtual_regs ();
5719 /* Indicate that the virtual registers and stack locations are
5721 REG_POINTER (stack_pointer_rtx
) = 1;
5722 REG_POINTER (frame_pointer_rtx
) = 1;
5723 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5724 REG_POINTER (arg_pointer_rtx
) = 1;
5726 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5727 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5728 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5729 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5730 REG_POINTER (virtual_cfa_rtx
) = 1;
5732 #ifdef STACK_BOUNDARY
5733 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5734 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5735 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5736 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5738 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5739 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5740 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5741 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5742 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5745 #ifdef INIT_EXPANDERS
5750 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5753 gen_const_vector (machine_mode mode
, int constant
)
5760 units
= GET_MODE_NUNITS (mode
);
5761 inner
= GET_MODE_INNER (mode
);
5763 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5765 v
= rtvec_alloc (units
);
5767 /* We need to call this function after we set the scalar const_tiny_rtx
5769 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5771 for (i
= 0; i
< units
; ++i
)
5772 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5774 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5778 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5779 all elements are zero, and the one vector when all elements are one. */
5781 gen_rtx_CONST_VECTOR (machine_mode mode
, rtvec v
)
5783 machine_mode inner
= GET_MODE_INNER (mode
);
5784 int nunits
= GET_MODE_NUNITS (mode
);
5788 /* Check to see if all of the elements have the same value. */
5789 x
= RTVEC_ELT (v
, nunits
- 1);
5790 for (i
= nunits
- 2; i
>= 0; i
--)
5791 if (RTVEC_ELT (v
, i
) != x
)
5794 /* If the values are all the same, check to see if we can use one of the
5795 standard constant vectors. */
5798 if (x
== CONST0_RTX (inner
))
5799 return CONST0_RTX (mode
);
5800 else if (x
== CONST1_RTX (inner
))
5801 return CONST1_RTX (mode
);
5802 else if (x
== CONSTM1_RTX (inner
))
5803 return CONSTM1_RTX (mode
);
5806 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5809 /* Initialise global register information required by all functions. */
5812 init_emit_regs (void)
5818 /* Reset register attributes */
5819 reg_attrs_htab
->empty ();
5821 /* We need reg_raw_mode, so initialize the modes now. */
5822 init_reg_modes_target ();
5824 /* Assign register numbers to the globally defined register rtx. */
5825 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5826 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5827 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5828 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5829 virtual_incoming_args_rtx
=
5830 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5831 virtual_stack_vars_rtx
=
5832 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5833 virtual_stack_dynamic_rtx
=
5834 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5835 virtual_outgoing_args_rtx
=
5836 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5837 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5838 virtual_preferred_stack_boundary_rtx
=
5839 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5841 /* Initialize RTL for commonly used hard registers. These are
5842 copied into regno_reg_rtx as we begin to compile each function. */
5843 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5844 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5846 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5847 return_address_pointer_rtx
5848 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5851 pic_offset_table_rtx
= NULL_RTX
;
5852 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5853 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5855 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5857 mode
= (machine_mode
) i
;
5858 attrs
= ggc_cleared_alloc
<mem_attrs
> ();
5859 attrs
->align
= BITS_PER_UNIT
;
5860 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5861 if (mode
!= BLKmode
)
5863 attrs
->size_known_p
= true;
5864 attrs
->size
= GET_MODE_SIZE (mode
);
5865 if (STRICT_ALIGNMENT
)
5866 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5868 mode_mem_attrs
[i
] = attrs
;
5872 /* Initialize global machine_mode variables. */
5875 init_derived_machine_modes (void)
5877 byte_mode
= VOIDmode
;
5878 word_mode
= VOIDmode
;
5880 for (machine_mode mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5882 mode
= GET_MODE_WIDER_MODE (mode
))
5884 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5885 && byte_mode
== VOIDmode
)
5888 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5889 && word_mode
== VOIDmode
)
5893 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5896 /* Create some permanent unique rtl objects shared between all functions. */
5899 init_emit_once (void)
5903 machine_mode double_mode
;
5905 /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
5906 CONST_FIXED, and memory attribute hash tables. */
5907 const_int_htab
= hash_table
<const_int_hasher
>::create_ggc (37);
5909 #if TARGET_SUPPORTS_WIDE_INT
5910 const_wide_int_htab
= hash_table
<const_wide_int_hasher
>::create_ggc (37);
5912 const_double_htab
= hash_table
<const_double_hasher
>::create_ggc (37);
5914 const_fixed_htab
= hash_table
<const_fixed_hasher
>::create_ggc (37);
5916 reg_attrs_htab
= hash_table
<reg_attr_hasher
>::create_ggc (37);
5918 #ifdef INIT_EXPANDERS
5919 /* This is to initialize {init|mark|free}_machine_status before the first
5920 call to push_function_context_to. This is needed by the Chill front
5921 end which calls push_function_context_to before the first call to
5922 init_function_start. */
5926 /* Create the unique rtx's for certain rtx codes and operand values. */
5928 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5929 tries to use these variables. */
5930 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5931 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5932 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5934 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5935 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5936 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5938 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5940 double_mode
= mode_for_size (DOUBLE_TYPE_SIZE
, MODE_FLOAT
, 0);
5942 real_from_integer (&dconst0
, double_mode
, 0, SIGNED
);
5943 real_from_integer (&dconst1
, double_mode
, 1, SIGNED
);
5944 real_from_integer (&dconst2
, double_mode
, 2, SIGNED
);
5949 dconsthalf
= dconst1
;
5950 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5952 for (i
= 0; i
< 3; i
++)
5954 const REAL_VALUE_TYPE
*const r
=
5955 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5957 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5959 mode
= GET_MODE_WIDER_MODE (mode
))
5960 const_tiny_rtx
[i
][(int) mode
] =
5961 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5963 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5965 mode
= GET_MODE_WIDER_MODE (mode
))
5966 const_tiny_rtx
[i
][(int) mode
] =
5967 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5969 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5971 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5973 mode
= GET_MODE_WIDER_MODE (mode
))
5974 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5976 for (mode
= MIN_MODE_PARTIAL_INT
;
5977 mode
<= MAX_MODE_PARTIAL_INT
;
5978 mode
= (machine_mode
)((int)(mode
) + 1))
5979 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5982 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5984 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5986 mode
= GET_MODE_WIDER_MODE (mode
))
5987 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5989 for (mode
= MIN_MODE_PARTIAL_INT
;
5990 mode
<= MAX_MODE_PARTIAL_INT
;
5991 mode
= (machine_mode
)((int)(mode
) + 1))
5992 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5994 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5996 mode
= GET_MODE_WIDER_MODE (mode
))
5998 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5999 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
6002 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
6004 mode
= GET_MODE_WIDER_MODE (mode
))
6006 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
6007 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
6010 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
6012 mode
= GET_MODE_WIDER_MODE (mode
))
6014 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6015 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6016 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
6019 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
6021 mode
= GET_MODE_WIDER_MODE (mode
))
6023 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6024 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6027 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
6029 mode
= GET_MODE_WIDER_MODE (mode
))
6031 FCONST0 (mode
).data
.high
= 0;
6032 FCONST0 (mode
).data
.low
= 0;
6033 FCONST0 (mode
).mode
= mode
;
6034 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6035 FCONST0 (mode
), mode
);
6038 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
6040 mode
= GET_MODE_WIDER_MODE (mode
))
6042 FCONST0 (mode
).data
.high
= 0;
6043 FCONST0 (mode
).data
.low
= 0;
6044 FCONST0 (mode
).mode
= mode
;
6045 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6046 FCONST0 (mode
), mode
);
6049 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
6051 mode
= GET_MODE_WIDER_MODE (mode
))
6053 FCONST0 (mode
).data
.high
= 0;
6054 FCONST0 (mode
).data
.low
= 0;
6055 FCONST0 (mode
).mode
= mode
;
6056 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6057 FCONST0 (mode
), mode
);
6059 /* We store the value 1. */
6060 FCONST1 (mode
).data
.high
= 0;
6061 FCONST1 (mode
).data
.low
= 0;
6062 FCONST1 (mode
).mode
= mode
;
6064 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6065 HOST_BITS_PER_DOUBLE_INT
,
6066 SIGNED_FIXED_POINT_MODE_P (mode
));
6067 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6068 FCONST1 (mode
), mode
);
6071 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
6073 mode
= GET_MODE_WIDER_MODE (mode
))
6075 FCONST0 (mode
).data
.high
= 0;
6076 FCONST0 (mode
).data
.low
= 0;
6077 FCONST0 (mode
).mode
= mode
;
6078 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6079 FCONST0 (mode
), mode
);
6081 /* We store the value 1. */
6082 FCONST1 (mode
).data
.high
= 0;
6083 FCONST1 (mode
).data
.low
= 0;
6084 FCONST1 (mode
).mode
= mode
;
6086 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6087 HOST_BITS_PER_DOUBLE_INT
,
6088 SIGNED_FIXED_POINT_MODE_P (mode
));
6089 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6090 FCONST1 (mode
), mode
);
6093 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
6095 mode
= GET_MODE_WIDER_MODE (mode
))
6097 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6100 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
6102 mode
= GET_MODE_WIDER_MODE (mode
))
6104 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6107 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
6109 mode
= GET_MODE_WIDER_MODE (mode
))
6111 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6112 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6115 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
6117 mode
= GET_MODE_WIDER_MODE (mode
))
6119 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6120 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6123 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
6124 if (GET_MODE_CLASS ((machine_mode
) i
) == MODE_CC
)
6125 const_tiny_rtx
[0][i
] = const0_rtx
;
6127 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
6128 if (STORE_FLAG_VALUE
== 1)
6129 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
6131 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_POINTER_BOUNDS
);
6133 mode
= GET_MODE_WIDER_MODE (mode
))
6135 wide_int wi_zero
= wi::zero (GET_MODE_PRECISION (mode
));
6136 const_tiny_rtx
[0][mode
] = immed_wide_int_const (wi_zero
, mode
);
6139 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
6140 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
6141 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
6142 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
6145 /* Produce exact duplicate of insn INSN after AFTER.
6146 Care updating of libcall regions if present. */
6149 emit_copy_of_insn_after (rtx_insn
*insn
, rtx_insn
*after
)
6154 switch (GET_CODE (insn
))
6157 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
6161 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
6162 CROSSING_JUMP_P (new_rtx
) = CROSSING_JUMP_P (insn
);
6166 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
6170 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
6171 if (CALL_INSN_FUNCTION_USAGE (insn
))
6172 CALL_INSN_FUNCTION_USAGE (new_rtx
)
6173 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
6174 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
6175 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
6176 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
6177 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
6178 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
6185 /* Update LABEL_NUSES. */
6186 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
6188 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
6190 /* If the old insn is frame related, then so is the new one. This is
6191 primarily needed for IA-64 unwind info which marks epilogue insns,
6192 which may be duplicated by the basic block reordering code. */
6193 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
6195 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6196 will make them. REG_LABEL_TARGETs are created there too, but are
6197 supposed to be sticky, so we copy them. */
6198 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
6199 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
6201 if (GET_CODE (link
) == EXPR_LIST
)
6202 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
6203 copy_insn_1 (XEXP (link
, 0)));
6205 add_shallow_copy_of_reg_note (new_rtx
, link
);
6208 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6212 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6214 gen_hard_reg_clobber (machine_mode mode
, unsigned int regno
)
6216 if (hard_reg_clobbers
[mode
][regno
])
6217 return hard_reg_clobbers
[mode
][regno
];
6219 return (hard_reg_clobbers
[mode
][regno
] =
6220 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6223 location_t prologue_location
;
6224 location_t epilogue_location
;
6226 /* Hold current location information and last location information, so the
6227 datastructures are built lazily only when some instructions in given
6228 place are needed. */
6229 static location_t curr_location
;
6231 /* Allocate insn location datastructure. */
6233 insn_locations_init (void)
6235 prologue_location
= epilogue_location
= 0;
6236 curr_location
= UNKNOWN_LOCATION
;
6239 /* At the end of emit stage, clear current location. */
6241 insn_locations_finalize (void)
6243 epilogue_location
= curr_location
;
6244 curr_location
= UNKNOWN_LOCATION
;
6247 /* Set current location. */
6249 set_curr_insn_location (location_t location
)
6251 curr_location
= location
;
6254 /* Get current location. */
6256 curr_insn_location (void)
6258 return curr_location
;
6261 /* Return lexical scope block insn belongs to. */
6263 insn_scope (const rtx_insn
*insn
)
6265 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6268 /* Return line number of the statement that produced this insn. */
6270 insn_line (const rtx_insn
*insn
)
6272 return LOCATION_LINE (INSN_LOCATION (insn
));
6275 /* Return source file of the statement that produced this insn. */
6277 insn_file (const rtx_insn
*insn
)
6279 return LOCATION_FILE (INSN_LOCATION (insn
));
6282 /* Return expanded location of the statement that produced this insn. */
6284 insn_location (const rtx_insn
*insn
)
6286 return expand_location (INSN_LOCATION (insn
));
6289 /* Return true if memory model MODEL requires a pre-operation (release-style)
6290 barrier or a post-operation (acquire-style) barrier. While not universal,
6291 this function matches behavior of several targets. */
6294 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6296 switch (model
& MEMMODEL_MASK
)
6298 case MEMMODEL_RELAXED
:
6299 case MEMMODEL_CONSUME
:
6301 case MEMMODEL_RELEASE
:
6302 case MEMMODEL_SYNC_RELEASE
:
6304 case MEMMODEL_ACQUIRE
:
6305 case MEMMODEL_SYNC_ACQUIRE
:
6307 case MEMMODEL_ACQ_REL
:
6308 case MEMMODEL_SEQ_CST
:
6309 case MEMMODEL_SYNC_SEQ_CST
:
6316 #include "gt-emit-rtl.h"