1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static GTY(()) int label_num
= 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num
;
78 /* Value label_num had when set_new_last_label_num was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num
;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers
;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl
[GR_MAX
];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
100 rtx (*gen_lowpart
) (enum machine_mode mode
, rtx x
) = gen_lowpart_general
;
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
110 REAL_VALUE_TYPE dconst0
;
111 REAL_VALUE_TYPE dconst1
;
112 REAL_VALUE_TYPE dconst2
;
113 REAL_VALUE_TYPE dconst3
;
114 REAL_VALUE_TYPE dconst10
;
115 REAL_VALUE_TYPE dconstm1
;
116 REAL_VALUE_TYPE dconstm2
;
117 REAL_VALUE_TYPE dconsthalf
;
118 REAL_VALUE_TYPE dconstthird
;
119 REAL_VALUE_TYPE dconstpi
;
120 REAL_VALUE_TYPE dconste
;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
141 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
142 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
144 /* This is used to implement __builtin_return_address for some machines.
145 See for instance the MIPS port. */
146 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
148 /* We make one copy of (const_int C) where C is in
149 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
150 to save space during the compilation and simplify comparisons of
153 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
155 /* A hash table storing CONST_INTs whose absolute value is greater
156 than MAX_SAVED_CONST_INT. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
159 htab_t const_int_htab
;
161 /* A hash table storing memory attribute structures. */
162 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
163 htab_t mem_attrs_htab
;
165 /* A hash table storing register attribute structures. */
166 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
167 htab_t reg_attrs_htab
;
169 /* A hash table storing all CONST_DOUBLEs. */
170 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
171 htab_t const_double_htab
;
173 #define first_insn (cfun->emit->x_first_insn)
174 #define last_insn (cfun->emit->x_last_insn)
175 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176 #define last_location (cfun->emit->x_last_location)
177 #define first_label_num (cfun->emit->x_first_label_num)
179 static rtx
make_jump_insn_raw (rtx
);
180 static rtx
make_call_insn_raw (rtx
);
181 static rtx
find_line_note (rtx
);
182 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
183 static void unshare_all_decls (tree
);
184 static void reset_used_decls (tree
);
185 static void mark_label_nuses (rtx
);
186 static hashval_t
const_int_htab_hash (const void *);
187 static int const_int_htab_eq (const void *, const void *);
188 static hashval_t
const_double_htab_hash (const void *);
189 static int const_double_htab_eq (const void *, const void *);
190 static rtx
lookup_const_double (rtx
);
191 static hashval_t
mem_attrs_htab_hash (const void *);
192 static int mem_attrs_htab_eq (const void *, const void *);
193 static mem_attrs
*get_mem_attrs (HOST_WIDE_INT
, tree
, rtx
, rtx
, unsigned int,
195 static hashval_t
reg_attrs_htab_hash (const void *);
196 static int reg_attrs_htab_eq (const void *, const void *);
197 static reg_attrs
*get_reg_attrs (tree
, int);
198 static tree
component_ref_for_mem_expr (tree
);
199 static rtx
gen_const_vector_0 (enum machine_mode
);
200 static rtx
gen_complex_constant_part (enum machine_mode
, rtx
, int);
201 static void copy_rtx_if_shared_1 (rtx
*orig
);
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability
= -1;
207 /* Returns a hash code for X (which is a really a CONST_INT). */
210 const_int_htab_hash (const void *x
)
212 return (hashval_t
) INTVAL ((rtx
) x
);
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
220 const_int_htab_eq (const void *x
, const void *y
)
222 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
227 const_double_htab_hash (const void *x
)
232 if (GET_MODE (value
) == VOIDmode
)
233 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
236 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h
^= GET_MODE (value
);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
246 const_double_htab_eq (const void *x
, const void *y
)
248 rtx a
= (rtx
)x
, b
= (rtx
)y
;
250 if (GET_MODE (a
) != GET_MODE (b
))
252 if (GET_MODE (a
) == VOIDmode
)
253 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
254 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
257 CONST_DOUBLE_REAL_VALUE (b
));
260 /* Returns a hash code for X (which is a really a mem_attrs *). */
263 mem_attrs_htab_hash (const void *x
)
265 mem_attrs
*p
= (mem_attrs
*) x
;
267 return (p
->alias
^ (p
->align
* 1000)
268 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
269 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
273 /* Returns nonzero if the value represented by X (which is really a
274 mem_attrs *) is the same as that given by Y (which is also really a
278 mem_attrs_htab_eq (const void *x
, const void *y
)
280 mem_attrs
*p
= (mem_attrs
*) x
;
281 mem_attrs
*q
= (mem_attrs
*) y
;
283 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
284 && p
->size
== q
->size
&& p
->align
== q
->align
);
287 /* Allocate a new mem_attrs structure and insert it into the hash table if
288 one identical to it is not already in the table. We are doing this for
292 get_mem_attrs (HOST_WIDE_INT alias
, tree expr
, rtx offset
, rtx size
,
293 unsigned int align
, enum machine_mode mode
)
298 /* If everything is the default, we can just return zero.
299 This must match what the corresponding MEM_* macros return when the
300 field is not present. */
301 if (alias
== 0 && expr
== 0 && offset
== 0
303 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
304 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
305 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
310 attrs
.offset
= offset
;
314 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
317 *slot
= ggc_alloc (sizeof (mem_attrs
));
318 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
324 /* Returns a hash code for X (which is a really a reg_attrs *). */
327 reg_attrs_htab_hash (const void *x
)
329 reg_attrs
*p
= (reg_attrs
*) x
;
331 return ((p
->offset
* 1000) ^ (long) p
->decl
);
334 /* Returns nonzero if the value represented by X (which is really a
335 reg_attrs *) is the same as that given by Y (which is also really a
339 reg_attrs_htab_eq (const void *x
, const void *y
)
341 reg_attrs
*p
= (reg_attrs
*) x
;
342 reg_attrs
*q
= (reg_attrs
*) y
;
344 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
346 /* Allocate a new reg_attrs structure and insert it into the hash table if
347 one identical to it is not already in the table. We are doing this for
351 get_reg_attrs (tree decl
, int offset
)
356 /* If everything is the default, we can just return zero. */
357 if (decl
== 0 && offset
== 0)
361 attrs
.offset
= offset
;
363 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
366 *slot
= ggc_alloc (sizeof (reg_attrs
));
367 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
373 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
374 don't attempt to share with the various global pieces of rtl (such as
375 frame_pointer_rtx). */
378 gen_raw_REG (enum machine_mode mode
, int regno
)
380 rtx x
= gen_rtx_raw_REG (mode
, regno
);
381 ORIGINAL_REGNO (x
) = regno
;
385 /* There are some RTL codes that require special attention; the generation
386 functions do the raw handling. If you add to this list, modify
387 special_rtx in gengenrtl.c as well. */
390 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
394 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
395 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
397 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
398 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
399 return const_true_rtx
;
402 /* Look up the CONST_INT in the hash table. */
403 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
404 (hashval_t
) arg
, INSERT
);
406 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
412 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
414 return GEN_INT (trunc_int_for_mode (c
, mode
));
417 /* CONST_DOUBLEs might be created from pairs of integers, or from
418 REAL_VALUE_TYPEs. Also, their length is known only at run time,
419 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
421 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
422 hash table. If so, return its counterpart; otherwise add it
423 to the hash table and return it. */
425 lookup_const_double (rtx real
)
427 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
434 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
435 VALUE in mode MODE. */
437 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
439 rtx real
= rtx_alloc (CONST_DOUBLE
);
440 PUT_MODE (real
, mode
);
442 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
444 return lookup_const_double (real
);
447 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
448 of ints: I0 is the low-order word and I1 is the high-order word.
449 Do not use this routine for non-integer modes; convert to
450 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
453 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
458 if (mode
!= VOIDmode
)
461 if (GET_MODE_CLASS (mode
) != MODE_INT
462 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
463 /* We can get a 0 for an error mark. */
464 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
465 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
468 /* We clear out all bits that don't belong in MODE, unless they and
469 our sign bit are all one. So we get either a reasonable negative
470 value or a reasonable unsigned value for this mode. */
471 width
= GET_MODE_BITSIZE (mode
);
472 if (width
< HOST_BITS_PER_WIDE_INT
473 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
474 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
475 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
476 else if (width
== HOST_BITS_PER_WIDE_INT
477 && ! (i1
== ~0 && i0
< 0))
479 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
480 /* We cannot represent this value as a constant. */
483 /* If this would be an entire word for the target, but is not for
484 the host, then sign-extend on the host so that the number will
485 look the same way on the host that it would on the target.
487 For example, when building a 64 bit alpha hosted 32 bit sparc
488 targeted compiler, then we want the 32 bit unsigned value -1 to be
489 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
490 The latter confuses the sparc backend. */
492 if (width
< HOST_BITS_PER_WIDE_INT
493 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
494 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
496 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
499 ??? Strictly speaking, this is wrong if we create a CONST_INT for
500 a large unsigned constant with the size of MODE being
501 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
502 in a wider mode. In that case we will mis-interpret it as a
505 Unfortunately, the only alternative is to make a CONST_DOUBLE for
506 any constant in any mode if it is an unsigned constant larger
507 than the maximum signed integer in an int on the host. However,
508 doing this will break everyone that always expects to see a
509 CONST_INT for SImode and smaller.
511 We have always been making CONST_INTs in this case, so nothing
512 new is being broken. */
514 if (width
<= HOST_BITS_PER_WIDE_INT
)
515 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
518 /* If this integer fits in one word, return a CONST_INT. */
519 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
522 /* We use VOIDmode for integers. */
523 value
= rtx_alloc (CONST_DOUBLE
);
524 PUT_MODE (value
, VOIDmode
);
526 CONST_DOUBLE_LOW (value
) = i0
;
527 CONST_DOUBLE_HIGH (value
) = i1
;
529 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
530 XWINT (value
, i
) = 0;
532 return lookup_const_double (value
);
536 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
538 /* In case the MD file explicitly references the frame pointer, have
539 all such references point to the same frame pointer. This is
540 used during frame pointer elimination to distinguish the explicit
541 references to these registers from pseudos that happened to be
544 If we have eliminated the frame pointer or arg pointer, we will
545 be using it as a normal register, for example as a spill
546 register. In such cases, we might be accessing it in a mode that
547 is not Pmode and therefore cannot use the pre-allocated rtx.
549 Also don't do this when we are making new REGs in reload, since
550 we don't want to get confused with the real pointers. */
552 if (mode
== Pmode
&& !reload_in_progress
)
554 if (regno
== FRAME_POINTER_REGNUM
555 && (!reload_completed
|| frame_pointer_needed
))
556 return frame_pointer_rtx
;
557 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
558 if (regno
== HARD_FRAME_POINTER_REGNUM
559 && (!reload_completed
|| frame_pointer_needed
))
560 return hard_frame_pointer_rtx
;
562 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
563 if (regno
== ARG_POINTER_REGNUM
)
564 return arg_pointer_rtx
;
566 #ifdef RETURN_ADDRESS_POINTER_REGNUM
567 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
568 return return_address_pointer_rtx
;
570 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
571 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
572 return pic_offset_table_rtx
;
573 if (regno
== STACK_POINTER_REGNUM
)
574 return stack_pointer_rtx
;
578 /* If the per-function register table has been set up, try to re-use
579 an existing entry in that table to avoid useless generation of RTL.
581 This code is disabled for now until we can fix the various backends
582 which depend on having non-shared hard registers in some cases. Long
583 term we want to re-enable this code as it can significantly cut down
584 on the amount of useless RTL that gets generated.
586 We'll also need to fix some code that runs after reload that wants to
587 set ORIGINAL_REGNO. */
592 && regno
< FIRST_PSEUDO_REGISTER
593 && reg_raw_mode
[regno
] == mode
)
594 return regno_reg_rtx
[regno
];
597 return gen_raw_REG (mode
, regno
);
601 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
603 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
605 /* This field is not cleared by the mere allocation of the rtx, so
613 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
615 /* This is the most common failure type.
616 Catch it early so we can see who does it. */
617 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
620 /* This check isn't usable right now because combine will
621 throw arbitrary crap like a CALL into a SUBREG in
622 gen_lowpart_for_combine so we must just eat it. */
624 /* Check for this too. */
625 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
628 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
631 /* Generate a SUBREG representing the least-significant part of REG if MODE
632 is smaller than mode of REG, otherwise paradoxical SUBREG. */
635 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
637 enum machine_mode inmode
;
639 inmode
= GET_MODE (reg
);
640 if (inmode
== VOIDmode
)
642 return gen_rtx_SUBREG (mode
, reg
,
643 subreg_lowpart_offset (mode
, inmode
));
646 /* gen_rtvec (n, [rt1, ..., rtn])
648 ** This routine creates an rtvec and stores within it the
649 ** pointers to rtx's which are its arguments.
654 gen_rtvec (int n
, ...)
663 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
665 vector
= alloca (n
* sizeof (rtx
));
667 for (i
= 0; i
< n
; i
++)
668 vector
[i
] = va_arg (p
, rtx
);
670 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
674 return gen_rtvec_v (save_n
, vector
);
678 gen_rtvec_v (int n
, rtx
*argp
)
684 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
686 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
688 for (i
= 0; i
< n
; i
++)
689 rt_val
->elem
[i
] = *argp
++;
694 /* Generate a REG rtx for a new pseudo register of mode MODE.
695 This pseudo is assigned the next sequential register number. */
698 gen_reg_rtx (enum machine_mode mode
)
700 struct function
*f
= cfun
;
703 /* Don't let anything called after initial flow analysis create new
708 if (generating_concat_p
709 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
710 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
712 /* For complex modes, don't make a single pseudo.
713 Instead, make a CONCAT of two pseudos.
714 This allows noncontiguous allocation of the real and imaginary parts,
715 which makes much better code. Besides, allocating DCmode
716 pseudos overstrains reload on some machines like the 386. */
717 rtx realpart
, imagpart
;
718 enum machine_mode partmode
= GET_MODE_INNER (mode
);
720 realpart
= gen_reg_rtx (partmode
);
721 imagpart
= gen_reg_rtx (partmode
);
722 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
725 /* Make sure regno_pointer_align, and regno_reg_rtx are large
726 enough to have an element for this pseudo reg number. */
728 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
730 int old_size
= f
->emit
->regno_pointer_align_length
;
734 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
735 memset (new + old_size
, 0, old_size
);
736 f
->emit
->regno_pointer_align
= (unsigned char *) new;
738 new1
= ggc_realloc (f
->emit
->x_regno_reg_rtx
,
739 old_size
* 2 * sizeof (rtx
));
740 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
741 regno_reg_rtx
= new1
;
743 f
->emit
->regno_pointer_align_length
= old_size
* 2;
746 val
= gen_raw_REG (mode
, reg_rtx_no
);
747 regno_reg_rtx
[reg_rtx_no
++] = val
;
751 /* Generate a register with same attributes as REG,
752 but offsetted by OFFSET. */
755 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
, int offset
)
757 rtx
new = gen_rtx_REG (mode
, regno
);
758 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
759 REG_OFFSET (reg
) + offset
);
763 /* Set the decl for MEM to DECL. */
766 set_reg_attrs_from_mem (rtx reg
, rtx mem
)
768 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
770 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
773 /* Set the register attributes for registers contained in PARM_RTX.
774 Use needed values from memory attributes of MEM. */
777 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
779 if (GET_CODE (parm_rtx
) == REG
)
780 set_reg_attrs_from_mem (parm_rtx
, mem
);
781 else if (GET_CODE (parm_rtx
) == PARALLEL
)
783 /* Check for a NULL entry in the first slot, used to indicate that the
784 parameter goes both on the stack and in registers. */
785 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
786 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
788 rtx x
= XVECEXP (parm_rtx
, 0, i
);
789 if (GET_CODE (XEXP (x
, 0)) == REG
)
790 REG_ATTRS (XEXP (x
, 0))
791 = get_reg_attrs (MEM_EXPR (mem
),
792 INTVAL (XEXP (x
, 1)));
797 /* Assign the RTX X to declaration T. */
799 set_decl_rtl (tree t
, rtx x
)
801 DECL_CHECK (t
)->decl
.rtl
= x
;
805 /* For register, we maintain the reverse information too. */
806 if (GET_CODE (x
) == REG
)
807 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
808 else if (GET_CODE (x
) == SUBREG
)
809 REG_ATTRS (SUBREG_REG (x
))
810 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
811 if (GET_CODE (x
) == CONCAT
)
813 if (REG_P (XEXP (x
, 0)))
814 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
815 if (REG_P (XEXP (x
, 1)))
816 REG_ATTRS (XEXP (x
, 1))
817 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
819 if (GET_CODE (x
) == PARALLEL
)
822 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
824 rtx y
= XVECEXP (x
, 0, i
);
825 if (REG_P (XEXP (y
, 0)))
826 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
831 /* Assign the RTX X to parameter declaration T. */
833 set_decl_incoming_rtl (tree t
, rtx x
)
835 DECL_INCOMING_RTL (t
) = x
;
839 /* For register, we maintain the reverse information too. */
840 if (GET_CODE (x
) == REG
)
841 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
842 else if (GET_CODE (x
) == SUBREG
)
843 REG_ATTRS (SUBREG_REG (x
))
844 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
845 if (GET_CODE (x
) == CONCAT
)
847 if (REG_P (XEXP (x
, 0)))
848 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
849 if (REG_P (XEXP (x
, 1)))
850 REG_ATTRS (XEXP (x
, 1))
851 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
853 if (GET_CODE (x
) == PARALLEL
)
856 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
858 rtx y
= XVECEXP (x
, 0, i
);
859 if (REG_P (XEXP (y
, 0)))
860 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
865 /* Identify REG (which may be a CONCAT) as a user register. */
868 mark_user_reg (rtx reg
)
870 if (GET_CODE (reg
) == CONCAT
)
872 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
873 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
875 else if (GET_CODE (reg
) == REG
)
876 REG_USERVAR_P (reg
) = 1;
881 /* Identify REG as a probable pointer register and show its alignment
882 as ALIGN, if nonzero. */
885 mark_reg_pointer (rtx reg
, int align
)
887 if (! REG_POINTER (reg
))
889 REG_POINTER (reg
) = 1;
892 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
894 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
895 /* We can no-longer be sure just how aligned this pointer is. */
896 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
899 /* Return 1 plus largest pseudo reg number used in the current function. */
907 /* Return 1 + the largest label number used so far in the current function. */
912 if (last_label_num
&& label_num
== base_label_num
)
913 return last_label_num
;
917 /* Return first label number used in this function (if any were used). */
920 get_first_label_num (void)
922 return first_label_num
;
925 /* Return the final regno of X, which is a SUBREG of a hard
928 subreg_hard_regno (rtx x
, int check_mode
)
930 enum machine_mode mode
= GET_MODE (x
);
931 unsigned int byte_offset
, base_regno
, final_regno
;
932 rtx reg
= SUBREG_REG (x
);
934 /* This is where we attempt to catch illegal subregs
935 created by the compiler. */
936 if (GET_CODE (x
) != SUBREG
937 || GET_CODE (reg
) != REG
)
939 base_regno
= REGNO (reg
);
940 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
942 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
944 #ifdef ENABLE_CHECKING
945 if (!subreg_offset_representable_p (REGNO (reg
), GET_MODE (reg
),
946 SUBREG_BYTE (x
), mode
))
949 /* Catch non-congruent offsets too. */
950 byte_offset
= SUBREG_BYTE (x
);
951 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
954 final_regno
= subreg_regno (x
);
959 /* Return a value representing some low-order bits of X, where the number
960 of low-order bits is given by MODE. Note that no conversion is done
961 between floating-point and fixed-point values, rather, the bit
962 representation is returned.
964 This function handles the cases in common between gen_lowpart, below,
965 and two variants in cse.c and combine.c. These are the cases that can
966 be safely handled at all points in the compilation.
968 If this is not a case we can handle, return 0. */
971 gen_lowpart_common (enum machine_mode mode
, rtx x
)
973 int msize
= GET_MODE_SIZE (mode
);
976 enum machine_mode innermode
;
978 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
979 so we have to make one up. Yuk. */
980 innermode
= GET_MODE (x
);
981 if (GET_CODE (x
) == CONST_INT
&& msize
<= HOST_BITS_PER_WIDE_INT
)
982 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
983 else if (innermode
== VOIDmode
)
984 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
986 xsize
= GET_MODE_SIZE (innermode
);
988 if (innermode
== VOIDmode
|| innermode
== BLKmode
)
991 if (innermode
== mode
)
994 /* MODE must occupy no more words than the mode of X. */
995 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
996 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
999 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1000 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& msize
> xsize
)
1003 offset
= subreg_lowpart_offset (mode
, innermode
);
1005 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1006 && (GET_MODE_CLASS (mode
) == MODE_INT
1007 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1009 /* If we are getting the low-order part of something that has been
1010 sign- or zero-extended, we can either just use the object being
1011 extended or make a narrower extension. If we want an even smaller
1012 piece than the size of the object being extended, call ourselves
1015 This case is used mostly by combine and cse. */
1017 if (GET_MODE (XEXP (x
, 0)) == mode
)
1019 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1020 return gen_lowpart_common (mode
, XEXP (x
, 0));
1021 else if (msize
< xsize
)
1022 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1024 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
1025 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1026 || GET_CODE (x
) == CONST_DOUBLE
|| GET_CODE (x
) == CONST_INT
)
1027 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1029 /* Otherwise, we can't do this. */
1033 /* Return the constant real or imaginary part (which has mode MODE)
1034 of a complex value X. The IMAGPART_P argument determines whether
1035 the real or complex component should be returned. This function
1036 returns NULL_RTX if the component isn't a constant. */
1039 gen_complex_constant_part (enum machine_mode mode
, rtx x
, int imagpart_p
)
1043 if (GET_CODE (x
) == MEM
1044 && GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
)
1046 decl
= SYMBOL_REF_DECL (XEXP (x
, 0));
1047 if (decl
!= NULL_TREE
&& TREE_CODE (decl
) == COMPLEX_CST
)
1049 part
= imagpart_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
1050 if (TREE_CODE (part
) == REAL_CST
1051 || TREE_CODE (part
) == INTEGER_CST
)
1052 return expand_expr (part
, NULL_RTX
, mode
, 0);
1058 /* Return the real part (which has mode MODE) of a complex value X.
1059 This always comes at the low address in memory. */
1062 gen_realpart (enum machine_mode mode
, rtx x
)
1066 /* Handle complex constants. */
1067 part
= gen_complex_constant_part (mode
, x
, 0);
1068 if (part
!= NULL_RTX
)
1071 if (WORDS_BIG_ENDIAN
1072 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1074 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1076 ("can't access real part of complex value in hard register");
1077 else if (WORDS_BIG_ENDIAN
)
1078 return gen_highpart (mode
, x
);
1080 return gen_lowpart (mode
, x
);
1083 /* Return the imaginary part (which has mode MODE) of a complex value X.
1084 This always comes at the high address in memory. */
1087 gen_imagpart (enum machine_mode mode
, rtx x
)
1091 /* Handle complex constants. */
1092 part
= gen_complex_constant_part (mode
, x
, 1);
1093 if (part
!= NULL_RTX
)
1096 if (WORDS_BIG_ENDIAN
)
1097 return gen_lowpart (mode
, x
);
1098 else if (! WORDS_BIG_ENDIAN
1099 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1101 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1103 ("can't access imaginary part of complex value in hard register");
1105 return gen_highpart (mode
, x
);
1108 /* Return 1 iff X, assumed to be a SUBREG,
1109 refers to the real part of the complex value in its containing reg.
1110 Complex values are always stored with the real part in the first word,
1111 regardless of WORDS_BIG_ENDIAN. */
1114 subreg_realpart_p (rtx x
)
1116 if (GET_CODE (x
) != SUBREG
)
1119 return ((unsigned int) SUBREG_BYTE (x
)
1120 < (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1123 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1124 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1125 least-significant part of X.
1126 MODE specifies how big a part of X to return;
1127 it usually should not be larger than a word.
1128 If X is a MEM whose address is a QUEUED, the value may be so also. */
1131 gen_lowpart_general (enum machine_mode mode
, rtx x
)
1133 rtx result
= gen_lowpart_common (mode
, x
);
1137 else if (GET_CODE (x
) == REG
)
1139 /* Must be a hard reg that's not valid in MODE. */
1140 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1145 else if (GET_CODE (x
) == MEM
)
1147 /* The only additional case we can do is MEM. */
1150 /* The following exposes the use of "x" to CSE. */
1151 if (GET_MODE_SIZE (GET_MODE (x
)) <= UNITS_PER_WORD
1152 && SCALAR_INT_MODE_P (GET_MODE (x
))
1153 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
1154 GET_MODE_BITSIZE (GET_MODE (x
)))
1155 && ! no_new_pseudos
)
1156 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1158 if (WORDS_BIG_ENDIAN
)
1159 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1160 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1162 if (BYTES_BIG_ENDIAN
)
1163 /* Adjust the address so that the address-after-the-data
1165 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1166 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1168 return adjust_address (x
, mode
, offset
);
1170 else if (GET_CODE (x
) == ADDRESSOF
)
1171 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1176 /* Like `gen_lowpart', but refer to the most significant part.
1177 This is used to access the imaginary part of a complex number. */
1180 gen_highpart (enum machine_mode mode
, rtx x
)
1182 unsigned int msize
= GET_MODE_SIZE (mode
);
1185 /* This case loses if X is a subreg. To catch bugs early,
1186 complain if an invalid MODE is used even in other cases. */
1187 if (msize
> UNITS_PER_WORD
1188 && msize
!= (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1191 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1192 subreg_highpart_offset (mode
, GET_MODE (x
)));
1194 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1195 the target if we have a MEM. gen_highpart must return a valid operand,
1196 emitting code if necessary to do so. */
1197 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1198 result
= validize_mem (result
);
1205 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1206 be VOIDmode constant. */
1208 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1210 if (GET_MODE (exp
) != VOIDmode
)
1212 if (GET_MODE (exp
) != innermode
)
1214 return gen_highpart (outermode
, exp
);
1216 return simplify_gen_subreg (outermode
, exp
, innermode
,
1217 subreg_highpart_offset (outermode
, innermode
));
1220 /* Return offset in bytes to get OUTERMODE low part
1221 of the value in mode INNERMODE stored in memory in target format. */
1224 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1226 unsigned int offset
= 0;
1227 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1231 if (WORDS_BIG_ENDIAN
)
1232 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1233 if (BYTES_BIG_ENDIAN
)
1234 offset
+= difference
% UNITS_PER_WORD
;
1240 /* Return offset in bytes to get OUTERMODE high part
1241 of the value in mode INNERMODE stored in memory in target format. */
1243 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1245 unsigned int offset
= 0;
1246 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1248 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1253 if (! WORDS_BIG_ENDIAN
)
1254 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1255 if (! BYTES_BIG_ENDIAN
)
1256 offset
+= difference
% UNITS_PER_WORD
;
1262 /* Return 1 iff X, assumed to be a SUBREG,
1263 refers to the least significant part of its containing reg.
1264 If X is not a SUBREG, always return 1 (it is its own low part!). */
1267 subreg_lowpart_p (rtx x
)
1269 if (GET_CODE (x
) != SUBREG
)
1271 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1274 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1275 == SUBREG_BYTE (x
));
1278 /* Return subword OFFSET of operand OP.
1279 The word number, OFFSET, is interpreted as the word number starting
1280 at the low-order address. OFFSET 0 is the low-order word if not
1281 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1283 If we cannot extract the required word, we return zero. Otherwise,
1284 an rtx corresponding to the requested word will be returned.
1286 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1287 reload has completed, a valid address will always be returned. After
1288 reload, if a valid address cannot be returned, we return zero.
1290 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1291 it is the responsibility of the caller.
1293 MODE is the mode of OP in case it is a CONST_INT.
1295 ??? This is still rather broken for some cases. The problem for the
1296 moment is that all callers of this thing provide no 'goal mode' to
1297 tell us to work with. This exists because all callers were written
1298 in a word based SUBREG world.
1299 Now use of this function can be deprecated by simplify_subreg in most
1304 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1306 if (mode
== VOIDmode
)
1307 mode
= GET_MODE (op
);
1309 if (mode
== VOIDmode
)
1312 /* If OP is narrower than a word, fail. */
1314 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1317 /* If we want a word outside OP, return zero. */
1319 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1322 /* Form a new MEM at the requested address. */
1323 if (GET_CODE (op
) == MEM
)
1325 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1327 if (! validate_address
)
1330 else if (reload_completed
)
1332 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1336 return replace_equiv_address (new, XEXP (new, 0));
1339 /* Rest can be handled by simplify_subreg. */
1340 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1343 /* Similar to `operand_subword', but never return 0. If we can't extract
1344 the required subword, put OP into a register and try again. If that fails,
1345 abort. We always validate the address in this case.
1347 MODE is the mode of OP, in case it is CONST_INT. */
1350 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1352 rtx result
= operand_subword (op
, offset
, 1, mode
);
1357 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1359 /* If this is a register which can not be accessed by words, copy it
1360 to a pseudo register. */
1361 if (GET_CODE (op
) == REG
)
1362 op
= copy_to_reg (op
);
1364 op
= force_reg (mode
, op
);
1367 result
= operand_subword (op
, offset
, 1, mode
);
1374 /* Given a compare instruction, swap the operands.
1375 A test instruction is changed into a compare of 0 against the operand. */
1378 reverse_comparison (rtx insn
)
1380 rtx body
= PATTERN (insn
);
1383 if (GET_CODE (body
) == SET
)
1384 comp
= SET_SRC (body
);
1386 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1388 if (GET_CODE (comp
) == COMPARE
)
1390 rtx op0
= XEXP (comp
, 0);
1391 rtx op1
= XEXP (comp
, 1);
1392 XEXP (comp
, 0) = op1
;
1393 XEXP (comp
, 1) = op0
;
1397 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1398 CONST0_RTX (GET_MODE (comp
)), comp
);
1399 if (GET_CODE (body
) == SET
)
1400 SET_SRC (body
) = new;
1402 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1406 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1407 or (2) a component ref of something variable. Represent the later with
1408 a NULL expression. */
1411 component_ref_for_mem_expr (tree ref
)
1413 tree inner
= TREE_OPERAND (ref
, 0);
1415 if (TREE_CODE (inner
) == COMPONENT_REF
)
1416 inner
= component_ref_for_mem_expr (inner
);
1419 tree placeholder_ptr
= 0;
1421 /* Now remove any conversions: they don't change what the underlying
1422 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1423 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1424 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1425 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1426 || TREE_CODE (inner
) == SAVE_EXPR
1427 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1428 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1429 inner
= find_placeholder (inner
, &placeholder_ptr
);
1431 inner
= TREE_OPERAND (inner
, 0);
1433 if (! DECL_P (inner
))
1437 if (inner
== TREE_OPERAND (ref
, 0))
1440 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1441 TREE_OPERAND (ref
, 1));
1444 /* Given REF, a MEM, and T, either the type of X or the expression
1445 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1446 if we are making a new object of this type. BITPOS is nonzero if
1447 there is an offset outstanding on T that will be applied later. */
1450 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1451 HOST_WIDE_INT bitpos
)
1453 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1454 tree expr
= MEM_EXPR (ref
);
1455 rtx offset
= MEM_OFFSET (ref
);
1456 rtx size
= MEM_SIZE (ref
);
1457 unsigned int align
= MEM_ALIGN (ref
);
1458 HOST_WIDE_INT apply_bitpos
= 0;
1461 /* It can happen that type_for_mode was given a mode for which there
1462 is no language-level type. In which case it returns NULL, which
1467 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1468 if (type
== error_mark_node
)
1471 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1472 wrong answer, as it assumes that DECL_RTL already has the right alias
1473 info. Callers should not set DECL_RTL until after the call to
1474 set_mem_attributes. */
1475 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1478 /* Get the alias set from the expression or type (perhaps using a
1479 front-end routine) and use it. */
1480 alias
= get_alias_set (t
);
1482 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1483 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1484 RTX_UNCHANGING_P (ref
)
1485 |= ((lang_hooks
.honor_readonly
1486 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1487 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1489 /* If we are making an object of this type, or if this is a DECL, we know
1490 that it is a scalar if the type is not an aggregate. */
1491 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1492 MEM_SCALAR_P (ref
) = 1;
1494 /* We can set the alignment from the type if we are making an object,
1495 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1496 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1497 align
= MAX (align
, TYPE_ALIGN (type
));
1499 /* If the size is known, we can set that. */
1500 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1501 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1503 /* If T is not a type, we may be able to deduce some more information about
1507 maybe_set_unchanging (ref
, t
);
1508 if (TREE_THIS_VOLATILE (t
))
1509 MEM_VOLATILE_P (ref
) = 1;
1511 /* Now remove any conversions: they don't change what the underlying
1512 object is. Likewise for SAVE_EXPR. */
1513 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1514 || TREE_CODE (t
) == NON_LVALUE_EXPR
1515 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1516 || TREE_CODE (t
) == SAVE_EXPR
)
1517 t
= TREE_OPERAND (t
, 0);
1519 /* If this expression can't be addressed (e.g., it contains a reference
1520 to a non-addressable field), show we don't change its alias set. */
1521 if (! can_address_p (t
))
1522 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1524 /* If this is a decl, set the attributes of the MEM from it. */
1528 offset
= const0_rtx
;
1529 apply_bitpos
= bitpos
;
1530 size
= (DECL_SIZE_UNIT (t
)
1531 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1532 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1533 align
= DECL_ALIGN (t
);
1536 /* If this is a constant, we know the alignment. */
1537 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1539 align
= TYPE_ALIGN (type
);
1540 #ifdef CONSTANT_ALIGNMENT
1541 align
= CONSTANT_ALIGNMENT (t
, align
);
1545 /* If this is a field reference and not a bit-field, record it. */
1546 /* ??? There is some information that can be gleened from bit-fields,
1547 such as the word offset in the structure that might be modified.
1548 But skip it for now. */
1549 else if (TREE_CODE (t
) == COMPONENT_REF
1550 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1552 expr
= component_ref_for_mem_expr (t
);
1553 offset
= const0_rtx
;
1554 apply_bitpos
= bitpos
;
1555 /* ??? Any reason the field size would be different than
1556 the size we got from the type? */
1559 /* If this is an array reference, look for an outer field reference. */
1560 else if (TREE_CODE (t
) == ARRAY_REF
)
1562 tree off_tree
= size_zero_node
;
1563 /* We can't modify t, because we use it at the end of the
1569 tree index
= TREE_OPERAND (t2
, 1);
1570 tree array
= TREE_OPERAND (t2
, 0);
1571 tree domain
= TYPE_DOMAIN (TREE_TYPE (array
));
1572 tree low_bound
= (domain
? TYPE_MIN_VALUE (domain
) : 0);
1573 tree unit_size
= TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array
)));
1575 /* We assume all arrays have sizes that are a multiple of a byte.
1576 First subtract the lower bound, if any, in the type of the
1577 index, then convert to sizetype and multiply by the size of the
1579 if (low_bound
!= 0 && ! integer_zerop (low_bound
))
1580 index
= fold (build (MINUS_EXPR
, TREE_TYPE (index
),
1583 /* If the index has a self-referential type, pass it to a
1584 WITH_RECORD_EXPR; if the component size is, pass our
1585 component to one. */
1586 if (CONTAINS_PLACEHOLDER_P (index
))
1587 index
= build (WITH_RECORD_EXPR
, TREE_TYPE (index
), index
, t2
);
1588 if (CONTAINS_PLACEHOLDER_P (unit_size
))
1589 unit_size
= build (WITH_RECORD_EXPR
, sizetype
,
1593 = fold (build (PLUS_EXPR
, sizetype
,
1594 fold (build (MULT_EXPR
, sizetype
,
1598 t2
= TREE_OPERAND (t2
, 0);
1600 while (TREE_CODE (t2
) == ARRAY_REF
);
1606 if (host_integerp (off_tree
, 1))
1608 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1609 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1610 align
= DECL_ALIGN (t2
);
1611 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1613 offset
= GEN_INT (ioff
);
1614 apply_bitpos
= bitpos
;
1617 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1619 expr
= component_ref_for_mem_expr (t2
);
1620 if (host_integerp (off_tree
, 1))
1622 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1623 apply_bitpos
= bitpos
;
1625 /* ??? Any reason the field size would be different than
1626 the size we got from the type? */
1628 else if (flag_argument_noalias
> 1
1629 && TREE_CODE (t2
) == INDIRECT_REF
1630 && TREE_CODE (TREE_OPERAND (t2
, 0)) == PARM_DECL
)
1637 /* If this is a Fortran indirect argument reference, record the
1639 else if (flag_argument_noalias
> 1
1640 && TREE_CODE (t
) == INDIRECT_REF
1641 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1648 /* If we modified OFFSET based on T, then subtract the outstanding
1649 bit position offset. Similarly, increase the size of the accessed
1650 object to contain the negative offset. */
1653 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1655 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1658 /* Now set the attributes we computed above. */
1660 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1662 /* If this is already known to be a scalar or aggregate, we are done. */
1663 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1666 /* If it is a reference into an aggregate, this is part of an aggregate.
1667 Otherwise we don't know. */
1668 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1669 || TREE_CODE (t
) == ARRAY_RANGE_REF
1670 || TREE_CODE (t
) == BIT_FIELD_REF
)
1671 MEM_IN_STRUCT_P (ref
) = 1;
1675 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1677 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1680 /* Set the decl for MEM to DECL. */
1683 set_mem_attrs_from_reg (rtx mem
, rtx reg
)
1686 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
1687 GEN_INT (REG_OFFSET (reg
)),
1688 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1691 /* Set the alias set of MEM to SET. */
1694 set_mem_alias_set (rtx mem
, HOST_WIDE_INT set
)
1696 #ifdef ENABLE_CHECKING
1697 /* If the new and old alias sets don't conflict, something is wrong. */
1698 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
1702 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1703 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1707 /* Set the alignment of MEM to ALIGN bits. */
1710 set_mem_align (rtx mem
, unsigned int align
)
1712 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1713 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1717 /* Set the expr for MEM to EXPR. */
1720 set_mem_expr (rtx mem
, tree expr
)
1723 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1724 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1727 /* Set the offset of MEM to OFFSET. */
1730 set_mem_offset (rtx mem
, rtx offset
)
1732 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1733 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1737 /* Set the size of MEM to SIZE. */
1740 set_mem_size (rtx mem
, rtx size
)
1742 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1743 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1747 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1748 and its address changed to ADDR. (VOIDmode means don't change the mode.
1749 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1750 returned memory location is required to be valid. The memory
1751 attributes are not changed. */
1754 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1758 if (GET_CODE (memref
) != MEM
)
1760 if (mode
== VOIDmode
)
1761 mode
= GET_MODE (memref
);
1763 addr
= XEXP (memref
, 0);
1764 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1765 && (!validate
|| memory_address_p (mode
, addr
)))
1770 if (reload_in_progress
|| reload_completed
)
1772 if (! memory_address_p (mode
, addr
))
1776 addr
= memory_address (mode
, addr
);
1779 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1782 new = gen_rtx_MEM (mode
, addr
);
1783 MEM_COPY_ATTRIBUTES (new, memref
);
1787 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1788 way we are changing MEMREF, so we only preserve the alias set. */
1791 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1793 rtx
new = change_address_1 (memref
, mode
, addr
, 1), size
;
1794 enum machine_mode mmode
= GET_MODE (new);
1797 size
= mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
));
1798 align
= mmode
== BLKmode
? BITS_PER_UNIT
: GET_MODE_ALIGNMENT (mmode
);
1800 /* If there are no changes, just return the original memory reference. */
1803 if (MEM_ATTRS (memref
) == 0
1804 || (MEM_EXPR (memref
) == NULL
1805 && MEM_OFFSET (memref
) == NULL
1806 && MEM_SIZE (memref
) == size
1807 && MEM_ALIGN (memref
) == align
))
1810 new = gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1811 MEM_COPY_ATTRIBUTES (new, memref
);
1815 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0, size
, align
, mmode
);
1820 /* Return a memory reference like MEMREF, but with its mode changed
1821 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1822 nonzero, the memory address is forced to be valid.
1823 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1824 and caller is responsible for adjusting MEMREF base register. */
1827 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1828 int validate
, int adjust
)
1830 rtx addr
= XEXP (memref
, 0);
1832 rtx memoffset
= MEM_OFFSET (memref
);
1834 unsigned int memalign
= MEM_ALIGN (memref
);
1836 /* If there are no changes, just return the original memory reference. */
1837 if (mode
== GET_MODE (memref
) && !offset
1838 && (!validate
|| memory_address_p (mode
, addr
)))
1841 /* ??? Prefer to create garbage instead of creating shared rtl.
1842 This may happen even if offset is nonzero -- consider
1843 (plus (plus reg reg) const_int) -- so do this always. */
1844 addr
= copy_rtx (addr
);
1848 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1849 object, we can merge it into the LO_SUM. */
1850 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1852 && (unsigned HOST_WIDE_INT
) offset
1853 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1854 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1855 plus_constant (XEXP (addr
, 1), offset
));
1857 addr
= plus_constant (addr
, offset
);
1860 new = change_address_1 (memref
, mode
, addr
, validate
);
1862 /* Compute the new values of the memory attributes due to this adjustment.
1863 We add the offsets and update the alignment. */
1865 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1867 /* Compute the new alignment by taking the MIN of the alignment and the
1868 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1873 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
1875 /* We can compute the size in a number of ways. */
1876 if (GET_MODE (new) != BLKmode
)
1877 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1878 else if (MEM_SIZE (memref
))
1879 size
= plus_constant (MEM_SIZE (memref
), -offset
);
1881 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
1882 memoffset
, size
, memalign
, GET_MODE (new));
1884 /* At some point, we should validate that this offset is within the object,
1885 if all the appropriate values are known. */
1889 /* Return a memory reference like MEMREF, but with its mode changed
1890 to MODE and its address changed to ADDR, which is assumed to be
1891 MEMREF offseted by OFFSET bytes. If VALIDATE is
1892 nonzero, the memory address is forced to be valid. */
1895 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
1896 HOST_WIDE_INT offset
, int validate
)
1898 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
1899 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
1902 /* Return a memory reference like MEMREF, but whose address is changed by
1903 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1904 known to be in OFFSET (possibly 1). */
1907 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
1909 rtx
new, addr
= XEXP (memref
, 0);
1911 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1913 /* At this point we don't know _why_ the address is invalid. It
1914 could have secondary memory references, multiplies or anything.
1916 However, if we did go and rearrange things, we can wind up not
1917 being able to recognize the magic around pic_offset_table_rtx.
1918 This stuff is fragile, and is yet another example of why it is
1919 bad to expose PIC machinery too early. */
1920 if (! memory_address_p (GET_MODE (memref
), new)
1921 && GET_CODE (addr
) == PLUS
1922 && XEXP (addr
, 0) == pic_offset_table_rtx
)
1924 addr
= force_reg (GET_MODE (addr
), addr
);
1925 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1928 update_temp_slot_address (XEXP (memref
, 0), new);
1929 new = change_address_1 (memref
, VOIDmode
, new, 1);
1931 /* If there are no changes, just return the original memory reference. */
1935 /* Update the alignment to reflect the offset. Reset the offset, which
1938 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
1939 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
1944 /* Return a memory reference like MEMREF, but with its address changed to
1945 ADDR. The caller is asserting that the actual piece of memory pointed
1946 to is the same, just the form of the address is being changed, such as
1947 by putting something into a register. */
1950 replace_equiv_address (rtx memref
, rtx addr
)
1952 /* change_address_1 copies the memory attribute structure without change
1953 and that's exactly what we want here. */
1954 update_temp_slot_address (XEXP (memref
, 0), addr
);
1955 return change_address_1 (memref
, VOIDmode
, addr
, 1);
1958 /* Likewise, but the reference is not required to be valid. */
1961 replace_equiv_address_nv (rtx memref
, rtx addr
)
1963 return change_address_1 (memref
, VOIDmode
, addr
, 0);
1966 /* Return a memory reference like MEMREF, but with its mode widened to
1967 MODE and offset by OFFSET. This would be used by targets that e.g.
1968 cannot issue QImode memory operations and have to use SImode memory
1969 operations plus masking logic. */
1972 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
1974 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
1975 tree expr
= MEM_EXPR (new);
1976 rtx memoffset
= MEM_OFFSET (new);
1977 unsigned int size
= GET_MODE_SIZE (mode
);
1979 /* If there are no changes, just return the original memory reference. */
1983 /* If we don't know what offset we were at within the expression, then
1984 we can't know if we've overstepped the bounds. */
1990 if (TREE_CODE (expr
) == COMPONENT_REF
)
1992 tree field
= TREE_OPERAND (expr
, 1);
1994 if (! DECL_SIZE_UNIT (field
))
2000 /* Is the field at least as large as the access? If so, ok,
2001 otherwise strip back to the containing structure. */
2002 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2003 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2004 && INTVAL (memoffset
) >= 0)
2007 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2013 expr
= TREE_OPERAND (expr
, 0);
2014 memoffset
= (GEN_INT (INTVAL (memoffset
)
2015 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2016 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2019 /* Similarly for the decl. */
2020 else if (DECL_P (expr
)
2021 && DECL_SIZE_UNIT (expr
)
2022 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2023 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2024 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2028 /* The widened memory access overflows the expression, which means
2029 that it could alias another expression. Zap it. */
2036 memoffset
= NULL_RTX
;
2038 /* The widened memory may alias other stuff, so zap the alias set. */
2039 /* ??? Maybe use get_alias_set on any remaining expression. */
2041 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2042 MEM_ALIGN (new), mode
);
2047 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2050 gen_label_rtx (void)
2052 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2053 NULL
, label_num
++, NULL
);
2056 /* For procedure integration. */
2058 /* Install new pointers to the first and last insns in the chain.
2059 Also, set cur_insn_uid to one higher than the last in use.
2060 Used for an inline-procedure after copying the insn chain. */
2063 set_new_first_and_last_insn (rtx first
, rtx last
)
2071 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2072 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2077 /* Set the last label number found in the current function.
2078 This is used when belatedly compiling an inline function. */
2081 set_new_last_label_num (int last
)
2083 base_label_num
= label_num
;
2084 last_label_num
= last
;
2087 /* Restore all variables describing the current status from the structure *P.
2088 This is used after a nested function. */
2091 restore_emit_status (struct function
*p ATTRIBUTE_UNUSED
)
2096 /* Go through all the RTL insn bodies and copy any invalid shared
2097 structure. This routine should only be called once. */
2100 unshare_all_rtl (tree fndecl
, rtx insn
)
2104 /* Make sure that virtual parameters are not shared. */
2105 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2106 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2108 /* Make sure that virtual stack slots are not shared. */
2109 unshare_all_decls (DECL_INITIAL (fndecl
));
2111 /* Unshare just about everything else. */
2112 unshare_all_rtl_in_chain (insn
);
2114 /* Make sure the addresses of stack slots found outside the insn chain
2115 (such as, in DECL_RTL of a variable) are not shared
2116 with the insn chain.
2118 This special care is necessary when the stack slot MEM does not
2119 actually appear in the insn chain. If it does appear, its address
2120 is unshared from all else at that point. */
2121 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2124 /* Go through all the RTL insn bodies and copy any invalid shared
2125 structure, again. This is a fairly expensive thing to do so it
2126 should be done sparingly. */
2129 unshare_all_rtl_again (rtx insn
)
2134 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2137 reset_used_flags (PATTERN (p
));
2138 reset_used_flags (REG_NOTES (p
));
2139 reset_used_flags (LOG_LINKS (p
));
2142 /* Make sure that virtual stack slots are not shared. */
2143 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2145 /* Make sure that virtual parameters are not shared. */
2146 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2147 reset_used_flags (DECL_RTL (decl
));
2149 reset_used_flags (stack_slot_list
);
2151 unshare_all_rtl (cfun
->decl
, insn
);
2154 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2155 Recursively does the same for subexpressions. */
2158 verify_rtx_sharing (rtx orig
, rtx insn
)
2163 const char *format_ptr
;
2168 code
= GET_CODE (x
);
2170 /* These types may be freely shared. */
2186 /* SCRATCH must be shared because they represent distinct values. */
2188 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2193 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2194 a LABEL_REF, it isn't sharable. */
2195 if (GET_CODE (XEXP (x
, 0)) == PLUS
2196 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2197 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2202 /* A MEM is allowed to be shared if its address is constant. */
2203 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2204 || reload_completed
|| reload_in_progress
)
2213 /* This rtx may not be shared. If it has already been seen,
2214 replace it with a copy of itself. */
2216 if (RTX_FLAG (x
, used
))
2218 error ("Invalid rtl sharing found in the insn");
2220 error ("Shared rtx");
2224 RTX_FLAG (x
, used
) = 1;
2226 /* Now scan the subexpressions recursively. */
2228 format_ptr
= GET_RTX_FORMAT (code
);
2230 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2232 switch (*format_ptr
++)
2235 verify_rtx_sharing (XEXP (x
, i
), insn
);
2239 if (XVEC (x
, i
) != NULL
)
2242 int len
= XVECLEN (x
, i
);
2244 for (j
= 0; j
< len
; j
++)
2246 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2247 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2248 && GET_CODE (SET_SRC (XVECEXP (x
, i
, j
))) == ASM_OPERANDS
)
2249 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2251 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2260 /* Go through all the RTL insn bodies and check that there is no unexpected
2261 sharing in between the subexpressions. */
2264 verify_rtl_sharing (void)
2268 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2271 reset_used_flags (PATTERN (p
));
2272 reset_used_flags (REG_NOTES (p
));
2273 reset_used_flags (LOG_LINKS (p
));
2276 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2279 verify_rtx_sharing (PATTERN (p
), p
);
2280 verify_rtx_sharing (REG_NOTES (p
), p
);
2281 verify_rtx_sharing (LOG_LINKS (p
), p
);
2285 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2286 Assumes the mark bits are cleared at entry. */
2289 unshare_all_rtl_in_chain (rtx insn
)
2291 for (; insn
; insn
= NEXT_INSN (insn
))
2294 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2295 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2296 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2300 /* Go through all virtual stack slots of a function and copy any
2301 shared structure. */
2303 unshare_all_decls (tree blk
)
2307 /* Copy shared decls. */
2308 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2309 if (DECL_RTL_SET_P (t
))
2310 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2312 /* Now process sub-blocks. */
2313 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2314 unshare_all_decls (t
);
2317 /* Go through all virtual stack slots of a function and mark them as
2320 reset_used_decls (tree blk
)
2325 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2326 if (DECL_RTL_SET_P (t
))
2327 reset_used_flags (DECL_RTL (t
));
2329 /* Now process sub-blocks. */
2330 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2331 reset_used_decls (t
);
2334 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2335 placed in the result directly, rather than being copied. MAY_SHARE is
2336 either a MEM of an EXPR_LIST of MEMs. */
2339 copy_most_rtx (rtx orig
, rtx may_share
)
2344 const char *format_ptr
;
2346 if (orig
== may_share
2347 || (GET_CODE (may_share
) == EXPR_LIST
2348 && in_expr_list_p (may_share
, orig
)))
2351 code
= GET_CODE (orig
);
2369 copy
= rtx_alloc (code
);
2370 PUT_MODE (copy
, GET_MODE (orig
));
2371 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2372 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2373 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2374 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2375 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2377 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2379 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2381 switch (*format_ptr
++)
2384 XEXP (copy
, i
) = XEXP (orig
, i
);
2385 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2386 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2390 XEXP (copy
, i
) = XEXP (orig
, i
);
2395 XVEC (copy
, i
) = XVEC (orig
, i
);
2396 if (XVEC (orig
, i
) != NULL
)
2398 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2399 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2400 XVECEXP (copy
, i
, j
)
2401 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2406 XWINT (copy
, i
) = XWINT (orig
, i
);
2411 XINT (copy
, i
) = XINT (orig
, i
);
2415 XTREE (copy
, i
) = XTREE (orig
, i
);
2420 XSTR (copy
, i
) = XSTR (orig
, i
);
2424 X0ANY (copy
, i
) = X0ANY (orig
, i
);
2434 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2435 Recursively does the same for subexpressions. Uses
2436 copy_rtx_if_shared_1 to reduce stack space. */
2439 copy_rtx_if_shared (rtx orig
)
2441 copy_rtx_if_shared_1 (&orig
);
2445 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2446 use. Recursively does the same for subexpressions. */
2449 copy_rtx_if_shared_1 (rtx
*orig1
)
2455 const char *format_ptr
;
2459 /* Repeat is used to turn tail-recursion into iteration. */
2466 code
= GET_CODE (x
);
2468 /* These types may be freely shared. */
2483 /* SCRATCH must be shared because they represent distinct values. */
2486 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2491 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2492 a LABEL_REF, it isn't sharable. */
2493 if (GET_CODE (XEXP (x
, 0)) == PLUS
2494 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2495 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2504 /* The chain of insns is not being copied. */
2511 /* This rtx may not be shared. If it has already been seen,
2512 replace it with a copy of itself. */
2514 if (RTX_FLAG (x
, used
))
2518 copy
= rtx_alloc (code
);
2519 memcpy (copy
, x
, RTX_SIZE (code
));
2523 RTX_FLAG (x
, used
) = 1;
2525 /* Now scan the subexpressions recursively.
2526 We can store any replaced subexpressions directly into X
2527 since we know X is not shared! Any vectors in X
2528 must be copied if X was copied. */
2530 format_ptr
= GET_RTX_FORMAT (code
);
2531 length
= GET_RTX_LENGTH (code
);
2534 for (i
= 0; i
< length
; i
++)
2536 switch (*format_ptr
++)
2540 copy_rtx_if_shared_1 (last_ptr
);
2541 last_ptr
= &XEXP (x
, i
);
2545 if (XVEC (x
, i
) != NULL
)
2548 int len
= XVECLEN (x
, i
);
2550 /* Copy the vector iff I copied the rtx and the length
2552 if (copied
&& len
> 0)
2553 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2555 /* Call recursively on all inside the vector. */
2556 for (j
= 0; j
< len
; j
++)
2559 copy_rtx_if_shared_1 (last_ptr
);
2560 last_ptr
= &XVECEXP (x
, i
, j
);
2575 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2576 to look for shared sub-parts. */
2579 reset_used_flags (rtx x
)
2583 const char *format_ptr
;
2586 /* Repeat is used to turn tail-recursion into iteration. */
2591 code
= GET_CODE (x
);
2593 /* These types may be freely shared so we needn't do any resetting
2615 /* The chain of insns is not being copied. */
2622 RTX_FLAG (x
, used
) = 0;
2624 format_ptr
= GET_RTX_FORMAT (code
);
2625 length
= GET_RTX_LENGTH (code
);
2627 for (i
= 0; i
< length
; i
++)
2629 switch (*format_ptr
++)
2637 reset_used_flags (XEXP (x
, i
));
2641 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2642 reset_used_flags (XVECEXP (x
, i
, j
));
2648 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2649 to look for shared sub-parts. */
2652 set_used_flags (rtx x
)
2656 const char *format_ptr
;
2661 code
= GET_CODE (x
);
2663 /* These types may be freely shared so we needn't do any resetting
2685 /* The chain of insns is not being copied. */
2692 RTX_FLAG (x
, used
) = 1;
2694 format_ptr
= GET_RTX_FORMAT (code
);
2695 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2697 switch (*format_ptr
++)
2700 set_used_flags (XEXP (x
, i
));
2704 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2705 set_used_flags (XVECEXP (x
, i
, j
));
2711 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2712 Return X or the rtx for the pseudo reg the value of X was copied into.
2713 OTHER must be valid as a SET_DEST. */
2716 make_safe_from (rtx x
, rtx other
)
2719 switch (GET_CODE (other
))
2722 other
= SUBREG_REG (other
);
2724 case STRICT_LOW_PART
:
2727 other
= XEXP (other
, 0);
2733 if ((GET_CODE (other
) == MEM
2735 && GET_CODE (x
) != REG
2736 && GET_CODE (x
) != SUBREG
)
2737 || (GET_CODE (other
) == REG
2738 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2739 || reg_mentioned_p (other
, x
))))
2741 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2742 emit_move_insn (temp
, x
);
2748 /* Emission of insns (adding them to the doubly-linked list). */
2750 /* Return the first insn of the current sequence or current function. */
2758 /* Specify a new insn as the first in the chain. */
2761 set_first_insn (rtx insn
)
2763 if (PREV_INSN (insn
) != 0)
2768 /* Return the last insn emitted in current sequence or current function. */
2771 get_last_insn (void)
2776 /* Specify a new insn as the last in the chain. */
2779 set_last_insn (rtx insn
)
2781 if (NEXT_INSN (insn
) != 0)
2786 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2789 get_last_insn_anywhere (void)
2791 struct sequence_stack
*stack
;
2794 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2795 if (stack
->last
!= 0)
2800 /* Return the first nonnote insn emitted in current sequence or current
2801 function. This routine looks inside SEQUENCEs. */
2804 get_first_nonnote_insn (void)
2806 rtx insn
= first_insn
;
2810 insn
= next_insn (insn
);
2811 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2818 /* Return the last nonnote insn emitted in current sequence or current
2819 function. This routine looks inside SEQUENCEs. */
2822 get_last_nonnote_insn (void)
2824 rtx insn
= last_insn
;
2828 insn
= previous_insn (insn
);
2829 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2836 /* Return a number larger than any instruction's uid in this function. */
2841 return cur_insn_uid
;
2844 /* Renumber instructions so that no instruction UIDs are wasted. */
2847 renumber_insns (FILE *stream
)
2851 /* If we're not supposed to renumber instructions, don't. */
2852 if (!flag_renumber_insns
)
2855 /* If there aren't that many instructions, then it's not really
2856 worth renumbering them. */
2857 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2862 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2865 fprintf (stream
, "Renumbering insn %d to %d\n",
2866 INSN_UID (insn
), cur_insn_uid
);
2867 INSN_UID (insn
) = cur_insn_uid
++;
2871 /* Return the next insn. If it is a SEQUENCE, return the first insn
2875 next_insn (rtx insn
)
2879 insn
= NEXT_INSN (insn
);
2880 if (insn
&& GET_CODE (insn
) == INSN
2881 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2882 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2888 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2892 previous_insn (rtx insn
)
2896 insn
= PREV_INSN (insn
);
2897 if (insn
&& GET_CODE (insn
) == INSN
2898 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2899 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2905 /* Return the next insn after INSN that is not a NOTE. This routine does not
2906 look inside SEQUENCEs. */
2909 next_nonnote_insn (rtx insn
)
2913 insn
= NEXT_INSN (insn
);
2914 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2921 /* Return the previous insn before INSN that is not a NOTE. This routine does
2922 not look inside SEQUENCEs. */
2925 prev_nonnote_insn (rtx insn
)
2929 insn
= PREV_INSN (insn
);
2930 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2937 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2938 or 0, if there is none. This routine does not look inside
2942 next_real_insn (rtx insn
)
2946 insn
= NEXT_INSN (insn
);
2947 if (insn
== 0 || GET_CODE (insn
) == INSN
2948 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2955 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2956 or 0, if there is none. This routine does not look inside
2960 prev_real_insn (rtx insn
)
2964 insn
= PREV_INSN (insn
);
2965 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2966 || GET_CODE (insn
) == JUMP_INSN
)
2973 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2974 This routine does not look inside SEQUENCEs. */
2977 last_call_insn (void)
2981 for (insn
= get_last_insn ();
2982 insn
&& GET_CODE (insn
) != CALL_INSN
;
2983 insn
= PREV_INSN (insn
))
2989 /* Find the next insn after INSN that really does something. This routine
2990 does not look inside SEQUENCEs. Until reload has completed, this is the
2991 same as next_real_insn. */
2994 active_insn_p (rtx insn
)
2996 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2997 || (GET_CODE (insn
) == INSN
2998 && (! reload_completed
2999 || (GET_CODE (PATTERN (insn
)) != USE
3000 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3004 next_active_insn (rtx insn
)
3008 insn
= NEXT_INSN (insn
);
3009 if (insn
== 0 || active_insn_p (insn
))
3016 /* Find the last insn before INSN that really does something. This routine
3017 does not look inside SEQUENCEs. Until reload has completed, this is the
3018 same as prev_real_insn. */
3021 prev_active_insn (rtx insn
)
3025 insn
= PREV_INSN (insn
);
3026 if (insn
== 0 || active_insn_p (insn
))
3033 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3036 next_label (rtx insn
)
3040 insn
= NEXT_INSN (insn
);
3041 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3048 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3051 prev_label (rtx insn
)
3055 insn
= PREV_INSN (insn
);
3056 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3064 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3065 and REG_CC_USER notes so we can find it. */
3068 link_cc0_insns (rtx insn
)
3070 rtx user
= next_nonnote_insn (insn
);
3072 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3073 user
= XVECEXP (PATTERN (user
), 0, 0);
3075 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3077 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3080 /* Return the next insn that uses CC0 after INSN, which is assumed to
3081 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3082 applied to the result of this function should yield INSN).
3084 Normally, this is simply the next insn. However, if a REG_CC_USER note
3085 is present, it contains the insn that uses CC0.
3087 Return 0 if we can't find the insn. */
3090 next_cc0_user (rtx insn
)
3092 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3095 return XEXP (note
, 0);
3097 insn
= next_nonnote_insn (insn
);
3098 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3099 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3101 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3107 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3108 note, it is the previous insn. */
3111 prev_cc0_setter (rtx insn
)
3113 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3116 return XEXP (note
, 0);
3118 insn
= prev_nonnote_insn (insn
);
3119 if (! sets_cc0_p (PATTERN (insn
)))
3126 /* Increment the label uses for all labels present in rtx. */
3129 mark_label_nuses (rtx x
)
3135 code
= GET_CODE (x
);
3136 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3137 LABEL_NUSES (XEXP (x
, 0))++;
3139 fmt
= GET_RTX_FORMAT (code
);
3140 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3143 mark_label_nuses (XEXP (x
, i
));
3144 else if (fmt
[i
] == 'E')
3145 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3146 mark_label_nuses (XVECEXP (x
, i
, j
));
3151 /* Try splitting insns that can be split for better scheduling.
3152 PAT is the pattern which might split.
3153 TRIAL is the insn providing PAT.
3154 LAST is nonzero if we should return the last insn of the sequence produced.
3156 If this routine succeeds in splitting, it returns the first or last
3157 replacement insn depending on the value of LAST. Otherwise, it
3158 returns TRIAL. If the insn to be returned can be split, it will be. */
3161 try_split (rtx pat
, rtx trial
, int last
)
3163 rtx before
= PREV_INSN (trial
);
3164 rtx after
= NEXT_INSN (trial
);
3165 int has_barrier
= 0;
3169 rtx insn_last
, insn
;
3172 if (any_condjump_p (trial
)
3173 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3174 split_branch_probability
= INTVAL (XEXP (note
, 0));
3175 probability
= split_branch_probability
;
3177 seq
= split_insns (pat
, trial
);
3179 split_branch_probability
= -1;
3181 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3182 We may need to handle this specially. */
3183 if (after
&& GET_CODE (after
) == BARRIER
)
3186 after
= NEXT_INSN (after
);
3192 /* Avoid infinite loop if any insn of the result matches
3193 the original pattern. */
3197 if (INSN_P (insn_last
)
3198 && rtx_equal_p (PATTERN (insn_last
), pat
))
3200 if (!NEXT_INSN (insn_last
))
3202 insn_last
= NEXT_INSN (insn_last
);
3206 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3208 if (GET_CODE (insn
) == JUMP_INSN
)
3210 mark_jump_label (PATTERN (insn
), insn
, 0);
3212 if (probability
!= -1
3213 && any_condjump_p (insn
)
3214 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3216 /* We can preserve the REG_BR_PROB notes only if exactly
3217 one jump is created, otherwise the machine description
3218 is responsible for this step using
3219 split_branch_probability variable. */
3223 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3224 GEN_INT (probability
),
3230 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3231 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3232 if (GET_CODE (trial
) == CALL_INSN
)
3234 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3235 if (GET_CODE (insn
) == CALL_INSN
)
3237 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3240 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3241 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3245 /* Copy notes, particularly those related to the CFG. */
3246 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3248 switch (REG_NOTE_KIND (note
))
3252 while (insn
!= NULL_RTX
)
3254 if (GET_CODE (insn
) == CALL_INSN
3255 || (flag_non_call_exceptions
3256 && may_trap_p (PATTERN (insn
))))
3258 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3261 insn
= PREV_INSN (insn
);
3267 case REG_ALWAYS_RETURN
:
3269 while (insn
!= NULL_RTX
)
3271 if (GET_CODE (insn
) == CALL_INSN
)
3273 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3276 insn
= PREV_INSN (insn
);
3280 case REG_NON_LOCAL_GOTO
:
3282 while (insn
!= NULL_RTX
)
3284 if (GET_CODE (insn
) == JUMP_INSN
)
3286 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3289 insn
= PREV_INSN (insn
);
3298 /* If there are LABELS inside the split insns increment the
3299 usage count so we don't delete the label. */
3300 if (GET_CODE (trial
) == INSN
)
3303 while (insn
!= NULL_RTX
)
3305 if (GET_CODE (insn
) == INSN
)
3306 mark_label_nuses (PATTERN (insn
));
3308 insn
= PREV_INSN (insn
);
3312 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3314 delete_insn (trial
);
3316 emit_barrier_after (tem
);
3318 /* Recursively call try_split for each new insn created; by the
3319 time control returns here that insn will be fully split, so
3320 set LAST and continue from the insn after the one returned.
3321 We can't use next_active_insn here since AFTER may be a note.
3322 Ignore deleted insns, which can be occur if not optimizing. */
3323 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3324 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3325 tem
= try_split (PATTERN (tem
), tem
, 1);
3327 /* Return either the first or the last insn, depending on which was
3330 ? (after
? PREV_INSN (after
) : last_insn
)
3331 : NEXT_INSN (before
);
3334 /* Make and return an INSN rtx, initializing all its slots.
3335 Store PATTERN in the pattern slots. */
3338 make_insn_raw (rtx pattern
)
3342 insn
= rtx_alloc (INSN
);
3344 INSN_UID (insn
) = cur_insn_uid
++;
3345 PATTERN (insn
) = pattern
;
3346 INSN_CODE (insn
) = -1;
3347 LOG_LINKS (insn
) = NULL
;
3348 REG_NOTES (insn
) = NULL
;
3349 INSN_LOCATOR (insn
) = 0;
3350 BLOCK_FOR_INSN (insn
) = NULL
;
3352 #ifdef ENABLE_RTL_CHECKING
3355 && (returnjump_p (insn
)
3356 || (GET_CODE (insn
) == SET
3357 && SET_DEST (insn
) == pc_rtx
)))
3359 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3367 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3370 make_jump_insn_raw (rtx pattern
)
3374 insn
= rtx_alloc (JUMP_INSN
);
3375 INSN_UID (insn
) = cur_insn_uid
++;
3377 PATTERN (insn
) = pattern
;
3378 INSN_CODE (insn
) = -1;
3379 LOG_LINKS (insn
) = NULL
;
3380 REG_NOTES (insn
) = NULL
;
3381 JUMP_LABEL (insn
) = NULL
;
3382 INSN_LOCATOR (insn
) = 0;
3383 BLOCK_FOR_INSN (insn
) = NULL
;
3388 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3391 make_call_insn_raw (rtx pattern
)
3395 insn
= rtx_alloc (CALL_INSN
);
3396 INSN_UID (insn
) = cur_insn_uid
++;
3398 PATTERN (insn
) = pattern
;
3399 INSN_CODE (insn
) = -1;
3400 LOG_LINKS (insn
) = NULL
;
3401 REG_NOTES (insn
) = NULL
;
3402 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3403 INSN_LOCATOR (insn
) = 0;
3404 BLOCK_FOR_INSN (insn
) = NULL
;
3409 /* Add INSN to the end of the doubly-linked list.
3410 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3415 PREV_INSN (insn
) = last_insn
;
3416 NEXT_INSN (insn
) = 0;
3418 if (NULL
!= last_insn
)
3419 NEXT_INSN (last_insn
) = insn
;
3421 if (NULL
== first_insn
)
3427 /* Add INSN into the doubly-linked list after insn AFTER. This and
3428 the next should be the only functions called to insert an insn once
3429 delay slots have been filled since only they know how to update a
3433 add_insn_after (rtx insn
, rtx after
)
3435 rtx next
= NEXT_INSN (after
);
3438 if (optimize
&& INSN_DELETED_P (after
))
3441 NEXT_INSN (insn
) = next
;
3442 PREV_INSN (insn
) = after
;
3446 PREV_INSN (next
) = insn
;
3447 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3448 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3450 else if (last_insn
== after
)
3454 struct sequence_stack
*stack
= seq_stack
;
3455 /* Scan all pending sequences too. */
3456 for (; stack
; stack
= stack
->next
)
3457 if (after
== stack
->last
)
3467 if (GET_CODE (after
) != BARRIER
3468 && GET_CODE (insn
) != BARRIER
3469 && (bb
= BLOCK_FOR_INSN (after
)))
3471 set_block_for_insn (insn
, bb
);
3473 bb
->flags
|= BB_DIRTY
;
3474 /* Should not happen as first in the BB is always
3475 either NOTE or LABEL. */
3476 if (BB_END (bb
) == after
3477 /* Avoid clobbering of structure when creating new BB. */
3478 && GET_CODE (insn
) != BARRIER
3479 && (GET_CODE (insn
) != NOTE
3480 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3484 NEXT_INSN (after
) = insn
;
3485 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3487 rtx sequence
= PATTERN (after
);
3488 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3492 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3493 the previous should be the only functions called to insert an insn once
3494 delay slots have been filled since only they know how to update a
3498 add_insn_before (rtx insn
, rtx before
)
3500 rtx prev
= PREV_INSN (before
);
3503 if (optimize
&& INSN_DELETED_P (before
))
3506 PREV_INSN (insn
) = prev
;
3507 NEXT_INSN (insn
) = before
;
3511 NEXT_INSN (prev
) = insn
;
3512 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3514 rtx sequence
= PATTERN (prev
);
3515 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3518 else if (first_insn
== before
)
3522 struct sequence_stack
*stack
= seq_stack
;
3523 /* Scan all pending sequences too. */
3524 for (; stack
; stack
= stack
->next
)
3525 if (before
== stack
->first
)
3527 stack
->first
= insn
;
3535 if (GET_CODE (before
) != BARRIER
3536 && GET_CODE (insn
) != BARRIER
3537 && (bb
= BLOCK_FOR_INSN (before
)))
3539 set_block_for_insn (insn
, bb
);
3541 bb
->flags
|= BB_DIRTY
;
3542 /* Should not happen as first in the BB is always
3543 either NOTE or LABEl. */
3544 if (BB_HEAD (bb
) == insn
3545 /* Avoid clobbering of structure when creating new BB. */
3546 && GET_CODE (insn
) != BARRIER
3547 && (GET_CODE (insn
) != NOTE
3548 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3552 PREV_INSN (before
) = insn
;
3553 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3554 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3557 /* Remove an insn from its doubly-linked list. This function knows how
3558 to handle sequences. */
3560 remove_insn (rtx insn
)
3562 rtx next
= NEXT_INSN (insn
);
3563 rtx prev
= PREV_INSN (insn
);
3568 NEXT_INSN (prev
) = next
;
3569 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3571 rtx sequence
= PATTERN (prev
);
3572 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3575 else if (first_insn
== insn
)
3579 struct sequence_stack
*stack
= seq_stack
;
3580 /* Scan all pending sequences too. */
3581 for (; stack
; stack
= stack
->next
)
3582 if (insn
== stack
->first
)
3584 stack
->first
= next
;
3594 PREV_INSN (next
) = prev
;
3595 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3596 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3598 else if (last_insn
== insn
)
3602 struct sequence_stack
*stack
= seq_stack
;
3603 /* Scan all pending sequences too. */
3604 for (; stack
; stack
= stack
->next
)
3605 if (insn
== stack
->last
)
3614 if (GET_CODE (insn
) != BARRIER
3615 && (bb
= BLOCK_FOR_INSN (insn
)))
3618 bb
->flags
|= BB_DIRTY
;
3619 if (BB_HEAD (bb
) == insn
)
3621 /* Never ever delete the basic block note without deleting whole
3623 if (GET_CODE (insn
) == NOTE
)
3625 BB_HEAD (bb
) = next
;
3627 if (BB_END (bb
) == insn
)
3632 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3635 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3637 if (! call_insn
|| GET_CODE (call_insn
) != CALL_INSN
)
3640 /* Put the register usage information on the CALL. If there is already
3641 some usage information, put ours at the end. */
3642 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3646 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3647 link
= XEXP (link
, 1))
3650 XEXP (link
, 1) = call_fusage
;
3653 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3656 /* Delete all insns made since FROM.
3657 FROM becomes the new last instruction. */
3660 delete_insns_since (rtx from
)
3665 NEXT_INSN (from
) = 0;
3669 /* This function is deprecated, please use sequences instead.
3671 Move a consecutive bunch of insns to a different place in the chain.
3672 The insns to be moved are those between FROM and TO.
3673 They are moved to a new position after the insn AFTER.
3674 AFTER must not be FROM or TO or any insn in between.
3676 This function does not know about SEQUENCEs and hence should not be
3677 called after delay-slot filling has been done. */
3680 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3682 /* Splice this bunch out of where it is now. */
3683 if (PREV_INSN (from
))
3684 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3686 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3687 if (last_insn
== to
)
3688 last_insn
= PREV_INSN (from
);
3689 if (first_insn
== from
)
3690 first_insn
= NEXT_INSN (to
);
3692 /* Make the new neighbors point to it and it to them. */
3693 if (NEXT_INSN (after
))
3694 PREV_INSN (NEXT_INSN (after
)) = to
;
3696 NEXT_INSN (to
) = NEXT_INSN (after
);
3697 PREV_INSN (from
) = after
;
3698 NEXT_INSN (after
) = from
;
3699 if (after
== last_insn
)
3703 /* Same as function above, but take care to update BB boundaries. */
3705 reorder_insns (rtx from
, rtx to
, rtx after
)
3707 rtx prev
= PREV_INSN (from
);
3708 basic_block bb
, bb2
;
3710 reorder_insns_nobb (from
, to
, after
);
3712 if (GET_CODE (after
) != BARRIER
3713 && (bb
= BLOCK_FOR_INSN (after
)))
3716 bb
->flags
|= BB_DIRTY
;
3718 if (GET_CODE (from
) != BARRIER
3719 && (bb2
= BLOCK_FOR_INSN (from
)))
3721 if (BB_END (bb2
) == to
)
3722 BB_END (bb2
) = prev
;
3723 bb2
->flags
|= BB_DIRTY
;
3726 if (BB_END (bb
) == after
)
3729 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3730 set_block_for_insn (x
, bb
);
3734 /* Return the line note insn preceding INSN. */
3737 find_line_note (rtx insn
)
3739 if (no_line_numbers
)
3742 for (; insn
; insn
= PREV_INSN (insn
))
3743 if (GET_CODE (insn
) == NOTE
3744 && NOTE_LINE_NUMBER (insn
) >= 0)
3750 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3751 of the moved insns when debugging. This may insert a note between AFTER
3752 and FROM, and another one after TO. */
3755 reorder_insns_with_line_notes (rtx from
, rtx to
, rtx after
)
3757 rtx from_line
= find_line_note (from
);
3758 rtx after_line
= find_line_note (after
);
3760 reorder_insns (from
, to
, after
);
3762 if (from_line
== after_line
)
3766 emit_note_copy_after (from_line
, after
);
3768 emit_note_copy_after (after_line
, to
);
3771 /* Remove unnecessary notes from the instruction stream. */
3774 remove_unnecessary_notes (void)
3776 rtx block_stack
= NULL_RTX
;
3777 rtx eh_stack
= NULL_RTX
;
3782 /* We must not remove the first instruction in the function because
3783 the compiler depends on the first instruction being a note. */
3784 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3786 /* Remember what's next. */
3787 next
= NEXT_INSN (insn
);
3789 /* We're only interested in notes. */
3790 if (GET_CODE (insn
) != NOTE
)
3793 switch (NOTE_LINE_NUMBER (insn
))
3795 case NOTE_INSN_DELETED
:
3796 case NOTE_INSN_LOOP_END_TOP_COND
:
3800 case NOTE_INSN_EH_REGION_BEG
:
3801 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3804 case NOTE_INSN_EH_REGION_END
:
3805 /* Too many end notes. */
3806 if (eh_stack
== NULL_RTX
)
3808 /* Mismatched nesting. */
3809 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3812 eh_stack
= XEXP (eh_stack
, 1);
3813 free_INSN_LIST_node (tmp
);
3816 case NOTE_INSN_BLOCK_BEG
:
3817 /* By now, all notes indicating lexical blocks should have
3818 NOTE_BLOCK filled in. */
3819 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3821 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3824 case NOTE_INSN_BLOCK_END
:
3825 /* Too many end notes. */
3826 if (block_stack
== NULL_RTX
)
3828 /* Mismatched nesting. */
3829 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3832 block_stack
= XEXP (block_stack
, 1);
3833 free_INSN_LIST_node (tmp
);
3835 /* Scan back to see if there are any non-note instructions
3836 between INSN and the beginning of this block. If not,
3837 then there is no PC range in the generated code that will
3838 actually be in this block, so there's no point in
3839 remembering the existence of the block. */
3840 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3842 /* This block contains a real instruction. Note that we
3843 don't include labels; if the only thing in the block
3844 is a label, then there are still no PC values that
3845 lie within the block. */
3849 /* We're only interested in NOTEs. */
3850 if (GET_CODE (tmp
) != NOTE
)
3853 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3855 /* We just verified that this BLOCK matches us with
3856 the block_stack check above. Never delete the
3857 BLOCK for the outermost scope of the function; we
3858 can refer to names from that scope even if the
3859 block notes are messed up. */
3860 if (! is_body_block (NOTE_BLOCK (insn
))
3861 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3868 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3869 /* There's a nested block. We need to leave the
3870 current block in place since otherwise the debugger
3871 wouldn't be able to show symbols from our block in
3872 the nested block. */
3878 /* Too many begin notes. */
3879 if (block_stack
|| eh_stack
)
3884 /* Emit insn(s) of given code and pattern
3885 at a specified place within the doubly-linked list.
3887 All of the emit_foo global entry points accept an object
3888 X which is either an insn list or a PATTERN of a single
3891 There are thus a few canonical ways to generate code and
3892 emit it at a specific place in the instruction stream. For
3893 example, consider the instruction named SPOT and the fact that
3894 we would like to emit some instructions before SPOT. We might
3898 ... emit the new instructions ...
3899 insns_head = get_insns ();
3902 emit_insn_before (insns_head, SPOT);
3904 It used to be common to generate SEQUENCE rtl instead, but that
3905 is a relic of the past which no longer occurs. The reason is that
3906 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3907 generated would almost certainly die right after it was created. */
3909 /* Make X be output before the instruction BEFORE. */
3912 emit_insn_before (rtx x
, rtx before
)
3917 #ifdef ENABLE_RTL_CHECKING
3918 if (before
== NULL_RTX
)
3925 switch (GET_CODE (x
))
3936 rtx next
= NEXT_INSN (insn
);
3937 add_insn_before (insn
, before
);
3943 #ifdef ENABLE_RTL_CHECKING
3950 last
= make_insn_raw (x
);
3951 add_insn_before (last
, before
);
3958 /* Make an instruction with body X and code JUMP_INSN
3959 and output it before the instruction BEFORE. */
3962 emit_jump_insn_before (rtx x
, rtx before
)
3964 rtx insn
, last
= NULL_RTX
;
3966 #ifdef ENABLE_RTL_CHECKING
3967 if (before
== NULL_RTX
)
3971 switch (GET_CODE (x
))
3982 rtx next
= NEXT_INSN (insn
);
3983 add_insn_before (insn
, before
);
3989 #ifdef ENABLE_RTL_CHECKING
3996 last
= make_jump_insn_raw (x
);
3997 add_insn_before (last
, before
);
4004 /* Make an instruction with body X and code CALL_INSN
4005 and output it before the instruction BEFORE. */
4008 emit_call_insn_before (rtx x
, rtx before
)
4010 rtx last
= NULL_RTX
, insn
;
4012 #ifdef ENABLE_RTL_CHECKING
4013 if (before
== NULL_RTX
)
4017 switch (GET_CODE (x
))
4028 rtx next
= NEXT_INSN (insn
);
4029 add_insn_before (insn
, before
);
4035 #ifdef ENABLE_RTL_CHECKING
4042 last
= make_call_insn_raw (x
);
4043 add_insn_before (last
, before
);
4050 /* Make an insn of code BARRIER
4051 and output it before the insn BEFORE. */
4054 emit_barrier_before (rtx before
)
4056 rtx insn
= rtx_alloc (BARRIER
);
4058 INSN_UID (insn
) = cur_insn_uid
++;
4060 add_insn_before (insn
, before
);
4064 /* Emit the label LABEL before the insn BEFORE. */
4067 emit_label_before (rtx label
, rtx before
)
4069 /* This can be called twice for the same label as a result of the
4070 confusion that follows a syntax error! So make it harmless. */
4071 if (INSN_UID (label
) == 0)
4073 INSN_UID (label
) = cur_insn_uid
++;
4074 add_insn_before (label
, before
);
4080 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4083 emit_note_before (int subtype
, rtx before
)
4085 rtx note
= rtx_alloc (NOTE
);
4086 INSN_UID (note
) = cur_insn_uid
++;
4087 NOTE_SOURCE_FILE (note
) = 0;
4088 NOTE_LINE_NUMBER (note
) = subtype
;
4089 BLOCK_FOR_INSN (note
) = NULL
;
4091 add_insn_before (note
, before
);
4095 /* Helper for emit_insn_after, handles lists of instructions
4098 static rtx
emit_insn_after_1 (rtx
, rtx
);
4101 emit_insn_after_1 (rtx first
, rtx after
)
4107 if (GET_CODE (after
) != BARRIER
4108 && (bb
= BLOCK_FOR_INSN (after
)))
4110 bb
->flags
|= BB_DIRTY
;
4111 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4112 if (GET_CODE (last
) != BARRIER
)
4113 set_block_for_insn (last
, bb
);
4114 if (GET_CODE (last
) != BARRIER
)
4115 set_block_for_insn (last
, bb
);
4116 if (BB_END (bb
) == after
)
4120 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4123 after_after
= NEXT_INSN (after
);
4125 NEXT_INSN (after
) = first
;
4126 PREV_INSN (first
) = after
;
4127 NEXT_INSN (last
) = after_after
;
4129 PREV_INSN (after_after
) = last
;
4131 if (after
== last_insn
)
4136 /* Make X be output after the insn AFTER. */
4139 emit_insn_after (rtx x
, rtx after
)
4143 #ifdef ENABLE_RTL_CHECKING
4144 if (after
== NULL_RTX
)
4151 switch (GET_CODE (x
))
4159 last
= emit_insn_after_1 (x
, after
);
4162 #ifdef ENABLE_RTL_CHECKING
4169 last
= make_insn_raw (x
);
4170 add_insn_after (last
, after
);
4177 /* Similar to emit_insn_after, except that line notes are to be inserted so
4178 as to act as if this insn were at FROM. */
4181 emit_insn_after_with_line_notes (rtx x
, rtx after
, rtx from
)
4183 rtx from_line
= find_line_note (from
);
4184 rtx after_line
= find_line_note (after
);
4185 rtx insn
= emit_insn_after (x
, after
);
4188 emit_note_copy_after (from_line
, after
);
4191 emit_note_copy_after (after_line
, insn
);
4194 /* Make an insn of code JUMP_INSN with body X
4195 and output it after the insn AFTER. */
4198 emit_jump_insn_after (rtx x
, rtx after
)
4202 #ifdef ENABLE_RTL_CHECKING
4203 if (after
== NULL_RTX
)
4207 switch (GET_CODE (x
))
4215 last
= emit_insn_after_1 (x
, after
);
4218 #ifdef ENABLE_RTL_CHECKING
4225 last
= make_jump_insn_raw (x
);
4226 add_insn_after (last
, after
);
4233 /* Make an instruction with body X and code CALL_INSN
4234 and output it after the instruction AFTER. */
4237 emit_call_insn_after (rtx x
, rtx after
)
4241 #ifdef ENABLE_RTL_CHECKING
4242 if (after
== NULL_RTX
)
4246 switch (GET_CODE (x
))
4254 last
= emit_insn_after_1 (x
, after
);
4257 #ifdef ENABLE_RTL_CHECKING
4264 last
= make_call_insn_raw (x
);
4265 add_insn_after (last
, after
);
4272 /* Make an insn of code BARRIER
4273 and output it after the insn AFTER. */
4276 emit_barrier_after (rtx after
)
4278 rtx insn
= rtx_alloc (BARRIER
);
4280 INSN_UID (insn
) = cur_insn_uid
++;
4282 add_insn_after (insn
, after
);
4286 /* Emit the label LABEL after the insn AFTER. */
4289 emit_label_after (rtx label
, rtx after
)
4291 /* This can be called twice for the same label
4292 as a result of the confusion that follows a syntax error!
4293 So make it harmless. */
4294 if (INSN_UID (label
) == 0)
4296 INSN_UID (label
) = cur_insn_uid
++;
4297 add_insn_after (label
, after
);
4303 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4306 emit_note_after (int subtype
, rtx after
)
4308 rtx note
= rtx_alloc (NOTE
);
4309 INSN_UID (note
) = cur_insn_uid
++;
4310 NOTE_SOURCE_FILE (note
) = 0;
4311 NOTE_LINE_NUMBER (note
) = subtype
;
4312 BLOCK_FOR_INSN (note
) = NULL
;
4313 add_insn_after (note
, after
);
4317 /* Emit a copy of note ORIG after the insn AFTER. */
4320 emit_note_copy_after (rtx orig
, rtx after
)
4324 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4330 note
= rtx_alloc (NOTE
);
4331 INSN_UID (note
) = cur_insn_uid
++;
4332 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4333 NOTE_DATA (note
) = NOTE_DATA (orig
);
4334 BLOCK_FOR_INSN (note
) = NULL
;
4335 add_insn_after (note
, after
);
4339 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4341 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4343 rtx last
= emit_insn_after (pattern
, after
);
4345 if (pattern
== NULL_RTX
)
4348 after
= NEXT_INSN (after
);
4351 if (active_insn_p (after
))
4352 INSN_LOCATOR (after
) = loc
;
4355 after
= NEXT_INSN (after
);
4360 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4362 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4364 rtx last
= emit_jump_insn_after (pattern
, after
);
4366 if (pattern
== NULL_RTX
)
4369 after
= NEXT_INSN (after
);
4372 if (active_insn_p (after
))
4373 INSN_LOCATOR (after
) = loc
;
4376 after
= NEXT_INSN (after
);
4381 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4383 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4385 rtx last
= emit_call_insn_after (pattern
, after
);
4387 if (pattern
== NULL_RTX
)
4390 after
= NEXT_INSN (after
);
4393 if (active_insn_p (after
))
4394 INSN_LOCATOR (after
) = loc
;
4397 after
= NEXT_INSN (after
);
4402 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4404 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4406 rtx first
= PREV_INSN (before
);
4407 rtx last
= emit_insn_before (pattern
, before
);
4409 if (pattern
== NULL_RTX
)
4412 first
= NEXT_INSN (first
);
4415 if (active_insn_p (first
))
4416 INSN_LOCATOR (first
) = loc
;
4419 first
= NEXT_INSN (first
);
4424 /* Take X and emit it at the end of the doubly-linked
4427 Returns the last insn emitted. */
4432 rtx last
= last_insn
;
4438 switch (GET_CODE (x
))
4449 rtx next
= NEXT_INSN (insn
);
4456 #ifdef ENABLE_RTL_CHECKING
4463 last
= make_insn_raw (x
);
4471 /* Make an insn of code JUMP_INSN with pattern X
4472 and add it to the end of the doubly-linked list. */
4475 emit_jump_insn (rtx x
)
4477 rtx last
= NULL_RTX
, insn
;
4479 switch (GET_CODE (x
))
4490 rtx next
= NEXT_INSN (insn
);
4497 #ifdef ENABLE_RTL_CHECKING
4504 last
= make_jump_insn_raw (x
);
4512 /* Make an insn of code CALL_INSN with pattern X
4513 and add it to the end of the doubly-linked list. */
4516 emit_call_insn (rtx x
)
4520 switch (GET_CODE (x
))
4528 insn
= emit_insn (x
);
4531 #ifdef ENABLE_RTL_CHECKING
4538 insn
= make_call_insn_raw (x
);
4546 /* Add the label LABEL to the end of the doubly-linked list. */
4549 emit_label (rtx label
)
4551 /* This can be called twice for the same label
4552 as a result of the confusion that follows a syntax error!
4553 So make it harmless. */
4554 if (INSN_UID (label
) == 0)
4556 INSN_UID (label
) = cur_insn_uid
++;
4562 /* Make an insn of code BARRIER
4563 and add it to the end of the doubly-linked list. */
4568 rtx barrier
= rtx_alloc (BARRIER
);
4569 INSN_UID (barrier
) = cur_insn_uid
++;
4574 /* Make line numbering NOTE insn for LOCATION add it to the end
4575 of the doubly-linked list, but only if line-numbers are desired for
4576 debugging info and it doesn't match the previous one. */
4579 emit_line_note (location_t location
)
4583 set_file_and_line_for_stmt (location
);
4585 if (location
.file
&& last_location
.file
4586 && !strcmp (location
.file
, last_location
.file
)
4587 && location
.line
== last_location
.line
)
4589 last_location
= location
;
4591 if (no_line_numbers
)
4597 note
= emit_note (location
.line
);
4598 NOTE_SOURCE_FILE (note
) = location
.file
;
4603 /* Emit a copy of note ORIG. */
4606 emit_note_copy (rtx orig
)
4610 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4616 note
= rtx_alloc (NOTE
);
4618 INSN_UID (note
) = cur_insn_uid
++;
4619 NOTE_DATA (note
) = NOTE_DATA (orig
);
4620 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4621 BLOCK_FOR_INSN (note
) = NULL
;
4627 /* Make an insn of code NOTE or type NOTE_NO
4628 and add it to the end of the doubly-linked list. */
4631 emit_note (int note_no
)
4635 note
= rtx_alloc (NOTE
);
4636 INSN_UID (note
) = cur_insn_uid
++;
4637 NOTE_LINE_NUMBER (note
) = note_no
;
4638 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4639 BLOCK_FOR_INSN (note
) = NULL
;
4644 /* Cause next statement to emit a line note even if the line number
4648 force_next_line_note (void)
4650 last_location
.line
= -1;
4653 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4654 note of this type already exists, remove it first. */
4657 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4659 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4665 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4666 has multiple sets (some callers assume single_set
4667 means the insn only has one set, when in fact it
4668 means the insn only has one * useful * set). */
4669 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4676 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4677 It serves no useful purpose and breaks eliminate_regs. */
4678 if (GET_CODE (datum
) == ASM_OPERANDS
)
4688 XEXP (note
, 0) = datum
;
4692 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4693 return REG_NOTES (insn
);
4696 /* Return an indication of which type of insn should have X as a body.
4697 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4700 classify_insn (rtx x
)
4702 if (GET_CODE (x
) == CODE_LABEL
)
4704 if (GET_CODE (x
) == CALL
)
4706 if (GET_CODE (x
) == RETURN
)
4708 if (GET_CODE (x
) == SET
)
4710 if (SET_DEST (x
) == pc_rtx
)
4712 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4717 if (GET_CODE (x
) == PARALLEL
)
4720 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4721 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4723 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4724 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4726 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4727 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4733 /* Emit the rtl pattern X as an appropriate kind of insn.
4734 If X is a label, it is simply added into the insn chain. */
4739 enum rtx_code code
= classify_insn (x
);
4741 if (code
== CODE_LABEL
)
4742 return emit_label (x
);
4743 else if (code
== INSN
)
4744 return emit_insn (x
);
4745 else if (code
== JUMP_INSN
)
4747 rtx insn
= emit_jump_insn (x
);
4748 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4749 return emit_barrier ();
4752 else if (code
== CALL_INSN
)
4753 return emit_call_insn (x
);
4758 /* Space for free sequence stack entries. */
4759 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
4761 /* Begin emitting insns to a sequence which can be packaged in an
4762 RTL_EXPR. If this sequence will contain something that might cause
4763 the compiler to pop arguments to function calls (because those
4764 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4765 details), use do_pending_stack_adjust before calling this function.
4766 That will ensure that the deferred pops are not accidentally
4767 emitted in the middle of this sequence. */
4770 start_sequence (void)
4772 struct sequence_stack
*tem
;
4774 if (free_sequence_stack
!= NULL
)
4776 tem
= free_sequence_stack
;
4777 free_sequence_stack
= tem
->next
;
4780 tem
= ggc_alloc (sizeof (struct sequence_stack
));
4782 tem
->next
= seq_stack
;
4783 tem
->first
= first_insn
;
4784 tem
->last
= last_insn
;
4785 tem
->sequence_rtl_expr
= seq_rtl_expr
;
4793 /* Similarly, but indicate that this sequence will be placed in T, an
4794 RTL_EXPR. See the documentation for start_sequence for more
4795 information about how to use this function. */
4798 start_sequence_for_rtl_expr (tree t
)
4805 /* Set up the insn chain starting with FIRST as the current sequence,
4806 saving the previously current one. See the documentation for
4807 start_sequence for more information about how to use this function. */
4810 push_to_sequence (rtx first
)
4816 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4822 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4825 push_to_full_sequence (rtx first
, rtx last
)
4830 /* We really should have the end of the insn chain here. */
4831 if (last
&& NEXT_INSN (last
))
4835 /* Set up the outer-level insn chain
4836 as the current sequence, saving the previously current one. */
4839 push_topmost_sequence (void)
4841 struct sequence_stack
*stack
, *top
= NULL
;
4845 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4848 first_insn
= top
->first
;
4849 last_insn
= top
->last
;
4850 seq_rtl_expr
= top
->sequence_rtl_expr
;
4853 /* After emitting to the outer-level insn chain, update the outer-level
4854 insn chain, and restore the previous saved state. */
4857 pop_topmost_sequence (void)
4859 struct sequence_stack
*stack
, *top
= NULL
;
4861 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4864 top
->first
= first_insn
;
4865 top
->last
= last_insn
;
4866 /* ??? Why don't we save seq_rtl_expr here? */
4871 /* After emitting to a sequence, restore previous saved state.
4873 To get the contents of the sequence just made, you must call
4874 `get_insns' *before* calling here.
4876 If the compiler might have deferred popping arguments while
4877 generating this sequence, and this sequence will not be immediately
4878 inserted into the instruction stream, use do_pending_stack_adjust
4879 before calling get_insns. That will ensure that the deferred
4880 pops are inserted into this sequence, and not into some random
4881 location in the instruction stream. See INHIBIT_DEFER_POP for more
4882 information about deferred popping of arguments. */
4887 struct sequence_stack
*tem
= seq_stack
;
4889 first_insn
= tem
->first
;
4890 last_insn
= tem
->last
;
4891 seq_rtl_expr
= tem
->sequence_rtl_expr
;
4892 seq_stack
= tem
->next
;
4894 memset (tem
, 0, sizeof (*tem
));
4895 tem
->next
= free_sequence_stack
;
4896 free_sequence_stack
= tem
;
4899 /* This works like end_sequence, but records the old sequence in FIRST
4903 end_full_sequence (rtx
*first
, rtx
*last
)
4905 *first
= first_insn
;
4910 /* Return 1 if currently emitting into a sequence. */
4913 in_sequence_p (void)
4915 return seq_stack
!= 0;
4918 /* Put the various virtual registers into REGNO_REG_RTX. */
4921 init_virtual_regs (struct emit_status
*es
)
4923 rtx
*ptr
= es
->x_regno_reg_rtx
;
4924 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4925 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4926 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4927 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4928 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4932 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4933 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4934 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4935 static int copy_insn_n_scratches
;
4937 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4938 copied an ASM_OPERANDS.
4939 In that case, it is the original input-operand vector. */
4940 static rtvec orig_asm_operands_vector
;
4942 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4943 copied an ASM_OPERANDS.
4944 In that case, it is the copied input-operand vector. */
4945 static rtvec copy_asm_operands_vector
;
4947 /* Likewise for the constraints vector. */
4948 static rtvec orig_asm_constraints_vector
;
4949 static rtvec copy_asm_constraints_vector
;
4951 /* Recursively create a new copy of an rtx for copy_insn.
4952 This function differs from copy_rtx in that it handles SCRATCHes and
4953 ASM_OPERANDs properly.
4954 Normally, this function is not used directly; use copy_insn as front end.
4955 However, you could first copy an insn pattern with copy_insn and then use
4956 this function afterwards to properly copy any REG_NOTEs containing
4960 copy_insn_1 (rtx orig
)
4965 const char *format_ptr
;
4967 code
= GET_CODE (orig
);
4983 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
4988 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
4989 if (copy_insn_scratch_in
[i
] == orig
)
4990 return copy_insn_scratch_out
[i
];
4994 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4995 a LABEL_REF, it isn't sharable. */
4996 if (GET_CODE (XEXP (orig
, 0)) == PLUS
4997 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
4998 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
5002 /* A MEM with a constant address is not sharable. The problem is that
5003 the constant address may need to be reloaded. If the mem is shared,
5004 then reloading one copy of this mem will cause all copies to appear
5005 to have been reloaded. */
5011 copy
= rtx_alloc (code
);
5013 /* Copy the various flags, and other information. We assume that
5014 all fields need copying, and then clear the fields that should
5015 not be copied. That is the sensible default behavior, and forces
5016 us to explicitly document why we are *not* copying a flag. */
5017 memcpy (copy
, orig
, RTX_HDR_SIZE
);
5019 /* We do not copy the USED flag, which is used as a mark bit during
5020 walks over the RTL. */
5021 RTX_FLAG (copy
, used
) = 0;
5023 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5024 if (GET_RTX_CLASS (code
) == 'i')
5026 RTX_FLAG (copy
, jump
) = 0;
5027 RTX_FLAG (copy
, call
) = 0;
5028 RTX_FLAG (copy
, frame_related
) = 0;
5031 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5033 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5035 copy
->u
.fld
[i
] = orig
->u
.fld
[i
];
5036 switch (*format_ptr
++)
5039 if (XEXP (orig
, i
) != NULL
)
5040 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5045 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5046 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5047 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5048 XVEC (copy
, i
) = copy_asm_operands_vector
;
5049 else if (XVEC (orig
, i
) != NULL
)
5051 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5052 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5053 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5064 /* These are left unchanged. */
5072 if (code
== SCRATCH
)
5074 i
= copy_insn_n_scratches
++;
5075 if (i
>= MAX_RECOG_OPERANDS
)
5077 copy_insn_scratch_in
[i
] = orig
;
5078 copy_insn_scratch_out
[i
] = copy
;
5080 else if (code
== ASM_OPERANDS
)
5082 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5083 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5084 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5085 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5091 /* Create a new copy of an rtx.
5092 This function differs from copy_rtx in that it handles SCRATCHes and
5093 ASM_OPERANDs properly.
5094 INSN doesn't really have to be a full INSN; it could be just the
5097 copy_insn (rtx insn
)
5099 copy_insn_n_scratches
= 0;
5100 orig_asm_operands_vector
= 0;
5101 orig_asm_constraints_vector
= 0;
5102 copy_asm_operands_vector
= 0;
5103 copy_asm_constraints_vector
= 0;
5104 return copy_insn_1 (insn
);
5107 /* Initialize data structures and variables in this file
5108 before generating rtl for each function. */
5113 struct function
*f
= cfun
;
5115 f
->emit
= ggc_alloc (sizeof (struct emit_status
));
5118 seq_rtl_expr
= NULL
;
5120 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5121 last_location
.line
= 0;
5122 last_location
.file
= 0;
5123 first_label_num
= label_num
;
5127 /* Init the tables that describe all the pseudo regs. */
5129 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5131 f
->emit
->regno_pointer_align
5132 = ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5133 * sizeof (unsigned char));
5136 = ggc_alloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
));
5138 /* Put copies of all the hard registers into regno_reg_rtx. */
5139 memcpy (regno_reg_rtx
,
5140 static_regno_reg_rtx
,
5141 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5143 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5144 init_virtual_regs (f
->emit
);
5146 /* Indicate that the virtual registers and stack locations are
5148 REG_POINTER (stack_pointer_rtx
) = 1;
5149 REG_POINTER (frame_pointer_rtx
) = 1;
5150 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5151 REG_POINTER (arg_pointer_rtx
) = 1;
5153 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5154 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5155 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5156 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5157 REG_POINTER (virtual_cfa_rtx
) = 1;
5159 #ifdef STACK_BOUNDARY
5160 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5161 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5162 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5163 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5165 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5166 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5167 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5168 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5169 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5172 #ifdef INIT_EXPANDERS
5177 /* Generate the constant 0. */
5180 gen_const_vector_0 (enum machine_mode mode
)
5185 enum machine_mode inner
;
5187 units
= GET_MODE_NUNITS (mode
);
5188 inner
= GET_MODE_INNER (mode
);
5190 v
= rtvec_alloc (units
);
5192 /* We need to call this function after we to set CONST0_RTX first. */
5193 if (!CONST0_RTX (inner
))
5196 for (i
= 0; i
< units
; ++i
)
5197 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5199 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5203 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5204 all elements are zero. */
5206 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5208 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5211 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5212 if (RTVEC_ELT (v
, i
) != inner_zero
)
5213 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5214 return CONST0_RTX (mode
);
5217 /* Create some permanent unique rtl objects shared between all functions.
5218 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5221 init_emit_once (int line_numbers
)
5224 enum machine_mode mode
;
5225 enum machine_mode double_mode
;
5227 /* We need reg_raw_mode, so initialize the modes now. */
5228 init_reg_modes_once ();
5230 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5232 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5233 const_int_htab_eq
, NULL
);
5235 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5236 const_double_htab_eq
, NULL
);
5238 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5239 mem_attrs_htab_eq
, NULL
);
5240 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5241 reg_attrs_htab_eq
, NULL
);
5243 no_line_numbers
= ! line_numbers
;
5245 /* Compute the word and byte modes. */
5247 byte_mode
= VOIDmode
;
5248 word_mode
= VOIDmode
;
5249 double_mode
= VOIDmode
;
5251 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5252 mode
= GET_MODE_WIDER_MODE (mode
))
5254 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5255 && byte_mode
== VOIDmode
)
5258 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5259 && word_mode
== VOIDmode
)
5263 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5264 mode
= GET_MODE_WIDER_MODE (mode
))
5266 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5267 && double_mode
== VOIDmode
)
5271 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5273 /* Assign register numbers to the globally defined register rtx.
5274 This must be done at runtime because the register number field
5275 is in a union and some compilers can't initialize unions. */
5277 pc_rtx
= gen_rtx_PC (VOIDmode
);
5278 cc0_rtx
= gen_rtx_CC0 (VOIDmode
);
5279 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5280 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5281 if (hard_frame_pointer_rtx
== 0)
5282 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5283 HARD_FRAME_POINTER_REGNUM
);
5284 if (arg_pointer_rtx
== 0)
5285 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5286 virtual_incoming_args_rtx
=
5287 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5288 virtual_stack_vars_rtx
=
5289 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5290 virtual_stack_dynamic_rtx
=
5291 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5292 virtual_outgoing_args_rtx
=
5293 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5294 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5296 /* Initialize RTL for commonly used hard registers. These are
5297 copied into regno_reg_rtx as we begin to compile each function. */
5298 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5299 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5301 #ifdef INIT_EXPANDERS
5302 /* This is to initialize {init|mark|free}_machine_status before the first
5303 call to push_function_context_to. This is needed by the Chill front
5304 end which calls push_function_context_to before the first call to
5305 init_function_start. */
5309 /* Create the unique rtx's for certain rtx codes and operand values. */
5311 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5312 tries to use these variables. */
5313 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5314 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5315 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5317 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5318 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5319 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5321 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5323 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5324 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5325 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5326 REAL_VALUE_FROM_INT (dconst3
, 3, 0, double_mode
);
5327 REAL_VALUE_FROM_INT (dconst10
, 10, 0, double_mode
);
5328 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5329 REAL_VALUE_FROM_INT (dconstm2
, -2, -1, double_mode
);
5331 dconsthalf
= dconst1
;
5334 real_arithmetic (&dconstthird
, RDIV_EXPR
, &dconst1
, &dconst3
);
5336 /* Initialize mathematical constants for constant folding builtins.
5337 These constants need to be given to at least 160 bits precision. */
5338 real_from_string (&dconstpi
,
5339 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5340 real_from_string (&dconste
,
5341 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5343 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5345 REAL_VALUE_TYPE
*r
=
5346 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5348 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5349 mode
= GET_MODE_WIDER_MODE (mode
))
5350 const_tiny_rtx
[i
][(int) mode
] =
5351 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5353 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5355 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5356 mode
= GET_MODE_WIDER_MODE (mode
))
5357 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5359 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5361 mode
= GET_MODE_WIDER_MODE (mode
))
5362 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5365 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5367 mode
= GET_MODE_WIDER_MODE (mode
))
5368 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5370 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5372 mode
= GET_MODE_WIDER_MODE (mode
))
5373 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5375 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5376 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5377 const_tiny_rtx
[0][i
] = const0_rtx
;
5379 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5380 if (STORE_FLAG_VALUE
== 1)
5381 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5383 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5384 return_address_pointer_rtx
5385 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5388 #ifdef STATIC_CHAIN_REGNUM
5389 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5391 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5392 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5393 static_chain_incoming_rtx
5394 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5397 static_chain_incoming_rtx
= static_chain_rtx
;
5401 static_chain_rtx
= STATIC_CHAIN
;
5403 #ifdef STATIC_CHAIN_INCOMING
5404 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5406 static_chain_incoming_rtx
= static_chain_rtx
;
5410 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5411 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5414 /* Query and clear/ restore no_line_numbers. This is used by the
5415 switch / case handling in stmt.c to give proper line numbers in
5416 warnings about unreachable code. */
5419 force_line_numbers (void)
5421 int old
= no_line_numbers
;
5423 no_line_numbers
= 0;
5425 force_next_line_note ();
5430 restore_line_number_status (int old_value
)
5432 no_line_numbers
= old_value
;
5435 /* Produce exact duplicate of insn INSN after AFTER.
5436 Care updating of libcall regions if present. */
5439 emit_copy_of_insn_after (rtx insn
, rtx after
)
5442 rtx note1
, note2
, link
;
5444 switch (GET_CODE (insn
))
5447 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5451 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5455 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5456 if (CALL_INSN_FUNCTION_USAGE (insn
))
5457 CALL_INSN_FUNCTION_USAGE (new)
5458 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5459 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5460 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5467 /* Update LABEL_NUSES. */
5468 mark_jump_label (PATTERN (new), new, 0);
5470 INSN_LOCATOR (new) = INSN_LOCATOR (insn
);
5472 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5474 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5475 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5477 if (GET_CODE (link
) == EXPR_LIST
)
5479 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5484 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5489 /* Fix the libcall sequences. */
5490 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5493 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5495 XEXP (note1
, 0) = p
;
5496 XEXP (note2
, 0) = new;
5498 INSN_CODE (new) = INSN_CODE (insn
);
5502 static GTY((deletable(""))) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5504 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5506 if (hard_reg_clobbers
[mode
][regno
])
5507 return hard_reg_clobbers
[mode
][regno
];
5509 return (hard_reg_clobbers
[mode
][regno
] =
5510 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5513 #include "gt-emit-rtl.h"