1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num
= 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num
;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num
;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers
;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl
[GR_MAX
];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
110 REAL_VALUE_TYPE dconst0
;
111 REAL_VALUE_TYPE dconst1
;
112 REAL_VALUE_TYPE dconst2
;
113 REAL_VALUE_TYPE dconstm1
;
114 REAL_VALUE_TYPE dconstm2
;
115 REAL_VALUE_TYPE dconsthalf
;
117 /* All references to the following fixed hard registers go through
118 these unique rtl objects. On machines where the frame-pointer and
119 arg-pointer are the same register, they use the same unique object.
121 After register allocation, other rtl objects which used to be pseudo-regs
122 may be clobbered to refer to the frame-pointer register.
123 But references that were originally to the frame-pointer can be
124 distinguished from the others because they contain frame_pointer_rtx.
126 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
127 tricky: until register elimination has taken place hard_frame_pointer_rtx
128 should be used if it is being set, and frame_pointer_rtx otherwise. After
129 register elimination hard_frame_pointer_rtx should always be used.
130 On machines where the two registers are same (most) then these are the
133 In an inline procedure, the stack and frame pointer rtxs may not be
134 used for anything else. */
135 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
136 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
137 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
138 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
139 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
141 /* This is used to implement __builtin_return_address for some machines.
142 See for instance the MIPS port. */
143 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
145 /* We make one copy of (const_int C) where C is in
146 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
147 to save space during the compilation and simplify comparisons of
150 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
152 /* A hash table storing CONST_INTs whose absolute value is greater
153 than MAX_SAVED_CONST_INT. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
156 htab_t const_int_htab
;
158 /* A hash table storing memory attribute structures. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
160 htab_t mem_attrs_htab
;
162 /* A hash table storing register attribute structures. */
163 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
164 htab_t reg_attrs_htab
;
166 /* A hash table storing all CONST_DOUBLEs. */
167 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
168 htab_t const_double_htab
;
170 #define first_insn (cfun->emit->x_first_insn)
171 #define last_insn (cfun->emit->x_last_insn)
172 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
173 #define last_linenum (cfun->emit->x_last_linenum)
174 #define last_filename (cfun->emit->x_last_filename)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx make_jump_insn_raw
PARAMS ((rtx
));
178 static rtx make_call_insn_raw
PARAMS ((rtx
));
179 static rtx find_line_note
PARAMS ((rtx
));
180 static rtx change_address_1
PARAMS ((rtx
, enum machine_mode
, rtx
,
182 static void unshare_all_rtl_1
PARAMS ((rtx
));
183 static void unshare_all_decls
PARAMS ((tree
));
184 static void reset_used_decls
PARAMS ((tree
));
185 static void mark_label_nuses
PARAMS ((rtx
));
186 static hashval_t const_int_htab_hash
PARAMS ((const void *));
187 static int const_int_htab_eq
PARAMS ((const void *,
189 static hashval_t const_double_htab_hash
PARAMS ((const void *));
190 static int const_double_htab_eq
PARAMS ((const void *,
192 static rtx lookup_const_double
PARAMS ((rtx
));
193 static hashval_t mem_attrs_htab_hash
PARAMS ((const void *));
194 static int mem_attrs_htab_eq
PARAMS ((const void *,
196 static mem_attrs
*get_mem_attrs
PARAMS ((HOST_WIDE_INT
, tree
, rtx
,
199 static hashval_t reg_attrs_htab_hash
PARAMS ((const void *));
200 static int reg_attrs_htab_eq
PARAMS ((const void *,
202 static reg_attrs
*get_reg_attrs
PARAMS ((tree
, int));
203 static tree component_ref_for_mem_expr
PARAMS ((tree
));
204 static rtx gen_const_vector_0
PARAMS ((enum machine_mode
));
206 /* Probability of the conditional branch currently proceeded by try_split.
207 Set to -1 otherwise. */
208 int split_branch_probability
= -1;
210 /* Returns a hash code for X (which is a really a CONST_INT). */
213 const_int_htab_hash (x
)
216 return (hashval_t
) INTVAL ((struct rtx_def
*) x
);
219 /* Returns nonzero if the value represented by X (which is really a
220 CONST_INT) is the same as that given by Y (which is really a
224 const_int_htab_eq (x
, y
)
228 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
231 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
233 const_double_htab_hash (x
)
239 if (GET_MODE (value
) == VOIDmode
)
240 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
243 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
244 /* MODE is used in the comparison, so it should be in the hash. */
245 h
^= GET_MODE (value
);
250 /* Returns nonzero if the value represented by X (really a ...)
251 is the same as that represented by Y (really a ...) */
253 const_double_htab_eq (x
, y
)
257 rtx a
= (rtx
)x
, b
= (rtx
)y
;
259 if (GET_MODE (a
) != GET_MODE (b
))
261 if (GET_MODE (a
) == VOIDmode
)
262 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
263 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
265 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
266 CONST_DOUBLE_REAL_VALUE (b
));
269 /* Returns a hash code for X (which is a really a mem_attrs *). */
272 mem_attrs_htab_hash (x
)
275 mem_attrs
*p
= (mem_attrs
*) x
;
277 return (p
->alias
^ (p
->align
* 1000)
278 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
279 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
283 /* Returns nonzero if the value represented by X (which is really a
284 mem_attrs *) is the same as that given by Y (which is also really a
288 mem_attrs_htab_eq (x
, y
)
292 mem_attrs
*p
= (mem_attrs
*) x
;
293 mem_attrs
*q
= (mem_attrs
*) y
;
295 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
296 && p
->size
== q
->size
&& p
->align
== q
->align
);
299 /* Allocate a new mem_attrs structure and insert it into the hash table if
300 one identical to it is not already in the table. We are doing this for
304 get_mem_attrs (alias
, expr
, offset
, size
, align
, mode
)
310 enum machine_mode mode
;
315 /* If everything is the default, we can just return zero.
316 This must match what the corresponding MEM_* macros return when the
317 field is not present. */
318 if (alias
== 0 && expr
== 0 && offset
== 0
320 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
321 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
322 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
327 attrs
.offset
= offset
;
331 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
334 *slot
= ggc_alloc (sizeof (mem_attrs
));
335 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
341 /* Returns a hash code for X (which is a really a reg_attrs *). */
344 reg_attrs_htab_hash (x
)
347 reg_attrs
*p
= (reg_attrs
*) x
;
349 return ((p
->offset
* 1000) ^ (long) p
->decl
);
352 /* Returns non-zero if the value represented by X (which is really a
353 reg_attrs *) is the same as that given by Y (which is also really a
357 reg_attrs_htab_eq (x
, y
)
361 reg_attrs
*p
= (reg_attrs
*) x
;
362 reg_attrs
*q
= (reg_attrs
*) y
;
364 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
366 /* Allocate a new reg_attrs structure and insert it into the hash table if
367 one identical to it is not already in the table. We are doing this for
371 get_reg_attrs (decl
, offset
)
378 /* If everything is the default, we can just return zero. */
379 if (decl
== 0 && offset
== 0)
383 attrs
.offset
= offset
;
385 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
388 *slot
= ggc_alloc (sizeof (reg_attrs
));
389 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
395 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
396 don't attempt to share with the various global pieces of rtl (such as
397 frame_pointer_rtx). */
400 gen_raw_REG (mode
, regno
)
401 enum machine_mode mode
;
404 rtx x
= gen_rtx_raw_REG (mode
, regno
);
405 ORIGINAL_REGNO (x
) = regno
;
409 /* There are some RTL codes that require special attention; the generation
410 functions do the raw handling. If you add to this list, modify
411 special_rtx in gengenrtl.c as well. */
414 gen_rtx_CONST_INT (mode
, arg
)
415 enum machine_mode mode ATTRIBUTE_UNUSED
;
420 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
421 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
423 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
424 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
425 return const_true_rtx
;
428 /* Look up the CONST_INT in the hash table. */
429 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
430 (hashval_t
) arg
, INSERT
);
432 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
438 gen_int_mode (c
, mode
)
440 enum machine_mode mode
;
442 return GEN_INT (trunc_int_for_mode (c
, mode
));
445 /* CONST_DOUBLEs might be created from pairs of integers, or from
446 REAL_VALUE_TYPEs. Also, their length is known only at run time,
447 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
449 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
450 hash table. If so, return its counterpart; otherwise add it
451 to the hash table and return it. */
453 lookup_const_double (real
)
456 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
463 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
464 VALUE in mode MODE. */
466 const_double_from_real_value (value
, mode
)
467 REAL_VALUE_TYPE value
;
468 enum machine_mode mode
;
470 rtx real
= rtx_alloc (CONST_DOUBLE
);
471 PUT_MODE (real
, mode
);
473 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
475 return lookup_const_double (real
);
478 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
479 of ints: I0 is the low-order word and I1 is the high-order word.
480 Do not use this routine for non-integer modes; convert to
481 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
484 immed_double_const (i0
, i1
, mode
)
485 HOST_WIDE_INT i0
, i1
;
486 enum machine_mode mode
;
491 if (mode
!= VOIDmode
)
494 if (GET_MODE_CLASS (mode
) != MODE_INT
495 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
496 /* We can get a 0 for an error mark. */
497 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
498 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
501 /* We clear out all bits that don't belong in MODE, unless they and
502 our sign bit are all one. So we get either a reasonable negative
503 value or a reasonable unsigned value for this mode. */
504 width
= GET_MODE_BITSIZE (mode
);
505 if (width
< HOST_BITS_PER_WIDE_INT
506 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
507 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
508 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
509 else if (width
== HOST_BITS_PER_WIDE_INT
510 && ! (i1
== ~0 && i0
< 0))
512 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
513 /* We cannot represent this value as a constant. */
516 /* If this would be an entire word for the target, but is not for
517 the host, then sign-extend on the host so that the number will
518 look the same way on the host that it would on the target.
520 For example, when building a 64 bit alpha hosted 32 bit sparc
521 targeted compiler, then we want the 32 bit unsigned value -1 to be
522 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
523 The latter confuses the sparc backend. */
525 if (width
< HOST_BITS_PER_WIDE_INT
526 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
527 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
529 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
532 ??? Strictly speaking, this is wrong if we create a CONST_INT for
533 a large unsigned constant with the size of MODE being
534 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
535 in a wider mode. In that case we will mis-interpret it as a
538 Unfortunately, the only alternative is to make a CONST_DOUBLE for
539 any constant in any mode if it is an unsigned constant larger
540 than the maximum signed integer in an int on the host. However,
541 doing this will break everyone that always expects to see a
542 CONST_INT for SImode and smaller.
544 We have always been making CONST_INTs in this case, so nothing
545 new is being broken. */
547 if (width
<= HOST_BITS_PER_WIDE_INT
)
548 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
551 /* If this integer fits in one word, return a CONST_INT. */
552 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
555 /* We use VOIDmode for integers. */
556 value
= rtx_alloc (CONST_DOUBLE
);
557 PUT_MODE (value
, VOIDmode
);
559 CONST_DOUBLE_LOW (value
) = i0
;
560 CONST_DOUBLE_HIGH (value
) = i1
;
562 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
563 XWINT (value
, i
) = 0;
565 return lookup_const_double (value
);
569 gen_rtx_REG (mode
, regno
)
570 enum machine_mode mode
;
573 /* In case the MD file explicitly references the frame pointer, have
574 all such references point to the same frame pointer. This is
575 used during frame pointer elimination to distinguish the explicit
576 references to these registers from pseudos that happened to be
579 If we have eliminated the frame pointer or arg pointer, we will
580 be using it as a normal register, for example as a spill
581 register. In such cases, we might be accessing it in a mode that
582 is not Pmode and therefore cannot use the pre-allocated rtx.
584 Also don't do this when we are making new REGs in reload, since
585 we don't want to get confused with the real pointers. */
587 if (mode
== Pmode
&& !reload_in_progress
)
589 if (regno
== FRAME_POINTER_REGNUM
590 && (!reload_completed
|| frame_pointer_needed
))
591 return frame_pointer_rtx
;
592 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
593 if (regno
== HARD_FRAME_POINTER_REGNUM
594 && (!reload_completed
|| frame_pointer_needed
))
595 return hard_frame_pointer_rtx
;
597 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
598 if (regno
== ARG_POINTER_REGNUM
)
599 return arg_pointer_rtx
;
601 #ifdef RETURN_ADDRESS_POINTER_REGNUM
602 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
603 return return_address_pointer_rtx
;
605 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
606 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
607 return pic_offset_table_rtx
;
608 if (regno
== STACK_POINTER_REGNUM
)
609 return stack_pointer_rtx
;
613 /* If the per-function register table has been set up, try to re-use
614 an existing entry in that table to avoid useless generation of RTL.
616 This code is disabled for now until we can fix the various backends
617 which depend on having non-shared hard registers in some cases. Long
618 term we want to re-enable this code as it can significantly cut down
619 on the amount of useless RTL that gets generated.
621 We'll also need to fix some code that runs after reload that wants to
622 set ORIGINAL_REGNO. */
627 && regno
< FIRST_PSEUDO_REGISTER
628 && reg_raw_mode
[regno
] == mode
)
629 return regno_reg_rtx
[regno
];
632 return gen_raw_REG (mode
, regno
);
636 gen_rtx_MEM (mode
, addr
)
637 enum machine_mode mode
;
640 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
642 /* This field is not cleared by the mere allocation of the rtx, so
650 gen_rtx_SUBREG (mode
, reg
, offset
)
651 enum machine_mode mode
;
655 /* This is the most common failure type.
656 Catch it early so we can see who does it. */
657 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
660 /* This check isn't usable right now because combine will
661 throw arbitrary crap like a CALL into a SUBREG in
662 gen_lowpart_for_combine so we must just eat it. */
664 /* Check for this too. */
665 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
668 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
671 /* Generate a SUBREG representing the least-significant part of REG if MODE
672 is smaller than mode of REG, otherwise paradoxical SUBREG. */
675 gen_lowpart_SUBREG (mode
, reg
)
676 enum machine_mode mode
;
679 enum machine_mode inmode
;
681 inmode
= GET_MODE (reg
);
682 if (inmode
== VOIDmode
)
684 return gen_rtx_SUBREG (mode
, reg
,
685 subreg_lowpart_offset (mode
, inmode
));
688 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
690 ** This routine generates an RTX of the size specified by
691 ** <code>, which is an RTX code. The RTX structure is initialized
692 ** from the arguments <element1> through <elementn>, which are
693 ** interpreted according to the specific RTX type's format. The
694 ** special machine mode associated with the rtx (if any) is specified
697 ** gen_rtx can be invoked in a way which resembles the lisp-like
698 ** rtx it will generate. For example, the following rtx structure:
700 ** (plus:QI (mem:QI (reg:SI 1))
701 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
703 ** ...would be generated by the following C code:
705 ** gen_rtx (PLUS, QImode,
706 ** gen_rtx (MEM, QImode,
707 ** gen_rtx (REG, SImode, 1)),
708 ** gen_rtx (MEM, QImode,
709 ** gen_rtx (PLUS, SImode,
710 ** gen_rtx (REG, SImode, 2),
711 ** gen_rtx (REG, SImode, 3)))),
716 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
718 int i
; /* Array indices... */
719 const char *fmt
; /* Current rtx's format... */
720 rtx rt_val
; /* RTX to return to caller... */
723 VA_FIXEDARG (p
, enum rtx_code
, code
);
724 VA_FIXEDARG (p
, enum machine_mode
, mode
);
729 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
734 HOST_WIDE_INT arg0
= va_arg (p
, HOST_WIDE_INT
);
735 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
737 rt_val
= immed_double_const (arg0
, arg1
, mode
);
742 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
746 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
750 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
751 rt_val
->mode
= mode
; /* Store the machine mode... */
753 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
754 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
758 case '0': /* Field with unknown use. Zero it. */
759 X0EXP (rt
, 1) = NULL_RTX
;
762 case 'i': /* An integer? */
763 XINT (rt_val
, i
) = va_arg (p
, int);
766 case 'w': /* A wide integer? */
767 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
770 case 's': /* A string? */
771 XSTR (rt_val
, i
) = va_arg (p
, char *);
774 case 'e': /* An expression? */
775 case 'u': /* An insn? Same except when printing. */
776 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
779 case 'E': /* An RTX vector? */
780 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
783 case 'b': /* A bitmap? */
784 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
787 case 't': /* A tree? */
788 XTREE (rt_val
, i
) = va_arg (p
, tree
);
802 /* gen_rtvec (n, [rt1, ..., rtn])
804 ** This routine creates an rtvec and stores within it the
805 ** pointers to rtx's which are its arguments.
810 gen_rtvec
VPARAMS ((int n
, ...))
816 VA_FIXEDARG (p
, int, n
);
819 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
821 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
823 for (i
= 0; i
< n
; i
++)
824 vector
[i
] = va_arg (p
, rtx
);
826 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
830 return gen_rtvec_v (save_n
, vector
);
834 gen_rtvec_v (n
, argp
)
842 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
844 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
846 for (i
= 0; i
< n
; i
++)
847 rt_val
->elem
[i
] = *argp
++;
852 /* Generate a REG rtx for a new pseudo register of mode MODE.
853 This pseudo is assigned the next sequential register number. */
857 enum machine_mode mode
;
859 struct function
*f
= cfun
;
862 /* Don't let anything called after initial flow analysis create new
867 if (generating_concat_p
868 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
869 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
871 /* For complex modes, don't make a single pseudo.
872 Instead, make a CONCAT of two pseudos.
873 This allows noncontiguous allocation of the real and imaginary parts,
874 which makes much better code. Besides, allocating DCmode
875 pseudos overstrains reload on some machines like the 386. */
876 rtx realpart
, imagpart
;
877 enum machine_mode partmode
= GET_MODE_INNER (mode
);
879 realpart
= gen_reg_rtx (partmode
);
880 imagpart
= gen_reg_rtx (partmode
);
881 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
884 /* Make sure regno_pointer_align, and regno_reg_rtx are large
885 enough to have an element for this pseudo reg number. */
887 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
889 int old_size
= f
->emit
->regno_pointer_align_length
;
893 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
894 memset (new + old_size
, 0, old_size
);
895 f
->emit
->regno_pointer_align
= (unsigned char *) new;
897 new1
= (rtx
*) ggc_realloc (f
->emit
->x_regno_reg_rtx
,
898 old_size
* 2 * sizeof (rtx
));
899 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
900 regno_reg_rtx
= new1
;
902 f
->emit
->regno_pointer_align_length
= old_size
* 2;
905 val
= gen_raw_REG (mode
, reg_rtx_no
);
906 regno_reg_rtx
[reg_rtx_no
++] = val
;
910 /* Generate an register with same attributes as REG,
911 but offsetted by OFFSET. */
914 gen_rtx_REG_offset (reg
, mode
, regno
, offset
)
915 enum machine_mode mode
;
920 rtx
new = gen_rtx_REG (mode
, regno
);
921 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
922 REG_OFFSET (reg
) + offset
);
926 /* Set the decl for MEM to DECL. */
929 set_reg_attrs_from_mem (reg
, mem
)
933 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
935 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
938 /* Set the register attributes for registers contained in PARM_RTX.
939 Use needed values from memory attributes of MEM. */
942 set_reg_attrs_for_parm (parm_rtx
, mem
)
946 if (GET_CODE (parm_rtx
) == REG
)
947 set_reg_attrs_from_mem (parm_rtx
, mem
);
948 else if (GET_CODE (parm_rtx
) == PARALLEL
)
950 /* Check for a NULL entry in the first slot, used to indicate that the
951 parameter goes both on the stack and in registers. */
952 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
953 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
955 rtx x
= XVECEXP (parm_rtx
, 0, i
);
956 if (GET_CODE (XEXP (x
, 0)) == REG
)
957 REG_ATTRS (XEXP (x
, 0))
958 = get_reg_attrs (MEM_EXPR (mem
),
959 INTVAL (XEXP (x
, 1)));
964 /* Assign the RTX X to declaration T. */
970 DECL_CHECK (t
)->decl
.rtl
= x
;
974 /* For register, we maitain the reverse information too. */
975 if (GET_CODE (x
) == REG
)
976 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
977 else if (GET_CODE (x
) == SUBREG
)
978 REG_ATTRS (SUBREG_REG (x
))
979 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
980 if (GET_CODE (x
) == CONCAT
)
982 if (REG_P (XEXP (x
, 0)))
983 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
984 if (REG_P (XEXP (x
, 1)))
985 REG_ATTRS (XEXP (x
, 1))
986 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
988 if (GET_CODE (x
) == PARALLEL
)
991 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
993 rtx y
= XVECEXP (x
, 0, i
);
994 if (REG_P (XEXP (y
, 0)))
995 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1000 /* Identify REG (which may be a CONCAT) as a user register. */
1006 if (GET_CODE (reg
) == CONCAT
)
1008 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1009 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1011 else if (GET_CODE (reg
) == REG
)
1012 REG_USERVAR_P (reg
) = 1;
1017 /* Identify REG as a probable pointer register and show its alignment
1018 as ALIGN, if nonzero. */
1021 mark_reg_pointer (reg
, align
)
1025 if (! REG_POINTER (reg
))
1027 REG_POINTER (reg
) = 1;
1030 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1032 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1033 /* We can no-longer be sure just how aligned this pointer is */
1034 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1037 /* Return 1 plus largest pseudo reg number used in the current function. */
1045 /* Return 1 + the largest label number used so far in the current function. */
1050 if (last_label_num
&& label_num
== base_label_num
)
1051 return last_label_num
;
1055 /* Return first label number used in this function (if any were used). */
1058 get_first_label_num ()
1060 return first_label_num
;
1063 /* Return the final regno of X, which is a SUBREG of a hard
1066 subreg_hard_regno (x
, check_mode
)
1070 enum machine_mode mode
= GET_MODE (x
);
1071 unsigned int byte_offset
, base_regno
, final_regno
;
1072 rtx reg
= SUBREG_REG (x
);
1074 /* This is where we attempt to catch illegal subregs
1075 created by the compiler. */
1076 if (GET_CODE (x
) != SUBREG
1077 || GET_CODE (reg
) != REG
)
1079 base_regno
= REGNO (reg
);
1080 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
1082 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
1085 /* Catch non-congruent offsets too. */
1086 byte_offset
= SUBREG_BYTE (x
);
1087 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
1090 final_regno
= subreg_regno (x
);
1095 /* Return a value representing some low-order bits of X, where the number
1096 of low-order bits is given by MODE. Note that no conversion is done
1097 between floating-point and fixed-point values, rather, the bit
1098 representation is returned.
1100 This function handles the cases in common between gen_lowpart, below,
1101 and two variants in cse.c and combine.c. These are the cases that can
1102 be safely handled at all points in the compilation.
1104 If this is not a case we can handle, return 0. */
1107 gen_lowpart_common (mode
, x
)
1108 enum machine_mode mode
;
1111 int msize
= GET_MODE_SIZE (mode
);
1112 int xsize
= GET_MODE_SIZE (GET_MODE (x
));
1115 if (GET_MODE (x
) == mode
)
1118 /* MODE must occupy no more words than the mode of X. */
1119 if (GET_MODE (x
) != VOIDmode
1120 && ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1121 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
1124 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1125 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1126 && GET_MODE (x
) != VOIDmode
&& msize
> xsize
)
1129 offset
= subreg_lowpart_offset (mode
, GET_MODE (x
));
1131 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1132 && (GET_MODE_CLASS (mode
) == MODE_INT
1133 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1135 /* If we are getting the low-order part of something that has been
1136 sign- or zero-extended, we can either just use the object being
1137 extended or make a narrower extension. If we want an even smaller
1138 piece than the size of the object being extended, call ourselves
1141 This case is used mostly by combine and cse. */
1143 if (GET_MODE (XEXP (x
, 0)) == mode
)
1145 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1146 return gen_lowpart_common (mode
, XEXP (x
, 0));
1147 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
1148 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1150 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
1151 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
)
1152 return simplify_gen_subreg (mode
, x
, GET_MODE (x
), offset
);
1153 else if ((GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
1154 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
)
1155 && GET_MODE (x
) == VOIDmode
)
1156 return simplify_gen_subreg (mode
, x
, int_mode_for_mode (mode
), offset
);
1157 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1158 from the low-order part of the constant. */
1159 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1160 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1161 && GET_MODE (x
) == VOIDmode
1162 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
1164 /* If MODE is twice the host word size, X is already the desired
1165 representation. Otherwise, if MODE is wider than a word, we can't
1166 do this. If MODE is exactly a word, return just one CONST_INT. */
1168 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
1170 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
1172 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
1173 return (GET_CODE (x
) == CONST_INT
? x
1174 : GEN_INT (CONST_DOUBLE_LOW (x
)));
1177 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1178 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
1179 : CONST_DOUBLE_LOW (x
));
1181 /* Sign extend to HOST_WIDE_INT. */
1182 val
= trunc_int_for_mode (val
, mode
);
1184 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
1189 /* The floating-point emulator can handle all conversions between
1190 FP and integer operands. This simplifies reload because it
1191 doesn't have to deal with constructs like (subreg:DI
1192 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1193 /* Single-precision floats are always 32-bits and double-precision
1194 floats are always 64-bits. */
1196 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1197 && GET_MODE_BITSIZE (mode
) == 32
1198 && GET_CODE (x
) == CONST_INT
)
1201 long i
= INTVAL (x
);
1203 real_from_target (&r
, &i
, mode
);
1204 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1206 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1207 && GET_MODE_BITSIZE (mode
) == 64
1208 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
1209 && GET_MODE (x
) == VOIDmode
)
1212 HOST_WIDE_INT low
, high
;
1215 if (GET_CODE (x
) == CONST_INT
)
1218 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
1222 low
= CONST_DOUBLE_LOW (x
);
1223 high
= CONST_DOUBLE_HIGH (x
);
1226 if (HOST_BITS_PER_WIDE_INT
> 32)
1227 high
= low
>> 31 >> 1;
1229 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1231 if (WORDS_BIG_ENDIAN
)
1232 i
[0] = high
, i
[1] = low
;
1234 i
[0] = low
, i
[1] = high
;
1236 real_from_target (&r
, i
, mode
);
1237 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1239 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1240 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1241 && GET_CODE (x
) == CONST_DOUBLE
1242 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
1245 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
1246 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
1248 /* Convert 'r' into an array of four 32-bit words in target word
1250 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
1251 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
1254 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[3 * endian
]);
1257 i
[3 - 3 * endian
] = 0;
1260 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
+ 2 * endian
);
1261 i
[2 - 2 * endian
] = 0;
1262 i
[3 - 2 * endian
] = 0;
1265 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
1266 i
[3 - 3 * endian
] = 0;
1269 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
1274 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1276 #if HOST_BITS_PER_WIDE_INT == 32
1277 return immed_double_const (i
[3 * endian
], i
[1 + endian
], mode
);
1279 if (HOST_BITS_PER_WIDE_INT
!= 64)
1282 return immed_double_const ((((unsigned long) i
[3 * endian
])
1283 | ((HOST_WIDE_INT
) i
[1 + endian
] << 32)),
1284 (((unsigned long) i
[2 - endian
])
1285 | ((HOST_WIDE_INT
) i
[3 - 3 * endian
] << 32)),
1290 /* Otherwise, we can't do this. */
1294 /* Return the real part (which has mode MODE) of a complex value X.
1295 This always comes at the low address in memory. */
1298 gen_realpart (mode
, x
)
1299 enum machine_mode mode
;
1302 if (WORDS_BIG_ENDIAN
1303 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1305 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1307 ("can't access real part of complex value in hard register");
1308 else if (WORDS_BIG_ENDIAN
)
1309 return gen_highpart (mode
, x
);
1311 return gen_lowpart (mode
, x
);
1314 /* Return the imaginary part (which has mode MODE) of a complex value X.
1315 This always comes at the high address in memory. */
1318 gen_imagpart (mode
, x
)
1319 enum machine_mode mode
;
1322 if (WORDS_BIG_ENDIAN
)
1323 return gen_lowpart (mode
, x
);
1324 else if (! WORDS_BIG_ENDIAN
1325 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1327 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1329 ("can't access imaginary part of complex value in hard register");
1331 return gen_highpart (mode
, x
);
1334 /* Return 1 iff X, assumed to be a SUBREG,
1335 refers to the real part of the complex value in its containing reg.
1336 Complex values are always stored with the real part in the first word,
1337 regardless of WORDS_BIG_ENDIAN. */
1340 subreg_realpart_p (x
)
1343 if (GET_CODE (x
) != SUBREG
)
1346 return ((unsigned int) SUBREG_BYTE (x
)
1347 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1350 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1351 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1352 least-significant part of X.
1353 MODE specifies how big a part of X to return;
1354 it usually should not be larger than a word.
1355 If X is a MEM whose address is a QUEUED, the value may be so also. */
1358 gen_lowpart (mode
, x
)
1359 enum machine_mode mode
;
1362 rtx result
= gen_lowpart_common (mode
, x
);
1366 else if (GET_CODE (x
) == REG
)
1368 /* Must be a hard reg that's not valid in MODE. */
1369 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1374 else if (GET_CODE (x
) == MEM
)
1376 /* The only additional case we can do is MEM. */
1379 /* The following exposes the use of "x" to CSE. */
1380 if (GET_MODE_SIZE (GET_MODE (x
)) <= UNITS_PER_WORD
1381 && SCALAR_INT_MODE_P (GET_MODE (x
))
1382 && ! no_new_pseudos
)
1383 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1385 if (WORDS_BIG_ENDIAN
)
1386 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1387 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1389 if (BYTES_BIG_ENDIAN
)
1390 /* Adjust the address so that the address-after-the-data
1392 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1393 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1395 return adjust_address (x
, mode
, offset
);
1397 else if (GET_CODE (x
) == ADDRESSOF
)
1398 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1403 /* Like `gen_lowpart', but refer to the most significant part.
1404 This is used to access the imaginary part of a complex number. */
1407 gen_highpart (mode
, x
)
1408 enum machine_mode mode
;
1411 unsigned int msize
= GET_MODE_SIZE (mode
);
1414 /* This case loses if X is a subreg. To catch bugs early,
1415 complain if an invalid MODE is used even in other cases. */
1416 if (msize
> UNITS_PER_WORD
1417 && msize
!= GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1420 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1421 subreg_highpart_offset (mode
, GET_MODE (x
)));
1423 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1424 the target if we have a MEM. gen_highpart must return a valid operand,
1425 emitting code if necessary to do so. */
1426 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1427 result
= validize_mem (result
);
1434 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1435 be VOIDmode constant. */
1437 gen_highpart_mode (outermode
, innermode
, exp
)
1438 enum machine_mode outermode
, innermode
;
1441 if (GET_MODE (exp
) != VOIDmode
)
1443 if (GET_MODE (exp
) != innermode
)
1445 return gen_highpart (outermode
, exp
);
1447 return simplify_gen_subreg (outermode
, exp
, innermode
,
1448 subreg_highpart_offset (outermode
, innermode
));
1451 /* Return offset in bytes to get OUTERMODE low part
1452 of the value in mode INNERMODE stored in memory in target format. */
1455 subreg_lowpart_offset (outermode
, innermode
)
1456 enum machine_mode outermode
, innermode
;
1458 unsigned int offset
= 0;
1459 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1463 if (WORDS_BIG_ENDIAN
)
1464 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1465 if (BYTES_BIG_ENDIAN
)
1466 offset
+= difference
% UNITS_PER_WORD
;
1472 /* Return offset in bytes to get OUTERMODE high part
1473 of the value in mode INNERMODE stored in memory in target format. */
1475 subreg_highpart_offset (outermode
, innermode
)
1476 enum machine_mode outermode
, innermode
;
1478 unsigned int offset
= 0;
1479 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1481 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1486 if (! WORDS_BIG_ENDIAN
)
1487 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1488 if (! BYTES_BIG_ENDIAN
)
1489 offset
+= difference
% UNITS_PER_WORD
;
1495 /* Return 1 iff X, assumed to be a SUBREG,
1496 refers to the least significant part of its containing reg.
1497 If X is not a SUBREG, always return 1 (it is its own low part!). */
1500 subreg_lowpart_p (x
)
1503 if (GET_CODE (x
) != SUBREG
)
1505 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1508 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1509 == SUBREG_BYTE (x
));
1513 /* Helper routine for all the constant cases of operand_subword.
1514 Some places invoke this directly. */
1517 constant_subword (op
, offset
, mode
)
1520 enum machine_mode mode
;
1522 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1525 /* If OP is already an integer word, return it. */
1526 if (GET_MODE_CLASS (mode
) == MODE_INT
1527 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1530 /* The output is some bits, the width of the target machine's word.
1531 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1533 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1534 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1535 && GET_MODE_BITSIZE (mode
) == 64
1536 && GET_CODE (op
) == CONST_DOUBLE
)
1541 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1542 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1544 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1545 which the words are written depends on the word endianness.
1546 ??? This is a potential portability problem and should
1547 be fixed at some point.
1549 We must exercise caution with the sign bit. By definition there
1550 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1551 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1552 So we explicitly mask and sign-extend as necessary. */
1553 if (BITS_PER_WORD
== 32)
1556 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1557 return GEN_INT (val
);
1559 #if HOST_BITS_PER_WIDE_INT >= 64
1560 else if (BITS_PER_WORD
>= 64 && offset
== 0)
1562 val
= k
[! WORDS_BIG_ENDIAN
];
1563 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1564 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1565 return GEN_INT (val
);
1568 else if (BITS_PER_WORD
== 16)
1570 val
= k
[offset
>> 1];
1571 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1573 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1574 return GEN_INT (val
);
1579 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1580 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1581 && GET_MODE_BITSIZE (mode
) > 64
1582 && GET_CODE (op
) == CONST_DOUBLE
)
1587 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1588 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1590 if (BITS_PER_WORD
== 32)
1593 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1594 return GEN_INT (val
);
1596 #if HOST_BITS_PER_WIDE_INT >= 64
1597 else if (BITS_PER_WORD
>= 64 && offset
<= 1)
1599 val
= k
[offset
* 2 + ! WORDS_BIG_ENDIAN
];
1600 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1601 val
|= (HOST_WIDE_INT
) k
[offset
* 2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1602 return GEN_INT (val
);
1609 /* Single word float is a little harder, since single- and double-word
1610 values often do not have the same high-order bits. We have already
1611 verified that we want the only defined word of the single-word value. */
1612 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1613 && GET_MODE_BITSIZE (mode
) == 32
1614 && GET_CODE (op
) == CONST_DOUBLE
)
1619 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1620 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1622 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1624 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1626 if (BITS_PER_WORD
== 16)
1628 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1630 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1633 return GEN_INT (val
);
1636 /* The only remaining cases that we can handle are integers.
1637 Convert to proper endianness now since these cases need it.
1638 At this point, offset == 0 means the low-order word.
1640 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1641 in general. However, if OP is (const_int 0), we can just return
1644 if (op
== const0_rtx
)
1647 if (GET_MODE_CLASS (mode
) != MODE_INT
1648 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1649 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1652 if (WORDS_BIG_ENDIAN
)
1653 offset
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - offset
;
1655 /* Find out which word on the host machine this value is in and get
1656 it from the constant. */
1657 val
= (offset
/ size_ratio
== 0
1658 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1659 : (GET_CODE (op
) == CONST_INT
1660 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1662 /* Get the value we want into the low bits of val. */
1663 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1664 val
= ((val
>> ((offset
% size_ratio
) * BITS_PER_WORD
)));
1666 val
= trunc_int_for_mode (val
, word_mode
);
1668 return GEN_INT (val
);
1671 /* Return subword OFFSET of operand OP.
1672 The word number, OFFSET, is interpreted as the word number starting
1673 at the low-order address. OFFSET 0 is the low-order word if not
1674 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1676 If we cannot extract the required word, we return zero. Otherwise,
1677 an rtx corresponding to the requested word will be returned.
1679 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1680 reload has completed, a valid address will always be returned. After
1681 reload, if a valid address cannot be returned, we return zero.
1683 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1684 it is the responsibility of the caller.
1686 MODE is the mode of OP in case it is a CONST_INT.
1688 ??? This is still rather broken for some cases. The problem for the
1689 moment is that all callers of this thing provide no 'goal mode' to
1690 tell us to work with. This exists because all callers were written
1691 in a word based SUBREG world.
1692 Now use of this function can be deprecated by simplify_subreg in most
1697 operand_subword (op
, offset
, validate_address
, mode
)
1699 unsigned int offset
;
1700 int validate_address
;
1701 enum machine_mode mode
;
1703 if (mode
== VOIDmode
)
1704 mode
= GET_MODE (op
);
1706 if (mode
== VOIDmode
)
1709 /* If OP is narrower than a word, fail. */
1711 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1714 /* If we want a word outside OP, return zero. */
1716 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1719 /* Form a new MEM at the requested address. */
1720 if (GET_CODE (op
) == MEM
)
1722 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1724 if (! validate_address
)
1727 else if (reload_completed
)
1729 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1733 return replace_equiv_address (new, XEXP (new, 0));
1736 /* Rest can be handled by simplify_subreg. */
1737 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1740 /* Similar to `operand_subword', but never return 0. If we can't extract
1741 the required subword, put OP into a register and try again. If that fails,
1742 abort. We always validate the address in this case.
1744 MODE is the mode of OP, in case it is CONST_INT. */
1747 operand_subword_force (op
, offset
, mode
)
1749 unsigned int offset
;
1750 enum machine_mode mode
;
1752 rtx result
= operand_subword (op
, offset
, 1, mode
);
1757 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1759 /* If this is a register which can not be accessed by words, copy it
1760 to a pseudo register. */
1761 if (GET_CODE (op
) == REG
)
1762 op
= copy_to_reg (op
);
1764 op
= force_reg (mode
, op
);
1767 result
= operand_subword (op
, offset
, 1, mode
);
1774 /* Given a compare instruction, swap the operands.
1775 A test instruction is changed into a compare of 0 against the operand. */
1778 reverse_comparison (insn
)
1781 rtx body
= PATTERN (insn
);
1784 if (GET_CODE (body
) == SET
)
1785 comp
= SET_SRC (body
);
1787 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1789 if (GET_CODE (comp
) == COMPARE
)
1791 rtx op0
= XEXP (comp
, 0);
1792 rtx op1
= XEXP (comp
, 1);
1793 XEXP (comp
, 0) = op1
;
1794 XEXP (comp
, 1) = op0
;
1798 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1799 CONST0_RTX (GET_MODE (comp
)), comp
);
1800 if (GET_CODE (body
) == SET
)
1801 SET_SRC (body
) = new;
1803 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1807 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1808 or (2) a component ref of something variable. Represent the later with
1809 a NULL expression. */
1812 component_ref_for_mem_expr (ref
)
1815 tree inner
= TREE_OPERAND (ref
, 0);
1817 if (TREE_CODE (inner
) == COMPONENT_REF
)
1818 inner
= component_ref_for_mem_expr (inner
);
1821 tree placeholder_ptr
= 0;
1823 /* Now remove any conversions: they don't change what the underlying
1824 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1825 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1826 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1827 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1828 || TREE_CODE (inner
) == SAVE_EXPR
1829 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1830 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1831 inner
= find_placeholder (inner
, &placeholder_ptr
);
1833 inner
= TREE_OPERAND (inner
, 0);
1835 if (! DECL_P (inner
))
1839 if (inner
== TREE_OPERAND (ref
, 0))
1842 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1843 TREE_OPERAND (ref
, 1));
1846 /* Given REF, a MEM, and T, either the type of X or the expression
1847 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1848 if we are making a new object of this type. BITPOS is nonzero if
1849 there is an offset outstanding on T that will be applied later. */
1852 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, bitpos
)
1856 HOST_WIDE_INT bitpos
;
1858 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1859 tree expr
= MEM_EXPR (ref
);
1860 rtx offset
= MEM_OFFSET (ref
);
1861 rtx size
= MEM_SIZE (ref
);
1862 unsigned int align
= MEM_ALIGN (ref
);
1863 HOST_WIDE_INT apply_bitpos
= 0;
1866 /* It can happen that type_for_mode was given a mode for which there
1867 is no language-level type. In which case it returns NULL, which
1872 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1874 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1875 wrong answer, as it assumes that DECL_RTL already has the right alias
1876 info. Callers should not set DECL_RTL until after the call to
1877 set_mem_attributes. */
1878 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1881 /* Get the alias set from the expression or type (perhaps using a
1882 front-end routine) and use it. */
1883 alias
= get_alias_set (t
);
1885 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1886 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1887 RTX_UNCHANGING_P (ref
)
1888 |= ((lang_hooks
.honor_readonly
1889 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1890 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1892 /* If we are making an object of this type, or if this is a DECL, we know
1893 that it is a scalar if the type is not an aggregate. */
1894 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1895 MEM_SCALAR_P (ref
) = 1;
1897 /* We can set the alignment from the type if we are making an object,
1898 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1899 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1900 align
= MAX (align
, TYPE_ALIGN (type
));
1902 /* If the size is known, we can set that. */
1903 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1904 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1906 /* If T is not a type, we may be able to deduce some more information about
1910 maybe_set_unchanging (ref
, t
);
1911 if (TREE_THIS_VOLATILE (t
))
1912 MEM_VOLATILE_P (ref
) = 1;
1914 /* Now remove any conversions: they don't change what the underlying
1915 object is. Likewise for SAVE_EXPR. */
1916 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1917 || TREE_CODE (t
) == NON_LVALUE_EXPR
1918 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1919 || TREE_CODE (t
) == SAVE_EXPR
)
1920 t
= TREE_OPERAND (t
, 0);
1922 /* If this expression can't be addressed (e.g., it contains a reference
1923 to a non-addressable field), show we don't change its alias set. */
1924 if (! can_address_p (t
))
1925 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1927 /* If this is a decl, set the attributes of the MEM from it. */
1931 offset
= const0_rtx
;
1932 apply_bitpos
= bitpos
;
1933 size
= (DECL_SIZE_UNIT (t
)
1934 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1935 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1936 align
= DECL_ALIGN (t
);
1939 /* If this is a constant, we know the alignment. */
1940 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1942 align
= TYPE_ALIGN (type
);
1943 #ifdef CONSTANT_ALIGNMENT
1944 align
= CONSTANT_ALIGNMENT (t
, align
);
1948 /* If this is a field reference and not a bit-field, record it. */
1949 /* ??? There is some information that can be gleened from bit-fields,
1950 such as the word offset in the structure that might be modified.
1951 But skip it for now. */
1952 else if (TREE_CODE (t
) == COMPONENT_REF
1953 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1955 expr
= component_ref_for_mem_expr (t
);
1956 offset
= const0_rtx
;
1957 apply_bitpos
= bitpos
;
1958 /* ??? Any reason the field size would be different than
1959 the size we got from the type? */
1962 /* If this is an array reference, look for an outer field reference. */
1963 else if (TREE_CODE (t
) == ARRAY_REF
)
1965 tree off_tree
= size_zero_node
;
1969 tree index
= TREE_OPERAND (t
, 1);
1970 tree array
= TREE_OPERAND (t
, 0);
1971 tree domain
= TYPE_DOMAIN (TREE_TYPE (array
));
1972 tree low_bound
= (domain
? TYPE_MIN_VALUE (domain
) : 0);
1973 tree unit_size
= TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array
)));
1975 /* We assume all arrays have sizes that are a multiple of a byte.
1976 First subtract the lower bound, if any, in the type of the
1977 index, then convert to sizetype and multiply by the size of the
1979 if (low_bound
!= 0 && ! integer_zerop (low_bound
))
1980 index
= fold (build (MINUS_EXPR
, TREE_TYPE (index
),
1983 /* If the index has a self-referential type, pass it to a
1984 WITH_RECORD_EXPR; if the component size is, pass our
1985 component to one. */
1986 if (! TREE_CONSTANT (index
)
1987 && contains_placeholder_p (index
))
1988 index
= build (WITH_RECORD_EXPR
, TREE_TYPE (index
), index
, t
);
1989 if (! TREE_CONSTANT (unit_size
)
1990 && contains_placeholder_p (unit_size
))
1991 unit_size
= build (WITH_RECORD_EXPR
, sizetype
,
1995 = fold (build (PLUS_EXPR
, sizetype
,
1996 fold (build (MULT_EXPR
, sizetype
,
2000 t
= TREE_OPERAND (t
, 0);
2002 while (TREE_CODE (t
) == ARRAY_REF
);
2008 if (host_integerp (off_tree
, 1))
2010 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
2011 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
2012 align
= DECL_ALIGN (t
);
2013 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
2015 offset
= GEN_INT (ioff
);
2016 apply_bitpos
= bitpos
;
2019 else if (TREE_CODE (t
) == COMPONENT_REF
)
2021 expr
= component_ref_for_mem_expr (t
);
2022 if (host_integerp (off_tree
, 1))
2024 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
2025 apply_bitpos
= bitpos
;
2027 /* ??? Any reason the field size would be different than
2028 the size we got from the type? */
2030 else if (flag_argument_noalias
> 1
2031 && TREE_CODE (t
) == INDIRECT_REF
2032 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
2039 /* If this is a Fortran indirect argument reference, record the
2041 else if (flag_argument_noalias
> 1
2042 && TREE_CODE (t
) == INDIRECT_REF
2043 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
2050 /* If we modified OFFSET based on T, then subtract the outstanding
2051 bit position offset. Similarly, increase the size of the accessed
2052 object to contain the negative offset. */
2055 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
2057 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
2060 /* Now set the attributes we computed above. */
2062 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
2064 /* If this is already known to be a scalar or aggregate, we are done. */
2065 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
2068 /* If it is a reference into an aggregate, this is part of an aggregate.
2069 Otherwise we don't know. */
2070 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
2071 || TREE_CODE (t
) == ARRAY_RANGE_REF
2072 || TREE_CODE (t
) == BIT_FIELD_REF
)
2073 MEM_IN_STRUCT_P (ref
) = 1;
2077 set_mem_attributes (ref
, t
, objectp
)
2082 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
2085 /* Set the decl for MEM to DECL. */
2088 set_mem_attrs_from_reg (mem
, reg
)
2093 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
2094 GEN_INT (REG_OFFSET (reg
)),
2095 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
2098 /* Set the alias set of MEM to SET. */
2101 set_mem_alias_set (mem
, set
)
2105 #ifdef ENABLE_CHECKING
2106 /* If the new and old alias sets don't conflict, something is wrong. */
2107 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
2111 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
2112 MEM_SIZE (mem
), MEM_ALIGN (mem
),
2116 /* Set the alignment of MEM to ALIGN bits. */
2119 set_mem_align (mem
, align
)
2123 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
2124 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
2128 /* Set the expr for MEM to EXPR. */
2131 set_mem_expr (mem
, expr
)
2136 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
2137 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
2140 /* Set the offset of MEM to OFFSET. */
2143 set_mem_offset (mem
, offset
)
2146 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
2147 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
2151 /* Set the size of MEM to SIZE. */
2154 set_mem_size (mem
, size
)
2157 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
2158 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
2162 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2163 and its address changed to ADDR. (VOIDmode means don't change the mode.
2164 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2165 returned memory location is required to be valid. The memory
2166 attributes are not changed. */
2169 change_address_1 (memref
, mode
, addr
, validate
)
2171 enum machine_mode mode
;
2177 if (GET_CODE (memref
) != MEM
)
2179 if (mode
== VOIDmode
)
2180 mode
= GET_MODE (memref
);
2182 addr
= XEXP (memref
, 0);
2186 if (reload_in_progress
|| reload_completed
)
2188 if (! memory_address_p (mode
, addr
))
2192 addr
= memory_address (mode
, addr
);
2195 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2198 new = gen_rtx_MEM (mode
, addr
);
2199 MEM_COPY_ATTRIBUTES (new, memref
);
2203 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2204 way we are changing MEMREF, so we only preserve the alias set. */
2207 change_address (memref
, mode
, addr
)
2209 enum machine_mode mode
;
2212 rtx
new = change_address_1 (memref
, mode
, addr
, 1);
2213 enum machine_mode mmode
= GET_MODE (new);
2216 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0,
2217 mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
)),
2218 (mmode
== BLKmode
? BITS_PER_UNIT
2219 : GET_MODE_ALIGNMENT (mmode
)),
2225 /* Return a memory reference like MEMREF, but with its mode changed
2226 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2227 nonzero, the memory address is forced to be valid.
2228 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2229 and caller is responsible for adjusting MEMREF base register. */
2232 adjust_address_1 (memref
, mode
, offset
, validate
, adjust
)
2234 enum machine_mode mode
;
2235 HOST_WIDE_INT offset
;
2236 int validate
, adjust
;
2238 rtx addr
= XEXP (memref
, 0);
2240 rtx memoffset
= MEM_OFFSET (memref
);
2242 unsigned int memalign
= MEM_ALIGN (memref
);
2244 /* ??? Prefer to create garbage instead of creating shared rtl.
2245 This may happen even if offset is nonzero -- consider
2246 (plus (plus reg reg) const_int) -- so do this always. */
2247 addr
= copy_rtx (addr
);
2251 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2252 object, we can merge it into the LO_SUM. */
2253 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2255 && (unsigned HOST_WIDE_INT
) offset
2256 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2257 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
2258 plus_constant (XEXP (addr
, 1), offset
));
2260 addr
= plus_constant (addr
, offset
);
2263 new = change_address_1 (memref
, mode
, addr
, validate
);
2265 /* Compute the new values of the memory attributes due to this adjustment.
2266 We add the offsets and update the alignment. */
2268 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
2270 /* Compute the new alignment by taking the MIN of the alignment and the
2271 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2276 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
2278 /* We can compute the size in a number of ways. */
2279 if (GET_MODE (new) != BLKmode
)
2280 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2281 else if (MEM_SIZE (memref
))
2282 size
= plus_constant (MEM_SIZE (memref
), -offset
);
2284 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
2285 memoffset
, size
, memalign
, GET_MODE (new));
2287 /* At some point, we should validate that this offset is within the object,
2288 if all the appropriate values are known. */
2292 /* Return a memory reference like MEMREF, but with its mode changed
2293 to MODE and its address changed to ADDR, which is assumed to be
2294 MEMREF offseted by OFFSET bytes. If VALIDATE is
2295 nonzero, the memory address is forced to be valid. */
2298 adjust_automodify_address_1 (memref
, mode
, addr
, offset
, validate
)
2300 enum machine_mode mode
;
2302 HOST_WIDE_INT offset
;
2305 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2306 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2309 /* Return a memory reference like MEMREF, but whose address is changed by
2310 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2311 known to be in OFFSET (possibly 1). */
2314 offset_address (memref
, offset
, pow2
)
2319 rtx
new, addr
= XEXP (memref
, 0);
2321 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2323 /* At this point we don't know _why_ the address is invalid. It
2324 could have secondary memory refereces, multiplies or anything.
2326 However, if we did go and rearrange things, we can wind up not
2327 being able to recognize the magic around pic_offset_table_rtx.
2328 This stuff is fragile, and is yet another example of why it is
2329 bad to expose PIC machinery too early. */
2330 if (! memory_address_p (GET_MODE (memref
), new)
2331 && GET_CODE (addr
) == PLUS
2332 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2334 addr
= force_reg (GET_MODE (addr
), addr
);
2335 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2338 update_temp_slot_address (XEXP (memref
, 0), new);
2339 new = change_address_1 (memref
, VOIDmode
, new, 1);
2341 /* Update the alignment to reflect the offset. Reset the offset, which
2344 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2345 MIN (MEM_ALIGN (memref
),
2346 (unsigned HOST_WIDE_INT
) pow2
* BITS_PER_UNIT
),
2351 /* Return a memory reference like MEMREF, but with its address changed to
2352 ADDR. The caller is asserting that the actual piece of memory pointed
2353 to is the same, just the form of the address is being changed, such as
2354 by putting something into a register. */
2357 replace_equiv_address (memref
, addr
)
2361 /* change_address_1 copies the memory attribute structure without change
2362 and that's exactly what we want here. */
2363 update_temp_slot_address (XEXP (memref
, 0), addr
);
2364 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2367 /* Likewise, but the reference is not required to be valid. */
2370 replace_equiv_address_nv (memref
, addr
)
2374 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2377 /* Return a memory reference like MEMREF, but with its mode widened to
2378 MODE and offset by OFFSET. This would be used by targets that e.g.
2379 cannot issue QImode memory operations and have to use SImode memory
2380 operations plus masking logic. */
2383 widen_memory_access (memref
, mode
, offset
)
2385 enum machine_mode mode
;
2386 HOST_WIDE_INT offset
;
2388 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2389 tree expr
= MEM_EXPR (new);
2390 rtx memoffset
= MEM_OFFSET (new);
2391 unsigned int size
= GET_MODE_SIZE (mode
);
2393 /* If we don't know what offset we were at within the expression, then
2394 we can't know if we've overstepped the bounds. */
2400 if (TREE_CODE (expr
) == COMPONENT_REF
)
2402 tree field
= TREE_OPERAND (expr
, 1);
2404 if (! DECL_SIZE_UNIT (field
))
2410 /* Is the field at least as large as the access? If so, ok,
2411 otherwise strip back to the containing structure. */
2412 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2413 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2414 && INTVAL (memoffset
) >= 0)
2417 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2423 expr
= TREE_OPERAND (expr
, 0);
2424 memoffset
= (GEN_INT (INTVAL (memoffset
)
2425 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2426 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2429 /* Similarly for the decl. */
2430 else if (DECL_P (expr
)
2431 && DECL_SIZE_UNIT (expr
)
2432 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2433 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2434 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2438 /* The widened memory access overflows the expression, which means
2439 that it could alias another expression. Zap it. */
2446 memoffset
= NULL_RTX
;
2448 /* The widened memory may alias other stuff, so zap the alias set. */
2449 /* ??? Maybe use get_alias_set on any remaining expression. */
2451 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2452 MEM_ALIGN (new), mode
);
2457 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2462 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2463 NULL
, label_num
++, NULL
);
2466 /* For procedure integration. */
2468 /* Install new pointers to the first and last insns in the chain.
2469 Also, set cur_insn_uid to one higher than the last in use.
2470 Used for an inline-procedure after copying the insn chain. */
2473 set_new_first_and_last_insn (first
, last
)
2482 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2483 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2488 /* Set the range of label numbers found in the current function.
2489 This is used when belatedly compiling an inline function. */
2492 set_new_first_and_last_label_num (first
, last
)
2495 base_label_num
= label_num
;
2496 first_label_num
= first
;
2497 last_label_num
= last
;
2500 /* Set the last label number found in the current function.
2501 This is used when belatedly compiling an inline function. */
2504 set_new_last_label_num (last
)
2507 base_label_num
= label_num
;
2508 last_label_num
= last
;
2511 /* Restore all variables describing the current status from the structure *P.
2512 This is used after a nested function. */
2515 restore_emit_status (p
)
2516 struct function
*p ATTRIBUTE_UNUSED
;
2521 /* Go through all the RTL insn bodies and copy any invalid shared
2522 structure. This routine should only be called once. */
2525 unshare_all_rtl (fndecl
, insn
)
2531 /* Make sure that virtual parameters are not shared. */
2532 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2533 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2535 /* Make sure that virtual stack slots are not shared. */
2536 unshare_all_decls (DECL_INITIAL (fndecl
));
2538 /* Unshare just about everything else. */
2539 unshare_all_rtl_1 (insn
);
2541 /* Make sure the addresses of stack slots found outside the insn chain
2542 (such as, in DECL_RTL of a variable) are not shared
2543 with the insn chain.
2545 This special care is necessary when the stack slot MEM does not
2546 actually appear in the insn chain. If it does appear, its address
2547 is unshared from all else at that point. */
2548 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2551 /* Go through all the RTL insn bodies and copy any invalid shared
2552 structure, again. This is a fairly expensive thing to do so it
2553 should be done sparingly. */
2556 unshare_all_rtl_again (insn
)
2562 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2565 reset_used_flags (PATTERN (p
));
2566 reset_used_flags (REG_NOTES (p
));
2567 reset_used_flags (LOG_LINKS (p
));
2570 /* Make sure that virtual stack slots are not shared. */
2571 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2573 /* Make sure that virtual parameters are not shared. */
2574 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2575 reset_used_flags (DECL_RTL (decl
));
2577 reset_used_flags (stack_slot_list
);
2579 unshare_all_rtl (cfun
->decl
, insn
);
2582 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2583 Assumes the mark bits are cleared at entry. */
2586 unshare_all_rtl_1 (insn
)
2589 for (; insn
; insn
= NEXT_INSN (insn
))
2592 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2593 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2594 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2598 /* Go through all virtual stack slots of a function and copy any
2599 shared structure. */
2601 unshare_all_decls (blk
)
2606 /* Copy shared decls. */
2607 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2608 if (DECL_RTL_SET_P (t
))
2609 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2611 /* Now process sub-blocks. */
2612 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2613 unshare_all_decls (t
);
2616 /* Go through all virtual stack slots of a function and mark them as
2619 reset_used_decls (blk
)
2625 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2626 if (DECL_RTL_SET_P (t
))
2627 reset_used_flags (DECL_RTL (t
));
2629 /* Now process sub-blocks. */
2630 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2631 reset_used_decls (t
);
2634 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2635 placed in the result directly, rather than being copied. MAY_SHARE is
2636 either a MEM of an EXPR_LIST of MEMs. */
2639 copy_most_rtx (orig
, may_share
)
2646 const char *format_ptr
;
2648 if (orig
== may_share
2649 || (GET_CODE (may_share
) == EXPR_LIST
2650 && in_expr_list_p (may_share
, orig
)))
2653 code
= GET_CODE (orig
);
2671 copy
= rtx_alloc (code
);
2672 PUT_MODE (copy
, GET_MODE (orig
));
2673 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2674 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2675 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2676 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2677 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2679 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2681 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2683 switch (*format_ptr
++)
2686 XEXP (copy
, i
) = XEXP (orig
, i
);
2687 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2688 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2692 XEXP (copy
, i
) = XEXP (orig
, i
);
2697 XVEC (copy
, i
) = XVEC (orig
, i
);
2698 if (XVEC (orig
, i
) != NULL
)
2700 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2701 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2702 XVECEXP (copy
, i
, j
)
2703 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2708 XWINT (copy
, i
) = XWINT (orig
, i
);
2713 XINT (copy
, i
) = XINT (orig
, i
);
2717 XTREE (copy
, i
) = XTREE (orig
, i
);
2722 XSTR (copy
, i
) = XSTR (orig
, i
);
2726 /* Copy this through the wide int field; that's safest. */
2727 X0WINT (copy
, i
) = X0WINT (orig
, i
);
2737 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2738 Recursively does the same for subexpressions. */
2741 copy_rtx_if_shared (orig
)
2747 const char *format_ptr
;
2753 code
= GET_CODE (x
);
2755 /* These types may be freely shared. */
2769 /* SCRATCH must be shared because they represent distinct values. */
2773 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2774 a LABEL_REF, it isn't sharable. */
2775 if (GET_CODE (XEXP (x
, 0)) == PLUS
2776 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2777 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2786 /* The chain of insns is not being copied. */
2790 /* A MEM is allowed to be shared if its address is constant.
2792 We used to allow sharing of MEMs which referenced
2793 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2794 that can lose. instantiate_virtual_regs will not unshare
2795 the MEMs, and combine may change the structure of the address
2796 because it looks safe and profitable in one context, but
2797 in some other context it creates unrecognizable RTL. */
2798 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
2807 /* This rtx may not be shared. If it has already been seen,
2808 replace it with a copy of itself. */
2810 if (RTX_FLAG (x
, used
))
2814 copy
= rtx_alloc (code
);
2816 (sizeof (*copy
) - sizeof (copy
->fld
)
2817 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
2821 RTX_FLAG (x
, used
) = 1;
2823 /* Now scan the subexpressions recursively.
2824 We can store any replaced subexpressions directly into X
2825 since we know X is not shared! Any vectors in X
2826 must be copied if X was copied. */
2828 format_ptr
= GET_RTX_FORMAT (code
);
2830 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2832 switch (*format_ptr
++)
2835 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
2839 if (XVEC (x
, i
) != NULL
)
2842 int len
= XVECLEN (x
, i
);
2844 if (copied
&& len
> 0)
2845 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2846 for (j
= 0; j
< len
; j
++)
2847 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
2855 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2856 to look for shared sub-parts. */
2859 reset_used_flags (x
)
2864 const char *format_ptr
;
2869 code
= GET_CODE (x
);
2871 /* These types may be freely shared so we needn't do any resetting
2893 /* The chain of insns is not being copied. */
2900 RTX_FLAG (x
, used
) = 0;
2902 format_ptr
= GET_RTX_FORMAT (code
);
2903 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2905 switch (*format_ptr
++)
2908 reset_used_flags (XEXP (x
, i
));
2912 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2913 reset_used_flags (XVECEXP (x
, i
, j
));
2919 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2920 Return X or the rtx for the pseudo reg the value of X was copied into.
2921 OTHER must be valid as a SET_DEST. */
2924 make_safe_from (x
, other
)
2928 switch (GET_CODE (other
))
2931 other
= SUBREG_REG (other
);
2933 case STRICT_LOW_PART
:
2936 other
= XEXP (other
, 0);
2942 if ((GET_CODE (other
) == MEM
2944 && GET_CODE (x
) != REG
2945 && GET_CODE (x
) != SUBREG
)
2946 || (GET_CODE (other
) == REG
2947 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2948 || reg_mentioned_p (other
, x
))))
2950 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2951 emit_move_insn (temp
, x
);
2957 /* Emission of insns (adding them to the doubly-linked list). */
2959 /* Return the first insn of the current sequence or current function. */
2967 /* Specify a new insn as the first in the chain. */
2970 set_first_insn (insn
)
2973 if (PREV_INSN (insn
) != 0)
2978 /* Return the last insn emitted in current sequence or current function. */
2986 /* Specify a new insn as the last in the chain. */
2989 set_last_insn (insn
)
2992 if (NEXT_INSN (insn
) != 0)
2997 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3000 get_last_insn_anywhere ()
3002 struct sequence_stack
*stack
;
3005 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3006 if (stack
->last
!= 0)
3011 /* Return the first nonnote insn emitted in current sequence or current
3012 function. This routine looks inside SEQUENCEs. */
3015 get_first_nonnote_insn ()
3017 rtx insn
= first_insn
;
3021 insn
= next_insn (insn
);
3022 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3029 /* Return the last nonnote insn emitted in current sequence or current
3030 function. This routine looks inside SEQUENCEs. */
3033 get_last_nonnote_insn ()
3035 rtx insn
= last_insn
;
3039 insn
= previous_insn (insn
);
3040 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3047 /* Return a number larger than any instruction's uid in this function. */
3052 return cur_insn_uid
;
3055 /* Renumber instructions so that no instruction UIDs are wasted. */
3058 renumber_insns (stream
)
3063 /* If we're not supposed to renumber instructions, don't. */
3064 if (!flag_renumber_insns
)
3067 /* If there aren't that many instructions, then it's not really
3068 worth renumbering them. */
3069 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
3074 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3077 fprintf (stream
, "Renumbering insn %d to %d\n",
3078 INSN_UID (insn
), cur_insn_uid
);
3079 INSN_UID (insn
) = cur_insn_uid
++;
3083 /* Return the next insn. If it is a SEQUENCE, return the first insn
3092 insn
= NEXT_INSN (insn
);
3093 if (insn
&& GET_CODE (insn
) == INSN
3094 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3095 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3101 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3105 previous_insn (insn
)
3110 insn
= PREV_INSN (insn
);
3111 if (insn
&& GET_CODE (insn
) == INSN
3112 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3113 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3119 /* Return the next insn after INSN that is not a NOTE. This routine does not
3120 look inside SEQUENCEs. */
3123 next_nonnote_insn (insn
)
3128 insn
= NEXT_INSN (insn
);
3129 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3136 /* Return the previous insn before INSN that is not a NOTE. This routine does
3137 not look inside SEQUENCEs. */
3140 prev_nonnote_insn (insn
)
3145 insn
= PREV_INSN (insn
);
3146 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3153 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3154 or 0, if there is none. This routine does not look inside
3158 next_real_insn (insn
)
3163 insn
= NEXT_INSN (insn
);
3164 if (insn
== 0 || GET_CODE (insn
) == INSN
3165 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
3172 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3173 or 0, if there is none. This routine does not look inside
3177 prev_real_insn (insn
)
3182 insn
= PREV_INSN (insn
);
3183 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
3184 || GET_CODE (insn
) == JUMP_INSN
)
3191 /* Find the next insn after INSN that really does something. This routine
3192 does not look inside SEQUENCEs. Until reload has completed, this is the
3193 same as next_real_insn. */
3196 active_insn_p (insn
)
3199 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
3200 || (GET_CODE (insn
) == INSN
3201 && (! reload_completed
3202 || (GET_CODE (PATTERN (insn
)) != USE
3203 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3207 next_active_insn (insn
)
3212 insn
= NEXT_INSN (insn
);
3213 if (insn
== 0 || active_insn_p (insn
))
3220 /* Find the last insn before INSN that really does something. This routine
3221 does not look inside SEQUENCEs. Until reload has completed, this is the
3222 same as prev_real_insn. */
3225 prev_active_insn (insn
)
3230 insn
= PREV_INSN (insn
);
3231 if (insn
== 0 || active_insn_p (insn
))
3238 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3246 insn
= NEXT_INSN (insn
);
3247 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3254 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3262 insn
= PREV_INSN (insn
);
3263 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3271 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3272 and REG_CC_USER notes so we can find it. */
3275 link_cc0_insns (insn
)
3278 rtx user
= next_nonnote_insn (insn
);
3280 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3281 user
= XVECEXP (PATTERN (user
), 0, 0);
3283 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3285 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3288 /* Return the next insn that uses CC0 after INSN, which is assumed to
3289 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3290 applied to the result of this function should yield INSN).
3292 Normally, this is simply the next insn. However, if a REG_CC_USER note
3293 is present, it contains the insn that uses CC0.
3295 Return 0 if we can't find the insn. */
3298 next_cc0_user (insn
)
3301 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3304 return XEXP (note
, 0);
3306 insn
= next_nonnote_insn (insn
);
3307 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3308 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3310 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3316 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3317 note, it is the previous insn. */
3320 prev_cc0_setter (insn
)
3323 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3326 return XEXP (note
, 0);
3328 insn
= prev_nonnote_insn (insn
);
3329 if (! sets_cc0_p (PATTERN (insn
)))
3336 /* Increment the label uses for all labels present in rtx. */
3339 mark_label_nuses (x
)
3346 code
= GET_CODE (x
);
3347 if (code
== LABEL_REF
)
3348 LABEL_NUSES (XEXP (x
, 0))++;
3350 fmt
= GET_RTX_FORMAT (code
);
3351 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3354 mark_label_nuses (XEXP (x
, i
));
3355 else if (fmt
[i
] == 'E')
3356 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3357 mark_label_nuses (XVECEXP (x
, i
, j
));
3362 /* Try splitting insns that can be split for better scheduling.
3363 PAT is the pattern which might split.
3364 TRIAL is the insn providing PAT.
3365 LAST is nonzero if we should return the last insn of the sequence produced.
3367 If this routine succeeds in splitting, it returns the first or last
3368 replacement insn depending on the value of LAST. Otherwise, it
3369 returns TRIAL. If the insn to be returned can be split, it will be. */
3372 try_split (pat
, trial
, last
)
3376 rtx before
= PREV_INSN (trial
);
3377 rtx after
= NEXT_INSN (trial
);
3378 int has_barrier
= 0;
3382 rtx insn_last
, insn
;
3385 if (any_condjump_p (trial
)
3386 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3387 split_branch_probability
= INTVAL (XEXP (note
, 0));
3388 probability
= split_branch_probability
;
3390 seq
= split_insns (pat
, trial
);
3392 split_branch_probability
= -1;
3394 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3395 We may need to handle this specially. */
3396 if (after
&& GET_CODE (after
) == BARRIER
)
3399 after
= NEXT_INSN (after
);
3405 /* Avoid infinite loop if any insn of the result matches
3406 the original pattern. */
3410 if (INSN_P (insn_last
)
3411 && rtx_equal_p (PATTERN (insn_last
), pat
))
3413 if (!NEXT_INSN (insn_last
))
3415 insn_last
= NEXT_INSN (insn_last
);
3419 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3421 if (GET_CODE (insn
) == JUMP_INSN
)
3423 mark_jump_label (PATTERN (insn
), insn
, 0);
3425 if (probability
!= -1
3426 && any_condjump_p (insn
)
3427 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3429 /* We can preserve the REG_BR_PROB notes only if exactly
3430 one jump is created, otherwise the machine description
3431 is responsible for this step using
3432 split_branch_probability variable. */
3436 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3437 GEN_INT (probability
),
3443 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3444 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3445 if (GET_CODE (trial
) == CALL_INSN
)
3447 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3448 if (GET_CODE (insn
) == CALL_INSN
)
3450 CALL_INSN_FUNCTION_USAGE (insn
)
3451 = CALL_INSN_FUNCTION_USAGE (trial
);
3452 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3456 /* Copy notes, particularly those related to the CFG. */
3457 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3459 switch (REG_NOTE_KIND (note
))
3463 while (insn
!= NULL_RTX
)
3465 if (GET_CODE (insn
) == CALL_INSN
3466 || (flag_non_call_exceptions
3467 && may_trap_p (PATTERN (insn
))))
3469 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3472 insn
= PREV_INSN (insn
);
3478 case REG_ALWAYS_RETURN
:
3480 while (insn
!= NULL_RTX
)
3482 if (GET_CODE (insn
) == CALL_INSN
)
3484 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3487 insn
= PREV_INSN (insn
);
3491 case REG_NON_LOCAL_GOTO
:
3493 while (insn
!= NULL_RTX
)
3495 if (GET_CODE (insn
) == JUMP_INSN
)
3497 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3500 insn
= PREV_INSN (insn
);
3509 /* If there are LABELS inside the split insns increment the
3510 usage count so we don't delete the label. */
3511 if (GET_CODE (trial
) == INSN
)
3514 while (insn
!= NULL_RTX
)
3516 if (GET_CODE (insn
) == INSN
)
3517 mark_label_nuses (PATTERN (insn
));
3519 insn
= PREV_INSN (insn
);
3523 tem
= emit_insn_after_scope (seq
, trial
, INSN_SCOPE (trial
));
3525 delete_insn (trial
);
3527 emit_barrier_after (tem
);
3529 /* Recursively call try_split for each new insn created; by the
3530 time control returns here that insn will be fully split, so
3531 set LAST and continue from the insn after the one returned.
3532 We can't use next_active_insn here since AFTER may be a note.
3533 Ignore deleted insns, which can be occur if not optimizing. */
3534 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3535 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3536 tem
= try_split (PATTERN (tem
), tem
, 1);
3538 /* Return either the first or the last insn, depending on which was
3541 ? (after
? PREV_INSN (after
) : last_insn
)
3542 : NEXT_INSN (before
);
3545 /* Make and return an INSN rtx, initializing all its slots.
3546 Store PATTERN in the pattern slots. */
3549 make_insn_raw (pattern
)
3554 insn
= rtx_alloc (INSN
);
3556 INSN_UID (insn
) = cur_insn_uid
++;
3557 PATTERN (insn
) = pattern
;
3558 INSN_CODE (insn
) = -1;
3559 LOG_LINKS (insn
) = NULL
;
3560 REG_NOTES (insn
) = NULL
;
3561 INSN_SCOPE (insn
) = NULL
;
3562 BLOCK_FOR_INSN (insn
) = NULL
;
3564 #ifdef ENABLE_RTL_CHECKING
3567 && (returnjump_p (insn
)
3568 || (GET_CODE (insn
) == SET
3569 && SET_DEST (insn
) == pc_rtx
)))
3571 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3579 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3582 make_jump_insn_raw (pattern
)
3587 insn
= rtx_alloc (JUMP_INSN
);
3588 INSN_UID (insn
) = cur_insn_uid
++;
3590 PATTERN (insn
) = pattern
;
3591 INSN_CODE (insn
) = -1;
3592 LOG_LINKS (insn
) = NULL
;
3593 REG_NOTES (insn
) = NULL
;
3594 JUMP_LABEL (insn
) = NULL
;
3595 INSN_SCOPE (insn
) = NULL
;
3596 BLOCK_FOR_INSN (insn
) = NULL
;
3601 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3604 make_call_insn_raw (pattern
)
3609 insn
= rtx_alloc (CALL_INSN
);
3610 INSN_UID (insn
) = cur_insn_uid
++;
3612 PATTERN (insn
) = pattern
;
3613 INSN_CODE (insn
) = -1;
3614 LOG_LINKS (insn
) = NULL
;
3615 REG_NOTES (insn
) = NULL
;
3616 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3617 INSN_SCOPE (insn
) = NULL
;
3618 BLOCK_FOR_INSN (insn
) = NULL
;
3623 /* Add INSN to the end of the doubly-linked list.
3624 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3630 PREV_INSN (insn
) = last_insn
;
3631 NEXT_INSN (insn
) = 0;
3633 if (NULL
!= last_insn
)
3634 NEXT_INSN (last_insn
) = insn
;
3636 if (NULL
== first_insn
)
3642 /* Add INSN into the doubly-linked list after insn AFTER. This and
3643 the next should be the only functions called to insert an insn once
3644 delay slots have been filled since only they know how to update a
3648 add_insn_after (insn
, after
)
3651 rtx next
= NEXT_INSN (after
);
3654 if (optimize
&& INSN_DELETED_P (after
))
3657 NEXT_INSN (insn
) = next
;
3658 PREV_INSN (insn
) = after
;
3662 PREV_INSN (next
) = insn
;
3663 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3664 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3666 else if (last_insn
== after
)
3670 struct sequence_stack
*stack
= seq_stack
;
3671 /* Scan all pending sequences too. */
3672 for (; stack
; stack
= stack
->next
)
3673 if (after
== stack
->last
)
3683 if (GET_CODE (after
) != BARRIER
3684 && GET_CODE (insn
) != BARRIER
3685 && (bb
= BLOCK_FOR_INSN (after
)))
3687 set_block_for_insn (insn
, bb
);
3689 bb
->flags
|= BB_DIRTY
;
3690 /* Should not happen as first in the BB is always
3691 either NOTE or LABEL. */
3692 if (bb
->end
== after
3693 /* Avoid clobbering of structure when creating new BB. */
3694 && GET_CODE (insn
) != BARRIER
3695 && (GET_CODE (insn
) != NOTE
3696 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3700 NEXT_INSN (after
) = insn
;
3701 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3703 rtx sequence
= PATTERN (after
);
3704 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3708 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3709 the previous should be the only functions called to insert an insn once
3710 delay slots have been filled since only they know how to update a
3714 add_insn_before (insn
, before
)
3717 rtx prev
= PREV_INSN (before
);
3720 if (optimize
&& INSN_DELETED_P (before
))
3723 PREV_INSN (insn
) = prev
;
3724 NEXT_INSN (insn
) = before
;
3728 NEXT_INSN (prev
) = insn
;
3729 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3731 rtx sequence
= PATTERN (prev
);
3732 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3735 else if (first_insn
== before
)
3739 struct sequence_stack
*stack
= seq_stack
;
3740 /* Scan all pending sequences too. */
3741 for (; stack
; stack
= stack
->next
)
3742 if (before
== stack
->first
)
3744 stack
->first
= insn
;
3752 if (GET_CODE (before
) != BARRIER
3753 && GET_CODE (insn
) != BARRIER
3754 && (bb
= BLOCK_FOR_INSN (before
)))
3756 set_block_for_insn (insn
, bb
);
3758 bb
->flags
|= BB_DIRTY
;
3759 /* Should not happen as first in the BB is always
3760 either NOTE or LABEl. */
3761 if (bb
->head
== insn
3762 /* Avoid clobbering of structure when creating new BB. */
3763 && GET_CODE (insn
) != BARRIER
3764 && (GET_CODE (insn
) != NOTE
3765 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3769 PREV_INSN (before
) = insn
;
3770 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3771 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3774 /* Remove an insn from its doubly-linked list. This function knows how
3775 to handle sequences. */
3780 rtx next
= NEXT_INSN (insn
);
3781 rtx prev
= PREV_INSN (insn
);
3786 NEXT_INSN (prev
) = next
;
3787 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3789 rtx sequence
= PATTERN (prev
);
3790 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3793 else if (first_insn
== insn
)
3797 struct sequence_stack
*stack
= seq_stack
;
3798 /* Scan all pending sequences too. */
3799 for (; stack
; stack
= stack
->next
)
3800 if (insn
== stack
->first
)
3802 stack
->first
= next
;
3812 PREV_INSN (next
) = prev
;
3813 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3814 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3816 else if (last_insn
== insn
)
3820 struct sequence_stack
*stack
= seq_stack
;
3821 /* Scan all pending sequences too. */
3822 for (; stack
; stack
= stack
->next
)
3823 if (insn
== stack
->last
)
3832 if (GET_CODE (insn
) != BARRIER
3833 && (bb
= BLOCK_FOR_INSN (insn
)))
3836 bb
->flags
|= BB_DIRTY
;
3837 if (bb
->head
== insn
)
3839 /* Never ever delete the basic block note without deleting whole
3841 if (GET_CODE (insn
) == NOTE
)
3845 if (bb
->end
== insn
)
3850 /* Delete all insns made since FROM.
3851 FROM becomes the new last instruction. */
3854 delete_insns_since (from
)
3860 NEXT_INSN (from
) = 0;
3864 /* This function is deprecated, please use sequences instead.
3866 Move a consecutive bunch of insns to a different place in the chain.
3867 The insns to be moved are those between FROM and TO.
3868 They are moved to a new position after the insn AFTER.
3869 AFTER must not be FROM or TO or any insn in between.
3871 This function does not know about SEQUENCEs and hence should not be
3872 called after delay-slot filling has been done. */
3875 reorder_insns_nobb (from
, to
, after
)
3876 rtx from
, to
, after
;
3878 /* Splice this bunch out of where it is now. */
3879 if (PREV_INSN (from
))
3880 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3882 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3883 if (last_insn
== to
)
3884 last_insn
= PREV_INSN (from
);
3885 if (first_insn
== from
)
3886 first_insn
= NEXT_INSN (to
);
3888 /* Make the new neighbors point to it and it to them. */
3889 if (NEXT_INSN (after
))
3890 PREV_INSN (NEXT_INSN (after
)) = to
;
3892 NEXT_INSN (to
) = NEXT_INSN (after
);
3893 PREV_INSN (from
) = after
;
3894 NEXT_INSN (after
) = from
;
3895 if (after
== last_insn
)
3899 /* Same as function above, but take care to update BB boundaries. */
3901 reorder_insns (from
, to
, after
)
3902 rtx from
, to
, after
;
3904 rtx prev
= PREV_INSN (from
);
3905 basic_block bb
, bb2
;
3907 reorder_insns_nobb (from
, to
, after
);
3909 if (GET_CODE (after
) != BARRIER
3910 && (bb
= BLOCK_FOR_INSN (after
)))
3913 bb
->flags
|= BB_DIRTY
;
3915 if (GET_CODE (from
) != BARRIER
3916 && (bb2
= BLOCK_FOR_INSN (from
)))
3920 bb2
->flags
|= BB_DIRTY
;
3923 if (bb
->end
== after
)
3926 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3927 set_block_for_insn (x
, bb
);
3931 /* Return the line note insn preceding INSN. */
3934 find_line_note (insn
)
3937 if (no_line_numbers
)
3940 for (; insn
; insn
= PREV_INSN (insn
))
3941 if (GET_CODE (insn
) == NOTE
3942 && NOTE_LINE_NUMBER (insn
) >= 0)
3948 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3949 of the moved insns when debugging. This may insert a note between AFTER
3950 and FROM, and another one after TO. */
3953 reorder_insns_with_line_notes (from
, to
, after
)
3954 rtx from
, to
, after
;
3956 rtx from_line
= find_line_note (from
);
3957 rtx after_line
= find_line_note (after
);
3959 reorder_insns (from
, to
, after
);
3961 if (from_line
== after_line
)
3965 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3966 NOTE_LINE_NUMBER (from_line
),
3969 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3970 NOTE_LINE_NUMBER (after_line
),
3974 /* Remove unnecessary notes from the instruction stream. */
3977 remove_unnecessary_notes ()
3979 rtx block_stack
= NULL_RTX
;
3980 rtx eh_stack
= NULL_RTX
;
3985 /* We must not remove the first instruction in the function because
3986 the compiler depends on the first instruction being a note. */
3987 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3989 /* Remember what's next. */
3990 next
= NEXT_INSN (insn
);
3992 /* We're only interested in notes. */
3993 if (GET_CODE (insn
) != NOTE
)
3996 switch (NOTE_LINE_NUMBER (insn
))
3998 case NOTE_INSN_DELETED
:
3999 case NOTE_INSN_LOOP_END_TOP_COND
:
4003 case NOTE_INSN_EH_REGION_BEG
:
4004 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
4007 case NOTE_INSN_EH_REGION_END
:
4008 /* Too many end notes. */
4009 if (eh_stack
== NULL_RTX
)
4011 /* Mismatched nesting. */
4012 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
4015 eh_stack
= XEXP (eh_stack
, 1);
4016 free_INSN_LIST_node (tmp
);
4019 case NOTE_INSN_BLOCK_BEG
:
4020 /* By now, all notes indicating lexical blocks should have
4021 NOTE_BLOCK filled in. */
4022 if (NOTE_BLOCK (insn
) == NULL_TREE
)
4024 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
4027 case NOTE_INSN_BLOCK_END
:
4028 /* Too many end notes. */
4029 if (block_stack
== NULL_RTX
)
4031 /* Mismatched nesting. */
4032 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
4035 block_stack
= XEXP (block_stack
, 1);
4036 free_INSN_LIST_node (tmp
);
4038 /* Scan back to see if there are any non-note instructions
4039 between INSN and the beginning of this block. If not,
4040 then there is no PC range in the generated code that will
4041 actually be in this block, so there's no point in
4042 remembering the existence of the block. */
4043 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
4045 /* This block contains a real instruction. Note that we
4046 don't include labels; if the only thing in the block
4047 is a label, then there are still no PC values that
4048 lie within the block. */
4052 /* We're only interested in NOTEs. */
4053 if (GET_CODE (tmp
) != NOTE
)
4056 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
4058 /* We just verified that this BLOCK matches us with
4059 the block_stack check above. Never delete the
4060 BLOCK for the outermost scope of the function; we
4061 can refer to names from that scope even if the
4062 block notes are messed up. */
4063 if (! is_body_block (NOTE_BLOCK (insn
))
4064 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
4071 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
4072 /* There's a nested block. We need to leave the
4073 current block in place since otherwise the debugger
4074 wouldn't be able to show symbols from our block in
4075 the nested block. */
4081 /* Too many begin notes. */
4082 if (block_stack
|| eh_stack
)
4087 /* Emit insn(s) of given code and pattern
4088 at a specified place within the doubly-linked list.
4090 All of the emit_foo global entry points accept an object
4091 X which is either an insn list or a PATTERN of a single
4094 There are thus a few canonical ways to generate code and
4095 emit it at a specific place in the instruction stream. For
4096 example, consider the instruction named SPOT and the fact that
4097 we would like to emit some instructions before SPOT. We might
4101 ... emit the new instructions ...
4102 insns_head = get_insns ();
4105 emit_insn_before (insns_head, SPOT);
4107 It used to be common to generate SEQUENCE rtl instead, but that
4108 is a relic of the past which no longer occurs. The reason is that
4109 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4110 generated would almost certainly die right after it was created. */
4112 /* Make X be output before the instruction BEFORE. */
4115 emit_insn_before (x
, before
)
4121 #ifdef ENABLE_RTL_CHECKING
4122 if (before
== NULL_RTX
)
4129 switch (GET_CODE (x
))
4140 rtx next
= NEXT_INSN (insn
);
4141 add_insn_before (insn
, before
);
4147 #ifdef ENABLE_RTL_CHECKING
4154 last
= make_insn_raw (x
);
4155 add_insn_before (last
, before
);
4162 /* Make an instruction with body X and code JUMP_INSN
4163 and output it before the instruction BEFORE. */
4166 emit_jump_insn_before (x
, before
)
4169 rtx insn
, last
= NULL_RTX
;
4171 #ifdef ENABLE_RTL_CHECKING
4172 if (before
== NULL_RTX
)
4176 switch (GET_CODE (x
))
4187 rtx next
= NEXT_INSN (insn
);
4188 add_insn_before (insn
, before
);
4194 #ifdef ENABLE_RTL_CHECKING
4201 last
= make_jump_insn_raw (x
);
4202 add_insn_before (last
, before
);
4209 /* Make an instruction with body X and code CALL_INSN
4210 and output it before the instruction BEFORE. */
4213 emit_call_insn_before (x
, before
)
4216 rtx last
= NULL_RTX
, insn
;
4218 #ifdef ENABLE_RTL_CHECKING
4219 if (before
== NULL_RTX
)
4223 switch (GET_CODE (x
))
4234 rtx next
= NEXT_INSN (insn
);
4235 add_insn_before (insn
, before
);
4241 #ifdef ENABLE_RTL_CHECKING
4248 last
= make_call_insn_raw (x
);
4249 add_insn_before (last
, before
);
4256 /* Make an insn of code BARRIER
4257 and output it before the insn BEFORE. */
4260 emit_barrier_before (before
)
4263 rtx insn
= rtx_alloc (BARRIER
);
4265 INSN_UID (insn
) = cur_insn_uid
++;
4267 add_insn_before (insn
, before
);
4271 /* Emit the label LABEL before the insn BEFORE. */
4274 emit_label_before (label
, before
)
4277 /* This can be called twice for the same label as a result of the
4278 confusion that follows a syntax error! So make it harmless. */
4279 if (INSN_UID (label
) == 0)
4281 INSN_UID (label
) = cur_insn_uid
++;
4282 add_insn_before (label
, before
);
4288 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4291 emit_note_before (subtype
, before
)
4295 rtx note
= rtx_alloc (NOTE
);
4296 INSN_UID (note
) = cur_insn_uid
++;
4297 NOTE_SOURCE_FILE (note
) = 0;
4298 NOTE_LINE_NUMBER (note
) = subtype
;
4299 BLOCK_FOR_INSN (note
) = NULL
;
4301 add_insn_before (note
, before
);
4305 /* Helper for emit_insn_after, handles lists of instructions
4308 static rtx emit_insn_after_1
PARAMS ((rtx
, rtx
));
4311 emit_insn_after_1 (first
, after
)
4318 if (GET_CODE (after
) != BARRIER
4319 && (bb
= BLOCK_FOR_INSN (after
)))
4321 bb
->flags
|= BB_DIRTY
;
4322 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4323 if (GET_CODE (last
) != BARRIER
)
4324 set_block_for_insn (last
, bb
);
4325 if (GET_CODE (last
) != BARRIER
)
4326 set_block_for_insn (last
, bb
);
4327 if (bb
->end
== after
)
4331 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4334 after_after
= NEXT_INSN (after
);
4336 NEXT_INSN (after
) = first
;
4337 PREV_INSN (first
) = after
;
4338 NEXT_INSN (last
) = after_after
;
4340 PREV_INSN (after_after
) = last
;
4342 if (after
== last_insn
)
4347 /* Make X be output after the insn AFTER. */
4350 emit_insn_after (x
, after
)
4355 #ifdef ENABLE_RTL_CHECKING
4356 if (after
== NULL_RTX
)
4363 switch (GET_CODE (x
))
4371 last
= emit_insn_after_1 (x
, after
);
4374 #ifdef ENABLE_RTL_CHECKING
4381 last
= make_insn_raw (x
);
4382 add_insn_after (last
, after
);
4389 /* Similar to emit_insn_after, except that line notes are to be inserted so
4390 as to act as if this insn were at FROM. */
4393 emit_insn_after_with_line_notes (x
, after
, from
)
4396 rtx from_line
= find_line_note (from
);
4397 rtx after_line
= find_line_note (after
);
4398 rtx insn
= emit_insn_after (x
, after
);
4401 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
4402 NOTE_LINE_NUMBER (from_line
),
4406 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
4407 NOTE_LINE_NUMBER (after_line
),
4411 /* Make an insn of code JUMP_INSN with body X
4412 and output it after the insn AFTER. */
4415 emit_jump_insn_after (x
, after
)
4420 #ifdef ENABLE_RTL_CHECKING
4421 if (after
== NULL_RTX
)
4425 switch (GET_CODE (x
))
4433 last
= emit_insn_after_1 (x
, after
);
4436 #ifdef ENABLE_RTL_CHECKING
4443 last
= make_jump_insn_raw (x
);
4444 add_insn_after (last
, after
);
4451 /* Make an instruction with body X and code CALL_INSN
4452 and output it after the instruction AFTER. */
4455 emit_call_insn_after (x
, after
)
4460 #ifdef ENABLE_RTL_CHECKING
4461 if (after
== NULL_RTX
)
4465 switch (GET_CODE (x
))
4473 last
= emit_insn_after_1 (x
, after
);
4476 #ifdef ENABLE_RTL_CHECKING
4483 last
= make_call_insn_raw (x
);
4484 add_insn_after (last
, after
);
4491 /* Make an insn of code BARRIER
4492 and output it after the insn AFTER. */
4495 emit_barrier_after (after
)
4498 rtx insn
= rtx_alloc (BARRIER
);
4500 INSN_UID (insn
) = cur_insn_uid
++;
4502 add_insn_after (insn
, after
);
4506 /* Emit the label LABEL after the insn AFTER. */
4509 emit_label_after (label
, after
)
4512 /* This can be called twice for the same label
4513 as a result of the confusion that follows a syntax error!
4514 So make it harmless. */
4515 if (INSN_UID (label
) == 0)
4517 INSN_UID (label
) = cur_insn_uid
++;
4518 add_insn_after (label
, after
);
4524 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4527 emit_note_after (subtype
, after
)
4531 rtx note
= rtx_alloc (NOTE
);
4532 INSN_UID (note
) = cur_insn_uid
++;
4533 NOTE_SOURCE_FILE (note
) = 0;
4534 NOTE_LINE_NUMBER (note
) = subtype
;
4535 BLOCK_FOR_INSN (note
) = NULL
;
4536 add_insn_after (note
, after
);
4540 /* Emit a line note for FILE and LINE after the insn AFTER. */
4543 emit_line_note_after (file
, line
, after
)
4550 if (no_line_numbers
&& line
> 0)
4556 note
= rtx_alloc (NOTE
);
4557 INSN_UID (note
) = cur_insn_uid
++;
4558 NOTE_SOURCE_FILE (note
) = file
;
4559 NOTE_LINE_NUMBER (note
) = line
;
4560 BLOCK_FOR_INSN (note
) = NULL
;
4561 add_insn_after (note
, after
);
4565 /* Like emit_insn_after, but set INSN_SCOPE according to SCOPE. */
4567 emit_insn_after_scope (pattern
, after
, scope
)
4571 rtx last
= emit_insn_after (pattern
, after
);
4573 after
= NEXT_INSN (after
);
4576 if (active_insn_p (after
))
4577 INSN_SCOPE (after
) = scope
;
4580 after
= NEXT_INSN (after
);
4585 /* Like emit_jump_insn_after, but set INSN_SCOPE according to SCOPE. */
4587 emit_jump_insn_after_scope (pattern
, after
, scope
)
4591 rtx last
= emit_jump_insn_after (pattern
, after
);
4593 after
= NEXT_INSN (after
);
4596 if (active_insn_p (after
))
4597 INSN_SCOPE (after
) = scope
;
4600 after
= NEXT_INSN (after
);
4605 /* Like emit_call_insn_after, but set INSN_SCOPE according to SCOPE. */
4607 emit_call_insn_after_scope (pattern
, after
, scope
)
4611 rtx last
= emit_call_insn_after (pattern
, after
);
4613 after
= NEXT_INSN (after
);
4616 if (active_insn_p (after
))
4617 INSN_SCOPE (after
) = scope
;
4620 after
= NEXT_INSN (after
);
4625 /* Like emit_insn_before, but set INSN_SCOPE according to SCOPE. */
4627 emit_insn_before_scope (pattern
, before
, scope
)
4628 rtx pattern
, before
;
4631 rtx first
= PREV_INSN (before
);
4632 rtx last
= emit_insn_before (pattern
, before
);
4634 first
= NEXT_INSN (first
);
4637 if (active_insn_p (first
))
4638 INSN_SCOPE (first
) = scope
;
4641 first
= NEXT_INSN (first
);
4646 /* Take X and emit it at the end of the doubly-linked
4649 Returns the last insn emitted. */
4655 rtx last
= last_insn
;
4661 switch (GET_CODE (x
))
4672 rtx next
= NEXT_INSN (insn
);
4679 #ifdef ENABLE_RTL_CHECKING
4686 last
= make_insn_raw (x
);
4694 /* Make an insn of code JUMP_INSN with pattern X
4695 and add it to the end of the doubly-linked list. */
4701 rtx last
= NULL_RTX
, insn
;
4703 switch (GET_CODE (x
))
4714 rtx next
= NEXT_INSN (insn
);
4721 #ifdef ENABLE_RTL_CHECKING
4728 last
= make_jump_insn_raw (x
);
4736 /* Make an insn of code CALL_INSN with pattern X
4737 and add it to the end of the doubly-linked list. */
4745 switch (GET_CODE (x
))
4753 insn
= emit_insn (x
);
4756 #ifdef ENABLE_RTL_CHECKING
4763 insn
= make_call_insn_raw (x
);
4771 /* Add the label LABEL to the end of the doubly-linked list. */
4777 /* This can be called twice for the same label
4778 as a result of the confusion that follows a syntax error!
4779 So make it harmless. */
4780 if (INSN_UID (label
) == 0)
4782 INSN_UID (label
) = cur_insn_uid
++;
4788 /* Make an insn of code BARRIER
4789 and add it to the end of the doubly-linked list. */
4794 rtx barrier
= rtx_alloc (BARRIER
);
4795 INSN_UID (barrier
) = cur_insn_uid
++;
4800 /* Make an insn of code NOTE
4801 with data-fields specified by FILE and LINE
4802 and add it to the end of the doubly-linked list,
4803 but only if line-numbers are desired for debugging info. */
4806 emit_line_note (file
, line
)
4810 set_file_and_line_for_stmt (file
, line
);
4813 if (no_line_numbers
)
4817 return emit_note (file
, line
);
4820 /* Make an insn of code NOTE
4821 with data-fields specified by FILE and LINE
4822 and add it to the end of the doubly-linked list.
4823 If it is a line-number NOTE, omit it if it matches the previous one. */
4826 emit_note (file
, line
)
4834 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
4835 && line
== last_linenum
)
4837 last_filename
= file
;
4838 last_linenum
= line
;
4841 if (no_line_numbers
&& line
> 0)
4847 note
= rtx_alloc (NOTE
);
4848 INSN_UID (note
) = cur_insn_uid
++;
4849 NOTE_SOURCE_FILE (note
) = file
;
4850 NOTE_LINE_NUMBER (note
) = line
;
4851 BLOCK_FOR_INSN (note
) = NULL
;
4856 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4859 emit_line_note_force (file
, line
)
4864 return emit_line_note (file
, line
);
4867 /* Cause next statement to emit a line note even if the line number
4868 has not changed. This is used at the beginning of a function. */
4871 force_next_line_note ()
4876 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4877 note of this type already exists, remove it first. */
4880 set_unique_reg_note (insn
, kind
, datum
)
4885 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4891 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4892 has multiple sets (some callers assume single_set
4893 means the insn only has one set, when in fact it
4894 means the insn only has one * useful * set). */
4895 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4902 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4903 It serves no useful purpose and breaks eliminate_regs. */
4904 if (GET_CODE (datum
) == ASM_OPERANDS
)
4914 XEXP (note
, 0) = datum
;
4918 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4919 return REG_NOTES (insn
);
4922 /* Return an indication of which type of insn should have X as a body.
4923 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4929 if (GET_CODE (x
) == CODE_LABEL
)
4931 if (GET_CODE (x
) == CALL
)
4933 if (GET_CODE (x
) == RETURN
)
4935 if (GET_CODE (x
) == SET
)
4937 if (SET_DEST (x
) == pc_rtx
)
4939 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4944 if (GET_CODE (x
) == PARALLEL
)
4947 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4948 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4950 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4951 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4953 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4954 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4960 /* Emit the rtl pattern X as an appropriate kind of insn.
4961 If X is a label, it is simply added into the insn chain. */
4967 enum rtx_code code
= classify_insn (x
);
4969 if (code
== CODE_LABEL
)
4970 return emit_label (x
);
4971 else if (code
== INSN
)
4972 return emit_insn (x
);
4973 else if (code
== JUMP_INSN
)
4975 rtx insn
= emit_jump_insn (x
);
4976 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4977 return emit_barrier ();
4980 else if (code
== CALL_INSN
)
4981 return emit_call_insn (x
);
4986 /* Space for free sequence stack entries. */
4987 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
4989 /* Begin emitting insns to a sequence which can be packaged in an
4990 RTL_EXPR. If this sequence will contain something that might cause
4991 the compiler to pop arguments to function calls (because those
4992 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4993 details), use do_pending_stack_adjust before calling this function.
4994 That will ensure that the deferred pops are not accidentally
4995 emitted in the middle of this sequence. */
5000 struct sequence_stack
*tem
;
5002 if (free_sequence_stack
!= NULL
)
5004 tem
= free_sequence_stack
;
5005 free_sequence_stack
= tem
->next
;
5008 tem
= (struct sequence_stack
*) ggc_alloc (sizeof (struct sequence_stack
));
5010 tem
->next
= seq_stack
;
5011 tem
->first
= first_insn
;
5012 tem
->last
= last_insn
;
5013 tem
->sequence_rtl_expr
= seq_rtl_expr
;
5021 /* Similarly, but indicate that this sequence will be placed in T, an
5022 RTL_EXPR. See the documentation for start_sequence for more
5023 information about how to use this function. */
5026 start_sequence_for_rtl_expr (t
)
5034 /* Set up the insn chain starting with FIRST as the current sequence,
5035 saving the previously current one. See the documentation for
5036 start_sequence for more information about how to use this function. */
5039 push_to_sequence (first
)
5046 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
5052 /* Set up the insn chain from a chain stort in FIRST to LAST. */
5055 push_to_full_sequence (first
, last
)
5061 /* We really should have the end of the insn chain here. */
5062 if (last
&& NEXT_INSN (last
))
5066 /* Set up the outer-level insn chain
5067 as the current sequence, saving the previously current one. */
5070 push_topmost_sequence ()
5072 struct sequence_stack
*stack
, *top
= NULL
;
5076 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5079 first_insn
= top
->first
;
5080 last_insn
= top
->last
;
5081 seq_rtl_expr
= top
->sequence_rtl_expr
;
5084 /* After emitting to the outer-level insn chain, update the outer-level
5085 insn chain, and restore the previous saved state. */
5088 pop_topmost_sequence ()
5090 struct sequence_stack
*stack
, *top
= NULL
;
5092 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5095 top
->first
= first_insn
;
5096 top
->last
= last_insn
;
5097 /* ??? Why don't we save seq_rtl_expr here? */
5102 /* After emitting to a sequence, restore previous saved state.
5104 To get the contents of the sequence just made, you must call
5105 `get_insns' *before* calling here.
5107 If the compiler might have deferred popping arguments while
5108 generating this sequence, and this sequence will not be immediately
5109 inserted into the instruction stream, use do_pending_stack_adjust
5110 before calling get_insns. That will ensure that the deferred
5111 pops are inserted into this sequence, and not into some random
5112 location in the instruction stream. See INHIBIT_DEFER_POP for more
5113 information about deferred popping of arguments. */
5118 struct sequence_stack
*tem
= seq_stack
;
5120 first_insn
= tem
->first
;
5121 last_insn
= tem
->last
;
5122 seq_rtl_expr
= tem
->sequence_rtl_expr
;
5123 seq_stack
= tem
->next
;
5125 memset (tem
, 0, sizeof (*tem
));
5126 tem
->next
= free_sequence_stack
;
5127 free_sequence_stack
= tem
;
5130 /* This works like end_sequence, but records the old sequence in FIRST
5134 end_full_sequence (first
, last
)
5137 *first
= first_insn
;
5142 /* Return 1 if currently emitting into a sequence. */
5147 return seq_stack
!= 0;
5150 /* Put the various virtual registers into REGNO_REG_RTX. */
5153 init_virtual_regs (es
)
5154 struct emit_status
*es
;
5156 rtx
*ptr
= es
->x_regno_reg_rtx
;
5157 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5158 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5159 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5160 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5161 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5165 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5166 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5167 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5168 static int copy_insn_n_scratches
;
5170 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5171 copied an ASM_OPERANDS.
5172 In that case, it is the original input-operand vector. */
5173 static rtvec orig_asm_operands_vector
;
5175 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5176 copied an ASM_OPERANDS.
5177 In that case, it is the copied input-operand vector. */
5178 static rtvec copy_asm_operands_vector
;
5180 /* Likewise for the constraints vector. */
5181 static rtvec orig_asm_constraints_vector
;
5182 static rtvec copy_asm_constraints_vector
;
5184 /* Recursively create a new copy of an rtx for copy_insn.
5185 This function differs from copy_rtx in that it handles SCRATCHes and
5186 ASM_OPERANDs properly.
5187 Normally, this function is not used directly; use copy_insn as front end.
5188 However, you could first copy an insn pattern with copy_insn and then use
5189 this function afterwards to properly copy any REG_NOTEs containing
5199 const char *format_ptr
;
5201 code
= GET_CODE (orig
);
5218 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5219 if (copy_insn_scratch_in
[i
] == orig
)
5220 return copy_insn_scratch_out
[i
];
5224 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5225 a LABEL_REF, it isn't sharable. */
5226 if (GET_CODE (XEXP (orig
, 0)) == PLUS
5227 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
5228 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
5232 /* A MEM with a constant address is not sharable. The problem is that
5233 the constant address may need to be reloaded. If the mem is shared,
5234 then reloading one copy of this mem will cause all copies to appear
5235 to have been reloaded. */
5241 copy
= rtx_alloc (code
);
5243 /* Copy the various flags, and other information. We assume that
5244 all fields need copying, and then clear the fields that should
5245 not be copied. That is the sensible default behavior, and forces
5246 us to explicitly document why we are *not* copying a flag. */
5247 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
5249 /* We do not copy the USED flag, which is used as a mark bit during
5250 walks over the RTL. */
5251 RTX_FLAG (copy
, used
) = 0;
5253 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5254 if (GET_RTX_CLASS (code
) == 'i')
5256 RTX_FLAG (copy
, jump
) = 0;
5257 RTX_FLAG (copy
, call
) = 0;
5258 RTX_FLAG (copy
, frame_related
) = 0;
5261 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5263 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5265 copy
->fld
[i
] = orig
->fld
[i
];
5266 switch (*format_ptr
++)
5269 if (XEXP (orig
, i
) != NULL
)
5270 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5275 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5276 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5277 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5278 XVEC (copy
, i
) = copy_asm_operands_vector
;
5279 else if (XVEC (orig
, i
) != NULL
)
5281 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5282 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5283 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5294 /* These are left unchanged. */
5302 if (code
== SCRATCH
)
5304 i
= copy_insn_n_scratches
++;
5305 if (i
>= MAX_RECOG_OPERANDS
)
5307 copy_insn_scratch_in
[i
] = orig
;
5308 copy_insn_scratch_out
[i
] = copy
;
5310 else if (code
== ASM_OPERANDS
)
5312 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5313 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5314 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5315 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5321 /* Create a new copy of an rtx.
5322 This function differs from copy_rtx in that it handles SCRATCHes and
5323 ASM_OPERANDs properly.
5324 INSN doesn't really have to be a full INSN; it could be just the
5330 copy_insn_n_scratches
= 0;
5331 orig_asm_operands_vector
= 0;
5332 orig_asm_constraints_vector
= 0;
5333 copy_asm_operands_vector
= 0;
5334 copy_asm_constraints_vector
= 0;
5335 return copy_insn_1 (insn
);
5338 /* Initialize data structures and variables in this file
5339 before generating rtl for each function. */
5344 struct function
*f
= cfun
;
5346 f
->emit
= (struct emit_status
*) ggc_alloc (sizeof (struct emit_status
));
5349 seq_rtl_expr
= NULL
;
5351 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5354 first_label_num
= label_num
;
5358 /* Init the tables that describe all the pseudo regs. */
5360 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5362 f
->emit
->regno_pointer_align
5363 = (unsigned char *) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5364 * sizeof (unsigned char));
5367 = (rtx
*) ggc_alloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
));
5369 /* Put copies of all the hard registers into regno_reg_rtx. */
5370 memcpy (regno_reg_rtx
,
5371 static_regno_reg_rtx
,
5372 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5374 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5375 init_virtual_regs (f
->emit
);
5377 /* Indicate that the virtual registers and stack locations are
5379 REG_POINTER (stack_pointer_rtx
) = 1;
5380 REG_POINTER (frame_pointer_rtx
) = 1;
5381 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5382 REG_POINTER (arg_pointer_rtx
) = 1;
5384 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5385 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5386 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5387 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5388 REG_POINTER (virtual_cfa_rtx
) = 1;
5390 #ifdef STACK_BOUNDARY
5391 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5392 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5393 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5394 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5396 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5397 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5398 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5399 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5400 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5403 #ifdef INIT_EXPANDERS
5408 /* Generate the constant 0. */
5411 gen_const_vector_0 (mode
)
5412 enum machine_mode mode
;
5417 enum machine_mode inner
;
5419 units
= GET_MODE_NUNITS (mode
);
5420 inner
= GET_MODE_INNER (mode
);
5422 v
= rtvec_alloc (units
);
5424 /* We need to call this function after we to set CONST0_RTX first. */
5425 if (!CONST0_RTX (inner
))
5428 for (i
= 0; i
< units
; ++i
)
5429 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5431 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5435 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5436 all elements are zero. */
5438 gen_rtx_CONST_VECTOR (mode
, v
)
5439 enum machine_mode mode
;
5442 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5445 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5446 if (RTVEC_ELT (v
, i
) != inner_zero
)
5447 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5448 return CONST0_RTX (mode
);
5451 /* Create some permanent unique rtl objects shared between all functions.
5452 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5455 init_emit_once (line_numbers
)
5459 enum machine_mode mode
;
5460 enum machine_mode double_mode
;
5462 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5464 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5465 const_int_htab_eq
, NULL
);
5467 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5468 const_double_htab_eq
, NULL
);
5470 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5471 mem_attrs_htab_eq
, NULL
);
5472 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5473 reg_attrs_htab_eq
, NULL
);
5475 no_line_numbers
= ! line_numbers
;
5477 /* Compute the word and byte modes. */
5479 byte_mode
= VOIDmode
;
5480 word_mode
= VOIDmode
;
5481 double_mode
= VOIDmode
;
5483 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5484 mode
= GET_MODE_WIDER_MODE (mode
))
5486 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5487 && byte_mode
== VOIDmode
)
5490 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5491 && word_mode
== VOIDmode
)
5495 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5496 mode
= GET_MODE_WIDER_MODE (mode
))
5498 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5499 && double_mode
== VOIDmode
)
5503 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5505 /* Assign register numbers to the globally defined register rtx.
5506 This must be done at runtime because the register number field
5507 is in a union and some compilers can't initialize unions. */
5509 pc_rtx
= gen_rtx (PC
, VOIDmode
);
5510 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
5511 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5512 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5513 if (hard_frame_pointer_rtx
== 0)
5514 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5515 HARD_FRAME_POINTER_REGNUM
);
5516 if (arg_pointer_rtx
== 0)
5517 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5518 virtual_incoming_args_rtx
=
5519 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5520 virtual_stack_vars_rtx
=
5521 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5522 virtual_stack_dynamic_rtx
=
5523 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5524 virtual_outgoing_args_rtx
=
5525 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5526 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5528 /* Initialize RTL for commonly used hard registers. These are
5529 copied into regno_reg_rtx as we begin to compile each function. */
5530 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5531 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5533 #ifdef INIT_EXPANDERS
5534 /* This is to initialize {init|mark|free}_machine_status before the first
5535 call to push_function_context_to. This is needed by the Chill front
5536 end which calls push_function_context_to before the first call to
5537 init_function_start. */
5541 /* Create the unique rtx's for certain rtx codes and operand values. */
5543 /* Don't use gen_rtx here since gen_rtx in this case
5544 tries to use these variables. */
5545 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5546 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5547 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5549 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5550 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5551 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5553 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5555 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5556 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5557 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5558 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5559 REAL_VALUE_FROM_INT (dconstm2
, -2, -1, double_mode
);
5561 dconsthalf
= dconst1
;
5564 for (i
= 0; i
<= 2; i
++)
5566 REAL_VALUE_TYPE
*r
=
5567 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5569 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5570 mode
= GET_MODE_WIDER_MODE (mode
))
5571 const_tiny_rtx
[i
][(int) mode
] =
5572 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5574 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5576 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5577 mode
= GET_MODE_WIDER_MODE (mode
))
5578 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5580 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5582 mode
= GET_MODE_WIDER_MODE (mode
))
5583 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5586 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5588 mode
= GET_MODE_WIDER_MODE (mode
))
5589 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5591 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5593 mode
= GET_MODE_WIDER_MODE (mode
))
5594 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5596 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5597 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5598 const_tiny_rtx
[0][i
] = const0_rtx
;
5600 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5601 if (STORE_FLAG_VALUE
== 1)
5602 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5604 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5605 return_address_pointer_rtx
5606 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5610 struct_value_rtx
= STRUCT_VALUE
;
5612 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
5615 #ifdef STRUCT_VALUE_INCOMING
5616 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
5618 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5619 struct_value_incoming_rtx
5620 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
5622 struct_value_incoming_rtx
= struct_value_rtx
;
5626 #ifdef STATIC_CHAIN_REGNUM
5627 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5629 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5630 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5631 static_chain_incoming_rtx
5632 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5635 static_chain_incoming_rtx
= static_chain_rtx
;
5639 static_chain_rtx
= STATIC_CHAIN
;
5641 #ifdef STATIC_CHAIN_INCOMING
5642 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5644 static_chain_incoming_rtx
= static_chain_rtx
;
5648 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5649 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5652 /* Query and clear/ restore no_line_numbers. This is used by the
5653 switch / case handling in stmt.c to give proper line numbers in
5654 warnings about unreachable code. */
5657 force_line_numbers ()
5659 int old
= no_line_numbers
;
5661 no_line_numbers
= 0;
5663 force_next_line_note ();
5668 restore_line_number_status (old_value
)
5671 no_line_numbers
= old_value
;
5674 /* Produce exact duplicate of insn INSN after AFTER.
5675 Care updating of libcall regions if present. */
5678 emit_copy_of_insn_after (insn
, after
)
5682 rtx note1
, note2
, link
;
5684 switch (GET_CODE (insn
))
5687 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5691 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5695 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5696 if (CALL_INSN_FUNCTION_USAGE (insn
))
5697 CALL_INSN_FUNCTION_USAGE (new)
5698 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5699 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5700 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5707 /* Update LABEL_NUSES. */
5708 mark_jump_label (PATTERN (new), new, 0);
5710 INSN_SCOPE (new) = INSN_SCOPE (insn
);
5712 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5714 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5715 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5717 if (GET_CODE (link
) == EXPR_LIST
)
5719 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5724 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5729 /* Fix the libcall sequences. */
5730 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5733 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5735 XEXP (note1
, 0) = p
;
5736 XEXP (note2
, 0) = new;
5738 INSN_CODE (new) = INSN_CODE (insn
);
5742 #include "gt-emit-rtl.h"