1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
42 #include "basic-block.h"
47 #include "stringpool.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "langhooks.h"
62 struct target_rtl default_target_rtl
;
64 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
67 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
69 /* Commonly used modes. */
71 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
72 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
73 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
74 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
76 /* Datastructures maintained for currently processed function in RTL form. */
78 struct rtl_data x_rtl
;
80 /* Indexed by pseudo register number, gives the rtx for that pseudo.
81 Allocated in parallel with regno_pointer_align.
82 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
83 with length attribute nested in top level structures. */
87 /* This is *not* reset after each function. It gives each CODE_LABEL
88 in the entire compilation a unique label number. */
90 static GTY(()) int label_num
= 1;
92 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
93 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
94 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
95 is set only for MODE_INT and MODE_VECTOR_INT modes. */
97 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
101 REAL_VALUE_TYPE dconst0
;
102 REAL_VALUE_TYPE dconst1
;
103 REAL_VALUE_TYPE dconst2
;
104 REAL_VALUE_TYPE dconstm1
;
105 REAL_VALUE_TYPE dconsthalf
;
107 /* Record fixed-point constant 0 and 1. */
108 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
109 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
111 /* We make one copy of (const_int C) where C is in
112 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
113 to save space during the compilation and simplify comparisons of
116 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
118 /* Standard pieces of rtx, to be substituted directly into things. */
121 rtx simple_return_rtx
;
124 /* A hash table storing CONST_INTs whose absolute value is greater
125 than MAX_SAVED_CONST_INT. */
127 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
128 htab_t const_int_htab
;
130 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
131 htab_t const_wide_int_htab
;
133 /* A hash table storing register attribute structures. */
134 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
135 htab_t reg_attrs_htab
;
137 /* A hash table storing all CONST_DOUBLEs. */
138 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
139 htab_t const_double_htab
;
141 /* A hash table storing all CONST_FIXEDs. */
142 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
143 htab_t const_fixed_htab
;
145 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
146 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
147 #define first_label_num (crtl->emit.x_first_label_num)
149 static void set_used_decls (tree
);
150 static void mark_label_nuses (rtx
);
151 static hashval_t
const_int_htab_hash (const void *);
152 static int const_int_htab_eq (const void *, const void *);
153 #if TARGET_SUPPORTS_WIDE_INT
154 static hashval_t
const_wide_int_htab_hash (const void *);
155 static int const_wide_int_htab_eq (const void *, const void *);
156 static rtx
lookup_const_wide_int (rtx
);
158 static hashval_t
const_double_htab_hash (const void *);
159 static int const_double_htab_eq (const void *, const void *);
160 static rtx
lookup_const_double (rtx
);
161 static hashval_t
const_fixed_htab_hash (const void *);
162 static int const_fixed_htab_eq (const void *, const void *);
163 static rtx
lookup_const_fixed (rtx
);
164 static hashval_t
reg_attrs_htab_hash (const void *);
165 static int reg_attrs_htab_eq (const void *, const void *);
166 static reg_attrs
*get_reg_attrs (tree
, int);
167 static rtx
gen_const_vector (enum machine_mode
, int);
168 static void copy_rtx_if_shared_1 (rtx
*orig
);
170 /* Probability of the conditional branch currently proceeded by try_split.
171 Set to -1 otherwise. */
172 int split_branch_probability
= -1;
174 /* Returns a hash code for X (which is a really a CONST_INT). */
177 const_int_htab_hash (const void *x
)
179 return (hashval_t
) INTVAL ((const_rtx
) x
);
182 /* Returns nonzero if the value represented by X (which is really a
183 CONST_INT) is the same as that given by Y (which is really a
187 const_int_htab_eq (const void *x
, const void *y
)
189 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
192 #if TARGET_SUPPORTS_WIDE_INT
193 /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
196 const_wide_int_htab_hash (const void *x
)
199 HOST_WIDE_INT hash
= 0;
200 const_rtx xr
= (const_rtx
) x
;
202 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
203 hash
+= CONST_WIDE_INT_ELT (xr
, i
);
205 return (hashval_t
) hash
;
208 /* Returns nonzero if the value represented by X (which is really a
209 CONST_WIDE_INT) is the same as that given by Y (which is really a
213 const_wide_int_htab_eq (const void *x
, const void *y
)
216 const_rtx xr
= (const_rtx
) x
;
217 const_rtx yr
= (const_rtx
) y
;
218 if (CONST_WIDE_INT_NUNITS (xr
) != CONST_WIDE_INT_NUNITS (yr
))
221 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
222 if (CONST_WIDE_INT_ELT (xr
, i
) != CONST_WIDE_INT_ELT (yr
, i
))
229 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
231 const_double_htab_hash (const void *x
)
233 const_rtx
const value
= (const_rtx
) x
;
236 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (value
) == VOIDmode
)
237 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
240 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
241 /* MODE is used in the comparison, so it should be in the hash. */
242 h
^= GET_MODE (value
);
247 /* Returns nonzero if the value represented by X (really a ...)
248 is the same as that represented by Y (really a ...) */
250 const_double_htab_eq (const void *x
, const void *y
)
252 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
254 if (GET_MODE (a
) != GET_MODE (b
))
256 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (a
) == VOIDmode
)
257 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
258 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
260 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
261 CONST_DOUBLE_REAL_VALUE (b
));
264 /* Returns a hash code for X (which is really a CONST_FIXED). */
267 const_fixed_htab_hash (const void *x
)
269 const_rtx
const value
= (const_rtx
) x
;
272 h
= fixed_hash (CONST_FIXED_VALUE (value
));
273 /* MODE is used in the comparison, so it should be in the hash. */
274 h
^= GET_MODE (value
);
278 /* Returns nonzero if the value represented by X (really a ...)
279 is the same as that represented by Y (really a ...). */
282 const_fixed_htab_eq (const void *x
, const void *y
)
284 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
286 if (GET_MODE (a
) != GET_MODE (b
))
288 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
291 /* Return true if the given memory attributes are equal. */
294 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
300 return (p
->alias
== q
->alias
301 && p
->offset_known_p
== q
->offset_known_p
302 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
303 && p
->size_known_p
== q
->size_known_p
304 && (!p
->size_known_p
|| p
->size
== q
->size
)
305 && p
->align
== q
->align
306 && p
->addrspace
== q
->addrspace
307 && (p
->expr
== q
->expr
308 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
309 && operand_equal_p (p
->expr
, q
->expr
, 0))));
312 /* Set MEM's memory attributes so that they are the same as ATTRS. */
315 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
317 /* If everything is the default, we can just clear the attributes. */
318 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
325 || !mem_attrs_eq_p (attrs
, MEM_ATTRS (mem
)))
327 MEM_ATTRS (mem
) = ggc_alloc
<mem_attrs
> ();
328 memcpy (MEM_ATTRS (mem
), attrs
, sizeof (mem_attrs
));
332 /* Returns a hash code for X (which is a really a reg_attrs *). */
335 reg_attrs_htab_hash (const void *x
)
337 const reg_attrs
*const p
= (const reg_attrs
*) x
;
339 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
342 /* Returns nonzero if the value represented by X (which is really a
343 reg_attrs *) is the same as that given by Y (which is also really a
347 reg_attrs_htab_eq (const void *x
, const void *y
)
349 const reg_attrs
*const p
= (const reg_attrs
*) x
;
350 const reg_attrs
*const q
= (const reg_attrs
*) y
;
352 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
354 /* Allocate a new reg_attrs structure and insert it into the hash table if
355 one identical to it is not already in the table. We are doing this for
359 get_reg_attrs (tree decl
, int offset
)
364 /* If everything is the default, we can just return zero. */
365 if (decl
== 0 && offset
== 0)
369 attrs
.offset
= offset
;
371 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
374 *slot
= ggc_alloc
<reg_attrs
> ();
375 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
378 return (reg_attrs
*) *slot
;
383 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
384 and to block register equivalences to be seen across this insn. */
389 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
390 MEM_VOLATILE_P (x
) = true;
396 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
397 don't attempt to share with the various global pieces of rtl (such as
398 frame_pointer_rtx). */
401 gen_raw_REG (enum machine_mode mode
, int regno
)
403 rtx x
= gen_rtx_raw_REG (mode
, regno
);
404 ORIGINAL_REGNO (x
) = regno
;
408 /* There are some RTL codes that require special attention; the generation
409 functions do the raw handling. If you add to this list, modify
410 special_rtx in gengenrtl.c as well. */
413 gen_rtx_INSN_LIST (enum machine_mode mode
, rtx insn
, rtx insn_list
)
415 return as_a
<rtx_insn_list
*> (gen_rtx_fmt_ue (INSN_LIST
, mode
, insn
,
420 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
424 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
425 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
427 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
428 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
429 return const_true_rtx
;
432 /* Look up the CONST_INT in the hash table. */
433 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
434 (hashval_t
) arg
, INSERT
);
436 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
442 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
444 return GEN_INT (trunc_int_for_mode (c
, mode
));
447 /* CONST_DOUBLEs might be created from pairs of integers, or from
448 REAL_VALUE_TYPEs. Also, their length is known only at run time,
449 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
451 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
452 hash table. If so, return its counterpart; otherwise add it
453 to the hash table and return it. */
455 lookup_const_double (rtx real
)
457 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
464 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
465 VALUE in mode MODE. */
467 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
469 rtx real
= rtx_alloc (CONST_DOUBLE
);
470 PUT_MODE (real
, mode
);
474 return lookup_const_double (real
);
477 /* Determine whether FIXED, a CONST_FIXED, already exists in the
478 hash table. If so, return its counterpart; otherwise add it
479 to the hash table and return it. */
482 lookup_const_fixed (rtx fixed
)
484 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
491 /* Return a CONST_FIXED rtx for a fixed-point value specified by
492 VALUE in mode MODE. */
495 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
497 rtx fixed
= rtx_alloc (CONST_FIXED
);
498 PUT_MODE (fixed
, mode
);
502 return lookup_const_fixed (fixed
);
505 #if TARGET_SUPPORTS_WIDE_INT == 0
506 /* Constructs double_int from rtx CST. */
509 rtx_to_double_int (const_rtx cst
)
513 if (CONST_INT_P (cst
))
514 r
= double_int::from_shwi (INTVAL (cst
));
515 else if (CONST_DOUBLE_AS_INT_P (cst
))
517 r
.low
= CONST_DOUBLE_LOW (cst
);
518 r
.high
= CONST_DOUBLE_HIGH (cst
);
527 #if TARGET_SUPPORTS_WIDE_INT
528 /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
529 If so, return its counterpart; otherwise add it to the hash table and
533 lookup_const_wide_int (rtx wint
)
535 void **slot
= htab_find_slot (const_wide_int_htab
, wint
, INSERT
);
543 /* Return an rtx constant for V, given that the constant has mode MODE.
544 The returned rtx will be a CONST_INT if V fits, otherwise it will be
545 a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
546 (if TARGET_SUPPORTS_WIDE_INT). */
549 immed_wide_int_const (const wide_int_ref
&v
, enum machine_mode mode
)
551 unsigned int len
= v
.get_len ();
552 unsigned int prec
= GET_MODE_PRECISION (mode
);
554 /* Allow truncation but not extension since we do not know if the
555 number is signed or unsigned. */
556 gcc_assert (prec
<= v
.get_precision ());
558 if (len
< 2 || prec
<= HOST_BITS_PER_WIDE_INT
)
559 return gen_int_mode (v
.elt (0), mode
);
561 #if TARGET_SUPPORTS_WIDE_INT
565 unsigned int blocks_needed
566 = (prec
+ HOST_BITS_PER_WIDE_INT
- 1) / HOST_BITS_PER_WIDE_INT
;
568 if (len
> blocks_needed
)
571 value
= const_wide_int_alloc (len
);
573 /* It is so tempting to just put the mode in here. Must control
575 PUT_MODE (value
, VOIDmode
);
576 CWI_PUT_NUM_ELEM (value
, len
);
578 for (i
= 0; i
< len
; i
++)
579 CONST_WIDE_INT_ELT (value
, i
) = v
.elt (i
);
581 return lookup_const_wide_int (value
);
584 return immed_double_const (v
.elt (0), v
.elt (1), mode
);
588 #if TARGET_SUPPORTS_WIDE_INT == 0
589 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
590 of ints: I0 is the low-order word and I1 is the high-order word.
591 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
592 implied upper bits are copies of the high bit of i1. The value
593 itself is neither signed nor unsigned. Do not use this routine for
594 non-integer modes; convert to REAL_VALUE_TYPE and use
595 CONST_DOUBLE_FROM_REAL_VALUE. */
598 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
603 /* There are the following cases (note that there are no modes with
604 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
606 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
608 2) If the value of the integer fits into HOST_WIDE_INT anyway
609 (i.e., i1 consists only from copies of the sign bit, and sign
610 of i0 and i1 are the same), then we return a CONST_INT for i0.
611 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
612 if (mode
!= VOIDmode
)
614 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
615 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
616 /* We can get a 0 for an error mark. */
617 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
618 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
620 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
621 return gen_int_mode (i0
, mode
);
624 /* If this integer fits in one word, return a CONST_INT. */
625 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
628 /* We use VOIDmode for integers. */
629 value
= rtx_alloc (CONST_DOUBLE
);
630 PUT_MODE (value
, VOIDmode
);
632 CONST_DOUBLE_LOW (value
) = i0
;
633 CONST_DOUBLE_HIGH (value
) = i1
;
635 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
636 XWINT (value
, i
) = 0;
638 return lookup_const_double (value
);
643 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
645 /* In case the MD file explicitly references the frame pointer, have
646 all such references point to the same frame pointer. This is
647 used during frame pointer elimination to distinguish the explicit
648 references to these registers from pseudos that happened to be
651 If we have eliminated the frame pointer or arg pointer, we will
652 be using it as a normal register, for example as a spill
653 register. In such cases, we might be accessing it in a mode that
654 is not Pmode and therefore cannot use the pre-allocated rtx.
656 Also don't do this when we are making new REGs in reload, since
657 we don't want to get confused with the real pointers. */
659 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
661 if (regno
== FRAME_POINTER_REGNUM
662 && (!reload_completed
|| frame_pointer_needed
))
663 return frame_pointer_rtx
;
664 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
665 if (regno
== HARD_FRAME_POINTER_REGNUM
666 && (!reload_completed
|| frame_pointer_needed
))
667 return hard_frame_pointer_rtx
;
669 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
670 if (regno
== ARG_POINTER_REGNUM
)
671 return arg_pointer_rtx
;
673 #ifdef RETURN_ADDRESS_POINTER_REGNUM
674 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
675 return return_address_pointer_rtx
;
677 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
678 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
679 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
680 return pic_offset_table_rtx
;
681 if (regno
== STACK_POINTER_REGNUM
)
682 return stack_pointer_rtx
;
686 /* If the per-function register table has been set up, try to re-use
687 an existing entry in that table to avoid useless generation of RTL.
689 This code is disabled for now until we can fix the various backends
690 which depend on having non-shared hard registers in some cases. Long
691 term we want to re-enable this code as it can significantly cut down
692 on the amount of useless RTL that gets generated.
694 We'll also need to fix some code that runs after reload that wants to
695 set ORIGINAL_REGNO. */
700 && regno
< FIRST_PSEUDO_REGISTER
701 && reg_raw_mode
[regno
] == mode
)
702 return regno_reg_rtx
[regno
];
705 return gen_raw_REG (mode
, regno
);
709 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
711 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
713 /* This field is not cleared by the mere allocation of the rtx, so
720 /* Generate a memory referring to non-trapping constant memory. */
723 gen_const_mem (enum machine_mode mode
, rtx addr
)
725 rtx mem
= gen_rtx_MEM (mode
, addr
);
726 MEM_READONLY_P (mem
) = 1;
727 MEM_NOTRAP_P (mem
) = 1;
731 /* Generate a MEM referring to fixed portions of the frame, e.g., register
735 gen_frame_mem (enum machine_mode mode
, rtx addr
)
737 rtx mem
= gen_rtx_MEM (mode
, addr
);
738 MEM_NOTRAP_P (mem
) = 1;
739 set_mem_alias_set (mem
, get_frame_alias_set ());
743 /* Generate a MEM referring to a temporary use of the stack, not part
744 of the fixed stack frame. For example, something which is pushed
745 by a target splitter. */
747 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
749 rtx mem
= gen_rtx_MEM (mode
, addr
);
750 MEM_NOTRAP_P (mem
) = 1;
751 if (!cfun
->calls_alloca
)
752 set_mem_alias_set (mem
, get_frame_alias_set ());
756 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
757 this construct would be valid, and false otherwise. */
760 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
761 const_rtx reg
, unsigned int offset
)
763 unsigned int isize
= GET_MODE_SIZE (imode
);
764 unsigned int osize
= GET_MODE_SIZE (omode
);
766 /* All subregs must be aligned. */
767 if (offset
% osize
!= 0)
770 /* The subreg offset cannot be outside the inner object. */
774 /* ??? This should not be here. Temporarily continue to allow word_mode
775 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
776 Generally, backends are doing something sketchy but it'll take time to
778 if (omode
== word_mode
)
780 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
781 is the culprit here, and not the backends. */
782 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
784 /* Allow component subregs of complex and vector. Though given the below
785 extraction rules, it's not always clear what that means. */
786 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
787 && GET_MODE_INNER (imode
) == omode
)
789 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
790 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
791 represent this. It's questionable if this ought to be represented at
792 all -- why can't this all be hidden in post-reload splitters that make
793 arbitrarily mode changes to the registers themselves. */
794 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
796 /* Subregs involving floating point modes are not allowed to
797 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
798 (subreg:SI (reg:DF) 0) isn't. */
799 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
801 if (! (isize
== osize
802 /* LRA can use subreg to store a floating point value in
803 an integer mode. Although the floating point and the
804 integer modes need the same number of hard registers,
805 the size of floating point mode can be less than the
806 integer mode. LRA also uses subregs for a register
807 should be used in different mode in on insn. */
812 /* Paradoxical subregs must have offset zero. */
816 /* This is a normal subreg. Verify that the offset is representable. */
818 /* For hard registers, we already have most of these rules collected in
819 subreg_offset_representable_p. */
820 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
822 unsigned int regno
= REGNO (reg
);
824 #ifdef CANNOT_CHANGE_MODE_CLASS
825 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
826 && GET_MODE_INNER (imode
) == omode
)
828 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
832 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
835 /* For pseudo registers, we want most of the same checks. Namely:
836 If the register no larger than a word, the subreg must be lowpart.
837 If the register is larger than a word, the subreg must be the lowpart
838 of a subword. A subreg does *not* perform arbitrary bit extraction.
839 Given that we've already checked mode/offset alignment, we only have
840 to check subword subregs here. */
841 if (osize
< UNITS_PER_WORD
842 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
844 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
845 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
846 if (offset
% UNITS_PER_WORD
!= low_off
)
853 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
855 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
856 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
859 /* Generate a SUBREG representing the least-significant part of REG if MODE
860 is smaller than mode of REG, otherwise paradoxical SUBREG. */
863 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
865 enum machine_mode inmode
;
867 inmode
= GET_MODE (reg
);
868 if (inmode
== VOIDmode
)
870 return gen_rtx_SUBREG (mode
, reg
,
871 subreg_lowpart_offset (mode
, inmode
));
875 gen_rtx_VAR_LOCATION (enum machine_mode mode
, tree decl
, rtx loc
,
876 enum var_init_status status
)
878 rtx x
= gen_rtx_fmt_te (VAR_LOCATION
, mode
, decl
, loc
);
879 PAT_VAR_LOCATION_STATUS (x
) = status
;
884 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
887 gen_rtvec (int n
, ...)
895 /* Don't allocate an empty rtvec... */
902 rt_val
= rtvec_alloc (n
);
904 for (i
= 0; i
< n
; i
++)
905 rt_val
->elem
[i
] = va_arg (p
, rtx
);
912 gen_rtvec_v (int n
, rtx
*argp
)
917 /* Don't allocate an empty rtvec... */
921 rt_val
= rtvec_alloc (n
);
923 for (i
= 0; i
< n
; i
++)
924 rt_val
->elem
[i
] = *argp
++;
929 /* Return the number of bytes between the start of an OUTER_MODE
930 in-memory value and the start of an INNER_MODE in-memory value,
931 given that the former is a lowpart of the latter. It may be a
932 paradoxical lowpart, in which case the offset will be negative
933 on big-endian targets. */
936 byte_lowpart_offset (enum machine_mode outer_mode
,
937 enum machine_mode inner_mode
)
939 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
940 return subreg_lowpart_offset (outer_mode
, inner_mode
);
942 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
945 /* Generate a REG rtx for a new pseudo register of mode MODE.
946 This pseudo is assigned the next sequential register number. */
949 gen_reg_rtx (enum machine_mode mode
)
952 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
954 gcc_assert (can_create_pseudo_p ());
956 /* If a virtual register with bigger mode alignment is generated,
957 increase stack alignment estimation because it might be spilled
959 if (SUPPORTS_STACK_ALIGNMENT
960 && crtl
->stack_alignment_estimated
< align
961 && !crtl
->stack_realign_processed
)
963 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
964 if (crtl
->stack_alignment_estimated
< min_align
)
965 crtl
->stack_alignment_estimated
= min_align
;
968 if (generating_concat_p
969 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
970 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
972 /* For complex modes, don't make a single pseudo.
973 Instead, make a CONCAT of two pseudos.
974 This allows noncontiguous allocation of the real and imaginary parts,
975 which makes much better code. Besides, allocating DCmode
976 pseudos overstrains reload on some machines like the 386. */
977 rtx realpart
, imagpart
;
978 enum machine_mode partmode
= GET_MODE_INNER (mode
);
980 realpart
= gen_reg_rtx (partmode
);
981 imagpart
= gen_reg_rtx (partmode
);
982 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
985 /* Do not call gen_reg_rtx with uninitialized crtl. */
986 gcc_assert (crtl
->emit
.regno_pointer_align_length
);
988 /* Make sure regno_pointer_align, and regno_reg_rtx are large
989 enough to have an element for this pseudo reg number. */
991 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
993 int old_size
= crtl
->emit
.regno_pointer_align_length
;
997 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
998 memset (tmp
+ old_size
, 0, old_size
);
999 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
1001 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
1002 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
1003 regno_reg_rtx
= new1
;
1005 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
1008 val
= gen_raw_REG (mode
, reg_rtx_no
);
1009 regno_reg_rtx
[reg_rtx_no
++] = val
;
1013 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1016 reg_is_parm_p (rtx reg
)
1020 gcc_assert (REG_P (reg
));
1021 decl
= REG_EXPR (reg
);
1022 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
1025 /* Update NEW with the same attributes as REG, but with OFFSET added
1026 to the REG_OFFSET. */
1029 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
1031 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
1032 REG_OFFSET (reg
) + offset
);
1035 /* Generate a register with same attributes as REG, but with OFFSET
1036 added to the REG_OFFSET. */
1039 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
1042 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
1044 update_reg_offset (new_rtx
, reg
, offset
);
1048 /* Generate a new pseudo-register with the same attributes as REG, but
1049 with OFFSET added to the REG_OFFSET. */
1052 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
1054 rtx new_rtx
= gen_reg_rtx (mode
);
1056 update_reg_offset (new_rtx
, reg
, offset
);
1060 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1061 new register is a (possibly paradoxical) lowpart of the old one. */
1064 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
1066 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
1067 PUT_MODE (reg
, mode
);
1070 /* Copy REG's attributes from X, if X has any attributes. If REG and X
1071 have different modes, REG is a (possibly paradoxical) lowpart of X. */
1074 set_reg_attrs_from_value (rtx reg
, rtx x
)
1077 bool can_be_reg_pointer
= true;
1079 /* Don't call mark_reg_pointer for incompatible pointer sign
1081 while (GET_CODE (x
) == SIGN_EXTEND
1082 || GET_CODE (x
) == ZERO_EXTEND
1083 || GET_CODE (x
) == TRUNCATE
1084 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
1086 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
1087 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
1088 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
1089 can_be_reg_pointer
= false;
1094 /* Hard registers can be reused for multiple purposes within the same
1095 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1096 on them is wrong. */
1097 if (HARD_REGISTER_P (reg
))
1100 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1103 if (MEM_OFFSET_KNOWN_P (x
))
1104 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1105 MEM_OFFSET (x
) + offset
);
1106 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1107 mark_reg_pointer (reg
, 0);
1112 update_reg_offset (reg
, x
, offset
);
1113 if (can_be_reg_pointer
&& REG_POINTER (x
))
1114 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1118 /* Generate a REG rtx for a new pseudo register, copying the mode
1119 and attributes from X. */
1122 gen_reg_rtx_and_attrs (rtx x
)
1124 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1125 set_reg_attrs_from_value (reg
, x
);
1129 /* Set the register attributes for registers contained in PARM_RTX.
1130 Use needed values from memory attributes of MEM. */
1133 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1135 if (REG_P (parm_rtx
))
1136 set_reg_attrs_from_value (parm_rtx
, mem
);
1137 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1139 /* Check for a NULL entry in the first slot, used to indicate that the
1140 parameter goes both on the stack and in registers. */
1141 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1142 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1144 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1145 if (REG_P (XEXP (x
, 0)))
1146 REG_ATTRS (XEXP (x
, 0))
1147 = get_reg_attrs (MEM_EXPR (mem
),
1148 INTVAL (XEXP (x
, 1)));
1153 /* Set the REG_ATTRS for registers in value X, given that X represents
1157 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1159 if (GET_CODE (x
) == SUBREG
)
1161 gcc_assert (subreg_lowpart_p (x
));
1166 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1168 if (GET_CODE (x
) == CONCAT
)
1170 if (REG_P (XEXP (x
, 0)))
1171 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1172 if (REG_P (XEXP (x
, 1)))
1173 REG_ATTRS (XEXP (x
, 1))
1174 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1176 if (GET_CODE (x
) == PARALLEL
)
1180 /* Check for a NULL entry, used to indicate that the parameter goes
1181 both on the stack and in registers. */
1182 if (XEXP (XVECEXP (x
, 0, 0), 0))
1187 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1189 rtx y
= XVECEXP (x
, 0, i
);
1190 if (REG_P (XEXP (y
, 0)))
1191 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1196 /* Assign the RTX X to declaration T. */
1199 set_decl_rtl (tree t
, rtx x
)
1201 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1203 set_reg_attrs_for_decl_rtl (t
, x
);
1206 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1207 if the ABI requires the parameter to be passed by reference. */
1210 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1212 DECL_INCOMING_RTL (t
) = x
;
1213 if (x
&& !by_reference_p
)
1214 set_reg_attrs_for_decl_rtl (t
, x
);
1217 /* Identify REG (which may be a CONCAT) as a user register. */
1220 mark_user_reg (rtx reg
)
1222 if (GET_CODE (reg
) == CONCAT
)
1224 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1225 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1229 gcc_assert (REG_P (reg
));
1230 REG_USERVAR_P (reg
) = 1;
1234 /* Identify REG as a probable pointer register and show its alignment
1235 as ALIGN, if nonzero. */
1238 mark_reg_pointer (rtx reg
, int align
)
1240 if (! REG_POINTER (reg
))
1242 REG_POINTER (reg
) = 1;
1245 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1247 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1248 /* We can no-longer be sure just how aligned this pointer is. */
1249 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1252 /* Return 1 plus largest pseudo reg number used in the current function. */
1260 /* Return 1 + the largest label number used so far in the current function. */
1263 max_label_num (void)
1268 /* Return first label number used in this function (if any were used). */
1271 get_first_label_num (void)
1273 return first_label_num
;
1276 /* If the rtx for label was created during the expansion of a nested
1277 function, then first_label_num won't include this label number.
1278 Fix this now so that array indices work later. */
1281 maybe_set_first_label_num (rtx x
)
1283 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1284 first_label_num
= CODE_LABEL_NUMBER (x
);
1287 /* Return a value representing some low-order bits of X, where the number
1288 of low-order bits is given by MODE. Note that no conversion is done
1289 between floating-point and fixed-point values, rather, the bit
1290 representation is returned.
1292 This function handles the cases in common between gen_lowpart, below,
1293 and two variants in cse.c and combine.c. These are the cases that can
1294 be safely handled at all points in the compilation.
1296 If this is not a case we can handle, return 0. */
1299 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1301 int msize
= GET_MODE_SIZE (mode
);
1304 enum machine_mode innermode
;
1306 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1307 so we have to make one up. Yuk. */
1308 innermode
= GET_MODE (x
);
1310 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1311 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1312 else if (innermode
== VOIDmode
)
1313 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1315 xsize
= GET_MODE_SIZE (innermode
);
1317 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1319 if (innermode
== mode
)
1322 /* MODE must occupy no more words than the mode of X. */
1323 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1324 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1327 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1328 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1331 offset
= subreg_lowpart_offset (mode
, innermode
);
1333 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1334 && (GET_MODE_CLASS (mode
) == MODE_INT
1335 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1337 /* If we are getting the low-order part of something that has been
1338 sign- or zero-extended, we can either just use the object being
1339 extended or make a narrower extension. If we want an even smaller
1340 piece than the size of the object being extended, call ourselves
1343 This case is used mostly by combine and cse. */
1345 if (GET_MODE (XEXP (x
, 0)) == mode
)
1347 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1348 return gen_lowpart_common (mode
, XEXP (x
, 0));
1349 else if (msize
< xsize
)
1350 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1352 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1353 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1354 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1355 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1357 /* Otherwise, we can't do this. */
1362 gen_highpart (enum machine_mode mode
, rtx x
)
1364 unsigned int msize
= GET_MODE_SIZE (mode
);
1367 /* This case loses if X is a subreg. To catch bugs early,
1368 complain if an invalid MODE is used even in other cases. */
1369 gcc_assert (msize
<= UNITS_PER_WORD
1370 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1372 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1373 subreg_highpart_offset (mode
, GET_MODE (x
)));
1374 gcc_assert (result
);
1376 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1377 the target if we have a MEM. gen_highpart must return a valid operand,
1378 emitting code if necessary to do so. */
1381 result
= validize_mem (result
);
1382 gcc_assert (result
);
1388 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1389 be VOIDmode constant. */
1391 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1393 if (GET_MODE (exp
) != VOIDmode
)
1395 gcc_assert (GET_MODE (exp
) == innermode
);
1396 return gen_highpart (outermode
, exp
);
1398 return simplify_gen_subreg (outermode
, exp
, innermode
,
1399 subreg_highpart_offset (outermode
, innermode
));
1402 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1405 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1407 unsigned int offset
= 0;
1408 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1412 if (WORDS_BIG_ENDIAN
)
1413 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1414 if (BYTES_BIG_ENDIAN
)
1415 offset
+= difference
% UNITS_PER_WORD
;
1421 /* Return offset in bytes to get OUTERMODE high part
1422 of the value in mode INNERMODE stored in memory in target format. */
1424 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1426 unsigned int offset
= 0;
1427 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1429 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1433 if (! WORDS_BIG_ENDIAN
)
1434 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1435 if (! BYTES_BIG_ENDIAN
)
1436 offset
+= difference
% UNITS_PER_WORD
;
1442 /* Return 1 iff X, assumed to be a SUBREG,
1443 refers to the least significant part of its containing reg.
1444 If X is not a SUBREG, always return 1 (it is its own low part!). */
1447 subreg_lowpart_p (const_rtx x
)
1449 if (GET_CODE (x
) != SUBREG
)
1451 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1454 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1455 == SUBREG_BYTE (x
));
1458 /* Return true if X is a paradoxical subreg, false otherwise. */
1460 paradoxical_subreg_p (const_rtx x
)
1462 if (GET_CODE (x
) != SUBREG
)
1464 return (GET_MODE_PRECISION (GET_MODE (x
))
1465 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1468 /* Return subword OFFSET of operand OP.
1469 The word number, OFFSET, is interpreted as the word number starting
1470 at the low-order address. OFFSET 0 is the low-order word if not
1471 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1473 If we cannot extract the required word, we return zero. Otherwise,
1474 an rtx corresponding to the requested word will be returned.
1476 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1477 reload has completed, a valid address will always be returned. After
1478 reload, if a valid address cannot be returned, we return zero.
1480 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1481 it is the responsibility of the caller.
1483 MODE is the mode of OP in case it is a CONST_INT.
1485 ??? This is still rather broken for some cases. The problem for the
1486 moment is that all callers of this thing provide no 'goal mode' to
1487 tell us to work with. This exists because all callers were written
1488 in a word based SUBREG world.
1489 Now use of this function can be deprecated by simplify_subreg in most
1494 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1496 if (mode
== VOIDmode
)
1497 mode
= GET_MODE (op
);
1499 gcc_assert (mode
!= VOIDmode
);
1501 /* If OP is narrower than a word, fail. */
1503 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1506 /* If we want a word outside OP, return zero. */
1508 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1511 /* Form a new MEM at the requested address. */
1514 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1516 if (! validate_address
)
1519 else if (reload_completed
)
1521 if (! strict_memory_address_addr_space_p (word_mode
,
1523 MEM_ADDR_SPACE (op
)))
1527 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1530 /* Rest can be handled by simplify_subreg. */
1531 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1534 /* Similar to `operand_subword', but never return 0. If we can't
1535 extract the required subword, put OP into a register and try again.
1536 The second attempt must succeed. We always validate the address in
1539 MODE is the mode of OP, in case it is CONST_INT. */
1542 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1544 rtx result
= operand_subword (op
, offset
, 1, mode
);
1549 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1551 /* If this is a register which can not be accessed by words, copy it
1552 to a pseudo register. */
1554 op
= copy_to_reg (op
);
1556 op
= force_reg (mode
, op
);
1559 result
= operand_subword (op
, offset
, 1, mode
);
1560 gcc_assert (result
);
1565 /* Returns 1 if both MEM_EXPR can be considered equal
1569 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1574 if (! expr1
|| ! expr2
)
1577 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1580 return operand_equal_p (expr1
, expr2
, 0);
1583 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1584 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1588 get_mem_align_offset (rtx mem
, unsigned int align
)
1591 unsigned HOST_WIDE_INT offset
;
1593 /* This function can't use
1594 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1595 || (MAX (MEM_ALIGN (mem),
1596 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1600 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1602 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1603 for <variable>. get_inner_reference doesn't handle it and
1604 even if it did, the alignment in that case needs to be determined
1605 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1606 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1607 isn't sufficiently aligned, the object it is in might be. */
1608 gcc_assert (MEM_P (mem
));
1609 expr
= MEM_EXPR (mem
);
1610 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1613 offset
= MEM_OFFSET (mem
);
1616 if (DECL_ALIGN (expr
) < align
)
1619 else if (INDIRECT_REF_P (expr
))
1621 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1624 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1628 tree inner
= TREE_OPERAND (expr
, 0);
1629 tree field
= TREE_OPERAND (expr
, 1);
1630 tree byte_offset
= component_ref_field_offset (expr
);
1631 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1634 || !tree_fits_uhwi_p (byte_offset
)
1635 || !tree_fits_uhwi_p (bit_offset
))
1638 offset
+= tree_to_uhwi (byte_offset
);
1639 offset
+= tree_to_uhwi (bit_offset
) / BITS_PER_UNIT
;
1641 if (inner
== NULL_TREE
)
1643 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1644 < (unsigned int) align
)
1648 else if (DECL_P (inner
))
1650 if (DECL_ALIGN (inner
) < align
)
1654 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1662 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1665 /* Given REF (a MEM) and T, either the type of X or the expression
1666 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1667 if we are making a new object of this type. BITPOS is nonzero if
1668 there is an offset outstanding on T that will be applied later. */
1671 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1672 HOST_WIDE_INT bitpos
)
1674 HOST_WIDE_INT apply_bitpos
= 0;
1676 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1679 /* It can happen that type_for_mode was given a mode for which there
1680 is no language-level type. In which case it returns NULL, which
1685 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1686 if (type
== error_mark_node
)
1689 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1690 wrong answer, as it assumes that DECL_RTL already has the right alias
1691 info. Callers should not set DECL_RTL until after the call to
1692 set_mem_attributes. */
1693 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1695 memset (&attrs
, 0, sizeof (attrs
));
1697 /* Get the alias set from the expression or type (perhaps using a
1698 front-end routine) and use it. */
1699 attrs
.alias
= get_alias_set (t
);
1701 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1702 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1704 /* Default values from pre-existing memory attributes if present. */
1705 refattrs
= MEM_ATTRS (ref
);
1708 /* ??? Can this ever happen? Calling this routine on a MEM that
1709 already carries memory attributes should probably be invalid. */
1710 attrs
.expr
= refattrs
->expr
;
1711 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1712 attrs
.offset
= refattrs
->offset
;
1713 attrs
.size_known_p
= refattrs
->size_known_p
;
1714 attrs
.size
= refattrs
->size
;
1715 attrs
.align
= refattrs
->align
;
1718 /* Otherwise, default values from the mode of the MEM reference. */
1721 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1722 gcc_assert (!defattrs
->expr
);
1723 gcc_assert (!defattrs
->offset_known_p
);
1725 /* Respect mode size. */
1726 attrs
.size_known_p
= defattrs
->size_known_p
;
1727 attrs
.size
= defattrs
->size
;
1728 /* ??? Is this really necessary? We probably should always get
1729 the size from the type below. */
1731 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1732 if T is an object, always compute the object alignment below. */
1734 attrs
.align
= defattrs
->align
;
1736 attrs
.align
= BITS_PER_UNIT
;
1737 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1738 e.g. if the type carries an alignment attribute. Should we be
1739 able to simply always use TYPE_ALIGN? */
1742 /* We can set the alignment from the type if we are making an object,
1743 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1744 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1745 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1747 /* If the size is known, we can set that. */
1748 tree new_size
= TYPE_SIZE_UNIT (type
);
1750 /* The address-space is that of the type. */
1751 as
= TYPE_ADDR_SPACE (type
);
1753 /* If T is not a type, we may be able to deduce some more information about
1759 if (TREE_THIS_VOLATILE (t
))
1760 MEM_VOLATILE_P (ref
) = 1;
1762 /* Now remove any conversions: they don't change what the underlying
1763 object is. Likewise for SAVE_EXPR. */
1764 while (CONVERT_EXPR_P (t
)
1765 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1766 || TREE_CODE (t
) == SAVE_EXPR
)
1767 t
= TREE_OPERAND (t
, 0);
1769 /* Note whether this expression can trap. */
1770 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1772 base
= get_base_address (t
);
1776 && TREE_READONLY (base
)
1777 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1778 && !TREE_THIS_VOLATILE (base
))
1779 MEM_READONLY_P (ref
) = 1;
1781 /* Mark static const strings readonly as well. */
1782 if (TREE_CODE (base
) == STRING_CST
1783 && TREE_READONLY (base
)
1784 && TREE_STATIC (base
))
1785 MEM_READONLY_P (ref
) = 1;
1787 /* Address-space information is on the base object. */
1788 if (TREE_CODE (base
) == MEM_REF
1789 || TREE_CODE (base
) == TARGET_MEM_REF
)
1790 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1793 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1796 /* If this expression uses it's parent's alias set, mark it such
1797 that we won't change it. */
1798 if (component_uses_parent_alias_set_from (t
) != NULL_TREE
)
1799 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1801 /* If this is a decl, set the attributes of the MEM from it. */
1805 attrs
.offset_known_p
= true;
1807 apply_bitpos
= bitpos
;
1808 new_size
= DECL_SIZE_UNIT (t
);
1811 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1812 else if (CONSTANT_CLASS_P (t
))
1815 /* If this is a field reference, record it. */
1816 else if (TREE_CODE (t
) == COMPONENT_REF
)
1819 attrs
.offset_known_p
= true;
1821 apply_bitpos
= bitpos
;
1822 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1823 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1826 /* If this is an array reference, look for an outer field reference. */
1827 else if (TREE_CODE (t
) == ARRAY_REF
)
1829 tree off_tree
= size_zero_node
;
1830 /* We can't modify t, because we use it at the end of the
1836 tree index
= TREE_OPERAND (t2
, 1);
1837 tree low_bound
= array_ref_low_bound (t2
);
1838 tree unit_size
= array_ref_element_size (t2
);
1840 /* We assume all arrays have sizes that are a multiple of a byte.
1841 First subtract the lower bound, if any, in the type of the
1842 index, then convert to sizetype and multiply by the size of
1843 the array element. */
1844 if (! integer_zerop (low_bound
))
1845 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1848 off_tree
= size_binop (PLUS_EXPR
,
1849 size_binop (MULT_EXPR
,
1850 fold_convert (sizetype
,
1854 t2
= TREE_OPERAND (t2
, 0);
1856 while (TREE_CODE (t2
) == ARRAY_REF
);
1859 || TREE_CODE (t2
) == COMPONENT_REF
)
1862 attrs
.offset_known_p
= false;
1863 if (tree_fits_uhwi_p (off_tree
))
1865 attrs
.offset_known_p
= true;
1866 attrs
.offset
= tree_to_uhwi (off_tree
);
1867 apply_bitpos
= bitpos
;
1870 /* Else do not record a MEM_EXPR. */
1873 /* If this is an indirect reference, record it. */
1874 else if (TREE_CODE (t
) == MEM_REF
1875 || TREE_CODE (t
) == TARGET_MEM_REF
)
1878 attrs
.offset_known_p
= true;
1880 apply_bitpos
= bitpos
;
1883 /* Compute the alignment. */
1884 unsigned int obj_align
;
1885 unsigned HOST_WIDE_INT obj_bitpos
;
1886 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1887 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1888 if (obj_bitpos
!= 0)
1889 obj_align
= (obj_bitpos
& -obj_bitpos
);
1890 attrs
.align
= MAX (attrs
.align
, obj_align
);
1893 if (tree_fits_uhwi_p (new_size
))
1895 attrs
.size_known_p
= true;
1896 attrs
.size
= tree_to_uhwi (new_size
);
1899 /* If we modified OFFSET based on T, then subtract the outstanding
1900 bit position offset. Similarly, increase the size of the accessed
1901 object to contain the negative offset. */
1904 gcc_assert (attrs
.offset_known_p
);
1905 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1906 if (attrs
.size_known_p
)
1907 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1910 /* Now set the attributes we computed above. */
1911 attrs
.addrspace
= as
;
1912 set_mem_attrs (ref
, &attrs
);
1916 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1918 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1921 /* Set the alias set of MEM to SET. */
1924 set_mem_alias_set (rtx mem
, alias_set_type set
)
1926 struct mem_attrs attrs
;
1928 /* If the new and old alias sets don't conflict, something is wrong. */
1929 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1930 attrs
= *get_mem_attrs (mem
);
1932 set_mem_attrs (mem
, &attrs
);
1935 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1938 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
1940 struct mem_attrs attrs
;
1942 attrs
= *get_mem_attrs (mem
);
1943 attrs
.addrspace
= addrspace
;
1944 set_mem_attrs (mem
, &attrs
);
1947 /* Set the alignment of MEM to ALIGN bits. */
1950 set_mem_align (rtx mem
, unsigned int align
)
1952 struct mem_attrs attrs
;
1954 attrs
= *get_mem_attrs (mem
);
1955 attrs
.align
= align
;
1956 set_mem_attrs (mem
, &attrs
);
1959 /* Set the expr for MEM to EXPR. */
1962 set_mem_expr (rtx mem
, tree expr
)
1964 struct mem_attrs attrs
;
1966 attrs
= *get_mem_attrs (mem
);
1968 set_mem_attrs (mem
, &attrs
);
1971 /* Set the offset of MEM to OFFSET. */
1974 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
1976 struct mem_attrs attrs
;
1978 attrs
= *get_mem_attrs (mem
);
1979 attrs
.offset_known_p
= true;
1980 attrs
.offset
= offset
;
1981 set_mem_attrs (mem
, &attrs
);
1984 /* Clear the offset of MEM. */
1987 clear_mem_offset (rtx mem
)
1989 struct mem_attrs attrs
;
1991 attrs
= *get_mem_attrs (mem
);
1992 attrs
.offset_known_p
= false;
1993 set_mem_attrs (mem
, &attrs
);
1996 /* Set the size of MEM to SIZE. */
1999 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
2001 struct mem_attrs attrs
;
2003 attrs
= *get_mem_attrs (mem
);
2004 attrs
.size_known_p
= true;
2006 set_mem_attrs (mem
, &attrs
);
2009 /* Clear the size of MEM. */
2012 clear_mem_size (rtx mem
)
2014 struct mem_attrs attrs
;
2016 attrs
= *get_mem_attrs (mem
);
2017 attrs
.size_known_p
= false;
2018 set_mem_attrs (mem
, &attrs
);
2021 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2022 and its address changed to ADDR. (VOIDmode means don't change the mode.
2023 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2024 returned memory location is required to be valid. INPLACE is true if any
2025 changes can be made directly to MEMREF or false if MEMREF must be treated
2028 The memory attributes are not changed. */
2031 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
,
2037 gcc_assert (MEM_P (memref
));
2038 as
= MEM_ADDR_SPACE (memref
);
2039 if (mode
== VOIDmode
)
2040 mode
= GET_MODE (memref
);
2042 addr
= XEXP (memref
, 0);
2043 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
2044 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2047 /* Don't validate address for LRA. LRA can make the address valid
2048 by itself in most efficient way. */
2049 if (validate
&& !lra_in_progress
)
2051 if (reload_in_progress
|| reload_completed
)
2052 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2054 addr
= memory_address_addr_space (mode
, addr
, as
);
2057 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2062 XEXP (memref
, 0) = addr
;
2066 new_rtx
= gen_rtx_MEM (mode
, addr
);
2067 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2071 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2072 way we are changing MEMREF, so we only preserve the alias set. */
2075 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
2077 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1, false);
2078 enum machine_mode mmode
= GET_MODE (new_rtx
);
2079 struct mem_attrs attrs
, *defattrs
;
2081 attrs
= *get_mem_attrs (memref
);
2082 defattrs
= mode_mem_attrs
[(int) mmode
];
2083 attrs
.expr
= NULL_TREE
;
2084 attrs
.offset_known_p
= false;
2085 attrs
.size_known_p
= defattrs
->size_known_p
;
2086 attrs
.size
= defattrs
->size
;
2087 attrs
.align
= defattrs
->align
;
2089 /* If there are no changes, just return the original memory reference. */
2090 if (new_rtx
== memref
)
2092 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2095 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2096 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2099 set_mem_attrs (new_rtx
, &attrs
);
2103 /* Return a memory reference like MEMREF, but with its mode changed
2104 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2105 nonzero, the memory address is forced to be valid.
2106 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2107 and the caller is responsible for adjusting MEMREF base register.
2108 If ADJUST_OBJECT is zero, the underlying object associated with the
2109 memory reference is left unchanged and the caller is responsible for
2110 dealing with it. Otherwise, if the new memory reference is outside
2111 the underlying object, even partially, then the object is dropped.
2112 SIZE, if nonzero, is the size of an access in cases where MODE
2113 has no inherent size. */
2116 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
2117 int validate
, int adjust_address
, int adjust_object
,
2120 rtx addr
= XEXP (memref
, 0);
2122 enum machine_mode address_mode
;
2124 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2125 unsigned HOST_WIDE_INT max_align
;
2126 #ifdef POINTERS_EXTEND_UNSIGNED
2127 enum machine_mode pointer_mode
2128 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2131 /* VOIDmode means no mode change for change_address_1. */
2132 if (mode
== VOIDmode
)
2133 mode
= GET_MODE (memref
);
2135 /* Take the size of non-BLKmode accesses from the mode. */
2136 defattrs
= mode_mem_attrs
[(int) mode
];
2137 if (defattrs
->size_known_p
)
2138 size
= defattrs
->size
;
2140 /* If there are no changes, just return the original memory reference. */
2141 if (mode
== GET_MODE (memref
) && !offset
2142 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2143 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2147 /* ??? Prefer to create garbage instead of creating shared rtl.
2148 This may happen even if offset is nonzero -- consider
2149 (plus (plus reg reg) const_int) -- so do this always. */
2150 addr
= copy_rtx (addr
);
2152 /* Convert a possibly large offset to a signed value within the
2153 range of the target address space. */
2154 address_mode
= get_address_mode (memref
);
2155 pbits
= GET_MODE_BITSIZE (address_mode
);
2156 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2158 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2159 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2165 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2166 object, we can merge it into the LO_SUM. */
2167 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2169 && (unsigned HOST_WIDE_INT
) offset
2170 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2171 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2172 plus_constant (address_mode
,
2173 XEXP (addr
, 1), offset
));
2174 #ifdef POINTERS_EXTEND_UNSIGNED
2175 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2176 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2177 the fact that pointers are not allowed to overflow. */
2178 else if (POINTERS_EXTEND_UNSIGNED
> 0
2179 && GET_CODE (addr
) == ZERO_EXTEND
2180 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2181 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2182 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2183 plus_constant (pointer_mode
,
2184 XEXP (addr
, 0), offset
));
2187 addr
= plus_constant (address_mode
, addr
, offset
);
2190 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
, false);
2192 /* If the address is a REG, change_address_1 rightfully returns memref,
2193 but this would destroy memref's MEM_ATTRS. */
2194 if (new_rtx
== memref
&& offset
!= 0)
2195 new_rtx
= copy_rtx (new_rtx
);
2197 /* Conservatively drop the object if we don't know where we start from. */
2198 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2200 attrs
.expr
= NULL_TREE
;
2204 /* Compute the new values of the memory attributes due to this adjustment.
2205 We add the offsets and update the alignment. */
2206 if (attrs
.offset_known_p
)
2208 attrs
.offset
+= offset
;
2210 /* Drop the object if the new left end is not within its bounds. */
2211 if (adjust_object
&& attrs
.offset
< 0)
2213 attrs
.expr
= NULL_TREE
;
2218 /* Compute the new alignment by taking the MIN of the alignment and the
2219 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2223 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2224 attrs
.align
= MIN (attrs
.align
, max_align
);
2229 /* Drop the object if the new right end is not within its bounds. */
2230 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2232 attrs
.expr
= NULL_TREE
;
2235 attrs
.size_known_p
= true;
2238 else if (attrs
.size_known_p
)
2240 gcc_assert (!adjust_object
);
2241 attrs
.size
-= offset
;
2242 /* ??? The store_by_pieces machinery generates negative sizes,
2243 so don't assert for that here. */
2246 set_mem_attrs (new_rtx
, &attrs
);
2251 /* Return a memory reference like MEMREF, but with its mode changed
2252 to MODE and its address changed to ADDR, which is assumed to be
2253 MEMREF offset by OFFSET bytes. If VALIDATE is
2254 nonzero, the memory address is forced to be valid. */
2257 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2258 HOST_WIDE_INT offset
, int validate
)
2260 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
, false);
2261 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2264 /* Return a memory reference like MEMREF, but whose address is changed by
2265 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2266 known to be in OFFSET (possibly 1). */
2269 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2271 rtx new_rtx
, addr
= XEXP (memref
, 0);
2272 enum machine_mode address_mode
;
2273 struct mem_attrs attrs
, *defattrs
;
2275 attrs
= *get_mem_attrs (memref
);
2276 address_mode
= get_address_mode (memref
);
2277 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2279 /* At this point we don't know _why_ the address is invalid. It
2280 could have secondary memory references, multiplies or anything.
2282 However, if we did go and rearrange things, we can wind up not
2283 being able to recognize the magic around pic_offset_table_rtx.
2284 This stuff is fragile, and is yet another example of why it is
2285 bad to expose PIC machinery too early. */
2286 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2288 && GET_CODE (addr
) == PLUS
2289 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2291 addr
= force_reg (GET_MODE (addr
), addr
);
2292 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2295 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2296 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1, false);
2298 /* If there are no changes, just return the original memory reference. */
2299 if (new_rtx
== memref
)
2302 /* Update the alignment to reflect the offset. Reset the offset, which
2304 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2305 attrs
.offset_known_p
= false;
2306 attrs
.size_known_p
= defattrs
->size_known_p
;
2307 attrs
.size
= defattrs
->size
;
2308 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2309 set_mem_attrs (new_rtx
, &attrs
);
2313 /* Return a memory reference like MEMREF, but with its address changed to
2314 ADDR. The caller is asserting that the actual piece of memory pointed
2315 to is the same, just the form of the address is being changed, such as
2316 by putting something into a register. INPLACE is true if any changes
2317 can be made directly to MEMREF or false if MEMREF must be treated as
2321 replace_equiv_address (rtx memref
, rtx addr
, bool inplace
)
2323 /* change_address_1 copies the memory attribute structure without change
2324 and that's exactly what we want here. */
2325 update_temp_slot_address (XEXP (memref
, 0), addr
);
2326 return change_address_1 (memref
, VOIDmode
, addr
, 1, inplace
);
2329 /* Likewise, but the reference is not required to be valid. */
2332 replace_equiv_address_nv (rtx memref
, rtx addr
, bool inplace
)
2334 return change_address_1 (memref
, VOIDmode
, addr
, 0, inplace
);
2337 /* Return a memory reference like MEMREF, but with its mode widened to
2338 MODE and offset by OFFSET. This would be used by targets that e.g.
2339 cannot issue QImode memory operations and have to use SImode memory
2340 operations plus masking logic. */
2343 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2345 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2346 struct mem_attrs attrs
;
2347 unsigned int size
= GET_MODE_SIZE (mode
);
2349 /* If there are no changes, just return the original memory reference. */
2350 if (new_rtx
== memref
)
2353 attrs
= *get_mem_attrs (new_rtx
);
2355 /* If we don't know what offset we were at within the expression, then
2356 we can't know if we've overstepped the bounds. */
2357 if (! attrs
.offset_known_p
)
2358 attrs
.expr
= NULL_TREE
;
2362 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2364 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2365 tree offset
= component_ref_field_offset (attrs
.expr
);
2367 if (! DECL_SIZE_UNIT (field
))
2369 attrs
.expr
= NULL_TREE
;
2373 /* Is the field at least as large as the access? If so, ok,
2374 otherwise strip back to the containing structure. */
2375 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2376 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2377 && attrs
.offset
>= 0)
2380 if (! tree_fits_uhwi_p (offset
))
2382 attrs
.expr
= NULL_TREE
;
2386 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2387 attrs
.offset
+= tree_to_uhwi (offset
);
2388 attrs
.offset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
2391 /* Similarly for the decl. */
2392 else if (DECL_P (attrs
.expr
)
2393 && DECL_SIZE_UNIT (attrs
.expr
)
2394 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2395 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2396 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2400 /* The widened memory access overflows the expression, which means
2401 that it could alias another expression. Zap it. */
2402 attrs
.expr
= NULL_TREE
;
2408 attrs
.offset_known_p
= false;
2410 /* The widened memory may alias other stuff, so zap the alias set. */
2411 /* ??? Maybe use get_alias_set on any remaining expression. */
2413 attrs
.size_known_p
= true;
2415 set_mem_attrs (new_rtx
, &attrs
);
2419 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2420 static GTY(()) tree spill_slot_decl
;
2423 get_spill_slot_decl (bool force_build_p
)
2425 tree d
= spill_slot_decl
;
2427 struct mem_attrs attrs
;
2429 if (d
|| !force_build_p
)
2432 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2433 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2434 DECL_ARTIFICIAL (d
) = 1;
2435 DECL_IGNORED_P (d
) = 1;
2437 spill_slot_decl
= d
;
2439 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2440 MEM_NOTRAP_P (rd
) = 1;
2441 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2442 attrs
.alias
= new_alias_set ();
2444 set_mem_attrs (rd
, &attrs
);
2445 SET_DECL_RTL (d
, rd
);
2450 /* Given MEM, a result from assign_stack_local, fill in the memory
2451 attributes as appropriate for a register allocator spill slot.
2452 These slots are not aliasable by other memory. We arrange for
2453 them all to use a single MEM_EXPR, so that the aliasing code can
2454 work properly in the case of shared spill slots. */
2457 set_mem_attrs_for_spill (rtx mem
)
2459 struct mem_attrs attrs
;
2462 attrs
= *get_mem_attrs (mem
);
2463 attrs
.expr
= get_spill_slot_decl (true);
2464 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2465 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2467 /* We expect the incoming memory to be of the form:
2468 (mem:MODE (plus (reg sfp) (const_int offset)))
2469 with perhaps the plus missing for offset = 0. */
2470 addr
= XEXP (mem
, 0);
2471 attrs
.offset_known_p
= true;
2473 if (GET_CODE (addr
) == PLUS
2474 && CONST_INT_P (XEXP (addr
, 1)))
2475 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2477 set_mem_attrs (mem
, &attrs
);
2478 MEM_NOTRAP_P (mem
) = 1;
2481 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2484 gen_label_rtx (void)
2486 return as_a
<rtx_code_label
*> (
2487 gen_rtx_CODE_LABEL (VOIDmode
, NULL_RTX
, NULL_RTX
,
2488 NULL
, label_num
++, NULL
));
2491 /* For procedure integration. */
2493 /* Install new pointers to the first and last insns in the chain.
2494 Also, set cur_insn_uid to one higher than the last in use.
2495 Used for an inline-procedure after copying the insn chain. */
2498 set_new_first_and_last_insn (rtx_insn
*first
, rtx_insn
*last
)
2502 set_first_insn (first
);
2503 set_last_insn (last
);
2506 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2508 int debug_count
= 0;
2510 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2511 cur_debug_insn_uid
= 0;
2513 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2514 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2515 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2518 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2519 if (DEBUG_INSN_P (insn
))
2524 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2526 cur_debug_insn_uid
++;
2529 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2530 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2535 /* Go through all the RTL insn bodies and copy any invalid shared
2536 structure. This routine should only be called once. */
2539 unshare_all_rtl_1 (rtx_insn
*insn
)
2541 /* Unshare just about everything else. */
2542 unshare_all_rtl_in_chain (insn
);
2544 /* Make sure the addresses of stack slots found outside the insn chain
2545 (such as, in DECL_RTL of a variable) are not shared
2546 with the insn chain.
2548 This special care is necessary when the stack slot MEM does not
2549 actually appear in the insn chain. If it does appear, its address
2550 is unshared from all else at that point. */
2551 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2554 /* Go through all the RTL insn bodies and copy any invalid shared
2555 structure, again. This is a fairly expensive thing to do so it
2556 should be done sparingly. */
2559 unshare_all_rtl_again (rtx_insn
*insn
)
2564 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2567 reset_used_flags (PATTERN (p
));
2568 reset_used_flags (REG_NOTES (p
));
2570 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2573 /* Make sure that virtual stack slots are not shared. */
2574 set_used_decls (DECL_INITIAL (cfun
->decl
));
2576 /* Make sure that virtual parameters are not shared. */
2577 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2578 set_used_flags (DECL_RTL (decl
));
2580 reset_used_flags (stack_slot_list
);
2582 unshare_all_rtl_1 (insn
);
2586 unshare_all_rtl (void)
2588 unshare_all_rtl_1 (get_insns ());
2593 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2594 Recursively does the same for subexpressions. */
2597 verify_rtx_sharing (rtx orig
, rtx insn
)
2602 const char *format_ptr
;
2607 code
= GET_CODE (x
);
2609 /* These types may be freely shared. */
2625 /* SCRATCH must be shared because they represent distinct values. */
2628 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2629 clobbers or clobbers of hard registers that originated as pseudos.
2630 This is needed to allow safe register renaming. */
2631 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2632 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2637 if (shared_const_p (orig
))
2642 /* A MEM is allowed to be shared if its address is constant. */
2643 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2644 || reload_completed
|| reload_in_progress
)
2653 /* This rtx may not be shared. If it has already been seen,
2654 replace it with a copy of itself. */
2655 #ifdef ENABLE_CHECKING
2656 if (RTX_FLAG (x
, used
))
2658 error ("invalid rtl sharing found in the insn");
2660 error ("shared rtx");
2662 internal_error ("internal consistency failure");
2665 gcc_assert (!RTX_FLAG (x
, used
));
2667 RTX_FLAG (x
, used
) = 1;
2669 /* Now scan the subexpressions recursively. */
2671 format_ptr
= GET_RTX_FORMAT (code
);
2673 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2675 switch (*format_ptr
++)
2678 verify_rtx_sharing (XEXP (x
, i
), insn
);
2682 if (XVEC (x
, i
) != NULL
)
2685 int len
= XVECLEN (x
, i
);
2687 for (j
= 0; j
< len
; j
++)
2689 /* We allow sharing of ASM_OPERANDS inside single
2691 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2692 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2694 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2696 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2705 /* Reset used-flags for INSN. */
2708 reset_insn_used_flags (rtx insn
)
2710 gcc_assert (INSN_P (insn
));
2711 reset_used_flags (PATTERN (insn
));
2712 reset_used_flags (REG_NOTES (insn
));
2714 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2717 /* Go through all the RTL insn bodies and clear all the USED bits. */
2720 reset_all_used_flags (void)
2724 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2727 rtx pat
= PATTERN (p
);
2728 if (GET_CODE (pat
) != SEQUENCE
)
2729 reset_insn_used_flags (p
);
2732 gcc_assert (REG_NOTES (p
) == NULL
);
2733 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2735 rtx insn
= XVECEXP (pat
, 0, i
);
2737 reset_insn_used_flags (insn
);
2743 /* Verify sharing in INSN. */
2746 verify_insn_sharing (rtx insn
)
2748 gcc_assert (INSN_P (insn
));
2749 reset_used_flags (PATTERN (insn
));
2750 reset_used_flags (REG_NOTES (insn
));
2752 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2755 /* Go through all the RTL insn bodies and check that there is no unexpected
2756 sharing in between the subexpressions. */
2759 verify_rtl_sharing (void)
2763 timevar_push (TV_VERIFY_RTL_SHARING
);
2765 reset_all_used_flags ();
2767 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2770 rtx pat
= PATTERN (p
);
2771 if (GET_CODE (pat
) != SEQUENCE
)
2772 verify_insn_sharing (p
);
2774 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2776 rtx insn
= XVECEXP (pat
, 0, i
);
2778 verify_insn_sharing (insn
);
2782 reset_all_used_flags ();
2784 timevar_pop (TV_VERIFY_RTL_SHARING
);
2787 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2788 Assumes the mark bits are cleared at entry. */
2791 unshare_all_rtl_in_chain (rtx insn
)
2793 for (; insn
; insn
= NEXT_INSN (insn
))
2796 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2797 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2799 CALL_INSN_FUNCTION_USAGE (insn
)
2800 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2804 /* Go through all virtual stack slots of a function and mark them as
2805 shared. We never replace the DECL_RTLs themselves with a copy,
2806 but expressions mentioned into a DECL_RTL cannot be shared with
2807 expressions in the instruction stream.
2809 Note that reload may convert pseudo registers into memories in-place.
2810 Pseudo registers are always shared, but MEMs never are. Thus if we
2811 reset the used flags on MEMs in the instruction stream, we must set
2812 them again on MEMs that appear in DECL_RTLs. */
2815 set_used_decls (tree blk
)
2820 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2821 if (DECL_RTL_SET_P (t
))
2822 set_used_flags (DECL_RTL (t
));
2824 /* Now process sub-blocks. */
2825 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2829 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2830 Recursively does the same for subexpressions. Uses
2831 copy_rtx_if_shared_1 to reduce stack space. */
2834 copy_rtx_if_shared (rtx orig
)
2836 copy_rtx_if_shared_1 (&orig
);
2840 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2841 use. Recursively does the same for subexpressions. */
2844 copy_rtx_if_shared_1 (rtx
*orig1
)
2850 const char *format_ptr
;
2854 /* Repeat is used to turn tail-recursion into iteration. */
2861 code
= GET_CODE (x
);
2863 /* These types may be freely shared. */
2879 /* SCRATCH must be shared because they represent distinct values. */
2882 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2883 clobbers or clobbers of hard registers that originated as pseudos.
2884 This is needed to allow safe register renaming. */
2885 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2886 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2891 if (shared_const_p (x
))
2901 /* The chain of insns is not being copied. */
2908 /* This rtx may not be shared. If it has already been seen,
2909 replace it with a copy of itself. */
2911 if (RTX_FLAG (x
, used
))
2913 x
= shallow_copy_rtx (x
);
2916 RTX_FLAG (x
, used
) = 1;
2918 /* Now scan the subexpressions recursively.
2919 We can store any replaced subexpressions directly into X
2920 since we know X is not shared! Any vectors in X
2921 must be copied if X was copied. */
2923 format_ptr
= GET_RTX_FORMAT (code
);
2924 length
= GET_RTX_LENGTH (code
);
2927 for (i
= 0; i
< length
; i
++)
2929 switch (*format_ptr
++)
2933 copy_rtx_if_shared_1 (last_ptr
);
2934 last_ptr
= &XEXP (x
, i
);
2938 if (XVEC (x
, i
) != NULL
)
2941 int len
= XVECLEN (x
, i
);
2943 /* Copy the vector iff I copied the rtx and the length
2945 if (copied
&& len
> 0)
2946 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2948 /* Call recursively on all inside the vector. */
2949 for (j
= 0; j
< len
; j
++)
2952 copy_rtx_if_shared_1 (last_ptr
);
2953 last_ptr
= &XVECEXP (x
, i
, j
);
2968 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2971 mark_used_flags (rtx x
, int flag
)
2975 const char *format_ptr
;
2978 /* Repeat is used to turn tail-recursion into iteration. */
2983 code
= GET_CODE (x
);
2985 /* These types may be freely shared so we needn't do any resetting
3009 /* The chain of insns is not being copied. */
3016 RTX_FLAG (x
, used
) = flag
;
3018 format_ptr
= GET_RTX_FORMAT (code
);
3019 length
= GET_RTX_LENGTH (code
);
3021 for (i
= 0; i
< length
; i
++)
3023 switch (*format_ptr
++)
3031 mark_used_flags (XEXP (x
, i
), flag
);
3035 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3036 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
3042 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3043 to look for shared sub-parts. */
3046 reset_used_flags (rtx x
)
3048 mark_used_flags (x
, 0);
3051 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3052 to look for shared sub-parts. */
3055 set_used_flags (rtx x
)
3057 mark_used_flags (x
, 1);
3060 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3061 Return X or the rtx for the pseudo reg the value of X was copied into.
3062 OTHER must be valid as a SET_DEST. */
3065 make_safe_from (rtx x
, rtx other
)
3068 switch (GET_CODE (other
))
3071 other
= SUBREG_REG (other
);
3073 case STRICT_LOW_PART
:
3076 other
= XEXP (other
, 0);
3085 && GET_CODE (x
) != SUBREG
)
3087 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
3088 || reg_mentioned_p (other
, x
))))
3090 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3091 emit_move_insn (temp
, x
);
3097 /* Emission of insns (adding them to the doubly-linked list). */
3099 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3102 get_last_insn_anywhere (void)
3104 struct sequence_stack
*stack
;
3105 if (get_last_insn ())
3106 return get_last_insn ();
3107 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3108 if (stack
->last
!= 0)
3113 /* Return the first nonnote insn emitted in current sequence or current
3114 function. This routine looks inside SEQUENCEs. */
3117 get_first_nonnote_insn (void)
3119 rtx insn
= get_insns ();
3124 for (insn
= next_insn (insn
);
3125 insn
&& NOTE_P (insn
);
3126 insn
= next_insn (insn
))
3130 if (NONJUMP_INSN_P (insn
)
3131 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3132 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3139 /* Return the last nonnote insn emitted in current sequence or current
3140 function. This routine looks inside SEQUENCEs. */
3143 get_last_nonnote_insn (void)
3145 rtx insn
= get_last_insn ();
3150 for (insn
= previous_insn (insn
);
3151 insn
&& NOTE_P (insn
);
3152 insn
= previous_insn (insn
))
3156 if (NONJUMP_INSN_P (insn
)
3157 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3158 insn
= XVECEXP (PATTERN (insn
), 0,
3159 XVECLEN (PATTERN (insn
), 0) - 1);
3166 /* Return the number of actual (non-debug) insns emitted in this
3170 get_max_insn_count (void)
3172 int n
= cur_insn_uid
;
3174 /* The table size must be stable across -g, to avoid codegen
3175 differences due to debug insns, and not be affected by
3176 -fmin-insn-uid, to avoid excessive table size and to simplify
3177 debugging of -fcompare-debug failures. */
3178 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3179 n
-= cur_debug_insn_uid
;
3181 n
-= MIN_NONDEBUG_INSN_UID
;
3187 /* Return the next insn. If it is a SEQUENCE, return the first insn
3191 next_insn (rtx insn
)
3195 insn
= NEXT_INSN (insn
);
3196 if (insn
&& NONJUMP_INSN_P (insn
)
3197 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3198 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3201 return safe_as_a
<rtx_insn
*> (insn
);
3204 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3208 previous_insn (rtx insn
)
3212 insn
= PREV_INSN (insn
);
3213 if (insn
&& NONJUMP_INSN_P (insn
)
3214 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3215 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3218 return safe_as_a
<rtx_insn
*> (insn
);
3221 /* Return the next insn after INSN that is not a NOTE. This routine does not
3222 look inside SEQUENCEs. */
3225 next_nonnote_insn (rtx insn
)
3229 insn
= NEXT_INSN (insn
);
3230 if (insn
== 0 || !NOTE_P (insn
))
3234 return safe_as_a
<rtx_insn
*> (insn
);
3237 /* Return the next insn after INSN that is not a NOTE, but stop the
3238 search before we enter another basic block. This routine does not
3239 look inside SEQUENCEs. */
3242 next_nonnote_insn_bb (rtx insn
)
3246 insn
= NEXT_INSN (insn
);
3247 if (insn
== 0 || !NOTE_P (insn
))
3249 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3253 return safe_as_a
<rtx_insn
*> (insn
);
3256 /* Return the previous insn before INSN that is not a NOTE. This routine does
3257 not look inside SEQUENCEs. */
3260 prev_nonnote_insn (rtx insn
)
3264 insn
= PREV_INSN (insn
);
3265 if (insn
== 0 || !NOTE_P (insn
))
3269 return safe_as_a
<rtx_insn
*> (insn
);
3272 /* Return the previous insn before INSN that is not a NOTE, but stop
3273 the search before we enter another basic block. This routine does
3274 not look inside SEQUENCEs. */
3277 prev_nonnote_insn_bb (rtx insn
)
3281 insn
= PREV_INSN (insn
);
3282 if (insn
== 0 || !NOTE_P (insn
))
3284 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3288 return safe_as_a
<rtx_insn
*> (insn
);
3291 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3292 routine does not look inside SEQUENCEs. */
3295 next_nondebug_insn (rtx insn
)
3299 insn
= NEXT_INSN (insn
);
3300 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3304 return safe_as_a
<rtx_insn
*> (insn
);
3307 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3308 This routine does not look inside SEQUENCEs. */
3311 prev_nondebug_insn (rtx insn
)
3315 insn
= PREV_INSN (insn
);
3316 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3320 return safe_as_a
<rtx_insn
*> (insn
);
3323 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3324 This routine does not look inside SEQUENCEs. */
3327 next_nonnote_nondebug_insn (rtx insn
)
3331 insn
= NEXT_INSN (insn
);
3332 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3336 return safe_as_a
<rtx_insn
*> (insn
);
3339 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3340 This routine does not look inside SEQUENCEs. */
3343 prev_nonnote_nondebug_insn (rtx insn
)
3347 insn
= PREV_INSN (insn
);
3348 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3352 return safe_as_a
<rtx_insn
*> (insn
);
3355 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3356 or 0, if there is none. This routine does not look inside
3360 next_real_insn (rtx insn
)
3364 insn
= NEXT_INSN (insn
);
3365 if (insn
== 0 || INSN_P (insn
))
3369 return safe_as_a
<rtx_insn
*> (insn
);
3372 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3373 or 0, if there is none. This routine does not look inside
3377 prev_real_insn (rtx insn
)
3381 insn
= PREV_INSN (insn
);
3382 if (insn
== 0 || INSN_P (insn
))
3386 return safe_as_a
<rtx_insn
*> (insn
);
3389 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3390 This routine does not look inside SEQUENCEs. */
3393 last_call_insn (void)
3397 for (insn
= get_last_insn ();
3398 insn
&& !CALL_P (insn
);
3399 insn
= PREV_INSN (insn
))
3402 return safe_as_a
<rtx_call_insn
*> (insn
);
3405 /* Find the next insn after INSN that really does something. This routine
3406 does not look inside SEQUENCEs. After reload this also skips over
3407 standalone USE and CLOBBER insn. */
3410 active_insn_p (const_rtx insn
)
3412 return (CALL_P (insn
) || JUMP_P (insn
)
3413 || JUMP_TABLE_DATA_P (insn
) /* FIXME */
3414 || (NONJUMP_INSN_P (insn
)
3415 && (! reload_completed
3416 || (GET_CODE (PATTERN (insn
)) != USE
3417 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3421 next_active_insn (rtx insn
)
3425 insn
= NEXT_INSN (insn
);
3426 if (insn
== 0 || active_insn_p (insn
))
3430 return safe_as_a
<rtx_insn
*> (insn
);
3433 /* Find the last insn before INSN that really does something. This routine
3434 does not look inside SEQUENCEs. After reload this also skips over
3435 standalone USE and CLOBBER insn. */
3438 prev_active_insn (rtx insn
)
3442 insn
= PREV_INSN (insn
);
3443 if (insn
== 0 || active_insn_p (insn
))
3447 return safe_as_a
<rtx_insn
*> (insn
);
3451 /* Return the next insn that uses CC0 after INSN, which is assumed to
3452 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3453 applied to the result of this function should yield INSN).
3455 Normally, this is simply the next insn. However, if a REG_CC_USER note
3456 is present, it contains the insn that uses CC0.
3458 Return 0 if we can't find the insn. */
3461 next_cc0_user (rtx insn
)
3463 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3466 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3468 insn
= next_nonnote_insn (insn
);
3469 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3470 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3472 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3473 return safe_as_a
<rtx_insn
*> (insn
);
3478 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3479 note, it is the previous insn. */
3482 prev_cc0_setter (rtx insn
)
3484 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3487 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3489 insn
= prev_nonnote_insn (insn
);
3490 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3492 return safe_as_a
<rtx_insn
*> (insn
);
3497 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3500 find_auto_inc (rtx
*xp
, void *data
)
3503 rtx reg
= (rtx
) data
;
3505 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3508 switch (GET_CODE (x
))
3516 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3527 /* Increment the label uses for all labels present in rtx. */
3530 mark_label_nuses (rtx x
)
3536 code
= GET_CODE (x
);
3537 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3538 LABEL_NUSES (XEXP (x
, 0))++;
3540 fmt
= GET_RTX_FORMAT (code
);
3541 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3544 mark_label_nuses (XEXP (x
, i
));
3545 else if (fmt
[i
] == 'E')
3546 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3547 mark_label_nuses (XVECEXP (x
, i
, j
));
3552 /* Try splitting insns that can be split for better scheduling.
3553 PAT is the pattern which might split.
3554 TRIAL is the insn providing PAT.
3555 LAST is nonzero if we should return the last insn of the sequence produced.
3557 If this routine succeeds in splitting, it returns the first or last
3558 replacement insn depending on the value of LAST. Otherwise, it
3559 returns TRIAL. If the insn to be returned can be split, it will be. */
3562 try_split (rtx pat
, rtx trial
, int last
)
3564 rtx_insn
*before
= PREV_INSN (trial
);
3565 rtx_insn
*after
= NEXT_INSN (trial
);
3566 int has_barrier
= 0;
3569 rtx insn_last
, insn
;
3571 rtx call_insn
= NULL_RTX
;
3573 /* We're not good at redistributing frame information. */
3574 if (RTX_FRAME_RELATED_P (trial
))
3575 return as_a
<rtx_insn
*> (trial
);
3577 if (any_condjump_p (trial
)
3578 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3579 split_branch_probability
= XINT (note
, 0);
3580 probability
= split_branch_probability
;
3582 seq
= split_insns (pat
, trial
);
3584 split_branch_probability
= -1;
3586 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3587 We may need to handle this specially. */
3588 if (after
&& BARRIER_P (after
))
3591 after
= NEXT_INSN (after
);
3595 return as_a
<rtx_insn
*> (trial
);
3597 /* Avoid infinite loop if any insn of the result matches
3598 the original pattern. */
3602 if (INSN_P (insn_last
)
3603 && rtx_equal_p (PATTERN (insn_last
), pat
))
3604 return as_a
<rtx_insn
*> (trial
);
3605 if (!NEXT_INSN (insn_last
))
3607 insn_last
= NEXT_INSN (insn_last
);
3610 /* We will be adding the new sequence to the function. The splitters
3611 may have introduced invalid RTL sharing, so unshare the sequence now. */
3612 unshare_all_rtl_in_chain (seq
);
3614 /* Mark labels and copy flags. */
3615 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3620 CROSSING_JUMP_P (insn
) = CROSSING_JUMP_P (trial
);
3621 mark_jump_label (PATTERN (insn
), insn
, 0);
3623 if (probability
!= -1
3624 && any_condjump_p (insn
)
3625 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3627 /* We can preserve the REG_BR_PROB notes only if exactly
3628 one jump is created, otherwise the machine description
3629 is responsible for this step using
3630 split_branch_probability variable. */
3631 gcc_assert (njumps
== 1);
3632 add_int_reg_note (insn
, REG_BR_PROB
, probability
);
3637 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3638 in SEQ and copy any additional information across. */
3641 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3646 gcc_assert (call_insn
== NULL_RTX
);
3649 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3650 target may have explicitly specified. */
3651 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3654 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3656 /* If the old call was a sibling call, the new one must
3658 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3660 /* If the new call is the last instruction in the sequence,
3661 it will effectively replace the old call in-situ. Otherwise
3662 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3663 so that it comes immediately after the new call. */
3664 if (NEXT_INSN (insn
))
3665 for (next
= NEXT_INSN (trial
);
3666 next
&& NOTE_P (next
);
3667 next
= NEXT_INSN (next
))
3668 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3671 add_insn_after (next
, insn
, NULL
);
3677 /* Copy notes, particularly those related to the CFG. */
3678 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3680 switch (REG_NOTE_KIND (note
))
3683 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3689 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3692 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3696 case REG_NON_LOCAL_GOTO
:
3697 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3700 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3706 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3708 rtx reg
= XEXP (note
, 0);
3709 if (!FIND_REG_INC_NOTE (insn
, reg
)
3710 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3711 add_reg_note (insn
, REG_INC
, reg
);
3717 fixup_args_size_notes (NULL_RTX
, insn_last
, INTVAL (XEXP (note
, 0)));
3721 gcc_assert (call_insn
!= NULL_RTX
);
3722 add_reg_note (call_insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3730 /* If there are LABELS inside the split insns increment the
3731 usage count so we don't delete the label. */
3735 while (insn
!= NULL_RTX
)
3737 /* JUMP_P insns have already been "marked" above. */
3738 if (NONJUMP_INSN_P (insn
))
3739 mark_label_nuses (PATTERN (insn
));
3741 insn
= PREV_INSN (insn
);
3745 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3747 delete_insn (trial
);
3749 emit_barrier_after (tem
);
3751 /* Recursively call try_split for each new insn created; by the
3752 time control returns here that insn will be fully split, so
3753 set LAST and continue from the insn after the one returned.
3754 We can't use next_active_insn here since AFTER may be a note.
3755 Ignore deleted insns, which can be occur if not optimizing. */
3756 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3757 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3758 tem
= try_split (PATTERN (tem
), tem
, 1);
3760 /* Return either the first or the last insn, depending on which was
3763 ? (after
? PREV_INSN (after
) : get_last_insn ())
3764 : NEXT_INSN (before
);
3767 /* Make and return an INSN rtx, initializing all its slots.
3768 Store PATTERN in the pattern slots. */
3771 make_insn_raw (rtx pattern
)
3775 insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
3777 INSN_UID (insn
) = cur_insn_uid
++;
3778 PATTERN (insn
) = pattern
;
3779 INSN_CODE (insn
) = -1;
3780 REG_NOTES (insn
) = NULL
;
3781 INSN_LOCATION (insn
) = curr_insn_location ();
3782 BLOCK_FOR_INSN (insn
) = NULL
;
3784 #ifdef ENABLE_RTL_CHECKING
3787 && (returnjump_p (insn
)
3788 || (GET_CODE (insn
) == SET
3789 && SET_DEST (insn
) == pc_rtx
)))
3791 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3799 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3802 make_debug_insn_raw (rtx pattern
)
3804 rtx_debug_insn
*insn
;
3806 insn
= as_a
<rtx_debug_insn
*> (rtx_alloc (DEBUG_INSN
));
3807 INSN_UID (insn
) = cur_debug_insn_uid
++;
3808 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3809 INSN_UID (insn
) = cur_insn_uid
++;
3811 PATTERN (insn
) = pattern
;
3812 INSN_CODE (insn
) = -1;
3813 REG_NOTES (insn
) = NULL
;
3814 INSN_LOCATION (insn
) = curr_insn_location ();
3815 BLOCK_FOR_INSN (insn
) = NULL
;
3820 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3823 make_jump_insn_raw (rtx pattern
)
3825 rtx_jump_insn
*insn
;
3827 insn
= as_a
<rtx_jump_insn
*> (rtx_alloc (JUMP_INSN
));
3828 INSN_UID (insn
) = cur_insn_uid
++;
3830 PATTERN (insn
) = pattern
;
3831 INSN_CODE (insn
) = -1;
3832 REG_NOTES (insn
) = NULL
;
3833 JUMP_LABEL (insn
) = NULL
;
3834 INSN_LOCATION (insn
) = curr_insn_location ();
3835 BLOCK_FOR_INSN (insn
) = NULL
;
3840 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3843 make_call_insn_raw (rtx pattern
)
3845 rtx_call_insn
*insn
;
3847 insn
= as_a
<rtx_call_insn
*> (rtx_alloc (CALL_INSN
));
3848 INSN_UID (insn
) = cur_insn_uid
++;
3850 PATTERN (insn
) = pattern
;
3851 INSN_CODE (insn
) = -1;
3852 REG_NOTES (insn
) = NULL
;
3853 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3854 INSN_LOCATION (insn
) = curr_insn_location ();
3855 BLOCK_FOR_INSN (insn
) = NULL
;
3860 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3863 make_note_raw (enum insn_note subtype
)
3865 /* Some notes are never created this way at all. These notes are
3866 only created by patching out insns. */
3867 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3868 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3870 rtx_note
*note
= as_a
<rtx_note
*> (rtx_alloc (NOTE
));
3871 INSN_UID (note
) = cur_insn_uid
++;
3872 NOTE_KIND (note
) = subtype
;
3873 BLOCK_FOR_INSN (note
) = NULL
;
3874 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3878 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3879 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3880 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3883 link_insn_into_chain (rtx_insn
*insn
, rtx_insn
*prev
, rtx_insn
*next
)
3885 SET_PREV_INSN (insn
) = prev
;
3886 SET_NEXT_INSN (insn
) = next
;
3889 SET_NEXT_INSN (prev
) = insn
;
3890 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3892 rtx sequence
= PATTERN (prev
);
3893 SET_NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3898 SET_PREV_INSN (next
) = insn
;
3899 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3900 SET_PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3903 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3905 rtx sequence
= PATTERN (insn
);
3906 SET_PREV_INSN (XVECEXP (sequence
, 0, 0)) = prev
;
3907 SET_NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3911 /* Add INSN to the end of the doubly-linked list.
3912 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3915 add_insn (rtx_insn
*insn
)
3917 rtx_insn
*prev
= get_last_insn ();
3918 link_insn_into_chain (insn
, prev
, NULL
);
3919 if (NULL
== get_insns ())
3920 set_first_insn (insn
);
3921 set_last_insn (insn
);
3924 /* Add INSN into the doubly-linked list after insn AFTER. */
3927 add_insn_after_nobb (rtx_insn
*insn
, rtx_insn
*after
)
3929 rtx_insn
*next
= NEXT_INSN (after
);
3931 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3933 link_insn_into_chain (insn
, after
, next
);
3937 if (get_last_insn () == after
)
3938 set_last_insn (insn
);
3941 struct sequence_stack
*stack
= seq_stack
;
3942 /* Scan all pending sequences too. */
3943 for (; stack
; stack
= stack
->next
)
3944 if (after
== stack
->last
)
3953 /* Add INSN into the doubly-linked list before insn BEFORE. */
3956 add_insn_before_nobb (rtx_insn
*insn
, rtx_insn
*before
)
3958 rtx_insn
*prev
= PREV_INSN (before
);
3960 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3962 link_insn_into_chain (insn
, prev
, before
);
3966 if (get_insns () == before
)
3967 set_first_insn (insn
);
3970 struct sequence_stack
*stack
= seq_stack
;
3971 /* Scan all pending sequences too. */
3972 for (; stack
; stack
= stack
->next
)
3973 if (before
== stack
->first
)
3975 stack
->first
= insn
;
3984 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
3985 If BB is NULL, an attempt is made to infer the bb from before.
3987 This and the next function should be the only functions called
3988 to insert an insn once delay slots have been filled since only
3989 they know how to update a SEQUENCE. */
3992 add_insn_after (rtx uncast_insn
, rtx uncast_after
, basic_block bb
)
3994 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
3995 rtx_insn
*after
= as_a
<rtx_insn
*> (uncast_after
);
3996 add_insn_after_nobb (insn
, after
);
3997 if (!BARRIER_P (after
)
3998 && !BARRIER_P (insn
)
3999 && (bb
= BLOCK_FOR_INSN (after
)))
4001 set_block_for_insn (insn
, bb
);
4003 df_insn_rescan (insn
);
4004 /* Should not happen as first in the BB is always
4005 either NOTE or LABEL. */
4006 if (BB_END (bb
) == after
4007 /* Avoid clobbering of structure when creating new BB. */
4008 && !BARRIER_P (insn
)
4009 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
4014 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4015 If BB is NULL, an attempt is made to infer the bb from before.
4017 This and the previous function should be the only functions called
4018 to insert an insn once delay slots have been filled since only
4019 they know how to update a SEQUENCE. */
4022 add_insn_before (rtx uncast_insn
, rtx uncast_before
, basic_block bb
)
4024 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4025 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4026 add_insn_before_nobb (insn
, before
);
4029 && !BARRIER_P (before
)
4030 && !BARRIER_P (insn
))
4031 bb
= BLOCK_FOR_INSN (before
);
4035 set_block_for_insn (insn
, bb
);
4037 df_insn_rescan (insn
);
4038 /* Should not happen as first in the BB is always either NOTE or
4040 gcc_assert (BB_HEAD (bb
) != insn
4041 /* Avoid clobbering of structure when creating new BB. */
4043 || NOTE_INSN_BASIC_BLOCK_P (insn
));
4047 /* Replace insn with an deleted instruction note. */
4050 set_insn_deleted (rtx insn
)
4053 df_insn_delete (as_a
<rtx_insn
*> (insn
));
4054 PUT_CODE (insn
, NOTE
);
4055 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
4059 /* Unlink INSN from the insn chain.
4061 This function knows how to handle sequences.
4063 This function does not invalidate data flow information associated with
4064 INSN (i.e. does not call df_insn_delete). That makes this function
4065 usable for only disconnecting an insn from the chain, and re-emit it
4068 To later insert INSN elsewhere in the insn chain via add_insn and
4069 similar functions, PREV_INSN and NEXT_INSN must be nullified by
4070 the caller. Nullifying them here breaks many insn chain walks.
4072 To really delete an insn and related DF information, use delete_insn. */
4075 remove_insn (rtx insn
)
4077 rtx_insn
*next
= NEXT_INSN (insn
);
4078 rtx_insn
*prev
= PREV_INSN (insn
);
4083 SET_NEXT_INSN (prev
) = next
;
4084 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
4086 rtx sequence
= PATTERN (prev
);
4087 SET_NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
4090 else if (get_insns () == insn
)
4093 SET_PREV_INSN (next
) = NULL
;
4094 set_first_insn (next
);
4098 struct sequence_stack
*stack
= seq_stack
;
4099 /* Scan all pending sequences too. */
4100 for (; stack
; stack
= stack
->next
)
4101 if (insn
== stack
->first
)
4103 stack
->first
= next
;
4112 SET_PREV_INSN (next
) = prev
;
4113 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
4114 SET_PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
4116 else if (get_last_insn () == insn
)
4117 set_last_insn (prev
);
4120 struct sequence_stack
*stack
= seq_stack
;
4121 /* Scan all pending sequences too. */
4122 for (; stack
; stack
= stack
->next
)
4123 if (insn
== stack
->last
)
4132 /* Fix up basic block boundaries, if necessary. */
4133 if (!BARRIER_P (insn
)
4134 && (bb
= BLOCK_FOR_INSN (insn
)))
4136 if (BB_HEAD (bb
) == insn
)
4138 /* Never ever delete the basic block note without deleting whole
4140 gcc_assert (!NOTE_P (insn
));
4141 BB_HEAD (bb
) = next
;
4143 if (BB_END (bb
) == insn
)
4148 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4151 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4153 gcc_assert (call_insn
&& CALL_P (call_insn
));
4155 /* Put the register usage information on the CALL. If there is already
4156 some usage information, put ours at the end. */
4157 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4161 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4162 link
= XEXP (link
, 1))
4165 XEXP (link
, 1) = call_fusage
;
4168 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4171 /* Delete all insns made since FROM.
4172 FROM becomes the new last instruction. */
4175 delete_insns_since (rtx_insn
*from
)
4180 SET_NEXT_INSN (from
) = 0;
4181 set_last_insn (from
);
4184 /* This function is deprecated, please use sequences instead.
4186 Move a consecutive bunch of insns to a different place in the chain.
4187 The insns to be moved are those between FROM and TO.
4188 They are moved to a new position after the insn AFTER.
4189 AFTER must not be FROM or TO or any insn in between.
4191 This function does not know about SEQUENCEs and hence should not be
4192 called after delay-slot filling has been done. */
4195 reorder_insns_nobb (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4197 #ifdef ENABLE_CHECKING
4199 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4200 gcc_assert (after
!= x
);
4201 gcc_assert (after
!= to
);
4204 /* Splice this bunch out of where it is now. */
4205 if (PREV_INSN (from
))
4206 SET_NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4208 SET_PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4209 if (get_last_insn () == to
)
4210 set_last_insn (PREV_INSN (from
));
4211 if (get_insns () == from
)
4212 set_first_insn (NEXT_INSN (to
));
4214 /* Make the new neighbors point to it and it to them. */
4215 if (NEXT_INSN (after
))
4216 SET_PREV_INSN (NEXT_INSN (after
)) = to
;
4218 SET_NEXT_INSN (to
) = NEXT_INSN (after
);
4219 SET_PREV_INSN (from
) = after
;
4220 SET_NEXT_INSN (after
) = from
;
4221 if (after
== get_last_insn ())
4225 /* Same as function above, but take care to update BB boundaries. */
4227 reorder_insns (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4229 rtx_insn
*prev
= PREV_INSN (from
);
4230 basic_block bb
, bb2
;
4232 reorder_insns_nobb (from
, to
, after
);
4234 if (!BARRIER_P (after
)
4235 && (bb
= BLOCK_FOR_INSN (after
)))
4238 df_set_bb_dirty (bb
);
4240 if (!BARRIER_P (from
)
4241 && (bb2
= BLOCK_FOR_INSN (from
)))
4243 if (BB_END (bb2
) == to
)
4244 BB_END (bb2
) = prev
;
4245 df_set_bb_dirty (bb2
);
4248 if (BB_END (bb
) == after
)
4251 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4253 df_insn_change_bb (x
, bb
);
4258 /* Emit insn(s) of given code and pattern
4259 at a specified place within the doubly-linked list.
4261 All of the emit_foo global entry points accept an object
4262 X which is either an insn list or a PATTERN of a single
4265 There are thus a few canonical ways to generate code and
4266 emit it at a specific place in the instruction stream. For
4267 example, consider the instruction named SPOT and the fact that
4268 we would like to emit some instructions before SPOT. We might
4272 ... emit the new instructions ...
4273 insns_head = get_insns ();
4276 emit_insn_before (insns_head, SPOT);
4278 It used to be common to generate SEQUENCE rtl instead, but that
4279 is a relic of the past which no longer occurs. The reason is that
4280 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4281 generated would almost certainly die right after it was created. */
4284 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4285 rtx_insn
*(*make_raw
) (rtx
))
4289 gcc_assert (before
);
4292 return safe_as_a
<rtx_insn
*> (last
);
4294 switch (GET_CODE (x
))
4303 insn
= as_a
<rtx_insn
*> (x
);
4306 rtx_insn
*next
= NEXT_INSN (insn
);
4307 add_insn_before (insn
, before
, bb
);
4313 #ifdef ENABLE_RTL_CHECKING
4320 last
= (*make_raw
) (x
);
4321 add_insn_before (last
, before
, bb
);
4325 return safe_as_a
<rtx_insn
*> (last
);
4328 /* Make X be output before the instruction BEFORE. */
4331 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
4333 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4336 /* Make an instruction with body X and code JUMP_INSN
4337 and output it before the instruction BEFORE. */
4340 emit_jump_insn_before_noloc (rtx x
, rtx before
)
4342 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4343 make_jump_insn_raw
);
4346 /* Make an instruction with body X and code CALL_INSN
4347 and output it before the instruction BEFORE. */
4350 emit_call_insn_before_noloc (rtx x
, rtx before
)
4352 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4353 make_call_insn_raw
);
4356 /* Make an instruction with body X and code DEBUG_INSN
4357 and output it before the instruction BEFORE. */
4360 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4362 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4363 make_debug_insn_raw
);
4366 /* Make an insn of code BARRIER
4367 and output it before the insn BEFORE. */
4370 emit_barrier_before (rtx before
)
4372 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4374 INSN_UID (insn
) = cur_insn_uid
++;
4376 add_insn_before (insn
, before
, NULL
);
4380 /* Emit the label LABEL before the insn BEFORE. */
4383 emit_label_before (rtx label
, rtx before
)
4385 gcc_checking_assert (INSN_UID (label
) == 0);
4386 INSN_UID (label
) = cur_insn_uid
++;
4387 add_insn_before (label
, before
, NULL
);
4388 return as_a
<rtx_insn
*> (label
);
4391 /* Helper for emit_insn_after, handles lists of instructions
4395 emit_insn_after_1 (rtx_insn
*first
, rtx after
, basic_block bb
)
4398 rtx_insn
*after_after
;
4399 if (!bb
&& !BARRIER_P (after
))
4400 bb
= BLOCK_FOR_INSN (after
);
4404 df_set_bb_dirty (bb
);
4405 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4406 if (!BARRIER_P (last
))
4408 set_block_for_insn (last
, bb
);
4409 df_insn_rescan (last
);
4411 if (!BARRIER_P (last
))
4413 set_block_for_insn (last
, bb
);
4414 df_insn_rescan (last
);
4416 if (BB_END (bb
) == after
)
4420 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4423 after_after
= NEXT_INSN (after
);
4425 SET_NEXT_INSN (after
) = first
;
4426 SET_PREV_INSN (first
) = after
;
4427 SET_NEXT_INSN (last
) = after_after
;
4429 SET_PREV_INSN (after_after
) = last
;
4431 if (after
== get_last_insn ())
4432 set_last_insn (last
);
4438 emit_pattern_after_noloc (rtx x
, rtx after
, basic_block bb
,
4439 rtx_insn
*(*make_raw
)(rtx
))
4446 return safe_as_a
<rtx_insn
*> (last
);
4448 switch (GET_CODE (x
))
4457 last
= emit_insn_after_1 (as_a
<rtx_insn
*> (x
), after
, bb
);
4460 #ifdef ENABLE_RTL_CHECKING
4467 last
= (*make_raw
) (x
);
4468 add_insn_after (last
, after
, bb
);
4472 return safe_as_a
<rtx_insn
*> (last
);
4475 /* Make X be output after the insn AFTER and set the BB of insn. If
4476 BB is NULL, an attempt is made to infer the BB from AFTER. */
4479 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4481 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4485 /* Make an insn of code JUMP_INSN with body X
4486 and output it after the insn AFTER. */
4489 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4491 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4494 /* Make an instruction with body X and code CALL_INSN
4495 and output it after the instruction AFTER. */
4498 emit_call_insn_after_noloc (rtx x
, rtx after
)
4500 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4503 /* Make an instruction with body X and code CALL_INSN
4504 and output it after the instruction AFTER. */
4507 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4509 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4512 /* Make an insn of code BARRIER
4513 and output it after the insn AFTER. */
4516 emit_barrier_after (rtx after
)
4518 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4520 INSN_UID (insn
) = cur_insn_uid
++;
4522 add_insn_after (insn
, after
, NULL
);
4526 /* Emit the label LABEL after the insn AFTER. */
4529 emit_label_after (rtx label
, rtx after
)
4531 gcc_checking_assert (INSN_UID (label
) == 0);
4532 INSN_UID (label
) = cur_insn_uid
++;
4533 add_insn_after (label
, after
, NULL
);
4534 return as_a
<rtx_insn
*> (label
);
4537 /* Notes require a bit of special handling: Some notes need to have their
4538 BLOCK_FOR_INSN set, others should never have it set, and some should
4539 have it set or clear depending on the context. */
4541 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4542 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4543 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4546 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4550 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4551 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4554 /* Notes for var tracking and EH region markers can appear between or
4555 inside basic blocks. If the caller is emitting on the basic block
4556 boundary, do not set BLOCK_FOR_INSN on the new note. */
4557 case NOTE_INSN_VAR_LOCATION
:
4558 case NOTE_INSN_CALL_ARG_LOCATION
:
4559 case NOTE_INSN_EH_REGION_BEG
:
4560 case NOTE_INSN_EH_REGION_END
:
4561 return on_bb_boundary_p
;
4563 /* Otherwise, BLOCK_FOR_INSN must be set. */
4569 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4572 emit_note_after (enum insn_note subtype
, rtx uncast_after
)
4574 rtx_insn
*after
= as_a
<rtx_insn
*> (uncast_after
);
4575 rtx_note
*note
= make_note_raw (subtype
);
4576 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4577 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4579 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4580 add_insn_after_nobb (note
, after
);
4582 add_insn_after (note
, after
, bb
);
4586 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4589 emit_note_before (enum insn_note subtype
, rtx uncast_before
)
4591 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4592 rtx_note
*note
= make_note_raw (subtype
);
4593 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4594 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4596 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4597 add_insn_before_nobb (note
, before
);
4599 add_insn_before (note
, before
, bb
);
4603 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4604 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4607 emit_pattern_after_setloc (rtx pattern
, rtx after
, int loc
,
4608 rtx_insn
*(*make_raw
) (rtx
))
4610 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4612 if (pattern
== NULL_RTX
|| !loc
)
4613 return safe_as_a
<rtx_insn
*> (last
);
4615 after
= NEXT_INSN (after
);
4618 if (active_insn_p (after
) && !INSN_LOCATION (after
))
4619 INSN_LOCATION (after
) = loc
;
4622 after
= NEXT_INSN (after
);
4624 return safe_as_a
<rtx_insn
*> (last
);
4627 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4628 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4632 emit_pattern_after (rtx pattern
, rtx after
, bool skip_debug_insns
,
4633 rtx_insn
*(*make_raw
) (rtx
))
4637 if (skip_debug_insns
)
4638 while (DEBUG_INSN_P (prev
))
4639 prev
= PREV_INSN (prev
);
4642 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4645 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4648 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4650 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4652 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4655 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4657 emit_insn_after (rtx pattern
, rtx after
)
4659 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4662 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4664 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4666 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4669 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4671 emit_jump_insn_after (rtx pattern
, rtx after
)
4673 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4676 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4678 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4680 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4683 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4685 emit_call_insn_after (rtx pattern
, rtx after
)
4687 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4690 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4692 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4694 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4697 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4699 emit_debug_insn_after (rtx pattern
, rtx after
)
4701 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4704 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4705 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4706 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4710 emit_pattern_before_setloc (rtx pattern
, rtx before
, int loc
, bool insnp
,
4711 rtx_insn
*(*make_raw
) (rtx
))
4713 rtx first
= PREV_INSN (before
);
4714 rtx last
= emit_pattern_before_noloc (pattern
, before
,
4715 insnp
? before
: NULL_RTX
,
4718 if (pattern
== NULL_RTX
|| !loc
)
4719 return safe_as_a
<rtx_insn
*> (last
);
4722 first
= get_insns ();
4724 first
= NEXT_INSN (first
);
4727 if (active_insn_p (first
) && !INSN_LOCATION (first
))
4728 INSN_LOCATION (first
) = loc
;
4731 first
= NEXT_INSN (first
);
4733 return safe_as_a
<rtx_insn
*> (last
);
4736 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4737 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4738 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4739 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4742 emit_pattern_before (rtx pattern
, rtx before
, bool skip_debug_insns
,
4743 bool insnp
, rtx_insn
*(*make_raw
) (rtx
))
4747 if (skip_debug_insns
)
4748 while (DEBUG_INSN_P (next
))
4749 next
= PREV_INSN (next
);
4752 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4755 return emit_pattern_before_noloc (pattern
, before
,
4756 insnp
? before
: NULL_RTX
,
4760 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4762 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4764 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4768 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4770 emit_insn_before (rtx pattern
, rtx before
)
4772 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4775 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4777 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4779 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4780 make_jump_insn_raw
);
4783 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4785 emit_jump_insn_before (rtx pattern
, rtx before
)
4787 return emit_pattern_before (pattern
, before
, true, false,
4788 make_jump_insn_raw
);
4791 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4793 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4795 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4796 make_call_insn_raw
);
4799 /* Like emit_call_insn_before_noloc,
4800 but set insn_location according to BEFORE. */
4802 emit_call_insn_before (rtx pattern
, rtx before
)
4804 return emit_pattern_before (pattern
, before
, true, false,
4805 make_call_insn_raw
);
4808 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4810 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4812 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4813 make_debug_insn_raw
);
4816 /* Like emit_debug_insn_before_noloc,
4817 but set insn_location according to BEFORE. */
4819 emit_debug_insn_before (rtx pattern
, rtx before
)
4821 return emit_pattern_before (pattern
, before
, false, false,
4822 make_debug_insn_raw
);
4825 /* Take X and emit it at the end of the doubly-linked
4828 Returns the last insn emitted. */
4833 rtx_insn
*last
= get_last_insn ();
4839 switch (GET_CODE (x
))
4848 insn
= as_a
<rtx_insn
*> (x
);
4851 rtx_insn
*next
= NEXT_INSN (insn
);
4858 #ifdef ENABLE_RTL_CHECKING
4859 case JUMP_TABLE_DATA
:
4866 last
= make_insn_raw (x
);
4874 /* Make an insn of code DEBUG_INSN with pattern X
4875 and add it to the end of the doubly-linked list. */
4878 emit_debug_insn (rtx x
)
4880 rtx_insn
*last
= get_last_insn ();
4886 switch (GET_CODE (x
))
4895 insn
= as_a
<rtx_insn
*> (x
);
4898 rtx_insn
*next
= NEXT_INSN (insn
);
4905 #ifdef ENABLE_RTL_CHECKING
4906 case JUMP_TABLE_DATA
:
4913 last
= make_debug_insn_raw (x
);
4921 /* Make an insn of code JUMP_INSN with pattern X
4922 and add it to the end of the doubly-linked list. */
4925 emit_jump_insn (rtx x
)
4927 rtx_insn
*last
= NULL
;
4930 switch (GET_CODE (x
))
4939 insn
= as_a
<rtx_insn
*> (x
);
4942 rtx_insn
*next
= NEXT_INSN (insn
);
4949 #ifdef ENABLE_RTL_CHECKING
4950 case JUMP_TABLE_DATA
:
4957 last
= make_jump_insn_raw (x
);
4965 /* Make an insn of code CALL_INSN with pattern X
4966 and add it to the end of the doubly-linked list. */
4969 emit_call_insn (rtx x
)
4973 switch (GET_CODE (x
))
4982 insn
= emit_insn (x
);
4985 #ifdef ENABLE_RTL_CHECKING
4987 case JUMP_TABLE_DATA
:
4993 insn
= make_call_insn_raw (x
);
5001 /* Add the label LABEL to the end of the doubly-linked list. */
5004 emit_label (rtx label
)
5006 gcc_checking_assert (INSN_UID (label
) == 0);
5007 INSN_UID (label
) = cur_insn_uid
++;
5008 add_insn (as_a
<rtx_insn
*> (label
));
5009 return as_a
<rtx_insn
*> (label
);
5012 /* Make an insn of code JUMP_TABLE_DATA
5013 and add it to the end of the doubly-linked list. */
5015 rtx_jump_table_data
*
5016 emit_jump_table_data (rtx table
)
5018 rtx_jump_table_data
*jump_table_data
=
5019 as_a
<rtx_jump_table_data
*> (rtx_alloc (JUMP_TABLE_DATA
));
5020 INSN_UID (jump_table_data
) = cur_insn_uid
++;
5021 PATTERN (jump_table_data
) = table
;
5022 BLOCK_FOR_INSN (jump_table_data
) = NULL
;
5023 add_insn (jump_table_data
);
5024 return jump_table_data
;
5027 /* Make an insn of code BARRIER
5028 and add it to the end of the doubly-linked list. */
5033 rtx_barrier
*barrier
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
5034 INSN_UID (barrier
) = cur_insn_uid
++;
5039 /* Emit a copy of note ORIG. */
5042 emit_note_copy (rtx_note
*orig
)
5044 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
5045 rtx_note
*note
= make_note_raw (kind
);
5046 NOTE_DATA (note
) = NOTE_DATA (orig
);
5051 /* Make an insn of code NOTE or type NOTE_NO
5052 and add it to the end of the doubly-linked list. */
5055 emit_note (enum insn_note kind
)
5057 rtx_note
*note
= make_note_raw (kind
);
5062 /* Emit a clobber of lvalue X. */
5065 emit_clobber (rtx x
)
5067 /* CONCATs should not appear in the insn stream. */
5068 if (GET_CODE (x
) == CONCAT
)
5070 emit_clobber (XEXP (x
, 0));
5071 return emit_clobber (XEXP (x
, 1));
5073 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
5076 /* Return a sequence of insns to clobber lvalue X. */
5090 /* Emit a use of rvalue X. */
5095 /* CONCATs should not appear in the insn stream. */
5096 if (GET_CODE (x
) == CONCAT
)
5098 emit_use (XEXP (x
, 0));
5099 return emit_use (XEXP (x
, 1));
5101 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
5104 /* Return a sequence of insns to use rvalue X. */
5118 /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5119 Return the set in INSN that such notes describe, or NULL if the notes
5120 have no meaning for INSN. */
5123 set_for_reg_notes (rtx insn
)
5130 pat
= PATTERN (insn
);
5131 if (GET_CODE (pat
) == PARALLEL
)
5133 /* We do not use single_set because that ignores SETs of unused
5134 registers. REG_EQUAL and REG_EQUIV notes really do require the
5135 PARALLEL to have a single SET. */
5136 if (multiple_sets (insn
))
5138 pat
= XVECEXP (pat
, 0, 0);
5141 if (GET_CODE (pat
) != SET
)
5144 reg
= SET_DEST (pat
);
5146 /* Notes apply to the contents of a STRICT_LOW_PART. */
5147 if (GET_CODE (reg
) == STRICT_LOW_PART
)
5148 reg
= XEXP (reg
, 0);
5150 /* Check that we have a register. */
5151 if (!(REG_P (reg
) || GET_CODE (reg
) == SUBREG
))
5157 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5158 note of this type already exists, remove it first. */
5161 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5163 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5169 if (!set_for_reg_notes (insn
))
5172 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5173 It serves no useful purpose and breaks eliminate_regs. */
5174 if (GET_CODE (datum
) == ASM_OPERANDS
)
5183 XEXP (note
, 0) = datum
;
5186 add_reg_note (insn
, kind
, datum
);
5187 note
= REG_NOTES (insn
);
5194 df_notes_rescan (as_a
<rtx_insn
*> (insn
));
5203 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5205 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5207 rtx set
= set_for_reg_notes (insn
);
5209 if (set
&& SET_DEST (set
) == dst
)
5210 return set_unique_reg_note (insn
, kind
, datum
);
5214 /* Return an indication of which type of insn should have X as a body.
5215 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5217 static enum rtx_code
5218 classify_insn (rtx x
)
5222 if (GET_CODE (x
) == CALL
)
5224 if (ANY_RETURN_P (x
))
5226 if (GET_CODE (x
) == SET
)
5228 if (SET_DEST (x
) == pc_rtx
)
5230 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5235 if (GET_CODE (x
) == PARALLEL
)
5238 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5239 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5241 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5242 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5244 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5245 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5251 /* Emit the rtl pattern X as an appropriate kind of insn.
5252 If X is a label, it is simply added into the insn chain. */
5257 enum rtx_code code
= classify_insn (x
);
5262 return emit_label (x
);
5264 return emit_insn (x
);
5267 rtx_insn
*insn
= emit_jump_insn (x
);
5268 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5269 return emit_barrier ();
5273 return emit_call_insn (x
);
5275 return emit_debug_insn (x
);
5281 /* Space for free sequence stack entries. */
5282 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5284 /* Begin emitting insns to a sequence. If this sequence will contain
5285 something that might cause the compiler to pop arguments to function
5286 calls (because those pops have previously been deferred; see
5287 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5288 before calling this function. That will ensure that the deferred
5289 pops are not accidentally emitted in the middle of this sequence. */
5292 start_sequence (void)
5294 struct sequence_stack
*tem
;
5296 if (free_sequence_stack
!= NULL
)
5298 tem
= free_sequence_stack
;
5299 free_sequence_stack
= tem
->next
;
5302 tem
= ggc_alloc
<sequence_stack
> ();
5304 tem
->next
= seq_stack
;
5305 tem
->first
= get_insns ();
5306 tem
->last
= get_last_insn ();
5314 /* Set up the insn chain starting with FIRST as the current sequence,
5315 saving the previously current one. See the documentation for
5316 start_sequence for more information about how to use this function. */
5319 push_to_sequence (rtx_insn
*first
)
5325 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5328 set_first_insn (first
);
5329 set_last_insn (last
);
5332 /* Like push_to_sequence, but take the last insn as an argument to avoid
5333 looping through the list. */
5336 push_to_sequence2 (rtx_insn
*first
, rtx_insn
*last
)
5340 set_first_insn (first
);
5341 set_last_insn (last
);
5344 /* Set up the outer-level insn chain
5345 as the current sequence, saving the previously current one. */
5348 push_topmost_sequence (void)
5350 struct sequence_stack
*stack
, *top
= NULL
;
5354 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5357 set_first_insn (top
->first
);
5358 set_last_insn (top
->last
);
5361 /* After emitting to the outer-level insn chain, update the outer-level
5362 insn chain, and restore the previous saved state. */
5365 pop_topmost_sequence (void)
5367 struct sequence_stack
*stack
, *top
= NULL
;
5369 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5372 top
->first
= get_insns ();
5373 top
->last
= get_last_insn ();
5378 /* After emitting to a sequence, restore previous saved state.
5380 To get the contents of the sequence just made, you must call
5381 `get_insns' *before* calling here.
5383 If the compiler might have deferred popping arguments while
5384 generating this sequence, and this sequence will not be immediately
5385 inserted into the instruction stream, use do_pending_stack_adjust
5386 before calling get_insns. That will ensure that the deferred
5387 pops are inserted into this sequence, and not into some random
5388 location in the instruction stream. See INHIBIT_DEFER_POP for more
5389 information about deferred popping of arguments. */
5394 struct sequence_stack
*tem
= seq_stack
;
5396 set_first_insn (tem
->first
);
5397 set_last_insn (tem
->last
);
5398 seq_stack
= tem
->next
;
5400 memset (tem
, 0, sizeof (*tem
));
5401 tem
->next
= free_sequence_stack
;
5402 free_sequence_stack
= tem
;
5405 /* Return 1 if currently emitting into a sequence. */
5408 in_sequence_p (void)
5410 return seq_stack
!= 0;
5413 /* Put the various virtual registers into REGNO_REG_RTX. */
5416 init_virtual_regs (void)
5418 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5419 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5420 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5421 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5422 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5423 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5424 = virtual_preferred_stack_boundary_rtx
;
5428 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5429 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5430 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5431 static int copy_insn_n_scratches
;
5433 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5434 copied an ASM_OPERANDS.
5435 In that case, it is the original input-operand vector. */
5436 static rtvec orig_asm_operands_vector
;
5438 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5439 copied an ASM_OPERANDS.
5440 In that case, it is the copied input-operand vector. */
5441 static rtvec copy_asm_operands_vector
;
5443 /* Likewise for the constraints vector. */
5444 static rtvec orig_asm_constraints_vector
;
5445 static rtvec copy_asm_constraints_vector
;
5447 /* Recursively create a new copy of an rtx for copy_insn.
5448 This function differs from copy_rtx in that it handles SCRATCHes and
5449 ASM_OPERANDs properly.
5450 Normally, this function is not used directly; use copy_insn as front end.
5451 However, you could first copy an insn pattern with copy_insn and then use
5452 this function afterwards to properly copy any REG_NOTEs containing
5456 copy_insn_1 (rtx orig
)
5461 const char *format_ptr
;
5466 code
= GET_CODE (orig
);
5481 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5482 clobbers or clobbers of hard registers that originated as pseudos.
5483 This is needed to allow safe register renaming. */
5484 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
5485 && ORIGINAL_REGNO (XEXP (orig
, 0)) == REGNO (XEXP (orig
, 0)))
5490 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5491 if (copy_insn_scratch_in
[i
] == orig
)
5492 return copy_insn_scratch_out
[i
];
5496 if (shared_const_p (orig
))
5500 /* A MEM with a constant address is not sharable. The problem is that
5501 the constant address may need to be reloaded. If the mem is shared,
5502 then reloading one copy of this mem will cause all copies to appear
5503 to have been reloaded. */
5509 /* Copy the various flags, fields, and other information. We assume
5510 that all fields need copying, and then clear the fields that should
5511 not be copied. That is the sensible default behavior, and forces
5512 us to explicitly document why we are *not* copying a flag. */
5513 copy
= shallow_copy_rtx (orig
);
5515 /* We do not copy the USED flag, which is used as a mark bit during
5516 walks over the RTL. */
5517 RTX_FLAG (copy
, used
) = 0;
5519 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5522 RTX_FLAG (copy
, jump
) = 0;
5523 RTX_FLAG (copy
, call
) = 0;
5524 RTX_FLAG (copy
, frame_related
) = 0;
5527 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5529 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5530 switch (*format_ptr
++)
5533 if (XEXP (orig
, i
) != NULL
)
5534 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5539 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5540 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5541 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5542 XVEC (copy
, i
) = copy_asm_operands_vector
;
5543 else if (XVEC (orig
, i
) != NULL
)
5545 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5546 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5547 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5558 /* These are left unchanged. */
5565 if (code
== SCRATCH
)
5567 i
= copy_insn_n_scratches
++;
5568 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5569 copy_insn_scratch_in
[i
] = orig
;
5570 copy_insn_scratch_out
[i
] = copy
;
5572 else if (code
== ASM_OPERANDS
)
5574 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5575 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5576 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5577 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5583 /* Create a new copy of an rtx.
5584 This function differs from copy_rtx in that it handles SCRATCHes and
5585 ASM_OPERANDs properly.
5586 INSN doesn't really have to be a full INSN; it could be just the
5589 copy_insn (rtx insn
)
5591 copy_insn_n_scratches
= 0;
5592 orig_asm_operands_vector
= 0;
5593 orig_asm_constraints_vector
= 0;
5594 copy_asm_operands_vector
= 0;
5595 copy_asm_constraints_vector
= 0;
5596 return copy_insn_1 (insn
);
5599 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5600 on that assumption that INSN itself remains in its original place. */
5603 copy_delay_slot_insn (rtx insn
)
5605 /* Copy INSN with its rtx_code, all its notes, location etc. */
5606 insn
= copy_rtx (insn
);
5607 INSN_UID (insn
) = cur_insn_uid
++;
5611 /* Initialize data structures and variables in this file
5612 before generating rtl for each function. */
5617 set_first_insn (NULL
);
5618 set_last_insn (NULL
);
5619 if (MIN_NONDEBUG_INSN_UID
)
5620 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5623 cur_debug_insn_uid
= 1;
5624 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5625 first_label_num
= label_num
;
5628 /* Init the tables that describe all the pseudo regs. */
5630 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5632 crtl
->emit
.regno_pointer_align
5633 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5635 regno_reg_rtx
= ggc_vec_alloc
<rtx
> (crtl
->emit
.regno_pointer_align_length
);
5637 /* Put copies of all the hard registers into regno_reg_rtx. */
5638 memcpy (regno_reg_rtx
,
5639 initial_regno_reg_rtx
,
5640 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5642 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5643 init_virtual_regs ();
5645 /* Indicate that the virtual registers and stack locations are
5647 REG_POINTER (stack_pointer_rtx
) = 1;
5648 REG_POINTER (frame_pointer_rtx
) = 1;
5649 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5650 REG_POINTER (arg_pointer_rtx
) = 1;
5652 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5653 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5654 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5655 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5656 REG_POINTER (virtual_cfa_rtx
) = 1;
5658 #ifdef STACK_BOUNDARY
5659 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5660 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5661 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5662 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5664 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5665 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5666 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5667 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5668 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5671 #ifdef INIT_EXPANDERS
5676 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5679 gen_const_vector (enum machine_mode mode
, int constant
)
5684 enum machine_mode inner
;
5686 units
= GET_MODE_NUNITS (mode
);
5687 inner
= GET_MODE_INNER (mode
);
5689 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5691 v
= rtvec_alloc (units
);
5693 /* We need to call this function after we set the scalar const_tiny_rtx
5695 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5697 for (i
= 0; i
< units
; ++i
)
5698 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5700 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5704 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5705 all elements are zero, and the one vector when all elements are one. */
5707 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5709 enum machine_mode inner
= GET_MODE_INNER (mode
);
5710 int nunits
= GET_MODE_NUNITS (mode
);
5714 /* Check to see if all of the elements have the same value. */
5715 x
= RTVEC_ELT (v
, nunits
- 1);
5716 for (i
= nunits
- 2; i
>= 0; i
--)
5717 if (RTVEC_ELT (v
, i
) != x
)
5720 /* If the values are all the same, check to see if we can use one of the
5721 standard constant vectors. */
5724 if (x
== CONST0_RTX (inner
))
5725 return CONST0_RTX (mode
);
5726 else if (x
== CONST1_RTX (inner
))
5727 return CONST1_RTX (mode
);
5728 else if (x
== CONSTM1_RTX (inner
))
5729 return CONSTM1_RTX (mode
);
5732 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5735 /* Initialise global register information required by all functions. */
5738 init_emit_regs (void)
5741 enum machine_mode mode
;
5744 /* Reset register attributes */
5745 htab_empty (reg_attrs_htab
);
5747 /* We need reg_raw_mode, so initialize the modes now. */
5748 init_reg_modes_target ();
5750 /* Assign register numbers to the globally defined register rtx. */
5751 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5752 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5753 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5754 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5755 virtual_incoming_args_rtx
=
5756 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5757 virtual_stack_vars_rtx
=
5758 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5759 virtual_stack_dynamic_rtx
=
5760 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5761 virtual_outgoing_args_rtx
=
5762 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5763 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5764 virtual_preferred_stack_boundary_rtx
=
5765 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5767 /* Initialize RTL for commonly used hard registers. These are
5768 copied into regno_reg_rtx as we begin to compile each function. */
5769 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5770 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5772 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5773 return_address_pointer_rtx
5774 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5777 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5778 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5780 pic_offset_table_rtx
= NULL_RTX
;
5782 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5784 mode
= (enum machine_mode
) i
;
5785 attrs
= ggc_cleared_alloc
<mem_attrs
> ();
5786 attrs
->align
= BITS_PER_UNIT
;
5787 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5788 if (mode
!= BLKmode
)
5790 attrs
->size_known_p
= true;
5791 attrs
->size
= GET_MODE_SIZE (mode
);
5792 if (STRICT_ALIGNMENT
)
5793 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5795 mode_mem_attrs
[i
] = attrs
;
5799 /* Initialize global machine_mode variables. */
5802 init_derived_machine_modes (void)
5804 byte_mode
= VOIDmode
;
5805 word_mode
= VOIDmode
;
5807 for (enum machine_mode mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5809 mode
= GET_MODE_WIDER_MODE (mode
))
5811 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5812 && byte_mode
== VOIDmode
)
5815 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5816 && word_mode
== VOIDmode
)
5820 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5823 /* Create some permanent unique rtl objects shared between all functions. */
5826 init_emit_once (void)
5829 enum machine_mode mode
;
5830 enum machine_mode double_mode
;
5832 /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
5833 CONST_FIXED, and memory attribute hash tables. */
5834 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5835 const_int_htab_eq
, NULL
);
5837 #if TARGET_SUPPORTS_WIDE_INT
5838 const_wide_int_htab
= htab_create_ggc (37, const_wide_int_htab_hash
,
5839 const_wide_int_htab_eq
, NULL
);
5841 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5842 const_double_htab_eq
, NULL
);
5844 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5845 const_fixed_htab_eq
, NULL
);
5847 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5848 reg_attrs_htab_eq
, NULL
);
5850 #ifdef INIT_EXPANDERS
5851 /* This is to initialize {init|mark|free}_machine_status before the first
5852 call to push_function_context_to. This is needed by the Chill front
5853 end which calls push_function_context_to before the first call to
5854 init_function_start. */
5858 /* Create the unique rtx's for certain rtx codes and operand values. */
5860 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5861 tries to use these variables. */
5862 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5863 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5864 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5866 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5867 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5868 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5870 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5872 double_mode
= mode_for_size (DOUBLE_TYPE_SIZE
, MODE_FLOAT
, 0);
5874 real_from_integer (&dconst0
, double_mode
, 0, SIGNED
);
5875 real_from_integer (&dconst1
, double_mode
, 1, SIGNED
);
5876 real_from_integer (&dconst2
, double_mode
, 2, SIGNED
);
5881 dconsthalf
= dconst1
;
5882 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5884 for (i
= 0; i
< 3; i
++)
5886 const REAL_VALUE_TYPE
*const r
=
5887 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5889 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5891 mode
= GET_MODE_WIDER_MODE (mode
))
5892 const_tiny_rtx
[i
][(int) mode
] =
5893 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5895 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5897 mode
= GET_MODE_WIDER_MODE (mode
))
5898 const_tiny_rtx
[i
][(int) mode
] =
5899 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5901 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5903 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5905 mode
= GET_MODE_WIDER_MODE (mode
))
5906 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5908 for (mode
= MIN_MODE_PARTIAL_INT
;
5909 mode
<= MAX_MODE_PARTIAL_INT
;
5910 mode
= (enum machine_mode
)((int)(mode
) + 1))
5911 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5914 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5916 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5918 mode
= GET_MODE_WIDER_MODE (mode
))
5919 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5921 for (mode
= MIN_MODE_PARTIAL_INT
;
5922 mode
<= MAX_MODE_PARTIAL_INT
;
5923 mode
= (enum machine_mode
)((int)(mode
) + 1))
5924 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5926 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5928 mode
= GET_MODE_WIDER_MODE (mode
))
5930 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5931 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5934 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5936 mode
= GET_MODE_WIDER_MODE (mode
))
5938 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5939 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5942 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5944 mode
= GET_MODE_WIDER_MODE (mode
))
5946 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5947 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5948 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
5951 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5953 mode
= GET_MODE_WIDER_MODE (mode
))
5955 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5956 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5959 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5961 mode
= GET_MODE_WIDER_MODE (mode
))
5963 FCONST0 (mode
).data
.high
= 0;
5964 FCONST0 (mode
).data
.low
= 0;
5965 FCONST0 (mode
).mode
= mode
;
5966 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5967 FCONST0 (mode
), mode
);
5970 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5972 mode
= GET_MODE_WIDER_MODE (mode
))
5974 FCONST0 (mode
).data
.high
= 0;
5975 FCONST0 (mode
).data
.low
= 0;
5976 FCONST0 (mode
).mode
= mode
;
5977 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5978 FCONST0 (mode
), mode
);
5981 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5983 mode
= GET_MODE_WIDER_MODE (mode
))
5985 FCONST0 (mode
).data
.high
= 0;
5986 FCONST0 (mode
).data
.low
= 0;
5987 FCONST0 (mode
).mode
= mode
;
5988 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5989 FCONST0 (mode
), mode
);
5991 /* We store the value 1. */
5992 FCONST1 (mode
).data
.high
= 0;
5993 FCONST1 (mode
).data
.low
= 0;
5994 FCONST1 (mode
).mode
= mode
;
5996 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5997 HOST_BITS_PER_DOUBLE_INT
,
5998 SIGNED_FIXED_POINT_MODE_P (mode
));
5999 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6000 FCONST1 (mode
), mode
);
6003 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
6005 mode
= GET_MODE_WIDER_MODE (mode
))
6007 FCONST0 (mode
).data
.high
= 0;
6008 FCONST0 (mode
).data
.low
= 0;
6009 FCONST0 (mode
).mode
= mode
;
6010 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6011 FCONST0 (mode
), mode
);
6013 /* We store the value 1. */
6014 FCONST1 (mode
).data
.high
= 0;
6015 FCONST1 (mode
).data
.low
= 0;
6016 FCONST1 (mode
).mode
= mode
;
6018 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6019 HOST_BITS_PER_DOUBLE_INT
,
6020 SIGNED_FIXED_POINT_MODE_P (mode
));
6021 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6022 FCONST1 (mode
), mode
);
6025 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
6027 mode
= GET_MODE_WIDER_MODE (mode
))
6029 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6032 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
6034 mode
= GET_MODE_WIDER_MODE (mode
))
6036 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6039 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
6041 mode
= GET_MODE_WIDER_MODE (mode
))
6043 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6044 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6047 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
6049 mode
= GET_MODE_WIDER_MODE (mode
))
6051 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6052 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6055 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
6056 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
6057 const_tiny_rtx
[0][i
] = const0_rtx
;
6059 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
6060 if (STORE_FLAG_VALUE
== 1)
6061 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
6063 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
6064 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
6065 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
6066 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
6069 /* Produce exact duplicate of insn INSN after AFTER.
6070 Care updating of libcall regions if present. */
6073 emit_copy_of_insn_after (rtx insn
, rtx after
)
6078 switch (GET_CODE (insn
))
6081 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
6085 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
6086 CROSSING_JUMP_P (new_rtx
) = CROSSING_JUMP_P (insn
);
6090 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
6094 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
6095 if (CALL_INSN_FUNCTION_USAGE (insn
))
6096 CALL_INSN_FUNCTION_USAGE (new_rtx
)
6097 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
6098 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
6099 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
6100 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
6101 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
6102 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
6109 /* Update LABEL_NUSES. */
6110 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
6112 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
6114 /* If the old insn is frame related, then so is the new one. This is
6115 primarily needed for IA-64 unwind info which marks epilogue insns,
6116 which may be duplicated by the basic block reordering code. */
6117 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
6119 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6120 will make them. REG_LABEL_TARGETs are created there too, but are
6121 supposed to be sticky, so we copy them. */
6122 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
6123 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
6125 if (GET_CODE (link
) == EXPR_LIST
)
6126 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
6127 copy_insn_1 (XEXP (link
, 0)));
6129 add_shallow_copy_of_reg_note (new_rtx
, link
);
6132 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6136 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6138 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
6140 if (hard_reg_clobbers
[mode
][regno
])
6141 return hard_reg_clobbers
[mode
][regno
];
6143 return (hard_reg_clobbers
[mode
][regno
] =
6144 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6147 location_t prologue_location
;
6148 location_t epilogue_location
;
6150 /* Hold current location information and last location information, so the
6151 datastructures are built lazily only when some instructions in given
6152 place are needed. */
6153 static location_t curr_location
;
6155 /* Allocate insn location datastructure. */
6157 insn_locations_init (void)
6159 prologue_location
= epilogue_location
= 0;
6160 curr_location
= UNKNOWN_LOCATION
;
6163 /* At the end of emit stage, clear current location. */
6165 insn_locations_finalize (void)
6167 epilogue_location
= curr_location
;
6168 curr_location
= UNKNOWN_LOCATION
;
6171 /* Set current location. */
6173 set_curr_insn_location (location_t location
)
6175 curr_location
= location
;
6178 /* Get current location. */
6180 curr_insn_location (void)
6182 return curr_location
;
6185 /* Return lexical scope block insn belongs to. */
6187 insn_scope (const_rtx insn
)
6189 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6192 /* Return line number of the statement that produced this insn. */
6194 insn_line (const_rtx insn
)
6196 return LOCATION_LINE (INSN_LOCATION (insn
));
6199 /* Return source file of the statement that produced this insn. */
6201 insn_file (const_rtx insn
)
6203 return LOCATION_FILE (INSN_LOCATION (insn
));
6206 /* Return expanded location of the statement that produced this insn. */
6208 insn_location (const_rtx insn
)
6210 return expand_location (INSN_LOCATION (insn
));
6213 /* Return true if memory model MODEL requires a pre-operation (release-style)
6214 barrier or a post-operation (acquire-style) barrier. While not universal,
6215 this function matches behavior of several targets. */
6218 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6220 switch (model
& MEMMODEL_MASK
)
6222 case MEMMODEL_RELAXED
:
6223 case MEMMODEL_CONSUME
:
6225 case MEMMODEL_RELEASE
:
6227 case MEMMODEL_ACQUIRE
:
6229 case MEMMODEL_ACQ_REL
:
6230 case MEMMODEL_SEQ_CST
:
6237 #include "gt-emit-rtl.h"