1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992-2012 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
46 #include "hard-reg-set.h"
48 #include "insn-config.h"
51 #include "basic-block.h"
54 #include "langhooks.h"
59 struct target_rtl default_target_rtl
;
61 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
64 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
66 /* Commonly used modes. */
68 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
69 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
70 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
71 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
73 /* Datastructures maintained for currently processed function in RTL form. */
75 struct rtl_data x_rtl
;
77 /* Indexed by pseudo register number, gives the rtx for that pseudo.
78 Allocated in parallel with regno_pointer_align.
79 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
80 with length attribute nested in top level structures. */
84 /* This is *not* reset after each function. It gives each CODE_LABEL
85 in the entire compilation a unique label number. */
87 static GTY(()) int label_num
= 1;
89 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
90 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
91 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
92 is set only for MODE_INT and MODE_VECTOR_INT modes. */
94 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
98 REAL_VALUE_TYPE dconst0
;
99 REAL_VALUE_TYPE dconst1
;
100 REAL_VALUE_TYPE dconst2
;
101 REAL_VALUE_TYPE dconstm1
;
102 REAL_VALUE_TYPE dconsthalf
;
104 /* Record fixed-point constant 0 and 1. */
105 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
106 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
108 /* We make one copy of (const_int C) where C is in
109 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
110 to save space during the compilation and simplify comparisons of
113 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
115 /* Standard pieces of rtx, to be substituted directly into things. */
118 rtx simple_return_rtx
;
121 /* A hash table storing CONST_INTs whose absolute value is greater
122 than MAX_SAVED_CONST_INT. */
124 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
125 htab_t const_int_htab
;
127 /* A hash table storing memory attribute structures. */
128 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
129 htab_t mem_attrs_htab
;
131 /* A hash table storing register attribute structures. */
132 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
133 htab_t reg_attrs_htab
;
135 /* A hash table storing all CONST_DOUBLEs. */
136 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
137 htab_t const_double_htab
;
139 /* A hash table storing all CONST_FIXEDs. */
140 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
141 htab_t const_fixed_htab
;
143 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
144 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
145 #define first_label_num (crtl->emit.x_first_label_num)
147 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
148 static void set_used_decls (tree
);
149 static void mark_label_nuses (rtx
);
150 static hashval_t
const_int_htab_hash (const void *);
151 static int const_int_htab_eq (const void *, const void *);
152 static hashval_t
const_double_htab_hash (const void *);
153 static int const_double_htab_eq (const void *, const void *);
154 static rtx
lookup_const_double (rtx
);
155 static hashval_t
const_fixed_htab_hash (const void *);
156 static int const_fixed_htab_eq (const void *, const void *);
157 static rtx
lookup_const_fixed (rtx
);
158 static hashval_t
mem_attrs_htab_hash (const void *);
159 static int mem_attrs_htab_eq (const void *, const void *);
160 static hashval_t
reg_attrs_htab_hash (const void *);
161 static int reg_attrs_htab_eq (const void *, const void *);
162 static reg_attrs
*get_reg_attrs (tree
, int);
163 static rtx
gen_const_vector (enum machine_mode
, int);
164 static void copy_rtx_if_shared_1 (rtx
*orig
);
166 /* Probability of the conditional branch currently proceeded by try_split.
167 Set to -1 otherwise. */
168 int split_branch_probability
= -1;
170 /* Returns a hash code for X (which is a really a CONST_INT). */
173 const_int_htab_hash (const void *x
)
175 return (hashval_t
) INTVAL ((const_rtx
) x
);
178 /* Returns nonzero if the value represented by X (which is really a
179 CONST_INT) is the same as that given by Y (which is really a
183 const_int_htab_eq (const void *x
, const void *y
)
185 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
188 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
190 const_double_htab_hash (const void *x
)
192 const_rtx
const value
= (const_rtx
) x
;
195 if (GET_MODE (value
) == VOIDmode
)
196 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
199 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
200 /* MODE is used in the comparison, so it should be in the hash. */
201 h
^= GET_MODE (value
);
206 /* Returns nonzero if the value represented by X (really a ...)
207 is the same as that represented by Y (really a ...) */
209 const_double_htab_eq (const void *x
, const void *y
)
211 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
213 if (GET_MODE (a
) != GET_MODE (b
))
215 if (GET_MODE (a
) == VOIDmode
)
216 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
217 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
219 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
220 CONST_DOUBLE_REAL_VALUE (b
));
223 /* Returns a hash code for X (which is really a CONST_FIXED). */
226 const_fixed_htab_hash (const void *x
)
228 const_rtx
const value
= (const_rtx
) x
;
231 h
= fixed_hash (CONST_FIXED_VALUE (value
));
232 /* MODE is used in the comparison, so it should be in the hash. */
233 h
^= GET_MODE (value
);
237 /* Returns nonzero if the value represented by X (really a ...)
238 is the same as that represented by Y (really a ...). */
241 const_fixed_htab_eq (const void *x
, const void *y
)
243 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
245 if (GET_MODE (a
) != GET_MODE (b
))
247 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
250 /* Returns a hash code for X (which is a really a mem_attrs *). */
253 mem_attrs_htab_hash (const void *x
)
255 const mem_attrs
*const p
= (const mem_attrs
*) x
;
257 return (p
->alias
^ (p
->align
* 1000)
258 ^ (p
->addrspace
* 4000)
259 ^ ((p
->offset_known_p
? p
->offset
: 0) * 50000)
260 ^ ((p
->size_known_p
? p
->size
: 0) * 2500000)
261 ^ (size_t) iterative_hash_expr (p
->expr
, 0));
264 /* Return true if the given memory attributes are equal. */
267 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
269 return (p
->alias
== q
->alias
270 && p
->offset_known_p
== q
->offset_known_p
271 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
272 && p
->size_known_p
== q
->size_known_p
273 && (!p
->size_known_p
|| p
->size
== q
->size
)
274 && p
->align
== q
->align
275 && p
->addrspace
== q
->addrspace
276 && (p
->expr
== q
->expr
277 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
278 && operand_equal_p (p
->expr
, q
->expr
, 0))));
281 /* Returns nonzero if the value represented by X (which is really a
282 mem_attrs *) is the same as that given by Y (which is also really a
286 mem_attrs_htab_eq (const void *x
, const void *y
)
288 return mem_attrs_eq_p ((const mem_attrs
*) x
, (const mem_attrs
*) y
);
291 /* Set MEM's memory attributes so that they are the same as ATTRS. */
294 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
298 /* If everything is the default, we can just clear the attributes. */
299 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
305 slot
= htab_find_slot (mem_attrs_htab
, attrs
, INSERT
);
308 *slot
= ggc_alloc_mem_attrs ();
309 memcpy (*slot
, attrs
, sizeof (mem_attrs
));
312 MEM_ATTRS (mem
) = (mem_attrs
*) *slot
;
315 /* Returns a hash code for X (which is a really a reg_attrs *). */
318 reg_attrs_htab_hash (const void *x
)
320 const reg_attrs
*const p
= (const reg_attrs
*) x
;
322 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
325 /* Returns nonzero if the value represented by X (which is really a
326 reg_attrs *) is the same as that given by Y (which is also really a
330 reg_attrs_htab_eq (const void *x
, const void *y
)
332 const reg_attrs
*const p
= (const reg_attrs
*) x
;
333 const reg_attrs
*const q
= (const reg_attrs
*) y
;
335 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
337 /* Allocate a new reg_attrs structure and insert it into the hash table if
338 one identical to it is not already in the table. We are doing this for
342 get_reg_attrs (tree decl
, int offset
)
347 /* If everything is the default, we can just return zero. */
348 if (decl
== 0 && offset
== 0)
352 attrs
.offset
= offset
;
354 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
357 *slot
= ggc_alloc_reg_attrs ();
358 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
361 return (reg_attrs
*) *slot
;
366 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
372 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
373 MEM_VOLATILE_P (x
) = true;
379 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
380 don't attempt to share with the various global pieces of rtl (such as
381 frame_pointer_rtx). */
384 gen_raw_REG (enum machine_mode mode
, int regno
)
386 rtx x
= gen_rtx_raw_REG (mode
, regno
);
387 ORIGINAL_REGNO (x
) = regno
;
391 /* There are some RTL codes that require special attention; the generation
392 functions do the raw handling. If you add to this list, modify
393 special_rtx in gengenrtl.c as well. */
396 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
400 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
401 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
403 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
404 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
405 return const_true_rtx
;
408 /* Look up the CONST_INT in the hash table. */
409 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
410 (hashval_t
) arg
, INSERT
);
412 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
418 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
420 return GEN_INT (trunc_int_for_mode (c
, mode
));
423 /* CONST_DOUBLEs might be created from pairs of integers, or from
424 REAL_VALUE_TYPEs. Also, their length is known only at run time,
425 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
427 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
428 hash table. If so, return its counterpart; otherwise add it
429 to the hash table and return it. */
431 lookup_const_double (rtx real
)
433 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
440 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
441 VALUE in mode MODE. */
443 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
445 rtx real
= rtx_alloc (CONST_DOUBLE
);
446 PUT_MODE (real
, mode
);
450 return lookup_const_double (real
);
453 /* Determine whether FIXED, a CONST_FIXED, already exists in the
454 hash table. If so, return its counterpart; otherwise add it
455 to the hash table and return it. */
458 lookup_const_fixed (rtx fixed
)
460 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
467 /* Return a CONST_FIXED rtx for a fixed-point value specified by
468 VALUE in mode MODE. */
471 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
473 rtx fixed
= rtx_alloc (CONST_FIXED
);
474 PUT_MODE (fixed
, mode
);
478 return lookup_const_fixed (fixed
);
481 /* Constructs double_int from rtx CST. */
484 rtx_to_double_int (const_rtx cst
)
488 if (CONST_INT_P (cst
))
489 r
= double_int::from_shwi (INTVAL (cst
));
490 else if (CONST_DOUBLE_AS_INT_P (cst
))
492 r
.low
= CONST_DOUBLE_LOW (cst
);
493 r
.high
= CONST_DOUBLE_HIGH (cst
);
502 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
506 immed_double_int_const (double_int i
, enum machine_mode mode
)
508 return immed_double_const (i
.low
, i
.high
, mode
);
511 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
512 of ints: I0 is the low-order word and I1 is the high-order word.
513 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
514 implied upper bits are copies of the high bit of i1. The value
515 itself is neither signed nor unsigned. Do not use this routine for
516 non-integer modes; convert to REAL_VALUE_TYPE and use
517 CONST_DOUBLE_FROM_REAL_VALUE. */
520 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
525 /* There are the following cases (note that there are no modes with
526 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
528 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
530 2) If the value of the integer fits into HOST_WIDE_INT anyway
531 (i.e., i1 consists only from copies of the sign bit, and sign
532 of i0 and i1 are the same), then we return a CONST_INT for i0.
533 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
534 if (mode
!= VOIDmode
)
536 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
537 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
538 /* We can get a 0 for an error mark. */
539 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
540 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
542 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
543 return gen_int_mode (i0
, mode
);
546 /* If this integer fits in one word, return a CONST_INT. */
547 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
550 /* We use VOIDmode for integers. */
551 value
= rtx_alloc (CONST_DOUBLE
);
552 PUT_MODE (value
, VOIDmode
);
554 CONST_DOUBLE_LOW (value
) = i0
;
555 CONST_DOUBLE_HIGH (value
) = i1
;
557 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
558 XWINT (value
, i
) = 0;
560 return lookup_const_double (value
);
564 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
566 /* In case the MD file explicitly references the frame pointer, have
567 all such references point to the same frame pointer. This is
568 used during frame pointer elimination to distinguish the explicit
569 references to these registers from pseudos that happened to be
572 If we have eliminated the frame pointer or arg pointer, we will
573 be using it as a normal register, for example as a spill
574 register. In such cases, we might be accessing it in a mode that
575 is not Pmode and therefore cannot use the pre-allocated rtx.
577 Also don't do this when we are making new REGs in reload, since
578 we don't want to get confused with the real pointers. */
580 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
582 if (regno
== FRAME_POINTER_REGNUM
583 && (!reload_completed
|| frame_pointer_needed
))
584 return frame_pointer_rtx
;
585 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
586 if (regno
== HARD_FRAME_POINTER_REGNUM
587 && (!reload_completed
|| frame_pointer_needed
))
588 return hard_frame_pointer_rtx
;
590 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
591 if (regno
== ARG_POINTER_REGNUM
)
592 return arg_pointer_rtx
;
594 #ifdef RETURN_ADDRESS_POINTER_REGNUM
595 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
596 return return_address_pointer_rtx
;
598 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
599 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
600 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
601 return pic_offset_table_rtx
;
602 if (regno
== STACK_POINTER_REGNUM
)
603 return stack_pointer_rtx
;
607 /* If the per-function register table has been set up, try to re-use
608 an existing entry in that table to avoid useless generation of RTL.
610 This code is disabled for now until we can fix the various backends
611 which depend on having non-shared hard registers in some cases. Long
612 term we want to re-enable this code as it can significantly cut down
613 on the amount of useless RTL that gets generated.
615 We'll also need to fix some code that runs after reload that wants to
616 set ORIGINAL_REGNO. */
621 && regno
< FIRST_PSEUDO_REGISTER
622 && reg_raw_mode
[regno
] == mode
)
623 return regno_reg_rtx
[regno
];
626 return gen_raw_REG (mode
, regno
);
630 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
632 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
634 /* This field is not cleared by the mere allocation of the rtx, so
641 /* Generate a memory referring to non-trapping constant memory. */
644 gen_const_mem (enum machine_mode mode
, rtx addr
)
646 rtx mem
= gen_rtx_MEM (mode
, addr
);
647 MEM_READONLY_P (mem
) = 1;
648 MEM_NOTRAP_P (mem
) = 1;
652 /* Generate a MEM referring to fixed portions of the frame, e.g., register
656 gen_frame_mem (enum machine_mode mode
, rtx addr
)
658 rtx mem
= gen_rtx_MEM (mode
, addr
);
659 MEM_NOTRAP_P (mem
) = 1;
660 set_mem_alias_set (mem
, get_frame_alias_set ());
664 /* Generate a MEM referring to a temporary use of the stack, not part
665 of the fixed stack frame. For example, something which is pushed
666 by a target splitter. */
668 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
670 rtx mem
= gen_rtx_MEM (mode
, addr
);
671 MEM_NOTRAP_P (mem
) = 1;
672 if (!cfun
->calls_alloca
)
673 set_mem_alias_set (mem
, get_frame_alias_set ());
677 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
678 this construct would be valid, and false otherwise. */
681 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
682 const_rtx reg
, unsigned int offset
)
684 unsigned int isize
= GET_MODE_SIZE (imode
);
685 unsigned int osize
= GET_MODE_SIZE (omode
);
687 /* All subregs must be aligned. */
688 if (offset
% osize
!= 0)
691 /* The subreg offset cannot be outside the inner object. */
695 /* ??? This should not be here. Temporarily continue to allow word_mode
696 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
697 Generally, backends are doing something sketchy but it'll take time to
699 if (omode
== word_mode
)
701 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
702 is the culprit here, and not the backends. */
703 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
705 /* Allow component subregs of complex and vector. Though given the below
706 extraction rules, it's not always clear what that means. */
707 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
708 && GET_MODE_INNER (imode
) == omode
)
710 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
711 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
712 represent this. It's questionable if this ought to be represented at
713 all -- why can't this all be hidden in post-reload splitters that make
714 arbitrarily mode changes to the registers themselves. */
715 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
717 /* Subregs involving floating point modes are not allowed to
718 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
719 (subreg:SI (reg:DF) 0) isn't. */
720 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
722 if (! (isize
== osize
723 /* LRA can use subreg to store a floating point value in
724 an integer mode. Although the floating point and the
725 integer modes need the same number of hard registers,
726 the size of floating point mode can be less than the
727 integer mode. LRA also uses subregs for a register
728 should be used in different mode in on insn. */
733 /* Paradoxical subregs must have offset zero. */
737 /* This is a normal subreg. Verify that the offset is representable. */
739 /* For hard registers, we already have most of these rules collected in
740 subreg_offset_representable_p. */
741 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
743 unsigned int regno
= REGNO (reg
);
745 #ifdef CANNOT_CHANGE_MODE_CLASS
746 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
747 && GET_MODE_INNER (imode
) == omode
)
749 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
753 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
756 /* For pseudo registers, we want most of the same checks. Namely:
757 If the register no larger than a word, the subreg must be lowpart.
758 If the register is larger than a word, the subreg must be the lowpart
759 of a subword. A subreg does *not* perform arbitrary bit extraction.
760 Given that we've already checked mode/offset alignment, we only have
761 to check subword subregs here. */
762 if (osize
< UNITS_PER_WORD
763 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
765 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
766 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
767 if (offset
% UNITS_PER_WORD
!= low_off
)
774 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
776 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
777 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
780 /* Generate a SUBREG representing the least-significant part of REG if MODE
781 is smaller than mode of REG, otherwise paradoxical SUBREG. */
784 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
786 enum machine_mode inmode
;
788 inmode
= GET_MODE (reg
);
789 if (inmode
== VOIDmode
)
791 return gen_rtx_SUBREG (mode
, reg
,
792 subreg_lowpart_offset (mode
, inmode
));
796 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
799 gen_rtvec (int n
, ...)
807 /* Don't allocate an empty rtvec... */
814 rt_val
= rtvec_alloc (n
);
816 for (i
= 0; i
< n
; i
++)
817 rt_val
->elem
[i
] = va_arg (p
, rtx
);
824 gen_rtvec_v (int n
, rtx
*argp
)
829 /* Don't allocate an empty rtvec... */
833 rt_val
= rtvec_alloc (n
);
835 for (i
= 0; i
< n
; i
++)
836 rt_val
->elem
[i
] = *argp
++;
841 /* Return the number of bytes between the start of an OUTER_MODE
842 in-memory value and the start of an INNER_MODE in-memory value,
843 given that the former is a lowpart of the latter. It may be a
844 paradoxical lowpart, in which case the offset will be negative
845 on big-endian targets. */
848 byte_lowpart_offset (enum machine_mode outer_mode
,
849 enum machine_mode inner_mode
)
851 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
852 return subreg_lowpart_offset (outer_mode
, inner_mode
);
854 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
857 /* Generate a REG rtx for a new pseudo register of mode MODE.
858 This pseudo is assigned the next sequential register number. */
861 gen_reg_rtx (enum machine_mode mode
)
864 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
866 gcc_assert (can_create_pseudo_p ());
868 /* If a virtual register with bigger mode alignment is generated,
869 increase stack alignment estimation because it might be spilled
871 if (SUPPORTS_STACK_ALIGNMENT
872 && crtl
->stack_alignment_estimated
< align
873 && !crtl
->stack_realign_processed
)
875 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
876 if (crtl
->stack_alignment_estimated
< min_align
)
877 crtl
->stack_alignment_estimated
= min_align
;
880 if (generating_concat_p
881 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
882 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
884 /* For complex modes, don't make a single pseudo.
885 Instead, make a CONCAT of two pseudos.
886 This allows noncontiguous allocation of the real and imaginary parts,
887 which makes much better code. Besides, allocating DCmode
888 pseudos overstrains reload on some machines like the 386. */
889 rtx realpart
, imagpart
;
890 enum machine_mode partmode
= GET_MODE_INNER (mode
);
892 realpart
= gen_reg_rtx (partmode
);
893 imagpart
= gen_reg_rtx (partmode
);
894 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
897 /* Make sure regno_pointer_align, and regno_reg_rtx are large
898 enough to have an element for this pseudo reg number. */
900 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
902 int old_size
= crtl
->emit
.regno_pointer_align_length
;
906 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
907 memset (tmp
+ old_size
, 0, old_size
);
908 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
910 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
911 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
912 regno_reg_rtx
= new1
;
914 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
917 val
= gen_raw_REG (mode
, reg_rtx_no
);
918 regno_reg_rtx
[reg_rtx_no
++] = val
;
922 /* Update NEW with the same attributes as REG, but with OFFSET added
923 to the REG_OFFSET. */
926 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
928 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
929 REG_OFFSET (reg
) + offset
);
932 /* Generate a register with same attributes as REG, but with OFFSET
933 added to the REG_OFFSET. */
936 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
939 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
941 update_reg_offset (new_rtx
, reg
, offset
);
945 /* Generate a new pseudo-register with the same attributes as REG, but
946 with OFFSET added to the REG_OFFSET. */
949 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
951 rtx new_rtx
= gen_reg_rtx (mode
);
953 update_reg_offset (new_rtx
, reg
, offset
);
957 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
958 new register is a (possibly paradoxical) lowpart of the old one. */
961 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
963 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
964 PUT_MODE (reg
, mode
);
967 /* Copy REG's attributes from X, if X has any attributes. If REG and X
968 have different modes, REG is a (possibly paradoxical) lowpart of X. */
971 set_reg_attrs_from_value (rtx reg
, rtx x
)
974 bool can_be_reg_pointer
= true;
976 /* Don't call mark_reg_pointer for incompatible pointer sign
978 while (GET_CODE (x
) == SIGN_EXTEND
979 || GET_CODE (x
) == ZERO_EXTEND
980 || GET_CODE (x
) == TRUNCATE
981 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
983 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
984 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
985 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
986 can_be_reg_pointer
= false;
991 /* Hard registers can be reused for multiple purposes within the same
992 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
994 if (HARD_REGISTER_P (reg
))
997 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1000 if (MEM_OFFSET_KNOWN_P (x
))
1001 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1002 MEM_OFFSET (x
) + offset
);
1003 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1004 mark_reg_pointer (reg
, 0);
1009 update_reg_offset (reg
, x
, offset
);
1010 if (can_be_reg_pointer
&& REG_POINTER (x
))
1011 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1015 /* Generate a REG rtx for a new pseudo register, copying the mode
1016 and attributes from X. */
1019 gen_reg_rtx_and_attrs (rtx x
)
1021 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1022 set_reg_attrs_from_value (reg
, x
);
1026 /* Set the register attributes for registers contained in PARM_RTX.
1027 Use needed values from memory attributes of MEM. */
1030 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1032 if (REG_P (parm_rtx
))
1033 set_reg_attrs_from_value (parm_rtx
, mem
);
1034 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1036 /* Check for a NULL entry in the first slot, used to indicate that the
1037 parameter goes both on the stack and in registers. */
1038 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1039 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1041 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1042 if (REG_P (XEXP (x
, 0)))
1043 REG_ATTRS (XEXP (x
, 0))
1044 = get_reg_attrs (MEM_EXPR (mem
),
1045 INTVAL (XEXP (x
, 1)));
1050 /* Set the REG_ATTRS for registers in value X, given that X represents
1054 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1056 if (GET_CODE (x
) == SUBREG
)
1058 gcc_assert (subreg_lowpart_p (x
));
1063 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1065 if (GET_CODE (x
) == CONCAT
)
1067 if (REG_P (XEXP (x
, 0)))
1068 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1069 if (REG_P (XEXP (x
, 1)))
1070 REG_ATTRS (XEXP (x
, 1))
1071 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1073 if (GET_CODE (x
) == PARALLEL
)
1077 /* Check for a NULL entry, used to indicate that the parameter goes
1078 both on the stack and in registers. */
1079 if (XEXP (XVECEXP (x
, 0, 0), 0))
1084 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1086 rtx y
= XVECEXP (x
, 0, i
);
1087 if (REG_P (XEXP (y
, 0)))
1088 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1093 /* Assign the RTX X to declaration T. */
1096 set_decl_rtl (tree t
, rtx x
)
1098 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1100 set_reg_attrs_for_decl_rtl (t
, x
);
1103 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1104 if the ABI requires the parameter to be passed by reference. */
1107 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1109 DECL_INCOMING_RTL (t
) = x
;
1110 if (x
&& !by_reference_p
)
1111 set_reg_attrs_for_decl_rtl (t
, x
);
1114 /* Identify REG (which may be a CONCAT) as a user register. */
1117 mark_user_reg (rtx reg
)
1119 if (GET_CODE (reg
) == CONCAT
)
1121 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1122 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1126 gcc_assert (REG_P (reg
));
1127 REG_USERVAR_P (reg
) = 1;
1131 /* Identify REG as a probable pointer register and show its alignment
1132 as ALIGN, if nonzero. */
1135 mark_reg_pointer (rtx reg
, int align
)
1137 if (! REG_POINTER (reg
))
1139 REG_POINTER (reg
) = 1;
1142 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1144 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1145 /* We can no-longer be sure just how aligned this pointer is. */
1146 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1149 /* Return 1 plus largest pseudo reg number used in the current function. */
1157 /* Return 1 + the largest label number used so far in the current function. */
1160 max_label_num (void)
1165 /* Return first label number used in this function (if any were used). */
1168 get_first_label_num (void)
1170 return first_label_num
;
1173 /* If the rtx for label was created during the expansion of a nested
1174 function, then first_label_num won't include this label number.
1175 Fix this now so that array indices work later. */
1178 maybe_set_first_label_num (rtx x
)
1180 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1181 first_label_num
= CODE_LABEL_NUMBER (x
);
1184 /* Return a value representing some low-order bits of X, where the number
1185 of low-order bits is given by MODE. Note that no conversion is done
1186 between floating-point and fixed-point values, rather, the bit
1187 representation is returned.
1189 This function handles the cases in common between gen_lowpart, below,
1190 and two variants in cse.c and combine.c. These are the cases that can
1191 be safely handled at all points in the compilation.
1193 If this is not a case we can handle, return 0. */
1196 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1198 int msize
= GET_MODE_SIZE (mode
);
1201 enum machine_mode innermode
;
1203 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1204 so we have to make one up. Yuk. */
1205 innermode
= GET_MODE (x
);
1207 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1208 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1209 else if (innermode
== VOIDmode
)
1210 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1212 xsize
= GET_MODE_SIZE (innermode
);
1214 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1216 if (innermode
== mode
)
1219 /* MODE must occupy no more words than the mode of X. */
1220 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1221 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1224 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1225 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1228 offset
= subreg_lowpart_offset (mode
, innermode
);
1230 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1231 && (GET_MODE_CLASS (mode
) == MODE_INT
1232 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1234 /* If we are getting the low-order part of something that has been
1235 sign- or zero-extended, we can either just use the object being
1236 extended or make a narrower extension. If we want an even smaller
1237 piece than the size of the object being extended, call ourselves
1240 This case is used mostly by combine and cse. */
1242 if (GET_MODE (XEXP (x
, 0)) == mode
)
1244 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1245 return gen_lowpart_common (mode
, XEXP (x
, 0));
1246 else if (msize
< xsize
)
1247 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1249 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1250 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1251 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1252 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1254 /* Otherwise, we can't do this. */
1259 gen_highpart (enum machine_mode mode
, rtx x
)
1261 unsigned int msize
= GET_MODE_SIZE (mode
);
1264 /* This case loses if X is a subreg. To catch bugs early,
1265 complain if an invalid MODE is used even in other cases. */
1266 gcc_assert (msize
<= UNITS_PER_WORD
1267 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1269 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1270 subreg_highpart_offset (mode
, GET_MODE (x
)));
1271 gcc_assert (result
);
1273 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1274 the target if we have a MEM. gen_highpart must return a valid operand,
1275 emitting code if necessary to do so. */
1278 result
= validize_mem (result
);
1279 gcc_assert (result
);
1285 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1286 be VOIDmode constant. */
1288 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1290 if (GET_MODE (exp
) != VOIDmode
)
1292 gcc_assert (GET_MODE (exp
) == innermode
);
1293 return gen_highpart (outermode
, exp
);
1295 return simplify_gen_subreg (outermode
, exp
, innermode
,
1296 subreg_highpart_offset (outermode
, innermode
));
1299 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1302 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1304 unsigned int offset
= 0;
1305 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1309 if (WORDS_BIG_ENDIAN
)
1310 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1311 if (BYTES_BIG_ENDIAN
)
1312 offset
+= difference
% UNITS_PER_WORD
;
1318 /* Return offset in bytes to get OUTERMODE high part
1319 of the value in mode INNERMODE stored in memory in target format. */
1321 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1323 unsigned int offset
= 0;
1324 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1326 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1330 if (! WORDS_BIG_ENDIAN
)
1331 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1332 if (! BYTES_BIG_ENDIAN
)
1333 offset
+= difference
% UNITS_PER_WORD
;
1339 /* Return 1 iff X, assumed to be a SUBREG,
1340 refers to the least significant part of its containing reg.
1341 If X is not a SUBREG, always return 1 (it is its own low part!). */
1344 subreg_lowpart_p (const_rtx x
)
1346 if (GET_CODE (x
) != SUBREG
)
1348 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1351 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1352 == SUBREG_BYTE (x
));
1355 /* Return true if X is a paradoxical subreg, false otherwise. */
1357 paradoxical_subreg_p (const_rtx x
)
1359 if (GET_CODE (x
) != SUBREG
)
1361 return (GET_MODE_PRECISION (GET_MODE (x
))
1362 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1365 /* Return subword OFFSET of operand OP.
1366 The word number, OFFSET, is interpreted as the word number starting
1367 at the low-order address. OFFSET 0 is the low-order word if not
1368 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1370 If we cannot extract the required word, we return zero. Otherwise,
1371 an rtx corresponding to the requested word will be returned.
1373 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1374 reload has completed, a valid address will always be returned. After
1375 reload, if a valid address cannot be returned, we return zero.
1377 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1378 it is the responsibility of the caller.
1380 MODE is the mode of OP in case it is a CONST_INT.
1382 ??? This is still rather broken for some cases. The problem for the
1383 moment is that all callers of this thing provide no 'goal mode' to
1384 tell us to work with. This exists because all callers were written
1385 in a word based SUBREG world.
1386 Now use of this function can be deprecated by simplify_subreg in most
1391 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1393 if (mode
== VOIDmode
)
1394 mode
= GET_MODE (op
);
1396 gcc_assert (mode
!= VOIDmode
);
1398 /* If OP is narrower than a word, fail. */
1400 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1403 /* If we want a word outside OP, return zero. */
1405 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1408 /* Form a new MEM at the requested address. */
1411 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1413 if (! validate_address
)
1416 else if (reload_completed
)
1418 if (! strict_memory_address_addr_space_p (word_mode
,
1420 MEM_ADDR_SPACE (op
)))
1424 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1427 /* Rest can be handled by simplify_subreg. */
1428 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1431 /* Similar to `operand_subword', but never return 0. If we can't
1432 extract the required subword, put OP into a register and try again.
1433 The second attempt must succeed. We always validate the address in
1436 MODE is the mode of OP, in case it is CONST_INT. */
1439 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1441 rtx result
= operand_subword (op
, offset
, 1, mode
);
1446 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1448 /* If this is a register which can not be accessed by words, copy it
1449 to a pseudo register. */
1451 op
= copy_to_reg (op
);
1453 op
= force_reg (mode
, op
);
1456 result
= operand_subword (op
, offset
, 1, mode
);
1457 gcc_assert (result
);
1462 /* Returns 1 if both MEM_EXPR can be considered equal
1466 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1471 if (! expr1
|| ! expr2
)
1474 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1477 return operand_equal_p (expr1
, expr2
, 0);
1480 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1481 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1485 get_mem_align_offset (rtx mem
, unsigned int align
)
1488 unsigned HOST_WIDE_INT offset
;
1490 /* This function can't use
1491 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1492 || (MAX (MEM_ALIGN (mem),
1493 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1497 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1499 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1500 for <variable>. get_inner_reference doesn't handle it and
1501 even if it did, the alignment in that case needs to be determined
1502 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1503 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1504 isn't sufficiently aligned, the object it is in might be. */
1505 gcc_assert (MEM_P (mem
));
1506 expr
= MEM_EXPR (mem
);
1507 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1510 offset
= MEM_OFFSET (mem
);
1513 if (DECL_ALIGN (expr
) < align
)
1516 else if (INDIRECT_REF_P (expr
))
1518 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1521 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1525 tree inner
= TREE_OPERAND (expr
, 0);
1526 tree field
= TREE_OPERAND (expr
, 1);
1527 tree byte_offset
= component_ref_field_offset (expr
);
1528 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1531 || !host_integerp (byte_offset
, 1)
1532 || !host_integerp (bit_offset
, 1))
1535 offset
+= tree_low_cst (byte_offset
, 1);
1536 offset
+= tree_low_cst (bit_offset
, 1) / BITS_PER_UNIT
;
1538 if (inner
== NULL_TREE
)
1540 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1541 < (unsigned int) align
)
1545 else if (DECL_P (inner
))
1547 if (DECL_ALIGN (inner
) < align
)
1551 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1559 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1562 /* Given REF (a MEM) and T, either the type of X or the expression
1563 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1564 if we are making a new object of this type. BITPOS is nonzero if
1565 there is an offset outstanding on T that will be applied later. */
1568 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1569 HOST_WIDE_INT bitpos
)
1571 HOST_WIDE_INT apply_bitpos
= 0;
1573 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1576 /* It can happen that type_for_mode was given a mode for which there
1577 is no language-level type. In which case it returns NULL, which
1582 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1583 if (type
== error_mark_node
)
1586 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1587 wrong answer, as it assumes that DECL_RTL already has the right alias
1588 info. Callers should not set DECL_RTL until after the call to
1589 set_mem_attributes. */
1590 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1592 memset (&attrs
, 0, sizeof (attrs
));
1594 /* Get the alias set from the expression or type (perhaps using a
1595 front-end routine) and use it. */
1596 attrs
.alias
= get_alias_set (t
);
1598 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1599 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1601 /* Default values from pre-existing memory attributes if present. */
1602 refattrs
= MEM_ATTRS (ref
);
1605 /* ??? Can this ever happen? Calling this routine on a MEM that
1606 already carries memory attributes should probably be invalid. */
1607 attrs
.expr
= refattrs
->expr
;
1608 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1609 attrs
.offset
= refattrs
->offset
;
1610 attrs
.size_known_p
= refattrs
->size_known_p
;
1611 attrs
.size
= refattrs
->size
;
1612 attrs
.align
= refattrs
->align
;
1615 /* Otherwise, default values from the mode of the MEM reference. */
1618 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1619 gcc_assert (!defattrs
->expr
);
1620 gcc_assert (!defattrs
->offset_known_p
);
1622 /* Respect mode size. */
1623 attrs
.size_known_p
= defattrs
->size_known_p
;
1624 attrs
.size
= defattrs
->size
;
1625 /* ??? Is this really necessary? We probably should always get
1626 the size from the type below. */
1628 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1629 if T is an object, always compute the object alignment below. */
1631 attrs
.align
= defattrs
->align
;
1633 attrs
.align
= BITS_PER_UNIT
;
1634 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1635 e.g. if the type carries an alignment attribute. Should we be
1636 able to simply always use TYPE_ALIGN? */
1639 /* We can set the alignment from the type if we are making an object,
1640 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1641 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1642 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1644 else if (TREE_CODE (t
) == MEM_REF
)
1646 tree op0
= TREE_OPERAND (t
, 0);
1647 if (TREE_CODE (op0
) == ADDR_EXPR
1648 && (DECL_P (TREE_OPERAND (op0
, 0))
1649 || CONSTANT_CLASS_P (TREE_OPERAND (op0
, 0))))
1651 if (DECL_P (TREE_OPERAND (op0
, 0)))
1652 attrs
.align
= DECL_ALIGN (TREE_OPERAND (op0
, 0));
1653 else if (CONSTANT_CLASS_P (TREE_OPERAND (op0
, 0)))
1655 attrs
.align
= TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0
, 0)));
1656 #ifdef CONSTANT_ALIGNMENT
1657 attrs
.align
= CONSTANT_ALIGNMENT (TREE_OPERAND (op0
, 0),
1661 if (TREE_INT_CST_LOW (TREE_OPERAND (t
, 1)) != 0)
1663 unsigned HOST_WIDE_INT ioff
1664 = TREE_INT_CST_LOW (TREE_OPERAND (t
, 1));
1665 unsigned HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1666 attrs
.align
= MIN (aoff
, attrs
.align
);
1670 /* ??? This isn't fully correct, we can't set the alignment from the
1671 type in all cases. */
1672 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1675 else if (TREE_CODE (t
) == TARGET_MEM_REF
)
1676 /* ??? This isn't fully correct, we can't set the alignment from the
1677 type in all cases. */
1678 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1680 /* If the size is known, we can set that. */
1681 tree new_size
= TYPE_SIZE_UNIT (type
);
1683 /* If T is not a type, we may be able to deduce some more information about
1688 bool align_computed
= false;
1690 if (TREE_THIS_VOLATILE (t
))
1691 MEM_VOLATILE_P (ref
) = 1;
1693 /* Now remove any conversions: they don't change what the underlying
1694 object is. Likewise for SAVE_EXPR. */
1695 while (CONVERT_EXPR_P (t
)
1696 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1697 || TREE_CODE (t
) == SAVE_EXPR
)
1698 t
= TREE_OPERAND (t
, 0);
1700 /* Note whether this expression can trap. */
1701 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1703 base
= get_base_address (t
);
1707 && TREE_READONLY (base
)
1708 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1709 && !TREE_THIS_VOLATILE (base
))
1710 MEM_READONLY_P (ref
) = 1;
1712 /* Mark static const strings readonly as well. */
1713 if (TREE_CODE (base
) == STRING_CST
1714 && TREE_READONLY (base
)
1715 && TREE_STATIC (base
))
1716 MEM_READONLY_P (ref
) = 1;
1718 if (TREE_CODE (base
) == MEM_REF
1719 || TREE_CODE (base
) == TARGET_MEM_REF
)
1720 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1723 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1726 as
= TYPE_ADDR_SPACE (type
);
1728 /* If this expression uses it's parent's alias set, mark it such
1729 that we won't change it. */
1730 if (component_uses_parent_alias_set (t
))
1731 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1733 /* If this is a decl, set the attributes of the MEM from it. */
1737 attrs
.offset_known_p
= true;
1739 apply_bitpos
= bitpos
;
1740 new_size
= DECL_SIZE_UNIT (t
);
1741 attrs
.align
= DECL_ALIGN (t
);
1742 align_computed
= true;
1745 /* If this is a constant, we know the alignment. */
1746 else if (CONSTANT_CLASS_P (t
))
1748 attrs
.align
= TYPE_ALIGN (type
);
1749 #ifdef CONSTANT_ALIGNMENT
1750 attrs
.align
= CONSTANT_ALIGNMENT (t
, attrs
.align
);
1752 align_computed
= true;
1755 /* If this is a field reference, record it. */
1756 else if (TREE_CODE (t
) == COMPONENT_REF
)
1759 attrs
.offset_known_p
= true;
1761 apply_bitpos
= bitpos
;
1762 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1763 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1766 /* If this is an array reference, look for an outer field reference. */
1767 else if (TREE_CODE (t
) == ARRAY_REF
)
1769 tree off_tree
= size_zero_node
;
1770 /* We can't modify t, because we use it at the end of the
1776 tree index
= TREE_OPERAND (t2
, 1);
1777 tree low_bound
= array_ref_low_bound (t2
);
1778 tree unit_size
= array_ref_element_size (t2
);
1780 /* We assume all arrays have sizes that are a multiple of a byte.
1781 First subtract the lower bound, if any, in the type of the
1782 index, then convert to sizetype and multiply by the size of
1783 the array element. */
1784 if (! integer_zerop (low_bound
))
1785 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1788 off_tree
= size_binop (PLUS_EXPR
,
1789 size_binop (MULT_EXPR
,
1790 fold_convert (sizetype
,
1794 t2
= TREE_OPERAND (t2
, 0);
1796 while (TREE_CODE (t2
) == ARRAY_REF
);
1801 attrs
.offset_known_p
= false;
1802 if (host_integerp (off_tree
, 1))
1804 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1805 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1806 attrs
.align
= DECL_ALIGN (t2
);
1807 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< attrs
.align
)
1809 align_computed
= true;
1810 attrs
.offset_known_p
= true;
1811 attrs
.offset
= ioff
;
1812 apply_bitpos
= bitpos
;
1815 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1818 attrs
.offset_known_p
= false;
1819 if (host_integerp (off_tree
, 1))
1821 attrs
.offset_known_p
= true;
1822 attrs
.offset
= tree_low_cst (off_tree
, 1);
1823 apply_bitpos
= bitpos
;
1825 /* ??? Any reason the field size would be different than
1826 the size we got from the type? */
1830 /* If this is an indirect reference, record it. */
1831 else if (TREE_CODE (t
) == MEM_REF
1832 || TREE_CODE (t
) == TARGET_MEM_REF
)
1835 attrs
.offset_known_p
= true;
1837 apply_bitpos
= bitpos
;
1840 if (!align_computed
)
1842 unsigned int obj_align
= get_object_alignment (t
);
1843 attrs
.align
= MAX (attrs
.align
, obj_align
);
1847 as
= TYPE_ADDR_SPACE (type
);
1849 if (host_integerp (new_size
, 1))
1851 attrs
.size_known_p
= true;
1852 attrs
.size
= tree_low_cst (new_size
, 1);
1855 /* If we modified OFFSET based on T, then subtract the outstanding
1856 bit position offset. Similarly, increase the size of the accessed
1857 object to contain the negative offset. */
1860 gcc_assert (attrs
.offset_known_p
);
1861 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1862 if (attrs
.size_known_p
)
1863 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1866 /* Now set the attributes we computed above. */
1867 attrs
.addrspace
= as
;
1868 set_mem_attrs (ref
, &attrs
);
1872 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1874 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1877 /* Set the alias set of MEM to SET. */
1880 set_mem_alias_set (rtx mem
, alias_set_type set
)
1882 struct mem_attrs attrs
;
1884 /* If the new and old alias sets don't conflict, something is wrong. */
1885 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1886 attrs
= *get_mem_attrs (mem
);
1888 set_mem_attrs (mem
, &attrs
);
1891 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1894 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
1896 struct mem_attrs attrs
;
1898 attrs
= *get_mem_attrs (mem
);
1899 attrs
.addrspace
= addrspace
;
1900 set_mem_attrs (mem
, &attrs
);
1903 /* Set the alignment of MEM to ALIGN bits. */
1906 set_mem_align (rtx mem
, unsigned int align
)
1908 struct mem_attrs attrs
;
1910 attrs
= *get_mem_attrs (mem
);
1911 attrs
.align
= align
;
1912 set_mem_attrs (mem
, &attrs
);
1915 /* Set the expr for MEM to EXPR. */
1918 set_mem_expr (rtx mem
, tree expr
)
1920 struct mem_attrs attrs
;
1922 attrs
= *get_mem_attrs (mem
);
1924 set_mem_attrs (mem
, &attrs
);
1927 /* Set the offset of MEM to OFFSET. */
1930 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
1932 struct mem_attrs attrs
;
1934 attrs
= *get_mem_attrs (mem
);
1935 attrs
.offset_known_p
= true;
1936 attrs
.offset
= offset
;
1937 set_mem_attrs (mem
, &attrs
);
1940 /* Clear the offset of MEM. */
1943 clear_mem_offset (rtx mem
)
1945 struct mem_attrs attrs
;
1947 attrs
= *get_mem_attrs (mem
);
1948 attrs
.offset_known_p
= false;
1949 set_mem_attrs (mem
, &attrs
);
1952 /* Set the size of MEM to SIZE. */
1955 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
1957 struct mem_attrs attrs
;
1959 attrs
= *get_mem_attrs (mem
);
1960 attrs
.size_known_p
= true;
1962 set_mem_attrs (mem
, &attrs
);
1965 /* Clear the size of MEM. */
1968 clear_mem_size (rtx mem
)
1970 struct mem_attrs attrs
;
1972 attrs
= *get_mem_attrs (mem
);
1973 attrs
.size_known_p
= false;
1974 set_mem_attrs (mem
, &attrs
);
1977 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1978 and its address changed to ADDR. (VOIDmode means don't change the mode.
1979 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1980 returned memory location is required to be valid. The memory
1981 attributes are not changed. */
1984 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1989 gcc_assert (MEM_P (memref
));
1990 as
= MEM_ADDR_SPACE (memref
);
1991 if (mode
== VOIDmode
)
1992 mode
= GET_MODE (memref
);
1994 addr
= XEXP (memref
, 0);
1995 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1996 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2001 if (reload_in_progress
|| reload_completed
)
2002 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2004 addr
= memory_address_addr_space (mode
, addr
, as
);
2007 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2010 new_rtx
= gen_rtx_MEM (mode
, addr
);
2011 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2015 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2016 way we are changing MEMREF, so we only preserve the alias set. */
2019 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
2021 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1);
2022 enum machine_mode mmode
= GET_MODE (new_rtx
);
2023 struct mem_attrs attrs
, *defattrs
;
2025 attrs
= *get_mem_attrs (memref
);
2026 defattrs
= mode_mem_attrs
[(int) mmode
];
2027 attrs
.expr
= NULL_TREE
;
2028 attrs
.offset_known_p
= false;
2029 attrs
.size_known_p
= defattrs
->size_known_p
;
2030 attrs
.size
= defattrs
->size
;
2031 attrs
.align
= defattrs
->align
;
2033 /* If there are no changes, just return the original memory reference. */
2034 if (new_rtx
== memref
)
2036 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2039 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2040 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2043 set_mem_attrs (new_rtx
, &attrs
);
2047 /* Return a memory reference like MEMREF, but with its mode changed
2048 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2049 nonzero, the memory address is forced to be valid.
2050 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2051 and the caller is responsible for adjusting MEMREF base register.
2052 If ADJUST_OBJECT is zero, the underlying object associated with the
2053 memory reference is left unchanged and the caller is responsible for
2054 dealing with it. Otherwise, if the new memory reference is outside
2055 the underlying object, even partially, then the object is dropped. */
2058 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
2059 int validate
, int adjust_address
, int adjust_object
)
2061 rtx addr
= XEXP (memref
, 0);
2063 enum machine_mode address_mode
;
2065 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2066 unsigned HOST_WIDE_INT max_align
;
2067 #ifdef POINTERS_EXTEND_UNSIGNED
2068 enum machine_mode pointer_mode
2069 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2072 /* If there are no changes, just return the original memory reference. */
2073 if (mode
== GET_MODE (memref
) && !offset
2074 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2078 /* ??? Prefer to create garbage instead of creating shared rtl.
2079 This may happen even if offset is nonzero -- consider
2080 (plus (plus reg reg) const_int) -- so do this always. */
2081 addr
= copy_rtx (addr
);
2083 /* Convert a possibly large offset to a signed value within the
2084 range of the target address space. */
2085 address_mode
= get_address_mode (memref
);
2086 pbits
= GET_MODE_BITSIZE (address_mode
);
2087 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2089 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2090 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2096 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2097 object, we can merge it into the LO_SUM. */
2098 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2100 && (unsigned HOST_WIDE_INT
) offset
2101 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2102 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2103 plus_constant (address_mode
,
2104 XEXP (addr
, 1), offset
));
2105 #ifdef POINTERS_EXTEND_UNSIGNED
2106 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2107 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2108 the fact that pointers are not allowed to overflow. */
2109 else if (POINTERS_EXTEND_UNSIGNED
> 0
2110 && GET_CODE (addr
) == ZERO_EXTEND
2111 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2112 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2113 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2114 plus_constant (pointer_mode
,
2115 XEXP (addr
, 0), offset
));
2118 addr
= plus_constant (address_mode
, addr
, offset
);
2121 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
);
2123 /* If the address is a REG, change_address_1 rightfully returns memref,
2124 but this would destroy memref's MEM_ATTRS. */
2125 if (new_rtx
== memref
&& offset
!= 0)
2126 new_rtx
= copy_rtx (new_rtx
);
2128 /* Conservatively drop the object if we don't know where we start from. */
2129 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2131 attrs
.expr
= NULL_TREE
;
2135 /* Compute the new values of the memory attributes due to this adjustment.
2136 We add the offsets and update the alignment. */
2137 if (attrs
.offset_known_p
)
2139 attrs
.offset
+= offset
;
2141 /* Drop the object if the new left end is not within its bounds. */
2142 if (adjust_object
&& attrs
.offset
< 0)
2144 attrs
.expr
= NULL_TREE
;
2149 /* Compute the new alignment by taking the MIN of the alignment and the
2150 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2154 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2155 attrs
.align
= MIN (attrs
.align
, max_align
);
2158 /* We can compute the size in a number of ways. */
2159 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2160 if (defattrs
->size_known_p
)
2162 /* Drop the object if the new right end is not within its bounds. */
2163 if (adjust_object
&& (offset
+ defattrs
->size
) > attrs
.size
)
2165 attrs
.expr
= NULL_TREE
;
2168 attrs
.size_known_p
= true;
2169 attrs
.size
= defattrs
->size
;
2171 else if (attrs
.size_known_p
)
2173 attrs
.size
-= offset
;
2174 /* ??? The store_by_pieces machinery generates negative sizes. */
2175 gcc_assert (!(adjust_object
&& attrs
.size
< 0));
2178 set_mem_attrs (new_rtx
, &attrs
);
2183 /* Return a memory reference like MEMREF, but with its mode changed
2184 to MODE and its address changed to ADDR, which is assumed to be
2185 MEMREF offset by OFFSET bytes. If VALIDATE is
2186 nonzero, the memory address is forced to be valid. */
2189 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2190 HOST_WIDE_INT offset
, int validate
)
2192 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2193 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0);
2196 /* Return a memory reference like MEMREF, but whose address is changed by
2197 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2198 known to be in OFFSET (possibly 1). */
2201 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2203 rtx new_rtx
, addr
= XEXP (memref
, 0);
2204 enum machine_mode address_mode
;
2205 struct mem_attrs attrs
, *defattrs
;
2207 attrs
= *get_mem_attrs (memref
);
2208 address_mode
= get_address_mode (memref
);
2209 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2211 /* At this point we don't know _why_ the address is invalid. It
2212 could have secondary memory references, multiplies or anything.
2214 However, if we did go and rearrange things, we can wind up not
2215 being able to recognize the magic around pic_offset_table_rtx.
2216 This stuff is fragile, and is yet another example of why it is
2217 bad to expose PIC machinery too early. */
2218 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2220 && GET_CODE (addr
) == PLUS
2221 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2223 addr
= force_reg (GET_MODE (addr
), addr
);
2224 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2227 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2228 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1);
2230 /* If there are no changes, just return the original memory reference. */
2231 if (new_rtx
== memref
)
2234 /* Update the alignment to reflect the offset. Reset the offset, which
2236 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2237 attrs
.offset_known_p
= false;
2238 attrs
.size_known_p
= defattrs
->size_known_p
;
2239 attrs
.size
= defattrs
->size
;
2240 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2241 set_mem_attrs (new_rtx
, &attrs
);
2245 /* Return a memory reference like MEMREF, but with its address changed to
2246 ADDR. The caller is asserting that the actual piece of memory pointed
2247 to is the same, just the form of the address is being changed, such as
2248 by putting something into a register. */
2251 replace_equiv_address (rtx memref
, rtx addr
)
2253 /* change_address_1 copies the memory attribute structure without change
2254 and that's exactly what we want here. */
2255 update_temp_slot_address (XEXP (memref
, 0), addr
);
2256 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2259 /* Likewise, but the reference is not required to be valid. */
2262 replace_equiv_address_nv (rtx memref
, rtx addr
)
2264 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2267 /* Return a memory reference like MEMREF, but with its mode widened to
2268 MODE and offset by OFFSET. This would be used by targets that e.g.
2269 cannot issue QImode memory operations and have to use SImode memory
2270 operations plus masking logic. */
2273 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2275 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0);
2276 struct mem_attrs attrs
;
2277 unsigned int size
= GET_MODE_SIZE (mode
);
2279 /* If there are no changes, just return the original memory reference. */
2280 if (new_rtx
== memref
)
2283 attrs
= *get_mem_attrs (new_rtx
);
2285 /* If we don't know what offset we were at within the expression, then
2286 we can't know if we've overstepped the bounds. */
2287 if (! attrs
.offset_known_p
)
2288 attrs
.expr
= NULL_TREE
;
2292 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2294 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2295 tree offset
= component_ref_field_offset (attrs
.expr
);
2297 if (! DECL_SIZE_UNIT (field
))
2299 attrs
.expr
= NULL_TREE
;
2303 /* Is the field at least as large as the access? If so, ok,
2304 otherwise strip back to the containing structure. */
2305 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2306 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2307 && attrs
.offset
>= 0)
2310 if (! host_integerp (offset
, 1))
2312 attrs
.expr
= NULL_TREE
;
2316 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2317 attrs
.offset
+= tree_low_cst (offset
, 1);
2318 attrs
.offset
+= (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2321 /* Similarly for the decl. */
2322 else if (DECL_P (attrs
.expr
)
2323 && DECL_SIZE_UNIT (attrs
.expr
)
2324 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2325 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2326 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2330 /* The widened memory access overflows the expression, which means
2331 that it could alias another expression. Zap it. */
2332 attrs
.expr
= NULL_TREE
;
2338 attrs
.offset_known_p
= false;
2340 /* The widened memory may alias other stuff, so zap the alias set. */
2341 /* ??? Maybe use get_alias_set on any remaining expression. */
2343 attrs
.size_known_p
= true;
2345 set_mem_attrs (new_rtx
, &attrs
);
2349 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2350 static GTY(()) tree spill_slot_decl
;
2353 get_spill_slot_decl (bool force_build_p
)
2355 tree d
= spill_slot_decl
;
2357 struct mem_attrs attrs
;
2359 if (d
|| !force_build_p
)
2362 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2363 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2364 DECL_ARTIFICIAL (d
) = 1;
2365 DECL_IGNORED_P (d
) = 1;
2367 spill_slot_decl
= d
;
2369 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2370 MEM_NOTRAP_P (rd
) = 1;
2371 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2372 attrs
.alias
= new_alias_set ();
2374 set_mem_attrs (rd
, &attrs
);
2375 SET_DECL_RTL (d
, rd
);
2380 /* Given MEM, a result from assign_stack_local, fill in the memory
2381 attributes as appropriate for a register allocator spill slot.
2382 These slots are not aliasable by other memory. We arrange for
2383 them all to use a single MEM_EXPR, so that the aliasing code can
2384 work properly in the case of shared spill slots. */
2387 set_mem_attrs_for_spill (rtx mem
)
2389 struct mem_attrs attrs
;
2392 attrs
= *get_mem_attrs (mem
);
2393 attrs
.expr
= get_spill_slot_decl (true);
2394 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2395 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2397 /* We expect the incoming memory to be of the form:
2398 (mem:MODE (plus (reg sfp) (const_int offset)))
2399 with perhaps the plus missing for offset = 0. */
2400 addr
= XEXP (mem
, 0);
2401 attrs
.offset_known_p
= true;
2403 if (GET_CODE (addr
) == PLUS
2404 && CONST_INT_P (XEXP (addr
, 1)))
2405 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2407 set_mem_attrs (mem
, &attrs
);
2408 MEM_NOTRAP_P (mem
) = 1;
2411 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2414 gen_label_rtx (void)
2416 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2417 NULL
, label_num
++, NULL
);
2420 /* For procedure integration. */
2422 /* Install new pointers to the first and last insns in the chain.
2423 Also, set cur_insn_uid to one higher than the last in use.
2424 Used for an inline-procedure after copying the insn chain. */
2427 set_new_first_and_last_insn (rtx first
, rtx last
)
2431 set_first_insn (first
);
2432 set_last_insn (last
);
2435 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2437 int debug_count
= 0;
2439 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2440 cur_debug_insn_uid
= 0;
2442 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2443 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2444 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2447 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2448 if (DEBUG_INSN_P (insn
))
2453 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2455 cur_debug_insn_uid
++;
2458 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2459 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2464 /* Go through all the RTL insn bodies and copy any invalid shared
2465 structure. This routine should only be called once. */
2468 unshare_all_rtl_1 (rtx insn
)
2470 /* Unshare just about everything else. */
2471 unshare_all_rtl_in_chain (insn
);
2473 /* Make sure the addresses of stack slots found outside the insn chain
2474 (such as, in DECL_RTL of a variable) are not shared
2475 with the insn chain.
2477 This special care is necessary when the stack slot MEM does not
2478 actually appear in the insn chain. If it does appear, its address
2479 is unshared from all else at that point. */
2480 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2483 /* Go through all the RTL insn bodies and copy any invalid shared
2484 structure, again. This is a fairly expensive thing to do so it
2485 should be done sparingly. */
2488 unshare_all_rtl_again (rtx insn
)
2493 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2496 reset_used_flags (PATTERN (p
));
2497 reset_used_flags (REG_NOTES (p
));
2499 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2502 /* Make sure that virtual stack slots are not shared. */
2503 set_used_decls (DECL_INITIAL (cfun
->decl
));
2505 /* Make sure that virtual parameters are not shared. */
2506 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2507 set_used_flags (DECL_RTL (decl
));
2509 reset_used_flags (stack_slot_list
);
2511 unshare_all_rtl_1 (insn
);
2515 unshare_all_rtl (void)
2517 unshare_all_rtl_1 (get_insns ());
2522 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2523 Recursively does the same for subexpressions. */
2526 verify_rtx_sharing (rtx orig
, rtx insn
)
2531 const char *format_ptr
;
2536 code
= GET_CODE (x
);
2538 /* These types may be freely shared. */
2555 /* SCRATCH must be shared because they represent distinct values. */
2557 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2562 if (shared_const_p (orig
))
2567 /* A MEM is allowed to be shared if its address is constant. */
2568 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2569 || reload_completed
|| reload_in_progress
)
2578 /* This rtx may not be shared. If it has already been seen,
2579 replace it with a copy of itself. */
2580 #ifdef ENABLE_CHECKING
2581 if (RTX_FLAG (x
, used
))
2583 error ("invalid rtl sharing found in the insn");
2585 error ("shared rtx");
2587 internal_error ("internal consistency failure");
2590 gcc_assert (!RTX_FLAG (x
, used
));
2592 RTX_FLAG (x
, used
) = 1;
2594 /* Now scan the subexpressions recursively. */
2596 format_ptr
= GET_RTX_FORMAT (code
);
2598 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2600 switch (*format_ptr
++)
2603 verify_rtx_sharing (XEXP (x
, i
), insn
);
2607 if (XVEC (x
, i
) != NULL
)
2610 int len
= XVECLEN (x
, i
);
2612 for (j
= 0; j
< len
; j
++)
2614 /* We allow sharing of ASM_OPERANDS inside single
2616 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2617 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2619 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2621 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2630 /* Go through all the RTL insn bodies and check that there is no unexpected
2631 sharing in between the subexpressions. */
2634 verify_rtl_sharing (void)
2638 timevar_push (TV_VERIFY_RTL_SHARING
);
2640 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2643 reset_used_flags (PATTERN (p
));
2644 reset_used_flags (REG_NOTES (p
));
2646 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2647 if (GET_CODE (PATTERN (p
)) == SEQUENCE
)
2650 rtx q
, sequence
= PATTERN (p
);
2652 for (i
= 0; i
< XVECLEN (sequence
, 0); i
++)
2654 q
= XVECEXP (sequence
, 0, i
);
2655 gcc_assert (INSN_P (q
));
2656 reset_used_flags (PATTERN (q
));
2657 reset_used_flags (REG_NOTES (q
));
2659 reset_used_flags (CALL_INSN_FUNCTION_USAGE (q
));
2664 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2667 verify_rtx_sharing (PATTERN (p
), p
);
2668 verify_rtx_sharing (REG_NOTES (p
), p
);
2670 verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (p
), p
);
2673 timevar_pop (TV_VERIFY_RTL_SHARING
);
2676 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2677 Assumes the mark bits are cleared at entry. */
2680 unshare_all_rtl_in_chain (rtx insn
)
2682 for (; insn
; insn
= NEXT_INSN (insn
))
2685 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2686 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2688 CALL_INSN_FUNCTION_USAGE (insn
)
2689 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2693 /* Go through all virtual stack slots of a function and mark them as
2694 shared. We never replace the DECL_RTLs themselves with a copy,
2695 but expressions mentioned into a DECL_RTL cannot be shared with
2696 expressions in the instruction stream.
2698 Note that reload may convert pseudo registers into memories in-place.
2699 Pseudo registers are always shared, but MEMs never are. Thus if we
2700 reset the used flags on MEMs in the instruction stream, we must set
2701 them again on MEMs that appear in DECL_RTLs. */
2704 set_used_decls (tree blk
)
2709 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2710 if (DECL_RTL_SET_P (t
))
2711 set_used_flags (DECL_RTL (t
));
2713 /* Now process sub-blocks. */
2714 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2718 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2719 Recursively does the same for subexpressions. Uses
2720 copy_rtx_if_shared_1 to reduce stack space. */
2723 copy_rtx_if_shared (rtx orig
)
2725 copy_rtx_if_shared_1 (&orig
);
2729 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2730 use. Recursively does the same for subexpressions. */
2733 copy_rtx_if_shared_1 (rtx
*orig1
)
2739 const char *format_ptr
;
2743 /* Repeat is used to turn tail-recursion into iteration. */
2750 code
= GET_CODE (x
);
2752 /* These types may be freely shared. */
2768 /* SCRATCH must be shared because they represent distinct values. */
2771 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2776 if (shared_const_p (x
))
2786 /* The chain of insns is not being copied. */
2793 /* This rtx may not be shared. If it has already been seen,
2794 replace it with a copy of itself. */
2796 if (RTX_FLAG (x
, used
))
2798 x
= shallow_copy_rtx (x
);
2801 RTX_FLAG (x
, used
) = 1;
2803 /* Now scan the subexpressions recursively.
2804 We can store any replaced subexpressions directly into X
2805 since we know X is not shared! Any vectors in X
2806 must be copied if X was copied. */
2808 format_ptr
= GET_RTX_FORMAT (code
);
2809 length
= GET_RTX_LENGTH (code
);
2812 for (i
= 0; i
< length
; i
++)
2814 switch (*format_ptr
++)
2818 copy_rtx_if_shared_1 (last_ptr
);
2819 last_ptr
= &XEXP (x
, i
);
2823 if (XVEC (x
, i
) != NULL
)
2826 int len
= XVECLEN (x
, i
);
2828 /* Copy the vector iff I copied the rtx and the length
2830 if (copied
&& len
> 0)
2831 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2833 /* Call recursively on all inside the vector. */
2834 for (j
= 0; j
< len
; j
++)
2837 copy_rtx_if_shared_1 (last_ptr
);
2838 last_ptr
= &XVECEXP (x
, i
, j
);
2853 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2856 mark_used_flags (rtx x
, int flag
)
2860 const char *format_ptr
;
2863 /* Repeat is used to turn tail-recursion into iteration. */
2868 code
= GET_CODE (x
);
2870 /* These types may be freely shared so we needn't do any resetting
2894 /* The chain of insns is not being copied. */
2901 RTX_FLAG (x
, used
) = flag
;
2903 format_ptr
= GET_RTX_FORMAT (code
);
2904 length
= GET_RTX_LENGTH (code
);
2906 for (i
= 0; i
< length
; i
++)
2908 switch (*format_ptr
++)
2916 mark_used_flags (XEXP (x
, i
), flag
);
2920 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2921 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
2927 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2928 to look for shared sub-parts. */
2931 reset_used_flags (rtx x
)
2933 mark_used_flags (x
, 0);
2936 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2937 to look for shared sub-parts. */
2940 set_used_flags (rtx x
)
2942 mark_used_flags (x
, 1);
2945 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2946 Return X or the rtx for the pseudo reg the value of X was copied into.
2947 OTHER must be valid as a SET_DEST. */
2950 make_safe_from (rtx x
, rtx other
)
2953 switch (GET_CODE (other
))
2956 other
= SUBREG_REG (other
);
2958 case STRICT_LOW_PART
:
2961 other
= XEXP (other
, 0);
2970 && GET_CODE (x
) != SUBREG
)
2972 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2973 || reg_mentioned_p (other
, x
))))
2975 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2976 emit_move_insn (temp
, x
);
2982 /* Emission of insns (adding them to the doubly-linked list). */
2984 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2987 get_last_insn_anywhere (void)
2989 struct sequence_stack
*stack
;
2990 if (get_last_insn ())
2991 return get_last_insn ();
2992 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2993 if (stack
->last
!= 0)
2998 /* Return the first nonnote insn emitted in current sequence or current
2999 function. This routine looks inside SEQUENCEs. */
3002 get_first_nonnote_insn (void)
3004 rtx insn
= get_insns ();
3009 for (insn
= next_insn (insn
);
3010 insn
&& NOTE_P (insn
);
3011 insn
= next_insn (insn
))
3015 if (NONJUMP_INSN_P (insn
)
3016 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3017 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3024 /* Return the last nonnote insn emitted in current sequence or current
3025 function. This routine looks inside SEQUENCEs. */
3028 get_last_nonnote_insn (void)
3030 rtx insn
= get_last_insn ();
3035 for (insn
= previous_insn (insn
);
3036 insn
&& NOTE_P (insn
);
3037 insn
= previous_insn (insn
))
3041 if (NONJUMP_INSN_P (insn
)
3042 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3043 insn
= XVECEXP (PATTERN (insn
), 0,
3044 XVECLEN (PATTERN (insn
), 0) - 1);
3051 /* Return the number of actual (non-debug) insns emitted in this
3055 get_max_insn_count (void)
3057 int n
= cur_insn_uid
;
3059 /* The table size must be stable across -g, to avoid codegen
3060 differences due to debug insns, and not be affected by
3061 -fmin-insn-uid, to avoid excessive table size and to simplify
3062 debugging of -fcompare-debug failures. */
3063 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3064 n
-= cur_debug_insn_uid
;
3066 n
-= MIN_NONDEBUG_INSN_UID
;
3072 /* Return the next insn. If it is a SEQUENCE, return the first insn
3076 next_insn (rtx insn
)
3080 insn
= NEXT_INSN (insn
);
3081 if (insn
&& NONJUMP_INSN_P (insn
)
3082 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3083 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3089 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3093 previous_insn (rtx insn
)
3097 insn
= PREV_INSN (insn
);
3098 if (insn
&& NONJUMP_INSN_P (insn
)
3099 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3100 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3106 /* Return the next insn after INSN that is not a NOTE. This routine does not
3107 look inside SEQUENCEs. */
3110 next_nonnote_insn (rtx insn
)
3114 insn
= NEXT_INSN (insn
);
3115 if (insn
== 0 || !NOTE_P (insn
))
3122 /* Return the next insn after INSN that is not a NOTE, but stop the
3123 search before we enter another basic block. This routine does not
3124 look inside SEQUENCEs. */
3127 next_nonnote_insn_bb (rtx insn
)
3131 insn
= NEXT_INSN (insn
);
3132 if (insn
== 0 || !NOTE_P (insn
))
3134 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3141 /* Return the previous insn before INSN that is not a NOTE. This routine does
3142 not look inside SEQUENCEs. */
3145 prev_nonnote_insn (rtx insn
)
3149 insn
= PREV_INSN (insn
);
3150 if (insn
== 0 || !NOTE_P (insn
))
3157 /* Return the previous insn before INSN that is not a NOTE, but stop
3158 the search before we enter another basic block. This routine does
3159 not look inside SEQUENCEs. */
3162 prev_nonnote_insn_bb (rtx insn
)
3166 insn
= PREV_INSN (insn
);
3167 if (insn
== 0 || !NOTE_P (insn
))
3169 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3176 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3177 routine does not look inside SEQUENCEs. */
3180 next_nondebug_insn (rtx insn
)
3184 insn
= NEXT_INSN (insn
);
3185 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3192 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3193 This routine does not look inside SEQUENCEs. */
3196 prev_nondebug_insn (rtx insn
)
3200 insn
= PREV_INSN (insn
);
3201 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3208 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3209 This routine does not look inside SEQUENCEs. */
3212 next_nonnote_nondebug_insn (rtx insn
)
3216 insn
= NEXT_INSN (insn
);
3217 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3224 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3225 This routine does not look inside SEQUENCEs. */
3228 prev_nonnote_nondebug_insn (rtx insn
)
3232 insn
= PREV_INSN (insn
);
3233 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3240 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3241 or 0, if there is none. This routine does not look inside
3245 next_real_insn (rtx insn
)
3249 insn
= NEXT_INSN (insn
);
3250 if (insn
== 0 || INSN_P (insn
))
3257 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3258 or 0, if there is none. This routine does not look inside
3262 prev_real_insn (rtx insn
)
3266 insn
= PREV_INSN (insn
);
3267 if (insn
== 0 || INSN_P (insn
))
3274 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3275 This routine does not look inside SEQUENCEs. */
3278 last_call_insn (void)
3282 for (insn
= get_last_insn ();
3283 insn
&& !CALL_P (insn
);
3284 insn
= PREV_INSN (insn
))
3290 /* Find the next insn after INSN that really does something. This routine
3291 does not look inside SEQUENCEs. After reload this also skips over
3292 standalone USE and CLOBBER insn. */
3295 active_insn_p (const_rtx insn
)
3297 return (CALL_P (insn
) || JUMP_P (insn
)
3298 || (NONJUMP_INSN_P (insn
)
3299 && (! reload_completed
3300 || (GET_CODE (PATTERN (insn
)) != USE
3301 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3305 next_active_insn (rtx insn
)
3309 insn
= NEXT_INSN (insn
);
3310 if (insn
== 0 || active_insn_p (insn
))
3317 /* Find the last insn before INSN that really does something. This routine
3318 does not look inside SEQUENCEs. After reload this also skips over
3319 standalone USE and CLOBBER insn. */
3322 prev_active_insn (rtx insn
)
3326 insn
= PREV_INSN (insn
);
3327 if (insn
== 0 || active_insn_p (insn
))
3334 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3337 next_label (rtx insn
)
3341 insn
= NEXT_INSN (insn
);
3342 if (insn
== 0 || LABEL_P (insn
))
3349 /* Return the last label to mark the same position as LABEL. Return LABEL
3350 itself if it is null or any return rtx. */
3353 skip_consecutive_labels (rtx label
)
3357 if (label
&& ANY_RETURN_P (label
))
3360 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
3368 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3369 and REG_CC_USER notes so we can find it. */
3372 link_cc0_insns (rtx insn
)
3374 rtx user
= next_nonnote_insn (insn
);
3376 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
3377 user
= XVECEXP (PATTERN (user
), 0, 0);
3379 add_reg_note (user
, REG_CC_SETTER
, insn
);
3380 add_reg_note (insn
, REG_CC_USER
, user
);
3383 /* Return the next insn that uses CC0 after INSN, which is assumed to
3384 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3385 applied to the result of this function should yield INSN).
3387 Normally, this is simply the next insn. However, if a REG_CC_USER note
3388 is present, it contains the insn that uses CC0.
3390 Return 0 if we can't find the insn. */
3393 next_cc0_user (rtx insn
)
3395 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3398 return XEXP (note
, 0);
3400 insn
= next_nonnote_insn (insn
);
3401 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3402 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3404 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3410 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3411 note, it is the previous insn. */
3414 prev_cc0_setter (rtx insn
)
3416 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3419 return XEXP (note
, 0);
3421 insn
= prev_nonnote_insn (insn
);
3422 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3429 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3432 find_auto_inc (rtx
*xp
, void *data
)
3435 rtx reg
= (rtx
) data
;
3437 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3440 switch (GET_CODE (x
))
3448 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3459 /* Increment the label uses for all labels present in rtx. */
3462 mark_label_nuses (rtx x
)
3468 code
= GET_CODE (x
);
3469 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3470 LABEL_NUSES (XEXP (x
, 0))++;
3472 fmt
= GET_RTX_FORMAT (code
);
3473 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3476 mark_label_nuses (XEXP (x
, i
));
3477 else if (fmt
[i
] == 'E')
3478 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3479 mark_label_nuses (XVECEXP (x
, i
, j
));
3484 /* Try splitting insns that can be split for better scheduling.
3485 PAT is the pattern which might split.
3486 TRIAL is the insn providing PAT.
3487 LAST is nonzero if we should return the last insn of the sequence produced.
3489 If this routine succeeds in splitting, it returns the first or last
3490 replacement insn depending on the value of LAST. Otherwise, it
3491 returns TRIAL. If the insn to be returned can be split, it will be. */
3494 try_split (rtx pat
, rtx trial
, int last
)
3496 rtx before
= PREV_INSN (trial
);
3497 rtx after
= NEXT_INSN (trial
);
3498 int has_barrier
= 0;
3501 rtx insn_last
, insn
;
3504 /* We're not good at redistributing frame information. */
3505 if (RTX_FRAME_RELATED_P (trial
))
3508 if (any_condjump_p (trial
)
3509 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3510 split_branch_probability
= INTVAL (XEXP (note
, 0));
3511 probability
= split_branch_probability
;
3513 seq
= split_insns (pat
, trial
);
3515 split_branch_probability
= -1;
3517 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3518 We may need to handle this specially. */
3519 if (after
&& BARRIER_P (after
))
3522 after
= NEXT_INSN (after
);
3528 /* Avoid infinite loop if any insn of the result matches
3529 the original pattern. */
3533 if (INSN_P (insn_last
)
3534 && rtx_equal_p (PATTERN (insn_last
), pat
))
3536 if (!NEXT_INSN (insn_last
))
3538 insn_last
= NEXT_INSN (insn_last
);
3541 /* We will be adding the new sequence to the function. The splitters
3542 may have introduced invalid RTL sharing, so unshare the sequence now. */
3543 unshare_all_rtl_in_chain (seq
);
3546 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3550 mark_jump_label (PATTERN (insn
), insn
, 0);
3552 if (probability
!= -1
3553 && any_condjump_p (insn
)
3554 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3556 /* We can preserve the REG_BR_PROB notes only if exactly
3557 one jump is created, otherwise the machine description
3558 is responsible for this step using
3559 split_branch_probability variable. */
3560 gcc_assert (njumps
== 1);
3561 add_reg_note (insn
, REG_BR_PROB
, GEN_INT (probability
));
3566 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3567 in SEQ and copy any additional information across. */
3570 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3575 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3576 target may have explicitly specified. */
3577 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3580 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3582 /* If the old call was a sibling call, the new one must
3584 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3586 /* If the new call is the last instruction in the sequence,
3587 it will effectively replace the old call in-situ. Otherwise
3588 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3589 so that it comes immediately after the new call. */
3590 if (NEXT_INSN (insn
))
3591 for (next
= NEXT_INSN (trial
);
3592 next
&& NOTE_P (next
);
3593 next
= NEXT_INSN (next
))
3594 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3597 add_insn_after (next
, insn
, NULL
);
3603 /* Copy notes, particularly those related to the CFG. */
3604 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3606 switch (REG_NOTE_KIND (note
))
3609 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3615 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3618 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3622 case REG_NON_LOCAL_GOTO
:
3623 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3626 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3632 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3634 rtx reg
= XEXP (note
, 0);
3635 if (!FIND_REG_INC_NOTE (insn
, reg
)
3636 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3637 add_reg_note (insn
, REG_INC
, reg
);
3643 fixup_args_size_notes (NULL_RTX
, insn_last
, INTVAL (XEXP (note
, 0)));
3651 /* If there are LABELS inside the split insns increment the
3652 usage count so we don't delete the label. */
3656 while (insn
!= NULL_RTX
)
3658 /* JUMP_P insns have already been "marked" above. */
3659 if (NONJUMP_INSN_P (insn
))
3660 mark_label_nuses (PATTERN (insn
));
3662 insn
= PREV_INSN (insn
);
3666 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3668 delete_insn (trial
);
3670 emit_barrier_after (tem
);
3672 /* Recursively call try_split for each new insn created; by the
3673 time control returns here that insn will be fully split, so
3674 set LAST and continue from the insn after the one returned.
3675 We can't use next_active_insn here since AFTER may be a note.
3676 Ignore deleted insns, which can be occur if not optimizing. */
3677 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3678 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3679 tem
= try_split (PATTERN (tem
), tem
, 1);
3681 /* Return either the first or the last insn, depending on which was
3684 ? (after
? PREV_INSN (after
) : get_last_insn ())
3685 : NEXT_INSN (before
);
3688 /* Make and return an INSN rtx, initializing all its slots.
3689 Store PATTERN in the pattern slots. */
3692 make_insn_raw (rtx pattern
)
3696 insn
= rtx_alloc (INSN
);
3698 INSN_UID (insn
) = cur_insn_uid
++;
3699 PATTERN (insn
) = pattern
;
3700 INSN_CODE (insn
) = -1;
3701 REG_NOTES (insn
) = NULL
;
3702 INSN_LOCATION (insn
) = curr_insn_location ();
3703 BLOCK_FOR_INSN (insn
) = NULL
;
3705 #ifdef ENABLE_RTL_CHECKING
3708 && (returnjump_p (insn
)
3709 || (GET_CODE (insn
) == SET
3710 && SET_DEST (insn
) == pc_rtx
)))
3712 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3720 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3723 make_debug_insn_raw (rtx pattern
)
3727 insn
= rtx_alloc (DEBUG_INSN
);
3728 INSN_UID (insn
) = cur_debug_insn_uid
++;
3729 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3730 INSN_UID (insn
) = cur_insn_uid
++;
3732 PATTERN (insn
) = pattern
;
3733 INSN_CODE (insn
) = -1;
3734 REG_NOTES (insn
) = NULL
;
3735 INSN_LOCATION (insn
) = curr_insn_location ();
3736 BLOCK_FOR_INSN (insn
) = NULL
;
3741 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3744 make_jump_insn_raw (rtx pattern
)
3748 insn
= rtx_alloc (JUMP_INSN
);
3749 INSN_UID (insn
) = cur_insn_uid
++;
3751 PATTERN (insn
) = pattern
;
3752 INSN_CODE (insn
) = -1;
3753 REG_NOTES (insn
) = NULL
;
3754 JUMP_LABEL (insn
) = NULL
;
3755 INSN_LOCATION (insn
) = curr_insn_location ();
3756 BLOCK_FOR_INSN (insn
) = NULL
;
3761 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3764 make_call_insn_raw (rtx pattern
)
3768 insn
= rtx_alloc (CALL_INSN
);
3769 INSN_UID (insn
) = cur_insn_uid
++;
3771 PATTERN (insn
) = pattern
;
3772 INSN_CODE (insn
) = -1;
3773 REG_NOTES (insn
) = NULL
;
3774 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3775 INSN_LOCATION (insn
) = curr_insn_location ();
3776 BLOCK_FOR_INSN (insn
) = NULL
;
3781 /* Add INSN to the end of the doubly-linked list.
3782 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3787 PREV_INSN (insn
) = get_last_insn();
3788 NEXT_INSN (insn
) = 0;
3790 if (NULL
!= get_last_insn())
3791 NEXT_INSN (get_last_insn ()) = insn
;
3793 if (NULL
== get_insns ())
3794 set_first_insn (insn
);
3796 set_last_insn (insn
);
3799 /* Add INSN into the doubly-linked list after insn AFTER. This and
3800 the next should be the only functions called to insert an insn once
3801 delay slots have been filled since only they know how to update a
3805 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3807 rtx next
= NEXT_INSN (after
);
3809 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3811 NEXT_INSN (insn
) = next
;
3812 PREV_INSN (insn
) = after
;
3816 PREV_INSN (next
) = insn
;
3817 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3818 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3820 else if (get_last_insn () == after
)
3821 set_last_insn (insn
);
3824 struct sequence_stack
*stack
= seq_stack
;
3825 /* Scan all pending sequences too. */
3826 for (; stack
; stack
= stack
->next
)
3827 if (after
== stack
->last
)
3836 if (!BARRIER_P (after
)
3837 && !BARRIER_P (insn
)
3838 && (bb
= BLOCK_FOR_INSN (after
)))
3840 set_block_for_insn (insn
, bb
);
3842 df_insn_rescan (insn
);
3843 /* Should not happen as first in the BB is always
3844 either NOTE or LABEL. */
3845 if (BB_END (bb
) == after
3846 /* Avoid clobbering of structure when creating new BB. */
3847 && !BARRIER_P (insn
)
3848 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3852 NEXT_INSN (after
) = insn
;
3853 if (NONJUMP_INSN_P (after
) && GET_CODE (PATTERN (after
)) == SEQUENCE
)
3855 rtx sequence
= PATTERN (after
);
3856 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3860 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3861 the previous should be the only functions called to insert an insn
3862 once delay slots have been filled since only they know how to
3863 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3867 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
3869 rtx prev
= PREV_INSN (before
);
3871 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3873 PREV_INSN (insn
) = prev
;
3874 NEXT_INSN (insn
) = before
;
3878 NEXT_INSN (prev
) = insn
;
3879 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3881 rtx sequence
= PATTERN (prev
);
3882 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3885 else if (get_insns () == before
)
3886 set_first_insn (insn
);
3889 struct sequence_stack
*stack
= seq_stack
;
3890 /* Scan all pending sequences too. */
3891 for (; stack
; stack
= stack
->next
)
3892 if (before
== stack
->first
)
3894 stack
->first
= insn
;
3902 && !BARRIER_P (before
)
3903 && !BARRIER_P (insn
))
3904 bb
= BLOCK_FOR_INSN (before
);
3908 set_block_for_insn (insn
, bb
);
3910 df_insn_rescan (insn
);
3911 /* Should not happen as first in the BB is always either NOTE or
3913 gcc_assert (BB_HEAD (bb
) != insn
3914 /* Avoid clobbering of structure when creating new BB. */
3916 || NOTE_INSN_BASIC_BLOCK_P (insn
));
3919 PREV_INSN (before
) = insn
;
3920 if (NONJUMP_INSN_P (before
) && GET_CODE (PATTERN (before
)) == SEQUENCE
)
3921 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3925 /* Replace insn with an deleted instruction note. */
3928 set_insn_deleted (rtx insn
)
3930 df_insn_delete (BLOCK_FOR_INSN (insn
), INSN_UID (insn
));
3931 PUT_CODE (insn
, NOTE
);
3932 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
3936 /* Remove an insn from its doubly-linked list. This function knows how
3937 to handle sequences. */
3939 remove_insn (rtx insn
)
3941 rtx next
= NEXT_INSN (insn
);
3942 rtx prev
= PREV_INSN (insn
);
3945 /* Later in the code, the block will be marked dirty. */
3946 df_insn_delete (NULL
, INSN_UID (insn
));
3950 NEXT_INSN (prev
) = next
;
3951 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3953 rtx sequence
= PATTERN (prev
);
3954 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3957 else if (get_insns () == insn
)
3960 PREV_INSN (next
) = NULL
;
3961 set_first_insn (next
);
3965 struct sequence_stack
*stack
= seq_stack
;
3966 /* Scan all pending sequences too. */
3967 for (; stack
; stack
= stack
->next
)
3968 if (insn
== stack
->first
)
3970 stack
->first
= next
;
3979 PREV_INSN (next
) = prev
;
3980 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3981 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3983 else if (get_last_insn () == insn
)
3984 set_last_insn (prev
);
3987 struct sequence_stack
*stack
= seq_stack
;
3988 /* Scan all pending sequences too. */
3989 for (; stack
; stack
= stack
->next
)
3990 if (insn
== stack
->last
)
3998 if (!BARRIER_P (insn
)
3999 && (bb
= BLOCK_FOR_INSN (insn
)))
4001 if (NONDEBUG_INSN_P (insn
))
4002 df_set_bb_dirty (bb
);
4003 if (BB_HEAD (bb
) == insn
)
4005 /* Never ever delete the basic block note without deleting whole
4007 gcc_assert (!NOTE_P (insn
));
4008 BB_HEAD (bb
) = next
;
4010 if (BB_END (bb
) == insn
)
4015 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4018 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4020 gcc_assert (call_insn
&& CALL_P (call_insn
));
4022 /* Put the register usage information on the CALL. If there is already
4023 some usage information, put ours at the end. */
4024 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4028 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4029 link
= XEXP (link
, 1))
4032 XEXP (link
, 1) = call_fusage
;
4035 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4038 /* Delete all insns made since FROM.
4039 FROM becomes the new last instruction. */
4042 delete_insns_since (rtx from
)
4047 NEXT_INSN (from
) = 0;
4048 set_last_insn (from
);
4051 /* This function is deprecated, please use sequences instead.
4053 Move a consecutive bunch of insns to a different place in the chain.
4054 The insns to be moved are those between FROM and TO.
4055 They are moved to a new position after the insn AFTER.
4056 AFTER must not be FROM or TO or any insn in between.
4058 This function does not know about SEQUENCEs and hence should not be
4059 called after delay-slot filling has been done. */
4062 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
4064 #ifdef ENABLE_CHECKING
4066 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4067 gcc_assert (after
!= x
);
4068 gcc_assert (after
!= to
);
4071 /* Splice this bunch out of where it is now. */
4072 if (PREV_INSN (from
))
4073 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4075 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4076 if (get_last_insn () == to
)
4077 set_last_insn (PREV_INSN (from
));
4078 if (get_insns () == from
)
4079 set_first_insn (NEXT_INSN (to
));
4081 /* Make the new neighbors point to it and it to them. */
4082 if (NEXT_INSN (after
))
4083 PREV_INSN (NEXT_INSN (after
)) = to
;
4085 NEXT_INSN (to
) = NEXT_INSN (after
);
4086 PREV_INSN (from
) = after
;
4087 NEXT_INSN (after
) = from
;
4088 if (after
== get_last_insn())
4092 /* Same as function above, but take care to update BB boundaries. */
4094 reorder_insns (rtx from
, rtx to
, rtx after
)
4096 rtx prev
= PREV_INSN (from
);
4097 basic_block bb
, bb2
;
4099 reorder_insns_nobb (from
, to
, after
);
4101 if (!BARRIER_P (after
)
4102 && (bb
= BLOCK_FOR_INSN (after
)))
4105 df_set_bb_dirty (bb
);
4107 if (!BARRIER_P (from
)
4108 && (bb2
= BLOCK_FOR_INSN (from
)))
4110 if (BB_END (bb2
) == to
)
4111 BB_END (bb2
) = prev
;
4112 df_set_bb_dirty (bb2
);
4115 if (BB_END (bb
) == after
)
4118 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4120 df_insn_change_bb (x
, bb
);
4125 /* Emit insn(s) of given code and pattern
4126 at a specified place within the doubly-linked list.
4128 All of the emit_foo global entry points accept an object
4129 X which is either an insn list or a PATTERN of a single
4132 There are thus a few canonical ways to generate code and
4133 emit it at a specific place in the instruction stream. For
4134 example, consider the instruction named SPOT and the fact that
4135 we would like to emit some instructions before SPOT. We might
4139 ... emit the new instructions ...
4140 insns_head = get_insns ();
4143 emit_insn_before (insns_head, SPOT);
4145 It used to be common to generate SEQUENCE rtl instead, but that
4146 is a relic of the past which no longer occurs. The reason is that
4147 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4148 generated would almost certainly die right after it was created. */
4151 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4152 rtx (*make_raw
) (rtx
))
4156 gcc_assert (before
);
4161 switch (GET_CODE (x
))
4173 rtx next
= NEXT_INSN (insn
);
4174 add_insn_before (insn
, before
, bb
);
4180 #ifdef ENABLE_RTL_CHECKING
4187 last
= (*make_raw
) (x
);
4188 add_insn_before (last
, before
, bb
);
4195 /* Make X be output before the instruction BEFORE. */
4198 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
4200 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4203 /* Make an instruction with body X and code JUMP_INSN
4204 and output it before the instruction BEFORE. */
4207 emit_jump_insn_before_noloc (rtx x
, rtx before
)
4209 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4210 make_jump_insn_raw
);
4213 /* Make an instruction with body X and code CALL_INSN
4214 and output it before the instruction BEFORE. */
4217 emit_call_insn_before_noloc (rtx x
, rtx before
)
4219 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4220 make_call_insn_raw
);
4223 /* Make an instruction with body X and code DEBUG_INSN
4224 and output it before the instruction BEFORE. */
4227 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4229 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4230 make_debug_insn_raw
);
4233 /* Make an insn of code BARRIER
4234 and output it before the insn BEFORE. */
4237 emit_barrier_before (rtx before
)
4239 rtx insn
= rtx_alloc (BARRIER
);
4241 INSN_UID (insn
) = cur_insn_uid
++;
4243 add_insn_before (insn
, before
, NULL
);
4247 /* Emit the label LABEL before the insn BEFORE. */
4250 emit_label_before (rtx label
, rtx before
)
4252 gcc_checking_assert (INSN_UID (label
) == 0);
4253 INSN_UID (label
) = cur_insn_uid
++;
4254 add_insn_before (label
, before
, NULL
);
4258 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4261 emit_note_before (enum insn_note subtype
, rtx before
)
4263 rtx note
= rtx_alloc (NOTE
);
4264 INSN_UID (note
) = cur_insn_uid
++;
4265 NOTE_KIND (note
) = subtype
;
4266 BLOCK_FOR_INSN (note
) = NULL
;
4267 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4269 add_insn_before (note
, before
, NULL
);
4273 /* Helper for emit_insn_after, handles lists of instructions
4277 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
4281 if (!bb
&& !BARRIER_P (after
))
4282 bb
= BLOCK_FOR_INSN (after
);
4286 df_set_bb_dirty (bb
);
4287 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4288 if (!BARRIER_P (last
))
4290 set_block_for_insn (last
, bb
);
4291 df_insn_rescan (last
);
4293 if (!BARRIER_P (last
))
4295 set_block_for_insn (last
, bb
);
4296 df_insn_rescan (last
);
4298 if (BB_END (bb
) == after
)
4302 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4305 after_after
= NEXT_INSN (after
);
4307 NEXT_INSN (after
) = first
;
4308 PREV_INSN (first
) = after
;
4309 NEXT_INSN (last
) = after_after
;
4311 PREV_INSN (after_after
) = last
;
4313 if (after
== get_last_insn())
4314 set_last_insn (last
);
4320 emit_pattern_after_noloc (rtx x
, rtx after
, basic_block bb
,
4321 rtx (*make_raw
)(rtx
))
4330 switch (GET_CODE (x
))
4339 last
= emit_insn_after_1 (x
, after
, bb
);
4342 #ifdef ENABLE_RTL_CHECKING
4349 last
= (*make_raw
) (x
);
4350 add_insn_after (last
, after
, bb
);
4357 /* Make X be output after the insn AFTER and set the BB of insn. If
4358 BB is NULL, an attempt is made to infer the BB from AFTER. */
4361 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4363 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4367 /* Make an insn of code JUMP_INSN with body X
4368 and output it after the insn AFTER. */
4371 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4373 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4376 /* Make an instruction with body X and code CALL_INSN
4377 and output it after the instruction AFTER. */
4380 emit_call_insn_after_noloc (rtx x
, rtx after
)
4382 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4385 /* Make an instruction with body X and code CALL_INSN
4386 and output it after the instruction AFTER. */
4389 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4391 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4394 /* Make an insn of code BARRIER
4395 and output it after the insn AFTER. */
4398 emit_barrier_after (rtx after
)
4400 rtx insn
= rtx_alloc (BARRIER
);
4402 INSN_UID (insn
) = cur_insn_uid
++;
4404 add_insn_after (insn
, after
, NULL
);
4408 /* Emit the label LABEL after the insn AFTER. */
4411 emit_label_after (rtx label
, rtx after
)
4413 gcc_checking_assert (INSN_UID (label
) == 0);
4414 INSN_UID (label
) = cur_insn_uid
++;
4415 add_insn_after (label
, after
, NULL
);
4419 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4422 emit_note_after (enum insn_note subtype
, rtx after
)
4424 rtx note
= rtx_alloc (NOTE
);
4425 INSN_UID (note
) = cur_insn_uid
++;
4426 NOTE_KIND (note
) = subtype
;
4427 BLOCK_FOR_INSN (note
) = NULL
;
4428 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4429 add_insn_after (note
, after
, NULL
);
4433 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4434 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4437 emit_pattern_after_setloc (rtx pattern
, rtx after
, int loc
,
4438 rtx (*make_raw
) (rtx
))
4440 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4442 if (pattern
== NULL_RTX
|| !loc
)
4445 after
= NEXT_INSN (after
);
4448 if (active_insn_p (after
) && !INSN_LOCATION (after
))
4449 INSN_LOCATION (after
) = loc
;
4452 after
= NEXT_INSN (after
);
4457 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4458 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4462 emit_pattern_after (rtx pattern
, rtx after
, bool skip_debug_insns
,
4463 rtx (*make_raw
) (rtx
))
4467 if (skip_debug_insns
)
4468 while (DEBUG_INSN_P (prev
))
4469 prev
= PREV_INSN (prev
);
4472 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4475 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4478 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4480 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4482 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4485 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4487 emit_insn_after (rtx pattern
, rtx after
)
4489 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4492 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4494 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4496 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4499 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4501 emit_jump_insn_after (rtx pattern
, rtx after
)
4503 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4506 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4508 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4510 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4513 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4515 emit_call_insn_after (rtx pattern
, rtx after
)
4517 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4520 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4522 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4524 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4527 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4529 emit_debug_insn_after (rtx pattern
, rtx after
)
4531 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4534 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4535 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4536 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4540 emit_pattern_before_setloc (rtx pattern
, rtx before
, int loc
, bool insnp
,
4541 rtx (*make_raw
) (rtx
))
4543 rtx first
= PREV_INSN (before
);
4544 rtx last
= emit_pattern_before_noloc (pattern
, before
,
4545 insnp
? before
: NULL_RTX
,
4548 if (pattern
== NULL_RTX
|| !loc
)
4552 first
= get_insns ();
4554 first
= NEXT_INSN (first
);
4557 if (active_insn_p (first
) && !INSN_LOCATION (first
))
4558 INSN_LOCATION (first
) = loc
;
4561 first
= NEXT_INSN (first
);
4566 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4567 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4568 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4569 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4572 emit_pattern_before (rtx pattern
, rtx before
, bool skip_debug_insns
,
4573 bool insnp
, rtx (*make_raw
) (rtx
))
4577 if (skip_debug_insns
)
4578 while (DEBUG_INSN_P (next
))
4579 next
= PREV_INSN (next
);
4582 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4585 return emit_pattern_before_noloc (pattern
, before
,
4586 insnp
? before
: NULL_RTX
,
4590 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4592 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4594 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4598 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4600 emit_insn_before (rtx pattern
, rtx before
)
4602 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4605 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4607 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4609 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4610 make_jump_insn_raw
);
4613 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4615 emit_jump_insn_before (rtx pattern
, rtx before
)
4617 return emit_pattern_before (pattern
, before
, true, false,
4618 make_jump_insn_raw
);
4621 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4623 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4625 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4626 make_call_insn_raw
);
4629 /* Like emit_call_insn_before_noloc,
4630 but set insn_location according to BEFORE. */
4632 emit_call_insn_before (rtx pattern
, rtx before
)
4634 return emit_pattern_before (pattern
, before
, true, false,
4635 make_call_insn_raw
);
4638 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4640 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4642 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4643 make_debug_insn_raw
);
4646 /* Like emit_debug_insn_before_noloc,
4647 but set insn_location according to BEFORE. */
4649 emit_debug_insn_before (rtx pattern
, rtx before
)
4651 return emit_pattern_before (pattern
, before
, false, false,
4652 make_debug_insn_raw
);
4655 /* Take X and emit it at the end of the doubly-linked
4658 Returns the last insn emitted. */
4663 rtx last
= get_last_insn();
4669 switch (GET_CODE (x
))
4681 rtx next
= NEXT_INSN (insn
);
4688 #ifdef ENABLE_RTL_CHECKING
4695 last
= make_insn_raw (x
);
4703 /* Make an insn of code DEBUG_INSN with pattern X
4704 and add it to the end of the doubly-linked list. */
4707 emit_debug_insn (rtx x
)
4709 rtx last
= get_last_insn();
4715 switch (GET_CODE (x
))
4727 rtx next
= NEXT_INSN (insn
);
4734 #ifdef ENABLE_RTL_CHECKING
4741 last
= make_debug_insn_raw (x
);
4749 /* Make an insn of code JUMP_INSN with pattern X
4750 and add it to the end of the doubly-linked list. */
4753 emit_jump_insn (rtx x
)
4755 rtx last
= NULL_RTX
, insn
;
4757 switch (GET_CODE (x
))
4769 rtx next
= NEXT_INSN (insn
);
4776 #ifdef ENABLE_RTL_CHECKING
4783 last
= make_jump_insn_raw (x
);
4791 /* Make an insn of code CALL_INSN with pattern X
4792 and add it to the end of the doubly-linked list. */
4795 emit_call_insn (rtx x
)
4799 switch (GET_CODE (x
))
4808 insn
= emit_insn (x
);
4811 #ifdef ENABLE_RTL_CHECKING
4818 insn
= make_call_insn_raw (x
);
4826 /* Add the label LABEL to the end of the doubly-linked list. */
4829 emit_label (rtx label
)
4831 gcc_checking_assert (INSN_UID (label
) == 0);
4832 INSN_UID (label
) = cur_insn_uid
++;
4837 /* Make an insn of code BARRIER
4838 and add it to the end of the doubly-linked list. */
4843 rtx barrier
= rtx_alloc (BARRIER
);
4844 INSN_UID (barrier
) = cur_insn_uid
++;
4849 /* Emit a copy of note ORIG. */
4852 emit_note_copy (rtx orig
)
4856 note
= rtx_alloc (NOTE
);
4858 INSN_UID (note
) = cur_insn_uid
++;
4859 NOTE_DATA (note
) = NOTE_DATA (orig
);
4860 NOTE_KIND (note
) = NOTE_KIND (orig
);
4861 BLOCK_FOR_INSN (note
) = NULL
;
4867 /* Make an insn of code NOTE or type NOTE_NO
4868 and add it to the end of the doubly-linked list. */
4871 emit_note (enum insn_note kind
)
4875 note
= rtx_alloc (NOTE
);
4876 INSN_UID (note
) = cur_insn_uid
++;
4877 NOTE_KIND (note
) = kind
;
4878 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4879 BLOCK_FOR_INSN (note
) = NULL
;
4884 /* Emit a clobber of lvalue X. */
4887 emit_clobber (rtx x
)
4889 /* CONCATs should not appear in the insn stream. */
4890 if (GET_CODE (x
) == CONCAT
)
4892 emit_clobber (XEXP (x
, 0));
4893 return emit_clobber (XEXP (x
, 1));
4895 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
4898 /* Return a sequence of insns to clobber lvalue X. */
4912 /* Emit a use of rvalue X. */
4917 /* CONCATs should not appear in the insn stream. */
4918 if (GET_CODE (x
) == CONCAT
)
4920 emit_use (XEXP (x
, 0));
4921 return emit_use (XEXP (x
, 1));
4923 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
4926 /* Return a sequence of insns to use rvalue X. */
4940 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4941 note of this type already exists, remove it first. */
4944 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4946 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4952 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4953 has multiple sets (some callers assume single_set
4954 means the insn only has one set, when in fact it
4955 means the insn only has one * useful * set). */
4956 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4962 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4963 It serves no useful purpose and breaks eliminate_regs. */
4964 if (GET_CODE (datum
) == ASM_OPERANDS
)
4969 XEXP (note
, 0) = datum
;
4970 df_notes_rescan (insn
);
4978 XEXP (note
, 0) = datum
;
4984 add_reg_note (insn
, kind
, datum
);
4990 df_notes_rescan (insn
);
4996 return REG_NOTES (insn
);
4999 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5001 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5003 rtx set
= single_set (insn
);
5005 if (set
&& SET_DEST (set
) == dst
)
5006 return set_unique_reg_note (insn
, kind
, datum
);
5010 /* Return an indication of which type of insn should have X as a body.
5011 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5013 static enum rtx_code
5014 classify_insn (rtx x
)
5018 if (GET_CODE (x
) == CALL
)
5020 if (ANY_RETURN_P (x
))
5022 if (GET_CODE (x
) == SET
)
5024 if (SET_DEST (x
) == pc_rtx
)
5026 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5031 if (GET_CODE (x
) == PARALLEL
)
5034 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5035 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5037 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5038 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5040 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5041 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5047 /* Emit the rtl pattern X as an appropriate kind of insn.
5048 If X is a label, it is simply added into the insn chain. */
5053 enum rtx_code code
= classify_insn (x
);
5058 return emit_label (x
);
5060 return emit_insn (x
);
5063 rtx insn
= emit_jump_insn (x
);
5064 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5065 return emit_barrier ();
5069 return emit_call_insn (x
);
5071 return emit_debug_insn (x
);
5077 /* Space for free sequence stack entries. */
5078 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5080 /* Begin emitting insns to a sequence. If this sequence will contain
5081 something that might cause the compiler to pop arguments to function
5082 calls (because those pops have previously been deferred; see
5083 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5084 before calling this function. That will ensure that the deferred
5085 pops are not accidentally emitted in the middle of this sequence. */
5088 start_sequence (void)
5090 struct sequence_stack
*tem
;
5092 if (free_sequence_stack
!= NULL
)
5094 tem
= free_sequence_stack
;
5095 free_sequence_stack
= tem
->next
;
5098 tem
= ggc_alloc_sequence_stack ();
5100 tem
->next
= seq_stack
;
5101 tem
->first
= get_insns ();
5102 tem
->last
= get_last_insn ();
5110 /* Set up the insn chain starting with FIRST as the current sequence,
5111 saving the previously current one. See the documentation for
5112 start_sequence for more information about how to use this function. */
5115 push_to_sequence (rtx first
)
5121 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5124 set_first_insn (first
);
5125 set_last_insn (last
);
5128 /* Like push_to_sequence, but take the last insn as an argument to avoid
5129 looping through the list. */
5132 push_to_sequence2 (rtx first
, rtx last
)
5136 set_first_insn (first
);
5137 set_last_insn (last
);
5140 /* Set up the outer-level insn chain
5141 as the current sequence, saving the previously current one. */
5144 push_topmost_sequence (void)
5146 struct sequence_stack
*stack
, *top
= NULL
;
5150 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5153 set_first_insn (top
->first
);
5154 set_last_insn (top
->last
);
5157 /* After emitting to the outer-level insn chain, update the outer-level
5158 insn chain, and restore the previous saved state. */
5161 pop_topmost_sequence (void)
5163 struct sequence_stack
*stack
, *top
= NULL
;
5165 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5168 top
->first
= get_insns ();
5169 top
->last
= get_last_insn ();
5174 /* After emitting to a sequence, restore previous saved state.
5176 To get the contents of the sequence just made, you must call
5177 `get_insns' *before* calling here.
5179 If the compiler might have deferred popping arguments while
5180 generating this sequence, and this sequence will not be immediately
5181 inserted into the instruction stream, use do_pending_stack_adjust
5182 before calling get_insns. That will ensure that the deferred
5183 pops are inserted into this sequence, and not into some random
5184 location in the instruction stream. See INHIBIT_DEFER_POP for more
5185 information about deferred popping of arguments. */
5190 struct sequence_stack
*tem
= seq_stack
;
5192 set_first_insn (tem
->first
);
5193 set_last_insn (tem
->last
);
5194 seq_stack
= tem
->next
;
5196 memset (tem
, 0, sizeof (*tem
));
5197 tem
->next
= free_sequence_stack
;
5198 free_sequence_stack
= tem
;
5201 /* Return 1 if currently emitting into a sequence. */
5204 in_sequence_p (void)
5206 return seq_stack
!= 0;
5209 /* Put the various virtual registers into REGNO_REG_RTX. */
5212 init_virtual_regs (void)
5214 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5215 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5216 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5217 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5218 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5219 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5220 = virtual_preferred_stack_boundary_rtx
;
5224 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5225 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5226 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5227 static int copy_insn_n_scratches
;
5229 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5230 copied an ASM_OPERANDS.
5231 In that case, it is the original input-operand vector. */
5232 static rtvec orig_asm_operands_vector
;
5234 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5235 copied an ASM_OPERANDS.
5236 In that case, it is the copied input-operand vector. */
5237 static rtvec copy_asm_operands_vector
;
5239 /* Likewise for the constraints vector. */
5240 static rtvec orig_asm_constraints_vector
;
5241 static rtvec copy_asm_constraints_vector
;
5243 /* Recursively create a new copy of an rtx for copy_insn.
5244 This function differs from copy_rtx in that it handles SCRATCHes and
5245 ASM_OPERANDs properly.
5246 Normally, this function is not used directly; use copy_insn as front end.
5247 However, you could first copy an insn pattern with copy_insn and then use
5248 this function afterwards to properly copy any REG_NOTEs containing
5252 copy_insn_1 (rtx orig
)
5257 const char *format_ptr
;
5262 code
= GET_CODE (orig
);
5277 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
5282 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5283 if (copy_insn_scratch_in
[i
] == orig
)
5284 return copy_insn_scratch_out
[i
];
5288 if (shared_const_p (orig
))
5292 /* A MEM with a constant address is not sharable. The problem is that
5293 the constant address may need to be reloaded. If the mem is shared,
5294 then reloading one copy of this mem will cause all copies to appear
5295 to have been reloaded. */
5301 /* Copy the various flags, fields, and other information. We assume
5302 that all fields need copying, and then clear the fields that should
5303 not be copied. That is the sensible default behavior, and forces
5304 us to explicitly document why we are *not* copying a flag. */
5305 copy
= shallow_copy_rtx (orig
);
5307 /* We do not copy the USED flag, which is used as a mark bit during
5308 walks over the RTL. */
5309 RTX_FLAG (copy
, used
) = 0;
5311 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5314 RTX_FLAG (copy
, jump
) = 0;
5315 RTX_FLAG (copy
, call
) = 0;
5316 RTX_FLAG (copy
, frame_related
) = 0;
5319 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5321 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5322 switch (*format_ptr
++)
5325 if (XEXP (orig
, i
) != NULL
)
5326 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5331 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5332 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5333 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5334 XVEC (copy
, i
) = copy_asm_operands_vector
;
5335 else if (XVEC (orig
, i
) != NULL
)
5337 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5338 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5339 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5350 /* These are left unchanged. */
5357 if (code
== SCRATCH
)
5359 i
= copy_insn_n_scratches
++;
5360 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5361 copy_insn_scratch_in
[i
] = orig
;
5362 copy_insn_scratch_out
[i
] = copy
;
5364 else if (code
== ASM_OPERANDS
)
5366 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5367 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5368 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5369 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5375 /* Create a new copy of an rtx.
5376 This function differs from copy_rtx in that it handles SCRATCHes and
5377 ASM_OPERANDs properly.
5378 INSN doesn't really have to be a full INSN; it could be just the
5381 copy_insn (rtx insn
)
5383 copy_insn_n_scratches
= 0;
5384 orig_asm_operands_vector
= 0;
5385 orig_asm_constraints_vector
= 0;
5386 copy_asm_operands_vector
= 0;
5387 copy_asm_constraints_vector
= 0;
5388 return copy_insn_1 (insn
);
5391 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5392 on that assumption that INSN itself remains in its original place. */
5395 copy_delay_slot_insn (rtx insn
)
5397 /* Copy INSN with its rtx_code, all its notes, location etc. */
5398 insn
= copy_rtx (insn
);
5399 INSN_UID (insn
) = cur_insn_uid
++;
5403 /* Initialize data structures and variables in this file
5404 before generating rtl for each function. */
5409 set_first_insn (NULL
);
5410 set_last_insn (NULL
);
5411 if (MIN_NONDEBUG_INSN_UID
)
5412 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5415 cur_debug_insn_uid
= 1;
5416 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5417 first_label_num
= label_num
;
5420 /* Init the tables that describe all the pseudo regs. */
5422 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5424 crtl
->emit
.regno_pointer_align
5425 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5427 regno_reg_rtx
= ggc_alloc_vec_rtx (crtl
->emit
.regno_pointer_align_length
);
5429 /* Put copies of all the hard registers into regno_reg_rtx. */
5430 memcpy (regno_reg_rtx
,
5431 initial_regno_reg_rtx
,
5432 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5434 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5435 init_virtual_regs ();
5437 /* Indicate that the virtual registers and stack locations are
5439 REG_POINTER (stack_pointer_rtx
) = 1;
5440 REG_POINTER (frame_pointer_rtx
) = 1;
5441 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5442 REG_POINTER (arg_pointer_rtx
) = 1;
5444 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5445 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5446 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5447 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5448 REG_POINTER (virtual_cfa_rtx
) = 1;
5450 #ifdef STACK_BOUNDARY
5451 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5452 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5453 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5454 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5456 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5457 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5458 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5459 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5460 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5463 #ifdef INIT_EXPANDERS
5468 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5471 gen_const_vector (enum machine_mode mode
, int constant
)
5476 enum machine_mode inner
;
5478 units
= GET_MODE_NUNITS (mode
);
5479 inner
= GET_MODE_INNER (mode
);
5481 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5483 v
= rtvec_alloc (units
);
5485 /* We need to call this function after we set the scalar const_tiny_rtx
5487 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5489 for (i
= 0; i
< units
; ++i
)
5490 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5492 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5496 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5497 all elements are zero, and the one vector when all elements are one. */
5499 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5501 enum machine_mode inner
= GET_MODE_INNER (mode
);
5502 int nunits
= GET_MODE_NUNITS (mode
);
5506 /* Check to see if all of the elements have the same value. */
5507 x
= RTVEC_ELT (v
, nunits
- 1);
5508 for (i
= nunits
- 2; i
>= 0; i
--)
5509 if (RTVEC_ELT (v
, i
) != x
)
5512 /* If the values are all the same, check to see if we can use one of the
5513 standard constant vectors. */
5516 if (x
== CONST0_RTX (inner
))
5517 return CONST0_RTX (mode
);
5518 else if (x
== CONST1_RTX (inner
))
5519 return CONST1_RTX (mode
);
5520 else if (x
== CONSTM1_RTX (inner
))
5521 return CONSTM1_RTX (mode
);
5524 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5527 /* Initialise global register information required by all functions. */
5530 init_emit_regs (void)
5533 enum machine_mode mode
;
5536 /* Reset register attributes */
5537 htab_empty (reg_attrs_htab
);
5539 /* We need reg_raw_mode, so initialize the modes now. */
5540 init_reg_modes_target ();
5542 /* Assign register numbers to the globally defined register rtx. */
5543 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5544 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5545 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5546 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5547 virtual_incoming_args_rtx
=
5548 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5549 virtual_stack_vars_rtx
=
5550 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5551 virtual_stack_dynamic_rtx
=
5552 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5553 virtual_outgoing_args_rtx
=
5554 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5555 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5556 virtual_preferred_stack_boundary_rtx
=
5557 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5559 /* Initialize RTL for commonly used hard registers. These are
5560 copied into regno_reg_rtx as we begin to compile each function. */
5561 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5562 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5564 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5565 return_address_pointer_rtx
5566 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5569 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5570 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5572 pic_offset_table_rtx
= NULL_RTX
;
5574 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5576 mode
= (enum machine_mode
) i
;
5577 attrs
= ggc_alloc_cleared_mem_attrs ();
5578 attrs
->align
= BITS_PER_UNIT
;
5579 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5580 if (mode
!= BLKmode
)
5582 attrs
->size_known_p
= true;
5583 attrs
->size
= GET_MODE_SIZE (mode
);
5584 if (STRICT_ALIGNMENT
)
5585 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5587 mode_mem_attrs
[i
] = attrs
;
5591 /* Create some permanent unique rtl objects shared between all functions. */
5594 init_emit_once (void)
5597 enum machine_mode mode
;
5598 enum machine_mode double_mode
;
5600 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5602 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5603 const_int_htab_eq
, NULL
);
5605 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5606 const_double_htab_eq
, NULL
);
5608 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5609 const_fixed_htab_eq
, NULL
);
5611 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5612 mem_attrs_htab_eq
, NULL
);
5613 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5614 reg_attrs_htab_eq
, NULL
);
5616 /* Compute the word and byte modes. */
5618 byte_mode
= VOIDmode
;
5619 word_mode
= VOIDmode
;
5620 double_mode
= VOIDmode
;
5622 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5624 mode
= GET_MODE_WIDER_MODE (mode
))
5626 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5627 && byte_mode
== VOIDmode
)
5630 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5631 && word_mode
== VOIDmode
)
5635 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5637 mode
= GET_MODE_WIDER_MODE (mode
))
5639 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5640 && double_mode
== VOIDmode
)
5644 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5646 #ifdef INIT_EXPANDERS
5647 /* This is to initialize {init|mark|free}_machine_status before the first
5648 call to push_function_context_to. This is needed by the Chill front
5649 end which calls push_function_context_to before the first call to
5650 init_function_start. */
5654 /* Create the unique rtx's for certain rtx codes and operand values. */
5656 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5657 tries to use these variables. */
5658 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5659 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5660 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5662 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5663 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5664 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5666 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5668 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5669 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5670 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5675 dconsthalf
= dconst1
;
5676 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5678 for (i
= 0; i
< 3; i
++)
5680 const REAL_VALUE_TYPE
*const r
=
5681 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5683 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5685 mode
= GET_MODE_WIDER_MODE (mode
))
5686 const_tiny_rtx
[i
][(int) mode
] =
5687 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5689 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5691 mode
= GET_MODE_WIDER_MODE (mode
))
5692 const_tiny_rtx
[i
][(int) mode
] =
5693 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5695 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5697 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5699 mode
= GET_MODE_WIDER_MODE (mode
))
5700 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5702 for (mode
= MIN_MODE_PARTIAL_INT
;
5703 mode
<= MAX_MODE_PARTIAL_INT
;
5704 mode
= (enum machine_mode
)((int)(mode
) + 1))
5705 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5708 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5710 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5712 mode
= GET_MODE_WIDER_MODE (mode
))
5713 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5715 for (mode
= MIN_MODE_PARTIAL_INT
;
5716 mode
<= MAX_MODE_PARTIAL_INT
;
5717 mode
= (enum machine_mode
)((int)(mode
) + 1))
5718 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5720 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5722 mode
= GET_MODE_WIDER_MODE (mode
))
5724 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5725 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5728 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5730 mode
= GET_MODE_WIDER_MODE (mode
))
5732 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5733 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5736 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5738 mode
= GET_MODE_WIDER_MODE (mode
))
5740 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5741 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5742 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
5745 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5747 mode
= GET_MODE_WIDER_MODE (mode
))
5749 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5750 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5753 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5755 mode
= GET_MODE_WIDER_MODE (mode
))
5757 FCONST0(mode
).data
.high
= 0;
5758 FCONST0(mode
).data
.low
= 0;
5759 FCONST0(mode
).mode
= mode
;
5760 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5761 FCONST0 (mode
), mode
);
5764 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5766 mode
= GET_MODE_WIDER_MODE (mode
))
5768 FCONST0(mode
).data
.high
= 0;
5769 FCONST0(mode
).data
.low
= 0;
5770 FCONST0(mode
).mode
= mode
;
5771 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5772 FCONST0 (mode
), mode
);
5775 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5777 mode
= GET_MODE_WIDER_MODE (mode
))
5779 FCONST0(mode
).data
.high
= 0;
5780 FCONST0(mode
).data
.low
= 0;
5781 FCONST0(mode
).mode
= mode
;
5782 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5783 FCONST0 (mode
), mode
);
5785 /* We store the value 1. */
5786 FCONST1(mode
).data
.high
= 0;
5787 FCONST1(mode
).data
.low
= 0;
5788 FCONST1(mode
).mode
= mode
;
5790 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5791 HOST_BITS_PER_DOUBLE_INT
,
5792 SIGNED_FIXED_POINT_MODE_P (mode
));
5793 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5794 FCONST1 (mode
), mode
);
5797 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5799 mode
= GET_MODE_WIDER_MODE (mode
))
5801 FCONST0(mode
).data
.high
= 0;
5802 FCONST0(mode
).data
.low
= 0;
5803 FCONST0(mode
).mode
= mode
;
5804 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5805 FCONST0 (mode
), mode
);
5807 /* We store the value 1. */
5808 FCONST1(mode
).data
.high
= 0;
5809 FCONST1(mode
).data
.low
= 0;
5810 FCONST1(mode
).mode
= mode
;
5812 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5813 HOST_BITS_PER_DOUBLE_INT
,
5814 SIGNED_FIXED_POINT_MODE_P (mode
));
5815 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5816 FCONST1 (mode
), mode
);
5819 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5821 mode
= GET_MODE_WIDER_MODE (mode
))
5823 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5826 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
5828 mode
= GET_MODE_WIDER_MODE (mode
))
5830 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5833 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
5835 mode
= GET_MODE_WIDER_MODE (mode
))
5837 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5838 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5841 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
5843 mode
= GET_MODE_WIDER_MODE (mode
))
5845 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5846 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5849 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5850 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5851 const_tiny_rtx
[0][i
] = const0_rtx
;
5853 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5854 if (STORE_FLAG_VALUE
== 1)
5855 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5857 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
5858 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
5859 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
5860 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
5863 /* Produce exact duplicate of insn INSN after AFTER.
5864 Care updating of libcall regions if present. */
5867 emit_copy_of_insn_after (rtx insn
, rtx after
)
5871 switch (GET_CODE (insn
))
5874 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5878 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5882 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
5886 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5887 if (CALL_INSN_FUNCTION_USAGE (insn
))
5888 CALL_INSN_FUNCTION_USAGE (new_rtx
)
5889 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5890 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
5891 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
5892 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
5893 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
5894 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
5901 /* Update LABEL_NUSES. */
5902 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
5904 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
5906 /* If the old insn is frame related, then so is the new one. This is
5907 primarily needed for IA-64 unwind info which marks epilogue insns,
5908 which may be duplicated by the basic block reordering code. */
5909 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
5911 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5912 will make them. REG_LABEL_TARGETs are created there too, but are
5913 supposed to be sticky, so we copy them. */
5914 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5915 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
5917 if (GET_CODE (link
) == EXPR_LIST
)
5918 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
5919 copy_insn_1 (XEXP (link
, 0)));
5921 add_reg_note (new_rtx
, REG_NOTE_KIND (link
), XEXP (link
, 0));
5924 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
5928 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5930 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5932 if (hard_reg_clobbers
[mode
][regno
])
5933 return hard_reg_clobbers
[mode
][regno
];
5935 return (hard_reg_clobbers
[mode
][regno
] =
5936 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5939 location_t prologue_location
;
5940 location_t epilogue_location
;
5942 /* Hold current location information and last location information, so the
5943 datastructures are built lazily only when some instructions in given
5944 place are needed. */
5945 static location_t curr_location
, last_location
;
5947 /* Allocate insn location datastructure. */
5949 insn_locations_init (void)
5951 prologue_location
= epilogue_location
= 0;
5952 curr_location
= UNKNOWN_LOCATION
;
5953 last_location
= UNKNOWN_LOCATION
;
5956 /* At the end of emit stage, clear current location. */
5958 insn_locations_finalize (void)
5960 epilogue_location
= curr_location
;
5961 curr_location
= UNKNOWN_LOCATION
;
5964 /* Set current location. */
5966 set_curr_insn_location (location_t location
)
5968 curr_location
= location
;
5971 /* Get current location. */
5973 curr_insn_location (void)
5975 return curr_location
;
5978 /* Return lexical scope block insn belongs to. */
5980 insn_scope (const_rtx insn
)
5982 return LOCATION_BLOCK (INSN_LOCATION (insn
));
5985 /* Return line number of the statement that produced this insn. */
5987 insn_line (const_rtx insn
)
5989 return LOCATION_LINE (INSN_LOCATION (insn
));
5992 /* Return source file of the statement that produced this insn. */
5994 insn_file (const_rtx insn
)
5996 return LOCATION_FILE (INSN_LOCATION (insn
));
5999 /* Return true if memory model MODEL requires a pre-operation (release-style)
6000 barrier or a post-operation (acquire-style) barrier. While not universal,
6001 this function matches behavior of several targets. */
6004 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6008 case MEMMODEL_RELAXED
:
6009 case MEMMODEL_CONSUME
:
6011 case MEMMODEL_RELEASE
:
6013 case MEMMODEL_ACQUIRE
:
6015 case MEMMODEL_ACQ_REL
:
6016 case MEMMODEL_SEQ_CST
:
6023 #include "gt-emit-rtl.h"