1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
58 #include "tree-pass.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static GTY(()) int label_num
= 1;
73 /* Nonzero means do not generate NOTEs for source line numbers. */
75 static int no_line_numbers
;
77 /* Commonly used rtx's, so that we only need space for one copy.
78 These are initialized once for the entire compilation.
79 All of these are unique; no other rtx-object will be equal to any
82 rtx global_rtl
[GR_MAX
];
84 /* Commonly used RTL for hard registers. These objects are not necessarily
85 unique, so we allocate them separately from global_rtl. They are
86 initialized once per compilation unit, then copied into regno_reg_rtx
87 at the beginning of each function. */
88 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
90 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
91 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
92 record a copy of const[012]_rtx. */
94 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
98 REAL_VALUE_TYPE dconst0
;
99 REAL_VALUE_TYPE dconst1
;
100 REAL_VALUE_TYPE dconst2
;
101 REAL_VALUE_TYPE dconst3
;
102 REAL_VALUE_TYPE dconst10
;
103 REAL_VALUE_TYPE dconstm1
;
104 REAL_VALUE_TYPE dconstm2
;
105 REAL_VALUE_TYPE dconsthalf
;
106 REAL_VALUE_TYPE dconstthird
;
107 REAL_VALUE_TYPE dconstpi
;
108 REAL_VALUE_TYPE dconste
;
110 /* All references to the following fixed hard registers go through
111 these unique rtl objects. On machines where the frame-pointer and
112 arg-pointer are the same register, they use the same unique object.
114 After register allocation, other rtl objects which used to be pseudo-regs
115 may be clobbered to refer to the frame-pointer register.
116 But references that were originally to the frame-pointer can be
117 distinguished from the others because they contain frame_pointer_rtx.
119 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
120 tricky: until register elimination has taken place hard_frame_pointer_rtx
121 should be used if it is being set, and frame_pointer_rtx otherwise. After
122 register elimination hard_frame_pointer_rtx should always be used.
123 On machines where the two registers are same (most) then these are the
126 In an inline procedure, the stack and frame pointer rtxs may not be
127 used for anything else. */
128 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
129 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
130 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
132 /* This is used to implement __builtin_return_address for some machines.
133 See for instance the MIPS port. */
134 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
136 /* We make one copy of (const_int C) where C is in
137 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
138 to save space during the compilation and simplify comparisons of
141 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
143 /* A hash table storing CONST_INTs whose absolute value is greater
144 than MAX_SAVED_CONST_INT. */
146 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
147 htab_t const_int_htab
;
149 /* A hash table storing memory attribute structures. */
150 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
151 htab_t mem_attrs_htab
;
153 /* A hash table storing register attribute structures. */
154 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
155 htab_t reg_attrs_htab
;
157 /* A hash table storing all CONST_DOUBLEs. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
159 htab_t const_double_htab
;
161 #define first_insn (cfun->emit->x_first_insn)
162 #define last_insn (cfun->emit->x_last_insn)
163 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
164 #define last_location (cfun->emit->x_last_location)
165 #define first_label_num (cfun->emit->x_first_label_num)
167 static rtx
make_call_insn_raw (rtx
);
168 static rtx
find_line_note (rtx
);
169 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
170 static void unshare_all_decls (tree
);
171 static void reset_used_decls (tree
);
172 static void mark_label_nuses (rtx
);
173 static hashval_t
const_int_htab_hash (const void *);
174 static int const_int_htab_eq (const void *, const void *);
175 static hashval_t
const_double_htab_hash (const void *);
176 static int const_double_htab_eq (const void *, const void *);
177 static rtx
lookup_const_double (rtx
);
178 static hashval_t
mem_attrs_htab_hash (const void *);
179 static int mem_attrs_htab_eq (const void *, const void *);
180 static mem_attrs
*get_mem_attrs (HOST_WIDE_INT
, tree
, rtx
, rtx
, unsigned int,
182 static hashval_t
reg_attrs_htab_hash (const void *);
183 static int reg_attrs_htab_eq (const void *, const void *);
184 static reg_attrs
*get_reg_attrs (tree
, int);
185 static tree
component_ref_for_mem_expr (tree
);
186 static rtx
gen_const_vector (enum machine_mode
, int);
187 static void copy_rtx_if_shared_1 (rtx
*orig
);
189 /* Probability of the conditional branch currently proceeded by try_split.
190 Set to -1 otherwise. */
191 int split_branch_probability
= -1;
193 /* Returns a hash code for X (which is a really a CONST_INT). */
196 const_int_htab_hash (const void *x
)
198 return (hashval_t
) INTVAL ((rtx
) x
);
201 /* Returns nonzero if the value represented by X (which is really a
202 CONST_INT) is the same as that given by Y (which is really a
206 const_int_htab_eq (const void *x
, const void *y
)
208 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
211 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
213 const_double_htab_hash (const void *x
)
218 if (GET_MODE (value
) == VOIDmode
)
219 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
222 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
223 /* MODE is used in the comparison, so it should be in the hash. */
224 h
^= GET_MODE (value
);
229 /* Returns nonzero if the value represented by X (really a ...)
230 is the same as that represented by Y (really a ...) */
232 const_double_htab_eq (const void *x
, const void *y
)
234 rtx a
= (rtx
)x
, b
= (rtx
)y
;
236 if (GET_MODE (a
) != GET_MODE (b
))
238 if (GET_MODE (a
) == VOIDmode
)
239 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
240 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
242 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
243 CONST_DOUBLE_REAL_VALUE (b
));
246 /* Returns a hash code for X (which is a really a mem_attrs *). */
249 mem_attrs_htab_hash (const void *x
)
251 mem_attrs
*p
= (mem_attrs
*) x
;
253 return (p
->alias
^ (p
->align
* 1000)
254 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
255 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
256 ^ (size_t) iterative_hash_expr (p
->expr
, 0));
259 /* Returns nonzero if the value represented by X (which is really a
260 mem_attrs *) is the same as that given by Y (which is also really a
264 mem_attrs_htab_eq (const void *x
, const void *y
)
266 mem_attrs
*p
= (mem_attrs
*) x
;
267 mem_attrs
*q
= (mem_attrs
*) y
;
269 return (p
->alias
== q
->alias
&& p
->offset
== q
->offset
270 && p
->size
== q
->size
&& p
->align
== q
->align
271 && (p
->expr
== q
->expr
272 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
273 && operand_equal_p (p
->expr
, q
->expr
, 0))));
276 /* Allocate a new mem_attrs structure and insert it into the hash table if
277 one identical to it is not already in the table. We are doing this for
281 get_mem_attrs (HOST_WIDE_INT alias
, tree expr
, rtx offset
, rtx size
,
282 unsigned int align
, enum machine_mode mode
)
287 /* If everything is the default, we can just return zero.
288 This must match what the corresponding MEM_* macros return when the
289 field is not present. */
290 if (alias
== 0 && expr
== 0 && offset
== 0
292 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
293 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
294 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
299 attrs
.offset
= offset
;
303 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
306 *slot
= ggc_alloc (sizeof (mem_attrs
));
307 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
313 /* Returns a hash code for X (which is a really a reg_attrs *). */
316 reg_attrs_htab_hash (const void *x
)
318 reg_attrs
*p
= (reg_attrs
*) x
;
320 return ((p
->offset
* 1000) ^ (long) p
->decl
);
323 /* Returns nonzero if the value represented by X (which is really a
324 reg_attrs *) is the same as that given by Y (which is also really a
328 reg_attrs_htab_eq (const void *x
, const void *y
)
330 reg_attrs
*p
= (reg_attrs
*) x
;
331 reg_attrs
*q
= (reg_attrs
*) y
;
333 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
335 /* Allocate a new reg_attrs structure and insert it into the hash table if
336 one identical to it is not already in the table. We are doing this for
340 get_reg_attrs (tree decl
, int offset
)
345 /* If everything is the default, we can just return zero. */
346 if (decl
== 0 && offset
== 0)
350 attrs
.offset
= offset
;
352 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
355 *slot
= ggc_alloc (sizeof (reg_attrs
));
356 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
362 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
363 don't attempt to share with the various global pieces of rtl (such as
364 frame_pointer_rtx). */
367 gen_raw_REG (enum machine_mode mode
, int regno
)
369 rtx x
= gen_rtx_raw_REG (mode
, regno
);
370 ORIGINAL_REGNO (x
) = regno
;
374 /* There are some RTL codes that require special attention; the generation
375 functions do the raw handling. If you add to this list, modify
376 special_rtx in gengenrtl.c as well. */
379 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
383 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
384 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
386 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
387 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
388 return const_true_rtx
;
391 /* Look up the CONST_INT in the hash table. */
392 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
393 (hashval_t
) arg
, INSERT
);
395 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
401 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
403 return GEN_INT (trunc_int_for_mode (c
, mode
));
406 /* CONST_DOUBLEs might be created from pairs of integers, or from
407 REAL_VALUE_TYPEs. Also, their length is known only at run time,
408 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
410 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
411 hash table. If so, return its counterpart; otherwise add it
412 to the hash table and return it. */
414 lookup_const_double (rtx real
)
416 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
423 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
424 VALUE in mode MODE. */
426 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
428 rtx real
= rtx_alloc (CONST_DOUBLE
);
429 PUT_MODE (real
, mode
);
433 return lookup_const_double (real
);
436 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
437 of ints: I0 is the low-order word and I1 is the high-order word.
438 Do not use this routine for non-integer modes; convert to
439 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
442 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
447 if (mode
!= VOIDmode
)
451 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
452 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
453 /* We can get a 0 for an error mark. */
454 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
455 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
457 /* We clear out all bits that don't belong in MODE, unless they and
458 our sign bit are all one. So we get either a reasonable negative
459 value or a reasonable unsigned value for this mode. */
460 width
= GET_MODE_BITSIZE (mode
);
461 if (width
< HOST_BITS_PER_WIDE_INT
462 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
463 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
464 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
465 else if (width
== HOST_BITS_PER_WIDE_INT
466 && ! (i1
== ~0 && i0
< 0))
469 /* We should be able to represent this value as a constant. */
470 gcc_assert (width
<= 2 * HOST_BITS_PER_WIDE_INT
);
472 /* If this would be an entire word for the target, but is not for
473 the host, then sign-extend on the host so that the number will
474 look the same way on the host that it would on the target.
476 For example, when building a 64 bit alpha hosted 32 bit sparc
477 targeted compiler, then we want the 32 bit unsigned value -1 to be
478 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
479 The latter confuses the sparc backend. */
481 if (width
< HOST_BITS_PER_WIDE_INT
482 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
483 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
485 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
488 ??? Strictly speaking, this is wrong if we create a CONST_INT for
489 a large unsigned constant with the size of MODE being
490 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
491 in a wider mode. In that case we will mis-interpret it as a
494 Unfortunately, the only alternative is to make a CONST_DOUBLE for
495 any constant in any mode if it is an unsigned constant larger
496 than the maximum signed integer in an int on the host. However,
497 doing this will break everyone that always expects to see a
498 CONST_INT for SImode and smaller.
500 We have always been making CONST_INTs in this case, so nothing
501 new is being broken. */
503 if (width
<= HOST_BITS_PER_WIDE_INT
)
504 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
507 /* If this integer fits in one word, return a CONST_INT. */
508 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
511 /* We use VOIDmode for integers. */
512 value
= rtx_alloc (CONST_DOUBLE
);
513 PUT_MODE (value
, VOIDmode
);
515 CONST_DOUBLE_LOW (value
) = i0
;
516 CONST_DOUBLE_HIGH (value
) = i1
;
518 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
519 XWINT (value
, i
) = 0;
521 return lookup_const_double (value
);
525 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
527 /* In case the MD file explicitly references the frame pointer, have
528 all such references point to the same frame pointer. This is
529 used during frame pointer elimination to distinguish the explicit
530 references to these registers from pseudos that happened to be
533 If we have eliminated the frame pointer or arg pointer, we will
534 be using it as a normal register, for example as a spill
535 register. In such cases, we might be accessing it in a mode that
536 is not Pmode and therefore cannot use the pre-allocated rtx.
538 Also don't do this when we are making new REGs in reload, since
539 we don't want to get confused with the real pointers. */
541 if (mode
== Pmode
&& !reload_in_progress
)
543 if (regno
== FRAME_POINTER_REGNUM
544 && (!reload_completed
|| frame_pointer_needed
))
545 return frame_pointer_rtx
;
546 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
547 if (regno
== HARD_FRAME_POINTER_REGNUM
548 && (!reload_completed
|| frame_pointer_needed
))
549 return hard_frame_pointer_rtx
;
551 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
552 if (regno
== ARG_POINTER_REGNUM
)
553 return arg_pointer_rtx
;
555 #ifdef RETURN_ADDRESS_POINTER_REGNUM
556 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
557 return return_address_pointer_rtx
;
559 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
560 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
561 return pic_offset_table_rtx
;
562 if (regno
== STACK_POINTER_REGNUM
)
563 return stack_pointer_rtx
;
567 /* If the per-function register table has been set up, try to re-use
568 an existing entry in that table to avoid useless generation of RTL.
570 This code is disabled for now until we can fix the various backends
571 which depend on having non-shared hard registers in some cases. Long
572 term we want to re-enable this code as it can significantly cut down
573 on the amount of useless RTL that gets generated.
575 We'll also need to fix some code that runs after reload that wants to
576 set ORIGINAL_REGNO. */
581 && regno
< FIRST_PSEUDO_REGISTER
582 && reg_raw_mode
[regno
] == mode
)
583 return regno_reg_rtx
[regno
];
586 return gen_raw_REG (mode
, regno
);
590 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
592 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
594 /* This field is not cleared by the mere allocation of the rtx, so
601 /* Generate a memory referring to non-trapping constant memory. */
604 gen_const_mem (enum machine_mode mode
, rtx addr
)
606 rtx mem
= gen_rtx_MEM (mode
, addr
);
607 MEM_READONLY_P (mem
) = 1;
608 MEM_NOTRAP_P (mem
) = 1;
612 /* Generate a MEM referring to fixed portions of the frame, e.g., register
616 gen_frame_mem (enum machine_mode mode
, rtx addr
)
618 rtx mem
= gen_rtx_MEM (mode
, addr
);
619 MEM_NOTRAP_P (mem
) = 1;
620 set_mem_alias_set (mem
, get_frame_alias_set ());
624 /* Generate a MEM referring to a temporary use of the stack, not part
625 of the fixed stack frame. For example, something which is pushed
626 by a target splitter. */
628 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
630 rtx mem
= gen_rtx_MEM (mode
, addr
);
631 MEM_NOTRAP_P (mem
) = 1;
632 if (!current_function_calls_alloca
)
633 set_mem_alias_set (mem
, get_frame_alias_set ());
637 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
638 this construct would be valid, and false otherwise. */
641 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
642 rtx reg
, unsigned int offset
)
644 unsigned int isize
= GET_MODE_SIZE (imode
);
645 unsigned int osize
= GET_MODE_SIZE (omode
);
647 /* All subregs must be aligned. */
648 if (offset
% osize
!= 0)
651 /* The subreg offset cannot be outside the inner object. */
655 /* ??? This should not be here. Temporarily continue to allow word_mode
656 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
657 Generally, backends are doing something sketchy but it'll take time to
659 if (omode
== word_mode
)
661 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
662 is the culprit here, and not the backends. */
663 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
665 /* Allow component subregs of complex and vector. Though given the below
666 extraction rules, it's not always clear what that means. */
667 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
668 && GET_MODE_INNER (imode
) == omode
)
670 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
671 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
672 represent this. It's questionable if this ought to be represented at
673 all -- why can't this all be hidden in post-reload splitters that make
674 arbitrarily mode changes to the registers themselves. */
675 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
677 /* Subregs involving floating point modes are not allowed to
678 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
679 (subreg:SI (reg:DF) 0) isn't. */
680 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
686 /* Paradoxical subregs must have offset zero. */
690 /* This is a normal subreg. Verify that the offset is representable. */
692 /* For hard registers, we already have most of these rules collected in
693 subreg_offset_representable_p. */
694 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
696 unsigned int regno
= REGNO (reg
);
698 #ifdef CANNOT_CHANGE_MODE_CLASS
699 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
700 && GET_MODE_INNER (imode
) == omode
)
702 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
706 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
709 /* For pseudo registers, we want most of the same checks. Namely:
710 If the register no larger than a word, the subreg must be lowpart.
711 If the register is larger than a word, the subreg must be the lowpart
712 of a subword. A subreg does *not* perform arbitrary bit extraction.
713 Given that we've already checked mode/offset alignment, we only have
714 to check subword subregs here. */
715 if (osize
< UNITS_PER_WORD
)
717 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
718 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
719 if (offset
% UNITS_PER_WORD
!= low_off
)
726 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
728 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
729 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
732 /* Generate a SUBREG representing the least-significant part of REG if MODE
733 is smaller than mode of REG, otherwise paradoxical SUBREG. */
736 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
738 enum machine_mode inmode
;
740 inmode
= GET_MODE (reg
);
741 if (inmode
== VOIDmode
)
743 return gen_rtx_SUBREG (mode
, reg
,
744 subreg_lowpart_offset (mode
, inmode
));
747 /* gen_rtvec (n, [rt1, ..., rtn])
749 ** This routine creates an rtvec and stores within it the
750 ** pointers to rtx's which are its arguments.
755 gen_rtvec (int n
, ...)
764 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
766 vector
= alloca (n
* sizeof (rtx
));
768 for (i
= 0; i
< n
; i
++)
769 vector
[i
] = va_arg (p
, rtx
);
771 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
775 return gen_rtvec_v (save_n
, vector
);
779 gen_rtvec_v (int n
, rtx
*argp
)
785 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
787 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
789 for (i
= 0; i
< n
; i
++)
790 rt_val
->elem
[i
] = *argp
++;
795 /* Generate a REG rtx for a new pseudo register of mode MODE.
796 This pseudo is assigned the next sequential register number. */
799 gen_reg_rtx (enum machine_mode mode
)
801 struct function
*f
= cfun
;
804 /* Don't let anything called after initial flow analysis create new
806 gcc_assert (!no_new_pseudos
);
808 if (generating_concat_p
809 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
810 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
812 /* For complex modes, don't make a single pseudo.
813 Instead, make a CONCAT of two pseudos.
814 This allows noncontiguous allocation of the real and imaginary parts,
815 which makes much better code. Besides, allocating DCmode
816 pseudos overstrains reload on some machines like the 386. */
817 rtx realpart
, imagpart
;
818 enum machine_mode partmode
= GET_MODE_INNER (mode
);
820 realpart
= gen_reg_rtx (partmode
);
821 imagpart
= gen_reg_rtx (partmode
);
822 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
825 /* Make sure regno_pointer_align, and regno_reg_rtx are large
826 enough to have an element for this pseudo reg number. */
828 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
830 int old_size
= f
->emit
->regno_pointer_align_length
;
834 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
835 memset (new + old_size
, 0, old_size
);
836 f
->emit
->regno_pointer_align
= (unsigned char *) new;
838 new1
= ggc_realloc (f
->emit
->x_regno_reg_rtx
,
839 old_size
* 2 * sizeof (rtx
));
840 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
841 regno_reg_rtx
= new1
;
843 f
->emit
->regno_pointer_align_length
= old_size
* 2;
846 val
= gen_raw_REG (mode
, reg_rtx_no
);
847 regno_reg_rtx
[reg_rtx_no
++] = val
;
851 /* Generate a register with same attributes as REG, but offsetted by OFFSET.
852 Do the big endian correction if needed. */
855 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
, int offset
)
857 rtx
new = gen_rtx_REG (mode
, regno
);
859 HOST_WIDE_INT var_size
;
861 /* PR middle-end/14084
862 The problem appears when a variable is stored in a larger register
863 and later it is used in the original mode or some mode in between
864 or some part of variable is accessed.
866 On little endian machines there is no problem because
867 the REG_OFFSET of the start of the variable is the same when
868 accessed in any mode (it is 0).
870 However, this is not true on big endian machines.
871 The offset of the start of the variable is different when accessed
873 When we are taking a part of the REG we have to change the OFFSET
874 from offset WRT size of mode of REG to offset WRT size of variable.
876 If we would not do the big endian correction the resulting REG_OFFSET
877 would be larger than the size of the DECL.
879 Examples of correction, for BYTES_BIG_ENDIAN WORDS_BIG_ENDIAN machine:
881 REG.mode MODE DECL size old offset new offset description
882 DI SI 4 4 0 int32 in SImode
883 DI SI 1 4 0 char in SImode
884 DI QI 1 7 0 char in QImode
885 DI QI 4 5 1 1st element in QImode
887 DI HI 4 6 2 1st element in HImode
890 If the size of DECL is equal or greater than the size of REG
891 we can't do this correction because the register holds the
892 whole variable or a part of the variable and thus the REG_OFFSET
893 is already correct. */
895 decl
= REG_EXPR (reg
);
896 if ((BYTES_BIG_ENDIAN
|| WORDS_BIG_ENDIAN
)
899 && GET_MODE_SIZE (GET_MODE (reg
)) > GET_MODE_SIZE (mode
)
900 && ((var_size
= int_size_in_bytes (TREE_TYPE (decl
))) > 0
901 && var_size
< GET_MODE_SIZE (GET_MODE (reg
))))
905 /* Convert machine endian to little endian WRT size of mode of REG. */
906 if (WORDS_BIG_ENDIAN
)
907 offset_le
= ((GET_MODE_SIZE (GET_MODE (reg
)) - 1 - offset
)
908 / UNITS_PER_WORD
) * UNITS_PER_WORD
;
910 offset_le
= (offset
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
912 if (BYTES_BIG_ENDIAN
)
913 offset_le
+= ((GET_MODE_SIZE (GET_MODE (reg
)) - 1 - offset
)
916 offset_le
+= offset
% UNITS_PER_WORD
;
918 if (offset_le
>= var_size
)
920 /* MODE is wider than the variable so the new reg will cover
921 the whole variable so the resulting OFFSET should be 0. */
926 /* Convert little endian to machine endian WRT size of variable. */
927 if (WORDS_BIG_ENDIAN
)
928 offset
= ((var_size
- 1 - offset_le
)
929 / UNITS_PER_WORD
) * UNITS_PER_WORD
;
931 offset
= (offset_le
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
933 if (BYTES_BIG_ENDIAN
)
934 offset
+= ((var_size
- 1 - offset_le
)
937 offset
+= offset_le
% UNITS_PER_WORD
;
941 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
942 REG_OFFSET (reg
) + offset
);
946 /* Set the decl for MEM to DECL. */
949 set_reg_attrs_from_mem (rtx reg
, rtx mem
)
951 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
953 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
956 /* Set the register attributes for registers contained in PARM_RTX.
957 Use needed values from memory attributes of MEM. */
960 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
962 if (REG_P (parm_rtx
))
963 set_reg_attrs_from_mem (parm_rtx
, mem
);
964 else if (GET_CODE (parm_rtx
) == PARALLEL
)
966 /* Check for a NULL entry in the first slot, used to indicate that the
967 parameter goes both on the stack and in registers. */
968 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
969 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
971 rtx x
= XVECEXP (parm_rtx
, 0, i
);
972 if (REG_P (XEXP (x
, 0)))
973 REG_ATTRS (XEXP (x
, 0))
974 = get_reg_attrs (MEM_EXPR (mem
),
975 INTVAL (XEXP (x
, 1)));
980 /* Assign the RTX X to declaration T. */
982 set_decl_rtl (tree t
, rtx x
)
984 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
988 /* For register, we maintain the reverse information too. */
990 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
991 else if (GET_CODE (x
) == SUBREG
)
992 REG_ATTRS (SUBREG_REG (x
))
993 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
994 if (GET_CODE (x
) == CONCAT
)
996 if (REG_P (XEXP (x
, 0)))
997 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
998 if (REG_P (XEXP (x
, 1)))
999 REG_ATTRS (XEXP (x
, 1))
1000 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1002 if (GET_CODE (x
) == PARALLEL
)
1005 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
1007 rtx y
= XVECEXP (x
, 0, i
);
1008 if (REG_P (XEXP (y
, 0)))
1009 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1014 /* Assign the RTX X to parameter declaration T. */
1016 set_decl_incoming_rtl (tree t
, rtx x
)
1018 DECL_INCOMING_RTL (t
) = x
;
1022 /* For register, we maintain the reverse information too. */
1024 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
1025 else if (GET_CODE (x
) == SUBREG
)
1026 REG_ATTRS (SUBREG_REG (x
))
1027 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
1028 if (GET_CODE (x
) == CONCAT
)
1030 if (REG_P (XEXP (x
, 0)))
1031 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1032 if (REG_P (XEXP (x
, 1)))
1033 REG_ATTRS (XEXP (x
, 1))
1034 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1036 if (GET_CODE (x
) == PARALLEL
)
1040 /* Check for a NULL entry, used to indicate that the parameter goes
1041 both on the stack and in registers. */
1042 if (XEXP (XVECEXP (x
, 0, 0), 0))
1047 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1049 rtx y
= XVECEXP (x
, 0, i
);
1050 if (REG_P (XEXP (y
, 0)))
1051 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1056 /* Identify REG (which may be a CONCAT) as a user register. */
1059 mark_user_reg (rtx reg
)
1061 if (GET_CODE (reg
) == CONCAT
)
1063 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1064 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1068 gcc_assert (REG_P (reg
));
1069 REG_USERVAR_P (reg
) = 1;
1073 /* Identify REG as a probable pointer register and show its alignment
1074 as ALIGN, if nonzero. */
1077 mark_reg_pointer (rtx reg
, int align
)
1079 if (! REG_POINTER (reg
))
1081 REG_POINTER (reg
) = 1;
1084 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1086 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1087 /* We can no-longer be sure just how aligned this pointer is. */
1088 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1091 /* Return 1 plus largest pseudo reg number used in the current function. */
1099 /* Return 1 + the largest label number used so far in the current function. */
1102 max_label_num (void)
1107 /* Return first label number used in this function (if any were used). */
1110 get_first_label_num (void)
1112 return first_label_num
;
1115 /* If the rtx for label was created during the expansion of a nested
1116 function, then first_label_num won't include this label number.
1117 Fix this now so that array indicies work later. */
1120 maybe_set_first_label_num (rtx x
)
1122 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1123 first_label_num
= CODE_LABEL_NUMBER (x
);
1126 /* Return a value representing some low-order bits of X, where the number
1127 of low-order bits is given by MODE. Note that no conversion is done
1128 between floating-point and fixed-point values, rather, the bit
1129 representation is returned.
1131 This function handles the cases in common between gen_lowpart, below,
1132 and two variants in cse.c and combine.c. These are the cases that can
1133 be safely handled at all points in the compilation.
1135 If this is not a case we can handle, return 0. */
1138 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1140 int msize
= GET_MODE_SIZE (mode
);
1143 enum machine_mode innermode
;
1145 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1146 so we have to make one up. Yuk. */
1147 innermode
= GET_MODE (x
);
1148 if (GET_CODE (x
) == CONST_INT
1149 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1150 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1151 else if (innermode
== VOIDmode
)
1152 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
1154 xsize
= GET_MODE_SIZE (innermode
);
1156 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1158 if (innermode
== mode
)
1161 /* MODE must occupy no more words than the mode of X. */
1162 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1163 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1166 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1167 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1170 offset
= subreg_lowpart_offset (mode
, innermode
);
1172 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1173 && (GET_MODE_CLASS (mode
) == MODE_INT
1174 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1176 /* If we are getting the low-order part of something that has been
1177 sign- or zero-extended, we can either just use the object being
1178 extended or make a narrower extension. If we want an even smaller
1179 piece than the size of the object being extended, call ourselves
1182 This case is used mostly by combine and cse. */
1184 if (GET_MODE (XEXP (x
, 0)) == mode
)
1186 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1187 return gen_lowpart_common (mode
, XEXP (x
, 0));
1188 else if (msize
< xsize
)
1189 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1191 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1192 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1193 || GET_CODE (x
) == CONST_DOUBLE
|| GET_CODE (x
) == CONST_INT
)
1194 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1196 /* Otherwise, we can't do this. */
1201 gen_highpart (enum machine_mode mode
, rtx x
)
1203 unsigned int msize
= GET_MODE_SIZE (mode
);
1206 /* This case loses if X is a subreg. To catch bugs early,
1207 complain if an invalid MODE is used even in other cases. */
1208 gcc_assert (msize
<= UNITS_PER_WORD
1209 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1211 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1212 subreg_highpart_offset (mode
, GET_MODE (x
)));
1213 gcc_assert (result
);
1215 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1216 the target if we have a MEM. gen_highpart must return a valid operand,
1217 emitting code if necessary to do so. */
1220 result
= validize_mem (result
);
1221 gcc_assert (result
);
1227 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1228 be VOIDmode constant. */
1230 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1232 if (GET_MODE (exp
) != VOIDmode
)
1234 gcc_assert (GET_MODE (exp
) == innermode
);
1235 return gen_highpart (outermode
, exp
);
1237 return simplify_gen_subreg (outermode
, exp
, innermode
,
1238 subreg_highpart_offset (outermode
, innermode
));
1241 /* Return offset in bytes to get OUTERMODE low part
1242 of the value in mode INNERMODE stored in memory in target format. */
1245 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1247 unsigned int offset
= 0;
1248 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1252 if (WORDS_BIG_ENDIAN
)
1253 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1254 if (BYTES_BIG_ENDIAN
)
1255 offset
+= difference
% UNITS_PER_WORD
;
1261 /* Return offset in bytes to get OUTERMODE high part
1262 of the value in mode INNERMODE stored in memory in target format. */
1264 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1266 unsigned int offset
= 0;
1267 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1269 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1273 if (! WORDS_BIG_ENDIAN
)
1274 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1275 if (! BYTES_BIG_ENDIAN
)
1276 offset
+= difference
% UNITS_PER_WORD
;
1282 /* Return 1 iff X, assumed to be a SUBREG,
1283 refers to the least significant part of its containing reg.
1284 If X is not a SUBREG, always return 1 (it is its own low part!). */
1287 subreg_lowpart_p (rtx x
)
1289 if (GET_CODE (x
) != SUBREG
)
1291 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1294 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1295 == SUBREG_BYTE (x
));
1298 /* Return subword OFFSET of operand OP.
1299 The word number, OFFSET, is interpreted as the word number starting
1300 at the low-order address. OFFSET 0 is the low-order word if not
1301 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1303 If we cannot extract the required word, we return zero. Otherwise,
1304 an rtx corresponding to the requested word will be returned.
1306 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1307 reload has completed, a valid address will always be returned. After
1308 reload, if a valid address cannot be returned, we return zero.
1310 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1311 it is the responsibility of the caller.
1313 MODE is the mode of OP in case it is a CONST_INT.
1315 ??? This is still rather broken for some cases. The problem for the
1316 moment is that all callers of this thing provide no 'goal mode' to
1317 tell us to work with. This exists because all callers were written
1318 in a word based SUBREG world.
1319 Now use of this function can be deprecated by simplify_subreg in most
1324 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1326 if (mode
== VOIDmode
)
1327 mode
= GET_MODE (op
);
1329 gcc_assert (mode
!= VOIDmode
);
1331 /* If OP is narrower than a word, fail. */
1333 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1336 /* If we want a word outside OP, return zero. */
1338 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1341 /* Form a new MEM at the requested address. */
1344 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1346 if (! validate_address
)
1349 else if (reload_completed
)
1351 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1355 return replace_equiv_address (new, XEXP (new, 0));
1358 /* Rest can be handled by simplify_subreg. */
1359 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1362 /* Similar to `operand_subword', but never return 0. If we can't
1363 extract the required subword, put OP into a register and try again.
1364 The second attempt must succeed. We always validate the address in
1367 MODE is the mode of OP, in case it is CONST_INT. */
1370 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1372 rtx result
= operand_subword (op
, offset
, 1, mode
);
1377 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1379 /* If this is a register which can not be accessed by words, copy it
1380 to a pseudo register. */
1382 op
= copy_to_reg (op
);
1384 op
= force_reg (mode
, op
);
1387 result
= operand_subword (op
, offset
, 1, mode
);
1388 gcc_assert (result
);
1393 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1394 or (2) a component ref of something variable. Represent the later with
1395 a NULL expression. */
1398 component_ref_for_mem_expr (tree ref
)
1400 tree inner
= TREE_OPERAND (ref
, 0);
1402 if (TREE_CODE (inner
) == COMPONENT_REF
)
1403 inner
= component_ref_for_mem_expr (inner
);
1406 /* Now remove any conversions: they don't change what the underlying
1407 object is. Likewise for SAVE_EXPR. */
1408 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1409 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1410 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1411 || TREE_CODE (inner
) == SAVE_EXPR
)
1412 inner
= TREE_OPERAND (inner
, 0);
1414 if (! DECL_P (inner
))
1418 if (inner
== TREE_OPERAND (ref
, 0))
1421 return build3 (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1422 TREE_OPERAND (ref
, 1), NULL_TREE
);
1425 /* Returns 1 if both MEM_EXPR can be considered equal
1429 mem_expr_equal_p (tree expr1
, tree expr2
)
1434 if (! expr1
|| ! expr2
)
1437 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1440 if (TREE_CODE (expr1
) == COMPONENT_REF
)
1442 mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1443 TREE_OPERAND (expr2
, 0))
1444 && mem_expr_equal_p (TREE_OPERAND (expr1
, 1), /* field decl */
1445 TREE_OPERAND (expr2
, 1));
1447 if (INDIRECT_REF_P (expr1
))
1448 return mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1449 TREE_OPERAND (expr2
, 0));
1451 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1452 have been resolved here. */
1453 gcc_assert (DECL_P (expr1
));
1455 /* Decls with different pointers can't be equal. */
1459 /* Given REF, a MEM, and T, either the type of X or the expression
1460 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1461 if we are making a new object of this type. BITPOS is nonzero if
1462 there is an offset outstanding on T that will be applied later. */
1465 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1466 HOST_WIDE_INT bitpos
)
1468 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1469 tree expr
= MEM_EXPR (ref
);
1470 rtx offset
= MEM_OFFSET (ref
);
1471 rtx size
= MEM_SIZE (ref
);
1472 unsigned int align
= MEM_ALIGN (ref
);
1473 HOST_WIDE_INT apply_bitpos
= 0;
1476 /* It can happen that type_for_mode was given a mode for which there
1477 is no language-level type. In which case it returns NULL, which
1482 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1483 if (type
== error_mark_node
)
1486 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1487 wrong answer, as it assumes that DECL_RTL already has the right alias
1488 info. Callers should not set DECL_RTL until after the call to
1489 set_mem_attributes. */
1490 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1492 /* Get the alias set from the expression or type (perhaps using a
1493 front-end routine) and use it. */
1494 alias
= get_alias_set (t
);
1496 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1497 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1498 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1500 /* If we are making an object of this type, or if this is a DECL, we know
1501 that it is a scalar if the type is not an aggregate. */
1502 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1503 MEM_SCALAR_P (ref
) = 1;
1505 /* We can set the alignment from the type if we are making an object,
1506 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1507 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
1508 || TREE_CODE (t
) == ALIGN_INDIRECT_REF
1509 || TYPE_ALIGN_OK (type
))
1510 align
= MAX (align
, TYPE_ALIGN (type
));
1512 if (TREE_CODE (t
) == MISALIGNED_INDIRECT_REF
)
1514 if (integer_zerop (TREE_OPERAND (t
, 1)))
1515 /* We don't know anything about the alignment. */
1516 align
= BITS_PER_UNIT
;
1518 align
= tree_low_cst (TREE_OPERAND (t
, 1), 1);
1521 /* If the size is known, we can set that. */
1522 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1523 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1525 /* If T is not a type, we may be able to deduce some more information about
1531 if (TREE_THIS_VOLATILE (t
))
1532 MEM_VOLATILE_P (ref
) = 1;
1534 /* Now remove any conversions: they don't change what the underlying
1535 object is. Likewise for SAVE_EXPR. */
1536 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1537 || TREE_CODE (t
) == NON_LVALUE_EXPR
1538 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1539 || TREE_CODE (t
) == SAVE_EXPR
)
1540 t
= TREE_OPERAND (t
, 0);
1542 /* We may look through structure-like accesses for the purposes of
1543 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1545 while (TREE_CODE (base
) == COMPONENT_REF
1546 || TREE_CODE (base
) == REALPART_EXPR
1547 || TREE_CODE (base
) == IMAGPART_EXPR
1548 || TREE_CODE (base
) == BIT_FIELD_REF
)
1549 base
= TREE_OPERAND (base
, 0);
1553 if (CODE_CONTAINS_STRUCT (TREE_CODE (base
), TS_DECL_WITH_VIS
))
1554 MEM_NOTRAP_P (ref
) = !DECL_WEAK (base
);
1556 MEM_NOTRAP_P (ref
) = 1;
1559 MEM_NOTRAP_P (ref
) = TREE_THIS_NOTRAP (base
);
1561 base
= get_base_address (base
);
1562 if (base
&& DECL_P (base
)
1563 && TREE_READONLY (base
)
1564 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
)))
1566 tree base_type
= TREE_TYPE (base
);
1567 gcc_assert (!(base_type
&& TYPE_NEEDS_CONSTRUCTING (base_type
))
1568 || DECL_ARTIFICIAL (base
));
1569 MEM_READONLY_P (ref
) = 1;
1572 /* If this expression uses it's parent's alias set, mark it such
1573 that we won't change it. */
1574 if (component_uses_parent_alias_set (t
))
1575 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1577 /* If this is a decl, set the attributes of the MEM from it. */
1581 offset
= const0_rtx
;
1582 apply_bitpos
= bitpos
;
1583 size
= (DECL_SIZE_UNIT (t
)
1584 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1585 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1586 align
= DECL_ALIGN (t
);
1589 /* If this is a constant, we know the alignment. */
1590 else if (CONSTANT_CLASS_P (t
))
1592 align
= TYPE_ALIGN (type
);
1593 #ifdef CONSTANT_ALIGNMENT
1594 align
= CONSTANT_ALIGNMENT (t
, align
);
1598 /* If this is a field reference and not a bit-field, record it. */
1599 /* ??? There is some information that can be gleened from bit-fields,
1600 such as the word offset in the structure that might be modified.
1601 But skip it for now. */
1602 else if (TREE_CODE (t
) == COMPONENT_REF
1603 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1605 expr
= component_ref_for_mem_expr (t
);
1606 offset
= const0_rtx
;
1607 apply_bitpos
= bitpos
;
1608 /* ??? Any reason the field size would be different than
1609 the size we got from the type? */
1612 /* If this is an array reference, look for an outer field reference. */
1613 else if (TREE_CODE (t
) == ARRAY_REF
)
1615 tree off_tree
= size_zero_node
;
1616 /* We can't modify t, because we use it at the end of the
1622 tree index
= TREE_OPERAND (t2
, 1);
1623 tree low_bound
= array_ref_low_bound (t2
);
1624 tree unit_size
= array_ref_element_size (t2
);
1626 /* We assume all arrays have sizes that are a multiple of a byte.
1627 First subtract the lower bound, if any, in the type of the
1628 index, then convert to sizetype and multiply by the size of
1629 the array element. */
1630 if (! integer_zerop (low_bound
))
1631 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1634 off_tree
= size_binop (PLUS_EXPR
,
1635 size_binop (MULT_EXPR
, convert (sizetype
,
1639 t2
= TREE_OPERAND (t2
, 0);
1641 while (TREE_CODE (t2
) == ARRAY_REF
);
1647 if (host_integerp (off_tree
, 1))
1649 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1650 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1651 align
= DECL_ALIGN (t2
);
1652 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1654 offset
= GEN_INT (ioff
);
1655 apply_bitpos
= bitpos
;
1658 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1660 expr
= component_ref_for_mem_expr (t2
);
1661 if (host_integerp (off_tree
, 1))
1663 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1664 apply_bitpos
= bitpos
;
1666 /* ??? Any reason the field size would be different than
1667 the size we got from the type? */
1669 else if (flag_argument_noalias
> 1
1670 && (INDIRECT_REF_P (t2
))
1671 && TREE_CODE (TREE_OPERAND (t2
, 0)) == PARM_DECL
)
1678 /* If this is a Fortran indirect argument reference, record the
1680 else if (flag_argument_noalias
> 1
1681 && (INDIRECT_REF_P (t
))
1682 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1689 /* If we modified OFFSET based on T, then subtract the outstanding
1690 bit position offset. Similarly, increase the size of the accessed
1691 object to contain the negative offset. */
1694 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1696 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1699 if (TREE_CODE (t
) == ALIGN_INDIRECT_REF
)
1701 /* Force EXPR and OFFSE to NULL, since we don't know exactly what
1702 we're overlapping. */
1707 /* Now set the attributes we computed above. */
1709 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1711 /* If this is already known to be a scalar or aggregate, we are done. */
1712 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1715 /* If it is a reference into an aggregate, this is part of an aggregate.
1716 Otherwise we don't know. */
1717 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1718 || TREE_CODE (t
) == ARRAY_RANGE_REF
1719 || TREE_CODE (t
) == BIT_FIELD_REF
)
1720 MEM_IN_STRUCT_P (ref
) = 1;
1724 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1726 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1729 /* Set the decl for MEM to DECL. */
1732 set_mem_attrs_from_reg (rtx mem
, rtx reg
)
1735 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
1736 GEN_INT (REG_OFFSET (reg
)),
1737 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1740 /* Set the alias set of MEM to SET. */
1743 set_mem_alias_set (rtx mem
, HOST_WIDE_INT set
)
1745 #ifdef ENABLE_CHECKING
1746 /* If the new and old alias sets don't conflict, something is wrong. */
1747 gcc_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1750 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1751 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1755 /* Set the alignment of MEM to ALIGN bits. */
1758 set_mem_align (rtx mem
, unsigned int align
)
1760 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1761 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1765 /* Set the expr for MEM to EXPR. */
1768 set_mem_expr (rtx mem
, tree expr
)
1771 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1772 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1775 /* Set the offset of MEM to OFFSET. */
1778 set_mem_offset (rtx mem
, rtx offset
)
1780 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1781 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1785 /* Set the size of MEM to SIZE. */
1788 set_mem_size (rtx mem
, rtx size
)
1790 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1791 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1795 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1796 and its address changed to ADDR. (VOIDmode means don't change the mode.
1797 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1798 returned memory location is required to be valid. The memory
1799 attributes are not changed. */
1802 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1806 gcc_assert (MEM_P (memref
));
1807 if (mode
== VOIDmode
)
1808 mode
= GET_MODE (memref
);
1810 addr
= XEXP (memref
, 0);
1811 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1812 && (!validate
|| memory_address_p (mode
, addr
)))
1817 if (reload_in_progress
|| reload_completed
)
1818 gcc_assert (memory_address_p (mode
, addr
));
1820 addr
= memory_address (mode
, addr
);
1823 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1826 new = gen_rtx_MEM (mode
, addr
);
1827 MEM_COPY_ATTRIBUTES (new, memref
);
1831 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1832 way we are changing MEMREF, so we only preserve the alias set. */
1835 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1837 rtx
new = change_address_1 (memref
, mode
, addr
, 1), size
;
1838 enum machine_mode mmode
= GET_MODE (new);
1841 size
= mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
));
1842 align
= mmode
== BLKmode
? BITS_PER_UNIT
: GET_MODE_ALIGNMENT (mmode
);
1844 /* If there are no changes, just return the original memory reference. */
1847 if (MEM_ATTRS (memref
) == 0
1848 || (MEM_EXPR (memref
) == NULL
1849 && MEM_OFFSET (memref
) == NULL
1850 && MEM_SIZE (memref
) == size
1851 && MEM_ALIGN (memref
) == align
))
1854 new = gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1855 MEM_COPY_ATTRIBUTES (new, memref
);
1859 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0, size
, align
, mmode
);
1864 /* Return a memory reference like MEMREF, but with its mode changed
1865 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1866 nonzero, the memory address is forced to be valid.
1867 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1868 and caller is responsible for adjusting MEMREF base register. */
1871 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1872 int validate
, int adjust
)
1874 rtx addr
= XEXP (memref
, 0);
1876 rtx memoffset
= MEM_OFFSET (memref
);
1878 unsigned int memalign
= MEM_ALIGN (memref
);
1880 /* If there are no changes, just return the original memory reference. */
1881 if (mode
== GET_MODE (memref
) && !offset
1882 && (!validate
|| memory_address_p (mode
, addr
)))
1885 /* ??? Prefer to create garbage instead of creating shared rtl.
1886 This may happen even if offset is nonzero -- consider
1887 (plus (plus reg reg) const_int) -- so do this always. */
1888 addr
= copy_rtx (addr
);
1892 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1893 object, we can merge it into the LO_SUM. */
1894 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1896 && (unsigned HOST_WIDE_INT
) offset
1897 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1898 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1899 plus_constant (XEXP (addr
, 1), offset
));
1901 addr
= plus_constant (addr
, offset
);
1904 new = change_address_1 (memref
, mode
, addr
, validate
);
1906 /* Compute the new values of the memory attributes due to this adjustment.
1907 We add the offsets and update the alignment. */
1909 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1911 /* Compute the new alignment by taking the MIN of the alignment and the
1912 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1917 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
1919 /* We can compute the size in a number of ways. */
1920 if (GET_MODE (new) != BLKmode
)
1921 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1922 else if (MEM_SIZE (memref
))
1923 size
= plus_constant (MEM_SIZE (memref
), -offset
);
1925 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
1926 memoffset
, size
, memalign
, GET_MODE (new));
1928 /* At some point, we should validate that this offset is within the object,
1929 if all the appropriate values are known. */
1933 /* Return a memory reference like MEMREF, but with its mode changed
1934 to MODE and its address changed to ADDR, which is assumed to be
1935 MEMREF offseted by OFFSET bytes. If VALIDATE is
1936 nonzero, the memory address is forced to be valid. */
1939 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
1940 HOST_WIDE_INT offset
, int validate
)
1942 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
1943 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
1946 /* Return a memory reference like MEMREF, but whose address is changed by
1947 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1948 known to be in OFFSET (possibly 1). */
1951 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
1953 rtx
new, addr
= XEXP (memref
, 0);
1955 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1957 /* At this point we don't know _why_ the address is invalid. It
1958 could have secondary memory references, multiplies or anything.
1960 However, if we did go and rearrange things, we can wind up not
1961 being able to recognize the magic around pic_offset_table_rtx.
1962 This stuff is fragile, and is yet another example of why it is
1963 bad to expose PIC machinery too early. */
1964 if (! memory_address_p (GET_MODE (memref
), new)
1965 && GET_CODE (addr
) == PLUS
1966 && XEXP (addr
, 0) == pic_offset_table_rtx
)
1968 addr
= force_reg (GET_MODE (addr
), addr
);
1969 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1972 update_temp_slot_address (XEXP (memref
, 0), new);
1973 new = change_address_1 (memref
, VOIDmode
, new, 1);
1975 /* If there are no changes, just return the original memory reference. */
1979 /* Update the alignment to reflect the offset. Reset the offset, which
1982 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
1983 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
1988 /* Return a memory reference like MEMREF, but with its address changed to
1989 ADDR. The caller is asserting that the actual piece of memory pointed
1990 to is the same, just the form of the address is being changed, such as
1991 by putting something into a register. */
1994 replace_equiv_address (rtx memref
, rtx addr
)
1996 /* change_address_1 copies the memory attribute structure without change
1997 and that's exactly what we want here. */
1998 update_temp_slot_address (XEXP (memref
, 0), addr
);
1999 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2002 /* Likewise, but the reference is not required to be valid. */
2005 replace_equiv_address_nv (rtx memref
, rtx addr
)
2007 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2010 /* Return a memory reference like MEMREF, but with its mode widened to
2011 MODE and offset by OFFSET. This would be used by targets that e.g.
2012 cannot issue QImode memory operations and have to use SImode memory
2013 operations plus masking logic. */
2016 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2018 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2019 tree expr
= MEM_EXPR (new);
2020 rtx memoffset
= MEM_OFFSET (new);
2021 unsigned int size
= GET_MODE_SIZE (mode
);
2023 /* If there are no changes, just return the original memory reference. */
2027 /* If we don't know what offset we were at within the expression, then
2028 we can't know if we've overstepped the bounds. */
2034 if (TREE_CODE (expr
) == COMPONENT_REF
)
2036 tree field
= TREE_OPERAND (expr
, 1);
2037 tree offset
= component_ref_field_offset (expr
);
2039 if (! DECL_SIZE_UNIT (field
))
2045 /* Is the field at least as large as the access? If so, ok,
2046 otherwise strip back to the containing structure. */
2047 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2048 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2049 && INTVAL (memoffset
) >= 0)
2052 if (! host_integerp (offset
, 1))
2058 expr
= TREE_OPERAND (expr
, 0);
2060 = (GEN_INT (INTVAL (memoffset
)
2061 + tree_low_cst (offset
, 1)
2062 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2065 /* Similarly for the decl. */
2066 else if (DECL_P (expr
)
2067 && DECL_SIZE_UNIT (expr
)
2068 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2069 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2070 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2074 /* The widened memory access overflows the expression, which means
2075 that it could alias another expression. Zap it. */
2082 memoffset
= NULL_RTX
;
2084 /* The widened memory may alias other stuff, so zap the alias set. */
2085 /* ??? Maybe use get_alias_set on any remaining expression. */
2087 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2088 MEM_ALIGN (new), mode
);
2093 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2096 gen_label_rtx (void)
2098 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2099 NULL
, label_num
++, NULL
);
2102 /* For procedure integration. */
2104 /* Install new pointers to the first and last insns in the chain.
2105 Also, set cur_insn_uid to one higher than the last in use.
2106 Used for an inline-procedure after copying the insn chain. */
2109 set_new_first_and_last_insn (rtx first
, rtx last
)
2117 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2118 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2123 /* Go through all the RTL insn bodies and copy any invalid shared
2124 structure. This routine should only be called once. */
2127 unshare_all_rtl_1 (tree fndecl
, rtx insn
)
2131 /* Make sure that virtual parameters are not shared. */
2132 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2133 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2135 /* Make sure that virtual stack slots are not shared. */
2136 unshare_all_decls (DECL_INITIAL (fndecl
));
2138 /* Unshare just about everything else. */
2139 unshare_all_rtl_in_chain (insn
);
2141 /* Make sure the addresses of stack slots found outside the insn chain
2142 (such as, in DECL_RTL of a variable) are not shared
2143 with the insn chain.
2145 This special care is necessary when the stack slot MEM does not
2146 actually appear in the insn chain. If it does appear, its address
2147 is unshared from all else at that point. */
2148 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2151 /* Go through all the RTL insn bodies and copy any invalid shared
2152 structure, again. This is a fairly expensive thing to do so it
2153 should be done sparingly. */
2156 unshare_all_rtl_again (rtx insn
)
2161 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2164 reset_used_flags (PATTERN (p
));
2165 reset_used_flags (REG_NOTES (p
));
2166 reset_used_flags (LOG_LINKS (p
));
2169 /* Make sure that virtual stack slots are not shared. */
2170 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2172 /* Make sure that virtual parameters are not shared. */
2173 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2174 reset_used_flags (DECL_RTL (decl
));
2176 reset_used_flags (stack_slot_list
);
2178 unshare_all_rtl_1 (cfun
->decl
, insn
);
2182 unshare_all_rtl (void)
2184 unshare_all_rtl_1 (current_function_decl
, get_insns ());
2187 struct tree_opt_pass pass_unshare_all_rtl
=
2189 "unshare", /* name */
2191 unshare_all_rtl
, /* execute */
2194 0, /* static_pass_number */
2196 0, /* properties_required */
2197 0, /* properties_provided */
2198 0, /* properties_destroyed */
2199 0, /* todo_flags_start */
2200 TODO_dump_func
, /* todo_flags_finish */
2205 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2206 Recursively does the same for subexpressions. */
2209 verify_rtx_sharing (rtx orig
, rtx insn
)
2214 const char *format_ptr
;
2219 code
= GET_CODE (x
);
2221 /* These types may be freely shared. */
2236 /* SCRATCH must be shared because they represent distinct values. */
2238 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2243 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2244 a LABEL_REF, it isn't sharable. */
2245 if (GET_CODE (XEXP (x
, 0)) == PLUS
2246 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2247 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2252 /* A MEM is allowed to be shared if its address is constant. */
2253 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2254 || reload_completed
|| reload_in_progress
)
2263 /* This rtx may not be shared. If it has already been seen,
2264 replace it with a copy of itself. */
2265 #ifdef ENABLE_CHECKING
2266 if (RTX_FLAG (x
, used
))
2268 error ("invalid rtl sharing found in the insn");
2270 error ("shared rtx");
2272 internal_error ("internal consistency failure");
2275 gcc_assert (!RTX_FLAG (x
, used
));
2277 RTX_FLAG (x
, used
) = 1;
2279 /* Now scan the subexpressions recursively. */
2281 format_ptr
= GET_RTX_FORMAT (code
);
2283 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2285 switch (*format_ptr
++)
2288 verify_rtx_sharing (XEXP (x
, i
), insn
);
2292 if (XVEC (x
, i
) != NULL
)
2295 int len
= XVECLEN (x
, i
);
2297 for (j
= 0; j
< len
; j
++)
2299 /* We allow sharing of ASM_OPERANDS inside single
2301 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2302 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2304 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2306 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2315 /* Go through all the RTL insn bodies and check that there is no unexpected
2316 sharing in between the subexpressions. */
2319 verify_rtl_sharing (void)
2323 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2326 reset_used_flags (PATTERN (p
));
2327 reset_used_flags (REG_NOTES (p
));
2328 reset_used_flags (LOG_LINKS (p
));
2331 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2334 verify_rtx_sharing (PATTERN (p
), p
);
2335 verify_rtx_sharing (REG_NOTES (p
), p
);
2336 verify_rtx_sharing (LOG_LINKS (p
), p
);
2340 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2341 Assumes the mark bits are cleared at entry. */
2344 unshare_all_rtl_in_chain (rtx insn
)
2346 for (; insn
; insn
= NEXT_INSN (insn
))
2349 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2350 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2351 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2355 /* Go through all virtual stack slots of a function and copy any
2356 shared structure. */
2358 unshare_all_decls (tree blk
)
2362 /* Copy shared decls. */
2363 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2364 if (DECL_RTL_SET_P (t
))
2365 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2367 /* Now process sub-blocks. */
2368 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2369 unshare_all_decls (t
);
2372 /* Go through all virtual stack slots of a function and mark them as
2375 reset_used_decls (tree blk
)
2380 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2381 if (DECL_RTL_SET_P (t
))
2382 reset_used_flags (DECL_RTL (t
));
2384 /* Now process sub-blocks. */
2385 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2386 reset_used_decls (t
);
2389 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2390 Recursively does the same for subexpressions. Uses
2391 copy_rtx_if_shared_1 to reduce stack space. */
2394 copy_rtx_if_shared (rtx orig
)
2396 copy_rtx_if_shared_1 (&orig
);
2400 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2401 use. Recursively does the same for subexpressions. */
2404 copy_rtx_if_shared_1 (rtx
*orig1
)
2410 const char *format_ptr
;
2414 /* Repeat is used to turn tail-recursion into iteration. */
2421 code
= GET_CODE (x
);
2423 /* These types may be freely shared. */
2437 /* SCRATCH must be shared because they represent distinct values. */
2440 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2445 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2446 a LABEL_REF, it isn't sharable. */
2447 if (GET_CODE (XEXP (x
, 0)) == PLUS
2448 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2449 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2458 /* The chain of insns is not being copied. */
2465 /* This rtx may not be shared. If it has already been seen,
2466 replace it with a copy of itself. */
2468 if (RTX_FLAG (x
, used
))
2470 x
= shallow_copy_rtx (x
);
2473 RTX_FLAG (x
, used
) = 1;
2475 /* Now scan the subexpressions recursively.
2476 We can store any replaced subexpressions directly into X
2477 since we know X is not shared! Any vectors in X
2478 must be copied if X was copied. */
2480 format_ptr
= GET_RTX_FORMAT (code
);
2481 length
= GET_RTX_LENGTH (code
);
2484 for (i
= 0; i
< length
; i
++)
2486 switch (*format_ptr
++)
2490 copy_rtx_if_shared_1 (last_ptr
);
2491 last_ptr
= &XEXP (x
, i
);
2495 if (XVEC (x
, i
) != NULL
)
2498 int len
= XVECLEN (x
, i
);
2500 /* Copy the vector iff I copied the rtx and the length
2502 if (copied
&& len
> 0)
2503 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2505 /* Call recursively on all inside the vector. */
2506 for (j
= 0; j
< len
; j
++)
2509 copy_rtx_if_shared_1 (last_ptr
);
2510 last_ptr
= &XVECEXP (x
, i
, j
);
2525 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2526 to look for shared sub-parts. */
2529 reset_used_flags (rtx x
)
2533 const char *format_ptr
;
2536 /* Repeat is used to turn tail-recursion into iteration. */
2541 code
= GET_CODE (x
);
2543 /* These types may be freely shared so we needn't do any resetting
2564 /* The chain of insns is not being copied. */
2571 RTX_FLAG (x
, used
) = 0;
2573 format_ptr
= GET_RTX_FORMAT (code
);
2574 length
= GET_RTX_LENGTH (code
);
2576 for (i
= 0; i
< length
; i
++)
2578 switch (*format_ptr
++)
2586 reset_used_flags (XEXP (x
, i
));
2590 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2591 reset_used_flags (XVECEXP (x
, i
, j
));
2597 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2598 to look for shared sub-parts. */
2601 set_used_flags (rtx x
)
2605 const char *format_ptr
;
2610 code
= GET_CODE (x
);
2612 /* These types may be freely shared so we needn't do any resetting
2633 /* The chain of insns is not being copied. */
2640 RTX_FLAG (x
, used
) = 1;
2642 format_ptr
= GET_RTX_FORMAT (code
);
2643 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2645 switch (*format_ptr
++)
2648 set_used_flags (XEXP (x
, i
));
2652 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2653 set_used_flags (XVECEXP (x
, i
, j
));
2659 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2660 Return X or the rtx for the pseudo reg the value of X was copied into.
2661 OTHER must be valid as a SET_DEST. */
2664 make_safe_from (rtx x
, rtx other
)
2667 switch (GET_CODE (other
))
2670 other
= SUBREG_REG (other
);
2672 case STRICT_LOW_PART
:
2675 other
= XEXP (other
, 0);
2684 && GET_CODE (x
) != SUBREG
)
2686 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2687 || reg_mentioned_p (other
, x
))))
2689 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2690 emit_move_insn (temp
, x
);
2696 /* Emission of insns (adding them to the doubly-linked list). */
2698 /* Return the first insn of the current sequence or current function. */
2706 /* Specify a new insn as the first in the chain. */
2709 set_first_insn (rtx insn
)
2711 gcc_assert (!PREV_INSN (insn
));
2715 /* Return the last insn emitted in current sequence or current function. */
2718 get_last_insn (void)
2723 /* Specify a new insn as the last in the chain. */
2726 set_last_insn (rtx insn
)
2728 gcc_assert (!NEXT_INSN (insn
));
2732 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2735 get_last_insn_anywhere (void)
2737 struct sequence_stack
*stack
;
2740 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2741 if (stack
->last
!= 0)
2746 /* Return the first nonnote insn emitted in current sequence or current
2747 function. This routine looks inside SEQUENCEs. */
2750 get_first_nonnote_insn (void)
2752 rtx insn
= first_insn
;
2757 for (insn
= next_insn (insn
);
2758 insn
&& NOTE_P (insn
);
2759 insn
= next_insn (insn
))
2763 if (NONJUMP_INSN_P (insn
)
2764 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2765 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2772 /* Return the last nonnote insn emitted in current sequence or current
2773 function. This routine looks inside SEQUENCEs. */
2776 get_last_nonnote_insn (void)
2778 rtx insn
= last_insn
;
2783 for (insn
= previous_insn (insn
);
2784 insn
&& NOTE_P (insn
);
2785 insn
= previous_insn (insn
))
2789 if (NONJUMP_INSN_P (insn
)
2790 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2791 insn
= XVECEXP (PATTERN (insn
), 0,
2792 XVECLEN (PATTERN (insn
), 0) - 1);
2799 /* Return a number larger than any instruction's uid in this function. */
2804 return cur_insn_uid
;
2807 /* Renumber instructions so that no instruction UIDs are wasted. */
2810 renumber_insns (void)
2814 /* If we're not supposed to renumber instructions, don't. */
2815 if (!flag_renumber_insns
)
2818 /* If there aren't that many instructions, then it's not really
2819 worth renumbering them. */
2820 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2825 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2828 fprintf (dump_file
, "Renumbering insn %d to %d\n",
2829 INSN_UID (insn
), cur_insn_uid
);
2830 INSN_UID (insn
) = cur_insn_uid
++;
2834 /* Return the next insn. If it is a SEQUENCE, return the first insn
2838 next_insn (rtx insn
)
2842 insn
= NEXT_INSN (insn
);
2843 if (insn
&& NONJUMP_INSN_P (insn
)
2844 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2845 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2851 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2855 previous_insn (rtx insn
)
2859 insn
= PREV_INSN (insn
);
2860 if (insn
&& NONJUMP_INSN_P (insn
)
2861 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2862 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2868 /* Return the next insn after INSN that is not a NOTE. This routine does not
2869 look inside SEQUENCEs. */
2872 next_nonnote_insn (rtx insn
)
2876 insn
= NEXT_INSN (insn
);
2877 if (insn
== 0 || !NOTE_P (insn
))
2884 /* Return the previous insn before INSN that is not a NOTE. This routine does
2885 not look inside SEQUENCEs. */
2888 prev_nonnote_insn (rtx insn
)
2892 insn
= PREV_INSN (insn
);
2893 if (insn
== 0 || !NOTE_P (insn
))
2900 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2901 or 0, if there is none. This routine does not look inside
2905 next_real_insn (rtx insn
)
2909 insn
= NEXT_INSN (insn
);
2910 if (insn
== 0 || INSN_P (insn
))
2917 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2918 or 0, if there is none. This routine does not look inside
2922 prev_real_insn (rtx insn
)
2926 insn
= PREV_INSN (insn
);
2927 if (insn
== 0 || INSN_P (insn
))
2934 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2935 This routine does not look inside SEQUENCEs. */
2938 last_call_insn (void)
2942 for (insn
= get_last_insn ();
2943 insn
&& !CALL_P (insn
);
2944 insn
= PREV_INSN (insn
))
2950 /* Find the next insn after INSN that really does something. This routine
2951 does not look inside SEQUENCEs. Until reload has completed, this is the
2952 same as next_real_insn. */
2955 active_insn_p (rtx insn
)
2957 return (CALL_P (insn
) || JUMP_P (insn
)
2958 || (NONJUMP_INSN_P (insn
)
2959 && (! reload_completed
2960 || (GET_CODE (PATTERN (insn
)) != USE
2961 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2965 next_active_insn (rtx insn
)
2969 insn
= NEXT_INSN (insn
);
2970 if (insn
== 0 || active_insn_p (insn
))
2977 /* Find the last insn before INSN that really does something. This routine
2978 does not look inside SEQUENCEs. Until reload has completed, this is the
2979 same as prev_real_insn. */
2982 prev_active_insn (rtx insn
)
2986 insn
= PREV_INSN (insn
);
2987 if (insn
== 0 || active_insn_p (insn
))
2994 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2997 next_label (rtx insn
)
3001 insn
= NEXT_INSN (insn
);
3002 if (insn
== 0 || LABEL_P (insn
))
3009 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3012 prev_label (rtx insn
)
3016 insn
= PREV_INSN (insn
);
3017 if (insn
== 0 || LABEL_P (insn
))
3024 /* Return the last label to mark the same position as LABEL. Return null
3025 if LABEL itself is null. */
3028 skip_consecutive_labels (rtx label
)
3032 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
3040 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3041 and REG_CC_USER notes so we can find it. */
3044 link_cc0_insns (rtx insn
)
3046 rtx user
= next_nonnote_insn (insn
);
3048 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
3049 user
= XVECEXP (PATTERN (user
), 0, 0);
3051 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3053 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3056 /* Return the next insn that uses CC0 after INSN, which is assumed to
3057 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3058 applied to the result of this function should yield INSN).
3060 Normally, this is simply the next insn. However, if a REG_CC_USER note
3061 is present, it contains the insn that uses CC0.
3063 Return 0 if we can't find the insn. */
3066 next_cc0_user (rtx insn
)
3068 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3071 return XEXP (note
, 0);
3073 insn
= next_nonnote_insn (insn
);
3074 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3075 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3077 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3083 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3084 note, it is the previous insn. */
3087 prev_cc0_setter (rtx insn
)
3089 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3092 return XEXP (note
, 0);
3094 insn
= prev_nonnote_insn (insn
);
3095 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3101 /* Increment the label uses for all labels present in rtx. */
3104 mark_label_nuses (rtx x
)
3110 code
= GET_CODE (x
);
3111 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3112 LABEL_NUSES (XEXP (x
, 0))++;
3114 fmt
= GET_RTX_FORMAT (code
);
3115 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3118 mark_label_nuses (XEXP (x
, i
));
3119 else if (fmt
[i
] == 'E')
3120 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3121 mark_label_nuses (XVECEXP (x
, i
, j
));
3126 /* Try splitting insns that can be split for better scheduling.
3127 PAT is the pattern which might split.
3128 TRIAL is the insn providing PAT.
3129 LAST is nonzero if we should return the last insn of the sequence produced.
3131 If this routine succeeds in splitting, it returns the first or last
3132 replacement insn depending on the value of LAST. Otherwise, it
3133 returns TRIAL. If the insn to be returned can be split, it will be. */
3136 try_split (rtx pat
, rtx trial
, int last
)
3138 rtx before
= PREV_INSN (trial
);
3139 rtx after
= NEXT_INSN (trial
);
3140 int has_barrier
= 0;
3144 rtx insn_last
, insn
;
3147 if (any_condjump_p (trial
)
3148 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3149 split_branch_probability
= INTVAL (XEXP (note
, 0));
3150 probability
= split_branch_probability
;
3152 seq
= split_insns (pat
, trial
);
3154 split_branch_probability
= -1;
3156 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3157 We may need to handle this specially. */
3158 if (after
&& BARRIER_P (after
))
3161 after
= NEXT_INSN (after
);
3167 /* Avoid infinite loop if any insn of the result matches
3168 the original pattern. */
3172 if (INSN_P (insn_last
)
3173 && rtx_equal_p (PATTERN (insn_last
), pat
))
3175 if (!NEXT_INSN (insn_last
))
3177 insn_last
= NEXT_INSN (insn_last
);
3181 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3185 mark_jump_label (PATTERN (insn
), insn
, 0);
3187 if (probability
!= -1
3188 && any_condjump_p (insn
)
3189 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3191 /* We can preserve the REG_BR_PROB notes only if exactly
3192 one jump is created, otherwise the machine description
3193 is responsible for this step using
3194 split_branch_probability variable. */
3195 gcc_assert (njumps
== 1);
3197 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3198 GEN_INT (probability
),
3204 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3205 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3208 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3211 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3214 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3215 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3219 /* Copy notes, particularly those related to the CFG. */
3220 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3222 switch (REG_NOTE_KIND (note
))
3226 while (insn
!= NULL_RTX
)
3229 || (flag_non_call_exceptions
&& INSN_P (insn
)
3230 && may_trap_p (PATTERN (insn
))))
3232 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3235 insn
= PREV_INSN (insn
);
3242 while (insn
!= NULL_RTX
)
3246 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3249 insn
= PREV_INSN (insn
);
3253 case REG_NON_LOCAL_GOTO
:
3255 while (insn
!= NULL_RTX
)
3259 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3262 insn
= PREV_INSN (insn
);
3271 /* If there are LABELS inside the split insns increment the
3272 usage count so we don't delete the label. */
3273 if (NONJUMP_INSN_P (trial
))
3276 while (insn
!= NULL_RTX
)
3278 if (NONJUMP_INSN_P (insn
))
3279 mark_label_nuses (PATTERN (insn
));
3281 insn
= PREV_INSN (insn
);
3285 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3287 delete_insn (trial
);
3289 emit_barrier_after (tem
);
3291 /* Recursively call try_split for each new insn created; by the
3292 time control returns here that insn will be fully split, so
3293 set LAST and continue from the insn after the one returned.
3294 We can't use next_active_insn here since AFTER may be a note.
3295 Ignore deleted insns, which can be occur if not optimizing. */
3296 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3297 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3298 tem
= try_split (PATTERN (tem
), tem
, 1);
3300 /* Return either the first or the last insn, depending on which was
3303 ? (after
? PREV_INSN (after
) : last_insn
)
3304 : NEXT_INSN (before
);
3307 /* Make and return an INSN rtx, initializing all its slots.
3308 Store PATTERN in the pattern slots. */
3311 make_insn_raw (rtx pattern
)
3315 insn
= rtx_alloc (INSN
);
3317 INSN_UID (insn
) = cur_insn_uid
++;
3318 PATTERN (insn
) = pattern
;
3319 INSN_CODE (insn
) = -1;
3320 LOG_LINKS (insn
) = NULL
;
3321 REG_NOTES (insn
) = NULL
;
3322 INSN_LOCATOR (insn
) = 0;
3323 BLOCK_FOR_INSN (insn
) = NULL
;
3325 #ifdef ENABLE_RTL_CHECKING
3328 && (returnjump_p (insn
)
3329 || (GET_CODE (insn
) == SET
3330 && SET_DEST (insn
) == pc_rtx
)))
3332 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3340 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3343 make_jump_insn_raw (rtx pattern
)
3347 insn
= rtx_alloc (JUMP_INSN
);
3348 INSN_UID (insn
) = cur_insn_uid
++;
3350 PATTERN (insn
) = pattern
;
3351 INSN_CODE (insn
) = -1;
3352 LOG_LINKS (insn
) = NULL
;
3353 REG_NOTES (insn
) = NULL
;
3354 JUMP_LABEL (insn
) = NULL
;
3355 INSN_LOCATOR (insn
) = 0;
3356 BLOCK_FOR_INSN (insn
) = NULL
;
3361 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3364 make_call_insn_raw (rtx pattern
)
3368 insn
= rtx_alloc (CALL_INSN
);
3369 INSN_UID (insn
) = cur_insn_uid
++;
3371 PATTERN (insn
) = pattern
;
3372 INSN_CODE (insn
) = -1;
3373 LOG_LINKS (insn
) = NULL
;
3374 REG_NOTES (insn
) = NULL
;
3375 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3376 INSN_LOCATOR (insn
) = 0;
3377 BLOCK_FOR_INSN (insn
) = NULL
;
3382 /* Add INSN to the end of the doubly-linked list.
3383 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3388 PREV_INSN (insn
) = last_insn
;
3389 NEXT_INSN (insn
) = 0;
3391 if (NULL
!= last_insn
)
3392 NEXT_INSN (last_insn
) = insn
;
3394 if (NULL
== first_insn
)
3400 /* Add INSN into the doubly-linked list after insn AFTER. This and
3401 the next should be the only functions called to insert an insn once
3402 delay slots have been filled since only they know how to update a
3406 add_insn_after (rtx insn
, rtx after
)
3408 rtx next
= NEXT_INSN (after
);
3411 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3413 NEXT_INSN (insn
) = next
;
3414 PREV_INSN (insn
) = after
;
3418 PREV_INSN (next
) = insn
;
3419 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3420 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3422 else if (last_insn
== after
)
3426 struct sequence_stack
*stack
= seq_stack
;
3427 /* Scan all pending sequences too. */
3428 for (; stack
; stack
= stack
->next
)
3429 if (after
== stack
->last
)
3438 if (!BARRIER_P (after
)
3439 && !BARRIER_P (insn
)
3440 && (bb
= BLOCK_FOR_INSN (after
)))
3442 set_block_for_insn (insn
, bb
);
3444 bb
->flags
|= BB_DIRTY
;
3445 /* Should not happen as first in the BB is always
3446 either NOTE or LABEL. */
3447 if (BB_END (bb
) == after
3448 /* Avoid clobbering of structure when creating new BB. */
3449 && !BARRIER_P (insn
)
3451 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3455 NEXT_INSN (after
) = insn
;
3456 if (NONJUMP_INSN_P (after
) && GET_CODE (PATTERN (after
)) == SEQUENCE
)
3458 rtx sequence
= PATTERN (after
);
3459 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3463 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3464 the previous should be the only functions called to insert an insn once
3465 delay slots have been filled since only they know how to update a
3469 add_insn_before (rtx insn
, rtx before
)
3471 rtx prev
= PREV_INSN (before
);
3474 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3476 PREV_INSN (insn
) = prev
;
3477 NEXT_INSN (insn
) = before
;
3481 NEXT_INSN (prev
) = insn
;
3482 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3484 rtx sequence
= PATTERN (prev
);
3485 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3488 else if (first_insn
== before
)
3492 struct sequence_stack
*stack
= seq_stack
;
3493 /* Scan all pending sequences too. */
3494 for (; stack
; stack
= stack
->next
)
3495 if (before
== stack
->first
)
3497 stack
->first
= insn
;
3504 if (!BARRIER_P (before
)
3505 && !BARRIER_P (insn
)
3506 && (bb
= BLOCK_FOR_INSN (before
)))
3508 set_block_for_insn (insn
, bb
);
3510 bb
->flags
|= BB_DIRTY
;
3511 /* Should not happen as first in the BB is always either NOTE or
3513 gcc_assert (BB_HEAD (bb
) != insn
3514 /* Avoid clobbering of structure when creating new BB. */
3517 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_BASIC_BLOCK
));
3520 PREV_INSN (before
) = insn
;
3521 if (NONJUMP_INSN_P (before
) && GET_CODE (PATTERN (before
)) == SEQUENCE
)
3522 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3525 /* Remove an insn from its doubly-linked list. This function knows how
3526 to handle sequences. */
3528 remove_insn (rtx insn
)
3530 rtx next
= NEXT_INSN (insn
);
3531 rtx prev
= PREV_INSN (insn
);
3536 NEXT_INSN (prev
) = next
;
3537 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3539 rtx sequence
= PATTERN (prev
);
3540 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3543 else if (first_insn
== insn
)
3547 struct sequence_stack
*stack
= seq_stack
;
3548 /* Scan all pending sequences too. */
3549 for (; stack
; stack
= stack
->next
)
3550 if (insn
== stack
->first
)
3552 stack
->first
= next
;
3561 PREV_INSN (next
) = prev
;
3562 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3563 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3565 else if (last_insn
== insn
)
3569 struct sequence_stack
*stack
= seq_stack
;
3570 /* Scan all pending sequences too. */
3571 for (; stack
; stack
= stack
->next
)
3572 if (insn
== stack
->last
)
3580 if (!BARRIER_P (insn
)
3581 && (bb
= BLOCK_FOR_INSN (insn
)))
3584 bb
->flags
|= BB_DIRTY
;
3585 if (BB_HEAD (bb
) == insn
)
3587 /* Never ever delete the basic block note without deleting whole
3589 gcc_assert (!NOTE_P (insn
));
3590 BB_HEAD (bb
) = next
;
3592 if (BB_END (bb
) == insn
)
3597 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3600 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3602 gcc_assert (call_insn
&& CALL_P (call_insn
));
3604 /* Put the register usage information on the CALL. If there is already
3605 some usage information, put ours at the end. */
3606 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3610 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3611 link
= XEXP (link
, 1))
3614 XEXP (link
, 1) = call_fusage
;
3617 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3620 /* Delete all insns made since FROM.
3621 FROM becomes the new last instruction. */
3624 delete_insns_since (rtx from
)
3629 NEXT_INSN (from
) = 0;
3633 /* This function is deprecated, please use sequences instead.
3635 Move a consecutive bunch of insns to a different place in the chain.
3636 The insns to be moved are those between FROM and TO.
3637 They are moved to a new position after the insn AFTER.
3638 AFTER must not be FROM or TO or any insn in between.
3640 This function does not know about SEQUENCEs and hence should not be
3641 called after delay-slot filling has been done. */
3644 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3646 /* Splice this bunch out of where it is now. */
3647 if (PREV_INSN (from
))
3648 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3650 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3651 if (last_insn
== to
)
3652 last_insn
= PREV_INSN (from
);
3653 if (first_insn
== from
)
3654 first_insn
= NEXT_INSN (to
);
3656 /* Make the new neighbors point to it and it to them. */
3657 if (NEXT_INSN (after
))
3658 PREV_INSN (NEXT_INSN (after
)) = to
;
3660 NEXT_INSN (to
) = NEXT_INSN (after
);
3661 PREV_INSN (from
) = after
;
3662 NEXT_INSN (after
) = from
;
3663 if (after
== last_insn
)
3667 /* Same as function above, but take care to update BB boundaries. */
3669 reorder_insns (rtx from
, rtx to
, rtx after
)
3671 rtx prev
= PREV_INSN (from
);
3672 basic_block bb
, bb2
;
3674 reorder_insns_nobb (from
, to
, after
);
3676 if (!BARRIER_P (after
)
3677 && (bb
= BLOCK_FOR_INSN (after
)))
3680 bb
->flags
|= BB_DIRTY
;
3682 if (!BARRIER_P (from
)
3683 && (bb2
= BLOCK_FOR_INSN (from
)))
3685 if (BB_END (bb2
) == to
)
3686 BB_END (bb2
) = prev
;
3687 bb2
->flags
|= BB_DIRTY
;
3690 if (BB_END (bb
) == after
)
3693 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3695 set_block_for_insn (x
, bb
);
3699 /* Return the line note insn preceding INSN. */
3702 find_line_note (rtx insn
)
3704 if (no_line_numbers
)
3707 for (; insn
; insn
= PREV_INSN (insn
))
3709 && NOTE_LINE_NUMBER (insn
) >= 0)
3715 /* Remove unnecessary notes from the instruction stream. */
3718 remove_unnecessary_notes (void)
3720 rtx eh_stack
= NULL_RTX
;
3725 /* We must not remove the first instruction in the function because
3726 the compiler depends on the first instruction being a note. */
3727 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3729 /* Remember what's next. */
3730 next
= NEXT_INSN (insn
);
3732 /* We're only interested in notes. */
3736 switch (NOTE_LINE_NUMBER (insn
))
3738 case NOTE_INSN_DELETED
:
3742 case NOTE_INSN_EH_REGION_BEG
:
3743 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3746 case NOTE_INSN_EH_REGION_END
:
3747 /* Too many end notes. */
3748 gcc_assert (eh_stack
);
3749 /* Mismatched nesting. */
3750 gcc_assert (NOTE_EH_HANDLER (XEXP (eh_stack
, 0))
3751 == NOTE_EH_HANDLER (insn
));
3753 eh_stack
= XEXP (eh_stack
, 1);
3754 free_INSN_LIST_node (tmp
);
3757 case NOTE_INSN_BLOCK_BEG
:
3758 case NOTE_INSN_BLOCK_END
:
3759 /* BLOCK_END and BLOCK_BEG notes only exist in the `final' pass. */
3767 /* Too many EH_REGION_BEG notes. */
3768 gcc_assert (!eh_stack
);
3771 struct tree_opt_pass pass_remove_unnecessary_notes
=
3773 "eunotes", /* name */
3775 remove_unnecessary_notes
, /* execute */
3778 0, /* static_pass_number */
3780 0, /* properties_required */
3781 0, /* properties_provided */
3782 0, /* properties_destroyed */
3783 0, /* todo_flags_start */
3784 TODO_dump_func
, /* todo_flags_finish */
3789 /* Emit insn(s) of given code and pattern
3790 at a specified place within the doubly-linked list.
3792 All of the emit_foo global entry points accept an object
3793 X which is either an insn list or a PATTERN of a single
3796 There are thus a few canonical ways to generate code and
3797 emit it at a specific place in the instruction stream. For
3798 example, consider the instruction named SPOT and the fact that
3799 we would like to emit some instructions before SPOT. We might
3803 ... emit the new instructions ...
3804 insns_head = get_insns ();
3807 emit_insn_before (insns_head, SPOT);
3809 It used to be common to generate SEQUENCE rtl instead, but that
3810 is a relic of the past which no longer occurs. The reason is that
3811 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3812 generated would almost certainly die right after it was created. */
3814 /* Make X be output before the instruction BEFORE. */
3817 emit_insn_before_noloc (rtx x
, rtx before
)
3822 gcc_assert (before
);
3827 switch (GET_CODE (x
))
3838 rtx next
= NEXT_INSN (insn
);
3839 add_insn_before (insn
, before
);
3845 #ifdef ENABLE_RTL_CHECKING
3852 last
= make_insn_raw (x
);
3853 add_insn_before (last
, before
);
3860 /* Make an instruction with body X and code JUMP_INSN
3861 and output it before the instruction BEFORE. */
3864 emit_jump_insn_before_noloc (rtx x
, rtx before
)
3866 rtx insn
, last
= NULL_RTX
;
3868 gcc_assert (before
);
3870 switch (GET_CODE (x
))
3881 rtx next
= NEXT_INSN (insn
);
3882 add_insn_before (insn
, before
);
3888 #ifdef ENABLE_RTL_CHECKING
3895 last
= make_jump_insn_raw (x
);
3896 add_insn_before (last
, before
);
3903 /* Make an instruction with body X and code CALL_INSN
3904 and output it before the instruction BEFORE. */
3907 emit_call_insn_before_noloc (rtx x
, rtx before
)
3909 rtx last
= NULL_RTX
, insn
;
3911 gcc_assert (before
);
3913 switch (GET_CODE (x
))
3924 rtx next
= NEXT_INSN (insn
);
3925 add_insn_before (insn
, before
);
3931 #ifdef ENABLE_RTL_CHECKING
3938 last
= make_call_insn_raw (x
);
3939 add_insn_before (last
, before
);
3946 /* Make an insn of code BARRIER
3947 and output it before the insn BEFORE. */
3950 emit_barrier_before (rtx before
)
3952 rtx insn
= rtx_alloc (BARRIER
);
3954 INSN_UID (insn
) = cur_insn_uid
++;
3956 add_insn_before (insn
, before
);
3960 /* Emit the label LABEL before the insn BEFORE. */
3963 emit_label_before (rtx label
, rtx before
)
3965 /* This can be called twice for the same label as a result of the
3966 confusion that follows a syntax error! So make it harmless. */
3967 if (INSN_UID (label
) == 0)
3969 INSN_UID (label
) = cur_insn_uid
++;
3970 add_insn_before (label
, before
);
3976 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3979 emit_note_before (int subtype
, rtx before
)
3981 rtx note
= rtx_alloc (NOTE
);
3982 INSN_UID (note
) = cur_insn_uid
++;
3983 #ifndef USE_MAPPED_LOCATION
3984 NOTE_SOURCE_FILE (note
) = 0;
3986 NOTE_LINE_NUMBER (note
) = subtype
;
3987 BLOCK_FOR_INSN (note
) = NULL
;
3989 add_insn_before (note
, before
);
3993 /* Helper for emit_insn_after, handles lists of instructions
3996 static rtx
emit_insn_after_1 (rtx
, rtx
);
3999 emit_insn_after_1 (rtx first
, rtx after
)
4005 if (!BARRIER_P (after
)
4006 && (bb
= BLOCK_FOR_INSN (after
)))
4008 bb
->flags
|= BB_DIRTY
;
4009 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4010 if (!BARRIER_P (last
))
4011 set_block_for_insn (last
, bb
);
4012 if (!BARRIER_P (last
))
4013 set_block_for_insn (last
, bb
);
4014 if (BB_END (bb
) == after
)
4018 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4021 after_after
= NEXT_INSN (after
);
4023 NEXT_INSN (after
) = first
;
4024 PREV_INSN (first
) = after
;
4025 NEXT_INSN (last
) = after_after
;
4027 PREV_INSN (after_after
) = last
;
4029 if (after
== last_insn
)
4034 /* Make X be output after the insn AFTER. */
4037 emit_insn_after_noloc (rtx x
, rtx after
)
4046 switch (GET_CODE (x
))
4054 last
= emit_insn_after_1 (x
, after
);
4057 #ifdef ENABLE_RTL_CHECKING
4064 last
= make_insn_raw (x
);
4065 add_insn_after (last
, after
);
4072 /* Similar to emit_insn_after, except that line notes are to be inserted so
4073 as to act as if this insn were at FROM. */
4076 emit_insn_after_with_line_notes (rtx x
, rtx after
, rtx from
)
4078 rtx from_line
= find_line_note (from
);
4079 rtx after_line
= find_line_note (after
);
4080 rtx insn
= emit_insn_after (x
, after
);
4083 emit_note_copy_after (from_line
, after
);
4086 emit_note_copy_after (after_line
, insn
);
4089 /* Make an insn of code JUMP_INSN with body X
4090 and output it after the insn AFTER. */
4093 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4099 switch (GET_CODE (x
))
4107 last
= emit_insn_after_1 (x
, after
);
4110 #ifdef ENABLE_RTL_CHECKING
4117 last
= make_jump_insn_raw (x
);
4118 add_insn_after (last
, after
);
4125 /* Make an instruction with body X and code CALL_INSN
4126 and output it after the instruction AFTER. */
4129 emit_call_insn_after_noloc (rtx x
, rtx after
)
4135 switch (GET_CODE (x
))
4143 last
= emit_insn_after_1 (x
, after
);
4146 #ifdef ENABLE_RTL_CHECKING
4153 last
= make_call_insn_raw (x
);
4154 add_insn_after (last
, after
);
4161 /* Make an insn of code BARRIER
4162 and output it after the insn AFTER. */
4165 emit_barrier_after (rtx after
)
4167 rtx insn
= rtx_alloc (BARRIER
);
4169 INSN_UID (insn
) = cur_insn_uid
++;
4171 add_insn_after (insn
, after
);
4175 /* Emit the label LABEL after the insn AFTER. */
4178 emit_label_after (rtx label
, rtx after
)
4180 /* This can be called twice for the same label
4181 as a result of the confusion that follows a syntax error!
4182 So make it harmless. */
4183 if (INSN_UID (label
) == 0)
4185 INSN_UID (label
) = cur_insn_uid
++;
4186 add_insn_after (label
, after
);
4192 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4195 emit_note_after (int subtype
, rtx after
)
4197 rtx note
= rtx_alloc (NOTE
);
4198 INSN_UID (note
) = cur_insn_uid
++;
4199 #ifndef USE_MAPPED_LOCATION
4200 NOTE_SOURCE_FILE (note
) = 0;
4202 NOTE_LINE_NUMBER (note
) = subtype
;
4203 BLOCK_FOR_INSN (note
) = NULL
;
4204 add_insn_after (note
, after
);
4208 /* Emit a copy of note ORIG after the insn AFTER. */
4211 emit_note_copy_after (rtx orig
, rtx after
)
4215 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4221 note
= rtx_alloc (NOTE
);
4222 INSN_UID (note
) = cur_insn_uid
++;
4223 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4224 NOTE_DATA (note
) = NOTE_DATA (orig
);
4225 BLOCK_FOR_INSN (note
) = NULL
;
4226 add_insn_after (note
, after
);
4230 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4232 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4234 rtx last
= emit_insn_after_noloc (pattern
, after
);
4236 if (pattern
== NULL_RTX
|| !loc
)
4239 after
= NEXT_INSN (after
);
4242 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4243 INSN_LOCATOR (after
) = loc
;
4246 after
= NEXT_INSN (after
);
4251 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4253 emit_insn_after (rtx pattern
, rtx after
)
4256 return emit_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4258 return emit_insn_after_noloc (pattern
, after
);
4261 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4263 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4265 rtx last
= emit_jump_insn_after_noloc (pattern
, after
);
4267 if (pattern
== NULL_RTX
|| !loc
)
4270 after
= NEXT_INSN (after
);
4273 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4274 INSN_LOCATOR (after
) = loc
;
4277 after
= NEXT_INSN (after
);
4282 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4284 emit_jump_insn_after (rtx pattern
, rtx after
)
4287 return emit_jump_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4289 return emit_jump_insn_after_noloc (pattern
, after
);
4292 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4294 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4296 rtx last
= emit_call_insn_after_noloc (pattern
, after
);
4298 if (pattern
== NULL_RTX
|| !loc
)
4301 after
= NEXT_INSN (after
);
4304 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4305 INSN_LOCATOR (after
) = loc
;
4308 after
= NEXT_INSN (after
);
4313 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4315 emit_call_insn_after (rtx pattern
, rtx after
)
4318 return emit_call_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4320 return emit_call_insn_after_noloc (pattern
, after
);
4323 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4325 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4327 rtx first
= PREV_INSN (before
);
4328 rtx last
= emit_insn_before_noloc (pattern
, before
);
4330 if (pattern
== NULL_RTX
|| !loc
)
4333 first
= NEXT_INSN (first
);
4336 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4337 INSN_LOCATOR (first
) = loc
;
4340 first
= NEXT_INSN (first
);
4345 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4347 emit_insn_before (rtx pattern
, rtx before
)
4349 if (INSN_P (before
))
4350 return emit_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4352 return emit_insn_before_noloc (pattern
, before
);
4355 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4357 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4359 rtx first
= PREV_INSN (before
);
4360 rtx last
= emit_jump_insn_before_noloc (pattern
, before
);
4362 if (pattern
== NULL_RTX
)
4365 first
= NEXT_INSN (first
);
4368 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4369 INSN_LOCATOR (first
) = loc
;
4372 first
= NEXT_INSN (first
);
4377 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4379 emit_jump_insn_before (rtx pattern
, rtx before
)
4381 if (INSN_P (before
))
4382 return emit_jump_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4384 return emit_jump_insn_before_noloc (pattern
, before
);
4387 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4389 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4391 rtx first
= PREV_INSN (before
);
4392 rtx last
= emit_call_insn_before_noloc (pattern
, before
);
4394 if (pattern
== NULL_RTX
)
4397 first
= NEXT_INSN (first
);
4400 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4401 INSN_LOCATOR (first
) = loc
;
4404 first
= NEXT_INSN (first
);
4409 /* like emit_call_insn_before_noloc,
4410 but set insn_locator according to before. */
4412 emit_call_insn_before (rtx pattern
, rtx before
)
4414 if (INSN_P (before
))
4415 return emit_call_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4417 return emit_call_insn_before_noloc (pattern
, before
);
4420 /* Take X and emit it at the end of the doubly-linked
4423 Returns the last insn emitted. */
4428 rtx last
= last_insn
;
4434 switch (GET_CODE (x
))
4445 rtx next
= NEXT_INSN (insn
);
4452 #ifdef ENABLE_RTL_CHECKING
4459 last
= make_insn_raw (x
);
4467 /* Make an insn of code JUMP_INSN with pattern X
4468 and add it to the end of the doubly-linked list. */
4471 emit_jump_insn (rtx x
)
4473 rtx last
= NULL_RTX
, insn
;
4475 switch (GET_CODE (x
))
4486 rtx next
= NEXT_INSN (insn
);
4493 #ifdef ENABLE_RTL_CHECKING
4500 last
= make_jump_insn_raw (x
);
4508 /* Make an insn of code CALL_INSN with pattern X
4509 and add it to the end of the doubly-linked list. */
4512 emit_call_insn (rtx x
)
4516 switch (GET_CODE (x
))
4524 insn
= emit_insn (x
);
4527 #ifdef ENABLE_RTL_CHECKING
4534 insn
= make_call_insn_raw (x
);
4542 /* Add the label LABEL to the end of the doubly-linked list. */
4545 emit_label (rtx label
)
4547 /* This can be called twice for the same label
4548 as a result of the confusion that follows a syntax error!
4549 So make it harmless. */
4550 if (INSN_UID (label
) == 0)
4552 INSN_UID (label
) = cur_insn_uid
++;
4558 /* Make an insn of code BARRIER
4559 and add it to the end of the doubly-linked list. */
4564 rtx barrier
= rtx_alloc (BARRIER
);
4565 INSN_UID (barrier
) = cur_insn_uid
++;
4570 /* Make line numbering NOTE insn for LOCATION add it to the end
4571 of the doubly-linked list, but only if line-numbers are desired for
4572 debugging info and it doesn't match the previous one. */
4575 emit_line_note (location_t location
)
4579 #ifdef USE_MAPPED_LOCATION
4580 if (location
== last_location
)
4583 if (location
.file
&& last_location
.file
4584 && !strcmp (location
.file
, last_location
.file
)
4585 && location
.line
== last_location
.line
)
4588 last_location
= location
;
4590 if (no_line_numbers
)
4596 #ifdef USE_MAPPED_LOCATION
4597 note
= emit_note ((int) location
);
4599 note
= emit_note (location
.line
);
4600 NOTE_SOURCE_FILE (note
) = location
.file
;
4606 /* Emit a copy of note ORIG. */
4609 emit_note_copy (rtx orig
)
4613 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4619 note
= rtx_alloc (NOTE
);
4621 INSN_UID (note
) = cur_insn_uid
++;
4622 NOTE_DATA (note
) = NOTE_DATA (orig
);
4623 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4624 BLOCK_FOR_INSN (note
) = NULL
;
4630 /* Make an insn of code NOTE or type NOTE_NO
4631 and add it to the end of the doubly-linked list. */
4634 emit_note (int note_no
)
4638 note
= rtx_alloc (NOTE
);
4639 INSN_UID (note
) = cur_insn_uid
++;
4640 NOTE_LINE_NUMBER (note
) = note_no
;
4641 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4642 BLOCK_FOR_INSN (note
) = NULL
;
4647 /* Cause next statement to emit a line note even if the line number
4651 force_next_line_note (void)
4653 #ifdef USE_MAPPED_LOCATION
4656 last_location
.line
= -1;
4660 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4661 note of this type already exists, remove it first. */
4664 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4666 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4672 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4673 has multiple sets (some callers assume single_set
4674 means the insn only has one set, when in fact it
4675 means the insn only has one * useful * set). */
4676 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4682 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4683 It serves no useful purpose and breaks eliminate_regs. */
4684 if (GET_CODE (datum
) == ASM_OPERANDS
)
4694 XEXP (note
, 0) = datum
;
4698 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4699 return REG_NOTES (insn
);
4702 /* Return an indication of which type of insn should have X as a body.
4703 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4705 static enum rtx_code
4706 classify_insn (rtx x
)
4710 if (GET_CODE (x
) == CALL
)
4712 if (GET_CODE (x
) == RETURN
)
4714 if (GET_CODE (x
) == SET
)
4716 if (SET_DEST (x
) == pc_rtx
)
4718 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4723 if (GET_CODE (x
) == PARALLEL
)
4726 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4727 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4729 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4730 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4732 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4733 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4739 /* Emit the rtl pattern X as an appropriate kind of insn.
4740 If X is a label, it is simply added into the insn chain. */
4745 enum rtx_code code
= classify_insn (x
);
4750 return emit_label (x
);
4752 return emit_insn (x
);
4755 rtx insn
= emit_jump_insn (x
);
4756 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4757 return emit_barrier ();
4761 return emit_call_insn (x
);
4767 /* Space for free sequence stack entries. */
4768 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
4770 /* Begin emitting insns to a sequence. If this sequence will contain
4771 something that might cause the compiler to pop arguments to function
4772 calls (because those pops have previously been deferred; see
4773 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4774 before calling this function. That will ensure that the deferred
4775 pops are not accidentally emitted in the middle of this sequence. */
4778 start_sequence (void)
4780 struct sequence_stack
*tem
;
4782 if (free_sequence_stack
!= NULL
)
4784 tem
= free_sequence_stack
;
4785 free_sequence_stack
= tem
->next
;
4788 tem
= ggc_alloc (sizeof (struct sequence_stack
));
4790 tem
->next
= seq_stack
;
4791 tem
->first
= first_insn
;
4792 tem
->last
= last_insn
;
4800 /* Set up the insn chain starting with FIRST as the current sequence,
4801 saving the previously current one. See the documentation for
4802 start_sequence for more information about how to use this function. */
4805 push_to_sequence (rtx first
)
4811 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4817 /* Set up the outer-level insn chain
4818 as the current sequence, saving the previously current one. */
4821 push_topmost_sequence (void)
4823 struct sequence_stack
*stack
, *top
= NULL
;
4827 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4830 first_insn
= top
->first
;
4831 last_insn
= top
->last
;
4834 /* After emitting to the outer-level insn chain, update the outer-level
4835 insn chain, and restore the previous saved state. */
4838 pop_topmost_sequence (void)
4840 struct sequence_stack
*stack
, *top
= NULL
;
4842 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4845 top
->first
= first_insn
;
4846 top
->last
= last_insn
;
4851 /* After emitting to a sequence, restore previous saved state.
4853 To get the contents of the sequence just made, you must call
4854 `get_insns' *before* calling here.
4856 If the compiler might have deferred popping arguments while
4857 generating this sequence, and this sequence will not be immediately
4858 inserted into the instruction stream, use do_pending_stack_adjust
4859 before calling get_insns. That will ensure that the deferred
4860 pops are inserted into this sequence, and not into some random
4861 location in the instruction stream. See INHIBIT_DEFER_POP for more
4862 information about deferred popping of arguments. */
4867 struct sequence_stack
*tem
= seq_stack
;
4869 first_insn
= tem
->first
;
4870 last_insn
= tem
->last
;
4871 seq_stack
= tem
->next
;
4873 memset (tem
, 0, sizeof (*tem
));
4874 tem
->next
= free_sequence_stack
;
4875 free_sequence_stack
= tem
;
4878 /* Return 1 if currently emitting into a sequence. */
4881 in_sequence_p (void)
4883 return seq_stack
!= 0;
4886 /* Put the various virtual registers into REGNO_REG_RTX. */
4889 init_virtual_regs (struct emit_status
*es
)
4891 rtx
*ptr
= es
->x_regno_reg_rtx
;
4892 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4893 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4894 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4895 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4896 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4900 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4901 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4902 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4903 static int copy_insn_n_scratches
;
4905 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4906 copied an ASM_OPERANDS.
4907 In that case, it is the original input-operand vector. */
4908 static rtvec orig_asm_operands_vector
;
4910 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4911 copied an ASM_OPERANDS.
4912 In that case, it is the copied input-operand vector. */
4913 static rtvec copy_asm_operands_vector
;
4915 /* Likewise for the constraints vector. */
4916 static rtvec orig_asm_constraints_vector
;
4917 static rtvec copy_asm_constraints_vector
;
4919 /* Recursively create a new copy of an rtx for copy_insn.
4920 This function differs from copy_rtx in that it handles SCRATCHes and
4921 ASM_OPERANDs properly.
4922 Normally, this function is not used directly; use copy_insn as front end.
4923 However, you could first copy an insn pattern with copy_insn and then use
4924 this function afterwards to properly copy any REG_NOTEs containing
4928 copy_insn_1 (rtx orig
)
4933 const char *format_ptr
;
4935 code
= GET_CODE (orig
);
4949 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
4954 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
4955 if (copy_insn_scratch_in
[i
] == orig
)
4956 return copy_insn_scratch_out
[i
];
4960 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4961 a LABEL_REF, it isn't sharable. */
4962 if (GET_CODE (XEXP (orig
, 0)) == PLUS
4963 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
4964 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
4968 /* A MEM with a constant address is not sharable. The problem is that
4969 the constant address may need to be reloaded. If the mem is shared,
4970 then reloading one copy of this mem will cause all copies to appear
4971 to have been reloaded. */
4977 /* Copy the various flags, fields, and other information. We assume
4978 that all fields need copying, and then clear the fields that should
4979 not be copied. That is the sensible default behavior, and forces
4980 us to explicitly document why we are *not* copying a flag. */
4981 copy
= shallow_copy_rtx (orig
);
4983 /* We do not copy the USED flag, which is used as a mark bit during
4984 walks over the RTL. */
4985 RTX_FLAG (copy
, used
) = 0;
4987 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4990 RTX_FLAG (copy
, jump
) = 0;
4991 RTX_FLAG (copy
, call
) = 0;
4992 RTX_FLAG (copy
, frame_related
) = 0;
4995 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
4997 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
4998 switch (*format_ptr
++)
5001 if (XEXP (orig
, i
) != NULL
)
5002 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5007 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5008 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5009 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5010 XVEC (copy
, i
) = copy_asm_operands_vector
;
5011 else if (XVEC (orig
, i
) != NULL
)
5013 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5014 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5015 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5026 /* These are left unchanged. */
5033 if (code
== SCRATCH
)
5035 i
= copy_insn_n_scratches
++;
5036 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5037 copy_insn_scratch_in
[i
] = orig
;
5038 copy_insn_scratch_out
[i
] = copy
;
5040 else if (code
== ASM_OPERANDS
)
5042 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5043 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5044 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5045 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5051 /* Create a new copy of an rtx.
5052 This function differs from copy_rtx in that it handles SCRATCHes and
5053 ASM_OPERANDs properly.
5054 INSN doesn't really have to be a full INSN; it could be just the
5057 copy_insn (rtx insn
)
5059 copy_insn_n_scratches
= 0;
5060 orig_asm_operands_vector
= 0;
5061 orig_asm_constraints_vector
= 0;
5062 copy_asm_operands_vector
= 0;
5063 copy_asm_constraints_vector
= 0;
5064 return copy_insn_1 (insn
);
5067 /* Initialize data structures and variables in this file
5068 before generating rtl for each function. */
5073 struct function
*f
= cfun
;
5075 f
->emit
= ggc_alloc (sizeof (struct emit_status
));
5079 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5080 last_location
= UNKNOWN_LOCATION
;
5081 first_label_num
= label_num
;
5084 /* Init the tables that describe all the pseudo regs. */
5086 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5088 f
->emit
->regno_pointer_align
5089 = ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5090 * sizeof (unsigned char));
5093 = ggc_alloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
));
5095 /* Put copies of all the hard registers into regno_reg_rtx. */
5096 memcpy (regno_reg_rtx
,
5097 static_regno_reg_rtx
,
5098 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5100 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5101 init_virtual_regs (f
->emit
);
5103 /* Indicate that the virtual registers and stack locations are
5105 REG_POINTER (stack_pointer_rtx
) = 1;
5106 REG_POINTER (frame_pointer_rtx
) = 1;
5107 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5108 REG_POINTER (arg_pointer_rtx
) = 1;
5110 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5111 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5112 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5113 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5114 REG_POINTER (virtual_cfa_rtx
) = 1;
5116 #ifdef STACK_BOUNDARY
5117 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5118 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5119 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5120 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5122 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5123 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5124 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5125 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5126 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5129 #ifdef INIT_EXPANDERS
5134 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5137 gen_const_vector (enum machine_mode mode
, int constant
)
5142 enum machine_mode inner
;
5144 units
= GET_MODE_NUNITS (mode
);
5145 inner
= GET_MODE_INNER (mode
);
5147 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5149 v
= rtvec_alloc (units
);
5151 /* We need to call this function after we set the scalar const_tiny_rtx
5153 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5155 for (i
= 0; i
< units
; ++i
)
5156 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5158 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5162 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5163 all elements are zero, and the one vector when all elements are one. */
5165 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5167 enum machine_mode inner
= GET_MODE_INNER (mode
);
5168 int nunits
= GET_MODE_NUNITS (mode
);
5172 /* Check to see if all of the elements have the same value. */
5173 x
= RTVEC_ELT (v
, nunits
- 1);
5174 for (i
= nunits
- 2; i
>= 0; i
--)
5175 if (RTVEC_ELT (v
, i
) != x
)
5178 /* If the values are all the same, check to see if we can use one of the
5179 standard constant vectors. */
5182 if (x
== CONST0_RTX (inner
))
5183 return CONST0_RTX (mode
);
5184 else if (x
== CONST1_RTX (inner
))
5185 return CONST1_RTX (mode
);
5188 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5191 /* Create some permanent unique rtl objects shared between all functions.
5192 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5195 init_emit_once (int line_numbers
)
5198 enum machine_mode mode
;
5199 enum machine_mode double_mode
;
5201 /* We need reg_raw_mode, so initialize the modes now. */
5202 init_reg_modes_once ();
5204 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5206 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5207 const_int_htab_eq
, NULL
);
5209 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5210 const_double_htab_eq
, NULL
);
5212 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5213 mem_attrs_htab_eq
, NULL
);
5214 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5215 reg_attrs_htab_eq
, NULL
);
5217 no_line_numbers
= ! line_numbers
;
5219 /* Compute the word and byte modes. */
5221 byte_mode
= VOIDmode
;
5222 word_mode
= VOIDmode
;
5223 double_mode
= VOIDmode
;
5225 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5227 mode
= GET_MODE_WIDER_MODE (mode
))
5229 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5230 && byte_mode
== VOIDmode
)
5233 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5234 && word_mode
== VOIDmode
)
5238 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5240 mode
= GET_MODE_WIDER_MODE (mode
))
5242 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5243 && double_mode
== VOIDmode
)
5247 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5249 /* Assign register numbers to the globally defined register rtx.
5250 This must be done at runtime because the register number field
5251 is in a union and some compilers can't initialize unions. */
5253 pc_rtx
= gen_rtx_PC (VOIDmode
);
5254 cc0_rtx
= gen_rtx_CC0 (VOIDmode
);
5255 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5256 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5257 if (hard_frame_pointer_rtx
== 0)
5258 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5259 HARD_FRAME_POINTER_REGNUM
);
5260 if (arg_pointer_rtx
== 0)
5261 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5262 virtual_incoming_args_rtx
=
5263 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5264 virtual_stack_vars_rtx
=
5265 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5266 virtual_stack_dynamic_rtx
=
5267 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5268 virtual_outgoing_args_rtx
=
5269 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5270 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5272 /* Initialize RTL for commonly used hard registers. These are
5273 copied into regno_reg_rtx as we begin to compile each function. */
5274 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5275 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5277 #ifdef INIT_EXPANDERS
5278 /* This is to initialize {init|mark|free}_machine_status before the first
5279 call to push_function_context_to. This is needed by the Chill front
5280 end which calls push_function_context_to before the first call to
5281 init_function_start. */
5285 /* Create the unique rtx's for certain rtx codes and operand values. */
5287 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5288 tries to use these variables. */
5289 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5290 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5291 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5293 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5294 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5295 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5297 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5299 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5300 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5301 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5302 REAL_VALUE_FROM_INT (dconst3
, 3, 0, double_mode
);
5303 REAL_VALUE_FROM_INT (dconst10
, 10, 0, double_mode
);
5304 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5305 REAL_VALUE_FROM_INT (dconstm2
, -2, -1, double_mode
);
5307 dconsthalf
= dconst1
;
5308 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5310 real_arithmetic (&dconstthird
, RDIV_EXPR
, &dconst1
, &dconst3
);
5312 /* Initialize mathematical constants for constant folding builtins.
5313 These constants need to be given to at least 160 bits precision. */
5314 real_from_string (&dconstpi
,
5315 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5316 real_from_string (&dconste
,
5317 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5319 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5321 REAL_VALUE_TYPE
*r
=
5322 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5324 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5326 mode
= GET_MODE_WIDER_MODE (mode
))
5327 const_tiny_rtx
[i
][(int) mode
] =
5328 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5330 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5332 mode
= GET_MODE_WIDER_MODE (mode
))
5333 const_tiny_rtx
[i
][(int) mode
] =
5334 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5336 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5338 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5340 mode
= GET_MODE_WIDER_MODE (mode
))
5341 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5343 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5345 mode
= GET_MODE_WIDER_MODE (mode
))
5346 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5349 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5351 mode
= GET_MODE_WIDER_MODE (mode
))
5353 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5354 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5357 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5359 mode
= GET_MODE_WIDER_MODE (mode
))
5361 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5362 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5365 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5366 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5367 const_tiny_rtx
[0][i
] = const0_rtx
;
5369 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5370 if (STORE_FLAG_VALUE
== 1)
5371 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5373 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5374 return_address_pointer_rtx
5375 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5378 #ifdef STATIC_CHAIN_REGNUM
5379 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5381 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5382 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5383 static_chain_incoming_rtx
5384 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5387 static_chain_incoming_rtx
= static_chain_rtx
;
5391 static_chain_rtx
= STATIC_CHAIN
;
5393 #ifdef STATIC_CHAIN_INCOMING
5394 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5396 static_chain_incoming_rtx
= static_chain_rtx
;
5400 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5401 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5404 /* Produce exact duplicate of insn INSN after AFTER.
5405 Care updating of libcall regions if present. */
5408 emit_copy_of_insn_after (rtx insn
, rtx after
)
5411 rtx note1
, note2
, link
;
5413 switch (GET_CODE (insn
))
5416 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5420 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5424 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5425 if (CALL_INSN_FUNCTION_USAGE (insn
))
5426 CALL_INSN_FUNCTION_USAGE (new)
5427 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5428 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5429 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5436 /* Update LABEL_NUSES. */
5437 mark_jump_label (PATTERN (new), new, 0);
5439 INSN_LOCATOR (new) = INSN_LOCATOR (insn
);
5441 /* If the old insn is frame related, then so is the new one. This is
5442 primarily needed for IA-64 unwind info which marks epilogue insns,
5443 which may be duplicated by the basic block reordering code. */
5444 RTX_FRAME_RELATED_P (new) = RTX_FRAME_RELATED_P (insn
);
5446 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5448 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5449 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5451 if (GET_CODE (link
) == EXPR_LIST
)
5453 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5458 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5463 /* Fix the libcall sequences. */
5464 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5467 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5469 XEXP (note1
, 0) = p
;
5470 XEXP (note2
, 0) = new;
5472 INSN_CODE (new) = INSN_CODE (insn
);
5476 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5478 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5480 if (hard_reg_clobbers
[mode
][regno
])
5481 return hard_reg_clobbers
[mode
][regno
];
5483 return (hard_reg_clobbers
[mode
][regno
] =
5484 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5487 #include "gt-emit-rtl.h"