1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static GTY(()) int label_num
= 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num
;
78 /* Value label_num had when set_new_last_label_num was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num
;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers
;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl
[GR_MAX
];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
100 rtx (*gen_lowpart
) (enum machine_mode mode
, rtx x
) = gen_lowpart_general
;
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
110 REAL_VALUE_TYPE dconst0
;
111 REAL_VALUE_TYPE dconst1
;
112 REAL_VALUE_TYPE dconst2
;
113 REAL_VALUE_TYPE dconst3
;
114 REAL_VALUE_TYPE dconst10
;
115 REAL_VALUE_TYPE dconstm1
;
116 REAL_VALUE_TYPE dconstm2
;
117 REAL_VALUE_TYPE dconsthalf
;
118 REAL_VALUE_TYPE dconstthird
;
119 REAL_VALUE_TYPE dconstpi
;
120 REAL_VALUE_TYPE dconste
;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
141 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
142 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
144 /* This is used to implement __builtin_return_address for some machines.
145 See for instance the MIPS port. */
146 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
148 /* We make one copy of (const_int C) where C is in
149 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
150 to save space during the compilation and simplify comparisons of
153 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
155 /* A hash table storing CONST_INTs whose absolute value is greater
156 than MAX_SAVED_CONST_INT. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
159 htab_t const_int_htab
;
161 /* A hash table storing memory attribute structures. */
162 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
163 htab_t mem_attrs_htab
;
165 /* A hash table storing register attribute structures. */
166 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
167 htab_t reg_attrs_htab
;
169 /* A hash table storing all CONST_DOUBLEs. */
170 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
171 htab_t const_double_htab
;
173 #define first_insn (cfun->emit->x_first_insn)
174 #define last_insn (cfun->emit->x_last_insn)
175 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176 #define last_location (cfun->emit->x_last_location)
177 #define first_label_num (cfun->emit->x_first_label_num)
179 static rtx
make_jump_insn_raw (rtx
);
180 static rtx
make_call_insn_raw (rtx
);
181 static rtx
find_line_note (rtx
);
182 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
183 static void unshare_all_decls (tree
);
184 static void reset_used_decls (tree
);
185 static void mark_label_nuses (rtx
);
186 static hashval_t
const_int_htab_hash (const void *);
187 static int const_int_htab_eq (const void *, const void *);
188 static hashval_t
const_double_htab_hash (const void *);
189 static int const_double_htab_eq (const void *, const void *);
190 static rtx
lookup_const_double (rtx
);
191 static hashval_t
mem_attrs_htab_hash (const void *);
192 static int mem_attrs_htab_eq (const void *, const void *);
193 static mem_attrs
*get_mem_attrs (HOST_WIDE_INT
, tree
, rtx
, rtx
, unsigned int,
195 static hashval_t
reg_attrs_htab_hash (const void *);
196 static int reg_attrs_htab_eq (const void *, const void *);
197 static reg_attrs
*get_reg_attrs (tree
, int);
198 static tree
component_ref_for_mem_expr (tree
);
199 static rtx
gen_const_vector_0 (enum machine_mode
);
200 static rtx
gen_complex_constant_part (enum machine_mode
, rtx
, int);
201 static void copy_rtx_if_shared_1 (rtx
*orig
);
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability
= -1;
207 /* Returns a hash code for X (which is a really a CONST_INT). */
210 const_int_htab_hash (const void *x
)
212 return (hashval_t
) INTVAL ((rtx
) x
);
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
220 const_int_htab_eq (const void *x
, const void *y
)
222 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
227 const_double_htab_hash (const void *x
)
232 if (GET_MODE (value
) == VOIDmode
)
233 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
236 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h
^= GET_MODE (value
);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
246 const_double_htab_eq (const void *x
, const void *y
)
248 rtx a
= (rtx
)x
, b
= (rtx
)y
;
250 if (GET_MODE (a
) != GET_MODE (b
))
252 if (GET_MODE (a
) == VOIDmode
)
253 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
254 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
257 CONST_DOUBLE_REAL_VALUE (b
));
260 /* Returns a hash code for X (which is a really a mem_attrs *). */
263 mem_attrs_htab_hash (const void *x
)
265 mem_attrs
*p
= (mem_attrs
*) x
;
267 return (p
->alias
^ (p
->align
* 1000)
268 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
269 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
273 /* Returns nonzero if the value represented by X (which is really a
274 mem_attrs *) is the same as that given by Y (which is also really a
278 mem_attrs_htab_eq (const void *x
, const void *y
)
280 mem_attrs
*p
= (mem_attrs
*) x
;
281 mem_attrs
*q
= (mem_attrs
*) y
;
283 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
284 && p
->size
== q
->size
&& p
->align
== q
->align
);
287 /* Allocate a new mem_attrs structure and insert it into the hash table if
288 one identical to it is not already in the table. We are doing this for
292 get_mem_attrs (HOST_WIDE_INT alias
, tree expr
, rtx offset
, rtx size
,
293 unsigned int align
, enum machine_mode mode
)
298 /* If everything is the default, we can just return zero.
299 This must match what the corresponding MEM_* macros return when the
300 field is not present. */
301 if (alias
== 0 && expr
== 0 && offset
== 0
303 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
304 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
305 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
310 attrs
.offset
= offset
;
314 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
317 *slot
= ggc_alloc (sizeof (mem_attrs
));
318 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
324 /* Returns a hash code for X (which is a really a reg_attrs *). */
327 reg_attrs_htab_hash (const void *x
)
329 reg_attrs
*p
= (reg_attrs
*) x
;
331 return ((p
->offset
* 1000) ^ (long) p
->decl
);
334 /* Returns nonzero if the value represented by X (which is really a
335 reg_attrs *) is the same as that given by Y (which is also really a
339 reg_attrs_htab_eq (const void *x
, const void *y
)
341 reg_attrs
*p
= (reg_attrs
*) x
;
342 reg_attrs
*q
= (reg_attrs
*) y
;
344 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
346 /* Allocate a new reg_attrs structure and insert it into the hash table if
347 one identical to it is not already in the table. We are doing this for
351 get_reg_attrs (tree decl
, int offset
)
356 /* If everything is the default, we can just return zero. */
357 if (decl
== 0 && offset
== 0)
361 attrs
.offset
= offset
;
363 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
366 *slot
= ggc_alloc (sizeof (reg_attrs
));
367 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
373 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
374 don't attempt to share with the various global pieces of rtl (such as
375 frame_pointer_rtx). */
378 gen_raw_REG (enum machine_mode mode
, int regno
)
380 rtx x
= gen_rtx_raw_REG (mode
, regno
);
381 ORIGINAL_REGNO (x
) = regno
;
385 /* There are some RTL codes that require special attention; the generation
386 functions do the raw handling. If you add to this list, modify
387 special_rtx in gengenrtl.c as well. */
390 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
394 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
395 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
397 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
398 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
399 return const_true_rtx
;
402 /* Look up the CONST_INT in the hash table. */
403 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
404 (hashval_t
) arg
, INSERT
);
406 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
412 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
414 return GEN_INT (trunc_int_for_mode (c
, mode
));
417 /* CONST_DOUBLEs might be created from pairs of integers, or from
418 REAL_VALUE_TYPEs. Also, their length is known only at run time,
419 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
421 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
422 hash table. If so, return its counterpart; otherwise add it
423 to the hash table and return it. */
425 lookup_const_double (rtx real
)
427 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
434 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
435 VALUE in mode MODE. */
437 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
439 rtx real
= rtx_alloc (CONST_DOUBLE
);
440 PUT_MODE (real
, mode
);
442 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
444 return lookup_const_double (real
);
447 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
448 of ints: I0 is the low-order word and I1 is the high-order word.
449 Do not use this routine for non-integer modes; convert to
450 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
453 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
458 if (mode
!= VOIDmode
)
461 if (GET_MODE_CLASS (mode
) != MODE_INT
462 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
463 /* We can get a 0 for an error mark. */
464 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
465 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
468 /* We clear out all bits that don't belong in MODE, unless they and
469 our sign bit are all one. So we get either a reasonable negative
470 value or a reasonable unsigned value for this mode. */
471 width
= GET_MODE_BITSIZE (mode
);
472 if (width
< HOST_BITS_PER_WIDE_INT
473 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
474 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
475 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
476 else if (width
== HOST_BITS_PER_WIDE_INT
477 && ! (i1
== ~0 && i0
< 0))
479 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
480 /* We cannot represent this value as a constant. */
483 /* If this would be an entire word for the target, but is not for
484 the host, then sign-extend on the host so that the number will
485 look the same way on the host that it would on the target.
487 For example, when building a 64 bit alpha hosted 32 bit sparc
488 targeted compiler, then we want the 32 bit unsigned value -1 to be
489 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
490 The latter confuses the sparc backend. */
492 if (width
< HOST_BITS_PER_WIDE_INT
493 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
494 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
496 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
499 ??? Strictly speaking, this is wrong if we create a CONST_INT for
500 a large unsigned constant with the size of MODE being
501 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
502 in a wider mode. In that case we will mis-interpret it as a
505 Unfortunately, the only alternative is to make a CONST_DOUBLE for
506 any constant in any mode if it is an unsigned constant larger
507 than the maximum signed integer in an int on the host. However,
508 doing this will break everyone that always expects to see a
509 CONST_INT for SImode and smaller.
511 We have always been making CONST_INTs in this case, so nothing
512 new is being broken. */
514 if (width
<= HOST_BITS_PER_WIDE_INT
)
515 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
518 /* If this integer fits in one word, return a CONST_INT. */
519 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
522 /* We use VOIDmode for integers. */
523 value
= rtx_alloc (CONST_DOUBLE
);
524 PUT_MODE (value
, VOIDmode
);
526 CONST_DOUBLE_LOW (value
) = i0
;
527 CONST_DOUBLE_HIGH (value
) = i1
;
529 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
530 XWINT (value
, i
) = 0;
532 return lookup_const_double (value
);
536 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
538 /* In case the MD file explicitly references the frame pointer, have
539 all such references point to the same frame pointer. This is
540 used during frame pointer elimination to distinguish the explicit
541 references to these registers from pseudos that happened to be
544 If we have eliminated the frame pointer or arg pointer, we will
545 be using it as a normal register, for example as a spill
546 register. In such cases, we might be accessing it in a mode that
547 is not Pmode and therefore cannot use the pre-allocated rtx.
549 Also don't do this when we are making new REGs in reload, since
550 we don't want to get confused with the real pointers. */
552 if (mode
== Pmode
&& !reload_in_progress
)
554 if (regno
== FRAME_POINTER_REGNUM
555 && (!reload_completed
|| frame_pointer_needed
))
556 return frame_pointer_rtx
;
557 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
558 if (regno
== HARD_FRAME_POINTER_REGNUM
559 && (!reload_completed
|| frame_pointer_needed
))
560 return hard_frame_pointer_rtx
;
562 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
563 if (regno
== ARG_POINTER_REGNUM
)
564 return arg_pointer_rtx
;
566 #ifdef RETURN_ADDRESS_POINTER_REGNUM
567 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
568 return return_address_pointer_rtx
;
570 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
571 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
572 return pic_offset_table_rtx
;
573 if (regno
== STACK_POINTER_REGNUM
)
574 return stack_pointer_rtx
;
578 /* If the per-function register table has been set up, try to re-use
579 an existing entry in that table to avoid useless generation of RTL.
581 This code is disabled for now until we can fix the various backends
582 which depend on having non-shared hard registers in some cases. Long
583 term we want to re-enable this code as it can significantly cut down
584 on the amount of useless RTL that gets generated.
586 We'll also need to fix some code that runs after reload that wants to
587 set ORIGINAL_REGNO. */
592 && regno
< FIRST_PSEUDO_REGISTER
593 && reg_raw_mode
[regno
] == mode
)
594 return regno_reg_rtx
[regno
];
597 return gen_raw_REG (mode
, regno
);
601 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
603 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
605 /* This field is not cleared by the mere allocation of the rtx, so
613 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
615 /* This is the most common failure type.
616 Catch it early so we can see who does it. */
617 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
620 /* This check isn't usable right now because combine will
621 throw arbitrary crap like a CALL into a SUBREG in
622 gen_lowpart_for_combine so we must just eat it. */
624 /* Check for this too. */
625 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
628 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
631 /* Generate a SUBREG representing the least-significant part of REG if MODE
632 is smaller than mode of REG, otherwise paradoxical SUBREG. */
635 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
637 enum machine_mode inmode
;
639 inmode
= GET_MODE (reg
);
640 if (inmode
== VOIDmode
)
642 return gen_rtx_SUBREG (mode
, reg
,
643 subreg_lowpart_offset (mode
, inmode
));
646 /* gen_rtvec (n, [rt1, ..., rtn])
648 ** This routine creates an rtvec and stores within it the
649 ** pointers to rtx's which are its arguments.
654 gen_rtvec (int n
, ...)
663 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
665 vector
= alloca (n
* sizeof (rtx
));
667 for (i
= 0; i
< n
; i
++)
668 vector
[i
] = va_arg (p
, rtx
);
670 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
674 return gen_rtvec_v (save_n
, vector
);
678 gen_rtvec_v (int n
, rtx
*argp
)
684 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
686 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
688 for (i
= 0; i
< n
; i
++)
689 rt_val
->elem
[i
] = *argp
++;
694 /* Generate a REG rtx for a new pseudo register of mode MODE.
695 This pseudo is assigned the next sequential register number. */
698 gen_reg_rtx (enum machine_mode mode
)
700 struct function
*f
= cfun
;
703 /* Don't let anything called after initial flow analysis create new
708 if (generating_concat_p
709 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
710 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
712 /* For complex modes, don't make a single pseudo.
713 Instead, make a CONCAT of two pseudos.
714 This allows noncontiguous allocation of the real and imaginary parts,
715 which makes much better code. Besides, allocating DCmode
716 pseudos overstrains reload on some machines like the 386. */
717 rtx realpart
, imagpart
;
718 enum machine_mode partmode
= GET_MODE_INNER (mode
);
720 realpart
= gen_reg_rtx (partmode
);
721 imagpart
= gen_reg_rtx (partmode
);
722 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
725 /* Make sure regno_pointer_align, and regno_reg_rtx are large
726 enough to have an element for this pseudo reg number. */
728 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
730 int old_size
= f
->emit
->regno_pointer_align_length
;
734 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
735 memset (new + old_size
, 0, old_size
);
736 f
->emit
->regno_pointer_align
= (unsigned char *) new;
738 new1
= ggc_realloc (f
->emit
->x_regno_reg_rtx
,
739 old_size
* 2 * sizeof (rtx
));
740 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
741 regno_reg_rtx
= new1
;
743 f
->emit
->regno_pointer_align_length
= old_size
* 2;
746 val
= gen_raw_REG (mode
, reg_rtx_no
);
747 regno_reg_rtx
[reg_rtx_no
++] = val
;
751 /* Generate a register with same attributes as REG,
752 but offsetted by OFFSET. */
755 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
, int offset
)
757 rtx
new = gen_rtx_REG (mode
, regno
);
758 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
759 REG_OFFSET (reg
) + offset
);
763 /* Set the decl for MEM to DECL. */
766 set_reg_attrs_from_mem (rtx reg
, rtx mem
)
768 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
770 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
773 /* Set the register attributes for registers contained in PARM_RTX.
774 Use needed values from memory attributes of MEM. */
777 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
779 if (GET_CODE (parm_rtx
) == REG
)
780 set_reg_attrs_from_mem (parm_rtx
, mem
);
781 else if (GET_CODE (parm_rtx
) == PARALLEL
)
783 /* Check for a NULL entry in the first slot, used to indicate that the
784 parameter goes both on the stack and in registers. */
785 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
786 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
788 rtx x
= XVECEXP (parm_rtx
, 0, i
);
789 if (GET_CODE (XEXP (x
, 0)) == REG
)
790 REG_ATTRS (XEXP (x
, 0))
791 = get_reg_attrs (MEM_EXPR (mem
),
792 INTVAL (XEXP (x
, 1)));
797 /* Assign the RTX X to declaration T. */
799 set_decl_rtl (tree t
, rtx x
)
801 DECL_CHECK (t
)->decl
.rtl
= x
;
805 /* For register, we maintain the reverse information too. */
806 if (GET_CODE (x
) == REG
)
807 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
808 else if (GET_CODE (x
) == SUBREG
)
809 REG_ATTRS (SUBREG_REG (x
))
810 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
811 if (GET_CODE (x
) == CONCAT
)
813 if (REG_P (XEXP (x
, 0)))
814 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
815 if (REG_P (XEXP (x
, 1)))
816 REG_ATTRS (XEXP (x
, 1))
817 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
819 if (GET_CODE (x
) == PARALLEL
)
822 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
824 rtx y
= XVECEXP (x
, 0, i
);
825 if (REG_P (XEXP (y
, 0)))
826 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
831 /* Assign the RTX X to parameter declaration T. */
833 set_decl_incoming_rtl (tree t
, rtx x
)
835 DECL_INCOMING_RTL (t
) = x
;
839 /* For register, we maintain the reverse information too. */
840 if (GET_CODE (x
) == REG
)
841 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
842 else if (GET_CODE (x
) == SUBREG
)
843 REG_ATTRS (SUBREG_REG (x
))
844 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
845 if (GET_CODE (x
) == CONCAT
)
847 if (REG_P (XEXP (x
, 0)))
848 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
849 if (REG_P (XEXP (x
, 1)))
850 REG_ATTRS (XEXP (x
, 1))
851 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
853 if (GET_CODE (x
) == PARALLEL
)
857 /* Check for a NULL entry, used to indicate that the parameter goes
858 both on the stack and in registers. */
859 if (XEXP (XVECEXP (x
, 0, 0), 0))
864 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
866 rtx y
= XVECEXP (x
, 0, i
);
867 if (REG_P (XEXP (y
, 0)))
868 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
873 /* Identify REG (which may be a CONCAT) as a user register. */
876 mark_user_reg (rtx reg
)
878 if (GET_CODE (reg
) == CONCAT
)
880 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
881 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
883 else if (GET_CODE (reg
) == REG
)
884 REG_USERVAR_P (reg
) = 1;
889 /* Identify REG as a probable pointer register and show its alignment
890 as ALIGN, if nonzero. */
893 mark_reg_pointer (rtx reg
, int align
)
895 if (! REG_POINTER (reg
))
897 REG_POINTER (reg
) = 1;
900 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
902 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
903 /* We can no-longer be sure just how aligned this pointer is. */
904 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
907 /* Return 1 plus largest pseudo reg number used in the current function. */
915 /* Return 1 + the largest label number used so far in the current function. */
920 if (last_label_num
&& label_num
== base_label_num
)
921 return last_label_num
;
925 /* Return first label number used in this function (if any were used). */
928 get_first_label_num (void)
930 return first_label_num
;
933 /* Return the final regno of X, which is a SUBREG of a hard
936 subreg_hard_regno (rtx x
, int check_mode
)
938 enum machine_mode mode
= GET_MODE (x
);
939 unsigned int byte_offset
, base_regno
, final_regno
;
940 rtx reg
= SUBREG_REG (x
);
942 /* This is where we attempt to catch illegal subregs
943 created by the compiler. */
944 if (GET_CODE (x
) != SUBREG
945 || GET_CODE (reg
) != REG
)
947 base_regno
= REGNO (reg
);
948 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
950 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
952 #ifdef ENABLE_CHECKING
953 if (!subreg_offset_representable_p (REGNO (reg
), GET_MODE (reg
),
954 SUBREG_BYTE (x
), mode
))
957 /* Catch non-congruent offsets too. */
958 byte_offset
= SUBREG_BYTE (x
);
959 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
962 final_regno
= subreg_regno (x
);
967 /* Return a value representing some low-order bits of X, where the number
968 of low-order bits is given by MODE. Note that no conversion is done
969 between floating-point and fixed-point values, rather, the bit
970 representation is returned.
972 This function handles the cases in common between gen_lowpart, below,
973 and two variants in cse.c and combine.c. These are the cases that can
974 be safely handled at all points in the compilation.
976 If this is not a case we can handle, return 0. */
979 gen_lowpart_common (enum machine_mode mode
, rtx x
)
981 int msize
= GET_MODE_SIZE (mode
);
984 enum machine_mode innermode
;
986 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
987 so we have to make one up. Yuk. */
988 innermode
= GET_MODE (x
);
989 if (GET_CODE (x
) == CONST_INT
&& msize
<= HOST_BITS_PER_WIDE_INT
)
990 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
991 else if (innermode
== VOIDmode
)
992 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
994 xsize
= GET_MODE_SIZE (innermode
);
996 if (innermode
== VOIDmode
|| innermode
== BLKmode
)
999 if (innermode
== mode
)
1002 /* MODE must occupy no more words than the mode of X. */
1003 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1004 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1007 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1008 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& msize
> xsize
)
1011 offset
= subreg_lowpart_offset (mode
, innermode
);
1013 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1014 && (GET_MODE_CLASS (mode
) == MODE_INT
1015 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1017 /* If we are getting the low-order part of something that has been
1018 sign- or zero-extended, we can either just use the object being
1019 extended or make a narrower extension. If we want an even smaller
1020 piece than the size of the object being extended, call ourselves
1023 This case is used mostly by combine and cse. */
1025 if (GET_MODE (XEXP (x
, 0)) == mode
)
1027 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1028 return gen_lowpart_common (mode
, XEXP (x
, 0));
1029 else if (msize
< xsize
)
1030 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1032 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
1033 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1034 || GET_CODE (x
) == CONST_DOUBLE
|| GET_CODE (x
) == CONST_INT
)
1035 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1037 /* Otherwise, we can't do this. */
1041 /* Return the constant real or imaginary part (which has mode MODE)
1042 of a complex value X. The IMAGPART_P argument determines whether
1043 the real or complex component should be returned. This function
1044 returns NULL_RTX if the component isn't a constant. */
1047 gen_complex_constant_part (enum machine_mode mode
, rtx x
, int imagpart_p
)
1051 if (GET_CODE (x
) == MEM
1052 && GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
)
1054 decl
= SYMBOL_REF_DECL (XEXP (x
, 0));
1055 if (decl
!= NULL_TREE
&& TREE_CODE (decl
) == COMPLEX_CST
)
1057 part
= imagpart_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
1058 if (TREE_CODE (part
) == REAL_CST
1059 || TREE_CODE (part
) == INTEGER_CST
)
1060 return expand_expr (part
, NULL_RTX
, mode
, 0);
1066 /* Return the real part (which has mode MODE) of a complex value X.
1067 This always comes at the low address in memory. */
1070 gen_realpart (enum machine_mode mode
, rtx x
)
1074 /* Handle complex constants. */
1075 part
= gen_complex_constant_part (mode
, x
, 0);
1076 if (part
!= NULL_RTX
)
1079 if (WORDS_BIG_ENDIAN
1080 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1082 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1084 ("can't access real part of complex value in hard register");
1085 else if (WORDS_BIG_ENDIAN
)
1086 return gen_highpart (mode
, x
);
1088 return gen_lowpart (mode
, x
);
1091 /* Return the imaginary part (which has mode MODE) of a complex value X.
1092 This always comes at the high address in memory. */
1095 gen_imagpart (enum machine_mode mode
, rtx x
)
1099 /* Handle complex constants. */
1100 part
= gen_complex_constant_part (mode
, x
, 1);
1101 if (part
!= NULL_RTX
)
1104 if (WORDS_BIG_ENDIAN
)
1105 return gen_lowpart (mode
, x
);
1106 else if (! WORDS_BIG_ENDIAN
1107 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1109 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1111 ("can't access imaginary part of complex value in hard register");
1113 return gen_highpart (mode
, x
);
1116 /* Return 1 iff X, assumed to be a SUBREG,
1117 refers to the real part of the complex value in its containing reg.
1118 Complex values are always stored with the real part in the first word,
1119 regardless of WORDS_BIG_ENDIAN. */
1122 subreg_realpart_p (rtx x
)
1124 if (GET_CODE (x
) != SUBREG
)
1127 return ((unsigned int) SUBREG_BYTE (x
)
1128 < (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1131 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1132 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1133 least-significant part of X.
1134 MODE specifies how big a part of X to return;
1135 it usually should not be larger than a word.
1136 If X is a MEM whose address is a QUEUED, the value may be so also. */
1139 gen_lowpart_general (enum machine_mode mode
, rtx x
)
1141 rtx result
= gen_lowpart_common (mode
, x
);
1145 else if (GET_CODE (x
) == REG
)
1147 /* Must be a hard reg that's not valid in MODE. */
1148 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1153 else if (GET_CODE (x
) == MEM
)
1155 /* The only additional case we can do is MEM. */
1158 /* The following exposes the use of "x" to CSE. */
1159 if (GET_MODE_SIZE (GET_MODE (x
)) <= UNITS_PER_WORD
1160 && SCALAR_INT_MODE_P (GET_MODE (x
))
1161 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
1162 GET_MODE_BITSIZE (GET_MODE (x
)))
1163 && ! no_new_pseudos
)
1164 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1166 if (WORDS_BIG_ENDIAN
)
1167 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1168 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1170 if (BYTES_BIG_ENDIAN
)
1171 /* Adjust the address so that the address-after-the-data
1173 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1174 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1176 return adjust_address (x
, mode
, offset
);
1178 else if (GET_CODE (x
) == ADDRESSOF
)
1179 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1184 /* Like `gen_lowpart', but refer to the most significant part.
1185 This is used to access the imaginary part of a complex number. */
1188 gen_highpart (enum machine_mode mode
, rtx x
)
1190 unsigned int msize
= GET_MODE_SIZE (mode
);
1193 /* This case loses if X is a subreg. To catch bugs early,
1194 complain if an invalid MODE is used even in other cases. */
1195 if (msize
> UNITS_PER_WORD
1196 && msize
!= (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1199 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1200 subreg_highpart_offset (mode
, GET_MODE (x
)));
1202 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1203 the target if we have a MEM. gen_highpart must return a valid operand,
1204 emitting code if necessary to do so. */
1205 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1206 result
= validize_mem (result
);
1213 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1214 be VOIDmode constant. */
1216 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1218 if (GET_MODE (exp
) != VOIDmode
)
1220 if (GET_MODE (exp
) != innermode
)
1222 return gen_highpart (outermode
, exp
);
1224 return simplify_gen_subreg (outermode
, exp
, innermode
,
1225 subreg_highpart_offset (outermode
, innermode
));
1228 /* Return offset in bytes to get OUTERMODE low part
1229 of the value in mode INNERMODE stored in memory in target format. */
1232 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1234 unsigned int offset
= 0;
1235 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1239 if (WORDS_BIG_ENDIAN
)
1240 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1241 if (BYTES_BIG_ENDIAN
)
1242 offset
+= difference
% UNITS_PER_WORD
;
1248 /* Return offset in bytes to get OUTERMODE high part
1249 of the value in mode INNERMODE stored in memory in target format. */
1251 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1253 unsigned int offset
= 0;
1254 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1256 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1261 if (! WORDS_BIG_ENDIAN
)
1262 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1263 if (! BYTES_BIG_ENDIAN
)
1264 offset
+= difference
% UNITS_PER_WORD
;
1270 /* Return 1 iff X, assumed to be a SUBREG,
1271 refers to the least significant part of its containing reg.
1272 If X is not a SUBREG, always return 1 (it is its own low part!). */
1275 subreg_lowpart_p (rtx x
)
1277 if (GET_CODE (x
) != SUBREG
)
1279 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1282 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1283 == SUBREG_BYTE (x
));
1286 /* Return subword OFFSET of operand OP.
1287 The word number, OFFSET, is interpreted as the word number starting
1288 at the low-order address. OFFSET 0 is the low-order word if not
1289 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1291 If we cannot extract the required word, we return zero. Otherwise,
1292 an rtx corresponding to the requested word will be returned.
1294 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1295 reload has completed, a valid address will always be returned. After
1296 reload, if a valid address cannot be returned, we return zero.
1298 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1299 it is the responsibility of the caller.
1301 MODE is the mode of OP in case it is a CONST_INT.
1303 ??? This is still rather broken for some cases. The problem for the
1304 moment is that all callers of this thing provide no 'goal mode' to
1305 tell us to work with. This exists because all callers were written
1306 in a word based SUBREG world.
1307 Now use of this function can be deprecated by simplify_subreg in most
1312 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1314 if (mode
== VOIDmode
)
1315 mode
= GET_MODE (op
);
1317 if (mode
== VOIDmode
)
1320 /* If OP is narrower than a word, fail. */
1322 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1325 /* If we want a word outside OP, return zero. */
1327 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1330 /* Form a new MEM at the requested address. */
1331 if (GET_CODE (op
) == MEM
)
1333 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1335 if (! validate_address
)
1338 else if (reload_completed
)
1340 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1344 return replace_equiv_address (new, XEXP (new, 0));
1347 /* Rest can be handled by simplify_subreg. */
1348 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1351 /* Similar to `operand_subword', but never return 0. If we can't extract
1352 the required subword, put OP into a register and try again. If that fails,
1353 abort. We always validate the address in this case.
1355 MODE is the mode of OP, in case it is CONST_INT. */
1358 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1360 rtx result
= operand_subword (op
, offset
, 1, mode
);
1365 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1367 /* If this is a register which can not be accessed by words, copy it
1368 to a pseudo register. */
1369 if (GET_CODE (op
) == REG
)
1370 op
= copy_to_reg (op
);
1372 op
= force_reg (mode
, op
);
1375 result
= operand_subword (op
, offset
, 1, mode
);
1382 /* Given a compare instruction, swap the operands.
1383 A test instruction is changed into a compare of 0 against the operand. */
1386 reverse_comparison (rtx insn
)
1388 rtx body
= PATTERN (insn
);
1391 if (GET_CODE (body
) == SET
)
1392 comp
= SET_SRC (body
);
1394 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1396 if (GET_CODE (comp
) == COMPARE
)
1398 rtx op0
= XEXP (comp
, 0);
1399 rtx op1
= XEXP (comp
, 1);
1400 XEXP (comp
, 0) = op1
;
1401 XEXP (comp
, 1) = op0
;
1405 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1406 CONST0_RTX (GET_MODE (comp
)), comp
);
1407 if (GET_CODE (body
) == SET
)
1408 SET_SRC (body
) = new;
1410 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1414 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1415 or (2) a component ref of something variable. Represent the later with
1416 a NULL expression. */
1419 component_ref_for_mem_expr (tree ref
)
1421 tree inner
= TREE_OPERAND (ref
, 0);
1423 if (TREE_CODE (inner
) == COMPONENT_REF
)
1424 inner
= component_ref_for_mem_expr (inner
);
1427 tree placeholder_ptr
= 0;
1429 /* Now remove any conversions: they don't change what the underlying
1430 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1431 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1432 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1433 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1434 || TREE_CODE (inner
) == SAVE_EXPR
1435 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1436 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1437 inner
= find_placeholder (inner
, &placeholder_ptr
);
1439 inner
= TREE_OPERAND (inner
, 0);
1441 if (! DECL_P (inner
))
1445 if (inner
== TREE_OPERAND (ref
, 0))
1448 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1449 TREE_OPERAND (ref
, 1));
1452 /* Given REF, a MEM, and T, either the type of X or the expression
1453 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1454 if we are making a new object of this type. BITPOS is nonzero if
1455 there is an offset outstanding on T that will be applied later. */
1458 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1459 HOST_WIDE_INT bitpos
)
1461 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1462 tree expr
= MEM_EXPR (ref
);
1463 rtx offset
= MEM_OFFSET (ref
);
1464 rtx size
= MEM_SIZE (ref
);
1465 unsigned int align
= MEM_ALIGN (ref
);
1466 HOST_WIDE_INT apply_bitpos
= 0;
1469 /* It can happen that type_for_mode was given a mode for which there
1470 is no language-level type. In which case it returns NULL, which
1475 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1476 if (type
== error_mark_node
)
1479 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1480 wrong answer, as it assumes that DECL_RTL already has the right alias
1481 info. Callers should not set DECL_RTL until after the call to
1482 set_mem_attributes. */
1483 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1486 /* Get the alias set from the expression or type (perhaps using a
1487 front-end routine) and use it. */
1488 alias
= get_alias_set (t
);
1490 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1491 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1492 RTX_UNCHANGING_P (ref
)
1493 |= ((lang_hooks
.honor_readonly
1494 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1495 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1497 /* If we are making an object of this type, or if this is a DECL, we know
1498 that it is a scalar if the type is not an aggregate. */
1499 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1500 MEM_SCALAR_P (ref
) = 1;
1502 /* We can set the alignment from the type if we are making an object,
1503 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1504 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1505 align
= MAX (align
, TYPE_ALIGN (type
));
1507 /* If the size is known, we can set that. */
1508 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1509 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1511 /* If T is not a type, we may be able to deduce some more information about
1515 maybe_set_unchanging (ref
, t
);
1516 if (TREE_THIS_VOLATILE (t
))
1517 MEM_VOLATILE_P (ref
) = 1;
1519 /* Now remove any conversions: they don't change what the underlying
1520 object is. Likewise for SAVE_EXPR. */
1521 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1522 || TREE_CODE (t
) == NON_LVALUE_EXPR
1523 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1524 || TREE_CODE (t
) == SAVE_EXPR
)
1525 t
= TREE_OPERAND (t
, 0);
1527 /* If this expression can't be addressed (e.g., it contains a reference
1528 to a non-addressable field), show we don't change its alias set. */
1529 if (! can_address_p (t
))
1530 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1532 /* If this is a decl, set the attributes of the MEM from it. */
1536 offset
= const0_rtx
;
1537 apply_bitpos
= bitpos
;
1538 size
= (DECL_SIZE_UNIT (t
)
1539 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1540 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1541 align
= DECL_ALIGN (t
);
1544 /* If this is a constant, we know the alignment. */
1545 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1547 align
= TYPE_ALIGN (type
);
1548 #ifdef CONSTANT_ALIGNMENT
1549 align
= CONSTANT_ALIGNMENT (t
, align
);
1553 /* If this is a field reference and not a bit-field, record it. */
1554 /* ??? There is some information that can be gleened from bit-fields,
1555 such as the word offset in the structure that might be modified.
1556 But skip it for now. */
1557 else if (TREE_CODE (t
) == COMPONENT_REF
1558 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1560 expr
= component_ref_for_mem_expr (t
);
1561 offset
= const0_rtx
;
1562 apply_bitpos
= bitpos
;
1563 /* ??? Any reason the field size would be different than
1564 the size we got from the type? */
1567 /* If this is an array reference, look for an outer field reference. */
1568 else if (TREE_CODE (t
) == ARRAY_REF
)
1570 tree off_tree
= size_zero_node
;
1571 /* We can't modify t, because we use it at the end of the
1577 tree index
= TREE_OPERAND (t2
, 1);
1578 tree array
= TREE_OPERAND (t2
, 0);
1579 tree domain
= TYPE_DOMAIN (TREE_TYPE (array
));
1580 tree low_bound
= (domain
? TYPE_MIN_VALUE (domain
) : 0);
1581 tree unit_size
= TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array
)));
1583 /* We assume all arrays have sizes that are a multiple of a byte.
1584 First subtract the lower bound, if any, in the type of the
1585 index, then convert to sizetype and multiply by the size of the
1587 if (low_bound
!= 0 && ! integer_zerop (low_bound
))
1588 index
= fold (build (MINUS_EXPR
, TREE_TYPE (index
),
1591 /* If the index has a self-referential type, pass it to a
1592 WITH_RECORD_EXPR; if the component size is, pass our
1593 component to one. */
1594 if (CONTAINS_PLACEHOLDER_P (index
))
1595 index
= build (WITH_RECORD_EXPR
, TREE_TYPE (index
), index
, t2
);
1596 if (CONTAINS_PLACEHOLDER_P (unit_size
))
1597 unit_size
= build (WITH_RECORD_EXPR
, sizetype
,
1601 = fold (build (PLUS_EXPR
, sizetype
,
1602 fold (build (MULT_EXPR
, sizetype
,
1606 t2
= TREE_OPERAND (t2
, 0);
1608 while (TREE_CODE (t2
) == ARRAY_REF
);
1614 if (host_integerp (off_tree
, 1))
1616 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1617 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1618 align
= DECL_ALIGN (t2
);
1619 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1621 offset
= GEN_INT (ioff
);
1622 apply_bitpos
= bitpos
;
1625 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1627 expr
= component_ref_for_mem_expr (t2
);
1628 if (host_integerp (off_tree
, 1))
1630 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1631 apply_bitpos
= bitpos
;
1633 /* ??? Any reason the field size would be different than
1634 the size we got from the type? */
1636 else if (flag_argument_noalias
> 1
1637 && TREE_CODE (t2
) == INDIRECT_REF
1638 && TREE_CODE (TREE_OPERAND (t2
, 0)) == PARM_DECL
)
1645 /* If this is a Fortran indirect argument reference, record the
1647 else if (flag_argument_noalias
> 1
1648 && TREE_CODE (t
) == INDIRECT_REF
1649 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1656 /* If we modified OFFSET based on T, then subtract the outstanding
1657 bit position offset. Similarly, increase the size of the accessed
1658 object to contain the negative offset. */
1661 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1663 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1666 /* Now set the attributes we computed above. */
1668 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1670 /* If this is already known to be a scalar or aggregate, we are done. */
1671 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1674 /* If it is a reference into an aggregate, this is part of an aggregate.
1675 Otherwise we don't know. */
1676 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1677 || TREE_CODE (t
) == ARRAY_RANGE_REF
1678 || TREE_CODE (t
) == BIT_FIELD_REF
)
1679 MEM_IN_STRUCT_P (ref
) = 1;
1683 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1685 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1688 /* Set the decl for MEM to DECL. */
1691 set_mem_attrs_from_reg (rtx mem
, rtx reg
)
1694 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
1695 GEN_INT (REG_OFFSET (reg
)),
1696 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1699 /* Set the alias set of MEM to SET. */
1702 set_mem_alias_set (rtx mem
, HOST_WIDE_INT set
)
1704 #ifdef ENABLE_CHECKING
1705 /* If the new and old alias sets don't conflict, something is wrong. */
1706 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
1710 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1711 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1715 /* Set the alignment of MEM to ALIGN bits. */
1718 set_mem_align (rtx mem
, unsigned int align
)
1720 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1721 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1725 /* Set the expr for MEM to EXPR. */
1728 set_mem_expr (rtx mem
, tree expr
)
1731 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1732 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1735 /* Set the offset of MEM to OFFSET. */
1738 set_mem_offset (rtx mem
, rtx offset
)
1740 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1741 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1745 /* Set the size of MEM to SIZE. */
1748 set_mem_size (rtx mem
, rtx size
)
1750 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1751 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1755 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1756 and its address changed to ADDR. (VOIDmode means don't change the mode.
1757 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1758 returned memory location is required to be valid. The memory
1759 attributes are not changed. */
1762 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1766 if (GET_CODE (memref
) != MEM
)
1768 if (mode
== VOIDmode
)
1769 mode
= GET_MODE (memref
);
1771 addr
= XEXP (memref
, 0);
1772 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1773 && (!validate
|| memory_address_p (mode
, addr
)))
1778 if (reload_in_progress
|| reload_completed
)
1780 if (! memory_address_p (mode
, addr
))
1784 addr
= memory_address (mode
, addr
);
1787 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1790 new = gen_rtx_MEM (mode
, addr
);
1791 MEM_COPY_ATTRIBUTES (new, memref
);
1795 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1796 way we are changing MEMREF, so we only preserve the alias set. */
1799 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1801 rtx
new = change_address_1 (memref
, mode
, addr
, 1), size
;
1802 enum machine_mode mmode
= GET_MODE (new);
1805 size
= mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
));
1806 align
= mmode
== BLKmode
? BITS_PER_UNIT
: GET_MODE_ALIGNMENT (mmode
);
1808 /* If there are no changes, just return the original memory reference. */
1811 if (MEM_ATTRS (memref
) == 0
1812 || (MEM_EXPR (memref
) == NULL
1813 && MEM_OFFSET (memref
) == NULL
1814 && MEM_SIZE (memref
) == size
1815 && MEM_ALIGN (memref
) == align
))
1818 new = gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1819 MEM_COPY_ATTRIBUTES (new, memref
);
1823 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0, size
, align
, mmode
);
1828 /* Return a memory reference like MEMREF, but with its mode changed
1829 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1830 nonzero, the memory address is forced to be valid.
1831 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1832 and caller is responsible for adjusting MEMREF base register. */
1835 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1836 int validate
, int adjust
)
1838 rtx addr
= XEXP (memref
, 0);
1840 rtx memoffset
= MEM_OFFSET (memref
);
1842 unsigned int memalign
= MEM_ALIGN (memref
);
1844 /* If there are no changes, just return the original memory reference. */
1845 if (mode
== GET_MODE (memref
) && !offset
1846 && (!validate
|| memory_address_p (mode
, addr
)))
1849 /* ??? Prefer to create garbage instead of creating shared rtl.
1850 This may happen even if offset is nonzero -- consider
1851 (plus (plus reg reg) const_int) -- so do this always. */
1852 addr
= copy_rtx (addr
);
1856 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1857 object, we can merge it into the LO_SUM. */
1858 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1860 && (unsigned HOST_WIDE_INT
) offset
1861 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1862 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1863 plus_constant (XEXP (addr
, 1), offset
));
1865 addr
= plus_constant (addr
, offset
);
1868 new = change_address_1 (memref
, mode
, addr
, validate
);
1870 /* Compute the new values of the memory attributes due to this adjustment.
1871 We add the offsets and update the alignment. */
1873 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1875 /* Compute the new alignment by taking the MIN of the alignment and the
1876 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1881 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
1883 /* We can compute the size in a number of ways. */
1884 if (GET_MODE (new) != BLKmode
)
1885 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1886 else if (MEM_SIZE (memref
))
1887 size
= plus_constant (MEM_SIZE (memref
), -offset
);
1889 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
1890 memoffset
, size
, memalign
, GET_MODE (new));
1892 /* At some point, we should validate that this offset is within the object,
1893 if all the appropriate values are known. */
1897 /* Return a memory reference like MEMREF, but with its mode changed
1898 to MODE and its address changed to ADDR, which is assumed to be
1899 MEMREF offseted by OFFSET bytes. If VALIDATE is
1900 nonzero, the memory address is forced to be valid. */
1903 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
1904 HOST_WIDE_INT offset
, int validate
)
1906 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
1907 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
1910 /* Return a memory reference like MEMREF, but whose address is changed by
1911 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1912 known to be in OFFSET (possibly 1). */
1915 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
1917 rtx
new, addr
= XEXP (memref
, 0);
1919 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1921 /* At this point we don't know _why_ the address is invalid. It
1922 could have secondary memory references, multiplies or anything.
1924 However, if we did go and rearrange things, we can wind up not
1925 being able to recognize the magic around pic_offset_table_rtx.
1926 This stuff is fragile, and is yet another example of why it is
1927 bad to expose PIC machinery too early. */
1928 if (! memory_address_p (GET_MODE (memref
), new)
1929 && GET_CODE (addr
) == PLUS
1930 && XEXP (addr
, 0) == pic_offset_table_rtx
)
1932 addr
= force_reg (GET_MODE (addr
), addr
);
1933 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1936 update_temp_slot_address (XEXP (memref
, 0), new);
1937 new = change_address_1 (memref
, VOIDmode
, new, 1);
1939 /* If there are no changes, just return the original memory reference. */
1943 /* Update the alignment to reflect the offset. Reset the offset, which
1946 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
1947 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
1952 /* Return a memory reference like MEMREF, but with its address changed to
1953 ADDR. The caller is asserting that the actual piece of memory pointed
1954 to is the same, just the form of the address is being changed, such as
1955 by putting something into a register. */
1958 replace_equiv_address (rtx memref
, rtx addr
)
1960 /* change_address_1 copies the memory attribute structure without change
1961 and that's exactly what we want here. */
1962 update_temp_slot_address (XEXP (memref
, 0), addr
);
1963 return change_address_1 (memref
, VOIDmode
, addr
, 1);
1966 /* Likewise, but the reference is not required to be valid. */
1969 replace_equiv_address_nv (rtx memref
, rtx addr
)
1971 return change_address_1 (memref
, VOIDmode
, addr
, 0);
1974 /* Return a memory reference like MEMREF, but with its mode widened to
1975 MODE and offset by OFFSET. This would be used by targets that e.g.
1976 cannot issue QImode memory operations and have to use SImode memory
1977 operations plus masking logic. */
1980 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
1982 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
1983 tree expr
= MEM_EXPR (new);
1984 rtx memoffset
= MEM_OFFSET (new);
1985 unsigned int size
= GET_MODE_SIZE (mode
);
1987 /* If there are no changes, just return the original memory reference. */
1991 /* If we don't know what offset we were at within the expression, then
1992 we can't know if we've overstepped the bounds. */
1998 if (TREE_CODE (expr
) == COMPONENT_REF
)
2000 tree field
= TREE_OPERAND (expr
, 1);
2002 if (! DECL_SIZE_UNIT (field
))
2008 /* Is the field at least as large as the access? If so, ok,
2009 otherwise strip back to the containing structure. */
2010 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2011 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2012 && INTVAL (memoffset
) >= 0)
2015 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2021 expr
= TREE_OPERAND (expr
, 0);
2022 memoffset
= (GEN_INT (INTVAL (memoffset
)
2023 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2024 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2027 /* Similarly for the decl. */
2028 else if (DECL_P (expr
)
2029 && DECL_SIZE_UNIT (expr
)
2030 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2031 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2032 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2036 /* The widened memory access overflows the expression, which means
2037 that it could alias another expression. Zap it. */
2044 memoffset
= NULL_RTX
;
2046 /* The widened memory may alias other stuff, so zap the alias set. */
2047 /* ??? Maybe use get_alias_set on any remaining expression. */
2049 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2050 MEM_ALIGN (new), mode
);
2055 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2058 gen_label_rtx (void)
2060 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2061 NULL
, label_num
++, NULL
);
2064 /* For procedure integration. */
2066 /* Install new pointers to the first and last insns in the chain.
2067 Also, set cur_insn_uid to one higher than the last in use.
2068 Used for an inline-procedure after copying the insn chain. */
2071 set_new_first_and_last_insn (rtx first
, rtx last
)
2079 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2080 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2085 /* Set the last label number found in the current function.
2086 This is used when belatedly compiling an inline function. */
2089 set_new_last_label_num (int last
)
2091 base_label_num
= label_num
;
2092 last_label_num
= last
;
2095 /* Restore all variables describing the current status from the structure *P.
2096 This is used after a nested function. */
2099 restore_emit_status (struct function
*p ATTRIBUTE_UNUSED
)
2104 /* Go through all the RTL insn bodies and copy any invalid shared
2105 structure. This routine should only be called once. */
2108 unshare_all_rtl (tree fndecl
, rtx insn
)
2112 /* Make sure that virtual parameters are not shared. */
2113 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2114 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2116 /* Make sure that virtual stack slots are not shared. */
2117 unshare_all_decls (DECL_INITIAL (fndecl
));
2119 /* Unshare just about everything else. */
2120 unshare_all_rtl_in_chain (insn
);
2122 /* Make sure the addresses of stack slots found outside the insn chain
2123 (such as, in DECL_RTL of a variable) are not shared
2124 with the insn chain.
2126 This special care is necessary when the stack slot MEM does not
2127 actually appear in the insn chain. If it does appear, its address
2128 is unshared from all else at that point. */
2129 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2132 /* Go through all the RTL insn bodies and copy any invalid shared
2133 structure, again. This is a fairly expensive thing to do so it
2134 should be done sparingly. */
2137 unshare_all_rtl_again (rtx insn
)
2142 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2145 reset_used_flags (PATTERN (p
));
2146 reset_used_flags (REG_NOTES (p
));
2147 reset_used_flags (LOG_LINKS (p
));
2150 /* Make sure that virtual stack slots are not shared. */
2151 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2153 /* Make sure that virtual parameters are not shared. */
2154 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2155 reset_used_flags (DECL_RTL (decl
));
2157 reset_used_flags (stack_slot_list
);
2159 unshare_all_rtl (cfun
->decl
, insn
);
2162 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2163 Recursively does the same for subexpressions. */
2166 verify_rtx_sharing (rtx orig
, rtx insn
)
2171 const char *format_ptr
;
2176 code
= GET_CODE (x
);
2178 /* These types may be freely shared. */
2194 /* SCRATCH must be shared because they represent distinct values. */
2196 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2201 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2202 a LABEL_REF, it isn't sharable. */
2203 if (GET_CODE (XEXP (x
, 0)) == PLUS
2204 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2205 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2210 /* A MEM is allowed to be shared if its address is constant. */
2211 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2212 || reload_completed
|| reload_in_progress
)
2221 /* This rtx may not be shared. If it has already been seen,
2222 replace it with a copy of itself. */
2224 if (RTX_FLAG (x
, used
))
2226 error ("Invalid rtl sharing found in the insn");
2228 error ("Shared rtx");
2232 RTX_FLAG (x
, used
) = 1;
2234 /* Now scan the subexpressions recursively. */
2236 format_ptr
= GET_RTX_FORMAT (code
);
2238 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2240 switch (*format_ptr
++)
2243 verify_rtx_sharing (XEXP (x
, i
), insn
);
2247 if (XVEC (x
, i
) != NULL
)
2250 int len
= XVECLEN (x
, i
);
2252 for (j
= 0; j
< len
; j
++)
2254 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2255 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2256 && GET_CODE (SET_SRC (XVECEXP (x
, i
, j
))) == ASM_OPERANDS
)
2257 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2259 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2268 /* Go through all the RTL insn bodies and check that there is no unexpected
2269 sharing in between the subexpressions. */
2272 verify_rtl_sharing (void)
2276 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2279 reset_used_flags (PATTERN (p
));
2280 reset_used_flags (REG_NOTES (p
));
2281 reset_used_flags (LOG_LINKS (p
));
2284 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2287 verify_rtx_sharing (PATTERN (p
), p
);
2288 verify_rtx_sharing (REG_NOTES (p
), p
);
2289 verify_rtx_sharing (LOG_LINKS (p
), p
);
2293 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2294 Assumes the mark bits are cleared at entry. */
2297 unshare_all_rtl_in_chain (rtx insn
)
2299 for (; insn
; insn
= NEXT_INSN (insn
))
2302 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2303 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2304 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2308 /* Go through all virtual stack slots of a function and copy any
2309 shared structure. */
2311 unshare_all_decls (tree blk
)
2315 /* Copy shared decls. */
2316 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2317 if (DECL_RTL_SET_P (t
))
2318 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2320 /* Now process sub-blocks. */
2321 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2322 unshare_all_decls (t
);
2325 /* Go through all virtual stack slots of a function and mark them as
2328 reset_used_decls (tree blk
)
2333 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2334 if (DECL_RTL_SET_P (t
))
2335 reset_used_flags (DECL_RTL (t
));
2337 /* Now process sub-blocks. */
2338 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2339 reset_used_decls (t
);
2342 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2343 placed in the result directly, rather than being copied. MAY_SHARE is
2344 either a MEM of an EXPR_LIST of MEMs. */
2347 copy_most_rtx (rtx orig
, rtx may_share
)
2352 const char *format_ptr
;
2354 if (orig
== may_share
2355 || (GET_CODE (may_share
) == EXPR_LIST
2356 && in_expr_list_p (may_share
, orig
)))
2359 code
= GET_CODE (orig
);
2377 copy
= rtx_alloc (code
);
2378 PUT_MODE (copy
, GET_MODE (orig
));
2379 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2380 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2381 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2382 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2383 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2385 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2387 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2389 switch (*format_ptr
++)
2392 XEXP (copy
, i
) = XEXP (orig
, i
);
2393 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2394 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2398 XEXP (copy
, i
) = XEXP (orig
, i
);
2403 XVEC (copy
, i
) = XVEC (orig
, i
);
2404 if (XVEC (orig
, i
) != NULL
)
2406 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2407 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2408 XVECEXP (copy
, i
, j
)
2409 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2414 XWINT (copy
, i
) = XWINT (orig
, i
);
2419 XINT (copy
, i
) = XINT (orig
, i
);
2423 XTREE (copy
, i
) = XTREE (orig
, i
);
2428 XSTR (copy
, i
) = XSTR (orig
, i
);
2432 X0ANY (copy
, i
) = X0ANY (orig
, i
);
2442 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2443 Recursively does the same for subexpressions. Uses
2444 copy_rtx_if_shared_1 to reduce stack space. */
2447 copy_rtx_if_shared (rtx orig
)
2449 copy_rtx_if_shared_1 (&orig
);
2453 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2454 use. Recursively does the same for subexpressions. */
2457 copy_rtx_if_shared_1 (rtx
*orig1
)
2463 const char *format_ptr
;
2467 /* Repeat is used to turn tail-recursion into iteration. */
2474 code
= GET_CODE (x
);
2476 /* These types may be freely shared. */
2491 /* SCRATCH must be shared because they represent distinct values. */
2494 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2499 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2500 a LABEL_REF, it isn't sharable. */
2501 if (GET_CODE (XEXP (x
, 0)) == PLUS
2502 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2503 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2512 /* The chain of insns is not being copied. */
2519 /* This rtx may not be shared. If it has already been seen,
2520 replace it with a copy of itself. */
2522 if (RTX_FLAG (x
, used
))
2526 copy
= rtx_alloc (code
);
2527 memcpy (copy
, x
, RTX_SIZE (code
));
2531 RTX_FLAG (x
, used
) = 1;
2533 /* Now scan the subexpressions recursively.
2534 We can store any replaced subexpressions directly into X
2535 since we know X is not shared! Any vectors in X
2536 must be copied if X was copied. */
2538 format_ptr
= GET_RTX_FORMAT (code
);
2539 length
= GET_RTX_LENGTH (code
);
2542 for (i
= 0; i
< length
; i
++)
2544 switch (*format_ptr
++)
2548 copy_rtx_if_shared_1 (last_ptr
);
2549 last_ptr
= &XEXP (x
, i
);
2553 if (XVEC (x
, i
) != NULL
)
2556 int len
= XVECLEN (x
, i
);
2558 /* Copy the vector iff I copied the rtx and the length
2560 if (copied
&& len
> 0)
2561 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2563 /* Call recursively on all inside the vector. */
2564 for (j
= 0; j
< len
; j
++)
2567 copy_rtx_if_shared_1 (last_ptr
);
2568 last_ptr
= &XVECEXP (x
, i
, j
);
2583 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2584 to look for shared sub-parts. */
2587 reset_used_flags (rtx x
)
2591 const char *format_ptr
;
2594 /* Repeat is used to turn tail-recursion into iteration. */
2599 code
= GET_CODE (x
);
2601 /* These types may be freely shared so we needn't do any resetting
2623 /* The chain of insns is not being copied. */
2630 RTX_FLAG (x
, used
) = 0;
2632 format_ptr
= GET_RTX_FORMAT (code
);
2633 length
= GET_RTX_LENGTH (code
);
2635 for (i
= 0; i
< length
; i
++)
2637 switch (*format_ptr
++)
2645 reset_used_flags (XEXP (x
, i
));
2649 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2650 reset_used_flags (XVECEXP (x
, i
, j
));
2656 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2657 to look for shared sub-parts. */
2660 set_used_flags (rtx x
)
2664 const char *format_ptr
;
2669 code
= GET_CODE (x
);
2671 /* These types may be freely shared so we needn't do any resetting
2693 /* The chain of insns is not being copied. */
2700 RTX_FLAG (x
, used
) = 1;
2702 format_ptr
= GET_RTX_FORMAT (code
);
2703 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2705 switch (*format_ptr
++)
2708 set_used_flags (XEXP (x
, i
));
2712 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2713 set_used_flags (XVECEXP (x
, i
, j
));
2719 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2720 Return X or the rtx for the pseudo reg the value of X was copied into.
2721 OTHER must be valid as a SET_DEST. */
2724 make_safe_from (rtx x
, rtx other
)
2727 switch (GET_CODE (other
))
2730 other
= SUBREG_REG (other
);
2732 case STRICT_LOW_PART
:
2735 other
= XEXP (other
, 0);
2741 if ((GET_CODE (other
) == MEM
2743 && GET_CODE (x
) != REG
2744 && GET_CODE (x
) != SUBREG
)
2745 || (GET_CODE (other
) == REG
2746 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2747 || reg_mentioned_p (other
, x
))))
2749 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2750 emit_move_insn (temp
, x
);
2756 /* Emission of insns (adding them to the doubly-linked list). */
2758 /* Return the first insn of the current sequence or current function. */
2766 /* Specify a new insn as the first in the chain. */
2769 set_first_insn (rtx insn
)
2771 if (PREV_INSN (insn
) != 0)
2776 /* Return the last insn emitted in current sequence or current function. */
2779 get_last_insn (void)
2784 /* Specify a new insn as the last in the chain. */
2787 set_last_insn (rtx insn
)
2789 if (NEXT_INSN (insn
) != 0)
2794 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2797 get_last_insn_anywhere (void)
2799 struct sequence_stack
*stack
;
2802 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2803 if (stack
->last
!= 0)
2808 /* Return the first nonnote insn emitted in current sequence or current
2809 function. This routine looks inside SEQUENCEs. */
2812 get_first_nonnote_insn (void)
2814 rtx insn
= first_insn
;
2818 insn
= next_insn (insn
);
2819 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2826 /* Return the last nonnote insn emitted in current sequence or current
2827 function. This routine looks inside SEQUENCEs. */
2830 get_last_nonnote_insn (void)
2832 rtx insn
= last_insn
;
2836 insn
= previous_insn (insn
);
2837 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2844 /* Return a number larger than any instruction's uid in this function. */
2849 return cur_insn_uid
;
2852 /* Renumber instructions so that no instruction UIDs are wasted. */
2855 renumber_insns (FILE *stream
)
2859 /* If we're not supposed to renumber instructions, don't. */
2860 if (!flag_renumber_insns
)
2863 /* If there aren't that many instructions, then it's not really
2864 worth renumbering them. */
2865 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2870 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2873 fprintf (stream
, "Renumbering insn %d to %d\n",
2874 INSN_UID (insn
), cur_insn_uid
);
2875 INSN_UID (insn
) = cur_insn_uid
++;
2879 /* Return the next insn. If it is a SEQUENCE, return the first insn
2883 next_insn (rtx insn
)
2887 insn
= NEXT_INSN (insn
);
2888 if (insn
&& GET_CODE (insn
) == INSN
2889 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2890 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2896 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2900 previous_insn (rtx insn
)
2904 insn
= PREV_INSN (insn
);
2905 if (insn
&& GET_CODE (insn
) == INSN
2906 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2907 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2913 /* Return the next insn after INSN that is not a NOTE. This routine does not
2914 look inside SEQUENCEs. */
2917 next_nonnote_insn (rtx insn
)
2921 insn
= NEXT_INSN (insn
);
2922 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2929 /* Return the previous insn before INSN that is not a NOTE. This routine does
2930 not look inside SEQUENCEs. */
2933 prev_nonnote_insn (rtx insn
)
2937 insn
= PREV_INSN (insn
);
2938 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2945 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2946 or 0, if there is none. This routine does not look inside
2950 next_real_insn (rtx insn
)
2954 insn
= NEXT_INSN (insn
);
2955 if (insn
== 0 || GET_CODE (insn
) == INSN
2956 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2963 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2964 or 0, if there is none. This routine does not look inside
2968 prev_real_insn (rtx insn
)
2972 insn
= PREV_INSN (insn
);
2973 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2974 || GET_CODE (insn
) == JUMP_INSN
)
2981 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2982 This routine does not look inside SEQUENCEs. */
2985 last_call_insn (void)
2989 for (insn
= get_last_insn ();
2990 insn
&& GET_CODE (insn
) != CALL_INSN
;
2991 insn
= PREV_INSN (insn
))
2997 /* Find the next insn after INSN that really does something. This routine
2998 does not look inside SEQUENCEs. Until reload has completed, this is the
2999 same as next_real_insn. */
3002 active_insn_p (rtx insn
)
3004 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
3005 || (GET_CODE (insn
) == INSN
3006 && (! reload_completed
3007 || (GET_CODE (PATTERN (insn
)) != USE
3008 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3012 next_active_insn (rtx insn
)
3016 insn
= NEXT_INSN (insn
);
3017 if (insn
== 0 || active_insn_p (insn
))
3024 /* Find the last insn before INSN that really does something. This routine
3025 does not look inside SEQUENCEs. Until reload has completed, this is the
3026 same as prev_real_insn. */
3029 prev_active_insn (rtx insn
)
3033 insn
= PREV_INSN (insn
);
3034 if (insn
== 0 || active_insn_p (insn
))
3041 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3044 next_label (rtx insn
)
3048 insn
= NEXT_INSN (insn
);
3049 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3056 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3059 prev_label (rtx insn
)
3063 insn
= PREV_INSN (insn
);
3064 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3072 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3073 and REG_CC_USER notes so we can find it. */
3076 link_cc0_insns (rtx insn
)
3078 rtx user
= next_nonnote_insn (insn
);
3080 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3081 user
= XVECEXP (PATTERN (user
), 0, 0);
3083 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3085 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3088 /* Return the next insn that uses CC0 after INSN, which is assumed to
3089 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3090 applied to the result of this function should yield INSN).
3092 Normally, this is simply the next insn. However, if a REG_CC_USER note
3093 is present, it contains the insn that uses CC0.
3095 Return 0 if we can't find the insn. */
3098 next_cc0_user (rtx insn
)
3100 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3103 return XEXP (note
, 0);
3105 insn
= next_nonnote_insn (insn
);
3106 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3107 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3109 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3115 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3116 note, it is the previous insn. */
3119 prev_cc0_setter (rtx insn
)
3121 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3124 return XEXP (note
, 0);
3126 insn
= prev_nonnote_insn (insn
);
3127 if (! sets_cc0_p (PATTERN (insn
)))
3134 /* Increment the label uses for all labels present in rtx. */
3137 mark_label_nuses (rtx x
)
3143 code
= GET_CODE (x
);
3144 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3145 LABEL_NUSES (XEXP (x
, 0))++;
3147 fmt
= GET_RTX_FORMAT (code
);
3148 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3151 mark_label_nuses (XEXP (x
, i
));
3152 else if (fmt
[i
] == 'E')
3153 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3154 mark_label_nuses (XVECEXP (x
, i
, j
));
3159 /* Try splitting insns that can be split for better scheduling.
3160 PAT is the pattern which might split.
3161 TRIAL is the insn providing PAT.
3162 LAST is nonzero if we should return the last insn of the sequence produced.
3164 If this routine succeeds in splitting, it returns the first or last
3165 replacement insn depending on the value of LAST. Otherwise, it
3166 returns TRIAL. If the insn to be returned can be split, it will be. */
3169 try_split (rtx pat
, rtx trial
, int last
)
3171 rtx before
= PREV_INSN (trial
);
3172 rtx after
= NEXT_INSN (trial
);
3173 int has_barrier
= 0;
3177 rtx insn_last
, insn
;
3180 if (any_condjump_p (trial
)
3181 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3182 split_branch_probability
= INTVAL (XEXP (note
, 0));
3183 probability
= split_branch_probability
;
3185 seq
= split_insns (pat
, trial
);
3187 split_branch_probability
= -1;
3189 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3190 We may need to handle this specially. */
3191 if (after
&& GET_CODE (after
) == BARRIER
)
3194 after
= NEXT_INSN (after
);
3200 /* Avoid infinite loop if any insn of the result matches
3201 the original pattern. */
3205 if (INSN_P (insn_last
)
3206 && rtx_equal_p (PATTERN (insn_last
), pat
))
3208 if (!NEXT_INSN (insn_last
))
3210 insn_last
= NEXT_INSN (insn_last
);
3214 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3216 if (GET_CODE (insn
) == JUMP_INSN
)
3218 mark_jump_label (PATTERN (insn
), insn
, 0);
3220 if (probability
!= -1
3221 && any_condjump_p (insn
)
3222 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3224 /* We can preserve the REG_BR_PROB notes only if exactly
3225 one jump is created, otherwise the machine description
3226 is responsible for this step using
3227 split_branch_probability variable. */
3231 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3232 GEN_INT (probability
),
3238 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3239 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3240 if (GET_CODE (trial
) == CALL_INSN
)
3242 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3243 if (GET_CODE (insn
) == CALL_INSN
)
3245 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3248 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3249 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3253 /* Copy notes, particularly those related to the CFG. */
3254 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3256 switch (REG_NOTE_KIND (note
))
3260 while (insn
!= NULL_RTX
)
3262 if (GET_CODE (insn
) == CALL_INSN
3263 || (flag_non_call_exceptions
3264 && may_trap_p (PATTERN (insn
))))
3266 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3269 insn
= PREV_INSN (insn
);
3275 case REG_ALWAYS_RETURN
:
3277 while (insn
!= NULL_RTX
)
3279 if (GET_CODE (insn
) == CALL_INSN
)
3281 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3284 insn
= PREV_INSN (insn
);
3288 case REG_NON_LOCAL_GOTO
:
3290 while (insn
!= NULL_RTX
)
3292 if (GET_CODE (insn
) == JUMP_INSN
)
3294 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3297 insn
= PREV_INSN (insn
);
3306 /* If there are LABELS inside the split insns increment the
3307 usage count so we don't delete the label. */
3308 if (GET_CODE (trial
) == INSN
)
3311 while (insn
!= NULL_RTX
)
3313 if (GET_CODE (insn
) == INSN
)
3314 mark_label_nuses (PATTERN (insn
));
3316 insn
= PREV_INSN (insn
);
3320 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3322 delete_insn (trial
);
3324 emit_barrier_after (tem
);
3326 /* Recursively call try_split for each new insn created; by the
3327 time control returns here that insn will be fully split, so
3328 set LAST and continue from the insn after the one returned.
3329 We can't use next_active_insn here since AFTER may be a note.
3330 Ignore deleted insns, which can be occur if not optimizing. */
3331 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3332 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3333 tem
= try_split (PATTERN (tem
), tem
, 1);
3335 /* Return either the first or the last insn, depending on which was
3338 ? (after
? PREV_INSN (after
) : last_insn
)
3339 : NEXT_INSN (before
);
3342 /* Make and return an INSN rtx, initializing all its slots.
3343 Store PATTERN in the pattern slots. */
3346 make_insn_raw (rtx pattern
)
3350 insn
= rtx_alloc (INSN
);
3352 INSN_UID (insn
) = cur_insn_uid
++;
3353 PATTERN (insn
) = pattern
;
3354 INSN_CODE (insn
) = -1;
3355 LOG_LINKS (insn
) = NULL
;
3356 REG_NOTES (insn
) = NULL
;
3357 INSN_LOCATOR (insn
) = 0;
3358 BLOCK_FOR_INSN (insn
) = NULL
;
3360 #ifdef ENABLE_RTL_CHECKING
3363 && (returnjump_p (insn
)
3364 || (GET_CODE (insn
) == SET
3365 && SET_DEST (insn
) == pc_rtx
)))
3367 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3375 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3378 make_jump_insn_raw (rtx pattern
)
3382 insn
= rtx_alloc (JUMP_INSN
);
3383 INSN_UID (insn
) = cur_insn_uid
++;
3385 PATTERN (insn
) = pattern
;
3386 INSN_CODE (insn
) = -1;
3387 LOG_LINKS (insn
) = NULL
;
3388 REG_NOTES (insn
) = NULL
;
3389 JUMP_LABEL (insn
) = NULL
;
3390 INSN_LOCATOR (insn
) = 0;
3391 BLOCK_FOR_INSN (insn
) = NULL
;
3396 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3399 make_call_insn_raw (rtx pattern
)
3403 insn
= rtx_alloc (CALL_INSN
);
3404 INSN_UID (insn
) = cur_insn_uid
++;
3406 PATTERN (insn
) = pattern
;
3407 INSN_CODE (insn
) = -1;
3408 LOG_LINKS (insn
) = NULL
;
3409 REG_NOTES (insn
) = NULL
;
3410 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3411 INSN_LOCATOR (insn
) = 0;
3412 BLOCK_FOR_INSN (insn
) = NULL
;
3417 /* Add INSN to the end of the doubly-linked list.
3418 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3423 PREV_INSN (insn
) = last_insn
;
3424 NEXT_INSN (insn
) = 0;
3426 if (NULL
!= last_insn
)
3427 NEXT_INSN (last_insn
) = insn
;
3429 if (NULL
== first_insn
)
3435 /* Add INSN into the doubly-linked list after insn AFTER. This and
3436 the next should be the only functions called to insert an insn once
3437 delay slots have been filled since only they know how to update a
3441 add_insn_after (rtx insn
, rtx after
)
3443 rtx next
= NEXT_INSN (after
);
3446 if (optimize
&& INSN_DELETED_P (after
))
3449 NEXT_INSN (insn
) = next
;
3450 PREV_INSN (insn
) = after
;
3454 PREV_INSN (next
) = insn
;
3455 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3456 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3458 else if (last_insn
== after
)
3462 struct sequence_stack
*stack
= seq_stack
;
3463 /* Scan all pending sequences too. */
3464 for (; stack
; stack
= stack
->next
)
3465 if (after
== stack
->last
)
3475 if (GET_CODE (after
) != BARRIER
3476 && GET_CODE (insn
) != BARRIER
3477 && (bb
= BLOCK_FOR_INSN (after
)))
3479 set_block_for_insn (insn
, bb
);
3481 bb
->flags
|= BB_DIRTY
;
3482 /* Should not happen as first in the BB is always
3483 either NOTE or LABEL. */
3484 if (BB_END (bb
) == after
3485 /* Avoid clobbering of structure when creating new BB. */
3486 && GET_CODE (insn
) != BARRIER
3487 && (GET_CODE (insn
) != NOTE
3488 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3492 NEXT_INSN (after
) = insn
;
3493 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3495 rtx sequence
= PATTERN (after
);
3496 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3500 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3501 the previous should be the only functions called to insert an insn once
3502 delay slots have been filled since only they know how to update a
3506 add_insn_before (rtx insn
, rtx before
)
3508 rtx prev
= PREV_INSN (before
);
3511 if (optimize
&& INSN_DELETED_P (before
))
3514 PREV_INSN (insn
) = prev
;
3515 NEXT_INSN (insn
) = before
;
3519 NEXT_INSN (prev
) = insn
;
3520 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3522 rtx sequence
= PATTERN (prev
);
3523 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3526 else if (first_insn
== before
)
3530 struct sequence_stack
*stack
= seq_stack
;
3531 /* Scan all pending sequences too. */
3532 for (; stack
; stack
= stack
->next
)
3533 if (before
== stack
->first
)
3535 stack
->first
= insn
;
3543 if (GET_CODE (before
) != BARRIER
3544 && GET_CODE (insn
) != BARRIER
3545 && (bb
= BLOCK_FOR_INSN (before
)))
3547 set_block_for_insn (insn
, bb
);
3549 bb
->flags
|= BB_DIRTY
;
3550 /* Should not happen as first in the BB is always
3551 either NOTE or LABEl. */
3552 if (BB_HEAD (bb
) == insn
3553 /* Avoid clobbering of structure when creating new BB. */
3554 && GET_CODE (insn
) != BARRIER
3555 && (GET_CODE (insn
) != NOTE
3556 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3560 PREV_INSN (before
) = insn
;
3561 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3562 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3565 /* Remove an insn from its doubly-linked list. This function knows how
3566 to handle sequences. */
3568 remove_insn (rtx insn
)
3570 rtx next
= NEXT_INSN (insn
);
3571 rtx prev
= PREV_INSN (insn
);
3576 NEXT_INSN (prev
) = next
;
3577 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3579 rtx sequence
= PATTERN (prev
);
3580 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3583 else if (first_insn
== insn
)
3587 struct sequence_stack
*stack
= seq_stack
;
3588 /* Scan all pending sequences too. */
3589 for (; stack
; stack
= stack
->next
)
3590 if (insn
== stack
->first
)
3592 stack
->first
= next
;
3602 PREV_INSN (next
) = prev
;
3603 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3604 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3606 else if (last_insn
== insn
)
3610 struct sequence_stack
*stack
= seq_stack
;
3611 /* Scan all pending sequences too. */
3612 for (; stack
; stack
= stack
->next
)
3613 if (insn
== stack
->last
)
3622 if (GET_CODE (insn
) != BARRIER
3623 && (bb
= BLOCK_FOR_INSN (insn
)))
3626 bb
->flags
|= BB_DIRTY
;
3627 if (BB_HEAD (bb
) == insn
)
3629 /* Never ever delete the basic block note without deleting whole
3631 if (GET_CODE (insn
) == NOTE
)
3633 BB_HEAD (bb
) = next
;
3635 if (BB_END (bb
) == insn
)
3640 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3643 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3645 if (! call_insn
|| GET_CODE (call_insn
) != CALL_INSN
)
3648 /* Put the register usage information on the CALL. If there is already
3649 some usage information, put ours at the end. */
3650 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3654 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3655 link
= XEXP (link
, 1))
3658 XEXP (link
, 1) = call_fusage
;
3661 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3664 /* Delete all insns made since FROM.
3665 FROM becomes the new last instruction. */
3668 delete_insns_since (rtx from
)
3673 NEXT_INSN (from
) = 0;
3677 /* This function is deprecated, please use sequences instead.
3679 Move a consecutive bunch of insns to a different place in the chain.
3680 The insns to be moved are those between FROM and TO.
3681 They are moved to a new position after the insn AFTER.
3682 AFTER must not be FROM or TO or any insn in between.
3684 This function does not know about SEQUENCEs and hence should not be
3685 called after delay-slot filling has been done. */
3688 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3690 /* Splice this bunch out of where it is now. */
3691 if (PREV_INSN (from
))
3692 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3694 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3695 if (last_insn
== to
)
3696 last_insn
= PREV_INSN (from
);
3697 if (first_insn
== from
)
3698 first_insn
= NEXT_INSN (to
);
3700 /* Make the new neighbors point to it and it to them. */
3701 if (NEXT_INSN (after
))
3702 PREV_INSN (NEXT_INSN (after
)) = to
;
3704 NEXT_INSN (to
) = NEXT_INSN (after
);
3705 PREV_INSN (from
) = after
;
3706 NEXT_INSN (after
) = from
;
3707 if (after
== last_insn
)
3711 /* Same as function above, but take care to update BB boundaries. */
3713 reorder_insns (rtx from
, rtx to
, rtx after
)
3715 rtx prev
= PREV_INSN (from
);
3716 basic_block bb
, bb2
;
3718 reorder_insns_nobb (from
, to
, after
);
3720 if (GET_CODE (after
) != BARRIER
3721 && (bb
= BLOCK_FOR_INSN (after
)))
3724 bb
->flags
|= BB_DIRTY
;
3726 if (GET_CODE (from
) != BARRIER
3727 && (bb2
= BLOCK_FOR_INSN (from
)))
3729 if (BB_END (bb2
) == to
)
3730 BB_END (bb2
) = prev
;
3731 bb2
->flags
|= BB_DIRTY
;
3734 if (BB_END (bb
) == after
)
3737 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3738 set_block_for_insn (x
, bb
);
3742 /* Return the line note insn preceding INSN. */
3745 find_line_note (rtx insn
)
3747 if (no_line_numbers
)
3750 for (; insn
; insn
= PREV_INSN (insn
))
3751 if (GET_CODE (insn
) == NOTE
3752 && NOTE_LINE_NUMBER (insn
) >= 0)
3758 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3759 of the moved insns when debugging. This may insert a note between AFTER
3760 and FROM, and another one after TO. */
3763 reorder_insns_with_line_notes (rtx from
, rtx to
, rtx after
)
3765 rtx from_line
= find_line_note (from
);
3766 rtx after_line
= find_line_note (after
);
3768 reorder_insns (from
, to
, after
);
3770 if (from_line
== after_line
)
3774 emit_note_copy_after (from_line
, after
);
3776 emit_note_copy_after (after_line
, to
);
3779 /* Remove unnecessary notes from the instruction stream. */
3782 remove_unnecessary_notes (void)
3784 rtx block_stack
= NULL_RTX
;
3785 rtx eh_stack
= NULL_RTX
;
3790 /* We must not remove the first instruction in the function because
3791 the compiler depends on the first instruction being a note. */
3792 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3794 /* Remember what's next. */
3795 next
= NEXT_INSN (insn
);
3797 /* We're only interested in notes. */
3798 if (GET_CODE (insn
) != NOTE
)
3801 switch (NOTE_LINE_NUMBER (insn
))
3803 case NOTE_INSN_DELETED
:
3804 case NOTE_INSN_LOOP_END_TOP_COND
:
3808 case NOTE_INSN_EH_REGION_BEG
:
3809 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3812 case NOTE_INSN_EH_REGION_END
:
3813 /* Too many end notes. */
3814 if (eh_stack
== NULL_RTX
)
3816 /* Mismatched nesting. */
3817 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3820 eh_stack
= XEXP (eh_stack
, 1);
3821 free_INSN_LIST_node (tmp
);
3824 case NOTE_INSN_BLOCK_BEG
:
3825 /* By now, all notes indicating lexical blocks should have
3826 NOTE_BLOCK filled in. */
3827 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3829 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3832 case NOTE_INSN_BLOCK_END
:
3833 /* Too many end notes. */
3834 if (block_stack
== NULL_RTX
)
3836 /* Mismatched nesting. */
3837 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3840 block_stack
= XEXP (block_stack
, 1);
3841 free_INSN_LIST_node (tmp
);
3843 /* Scan back to see if there are any non-note instructions
3844 between INSN and the beginning of this block. If not,
3845 then there is no PC range in the generated code that will
3846 actually be in this block, so there's no point in
3847 remembering the existence of the block. */
3848 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3850 /* This block contains a real instruction. Note that we
3851 don't include labels; if the only thing in the block
3852 is a label, then there are still no PC values that
3853 lie within the block. */
3857 /* We're only interested in NOTEs. */
3858 if (GET_CODE (tmp
) != NOTE
)
3861 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3863 /* We just verified that this BLOCK matches us with
3864 the block_stack check above. Never delete the
3865 BLOCK for the outermost scope of the function; we
3866 can refer to names from that scope even if the
3867 block notes are messed up. */
3868 if (! is_body_block (NOTE_BLOCK (insn
))
3869 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3876 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3877 /* There's a nested block. We need to leave the
3878 current block in place since otherwise the debugger
3879 wouldn't be able to show symbols from our block in
3880 the nested block. */
3886 /* Too many begin notes. */
3887 if (block_stack
|| eh_stack
)
3892 /* Emit insn(s) of given code and pattern
3893 at a specified place within the doubly-linked list.
3895 All of the emit_foo global entry points accept an object
3896 X which is either an insn list or a PATTERN of a single
3899 There are thus a few canonical ways to generate code and
3900 emit it at a specific place in the instruction stream. For
3901 example, consider the instruction named SPOT and the fact that
3902 we would like to emit some instructions before SPOT. We might
3906 ... emit the new instructions ...
3907 insns_head = get_insns ();
3910 emit_insn_before (insns_head, SPOT);
3912 It used to be common to generate SEQUENCE rtl instead, but that
3913 is a relic of the past which no longer occurs. The reason is that
3914 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3915 generated would almost certainly die right after it was created. */
3917 /* Make X be output before the instruction BEFORE. */
3920 emit_insn_before (rtx x
, rtx before
)
3925 #ifdef ENABLE_RTL_CHECKING
3926 if (before
== NULL_RTX
)
3933 switch (GET_CODE (x
))
3944 rtx next
= NEXT_INSN (insn
);
3945 add_insn_before (insn
, before
);
3951 #ifdef ENABLE_RTL_CHECKING
3958 last
= make_insn_raw (x
);
3959 add_insn_before (last
, before
);
3966 /* Make an instruction with body X and code JUMP_INSN
3967 and output it before the instruction BEFORE. */
3970 emit_jump_insn_before (rtx x
, rtx before
)
3972 rtx insn
, last
= NULL_RTX
;
3974 #ifdef ENABLE_RTL_CHECKING
3975 if (before
== NULL_RTX
)
3979 switch (GET_CODE (x
))
3990 rtx next
= NEXT_INSN (insn
);
3991 add_insn_before (insn
, before
);
3997 #ifdef ENABLE_RTL_CHECKING
4004 last
= make_jump_insn_raw (x
);
4005 add_insn_before (last
, before
);
4012 /* Make an instruction with body X and code CALL_INSN
4013 and output it before the instruction BEFORE. */
4016 emit_call_insn_before (rtx x
, rtx before
)
4018 rtx last
= NULL_RTX
, insn
;
4020 #ifdef ENABLE_RTL_CHECKING
4021 if (before
== NULL_RTX
)
4025 switch (GET_CODE (x
))
4036 rtx next
= NEXT_INSN (insn
);
4037 add_insn_before (insn
, before
);
4043 #ifdef ENABLE_RTL_CHECKING
4050 last
= make_call_insn_raw (x
);
4051 add_insn_before (last
, before
);
4058 /* Make an insn of code BARRIER
4059 and output it before the insn BEFORE. */
4062 emit_barrier_before (rtx before
)
4064 rtx insn
= rtx_alloc (BARRIER
);
4066 INSN_UID (insn
) = cur_insn_uid
++;
4068 add_insn_before (insn
, before
);
4072 /* Emit the label LABEL before the insn BEFORE. */
4075 emit_label_before (rtx label
, rtx before
)
4077 /* This can be called twice for the same label as a result of the
4078 confusion that follows a syntax error! So make it harmless. */
4079 if (INSN_UID (label
) == 0)
4081 INSN_UID (label
) = cur_insn_uid
++;
4082 add_insn_before (label
, before
);
4088 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4091 emit_note_before (int subtype
, rtx before
)
4093 rtx note
= rtx_alloc (NOTE
);
4094 INSN_UID (note
) = cur_insn_uid
++;
4095 NOTE_SOURCE_FILE (note
) = 0;
4096 NOTE_LINE_NUMBER (note
) = subtype
;
4097 BLOCK_FOR_INSN (note
) = NULL
;
4099 add_insn_before (note
, before
);
4103 /* Helper for emit_insn_after, handles lists of instructions
4106 static rtx
emit_insn_after_1 (rtx
, rtx
);
4109 emit_insn_after_1 (rtx first
, rtx after
)
4115 if (GET_CODE (after
) != BARRIER
4116 && (bb
= BLOCK_FOR_INSN (after
)))
4118 bb
->flags
|= BB_DIRTY
;
4119 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4120 if (GET_CODE (last
) != BARRIER
)
4121 set_block_for_insn (last
, bb
);
4122 if (GET_CODE (last
) != BARRIER
)
4123 set_block_for_insn (last
, bb
);
4124 if (BB_END (bb
) == after
)
4128 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4131 after_after
= NEXT_INSN (after
);
4133 NEXT_INSN (after
) = first
;
4134 PREV_INSN (first
) = after
;
4135 NEXT_INSN (last
) = after_after
;
4137 PREV_INSN (after_after
) = last
;
4139 if (after
== last_insn
)
4144 /* Make X be output after the insn AFTER. */
4147 emit_insn_after (rtx x
, rtx after
)
4151 #ifdef ENABLE_RTL_CHECKING
4152 if (after
== NULL_RTX
)
4159 switch (GET_CODE (x
))
4167 last
= emit_insn_after_1 (x
, after
);
4170 #ifdef ENABLE_RTL_CHECKING
4177 last
= make_insn_raw (x
);
4178 add_insn_after (last
, after
);
4185 /* Similar to emit_insn_after, except that line notes are to be inserted so
4186 as to act as if this insn were at FROM. */
4189 emit_insn_after_with_line_notes (rtx x
, rtx after
, rtx from
)
4191 rtx from_line
= find_line_note (from
);
4192 rtx after_line
= find_line_note (after
);
4193 rtx insn
= emit_insn_after (x
, after
);
4196 emit_note_copy_after (from_line
, after
);
4199 emit_note_copy_after (after_line
, insn
);
4202 /* Make an insn of code JUMP_INSN with body X
4203 and output it after the insn AFTER. */
4206 emit_jump_insn_after (rtx x
, rtx after
)
4210 #ifdef ENABLE_RTL_CHECKING
4211 if (after
== NULL_RTX
)
4215 switch (GET_CODE (x
))
4223 last
= emit_insn_after_1 (x
, after
);
4226 #ifdef ENABLE_RTL_CHECKING
4233 last
= make_jump_insn_raw (x
);
4234 add_insn_after (last
, after
);
4241 /* Make an instruction with body X and code CALL_INSN
4242 and output it after the instruction AFTER. */
4245 emit_call_insn_after (rtx x
, rtx after
)
4249 #ifdef ENABLE_RTL_CHECKING
4250 if (after
== NULL_RTX
)
4254 switch (GET_CODE (x
))
4262 last
= emit_insn_after_1 (x
, after
);
4265 #ifdef ENABLE_RTL_CHECKING
4272 last
= make_call_insn_raw (x
);
4273 add_insn_after (last
, after
);
4280 /* Make an insn of code BARRIER
4281 and output it after the insn AFTER. */
4284 emit_barrier_after (rtx after
)
4286 rtx insn
= rtx_alloc (BARRIER
);
4288 INSN_UID (insn
) = cur_insn_uid
++;
4290 add_insn_after (insn
, after
);
4294 /* Emit the label LABEL after the insn AFTER. */
4297 emit_label_after (rtx label
, rtx after
)
4299 /* This can be called twice for the same label
4300 as a result of the confusion that follows a syntax error!
4301 So make it harmless. */
4302 if (INSN_UID (label
) == 0)
4304 INSN_UID (label
) = cur_insn_uid
++;
4305 add_insn_after (label
, after
);
4311 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4314 emit_note_after (int subtype
, rtx after
)
4316 rtx note
= rtx_alloc (NOTE
);
4317 INSN_UID (note
) = cur_insn_uid
++;
4318 NOTE_SOURCE_FILE (note
) = 0;
4319 NOTE_LINE_NUMBER (note
) = subtype
;
4320 BLOCK_FOR_INSN (note
) = NULL
;
4321 add_insn_after (note
, after
);
4325 /* Emit a copy of note ORIG after the insn AFTER. */
4328 emit_note_copy_after (rtx orig
, rtx after
)
4332 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4338 note
= rtx_alloc (NOTE
);
4339 INSN_UID (note
) = cur_insn_uid
++;
4340 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4341 NOTE_DATA (note
) = NOTE_DATA (orig
);
4342 BLOCK_FOR_INSN (note
) = NULL
;
4343 add_insn_after (note
, after
);
4347 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4349 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4351 rtx last
= emit_insn_after (pattern
, after
);
4353 if (pattern
== NULL_RTX
)
4356 after
= NEXT_INSN (after
);
4359 if (active_insn_p (after
))
4360 INSN_LOCATOR (after
) = loc
;
4363 after
= NEXT_INSN (after
);
4368 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4370 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4372 rtx last
= emit_jump_insn_after (pattern
, after
);
4374 if (pattern
== NULL_RTX
)
4377 after
= NEXT_INSN (after
);
4380 if (active_insn_p (after
))
4381 INSN_LOCATOR (after
) = loc
;
4384 after
= NEXT_INSN (after
);
4389 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4391 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4393 rtx last
= emit_call_insn_after (pattern
, after
);
4395 if (pattern
== NULL_RTX
)
4398 after
= NEXT_INSN (after
);
4401 if (active_insn_p (after
))
4402 INSN_LOCATOR (after
) = loc
;
4405 after
= NEXT_INSN (after
);
4410 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4412 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4414 rtx first
= PREV_INSN (before
);
4415 rtx last
= emit_insn_before (pattern
, before
);
4417 if (pattern
== NULL_RTX
)
4420 first
= NEXT_INSN (first
);
4423 if (active_insn_p (first
))
4424 INSN_LOCATOR (first
) = loc
;
4427 first
= NEXT_INSN (first
);
4432 /* Take X and emit it at the end of the doubly-linked
4435 Returns the last insn emitted. */
4440 rtx last
= last_insn
;
4446 switch (GET_CODE (x
))
4457 rtx next
= NEXT_INSN (insn
);
4464 #ifdef ENABLE_RTL_CHECKING
4471 last
= make_insn_raw (x
);
4479 /* Make an insn of code JUMP_INSN with pattern X
4480 and add it to the end of the doubly-linked list. */
4483 emit_jump_insn (rtx x
)
4485 rtx last
= NULL_RTX
, insn
;
4487 switch (GET_CODE (x
))
4498 rtx next
= NEXT_INSN (insn
);
4505 #ifdef ENABLE_RTL_CHECKING
4512 last
= make_jump_insn_raw (x
);
4520 /* Make an insn of code CALL_INSN with pattern X
4521 and add it to the end of the doubly-linked list. */
4524 emit_call_insn (rtx x
)
4528 switch (GET_CODE (x
))
4536 insn
= emit_insn (x
);
4539 #ifdef ENABLE_RTL_CHECKING
4546 insn
= make_call_insn_raw (x
);
4554 /* Add the label LABEL to the end of the doubly-linked list. */
4557 emit_label (rtx label
)
4559 /* This can be called twice for the same label
4560 as a result of the confusion that follows a syntax error!
4561 So make it harmless. */
4562 if (INSN_UID (label
) == 0)
4564 INSN_UID (label
) = cur_insn_uid
++;
4570 /* Make an insn of code BARRIER
4571 and add it to the end of the doubly-linked list. */
4576 rtx barrier
= rtx_alloc (BARRIER
);
4577 INSN_UID (barrier
) = cur_insn_uid
++;
4582 /* Make line numbering NOTE insn for LOCATION add it to the end
4583 of the doubly-linked list, but only if line-numbers are desired for
4584 debugging info and it doesn't match the previous one. */
4587 emit_line_note (location_t location
)
4591 set_file_and_line_for_stmt (location
);
4593 if (location
.file
&& last_location
.file
4594 && !strcmp (location
.file
, last_location
.file
)
4595 && location
.line
== last_location
.line
)
4597 last_location
= location
;
4599 if (no_line_numbers
)
4605 note
= emit_note (location
.line
);
4606 NOTE_SOURCE_FILE (note
) = location
.file
;
4611 /* Emit a copy of note ORIG. */
4614 emit_note_copy (rtx orig
)
4618 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4624 note
= rtx_alloc (NOTE
);
4626 INSN_UID (note
) = cur_insn_uid
++;
4627 NOTE_DATA (note
) = NOTE_DATA (orig
);
4628 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4629 BLOCK_FOR_INSN (note
) = NULL
;
4635 /* Make an insn of code NOTE or type NOTE_NO
4636 and add it to the end of the doubly-linked list. */
4639 emit_note (int note_no
)
4643 note
= rtx_alloc (NOTE
);
4644 INSN_UID (note
) = cur_insn_uid
++;
4645 NOTE_LINE_NUMBER (note
) = note_no
;
4646 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4647 BLOCK_FOR_INSN (note
) = NULL
;
4652 /* Cause next statement to emit a line note even if the line number
4656 force_next_line_note (void)
4658 last_location
.line
= -1;
4661 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4662 note of this type already exists, remove it first. */
4665 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4667 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4673 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4674 has multiple sets (some callers assume single_set
4675 means the insn only has one set, when in fact it
4676 means the insn only has one * useful * set). */
4677 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4684 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4685 It serves no useful purpose and breaks eliminate_regs. */
4686 if (GET_CODE (datum
) == ASM_OPERANDS
)
4696 XEXP (note
, 0) = datum
;
4700 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4701 return REG_NOTES (insn
);
4704 /* Return an indication of which type of insn should have X as a body.
4705 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4708 classify_insn (rtx x
)
4710 if (GET_CODE (x
) == CODE_LABEL
)
4712 if (GET_CODE (x
) == CALL
)
4714 if (GET_CODE (x
) == RETURN
)
4716 if (GET_CODE (x
) == SET
)
4718 if (SET_DEST (x
) == pc_rtx
)
4720 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4725 if (GET_CODE (x
) == PARALLEL
)
4728 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4729 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4731 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4732 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4734 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4735 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4741 /* Emit the rtl pattern X as an appropriate kind of insn.
4742 If X is a label, it is simply added into the insn chain. */
4747 enum rtx_code code
= classify_insn (x
);
4749 if (code
== CODE_LABEL
)
4750 return emit_label (x
);
4751 else if (code
== INSN
)
4752 return emit_insn (x
);
4753 else if (code
== JUMP_INSN
)
4755 rtx insn
= emit_jump_insn (x
);
4756 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4757 return emit_barrier ();
4760 else if (code
== CALL_INSN
)
4761 return emit_call_insn (x
);
4766 /* Space for free sequence stack entries. */
4767 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
4769 /* Begin emitting insns to a sequence which can be packaged in an
4770 RTL_EXPR. If this sequence will contain something that might cause
4771 the compiler to pop arguments to function calls (because those
4772 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4773 details), use do_pending_stack_adjust before calling this function.
4774 That will ensure that the deferred pops are not accidentally
4775 emitted in the middle of this sequence. */
4778 start_sequence (void)
4780 struct sequence_stack
*tem
;
4782 if (free_sequence_stack
!= NULL
)
4784 tem
= free_sequence_stack
;
4785 free_sequence_stack
= tem
->next
;
4788 tem
= ggc_alloc (sizeof (struct sequence_stack
));
4790 tem
->next
= seq_stack
;
4791 tem
->first
= first_insn
;
4792 tem
->last
= last_insn
;
4793 tem
->sequence_rtl_expr
= seq_rtl_expr
;
4801 /* Similarly, but indicate that this sequence will be placed in T, an
4802 RTL_EXPR. See the documentation for start_sequence for more
4803 information about how to use this function. */
4806 start_sequence_for_rtl_expr (tree t
)
4813 /* Set up the insn chain starting with FIRST as the current sequence,
4814 saving the previously current one. See the documentation for
4815 start_sequence for more information about how to use this function. */
4818 push_to_sequence (rtx first
)
4824 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4830 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4833 push_to_full_sequence (rtx first
, rtx last
)
4838 /* We really should have the end of the insn chain here. */
4839 if (last
&& NEXT_INSN (last
))
4843 /* Set up the outer-level insn chain
4844 as the current sequence, saving the previously current one. */
4847 push_topmost_sequence (void)
4849 struct sequence_stack
*stack
, *top
= NULL
;
4853 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4856 first_insn
= top
->first
;
4857 last_insn
= top
->last
;
4858 seq_rtl_expr
= top
->sequence_rtl_expr
;
4861 /* After emitting to the outer-level insn chain, update the outer-level
4862 insn chain, and restore the previous saved state. */
4865 pop_topmost_sequence (void)
4867 struct sequence_stack
*stack
, *top
= NULL
;
4869 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4872 top
->first
= first_insn
;
4873 top
->last
= last_insn
;
4874 /* ??? Why don't we save seq_rtl_expr here? */
4879 /* After emitting to a sequence, restore previous saved state.
4881 To get the contents of the sequence just made, you must call
4882 `get_insns' *before* calling here.
4884 If the compiler might have deferred popping arguments while
4885 generating this sequence, and this sequence will not be immediately
4886 inserted into the instruction stream, use do_pending_stack_adjust
4887 before calling get_insns. That will ensure that the deferred
4888 pops are inserted into this sequence, and not into some random
4889 location in the instruction stream. See INHIBIT_DEFER_POP for more
4890 information about deferred popping of arguments. */
4895 struct sequence_stack
*tem
= seq_stack
;
4897 first_insn
= tem
->first
;
4898 last_insn
= tem
->last
;
4899 seq_rtl_expr
= tem
->sequence_rtl_expr
;
4900 seq_stack
= tem
->next
;
4902 memset (tem
, 0, sizeof (*tem
));
4903 tem
->next
= free_sequence_stack
;
4904 free_sequence_stack
= tem
;
4907 /* This works like end_sequence, but records the old sequence in FIRST
4911 end_full_sequence (rtx
*first
, rtx
*last
)
4913 *first
= first_insn
;
4918 /* Return 1 if currently emitting into a sequence. */
4921 in_sequence_p (void)
4923 return seq_stack
!= 0;
4926 /* Put the various virtual registers into REGNO_REG_RTX. */
4929 init_virtual_regs (struct emit_status
*es
)
4931 rtx
*ptr
= es
->x_regno_reg_rtx
;
4932 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4933 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4934 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4935 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4936 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4940 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4941 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4942 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4943 static int copy_insn_n_scratches
;
4945 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4946 copied an ASM_OPERANDS.
4947 In that case, it is the original input-operand vector. */
4948 static rtvec orig_asm_operands_vector
;
4950 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4951 copied an ASM_OPERANDS.
4952 In that case, it is the copied input-operand vector. */
4953 static rtvec copy_asm_operands_vector
;
4955 /* Likewise for the constraints vector. */
4956 static rtvec orig_asm_constraints_vector
;
4957 static rtvec copy_asm_constraints_vector
;
4959 /* Recursively create a new copy of an rtx for copy_insn.
4960 This function differs from copy_rtx in that it handles SCRATCHes and
4961 ASM_OPERANDs properly.
4962 Normally, this function is not used directly; use copy_insn as front end.
4963 However, you could first copy an insn pattern with copy_insn and then use
4964 this function afterwards to properly copy any REG_NOTEs containing
4968 copy_insn_1 (rtx orig
)
4973 const char *format_ptr
;
4975 code
= GET_CODE (orig
);
4991 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
4996 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
4997 if (copy_insn_scratch_in
[i
] == orig
)
4998 return copy_insn_scratch_out
[i
];
5002 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5003 a LABEL_REF, it isn't sharable. */
5004 if (GET_CODE (XEXP (orig
, 0)) == PLUS
5005 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
5006 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
5010 /* A MEM with a constant address is not sharable. The problem is that
5011 the constant address may need to be reloaded. If the mem is shared,
5012 then reloading one copy of this mem will cause all copies to appear
5013 to have been reloaded. */
5019 copy
= rtx_alloc (code
);
5021 /* Copy the various flags, and other information. We assume that
5022 all fields need copying, and then clear the fields that should
5023 not be copied. That is the sensible default behavior, and forces
5024 us to explicitly document why we are *not* copying a flag. */
5025 memcpy (copy
, orig
, RTX_HDR_SIZE
);
5027 /* We do not copy the USED flag, which is used as a mark bit during
5028 walks over the RTL. */
5029 RTX_FLAG (copy
, used
) = 0;
5031 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5032 if (GET_RTX_CLASS (code
) == 'i')
5034 RTX_FLAG (copy
, jump
) = 0;
5035 RTX_FLAG (copy
, call
) = 0;
5036 RTX_FLAG (copy
, frame_related
) = 0;
5039 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5041 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5043 copy
->u
.fld
[i
] = orig
->u
.fld
[i
];
5044 switch (*format_ptr
++)
5047 if (XEXP (orig
, i
) != NULL
)
5048 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5053 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5054 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5055 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5056 XVEC (copy
, i
) = copy_asm_operands_vector
;
5057 else if (XVEC (orig
, i
) != NULL
)
5059 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5060 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5061 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5072 /* These are left unchanged. */
5080 if (code
== SCRATCH
)
5082 i
= copy_insn_n_scratches
++;
5083 if (i
>= MAX_RECOG_OPERANDS
)
5085 copy_insn_scratch_in
[i
] = orig
;
5086 copy_insn_scratch_out
[i
] = copy
;
5088 else if (code
== ASM_OPERANDS
)
5090 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5091 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5092 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5093 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5099 /* Create a new copy of an rtx.
5100 This function differs from copy_rtx in that it handles SCRATCHes and
5101 ASM_OPERANDs properly.
5102 INSN doesn't really have to be a full INSN; it could be just the
5105 copy_insn (rtx insn
)
5107 copy_insn_n_scratches
= 0;
5108 orig_asm_operands_vector
= 0;
5109 orig_asm_constraints_vector
= 0;
5110 copy_asm_operands_vector
= 0;
5111 copy_asm_constraints_vector
= 0;
5112 return copy_insn_1 (insn
);
5115 /* Initialize data structures and variables in this file
5116 before generating rtl for each function. */
5121 struct function
*f
= cfun
;
5123 f
->emit
= ggc_alloc (sizeof (struct emit_status
));
5126 seq_rtl_expr
= NULL
;
5128 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5129 last_location
.line
= 0;
5130 last_location
.file
= 0;
5131 first_label_num
= label_num
;
5135 /* Init the tables that describe all the pseudo regs. */
5137 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5139 f
->emit
->regno_pointer_align
5140 = ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5141 * sizeof (unsigned char));
5144 = ggc_alloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
));
5146 /* Put copies of all the hard registers into regno_reg_rtx. */
5147 memcpy (regno_reg_rtx
,
5148 static_regno_reg_rtx
,
5149 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5151 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5152 init_virtual_regs (f
->emit
);
5154 /* Indicate that the virtual registers and stack locations are
5156 REG_POINTER (stack_pointer_rtx
) = 1;
5157 REG_POINTER (frame_pointer_rtx
) = 1;
5158 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5159 REG_POINTER (arg_pointer_rtx
) = 1;
5161 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5162 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5163 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5164 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5165 REG_POINTER (virtual_cfa_rtx
) = 1;
5167 #ifdef STACK_BOUNDARY
5168 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5169 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5170 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5171 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5173 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5174 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5175 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5176 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5177 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5180 #ifdef INIT_EXPANDERS
5185 /* Generate the constant 0. */
5188 gen_const_vector_0 (enum machine_mode mode
)
5193 enum machine_mode inner
;
5195 units
= GET_MODE_NUNITS (mode
);
5196 inner
= GET_MODE_INNER (mode
);
5198 v
= rtvec_alloc (units
);
5200 /* We need to call this function after we to set CONST0_RTX first. */
5201 if (!CONST0_RTX (inner
))
5204 for (i
= 0; i
< units
; ++i
)
5205 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5207 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5211 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5212 all elements are zero. */
5214 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5216 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5219 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5220 if (RTVEC_ELT (v
, i
) != inner_zero
)
5221 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5222 return CONST0_RTX (mode
);
5225 /* Create some permanent unique rtl objects shared between all functions.
5226 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5229 init_emit_once (int line_numbers
)
5232 enum machine_mode mode
;
5233 enum machine_mode double_mode
;
5235 /* We need reg_raw_mode, so initialize the modes now. */
5236 init_reg_modes_once ();
5238 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5240 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5241 const_int_htab_eq
, NULL
);
5243 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5244 const_double_htab_eq
, NULL
);
5246 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5247 mem_attrs_htab_eq
, NULL
);
5248 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5249 reg_attrs_htab_eq
, NULL
);
5251 no_line_numbers
= ! line_numbers
;
5253 /* Compute the word and byte modes. */
5255 byte_mode
= VOIDmode
;
5256 word_mode
= VOIDmode
;
5257 double_mode
= VOIDmode
;
5259 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5260 mode
= GET_MODE_WIDER_MODE (mode
))
5262 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5263 && byte_mode
== VOIDmode
)
5266 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5267 && word_mode
== VOIDmode
)
5271 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5272 mode
= GET_MODE_WIDER_MODE (mode
))
5274 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5275 && double_mode
== VOIDmode
)
5279 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5281 /* Assign register numbers to the globally defined register rtx.
5282 This must be done at runtime because the register number field
5283 is in a union and some compilers can't initialize unions. */
5285 pc_rtx
= gen_rtx_PC (VOIDmode
);
5286 cc0_rtx
= gen_rtx_CC0 (VOIDmode
);
5287 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5288 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5289 if (hard_frame_pointer_rtx
== 0)
5290 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5291 HARD_FRAME_POINTER_REGNUM
);
5292 if (arg_pointer_rtx
== 0)
5293 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5294 virtual_incoming_args_rtx
=
5295 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5296 virtual_stack_vars_rtx
=
5297 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5298 virtual_stack_dynamic_rtx
=
5299 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5300 virtual_outgoing_args_rtx
=
5301 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5302 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5304 /* Initialize RTL for commonly used hard registers. These are
5305 copied into regno_reg_rtx as we begin to compile each function. */
5306 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5307 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5309 #ifdef INIT_EXPANDERS
5310 /* This is to initialize {init|mark|free}_machine_status before the first
5311 call to push_function_context_to. This is needed by the Chill front
5312 end which calls push_function_context_to before the first call to
5313 init_function_start. */
5317 /* Create the unique rtx's for certain rtx codes and operand values. */
5319 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5320 tries to use these variables. */
5321 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5322 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5323 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5325 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5326 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5327 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5329 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5331 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5332 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5333 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5334 REAL_VALUE_FROM_INT (dconst3
, 3, 0, double_mode
);
5335 REAL_VALUE_FROM_INT (dconst10
, 10, 0, double_mode
);
5336 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5337 REAL_VALUE_FROM_INT (dconstm2
, -2, -1, double_mode
);
5339 dconsthalf
= dconst1
;
5342 real_arithmetic (&dconstthird
, RDIV_EXPR
, &dconst1
, &dconst3
);
5344 /* Initialize mathematical constants for constant folding builtins.
5345 These constants need to be given to at least 160 bits precision. */
5346 real_from_string (&dconstpi
,
5347 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5348 real_from_string (&dconste
,
5349 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5351 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5353 REAL_VALUE_TYPE
*r
=
5354 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5356 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5357 mode
= GET_MODE_WIDER_MODE (mode
))
5358 const_tiny_rtx
[i
][(int) mode
] =
5359 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5361 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5363 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5364 mode
= GET_MODE_WIDER_MODE (mode
))
5365 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5367 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5369 mode
= GET_MODE_WIDER_MODE (mode
))
5370 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5373 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5375 mode
= GET_MODE_WIDER_MODE (mode
))
5376 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5378 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5380 mode
= GET_MODE_WIDER_MODE (mode
))
5381 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5383 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5384 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5385 const_tiny_rtx
[0][i
] = const0_rtx
;
5387 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5388 if (STORE_FLAG_VALUE
== 1)
5389 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5391 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5392 return_address_pointer_rtx
5393 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5396 #ifdef STATIC_CHAIN_REGNUM
5397 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5399 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5400 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5401 static_chain_incoming_rtx
5402 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5405 static_chain_incoming_rtx
= static_chain_rtx
;
5409 static_chain_rtx
= STATIC_CHAIN
;
5411 #ifdef STATIC_CHAIN_INCOMING
5412 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5414 static_chain_incoming_rtx
= static_chain_rtx
;
5418 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5419 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5422 /* Query and clear/ restore no_line_numbers. This is used by the
5423 switch / case handling in stmt.c to give proper line numbers in
5424 warnings about unreachable code. */
5427 force_line_numbers (void)
5429 int old
= no_line_numbers
;
5431 no_line_numbers
= 0;
5433 force_next_line_note ();
5438 restore_line_number_status (int old_value
)
5440 no_line_numbers
= old_value
;
5443 /* Produce exact duplicate of insn INSN after AFTER.
5444 Care updating of libcall regions if present. */
5447 emit_copy_of_insn_after (rtx insn
, rtx after
)
5450 rtx note1
, note2
, link
;
5452 switch (GET_CODE (insn
))
5455 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5459 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5463 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5464 if (CALL_INSN_FUNCTION_USAGE (insn
))
5465 CALL_INSN_FUNCTION_USAGE (new)
5466 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5467 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5468 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5475 /* Update LABEL_NUSES. */
5476 mark_jump_label (PATTERN (new), new, 0);
5478 INSN_LOCATOR (new) = INSN_LOCATOR (insn
);
5480 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5482 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5483 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5485 if (GET_CODE (link
) == EXPR_LIST
)
5487 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5492 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5497 /* Fix the libcall sequences. */
5498 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5501 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5503 XEXP (note1
, 0) = p
;
5504 XEXP (note2
, 0) = new;
5506 INSN_CODE (new) = INSN_CODE (insn
);
5510 static GTY((deletable(""))) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5512 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5514 if (hard_reg_clobbers
[mode
][regno
])
5515 return hard_reg_clobbers
[mode
][regno
];
5517 return (hard_reg_clobbers
[mode
][regno
] =
5518 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5521 #include "gt-emit-rtl.h"