1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
42 #include "basic-block.h"
47 #include "stringpool.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "langhooks.h"
63 struct target_rtl default_target_rtl
;
65 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
68 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
70 /* Commonly used modes. */
72 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
73 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
74 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
75 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
77 /* Datastructures maintained for currently processed function in RTL form. */
79 struct rtl_data x_rtl
;
81 /* Indexed by pseudo register number, gives the rtx for that pseudo.
82 Allocated in parallel with regno_pointer_align.
83 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
84 with length attribute nested in top level structures. */
88 /* This is *not* reset after each function. It gives each CODE_LABEL
89 in the entire compilation a unique label number. */
91 static GTY(()) int label_num
= 1;
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
96 is set only for MODE_INT and MODE_VECTOR_INT modes. */
98 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
102 REAL_VALUE_TYPE dconst0
;
103 REAL_VALUE_TYPE dconst1
;
104 REAL_VALUE_TYPE dconst2
;
105 REAL_VALUE_TYPE dconstm1
;
106 REAL_VALUE_TYPE dconsthalf
;
108 /* Record fixed-point constant 0 and 1. */
109 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
110 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
112 /* We make one copy of (const_int C) where C is in
113 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
114 to save space during the compilation and simplify comparisons of
117 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
119 /* Standard pieces of rtx, to be substituted directly into things. */
122 rtx simple_return_rtx
;
125 /* A hash table storing CONST_INTs whose absolute value is greater
126 than MAX_SAVED_CONST_INT. */
128 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
129 htab_t const_int_htab
;
131 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
132 htab_t const_wide_int_htab
;
134 /* A hash table storing register attribute structures. */
135 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
136 htab_t reg_attrs_htab
;
138 /* A hash table storing all CONST_DOUBLEs. */
139 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
140 htab_t const_double_htab
;
142 /* A hash table storing all CONST_FIXEDs. */
143 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
144 htab_t const_fixed_htab
;
146 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
147 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
148 #define first_label_num (crtl->emit.x_first_label_num)
150 static void set_used_decls (tree
);
151 static void mark_label_nuses (rtx
);
152 static hashval_t
const_int_htab_hash (const void *);
153 static int const_int_htab_eq (const void *, const void *);
154 #if TARGET_SUPPORTS_WIDE_INT
155 static hashval_t
const_wide_int_htab_hash (const void *);
156 static int const_wide_int_htab_eq (const void *, const void *);
157 static rtx
lookup_const_wide_int (rtx
);
159 static hashval_t
const_double_htab_hash (const void *);
160 static int const_double_htab_eq (const void *, const void *);
161 static rtx
lookup_const_double (rtx
);
162 static hashval_t
const_fixed_htab_hash (const void *);
163 static int const_fixed_htab_eq (const void *, const void *);
164 static rtx
lookup_const_fixed (rtx
);
165 static hashval_t
reg_attrs_htab_hash (const void *);
166 static int reg_attrs_htab_eq (const void *, const void *);
167 static reg_attrs
*get_reg_attrs (tree
, int);
168 static rtx
gen_const_vector (enum machine_mode
, int);
169 static void copy_rtx_if_shared_1 (rtx
*orig
);
171 /* Probability of the conditional branch currently proceeded by try_split.
172 Set to -1 otherwise. */
173 int split_branch_probability
= -1;
175 /* Returns a hash code for X (which is a really a CONST_INT). */
178 const_int_htab_hash (const void *x
)
180 return (hashval_t
) INTVAL ((const_rtx
) x
);
183 /* Returns nonzero if the value represented by X (which is really a
184 CONST_INT) is the same as that given by Y (which is really a
188 const_int_htab_eq (const void *x
, const void *y
)
190 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
193 #if TARGET_SUPPORTS_WIDE_INT
194 /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
197 const_wide_int_htab_hash (const void *x
)
200 HOST_WIDE_INT hash
= 0;
201 const_rtx xr
= (const_rtx
) x
;
203 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
204 hash
+= CONST_WIDE_INT_ELT (xr
, i
);
206 return (hashval_t
) hash
;
209 /* Returns nonzero if the value represented by X (which is really a
210 CONST_WIDE_INT) is the same as that given by Y (which is really a
214 const_wide_int_htab_eq (const void *x
, const void *y
)
217 const_rtx xr
= (const_rtx
) x
;
218 const_rtx yr
= (const_rtx
) y
;
219 if (CONST_WIDE_INT_NUNITS (xr
) != CONST_WIDE_INT_NUNITS (yr
))
222 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
223 if (CONST_WIDE_INT_ELT (xr
, i
) != CONST_WIDE_INT_ELT (yr
, i
))
230 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
232 const_double_htab_hash (const void *x
)
234 const_rtx
const value
= (const_rtx
) x
;
237 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (value
) == VOIDmode
)
238 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
241 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
242 /* MODE is used in the comparison, so it should be in the hash. */
243 h
^= GET_MODE (value
);
248 /* Returns nonzero if the value represented by X (really a ...)
249 is the same as that represented by Y (really a ...) */
251 const_double_htab_eq (const void *x
, const void *y
)
253 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
255 if (GET_MODE (a
) != GET_MODE (b
))
257 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (a
) == VOIDmode
)
258 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
259 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
261 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
262 CONST_DOUBLE_REAL_VALUE (b
));
265 /* Returns a hash code for X (which is really a CONST_FIXED). */
268 const_fixed_htab_hash (const void *x
)
270 const_rtx
const value
= (const_rtx
) x
;
273 h
= fixed_hash (CONST_FIXED_VALUE (value
));
274 /* MODE is used in the comparison, so it should be in the hash. */
275 h
^= GET_MODE (value
);
279 /* Returns nonzero if the value represented by X (really a ...)
280 is the same as that represented by Y (really a ...). */
283 const_fixed_htab_eq (const void *x
, const void *y
)
285 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
287 if (GET_MODE (a
) != GET_MODE (b
))
289 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
292 /* Return true if the given memory attributes are equal. */
295 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
301 return (p
->alias
== q
->alias
302 && p
->offset_known_p
== q
->offset_known_p
303 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
304 && p
->size_known_p
== q
->size_known_p
305 && (!p
->size_known_p
|| p
->size
== q
->size
)
306 && p
->align
== q
->align
307 && p
->addrspace
== q
->addrspace
308 && (p
->expr
== q
->expr
309 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
310 && operand_equal_p (p
->expr
, q
->expr
, 0))));
313 /* Set MEM's memory attributes so that they are the same as ATTRS. */
316 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
318 /* If everything is the default, we can just clear the attributes. */
319 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
326 || !mem_attrs_eq_p (attrs
, MEM_ATTRS (mem
)))
328 MEM_ATTRS (mem
) = ggc_alloc
<mem_attrs
> ();
329 memcpy (MEM_ATTRS (mem
), attrs
, sizeof (mem_attrs
));
333 /* Returns a hash code for X (which is a really a reg_attrs *). */
336 reg_attrs_htab_hash (const void *x
)
338 const reg_attrs
*const p
= (const reg_attrs
*) x
;
340 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
343 /* Returns nonzero if the value represented by X (which is really a
344 reg_attrs *) is the same as that given by Y (which is also really a
348 reg_attrs_htab_eq (const void *x
, const void *y
)
350 const reg_attrs
*const p
= (const reg_attrs
*) x
;
351 const reg_attrs
*const q
= (const reg_attrs
*) y
;
353 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
355 /* Allocate a new reg_attrs structure and insert it into the hash table if
356 one identical to it is not already in the table. We are doing this for
360 get_reg_attrs (tree decl
, int offset
)
365 /* If everything is the default, we can just return zero. */
366 if (decl
== 0 && offset
== 0)
370 attrs
.offset
= offset
;
372 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
375 *slot
= ggc_alloc
<reg_attrs
> ();
376 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
379 return (reg_attrs
*) *slot
;
384 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
385 and to block register equivalences to be seen across this insn. */
390 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
391 MEM_VOLATILE_P (x
) = true;
397 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
398 don't attempt to share with the various global pieces of rtl (such as
399 frame_pointer_rtx). */
402 gen_raw_REG (enum machine_mode mode
, int regno
)
404 rtx x
= gen_rtx_raw_REG (mode
, regno
);
405 ORIGINAL_REGNO (x
) = regno
;
409 /* There are some RTL codes that require special attention; the generation
410 functions do the raw handling. If you add to this list, modify
411 special_rtx in gengenrtl.c as well. */
414 gen_rtx_EXPR_LIST (enum machine_mode mode
, rtx expr
, rtx expr_list
)
416 return as_a
<rtx_expr_list
*> (gen_rtx_fmt_ee (EXPR_LIST
, mode
, expr
,
421 gen_rtx_INSN_LIST (enum machine_mode mode
, rtx insn
, rtx insn_list
)
423 return as_a
<rtx_insn_list
*> (gen_rtx_fmt_ue (INSN_LIST
, mode
, insn
,
428 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
432 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
433 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
435 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
436 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
437 return const_true_rtx
;
440 /* Look up the CONST_INT in the hash table. */
441 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
442 (hashval_t
) arg
, INSERT
);
444 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
450 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
452 return GEN_INT (trunc_int_for_mode (c
, mode
));
455 /* CONST_DOUBLEs might be created from pairs of integers, or from
456 REAL_VALUE_TYPEs. Also, their length is known only at run time,
457 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
459 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
460 hash table. If so, return its counterpart; otherwise add it
461 to the hash table and return it. */
463 lookup_const_double (rtx real
)
465 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
472 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
473 VALUE in mode MODE. */
475 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
477 rtx real
= rtx_alloc (CONST_DOUBLE
);
478 PUT_MODE (real
, mode
);
482 return lookup_const_double (real
);
485 /* Determine whether FIXED, a CONST_FIXED, already exists in the
486 hash table. If so, return its counterpart; otherwise add it
487 to the hash table and return it. */
490 lookup_const_fixed (rtx fixed
)
492 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
499 /* Return a CONST_FIXED rtx for a fixed-point value specified by
500 VALUE in mode MODE. */
503 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
505 rtx fixed
= rtx_alloc (CONST_FIXED
);
506 PUT_MODE (fixed
, mode
);
510 return lookup_const_fixed (fixed
);
513 #if TARGET_SUPPORTS_WIDE_INT == 0
514 /* Constructs double_int from rtx CST. */
517 rtx_to_double_int (const_rtx cst
)
521 if (CONST_INT_P (cst
))
522 r
= double_int::from_shwi (INTVAL (cst
));
523 else if (CONST_DOUBLE_AS_INT_P (cst
))
525 r
.low
= CONST_DOUBLE_LOW (cst
);
526 r
.high
= CONST_DOUBLE_HIGH (cst
);
535 #if TARGET_SUPPORTS_WIDE_INT
536 /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
537 If so, return its counterpart; otherwise add it to the hash table and
541 lookup_const_wide_int (rtx wint
)
543 void **slot
= htab_find_slot (const_wide_int_htab
, wint
, INSERT
);
551 /* Return an rtx constant for V, given that the constant has mode MODE.
552 The returned rtx will be a CONST_INT if V fits, otherwise it will be
553 a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
554 (if TARGET_SUPPORTS_WIDE_INT). */
557 immed_wide_int_const (const wide_int_ref
&v
, enum machine_mode mode
)
559 unsigned int len
= v
.get_len ();
560 unsigned int prec
= GET_MODE_PRECISION (mode
);
562 /* Allow truncation but not extension since we do not know if the
563 number is signed or unsigned. */
564 gcc_assert (prec
<= v
.get_precision ());
566 if (len
< 2 || prec
<= HOST_BITS_PER_WIDE_INT
)
567 return gen_int_mode (v
.elt (0), mode
);
569 #if TARGET_SUPPORTS_WIDE_INT
573 unsigned int blocks_needed
574 = (prec
+ HOST_BITS_PER_WIDE_INT
- 1) / HOST_BITS_PER_WIDE_INT
;
576 if (len
> blocks_needed
)
579 value
= const_wide_int_alloc (len
);
581 /* It is so tempting to just put the mode in here. Must control
583 PUT_MODE (value
, VOIDmode
);
584 CWI_PUT_NUM_ELEM (value
, len
);
586 for (i
= 0; i
< len
; i
++)
587 CONST_WIDE_INT_ELT (value
, i
) = v
.elt (i
);
589 return lookup_const_wide_int (value
);
592 return immed_double_const (v
.elt (0), v
.elt (1), mode
);
596 #if TARGET_SUPPORTS_WIDE_INT == 0
597 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
598 of ints: I0 is the low-order word and I1 is the high-order word.
599 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
600 implied upper bits are copies of the high bit of i1. The value
601 itself is neither signed nor unsigned. Do not use this routine for
602 non-integer modes; convert to REAL_VALUE_TYPE and use
603 CONST_DOUBLE_FROM_REAL_VALUE. */
606 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
611 /* There are the following cases (note that there are no modes with
612 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
614 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
616 2) If the value of the integer fits into HOST_WIDE_INT anyway
617 (i.e., i1 consists only from copies of the sign bit, and sign
618 of i0 and i1 are the same), then we return a CONST_INT for i0.
619 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
620 if (mode
!= VOIDmode
)
622 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
623 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
624 /* We can get a 0 for an error mark. */
625 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
626 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
628 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
629 return gen_int_mode (i0
, mode
);
632 /* If this integer fits in one word, return a CONST_INT. */
633 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
636 /* We use VOIDmode for integers. */
637 value
= rtx_alloc (CONST_DOUBLE
);
638 PUT_MODE (value
, VOIDmode
);
640 CONST_DOUBLE_LOW (value
) = i0
;
641 CONST_DOUBLE_HIGH (value
) = i1
;
643 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
644 XWINT (value
, i
) = 0;
646 return lookup_const_double (value
);
651 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
653 /* In case the MD file explicitly references the frame pointer, have
654 all such references point to the same frame pointer. This is
655 used during frame pointer elimination to distinguish the explicit
656 references to these registers from pseudos that happened to be
659 If we have eliminated the frame pointer or arg pointer, we will
660 be using it as a normal register, for example as a spill
661 register. In such cases, we might be accessing it in a mode that
662 is not Pmode and therefore cannot use the pre-allocated rtx.
664 Also don't do this when we are making new REGs in reload, since
665 we don't want to get confused with the real pointers. */
667 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
669 if (regno
== FRAME_POINTER_REGNUM
670 && (!reload_completed
|| frame_pointer_needed
))
671 return frame_pointer_rtx
;
672 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
673 if (regno
== HARD_FRAME_POINTER_REGNUM
674 && (!reload_completed
|| frame_pointer_needed
))
675 return hard_frame_pointer_rtx
;
677 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
678 if (regno
== ARG_POINTER_REGNUM
)
679 return arg_pointer_rtx
;
681 #ifdef RETURN_ADDRESS_POINTER_REGNUM
682 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
683 return return_address_pointer_rtx
;
685 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
686 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
687 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
688 return pic_offset_table_rtx
;
689 if (regno
== STACK_POINTER_REGNUM
)
690 return stack_pointer_rtx
;
694 /* If the per-function register table has been set up, try to re-use
695 an existing entry in that table to avoid useless generation of RTL.
697 This code is disabled for now until we can fix the various backends
698 which depend on having non-shared hard registers in some cases. Long
699 term we want to re-enable this code as it can significantly cut down
700 on the amount of useless RTL that gets generated.
702 We'll also need to fix some code that runs after reload that wants to
703 set ORIGINAL_REGNO. */
708 && regno
< FIRST_PSEUDO_REGISTER
709 && reg_raw_mode
[regno
] == mode
)
710 return regno_reg_rtx
[regno
];
713 return gen_raw_REG (mode
, regno
);
717 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
719 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
721 /* This field is not cleared by the mere allocation of the rtx, so
728 /* Generate a memory referring to non-trapping constant memory. */
731 gen_const_mem (enum machine_mode mode
, rtx addr
)
733 rtx mem
= gen_rtx_MEM (mode
, addr
);
734 MEM_READONLY_P (mem
) = 1;
735 MEM_NOTRAP_P (mem
) = 1;
739 /* Generate a MEM referring to fixed portions of the frame, e.g., register
743 gen_frame_mem (enum machine_mode mode
, rtx addr
)
745 rtx mem
= gen_rtx_MEM (mode
, addr
);
746 MEM_NOTRAP_P (mem
) = 1;
747 set_mem_alias_set (mem
, get_frame_alias_set ());
751 /* Generate a MEM referring to a temporary use of the stack, not part
752 of the fixed stack frame. For example, something which is pushed
753 by a target splitter. */
755 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
757 rtx mem
= gen_rtx_MEM (mode
, addr
);
758 MEM_NOTRAP_P (mem
) = 1;
759 if (!cfun
->calls_alloca
)
760 set_mem_alias_set (mem
, get_frame_alias_set ());
764 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
765 this construct would be valid, and false otherwise. */
768 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
769 const_rtx reg
, unsigned int offset
)
771 unsigned int isize
= GET_MODE_SIZE (imode
);
772 unsigned int osize
= GET_MODE_SIZE (omode
);
774 /* All subregs must be aligned. */
775 if (offset
% osize
!= 0)
778 /* The subreg offset cannot be outside the inner object. */
782 /* ??? This should not be here. Temporarily continue to allow word_mode
783 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
784 Generally, backends are doing something sketchy but it'll take time to
786 if (omode
== word_mode
)
788 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
789 is the culprit here, and not the backends. */
790 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
792 /* Allow component subregs of complex and vector. Though given the below
793 extraction rules, it's not always clear what that means. */
794 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
795 && GET_MODE_INNER (imode
) == omode
)
797 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
798 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
799 represent this. It's questionable if this ought to be represented at
800 all -- why can't this all be hidden in post-reload splitters that make
801 arbitrarily mode changes to the registers themselves. */
802 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
804 /* Subregs involving floating point modes are not allowed to
805 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
806 (subreg:SI (reg:DF) 0) isn't. */
807 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
809 if (! (isize
== osize
810 /* LRA can use subreg to store a floating point value in
811 an integer mode. Although the floating point and the
812 integer modes need the same number of hard registers,
813 the size of floating point mode can be less than the
814 integer mode. LRA also uses subregs for a register
815 should be used in different mode in on insn. */
820 /* Paradoxical subregs must have offset zero. */
824 /* This is a normal subreg. Verify that the offset is representable. */
826 /* For hard registers, we already have most of these rules collected in
827 subreg_offset_representable_p. */
828 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
830 unsigned int regno
= REGNO (reg
);
832 #ifdef CANNOT_CHANGE_MODE_CLASS
833 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
834 && GET_MODE_INNER (imode
) == omode
)
836 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
840 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
843 /* For pseudo registers, we want most of the same checks. Namely:
844 If the register no larger than a word, the subreg must be lowpart.
845 If the register is larger than a word, the subreg must be the lowpart
846 of a subword. A subreg does *not* perform arbitrary bit extraction.
847 Given that we've already checked mode/offset alignment, we only have
848 to check subword subregs here. */
849 if (osize
< UNITS_PER_WORD
850 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
852 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
853 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
854 if (offset
% UNITS_PER_WORD
!= low_off
)
861 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
863 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
864 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
867 /* Generate a SUBREG representing the least-significant part of REG if MODE
868 is smaller than mode of REG, otherwise paradoxical SUBREG. */
871 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
873 enum machine_mode inmode
;
875 inmode
= GET_MODE (reg
);
876 if (inmode
== VOIDmode
)
878 return gen_rtx_SUBREG (mode
, reg
,
879 subreg_lowpart_offset (mode
, inmode
));
883 gen_rtx_VAR_LOCATION (enum machine_mode mode
, tree decl
, rtx loc
,
884 enum var_init_status status
)
886 rtx x
= gen_rtx_fmt_te (VAR_LOCATION
, mode
, decl
, loc
);
887 PAT_VAR_LOCATION_STATUS (x
) = status
;
892 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
895 gen_rtvec (int n
, ...)
903 /* Don't allocate an empty rtvec... */
910 rt_val
= rtvec_alloc (n
);
912 for (i
= 0; i
< n
; i
++)
913 rt_val
->elem
[i
] = va_arg (p
, rtx
);
920 gen_rtvec_v (int n
, rtx
*argp
)
925 /* Don't allocate an empty rtvec... */
929 rt_val
= rtvec_alloc (n
);
931 for (i
= 0; i
< n
; i
++)
932 rt_val
->elem
[i
] = *argp
++;
938 gen_rtvec_v (int n
, rtx_insn
**argp
)
943 /* Don't allocate an empty rtvec... */
947 rt_val
= rtvec_alloc (n
);
949 for (i
= 0; i
< n
; i
++)
950 rt_val
->elem
[i
] = *argp
++;
956 /* Return the number of bytes between the start of an OUTER_MODE
957 in-memory value and the start of an INNER_MODE in-memory value,
958 given that the former is a lowpart of the latter. It may be a
959 paradoxical lowpart, in which case the offset will be negative
960 on big-endian targets. */
963 byte_lowpart_offset (enum machine_mode outer_mode
,
964 enum machine_mode inner_mode
)
966 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
967 return subreg_lowpart_offset (outer_mode
, inner_mode
);
969 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
972 /* Generate a REG rtx for a new pseudo register of mode MODE.
973 This pseudo is assigned the next sequential register number. */
976 gen_reg_rtx (enum machine_mode mode
)
979 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
981 gcc_assert (can_create_pseudo_p ());
983 /* If a virtual register with bigger mode alignment is generated,
984 increase stack alignment estimation because it might be spilled
986 if (SUPPORTS_STACK_ALIGNMENT
987 && crtl
->stack_alignment_estimated
< align
988 && !crtl
->stack_realign_processed
)
990 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
991 if (crtl
->stack_alignment_estimated
< min_align
)
992 crtl
->stack_alignment_estimated
= min_align
;
995 if (generating_concat_p
996 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
997 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
999 /* For complex modes, don't make a single pseudo.
1000 Instead, make a CONCAT of two pseudos.
1001 This allows noncontiguous allocation of the real and imaginary parts,
1002 which makes much better code. Besides, allocating DCmode
1003 pseudos overstrains reload on some machines like the 386. */
1004 rtx realpart
, imagpart
;
1005 enum machine_mode partmode
= GET_MODE_INNER (mode
);
1007 realpart
= gen_reg_rtx (partmode
);
1008 imagpart
= gen_reg_rtx (partmode
);
1009 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
1012 /* Do not call gen_reg_rtx with uninitialized crtl. */
1013 gcc_assert (crtl
->emit
.regno_pointer_align_length
);
1015 /* Make sure regno_pointer_align, and regno_reg_rtx are large
1016 enough to have an element for this pseudo reg number. */
1018 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
1020 int old_size
= crtl
->emit
.regno_pointer_align_length
;
1024 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
1025 memset (tmp
+ old_size
, 0, old_size
);
1026 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
1028 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
1029 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
1030 regno_reg_rtx
= new1
;
1032 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
1035 val
= gen_raw_REG (mode
, reg_rtx_no
);
1036 regno_reg_rtx
[reg_rtx_no
++] = val
;
1040 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1043 reg_is_parm_p (rtx reg
)
1047 gcc_assert (REG_P (reg
));
1048 decl
= REG_EXPR (reg
);
1049 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
1052 /* Update NEW with the same attributes as REG, but with OFFSET added
1053 to the REG_OFFSET. */
1056 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
1058 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
1059 REG_OFFSET (reg
) + offset
);
1062 /* Generate a register with same attributes as REG, but with OFFSET
1063 added to the REG_OFFSET. */
1066 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
1069 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
1071 update_reg_offset (new_rtx
, reg
, offset
);
1075 /* Generate a new pseudo-register with the same attributes as REG, but
1076 with OFFSET added to the REG_OFFSET. */
1079 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
1081 rtx new_rtx
= gen_reg_rtx (mode
);
1083 update_reg_offset (new_rtx
, reg
, offset
);
1087 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1088 new register is a (possibly paradoxical) lowpart of the old one. */
1091 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
1093 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
1094 PUT_MODE (reg
, mode
);
1097 /* Copy REG's attributes from X, if X has any attributes. If REG and X
1098 have different modes, REG is a (possibly paradoxical) lowpart of X. */
1101 set_reg_attrs_from_value (rtx reg
, rtx x
)
1104 bool can_be_reg_pointer
= true;
1106 /* Don't call mark_reg_pointer for incompatible pointer sign
1108 while (GET_CODE (x
) == SIGN_EXTEND
1109 || GET_CODE (x
) == ZERO_EXTEND
1110 || GET_CODE (x
) == TRUNCATE
1111 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
1113 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
1114 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
1115 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
1116 can_be_reg_pointer
= false;
1121 /* Hard registers can be reused for multiple purposes within the same
1122 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1123 on them is wrong. */
1124 if (HARD_REGISTER_P (reg
))
1127 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1130 if (MEM_OFFSET_KNOWN_P (x
))
1131 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1132 MEM_OFFSET (x
) + offset
);
1133 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1134 mark_reg_pointer (reg
, 0);
1139 update_reg_offset (reg
, x
, offset
);
1140 if (can_be_reg_pointer
&& REG_POINTER (x
))
1141 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1145 /* Generate a REG rtx for a new pseudo register, copying the mode
1146 and attributes from X. */
1149 gen_reg_rtx_and_attrs (rtx x
)
1151 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1152 set_reg_attrs_from_value (reg
, x
);
1156 /* Set the register attributes for registers contained in PARM_RTX.
1157 Use needed values from memory attributes of MEM. */
1160 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1162 if (REG_P (parm_rtx
))
1163 set_reg_attrs_from_value (parm_rtx
, mem
);
1164 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1166 /* Check for a NULL entry in the first slot, used to indicate that the
1167 parameter goes both on the stack and in registers. */
1168 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1169 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1171 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1172 if (REG_P (XEXP (x
, 0)))
1173 REG_ATTRS (XEXP (x
, 0))
1174 = get_reg_attrs (MEM_EXPR (mem
),
1175 INTVAL (XEXP (x
, 1)));
1180 /* Set the REG_ATTRS for registers in value X, given that X represents
1184 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1186 if (GET_CODE (x
) == SUBREG
)
1188 gcc_assert (subreg_lowpart_p (x
));
1193 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1195 if (GET_CODE (x
) == CONCAT
)
1197 if (REG_P (XEXP (x
, 0)))
1198 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1199 if (REG_P (XEXP (x
, 1)))
1200 REG_ATTRS (XEXP (x
, 1))
1201 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1203 if (GET_CODE (x
) == PARALLEL
)
1207 /* Check for a NULL entry, used to indicate that the parameter goes
1208 both on the stack and in registers. */
1209 if (XEXP (XVECEXP (x
, 0, 0), 0))
1214 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1216 rtx y
= XVECEXP (x
, 0, i
);
1217 if (REG_P (XEXP (y
, 0)))
1218 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1223 /* Assign the RTX X to declaration T. */
1226 set_decl_rtl (tree t
, rtx x
)
1228 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1230 set_reg_attrs_for_decl_rtl (t
, x
);
1233 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1234 if the ABI requires the parameter to be passed by reference. */
1237 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1239 DECL_INCOMING_RTL (t
) = x
;
1240 if (x
&& !by_reference_p
)
1241 set_reg_attrs_for_decl_rtl (t
, x
);
1244 /* Identify REG (which may be a CONCAT) as a user register. */
1247 mark_user_reg (rtx reg
)
1249 if (GET_CODE (reg
) == CONCAT
)
1251 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1252 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1256 gcc_assert (REG_P (reg
));
1257 REG_USERVAR_P (reg
) = 1;
1261 /* Identify REG as a probable pointer register and show its alignment
1262 as ALIGN, if nonzero. */
1265 mark_reg_pointer (rtx reg
, int align
)
1267 if (! REG_POINTER (reg
))
1269 REG_POINTER (reg
) = 1;
1272 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1274 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1275 /* We can no-longer be sure just how aligned this pointer is. */
1276 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1279 /* Return 1 plus largest pseudo reg number used in the current function. */
1287 /* Return 1 + the largest label number used so far in the current function. */
1290 max_label_num (void)
1295 /* Return first label number used in this function (if any were used). */
1298 get_first_label_num (void)
1300 return first_label_num
;
1303 /* If the rtx for label was created during the expansion of a nested
1304 function, then first_label_num won't include this label number.
1305 Fix this now so that array indices work later. */
1308 maybe_set_first_label_num (rtx x
)
1310 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1311 first_label_num
= CODE_LABEL_NUMBER (x
);
1314 /* Return a value representing some low-order bits of X, where the number
1315 of low-order bits is given by MODE. Note that no conversion is done
1316 between floating-point and fixed-point values, rather, the bit
1317 representation is returned.
1319 This function handles the cases in common between gen_lowpart, below,
1320 and two variants in cse.c and combine.c. These are the cases that can
1321 be safely handled at all points in the compilation.
1323 If this is not a case we can handle, return 0. */
1326 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1328 int msize
= GET_MODE_SIZE (mode
);
1331 enum machine_mode innermode
;
1333 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1334 so we have to make one up. Yuk. */
1335 innermode
= GET_MODE (x
);
1337 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1338 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1339 else if (innermode
== VOIDmode
)
1340 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1342 xsize
= GET_MODE_SIZE (innermode
);
1344 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1346 if (innermode
== mode
)
1349 /* MODE must occupy no more words than the mode of X. */
1350 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1351 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1354 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1355 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1358 offset
= subreg_lowpart_offset (mode
, innermode
);
1360 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1361 && (GET_MODE_CLASS (mode
) == MODE_INT
1362 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1364 /* If we are getting the low-order part of something that has been
1365 sign- or zero-extended, we can either just use the object being
1366 extended or make a narrower extension. If we want an even smaller
1367 piece than the size of the object being extended, call ourselves
1370 This case is used mostly by combine and cse. */
1372 if (GET_MODE (XEXP (x
, 0)) == mode
)
1374 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1375 return gen_lowpart_common (mode
, XEXP (x
, 0));
1376 else if (msize
< xsize
)
1377 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1379 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1380 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1381 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1382 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1384 /* Otherwise, we can't do this. */
1389 gen_highpart (enum machine_mode mode
, rtx x
)
1391 unsigned int msize
= GET_MODE_SIZE (mode
);
1394 /* This case loses if X is a subreg. To catch bugs early,
1395 complain if an invalid MODE is used even in other cases. */
1396 gcc_assert (msize
<= UNITS_PER_WORD
1397 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1399 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1400 subreg_highpart_offset (mode
, GET_MODE (x
)));
1401 gcc_assert (result
);
1403 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1404 the target if we have a MEM. gen_highpart must return a valid operand,
1405 emitting code if necessary to do so. */
1408 result
= validize_mem (result
);
1409 gcc_assert (result
);
1415 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1416 be VOIDmode constant. */
1418 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1420 if (GET_MODE (exp
) != VOIDmode
)
1422 gcc_assert (GET_MODE (exp
) == innermode
);
1423 return gen_highpart (outermode
, exp
);
1425 return simplify_gen_subreg (outermode
, exp
, innermode
,
1426 subreg_highpart_offset (outermode
, innermode
));
1429 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1432 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1434 unsigned int offset
= 0;
1435 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1439 if (WORDS_BIG_ENDIAN
)
1440 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1441 if (BYTES_BIG_ENDIAN
)
1442 offset
+= difference
% UNITS_PER_WORD
;
1448 /* Return offset in bytes to get OUTERMODE high part
1449 of the value in mode INNERMODE stored in memory in target format. */
1451 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1453 unsigned int offset
= 0;
1454 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1456 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1460 if (! WORDS_BIG_ENDIAN
)
1461 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1462 if (! BYTES_BIG_ENDIAN
)
1463 offset
+= difference
% UNITS_PER_WORD
;
1469 /* Return 1 iff X, assumed to be a SUBREG,
1470 refers to the least significant part of its containing reg.
1471 If X is not a SUBREG, always return 1 (it is its own low part!). */
1474 subreg_lowpart_p (const_rtx x
)
1476 if (GET_CODE (x
) != SUBREG
)
1478 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1481 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1482 == SUBREG_BYTE (x
));
1485 /* Return true if X is a paradoxical subreg, false otherwise. */
1487 paradoxical_subreg_p (const_rtx x
)
1489 if (GET_CODE (x
) != SUBREG
)
1491 return (GET_MODE_PRECISION (GET_MODE (x
))
1492 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1495 /* Return subword OFFSET of operand OP.
1496 The word number, OFFSET, is interpreted as the word number starting
1497 at the low-order address. OFFSET 0 is the low-order word if not
1498 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1500 If we cannot extract the required word, we return zero. Otherwise,
1501 an rtx corresponding to the requested word will be returned.
1503 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1504 reload has completed, a valid address will always be returned. After
1505 reload, if a valid address cannot be returned, we return zero.
1507 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1508 it is the responsibility of the caller.
1510 MODE is the mode of OP in case it is a CONST_INT.
1512 ??? This is still rather broken for some cases. The problem for the
1513 moment is that all callers of this thing provide no 'goal mode' to
1514 tell us to work with. This exists because all callers were written
1515 in a word based SUBREG world.
1516 Now use of this function can be deprecated by simplify_subreg in most
1521 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1523 if (mode
== VOIDmode
)
1524 mode
= GET_MODE (op
);
1526 gcc_assert (mode
!= VOIDmode
);
1528 /* If OP is narrower than a word, fail. */
1530 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1533 /* If we want a word outside OP, return zero. */
1535 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1538 /* Form a new MEM at the requested address. */
1541 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1543 if (! validate_address
)
1546 else if (reload_completed
)
1548 if (! strict_memory_address_addr_space_p (word_mode
,
1550 MEM_ADDR_SPACE (op
)))
1554 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1557 /* Rest can be handled by simplify_subreg. */
1558 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1561 /* Similar to `operand_subword', but never return 0. If we can't
1562 extract the required subword, put OP into a register and try again.
1563 The second attempt must succeed. We always validate the address in
1566 MODE is the mode of OP, in case it is CONST_INT. */
1569 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1571 rtx result
= operand_subword (op
, offset
, 1, mode
);
1576 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1578 /* If this is a register which can not be accessed by words, copy it
1579 to a pseudo register. */
1581 op
= copy_to_reg (op
);
1583 op
= force_reg (mode
, op
);
1586 result
= operand_subword (op
, offset
, 1, mode
);
1587 gcc_assert (result
);
1592 /* Returns 1 if both MEM_EXPR can be considered equal
1596 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1601 if (! expr1
|| ! expr2
)
1604 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1607 return operand_equal_p (expr1
, expr2
, 0);
1610 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1611 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1615 get_mem_align_offset (rtx mem
, unsigned int align
)
1618 unsigned HOST_WIDE_INT offset
;
1620 /* This function can't use
1621 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1622 || (MAX (MEM_ALIGN (mem),
1623 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1627 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1629 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1630 for <variable>. get_inner_reference doesn't handle it and
1631 even if it did, the alignment in that case needs to be determined
1632 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1633 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1634 isn't sufficiently aligned, the object it is in might be. */
1635 gcc_assert (MEM_P (mem
));
1636 expr
= MEM_EXPR (mem
);
1637 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1640 offset
= MEM_OFFSET (mem
);
1643 if (DECL_ALIGN (expr
) < align
)
1646 else if (INDIRECT_REF_P (expr
))
1648 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1651 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1655 tree inner
= TREE_OPERAND (expr
, 0);
1656 tree field
= TREE_OPERAND (expr
, 1);
1657 tree byte_offset
= component_ref_field_offset (expr
);
1658 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1661 || !tree_fits_uhwi_p (byte_offset
)
1662 || !tree_fits_uhwi_p (bit_offset
))
1665 offset
+= tree_to_uhwi (byte_offset
);
1666 offset
+= tree_to_uhwi (bit_offset
) / BITS_PER_UNIT
;
1668 if (inner
== NULL_TREE
)
1670 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1671 < (unsigned int) align
)
1675 else if (DECL_P (inner
))
1677 if (DECL_ALIGN (inner
) < align
)
1681 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1689 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1692 /* Given REF (a MEM) and T, either the type of X or the expression
1693 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1694 if we are making a new object of this type. BITPOS is nonzero if
1695 there is an offset outstanding on T that will be applied later. */
1698 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1699 HOST_WIDE_INT bitpos
)
1701 HOST_WIDE_INT apply_bitpos
= 0;
1703 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1706 /* It can happen that type_for_mode was given a mode for which there
1707 is no language-level type. In which case it returns NULL, which
1712 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1713 if (type
== error_mark_node
)
1716 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1717 wrong answer, as it assumes that DECL_RTL already has the right alias
1718 info. Callers should not set DECL_RTL until after the call to
1719 set_mem_attributes. */
1720 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1722 memset (&attrs
, 0, sizeof (attrs
));
1724 /* Get the alias set from the expression or type (perhaps using a
1725 front-end routine) and use it. */
1726 attrs
.alias
= get_alias_set (t
);
1728 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1729 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1731 /* Default values from pre-existing memory attributes if present. */
1732 refattrs
= MEM_ATTRS (ref
);
1735 /* ??? Can this ever happen? Calling this routine on a MEM that
1736 already carries memory attributes should probably be invalid. */
1737 attrs
.expr
= refattrs
->expr
;
1738 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1739 attrs
.offset
= refattrs
->offset
;
1740 attrs
.size_known_p
= refattrs
->size_known_p
;
1741 attrs
.size
= refattrs
->size
;
1742 attrs
.align
= refattrs
->align
;
1745 /* Otherwise, default values from the mode of the MEM reference. */
1748 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1749 gcc_assert (!defattrs
->expr
);
1750 gcc_assert (!defattrs
->offset_known_p
);
1752 /* Respect mode size. */
1753 attrs
.size_known_p
= defattrs
->size_known_p
;
1754 attrs
.size
= defattrs
->size
;
1755 /* ??? Is this really necessary? We probably should always get
1756 the size from the type below. */
1758 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1759 if T is an object, always compute the object alignment below. */
1761 attrs
.align
= defattrs
->align
;
1763 attrs
.align
= BITS_PER_UNIT
;
1764 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1765 e.g. if the type carries an alignment attribute. Should we be
1766 able to simply always use TYPE_ALIGN? */
1769 /* We can set the alignment from the type if we are making an object,
1770 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1771 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1772 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1774 /* If the size is known, we can set that. */
1775 tree new_size
= TYPE_SIZE_UNIT (type
);
1777 /* The address-space is that of the type. */
1778 as
= TYPE_ADDR_SPACE (type
);
1780 /* If T is not a type, we may be able to deduce some more information about
1786 if (TREE_THIS_VOLATILE (t
))
1787 MEM_VOLATILE_P (ref
) = 1;
1789 /* Now remove any conversions: they don't change what the underlying
1790 object is. Likewise for SAVE_EXPR. */
1791 while (CONVERT_EXPR_P (t
)
1792 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1793 || TREE_CODE (t
) == SAVE_EXPR
)
1794 t
= TREE_OPERAND (t
, 0);
1796 /* Note whether this expression can trap. */
1797 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1799 base
= get_base_address (t
);
1803 && TREE_READONLY (base
)
1804 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1805 && !TREE_THIS_VOLATILE (base
))
1806 MEM_READONLY_P (ref
) = 1;
1808 /* Mark static const strings readonly as well. */
1809 if (TREE_CODE (base
) == STRING_CST
1810 && TREE_READONLY (base
)
1811 && TREE_STATIC (base
))
1812 MEM_READONLY_P (ref
) = 1;
1814 /* Address-space information is on the base object. */
1815 if (TREE_CODE (base
) == MEM_REF
1816 || TREE_CODE (base
) == TARGET_MEM_REF
)
1817 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1820 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1823 /* If this expression uses it's parent's alias set, mark it such
1824 that we won't change it. */
1825 if (component_uses_parent_alias_set_from (t
) != NULL_TREE
)
1826 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1828 /* If this is a decl, set the attributes of the MEM from it. */
1832 attrs
.offset_known_p
= true;
1834 apply_bitpos
= bitpos
;
1835 new_size
= DECL_SIZE_UNIT (t
);
1838 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1839 else if (CONSTANT_CLASS_P (t
))
1842 /* If this is a field reference, record it. */
1843 else if (TREE_CODE (t
) == COMPONENT_REF
)
1846 attrs
.offset_known_p
= true;
1848 apply_bitpos
= bitpos
;
1849 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1850 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1853 /* If this is an array reference, look for an outer field reference. */
1854 else if (TREE_CODE (t
) == ARRAY_REF
)
1856 tree off_tree
= size_zero_node
;
1857 /* We can't modify t, because we use it at the end of the
1863 tree index
= TREE_OPERAND (t2
, 1);
1864 tree low_bound
= array_ref_low_bound (t2
);
1865 tree unit_size
= array_ref_element_size (t2
);
1867 /* We assume all arrays have sizes that are a multiple of a byte.
1868 First subtract the lower bound, if any, in the type of the
1869 index, then convert to sizetype and multiply by the size of
1870 the array element. */
1871 if (! integer_zerop (low_bound
))
1872 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1875 off_tree
= size_binop (PLUS_EXPR
,
1876 size_binop (MULT_EXPR
,
1877 fold_convert (sizetype
,
1881 t2
= TREE_OPERAND (t2
, 0);
1883 while (TREE_CODE (t2
) == ARRAY_REF
);
1886 || TREE_CODE (t2
) == COMPONENT_REF
)
1889 attrs
.offset_known_p
= false;
1890 if (tree_fits_uhwi_p (off_tree
))
1892 attrs
.offset_known_p
= true;
1893 attrs
.offset
= tree_to_uhwi (off_tree
);
1894 apply_bitpos
= bitpos
;
1897 /* Else do not record a MEM_EXPR. */
1900 /* If this is an indirect reference, record it. */
1901 else if (TREE_CODE (t
) == MEM_REF
1902 || TREE_CODE (t
) == TARGET_MEM_REF
)
1905 attrs
.offset_known_p
= true;
1907 apply_bitpos
= bitpos
;
1910 /* Compute the alignment. */
1911 unsigned int obj_align
;
1912 unsigned HOST_WIDE_INT obj_bitpos
;
1913 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1914 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1915 if (obj_bitpos
!= 0)
1916 obj_align
= (obj_bitpos
& -obj_bitpos
);
1917 attrs
.align
= MAX (attrs
.align
, obj_align
);
1920 if (tree_fits_uhwi_p (new_size
))
1922 attrs
.size_known_p
= true;
1923 attrs
.size
= tree_to_uhwi (new_size
);
1926 /* If we modified OFFSET based on T, then subtract the outstanding
1927 bit position offset. Similarly, increase the size of the accessed
1928 object to contain the negative offset. */
1931 gcc_assert (attrs
.offset_known_p
);
1932 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1933 if (attrs
.size_known_p
)
1934 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1937 /* Now set the attributes we computed above. */
1938 attrs
.addrspace
= as
;
1939 set_mem_attrs (ref
, &attrs
);
1943 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1945 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1948 /* Set the alias set of MEM to SET. */
1951 set_mem_alias_set (rtx mem
, alias_set_type set
)
1953 struct mem_attrs attrs
;
1955 /* If the new and old alias sets don't conflict, something is wrong. */
1956 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1957 attrs
= *get_mem_attrs (mem
);
1959 set_mem_attrs (mem
, &attrs
);
1962 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1965 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
1967 struct mem_attrs attrs
;
1969 attrs
= *get_mem_attrs (mem
);
1970 attrs
.addrspace
= addrspace
;
1971 set_mem_attrs (mem
, &attrs
);
1974 /* Set the alignment of MEM to ALIGN bits. */
1977 set_mem_align (rtx mem
, unsigned int align
)
1979 struct mem_attrs attrs
;
1981 attrs
= *get_mem_attrs (mem
);
1982 attrs
.align
= align
;
1983 set_mem_attrs (mem
, &attrs
);
1986 /* Set the expr for MEM to EXPR. */
1989 set_mem_expr (rtx mem
, tree expr
)
1991 struct mem_attrs attrs
;
1993 attrs
= *get_mem_attrs (mem
);
1995 set_mem_attrs (mem
, &attrs
);
1998 /* Set the offset of MEM to OFFSET. */
2001 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
2003 struct mem_attrs attrs
;
2005 attrs
= *get_mem_attrs (mem
);
2006 attrs
.offset_known_p
= true;
2007 attrs
.offset
= offset
;
2008 set_mem_attrs (mem
, &attrs
);
2011 /* Clear the offset of MEM. */
2014 clear_mem_offset (rtx mem
)
2016 struct mem_attrs attrs
;
2018 attrs
= *get_mem_attrs (mem
);
2019 attrs
.offset_known_p
= false;
2020 set_mem_attrs (mem
, &attrs
);
2023 /* Set the size of MEM to SIZE. */
2026 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
2028 struct mem_attrs attrs
;
2030 attrs
= *get_mem_attrs (mem
);
2031 attrs
.size_known_p
= true;
2033 set_mem_attrs (mem
, &attrs
);
2036 /* Clear the size of MEM. */
2039 clear_mem_size (rtx mem
)
2041 struct mem_attrs attrs
;
2043 attrs
= *get_mem_attrs (mem
);
2044 attrs
.size_known_p
= false;
2045 set_mem_attrs (mem
, &attrs
);
2048 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2049 and its address changed to ADDR. (VOIDmode means don't change the mode.
2050 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2051 returned memory location is required to be valid. INPLACE is true if any
2052 changes can be made directly to MEMREF or false if MEMREF must be treated
2055 The memory attributes are not changed. */
2058 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
,
2064 gcc_assert (MEM_P (memref
));
2065 as
= MEM_ADDR_SPACE (memref
);
2066 if (mode
== VOIDmode
)
2067 mode
= GET_MODE (memref
);
2069 addr
= XEXP (memref
, 0);
2070 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
2071 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2074 /* Don't validate address for LRA. LRA can make the address valid
2075 by itself in most efficient way. */
2076 if (validate
&& !lra_in_progress
)
2078 if (reload_in_progress
|| reload_completed
)
2079 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2081 addr
= memory_address_addr_space (mode
, addr
, as
);
2084 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2089 XEXP (memref
, 0) = addr
;
2093 new_rtx
= gen_rtx_MEM (mode
, addr
);
2094 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2098 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2099 way we are changing MEMREF, so we only preserve the alias set. */
2102 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
2104 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1, false);
2105 enum machine_mode mmode
= GET_MODE (new_rtx
);
2106 struct mem_attrs attrs
, *defattrs
;
2108 attrs
= *get_mem_attrs (memref
);
2109 defattrs
= mode_mem_attrs
[(int) mmode
];
2110 attrs
.expr
= NULL_TREE
;
2111 attrs
.offset_known_p
= false;
2112 attrs
.size_known_p
= defattrs
->size_known_p
;
2113 attrs
.size
= defattrs
->size
;
2114 attrs
.align
= defattrs
->align
;
2116 /* If there are no changes, just return the original memory reference. */
2117 if (new_rtx
== memref
)
2119 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2122 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2123 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2126 set_mem_attrs (new_rtx
, &attrs
);
2130 /* Return a memory reference like MEMREF, but with its mode changed
2131 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2132 nonzero, the memory address is forced to be valid.
2133 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2134 and the caller is responsible for adjusting MEMREF base register.
2135 If ADJUST_OBJECT is zero, the underlying object associated with the
2136 memory reference is left unchanged and the caller is responsible for
2137 dealing with it. Otherwise, if the new memory reference is outside
2138 the underlying object, even partially, then the object is dropped.
2139 SIZE, if nonzero, is the size of an access in cases where MODE
2140 has no inherent size. */
2143 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
2144 int validate
, int adjust_address
, int adjust_object
,
2147 rtx addr
= XEXP (memref
, 0);
2149 enum machine_mode address_mode
;
2151 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2152 unsigned HOST_WIDE_INT max_align
;
2153 #ifdef POINTERS_EXTEND_UNSIGNED
2154 enum machine_mode pointer_mode
2155 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2158 /* VOIDmode means no mode change for change_address_1. */
2159 if (mode
== VOIDmode
)
2160 mode
= GET_MODE (memref
);
2162 /* Take the size of non-BLKmode accesses from the mode. */
2163 defattrs
= mode_mem_attrs
[(int) mode
];
2164 if (defattrs
->size_known_p
)
2165 size
= defattrs
->size
;
2167 /* If there are no changes, just return the original memory reference. */
2168 if (mode
== GET_MODE (memref
) && !offset
2169 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2170 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2174 /* ??? Prefer to create garbage instead of creating shared rtl.
2175 This may happen even if offset is nonzero -- consider
2176 (plus (plus reg reg) const_int) -- so do this always. */
2177 addr
= copy_rtx (addr
);
2179 /* Convert a possibly large offset to a signed value within the
2180 range of the target address space. */
2181 address_mode
= get_address_mode (memref
);
2182 pbits
= GET_MODE_BITSIZE (address_mode
);
2183 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2185 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2186 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2192 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2193 object, we can merge it into the LO_SUM. */
2194 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2196 && (unsigned HOST_WIDE_INT
) offset
2197 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2198 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2199 plus_constant (address_mode
,
2200 XEXP (addr
, 1), offset
));
2201 #ifdef POINTERS_EXTEND_UNSIGNED
2202 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2203 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2204 the fact that pointers are not allowed to overflow. */
2205 else if (POINTERS_EXTEND_UNSIGNED
> 0
2206 && GET_CODE (addr
) == ZERO_EXTEND
2207 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2208 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2209 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2210 plus_constant (pointer_mode
,
2211 XEXP (addr
, 0), offset
));
2214 addr
= plus_constant (address_mode
, addr
, offset
);
2217 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
, false);
2219 /* If the address is a REG, change_address_1 rightfully returns memref,
2220 but this would destroy memref's MEM_ATTRS. */
2221 if (new_rtx
== memref
&& offset
!= 0)
2222 new_rtx
= copy_rtx (new_rtx
);
2224 /* Conservatively drop the object if we don't know where we start from. */
2225 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2227 attrs
.expr
= NULL_TREE
;
2231 /* Compute the new values of the memory attributes due to this adjustment.
2232 We add the offsets and update the alignment. */
2233 if (attrs
.offset_known_p
)
2235 attrs
.offset
+= offset
;
2237 /* Drop the object if the new left end is not within its bounds. */
2238 if (adjust_object
&& attrs
.offset
< 0)
2240 attrs
.expr
= NULL_TREE
;
2245 /* Compute the new alignment by taking the MIN of the alignment and the
2246 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2250 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2251 attrs
.align
= MIN (attrs
.align
, max_align
);
2256 /* Drop the object if the new right end is not within its bounds. */
2257 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2259 attrs
.expr
= NULL_TREE
;
2262 attrs
.size_known_p
= true;
2265 else if (attrs
.size_known_p
)
2267 gcc_assert (!adjust_object
);
2268 attrs
.size
-= offset
;
2269 /* ??? The store_by_pieces machinery generates negative sizes,
2270 so don't assert for that here. */
2273 set_mem_attrs (new_rtx
, &attrs
);
2278 /* Return a memory reference like MEMREF, but with its mode changed
2279 to MODE and its address changed to ADDR, which is assumed to be
2280 MEMREF offset by OFFSET bytes. If VALIDATE is
2281 nonzero, the memory address is forced to be valid. */
2284 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2285 HOST_WIDE_INT offset
, int validate
)
2287 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
, false);
2288 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2291 /* Return a memory reference like MEMREF, but whose address is changed by
2292 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2293 known to be in OFFSET (possibly 1). */
2296 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2298 rtx new_rtx
, addr
= XEXP (memref
, 0);
2299 enum machine_mode address_mode
;
2300 struct mem_attrs attrs
, *defattrs
;
2302 attrs
= *get_mem_attrs (memref
);
2303 address_mode
= get_address_mode (memref
);
2304 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2306 /* At this point we don't know _why_ the address is invalid. It
2307 could have secondary memory references, multiplies or anything.
2309 However, if we did go and rearrange things, we can wind up not
2310 being able to recognize the magic around pic_offset_table_rtx.
2311 This stuff is fragile, and is yet another example of why it is
2312 bad to expose PIC machinery too early. */
2313 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2315 && GET_CODE (addr
) == PLUS
2316 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2318 addr
= force_reg (GET_MODE (addr
), addr
);
2319 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2322 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2323 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1, false);
2325 /* If there are no changes, just return the original memory reference. */
2326 if (new_rtx
== memref
)
2329 /* Update the alignment to reflect the offset. Reset the offset, which
2331 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2332 attrs
.offset_known_p
= false;
2333 attrs
.size_known_p
= defattrs
->size_known_p
;
2334 attrs
.size
= defattrs
->size
;
2335 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2336 set_mem_attrs (new_rtx
, &attrs
);
2340 /* Return a memory reference like MEMREF, but with its address changed to
2341 ADDR. The caller is asserting that the actual piece of memory pointed
2342 to is the same, just the form of the address is being changed, such as
2343 by putting something into a register. INPLACE is true if any changes
2344 can be made directly to MEMREF or false if MEMREF must be treated as
2348 replace_equiv_address (rtx memref
, rtx addr
, bool inplace
)
2350 /* change_address_1 copies the memory attribute structure without change
2351 and that's exactly what we want here. */
2352 update_temp_slot_address (XEXP (memref
, 0), addr
);
2353 return change_address_1 (memref
, VOIDmode
, addr
, 1, inplace
);
2356 /* Likewise, but the reference is not required to be valid. */
2359 replace_equiv_address_nv (rtx memref
, rtx addr
, bool inplace
)
2361 return change_address_1 (memref
, VOIDmode
, addr
, 0, inplace
);
2364 /* Return a memory reference like MEMREF, but with its mode widened to
2365 MODE and offset by OFFSET. This would be used by targets that e.g.
2366 cannot issue QImode memory operations and have to use SImode memory
2367 operations plus masking logic. */
2370 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2372 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2373 struct mem_attrs attrs
;
2374 unsigned int size
= GET_MODE_SIZE (mode
);
2376 /* If there are no changes, just return the original memory reference. */
2377 if (new_rtx
== memref
)
2380 attrs
= *get_mem_attrs (new_rtx
);
2382 /* If we don't know what offset we were at within the expression, then
2383 we can't know if we've overstepped the bounds. */
2384 if (! attrs
.offset_known_p
)
2385 attrs
.expr
= NULL_TREE
;
2389 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2391 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2392 tree offset
= component_ref_field_offset (attrs
.expr
);
2394 if (! DECL_SIZE_UNIT (field
))
2396 attrs
.expr
= NULL_TREE
;
2400 /* Is the field at least as large as the access? If so, ok,
2401 otherwise strip back to the containing structure. */
2402 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2403 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2404 && attrs
.offset
>= 0)
2407 if (! tree_fits_uhwi_p (offset
))
2409 attrs
.expr
= NULL_TREE
;
2413 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2414 attrs
.offset
+= tree_to_uhwi (offset
);
2415 attrs
.offset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
2418 /* Similarly for the decl. */
2419 else if (DECL_P (attrs
.expr
)
2420 && DECL_SIZE_UNIT (attrs
.expr
)
2421 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2422 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2423 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2427 /* The widened memory access overflows the expression, which means
2428 that it could alias another expression. Zap it. */
2429 attrs
.expr
= NULL_TREE
;
2435 attrs
.offset_known_p
= false;
2437 /* The widened memory may alias other stuff, so zap the alias set. */
2438 /* ??? Maybe use get_alias_set on any remaining expression. */
2440 attrs
.size_known_p
= true;
2442 set_mem_attrs (new_rtx
, &attrs
);
2446 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2447 static GTY(()) tree spill_slot_decl
;
2450 get_spill_slot_decl (bool force_build_p
)
2452 tree d
= spill_slot_decl
;
2454 struct mem_attrs attrs
;
2456 if (d
|| !force_build_p
)
2459 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2460 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2461 DECL_ARTIFICIAL (d
) = 1;
2462 DECL_IGNORED_P (d
) = 1;
2464 spill_slot_decl
= d
;
2466 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2467 MEM_NOTRAP_P (rd
) = 1;
2468 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2469 attrs
.alias
= new_alias_set ();
2471 set_mem_attrs (rd
, &attrs
);
2472 SET_DECL_RTL (d
, rd
);
2477 /* Given MEM, a result from assign_stack_local, fill in the memory
2478 attributes as appropriate for a register allocator spill slot.
2479 These slots are not aliasable by other memory. We arrange for
2480 them all to use a single MEM_EXPR, so that the aliasing code can
2481 work properly in the case of shared spill slots. */
2484 set_mem_attrs_for_spill (rtx mem
)
2486 struct mem_attrs attrs
;
2489 attrs
= *get_mem_attrs (mem
);
2490 attrs
.expr
= get_spill_slot_decl (true);
2491 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2492 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2494 /* We expect the incoming memory to be of the form:
2495 (mem:MODE (plus (reg sfp) (const_int offset)))
2496 with perhaps the plus missing for offset = 0. */
2497 addr
= XEXP (mem
, 0);
2498 attrs
.offset_known_p
= true;
2500 if (GET_CODE (addr
) == PLUS
2501 && CONST_INT_P (XEXP (addr
, 1)))
2502 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2504 set_mem_attrs (mem
, &attrs
);
2505 MEM_NOTRAP_P (mem
) = 1;
2508 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2511 gen_label_rtx (void)
2513 return as_a
<rtx_code_label
*> (
2514 gen_rtx_CODE_LABEL (VOIDmode
, NULL_RTX
, NULL_RTX
,
2515 NULL
, label_num
++, NULL
));
2518 /* For procedure integration. */
2520 /* Install new pointers to the first and last insns in the chain.
2521 Also, set cur_insn_uid to one higher than the last in use.
2522 Used for an inline-procedure after copying the insn chain. */
2525 set_new_first_and_last_insn (rtx_insn
*first
, rtx_insn
*last
)
2529 set_first_insn (first
);
2530 set_last_insn (last
);
2533 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2535 int debug_count
= 0;
2537 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2538 cur_debug_insn_uid
= 0;
2540 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2541 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2542 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2545 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2546 if (DEBUG_INSN_P (insn
))
2551 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2553 cur_debug_insn_uid
++;
2556 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2557 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2562 /* Go through all the RTL insn bodies and copy any invalid shared
2563 structure. This routine should only be called once. */
2566 unshare_all_rtl_1 (rtx_insn
*insn
)
2568 /* Unshare just about everything else. */
2569 unshare_all_rtl_in_chain (insn
);
2571 /* Make sure the addresses of stack slots found outside the insn chain
2572 (such as, in DECL_RTL of a variable) are not shared
2573 with the insn chain.
2575 This special care is necessary when the stack slot MEM does not
2576 actually appear in the insn chain. If it does appear, its address
2577 is unshared from all else at that point. */
2578 stack_slot_list
= safe_as_a
<rtx_expr_list
*> (
2579 copy_rtx_if_shared (stack_slot_list
));
2582 /* Go through all the RTL insn bodies and copy any invalid shared
2583 structure, again. This is a fairly expensive thing to do so it
2584 should be done sparingly. */
2587 unshare_all_rtl_again (rtx_insn
*insn
)
2592 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2595 reset_used_flags (PATTERN (p
));
2596 reset_used_flags (REG_NOTES (p
));
2598 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2601 /* Make sure that virtual stack slots are not shared. */
2602 set_used_decls (DECL_INITIAL (cfun
->decl
));
2604 /* Make sure that virtual parameters are not shared. */
2605 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2606 set_used_flags (DECL_RTL (decl
));
2608 reset_used_flags (stack_slot_list
);
2610 unshare_all_rtl_1 (insn
);
2614 unshare_all_rtl (void)
2616 unshare_all_rtl_1 (get_insns ());
2621 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2622 Recursively does the same for subexpressions. */
2625 verify_rtx_sharing (rtx orig
, rtx insn
)
2630 const char *format_ptr
;
2635 code
= GET_CODE (x
);
2637 /* These types may be freely shared. */
2653 /* SCRATCH must be shared because they represent distinct values. */
2656 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2657 clobbers or clobbers of hard registers that originated as pseudos.
2658 This is needed to allow safe register renaming. */
2659 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2660 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2665 if (shared_const_p (orig
))
2670 /* A MEM is allowed to be shared if its address is constant. */
2671 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2672 || reload_completed
|| reload_in_progress
)
2681 /* This rtx may not be shared. If it has already been seen,
2682 replace it with a copy of itself. */
2683 #ifdef ENABLE_CHECKING
2684 if (RTX_FLAG (x
, used
))
2686 error ("invalid rtl sharing found in the insn");
2688 error ("shared rtx");
2690 internal_error ("internal consistency failure");
2693 gcc_assert (!RTX_FLAG (x
, used
));
2695 RTX_FLAG (x
, used
) = 1;
2697 /* Now scan the subexpressions recursively. */
2699 format_ptr
= GET_RTX_FORMAT (code
);
2701 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2703 switch (*format_ptr
++)
2706 verify_rtx_sharing (XEXP (x
, i
), insn
);
2710 if (XVEC (x
, i
) != NULL
)
2713 int len
= XVECLEN (x
, i
);
2715 for (j
= 0; j
< len
; j
++)
2717 /* We allow sharing of ASM_OPERANDS inside single
2719 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2720 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2722 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2724 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2733 /* Reset used-flags for INSN. */
2736 reset_insn_used_flags (rtx insn
)
2738 gcc_assert (INSN_P (insn
));
2739 reset_used_flags (PATTERN (insn
));
2740 reset_used_flags (REG_NOTES (insn
));
2742 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2745 /* Go through all the RTL insn bodies and clear all the USED bits. */
2748 reset_all_used_flags (void)
2752 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2755 rtx pat
= PATTERN (p
);
2756 if (GET_CODE (pat
) != SEQUENCE
)
2757 reset_insn_used_flags (p
);
2760 gcc_assert (REG_NOTES (p
) == NULL
);
2761 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2763 rtx insn
= XVECEXP (pat
, 0, i
);
2765 reset_insn_used_flags (insn
);
2771 /* Verify sharing in INSN. */
2774 verify_insn_sharing (rtx insn
)
2776 gcc_assert (INSN_P (insn
));
2777 reset_used_flags (PATTERN (insn
));
2778 reset_used_flags (REG_NOTES (insn
));
2780 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2783 /* Go through all the RTL insn bodies and check that there is no unexpected
2784 sharing in between the subexpressions. */
2787 verify_rtl_sharing (void)
2791 timevar_push (TV_VERIFY_RTL_SHARING
);
2793 reset_all_used_flags ();
2795 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2798 rtx pat
= PATTERN (p
);
2799 if (GET_CODE (pat
) != SEQUENCE
)
2800 verify_insn_sharing (p
);
2802 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2804 rtx insn
= XVECEXP (pat
, 0, i
);
2806 verify_insn_sharing (insn
);
2810 reset_all_used_flags ();
2812 timevar_pop (TV_VERIFY_RTL_SHARING
);
2815 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2816 Assumes the mark bits are cleared at entry. */
2819 unshare_all_rtl_in_chain (rtx_insn
*insn
)
2821 for (; insn
; insn
= NEXT_INSN (insn
))
2824 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2825 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2827 CALL_INSN_FUNCTION_USAGE (insn
)
2828 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2832 /* Go through all virtual stack slots of a function and mark them as
2833 shared. We never replace the DECL_RTLs themselves with a copy,
2834 but expressions mentioned into a DECL_RTL cannot be shared with
2835 expressions in the instruction stream.
2837 Note that reload may convert pseudo registers into memories in-place.
2838 Pseudo registers are always shared, but MEMs never are. Thus if we
2839 reset the used flags on MEMs in the instruction stream, we must set
2840 them again on MEMs that appear in DECL_RTLs. */
2843 set_used_decls (tree blk
)
2848 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2849 if (DECL_RTL_SET_P (t
))
2850 set_used_flags (DECL_RTL (t
));
2852 /* Now process sub-blocks. */
2853 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2857 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2858 Recursively does the same for subexpressions. Uses
2859 copy_rtx_if_shared_1 to reduce stack space. */
2862 copy_rtx_if_shared (rtx orig
)
2864 copy_rtx_if_shared_1 (&orig
);
2868 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2869 use. Recursively does the same for subexpressions. */
2872 copy_rtx_if_shared_1 (rtx
*orig1
)
2878 const char *format_ptr
;
2882 /* Repeat is used to turn tail-recursion into iteration. */
2889 code
= GET_CODE (x
);
2891 /* These types may be freely shared. */
2907 /* SCRATCH must be shared because they represent distinct values. */
2910 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2911 clobbers or clobbers of hard registers that originated as pseudos.
2912 This is needed to allow safe register renaming. */
2913 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2914 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2919 if (shared_const_p (x
))
2929 /* The chain of insns is not being copied. */
2936 /* This rtx may not be shared. If it has already been seen,
2937 replace it with a copy of itself. */
2939 if (RTX_FLAG (x
, used
))
2941 x
= shallow_copy_rtx (x
);
2944 RTX_FLAG (x
, used
) = 1;
2946 /* Now scan the subexpressions recursively.
2947 We can store any replaced subexpressions directly into X
2948 since we know X is not shared! Any vectors in X
2949 must be copied if X was copied. */
2951 format_ptr
= GET_RTX_FORMAT (code
);
2952 length
= GET_RTX_LENGTH (code
);
2955 for (i
= 0; i
< length
; i
++)
2957 switch (*format_ptr
++)
2961 copy_rtx_if_shared_1 (last_ptr
);
2962 last_ptr
= &XEXP (x
, i
);
2966 if (XVEC (x
, i
) != NULL
)
2969 int len
= XVECLEN (x
, i
);
2971 /* Copy the vector iff I copied the rtx and the length
2973 if (copied
&& len
> 0)
2974 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2976 /* Call recursively on all inside the vector. */
2977 for (j
= 0; j
< len
; j
++)
2980 copy_rtx_if_shared_1 (last_ptr
);
2981 last_ptr
= &XVECEXP (x
, i
, j
);
2996 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2999 mark_used_flags (rtx x
, int flag
)
3003 const char *format_ptr
;
3006 /* Repeat is used to turn tail-recursion into iteration. */
3011 code
= GET_CODE (x
);
3013 /* These types may be freely shared so we needn't do any resetting
3037 /* The chain of insns is not being copied. */
3044 RTX_FLAG (x
, used
) = flag
;
3046 format_ptr
= GET_RTX_FORMAT (code
);
3047 length
= GET_RTX_LENGTH (code
);
3049 for (i
= 0; i
< length
; i
++)
3051 switch (*format_ptr
++)
3059 mark_used_flags (XEXP (x
, i
), flag
);
3063 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3064 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
3070 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3071 to look for shared sub-parts. */
3074 reset_used_flags (rtx x
)
3076 mark_used_flags (x
, 0);
3079 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3080 to look for shared sub-parts. */
3083 set_used_flags (rtx x
)
3085 mark_used_flags (x
, 1);
3088 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3089 Return X or the rtx for the pseudo reg the value of X was copied into.
3090 OTHER must be valid as a SET_DEST. */
3093 make_safe_from (rtx x
, rtx other
)
3096 switch (GET_CODE (other
))
3099 other
= SUBREG_REG (other
);
3101 case STRICT_LOW_PART
:
3104 other
= XEXP (other
, 0);
3113 && GET_CODE (x
) != SUBREG
)
3115 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
3116 || reg_mentioned_p (other
, x
))))
3118 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3119 emit_move_insn (temp
, x
);
3125 /* Emission of insns (adding them to the doubly-linked list). */
3127 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3130 get_last_insn_anywhere (void)
3132 struct sequence_stack
*stack
;
3133 if (get_last_insn ())
3134 return get_last_insn ();
3135 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3136 if (stack
->last
!= 0)
3141 /* Return the first nonnote insn emitted in current sequence or current
3142 function. This routine looks inside SEQUENCEs. */
3145 get_first_nonnote_insn (void)
3147 rtx_insn
*insn
= get_insns ();
3152 for (insn
= next_insn (insn
);
3153 insn
&& NOTE_P (insn
);
3154 insn
= next_insn (insn
))
3158 if (NONJUMP_INSN_P (insn
)
3159 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3160 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3167 /* Return the last nonnote insn emitted in current sequence or current
3168 function. This routine looks inside SEQUENCEs. */
3171 get_last_nonnote_insn (void)
3173 rtx_insn
*insn
= get_last_insn ();
3178 for (insn
= previous_insn (insn
);
3179 insn
&& NOTE_P (insn
);
3180 insn
= previous_insn (insn
))
3184 if (NONJUMP_INSN_P (insn
))
3185 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
3186 insn
= seq
->insn (seq
->len () - 1);
3193 /* Return the number of actual (non-debug) insns emitted in this
3197 get_max_insn_count (void)
3199 int n
= cur_insn_uid
;
3201 /* The table size must be stable across -g, to avoid codegen
3202 differences due to debug insns, and not be affected by
3203 -fmin-insn-uid, to avoid excessive table size and to simplify
3204 debugging of -fcompare-debug failures. */
3205 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3206 n
-= cur_debug_insn_uid
;
3208 n
-= MIN_NONDEBUG_INSN_UID
;
3214 /* Return the next insn. If it is a SEQUENCE, return the first insn
3218 next_insn (rtx_insn
*insn
)
3222 insn
= NEXT_INSN (insn
);
3223 if (insn
&& NONJUMP_INSN_P (insn
)
3224 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3225 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3231 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3235 previous_insn (rtx_insn
*insn
)
3239 insn
= PREV_INSN (insn
);
3240 if (insn
&& NONJUMP_INSN_P (insn
))
3241 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
3242 insn
= seq
->insn (seq
->len () - 1);
3248 /* Return the next insn after INSN that is not a NOTE. This routine does not
3249 look inside SEQUENCEs. */
3252 next_nonnote_insn (rtx uncast_insn
)
3254 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3257 insn
= NEXT_INSN (insn
);
3258 if (insn
== 0 || !NOTE_P (insn
))
3265 /* Return the next insn after INSN that is not a NOTE, but stop the
3266 search before we enter another basic block. This routine does not
3267 look inside SEQUENCEs. */
3270 next_nonnote_insn_bb (rtx_insn
*insn
)
3274 insn
= NEXT_INSN (insn
);
3275 if (insn
== 0 || !NOTE_P (insn
))
3277 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3284 /* Return the previous insn before INSN that is not a NOTE. This routine does
3285 not look inside SEQUENCEs. */
3288 prev_nonnote_insn (rtx uncast_insn
)
3290 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3294 insn
= PREV_INSN (insn
);
3295 if (insn
== 0 || !NOTE_P (insn
))
3302 /* Return the previous insn before INSN that is not a NOTE, but stop
3303 the search before we enter another basic block. This routine does
3304 not look inside SEQUENCEs. */
3307 prev_nonnote_insn_bb (rtx uncast_insn
)
3309 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3313 insn
= PREV_INSN (insn
);
3314 if (insn
== 0 || !NOTE_P (insn
))
3316 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3323 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3324 routine does not look inside SEQUENCEs. */
3327 next_nondebug_insn (rtx uncast_insn
)
3329 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3333 insn
= NEXT_INSN (insn
);
3334 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3341 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3342 This routine does not look inside SEQUENCEs. */
3345 prev_nondebug_insn (rtx uncast_insn
)
3347 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3351 insn
= PREV_INSN (insn
);
3352 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3359 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3360 This routine does not look inside SEQUENCEs. */
3363 next_nonnote_nondebug_insn (rtx uncast_insn
)
3365 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3369 insn
= NEXT_INSN (insn
);
3370 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3377 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3378 This routine does not look inside SEQUENCEs. */
3381 prev_nonnote_nondebug_insn (rtx uncast_insn
)
3383 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3387 insn
= PREV_INSN (insn
);
3388 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3395 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3396 or 0, if there is none. This routine does not look inside
3400 next_real_insn (rtx uncast_insn
)
3402 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3406 insn
= NEXT_INSN (insn
);
3407 if (insn
== 0 || INSN_P (insn
))
3414 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3415 or 0, if there is none. This routine does not look inside
3419 prev_real_insn (rtx uncast_insn
)
3421 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3425 insn
= PREV_INSN (insn
);
3426 if (insn
== 0 || INSN_P (insn
))
3433 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3434 This routine does not look inside SEQUENCEs. */
3437 last_call_insn (void)
3441 for (insn
= get_last_insn ();
3442 insn
&& !CALL_P (insn
);
3443 insn
= PREV_INSN (insn
))
3446 return safe_as_a
<rtx_call_insn
*> (insn
);
3449 /* Find the next insn after INSN that really does something. This routine
3450 does not look inside SEQUENCEs. After reload this also skips over
3451 standalone USE and CLOBBER insn. */
3454 active_insn_p (const_rtx insn
)
3456 return (CALL_P (insn
) || JUMP_P (insn
)
3457 || JUMP_TABLE_DATA_P (insn
) /* FIXME */
3458 || (NONJUMP_INSN_P (insn
)
3459 && (! reload_completed
3460 || (GET_CODE (PATTERN (insn
)) != USE
3461 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3465 next_active_insn (rtx uncast_insn
)
3467 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3471 insn
= NEXT_INSN (insn
);
3472 if (insn
== 0 || active_insn_p (insn
))
3479 /* Find the last insn before INSN that really does something. This routine
3480 does not look inside SEQUENCEs. After reload this also skips over
3481 standalone USE and CLOBBER insn. */
3484 prev_active_insn (rtx uncast_insn
)
3486 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3490 insn
= PREV_INSN (insn
);
3491 if (insn
== 0 || active_insn_p (insn
))
3499 /* Return the next insn that uses CC0 after INSN, which is assumed to
3500 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3501 applied to the result of this function should yield INSN).
3503 Normally, this is simply the next insn. However, if a REG_CC_USER note
3504 is present, it contains the insn that uses CC0.
3506 Return 0 if we can't find the insn. */
3509 next_cc0_user (rtx uncast_insn
)
3511 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3513 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3516 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3518 insn
= next_nonnote_insn (insn
);
3519 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3520 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3522 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3528 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3529 note, it is the previous insn. */
3532 prev_cc0_setter (rtx uncast_insn
)
3534 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3536 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3539 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3541 insn
= prev_nonnote_insn (insn
);
3542 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3549 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3552 find_auto_inc (const_rtx x
, const_rtx reg
)
3554 subrtx_iterator::array_type array
;
3555 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
3557 const_rtx x
= *iter
;
3558 if (GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
3559 && rtx_equal_p (reg
, XEXP (x
, 0)))
3566 /* Increment the label uses for all labels present in rtx. */
3569 mark_label_nuses (rtx x
)
3575 code
= GET_CODE (x
);
3576 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3577 LABEL_NUSES (XEXP (x
, 0))++;
3579 fmt
= GET_RTX_FORMAT (code
);
3580 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3583 mark_label_nuses (XEXP (x
, i
));
3584 else if (fmt
[i
] == 'E')
3585 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3586 mark_label_nuses (XVECEXP (x
, i
, j
));
3591 /* Try splitting insns that can be split for better scheduling.
3592 PAT is the pattern which might split.
3593 TRIAL is the insn providing PAT.
3594 LAST is nonzero if we should return the last insn of the sequence produced.
3596 If this routine succeeds in splitting, it returns the first or last
3597 replacement insn depending on the value of LAST. Otherwise, it
3598 returns TRIAL. If the insn to be returned can be split, it will be. */
3601 try_split (rtx pat
, rtx uncast_trial
, int last
)
3603 rtx_insn
*trial
= as_a
<rtx_insn
*> (uncast_trial
);
3604 rtx_insn
*before
= PREV_INSN (trial
);
3605 rtx_insn
*after
= NEXT_INSN (trial
);
3606 int has_barrier
= 0;
3608 rtx_insn
*seq
, *tem
;
3610 rtx_insn
*insn_last
, *insn
;
3612 rtx call_insn
= NULL_RTX
;
3614 /* We're not good at redistributing frame information. */
3615 if (RTX_FRAME_RELATED_P (trial
))
3618 if (any_condjump_p (trial
)
3619 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3620 split_branch_probability
= XINT (note
, 0);
3621 probability
= split_branch_probability
;
3623 seq
= safe_as_a
<rtx_insn
*> (split_insns (pat
, trial
));
3625 split_branch_probability
= -1;
3627 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3628 We may need to handle this specially. */
3629 if (after
&& BARRIER_P (after
))
3632 after
= NEXT_INSN (after
);
3638 /* Avoid infinite loop if any insn of the result matches
3639 the original pattern. */
3643 if (INSN_P (insn_last
)
3644 && rtx_equal_p (PATTERN (insn_last
), pat
))
3646 if (!NEXT_INSN (insn_last
))
3648 insn_last
= NEXT_INSN (insn_last
);
3651 /* We will be adding the new sequence to the function. The splitters
3652 may have introduced invalid RTL sharing, so unshare the sequence now. */
3653 unshare_all_rtl_in_chain (seq
);
3655 /* Mark labels and copy flags. */
3656 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3661 CROSSING_JUMP_P (insn
) = CROSSING_JUMP_P (trial
);
3662 mark_jump_label (PATTERN (insn
), insn
, 0);
3664 if (probability
!= -1
3665 && any_condjump_p (insn
)
3666 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3668 /* We can preserve the REG_BR_PROB notes only if exactly
3669 one jump is created, otherwise the machine description
3670 is responsible for this step using
3671 split_branch_probability variable. */
3672 gcc_assert (njumps
== 1);
3673 add_int_reg_note (insn
, REG_BR_PROB
, probability
);
3678 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3679 in SEQ and copy any additional information across. */
3682 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3688 gcc_assert (call_insn
== NULL_RTX
);
3691 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3692 target may have explicitly specified. */
3693 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3696 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3698 /* If the old call was a sibling call, the new one must
3700 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3702 /* If the new call is the last instruction in the sequence,
3703 it will effectively replace the old call in-situ. Otherwise
3704 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3705 so that it comes immediately after the new call. */
3706 if (NEXT_INSN (insn
))
3707 for (next
= NEXT_INSN (trial
);
3708 next
&& NOTE_P (next
);
3709 next
= NEXT_INSN (next
))
3710 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3713 add_insn_after (next
, insn
, NULL
);
3719 /* Copy notes, particularly those related to the CFG. */
3720 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3722 switch (REG_NOTE_KIND (note
))
3725 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3731 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3734 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3738 case REG_NON_LOCAL_GOTO
:
3739 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3742 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3748 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3750 rtx reg
= XEXP (note
, 0);
3751 if (!FIND_REG_INC_NOTE (insn
, reg
)
3752 && find_auto_inc (PATTERN (insn
), reg
))
3753 add_reg_note (insn
, REG_INC
, reg
);
3759 fixup_args_size_notes (NULL
, insn_last
, INTVAL (XEXP (note
, 0)));
3763 gcc_assert (call_insn
!= NULL_RTX
);
3764 add_reg_note (call_insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3772 /* If there are LABELS inside the split insns increment the
3773 usage count so we don't delete the label. */
3777 while (insn
!= NULL_RTX
)
3779 /* JUMP_P insns have already been "marked" above. */
3780 if (NONJUMP_INSN_P (insn
))
3781 mark_label_nuses (PATTERN (insn
));
3783 insn
= PREV_INSN (insn
);
3787 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3789 delete_insn (trial
);
3791 emit_barrier_after (tem
);
3793 /* Recursively call try_split for each new insn created; by the
3794 time control returns here that insn will be fully split, so
3795 set LAST and continue from the insn after the one returned.
3796 We can't use next_active_insn here since AFTER may be a note.
3797 Ignore deleted insns, which can be occur if not optimizing. */
3798 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3799 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3800 tem
= try_split (PATTERN (tem
), tem
, 1);
3802 /* Return either the first or the last insn, depending on which was
3805 ? (after
? PREV_INSN (after
) : get_last_insn ())
3806 : NEXT_INSN (before
);
3809 /* Make and return an INSN rtx, initializing all its slots.
3810 Store PATTERN in the pattern slots. */
3813 make_insn_raw (rtx pattern
)
3817 insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
3819 INSN_UID (insn
) = cur_insn_uid
++;
3820 PATTERN (insn
) = pattern
;
3821 INSN_CODE (insn
) = -1;
3822 REG_NOTES (insn
) = NULL
;
3823 INSN_LOCATION (insn
) = curr_insn_location ();
3824 BLOCK_FOR_INSN (insn
) = NULL
;
3826 #ifdef ENABLE_RTL_CHECKING
3829 && (returnjump_p (insn
)
3830 || (GET_CODE (insn
) == SET
3831 && SET_DEST (insn
) == pc_rtx
)))
3833 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3841 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3844 make_debug_insn_raw (rtx pattern
)
3846 rtx_debug_insn
*insn
;
3848 insn
= as_a
<rtx_debug_insn
*> (rtx_alloc (DEBUG_INSN
));
3849 INSN_UID (insn
) = cur_debug_insn_uid
++;
3850 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3851 INSN_UID (insn
) = cur_insn_uid
++;
3853 PATTERN (insn
) = pattern
;
3854 INSN_CODE (insn
) = -1;
3855 REG_NOTES (insn
) = NULL
;
3856 INSN_LOCATION (insn
) = curr_insn_location ();
3857 BLOCK_FOR_INSN (insn
) = NULL
;
3862 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3865 make_jump_insn_raw (rtx pattern
)
3867 rtx_jump_insn
*insn
;
3869 insn
= as_a
<rtx_jump_insn
*> (rtx_alloc (JUMP_INSN
));
3870 INSN_UID (insn
) = cur_insn_uid
++;
3872 PATTERN (insn
) = pattern
;
3873 INSN_CODE (insn
) = -1;
3874 REG_NOTES (insn
) = NULL
;
3875 JUMP_LABEL (insn
) = NULL
;
3876 INSN_LOCATION (insn
) = curr_insn_location ();
3877 BLOCK_FOR_INSN (insn
) = NULL
;
3882 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3885 make_call_insn_raw (rtx pattern
)
3887 rtx_call_insn
*insn
;
3889 insn
= as_a
<rtx_call_insn
*> (rtx_alloc (CALL_INSN
));
3890 INSN_UID (insn
) = cur_insn_uid
++;
3892 PATTERN (insn
) = pattern
;
3893 INSN_CODE (insn
) = -1;
3894 REG_NOTES (insn
) = NULL
;
3895 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3896 INSN_LOCATION (insn
) = curr_insn_location ();
3897 BLOCK_FOR_INSN (insn
) = NULL
;
3902 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3905 make_note_raw (enum insn_note subtype
)
3907 /* Some notes are never created this way at all. These notes are
3908 only created by patching out insns. */
3909 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3910 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3912 rtx_note
*note
= as_a
<rtx_note
*> (rtx_alloc (NOTE
));
3913 INSN_UID (note
) = cur_insn_uid
++;
3914 NOTE_KIND (note
) = subtype
;
3915 BLOCK_FOR_INSN (note
) = NULL
;
3916 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3920 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3921 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3922 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3925 link_insn_into_chain (rtx_insn
*insn
, rtx_insn
*prev
, rtx_insn
*next
)
3927 SET_PREV_INSN (insn
) = prev
;
3928 SET_NEXT_INSN (insn
) = next
;
3931 SET_NEXT_INSN (prev
) = insn
;
3932 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3934 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (prev
));
3935 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = insn
;
3940 SET_PREV_INSN (next
) = insn
;
3941 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3943 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (next
));
3944 SET_PREV_INSN (sequence
->insn (0)) = insn
;
3948 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3950 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (insn
));
3951 SET_PREV_INSN (sequence
->insn (0)) = prev
;
3952 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = next
;
3956 /* Add INSN to the end of the doubly-linked list.
3957 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3960 add_insn (rtx_insn
*insn
)
3962 rtx_insn
*prev
= get_last_insn ();
3963 link_insn_into_chain (insn
, prev
, NULL
);
3964 if (NULL
== get_insns ())
3965 set_first_insn (insn
);
3966 set_last_insn (insn
);
3969 /* Add INSN into the doubly-linked list after insn AFTER. */
3972 add_insn_after_nobb (rtx_insn
*insn
, rtx_insn
*after
)
3974 rtx_insn
*next
= NEXT_INSN (after
);
3976 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3978 link_insn_into_chain (insn
, after
, next
);
3982 if (get_last_insn () == after
)
3983 set_last_insn (insn
);
3986 struct sequence_stack
*stack
= seq_stack
;
3987 /* Scan all pending sequences too. */
3988 for (; stack
; stack
= stack
->next
)
3989 if (after
== stack
->last
)
3998 /* Add INSN into the doubly-linked list before insn BEFORE. */
4001 add_insn_before_nobb (rtx_insn
*insn
, rtx_insn
*before
)
4003 rtx_insn
*prev
= PREV_INSN (before
);
4005 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
4007 link_insn_into_chain (insn
, prev
, before
);
4011 if (get_insns () == before
)
4012 set_first_insn (insn
);
4015 struct sequence_stack
*stack
= seq_stack
;
4016 /* Scan all pending sequences too. */
4017 for (; stack
; stack
= stack
->next
)
4018 if (before
== stack
->first
)
4020 stack
->first
= insn
;
4029 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
4030 If BB is NULL, an attempt is made to infer the bb from before.
4032 This and the next function should be the only functions called
4033 to insert an insn once delay slots have been filled since only
4034 they know how to update a SEQUENCE. */
4037 add_insn_after (rtx uncast_insn
, rtx uncast_after
, basic_block bb
)
4039 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4040 rtx_insn
*after
= as_a
<rtx_insn
*> (uncast_after
);
4041 add_insn_after_nobb (insn
, after
);
4042 if (!BARRIER_P (after
)
4043 && !BARRIER_P (insn
)
4044 && (bb
= BLOCK_FOR_INSN (after
)))
4046 set_block_for_insn (insn
, bb
);
4048 df_insn_rescan (insn
);
4049 /* Should not happen as first in the BB is always
4050 either NOTE or LABEL. */
4051 if (BB_END (bb
) == after
4052 /* Avoid clobbering of structure when creating new BB. */
4053 && !BARRIER_P (insn
)
4054 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
4059 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4060 If BB is NULL, an attempt is made to infer the bb from before.
4062 This and the previous function should be the only functions called
4063 to insert an insn once delay slots have been filled since only
4064 they know how to update a SEQUENCE. */
4067 add_insn_before (rtx uncast_insn
, rtx uncast_before
, basic_block bb
)
4069 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4070 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4071 add_insn_before_nobb (insn
, before
);
4074 && !BARRIER_P (before
)
4075 && !BARRIER_P (insn
))
4076 bb
= BLOCK_FOR_INSN (before
);
4080 set_block_for_insn (insn
, bb
);
4082 df_insn_rescan (insn
);
4083 /* Should not happen as first in the BB is always either NOTE or
4085 gcc_assert (BB_HEAD (bb
) != insn
4086 /* Avoid clobbering of structure when creating new BB. */
4088 || NOTE_INSN_BASIC_BLOCK_P (insn
));
4092 /* Replace insn with an deleted instruction note. */
4095 set_insn_deleted (rtx insn
)
4098 df_insn_delete (as_a
<rtx_insn
*> (insn
));
4099 PUT_CODE (insn
, NOTE
);
4100 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
4104 /* Unlink INSN from the insn chain.
4106 This function knows how to handle sequences.
4108 This function does not invalidate data flow information associated with
4109 INSN (i.e. does not call df_insn_delete). That makes this function
4110 usable for only disconnecting an insn from the chain, and re-emit it
4113 To later insert INSN elsewhere in the insn chain via add_insn and
4114 similar functions, PREV_INSN and NEXT_INSN must be nullified by
4115 the caller. Nullifying them here breaks many insn chain walks.
4117 To really delete an insn and related DF information, use delete_insn. */
4120 remove_insn (rtx uncast_insn
)
4122 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4123 rtx_insn
*next
= NEXT_INSN (insn
);
4124 rtx_insn
*prev
= PREV_INSN (insn
);
4129 SET_NEXT_INSN (prev
) = next
;
4130 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
4132 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (prev
));
4133 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = next
;
4136 else if (get_insns () == insn
)
4139 SET_PREV_INSN (next
) = NULL
;
4140 set_first_insn (next
);
4144 struct sequence_stack
*stack
= seq_stack
;
4145 /* Scan all pending sequences too. */
4146 for (; stack
; stack
= stack
->next
)
4147 if (insn
== stack
->first
)
4149 stack
->first
= next
;
4158 SET_PREV_INSN (next
) = prev
;
4159 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
4161 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (next
));
4162 SET_PREV_INSN (sequence
->insn (0)) = prev
;
4165 else if (get_last_insn () == insn
)
4166 set_last_insn (prev
);
4169 struct sequence_stack
*stack
= seq_stack
;
4170 /* Scan all pending sequences too. */
4171 for (; stack
; stack
= stack
->next
)
4172 if (insn
== stack
->last
)
4181 /* Fix up basic block boundaries, if necessary. */
4182 if (!BARRIER_P (insn
)
4183 && (bb
= BLOCK_FOR_INSN (insn
)))
4185 if (BB_HEAD (bb
) == insn
)
4187 /* Never ever delete the basic block note without deleting whole
4189 gcc_assert (!NOTE_P (insn
));
4190 BB_HEAD (bb
) = next
;
4192 if (BB_END (bb
) == insn
)
4197 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4200 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4202 gcc_assert (call_insn
&& CALL_P (call_insn
));
4204 /* Put the register usage information on the CALL. If there is already
4205 some usage information, put ours at the end. */
4206 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4210 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4211 link
= XEXP (link
, 1))
4214 XEXP (link
, 1) = call_fusage
;
4217 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4220 /* Delete all insns made since FROM.
4221 FROM becomes the new last instruction. */
4224 delete_insns_since (rtx_insn
*from
)
4229 SET_NEXT_INSN (from
) = 0;
4230 set_last_insn (from
);
4233 /* This function is deprecated, please use sequences instead.
4235 Move a consecutive bunch of insns to a different place in the chain.
4236 The insns to be moved are those between FROM and TO.
4237 They are moved to a new position after the insn AFTER.
4238 AFTER must not be FROM or TO or any insn in between.
4240 This function does not know about SEQUENCEs and hence should not be
4241 called after delay-slot filling has been done. */
4244 reorder_insns_nobb (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4246 #ifdef ENABLE_CHECKING
4248 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4249 gcc_assert (after
!= x
);
4250 gcc_assert (after
!= to
);
4253 /* Splice this bunch out of where it is now. */
4254 if (PREV_INSN (from
))
4255 SET_NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4257 SET_PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4258 if (get_last_insn () == to
)
4259 set_last_insn (PREV_INSN (from
));
4260 if (get_insns () == from
)
4261 set_first_insn (NEXT_INSN (to
));
4263 /* Make the new neighbors point to it and it to them. */
4264 if (NEXT_INSN (after
))
4265 SET_PREV_INSN (NEXT_INSN (after
)) = to
;
4267 SET_NEXT_INSN (to
) = NEXT_INSN (after
);
4268 SET_PREV_INSN (from
) = after
;
4269 SET_NEXT_INSN (after
) = from
;
4270 if (after
== get_last_insn ())
4274 /* Same as function above, but take care to update BB boundaries. */
4276 reorder_insns (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4278 rtx_insn
*prev
= PREV_INSN (from
);
4279 basic_block bb
, bb2
;
4281 reorder_insns_nobb (from
, to
, after
);
4283 if (!BARRIER_P (after
)
4284 && (bb
= BLOCK_FOR_INSN (after
)))
4287 df_set_bb_dirty (bb
);
4289 if (!BARRIER_P (from
)
4290 && (bb2
= BLOCK_FOR_INSN (from
)))
4292 if (BB_END (bb2
) == to
)
4293 BB_END (bb2
) = prev
;
4294 df_set_bb_dirty (bb2
);
4297 if (BB_END (bb
) == after
)
4300 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4302 df_insn_change_bb (x
, bb
);
4307 /* Emit insn(s) of given code and pattern
4308 at a specified place within the doubly-linked list.
4310 All of the emit_foo global entry points accept an object
4311 X which is either an insn list or a PATTERN of a single
4314 There are thus a few canonical ways to generate code and
4315 emit it at a specific place in the instruction stream. For
4316 example, consider the instruction named SPOT and the fact that
4317 we would like to emit some instructions before SPOT. We might
4321 ... emit the new instructions ...
4322 insns_head = get_insns ();
4325 emit_insn_before (insns_head, SPOT);
4327 It used to be common to generate SEQUENCE rtl instead, but that
4328 is a relic of the past which no longer occurs. The reason is that
4329 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4330 generated would almost certainly die right after it was created. */
4333 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4334 rtx_insn
*(*make_raw
) (rtx
))
4338 gcc_assert (before
);
4341 return safe_as_a
<rtx_insn
*> (last
);
4343 switch (GET_CODE (x
))
4352 insn
= as_a
<rtx_insn
*> (x
);
4355 rtx_insn
*next
= NEXT_INSN (insn
);
4356 add_insn_before (insn
, before
, bb
);
4362 #ifdef ENABLE_RTL_CHECKING
4369 last
= (*make_raw
) (x
);
4370 add_insn_before (last
, before
, bb
);
4374 return safe_as_a
<rtx_insn
*> (last
);
4377 /* Make X be output before the instruction BEFORE. */
4380 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
4382 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4385 /* Make an instruction with body X and code JUMP_INSN
4386 and output it before the instruction BEFORE. */
4389 emit_jump_insn_before_noloc (rtx x
, rtx before
)
4391 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4392 make_jump_insn_raw
);
4395 /* Make an instruction with body X and code CALL_INSN
4396 and output it before the instruction BEFORE. */
4399 emit_call_insn_before_noloc (rtx x
, rtx before
)
4401 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4402 make_call_insn_raw
);
4405 /* Make an instruction with body X and code DEBUG_INSN
4406 and output it before the instruction BEFORE. */
4409 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4411 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4412 make_debug_insn_raw
);
4415 /* Make an insn of code BARRIER
4416 and output it before the insn BEFORE. */
4419 emit_barrier_before (rtx before
)
4421 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4423 INSN_UID (insn
) = cur_insn_uid
++;
4425 add_insn_before (insn
, before
, NULL
);
4429 /* Emit the label LABEL before the insn BEFORE. */
4432 emit_label_before (rtx label
, rtx before
)
4434 gcc_checking_assert (INSN_UID (label
) == 0);
4435 INSN_UID (label
) = cur_insn_uid
++;
4436 add_insn_before (label
, before
, NULL
);
4437 return as_a
<rtx_insn
*> (label
);
4440 /* Helper for emit_insn_after, handles lists of instructions
4444 emit_insn_after_1 (rtx_insn
*first
, rtx uncast_after
, basic_block bb
)
4446 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4448 rtx_insn
*after_after
;
4449 if (!bb
&& !BARRIER_P (after
))
4450 bb
= BLOCK_FOR_INSN (after
);
4454 df_set_bb_dirty (bb
);
4455 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4456 if (!BARRIER_P (last
))
4458 set_block_for_insn (last
, bb
);
4459 df_insn_rescan (last
);
4461 if (!BARRIER_P (last
))
4463 set_block_for_insn (last
, bb
);
4464 df_insn_rescan (last
);
4466 if (BB_END (bb
) == after
)
4470 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4473 after_after
= NEXT_INSN (after
);
4475 SET_NEXT_INSN (after
) = first
;
4476 SET_PREV_INSN (first
) = after
;
4477 SET_NEXT_INSN (last
) = after_after
;
4479 SET_PREV_INSN (after_after
) = last
;
4481 if (after
== get_last_insn ())
4482 set_last_insn (last
);
4488 emit_pattern_after_noloc (rtx x
, rtx uncast_after
, basic_block bb
,
4489 rtx_insn
*(*make_raw
)(rtx
))
4491 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4492 rtx_insn
*last
= after
;
4499 switch (GET_CODE (x
))
4508 last
= emit_insn_after_1 (as_a
<rtx_insn
*> (x
), after
, bb
);
4511 #ifdef ENABLE_RTL_CHECKING
4518 last
= (*make_raw
) (x
);
4519 add_insn_after (last
, after
, bb
);
4526 /* Make X be output after the insn AFTER and set the BB of insn. If
4527 BB is NULL, an attempt is made to infer the BB from AFTER. */
4530 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4532 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4536 /* Make an insn of code JUMP_INSN with body X
4537 and output it after the insn AFTER. */
4540 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4542 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4545 /* Make an instruction with body X and code CALL_INSN
4546 and output it after the instruction AFTER. */
4549 emit_call_insn_after_noloc (rtx x
, rtx after
)
4551 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4554 /* Make an instruction with body X and code CALL_INSN
4555 and output it after the instruction AFTER. */
4558 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4560 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4563 /* Make an insn of code BARRIER
4564 and output it after the insn AFTER. */
4567 emit_barrier_after (rtx after
)
4569 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4571 INSN_UID (insn
) = cur_insn_uid
++;
4573 add_insn_after (insn
, after
, NULL
);
4577 /* Emit the label LABEL after the insn AFTER. */
4580 emit_label_after (rtx label
, rtx after
)
4582 gcc_checking_assert (INSN_UID (label
) == 0);
4583 INSN_UID (label
) = cur_insn_uid
++;
4584 add_insn_after (label
, after
, NULL
);
4585 return as_a
<rtx_insn
*> (label
);
4588 /* Notes require a bit of special handling: Some notes need to have their
4589 BLOCK_FOR_INSN set, others should never have it set, and some should
4590 have it set or clear depending on the context. */
4592 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4593 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4594 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4597 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4601 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4602 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4605 /* Notes for var tracking and EH region markers can appear between or
4606 inside basic blocks. If the caller is emitting on the basic block
4607 boundary, do not set BLOCK_FOR_INSN on the new note. */
4608 case NOTE_INSN_VAR_LOCATION
:
4609 case NOTE_INSN_CALL_ARG_LOCATION
:
4610 case NOTE_INSN_EH_REGION_BEG
:
4611 case NOTE_INSN_EH_REGION_END
:
4612 return on_bb_boundary_p
;
4614 /* Otherwise, BLOCK_FOR_INSN must be set. */
4620 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4623 emit_note_after (enum insn_note subtype
, rtx uncast_after
)
4625 rtx_insn
*after
= as_a
<rtx_insn
*> (uncast_after
);
4626 rtx_note
*note
= make_note_raw (subtype
);
4627 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4628 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4630 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4631 add_insn_after_nobb (note
, after
);
4633 add_insn_after (note
, after
, bb
);
4637 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4640 emit_note_before (enum insn_note subtype
, rtx uncast_before
)
4642 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4643 rtx_note
*note
= make_note_raw (subtype
);
4644 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4645 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4647 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4648 add_insn_before_nobb (note
, before
);
4650 add_insn_before (note
, before
, bb
);
4654 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4655 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4658 emit_pattern_after_setloc (rtx pattern
, rtx uncast_after
, int loc
,
4659 rtx_insn
*(*make_raw
) (rtx
))
4661 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4662 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4664 if (pattern
== NULL_RTX
|| !loc
)
4665 return safe_as_a
<rtx_insn
*> (last
);
4667 after
= NEXT_INSN (after
);
4670 if (active_insn_p (after
) && !INSN_LOCATION (after
))
4671 INSN_LOCATION (after
) = loc
;
4674 after
= NEXT_INSN (after
);
4676 return safe_as_a
<rtx_insn
*> (last
);
4679 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4680 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4684 emit_pattern_after (rtx pattern
, rtx uncast_after
, bool skip_debug_insns
,
4685 rtx_insn
*(*make_raw
) (rtx
))
4687 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4688 rtx_insn
*prev
= after
;
4690 if (skip_debug_insns
)
4691 while (DEBUG_INSN_P (prev
))
4692 prev
= PREV_INSN (prev
);
4695 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4698 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4701 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4703 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4705 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4708 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4710 emit_insn_after (rtx pattern
, rtx after
)
4712 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4715 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4717 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4719 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4722 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4724 emit_jump_insn_after (rtx pattern
, rtx after
)
4726 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4729 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4731 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4733 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4736 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4738 emit_call_insn_after (rtx pattern
, rtx after
)
4740 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4743 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4745 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4747 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4750 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4752 emit_debug_insn_after (rtx pattern
, rtx after
)
4754 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4757 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4758 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4759 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4763 emit_pattern_before_setloc (rtx pattern
, rtx uncast_before
, int loc
, bool insnp
,
4764 rtx_insn
*(*make_raw
) (rtx
))
4766 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4767 rtx_insn
*first
= PREV_INSN (before
);
4768 rtx_insn
*last
= emit_pattern_before_noloc (pattern
, before
,
4769 insnp
? before
: NULL_RTX
,
4772 if (pattern
== NULL_RTX
|| !loc
)
4776 first
= get_insns ();
4778 first
= NEXT_INSN (first
);
4781 if (active_insn_p (first
) && !INSN_LOCATION (first
))
4782 INSN_LOCATION (first
) = loc
;
4785 first
= NEXT_INSN (first
);
4790 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4791 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4792 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4793 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4796 emit_pattern_before (rtx pattern
, rtx uncast_before
, bool skip_debug_insns
,
4797 bool insnp
, rtx_insn
*(*make_raw
) (rtx
))
4799 rtx_insn
*before
= safe_as_a
<rtx_insn
*> (uncast_before
);
4800 rtx_insn
*next
= before
;
4802 if (skip_debug_insns
)
4803 while (DEBUG_INSN_P (next
))
4804 next
= PREV_INSN (next
);
4807 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4810 return emit_pattern_before_noloc (pattern
, before
,
4811 insnp
? before
: NULL_RTX
,
4815 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4817 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4819 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4823 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4825 emit_insn_before (rtx pattern
, rtx before
)
4827 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4830 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4832 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4834 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4835 make_jump_insn_raw
);
4838 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4840 emit_jump_insn_before (rtx pattern
, rtx before
)
4842 return emit_pattern_before (pattern
, before
, true, false,
4843 make_jump_insn_raw
);
4846 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4848 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4850 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4851 make_call_insn_raw
);
4854 /* Like emit_call_insn_before_noloc,
4855 but set insn_location according to BEFORE. */
4857 emit_call_insn_before (rtx pattern
, rtx before
)
4859 return emit_pattern_before (pattern
, before
, true, false,
4860 make_call_insn_raw
);
4863 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4865 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4867 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4868 make_debug_insn_raw
);
4871 /* Like emit_debug_insn_before_noloc,
4872 but set insn_location according to BEFORE. */
4874 emit_debug_insn_before (rtx pattern
, rtx before
)
4876 return emit_pattern_before (pattern
, before
, false, false,
4877 make_debug_insn_raw
);
4880 /* Take X and emit it at the end of the doubly-linked
4883 Returns the last insn emitted. */
4888 rtx_insn
*last
= get_last_insn ();
4894 switch (GET_CODE (x
))
4903 insn
= as_a
<rtx_insn
*> (x
);
4906 rtx_insn
*next
= NEXT_INSN (insn
);
4913 #ifdef ENABLE_RTL_CHECKING
4914 case JUMP_TABLE_DATA
:
4921 last
= make_insn_raw (x
);
4929 /* Make an insn of code DEBUG_INSN with pattern X
4930 and add it to the end of the doubly-linked list. */
4933 emit_debug_insn (rtx x
)
4935 rtx_insn
*last
= get_last_insn ();
4941 switch (GET_CODE (x
))
4950 insn
= as_a
<rtx_insn
*> (x
);
4953 rtx_insn
*next
= NEXT_INSN (insn
);
4960 #ifdef ENABLE_RTL_CHECKING
4961 case JUMP_TABLE_DATA
:
4968 last
= make_debug_insn_raw (x
);
4976 /* Make an insn of code JUMP_INSN with pattern X
4977 and add it to the end of the doubly-linked list. */
4980 emit_jump_insn (rtx x
)
4982 rtx_insn
*last
= NULL
;
4985 switch (GET_CODE (x
))
4994 insn
= as_a
<rtx_insn
*> (x
);
4997 rtx_insn
*next
= NEXT_INSN (insn
);
5004 #ifdef ENABLE_RTL_CHECKING
5005 case JUMP_TABLE_DATA
:
5012 last
= make_jump_insn_raw (x
);
5020 /* Make an insn of code CALL_INSN with pattern X
5021 and add it to the end of the doubly-linked list. */
5024 emit_call_insn (rtx x
)
5028 switch (GET_CODE (x
))
5037 insn
= emit_insn (x
);
5040 #ifdef ENABLE_RTL_CHECKING
5042 case JUMP_TABLE_DATA
:
5048 insn
= make_call_insn_raw (x
);
5056 /* Add the label LABEL to the end of the doubly-linked list. */
5059 emit_label (rtx label
)
5061 gcc_checking_assert (INSN_UID (label
) == 0);
5062 INSN_UID (label
) = cur_insn_uid
++;
5063 add_insn (as_a
<rtx_insn
*> (label
));
5064 return as_a
<rtx_insn
*> (label
);
5067 /* Make an insn of code JUMP_TABLE_DATA
5068 and add it to the end of the doubly-linked list. */
5070 rtx_jump_table_data
*
5071 emit_jump_table_data (rtx table
)
5073 rtx_jump_table_data
*jump_table_data
=
5074 as_a
<rtx_jump_table_data
*> (rtx_alloc (JUMP_TABLE_DATA
));
5075 INSN_UID (jump_table_data
) = cur_insn_uid
++;
5076 PATTERN (jump_table_data
) = table
;
5077 BLOCK_FOR_INSN (jump_table_data
) = NULL
;
5078 add_insn (jump_table_data
);
5079 return jump_table_data
;
5082 /* Make an insn of code BARRIER
5083 and add it to the end of the doubly-linked list. */
5088 rtx_barrier
*barrier
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
5089 INSN_UID (barrier
) = cur_insn_uid
++;
5094 /* Emit a copy of note ORIG. */
5097 emit_note_copy (rtx_note
*orig
)
5099 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
5100 rtx_note
*note
= make_note_raw (kind
);
5101 NOTE_DATA (note
) = NOTE_DATA (orig
);
5106 /* Make an insn of code NOTE or type NOTE_NO
5107 and add it to the end of the doubly-linked list. */
5110 emit_note (enum insn_note kind
)
5112 rtx_note
*note
= make_note_raw (kind
);
5117 /* Emit a clobber of lvalue X. */
5120 emit_clobber (rtx x
)
5122 /* CONCATs should not appear in the insn stream. */
5123 if (GET_CODE (x
) == CONCAT
)
5125 emit_clobber (XEXP (x
, 0));
5126 return emit_clobber (XEXP (x
, 1));
5128 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
5131 /* Return a sequence of insns to clobber lvalue X. */
5145 /* Emit a use of rvalue X. */
5150 /* CONCATs should not appear in the insn stream. */
5151 if (GET_CODE (x
) == CONCAT
)
5153 emit_use (XEXP (x
, 0));
5154 return emit_use (XEXP (x
, 1));
5156 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
5159 /* Return a sequence of insns to use rvalue X. */
5173 /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5174 Return the set in INSN that such notes describe, or NULL if the notes
5175 have no meaning for INSN. */
5178 set_for_reg_notes (rtx insn
)
5185 pat
= PATTERN (insn
);
5186 if (GET_CODE (pat
) == PARALLEL
)
5188 /* We do not use single_set because that ignores SETs of unused
5189 registers. REG_EQUAL and REG_EQUIV notes really do require the
5190 PARALLEL to have a single SET. */
5191 if (multiple_sets (insn
))
5193 pat
= XVECEXP (pat
, 0, 0);
5196 if (GET_CODE (pat
) != SET
)
5199 reg
= SET_DEST (pat
);
5201 /* Notes apply to the contents of a STRICT_LOW_PART. */
5202 if (GET_CODE (reg
) == STRICT_LOW_PART
)
5203 reg
= XEXP (reg
, 0);
5205 /* Check that we have a register. */
5206 if (!(REG_P (reg
) || GET_CODE (reg
) == SUBREG
))
5212 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5213 note of this type already exists, remove it first. */
5216 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5218 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5224 if (!set_for_reg_notes (insn
))
5227 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5228 It serves no useful purpose and breaks eliminate_regs. */
5229 if (GET_CODE (datum
) == ASM_OPERANDS
)
5232 /* Notes with side effects are dangerous. Even if the side-effect
5233 initially mirrors one in PATTERN (INSN), later optimizations
5234 might alter the way that the final register value is calculated
5235 and so move or alter the side-effect in some way. The note would
5236 then no longer be a valid substitution for SET_SRC. */
5237 if (side_effects_p (datum
))
5246 XEXP (note
, 0) = datum
;
5249 add_reg_note (insn
, kind
, datum
);
5250 note
= REG_NOTES (insn
);
5257 df_notes_rescan (as_a
<rtx_insn
*> (insn
));
5266 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5268 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5270 rtx set
= set_for_reg_notes (insn
);
5272 if (set
&& SET_DEST (set
) == dst
)
5273 return set_unique_reg_note (insn
, kind
, datum
);
5277 /* Return an indication of which type of insn should have X as a body.
5278 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5280 static enum rtx_code
5281 classify_insn (rtx x
)
5285 if (GET_CODE (x
) == CALL
)
5287 if (ANY_RETURN_P (x
))
5289 if (GET_CODE (x
) == SET
)
5291 if (SET_DEST (x
) == pc_rtx
)
5293 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5298 if (GET_CODE (x
) == PARALLEL
)
5301 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5302 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5304 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5305 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5307 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5308 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5314 /* Emit the rtl pattern X as an appropriate kind of insn.
5315 If X is a label, it is simply added into the insn chain. */
5320 enum rtx_code code
= classify_insn (x
);
5325 return emit_label (x
);
5327 return emit_insn (x
);
5330 rtx_insn
*insn
= emit_jump_insn (x
);
5331 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5332 return emit_barrier ();
5336 return emit_call_insn (x
);
5338 return emit_debug_insn (x
);
5344 /* Space for free sequence stack entries. */
5345 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5347 /* Begin emitting insns to a sequence. If this sequence will contain
5348 something that might cause the compiler to pop arguments to function
5349 calls (because those pops have previously been deferred; see
5350 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5351 before calling this function. That will ensure that the deferred
5352 pops are not accidentally emitted in the middle of this sequence. */
5355 start_sequence (void)
5357 struct sequence_stack
*tem
;
5359 if (free_sequence_stack
!= NULL
)
5361 tem
= free_sequence_stack
;
5362 free_sequence_stack
= tem
->next
;
5365 tem
= ggc_alloc
<sequence_stack
> ();
5367 tem
->next
= seq_stack
;
5368 tem
->first
= get_insns ();
5369 tem
->last
= get_last_insn ();
5377 /* Set up the insn chain starting with FIRST as the current sequence,
5378 saving the previously current one. See the documentation for
5379 start_sequence for more information about how to use this function. */
5382 push_to_sequence (rtx_insn
*first
)
5388 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5391 set_first_insn (first
);
5392 set_last_insn (last
);
5395 /* Like push_to_sequence, but take the last insn as an argument to avoid
5396 looping through the list. */
5399 push_to_sequence2 (rtx_insn
*first
, rtx_insn
*last
)
5403 set_first_insn (first
);
5404 set_last_insn (last
);
5407 /* Set up the outer-level insn chain
5408 as the current sequence, saving the previously current one. */
5411 push_topmost_sequence (void)
5413 struct sequence_stack
*stack
, *top
= NULL
;
5417 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5420 set_first_insn (top
->first
);
5421 set_last_insn (top
->last
);
5424 /* After emitting to the outer-level insn chain, update the outer-level
5425 insn chain, and restore the previous saved state. */
5428 pop_topmost_sequence (void)
5430 struct sequence_stack
*stack
, *top
= NULL
;
5432 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5435 top
->first
= get_insns ();
5436 top
->last
= get_last_insn ();
5441 /* After emitting to a sequence, restore previous saved state.
5443 To get the contents of the sequence just made, you must call
5444 `get_insns' *before* calling here.
5446 If the compiler might have deferred popping arguments while
5447 generating this sequence, and this sequence will not be immediately
5448 inserted into the instruction stream, use do_pending_stack_adjust
5449 before calling get_insns. That will ensure that the deferred
5450 pops are inserted into this sequence, and not into some random
5451 location in the instruction stream. See INHIBIT_DEFER_POP for more
5452 information about deferred popping of arguments. */
5457 struct sequence_stack
*tem
= seq_stack
;
5459 set_first_insn (tem
->first
);
5460 set_last_insn (tem
->last
);
5461 seq_stack
= tem
->next
;
5463 memset (tem
, 0, sizeof (*tem
));
5464 tem
->next
= free_sequence_stack
;
5465 free_sequence_stack
= tem
;
5468 /* Return 1 if currently emitting into a sequence. */
5471 in_sequence_p (void)
5473 return seq_stack
!= 0;
5476 /* Put the various virtual registers into REGNO_REG_RTX. */
5479 init_virtual_regs (void)
5481 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5482 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5483 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5484 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5485 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5486 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5487 = virtual_preferred_stack_boundary_rtx
;
5491 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5492 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5493 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5494 static int copy_insn_n_scratches
;
5496 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5497 copied an ASM_OPERANDS.
5498 In that case, it is the original input-operand vector. */
5499 static rtvec orig_asm_operands_vector
;
5501 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5502 copied an ASM_OPERANDS.
5503 In that case, it is the copied input-operand vector. */
5504 static rtvec copy_asm_operands_vector
;
5506 /* Likewise for the constraints vector. */
5507 static rtvec orig_asm_constraints_vector
;
5508 static rtvec copy_asm_constraints_vector
;
5510 /* Recursively create a new copy of an rtx for copy_insn.
5511 This function differs from copy_rtx in that it handles SCRATCHes and
5512 ASM_OPERANDs properly.
5513 Normally, this function is not used directly; use copy_insn as front end.
5514 However, you could first copy an insn pattern with copy_insn and then use
5515 this function afterwards to properly copy any REG_NOTEs containing
5519 copy_insn_1 (rtx orig
)
5524 const char *format_ptr
;
5529 code
= GET_CODE (orig
);
5544 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5545 clobbers or clobbers of hard registers that originated as pseudos.
5546 This is needed to allow safe register renaming. */
5547 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
5548 && ORIGINAL_REGNO (XEXP (orig
, 0)) == REGNO (XEXP (orig
, 0)))
5553 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5554 if (copy_insn_scratch_in
[i
] == orig
)
5555 return copy_insn_scratch_out
[i
];
5559 if (shared_const_p (orig
))
5563 /* A MEM with a constant address is not sharable. The problem is that
5564 the constant address may need to be reloaded. If the mem is shared,
5565 then reloading one copy of this mem will cause all copies to appear
5566 to have been reloaded. */
5572 /* Copy the various flags, fields, and other information. We assume
5573 that all fields need copying, and then clear the fields that should
5574 not be copied. That is the sensible default behavior, and forces
5575 us to explicitly document why we are *not* copying a flag. */
5576 copy
= shallow_copy_rtx (orig
);
5578 /* We do not copy the USED flag, which is used as a mark bit during
5579 walks over the RTL. */
5580 RTX_FLAG (copy
, used
) = 0;
5582 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5585 RTX_FLAG (copy
, jump
) = 0;
5586 RTX_FLAG (copy
, call
) = 0;
5587 RTX_FLAG (copy
, frame_related
) = 0;
5590 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5592 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5593 switch (*format_ptr
++)
5596 if (XEXP (orig
, i
) != NULL
)
5597 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5602 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5603 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5604 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5605 XVEC (copy
, i
) = copy_asm_operands_vector
;
5606 else if (XVEC (orig
, i
) != NULL
)
5608 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5609 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5610 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5621 /* These are left unchanged. */
5628 if (code
== SCRATCH
)
5630 i
= copy_insn_n_scratches
++;
5631 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5632 copy_insn_scratch_in
[i
] = orig
;
5633 copy_insn_scratch_out
[i
] = copy
;
5635 else if (code
== ASM_OPERANDS
)
5637 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5638 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5639 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5640 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5646 /* Create a new copy of an rtx.
5647 This function differs from copy_rtx in that it handles SCRATCHes and
5648 ASM_OPERANDs properly.
5649 INSN doesn't really have to be a full INSN; it could be just the
5652 copy_insn (rtx insn
)
5654 copy_insn_n_scratches
= 0;
5655 orig_asm_operands_vector
= 0;
5656 orig_asm_constraints_vector
= 0;
5657 copy_asm_operands_vector
= 0;
5658 copy_asm_constraints_vector
= 0;
5659 return copy_insn_1 (insn
);
5662 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5663 on that assumption that INSN itself remains in its original place. */
5666 copy_delay_slot_insn (rtx_insn
*insn
)
5668 /* Copy INSN with its rtx_code, all its notes, location etc. */
5669 insn
= as_a
<rtx_insn
*> (copy_rtx (insn
));
5670 INSN_UID (insn
) = cur_insn_uid
++;
5674 /* Initialize data structures and variables in this file
5675 before generating rtl for each function. */
5680 set_first_insn (NULL
);
5681 set_last_insn (NULL
);
5682 if (MIN_NONDEBUG_INSN_UID
)
5683 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5686 cur_debug_insn_uid
= 1;
5687 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5688 first_label_num
= label_num
;
5691 /* Init the tables that describe all the pseudo regs. */
5693 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5695 crtl
->emit
.regno_pointer_align
5696 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5698 regno_reg_rtx
= ggc_vec_alloc
<rtx
> (crtl
->emit
.regno_pointer_align_length
);
5700 /* Put copies of all the hard registers into regno_reg_rtx. */
5701 memcpy (regno_reg_rtx
,
5702 initial_regno_reg_rtx
,
5703 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5705 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5706 init_virtual_regs ();
5708 /* Indicate that the virtual registers and stack locations are
5710 REG_POINTER (stack_pointer_rtx
) = 1;
5711 REG_POINTER (frame_pointer_rtx
) = 1;
5712 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5713 REG_POINTER (arg_pointer_rtx
) = 1;
5715 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5716 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5717 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5718 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5719 REG_POINTER (virtual_cfa_rtx
) = 1;
5721 #ifdef STACK_BOUNDARY
5722 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5723 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5724 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5725 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5727 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5728 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5729 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5730 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5731 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5734 #ifdef INIT_EXPANDERS
5739 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5742 gen_const_vector (enum machine_mode mode
, int constant
)
5747 enum machine_mode inner
;
5749 units
= GET_MODE_NUNITS (mode
);
5750 inner
= GET_MODE_INNER (mode
);
5752 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5754 v
= rtvec_alloc (units
);
5756 /* We need to call this function after we set the scalar const_tiny_rtx
5758 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5760 for (i
= 0; i
< units
; ++i
)
5761 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5763 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5767 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5768 all elements are zero, and the one vector when all elements are one. */
5770 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5772 enum machine_mode inner
= GET_MODE_INNER (mode
);
5773 int nunits
= GET_MODE_NUNITS (mode
);
5777 /* Check to see if all of the elements have the same value. */
5778 x
= RTVEC_ELT (v
, nunits
- 1);
5779 for (i
= nunits
- 2; i
>= 0; i
--)
5780 if (RTVEC_ELT (v
, i
) != x
)
5783 /* If the values are all the same, check to see if we can use one of the
5784 standard constant vectors. */
5787 if (x
== CONST0_RTX (inner
))
5788 return CONST0_RTX (mode
);
5789 else if (x
== CONST1_RTX (inner
))
5790 return CONST1_RTX (mode
);
5791 else if (x
== CONSTM1_RTX (inner
))
5792 return CONSTM1_RTX (mode
);
5795 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5798 /* Initialise global register information required by all functions. */
5801 init_emit_regs (void)
5804 enum machine_mode mode
;
5807 /* Reset register attributes */
5808 htab_empty (reg_attrs_htab
);
5810 /* We need reg_raw_mode, so initialize the modes now. */
5811 init_reg_modes_target ();
5813 /* Assign register numbers to the globally defined register rtx. */
5814 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5815 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5816 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5817 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5818 virtual_incoming_args_rtx
=
5819 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5820 virtual_stack_vars_rtx
=
5821 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5822 virtual_stack_dynamic_rtx
=
5823 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5824 virtual_outgoing_args_rtx
=
5825 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5826 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5827 virtual_preferred_stack_boundary_rtx
=
5828 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5830 /* Initialize RTL for commonly used hard registers. These are
5831 copied into regno_reg_rtx as we begin to compile each function. */
5832 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5833 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5835 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5836 return_address_pointer_rtx
5837 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5840 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5841 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5843 pic_offset_table_rtx
= NULL_RTX
;
5845 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5847 mode
= (enum machine_mode
) i
;
5848 attrs
= ggc_cleared_alloc
<mem_attrs
> ();
5849 attrs
->align
= BITS_PER_UNIT
;
5850 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5851 if (mode
!= BLKmode
)
5853 attrs
->size_known_p
= true;
5854 attrs
->size
= GET_MODE_SIZE (mode
);
5855 if (STRICT_ALIGNMENT
)
5856 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5858 mode_mem_attrs
[i
] = attrs
;
5862 /* Initialize global machine_mode variables. */
5865 init_derived_machine_modes (void)
5867 byte_mode
= VOIDmode
;
5868 word_mode
= VOIDmode
;
5870 for (enum machine_mode mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5872 mode
= GET_MODE_WIDER_MODE (mode
))
5874 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5875 && byte_mode
== VOIDmode
)
5878 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5879 && word_mode
== VOIDmode
)
5883 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5886 /* Create some permanent unique rtl objects shared between all functions. */
5889 init_emit_once (void)
5892 enum machine_mode mode
;
5893 enum machine_mode double_mode
;
5895 /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
5896 CONST_FIXED, and memory attribute hash tables. */
5897 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5898 const_int_htab_eq
, NULL
);
5900 #if TARGET_SUPPORTS_WIDE_INT
5901 const_wide_int_htab
= htab_create_ggc (37, const_wide_int_htab_hash
,
5902 const_wide_int_htab_eq
, NULL
);
5904 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5905 const_double_htab_eq
, NULL
);
5907 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5908 const_fixed_htab_eq
, NULL
);
5910 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5911 reg_attrs_htab_eq
, NULL
);
5913 #ifdef INIT_EXPANDERS
5914 /* This is to initialize {init|mark|free}_machine_status before the first
5915 call to push_function_context_to. This is needed by the Chill front
5916 end which calls push_function_context_to before the first call to
5917 init_function_start. */
5921 /* Create the unique rtx's for certain rtx codes and operand values. */
5923 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5924 tries to use these variables. */
5925 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5926 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5927 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5929 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5930 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5931 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5933 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5935 double_mode
= mode_for_size (DOUBLE_TYPE_SIZE
, MODE_FLOAT
, 0);
5937 real_from_integer (&dconst0
, double_mode
, 0, SIGNED
);
5938 real_from_integer (&dconst1
, double_mode
, 1, SIGNED
);
5939 real_from_integer (&dconst2
, double_mode
, 2, SIGNED
);
5944 dconsthalf
= dconst1
;
5945 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5947 for (i
= 0; i
< 3; i
++)
5949 const REAL_VALUE_TYPE
*const r
=
5950 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5952 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5954 mode
= GET_MODE_WIDER_MODE (mode
))
5955 const_tiny_rtx
[i
][(int) mode
] =
5956 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5958 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5960 mode
= GET_MODE_WIDER_MODE (mode
))
5961 const_tiny_rtx
[i
][(int) mode
] =
5962 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5964 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5966 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5968 mode
= GET_MODE_WIDER_MODE (mode
))
5969 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5971 for (mode
= MIN_MODE_PARTIAL_INT
;
5972 mode
<= MAX_MODE_PARTIAL_INT
;
5973 mode
= (enum machine_mode
)((int)(mode
) + 1))
5974 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5977 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5979 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5981 mode
= GET_MODE_WIDER_MODE (mode
))
5982 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5984 for (mode
= MIN_MODE_PARTIAL_INT
;
5985 mode
<= MAX_MODE_PARTIAL_INT
;
5986 mode
= (enum machine_mode
)((int)(mode
) + 1))
5987 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5989 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5991 mode
= GET_MODE_WIDER_MODE (mode
))
5993 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5994 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5997 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5999 mode
= GET_MODE_WIDER_MODE (mode
))
6001 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
6002 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
6005 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
6007 mode
= GET_MODE_WIDER_MODE (mode
))
6009 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6010 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6011 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
6014 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
6016 mode
= GET_MODE_WIDER_MODE (mode
))
6018 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6019 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6022 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
6024 mode
= GET_MODE_WIDER_MODE (mode
))
6026 FCONST0 (mode
).data
.high
= 0;
6027 FCONST0 (mode
).data
.low
= 0;
6028 FCONST0 (mode
).mode
= mode
;
6029 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6030 FCONST0 (mode
), mode
);
6033 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
6035 mode
= GET_MODE_WIDER_MODE (mode
))
6037 FCONST0 (mode
).data
.high
= 0;
6038 FCONST0 (mode
).data
.low
= 0;
6039 FCONST0 (mode
).mode
= mode
;
6040 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6041 FCONST0 (mode
), mode
);
6044 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
6046 mode
= GET_MODE_WIDER_MODE (mode
))
6048 FCONST0 (mode
).data
.high
= 0;
6049 FCONST0 (mode
).data
.low
= 0;
6050 FCONST0 (mode
).mode
= mode
;
6051 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6052 FCONST0 (mode
), mode
);
6054 /* We store the value 1. */
6055 FCONST1 (mode
).data
.high
= 0;
6056 FCONST1 (mode
).data
.low
= 0;
6057 FCONST1 (mode
).mode
= mode
;
6059 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6060 HOST_BITS_PER_DOUBLE_INT
,
6061 SIGNED_FIXED_POINT_MODE_P (mode
));
6062 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6063 FCONST1 (mode
), mode
);
6066 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
6068 mode
= GET_MODE_WIDER_MODE (mode
))
6070 FCONST0 (mode
).data
.high
= 0;
6071 FCONST0 (mode
).data
.low
= 0;
6072 FCONST0 (mode
).mode
= mode
;
6073 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6074 FCONST0 (mode
), mode
);
6076 /* We store the value 1. */
6077 FCONST1 (mode
).data
.high
= 0;
6078 FCONST1 (mode
).data
.low
= 0;
6079 FCONST1 (mode
).mode
= mode
;
6081 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6082 HOST_BITS_PER_DOUBLE_INT
,
6083 SIGNED_FIXED_POINT_MODE_P (mode
));
6084 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6085 FCONST1 (mode
), mode
);
6088 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
6090 mode
= GET_MODE_WIDER_MODE (mode
))
6092 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6095 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
6097 mode
= GET_MODE_WIDER_MODE (mode
))
6099 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6102 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
6104 mode
= GET_MODE_WIDER_MODE (mode
))
6106 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6107 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6110 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
6112 mode
= GET_MODE_WIDER_MODE (mode
))
6114 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6115 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6118 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
6119 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
6120 const_tiny_rtx
[0][i
] = const0_rtx
;
6122 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
6123 if (STORE_FLAG_VALUE
== 1)
6124 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
6126 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
6127 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
6128 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
6129 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
6132 /* Produce exact duplicate of insn INSN after AFTER.
6133 Care updating of libcall regions if present. */
6136 emit_copy_of_insn_after (rtx insn
, rtx after
)
6141 switch (GET_CODE (insn
))
6144 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
6148 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
6149 CROSSING_JUMP_P (new_rtx
) = CROSSING_JUMP_P (insn
);
6153 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
6157 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
6158 if (CALL_INSN_FUNCTION_USAGE (insn
))
6159 CALL_INSN_FUNCTION_USAGE (new_rtx
)
6160 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
6161 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
6162 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
6163 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
6164 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
6165 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
6172 /* Update LABEL_NUSES. */
6173 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
6175 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
6177 /* If the old insn is frame related, then so is the new one. This is
6178 primarily needed for IA-64 unwind info which marks epilogue insns,
6179 which may be duplicated by the basic block reordering code. */
6180 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
6182 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6183 will make them. REG_LABEL_TARGETs are created there too, but are
6184 supposed to be sticky, so we copy them. */
6185 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
6186 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
6188 if (GET_CODE (link
) == EXPR_LIST
)
6189 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
6190 copy_insn_1 (XEXP (link
, 0)));
6192 add_shallow_copy_of_reg_note (new_rtx
, link
);
6195 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6199 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6201 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
6203 if (hard_reg_clobbers
[mode
][regno
])
6204 return hard_reg_clobbers
[mode
][regno
];
6206 return (hard_reg_clobbers
[mode
][regno
] =
6207 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6210 location_t prologue_location
;
6211 location_t epilogue_location
;
6213 /* Hold current location information and last location information, so the
6214 datastructures are built lazily only when some instructions in given
6215 place are needed. */
6216 static location_t curr_location
;
6218 /* Allocate insn location datastructure. */
6220 insn_locations_init (void)
6222 prologue_location
= epilogue_location
= 0;
6223 curr_location
= UNKNOWN_LOCATION
;
6226 /* At the end of emit stage, clear current location. */
6228 insn_locations_finalize (void)
6230 epilogue_location
= curr_location
;
6231 curr_location
= UNKNOWN_LOCATION
;
6234 /* Set current location. */
6236 set_curr_insn_location (location_t location
)
6238 curr_location
= location
;
6241 /* Get current location. */
6243 curr_insn_location (void)
6245 return curr_location
;
6248 /* Return lexical scope block insn belongs to. */
6250 insn_scope (const_rtx insn
)
6252 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6255 /* Return line number of the statement that produced this insn. */
6257 insn_line (const_rtx insn
)
6259 return LOCATION_LINE (INSN_LOCATION (insn
));
6262 /* Return source file of the statement that produced this insn. */
6264 insn_file (const_rtx insn
)
6266 return LOCATION_FILE (INSN_LOCATION (insn
));
6269 /* Return expanded location of the statement that produced this insn. */
6271 insn_location (const_rtx insn
)
6273 return expand_location (INSN_LOCATION (insn
));
6276 /* Return true if memory model MODEL requires a pre-operation (release-style)
6277 barrier or a post-operation (acquire-style) barrier. While not universal,
6278 this function matches behavior of several targets. */
6281 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6283 switch (model
& MEMMODEL_MASK
)
6285 case MEMMODEL_RELAXED
:
6286 case MEMMODEL_CONSUME
:
6288 case MEMMODEL_RELEASE
:
6290 case MEMMODEL_ACQUIRE
:
6292 case MEMMODEL_ACQ_REL
:
6293 case MEMMODEL_SEQ_CST
:
6300 #include "gt-emit-rtl.h"