lto-cgraph.c (get_alias_symbol): Remove weakref sanity check.
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2013 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "machmode.h"
25 #include "rtl.h"
26 #include "tree.h"
27 #include "flags.h"
28 #include "regs.h"
29 #include "hard-reg-set.h"
30 #include "except.h"
31 #include "function.h"
32 #include "insn-config.h"
33 #include "insn-attr.h"
34 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
35 #include "expr.h"
36 #include "optabs.h"
37 #include "libfuncs.h"
38 #include "recog.h"
39 #include "reload.h"
40 #include "typeclass.h"
41 #include "toplev.h"
42 #include "langhooks.h"
43 #include "intl.h"
44 #include "tm_p.h"
45 #include "tree-iterator.h"
46 #include "tree-flow.h"
47 #include "target.h"
48 #include "common/common-target.h"
49 #include "timevar.h"
50 #include "df.h"
51 #include "diagnostic.h"
52 #include "ssaexpand.h"
53 #include "target-globals.h"
54 #include "params.h"
55
56 /* Decide whether a function's arguments should be processed
57 from first to last or from last to first.
58
59 They should if the stack and args grow in opposite directions, but
60 only if we have push insns. */
61
62 #ifdef PUSH_ROUNDING
63
64 #ifndef PUSH_ARGS_REVERSED
65 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
66 #define PUSH_ARGS_REVERSED /* If it's last to first. */
67 #endif
68 #endif
69
70 #endif
71
72 #ifndef STACK_PUSH_CODE
73 #ifdef STACK_GROWS_DOWNWARD
74 #define STACK_PUSH_CODE PRE_DEC
75 #else
76 #define STACK_PUSH_CODE PRE_INC
77 #endif
78 #endif
79
80
81 /* If this is nonzero, we do not bother generating VOLATILE
82 around volatile memory references, and we are willing to
83 output indirect addresses. If cse is to follow, we reject
84 indirect addresses so a useful potential cse is generated;
85 if it is used only once, instruction combination will produce
86 the same indirect address eventually. */
87 int cse_not_expected;
88
89 /* This structure is used by move_by_pieces to describe the move to
90 be performed. */
91 struct move_by_pieces_d
92 {
93 rtx to;
94 rtx to_addr;
95 int autinc_to;
96 int explicit_inc_to;
97 rtx from;
98 rtx from_addr;
99 int autinc_from;
100 int explicit_inc_from;
101 unsigned HOST_WIDE_INT len;
102 HOST_WIDE_INT offset;
103 int reverse;
104 };
105
106 /* This structure is used by store_by_pieces to describe the clear to
107 be performed. */
108
109 struct store_by_pieces_d
110 {
111 rtx to;
112 rtx to_addr;
113 int autinc_to;
114 int explicit_inc_to;
115 unsigned HOST_WIDE_INT len;
116 HOST_WIDE_INT offset;
117 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
118 void *constfundata;
119 int reverse;
120 };
121
122 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
123 struct move_by_pieces_d *);
124 static bool block_move_libcall_safe_for_call_parm (void);
125 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
126 static tree emit_block_move_libcall_fn (int);
127 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
128 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
129 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
130 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
131 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
132 struct store_by_pieces_d *);
133 static tree clear_storage_libcall_fn (int);
134 static rtx compress_float_constant (rtx, rtx);
135 static rtx get_subtarget (rtx);
136 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
137 HOST_WIDE_INT, enum machine_mode,
138 tree, int, alias_set_type);
139 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
140 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
141 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
142 enum machine_mode, tree, alias_set_type, bool);
143
144 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
145
146 static int is_aligning_offset (const_tree, const_tree);
147 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
148 enum expand_modifier);
149 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
150 static rtx do_store_flag (sepops, rtx, enum machine_mode);
151 #ifdef PUSH_ROUNDING
152 static void emit_single_push_insn (enum machine_mode, rtx, tree);
153 #endif
154 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx, int);
155 static rtx const_vector_from_tree (tree);
156 static void write_complex_part (rtx, rtx, bool);
157
158 /* This macro is used to determine whether move_by_pieces should be called
159 to perform a structure copy. */
160 #ifndef MOVE_BY_PIECES_P
161 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
162 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
163 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
164 #endif
165
166 /* This macro is used to determine whether clear_by_pieces should be
167 called to clear storage. */
168 #ifndef CLEAR_BY_PIECES_P
169 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
170 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
171 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
172 #endif
173
174 /* This macro is used to determine whether store_by_pieces should be
175 called to "memset" storage with byte values other than zero. */
176 #ifndef SET_BY_PIECES_P
177 #define SET_BY_PIECES_P(SIZE, ALIGN) \
178 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
179 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
180 #endif
181
182 /* This macro is used to determine whether store_by_pieces should be
183 called to "memcpy" storage when the source is a constant string. */
184 #ifndef STORE_BY_PIECES_P
185 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
186 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
187 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
188 #endif
189 \f
190 /* This is run to set up which modes can be used
191 directly in memory and to initialize the block move optab. It is run
192 at the beginning of compilation and when the target is reinitialized. */
193
194 void
195 init_expr_target (void)
196 {
197 rtx insn, pat;
198 enum machine_mode mode;
199 int num_clobbers;
200 rtx mem, mem1;
201 rtx reg;
202
203 /* Try indexing by frame ptr and try by stack ptr.
204 It is known that on the Convex the stack ptr isn't a valid index.
205 With luck, one or the other is valid on any machine. */
206 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
207 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
208
209 /* A scratch register we can modify in-place below to avoid
210 useless RTL allocations. */
211 reg = gen_rtx_REG (VOIDmode, -1);
212
213 insn = rtx_alloc (INSN);
214 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
215 PATTERN (insn) = pat;
216
217 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
218 mode = (enum machine_mode) ((int) mode + 1))
219 {
220 int regno;
221
222 direct_load[(int) mode] = direct_store[(int) mode] = 0;
223 PUT_MODE (mem, mode);
224 PUT_MODE (mem1, mode);
225 PUT_MODE (reg, mode);
226
227 /* See if there is some register that can be used in this mode and
228 directly loaded or stored from memory. */
229
230 if (mode != VOIDmode && mode != BLKmode)
231 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
232 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
233 regno++)
234 {
235 if (! HARD_REGNO_MODE_OK (regno, mode))
236 continue;
237
238 SET_REGNO (reg, regno);
239
240 SET_SRC (pat) = mem;
241 SET_DEST (pat) = reg;
242 if (recog (pat, insn, &num_clobbers) >= 0)
243 direct_load[(int) mode] = 1;
244
245 SET_SRC (pat) = mem1;
246 SET_DEST (pat) = reg;
247 if (recog (pat, insn, &num_clobbers) >= 0)
248 direct_load[(int) mode] = 1;
249
250 SET_SRC (pat) = reg;
251 SET_DEST (pat) = mem;
252 if (recog (pat, insn, &num_clobbers) >= 0)
253 direct_store[(int) mode] = 1;
254
255 SET_SRC (pat) = reg;
256 SET_DEST (pat) = mem1;
257 if (recog (pat, insn, &num_clobbers) >= 0)
258 direct_store[(int) mode] = 1;
259 }
260 }
261
262 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
263
264 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
265 mode = GET_MODE_WIDER_MODE (mode))
266 {
267 enum machine_mode srcmode;
268 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
269 srcmode = GET_MODE_WIDER_MODE (srcmode))
270 {
271 enum insn_code ic;
272
273 ic = can_extend_p (mode, srcmode, 0);
274 if (ic == CODE_FOR_nothing)
275 continue;
276
277 PUT_MODE (mem, srcmode);
278
279 if (insn_operand_matches (ic, 1, mem))
280 float_extend_from_mem[mode][srcmode] = true;
281 }
282 }
283 }
284
285 /* This is run at the start of compiling a function. */
286
287 void
288 init_expr (void)
289 {
290 memset (&crtl->expr, 0, sizeof (crtl->expr));
291 }
292 \f
293 /* Copy data from FROM to TO, where the machine modes are not the same.
294 Both modes may be integer, or both may be floating, or both may be
295 fixed-point.
296 UNSIGNEDP should be nonzero if FROM is an unsigned type.
297 This causes zero-extension instead of sign-extension. */
298
299 void
300 convert_move (rtx to, rtx from, int unsignedp)
301 {
302 enum machine_mode to_mode = GET_MODE (to);
303 enum machine_mode from_mode = GET_MODE (from);
304 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
305 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
306 enum insn_code code;
307 rtx libcall;
308
309 /* rtx code for making an equivalent value. */
310 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
311 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
312
313
314 gcc_assert (to_real == from_real);
315 gcc_assert (to_mode != BLKmode);
316 gcc_assert (from_mode != BLKmode);
317
318 /* If the source and destination are already the same, then there's
319 nothing to do. */
320 if (to == from)
321 return;
322
323 /* If FROM is a SUBREG that indicates that we have already done at least
324 the required extension, strip it. We don't handle such SUBREGs as
325 TO here. */
326
327 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
328 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
329 >= GET_MODE_PRECISION (to_mode))
330 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
331 from = gen_lowpart (to_mode, from), from_mode = to_mode;
332
333 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
334
335 if (to_mode == from_mode
336 || (from_mode == VOIDmode && CONSTANT_P (from)))
337 {
338 emit_move_insn (to, from);
339 return;
340 }
341
342 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
343 {
344 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
345
346 if (VECTOR_MODE_P (to_mode))
347 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
348 else
349 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
350
351 emit_move_insn (to, from);
352 return;
353 }
354
355 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
356 {
357 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
358 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
359 return;
360 }
361
362 if (to_real)
363 {
364 rtx value, insns;
365 convert_optab tab;
366
367 gcc_assert ((GET_MODE_PRECISION (from_mode)
368 != GET_MODE_PRECISION (to_mode))
369 || (DECIMAL_FLOAT_MODE_P (from_mode)
370 != DECIMAL_FLOAT_MODE_P (to_mode)));
371
372 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
373 /* Conversion between decimal float and binary float, same size. */
374 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
375 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
376 tab = sext_optab;
377 else
378 tab = trunc_optab;
379
380 /* Try converting directly if the insn is supported. */
381
382 code = convert_optab_handler (tab, to_mode, from_mode);
383 if (code != CODE_FOR_nothing)
384 {
385 emit_unop_insn (code, to, from,
386 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
387 return;
388 }
389
390 /* Otherwise use a libcall. */
391 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
392
393 /* Is this conversion implemented yet? */
394 gcc_assert (libcall);
395
396 start_sequence ();
397 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
398 1, from, from_mode);
399 insns = get_insns ();
400 end_sequence ();
401 emit_libcall_block (insns, to, value,
402 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
403 from)
404 : gen_rtx_FLOAT_EXTEND (to_mode, from));
405 return;
406 }
407
408 /* Handle pointer conversion. */ /* SPEE 900220. */
409 /* Targets are expected to provide conversion insns between PxImode and
410 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
411 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
412 {
413 enum machine_mode full_mode
414 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
415
416 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
417 != CODE_FOR_nothing);
418
419 if (full_mode != from_mode)
420 from = convert_to_mode (full_mode, from, unsignedp);
421 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
422 to, from, UNKNOWN);
423 return;
424 }
425 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
426 {
427 rtx new_from;
428 enum machine_mode full_mode
429 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
430 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
431 enum insn_code icode;
432
433 icode = convert_optab_handler (ctab, full_mode, from_mode);
434 gcc_assert (icode != CODE_FOR_nothing);
435
436 if (to_mode == full_mode)
437 {
438 emit_unop_insn (icode, to, from, UNKNOWN);
439 return;
440 }
441
442 new_from = gen_reg_rtx (full_mode);
443 emit_unop_insn (icode, new_from, from, UNKNOWN);
444
445 /* else proceed to integer conversions below. */
446 from_mode = full_mode;
447 from = new_from;
448 }
449
450 /* Make sure both are fixed-point modes or both are not. */
451 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
452 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
453 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
454 {
455 /* If we widen from_mode to to_mode and they are in the same class,
456 we won't saturate the result.
457 Otherwise, always saturate the result to play safe. */
458 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
459 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
460 expand_fixed_convert (to, from, 0, 0);
461 else
462 expand_fixed_convert (to, from, 0, 1);
463 return;
464 }
465
466 /* Now both modes are integers. */
467
468 /* Handle expanding beyond a word. */
469 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
470 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
471 {
472 rtx insns;
473 rtx lowpart;
474 rtx fill_value;
475 rtx lowfrom;
476 int i;
477 enum machine_mode lowpart_mode;
478 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
479
480 /* Try converting directly if the insn is supported. */
481 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
482 != CODE_FOR_nothing)
483 {
484 /* If FROM is a SUBREG, put it into a register. Do this
485 so that we always generate the same set of insns for
486 better cse'ing; if an intermediate assignment occurred,
487 we won't be doing the operation directly on the SUBREG. */
488 if (optimize > 0 && GET_CODE (from) == SUBREG)
489 from = force_reg (from_mode, from);
490 emit_unop_insn (code, to, from, equiv_code);
491 return;
492 }
493 /* Next, try converting via full word. */
494 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
495 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
496 != CODE_FOR_nothing))
497 {
498 rtx word_to = gen_reg_rtx (word_mode);
499 if (REG_P (to))
500 {
501 if (reg_overlap_mentioned_p (to, from))
502 from = force_reg (from_mode, from);
503 emit_clobber (to);
504 }
505 convert_move (word_to, from, unsignedp);
506 emit_unop_insn (code, to, word_to, equiv_code);
507 return;
508 }
509
510 /* No special multiword conversion insn; do it by hand. */
511 start_sequence ();
512
513 /* Since we will turn this into a no conflict block, we must ensure the
514 the source does not overlap the target so force it into an isolated
515 register when maybe so. Likewise for any MEM input, since the
516 conversion sequence might require several references to it and we
517 must ensure we're getting the same value every time. */
518
519 if (MEM_P (from) || reg_overlap_mentioned_p (to, from))
520 from = force_reg (from_mode, from);
521
522 /* Get a copy of FROM widened to a word, if necessary. */
523 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
524 lowpart_mode = word_mode;
525 else
526 lowpart_mode = from_mode;
527
528 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
529
530 lowpart = gen_lowpart (lowpart_mode, to);
531 emit_move_insn (lowpart, lowfrom);
532
533 /* Compute the value to put in each remaining word. */
534 if (unsignedp)
535 fill_value = const0_rtx;
536 else
537 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
538 LT, lowfrom, const0_rtx,
539 VOIDmode, 0, -1);
540
541 /* Fill the remaining words. */
542 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
543 {
544 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
545 rtx subword = operand_subword (to, index, 1, to_mode);
546
547 gcc_assert (subword);
548
549 if (fill_value != subword)
550 emit_move_insn (subword, fill_value);
551 }
552
553 insns = get_insns ();
554 end_sequence ();
555
556 emit_insn (insns);
557 return;
558 }
559
560 /* Truncating multi-word to a word or less. */
561 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
562 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
563 {
564 if (!((MEM_P (from)
565 && ! MEM_VOLATILE_P (from)
566 && direct_load[(int) to_mode]
567 && ! mode_dependent_address_p (XEXP (from, 0),
568 MEM_ADDR_SPACE (from)))
569 || REG_P (from)
570 || GET_CODE (from) == SUBREG))
571 from = force_reg (from_mode, from);
572 convert_move (to, gen_lowpart (word_mode, from), 0);
573 return;
574 }
575
576 /* Now follow all the conversions between integers
577 no more than a word long. */
578
579 /* For truncation, usually we can just refer to FROM in a narrower mode. */
580 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
581 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
582 {
583 if (!((MEM_P (from)
584 && ! MEM_VOLATILE_P (from)
585 && direct_load[(int) to_mode]
586 && ! mode_dependent_address_p (XEXP (from, 0),
587 MEM_ADDR_SPACE (from)))
588 || REG_P (from)
589 || GET_CODE (from) == SUBREG))
590 from = force_reg (from_mode, from);
591 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
592 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
593 from = copy_to_reg (from);
594 emit_move_insn (to, gen_lowpart (to_mode, from));
595 return;
596 }
597
598 /* Handle extension. */
599 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
600 {
601 /* Convert directly if that works. */
602 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
603 != CODE_FOR_nothing)
604 {
605 emit_unop_insn (code, to, from, equiv_code);
606 return;
607 }
608 else
609 {
610 enum machine_mode intermediate;
611 rtx tmp;
612 int shift_amount;
613
614 /* Search for a mode to convert via. */
615 for (intermediate = from_mode; intermediate != VOIDmode;
616 intermediate = GET_MODE_WIDER_MODE (intermediate))
617 if (((can_extend_p (to_mode, intermediate, unsignedp)
618 != CODE_FOR_nothing)
619 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
620 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
621 && (can_extend_p (intermediate, from_mode, unsignedp)
622 != CODE_FOR_nothing))
623 {
624 convert_move (to, convert_to_mode (intermediate, from,
625 unsignedp), unsignedp);
626 return;
627 }
628
629 /* No suitable intermediate mode.
630 Generate what we need with shifts. */
631 shift_amount = (GET_MODE_PRECISION (to_mode)
632 - GET_MODE_PRECISION (from_mode));
633 from = gen_lowpart (to_mode, force_reg (from_mode, from));
634 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
635 to, unsignedp);
636 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
637 to, unsignedp);
638 if (tmp != to)
639 emit_move_insn (to, tmp);
640 return;
641 }
642 }
643
644 /* Support special truncate insns for certain modes. */
645 if (convert_optab_handler (trunc_optab, to_mode,
646 from_mode) != CODE_FOR_nothing)
647 {
648 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
649 to, from, UNKNOWN);
650 return;
651 }
652
653 /* Handle truncation of volatile memrefs, and so on;
654 the things that couldn't be truncated directly,
655 and for which there was no special instruction.
656
657 ??? Code above formerly short-circuited this, for most integer
658 mode pairs, with a force_reg in from_mode followed by a recursive
659 call to this routine. Appears always to have been wrong. */
660 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
661 {
662 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
663 emit_move_insn (to, temp);
664 return;
665 }
666
667 /* Mode combination is not recognized. */
668 gcc_unreachable ();
669 }
670
671 /* Return an rtx for a value that would result
672 from converting X to mode MODE.
673 Both X and MODE may be floating, or both integer.
674 UNSIGNEDP is nonzero if X is an unsigned value.
675 This can be done by referring to a part of X in place
676 or by copying to a new temporary with conversion. */
677
678 rtx
679 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
680 {
681 return convert_modes (mode, VOIDmode, x, unsignedp);
682 }
683
684 /* Return an rtx for a value that would result
685 from converting X from mode OLDMODE to mode MODE.
686 Both modes may be floating, or both integer.
687 UNSIGNEDP is nonzero if X is an unsigned value.
688
689 This can be done by referring to a part of X in place
690 or by copying to a new temporary with conversion.
691
692 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
693
694 rtx
695 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
696 {
697 rtx temp;
698
699 /* If FROM is a SUBREG that indicates that we have already done at least
700 the required extension, strip it. */
701
702 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
703 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
704 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
705 x = gen_lowpart (mode, x);
706
707 if (GET_MODE (x) != VOIDmode)
708 oldmode = GET_MODE (x);
709
710 if (mode == oldmode)
711 return x;
712
713 /* There is one case that we must handle specially: If we are converting
714 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
715 we are to interpret the constant as unsigned, gen_lowpart will do
716 the wrong if the constant appears negative. What we want to do is
717 make the high-order word of the constant zero, not all ones. */
718
719 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
720 && GET_MODE_BITSIZE (mode) == HOST_BITS_PER_DOUBLE_INT
721 && CONST_INT_P (x) && INTVAL (x) < 0)
722 {
723 double_int val = double_int::from_uhwi (INTVAL (x));
724
725 /* We need to zero extend VAL. */
726 if (oldmode != VOIDmode)
727 val = val.zext (GET_MODE_BITSIZE (oldmode));
728
729 return immed_double_int_const (val, mode);
730 }
731
732 /* We can do this with a gen_lowpart if both desired and current modes
733 are integer, and this is either a constant integer, a register, or a
734 non-volatile MEM. Except for the constant case where MODE is no
735 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
736
737 if ((CONST_INT_P (x)
738 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
739 || (GET_MODE_CLASS (mode) == MODE_INT
740 && GET_MODE_CLASS (oldmode) == MODE_INT
741 && (CONST_DOUBLE_AS_INT_P (x)
742 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
743 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
744 && direct_load[(int) mode])
745 || (REG_P (x)
746 && (! HARD_REGISTER_P (x)
747 || HARD_REGNO_MODE_OK (REGNO (x), mode))
748 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
749 GET_MODE (x))))))))
750 {
751 /* ?? If we don't know OLDMODE, we have to assume here that
752 X does not need sign- or zero-extension. This may not be
753 the case, but it's the best we can do. */
754 if (CONST_INT_P (x) && oldmode != VOIDmode
755 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
756 {
757 HOST_WIDE_INT val = INTVAL (x);
758
759 /* We must sign or zero-extend in this case. Start by
760 zero-extending, then sign extend if we need to. */
761 val &= GET_MODE_MASK (oldmode);
762 if (! unsignedp
763 && val_signbit_known_set_p (oldmode, val))
764 val |= ~GET_MODE_MASK (oldmode);
765
766 return gen_int_mode (val, mode);
767 }
768
769 return gen_lowpart (mode, x);
770 }
771
772 /* Converting from integer constant into mode is always equivalent to an
773 subreg operation. */
774 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
775 {
776 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
777 return simplify_gen_subreg (mode, x, oldmode, 0);
778 }
779
780 temp = gen_reg_rtx (mode);
781 convert_move (temp, x, unsignedp);
782 return temp;
783 }
784 \f
785 /* Return the largest alignment we can use for doing a move (or store)
786 of MAX_PIECES. ALIGN is the largest alignment we could use. */
787
788 static unsigned int
789 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
790 {
791 enum machine_mode tmode;
792
793 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
794 if (align >= GET_MODE_ALIGNMENT (tmode))
795 align = GET_MODE_ALIGNMENT (tmode);
796 else
797 {
798 enum machine_mode tmode, xmode;
799
800 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
801 tmode != VOIDmode;
802 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
803 if (GET_MODE_SIZE (tmode) > max_pieces
804 || SLOW_UNALIGNED_ACCESS (tmode, align))
805 break;
806
807 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
808 }
809
810 return align;
811 }
812
813 /* Return the widest integer mode no wider than SIZE. If no such mode
814 can be found, return VOIDmode. */
815
816 static enum machine_mode
817 widest_int_mode_for_size (unsigned int size)
818 {
819 enum machine_mode tmode, mode = VOIDmode;
820
821 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
822 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
823 if (GET_MODE_SIZE (tmode) < size)
824 mode = tmode;
825
826 return mode;
827 }
828
829 /* STORE_MAX_PIECES is the number of bytes at a time that we can
830 store efficiently. Due to internal GCC limitations, this is
831 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
832 for an immediate constant. */
833
834 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
835
836 /* Determine whether the LEN bytes can be moved by using several move
837 instructions. Return nonzero if a call to move_by_pieces should
838 succeed. */
839
840 int
841 can_move_by_pieces (unsigned HOST_WIDE_INT len ATTRIBUTE_UNUSED,
842 unsigned int align ATTRIBUTE_UNUSED)
843 {
844 return MOVE_BY_PIECES_P (len, align);
845 }
846
847 /* Generate several move instructions to copy LEN bytes from block FROM to
848 block TO. (These are MEM rtx's with BLKmode).
849
850 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
851 used to push FROM to the stack.
852
853 ALIGN is maximum stack alignment we can assume.
854
855 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
856 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
857 stpcpy. */
858
859 rtx
860 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
861 unsigned int align, int endp)
862 {
863 struct move_by_pieces_d data;
864 enum machine_mode to_addr_mode;
865 enum machine_mode from_addr_mode = get_address_mode (from);
866 rtx to_addr, from_addr = XEXP (from, 0);
867 unsigned int max_size = MOVE_MAX_PIECES + 1;
868 enum insn_code icode;
869
870 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
871
872 data.offset = 0;
873 data.from_addr = from_addr;
874 if (to)
875 {
876 to_addr_mode = get_address_mode (to);
877 to_addr = XEXP (to, 0);
878 data.to = to;
879 data.autinc_to
880 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
881 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
882 data.reverse
883 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
884 }
885 else
886 {
887 to_addr_mode = VOIDmode;
888 to_addr = NULL_RTX;
889 data.to = NULL_RTX;
890 data.autinc_to = 1;
891 #ifdef STACK_GROWS_DOWNWARD
892 data.reverse = 1;
893 #else
894 data.reverse = 0;
895 #endif
896 }
897 data.to_addr = to_addr;
898 data.from = from;
899 data.autinc_from
900 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
901 || GET_CODE (from_addr) == POST_INC
902 || GET_CODE (from_addr) == POST_DEC);
903
904 data.explicit_inc_from = 0;
905 data.explicit_inc_to = 0;
906 if (data.reverse) data.offset = len;
907 data.len = len;
908
909 /* If copying requires more than two move insns,
910 copy addresses to registers (to make displacements shorter)
911 and use post-increment if available. */
912 if (!(data.autinc_from && data.autinc_to)
913 && move_by_pieces_ninsns (len, align, max_size) > 2)
914 {
915 /* Find the mode of the largest move...
916 MODE might not be used depending on the definitions of the
917 USE_* macros below. */
918 enum machine_mode mode ATTRIBUTE_UNUSED
919 = widest_int_mode_for_size (max_size);
920
921 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
922 {
923 data.from_addr = copy_to_mode_reg (from_addr_mode,
924 plus_constant (from_addr_mode,
925 from_addr, len));
926 data.autinc_from = 1;
927 data.explicit_inc_from = -1;
928 }
929 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
930 {
931 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
932 data.autinc_from = 1;
933 data.explicit_inc_from = 1;
934 }
935 if (!data.autinc_from && CONSTANT_P (from_addr))
936 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
937 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
938 {
939 data.to_addr = copy_to_mode_reg (to_addr_mode,
940 plus_constant (to_addr_mode,
941 to_addr, len));
942 data.autinc_to = 1;
943 data.explicit_inc_to = -1;
944 }
945 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
946 {
947 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
948 data.autinc_to = 1;
949 data.explicit_inc_to = 1;
950 }
951 if (!data.autinc_to && CONSTANT_P (to_addr))
952 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
953 }
954
955 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
956
957 /* First move what we can in the largest integer mode, then go to
958 successively smaller modes. */
959
960 while (max_size > 1 && data.len > 0)
961 {
962 enum machine_mode mode = widest_int_mode_for_size (max_size);
963
964 if (mode == VOIDmode)
965 break;
966
967 icode = optab_handler (mov_optab, mode);
968 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
969 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
970
971 max_size = GET_MODE_SIZE (mode);
972 }
973
974 /* The code above should have handled everything. */
975 gcc_assert (!data.len);
976
977 if (endp)
978 {
979 rtx to1;
980
981 gcc_assert (!data.reverse);
982 if (data.autinc_to)
983 {
984 if (endp == 2)
985 {
986 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
987 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
988 else
989 data.to_addr = copy_to_mode_reg (to_addr_mode,
990 plus_constant (to_addr_mode,
991 data.to_addr,
992 -1));
993 }
994 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
995 data.offset);
996 }
997 else
998 {
999 if (endp == 2)
1000 --data.offset;
1001 to1 = adjust_address (data.to, QImode, data.offset);
1002 }
1003 return to1;
1004 }
1005 else
1006 return data.to;
1007 }
1008
1009 /* Return number of insns required to move L bytes by pieces.
1010 ALIGN (in bits) is maximum alignment we can assume. */
1011
1012 unsigned HOST_WIDE_INT
1013 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1014 unsigned int max_size)
1015 {
1016 unsigned HOST_WIDE_INT n_insns = 0;
1017
1018 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1019
1020 while (max_size > 1 && l > 0)
1021 {
1022 enum machine_mode mode;
1023 enum insn_code icode;
1024
1025 mode = widest_int_mode_for_size (max_size);
1026
1027 if (mode == VOIDmode)
1028 break;
1029
1030 icode = optab_handler (mov_optab, mode);
1031 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1032 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1033
1034 max_size = GET_MODE_SIZE (mode);
1035 }
1036
1037 gcc_assert (!l);
1038 return n_insns;
1039 }
1040
1041 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1042 with move instructions for mode MODE. GENFUN is the gen_... function
1043 to make a move insn for that mode. DATA has all the other info. */
1044
1045 static void
1046 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1047 struct move_by_pieces_d *data)
1048 {
1049 unsigned int size = GET_MODE_SIZE (mode);
1050 rtx to1 = NULL_RTX, from1;
1051
1052 while (data->len >= size)
1053 {
1054 if (data->reverse)
1055 data->offset -= size;
1056
1057 if (data->to)
1058 {
1059 if (data->autinc_to)
1060 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1061 data->offset);
1062 else
1063 to1 = adjust_address (data->to, mode, data->offset);
1064 }
1065
1066 if (data->autinc_from)
1067 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1068 data->offset);
1069 else
1070 from1 = adjust_address (data->from, mode, data->offset);
1071
1072 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1073 emit_insn (gen_add2_insn (data->to_addr,
1074 GEN_INT (-(HOST_WIDE_INT)size)));
1075 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1076 emit_insn (gen_add2_insn (data->from_addr,
1077 GEN_INT (-(HOST_WIDE_INT)size)));
1078
1079 if (data->to)
1080 emit_insn ((*genfun) (to1, from1));
1081 else
1082 {
1083 #ifdef PUSH_ROUNDING
1084 emit_single_push_insn (mode, from1, NULL);
1085 #else
1086 gcc_unreachable ();
1087 #endif
1088 }
1089
1090 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1091 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1092 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1093 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1094
1095 if (! data->reverse)
1096 data->offset += size;
1097
1098 data->len -= size;
1099 }
1100 }
1101 \f
1102 /* Emit code to move a block Y to a block X. This may be done with
1103 string-move instructions, with multiple scalar move instructions,
1104 or with a library call.
1105
1106 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1107 SIZE is an rtx that says how long they are.
1108 ALIGN is the maximum alignment we can assume they have.
1109 METHOD describes what kind of copy this is, and what mechanisms may be used.
1110
1111 Return the address of the new block, if memcpy is called and returns it,
1112 0 otherwise. */
1113
1114 rtx
1115 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1116 unsigned int expected_align, HOST_WIDE_INT expected_size)
1117 {
1118 bool may_use_call;
1119 rtx retval = 0;
1120 unsigned int align;
1121
1122 gcc_assert (size);
1123 if (CONST_INT_P (size)
1124 && INTVAL (size) == 0)
1125 return 0;
1126
1127 switch (method)
1128 {
1129 case BLOCK_OP_NORMAL:
1130 case BLOCK_OP_TAILCALL:
1131 may_use_call = true;
1132 break;
1133
1134 case BLOCK_OP_CALL_PARM:
1135 may_use_call = block_move_libcall_safe_for_call_parm ();
1136
1137 /* Make inhibit_defer_pop nonzero around the library call
1138 to force it to pop the arguments right away. */
1139 NO_DEFER_POP;
1140 break;
1141
1142 case BLOCK_OP_NO_LIBCALL:
1143 may_use_call = false;
1144 break;
1145
1146 default:
1147 gcc_unreachable ();
1148 }
1149
1150 gcc_assert (MEM_P (x) && MEM_P (y));
1151 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1152 gcc_assert (align >= BITS_PER_UNIT);
1153
1154 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1155 block copy is more efficient for other large modes, e.g. DCmode. */
1156 x = adjust_address (x, BLKmode, 0);
1157 y = adjust_address (y, BLKmode, 0);
1158
1159 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1160 can be incorrect is coming from __builtin_memcpy. */
1161 if (CONST_INT_P (size))
1162 {
1163 x = shallow_copy_rtx (x);
1164 y = shallow_copy_rtx (y);
1165 set_mem_size (x, INTVAL (size));
1166 set_mem_size (y, INTVAL (size));
1167 }
1168
1169 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1170 move_by_pieces (x, y, INTVAL (size), align, 0);
1171 else if (emit_block_move_via_movmem (x, y, size, align,
1172 expected_align, expected_size))
1173 ;
1174 else if (may_use_call
1175 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1176 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1177 {
1178 /* Since x and y are passed to a libcall, mark the corresponding
1179 tree EXPR as addressable. */
1180 tree y_expr = MEM_EXPR (y);
1181 tree x_expr = MEM_EXPR (x);
1182 if (y_expr)
1183 mark_addressable (y_expr);
1184 if (x_expr)
1185 mark_addressable (x_expr);
1186 retval = emit_block_move_via_libcall (x, y, size,
1187 method == BLOCK_OP_TAILCALL);
1188 }
1189
1190 else
1191 emit_block_move_via_loop (x, y, size, align);
1192
1193 if (method == BLOCK_OP_CALL_PARM)
1194 OK_DEFER_POP;
1195
1196 return retval;
1197 }
1198
1199 rtx
1200 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1201 {
1202 return emit_block_move_hints (x, y, size, method, 0, -1);
1203 }
1204
1205 /* A subroutine of emit_block_move. Returns true if calling the
1206 block move libcall will not clobber any parameters which may have
1207 already been placed on the stack. */
1208
1209 static bool
1210 block_move_libcall_safe_for_call_parm (void)
1211 {
1212 #if defined (REG_PARM_STACK_SPACE)
1213 tree fn;
1214 #endif
1215
1216 /* If arguments are pushed on the stack, then they're safe. */
1217 if (PUSH_ARGS)
1218 return true;
1219
1220 /* If registers go on the stack anyway, any argument is sure to clobber
1221 an outgoing argument. */
1222 #if defined (REG_PARM_STACK_SPACE)
1223 fn = emit_block_move_libcall_fn (false);
1224 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1225 depend on its argument. */
1226 (void) fn;
1227 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1228 && REG_PARM_STACK_SPACE (fn) != 0)
1229 return false;
1230 #endif
1231
1232 /* If any argument goes in memory, then it might clobber an outgoing
1233 argument. */
1234 {
1235 CUMULATIVE_ARGS args_so_far_v;
1236 cumulative_args_t args_so_far;
1237 tree fn, arg;
1238
1239 fn = emit_block_move_libcall_fn (false);
1240 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1241 args_so_far = pack_cumulative_args (&args_so_far_v);
1242
1243 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1244 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1245 {
1246 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1247 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1248 NULL_TREE, true);
1249 if (!tmp || !REG_P (tmp))
1250 return false;
1251 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1252 return false;
1253 targetm.calls.function_arg_advance (args_so_far, mode,
1254 NULL_TREE, true);
1255 }
1256 }
1257 return true;
1258 }
1259
1260 /* A subroutine of emit_block_move. Expand a movmem pattern;
1261 return true if successful. */
1262
1263 static bool
1264 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1265 unsigned int expected_align, HOST_WIDE_INT expected_size)
1266 {
1267 int save_volatile_ok = volatile_ok;
1268 enum machine_mode mode;
1269
1270 if (expected_align < align)
1271 expected_align = align;
1272
1273 /* Since this is a move insn, we don't care about volatility. */
1274 volatile_ok = 1;
1275
1276 /* Try the most limited insn first, because there's no point
1277 including more than one in the machine description unless
1278 the more limited one has some advantage. */
1279
1280 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1281 mode = GET_MODE_WIDER_MODE (mode))
1282 {
1283 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1284
1285 if (code != CODE_FOR_nothing
1286 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1287 here because if SIZE is less than the mode mask, as it is
1288 returned by the macro, it will definitely be less than the
1289 actual mode mask. */
1290 && ((CONST_INT_P (size)
1291 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1292 <= (GET_MODE_MASK (mode) >> 1)))
1293 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1294 {
1295 struct expand_operand ops[6];
1296 unsigned int nops;
1297
1298 /* ??? When called via emit_block_move_for_call, it'd be
1299 nice if there were some way to inform the backend, so
1300 that it doesn't fail the expansion because it thinks
1301 emitting the libcall would be more efficient. */
1302 nops = insn_data[(int) code].n_generator_args;
1303 gcc_assert (nops == 4 || nops == 6);
1304
1305 create_fixed_operand (&ops[0], x);
1306 create_fixed_operand (&ops[1], y);
1307 /* The check above guarantees that this size conversion is valid. */
1308 create_convert_operand_to (&ops[2], size, mode, true);
1309 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1310 if (nops == 6)
1311 {
1312 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1313 create_integer_operand (&ops[5], expected_size);
1314 }
1315 if (maybe_expand_insn (code, nops, ops))
1316 {
1317 volatile_ok = save_volatile_ok;
1318 return true;
1319 }
1320 }
1321 }
1322
1323 volatile_ok = save_volatile_ok;
1324 return false;
1325 }
1326
1327 /* A subroutine of emit_block_move. Expand a call to memcpy.
1328 Return the return value from memcpy, 0 otherwise. */
1329
1330 rtx
1331 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1332 {
1333 rtx dst_addr, src_addr;
1334 tree call_expr, fn, src_tree, dst_tree, size_tree;
1335 enum machine_mode size_mode;
1336 rtx retval;
1337
1338 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1339 pseudos. We can then place those new pseudos into a VAR_DECL and
1340 use them later. */
1341
1342 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1343 src_addr = copy_addr_to_reg (XEXP (src, 0));
1344
1345 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1346 src_addr = convert_memory_address (ptr_mode, src_addr);
1347
1348 dst_tree = make_tree (ptr_type_node, dst_addr);
1349 src_tree = make_tree (ptr_type_node, src_addr);
1350
1351 size_mode = TYPE_MODE (sizetype);
1352
1353 size = convert_to_mode (size_mode, size, 1);
1354 size = copy_to_mode_reg (size_mode, size);
1355
1356 /* It is incorrect to use the libcall calling conventions to call
1357 memcpy in this context. This could be a user call to memcpy and
1358 the user may wish to examine the return value from memcpy. For
1359 targets where libcalls and normal calls have different conventions
1360 for returning pointers, we could end up generating incorrect code. */
1361
1362 size_tree = make_tree (sizetype, size);
1363
1364 fn = emit_block_move_libcall_fn (true);
1365 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1366 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1367
1368 retval = expand_normal (call_expr);
1369
1370 return retval;
1371 }
1372
1373 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1374 for the function we use for block copies. */
1375
1376 static GTY(()) tree block_move_fn;
1377
1378 void
1379 init_block_move_fn (const char *asmspec)
1380 {
1381 if (!block_move_fn)
1382 {
1383 tree args, fn, attrs, attr_args;
1384
1385 fn = get_identifier ("memcpy");
1386 args = build_function_type_list (ptr_type_node, ptr_type_node,
1387 const_ptr_type_node, sizetype,
1388 NULL_TREE);
1389
1390 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1391 DECL_EXTERNAL (fn) = 1;
1392 TREE_PUBLIC (fn) = 1;
1393 DECL_ARTIFICIAL (fn) = 1;
1394 TREE_NOTHROW (fn) = 1;
1395 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1396 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1397
1398 attr_args = build_tree_list (NULL_TREE, build_string (1, "1"));
1399 attrs = tree_cons (get_identifier ("fn spec"), attr_args, NULL);
1400
1401 decl_attributes (&fn, attrs, ATTR_FLAG_BUILT_IN);
1402
1403 block_move_fn = fn;
1404 }
1405
1406 if (asmspec)
1407 set_user_assembler_name (block_move_fn, asmspec);
1408 }
1409
1410 static tree
1411 emit_block_move_libcall_fn (int for_call)
1412 {
1413 static bool emitted_extern;
1414
1415 if (!block_move_fn)
1416 init_block_move_fn (NULL);
1417
1418 if (for_call && !emitted_extern)
1419 {
1420 emitted_extern = true;
1421 make_decl_rtl (block_move_fn);
1422 }
1423
1424 return block_move_fn;
1425 }
1426
1427 /* A subroutine of emit_block_move. Copy the data via an explicit
1428 loop. This is used only when libcalls are forbidden. */
1429 /* ??? It'd be nice to copy in hunks larger than QImode. */
1430
1431 static void
1432 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1433 unsigned int align ATTRIBUTE_UNUSED)
1434 {
1435 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1436 enum machine_mode x_addr_mode = get_address_mode (x);
1437 enum machine_mode y_addr_mode = get_address_mode (y);
1438 enum machine_mode iter_mode;
1439
1440 iter_mode = GET_MODE (size);
1441 if (iter_mode == VOIDmode)
1442 iter_mode = word_mode;
1443
1444 top_label = gen_label_rtx ();
1445 cmp_label = gen_label_rtx ();
1446 iter = gen_reg_rtx (iter_mode);
1447
1448 emit_move_insn (iter, const0_rtx);
1449
1450 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1451 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1452 do_pending_stack_adjust ();
1453
1454 emit_jump (cmp_label);
1455 emit_label (top_label);
1456
1457 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1458 x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp);
1459
1460 if (x_addr_mode != y_addr_mode)
1461 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1462 y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp);
1463
1464 x = change_address (x, QImode, x_addr);
1465 y = change_address (y, QImode, y_addr);
1466
1467 emit_move_insn (x, y);
1468
1469 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1470 true, OPTAB_LIB_WIDEN);
1471 if (tmp != iter)
1472 emit_move_insn (iter, tmp);
1473
1474 emit_label (cmp_label);
1475
1476 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1477 true, top_label, REG_BR_PROB_BASE * 90 / 100);
1478 }
1479 \f
1480 /* Copy all or part of a value X into registers starting at REGNO.
1481 The number of registers to be filled is NREGS. */
1482
1483 void
1484 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1485 {
1486 int i;
1487 #ifdef HAVE_load_multiple
1488 rtx pat;
1489 rtx last;
1490 #endif
1491
1492 if (nregs == 0)
1493 return;
1494
1495 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1496 x = validize_mem (force_const_mem (mode, x));
1497
1498 /* See if the machine can do this with a load multiple insn. */
1499 #ifdef HAVE_load_multiple
1500 if (HAVE_load_multiple)
1501 {
1502 last = get_last_insn ();
1503 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1504 GEN_INT (nregs));
1505 if (pat)
1506 {
1507 emit_insn (pat);
1508 return;
1509 }
1510 else
1511 delete_insns_since (last);
1512 }
1513 #endif
1514
1515 for (i = 0; i < nregs; i++)
1516 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1517 operand_subword_force (x, i, mode));
1518 }
1519
1520 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1521 The number of registers to be filled is NREGS. */
1522
1523 void
1524 move_block_from_reg (int regno, rtx x, int nregs)
1525 {
1526 int i;
1527
1528 if (nregs == 0)
1529 return;
1530
1531 /* See if the machine can do this with a store multiple insn. */
1532 #ifdef HAVE_store_multiple
1533 if (HAVE_store_multiple)
1534 {
1535 rtx last = get_last_insn ();
1536 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1537 GEN_INT (nregs));
1538 if (pat)
1539 {
1540 emit_insn (pat);
1541 return;
1542 }
1543 else
1544 delete_insns_since (last);
1545 }
1546 #endif
1547
1548 for (i = 0; i < nregs; i++)
1549 {
1550 rtx tem = operand_subword (x, i, 1, BLKmode);
1551
1552 gcc_assert (tem);
1553
1554 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1555 }
1556 }
1557
1558 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1559 ORIG, where ORIG is a non-consecutive group of registers represented by
1560 a PARALLEL. The clone is identical to the original except in that the
1561 original set of registers is replaced by a new set of pseudo registers.
1562 The new set has the same modes as the original set. */
1563
1564 rtx
1565 gen_group_rtx (rtx orig)
1566 {
1567 int i, length;
1568 rtx *tmps;
1569
1570 gcc_assert (GET_CODE (orig) == PARALLEL);
1571
1572 length = XVECLEN (orig, 0);
1573 tmps = XALLOCAVEC (rtx, length);
1574
1575 /* Skip a NULL entry in first slot. */
1576 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1577
1578 if (i)
1579 tmps[0] = 0;
1580
1581 for (; i < length; i++)
1582 {
1583 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1584 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1585
1586 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1587 }
1588
1589 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1590 }
1591
1592 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1593 except that values are placed in TMPS[i], and must later be moved
1594 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1595
1596 static void
1597 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1598 {
1599 rtx src;
1600 int start, i;
1601 enum machine_mode m = GET_MODE (orig_src);
1602
1603 gcc_assert (GET_CODE (dst) == PARALLEL);
1604
1605 if (m != VOIDmode
1606 && !SCALAR_INT_MODE_P (m)
1607 && !MEM_P (orig_src)
1608 && GET_CODE (orig_src) != CONCAT)
1609 {
1610 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1611 if (imode == BLKmode)
1612 src = assign_stack_temp (GET_MODE (orig_src), ssize);
1613 else
1614 src = gen_reg_rtx (imode);
1615 if (imode != BLKmode)
1616 src = gen_lowpart (GET_MODE (orig_src), src);
1617 emit_move_insn (src, orig_src);
1618 /* ...and back again. */
1619 if (imode != BLKmode)
1620 src = gen_lowpart (imode, src);
1621 emit_group_load_1 (tmps, dst, src, type, ssize);
1622 return;
1623 }
1624
1625 /* Check for a NULL entry, used to indicate that the parameter goes
1626 both on the stack and in registers. */
1627 if (XEXP (XVECEXP (dst, 0, 0), 0))
1628 start = 0;
1629 else
1630 start = 1;
1631
1632 /* Process the pieces. */
1633 for (i = start; i < XVECLEN (dst, 0); i++)
1634 {
1635 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1636 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1637 unsigned int bytelen = GET_MODE_SIZE (mode);
1638 int shift = 0;
1639
1640 /* Handle trailing fragments that run over the size of the struct. */
1641 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1642 {
1643 /* Arrange to shift the fragment to where it belongs.
1644 extract_bit_field loads to the lsb of the reg. */
1645 if (
1646 #ifdef BLOCK_REG_PADDING
1647 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1648 == (BYTES_BIG_ENDIAN ? upward : downward)
1649 #else
1650 BYTES_BIG_ENDIAN
1651 #endif
1652 )
1653 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1654 bytelen = ssize - bytepos;
1655 gcc_assert (bytelen > 0);
1656 }
1657
1658 /* If we won't be loading directly from memory, protect the real source
1659 from strange tricks we might play; but make sure that the source can
1660 be loaded directly into the destination. */
1661 src = orig_src;
1662 if (!MEM_P (orig_src)
1663 && (!CONSTANT_P (orig_src)
1664 || (GET_MODE (orig_src) != mode
1665 && GET_MODE (orig_src) != VOIDmode)))
1666 {
1667 if (GET_MODE (orig_src) == VOIDmode)
1668 src = gen_reg_rtx (mode);
1669 else
1670 src = gen_reg_rtx (GET_MODE (orig_src));
1671
1672 emit_move_insn (src, orig_src);
1673 }
1674
1675 /* Optimize the access just a bit. */
1676 if (MEM_P (src)
1677 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1678 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1679 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1680 && bytelen == GET_MODE_SIZE (mode))
1681 {
1682 tmps[i] = gen_reg_rtx (mode);
1683 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1684 }
1685 else if (COMPLEX_MODE_P (mode)
1686 && GET_MODE (src) == mode
1687 && bytelen == GET_MODE_SIZE (mode))
1688 /* Let emit_move_complex do the bulk of the work. */
1689 tmps[i] = src;
1690 else if (GET_CODE (src) == CONCAT)
1691 {
1692 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1693 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1694
1695 if ((bytepos == 0 && bytelen == slen0)
1696 || (bytepos != 0 && bytepos + bytelen <= slen))
1697 {
1698 /* The following assumes that the concatenated objects all
1699 have the same size. In this case, a simple calculation
1700 can be used to determine the object and the bit field
1701 to be extracted. */
1702 tmps[i] = XEXP (src, bytepos / slen0);
1703 if (! CONSTANT_P (tmps[i])
1704 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1705 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1706 (bytepos % slen0) * BITS_PER_UNIT,
1707 1, false, NULL_RTX, mode, mode);
1708 }
1709 else
1710 {
1711 rtx mem;
1712
1713 gcc_assert (!bytepos);
1714 mem = assign_stack_temp (GET_MODE (src), slen);
1715 emit_move_insn (mem, src);
1716 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1717 0, 1, false, NULL_RTX, mode, mode);
1718 }
1719 }
1720 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1721 SIMD register, which is currently broken. While we get GCC
1722 to emit proper RTL for these cases, let's dump to memory. */
1723 else if (VECTOR_MODE_P (GET_MODE (dst))
1724 && REG_P (src))
1725 {
1726 int slen = GET_MODE_SIZE (GET_MODE (src));
1727 rtx mem;
1728
1729 mem = assign_stack_temp (GET_MODE (src), slen);
1730 emit_move_insn (mem, src);
1731 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1732 }
1733 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1734 && XVECLEN (dst, 0) > 1)
1735 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1736 else if (CONSTANT_P (src))
1737 {
1738 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1739
1740 if (len == ssize)
1741 tmps[i] = src;
1742 else
1743 {
1744 rtx first, second;
1745
1746 gcc_assert (2 * len == ssize);
1747 split_double (src, &first, &second);
1748 if (i)
1749 tmps[i] = second;
1750 else
1751 tmps[i] = first;
1752 }
1753 }
1754 else if (REG_P (src) && GET_MODE (src) == mode)
1755 tmps[i] = src;
1756 else
1757 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1758 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1759 mode, mode);
1760
1761 if (shift)
1762 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1763 shift, tmps[i], 0);
1764 }
1765 }
1766
1767 /* Emit code to move a block SRC of type TYPE to a block DST,
1768 where DST is non-consecutive registers represented by a PARALLEL.
1769 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1770 if not known. */
1771
1772 void
1773 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1774 {
1775 rtx *tmps;
1776 int i;
1777
1778 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1779 emit_group_load_1 (tmps, dst, src, type, ssize);
1780
1781 /* Copy the extracted pieces into the proper (probable) hard regs. */
1782 for (i = 0; i < XVECLEN (dst, 0); i++)
1783 {
1784 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1785 if (d == NULL)
1786 continue;
1787 emit_move_insn (d, tmps[i]);
1788 }
1789 }
1790
1791 /* Similar, but load SRC into new pseudos in a format that looks like
1792 PARALLEL. This can later be fed to emit_group_move to get things
1793 in the right place. */
1794
1795 rtx
1796 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1797 {
1798 rtvec vec;
1799 int i;
1800
1801 vec = rtvec_alloc (XVECLEN (parallel, 0));
1802 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1803
1804 /* Convert the vector to look just like the original PARALLEL, except
1805 with the computed values. */
1806 for (i = 0; i < XVECLEN (parallel, 0); i++)
1807 {
1808 rtx e = XVECEXP (parallel, 0, i);
1809 rtx d = XEXP (e, 0);
1810
1811 if (d)
1812 {
1813 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1814 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1815 }
1816 RTVEC_ELT (vec, i) = e;
1817 }
1818
1819 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1820 }
1821
1822 /* Emit code to move a block SRC to block DST, where SRC and DST are
1823 non-consecutive groups of registers, each represented by a PARALLEL. */
1824
1825 void
1826 emit_group_move (rtx dst, rtx src)
1827 {
1828 int i;
1829
1830 gcc_assert (GET_CODE (src) == PARALLEL
1831 && GET_CODE (dst) == PARALLEL
1832 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1833
1834 /* Skip first entry if NULL. */
1835 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1836 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1837 XEXP (XVECEXP (src, 0, i), 0));
1838 }
1839
1840 /* Move a group of registers represented by a PARALLEL into pseudos. */
1841
1842 rtx
1843 emit_group_move_into_temps (rtx src)
1844 {
1845 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1846 int i;
1847
1848 for (i = 0; i < XVECLEN (src, 0); i++)
1849 {
1850 rtx e = XVECEXP (src, 0, i);
1851 rtx d = XEXP (e, 0);
1852
1853 if (d)
1854 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1855 RTVEC_ELT (vec, i) = e;
1856 }
1857
1858 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1859 }
1860
1861 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1862 where SRC is non-consecutive registers represented by a PARALLEL.
1863 SSIZE represents the total size of block ORIG_DST, or -1 if not
1864 known. */
1865
1866 void
1867 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1868 {
1869 rtx *tmps, dst;
1870 int start, finish, i;
1871 enum machine_mode m = GET_MODE (orig_dst);
1872
1873 gcc_assert (GET_CODE (src) == PARALLEL);
1874
1875 if (!SCALAR_INT_MODE_P (m)
1876 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1877 {
1878 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1879 if (imode == BLKmode)
1880 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
1881 else
1882 dst = gen_reg_rtx (imode);
1883 emit_group_store (dst, src, type, ssize);
1884 if (imode != BLKmode)
1885 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1886 emit_move_insn (orig_dst, dst);
1887 return;
1888 }
1889
1890 /* Check for a NULL entry, used to indicate that the parameter goes
1891 both on the stack and in registers. */
1892 if (XEXP (XVECEXP (src, 0, 0), 0))
1893 start = 0;
1894 else
1895 start = 1;
1896 finish = XVECLEN (src, 0);
1897
1898 tmps = XALLOCAVEC (rtx, finish);
1899
1900 /* Copy the (probable) hard regs into pseudos. */
1901 for (i = start; i < finish; i++)
1902 {
1903 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1904 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1905 {
1906 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1907 emit_move_insn (tmps[i], reg);
1908 }
1909 else
1910 tmps[i] = reg;
1911 }
1912
1913 /* If we won't be storing directly into memory, protect the real destination
1914 from strange tricks we might play. */
1915 dst = orig_dst;
1916 if (GET_CODE (dst) == PARALLEL)
1917 {
1918 rtx temp;
1919
1920 /* We can get a PARALLEL dst if there is a conditional expression in
1921 a return statement. In that case, the dst and src are the same,
1922 so no action is necessary. */
1923 if (rtx_equal_p (dst, src))
1924 return;
1925
1926 /* It is unclear if we can ever reach here, but we may as well handle
1927 it. Allocate a temporary, and split this into a store/load to/from
1928 the temporary. */
1929
1930 temp = assign_stack_temp (GET_MODE (dst), ssize);
1931 emit_group_store (temp, src, type, ssize);
1932 emit_group_load (dst, temp, type, ssize);
1933 return;
1934 }
1935 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1936 {
1937 enum machine_mode outer = GET_MODE (dst);
1938 enum machine_mode inner;
1939 HOST_WIDE_INT bytepos;
1940 bool done = false;
1941 rtx temp;
1942
1943 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1944 dst = gen_reg_rtx (outer);
1945
1946 /* Make life a bit easier for combine. */
1947 /* If the first element of the vector is the low part
1948 of the destination mode, use a paradoxical subreg to
1949 initialize the destination. */
1950 if (start < finish)
1951 {
1952 inner = GET_MODE (tmps[start]);
1953 bytepos = subreg_lowpart_offset (inner, outer);
1954 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1955 {
1956 temp = simplify_gen_subreg (outer, tmps[start],
1957 inner, 0);
1958 if (temp)
1959 {
1960 emit_move_insn (dst, temp);
1961 done = true;
1962 start++;
1963 }
1964 }
1965 }
1966
1967 /* If the first element wasn't the low part, try the last. */
1968 if (!done
1969 && start < finish - 1)
1970 {
1971 inner = GET_MODE (tmps[finish - 1]);
1972 bytepos = subreg_lowpart_offset (inner, outer);
1973 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1974 {
1975 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1976 inner, 0);
1977 if (temp)
1978 {
1979 emit_move_insn (dst, temp);
1980 done = true;
1981 finish--;
1982 }
1983 }
1984 }
1985
1986 /* Otherwise, simply initialize the result to zero. */
1987 if (!done)
1988 emit_move_insn (dst, CONST0_RTX (outer));
1989 }
1990
1991 /* Process the pieces. */
1992 for (i = start; i < finish; i++)
1993 {
1994 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
1995 enum machine_mode mode = GET_MODE (tmps[i]);
1996 unsigned int bytelen = GET_MODE_SIZE (mode);
1997 unsigned int adj_bytelen = bytelen;
1998 rtx dest = dst;
1999
2000 /* Handle trailing fragments that run over the size of the struct. */
2001 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2002 adj_bytelen = ssize - bytepos;
2003
2004 if (GET_CODE (dst) == CONCAT)
2005 {
2006 if (bytepos + adj_bytelen
2007 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2008 dest = XEXP (dst, 0);
2009 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2010 {
2011 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2012 dest = XEXP (dst, 1);
2013 }
2014 else
2015 {
2016 enum machine_mode dest_mode = GET_MODE (dest);
2017 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2018
2019 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2020
2021 if (GET_MODE_ALIGNMENT (dest_mode)
2022 >= GET_MODE_ALIGNMENT (tmp_mode))
2023 {
2024 dest = assign_stack_temp (dest_mode,
2025 GET_MODE_SIZE (dest_mode));
2026 emit_move_insn (adjust_address (dest,
2027 tmp_mode,
2028 bytepos),
2029 tmps[i]);
2030 dst = dest;
2031 }
2032 else
2033 {
2034 dest = assign_stack_temp (tmp_mode,
2035 GET_MODE_SIZE (tmp_mode));
2036 emit_move_insn (dest, tmps[i]);
2037 dst = adjust_address (dest, dest_mode, bytepos);
2038 }
2039 break;
2040 }
2041 }
2042
2043 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2044 {
2045 /* store_bit_field always takes its value from the lsb.
2046 Move the fragment to the lsb if it's not already there. */
2047 if (
2048 #ifdef BLOCK_REG_PADDING
2049 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2050 == (BYTES_BIG_ENDIAN ? upward : downward)
2051 #else
2052 BYTES_BIG_ENDIAN
2053 #endif
2054 )
2055 {
2056 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2057 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2058 shift, tmps[i], 0);
2059 }
2060 bytelen = adj_bytelen;
2061 }
2062
2063 /* Optimize the access just a bit. */
2064 if (MEM_P (dest)
2065 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2066 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2067 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2068 && bytelen == GET_MODE_SIZE (mode))
2069 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2070 else
2071 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2072 0, 0, mode, tmps[i]);
2073 }
2074
2075 /* Copy from the pseudo into the (probable) hard reg. */
2076 if (orig_dst != dst)
2077 emit_move_insn (orig_dst, dst);
2078 }
2079
2080 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2081 of the value stored in X. */
2082
2083 rtx
2084 maybe_emit_group_store (rtx x, tree type)
2085 {
2086 enum machine_mode mode = TYPE_MODE (type);
2087 gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode);
2088 if (GET_CODE (x) == PARALLEL)
2089 {
2090 rtx result = gen_reg_rtx (mode);
2091 emit_group_store (result, x, type, int_size_in_bytes (type));
2092 return result;
2093 }
2094 return x;
2095 }
2096
2097 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2098
2099 This is used on targets that return BLKmode values in registers. */
2100
2101 void
2102 copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
2103 {
2104 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2105 rtx src = NULL, dst = NULL;
2106 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2107 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2108 enum machine_mode mode = GET_MODE (srcreg);
2109 enum machine_mode tmode = GET_MODE (target);
2110 enum machine_mode copy_mode;
2111
2112 /* BLKmode registers created in the back-end shouldn't have survived. */
2113 gcc_assert (mode != BLKmode);
2114
2115 /* If the structure doesn't take up a whole number of words, see whether
2116 SRCREG is padded on the left or on the right. If it's on the left,
2117 set PADDING_CORRECTION to the number of bits to skip.
2118
2119 In most ABIs, the structure will be returned at the least end of
2120 the register, which translates to right padding on little-endian
2121 targets and left padding on big-endian targets. The opposite
2122 holds if the structure is returned at the most significant
2123 end of the register. */
2124 if (bytes % UNITS_PER_WORD != 0
2125 && (targetm.calls.return_in_msb (type)
2126 ? !BYTES_BIG_ENDIAN
2127 : BYTES_BIG_ENDIAN))
2128 padding_correction
2129 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2130
2131 /* We can use a single move if we have an exact mode for the size. */
2132 else if (MEM_P (target)
2133 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target))
2134 || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode))
2135 && bytes == GET_MODE_SIZE (mode))
2136 {
2137 emit_move_insn (adjust_address (target, mode, 0), srcreg);
2138 return;
2139 }
2140
2141 /* And if we additionally have the same mode for a register. */
2142 else if (REG_P (target)
2143 && GET_MODE (target) == mode
2144 && bytes == GET_MODE_SIZE (mode))
2145 {
2146 emit_move_insn (target, srcreg);
2147 return;
2148 }
2149
2150 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2151 into a new pseudo which is a full word. */
2152 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
2153 {
2154 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2155 mode = word_mode;
2156 }
2157
2158 /* Copy the structure BITSIZE bits at a time. If the target lives in
2159 memory, take care of not reading/writing past its end by selecting
2160 a copy mode suited to BITSIZE. This should always be possible given
2161 how it is computed.
2162
2163 If the target lives in register, make sure not to select a copy mode
2164 larger than the mode of the register.
2165
2166 We could probably emit more efficient code for machines which do not use
2167 strict alignment, but it doesn't seem worth the effort at the current
2168 time. */
2169
2170 copy_mode = word_mode;
2171 if (MEM_P (target))
2172 {
2173 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2174 if (mem_mode != BLKmode)
2175 copy_mode = mem_mode;
2176 }
2177 else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2178 copy_mode = tmode;
2179
2180 for (bitpos = 0, xbitpos = padding_correction;
2181 bitpos < bytes * BITS_PER_UNIT;
2182 bitpos += bitsize, xbitpos += bitsize)
2183 {
2184 /* We need a new source operand each time xbitpos is on a
2185 word boundary and when xbitpos == padding_correction
2186 (the first time through). */
2187 if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction)
2188 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode);
2189
2190 /* We need a new destination operand each time bitpos is on
2191 a word boundary. */
2192 if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2193 dst = target;
2194 else if (bitpos % BITS_PER_WORD == 0)
2195 dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode);
2196
2197 /* Use xbitpos for the source extraction (right justified) and
2198 bitpos for the destination store (left justified). */
2199 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2200 extract_bit_field (src, bitsize,
2201 xbitpos % BITS_PER_WORD, 1, false,
2202 NULL_RTX, copy_mode, copy_mode));
2203 }
2204 }
2205
2206 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2207 register if it contains any data, otherwise return null.
2208
2209 This is used on targets that return BLKmode values in registers. */
2210
2211 rtx
2212 copy_blkmode_to_reg (enum machine_mode mode, tree src)
2213 {
2214 int i, n_regs;
2215 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2216 unsigned int bitsize;
2217 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2218 enum machine_mode dst_mode;
2219
2220 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2221
2222 x = expand_normal (src);
2223
2224 bytes = int_size_in_bytes (TREE_TYPE (src));
2225 if (bytes == 0)
2226 return NULL_RTX;
2227
2228 /* If the structure doesn't take up a whole number of words, see
2229 whether the register value should be padded on the left or on
2230 the right. Set PADDING_CORRECTION to the number of padding
2231 bits needed on the left side.
2232
2233 In most ABIs, the structure will be returned at the least end of
2234 the register, which translates to right padding on little-endian
2235 targets and left padding on big-endian targets. The opposite
2236 holds if the structure is returned at the most significant
2237 end of the register. */
2238 if (bytes % UNITS_PER_WORD != 0
2239 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2240 ? !BYTES_BIG_ENDIAN
2241 : BYTES_BIG_ENDIAN))
2242 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2243 * BITS_PER_UNIT));
2244
2245 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2246 dst_words = XALLOCAVEC (rtx, n_regs);
2247 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2248
2249 /* Copy the structure BITSIZE bits at a time. */
2250 for (bitpos = 0, xbitpos = padding_correction;
2251 bitpos < bytes * BITS_PER_UNIT;
2252 bitpos += bitsize, xbitpos += bitsize)
2253 {
2254 /* We need a new destination pseudo each time xbitpos is
2255 on a word boundary and when xbitpos == padding_correction
2256 (the first time through). */
2257 if (xbitpos % BITS_PER_WORD == 0
2258 || xbitpos == padding_correction)
2259 {
2260 /* Generate an appropriate register. */
2261 dst_word = gen_reg_rtx (word_mode);
2262 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2263
2264 /* Clear the destination before we move anything into it. */
2265 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2266 }
2267
2268 /* We need a new source operand each time bitpos is on a word
2269 boundary. */
2270 if (bitpos % BITS_PER_WORD == 0)
2271 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2272
2273 /* Use bitpos for the source extraction (left justified) and
2274 xbitpos for the destination store (right justified). */
2275 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2276 0, 0, word_mode,
2277 extract_bit_field (src_word, bitsize,
2278 bitpos % BITS_PER_WORD, 1, false,
2279 NULL_RTX, word_mode, word_mode));
2280 }
2281
2282 if (mode == BLKmode)
2283 {
2284 /* Find the smallest integer mode large enough to hold the
2285 entire structure. */
2286 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2287 mode != VOIDmode;
2288 mode = GET_MODE_WIDER_MODE (mode))
2289 /* Have we found a large enough mode? */
2290 if (GET_MODE_SIZE (mode) >= bytes)
2291 break;
2292
2293 /* A suitable mode should have been found. */
2294 gcc_assert (mode != VOIDmode);
2295 }
2296
2297 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2298 dst_mode = word_mode;
2299 else
2300 dst_mode = mode;
2301 dst = gen_reg_rtx (dst_mode);
2302
2303 for (i = 0; i < n_regs; i++)
2304 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2305
2306 if (mode != dst_mode)
2307 dst = gen_lowpart (mode, dst);
2308
2309 return dst;
2310 }
2311
2312 /* Add a USE expression for REG to the (possibly empty) list pointed
2313 to by CALL_FUSAGE. REG must denote a hard register. */
2314
2315 void
2316 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2317 {
2318 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2319
2320 *call_fusage
2321 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2322 }
2323
2324 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2325 starting at REGNO. All of these registers must be hard registers. */
2326
2327 void
2328 use_regs (rtx *call_fusage, int regno, int nregs)
2329 {
2330 int i;
2331
2332 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2333
2334 for (i = 0; i < nregs; i++)
2335 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2336 }
2337
2338 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2339 PARALLEL REGS. This is for calls that pass values in multiple
2340 non-contiguous locations. The Irix 6 ABI has examples of this. */
2341
2342 void
2343 use_group_regs (rtx *call_fusage, rtx regs)
2344 {
2345 int i;
2346
2347 for (i = 0; i < XVECLEN (regs, 0); i++)
2348 {
2349 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2350
2351 /* A NULL entry means the parameter goes both on the stack and in
2352 registers. This can also be a MEM for targets that pass values
2353 partially on the stack and partially in registers. */
2354 if (reg != 0 && REG_P (reg))
2355 use_reg (call_fusage, reg);
2356 }
2357 }
2358
2359 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2360 assigment and the code of the expresion on the RHS is CODE. Return
2361 NULL otherwise. */
2362
2363 static gimple
2364 get_def_for_expr (tree name, enum tree_code code)
2365 {
2366 gimple def_stmt;
2367
2368 if (TREE_CODE (name) != SSA_NAME)
2369 return NULL;
2370
2371 def_stmt = get_gimple_for_ssa_name (name);
2372 if (!def_stmt
2373 || gimple_assign_rhs_code (def_stmt) != code)
2374 return NULL;
2375
2376 return def_stmt;
2377 }
2378
2379 #ifdef HAVE_conditional_move
2380 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2381 assigment and the class of the expresion on the RHS is CLASS. Return
2382 NULL otherwise. */
2383
2384 static gimple
2385 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2386 {
2387 gimple def_stmt;
2388
2389 if (TREE_CODE (name) != SSA_NAME)
2390 return NULL;
2391
2392 def_stmt = get_gimple_for_ssa_name (name);
2393 if (!def_stmt
2394 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2395 return NULL;
2396
2397 return def_stmt;
2398 }
2399 #endif
2400 \f
2401
2402 /* Determine whether the LEN bytes generated by CONSTFUN can be
2403 stored to memory using several move instructions. CONSTFUNDATA is
2404 a pointer which will be passed as argument in every CONSTFUN call.
2405 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2406 a memset operation and false if it's a copy of a constant string.
2407 Return nonzero if a call to store_by_pieces should succeed. */
2408
2409 int
2410 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2411 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2412 void *constfundata, unsigned int align, bool memsetp)
2413 {
2414 unsigned HOST_WIDE_INT l;
2415 unsigned int max_size;
2416 HOST_WIDE_INT offset = 0;
2417 enum machine_mode mode;
2418 enum insn_code icode;
2419 int reverse;
2420 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2421 rtx cst ATTRIBUTE_UNUSED;
2422
2423 if (len == 0)
2424 return 1;
2425
2426 if (! (memsetp
2427 ? SET_BY_PIECES_P (len, align)
2428 : STORE_BY_PIECES_P (len, align)))
2429 return 0;
2430
2431 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2432
2433 /* We would first store what we can in the largest integer mode, then go to
2434 successively smaller modes. */
2435
2436 for (reverse = 0;
2437 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2438 reverse++)
2439 {
2440 l = len;
2441 max_size = STORE_MAX_PIECES + 1;
2442 while (max_size > 1 && l > 0)
2443 {
2444 mode = widest_int_mode_for_size (max_size);
2445
2446 if (mode == VOIDmode)
2447 break;
2448
2449 icode = optab_handler (mov_optab, mode);
2450 if (icode != CODE_FOR_nothing
2451 && align >= GET_MODE_ALIGNMENT (mode))
2452 {
2453 unsigned int size = GET_MODE_SIZE (mode);
2454
2455 while (l >= size)
2456 {
2457 if (reverse)
2458 offset -= size;
2459
2460 cst = (*constfun) (constfundata, offset, mode);
2461 if (!targetm.legitimate_constant_p (mode, cst))
2462 return 0;
2463
2464 if (!reverse)
2465 offset += size;
2466
2467 l -= size;
2468 }
2469 }
2470
2471 max_size = GET_MODE_SIZE (mode);
2472 }
2473
2474 /* The code above should have handled everything. */
2475 gcc_assert (!l);
2476 }
2477
2478 return 1;
2479 }
2480
2481 /* Generate several move instructions to store LEN bytes generated by
2482 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2483 pointer which will be passed as argument in every CONSTFUN call.
2484 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2485 a memset operation and false if it's a copy of a constant string.
2486 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2487 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2488 stpcpy. */
2489
2490 rtx
2491 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2492 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2493 void *constfundata, unsigned int align, bool memsetp, int endp)
2494 {
2495 enum machine_mode to_addr_mode = get_address_mode (to);
2496 struct store_by_pieces_d data;
2497
2498 if (len == 0)
2499 {
2500 gcc_assert (endp != 2);
2501 return to;
2502 }
2503
2504 gcc_assert (memsetp
2505 ? SET_BY_PIECES_P (len, align)
2506 : STORE_BY_PIECES_P (len, align));
2507 data.constfun = constfun;
2508 data.constfundata = constfundata;
2509 data.len = len;
2510 data.to = to;
2511 store_by_pieces_1 (&data, align);
2512 if (endp)
2513 {
2514 rtx to1;
2515
2516 gcc_assert (!data.reverse);
2517 if (data.autinc_to)
2518 {
2519 if (endp == 2)
2520 {
2521 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2522 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2523 else
2524 data.to_addr = copy_to_mode_reg (to_addr_mode,
2525 plus_constant (to_addr_mode,
2526 data.to_addr,
2527 -1));
2528 }
2529 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2530 data.offset);
2531 }
2532 else
2533 {
2534 if (endp == 2)
2535 --data.offset;
2536 to1 = adjust_address (data.to, QImode, data.offset);
2537 }
2538 return to1;
2539 }
2540 else
2541 return data.to;
2542 }
2543
2544 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2545 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2546
2547 static void
2548 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2549 {
2550 struct store_by_pieces_d data;
2551
2552 if (len == 0)
2553 return;
2554
2555 data.constfun = clear_by_pieces_1;
2556 data.constfundata = NULL;
2557 data.len = len;
2558 data.to = to;
2559 store_by_pieces_1 (&data, align);
2560 }
2561
2562 /* Callback routine for clear_by_pieces.
2563 Return const0_rtx unconditionally. */
2564
2565 static rtx
2566 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2567 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2568 enum machine_mode mode ATTRIBUTE_UNUSED)
2569 {
2570 return const0_rtx;
2571 }
2572
2573 /* Subroutine of clear_by_pieces and store_by_pieces.
2574 Generate several move instructions to store LEN bytes of block TO. (A MEM
2575 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2576
2577 static void
2578 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2579 unsigned int align ATTRIBUTE_UNUSED)
2580 {
2581 enum machine_mode to_addr_mode = get_address_mode (data->to);
2582 rtx to_addr = XEXP (data->to, 0);
2583 unsigned int max_size = STORE_MAX_PIECES + 1;
2584 enum insn_code icode;
2585
2586 data->offset = 0;
2587 data->to_addr = to_addr;
2588 data->autinc_to
2589 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2590 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2591
2592 data->explicit_inc_to = 0;
2593 data->reverse
2594 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2595 if (data->reverse)
2596 data->offset = data->len;
2597
2598 /* If storing requires more than two move insns,
2599 copy addresses to registers (to make displacements shorter)
2600 and use post-increment if available. */
2601 if (!data->autinc_to
2602 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2603 {
2604 /* Determine the main mode we'll be using.
2605 MODE might not be used depending on the definitions of the
2606 USE_* macros below. */
2607 enum machine_mode mode ATTRIBUTE_UNUSED
2608 = widest_int_mode_for_size (max_size);
2609
2610 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2611 {
2612 data->to_addr = copy_to_mode_reg (to_addr_mode,
2613 plus_constant (to_addr_mode,
2614 to_addr,
2615 data->len));
2616 data->autinc_to = 1;
2617 data->explicit_inc_to = -1;
2618 }
2619
2620 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2621 && ! data->autinc_to)
2622 {
2623 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2624 data->autinc_to = 1;
2625 data->explicit_inc_to = 1;
2626 }
2627
2628 if ( !data->autinc_to && CONSTANT_P (to_addr))
2629 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2630 }
2631
2632 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2633
2634 /* First store what we can in the largest integer mode, then go to
2635 successively smaller modes. */
2636
2637 while (max_size > 1 && data->len > 0)
2638 {
2639 enum machine_mode mode = widest_int_mode_for_size (max_size);
2640
2641 if (mode == VOIDmode)
2642 break;
2643
2644 icode = optab_handler (mov_optab, mode);
2645 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2646 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2647
2648 max_size = GET_MODE_SIZE (mode);
2649 }
2650
2651 /* The code above should have handled everything. */
2652 gcc_assert (!data->len);
2653 }
2654
2655 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2656 with move instructions for mode MODE. GENFUN is the gen_... function
2657 to make a move insn for that mode. DATA has all the other info. */
2658
2659 static void
2660 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2661 struct store_by_pieces_d *data)
2662 {
2663 unsigned int size = GET_MODE_SIZE (mode);
2664 rtx to1, cst;
2665
2666 while (data->len >= size)
2667 {
2668 if (data->reverse)
2669 data->offset -= size;
2670
2671 if (data->autinc_to)
2672 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2673 data->offset);
2674 else
2675 to1 = adjust_address (data->to, mode, data->offset);
2676
2677 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2678 emit_insn (gen_add2_insn (data->to_addr,
2679 GEN_INT (-(HOST_WIDE_INT) size)));
2680
2681 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2682 emit_insn ((*genfun) (to1, cst));
2683
2684 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2685 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2686
2687 if (! data->reverse)
2688 data->offset += size;
2689
2690 data->len -= size;
2691 }
2692 }
2693 \f
2694 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2695 its length in bytes. */
2696
2697 rtx
2698 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2699 unsigned int expected_align, HOST_WIDE_INT expected_size)
2700 {
2701 enum machine_mode mode = GET_MODE (object);
2702 unsigned int align;
2703
2704 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2705
2706 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2707 just move a zero. Otherwise, do this a piece at a time. */
2708 if (mode != BLKmode
2709 && CONST_INT_P (size)
2710 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2711 {
2712 rtx zero = CONST0_RTX (mode);
2713 if (zero != NULL)
2714 {
2715 emit_move_insn (object, zero);
2716 return NULL;
2717 }
2718
2719 if (COMPLEX_MODE_P (mode))
2720 {
2721 zero = CONST0_RTX (GET_MODE_INNER (mode));
2722 if (zero != NULL)
2723 {
2724 write_complex_part (object, zero, 0);
2725 write_complex_part (object, zero, 1);
2726 return NULL;
2727 }
2728 }
2729 }
2730
2731 if (size == const0_rtx)
2732 return NULL;
2733
2734 align = MEM_ALIGN (object);
2735
2736 if (CONST_INT_P (size)
2737 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2738 clear_by_pieces (object, INTVAL (size), align);
2739 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2740 expected_align, expected_size))
2741 ;
2742 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2743 return set_storage_via_libcall (object, size, const0_rtx,
2744 method == BLOCK_OP_TAILCALL);
2745 else
2746 gcc_unreachable ();
2747
2748 return NULL;
2749 }
2750
2751 rtx
2752 clear_storage (rtx object, rtx size, enum block_op_methods method)
2753 {
2754 return clear_storage_hints (object, size, method, 0, -1);
2755 }
2756
2757
2758 /* A subroutine of clear_storage. Expand a call to memset.
2759 Return the return value of memset, 0 otherwise. */
2760
2761 rtx
2762 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2763 {
2764 tree call_expr, fn, object_tree, size_tree, val_tree;
2765 enum machine_mode size_mode;
2766 rtx retval;
2767
2768 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2769 place those into new pseudos into a VAR_DECL and use them later. */
2770
2771 object = copy_addr_to_reg (XEXP (object, 0));
2772
2773 size_mode = TYPE_MODE (sizetype);
2774 size = convert_to_mode (size_mode, size, 1);
2775 size = copy_to_mode_reg (size_mode, size);
2776
2777 /* It is incorrect to use the libcall calling conventions to call
2778 memset in this context. This could be a user call to memset and
2779 the user may wish to examine the return value from memset. For
2780 targets where libcalls and normal calls have different conventions
2781 for returning pointers, we could end up generating incorrect code. */
2782
2783 object_tree = make_tree (ptr_type_node, object);
2784 if (!CONST_INT_P (val))
2785 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2786 size_tree = make_tree (sizetype, size);
2787 val_tree = make_tree (integer_type_node, val);
2788
2789 fn = clear_storage_libcall_fn (true);
2790 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2791 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2792
2793 retval = expand_normal (call_expr);
2794
2795 return retval;
2796 }
2797
2798 /* A subroutine of set_storage_via_libcall. Create the tree node
2799 for the function we use for block clears. */
2800
2801 tree block_clear_fn;
2802
2803 void
2804 init_block_clear_fn (const char *asmspec)
2805 {
2806 if (!block_clear_fn)
2807 {
2808 tree fn, args;
2809
2810 fn = get_identifier ("memset");
2811 args = build_function_type_list (ptr_type_node, ptr_type_node,
2812 integer_type_node, sizetype,
2813 NULL_TREE);
2814
2815 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2816 DECL_EXTERNAL (fn) = 1;
2817 TREE_PUBLIC (fn) = 1;
2818 DECL_ARTIFICIAL (fn) = 1;
2819 TREE_NOTHROW (fn) = 1;
2820 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2821 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2822
2823 block_clear_fn = fn;
2824 }
2825
2826 if (asmspec)
2827 set_user_assembler_name (block_clear_fn, asmspec);
2828 }
2829
2830 static tree
2831 clear_storage_libcall_fn (int for_call)
2832 {
2833 static bool emitted_extern;
2834
2835 if (!block_clear_fn)
2836 init_block_clear_fn (NULL);
2837
2838 if (for_call && !emitted_extern)
2839 {
2840 emitted_extern = true;
2841 make_decl_rtl (block_clear_fn);
2842 }
2843
2844 return block_clear_fn;
2845 }
2846 \f
2847 /* Expand a setmem pattern; return true if successful. */
2848
2849 bool
2850 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2851 unsigned int expected_align, HOST_WIDE_INT expected_size)
2852 {
2853 /* Try the most limited insn first, because there's no point
2854 including more than one in the machine description unless
2855 the more limited one has some advantage. */
2856
2857 enum machine_mode mode;
2858
2859 if (expected_align < align)
2860 expected_align = align;
2861
2862 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2863 mode = GET_MODE_WIDER_MODE (mode))
2864 {
2865 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2866
2867 if (code != CODE_FOR_nothing
2868 /* We don't need MODE to be narrower than
2869 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2870 the mode mask, as it is returned by the macro, it will
2871 definitely be less than the actual mode mask. */
2872 && ((CONST_INT_P (size)
2873 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2874 <= (GET_MODE_MASK (mode) >> 1)))
2875 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2876 {
2877 struct expand_operand ops[6];
2878 unsigned int nops;
2879
2880 nops = insn_data[(int) code].n_generator_args;
2881 gcc_assert (nops == 4 || nops == 6);
2882
2883 create_fixed_operand (&ops[0], object);
2884 /* The check above guarantees that this size conversion is valid. */
2885 create_convert_operand_to (&ops[1], size, mode, true);
2886 create_convert_operand_from (&ops[2], val, byte_mode, true);
2887 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2888 if (nops == 6)
2889 {
2890 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2891 create_integer_operand (&ops[5], expected_size);
2892 }
2893 if (maybe_expand_insn (code, nops, ops))
2894 return true;
2895 }
2896 }
2897
2898 return false;
2899 }
2900
2901 \f
2902 /* Write to one of the components of the complex value CPLX. Write VAL to
2903 the real part if IMAG_P is false, and the imaginary part if its true. */
2904
2905 static void
2906 write_complex_part (rtx cplx, rtx val, bool imag_p)
2907 {
2908 enum machine_mode cmode;
2909 enum machine_mode imode;
2910 unsigned ibitsize;
2911
2912 if (GET_CODE (cplx) == CONCAT)
2913 {
2914 emit_move_insn (XEXP (cplx, imag_p), val);
2915 return;
2916 }
2917
2918 cmode = GET_MODE (cplx);
2919 imode = GET_MODE_INNER (cmode);
2920 ibitsize = GET_MODE_BITSIZE (imode);
2921
2922 /* For MEMs simplify_gen_subreg may generate an invalid new address
2923 because, e.g., the original address is considered mode-dependent
2924 by the target, which restricts simplify_subreg from invoking
2925 adjust_address_nv. Instead of preparing fallback support for an
2926 invalid address, we call adjust_address_nv directly. */
2927 if (MEM_P (cplx))
2928 {
2929 emit_move_insn (adjust_address_nv (cplx, imode,
2930 imag_p ? GET_MODE_SIZE (imode) : 0),
2931 val);
2932 return;
2933 }
2934
2935 /* If the sub-object is at least word sized, then we know that subregging
2936 will work. This special case is important, since store_bit_field
2937 wants to operate on integer modes, and there's rarely an OImode to
2938 correspond to TCmode. */
2939 if (ibitsize >= BITS_PER_WORD
2940 /* For hard regs we have exact predicates. Assume we can split
2941 the original object if it spans an even number of hard regs.
2942 This special case is important for SCmode on 64-bit platforms
2943 where the natural size of floating-point regs is 32-bit. */
2944 || (REG_P (cplx)
2945 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2946 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2947 {
2948 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2949 imag_p ? GET_MODE_SIZE (imode) : 0);
2950 if (part)
2951 {
2952 emit_move_insn (part, val);
2953 return;
2954 }
2955 else
2956 /* simplify_gen_subreg may fail for sub-word MEMs. */
2957 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2958 }
2959
2960 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2961 }
2962
2963 /* Extract one of the components of the complex value CPLX. Extract the
2964 real part if IMAG_P is false, and the imaginary part if it's true. */
2965
2966 static rtx
2967 read_complex_part (rtx cplx, bool imag_p)
2968 {
2969 enum machine_mode cmode, imode;
2970 unsigned ibitsize;
2971
2972 if (GET_CODE (cplx) == CONCAT)
2973 return XEXP (cplx, imag_p);
2974
2975 cmode = GET_MODE (cplx);
2976 imode = GET_MODE_INNER (cmode);
2977 ibitsize = GET_MODE_BITSIZE (imode);
2978
2979 /* Special case reads from complex constants that got spilled to memory. */
2980 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2981 {
2982 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2983 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2984 {
2985 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2986 if (CONSTANT_CLASS_P (part))
2987 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2988 }
2989 }
2990
2991 /* For MEMs simplify_gen_subreg may generate an invalid new address
2992 because, e.g., the original address is considered mode-dependent
2993 by the target, which restricts simplify_subreg from invoking
2994 adjust_address_nv. Instead of preparing fallback support for an
2995 invalid address, we call adjust_address_nv directly. */
2996 if (MEM_P (cplx))
2997 return adjust_address_nv (cplx, imode,
2998 imag_p ? GET_MODE_SIZE (imode) : 0);
2999
3000 /* If the sub-object is at least word sized, then we know that subregging
3001 will work. This special case is important, since extract_bit_field
3002 wants to operate on integer modes, and there's rarely an OImode to
3003 correspond to TCmode. */
3004 if (ibitsize >= BITS_PER_WORD
3005 /* For hard regs we have exact predicates. Assume we can split
3006 the original object if it spans an even number of hard regs.
3007 This special case is important for SCmode on 64-bit platforms
3008 where the natural size of floating-point regs is 32-bit. */
3009 || (REG_P (cplx)
3010 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3011 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
3012 {
3013 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
3014 imag_p ? GET_MODE_SIZE (imode) : 0);
3015 if (ret)
3016 return ret;
3017 else
3018 /* simplify_gen_subreg may fail for sub-word MEMs. */
3019 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3020 }
3021
3022 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
3023 true, false, NULL_RTX, imode, imode);
3024 }
3025 \f
3026 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3027 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3028 represented in NEW_MODE. If FORCE is true, this will never happen, as
3029 we'll force-create a SUBREG if needed. */
3030
3031 static rtx
3032 emit_move_change_mode (enum machine_mode new_mode,
3033 enum machine_mode old_mode, rtx x, bool force)
3034 {
3035 rtx ret;
3036
3037 if (push_operand (x, GET_MODE (x)))
3038 {
3039 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3040 MEM_COPY_ATTRIBUTES (ret, x);
3041 }
3042 else if (MEM_P (x))
3043 {
3044 /* We don't have to worry about changing the address since the
3045 size in bytes is supposed to be the same. */
3046 if (reload_in_progress)
3047 {
3048 /* Copy the MEM to change the mode and move any
3049 substitutions from the old MEM to the new one. */
3050 ret = adjust_address_nv (x, new_mode, 0);
3051 copy_replacements (x, ret);
3052 }
3053 else
3054 ret = adjust_address (x, new_mode, 0);
3055 }
3056 else
3057 {
3058 /* Note that we do want simplify_subreg's behavior of validating
3059 that the new mode is ok for a hard register. If we were to use
3060 simplify_gen_subreg, we would create the subreg, but would
3061 probably run into the target not being able to implement it. */
3062 /* Except, of course, when FORCE is true, when this is exactly what
3063 we want. Which is needed for CCmodes on some targets. */
3064 if (force)
3065 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3066 else
3067 ret = simplify_subreg (new_mode, x, old_mode, 0);
3068 }
3069
3070 return ret;
3071 }
3072
3073 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3074 an integer mode of the same size as MODE. Returns the instruction
3075 emitted, or NULL if such a move could not be generated. */
3076
3077 static rtx
3078 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3079 {
3080 enum machine_mode imode;
3081 enum insn_code code;
3082
3083 /* There must exist a mode of the exact size we require. */
3084 imode = int_mode_for_mode (mode);
3085 if (imode == BLKmode)
3086 return NULL_RTX;
3087
3088 /* The target must support moves in this mode. */
3089 code = optab_handler (mov_optab, imode);
3090 if (code == CODE_FOR_nothing)
3091 return NULL_RTX;
3092
3093 x = emit_move_change_mode (imode, mode, x, force);
3094 if (x == NULL_RTX)
3095 return NULL_RTX;
3096 y = emit_move_change_mode (imode, mode, y, force);
3097 if (y == NULL_RTX)
3098 return NULL_RTX;
3099 return emit_insn (GEN_FCN (code) (x, y));
3100 }
3101
3102 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3103 Return an equivalent MEM that does not use an auto-increment. */
3104
3105 static rtx
3106 emit_move_resolve_push (enum machine_mode mode, rtx x)
3107 {
3108 enum rtx_code code = GET_CODE (XEXP (x, 0));
3109 HOST_WIDE_INT adjust;
3110 rtx temp;
3111
3112 adjust = GET_MODE_SIZE (mode);
3113 #ifdef PUSH_ROUNDING
3114 adjust = PUSH_ROUNDING (adjust);
3115 #endif
3116 if (code == PRE_DEC || code == POST_DEC)
3117 adjust = -adjust;
3118 else if (code == PRE_MODIFY || code == POST_MODIFY)
3119 {
3120 rtx expr = XEXP (XEXP (x, 0), 1);
3121 HOST_WIDE_INT val;
3122
3123 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3124 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3125 val = INTVAL (XEXP (expr, 1));
3126 if (GET_CODE (expr) == MINUS)
3127 val = -val;
3128 gcc_assert (adjust == val || adjust == -val);
3129 adjust = val;
3130 }
3131
3132 /* Do not use anti_adjust_stack, since we don't want to update
3133 stack_pointer_delta. */
3134 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3135 GEN_INT (adjust), stack_pointer_rtx,
3136 0, OPTAB_LIB_WIDEN);
3137 if (temp != stack_pointer_rtx)
3138 emit_move_insn (stack_pointer_rtx, temp);
3139
3140 switch (code)
3141 {
3142 case PRE_INC:
3143 case PRE_DEC:
3144 case PRE_MODIFY:
3145 temp = stack_pointer_rtx;
3146 break;
3147 case POST_INC:
3148 case POST_DEC:
3149 case POST_MODIFY:
3150 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3151 break;
3152 default:
3153 gcc_unreachable ();
3154 }
3155
3156 return replace_equiv_address (x, temp);
3157 }
3158
3159 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3160 X is known to satisfy push_operand, and MODE is known to be complex.
3161 Returns the last instruction emitted. */
3162
3163 rtx
3164 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3165 {
3166 enum machine_mode submode = GET_MODE_INNER (mode);
3167 bool imag_first;
3168
3169 #ifdef PUSH_ROUNDING
3170 unsigned int submodesize = GET_MODE_SIZE (submode);
3171
3172 /* In case we output to the stack, but the size is smaller than the
3173 machine can push exactly, we need to use move instructions. */
3174 if (PUSH_ROUNDING (submodesize) != submodesize)
3175 {
3176 x = emit_move_resolve_push (mode, x);
3177 return emit_move_insn (x, y);
3178 }
3179 #endif
3180
3181 /* Note that the real part always precedes the imag part in memory
3182 regardless of machine's endianness. */
3183 switch (GET_CODE (XEXP (x, 0)))
3184 {
3185 case PRE_DEC:
3186 case POST_DEC:
3187 imag_first = true;
3188 break;
3189 case PRE_INC:
3190 case POST_INC:
3191 imag_first = false;
3192 break;
3193 default:
3194 gcc_unreachable ();
3195 }
3196
3197 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3198 read_complex_part (y, imag_first));
3199 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3200 read_complex_part (y, !imag_first));
3201 }
3202
3203 /* A subroutine of emit_move_complex. Perform the move from Y to X
3204 via two moves of the parts. Returns the last instruction emitted. */
3205
3206 rtx
3207 emit_move_complex_parts (rtx x, rtx y)
3208 {
3209 /* Show the output dies here. This is necessary for SUBREGs
3210 of pseudos since we cannot track their lifetimes correctly;
3211 hard regs shouldn't appear here except as return values. */
3212 if (!reload_completed && !reload_in_progress
3213 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3214 emit_clobber (x);
3215
3216 write_complex_part (x, read_complex_part (y, false), false);
3217 write_complex_part (x, read_complex_part (y, true), true);
3218
3219 return get_last_insn ();
3220 }
3221
3222 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3223 MODE is known to be complex. Returns the last instruction emitted. */
3224
3225 static rtx
3226 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3227 {
3228 bool try_int;
3229
3230 /* Need to take special care for pushes, to maintain proper ordering
3231 of the data, and possibly extra padding. */
3232 if (push_operand (x, mode))
3233 return emit_move_complex_push (mode, x, y);
3234
3235 /* See if we can coerce the target into moving both values at once. */
3236
3237 /* Move floating point as parts. */
3238 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3239 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3240 try_int = false;
3241 /* Not possible if the values are inherently not adjacent. */
3242 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3243 try_int = false;
3244 /* Is possible if both are registers (or subregs of registers). */
3245 else if (register_operand (x, mode) && register_operand (y, mode))
3246 try_int = true;
3247 /* If one of the operands is a memory, and alignment constraints
3248 are friendly enough, we may be able to do combined memory operations.
3249 We do not attempt this if Y is a constant because that combination is
3250 usually better with the by-parts thing below. */
3251 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3252 && (!STRICT_ALIGNMENT
3253 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3254 try_int = true;
3255 else
3256 try_int = false;
3257
3258 if (try_int)
3259 {
3260 rtx ret;
3261
3262 /* For memory to memory moves, optimal behavior can be had with the
3263 existing block move logic. */
3264 if (MEM_P (x) && MEM_P (y))
3265 {
3266 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3267 BLOCK_OP_NO_LIBCALL);
3268 return get_last_insn ();
3269 }
3270
3271 ret = emit_move_via_integer (mode, x, y, true);
3272 if (ret)
3273 return ret;
3274 }
3275
3276 return emit_move_complex_parts (x, y);
3277 }
3278
3279 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3280 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3281
3282 static rtx
3283 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3284 {
3285 rtx ret;
3286
3287 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3288 if (mode != CCmode)
3289 {
3290 enum insn_code code = optab_handler (mov_optab, CCmode);
3291 if (code != CODE_FOR_nothing)
3292 {
3293 x = emit_move_change_mode (CCmode, mode, x, true);
3294 y = emit_move_change_mode (CCmode, mode, y, true);
3295 return emit_insn (GEN_FCN (code) (x, y));
3296 }
3297 }
3298
3299 /* Otherwise, find the MODE_INT mode of the same width. */
3300 ret = emit_move_via_integer (mode, x, y, false);
3301 gcc_assert (ret != NULL);
3302 return ret;
3303 }
3304
3305 /* Return true if word I of OP lies entirely in the
3306 undefined bits of a paradoxical subreg. */
3307
3308 static bool
3309 undefined_operand_subword_p (const_rtx op, int i)
3310 {
3311 enum machine_mode innermode, innermostmode;
3312 int offset;
3313 if (GET_CODE (op) != SUBREG)
3314 return false;
3315 innermode = GET_MODE (op);
3316 innermostmode = GET_MODE (SUBREG_REG (op));
3317 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3318 /* The SUBREG_BYTE represents offset, as if the value were stored in
3319 memory, except for a paradoxical subreg where we define
3320 SUBREG_BYTE to be 0; undo this exception as in
3321 simplify_subreg. */
3322 if (SUBREG_BYTE (op) == 0
3323 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3324 {
3325 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3326 if (WORDS_BIG_ENDIAN)
3327 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3328 if (BYTES_BIG_ENDIAN)
3329 offset += difference % UNITS_PER_WORD;
3330 }
3331 if (offset >= GET_MODE_SIZE (innermostmode)
3332 || offset <= -GET_MODE_SIZE (word_mode))
3333 return true;
3334 return false;
3335 }
3336
3337 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3338 MODE is any multi-word or full-word mode that lacks a move_insn
3339 pattern. Note that you will get better code if you define such
3340 patterns, even if they must turn into multiple assembler instructions. */
3341
3342 static rtx
3343 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3344 {
3345 rtx last_insn = 0;
3346 rtx seq, inner;
3347 bool need_clobber;
3348 int i;
3349
3350 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3351
3352 /* If X is a push on the stack, do the push now and replace
3353 X with a reference to the stack pointer. */
3354 if (push_operand (x, mode))
3355 x = emit_move_resolve_push (mode, x);
3356
3357 /* If we are in reload, see if either operand is a MEM whose address
3358 is scheduled for replacement. */
3359 if (reload_in_progress && MEM_P (x)
3360 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3361 x = replace_equiv_address_nv (x, inner);
3362 if (reload_in_progress && MEM_P (y)
3363 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3364 y = replace_equiv_address_nv (y, inner);
3365
3366 start_sequence ();
3367
3368 need_clobber = false;
3369 for (i = 0;
3370 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3371 i++)
3372 {
3373 rtx xpart = operand_subword (x, i, 1, mode);
3374 rtx ypart;
3375
3376 /* Do not generate code for a move if it would come entirely
3377 from the undefined bits of a paradoxical subreg. */
3378 if (undefined_operand_subword_p (y, i))
3379 continue;
3380
3381 ypart = operand_subword (y, i, 1, mode);
3382
3383 /* If we can't get a part of Y, put Y into memory if it is a
3384 constant. Otherwise, force it into a register. Then we must
3385 be able to get a part of Y. */
3386 if (ypart == 0 && CONSTANT_P (y))
3387 {
3388 y = use_anchored_address (force_const_mem (mode, y));
3389 ypart = operand_subword (y, i, 1, mode);
3390 }
3391 else if (ypart == 0)
3392 ypart = operand_subword_force (y, i, mode);
3393
3394 gcc_assert (xpart && ypart);
3395
3396 need_clobber |= (GET_CODE (xpart) == SUBREG);
3397
3398 last_insn = emit_move_insn (xpart, ypart);
3399 }
3400
3401 seq = get_insns ();
3402 end_sequence ();
3403
3404 /* Show the output dies here. This is necessary for SUBREGs
3405 of pseudos since we cannot track their lifetimes correctly;
3406 hard regs shouldn't appear here except as return values.
3407 We never want to emit such a clobber after reload. */
3408 if (x != y
3409 && ! (reload_in_progress || reload_completed)
3410 && need_clobber != 0)
3411 emit_clobber (x);
3412
3413 emit_insn (seq);
3414
3415 return last_insn;
3416 }
3417
3418 /* Low level part of emit_move_insn.
3419 Called just like emit_move_insn, but assumes X and Y
3420 are basically valid. */
3421
3422 rtx
3423 emit_move_insn_1 (rtx x, rtx y)
3424 {
3425 enum machine_mode mode = GET_MODE (x);
3426 enum insn_code code;
3427
3428 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3429
3430 code = optab_handler (mov_optab, mode);
3431 if (code != CODE_FOR_nothing)
3432 return emit_insn (GEN_FCN (code) (x, y));
3433
3434 /* Expand complex moves by moving real part and imag part. */
3435 if (COMPLEX_MODE_P (mode))
3436 return emit_move_complex (mode, x, y);
3437
3438 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3439 || ALL_FIXED_POINT_MODE_P (mode))
3440 {
3441 rtx result = emit_move_via_integer (mode, x, y, true);
3442
3443 /* If we can't find an integer mode, use multi words. */
3444 if (result)
3445 return result;
3446 else
3447 return emit_move_multi_word (mode, x, y);
3448 }
3449
3450 if (GET_MODE_CLASS (mode) == MODE_CC)
3451 return emit_move_ccmode (mode, x, y);
3452
3453 /* Try using a move pattern for the corresponding integer mode. This is
3454 only safe when simplify_subreg can convert MODE constants into integer
3455 constants. At present, it can only do this reliably if the value
3456 fits within a HOST_WIDE_INT. */
3457 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3458 {
3459 rtx ret = emit_move_via_integer (mode, x, y, lra_in_progress);
3460
3461 if (ret)
3462 {
3463 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0)
3464 return ret;
3465 }
3466 }
3467
3468 return emit_move_multi_word (mode, x, y);
3469 }
3470
3471 /* Generate code to copy Y into X.
3472 Both Y and X must have the same mode, except that
3473 Y can be a constant with VOIDmode.
3474 This mode cannot be BLKmode; use emit_block_move for that.
3475
3476 Return the last instruction emitted. */
3477
3478 rtx
3479 emit_move_insn (rtx x, rtx y)
3480 {
3481 enum machine_mode mode = GET_MODE (x);
3482 rtx y_cst = NULL_RTX;
3483 rtx last_insn, set;
3484
3485 gcc_assert (mode != BLKmode
3486 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3487
3488 if (CONSTANT_P (y))
3489 {
3490 if (optimize
3491 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3492 && (last_insn = compress_float_constant (x, y)))
3493 return last_insn;
3494
3495 y_cst = y;
3496
3497 if (!targetm.legitimate_constant_p (mode, y))
3498 {
3499 y = force_const_mem (mode, y);
3500
3501 /* If the target's cannot_force_const_mem prevented the spill,
3502 assume that the target's move expanders will also take care
3503 of the non-legitimate constant. */
3504 if (!y)
3505 y = y_cst;
3506 else
3507 y = use_anchored_address (y);
3508 }
3509 }
3510
3511 /* If X or Y are memory references, verify that their addresses are valid
3512 for the machine. */
3513 if (MEM_P (x)
3514 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3515 MEM_ADDR_SPACE (x))
3516 && ! push_operand (x, GET_MODE (x))))
3517 x = validize_mem (x);
3518
3519 if (MEM_P (y)
3520 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3521 MEM_ADDR_SPACE (y)))
3522 y = validize_mem (y);
3523
3524 gcc_assert (mode != BLKmode);
3525
3526 last_insn = emit_move_insn_1 (x, y);
3527
3528 if (y_cst && REG_P (x)
3529 && (set = single_set (last_insn)) != NULL_RTX
3530 && SET_DEST (set) == x
3531 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3532 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3533
3534 return last_insn;
3535 }
3536
3537 /* If Y is representable exactly in a narrower mode, and the target can
3538 perform the extension directly from constant or memory, then emit the
3539 move as an extension. */
3540
3541 static rtx
3542 compress_float_constant (rtx x, rtx y)
3543 {
3544 enum machine_mode dstmode = GET_MODE (x);
3545 enum machine_mode orig_srcmode = GET_MODE (y);
3546 enum machine_mode srcmode;
3547 REAL_VALUE_TYPE r;
3548 int oldcost, newcost;
3549 bool speed = optimize_insn_for_speed_p ();
3550
3551 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3552
3553 if (targetm.legitimate_constant_p (dstmode, y))
3554 oldcost = set_src_cost (y, speed);
3555 else
3556 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3557
3558 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3559 srcmode != orig_srcmode;
3560 srcmode = GET_MODE_WIDER_MODE (srcmode))
3561 {
3562 enum insn_code ic;
3563 rtx trunc_y, last_insn;
3564
3565 /* Skip if the target can't extend this way. */
3566 ic = can_extend_p (dstmode, srcmode, 0);
3567 if (ic == CODE_FOR_nothing)
3568 continue;
3569
3570 /* Skip if the narrowed value isn't exact. */
3571 if (! exact_real_truncate (srcmode, &r))
3572 continue;
3573
3574 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3575
3576 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3577 {
3578 /* Skip if the target needs extra instructions to perform
3579 the extension. */
3580 if (!insn_operand_matches (ic, 1, trunc_y))
3581 continue;
3582 /* This is valid, but may not be cheaper than the original. */
3583 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3584 speed);
3585 if (oldcost < newcost)
3586 continue;
3587 }
3588 else if (float_extend_from_mem[dstmode][srcmode])
3589 {
3590 trunc_y = force_const_mem (srcmode, trunc_y);
3591 /* This is valid, but may not be cheaper than the original. */
3592 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3593 speed);
3594 if (oldcost < newcost)
3595 continue;
3596 trunc_y = validize_mem (trunc_y);
3597 }
3598 else
3599 continue;
3600
3601 /* For CSE's benefit, force the compressed constant pool entry
3602 into a new pseudo. This constant may be used in different modes,
3603 and if not, combine will put things back together for us. */
3604 trunc_y = force_reg (srcmode, trunc_y);
3605 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3606 last_insn = get_last_insn ();
3607
3608 if (REG_P (x))
3609 set_unique_reg_note (last_insn, REG_EQUAL, y);
3610
3611 return last_insn;
3612 }
3613
3614 return NULL_RTX;
3615 }
3616 \f
3617 /* Pushing data onto the stack. */
3618
3619 /* Push a block of length SIZE (perhaps variable)
3620 and return an rtx to address the beginning of the block.
3621 The value may be virtual_outgoing_args_rtx.
3622
3623 EXTRA is the number of bytes of padding to push in addition to SIZE.
3624 BELOW nonzero means this padding comes at low addresses;
3625 otherwise, the padding comes at high addresses. */
3626
3627 rtx
3628 push_block (rtx size, int extra, int below)
3629 {
3630 rtx temp;
3631
3632 size = convert_modes (Pmode, ptr_mode, size, 1);
3633 if (CONSTANT_P (size))
3634 anti_adjust_stack (plus_constant (Pmode, size, extra));
3635 else if (REG_P (size) && extra == 0)
3636 anti_adjust_stack (size);
3637 else
3638 {
3639 temp = copy_to_mode_reg (Pmode, size);
3640 if (extra != 0)
3641 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3642 temp, 0, OPTAB_LIB_WIDEN);
3643 anti_adjust_stack (temp);
3644 }
3645
3646 #ifndef STACK_GROWS_DOWNWARD
3647 if (0)
3648 #else
3649 if (1)
3650 #endif
3651 {
3652 temp = virtual_outgoing_args_rtx;
3653 if (extra != 0 && below)
3654 temp = plus_constant (Pmode, temp, extra);
3655 }
3656 else
3657 {
3658 if (CONST_INT_P (size))
3659 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
3660 -INTVAL (size) - (below ? 0 : extra));
3661 else if (extra != 0 && !below)
3662 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3663 negate_rtx (Pmode, plus_constant (Pmode, size,
3664 extra)));
3665 else
3666 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3667 negate_rtx (Pmode, size));
3668 }
3669
3670 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3671 }
3672
3673 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3674
3675 static rtx
3676 mem_autoinc_base (rtx mem)
3677 {
3678 if (MEM_P (mem))
3679 {
3680 rtx addr = XEXP (mem, 0);
3681 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3682 return XEXP (addr, 0);
3683 }
3684 return NULL;
3685 }
3686
3687 /* A utility routine used here, in reload, and in try_split. The insns
3688 after PREV up to and including LAST are known to adjust the stack,
3689 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3690 placing notes as appropriate. PREV may be NULL, indicating the
3691 entire insn sequence prior to LAST should be scanned.
3692
3693 The set of allowed stack pointer modifications is small:
3694 (1) One or more auto-inc style memory references (aka pushes),
3695 (2) One or more addition/subtraction with the SP as destination,
3696 (3) A single move insn with the SP as destination,
3697 (4) A call_pop insn,
3698 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3699
3700 Insns in the sequence that do not modify the SP are ignored,
3701 except for noreturn calls.
3702
3703 The return value is the amount of adjustment that can be trivially
3704 verified, via immediate operand or auto-inc. If the adjustment
3705 cannot be trivially extracted, the return value is INT_MIN. */
3706
3707 HOST_WIDE_INT
3708 find_args_size_adjust (rtx insn)
3709 {
3710 rtx dest, set, pat;
3711 int i;
3712
3713 pat = PATTERN (insn);
3714 set = NULL;
3715
3716 /* Look for a call_pop pattern. */
3717 if (CALL_P (insn))
3718 {
3719 /* We have to allow non-call_pop patterns for the case
3720 of emit_single_push_insn of a TLS address. */
3721 if (GET_CODE (pat) != PARALLEL)
3722 return 0;
3723
3724 /* All call_pop have a stack pointer adjust in the parallel.
3725 The call itself is always first, and the stack adjust is
3726 usually last, so search from the end. */
3727 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3728 {
3729 set = XVECEXP (pat, 0, i);
3730 if (GET_CODE (set) != SET)
3731 continue;
3732 dest = SET_DEST (set);
3733 if (dest == stack_pointer_rtx)
3734 break;
3735 }
3736 /* We'd better have found the stack pointer adjust. */
3737 if (i == 0)
3738 return 0;
3739 /* Fall through to process the extracted SET and DEST
3740 as if it was a standalone insn. */
3741 }
3742 else if (GET_CODE (pat) == SET)
3743 set = pat;
3744 else if ((set = single_set (insn)) != NULL)
3745 ;
3746 else if (GET_CODE (pat) == PARALLEL)
3747 {
3748 /* ??? Some older ports use a parallel with a stack adjust
3749 and a store for a PUSH_ROUNDING pattern, rather than a
3750 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3751 /* ??? See h8300 and m68k, pushqi1. */
3752 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3753 {
3754 set = XVECEXP (pat, 0, i);
3755 if (GET_CODE (set) != SET)
3756 continue;
3757 dest = SET_DEST (set);
3758 if (dest == stack_pointer_rtx)
3759 break;
3760
3761 /* We do not expect an auto-inc of the sp in the parallel. */
3762 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3763 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3764 != stack_pointer_rtx);
3765 }
3766 if (i < 0)
3767 return 0;
3768 }
3769 else
3770 return 0;
3771
3772 dest = SET_DEST (set);
3773
3774 /* Look for direct modifications of the stack pointer. */
3775 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3776 {
3777 /* Look for a trivial adjustment, otherwise assume nothing. */
3778 /* Note that the SPU restore_stack_block pattern refers to
3779 the stack pointer in V4SImode. Consider that non-trivial. */
3780 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3781 && GET_CODE (SET_SRC (set)) == PLUS
3782 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3783 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3784 return INTVAL (XEXP (SET_SRC (set), 1));
3785 /* ??? Reload can generate no-op moves, which will be cleaned
3786 up later. Recognize it and continue searching. */
3787 else if (rtx_equal_p (dest, SET_SRC (set)))
3788 return 0;
3789 else
3790 return HOST_WIDE_INT_MIN;
3791 }
3792 else
3793 {
3794 rtx mem, addr;
3795
3796 /* Otherwise only think about autoinc patterns. */
3797 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3798 {
3799 mem = dest;
3800 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3801 != stack_pointer_rtx);
3802 }
3803 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3804 mem = SET_SRC (set);
3805 else
3806 return 0;
3807
3808 addr = XEXP (mem, 0);
3809 switch (GET_CODE (addr))
3810 {
3811 case PRE_INC:
3812 case POST_INC:
3813 return GET_MODE_SIZE (GET_MODE (mem));
3814 case PRE_DEC:
3815 case POST_DEC:
3816 return -GET_MODE_SIZE (GET_MODE (mem));
3817 case PRE_MODIFY:
3818 case POST_MODIFY:
3819 addr = XEXP (addr, 1);
3820 gcc_assert (GET_CODE (addr) == PLUS);
3821 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3822 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3823 return INTVAL (XEXP (addr, 1));
3824 default:
3825 gcc_unreachable ();
3826 }
3827 }
3828 }
3829
3830 int
3831 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3832 {
3833 int args_size = end_args_size;
3834 bool saw_unknown = false;
3835 rtx insn;
3836
3837 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3838 {
3839 HOST_WIDE_INT this_delta;
3840
3841 if (!NONDEBUG_INSN_P (insn))
3842 continue;
3843
3844 this_delta = find_args_size_adjust (insn);
3845 if (this_delta == 0)
3846 {
3847 if (!CALL_P (insn)
3848 || ACCUMULATE_OUTGOING_ARGS
3849 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3850 continue;
3851 }
3852
3853 gcc_assert (!saw_unknown);
3854 if (this_delta == HOST_WIDE_INT_MIN)
3855 saw_unknown = true;
3856
3857 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3858 #ifdef STACK_GROWS_DOWNWARD
3859 this_delta = -(unsigned HOST_WIDE_INT) this_delta;
3860 #endif
3861 args_size -= this_delta;
3862 }
3863
3864 return saw_unknown ? INT_MIN : args_size;
3865 }
3866
3867 #ifdef PUSH_ROUNDING
3868 /* Emit single push insn. */
3869
3870 static void
3871 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3872 {
3873 rtx dest_addr;
3874 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3875 rtx dest;
3876 enum insn_code icode;
3877
3878 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3879 /* If there is push pattern, use it. Otherwise try old way of throwing
3880 MEM representing push operation to move expander. */
3881 icode = optab_handler (push_optab, mode);
3882 if (icode != CODE_FOR_nothing)
3883 {
3884 struct expand_operand ops[1];
3885
3886 create_input_operand (&ops[0], x, mode);
3887 if (maybe_expand_insn (icode, 1, ops))
3888 return;
3889 }
3890 if (GET_MODE_SIZE (mode) == rounded_size)
3891 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3892 /* If we are to pad downward, adjust the stack pointer first and
3893 then store X into the stack location using an offset. This is
3894 because emit_move_insn does not know how to pad; it does not have
3895 access to type. */
3896 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3897 {
3898 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3899 HOST_WIDE_INT offset;
3900
3901 emit_move_insn (stack_pointer_rtx,
3902 expand_binop (Pmode,
3903 #ifdef STACK_GROWS_DOWNWARD
3904 sub_optab,
3905 #else
3906 add_optab,
3907 #endif
3908 stack_pointer_rtx,
3909 GEN_INT (rounded_size),
3910 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3911
3912 offset = (HOST_WIDE_INT) padding_size;
3913 #ifdef STACK_GROWS_DOWNWARD
3914 if (STACK_PUSH_CODE == POST_DEC)
3915 /* We have already decremented the stack pointer, so get the
3916 previous value. */
3917 offset += (HOST_WIDE_INT) rounded_size;
3918 #else
3919 if (STACK_PUSH_CODE == POST_INC)
3920 /* We have already incremented the stack pointer, so get the
3921 previous value. */
3922 offset -= (HOST_WIDE_INT) rounded_size;
3923 #endif
3924 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3925 }
3926 else
3927 {
3928 #ifdef STACK_GROWS_DOWNWARD
3929 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3930 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3931 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3932 #else
3933 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3934 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3935 GEN_INT (rounded_size));
3936 #endif
3937 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3938 }
3939
3940 dest = gen_rtx_MEM (mode, dest_addr);
3941
3942 if (type != 0)
3943 {
3944 set_mem_attributes (dest, type, 1);
3945
3946 if (flag_optimize_sibling_calls)
3947 /* Function incoming arguments may overlap with sibling call
3948 outgoing arguments and we cannot allow reordering of reads
3949 from function arguments with stores to outgoing arguments
3950 of sibling calls. */
3951 set_mem_alias_set (dest, 0);
3952 }
3953 emit_move_insn (dest, x);
3954 }
3955
3956 /* Emit and annotate a single push insn. */
3957
3958 static void
3959 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3960 {
3961 int delta, old_delta = stack_pointer_delta;
3962 rtx prev = get_last_insn ();
3963 rtx last;
3964
3965 emit_single_push_insn_1 (mode, x, type);
3966
3967 last = get_last_insn ();
3968
3969 /* Notice the common case where we emitted exactly one insn. */
3970 if (PREV_INSN (last) == prev)
3971 {
3972 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3973 return;
3974 }
3975
3976 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3977 gcc_assert (delta == INT_MIN || delta == old_delta);
3978 }
3979 #endif
3980
3981 /* Generate code to push X onto the stack, assuming it has mode MODE and
3982 type TYPE.
3983 MODE is redundant except when X is a CONST_INT (since they don't
3984 carry mode info).
3985 SIZE is an rtx for the size of data to be copied (in bytes),
3986 needed only if X is BLKmode.
3987
3988 ALIGN (in bits) is maximum alignment we can assume.
3989
3990 If PARTIAL and REG are both nonzero, then copy that many of the first
3991 bytes of X into registers starting with REG, and push the rest of X.
3992 The amount of space pushed is decreased by PARTIAL bytes.
3993 REG must be a hard register in this case.
3994 If REG is zero but PARTIAL is not, take any all others actions for an
3995 argument partially in registers, but do not actually load any
3996 registers.
3997
3998 EXTRA is the amount in bytes of extra space to leave next to this arg.
3999 This is ignored if an argument block has already been allocated.
4000
4001 On a machine that lacks real push insns, ARGS_ADDR is the address of
4002 the bottom of the argument block for this call. We use indexing off there
4003 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4004 argument block has not been preallocated.
4005
4006 ARGS_SO_FAR is the size of args previously pushed for this call.
4007
4008 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4009 for arguments passed in registers. If nonzero, it will be the number
4010 of bytes required. */
4011
4012 void
4013 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
4014 unsigned int align, int partial, rtx reg, int extra,
4015 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
4016 rtx alignment_pad)
4017 {
4018 rtx xinner;
4019 enum direction stack_direction
4020 #ifdef STACK_GROWS_DOWNWARD
4021 = downward;
4022 #else
4023 = upward;
4024 #endif
4025
4026 /* Decide where to pad the argument: `downward' for below,
4027 `upward' for above, or `none' for don't pad it.
4028 Default is below for small data on big-endian machines; else above. */
4029 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
4030
4031 /* Invert direction if stack is post-decrement.
4032 FIXME: why? */
4033 if (STACK_PUSH_CODE == POST_DEC)
4034 if (where_pad != none)
4035 where_pad = (where_pad == downward ? upward : downward);
4036
4037 xinner = x;
4038
4039 if (mode == BLKmode
4040 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4041 {
4042 /* Copy a block into the stack, entirely or partially. */
4043
4044 rtx temp;
4045 int used;
4046 int offset;
4047 int skip;
4048
4049 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4050 used = partial - offset;
4051
4052 if (mode != BLKmode)
4053 {
4054 /* A value is to be stored in an insufficiently aligned
4055 stack slot; copy via a suitably aligned slot if
4056 necessary. */
4057 size = GEN_INT (GET_MODE_SIZE (mode));
4058 if (!MEM_P (xinner))
4059 {
4060 temp = assign_temp (type, 1, 1);
4061 emit_move_insn (temp, xinner);
4062 xinner = temp;
4063 }
4064 }
4065
4066 gcc_assert (size);
4067
4068 /* USED is now the # of bytes we need not copy to the stack
4069 because registers will take care of them. */
4070
4071 if (partial != 0)
4072 xinner = adjust_address (xinner, BLKmode, used);
4073
4074 /* If the partial register-part of the arg counts in its stack size,
4075 skip the part of stack space corresponding to the registers.
4076 Otherwise, start copying to the beginning of the stack space,
4077 by setting SKIP to 0. */
4078 skip = (reg_parm_stack_space == 0) ? 0 : used;
4079
4080 #ifdef PUSH_ROUNDING
4081 /* Do it with several push insns if that doesn't take lots of insns
4082 and if there is no difficulty with push insns that skip bytes
4083 on the stack for alignment purposes. */
4084 if (args_addr == 0
4085 && PUSH_ARGS
4086 && CONST_INT_P (size)
4087 && skip == 0
4088 && MEM_ALIGN (xinner) >= align
4089 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
4090 /* Here we avoid the case of a structure whose weak alignment
4091 forces many pushes of a small amount of data,
4092 and such small pushes do rounding that causes trouble. */
4093 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4094 || align >= BIGGEST_ALIGNMENT
4095 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4096 == (align / BITS_PER_UNIT)))
4097 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4098 {
4099 /* Push padding now if padding above and stack grows down,
4100 or if padding below and stack grows up.
4101 But if space already allocated, this has already been done. */
4102 if (extra && args_addr == 0
4103 && where_pad != none && where_pad != stack_direction)
4104 anti_adjust_stack (GEN_INT (extra));
4105
4106 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4107 }
4108 else
4109 #endif /* PUSH_ROUNDING */
4110 {
4111 rtx target;
4112
4113 /* Otherwise make space on the stack and copy the data
4114 to the address of that space. */
4115
4116 /* Deduct words put into registers from the size we must copy. */
4117 if (partial != 0)
4118 {
4119 if (CONST_INT_P (size))
4120 size = GEN_INT (INTVAL (size) - used);
4121 else
4122 size = expand_binop (GET_MODE (size), sub_optab, size,
4123 GEN_INT (used), NULL_RTX, 0,
4124 OPTAB_LIB_WIDEN);
4125 }
4126
4127 /* Get the address of the stack space.
4128 In this case, we do not deal with EXTRA separately.
4129 A single stack adjust will do. */
4130 if (! args_addr)
4131 {
4132 temp = push_block (size, extra, where_pad == downward);
4133 extra = 0;
4134 }
4135 else if (CONST_INT_P (args_so_far))
4136 temp = memory_address (BLKmode,
4137 plus_constant (Pmode, args_addr,
4138 skip + INTVAL (args_so_far)));
4139 else
4140 temp = memory_address (BLKmode,
4141 plus_constant (Pmode,
4142 gen_rtx_PLUS (Pmode,
4143 args_addr,
4144 args_so_far),
4145 skip));
4146
4147 if (!ACCUMULATE_OUTGOING_ARGS)
4148 {
4149 /* If the source is referenced relative to the stack pointer,
4150 copy it to another register to stabilize it. We do not need
4151 to do this if we know that we won't be changing sp. */
4152
4153 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4154 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4155 temp = copy_to_reg (temp);
4156 }
4157
4158 target = gen_rtx_MEM (BLKmode, temp);
4159
4160 /* We do *not* set_mem_attributes here, because incoming arguments
4161 may overlap with sibling call outgoing arguments and we cannot
4162 allow reordering of reads from function arguments with stores
4163 to outgoing arguments of sibling calls. We do, however, want
4164 to record the alignment of the stack slot. */
4165 /* ALIGN may well be better aligned than TYPE, e.g. due to
4166 PARM_BOUNDARY. Assume the caller isn't lying. */
4167 set_mem_align (target, align);
4168
4169 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4170 }
4171 }
4172 else if (partial > 0)
4173 {
4174 /* Scalar partly in registers. */
4175
4176 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4177 int i;
4178 int not_stack;
4179 /* # bytes of start of argument
4180 that we must make space for but need not store. */
4181 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4182 int args_offset = INTVAL (args_so_far);
4183 int skip;
4184
4185 /* Push padding now if padding above and stack grows down,
4186 or if padding below and stack grows up.
4187 But if space already allocated, this has already been done. */
4188 if (extra && args_addr == 0
4189 && where_pad != none && where_pad != stack_direction)
4190 anti_adjust_stack (GEN_INT (extra));
4191
4192 /* If we make space by pushing it, we might as well push
4193 the real data. Otherwise, we can leave OFFSET nonzero
4194 and leave the space uninitialized. */
4195 if (args_addr == 0)
4196 offset = 0;
4197
4198 /* Now NOT_STACK gets the number of words that we don't need to
4199 allocate on the stack. Convert OFFSET to words too. */
4200 not_stack = (partial - offset) / UNITS_PER_WORD;
4201 offset /= UNITS_PER_WORD;
4202
4203 /* If the partial register-part of the arg counts in its stack size,
4204 skip the part of stack space corresponding to the registers.
4205 Otherwise, start copying to the beginning of the stack space,
4206 by setting SKIP to 0. */
4207 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4208
4209 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4210 x = validize_mem (force_const_mem (mode, x));
4211
4212 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4213 SUBREGs of such registers are not allowed. */
4214 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4215 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4216 x = copy_to_reg (x);
4217
4218 /* Loop over all the words allocated on the stack for this arg. */
4219 /* We can do it by words, because any scalar bigger than a word
4220 has a size a multiple of a word. */
4221 #ifndef PUSH_ARGS_REVERSED
4222 for (i = not_stack; i < size; i++)
4223 #else
4224 for (i = size - 1; i >= not_stack; i--)
4225 #endif
4226 if (i >= not_stack + offset)
4227 emit_push_insn (operand_subword_force (x, i, mode),
4228 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4229 0, args_addr,
4230 GEN_INT (args_offset + ((i - not_stack + skip)
4231 * UNITS_PER_WORD)),
4232 reg_parm_stack_space, alignment_pad);
4233 }
4234 else
4235 {
4236 rtx addr;
4237 rtx dest;
4238
4239 /* Push padding now if padding above and stack grows down,
4240 or if padding below and stack grows up.
4241 But if space already allocated, this has already been done. */
4242 if (extra && args_addr == 0
4243 && where_pad != none && where_pad != stack_direction)
4244 anti_adjust_stack (GEN_INT (extra));
4245
4246 #ifdef PUSH_ROUNDING
4247 if (args_addr == 0 && PUSH_ARGS)
4248 emit_single_push_insn (mode, x, type);
4249 else
4250 #endif
4251 {
4252 if (CONST_INT_P (args_so_far))
4253 addr
4254 = memory_address (mode,
4255 plus_constant (Pmode, args_addr,
4256 INTVAL (args_so_far)));
4257 else
4258 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4259 args_so_far));
4260 dest = gen_rtx_MEM (mode, addr);
4261
4262 /* We do *not* set_mem_attributes here, because incoming arguments
4263 may overlap with sibling call outgoing arguments and we cannot
4264 allow reordering of reads from function arguments with stores
4265 to outgoing arguments of sibling calls. We do, however, want
4266 to record the alignment of the stack slot. */
4267 /* ALIGN may well be better aligned than TYPE, e.g. due to
4268 PARM_BOUNDARY. Assume the caller isn't lying. */
4269 set_mem_align (dest, align);
4270
4271 emit_move_insn (dest, x);
4272 }
4273 }
4274
4275 /* If part should go in registers, copy that part
4276 into the appropriate registers. Do this now, at the end,
4277 since mem-to-mem copies above may do function calls. */
4278 if (partial > 0 && reg != 0)
4279 {
4280 /* Handle calls that pass values in multiple non-contiguous locations.
4281 The Irix 6 ABI has examples of this. */
4282 if (GET_CODE (reg) == PARALLEL)
4283 emit_group_load (reg, x, type, -1);
4284 else
4285 {
4286 gcc_assert (partial % UNITS_PER_WORD == 0);
4287 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4288 }
4289 }
4290
4291 if (extra && args_addr == 0 && where_pad == stack_direction)
4292 anti_adjust_stack (GEN_INT (extra));
4293
4294 if (alignment_pad && args_addr == 0)
4295 anti_adjust_stack (alignment_pad);
4296 }
4297 \f
4298 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4299 operations. */
4300
4301 static rtx
4302 get_subtarget (rtx x)
4303 {
4304 return (optimize
4305 || x == 0
4306 /* Only registers can be subtargets. */
4307 || !REG_P (x)
4308 /* Don't use hard regs to avoid extending their life. */
4309 || REGNO (x) < FIRST_PSEUDO_REGISTER
4310 ? 0 : x);
4311 }
4312
4313 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4314 FIELD is a bitfield. Returns true if the optimization was successful,
4315 and there's nothing else to do. */
4316
4317 static bool
4318 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4319 unsigned HOST_WIDE_INT bitpos,
4320 unsigned HOST_WIDE_INT bitregion_start,
4321 unsigned HOST_WIDE_INT bitregion_end,
4322 enum machine_mode mode1, rtx str_rtx,
4323 tree to, tree src)
4324 {
4325 enum machine_mode str_mode = GET_MODE (str_rtx);
4326 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4327 tree op0, op1;
4328 rtx value, result;
4329 optab binop;
4330 gimple srcstmt;
4331 enum tree_code code;
4332
4333 if (mode1 != VOIDmode
4334 || bitsize >= BITS_PER_WORD
4335 || str_bitsize > BITS_PER_WORD
4336 || TREE_SIDE_EFFECTS (to)
4337 || TREE_THIS_VOLATILE (to))
4338 return false;
4339
4340 STRIP_NOPS (src);
4341 if (TREE_CODE (src) != SSA_NAME)
4342 return false;
4343 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4344 return false;
4345
4346 srcstmt = get_gimple_for_ssa_name (src);
4347 if (!srcstmt
4348 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4349 return false;
4350
4351 code = gimple_assign_rhs_code (srcstmt);
4352
4353 op0 = gimple_assign_rhs1 (srcstmt);
4354
4355 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4356 to find its initialization. Hopefully the initialization will
4357 be from a bitfield load. */
4358 if (TREE_CODE (op0) == SSA_NAME)
4359 {
4360 gimple op0stmt = get_gimple_for_ssa_name (op0);
4361
4362 /* We want to eventually have OP0 be the same as TO, which
4363 should be a bitfield. */
4364 if (!op0stmt
4365 || !is_gimple_assign (op0stmt)
4366 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4367 return false;
4368 op0 = gimple_assign_rhs1 (op0stmt);
4369 }
4370
4371 op1 = gimple_assign_rhs2 (srcstmt);
4372
4373 if (!operand_equal_p (to, op0, 0))
4374 return false;
4375
4376 if (MEM_P (str_rtx))
4377 {
4378 unsigned HOST_WIDE_INT offset1;
4379
4380 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4381 str_mode = word_mode;
4382 str_mode = get_best_mode (bitsize, bitpos,
4383 bitregion_start, bitregion_end,
4384 MEM_ALIGN (str_rtx), str_mode, 0);
4385 if (str_mode == VOIDmode)
4386 return false;
4387 str_bitsize = GET_MODE_BITSIZE (str_mode);
4388
4389 offset1 = bitpos;
4390 bitpos %= str_bitsize;
4391 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4392 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4393 }
4394 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4395 return false;
4396
4397 /* If the bit field covers the whole REG/MEM, store_field
4398 will likely generate better code. */
4399 if (bitsize >= str_bitsize)
4400 return false;
4401
4402 /* We can't handle fields split across multiple entities. */
4403 if (bitpos + bitsize > str_bitsize)
4404 return false;
4405
4406 if (BYTES_BIG_ENDIAN)
4407 bitpos = str_bitsize - bitpos - bitsize;
4408
4409 switch (code)
4410 {
4411 case PLUS_EXPR:
4412 case MINUS_EXPR:
4413 /* For now, just optimize the case of the topmost bitfield
4414 where we don't need to do any masking and also
4415 1 bit bitfields where xor can be used.
4416 We might win by one instruction for the other bitfields
4417 too if insv/extv instructions aren't used, so that
4418 can be added later. */
4419 if (bitpos + bitsize != str_bitsize
4420 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4421 break;
4422
4423 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4424 value = convert_modes (str_mode,
4425 TYPE_MODE (TREE_TYPE (op1)), value,
4426 TYPE_UNSIGNED (TREE_TYPE (op1)));
4427
4428 /* We may be accessing data outside the field, which means
4429 we can alias adjacent data. */
4430 if (MEM_P (str_rtx))
4431 {
4432 str_rtx = shallow_copy_rtx (str_rtx);
4433 set_mem_alias_set (str_rtx, 0);
4434 set_mem_expr (str_rtx, 0);
4435 }
4436
4437 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4438 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4439 {
4440 value = expand_and (str_mode, value, const1_rtx, NULL);
4441 binop = xor_optab;
4442 }
4443 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4444 result = expand_binop (str_mode, binop, str_rtx,
4445 value, str_rtx, 1, OPTAB_WIDEN);
4446 if (result != str_rtx)
4447 emit_move_insn (str_rtx, result);
4448 return true;
4449
4450 case BIT_IOR_EXPR:
4451 case BIT_XOR_EXPR:
4452 if (TREE_CODE (op1) != INTEGER_CST)
4453 break;
4454 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4455 value = convert_modes (str_mode,
4456 TYPE_MODE (TREE_TYPE (op1)), value,
4457 TYPE_UNSIGNED (TREE_TYPE (op1)));
4458
4459 /* We may be accessing data outside the field, which means
4460 we can alias adjacent data. */
4461 if (MEM_P (str_rtx))
4462 {
4463 str_rtx = shallow_copy_rtx (str_rtx);
4464 set_mem_alias_set (str_rtx, 0);
4465 set_mem_expr (str_rtx, 0);
4466 }
4467
4468 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4469 if (bitpos + bitsize != str_bitsize)
4470 {
4471 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1);
4472 value = expand_and (str_mode, value, mask, NULL_RTX);
4473 }
4474 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4475 result = expand_binop (str_mode, binop, str_rtx,
4476 value, str_rtx, 1, OPTAB_WIDEN);
4477 if (result != str_rtx)
4478 emit_move_insn (str_rtx, result);
4479 return true;
4480
4481 default:
4482 break;
4483 }
4484
4485 return false;
4486 }
4487
4488 /* In the C++ memory model, consecutive bit fields in a structure are
4489 considered one memory location.
4490
4491 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4492 returns the bit range of consecutive bits in which this COMPONENT_REF
4493 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4494 and *OFFSET may be adjusted in the process.
4495
4496 If the access does not need to be restricted, 0 is returned in both
4497 *BITSTART and *BITEND. */
4498
4499 static void
4500 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4501 unsigned HOST_WIDE_INT *bitend,
4502 tree exp,
4503 HOST_WIDE_INT *bitpos,
4504 tree *offset)
4505 {
4506 HOST_WIDE_INT bitoffset;
4507 tree field, repr;
4508
4509 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4510
4511 field = TREE_OPERAND (exp, 1);
4512 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4513 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4514 need to limit the range we can access. */
4515 if (!repr)
4516 {
4517 *bitstart = *bitend = 0;
4518 return;
4519 }
4520
4521 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4522 part of a larger bit field, then the representative does not serve any
4523 useful purpose. This can occur in Ada. */
4524 if (handled_component_p (TREE_OPERAND (exp, 0)))
4525 {
4526 enum machine_mode rmode;
4527 HOST_WIDE_INT rbitsize, rbitpos;
4528 tree roffset;
4529 int unsignedp;
4530 int volatilep = 0;
4531 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4532 &roffset, &rmode, &unsignedp, &volatilep, false);
4533 if ((rbitpos % BITS_PER_UNIT) != 0)
4534 {
4535 *bitstart = *bitend = 0;
4536 return;
4537 }
4538 }
4539
4540 /* Compute the adjustment to bitpos from the offset of the field
4541 relative to the representative. DECL_FIELD_OFFSET of field and
4542 repr are the same by construction if they are not constants,
4543 see finish_bitfield_layout. */
4544 if (host_integerp (DECL_FIELD_OFFSET (field), 1)
4545 && host_integerp (DECL_FIELD_OFFSET (repr), 1))
4546 bitoffset = (tree_low_cst (DECL_FIELD_OFFSET (field), 1)
4547 - tree_low_cst (DECL_FIELD_OFFSET (repr), 1)) * BITS_PER_UNIT;
4548 else
4549 bitoffset = 0;
4550 bitoffset += (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
4551 - tree_low_cst (DECL_FIELD_BIT_OFFSET (repr), 1));
4552
4553 /* If the adjustment is larger than bitpos, we would have a negative bit
4554 position for the lower bound and this may wreak havoc later. This can
4555 occur only if we have a non-null offset, so adjust offset and bitpos
4556 to make the lower bound non-negative. */
4557 if (bitoffset > *bitpos)
4558 {
4559 HOST_WIDE_INT adjust = bitoffset - *bitpos;
4560
4561 gcc_assert ((adjust % BITS_PER_UNIT) == 0);
4562 gcc_assert (*offset != NULL_TREE);
4563
4564 *bitpos += adjust;
4565 *offset
4566 = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));
4567 *bitstart = 0;
4568 }
4569 else
4570 *bitstart = *bitpos - bitoffset;
4571
4572 *bitend = *bitstart + tree_low_cst (DECL_SIZE (repr), 1) - 1;
4573 }
4574
4575 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4576 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4577 DECL_RTL was not set yet, return NORTL. */
4578
4579 static inline bool
4580 addr_expr_of_non_mem_decl_p_1 (tree addr, bool nortl)
4581 {
4582 if (TREE_CODE (addr) != ADDR_EXPR)
4583 return false;
4584
4585 tree base = TREE_OPERAND (addr, 0);
4586
4587 if (!DECL_P (base)
4588 || TREE_ADDRESSABLE (base)
4589 || DECL_MODE (base) == BLKmode)
4590 return false;
4591
4592 if (!DECL_RTL_SET_P (base))
4593 return nortl;
4594
4595 return (!MEM_P (DECL_RTL (base)));
4596 }
4597
4598 /* Returns true if the MEM_REF REF refers to an object that does not
4599 reside in memory and has non-BLKmode. */
4600
4601 static inline bool
4602 mem_ref_refers_to_non_mem_p (tree ref)
4603 {
4604 tree base = TREE_OPERAND (ref, 0);
4605 return addr_expr_of_non_mem_decl_p_1 (base, false);
4606 }
4607
4608 /* Return TRUE iff OP is an ADDR_EXPR of a DECL that's not
4609 addressable. This is very much like mem_ref_refers_to_non_mem_p,
4610 but instead of the MEM_REF, it takes its base, and it doesn't
4611 assume a DECL is in memory just because its RTL is not set yet. */
4612
4613 bool
4614 addr_expr_of_non_mem_decl_p (tree op)
4615 {
4616 return addr_expr_of_non_mem_decl_p_1 (op, true);
4617 }
4618
4619 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4620 is true, try generating a nontemporal store. */
4621
4622 void
4623 expand_assignment (tree to, tree from, bool nontemporal)
4624 {
4625 rtx to_rtx = 0;
4626 rtx result;
4627 enum machine_mode mode;
4628 unsigned int align;
4629 enum insn_code icode;
4630
4631 /* Don't crash if the lhs of the assignment was erroneous. */
4632 if (TREE_CODE (to) == ERROR_MARK)
4633 {
4634 expand_normal (from);
4635 return;
4636 }
4637
4638 /* Optimize away no-op moves without side-effects. */
4639 if (operand_equal_p (to, from, 0))
4640 return;
4641
4642 /* Handle misaligned stores. */
4643 mode = TYPE_MODE (TREE_TYPE (to));
4644 if ((TREE_CODE (to) == MEM_REF
4645 || TREE_CODE (to) == TARGET_MEM_REF)
4646 && mode != BLKmode
4647 && !mem_ref_refers_to_non_mem_p (to)
4648 && ((align = get_object_alignment (to))
4649 < GET_MODE_ALIGNMENT (mode))
4650 && (((icode = optab_handler (movmisalign_optab, mode))
4651 != CODE_FOR_nothing)
4652 || SLOW_UNALIGNED_ACCESS (mode, align)))
4653 {
4654 rtx reg, mem;
4655
4656 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4657 reg = force_not_mem (reg);
4658 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4659
4660 if (icode != CODE_FOR_nothing)
4661 {
4662 struct expand_operand ops[2];
4663
4664 create_fixed_operand (&ops[0], mem);
4665 create_input_operand (&ops[1], reg, mode);
4666 /* The movmisalign<mode> pattern cannot fail, else the assignment
4667 would silently be omitted. */
4668 expand_insn (icode, 2, ops);
4669 }
4670 else
4671 store_bit_field (mem, GET_MODE_BITSIZE (mode),
4672 0, 0, 0, mode, reg);
4673 return;
4674 }
4675
4676 /* Assignment of a structure component needs special treatment
4677 if the structure component's rtx is not simply a MEM.
4678 Assignment of an array element at a constant index, and assignment of
4679 an array element in an unaligned packed structure field, has the same
4680 problem. Same for (partially) storing into a non-memory object. */
4681 if (handled_component_p (to)
4682 || (TREE_CODE (to) == MEM_REF
4683 && mem_ref_refers_to_non_mem_p (to))
4684 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4685 {
4686 enum machine_mode mode1;
4687 HOST_WIDE_INT bitsize, bitpos;
4688 unsigned HOST_WIDE_INT bitregion_start = 0;
4689 unsigned HOST_WIDE_INT bitregion_end = 0;
4690 tree offset;
4691 int unsignedp;
4692 int volatilep = 0;
4693 tree tem;
4694 bool misalignp;
4695 rtx mem = NULL_RTX;
4696
4697 push_temp_slots ();
4698 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4699 &unsignedp, &volatilep, true);
4700
4701 if (TREE_CODE (to) == COMPONENT_REF
4702 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4703 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
4704
4705 /* If we are going to use store_bit_field and extract_bit_field,
4706 make sure to_rtx will be safe for multiple use. */
4707 mode = TYPE_MODE (TREE_TYPE (tem));
4708 if (TREE_CODE (tem) == MEM_REF
4709 && mode != BLKmode
4710 && ((align = get_object_alignment (tem))
4711 < GET_MODE_ALIGNMENT (mode))
4712 && ((icode = optab_handler (movmisalign_optab, mode))
4713 != CODE_FOR_nothing))
4714 {
4715 struct expand_operand ops[2];
4716
4717 misalignp = true;
4718 to_rtx = gen_reg_rtx (mode);
4719 mem = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4720
4721 /* If the misaligned store doesn't overwrite all bits, perform
4722 rmw cycle on MEM. */
4723 if (bitsize != GET_MODE_BITSIZE (mode))
4724 {
4725 create_input_operand (&ops[0], to_rtx, mode);
4726 create_fixed_operand (&ops[1], mem);
4727 /* The movmisalign<mode> pattern cannot fail, else the assignment
4728 would silently be omitted. */
4729 expand_insn (icode, 2, ops);
4730
4731 mem = copy_rtx (mem);
4732 }
4733 }
4734 else
4735 {
4736 misalignp = false;
4737 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4738 }
4739
4740 /* If the bitfield is volatile, we want to access it in the
4741 field's mode, not the computed mode.
4742 If a MEM has VOIDmode (external with incomplete type),
4743 use BLKmode for it instead. */
4744 if (MEM_P (to_rtx))
4745 {
4746 if (volatilep && flag_strict_volatile_bitfields > 0)
4747 to_rtx = adjust_address (to_rtx, mode1, 0);
4748 else if (GET_MODE (to_rtx) == VOIDmode)
4749 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4750 }
4751
4752 if (offset != 0)
4753 {
4754 enum machine_mode address_mode;
4755 rtx offset_rtx;
4756
4757 if (!MEM_P (to_rtx))
4758 {
4759 /* We can get constant negative offsets into arrays with broken
4760 user code. Translate this to a trap instead of ICEing. */
4761 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4762 expand_builtin_trap ();
4763 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4764 }
4765
4766 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4767 address_mode = get_address_mode (to_rtx);
4768 if (GET_MODE (offset_rtx) != address_mode)
4769 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4770
4771 /* A constant address in TO_RTX can have VOIDmode, we must not try
4772 to call force_reg for that case. Avoid that case. */
4773 if (MEM_P (to_rtx)
4774 && GET_MODE (to_rtx) == BLKmode
4775 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4776 && bitsize > 0
4777 && (bitpos % bitsize) == 0
4778 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4779 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4780 {
4781 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4782 bitpos = 0;
4783 }
4784
4785 to_rtx = offset_address (to_rtx, offset_rtx,
4786 highest_pow2_factor_for_target (to,
4787 offset));
4788 }
4789
4790 /* No action is needed if the target is not a memory and the field
4791 lies completely outside that target. This can occur if the source
4792 code contains an out-of-bounds access to a small array. */
4793 if (!MEM_P (to_rtx)
4794 && GET_MODE (to_rtx) != BLKmode
4795 && (unsigned HOST_WIDE_INT) bitpos
4796 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4797 {
4798 expand_normal (from);
4799 result = NULL;
4800 }
4801 /* Handle expand_expr of a complex value returning a CONCAT. */
4802 else if (GET_CODE (to_rtx) == CONCAT)
4803 {
4804 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4805 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4806 && bitpos == 0
4807 && bitsize == mode_bitsize)
4808 result = store_expr (from, to_rtx, false, nontemporal);
4809 else if (bitsize == mode_bitsize / 2
4810 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4811 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4812 nontemporal);
4813 else if (bitpos + bitsize <= mode_bitsize / 2)
4814 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4815 bitregion_start, bitregion_end,
4816 mode1, from,
4817 get_alias_set (to), nontemporal);
4818 else if (bitpos >= mode_bitsize / 2)
4819 result = store_field (XEXP (to_rtx, 1), bitsize,
4820 bitpos - mode_bitsize / 2,
4821 bitregion_start, bitregion_end,
4822 mode1, from,
4823 get_alias_set (to), nontemporal);
4824 else if (bitpos == 0 && bitsize == mode_bitsize)
4825 {
4826 rtx from_rtx;
4827 result = expand_normal (from);
4828 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4829 TYPE_MODE (TREE_TYPE (from)), 0);
4830 emit_move_insn (XEXP (to_rtx, 0),
4831 read_complex_part (from_rtx, false));
4832 emit_move_insn (XEXP (to_rtx, 1),
4833 read_complex_part (from_rtx, true));
4834 }
4835 else
4836 {
4837 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4838 GET_MODE_SIZE (GET_MODE (to_rtx)));
4839 write_complex_part (temp, XEXP (to_rtx, 0), false);
4840 write_complex_part (temp, XEXP (to_rtx, 1), true);
4841 result = store_field (temp, bitsize, bitpos,
4842 bitregion_start, bitregion_end,
4843 mode1, from,
4844 get_alias_set (to), nontemporal);
4845 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4846 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4847 }
4848 }
4849 else
4850 {
4851 if (MEM_P (to_rtx))
4852 {
4853 /* If the field is at offset zero, we could have been given the
4854 DECL_RTX of the parent struct. Don't munge it. */
4855 to_rtx = shallow_copy_rtx (to_rtx);
4856
4857 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4858
4859 /* Deal with volatile and readonly fields. The former is only
4860 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4861 if (volatilep)
4862 MEM_VOLATILE_P (to_rtx) = 1;
4863 }
4864
4865 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4866 bitregion_start, bitregion_end,
4867 mode1,
4868 to_rtx, to, from))
4869 result = NULL;
4870 else
4871 result = store_field (to_rtx, bitsize, bitpos,
4872 bitregion_start, bitregion_end,
4873 mode1, from,
4874 get_alias_set (to), nontemporal);
4875 }
4876
4877 if (misalignp)
4878 {
4879 struct expand_operand ops[2];
4880
4881 create_fixed_operand (&ops[0], mem);
4882 create_input_operand (&ops[1], to_rtx, mode);
4883 /* The movmisalign<mode> pattern cannot fail, else the assignment
4884 would silently be omitted. */
4885 expand_insn (icode, 2, ops);
4886 }
4887
4888 if (result)
4889 preserve_temp_slots (result);
4890 pop_temp_slots ();
4891 return;
4892 }
4893
4894 /* If the rhs is a function call and its value is not an aggregate,
4895 call the function before we start to compute the lhs.
4896 This is needed for correct code for cases such as
4897 val = setjmp (buf) on machines where reference to val
4898 requires loading up part of an address in a separate insn.
4899
4900 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4901 since it might be a promoted variable where the zero- or sign- extension
4902 needs to be done. Handling this in the normal way is safe because no
4903 computation is done before the call. The same is true for SSA names. */
4904 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4905 && COMPLETE_TYPE_P (TREE_TYPE (from))
4906 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4907 && ! (((TREE_CODE (to) == VAR_DECL
4908 || TREE_CODE (to) == PARM_DECL
4909 || TREE_CODE (to) == RESULT_DECL)
4910 && REG_P (DECL_RTL (to)))
4911 || TREE_CODE (to) == SSA_NAME))
4912 {
4913 rtx value;
4914
4915 push_temp_slots ();
4916 value = expand_normal (from);
4917 if (to_rtx == 0)
4918 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4919
4920 /* Handle calls that return values in multiple non-contiguous locations.
4921 The Irix 6 ABI has examples of this. */
4922 if (GET_CODE (to_rtx) == PARALLEL)
4923 {
4924 if (GET_CODE (value) == PARALLEL)
4925 emit_group_move (to_rtx, value);
4926 else
4927 emit_group_load (to_rtx, value, TREE_TYPE (from),
4928 int_size_in_bytes (TREE_TYPE (from)));
4929 }
4930 else if (GET_CODE (value) == PARALLEL)
4931 emit_group_store (to_rtx, value, TREE_TYPE (from),
4932 int_size_in_bytes (TREE_TYPE (from)));
4933 else if (GET_MODE (to_rtx) == BLKmode)
4934 {
4935 /* Handle calls that return BLKmode values in registers. */
4936 if (REG_P (value))
4937 copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from));
4938 else
4939 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4940 }
4941 else
4942 {
4943 if (POINTER_TYPE_P (TREE_TYPE (to)))
4944 value = convert_memory_address_addr_space
4945 (GET_MODE (to_rtx), value,
4946 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4947
4948 emit_move_insn (to_rtx, value);
4949 }
4950 preserve_temp_slots (to_rtx);
4951 pop_temp_slots ();
4952 return;
4953 }
4954
4955 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
4956 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4957
4958 /* Don't move directly into a return register. */
4959 if (TREE_CODE (to) == RESULT_DECL
4960 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4961 {
4962 rtx temp;
4963
4964 push_temp_slots ();
4965
4966 /* If the source is itself a return value, it still is in a pseudo at
4967 this point so we can move it back to the return register directly. */
4968 if (REG_P (to_rtx)
4969 && TYPE_MODE (TREE_TYPE (from)) == BLKmode
4970 && TREE_CODE (from) != CALL_EXPR)
4971 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
4972 else
4973 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4974
4975 /* Handle calls that return values in multiple non-contiguous locations.
4976 The Irix 6 ABI has examples of this. */
4977 if (GET_CODE (to_rtx) == PARALLEL)
4978 {
4979 if (GET_CODE (temp) == PARALLEL)
4980 emit_group_move (to_rtx, temp);
4981 else
4982 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4983 int_size_in_bytes (TREE_TYPE (from)));
4984 }
4985 else if (temp)
4986 emit_move_insn (to_rtx, temp);
4987
4988 preserve_temp_slots (to_rtx);
4989 pop_temp_slots ();
4990 return;
4991 }
4992
4993 /* In case we are returning the contents of an object which overlaps
4994 the place the value is being stored, use a safe function when copying
4995 a value through a pointer into a structure value return block. */
4996 if (TREE_CODE (to) == RESULT_DECL
4997 && TREE_CODE (from) == INDIRECT_REF
4998 && ADDR_SPACE_GENERIC_P
4999 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
5000 && refs_may_alias_p (to, from)
5001 && cfun->returns_struct
5002 && !cfun->returns_pcc_struct)
5003 {
5004 rtx from_rtx, size;
5005
5006 push_temp_slots ();
5007 size = expr_size (from);
5008 from_rtx = expand_normal (from);
5009
5010 emit_library_call (memmove_libfunc, LCT_NORMAL,
5011 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
5012 XEXP (from_rtx, 0), Pmode,
5013 convert_to_mode (TYPE_MODE (sizetype),
5014 size, TYPE_UNSIGNED (sizetype)),
5015 TYPE_MODE (sizetype));
5016
5017 preserve_temp_slots (to_rtx);
5018 pop_temp_slots ();
5019 return;
5020 }
5021
5022 /* Compute FROM and store the value in the rtx we got. */
5023
5024 push_temp_slots ();
5025 result = store_expr (from, to_rtx, 0, nontemporal);
5026 preserve_temp_slots (result);
5027 pop_temp_slots ();
5028 return;
5029 }
5030
5031 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5032 succeeded, false otherwise. */
5033
5034 bool
5035 emit_storent_insn (rtx to, rtx from)
5036 {
5037 struct expand_operand ops[2];
5038 enum machine_mode mode = GET_MODE (to);
5039 enum insn_code code = optab_handler (storent_optab, mode);
5040
5041 if (code == CODE_FOR_nothing)
5042 return false;
5043
5044 create_fixed_operand (&ops[0], to);
5045 create_input_operand (&ops[1], from, mode);
5046 return maybe_expand_insn (code, 2, ops);
5047 }
5048
5049 /* Generate code for computing expression EXP,
5050 and storing the value into TARGET.
5051
5052 If the mode is BLKmode then we may return TARGET itself.
5053 It turns out that in BLKmode it doesn't cause a problem.
5054 because C has no operators that could combine two different
5055 assignments into the same BLKmode object with different values
5056 with no sequence point. Will other languages need this to
5057 be more thorough?
5058
5059 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5060 stack, and block moves may need to be treated specially.
5061
5062 If NONTEMPORAL is true, try using a nontemporal store instruction. */
5063
5064 rtx
5065 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
5066 {
5067 rtx temp;
5068 rtx alt_rtl = NULL_RTX;
5069 location_t loc = curr_insn_location ();
5070
5071 if (VOID_TYPE_P (TREE_TYPE (exp)))
5072 {
5073 /* C++ can generate ?: expressions with a throw expression in one
5074 branch and an rvalue in the other. Here, we resolve attempts to
5075 store the throw expression's nonexistent result. */
5076 gcc_assert (!call_param_p);
5077 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5078 return NULL_RTX;
5079 }
5080 if (TREE_CODE (exp) == COMPOUND_EXPR)
5081 {
5082 /* Perform first part of compound expression, then assign from second
5083 part. */
5084 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5085 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5086 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5087 nontemporal);
5088 }
5089 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5090 {
5091 /* For conditional expression, get safe form of the target. Then
5092 test the condition, doing the appropriate assignment on either
5093 side. This avoids the creation of unnecessary temporaries.
5094 For non-BLKmode, it is more efficient not to do this. */
5095
5096 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
5097
5098 do_pending_stack_adjust ();
5099 NO_DEFER_POP;
5100 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5101 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5102 nontemporal);
5103 emit_jump_insn (gen_jump (lab2));
5104 emit_barrier ();
5105 emit_label (lab1);
5106 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5107 nontemporal);
5108 emit_label (lab2);
5109 OK_DEFER_POP;
5110
5111 return NULL_RTX;
5112 }
5113 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5114 /* If this is a scalar in a register that is stored in a wider mode
5115 than the declared mode, compute the result into its declared mode
5116 and then convert to the wider mode. Our value is the computed
5117 expression. */
5118 {
5119 rtx inner_target = 0;
5120
5121 /* We can do the conversion inside EXP, which will often result
5122 in some optimizations. Do the conversion in two steps: first
5123 change the signedness, if needed, then the extend. But don't
5124 do this if the type of EXP is a subtype of something else
5125 since then the conversion might involve more than just
5126 converting modes. */
5127 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5128 && TREE_TYPE (TREE_TYPE (exp)) == 0
5129 && GET_MODE_PRECISION (GET_MODE (target))
5130 == TYPE_PRECISION (TREE_TYPE (exp)))
5131 {
5132 if (TYPE_UNSIGNED (TREE_TYPE (exp))
5133 != SUBREG_PROMOTED_UNSIGNED_P (target))
5134 {
5135 /* Some types, e.g. Fortran's logical*4, won't have a signed
5136 version, so use the mode instead. */
5137 tree ntype
5138 = (signed_or_unsigned_type_for
5139 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
5140 if (ntype == NULL)
5141 ntype = lang_hooks.types.type_for_mode
5142 (TYPE_MODE (TREE_TYPE (exp)),
5143 SUBREG_PROMOTED_UNSIGNED_P (target));
5144
5145 exp = fold_convert_loc (loc, ntype, exp);
5146 }
5147
5148 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5149 (GET_MODE (SUBREG_REG (target)),
5150 SUBREG_PROMOTED_UNSIGNED_P (target)),
5151 exp);
5152
5153 inner_target = SUBREG_REG (target);
5154 }
5155
5156 temp = expand_expr (exp, inner_target, VOIDmode,
5157 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5158
5159 /* If TEMP is a VOIDmode constant, use convert_modes to make
5160 sure that we properly convert it. */
5161 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5162 {
5163 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5164 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
5165 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5166 GET_MODE (target), temp,
5167 SUBREG_PROMOTED_UNSIGNED_P (target));
5168 }
5169
5170 convert_move (SUBREG_REG (target), temp,
5171 SUBREG_PROMOTED_UNSIGNED_P (target));
5172
5173 return NULL_RTX;
5174 }
5175 else if ((TREE_CODE (exp) == STRING_CST
5176 || (TREE_CODE (exp) == MEM_REF
5177 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5178 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5179 == STRING_CST
5180 && integer_zerop (TREE_OPERAND (exp, 1))))
5181 && !nontemporal && !call_param_p
5182 && MEM_P (target))
5183 {
5184 /* Optimize initialization of an array with a STRING_CST. */
5185 HOST_WIDE_INT exp_len, str_copy_len;
5186 rtx dest_mem;
5187 tree str = TREE_CODE (exp) == STRING_CST
5188 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5189
5190 exp_len = int_expr_size (exp);
5191 if (exp_len <= 0)
5192 goto normal_expr;
5193
5194 if (TREE_STRING_LENGTH (str) <= 0)
5195 goto normal_expr;
5196
5197 str_copy_len = strlen (TREE_STRING_POINTER (str));
5198 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5199 goto normal_expr;
5200
5201 str_copy_len = TREE_STRING_LENGTH (str);
5202 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5203 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5204 {
5205 str_copy_len += STORE_MAX_PIECES - 1;
5206 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5207 }
5208 str_copy_len = MIN (str_copy_len, exp_len);
5209 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5210 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5211 MEM_ALIGN (target), false))
5212 goto normal_expr;
5213
5214 dest_mem = target;
5215
5216 dest_mem = store_by_pieces (dest_mem,
5217 str_copy_len, builtin_strncpy_read_str,
5218 CONST_CAST (char *,
5219 TREE_STRING_POINTER (str)),
5220 MEM_ALIGN (target), false,
5221 exp_len > str_copy_len ? 1 : 0);
5222 if (exp_len > str_copy_len)
5223 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5224 GEN_INT (exp_len - str_copy_len),
5225 BLOCK_OP_NORMAL);
5226 return NULL_RTX;
5227 }
5228 else
5229 {
5230 rtx tmp_target;
5231
5232 normal_expr:
5233 /* If we want to use a nontemporal store, force the value to
5234 register first. */
5235 tmp_target = nontemporal ? NULL_RTX : target;
5236 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5237 (call_param_p
5238 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5239 &alt_rtl);
5240 }
5241
5242 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5243 the same as that of TARGET, adjust the constant. This is needed, for
5244 example, in case it is a CONST_DOUBLE and we want only a word-sized
5245 value. */
5246 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5247 && TREE_CODE (exp) != ERROR_MARK
5248 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5249 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5250 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5251
5252 /* If value was not generated in the target, store it there.
5253 Convert the value to TARGET's type first if necessary and emit the
5254 pending incrementations that have been queued when expanding EXP.
5255 Note that we cannot emit the whole queue blindly because this will
5256 effectively disable the POST_INC optimization later.
5257
5258 If TEMP and TARGET compare equal according to rtx_equal_p, but
5259 one or both of them are volatile memory refs, we have to distinguish
5260 two cases:
5261 - expand_expr has used TARGET. In this case, we must not generate
5262 another copy. This can be detected by TARGET being equal according
5263 to == .
5264 - expand_expr has not used TARGET - that means that the source just
5265 happens to have the same RTX form. Since temp will have been created
5266 by expand_expr, it will compare unequal according to == .
5267 We must generate a copy in this case, to reach the correct number
5268 of volatile memory references. */
5269
5270 if ((! rtx_equal_p (temp, target)
5271 || (temp != target && (side_effects_p (temp)
5272 || side_effects_p (target))))
5273 && TREE_CODE (exp) != ERROR_MARK
5274 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5275 but TARGET is not valid memory reference, TEMP will differ
5276 from TARGET although it is really the same location. */
5277 && !(alt_rtl
5278 && rtx_equal_p (alt_rtl, target)
5279 && !side_effects_p (alt_rtl)
5280 && !side_effects_p (target))
5281 /* If there's nothing to copy, don't bother. Don't call
5282 expr_size unless necessary, because some front-ends (C++)
5283 expr_size-hook must not be given objects that are not
5284 supposed to be bit-copied or bit-initialized. */
5285 && expr_size (exp) != const0_rtx)
5286 {
5287 if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode)
5288 {
5289 if (GET_MODE (target) == BLKmode)
5290 {
5291 /* Handle calls that return BLKmode values in registers. */
5292 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
5293 copy_blkmode_from_reg (target, temp, TREE_TYPE (exp));
5294 else
5295 store_bit_field (target,
5296 INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5297 0, 0, 0, GET_MODE (temp), temp);
5298 }
5299 else
5300 convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5301 }
5302
5303 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5304 {
5305 /* Handle copying a string constant into an array. The string
5306 constant may be shorter than the array. So copy just the string's
5307 actual length, and clear the rest. First get the size of the data
5308 type of the string, which is actually the size of the target. */
5309 rtx size = expr_size (exp);
5310
5311 if (CONST_INT_P (size)
5312 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5313 emit_block_move (target, temp, size,
5314 (call_param_p
5315 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5316 else
5317 {
5318 enum machine_mode pointer_mode
5319 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5320 enum machine_mode address_mode = get_address_mode (target);
5321
5322 /* Compute the size of the data to copy from the string. */
5323 tree copy_size
5324 = size_binop_loc (loc, MIN_EXPR,
5325 make_tree (sizetype, size),
5326 size_int (TREE_STRING_LENGTH (exp)));
5327 rtx copy_size_rtx
5328 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5329 (call_param_p
5330 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5331 rtx label = 0;
5332
5333 /* Copy that much. */
5334 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5335 TYPE_UNSIGNED (sizetype));
5336 emit_block_move (target, temp, copy_size_rtx,
5337 (call_param_p
5338 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5339
5340 /* Figure out how much is left in TARGET that we have to clear.
5341 Do all calculations in pointer_mode. */
5342 if (CONST_INT_P (copy_size_rtx))
5343 {
5344 size = plus_constant (address_mode, size,
5345 -INTVAL (copy_size_rtx));
5346 target = adjust_address (target, BLKmode,
5347 INTVAL (copy_size_rtx));
5348 }
5349 else
5350 {
5351 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5352 copy_size_rtx, NULL_RTX, 0,
5353 OPTAB_LIB_WIDEN);
5354
5355 if (GET_MODE (copy_size_rtx) != address_mode)
5356 copy_size_rtx = convert_to_mode (address_mode,
5357 copy_size_rtx,
5358 TYPE_UNSIGNED (sizetype));
5359
5360 target = offset_address (target, copy_size_rtx,
5361 highest_pow2_factor (copy_size));
5362 label = gen_label_rtx ();
5363 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5364 GET_MODE (size), 0, label);
5365 }
5366
5367 if (size != const0_rtx)
5368 clear_storage (target, size, BLOCK_OP_NORMAL);
5369
5370 if (label)
5371 emit_label (label);
5372 }
5373 }
5374 /* Handle calls that return values in multiple non-contiguous locations.
5375 The Irix 6 ABI has examples of this. */
5376 else if (GET_CODE (target) == PARALLEL)
5377 {
5378 if (GET_CODE (temp) == PARALLEL)
5379 emit_group_move (target, temp);
5380 else
5381 emit_group_load (target, temp, TREE_TYPE (exp),
5382 int_size_in_bytes (TREE_TYPE (exp)));
5383 }
5384 else if (GET_CODE (temp) == PARALLEL)
5385 emit_group_store (target, temp, TREE_TYPE (exp),
5386 int_size_in_bytes (TREE_TYPE (exp)));
5387 else if (GET_MODE (temp) == BLKmode)
5388 emit_block_move (target, temp, expr_size (exp),
5389 (call_param_p
5390 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5391 /* If we emit a nontemporal store, there is nothing else to do. */
5392 else if (nontemporal && emit_storent_insn (target, temp))
5393 ;
5394 else
5395 {
5396 temp = force_operand (temp, target);
5397 if (temp != target)
5398 emit_move_insn (target, temp);
5399 }
5400 }
5401
5402 return NULL_RTX;
5403 }
5404 \f
5405 /* Return true if field F of structure TYPE is a flexible array. */
5406
5407 static bool
5408 flexible_array_member_p (const_tree f, const_tree type)
5409 {
5410 const_tree tf;
5411
5412 tf = TREE_TYPE (f);
5413 return (DECL_CHAIN (f) == NULL
5414 && TREE_CODE (tf) == ARRAY_TYPE
5415 && TYPE_DOMAIN (tf)
5416 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5417 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5418 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5419 && int_size_in_bytes (type) >= 0);
5420 }
5421
5422 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5423 must have in order for it to completely initialize a value of type TYPE.
5424 Return -1 if the number isn't known.
5425
5426 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5427
5428 static HOST_WIDE_INT
5429 count_type_elements (const_tree type, bool for_ctor_p)
5430 {
5431 switch (TREE_CODE (type))
5432 {
5433 case ARRAY_TYPE:
5434 {
5435 tree nelts;
5436
5437 nelts = array_type_nelts (type);
5438 if (nelts && host_integerp (nelts, 1))
5439 {
5440 unsigned HOST_WIDE_INT n;
5441
5442 n = tree_low_cst (nelts, 1) + 1;
5443 if (n == 0 || for_ctor_p)
5444 return n;
5445 else
5446 return n * count_type_elements (TREE_TYPE (type), false);
5447 }
5448 return for_ctor_p ? -1 : 1;
5449 }
5450
5451 case RECORD_TYPE:
5452 {
5453 unsigned HOST_WIDE_INT n;
5454 tree f;
5455
5456 n = 0;
5457 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5458 if (TREE_CODE (f) == FIELD_DECL)
5459 {
5460 if (!for_ctor_p)
5461 n += count_type_elements (TREE_TYPE (f), false);
5462 else if (!flexible_array_member_p (f, type))
5463 /* Don't count flexible arrays, which are not supposed
5464 to be initialized. */
5465 n += 1;
5466 }
5467
5468 return n;
5469 }
5470
5471 case UNION_TYPE:
5472 case QUAL_UNION_TYPE:
5473 {
5474 tree f;
5475 HOST_WIDE_INT n, m;
5476
5477 gcc_assert (!for_ctor_p);
5478 /* Estimate the number of scalars in each field and pick the
5479 maximum. Other estimates would do instead; the idea is simply
5480 to make sure that the estimate is not sensitive to the ordering
5481 of the fields. */
5482 n = 1;
5483 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5484 if (TREE_CODE (f) == FIELD_DECL)
5485 {
5486 m = count_type_elements (TREE_TYPE (f), false);
5487 /* If the field doesn't span the whole union, add an extra
5488 scalar for the rest. */
5489 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5490 TYPE_SIZE (type)) != 1)
5491 m++;
5492 if (n < m)
5493 n = m;
5494 }
5495 return n;
5496 }
5497
5498 case COMPLEX_TYPE:
5499 return 2;
5500
5501 case VECTOR_TYPE:
5502 return TYPE_VECTOR_SUBPARTS (type);
5503
5504 case INTEGER_TYPE:
5505 case REAL_TYPE:
5506 case FIXED_POINT_TYPE:
5507 case ENUMERAL_TYPE:
5508 case BOOLEAN_TYPE:
5509 case POINTER_TYPE:
5510 case OFFSET_TYPE:
5511 case REFERENCE_TYPE:
5512 case NULLPTR_TYPE:
5513 return 1;
5514
5515 case ERROR_MARK:
5516 return 0;
5517
5518 case VOID_TYPE:
5519 case METHOD_TYPE:
5520 case FUNCTION_TYPE:
5521 case LANG_TYPE:
5522 default:
5523 gcc_unreachable ();
5524 }
5525 }
5526
5527 /* Helper for categorize_ctor_elements. Identical interface. */
5528
5529 static bool
5530 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5531 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5532 {
5533 unsigned HOST_WIDE_INT idx;
5534 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5535 tree value, purpose, elt_type;
5536
5537 /* Whether CTOR is a valid constant initializer, in accordance with what
5538 initializer_constant_valid_p does. If inferred from the constructor
5539 elements, true until proven otherwise. */
5540 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5541 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5542
5543 nz_elts = 0;
5544 init_elts = 0;
5545 num_fields = 0;
5546 elt_type = NULL_TREE;
5547
5548 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5549 {
5550 HOST_WIDE_INT mult = 1;
5551
5552 if (purpose && TREE_CODE (purpose) == RANGE_EXPR)
5553 {
5554 tree lo_index = TREE_OPERAND (purpose, 0);
5555 tree hi_index = TREE_OPERAND (purpose, 1);
5556
5557 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5558 mult = (tree_low_cst (hi_index, 1)
5559 - tree_low_cst (lo_index, 1) + 1);
5560 }
5561 num_fields += mult;
5562 elt_type = TREE_TYPE (value);
5563
5564 switch (TREE_CODE (value))
5565 {
5566 case CONSTRUCTOR:
5567 {
5568 HOST_WIDE_INT nz = 0, ic = 0;
5569
5570 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5571 p_complete);
5572
5573 nz_elts += mult * nz;
5574 init_elts += mult * ic;
5575
5576 if (const_from_elts_p && const_p)
5577 const_p = const_elt_p;
5578 }
5579 break;
5580
5581 case INTEGER_CST:
5582 case REAL_CST:
5583 case FIXED_CST:
5584 if (!initializer_zerop (value))
5585 nz_elts += mult;
5586 init_elts += mult;
5587 break;
5588
5589 case STRING_CST:
5590 nz_elts += mult * TREE_STRING_LENGTH (value);
5591 init_elts += mult * TREE_STRING_LENGTH (value);
5592 break;
5593
5594 case COMPLEX_CST:
5595 if (!initializer_zerop (TREE_REALPART (value)))
5596 nz_elts += mult;
5597 if (!initializer_zerop (TREE_IMAGPART (value)))
5598 nz_elts += mult;
5599 init_elts += mult;
5600 break;
5601
5602 case VECTOR_CST:
5603 {
5604 unsigned i;
5605 for (i = 0; i < VECTOR_CST_NELTS (value); ++i)
5606 {
5607 tree v = VECTOR_CST_ELT (value, i);
5608 if (!initializer_zerop (v))
5609 nz_elts += mult;
5610 init_elts += mult;
5611 }
5612 }
5613 break;
5614
5615 default:
5616 {
5617 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5618 nz_elts += mult * tc;
5619 init_elts += mult * tc;
5620
5621 if (const_from_elts_p && const_p)
5622 const_p = initializer_constant_valid_p (value, elt_type)
5623 != NULL_TREE;
5624 }
5625 break;
5626 }
5627 }
5628
5629 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5630 num_fields, elt_type))
5631 *p_complete = false;
5632
5633 *p_nz_elts += nz_elts;
5634 *p_init_elts += init_elts;
5635
5636 return const_p;
5637 }
5638
5639 /* Examine CTOR to discover:
5640 * how many scalar fields are set to nonzero values,
5641 and place it in *P_NZ_ELTS;
5642 * how many scalar fields in total are in CTOR,
5643 and place it in *P_ELT_COUNT.
5644 * whether the constructor is complete -- in the sense that every
5645 meaningful byte is explicitly given a value --
5646 and place it in *P_COMPLETE.
5647
5648 Return whether or not CTOR is a valid static constant initializer, the same
5649 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5650
5651 bool
5652 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5653 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5654 {
5655 *p_nz_elts = 0;
5656 *p_init_elts = 0;
5657 *p_complete = true;
5658
5659 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5660 }
5661
5662 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5663 of which had type LAST_TYPE. Each element was itself a complete
5664 initializer, in the sense that every meaningful byte was explicitly
5665 given a value. Return true if the same is true for the constructor
5666 as a whole. */
5667
5668 bool
5669 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5670 const_tree last_type)
5671 {
5672 if (TREE_CODE (type) == UNION_TYPE
5673 || TREE_CODE (type) == QUAL_UNION_TYPE)
5674 {
5675 if (num_elts == 0)
5676 return false;
5677
5678 gcc_assert (num_elts == 1 && last_type);
5679
5680 /* ??? We could look at each element of the union, and find the
5681 largest element. Which would avoid comparing the size of the
5682 initialized element against any tail padding in the union.
5683 Doesn't seem worth the effort... */
5684 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5685 }
5686
5687 return count_type_elements (type, true) == num_elts;
5688 }
5689
5690 /* Return 1 if EXP contains mostly (3/4) zeros. */
5691
5692 static int
5693 mostly_zeros_p (const_tree exp)
5694 {
5695 if (TREE_CODE (exp) == CONSTRUCTOR)
5696 {
5697 HOST_WIDE_INT nz_elts, init_elts;
5698 bool complete_p;
5699
5700 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5701 return !complete_p || nz_elts < init_elts / 4;
5702 }
5703
5704 return initializer_zerop (exp);
5705 }
5706
5707 /* Return 1 if EXP contains all zeros. */
5708
5709 static int
5710 all_zeros_p (const_tree exp)
5711 {
5712 if (TREE_CODE (exp) == CONSTRUCTOR)
5713 {
5714 HOST_WIDE_INT nz_elts, init_elts;
5715 bool complete_p;
5716
5717 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5718 return nz_elts == 0;
5719 }
5720
5721 return initializer_zerop (exp);
5722 }
5723 \f
5724 /* Helper function for store_constructor.
5725 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5726 CLEARED is as for store_constructor.
5727 ALIAS_SET is the alias set to use for any stores.
5728
5729 This provides a recursive shortcut back to store_constructor when it isn't
5730 necessary to go through store_field. This is so that we can pass through
5731 the cleared field to let store_constructor know that we may not have to
5732 clear a substructure if the outer structure has already been cleared. */
5733
5734 static void
5735 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5736 HOST_WIDE_INT bitpos, enum machine_mode mode,
5737 tree exp, int cleared, alias_set_type alias_set)
5738 {
5739 if (TREE_CODE (exp) == CONSTRUCTOR
5740 /* We can only call store_constructor recursively if the size and
5741 bit position are on a byte boundary. */
5742 && bitpos % BITS_PER_UNIT == 0
5743 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5744 /* If we have a nonzero bitpos for a register target, then we just
5745 let store_field do the bitfield handling. This is unlikely to
5746 generate unnecessary clear instructions anyways. */
5747 && (bitpos == 0 || MEM_P (target)))
5748 {
5749 if (MEM_P (target))
5750 target
5751 = adjust_address (target,
5752 GET_MODE (target) == BLKmode
5753 || 0 != (bitpos
5754 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5755 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5756
5757
5758 /* Update the alias set, if required. */
5759 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5760 && MEM_ALIAS_SET (target) != 0)
5761 {
5762 target = copy_rtx (target);
5763 set_mem_alias_set (target, alias_set);
5764 }
5765
5766 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5767 }
5768 else
5769 store_field (target, bitsize, bitpos, 0, 0, mode, exp, alias_set, false);
5770 }
5771
5772 /* Store the value of constructor EXP into the rtx TARGET.
5773 TARGET is either a REG or a MEM; we know it cannot conflict, since
5774 safe_from_p has been called.
5775 CLEARED is true if TARGET is known to have been zero'd.
5776 SIZE is the number of bytes of TARGET we are allowed to modify: this
5777 may not be the same as the size of EXP if we are assigning to a field
5778 which has been packed to exclude padding bits. */
5779
5780 static void
5781 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5782 {
5783 tree type = TREE_TYPE (exp);
5784 #ifdef WORD_REGISTER_OPERATIONS
5785 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5786 #endif
5787
5788 switch (TREE_CODE (type))
5789 {
5790 case RECORD_TYPE:
5791 case UNION_TYPE:
5792 case QUAL_UNION_TYPE:
5793 {
5794 unsigned HOST_WIDE_INT idx;
5795 tree field, value;
5796
5797 /* If size is zero or the target is already cleared, do nothing. */
5798 if (size == 0 || cleared)
5799 cleared = 1;
5800 /* We either clear the aggregate or indicate the value is dead. */
5801 else if ((TREE_CODE (type) == UNION_TYPE
5802 || TREE_CODE (type) == QUAL_UNION_TYPE)
5803 && ! CONSTRUCTOR_ELTS (exp))
5804 /* If the constructor is empty, clear the union. */
5805 {
5806 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5807 cleared = 1;
5808 }
5809
5810 /* If we are building a static constructor into a register,
5811 set the initial value as zero so we can fold the value into
5812 a constant. But if more than one register is involved,
5813 this probably loses. */
5814 else if (REG_P (target) && TREE_STATIC (exp)
5815 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5816 {
5817 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5818 cleared = 1;
5819 }
5820
5821 /* If the constructor has fewer fields than the structure or
5822 if we are initializing the structure to mostly zeros, clear
5823 the whole structure first. Don't do this if TARGET is a
5824 register whose mode size isn't equal to SIZE since
5825 clear_storage can't handle this case. */
5826 else if (size > 0
5827 && (((int)vec_safe_length (CONSTRUCTOR_ELTS (exp))
5828 != fields_length (type))
5829 || mostly_zeros_p (exp))
5830 && (!REG_P (target)
5831 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5832 == size)))
5833 {
5834 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5835 cleared = 1;
5836 }
5837
5838 if (REG_P (target) && !cleared)
5839 emit_clobber (target);
5840
5841 /* Store each element of the constructor into the
5842 corresponding field of TARGET. */
5843 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5844 {
5845 enum machine_mode mode;
5846 HOST_WIDE_INT bitsize;
5847 HOST_WIDE_INT bitpos = 0;
5848 tree offset;
5849 rtx to_rtx = target;
5850
5851 /* Just ignore missing fields. We cleared the whole
5852 structure, above, if any fields are missing. */
5853 if (field == 0)
5854 continue;
5855
5856 if (cleared && initializer_zerop (value))
5857 continue;
5858
5859 if (host_integerp (DECL_SIZE (field), 1))
5860 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5861 else
5862 bitsize = -1;
5863
5864 mode = DECL_MODE (field);
5865 if (DECL_BIT_FIELD (field))
5866 mode = VOIDmode;
5867
5868 offset = DECL_FIELD_OFFSET (field);
5869 if (host_integerp (offset, 0)
5870 && host_integerp (bit_position (field), 0))
5871 {
5872 bitpos = int_bit_position (field);
5873 offset = 0;
5874 }
5875 else
5876 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5877
5878 if (offset)
5879 {
5880 enum machine_mode address_mode;
5881 rtx offset_rtx;
5882
5883 offset
5884 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5885 make_tree (TREE_TYPE (exp),
5886 target));
5887
5888 offset_rtx = expand_normal (offset);
5889 gcc_assert (MEM_P (to_rtx));
5890
5891 address_mode = get_address_mode (to_rtx);
5892 if (GET_MODE (offset_rtx) != address_mode)
5893 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5894
5895 to_rtx = offset_address (to_rtx, offset_rtx,
5896 highest_pow2_factor (offset));
5897 }
5898
5899 #ifdef WORD_REGISTER_OPERATIONS
5900 /* If this initializes a field that is smaller than a
5901 word, at the start of a word, try to widen it to a full
5902 word. This special case allows us to output C++ member
5903 function initializations in a form that the optimizers
5904 can understand. */
5905 if (REG_P (target)
5906 && bitsize < BITS_PER_WORD
5907 && bitpos % BITS_PER_WORD == 0
5908 && GET_MODE_CLASS (mode) == MODE_INT
5909 && TREE_CODE (value) == INTEGER_CST
5910 && exp_size >= 0
5911 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5912 {
5913 tree type = TREE_TYPE (value);
5914
5915 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5916 {
5917 type = lang_hooks.types.type_for_mode
5918 (word_mode, TYPE_UNSIGNED (type));
5919 value = fold_convert (type, value);
5920 }
5921
5922 if (BYTES_BIG_ENDIAN)
5923 value
5924 = fold_build2 (LSHIFT_EXPR, type, value,
5925 build_int_cst (type,
5926 BITS_PER_WORD - bitsize));
5927 bitsize = BITS_PER_WORD;
5928 mode = word_mode;
5929 }
5930 #endif
5931
5932 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5933 && DECL_NONADDRESSABLE_P (field))
5934 {
5935 to_rtx = copy_rtx (to_rtx);
5936 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5937 }
5938
5939 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5940 value, cleared,
5941 get_alias_set (TREE_TYPE (field)));
5942 }
5943 break;
5944 }
5945 case ARRAY_TYPE:
5946 {
5947 tree value, index;
5948 unsigned HOST_WIDE_INT i;
5949 int need_to_clear;
5950 tree domain;
5951 tree elttype = TREE_TYPE (type);
5952 int const_bounds_p;
5953 HOST_WIDE_INT minelt = 0;
5954 HOST_WIDE_INT maxelt = 0;
5955
5956 domain = TYPE_DOMAIN (type);
5957 const_bounds_p = (TYPE_MIN_VALUE (domain)
5958 && TYPE_MAX_VALUE (domain)
5959 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5960 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5961
5962 /* If we have constant bounds for the range of the type, get them. */
5963 if (const_bounds_p)
5964 {
5965 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5966 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5967 }
5968
5969 /* If the constructor has fewer elements than the array, clear
5970 the whole array first. Similarly if this is static
5971 constructor of a non-BLKmode object. */
5972 if (cleared)
5973 need_to_clear = 0;
5974 else if (REG_P (target) && TREE_STATIC (exp))
5975 need_to_clear = 1;
5976 else
5977 {
5978 unsigned HOST_WIDE_INT idx;
5979 tree index, value;
5980 HOST_WIDE_INT count = 0, zero_count = 0;
5981 need_to_clear = ! const_bounds_p;
5982
5983 /* This loop is a more accurate version of the loop in
5984 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5985 is also needed to check for missing elements. */
5986 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5987 {
5988 HOST_WIDE_INT this_node_count;
5989
5990 if (need_to_clear)
5991 break;
5992
5993 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5994 {
5995 tree lo_index = TREE_OPERAND (index, 0);
5996 tree hi_index = TREE_OPERAND (index, 1);
5997
5998 if (! host_integerp (lo_index, 1)
5999 || ! host_integerp (hi_index, 1))
6000 {
6001 need_to_clear = 1;
6002 break;
6003 }
6004
6005 this_node_count = (tree_low_cst (hi_index, 1)
6006 - tree_low_cst (lo_index, 1) + 1);
6007 }
6008 else
6009 this_node_count = 1;
6010
6011 count += this_node_count;
6012 if (mostly_zeros_p (value))
6013 zero_count += this_node_count;
6014 }
6015
6016 /* Clear the entire array first if there are any missing
6017 elements, or if the incidence of zero elements is >=
6018 75%. */
6019 if (! need_to_clear
6020 && (count < maxelt - minelt + 1
6021 || 4 * zero_count >= 3 * count))
6022 need_to_clear = 1;
6023 }
6024
6025 if (need_to_clear && size > 0)
6026 {
6027 if (REG_P (target))
6028 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6029 else
6030 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6031 cleared = 1;
6032 }
6033
6034 if (!cleared && REG_P (target))
6035 /* Inform later passes that the old value is dead. */
6036 emit_clobber (target);
6037
6038 /* Store each element of the constructor into the
6039 corresponding element of TARGET, determined by counting the
6040 elements. */
6041 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
6042 {
6043 enum machine_mode mode;
6044 HOST_WIDE_INT bitsize;
6045 HOST_WIDE_INT bitpos;
6046 rtx xtarget = target;
6047
6048 if (cleared && initializer_zerop (value))
6049 continue;
6050
6051 mode = TYPE_MODE (elttype);
6052 if (mode == BLKmode)
6053 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
6054 ? tree_low_cst (TYPE_SIZE (elttype), 1)
6055 : -1);
6056 else
6057 bitsize = GET_MODE_BITSIZE (mode);
6058
6059 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6060 {
6061 tree lo_index = TREE_OPERAND (index, 0);
6062 tree hi_index = TREE_OPERAND (index, 1);
6063 rtx index_r, pos_rtx;
6064 HOST_WIDE_INT lo, hi, count;
6065 tree position;
6066
6067 /* If the range is constant and "small", unroll the loop. */
6068 if (const_bounds_p
6069 && host_integerp (lo_index, 0)
6070 && host_integerp (hi_index, 0)
6071 && (lo = tree_low_cst (lo_index, 0),
6072 hi = tree_low_cst (hi_index, 0),
6073 count = hi - lo + 1,
6074 (!MEM_P (target)
6075 || count <= 2
6076 || (host_integerp (TYPE_SIZE (elttype), 1)
6077 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
6078 <= 40 * 8)))))
6079 {
6080 lo -= minelt; hi -= minelt;
6081 for (; lo <= hi; lo++)
6082 {
6083 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
6084
6085 if (MEM_P (target)
6086 && !MEM_KEEP_ALIAS_SET_P (target)
6087 && TREE_CODE (type) == ARRAY_TYPE
6088 && TYPE_NONALIASED_COMPONENT (type))
6089 {
6090 target = copy_rtx (target);
6091 MEM_KEEP_ALIAS_SET_P (target) = 1;
6092 }
6093
6094 store_constructor_field
6095 (target, bitsize, bitpos, mode, value, cleared,
6096 get_alias_set (elttype));
6097 }
6098 }
6099 else
6100 {
6101 rtx loop_start = gen_label_rtx ();
6102 rtx loop_end = gen_label_rtx ();
6103 tree exit_cond;
6104
6105 expand_normal (hi_index);
6106
6107 index = build_decl (EXPR_LOCATION (exp),
6108 VAR_DECL, NULL_TREE, domain);
6109 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6110 SET_DECL_RTL (index, index_r);
6111 store_expr (lo_index, index_r, 0, false);
6112
6113 /* Build the head of the loop. */
6114 do_pending_stack_adjust ();
6115 emit_label (loop_start);
6116
6117 /* Assign value to element index. */
6118 position =
6119 fold_convert (ssizetype,
6120 fold_build2 (MINUS_EXPR,
6121 TREE_TYPE (index),
6122 index,
6123 TYPE_MIN_VALUE (domain)));
6124
6125 position =
6126 size_binop (MULT_EXPR, position,
6127 fold_convert (ssizetype,
6128 TYPE_SIZE_UNIT (elttype)));
6129
6130 pos_rtx = expand_normal (position);
6131 xtarget = offset_address (target, pos_rtx,
6132 highest_pow2_factor (position));
6133 xtarget = adjust_address (xtarget, mode, 0);
6134 if (TREE_CODE (value) == CONSTRUCTOR)
6135 store_constructor (value, xtarget, cleared,
6136 bitsize / BITS_PER_UNIT);
6137 else
6138 store_expr (value, xtarget, 0, false);
6139
6140 /* Generate a conditional jump to exit the loop. */
6141 exit_cond = build2 (LT_EXPR, integer_type_node,
6142 index, hi_index);
6143 jumpif (exit_cond, loop_end, -1);
6144
6145 /* Update the loop counter, and jump to the head of
6146 the loop. */
6147 expand_assignment (index,
6148 build2 (PLUS_EXPR, TREE_TYPE (index),
6149 index, integer_one_node),
6150 false);
6151
6152 emit_jump (loop_start);
6153
6154 /* Build the end of the loop. */
6155 emit_label (loop_end);
6156 }
6157 }
6158 else if ((index != 0 && ! host_integerp (index, 0))
6159 || ! host_integerp (TYPE_SIZE (elttype), 1))
6160 {
6161 tree position;
6162
6163 if (index == 0)
6164 index = ssize_int (1);
6165
6166 if (minelt)
6167 index = fold_convert (ssizetype,
6168 fold_build2 (MINUS_EXPR,
6169 TREE_TYPE (index),
6170 index,
6171 TYPE_MIN_VALUE (domain)));
6172
6173 position =
6174 size_binop (MULT_EXPR, index,
6175 fold_convert (ssizetype,
6176 TYPE_SIZE_UNIT (elttype)));
6177 xtarget = offset_address (target,
6178 expand_normal (position),
6179 highest_pow2_factor (position));
6180 xtarget = adjust_address (xtarget, mode, 0);
6181 store_expr (value, xtarget, 0, false);
6182 }
6183 else
6184 {
6185 if (index != 0)
6186 bitpos = ((tree_low_cst (index, 0) - minelt)
6187 * tree_low_cst (TYPE_SIZE (elttype), 1));
6188 else
6189 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
6190
6191 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6192 && TREE_CODE (type) == ARRAY_TYPE
6193 && TYPE_NONALIASED_COMPONENT (type))
6194 {
6195 target = copy_rtx (target);
6196 MEM_KEEP_ALIAS_SET_P (target) = 1;
6197 }
6198 store_constructor_field (target, bitsize, bitpos, mode, value,
6199 cleared, get_alias_set (elttype));
6200 }
6201 }
6202 break;
6203 }
6204
6205 case VECTOR_TYPE:
6206 {
6207 unsigned HOST_WIDE_INT idx;
6208 constructor_elt *ce;
6209 int i;
6210 int need_to_clear;
6211 int icode = CODE_FOR_nothing;
6212 tree elttype = TREE_TYPE (type);
6213 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
6214 enum machine_mode eltmode = TYPE_MODE (elttype);
6215 HOST_WIDE_INT bitsize;
6216 HOST_WIDE_INT bitpos;
6217 rtvec vector = NULL;
6218 unsigned n_elts;
6219 alias_set_type alias;
6220
6221 gcc_assert (eltmode != BLKmode);
6222
6223 n_elts = TYPE_VECTOR_SUBPARTS (type);
6224 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6225 {
6226 enum machine_mode mode = GET_MODE (target);
6227
6228 icode = (int) optab_handler (vec_init_optab, mode);
6229 if (icode != CODE_FOR_nothing)
6230 {
6231 unsigned int i;
6232
6233 vector = rtvec_alloc (n_elts);
6234 for (i = 0; i < n_elts; i++)
6235 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6236 }
6237 }
6238
6239 /* If the constructor has fewer elements than the vector,
6240 clear the whole array first. Similarly if this is static
6241 constructor of a non-BLKmode object. */
6242 if (cleared)
6243 need_to_clear = 0;
6244 else if (REG_P (target) && TREE_STATIC (exp))
6245 need_to_clear = 1;
6246 else
6247 {
6248 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6249 tree value;
6250
6251 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6252 {
6253 int n_elts_here = tree_low_cst
6254 (int_const_binop (TRUNC_DIV_EXPR,
6255 TYPE_SIZE (TREE_TYPE (value)),
6256 TYPE_SIZE (elttype)), 1);
6257
6258 count += n_elts_here;
6259 if (mostly_zeros_p (value))
6260 zero_count += n_elts_here;
6261 }
6262
6263 /* Clear the entire vector first if there are any missing elements,
6264 or if the incidence of zero elements is >= 75%. */
6265 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6266 }
6267
6268 if (need_to_clear && size > 0 && !vector)
6269 {
6270 if (REG_P (target))
6271 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6272 else
6273 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6274 cleared = 1;
6275 }
6276
6277 /* Inform later passes that the old value is dead. */
6278 if (!cleared && !vector && REG_P (target))
6279 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6280
6281 if (MEM_P (target))
6282 alias = MEM_ALIAS_SET (target);
6283 else
6284 alias = get_alias_set (elttype);
6285
6286 /* Store each element of the constructor into the corresponding
6287 element of TARGET, determined by counting the elements. */
6288 for (idx = 0, i = 0;
6289 vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce);
6290 idx++, i += bitsize / elt_size)
6291 {
6292 HOST_WIDE_INT eltpos;
6293 tree value = ce->value;
6294
6295 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6296 if (cleared && initializer_zerop (value))
6297 continue;
6298
6299 if (ce->index)
6300 eltpos = tree_low_cst (ce->index, 1);
6301 else
6302 eltpos = i;
6303
6304 if (vector)
6305 {
6306 /* Vector CONSTRUCTORs should only be built from smaller
6307 vectors in the case of BLKmode vectors. */
6308 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6309 RTVEC_ELT (vector, eltpos)
6310 = expand_normal (value);
6311 }
6312 else
6313 {
6314 enum machine_mode value_mode =
6315 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6316 ? TYPE_MODE (TREE_TYPE (value))
6317 : eltmode;
6318 bitpos = eltpos * elt_size;
6319 store_constructor_field (target, bitsize, bitpos, value_mode,
6320 value, cleared, alias);
6321 }
6322 }
6323
6324 if (vector)
6325 emit_insn (GEN_FCN (icode)
6326 (target,
6327 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6328 break;
6329 }
6330
6331 default:
6332 gcc_unreachable ();
6333 }
6334 }
6335
6336 /* Store the value of EXP (an expression tree)
6337 into a subfield of TARGET which has mode MODE and occupies
6338 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6339 If MODE is VOIDmode, it means that we are storing into a bit-field.
6340
6341 BITREGION_START is bitpos of the first bitfield in this region.
6342 BITREGION_END is the bitpos of the ending bitfield in this region.
6343 These two fields are 0, if the C++ memory model does not apply,
6344 or we are not interested in keeping track of bitfield regions.
6345
6346 Always return const0_rtx unless we have something particular to
6347 return.
6348
6349 ALIAS_SET is the alias set for the destination. This value will
6350 (in general) be different from that for TARGET, since TARGET is a
6351 reference to the containing structure.
6352
6353 If NONTEMPORAL is true, try generating a nontemporal store. */
6354
6355 static rtx
6356 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6357 unsigned HOST_WIDE_INT bitregion_start,
6358 unsigned HOST_WIDE_INT bitregion_end,
6359 enum machine_mode mode, tree exp,
6360 alias_set_type alias_set, bool nontemporal)
6361 {
6362 if (TREE_CODE (exp) == ERROR_MARK)
6363 return const0_rtx;
6364
6365 /* If we have nothing to store, do nothing unless the expression has
6366 side-effects. */
6367 if (bitsize == 0)
6368 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6369
6370 if (GET_CODE (target) == CONCAT)
6371 {
6372 /* We're storing into a struct containing a single __complex. */
6373
6374 gcc_assert (!bitpos);
6375 return store_expr (exp, target, 0, nontemporal);
6376 }
6377
6378 /* If the structure is in a register or if the component
6379 is a bit field, we cannot use addressing to access it.
6380 Use bit-field techniques or SUBREG to store in it. */
6381
6382 if (mode == VOIDmode
6383 || (mode != BLKmode && ! direct_store[(int) mode]
6384 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6385 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6386 || REG_P (target)
6387 || GET_CODE (target) == SUBREG
6388 /* If the field isn't aligned enough to store as an ordinary memref,
6389 store it as a bit field. */
6390 || (mode != BLKmode
6391 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6392 || bitpos % GET_MODE_ALIGNMENT (mode))
6393 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6394 || (bitpos % BITS_PER_UNIT != 0)))
6395 || (bitsize >= 0 && mode != BLKmode
6396 && GET_MODE_BITSIZE (mode) > bitsize)
6397 /* If the RHS and field are a constant size and the size of the
6398 RHS isn't the same size as the bitfield, we must use bitfield
6399 operations. */
6400 || (bitsize >= 0
6401 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6402 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6403 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6404 decl we must use bitfield operations. */
6405 || (bitsize >= 0
6406 && TREE_CODE (exp) == MEM_REF
6407 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6408 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6409 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6410 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6411 {
6412 rtx temp;
6413 gimple nop_def;
6414
6415 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6416 implies a mask operation. If the precision is the same size as
6417 the field we're storing into, that mask is redundant. This is
6418 particularly common with bit field assignments generated by the
6419 C front end. */
6420 nop_def = get_def_for_expr (exp, NOP_EXPR);
6421 if (nop_def)
6422 {
6423 tree type = TREE_TYPE (exp);
6424 if (INTEGRAL_TYPE_P (type)
6425 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6426 && bitsize == TYPE_PRECISION (type))
6427 {
6428 tree op = gimple_assign_rhs1 (nop_def);
6429 type = TREE_TYPE (op);
6430 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6431 exp = op;
6432 }
6433 }
6434
6435 temp = expand_normal (exp);
6436
6437 /* If BITSIZE is narrower than the size of the type of EXP
6438 we will be narrowing TEMP. Normally, what's wanted are the
6439 low-order bits. However, if EXP's type is a record and this is
6440 big-endian machine, we want the upper BITSIZE bits. */
6441 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6442 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6443 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6444 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6445 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6446 NULL_RTX, 1);
6447
6448 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6449 if (mode != VOIDmode && mode != BLKmode
6450 && mode != TYPE_MODE (TREE_TYPE (exp)))
6451 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6452
6453 /* If the modes of TEMP and TARGET are both BLKmode, both
6454 must be in memory and BITPOS must be aligned on a byte
6455 boundary. If so, we simply do a block copy. Likewise
6456 for a BLKmode-like TARGET. */
6457 if (GET_MODE (temp) == BLKmode
6458 && (GET_MODE (target) == BLKmode
6459 || (MEM_P (target)
6460 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6461 && (bitpos % BITS_PER_UNIT) == 0
6462 && (bitsize % BITS_PER_UNIT) == 0)))
6463 {
6464 gcc_assert (MEM_P (target) && MEM_P (temp)
6465 && (bitpos % BITS_PER_UNIT) == 0);
6466
6467 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6468 emit_block_move (target, temp,
6469 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6470 / BITS_PER_UNIT),
6471 BLOCK_OP_NORMAL);
6472
6473 return const0_rtx;
6474 }
6475
6476 /* Handle calls that return values in multiple non-contiguous locations.
6477 The Irix 6 ABI has examples of this. */
6478 if (GET_CODE (temp) == PARALLEL)
6479 {
6480 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6481 rtx temp_target;
6482 if (mode == BLKmode)
6483 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6484 temp_target = gen_reg_rtx (mode);
6485 emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
6486 temp = temp_target;
6487 }
6488 else if (mode == BLKmode)
6489 {
6490 /* Handle calls that return BLKmode values in registers. */
6491 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
6492 {
6493 rtx temp_target = gen_reg_rtx (GET_MODE (temp));
6494 copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp));
6495 temp = temp_target;
6496 }
6497 else
6498 {
6499 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6500 rtx temp_target;
6501 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6502 temp_target = gen_reg_rtx (mode);
6503 temp_target
6504 = extract_bit_field (temp, size * BITS_PER_UNIT, 0, 1,
6505 false, temp_target, mode, mode);
6506 temp = temp_target;
6507 }
6508 }
6509
6510 /* Store the value in the bitfield. */
6511 store_bit_field (target, bitsize, bitpos,
6512 bitregion_start, bitregion_end,
6513 mode, temp);
6514
6515 return const0_rtx;
6516 }
6517 else
6518 {
6519 /* Now build a reference to just the desired component. */
6520 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6521
6522 if (to_rtx == target)
6523 to_rtx = copy_rtx (to_rtx);
6524
6525 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6526 set_mem_alias_set (to_rtx, alias_set);
6527
6528 return store_expr (exp, to_rtx, 0, nontemporal);
6529 }
6530 }
6531 \f
6532 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6533 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6534 codes and find the ultimate containing object, which we return.
6535
6536 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6537 bit position, and *PUNSIGNEDP to the signedness of the field.
6538 If the position of the field is variable, we store a tree
6539 giving the variable offset (in units) in *POFFSET.
6540 This offset is in addition to the bit position.
6541 If the position is not variable, we store 0 in *POFFSET.
6542
6543 If any of the extraction expressions is volatile,
6544 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6545
6546 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6547 Otherwise, it is a mode that can be used to access the field.
6548
6549 If the field describes a variable-sized object, *PMODE is set to
6550 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6551 this case, but the address of the object can be found.
6552
6553 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6554 look through nodes that serve as markers of a greater alignment than
6555 the one that can be deduced from the expression. These nodes make it
6556 possible for front-ends to prevent temporaries from being created by
6557 the middle-end on alignment considerations. For that purpose, the
6558 normal operating mode at high-level is to always pass FALSE so that
6559 the ultimate containing object is really returned; moreover, the
6560 associated predicate handled_component_p will always return TRUE
6561 on these nodes, thus indicating that they are essentially handled
6562 by get_inner_reference. TRUE should only be passed when the caller
6563 is scanning the expression in order to build another representation
6564 and specifically knows how to handle these nodes; as such, this is
6565 the normal operating mode in the RTL expanders. */
6566
6567 tree
6568 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6569 HOST_WIDE_INT *pbitpos, tree *poffset,
6570 enum machine_mode *pmode, int *punsignedp,
6571 int *pvolatilep, bool keep_aligning)
6572 {
6573 tree size_tree = 0;
6574 enum machine_mode mode = VOIDmode;
6575 bool blkmode_bitfield = false;
6576 tree offset = size_zero_node;
6577 double_int bit_offset = double_int_zero;
6578
6579 /* First get the mode, signedness, and size. We do this from just the
6580 outermost expression. */
6581 *pbitsize = -1;
6582 if (TREE_CODE (exp) == COMPONENT_REF)
6583 {
6584 tree field = TREE_OPERAND (exp, 1);
6585 size_tree = DECL_SIZE (field);
6586 if (!DECL_BIT_FIELD (field))
6587 mode = DECL_MODE (field);
6588 else if (DECL_MODE (field) == BLKmode)
6589 blkmode_bitfield = true;
6590 else if (TREE_THIS_VOLATILE (exp)
6591 && flag_strict_volatile_bitfields > 0)
6592 /* Volatile bitfields should be accessed in the mode of the
6593 field's type, not the mode computed based on the bit
6594 size. */
6595 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6596
6597 *punsignedp = DECL_UNSIGNED (field);
6598 }
6599 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6600 {
6601 size_tree = TREE_OPERAND (exp, 1);
6602 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6603 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6604
6605 /* For vector types, with the correct size of access, use the mode of
6606 inner type. */
6607 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6608 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6609 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6610 mode = TYPE_MODE (TREE_TYPE (exp));
6611 }
6612 else
6613 {
6614 mode = TYPE_MODE (TREE_TYPE (exp));
6615 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6616
6617 if (mode == BLKmode)
6618 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6619 else
6620 *pbitsize = GET_MODE_BITSIZE (mode);
6621 }
6622
6623 if (size_tree != 0)
6624 {
6625 if (! host_integerp (size_tree, 1))
6626 mode = BLKmode, *pbitsize = -1;
6627 else
6628 *pbitsize = tree_low_cst (size_tree, 1);
6629 }
6630
6631 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6632 and find the ultimate containing object. */
6633 while (1)
6634 {
6635 switch (TREE_CODE (exp))
6636 {
6637 case BIT_FIELD_REF:
6638 bit_offset += tree_to_double_int (TREE_OPERAND (exp, 2));
6639 break;
6640
6641 case COMPONENT_REF:
6642 {
6643 tree field = TREE_OPERAND (exp, 1);
6644 tree this_offset = component_ref_field_offset (exp);
6645
6646 /* If this field hasn't been filled in yet, don't go past it.
6647 This should only happen when folding expressions made during
6648 type construction. */
6649 if (this_offset == 0)
6650 break;
6651
6652 offset = size_binop (PLUS_EXPR, offset, this_offset);
6653 bit_offset += tree_to_double_int (DECL_FIELD_BIT_OFFSET (field));
6654
6655 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6656 }
6657 break;
6658
6659 case ARRAY_REF:
6660 case ARRAY_RANGE_REF:
6661 {
6662 tree index = TREE_OPERAND (exp, 1);
6663 tree low_bound = array_ref_low_bound (exp);
6664 tree unit_size = array_ref_element_size (exp);
6665
6666 /* We assume all arrays have sizes that are a multiple of a byte.
6667 First subtract the lower bound, if any, in the type of the
6668 index, then convert to sizetype and multiply by the size of
6669 the array element. */
6670 if (! integer_zerop (low_bound))
6671 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6672 index, low_bound);
6673
6674 offset = size_binop (PLUS_EXPR, offset,
6675 size_binop (MULT_EXPR,
6676 fold_convert (sizetype, index),
6677 unit_size));
6678 }
6679 break;
6680
6681 case REALPART_EXPR:
6682 break;
6683
6684 case IMAGPART_EXPR:
6685 bit_offset += double_int::from_uhwi (*pbitsize);
6686 break;
6687
6688 case VIEW_CONVERT_EXPR:
6689 if (keep_aligning && STRICT_ALIGNMENT
6690 && (TYPE_ALIGN (TREE_TYPE (exp))
6691 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6692 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6693 < BIGGEST_ALIGNMENT)
6694 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6695 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6696 goto done;
6697 break;
6698
6699 case MEM_REF:
6700 /* Hand back the decl for MEM[&decl, off]. */
6701 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6702 {
6703 tree off = TREE_OPERAND (exp, 1);
6704 if (!integer_zerop (off))
6705 {
6706 double_int boff, coff = mem_ref_offset (exp);
6707 boff = coff.lshift (BITS_PER_UNIT == 8
6708 ? 3 : exact_log2 (BITS_PER_UNIT));
6709 bit_offset += boff;
6710 }
6711 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6712 }
6713 goto done;
6714
6715 default:
6716 goto done;
6717 }
6718
6719 /* If any reference in the chain is volatile, the effect is volatile. */
6720 if (TREE_THIS_VOLATILE (exp))
6721 *pvolatilep = 1;
6722
6723 exp = TREE_OPERAND (exp, 0);
6724 }
6725 done:
6726
6727 /* If OFFSET is constant, see if we can return the whole thing as a
6728 constant bit position. Make sure to handle overflow during
6729 this conversion. */
6730 if (TREE_CODE (offset) == INTEGER_CST)
6731 {
6732 double_int tem = tree_to_double_int (offset);
6733 tem = tem.sext (TYPE_PRECISION (sizetype));
6734 tem = tem.lshift (BITS_PER_UNIT == 8 ? 3 : exact_log2 (BITS_PER_UNIT));
6735 tem += bit_offset;
6736 if (tem.fits_shwi ())
6737 {
6738 *pbitpos = tem.to_shwi ();
6739 *poffset = offset = NULL_TREE;
6740 }
6741 }
6742
6743 /* Otherwise, split it up. */
6744 if (offset)
6745 {
6746 /* Avoid returning a negative bitpos as this may wreak havoc later. */
6747 if (bit_offset.is_negative ())
6748 {
6749 double_int mask
6750 = double_int::mask (BITS_PER_UNIT == 8
6751 ? 3 : exact_log2 (BITS_PER_UNIT));
6752 double_int tem = bit_offset.and_not (mask);
6753 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
6754 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
6755 bit_offset -= tem;
6756 tem = tem.arshift (BITS_PER_UNIT == 8
6757 ? 3 : exact_log2 (BITS_PER_UNIT),
6758 HOST_BITS_PER_DOUBLE_INT);
6759 offset = size_binop (PLUS_EXPR, offset,
6760 double_int_to_tree (sizetype, tem));
6761 }
6762
6763 *pbitpos = bit_offset.to_shwi ();
6764 *poffset = offset;
6765 }
6766
6767 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6768 if (mode == VOIDmode
6769 && blkmode_bitfield
6770 && (*pbitpos % BITS_PER_UNIT) == 0
6771 && (*pbitsize % BITS_PER_UNIT) == 0)
6772 *pmode = BLKmode;
6773 else
6774 *pmode = mode;
6775
6776 return exp;
6777 }
6778
6779 /* Return a tree of sizetype representing the size, in bytes, of the element
6780 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6781
6782 tree
6783 array_ref_element_size (tree exp)
6784 {
6785 tree aligned_size = TREE_OPERAND (exp, 3);
6786 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6787 location_t loc = EXPR_LOCATION (exp);
6788
6789 /* If a size was specified in the ARRAY_REF, it's the size measured
6790 in alignment units of the element type. So multiply by that value. */
6791 if (aligned_size)
6792 {
6793 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6794 sizetype from another type of the same width and signedness. */
6795 if (TREE_TYPE (aligned_size) != sizetype)
6796 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6797 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6798 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6799 }
6800
6801 /* Otherwise, take the size from that of the element type. Substitute
6802 any PLACEHOLDER_EXPR that we have. */
6803 else
6804 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6805 }
6806
6807 /* Return a tree representing the lower bound of the array mentioned in
6808 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6809
6810 tree
6811 array_ref_low_bound (tree exp)
6812 {
6813 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6814
6815 /* If a lower bound is specified in EXP, use it. */
6816 if (TREE_OPERAND (exp, 2))
6817 return TREE_OPERAND (exp, 2);
6818
6819 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6820 substituting for a PLACEHOLDER_EXPR as needed. */
6821 if (domain_type && TYPE_MIN_VALUE (domain_type))
6822 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6823
6824 /* Otherwise, return a zero of the appropriate type. */
6825 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6826 }
6827
6828 /* Returns true if REF is an array reference to an array at the end of
6829 a structure. If this is the case, the array may be allocated larger
6830 than its upper bound implies. */
6831
6832 bool
6833 array_at_struct_end_p (tree ref)
6834 {
6835 if (TREE_CODE (ref) != ARRAY_REF
6836 && TREE_CODE (ref) != ARRAY_RANGE_REF)
6837 return false;
6838
6839 while (handled_component_p (ref))
6840 {
6841 /* If the reference chain contains a component reference to a
6842 non-union type and there follows another field the reference
6843 is not at the end of a structure. */
6844 if (TREE_CODE (ref) == COMPONENT_REF
6845 && TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == RECORD_TYPE)
6846 {
6847 tree nextf = DECL_CHAIN (TREE_OPERAND (ref, 1));
6848 while (nextf && TREE_CODE (nextf) != FIELD_DECL)
6849 nextf = DECL_CHAIN (nextf);
6850 if (nextf)
6851 return false;
6852 }
6853
6854 ref = TREE_OPERAND (ref, 0);
6855 }
6856
6857 /* If the reference is based on a declared entity, the size of the array
6858 is constrained by its given domain. */
6859 if (DECL_P (ref))
6860 return false;
6861
6862 return true;
6863 }
6864
6865 /* Return a tree representing the upper bound of the array mentioned in
6866 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6867
6868 tree
6869 array_ref_up_bound (tree exp)
6870 {
6871 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6872
6873 /* If there is a domain type and it has an upper bound, use it, substituting
6874 for a PLACEHOLDER_EXPR as needed. */
6875 if (domain_type && TYPE_MAX_VALUE (domain_type))
6876 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6877
6878 /* Otherwise fail. */
6879 return NULL_TREE;
6880 }
6881
6882 /* Return a tree representing the offset, in bytes, of the field referenced
6883 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6884
6885 tree
6886 component_ref_field_offset (tree exp)
6887 {
6888 tree aligned_offset = TREE_OPERAND (exp, 2);
6889 tree field = TREE_OPERAND (exp, 1);
6890 location_t loc = EXPR_LOCATION (exp);
6891
6892 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6893 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6894 value. */
6895 if (aligned_offset)
6896 {
6897 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6898 sizetype from another type of the same width and signedness. */
6899 if (TREE_TYPE (aligned_offset) != sizetype)
6900 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6901 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6902 size_int (DECL_OFFSET_ALIGN (field)
6903 / BITS_PER_UNIT));
6904 }
6905
6906 /* Otherwise, take the offset from that of the field. Substitute
6907 any PLACEHOLDER_EXPR that we have. */
6908 else
6909 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6910 }
6911
6912 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6913
6914 static unsigned HOST_WIDE_INT
6915 target_align (const_tree target)
6916 {
6917 /* We might have a chain of nested references with intermediate misaligning
6918 bitfields components, so need to recurse to find out. */
6919
6920 unsigned HOST_WIDE_INT this_align, outer_align;
6921
6922 switch (TREE_CODE (target))
6923 {
6924 case BIT_FIELD_REF:
6925 return 1;
6926
6927 case COMPONENT_REF:
6928 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6929 outer_align = target_align (TREE_OPERAND (target, 0));
6930 return MIN (this_align, outer_align);
6931
6932 case ARRAY_REF:
6933 case ARRAY_RANGE_REF:
6934 this_align = TYPE_ALIGN (TREE_TYPE (target));
6935 outer_align = target_align (TREE_OPERAND (target, 0));
6936 return MIN (this_align, outer_align);
6937
6938 CASE_CONVERT:
6939 case NON_LVALUE_EXPR:
6940 case VIEW_CONVERT_EXPR:
6941 this_align = TYPE_ALIGN (TREE_TYPE (target));
6942 outer_align = target_align (TREE_OPERAND (target, 0));
6943 return MAX (this_align, outer_align);
6944
6945 default:
6946 return TYPE_ALIGN (TREE_TYPE (target));
6947 }
6948 }
6949
6950 \f
6951 /* Given an rtx VALUE that may contain additions and multiplications, return
6952 an equivalent value that just refers to a register, memory, or constant.
6953 This is done by generating instructions to perform the arithmetic and
6954 returning a pseudo-register containing the value.
6955
6956 The returned value may be a REG, SUBREG, MEM or constant. */
6957
6958 rtx
6959 force_operand (rtx value, rtx target)
6960 {
6961 rtx op1, op2;
6962 /* Use subtarget as the target for operand 0 of a binary operation. */
6963 rtx subtarget = get_subtarget (target);
6964 enum rtx_code code = GET_CODE (value);
6965
6966 /* Check for subreg applied to an expression produced by loop optimizer. */
6967 if (code == SUBREG
6968 && !REG_P (SUBREG_REG (value))
6969 && !MEM_P (SUBREG_REG (value)))
6970 {
6971 value
6972 = simplify_gen_subreg (GET_MODE (value),
6973 force_reg (GET_MODE (SUBREG_REG (value)),
6974 force_operand (SUBREG_REG (value),
6975 NULL_RTX)),
6976 GET_MODE (SUBREG_REG (value)),
6977 SUBREG_BYTE (value));
6978 code = GET_CODE (value);
6979 }
6980
6981 /* Check for a PIC address load. */
6982 if ((code == PLUS || code == MINUS)
6983 && XEXP (value, 0) == pic_offset_table_rtx
6984 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6985 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6986 || GET_CODE (XEXP (value, 1)) == CONST))
6987 {
6988 if (!subtarget)
6989 subtarget = gen_reg_rtx (GET_MODE (value));
6990 emit_move_insn (subtarget, value);
6991 return subtarget;
6992 }
6993
6994 if (ARITHMETIC_P (value))
6995 {
6996 op2 = XEXP (value, 1);
6997 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6998 subtarget = 0;
6999 if (code == MINUS && CONST_INT_P (op2))
7000 {
7001 code = PLUS;
7002 op2 = negate_rtx (GET_MODE (value), op2);
7003 }
7004
7005 /* Check for an addition with OP2 a constant integer and our first
7006 operand a PLUS of a virtual register and something else. In that
7007 case, we want to emit the sum of the virtual register and the
7008 constant first and then add the other value. This allows virtual
7009 register instantiation to simply modify the constant rather than
7010 creating another one around this addition. */
7011 if (code == PLUS && CONST_INT_P (op2)
7012 && GET_CODE (XEXP (value, 0)) == PLUS
7013 && REG_P (XEXP (XEXP (value, 0), 0))
7014 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7015 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
7016 {
7017 rtx temp = expand_simple_binop (GET_MODE (value), code,
7018 XEXP (XEXP (value, 0), 0), op2,
7019 subtarget, 0, OPTAB_LIB_WIDEN);
7020 return expand_simple_binop (GET_MODE (value), code, temp,
7021 force_operand (XEXP (XEXP (value,
7022 0), 1), 0),
7023 target, 0, OPTAB_LIB_WIDEN);
7024 }
7025
7026 op1 = force_operand (XEXP (value, 0), subtarget);
7027 op2 = force_operand (op2, NULL_RTX);
7028 switch (code)
7029 {
7030 case MULT:
7031 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7032 case DIV:
7033 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7034 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7035 target, 1, OPTAB_LIB_WIDEN);
7036 else
7037 return expand_divmod (0,
7038 FLOAT_MODE_P (GET_MODE (value))
7039 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7040 GET_MODE (value), op1, op2, target, 0);
7041 case MOD:
7042 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7043 target, 0);
7044 case UDIV:
7045 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7046 target, 1);
7047 case UMOD:
7048 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7049 target, 1);
7050 case ASHIFTRT:
7051 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7052 target, 0, OPTAB_LIB_WIDEN);
7053 default:
7054 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7055 target, 1, OPTAB_LIB_WIDEN);
7056 }
7057 }
7058 if (UNARY_P (value))
7059 {
7060 if (!target)
7061 target = gen_reg_rtx (GET_MODE (value));
7062 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7063 switch (code)
7064 {
7065 case ZERO_EXTEND:
7066 case SIGN_EXTEND:
7067 case TRUNCATE:
7068 case FLOAT_EXTEND:
7069 case FLOAT_TRUNCATE:
7070 convert_move (target, op1, code == ZERO_EXTEND);
7071 return target;
7072
7073 case FIX:
7074 case UNSIGNED_FIX:
7075 expand_fix (target, op1, code == UNSIGNED_FIX);
7076 return target;
7077
7078 case FLOAT:
7079 case UNSIGNED_FLOAT:
7080 expand_float (target, op1, code == UNSIGNED_FLOAT);
7081 return target;
7082
7083 default:
7084 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7085 }
7086 }
7087
7088 #ifdef INSN_SCHEDULING
7089 /* On machines that have insn scheduling, we want all memory reference to be
7090 explicit, so we need to deal with such paradoxical SUBREGs. */
7091 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7092 value
7093 = simplify_gen_subreg (GET_MODE (value),
7094 force_reg (GET_MODE (SUBREG_REG (value)),
7095 force_operand (SUBREG_REG (value),
7096 NULL_RTX)),
7097 GET_MODE (SUBREG_REG (value)),
7098 SUBREG_BYTE (value));
7099 #endif
7100
7101 return value;
7102 }
7103 \f
7104 /* Subroutine of expand_expr: return nonzero iff there is no way that
7105 EXP can reference X, which is being modified. TOP_P is nonzero if this
7106 call is going to be used to determine whether we need a temporary
7107 for EXP, as opposed to a recursive call to this function.
7108
7109 It is always safe for this routine to return zero since it merely
7110 searches for optimization opportunities. */
7111
7112 int
7113 safe_from_p (const_rtx x, tree exp, int top_p)
7114 {
7115 rtx exp_rtl = 0;
7116 int i, nops;
7117
7118 if (x == 0
7119 /* If EXP has varying size, we MUST use a target since we currently
7120 have no way of allocating temporaries of variable size
7121 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7122 So we assume here that something at a higher level has prevented a
7123 clash. This is somewhat bogus, but the best we can do. Only
7124 do this when X is BLKmode and when we are at the top level. */
7125 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7126 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7127 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7128 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7129 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7130 != INTEGER_CST)
7131 && GET_MODE (x) == BLKmode)
7132 /* If X is in the outgoing argument area, it is always safe. */
7133 || (MEM_P (x)
7134 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7135 || (GET_CODE (XEXP (x, 0)) == PLUS
7136 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7137 return 1;
7138
7139 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7140 find the underlying pseudo. */
7141 if (GET_CODE (x) == SUBREG)
7142 {
7143 x = SUBREG_REG (x);
7144 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7145 return 0;
7146 }
7147
7148 /* Now look at our tree code and possibly recurse. */
7149 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7150 {
7151 case tcc_declaration:
7152 exp_rtl = DECL_RTL_IF_SET (exp);
7153 break;
7154
7155 case tcc_constant:
7156 return 1;
7157
7158 case tcc_exceptional:
7159 if (TREE_CODE (exp) == TREE_LIST)
7160 {
7161 while (1)
7162 {
7163 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7164 return 0;
7165 exp = TREE_CHAIN (exp);
7166 if (!exp)
7167 return 1;
7168 if (TREE_CODE (exp) != TREE_LIST)
7169 return safe_from_p (x, exp, 0);
7170 }
7171 }
7172 else if (TREE_CODE (exp) == CONSTRUCTOR)
7173 {
7174 constructor_elt *ce;
7175 unsigned HOST_WIDE_INT idx;
7176
7177 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce)
7178 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7179 || !safe_from_p (x, ce->value, 0))
7180 return 0;
7181 return 1;
7182 }
7183 else if (TREE_CODE (exp) == ERROR_MARK)
7184 return 1; /* An already-visited SAVE_EXPR? */
7185 else
7186 return 0;
7187
7188 case tcc_statement:
7189 /* The only case we look at here is the DECL_INITIAL inside a
7190 DECL_EXPR. */
7191 return (TREE_CODE (exp) != DECL_EXPR
7192 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7193 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7194 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7195
7196 case tcc_binary:
7197 case tcc_comparison:
7198 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7199 return 0;
7200 /* Fall through. */
7201
7202 case tcc_unary:
7203 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7204
7205 case tcc_expression:
7206 case tcc_reference:
7207 case tcc_vl_exp:
7208 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7209 the expression. If it is set, we conflict iff we are that rtx or
7210 both are in memory. Otherwise, we check all operands of the
7211 expression recursively. */
7212
7213 switch (TREE_CODE (exp))
7214 {
7215 case ADDR_EXPR:
7216 /* If the operand is static or we are static, we can't conflict.
7217 Likewise if we don't conflict with the operand at all. */
7218 if (staticp (TREE_OPERAND (exp, 0))
7219 || TREE_STATIC (exp)
7220 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7221 return 1;
7222
7223 /* Otherwise, the only way this can conflict is if we are taking
7224 the address of a DECL a that address if part of X, which is
7225 very rare. */
7226 exp = TREE_OPERAND (exp, 0);
7227 if (DECL_P (exp))
7228 {
7229 if (!DECL_RTL_SET_P (exp)
7230 || !MEM_P (DECL_RTL (exp)))
7231 return 0;
7232 else
7233 exp_rtl = XEXP (DECL_RTL (exp), 0);
7234 }
7235 break;
7236
7237 case MEM_REF:
7238 if (MEM_P (x)
7239 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7240 get_alias_set (exp)))
7241 return 0;
7242 break;
7243
7244 case CALL_EXPR:
7245 /* Assume that the call will clobber all hard registers and
7246 all of memory. */
7247 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7248 || MEM_P (x))
7249 return 0;
7250 break;
7251
7252 case WITH_CLEANUP_EXPR:
7253 case CLEANUP_POINT_EXPR:
7254 /* Lowered by gimplify.c. */
7255 gcc_unreachable ();
7256
7257 case SAVE_EXPR:
7258 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7259
7260 default:
7261 break;
7262 }
7263
7264 /* If we have an rtx, we do not need to scan our operands. */
7265 if (exp_rtl)
7266 break;
7267
7268 nops = TREE_OPERAND_LENGTH (exp);
7269 for (i = 0; i < nops; i++)
7270 if (TREE_OPERAND (exp, i) != 0
7271 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7272 return 0;
7273
7274 break;
7275
7276 case tcc_type:
7277 /* Should never get a type here. */
7278 gcc_unreachable ();
7279 }
7280
7281 /* If we have an rtl, find any enclosed object. Then see if we conflict
7282 with it. */
7283 if (exp_rtl)
7284 {
7285 if (GET_CODE (exp_rtl) == SUBREG)
7286 {
7287 exp_rtl = SUBREG_REG (exp_rtl);
7288 if (REG_P (exp_rtl)
7289 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7290 return 0;
7291 }
7292
7293 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7294 are memory and they conflict. */
7295 return ! (rtx_equal_p (x, exp_rtl)
7296 || (MEM_P (x) && MEM_P (exp_rtl)
7297 && true_dependence (exp_rtl, VOIDmode, x)));
7298 }
7299
7300 /* If we reach here, it is safe. */
7301 return 1;
7302 }
7303
7304 \f
7305 /* Return the highest power of two that EXP is known to be a multiple of.
7306 This is used in updating alignment of MEMs in array references. */
7307
7308 unsigned HOST_WIDE_INT
7309 highest_pow2_factor (const_tree exp)
7310 {
7311 unsigned HOST_WIDE_INT c0, c1;
7312
7313 switch (TREE_CODE (exp))
7314 {
7315 case INTEGER_CST:
7316 /* We can find the lowest bit that's a one. If the low
7317 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7318 We need to handle this case since we can find it in a COND_EXPR,
7319 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7320 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7321 later ICE. */
7322 if (TREE_OVERFLOW (exp))
7323 return BIGGEST_ALIGNMENT;
7324 else
7325 {
7326 /* Note: tree_low_cst is intentionally not used here,
7327 we don't care about the upper bits. */
7328 c0 = TREE_INT_CST_LOW (exp);
7329 c0 &= -c0;
7330 return c0 ? c0 : BIGGEST_ALIGNMENT;
7331 }
7332 break;
7333
7334 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7335 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7336 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7337 return MIN (c0, c1);
7338
7339 case MULT_EXPR:
7340 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7341 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7342 return c0 * c1;
7343
7344 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7345 case CEIL_DIV_EXPR:
7346 if (integer_pow2p (TREE_OPERAND (exp, 1))
7347 && host_integerp (TREE_OPERAND (exp, 1), 1))
7348 {
7349 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7350 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7351 return MAX (1, c0 / c1);
7352 }
7353 break;
7354
7355 case BIT_AND_EXPR:
7356 /* The highest power of two of a bit-and expression is the maximum of
7357 that of its operands. We typically get here for a complex LHS and
7358 a constant negative power of two on the RHS to force an explicit
7359 alignment, so don't bother looking at the LHS. */
7360 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7361
7362 CASE_CONVERT:
7363 case SAVE_EXPR:
7364 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7365
7366 case COMPOUND_EXPR:
7367 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7368
7369 case COND_EXPR:
7370 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7371 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7372 return MIN (c0, c1);
7373
7374 default:
7375 break;
7376 }
7377
7378 return 1;
7379 }
7380
7381 /* Similar, except that the alignment requirements of TARGET are
7382 taken into account. Assume it is at least as aligned as its
7383 type, unless it is a COMPONENT_REF in which case the layout of
7384 the structure gives the alignment. */
7385
7386 static unsigned HOST_WIDE_INT
7387 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7388 {
7389 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7390 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7391
7392 return MAX (factor, talign);
7393 }
7394 \f
7395 #ifdef HAVE_conditional_move
7396 /* Convert the tree comparison code TCODE to the rtl one where the
7397 signedness is UNSIGNEDP. */
7398
7399 static enum rtx_code
7400 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7401 {
7402 enum rtx_code code;
7403 switch (tcode)
7404 {
7405 case EQ_EXPR:
7406 code = EQ;
7407 break;
7408 case NE_EXPR:
7409 code = NE;
7410 break;
7411 case LT_EXPR:
7412 code = unsignedp ? LTU : LT;
7413 break;
7414 case LE_EXPR:
7415 code = unsignedp ? LEU : LE;
7416 break;
7417 case GT_EXPR:
7418 code = unsignedp ? GTU : GT;
7419 break;
7420 case GE_EXPR:
7421 code = unsignedp ? GEU : GE;
7422 break;
7423 case UNORDERED_EXPR:
7424 code = UNORDERED;
7425 break;
7426 case ORDERED_EXPR:
7427 code = ORDERED;
7428 break;
7429 case UNLT_EXPR:
7430 code = UNLT;
7431 break;
7432 case UNLE_EXPR:
7433 code = UNLE;
7434 break;
7435 case UNGT_EXPR:
7436 code = UNGT;
7437 break;
7438 case UNGE_EXPR:
7439 code = UNGE;
7440 break;
7441 case UNEQ_EXPR:
7442 code = UNEQ;
7443 break;
7444 case LTGT_EXPR:
7445 code = LTGT;
7446 break;
7447
7448 default:
7449 gcc_unreachable ();
7450 }
7451 return code;
7452 }
7453 #endif
7454
7455 /* Subroutine of expand_expr. Expand the two operands of a binary
7456 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7457 The value may be stored in TARGET if TARGET is nonzero. The
7458 MODIFIER argument is as documented by expand_expr. */
7459
7460 static void
7461 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7462 enum expand_modifier modifier)
7463 {
7464 if (! safe_from_p (target, exp1, 1))
7465 target = 0;
7466 if (operand_equal_p (exp0, exp1, 0))
7467 {
7468 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7469 *op1 = copy_rtx (*op0);
7470 }
7471 else
7472 {
7473 /* If we need to preserve evaluation order, copy exp0 into its own
7474 temporary variable so that it can't be clobbered by exp1. */
7475 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7476 exp0 = save_expr (exp0);
7477 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7478 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7479 }
7480 }
7481
7482 \f
7483 /* Return a MEM that contains constant EXP. DEFER is as for
7484 output_constant_def and MODIFIER is as for expand_expr. */
7485
7486 static rtx
7487 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7488 {
7489 rtx mem;
7490
7491 mem = output_constant_def (exp, defer);
7492 if (modifier != EXPAND_INITIALIZER)
7493 mem = use_anchored_address (mem);
7494 return mem;
7495 }
7496
7497 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7498 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7499
7500 static rtx
7501 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7502 enum expand_modifier modifier, addr_space_t as)
7503 {
7504 rtx result, subtarget;
7505 tree inner, offset;
7506 HOST_WIDE_INT bitsize, bitpos;
7507 int volatilep, unsignedp;
7508 enum machine_mode mode1;
7509
7510 /* If we are taking the address of a constant and are at the top level,
7511 we have to use output_constant_def since we can't call force_const_mem
7512 at top level. */
7513 /* ??? This should be considered a front-end bug. We should not be
7514 generating ADDR_EXPR of something that isn't an LVALUE. The only
7515 exception here is STRING_CST. */
7516 if (CONSTANT_CLASS_P (exp))
7517 {
7518 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7519 if (modifier < EXPAND_SUM)
7520 result = force_operand (result, target);
7521 return result;
7522 }
7523
7524 /* Everything must be something allowed by is_gimple_addressable. */
7525 switch (TREE_CODE (exp))
7526 {
7527 case INDIRECT_REF:
7528 /* This case will happen via recursion for &a->b. */
7529 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7530
7531 case MEM_REF:
7532 {
7533 tree tem = TREE_OPERAND (exp, 0);
7534 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7535 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7536 return expand_expr (tem, target, tmode, modifier);
7537 }
7538
7539 case CONST_DECL:
7540 /* Expand the initializer like constants above. */
7541 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7542 0, modifier), 0);
7543 if (modifier < EXPAND_SUM)
7544 result = force_operand (result, target);
7545 return result;
7546
7547 case REALPART_EXPR:
7548 /* The real part of the complex number is always first, therefore
7549 the address is the same as the address of the parent object. */
7550 offset = 0;
7551 bitpos = 0;
7552 inner = TREE_OPERAND (exp, 0);
7553 break;
7554
7555 case IMAGPART_EXPR:
7556 /* The imaginary part of the complex number is always second.
7557 The expression is therefore always offset by the size of the
7558 scalar type. */
7559 offset = 0;
7560 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7561 inner = TREE_OPERAND (exp, 0);
7562 break;
7563
7564 case COMPOUND_LITERAL_EXPR:
7565 /* Allow COMPOUND_LITERAL_EXPR in initializers, if e.g.
7566 rtl_for_decl_init is called on DECL_INITIAL with
7567 COMPOUNT_LITERAL_EXPRs in it, they aren't gimplified. */
7568 if (modifier == EXPAND_INITIALIZER
7569 && COMPOUND_LITERAL_EXPR_DECL (exp))
7570 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp),
7571 target, tmode, modifier, as);
7572 /* FALLTHRU */
7573 default:
7574 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7575 expand_expr, as that can have various side effects; LABEL_DECLs for
7576 example, may not have their DECL_RTL set yet. Expand the rtl of
7577 CONSTRUCTORs too, which should yield a memory reference for the
7578 constructor's contents. Assume language specific tree nodes can
7579 be expanded in some interesting way. */
7580 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7581 if (DECL_P (exp)
7582 || TREE_CODE (exp) == CONSTRUCTOR
7583 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7584 {
7585 result = expand_expr (exp, target, tmode,
7586 modifier == EXPAND_INITIALIZER
7587 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7588
7589 /* If the DECL isn't in memory, then the DECL wasn't properly
7590 marked TREE_ADDRESSABLE, which will be either a front-end
7591 or a tree optimizer bug. */
7592
7593 if (TREE_ADDRESSABLE (exp)
7594 && ! MEM_P (result)
7595 && ! targetm.calls.allocate_stack_slots_for_args())
7596 {
7597 error ("local frame unavailable (naked function?)");
7598 return result;
7599 }
7600 else
7601 gcc_assert (MEM_P (result));
7602 result = XEXP (result, 0);
7603
7604 /* ??? Is this needed anymore? */
7605 if (DECL_P (exp))
7606 TREE_USED (exp) = 1;
7607
7608 if (modifier != EXPAND_INITIALIZER
7609 && modifier != EXPAND_CONST_ADDRESS
7610 && modifier != EXPAND_SUM)
7611 result = force_operand (result, target);
7612 return result;
7613 }
7614
7615 /* Pass FALSE as the last argument to get_inner_reference although
7616 we are expanding to RTL. The rationale is that we know how to
7617 handle "aligning nodes" here: we can just bypass them because
7618 they won't change the final object whose address will be returned
7619 (they actually exist only for that purpose). */
7620 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7621 &mode1, &unsignedp, &volatilep, false);
7622 break;
7623 }
7624
7625 /* We must have made progress. */
7626 gcc_assert (inner != exp);
7627
7628 subtarget = offset || bitpos ? NULL_RTX : target;
7629 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7630 inner alignment, force the inner to be sufficiently aligned. */
7631 if (CONSTANT_CLASS_P (inner)
7632 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7633 {
7634 inner = copy_node (inner);
7635 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7636 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7637 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7638 }
7639 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7640
7641 if (offset)
7642 {
7643 rtx tmp;
7644
7645 if (modifier != EXPAND_NORMAL)
7646 result = force_operand (result, NULL);
7647 tmp = expand_expr (offset, NULL_RTX, tmode,
7648 modifier == EXPAND_INITIALIZER
7649 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7650
7651 result = convert_memory_address_addr_space (tmode, result, as);
7652 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7653
7654 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7655 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7656 else
7657 {
7658 subtarget = bitpos ? NULL_RTX : target;
7659 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7660 1, OPTAB_LIB_WIDEN);
7661 }
7662 }
7663
7664 if (bitpos)
7665 {
7666 /* Someone beforehand should have rejected taking the address
7667 of such an object. */
7668 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7669
7670 result = convert_memory_address_addr_space (tmode, result, as);
7671 result = plus_constant (tmode, result, bitpos / BITS_PER_UNIT);
7672 if (modifier < EXPAND_SUM)
7673 result = force_operand (result, target);
7674 }
7675
7676 return result;
7677 }
7678
7679 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7680 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7681
7682 static rtx
7683 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7684 enum expand_modifier modifier)
7685 {
7686 addr_space_t as = ADDR_SPACE_GENERIC;
7687 enum machine_mode address_mode = Pmode;
7688 enum machine_mode pointer_mode = ptr_mode;
7689 enum machine_mode rmode;
7690 rtx result;
7691
7692 /* Target mode of VOIDmode says "whatever's natural". */
7693 if (tmode == VOIDmode)
7694 tmode = TYPE_MODE (TREE_TYPE (exp));
7695
7696 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7697 {
7698 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7699 address_mode = targetm.addr_space.address_mode (as);
7700 pointer_mode = targetm.addr_space.pointer_mode (as);
7701 }
7702
7703 /* We can get called with some Weird Things if the user does silliness
7704 like "(short) &a". In that case, convert_memory_address won't do
7705 the right thing, so ignore the given target mode. */
7706 if (tmode != address_mode && tmode != pointer_mode)
7707 tmode = address_mode;
7708
7709 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7710 tmode, modifier, as);
7711
7712 /* Despite expand_expr claims concerning ignoring TMODE when not
7713 strictly convenient, stuff breaks if we don't honor it. Note
7714 that combined with the above, we only do this for pointer modes. */
7715 rmode = GET_MODE (result);
7716 if (rmode == VOIDmode)
7717 rmode = tmode;
7718 if (rmode != tmode)
7719 result = convert_memory_address_addr_space (tmode, result, as);
7720
7721 return result;
7722 }
7723
7724 /* Generate code for computing CONSTRUCTOR EXP.
7725 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7726 is TRUE, instead of creating a temporary variable in memory
7727 NULL is returned and the caller needs to handle it differently. */
7728
7729 static rtx
7730 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7731 bool avoid_temp_mem)
7732 {
7733 tree type = TREE_TYPE (exp);
7734 enum machine_mode mode = TYPE_MODE (type);
7735
7736 /* Try to avoid creating a temporary at all. This is possible
7737 if all of the initializer is zero.
7738 FIXME: try to handle all [0..255] initializers we can handle
7739 with memset. */
7740 if (TREE_STATIC (exp)
7741 && !TREE_ADDRESSABLE (exp)
7742 && target != 0 && mode == BLKmode
7743 && all_zeros_p (exp))
7744 {
7745 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7746 return target;
7747 }
7748
7749 /* All elts simple constants => refer to a constant in memory. But
7750 if this is a non-BLKmode mode, let it store a field at a time
7751 since that should make a CONST_INT or CONST_DOUBLE when we
7752 fold. Likewise, if we have a target we can use, it is best to
7753 store directly into the target unless the type is large enough
7754 that memcpy will be used. If we are making an initializer and
7755 all operands are constant, put it in memory as well.
7756
7757 FIXME: Avoid trying to fill vector constructors piece-meal.
7758 Output them with output_constant_def below unless we're sure
7759 they're zeros. This should go away when vector initializers
7760 are treated like VECTOR_CST instead of arrays. */
7761 if ((TREE_STATIC (exp)
7762 && ((mode == BLKmode
7763 && ! (target != 0 && safe_from_p (target, exp, 1)))
7764 || TREE_ADDRESSABLE (exp)
7765 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7766 && (! MOVE_BY_PIECES_P
7767 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7768 TYPE_ALIGN (type)))
7769 && ! mostly_zeros_p (exp))))
7770 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7771 && TREE_CONSTANT (exp)))
7772 {
7773 rtx constructor;
7774
7775 if (avoid_temp_mem)
7776 return NULL_RTX;
7777
7778 constructor = expand_expr_constant (exp, 1, modifier);
7779
7780 if (modifier != EXPAND_CONST_ADDRESS
7781 && modifier != EXPAND_INITIALIZER
7782 && modifier != EXPAND_SUM)
7783 constructor = validize_mem (constructor);
7784
7785 return constructor;
7786 }
7787
7788 /* Handle calls that pass values in multiple non-contiguous
7789 locations. The Irix 6 ABI has examples of this. */
7790 if (target == 0 || ! safe_from_p (target, exp, 1)
7791 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7792 {
7793 if (avoid_temp_mem)
7794 return NULL_RTX;
7795
7796 target
7797 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7798 | (TREE_READONLY (exp)
7799 * TYPE_QUAL_CONST))),
7800 TREE_ADDRESSABLE (exp), 1);
7801 }
7802
7803 store_constructor (exp, target, 0, int_expr_size (exp));
7804 return target;
7805 }
7806
7807
7808 /* expand_expr: generate code for computing expression EXP.
7809 An rtx for the computed value is returned. The value is never null.
7810 In the case of a void EXP, const0_rtx is returned.
7811
7812 The value may be stored in TARGET if TARGET is nonzero.
7813 TARGET is just a suggestion; callers must assume that
7814 the rtx returned may not be the same as TARGET.
7815
7816 If TARGET is CONST0_RTX, it means that the value will be ignored.
7817
7818 If TMODE is not VOIDmode, it suggests generating the
7819 result in mode TMODE. But this is done only when convenient.
7820 Otherwise, TMODE is ignored and the value generated in its natural mode.
7821 TMODE is just a suggestion; callers must assume that
7822 the rtx returned may not have mode TMODE.
7823
7824 Note that TARGET may have neither TMODE nor MODE. In that case, it
7825 probably will not be used.
7826
7827 If MODIFIER is EXPAND_SUM then when EXP is an addition
7828 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7829 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7830 products as above, or REG or MEM, or constant.
7831 Ordinarily in such cases we would output mul or add instructions
7832 and then return a pseudo reg containing the sum.
7833
7834 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7835 it also marks a label as absolutely required (it can't be dead).
7836 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7837 This is used for outputting expressions used in initializers.
7838
7839 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7840 with a constant address even if that address is not normally legitimate.
7841 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7842
7843 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7844 a call parameter. Such targets require special care as we haven't yet
7845 marked TARGET so that it's safe from being trashed by libcalls. We
7846 don't want to use TARGET for anything but the final result;
7847 Intermediate values must go elsewhere. Additionally, calls to
7848 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7849
7850 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7851 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7852 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7853 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7854 recursively. */
7855
7856 rtx
7857 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7858 enum expand_modifier modifier, rtx *alt_rtl)
7859 {
7860 rtx ret;
7861
7862 /* Handle ERROR_MARK before anybody tries to access its type. */
7863 if (TREE_CODE (exp) == ERROR_MARK
7864 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7865 {
7866 ret = CONST0_RTX (tmode);
7867 return ret ? ret : const0_rtx;
7868 }
7869
7870 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7871 return ret;
7872 }
7873
7874 /* Try to expand the conditional expression which is represented by
7875 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If succeseds
7876 return the rtl reg which repsents the result. Otherwise return
7877 NULL_RTL. */
7878
7879 static rtx
7880 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
7881 tree treeop1 ATTRIBUTE_UNUSED,
7882 tree treeop2 ATTRIBUTE_UNUSED)
7883 {
7884 #ifdef HAVE_conditional_move
7885 rtx insn;
7886 rtx op00, op01, op1, op2;
7887 enum rtx_code comparison_code;
7888 enum machine_mode comparison_mode;
7889 gimple srcstmt;
7890 rtx temp;
7891 tree type = TREE_TYPE (treeop1);
7892 int unsignedp = TYPE_UNSIGNED (type);
7893 enum machine_mode mode = TYPE_MODE (type);
7894 enum machine_mode orig_mode = mode;
7895
7896 /* If we cannot do a conditional move on the mode, try doing it
7897 with the promoted mode. */
7898 if (!can_conditionally_move_p (mode))
7899 {
7900 mode = promote_mode (type, mode, &unsignedp);
7901 if (!can_conditionally_move_p (mode))
7902 return NULL_RTX;
7903 temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */
7904 }
7905 else
7906 temp = assign_temp (type, 0, 1);
7907
7908 start_sequence ();
7909 expand_operands (treeop1, treeop2,
7910 temp, &op1, &op2, EXPAND_NORMAL);
7911
7912 if (TREE_CODE (treeop0) == SSA_NAME
7913 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
7914 {
7915 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
7916 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
7917 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
7918 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
7919 comparison_mode = TYPE_MODE (type);
7920 unsignedp = TYPE_UNSIGNED (type);
7921 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7922 }
7923 else if (TREE_CODE_CLASS (TREE_CODE (treeop0)) == tcc_comparison)
7924 {
7925 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
7926 enum tree_code cmpcode = TREE_CODE (treeop0);
7927 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
7928 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
7929 unsignedp = TYPE_UNSIGNED (type);
7930 comparison_mode = TYPE_MODE (type);
7931 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7932 }
7933 else
7934 {
7935 op00 = expand_normal (treeop0);
7936 op01 = const0_rtx;
7937 comparison_code = NE;
7938 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
7939 }
7940
7941 if (GET_MODE (op1) != mode)
7942 op1 = gen_lowpart (mode, op1);
7943
7944 if (GET_MODE (op2) != mode)
7945 op2 = gen_lowpart (mode, op2);
7946
7947 /* Try to emit the conditional move. */
7948 insn = emit_conditional_move (temp, comparison_code,
7949 op00, op01, comparison_mode,
7950 op1, op2, mode,
7951 unsignedp);
7952
7953 /* If we could do the conditional move, emit the sequence,
7954 and return. */
7955 if (insn)
7956 {
7957 rtx seq = get_insns ();
7958 end_sequence ();
7959 emit_insn (seq);
7960 return convert_modes (orig_mode, mode, temp, 0);
7961 }
7962
7963 /* Otherwise discard the sequence and fall back to code with
7964 branches. */
7965 end_sequence ();
7966 #endif
7967 return NULL_RTX;
7968 }
7969
7970 rtx
7971 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7972 enum expand_modifier modifier)
7973 {
7974 rtx op0, op1, op2, temp;
7975 tree type;
7976 int unsignedp;
7977 enum machine_mode mode;
7978 enum tree_code code = ops->code;
7979 optab this_optab;
7980 rtx subtarget, original_target;
7981 int ignore;
7982 bool reduce_bit_field;
7983 location_t loc = ops->location;
7984 tree treeop0, treeop1, treeop2;
7985 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7986 ? reduce_to_bit_field_precision ((expr), \
7987 target, \
7988 type) \
7989 : (expr))
7990
7991 type = ops->type;
7992 mode = TYPE_MODE (type);
7993 unsignedp = TYPE_UNSIGNED (type);
7994
7995 treeop0 = ops->op0;
7996 treeop1 = ops->op1;
7997 treeop2 = ops->op2;
7998
7999 /* We should be called only on simple (binary or unary) expressions,
8000 exactly those that are valid in gimple expressions that aren't
8001 GIMPLE_SINGLE_RHS (or invalid). */
8002 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
8003 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
8004 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
8005
8006 ignore = (target == const0_rtx
8007 || ((CONVERT_EXPR_CODE_P (code)
8008 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8009 && TREE_CODE (type) == VOID_TYPE));
8010
8011 /* We should be called only if we need the result. */
8012 gcc_assert (!ignore);
8013
8014 /* An operation in what may be a bit-field type needs the
8015 result to be reduced to the precision of the bit-field type,
8016 which is narrower than that of the type's mode. */
8017 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8018 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8019
8020 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8021 target = 0;
8022
8023 /* Use subtarget as the target for operand 0 of a binary operation. */
8024 subtarget = get_subtarget (target);
8025 original_target = target;
8026
8027 switch (code)
8028 {
8029 case NON_LVALUE_EXPR:
8030 case PAREN_EXPR:
8031 CASE_CONVERT:
8032 if (treeop0 == error_mark_node)
8033 return const0_rtx;
8034
8035 if (TREE_CODE (type) == UNION_TYPE)
8036 {
8037 tree valtype = TREE_TYPE (treeop0);
8038
8039 /* If both input and output are BLKmode, this conversion isn't doing
8040 anything except possibly changing memory attribute. */
8041 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8042 {
8043 rtx result = expand_expr (treeop0, target, tmode,
8044 modifier);
8045
8046 result = copy_rtx (result);
8047 set_mem_attributes (result, type, 0);
8048 return result;
8049 }
8050
8051 if (target == 0)
8052 {
8053 if (TYPE_MODE (type) != BLKmode)
8054 target = gen_reg_rtx (TYPE_MODE (type));
8055 else
8056 target = assign_temp (type, 1, 1);
8057 }
8058
8059 if (MEM_P (target))
8060 /* Store data into beginning of memory target. */
8061 store_expr (treeop0,
8062 adjust_address (target, TYPE_MODE (valtype), 0),
8063 modifier == EXPAND_STACK_PARM,
8064 false);
8065
8066 else
8067 {
8068 gcc_assert (REG_P (target));
8069
8070 /* Store this field into a union of the proper type. */
8071 store_field (target,
8072 MIN ((int_size_in_bytes (TREE_TYPE
8073 (treeop0))
8074 * BITS_PER_UNIT),
8075 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
8076 0, 0, 0, TYPE_MODE (valtype), treeop0, 0, false);
8077 }
8078
8079 /* Return the entire union. */
8080 return target;
8081 }
8082
8083 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8084 {
8085 op0 = expand_expr (treeop0, target, VOIDmode,
8086 modifier);
8087
8088 /* If the signedness of the conversion differs and OP0 is
8089 a promoted SUBREG, clear that indication since we now
8090 have to do the proper extension. */
8091 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8092 && GET_CODE (op0) == SUBREG)
8093 SUBREG_PROMOTED_VAR_P (op0) = 0;
8094
8095 return REDUCE_BIT_FIELD (op0);
8096 }
8097
8098 op0 = expand_expr (treeop0, NULL_RTX, mode,
8099 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8100 if (GET_MODE (op0) == mode)
8101 ;
8102
8103 /* If OP0 is a constant, just convert it into the proper mode. */
8104 else if (CONSTANT_P (op0))
8105 {
8106 tree inner_type = TREE_TYPE (treeop0);
8107 enum machine_mode inner_mode = GET_MODE (op0);
8108
8109 if (inner_mode == VOIDmode)
8110 inner_mode = TYPE_MODE (inner_type);
8111
8112 if (modifier == EXPAND_INITIALIZER)
8113 op0 = simplify_gen_subreg (mode, op0, inner_mode,
8114 subreg_lowpart_offset (mode,
8115 inner_mode));
8116 else
8117 op0= convert_modes (mode, inner_mode, op0,
8118 TYPE_UNSIGNED (inner_type));
8119 }
8120
8121 else if (modifier == EXPAND_INITIALIZER)
8122 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8123
8124 else if (target == 0)
8125 op0 = convert_to_mode (mode, op0,
8126 TYPE_UNSIGNED (TREE_TYPE
8127 (treeop0)));
8128 else
8129 {
8130 convert_move (target, op0,
8131 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8132 op0 = target;
8133 }
8134
8135 return REDUCE_BIT_FIELD (op0);
8136
8137 case ADDR_SPACE_CONVERT_EXPR:
8138 {
8139 tree treeop0_type = TREE_TYPE (treeop0);
8140 addr_space_t as_to;
8141 addr_space_t as_from;
8142
8143 gcc_assert (POINTER_TYPE_P (type));
8144 gcc_assert (POINTER_TYPE_P (treeop0_type));
8145
8146 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8147 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8148
8149 /* Conversions between pointers to the same address space should
8150 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8151 gcc_assert (as_to != as_from);
8152
8153 /* Ask target code to handle conversion between pointers
8154 to overlapping address spaces. */
8155 if (targetm.addr_space.subset_p (as_to, as_from)
8156 || targetm.addr_space.subset_p (as_from, as_to))
8157 {
8158 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8159 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8160 gcc_assert (op0);
8161 return op0;
8162 }
8163
8164 /* For disjoint address spaces, converting anything but
8165 a null pointer invokes undefined behaviour. We simply
8166 always return a null pointer here. */
8167 return CONST0_RTX (mode);
8168 }
8169
8170 case POINTER_PLUS_EXPR:
8171 /* Even though the sizetype mode and the pointer's mode can be different
8172 expand is able to handle this correctly and get the correct result out
8173 of the PLUS_EXPR code. */
8174 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8175 if sizetype precision is smaller than pointer precision. */
8176 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8177 treeop1 = fold_convert_loc (loc, type,
8178 fold_convert_loc (loc, ssizetype,
8179 treeop1));
8180 /* If sizetype precision is larger than pointer precision, truncate the
8181 offset to have matching modes. */
8182 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8183 treeop1 = fold_convert_loc (loc, type, treeop1);
8184
8185 case PLUS_EXPR:
8186 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8187 something else, make sure we add the register to the constant and
8188 then to the other thing. This case can occur during strength
8189 reduction and doing it this way will produce better code if the
8190 frame pointer or argument pointer is eliminated.
8191
8192 fold-const.c will ensure that the constant is always in the inner
8193 PLUS_EXPR, so the only case we need to do anything about is if
8194 sp, ap, or fp is our second argument, in which case we must swap
8195 the innermost first argument and our second argument. */
8196
8197 if (TREE_CODE (treeop0) == PLUS_EXPR
8198 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8199 && TREE_CODE (treeop1) == VAR_DECL
8200 && (DECL_RTL (treeop1) == frame_pointer_rtx
8201 || DECL_RTL (treeop1) == stack_pointer_rtx
8202 || DECL_RTL (treeop1) == arg_pointer_rtx))
8203 {
8204 gcc_unreachable ();
8205 }
8206
8207 /* If the result is to be ptr_mode and we are adding an integer to
8208 something, we might be forming a constant. So try to use
8209 plus_constant. If it produces a sum and we can't accept it,
8210 use force_operand. This allows P = &ARR[const] to generate
8211 efficient code on machines where a SYMBOL_REF is not a valid
8212 address.
8213
8214 If this is an EXPAND_SUM call, always return the sum. */
8215 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8216 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8217 {
8218 if (modifier == EXPAND_STACK_PARM)
8219 target = 0;
8220 if (TREE_CODE (treeop0) == INTEGER_CST
8221 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8222 && TREE_CONSTANT (treeop1))
8223 {
8224 rtx constant_part;
8225
8226 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8227 EXPAND_SUM);
8228 /* Use immed_double_const to ensure that the constant is
8229 truncated according to the mode of OP1, then sign extended
8230 to a HOST_WIDE_INT. Using the constant directly can result
8231 in non-canonical RTL in a 64x32 cross compile. */
8232 constant_part
8233 = immed_double_const (TREE_INT_CST_LOW (treeop0),
8234 (HOST_WIDE_INT) 0,
8235 TYPE_MODE (TREE_TYPE (treeop1)));
8236 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8237 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8238 op1 = force_operand (op1, target);
8239 return REDUCE_BIT_FIELD (op1);
8240 }
8241
8242 else if (TREE_CODE (treeop1) == INTEGER_CST
8243 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8244 && TREE_CONSTANT (treeop0))
8245 {
8246 rtx constant_part;
8247
8248 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8249 (modifier == EXPAND_INITIALIZER
8250 ? EXPAND_INITIALIZER : EXPAND_SUM));
8251 if (! CONSTANT_P (op0))
8252 {
8253 op1 = expand_expr (treeop1, NULL_RTX,
8254 VOIDmode, modifier);
8255 /* Return a PLUS if modifier says it's OK. */
8256 if (modifier == EXPAND_SUM
8257 || modifier == EXPAND_INITIALIZER)
8258 return simplify_gen_binary (PLUS, mode, op0, op1);
8259 goto binop2;
8260 }
8261 /* Use immed_double_const to ensure that the constant is
8262 truncated according to the mode of OP1, then sign extended
8263 to a HOST_WIDE_INT. Using the constant directly can result
8264 in non-canonical RTL in a 64x32 cross compile. */
8265 constant_part
8266 = immed_double_const (TREE_INT_CST_LOW (treeop1),
8267 (HOST_WIDE_INT) 0,
8268 TYPE_MODE (TREE_TYPE (treeop0)));
8269 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8270 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8271 op0 = force_operand (op0, target);
8272 return REDUCE_BIT_FIELD (op0);
8273 }
8274 }
8275
8276 /* Use TER to expand pointer addition of a negated value
8277 as pointer subtraction. */
8278 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8279 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8280 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8281 && TREE_CODE (treeop1) == SSA_NAME
8282 && TYPE_MODE (TREE_TYPE (treeop0))
8283 == TYPE_MODE (TREE_TYPE (treeop1)))
8284 {
8285 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8286 if (def)
8287 {
8288 treeop1 = gimple_assign_rhs1 (def);
8289 code = MINUS_EXPR;
8290 goto do_minus;
8291 }
8292 }
8293
8294 /* No sense saving up arithmetic to be done
8295 if it's all in the wrong mode to form part of an address.
8296 And force_operand won't know whether to sign-extend or
8297 zero-extend. */
8298 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8299 || mode != ptr_mode)
8300 {
8301 expand_operands (treeop0, treeop1,
8302 subtarget, &op0, &op1, EXPAND_NORMAL);
8303 if (op0 == const0_rtx)
8304 return op1;
8305 if (op1 == const0_rtx)
8306 return op0;
8307 goto binop2;
8308 }
8309
8310 expand_operands (treeop0, treeop1,
8311 subtarget, &op0, &op1, modifier);
8312 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8313
8314 case MINUS_EXPR:
8315 do_minus:
8316 /* For initializers, we are allowed to return a MINUS of two
8317 symbolic constants. Here we handle all cases when both operands
8318 are constant. */
8319 /* Handle difference of two symbolic constants,
8320 for the sake of an initializer. */
8321 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8322 && really_constant_p (treeop0)
8323 && really_constant_p (treeop1))
8324 {
8325 expand_operands (treeop0, treeop1,
8326 NULL_RTX, &op0, &op1, modifier);
8327
8328 /* If the last operand is a CONST_INT, use plus_constant of
8329 the negated constant. Else make the MINUS. */
8330 if (CONST_INT_P (op1))
8331 return REDUCE_BIT_FIELD (plus_constant (mode, op0,
8332 -INTVAL (op1)));
8333 else
8334 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8335 }
8336
8337 /* No sense saving up arithmetic to be done
8338 if it's all in the wrong mode to form part of an address.
8339 And force_operand won't know whether to sign-extend or
8340 zero-extend. */
8341 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8342 || mode != ptr_mode)
8343 goto binop;
8344
8345 expand_operands (treeop0, treeop1,
8346 subtarget, &op0, &op1, modifier);
8347
8348 /* Convert A - const to A + (-const). */
8349 if (CONST_INT_P (op1))
8350 {
8351 op1 = negate_rtx (mode, op1);
8352 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8353 }
8354
8355 goto binop2;
8356
8357 case WIDEN_MULT_PLUS_EXPR:
8358 case WIDEN_MULT_MINUS_EXPR:
8359 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8360 op2 = expand_normal (treeop2);
8361 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8362 target, unsignedp);
8363 return target;
8364
8365 case WIDEN_MULT_EXPR:
8366 /* If first operand is constant, swap them.
8367 Thus the following special case checks need only
8368 check the second operand. */
8369 if (TREE_CODE (treeop0) == INTEGER_CST)
8370 {
8371 tree t1 = treeop0;
8372 treeop0 = treeop1;
8373 treeop1 = t1;
8374 }
8375
8376 /* First, check if we have a multiplication of one signed and one
8377 unsigned operand. */
8378 if (TREE_CODE (treeop1) != INTEGER_CST
8379 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8380 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8381 {
8382 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8383 this_optab = usmul_widen_optab;
8384 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8385 != CODE_FOR_nothing)
8386 {
8387 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8388 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8389 EXPAND_NORMAL);
8390 else
8391 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8392 EXPAND_NORMAL);
8393 /* op0 and op1 might still be constant, despite the above
8394 != INTEGER_CST check. Handle it. */
8395 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8396 {
8397 op0 = convert_modes (innermode, mode, op0, true);
8398 op1 = convert_modes (innermode, mode, op1, false);
8399 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8400 target, unsignedp));
8401 }
8402 goto binop3;
8403 }
8404 }
8405 /* Check for a multiplication with matching signedness. */
8406 else if ((TREE_CODE (treeop1) == INTEGER_CST
8407 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8408 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8409 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8410 {
8411 tree op0type = TREE_TYPE (treeop0);
8412 enum machine_mode innermode = TYPE_MODE (op0type);
8413 bool zextend_p = TYPE_UNSIGNED (op0type);
8414 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8415 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8416
8417 if (TREE_CODE (treeop0) != INTEGER_CST)
8418 {
8419 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8420 != CODE_FOR_nothing)
8421 {
8422 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8423 EXPAND_NORMAL);
8424 /* op0 and op1 might still be constant, despite the above
8425 != INTEGER_CST check. Handle it. */
8426 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8427 {
8428 widen_mult_const:
8429 op0 = convert_modes (innermode, mode, op0, zextend_p);
8430 op1
8431 = convert_modes (innermode, mode, op1,
8432 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8433 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8434 target,
8435 unsignedp));
8436 }
8437 temp = expand_widening_mult (mode, op0, op1, target,
8438 unsignedp, this_optab);
8439 return REDUCE_BIT_FIELD (temp);
8440 }
8441 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8442 != CODE_FOR_nothing
8443 && innermode == word_mode)
8444 {
8445 rtx htem, hipart;
8446 op0 = expand_normal (treeop0);
8447 if (TREE_CODE (treeop1) == INTEGER_CST)
8448 op1 = convert_modes (innermode, mode,
8449 expand_normal (treeop1),
8450 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8451 else
8452 op1 = expand_normal (treeop1);
8453 /* op0 and op1 might still be constant, despite the above
8454 != INTEGER_CST check. Handle it. */
8455 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8456 goto widen_mult_const;
8457 temp = expand_binop (mode, other_optab, op0, op1, target,
8458 unsignedp, OPTAB_LIB_WIDEN);
8459 hipart = gen_highpart (innermode, temp);
8460 htem = expand_mult_highpart_adjust (innermode, hipart,
8461 op0, op1, hipart,
8462 zextend_p);
8463 if (htem != hipart)
8464 emit_move_insn (hipart, htem);
8465 return REDUCE_BIT_FIELD (temp);
8466 }
8467 }
8468 }
8469 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8470 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8471 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8472 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8473
8474 case FMA_EXPR:
8475 {
8476 optab opt = fma_optab;
8477 gimple def0, def2;
8478
8479 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8480 call. */
8481 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8482 {
8483 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8484 tree call_expr;
8485
8486 gcc_assert (fn != NULL_TREE);
8487 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8488 return expand_builtin (call_expr, target, subtarget, mode, false);
8489 }
8490
8491 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8492 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8493
8494 op0 = op2 = NULL;
8495
8496 if (def0 && def2
8497 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8498 {
8499 opt = fnms_optab;
8500 op0 = expand_normal (gimple_assign_rhs1 (def0));
8501 op2 = expand_normal (gimple_assign_rhs1 (def2));
8502 }
8503 else if (def0
8504 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8505 {
8506 opt = fnma_optab;
8507 op0 = expand_normal (gimple_assign_rhs1 (def0));
8508 }
8509 else if (def2
8510 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8511 {
8512 opt = fms_optab;
8513 op2 = expand_normal (gimple_assign_rhs1 (def2));
8514 }
8515
8516 if (op0 == NULL)
8517 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8518 if (op2 == NULL)
8519 op2 = expand_normal (treeop2);
8520 op1 = expand_normal (treeop1);
8521
8522 return expand_ternary_op (TYPE_MODE (type), opt,
8523 op0, op1, op2, target, 0);
8524 }
8525
8526 case MULT_EXPR:
8527 /* If this is a fixed-point operation, then we cannot use the code
8528 below because "expand_mult" doesn't support sat/no-sat fixed-point
8529 multiplications. */
8530 if (ALL_FIXED_POINT_MODE_P (mode))
8531 goto binop;
8532
8533 /* If first operand is constant, swap them.
8534 Thus the following special case checks need only
8535 check the second operand. */
8536 if (TREE_CODE (treeop0) == INTEGER_CST)
8537 {
8538 tree t1 = treeop0;
8539 treeop0 = treeop1;
8540 treeop1 = t1;
8541 }
8542
8543 /* Attempt to return something suitable for generating an
8544 indexed address, for machines that support that. */
8545
8546 if (modifier == EXPAND_SUM && mode == ptr_mode
8547 && host_integerp (treeop1, 0))
8548 {
8549 tree exp1 = treeop1;
8550
8551 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8552 EXPAND_SUM);
8553
8554 if (!REG_P (op0))
8555 op0 = force_operand (op0, NULL_RTX);
8556 if (!REG_P (op0))
8557 op0 = copy_to_mode_reg (mode, op0);
8558
8559 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8560 gen_int_mode (tree_low_cst (exp1, 0),
8561 TYPE_MODE (TREE_TYPE (exp1)))));
8562 }
8563
8564 if (modifier == EXPAND_STACK_PARM)
8565 target = 0;
8566
8567 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8568 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8569
8570 case TRUNC_DIV_EXPR:
8571 case FLOOR_DIV_EXPR:
8572 case CEIL_DIV_EXPR:
8573 case ROUND_DIV_EXPR:
8574 case EXACT_DIV_EXPR:
8575 /* If this is a fixed-point operation, then we cannot use the code
8576 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8577 divisions. */
8578 if (ALL_FIXED_POINT_MODE_P (mode))
8579 goto binop;
8580
8581 if (modifier == EXPAND_STACK_PARM)
8582 target = 0;
8583 /* Possible optimization: compute the dividend with EXPAND_SUM
8584 then if the divisor is constant can optimize the case
8585 where some terms of the dividend have coeffs divisible by it. */
8586 expand_operands (treeop0, treeop1,
8587 subtarget, &op0, &op1, EXPAND_NORMAL);
8588 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8589
8590 case RDIV_EXPR:
8591 goto binop;
8592
8593 case MULT_HIGHPART_EXPR:
8594 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8595 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp);
8596 gcc_assert (temp);
8597 return temp;
8598
8599 case TRUNC_MOD_EXPR:
8600 case FLOOR_MOD_EXPR:
8601 case CEIL_MOD_EXPR:
8602 case ROUND_MOD_EXPR:
8603 if (modifier == EXPAND_STACK_PARM)
8604 target = 0;
8605 expand_operands (treeop0, treeop1,
8606 subtarget, &op0, &op1, EXPAND_NORMAL);
8607 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8608
8609 case FIXED_CONVERT_EXPR:
8610 op0 = expand_normal (treeop0);
8611 if (target == 0 || modifier == EXPAND_STACK_PARM)
8612 target = gen_reg_rtx (mode);
8613
8614 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8615 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8616 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8617 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8618 else
8619 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8620 return target;
8621
8622 case FIX_TRUNC_EXPR:
8623 op0 = expand_normal (treeop0);
8624 if (target == 0 || modifier == EXPAND_STACK_PARM)
8625 target = gen_reg_rtx (mode);
8626 expand_fix (target, op0, unsignedp);
8627 return target;
8628
8629 case FLOAT_EXPR:
8630 op0 = expand_normal (treeop0);
8631 if (target == 0 || modifier == EXPAND_STACK_PARM)
8632 target = gen_reg_rtx (mode);
8633 /* expand_float can't figure out what to do if FROM has VOIDmode.
8634 So give it the correct mode. With -O, cse will optimize this. */
8635 if (GET_MODE (op0) == VOIDmode)
8636 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8637 op0);
8638 expand_float (target, op0,
8639 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8640 return target;
8641
8642 case NEGATE_EXPR:
8643 op0 = expand_expr (treeop0, subtarget,
8644 VOIDmode, EXPAND_NORMAL);
8645 if (modifier == EXPAND_STACK_PARM)
8646 target = 0;
8647 temp = expand_unop (mode,
8648 optab_for_tree_code (NEGATE_EXPR, type,
8649 optab_default),
8650 op0, target, 0);
8651 gcc_assert (temp);
8652 return REDUCE_BIT_FIELD (temp);
8653
8654 case ABS_EXPR:
8655 op0 = expand_expr (treeop0, subtarget,
8656 VOIDmode, EXPAND_NORMAL);
8657 if (modifier == EXPAND_STACK_PARM)
8658 target = 0;
8659
8660 /* ABS_EXPR is not valid for complex arguments. */
8661 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8662 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8663
8664 /* Unsigned abs is simply the operand. Testing here means we don't
8665 risk generating incorrect code below. */
8666 if (TYPE_UNSIGNED (type))
8667 return op0;
8668
8669 return expand_abs (mode, op0, target, unsignedp,
8670 safe_from_p (target, treeop0, 1));
8671
8672 case MAX_EXPR:
8673 case MIN_EXPR:
8674 target = original_target;
8675 if (target == 0
8676 || modifier == EXPAND_STACK_PARM
8677 || (MEM_P (target) && MEM_VOLATILE_P (target))
8678 || GET_MODE (target) != mode
8679 || (REG_P (target)
8680 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8681 target = gen_reg_rtx (mode);
8682 expand_operands (treeop0, treeop1,
8683 target, &op0, &op1, EXPAND_NORMAL);
8684
8685 /* First try to do it with a special MIN or MAX instruction.
8686 If that does not win, use a conditional jump to select the proper
8687 value. */
8688 this_optab = optab_for_tree_code (code, type, optab_default);
8689 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8690 OPTAB_WIDEN);
8691 if (temp != 0)
8692 return temp;
8693
8694 /* At this point, a MEM target is no longer useful; we will get better
8695 code without it. */
8696
8697 if (! REG_P (target))
8698 target = gen_reg_rtx (mode);
8699
8700 /* If op1 was placed in target, swap op0 and op1. */
8701 if (target != op0 && target == op1)
8702 {
8703 temp = op0;
8704 op0 = op1;
8705 op1 = temp;
8706 }
8707
8708 /* We generate better code and avoid problems with op1 mentioning
8709 target by forcing op1 into a pseudo if it isn't a constant. */
8710 if (! CONSTANT_P (op1))
8711 op1 = force_reg (mode, op1);
8712
8713 {
8714 enum rtx_code comparison_code;
8715 rtx cmpop1 = op1;
8716
8717 if (code == MAX_EXPR)
8718 comparison_code = unsignedp ? GEU : GE;
8719 else
8720 comparison_code = unsignedp ? LEU : LE;
8721
8722 /* Canonicalize to comparisons against 0. */
8723 if (op1 == const1_rtx)
8724 {
8725 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8726 or (a != 0 ? a : 1) for unsigned.
8727 For MIN we are safe converting (a <= 1 ? a : 1)
8728 into (a <= 0 ? a : 1) */
8729 cmpop1 = const0_rtx;
8730 if (code == MAX_EXPR)
8731 comparison_code = unsignedp ? NE : GT;
8732 }
8733 if (op1 == constm1_rtx && !unsignedp)
8734 {
8735 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8736 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8737 cmpop1 = const0_rtx;
8738 if (code == MIN_EXPR)
8739 comparison_code = LT;
8740 }
8741 #ifdef HAVE_conditional_move
8742 /* Use a conditional move if possible. */
8743 if (can_conditionally_move_p (mode))
8744 {
8745 rtx insn;
8746
8747 /* ??? Same problem as in expmed.c: emit_conditional_move
8748 forces a stack adjustment via compare_from_rtx, and we
8749 lose the stack adjustment if the sequence we are about
8750 to create is discarded. */
8751 do_pending_stack_adjust ();
8752
8753 start_sequence ();
8754
8755 /* Try to emit the conditional move. */
8756 insn = emit_conditional_move (target, comparison_code,
8757 op0, cmpop1, mode,
8758 op0, op1, mode,
8759 unsignedp);
8760
8761 /* If we could do the conditional move, emit the sequence,
8762 and return. */
8763 if (insn)
8764 {
8765 rtx seq = get_insns ();
8766 end_sequence ();
8767 emit_insn (seq);
8768 return target;
8769 }
8770
8771 /* Otherwise discard the sequence and fall back to code with
8772 branches. */
8773 end_sequence ();
8774 }
8775 #endif
8776 if (target != op0)
8777 emit_move_insn (target, op0);
8778
8779 temp = gen_label_rtx ();
8780 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8781 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8782 -1);
8783 }
8784 emit_move_insn (target, op1);
8785 emit_label (temp);
8786 return target;
8787
8788 case BIT_NOT_EXPR:
8789 op0 = expand_expr (treeop0, subtarget,
8790 VOIDmode, EXPAND_NORMAL);
8791 if (modifier == EXPAND_STACK_PARM)
8792 target = 0;
8793 /* In case we have to reduce the result to bitfield precision
8794 for unsigned bitfield expand this as XOR with a proper constant
8795 instead. */
8796 if (reduce_bit_field && TYPE_UNSIGNED (type))
8797 temp = expand_binop (mode, xor_optab, op0,
8798 immed_double_int_const
8799 (double_int::mask (TYPE_PRECISION (type)), mode),
8800 target, 1, OPTAB_LIB_WIDEN);
8801 else
8802 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8803 gcc_assert (temp);
8804 return temp;
8805
8806 /* ??? Can optimize bitwise operations with one arg constant.
8807 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8808 and (a bitwise1 b) bitwise2 b (etc)
8809 but that is probably not worth while. */
8810
8811 case BIT_AND_EXPR:
8812 case BIT_IOR_EXPR:
8813 case BIT_XOR_EXPR:
8814 goto binop;
8815
8816 case LROTATE_EXPR:
8817 case RROTATE_EXPR:
8818 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8819 || (GET_MODE_PRECISION (TYPE_MODE (type))
8820 == TYPE_PRECISION (type)));
8821 /* fall through */
8822
8823 case LSHIFT_EXPR:
8824 case RSHIFT_EXPR:
8825 /* If this is a fixed-point operation, then we cannot use the code
8826 below because "expand_shift" doesn't support sat/no-sat fixed-point
8827 shifts. */
8828 if (ALL_FIXED_POINT_MODE_P (mode))
8829 goto binop;
8830
8831 if (! safe_from_p (subtarget, treeop1, 1))
8832 subtarget = 0;
8833 if (modifier == EXPAND_STACK_PARM)
8834 target = 0;
8835 op0 = expand_expr (treeop0, subtarget,
8836 VOIDmode, EXPAND_NORMAL);
8837 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8838 unsignedp);
8839 if (code == LSHIFT_EXPR)
8840 temp = REDUCE_BIT_FIELD (temp);
8841 return temp;
8842
8843 /* Could determine the answer when only additive constants differ. Also,
8844 the addition of one can be handled by changing the condition. */
8845 case LT_EXPR:
8846 case LE_EXPR:
8847 case GT_EXPR:
8848 case GE_EXPR:
8849 case EQ_EXPR:
8850 case NE_EXPR:
8851 case UNORDERED_EXPR:
8852 case ORDERED_EXPR:
8853 case UNLT_EXPR:
8854 case UNLE_EXPR:
8855 case UNGT_EXPR:
8856 case UNGE_EXPR:
8857 case UNEQ_EXPR:
8858 case LTGT_EXPR:
8859 temp = do_store_flag (ops,
8860 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8861 tmode != VOIDmode ? tmode : mode);
8862 if (temp)
8863 return temp;
8864
8865 /* Use a compare and a jump for BLKmode comparisons, or for function
8866 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8867
8868 if ((target == 0
8869 || modifier == EXPAND_STACK_PARM
8870 || ! safe_from_p (target, treeop0, 1)
8871 || ! safe_from_p (target, treeop1, 1)
8872 /* Make sure we don't have a hard reg (such as function's return
8873 value) live across basic blocks, if not optimizing. */
8874 || (!optimize && REG_P (target)
8875 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8876 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8877
8878 emit_move_insn (target, const0_rtx);
8879
8880 op1 = gen_label_rtx ();
8881 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8882
8883 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8884 emit_move_insn (target, constm1_rtx);
8885 else
8886 emit_move_insn (target, const1_rtx);
8887
8888 emit_label (op1);
8889 return target;
8890
8891 case COMPLEX_EXPR:
8892 /* Get the rtx code of the operands. */
8893 op0 = expand_normal (treeop0);
8894 op1 = expand_normal (treeop1);
8895
8896 if (!target)
8897 target = gen_reg_rtx (TYPE_MODE (type));
8898 else
8899 /* If target overlaps with op1, then either we need to force
8900 op1 into a pseudo (if target also overlaps with op0),
8901 or write the complex parts in reverse order. */
8902 switch (GET_CODE (target))
8903 {
8904 case CONCAT:
8905 if (reg_overlap_mentioned_p (XEXP (target, 0), op1))
8906 {
8907 if (reg_overlap_mentioned_p (XEXP (target, 1), op0))
8908 {
8909 complex_expr_force_op1:
8910 temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target)));
8911 emit_move_insn (temp, op1);
8912 op1 = temp;
8913 break;
8914 }
8915 complex_expr_swap_order:
8916 /* Move the imaginary (op1) and real (op0) parts to their
8917 location. */
8918 write_complex_part (target, op1, true);
8919 write_complex_part (target, op0, false);
8920
8921 return target;
8922 }
8923 break;
8924 case MEM:
8925 temp = adjust_address_nv (target,
8926 GET_MODE_INNER (GET_MODE (target)), 0);
8927 if (reg_overlap_mentioned_p (temp, op1))
8928 {
8929 enum machine_mode imode = GET_MODE_INNER (GET_MODE (target));
8930 temp = adjust_address_nv (target, imode,
8931 GET_MODE_SIZE (imode));
8932 if (reg_overlap_mentioned_p (temp, op0))
8933 goto complex_expr_force_op1;
8934 goto complex_expr_swap_order;
8935 }
8936 break;
8937 default:
8938 if (reg_overlap_mentioned_p (target, op1))
8939 {
8940 if (reg_overlap_mentioned_p (target, op0))
8941 goto complex_expr_force_op1;
8942 goto complex_expr_swap_order;
8943 }
8944 break;
8945 }
8946
8947 /* Move the real (op0) and imaginary (op1) parts to their location. */
8948 write_complex_part (target, op0, false);
8949 write_complex_part (target, op1, true);
8950
8951 return target;
8952
8953 case WIDEN_SUM_EXPR:
8954 {
8955 tree oprnd0 = treeop0;
8956 tree oprnd1 = treeop1;
8957
8958 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8959 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8960 target, unsignedp);
8961 return target;
8962 }
8963
8964 case REDUC_MAX_EXPR:
8965 case REDUC_MIN_EXPR:
8966 case REDUC_PLUS_EXPR:
8967 {
8968 op0 = expand_normal (treeop0);
8969 this_optab = optab_for_tree_code (code, type, optab_default);
8970 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8971 gcc_assert (temp);
8972 return temp;
8973 }
8974
8975 case VEC_LSHIFT_EXPR:
8976 case VEC_RSHIFT_EXPR:
8977 {
8978 target = expand_vec_shift_expr (ops, target);
8979 return target;
8980 }
8981
8982 case VEC_UNPACK_HI_EXPR:
8983 case VEC_UNPACK_LO_EXPR:
8984 {
8985 op0 = expand_normal (treeop0);
8986 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8987 target, unsignedp);
8988 gcc_assert (temp);
8989 return temp;
8990 }
8991
8992 case VEC_UNPACK_FLOAT_HI_EXPR:
8993 case VEC_UNPACK_FLOAT_LO_EXPR:
8994 {
8995 op0 = expand_normal (treeop0);
8996 /* The signedness is determined from input operand. */
8997 temp = expand_widen_pattern_expr
8998 (ops, op0, NULL_RTX, NULL_RTX,
8999 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9000
9001 gcc_assert (temp);
9002 return temp;
9003 }
9004
9005 case VEC_WIDEN_MULT_HI_EXPR:
9006 case VEC_WIDEN_MULT_LO_EXPR:
9007 case VEC_WIDEN_MULT_EVEN_EXPR:
9008 case VEC_WIDEN_MULT_ODD_EXPR:
9009 case VEC_WIDEN_LSHIFT_HI_EXPR:
9010 case VEC_WIDEN_LSHIFT_LO_EXPR:
9011 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9012 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
9013 target, unsignedp);
9014 gcc_assert (target);
9015 return target;
9016
9017 case VEC_PACK_TRUNC_EXPR:
9018 case VEC_PACK_SAT_EXPR:
9019 case VEC_PACK_FIX_TRUNC_EXPR:
9020 mode = TYPE_MODE (TREE_TYPE (treeop0));
9021 goto binop;
9022
9023 case VEC_PERM_EXPR:
9024 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
9025 op2 = expand_normal (treeop2);
9026
9027 /* Careful here: if the target doesn't support integral vector modes,
9028 a constant selection vector could wind up smooshed into a normal
9029 integral constant. */
9030 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
9031 {
9032 tree sel_type = TREE_TYPE (treeop2);
9033 enum machine_mode vmode
9034 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
9035 TYPE_VECTOR_SUBPARTS (sel_type));
9036 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
9037 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
9038 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
9039 }
9040 else
9041 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
9042
9043 temp = expand_vec_perm (mode, op0, op1, op2, target);
9044 gcc_assert (temp);
9045 return temp;
9046
9047 case DOT_PROD_EXPR:
9048 {
9049 tree oprnd0 = treeop0;
9050 tree oprnd1 = treeop1;
9051 tree oprnd2 = treeop2;
9052 rtx op2;
9053
9054 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9055 op2 = expand_normal (oprnd2);
9056 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9057 target, unsignedp);
9058 return target;
9059 }
9060
9061 case REALIGN_LOAD_EXPR:
9062 {
9063 tree oprnd0 = treeop0;
9064 tree oprnd1 = treeop1;
9065 tree oprnd2 = treeop2;
9066 rtx op2;
9067
9068 this_optab = optab_for_tree_code (code, type, optab_default);
9069 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9070 op2 = expand_normal (oprnd2);
9071 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9072 target, unsignedp);
9073 gcc_assert (temp);
9074 return temp;
9075 }
9076
9077 case COND_EXPR:
9078 /* A COND_EXPR with its type being VOID_TYPE represents a
9079 conditional jump and is handled in
9080 expand_gimple_cond_expr. */
9081 gcc_assert (!VOID_TYPE_P (type));
9082
9083 /* Note that COND_EXPRs whose type is a structure or union
9084 are required to be constructed to contain assignments of
9085 a temporary variable, so that we can evaluate them here
9086 for side effect only. If type is void, we must do likewise. */
9087
9088 gcc_assert (!TREE_ADDRESSABLE (type)
9089 && !ignore
9090 && TREE_TYPE (treeop1) != void_type_node
9091 && TREE_TYPE (treeop2) != void_type_node);
9092
9093 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9094 if (temp)
9095 return temp;
9096
9097 /* If we are not to produce a result, we have no target. Otherwise,
9098 if a target was specified use it; it will not be used as an
9099 intermediate target unless it is safe. If no target, use a
9100 temporary. */
9101
9102 if (modifier != EXPAND_STACK_PARM
9103 && original_target
9104 && safe_from_p (original_target, treeop0, 1)
9105 && GET_MODE (original_target) == mode
9106 && !MEM_P (original_target))
9107 temp = original_target;
9108 else
9109 temp = assign_temp (type, 0, 1);
9110
9111 do_pending_stack_adjust ();
9112 NO_DEFER_POP;
9113 op0 = gen_label_rtx ();
9114 op1 = gen_label_rtx ();
9115 jumpifnot (treeop0, op0, -1);
9116 store_expr (treeop1, temp,
9117 modifier == EXPAND_STACK_PARM,
9118 false);
9119
9120 emit_jump_insn (gen_jump (op1));
9121 emit_barrier ();
9122 emit_label (op0);
9123 store_expr (treeop2, temp,
9124 modifier == EXPAND_STACK_PARM,
9125 false);
9126
9127 emit_label (op1);
9128 OK_DEFER_POP;
9129 return temp;
9130
9131 case VEC_COND_EXPR:
9132 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9133 return target;
9134
9135 default:
9136 gcc_unreachable ();
9137 }
9138
9139 /* Here to do an ordinary binary operator. */
9140 binop:
9141 expand_operands (treeop0, treeop1,
9142 subtarget, &op0, &op1, EXPAND_NORMAL);
9143 binop2:
9144 this_optab = optab_for_tree_code (code, type, optab_default);
9145 binop3:
9146 if (modifier == EXPAND_STACK_PARM)
9147 target = 0;
9148 temp = expand_binop (mode, this_optab, op0, op1, target,
9149 unsignedp, OPTAB_LIB_WIDEN);
9150 gcc_assert (temp);
9151 /* Bitwise operations do not need bitfield reduction as we expect their
9152 operands being properly truncated. */
9153 if (code == BIT_XOR_EXPR
9154 || code == BIT_AND_EXPR
9155 || code == BIT_IOR_EXPR)
9156 return temp;
9157 return REDUCE_BIT_FIELD (temp);
9158 }
9159 #undef REDUCE_BIT_FIELD
9160
9161 rtx
9162 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
9163 enum expand_modifier modifier, rtx *alt_rtl)
9164 {
9165 rtx op0, op1, temp, decl_rtl;
9166 tree type;
9167 int unsignedp;
9168 enum machine_mode mode;
9169 enum tree_code code = TREE_CODE (exp);
9170 rtx subtarget, original_target;
9171 int ignore;
9172 tree context;
9173 bool reduce_bit_field;
9174 location_t loc = EXPR_LOCATION (exp);
9175 struct separate_ops ops;
9176 tree treeop0, treeop1, treeop2;
9177 tree ssa_name = NULL_TREE;
9178 gimple g;
9179
9180 type = TREE_TYPE (exp);
9181 mode = TYPE_MODE (type);
9182 unsignedp = TYPE_UNSIGNED (type);
9183
9184 treeop0 = treeop1 = treeop2 = NULL_TREE;
9185 if (!VL_EXP_CLASS_P (exp))
9186 switch (TREE_CODE_LENGTH (code))
9187 {
9188 default:
9189 case 3: treeop2 = TREE_OPERAND (exp, 2);
9190 case 2: treeop1 = TREE_OPERAND (exp, 1);
9191 case 1: treeop0 = TREE_OPERAND (exp, 0);
9192 case 0: break;
9193 }
9194 ops.code = code;
9195 ops.type = type;
9196 ops.op0 = treeop0;
9197 ops.op1 = treeop1;
9198 ops.op2 = treeop2;
9199 ops.location = loc;
9200
9201 ignore = (target == const0_rtx
9202 || ((CONVERT_EXPR_CODE_P (code)
9203 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9204 && TREE_CODE (type) == VOID_TYPE));
9205
9206 /* An operation in what may be a bit-field type needs the
9207 result to be reduced to the precision of the bit-field type,
9208 which is narrower than that of the type's mode. */
9209 reduce_bit_field = (!ignore
9210 && INTEGRAL_TYPE_P (type)
9211 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
9212
9213 /* If we are going to ignore this result, we need only do something
9214 if there is a side-effect somewhere in the expression. If there
9215 is, short-circuit the most common cases here. Note that we must
9216 not call expand_expr with anything but const0_rtx in case this
9217 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9218
9219 if (ignore)
9220 {
9221 if (! TREE_SIDE_EFFECTS (exp))
9222 return const0_rtx;
9223
9224 /* Ensure we reference a volatile object even if value is ignored, but
9225 don't do this if all we are doing is taking its address. */
9226 if (TREE_THIS_VOLATILE (exp)
9227 && TREE_CODE (exp) != FUNCTION_DECL
9228 && mode != VOIDmode && mode != BLKmode
9229 && modifier != EXPAND_CONST_ADDRESS)
9230 {
9231 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9232 if (MEM_P (temp))
9233 copy_to_reg (temp);
9234 return const0_rtx;
9235 }
9236
9237 if (TREE_CODE_CLASS (code) == tcc_unary
9238 || code == BIT_FIELD_REF
9239 || code == COMPONENT_REF
9240 || code == INDIRECT_REF)
9241 return expand_expr (treeop0, const0_rtx, VOIDmode,
9242 modifier);
9243
9244 else if (TREE_CODE_CLASS (code) == tcc_binary
9245 || TREE_CODE_CLASS (code) == tcc_comparison
9246 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9247 {
9248 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9249 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9250 return const0_rtx;
9251 }
9252
9253 target = 0;
9254 }
9255
9256 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9257 target = 0;
9258
9259 /* Use subtarget as the target for operand 0 of a binary operation. */
9260 subtarget = get_subtarget (target);
9261 original_target = target;
9262
9263 switch (code)
9264 {
9265 case LABEL_DECL:
9266 {
9267 tree function = decl_function_context (exp);
9268
9269 temp = label_rtx (exp);
9270 temp = gen_rtx_LABEL_REF (Pmode, temp);
9271
9272 if (function != current_function_decl
9273 && function != 0)
9274 LABEL_REF_NONLOCAL_P (temp) = 1;
9275
9276 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9277 return temp;
9278 }
9279
9280 case SSA_NAME:
9281 /* ??? ivopts calls expander, without any preparation from
9282 out-of-ssa. So fake instructions as if this was an access to the
9283 base variable. This unnecessarily allocates a pseudo, see how we can
9284 reuse it, if partition base vars have it set already. */
9285 if (!currently_expanding_to_rtl)
9286 {
9287 tree var = SSA_NAME_VAR (exp);
9288 if (var && DECL_RTL_SET_P (var))
9289 return DECL_RTL (var);
9290 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)),
9291 LAST_VIRTUAL_REGISTER + 1);
9292 }
9293
9294 g = get_gimple_for_ssa_name (exp);
9295 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9296 if (g == NULL
9297 && modifier == EXPAND_INITIALIZER
9298 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9299 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9300 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9301 g = SSA_NAME_DEF_STMT (exp);
9302 if (g)
9303 {
9304 rtx r;
9305 location_t saved_loc = curr_insn_location ();
9306
9307 set_curr_insn_location (gimple_location (g));
9308 r = expand_expr_real (gimple_assign_rhs_to_tree (g), target,
9309 tmode, modifier, NULL);
9310 set_curr_insn_location (saved_loc);
9311 if (REG_P (r) && !REG_EXPR (r))
9312 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9313 return r;
9314 }
9315
9316 ssa_name = exp;
9317 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9318 exp = SSA_NAME_VAR (ssa_name);
9319 goto expand_decl_rtl;
9320
9321 case PARM_DECL:
9322 case VAR_DECL:
9323 /* If a static var's type was incomplete when the decl was written,
9324 but the type is complete now, lay out the decl now. */
9325 if (DECL_SIZE (exp) == 0
9326 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9327 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9328 layout_decl (exp, 0);
9329
9330 /* ... fall through ... */
9331
9332 case FUNCTION_DECL:
9333 case RESULT_DECL:
9334 decl_rtl = DECL_RTL (exp);
9335 expand_decl_rtl:
9336 gcc_assert (decl_rtl);
9337 decl_rtl = copy_rtx (decl_rtl);
9338 /* Record writes to register variables. */
9339 if (modifier == EXPAND_WRITE
9340 && REG_P (decl_rtl)
9341 && HARD_REGISTER_P (decl_rtl))
9342 add_to_hard_reg_set (&crtl->asm_clobbers,
9343 GET_MODE (decl_rtl), REGNO (decl_rtl));
9344
9345 /* Ensure variable marked as used even if it doesn't go through
9346 a parser. If it hasn't be used yet, write out an external
9347 definition. */
9348 TREE_USED (exp) = 1;
9349
9350 /* Show we haven't gotten RTL for this yet. */
9351 temp = 0;
9352
9353 /* Variables inherited from containing functions should have
9354 been lowered by this point. */
9355 context = decl_function_context (exp);
9356 gcc_assert (!context
9357 || context == current_function_decl
9358 || TREE_STATIC (exp)
9359 || DECL_EXTERNAL (exp)
9360 /* ??? C++ creates functions that are not TREE_STATIC. */
9361 || TREE_CODE (exp) == FUNCTION_DECL);
9362
9363 /* This is the case of an array whose size is to be determined
9364 from its initializer, while the initializer is still being parsed.
9365 ??? We aren't parsing while expanding anymore. */
9366
9367 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9368 temp = validize_mem (decl_rtl);
9369
9370 /* If DECL_RTL is memory, we are in the normal case and the
9371 address is not valid, get the address into a register. */
9372
9373 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9374 {
9375 if (alt_rtl)
9376 *alt_rtl = decl_rtl;
9377 decl_rtl = use_anchored_address (decl_rtl);
9378 if (modifier != EXPAND_CONST_ADDRESS
9379 && modifier != EXPAND_SUM
9380 && !memory_address_addr_space_p (DECL_MODE (exp),
9381 XEXP (decl_rtl, 0),
9382 MEM_ADDR_SPACE (decl_rtl)))
9383 temp = replace_equiv_address (decl_rtl,
9384 copy_rtx (XEXP (decl_rtl, 0)));
9385 }
9386
9387 /* If we got something, return it. But first, set the alignment
9388 if the address is a register. */
9389 if (temp != 0)
9390 {
9391 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9392 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9393
9394 return temp;
9395 }
9396
9397 /* If the mode of DECL_RTL does not match that of the decl,
9398 there are two cases: we are dealing with a BLKmode value
9399 that is returned in a register, or we are dealing with
9400 a promoted value. In the latter case, return a SUBREG
9401 of the wanted mode, but mark it so that we know that it
9402 was already extended. */
9403 if (REG_P (decl_rtl)
9404 && DECL_MODE (exp) != BLKmode
9405 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9406 {
9407 enum machine_mode pmode;
9408
9409 /* Get the signedness to be used for this variable. Ensure we get
9410 the same mode we got when the variable was declared. */
9411 if (code == SSA_NAME
9412 && (g = SSA_NAME_DEF_STMT (ssa_name))
9413 && gimple_code (g) == GIMPLE_CALL)
9414 {
9415 gcc_assert (!gimple_call_internal_p (g));
9416 pmode = promote_function_mode (type, mode, &unsignedp,
9417 gimple_call_fntype (g),
9418 2);
9419 }
9420 else
9421 pmode = promote_decl_mode (exp, &unsignedp);
9422 gcc_assert (GET_MODE (decl_rtl) == pmode);
9423
9424 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9425 SUBREG_PROMOTED_VAR_P (temp) = 1;
9426 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
9427 return temp;
9428 }
9429
9430 return decl_rtl;
9431
9432 case INTEGER_CST:
9433 temp = immed_double_const (TREE_INT_CST_LOW (exp),
9434 TREE_INT_CST_HIGH (exp), mode);
9435
9436 return temp;
9437
9438 case VECTOR_CST:
9439 {
9440 tree tmp = NULL_TREE;
9441 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9442 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9443 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9444 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9445 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9446 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9447 return const_vector_from_tree (exp);
9448 if (GET_MODE_CLASS (mode) == MODE_INT)
9449 {
9450 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9451 if (type_for_mode)
9452 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9453 }
9454 if (!tmp)
9455 {
9456 vec<constructor_elt, va_gc> *v;
9457 unsigned i;
9458 vec_alloc (v, VECTOR_CST_NELTS (exp));
9459 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
9460 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
9461 tmp = build_constructor (type, v);
9462 }
9463 return expand_expr (tmp, ignore ? const0_rtx : target,
9464 tmode, modifier);
9465 }
9466
9467 case CONST_DECL:
9468 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9469
9470 case REAL_CST:
9471 /* If optimized, generate immediate CONST_DOUBLE
9472 which will be turned into memory by reload if necessary.
9473
9474 We used to force a register so that loop.c could see it. But
9475 this does not allow gen_* patterns to perform optimizations with
9476 the constants. It also produces two insns in cases like "x = 1.0;".
9477 On most machines, floating-point constants are not permitted in
9478 many insns, so we'd end up copying it to a register in any case.
9479
9480 Now, we do the copying in expand_binop, if appropriate. */
9481 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9482 TYPE_MODE (TREE_TYPE (exp)));
9483
9484 case FIXED_CST:
9485 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9486 TYPE_MODE (TREE_TYPE (exp)));
9487
9488 case COMPLEX_CST:
9489 /* Handle evaluating a complex constant in a CONCAT target. */
9490 if (original_target && GET_CODE (original_target) == CONCAT)
9491 {
9492 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9493 rtx rtarg, itarg;
9494
9495 rtarg = XEXP (original_target, 0);
9496 itarg = XEXP (original_target, 1);
9497
9498 /* Move the real and imaginary parts separately. */
9499 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9500 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9501
9502 if (op0 != rtarg)
9503 emit_move_insn (rtarg, op0);
9504 if (op1 != itarg)
9505 emit_move_insn (itarg, op1);
9506
9507 return original_target;
9508 }
9509
9510 /* ... fall through ... */
9511
9512 case STRING_CST:
9513 temp = expand_expr_constant (exp, 1, modifier);
9514
9515 /* temp contains a constant address.
9516 On RISC machines where a constant address isn't valid,
9517 make some insns to get that address into a register. */
9518 if (modifier != EXPAND_CONST_ADDRESS
9519 && modifier != EXPAND_INITIALIZER
9520 && modifier != EXPAND_SUM
9521 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9522 MEM_ADDR_SPACE (temp)))
9523 return replace_equiv_address (temp,
9524 copy_rtx (XEXP (temp, 0)));
9525 return temp;
9526
9527 case SAVE_EXPR:
9528 {
9529 tree val = treeop0;
9530 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
9531
9532 if (!SAVE_EXPR_RESOLVED_P (exp))
9533 {
9534 /* We can indeed still hit this case, typically via builtin
9535 expanders calling save_expr immediately before expanding
9536 something. Assume this means that we only have to deal
9537 with non-BLKmode values. */
9538 gcc_assert (GET_MODE (ret) != BLKmode);
9539
9540 val = build_decl (curr_insn_location (),
9541 VAR_DECL, NULL, TREE_TYPE (exp));
9542 DECL_ARTIFICIAL (val) = 1;
9543 DECL_IGNORED_P (val) = 1;
9544 treeop0 = val;
9545 TREE_OPERAND (exp, 0) = treeop0;
9546 SAVE_EXPR_RESOLVED_P (exp) = 1;
9547
9548 if (!CONSTANT_P (ret))
9549 ret = copy_to_reg (ret);
9550 SET_DECL_RTL (val, ret);
9551 }
9552
9553 return ret;
9554 }
9555
9556
9557 case CONSTRUCTOR:
9558 /* If we don't need the result, just ensure we evaluate any
9559 subexpressions. */
9560 if (ignore)
9561 {
9562 unsigned HOST_WIDE_INT idx;
9563 tree value;
9564
9565 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9566 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9567
9568 return const0_rtx;
9569 }
9570
9571 return expand_constructor (exp, target, modifier, false);
9572
9573 case TARGET_MEM_REF:
9574 {
9575 addr_space_t as
9576 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9577 struct mem_address addr;
9578 enum insn_code icode;
9579 unsigned int align;
9580
9581 get_address_description (exp, &addr);
9582 op0 = addr_for_mem_ref (&addr, as, true);
9583 op0 = memory_address_addr_space (mode, op0, as);
9584 temp = gen_rtx_MEM (mode, op0);
9585 set_mem_attributes (temp, exp, 0);
9586 set_mem_addr_space (temp, as);
9587 align = get_object_alignment (exp);
9588 if (modifier != EXPAND_WRITE
9589 && modifier != EXPAND_MEMORY
9590 && mode != BLKmode
9591 && align < GET_MODE_ALIGNMENT (mode)
9592 /* If the target does not have special handling for unaligned
9593 loads of mode then it can use regular moves for them. */
9594 && ((icode = optab_handler (movmisalign_optab, mode))
9595 != CODE_FOR_nothing))
9596 {
9597 struct expand_operand ops[2];
9598
9599 /* We've already validated the memory, and we're creating a
9600 new pseudo destination. The predicates really can't fail,
9601 nor can the generator. */
9602 create_output_operand (&ops[0], NULL_RTX, mode);
9603 create_fixed_operand (&ops[1], temp);
9604 expand_insn (icode, 2, ops);
9605 return ops[0].value;
9606 }
9607 return temp;
9608 }
9609
9610 case MEM_REF:
9611 {
9612 addr_space_t as
9613 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9614 enum machine_mode address_mode;
9615 tree base = TREE_OPERAND (exp, 0);
9616 gimple def_stmt;
9617 enum insn_code icode;
9618 unsigned align;
9619 /* Handle expansion of non-aliased memory with non-BLKmode. That
9620 might end up in a register. */
9621 if (mem_ref_refers_to_non_mem_p (exp))
9622 {
9623 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9624 tree bit_offset;
9625 tree bftype;
9626 base = TREE_OPERAND (base, 0);
9627 if (offset == 0
9628 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9629 && (GET_MODE_BITSIZE (DECL_MODE (base))
9630 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9631 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9632 TREE_TYPE (exp), base),
9633 target, tmode, modifier);
9634 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9635 bftype = TREE_TYPE (base);
9636 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9637 bftype = TREE_TYPE (exp);
9638 else
9639 {
9640 temp = assign_stack_temp (DECL_MODE (base),
9641 GET_MODE_SIZE (DECL_MODE (base)));
9642 store_expr (base, temp, 0, false);
9643 temp = adjust_address (temp, BLKmode, offset);
9644 set_mem_size (temp, int_size_in_bytes (TREE_TYPE (exp)));
9645 return temp;
9646 }
9647 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9648 base,
9649 TYPE_SIZE (TREE_TYPE (exp)),
9650 bit_offset),
9651 target, tmode, modifier);
9652 }
9653 address_mode = targetm.addr_space.address_mode (as);
9654 base = TREE_OPERAND (exp, 0);
9655 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9656 {
9657 tree mask = gimple_assign_rhs2 (def_stmt);
9658 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9659 gimple_assign_rhs1 (def_stmt), mask);
9660 TREE_OPERAND (exp, 0) = base;
9661 }
9662 align = get_object_alignment (exp);
9663 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9664 op0 = memory_address_addr_space (address_mode, op0, as);
9665 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9666 {
9667 rtx off
9668 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9669 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9670 }
9671 op0 = memory_address_addr_space (mode, op0, as);
9672 temp = gen_rtx_MEM (mode, op0);
9673 set_mem_attributes (temp, exp, 0);
9674 set_mem_addr_space (temp, as);
9675 if (TREE_THIS_VOLATILE (exp))
9676 MEM_VOLATILE_P (temp) = 1;
9677 if (modifier != EXPAND_WRITE
9678 && modifier != EXPAND_MEMORY
9679 && mode != BLKmode
9680 && align < GET_MODE_ALIGNMENT (mode))
9681 {
9682 if ((icode = optab_handler (movmisalign_optab, mode))
9683 != CODE_FOR_nothing)
9684 {
9685 struct expand_operand ops[2];
9686
9687 /* We've already validated the memory, and we're creating a
9688 new pseudo destination. The predicates really can't fail,
9689 nor can the generator. */
9690 create_output_operand (&ops[0], NULL_RTX, mode);
9691 create_fixed_operand (&ops[1], temp);
9692 expand_insn (icode, 2, ops);
9693 return ops[0].value;
9694 }
9695 else if (SLOW_UNALIGNED_ACCESS (mode, align))
9696 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
9697 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
9698 true, (modifier == EXPAND_STACK_PARM
9699 ? NULL_RTX : target),
9700 mode, mode);
9701 }
9702 return temp;
9703 }
9704
9705 case ARRAY_REF:
9706
9707 {
9708 tree array = treeop0;
9709 tree index = treeop1;
9710
9711 /* Fold an expression like: "foo"[2].
9712 This is not done in fold so it won't happen inside &.
9713 Don't fold if this is for wide characters since it's too
9714 difficult to do correctly and this is a very rare case. */
9715
9716 if (modifier != EXPAND_CONST_ADDRESS
9717 && modifier != EXPAND_INITIALIZER
9718 && modifier != EXPAND_MEMORY)
9719 {
9720 tree t = fold_read_from_constant_string (exp);
9721
9722 if (t)
9723 return expand_expr (t, target, tmode, modifier);
9724 }
9725
9726 /* If this is a constant index into a constant array,
9727 just get the value from the array. Handle both the cases when
9728 we have an explicit constructor and when our operand is a variable
9729 that was declared const. */
9730
9731 if (modifier != EXPAND_CONST_ADDRESS
9732 && modifier != EXPAND_INITIALIZER
9733 && modifier != EXPAND_MEMORY
9734 && TREE_CODE (array) == CONSTRUCTOR
9735 && ! TREE_SIDE_EFFECTS (array)
9736 && TREE_CODE (index) == INTEGER_CST)
9737 {
9738 unsigned HOST_WIDE_INT ix;
9739 tree field, value;
9740
9741 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9742 field, value)
9743 if (tree_int_cst_equal (field, index))
9744 {
9745 if (!TREE_SIDE_EFFECTS (value))
9746 return expand_expr (fold (value), target, tmode, modifier);
9747 break;
9748 }
9749 }
9750
9751 else if (optimize >= 1
9752 && modifier != EXPAND_CONST_ADDRESS
9753 && modifier != EXPAND_INITIALIZER
9754 && modifier != EXPAND_MEMORY
9755 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9756 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9757 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9758 && const_value_known_p (array))
9759 {
9760 if (TREE_CODE (index) == INTEGER_CST)
9761 {
9762 tree init = DECL_INITIAL (array);
9763
9764 if (TREE_CODE (init) == CONSTRUCTOR)
9765 {
9766 unsigned HOST_WIDE_INT ix;
9767 tree field, value;
9768
9769 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9770 field, value)
9771 if (tree_int_cst_equal (field, index))
9772 {
9773 if (TREE_SIDE_EFFECTS (value))
9774 break;
9775
9776 if (TREE_CODE (value) == CONSTRUCTOR)
9777 {
9778 /* If VALUE is a CONSTRUCTOR, this
9779 optimization is only useful if
9780 this doesn't store the CONSTRUCTOR
9781 into memory. If it does, it is more
9782 efficient to just load the data from
9783 the array directly. */
9784 rtx ret = expand_constructor (value, target,
9785 modifier, true);
9786 if (ret == NULL_RTX)
9787 break;
9788 }
9789
9790 return expand_expr (fold (value), target, tmode,
9791 modifier);
9792 }
9793 }
9794 else if(TREE_CODE (init) == STRING_CST)
9795 {
9796 tree index1 = index;
9797 tree low_bound = array_ref_low_bound (exp);
9798 index1 = fold_convert_loc (loc, sizetype,
9799 treeop1);
9800
9801 /* Optimize the special-case of a zero lower bound.
9802
9803 We convert the low_bound to sizetype to avoid some problems
9804 with constant folding. (E.g. suppose the lower bound is 1,
9805 and its mode is QI. Without the conversion,l (ARRAY
9806 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9807 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9808
9809 if (! integer_zerop (low_bound))
9810 index1 = size_diffop_loc (loc, index1,
9811 fold_convert_loc (loc, sizetype,
9812 low_bound));
9813
9814 if (0 > compare_tree_int (index1,
9815 TREE_STRING_LENGTH (init)))
9816 {
9817 tree type = TREE_TYPE (TREE_TYPE (init));
9818 enum machine_mode mode = TYPE_MODE (type);
9819
9820 if (GET_MODE_CLASS (mode) == MODE_INT
9821 && GET_MODE_SIZE (mode) == 1)
9822 return gen_int_mode (TREE_STRING_POINTER (init)
9823 [TREE_INT_CST_LOW (index1)],
9824 mode);
9825 }
9826 }
9827 }
9828 }
9829 }
9830 goto normal_inner_ref;
9831
9832 case COMPONENT_REF:
9833 /* If the operand is a CONSTRUCTOR, we can just extract the
9834 appropriate field if it is present. */
9835 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9836 {
9837 unsigned HOST_WIDE_INT idx;
9838 tree field, value;
9839
9840 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9841 idx, field, value)
9842 if (field == treeop1
9843 /* We can normally use the value of the field in the
9844 CONSTRUCTOR. However, if this is a bitfield in
9845 an integral mode that we can fit in a HOST_WIDE_INT,
9846 we must mask only the number of bits in the bitfield,
9847 since this is done implicitly by the constructor. If
9848 the bitfield does not meet either of those conditions,
9849 we can't do this optimization. */
9850 && (! DECL_BIT_FIELD (field)
9851 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9852 && (GET_MODE_PRECISION (DECL_MODE (field))
9853 <= HOST_BITS_PER_WIDE_INT))))
9854 {
9855 if (DECL_BIT_FIELD (field)
9856 && modifier == EXPAND_STACK_PARM)
9857 target = 0;
9858 op0 = expand_expr (value, target, tmode, modifier);
9859 if (DECL_BIT_FIELD (field))
9860 {
9861 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9862 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9863
9864 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9865 {
9866 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9867 op0 = expand_and (imode, op0, op1, target);
9868 }
9869 else
9870 {
9871 int count = GET_MODE_PRECISION (imode) - bitsize;
9872
9873 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9874 target, 0);
9875 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9876 target, 0);
9877 }
9878 }
9879
9880 return op0;
9881 }
9882 }
9883 goto normal_inner_ref;
9884
9885 case BIT_FIELD_REF:
9886 case ARRAY_RANGE_REF:
9887 normal_inner_ref:
9888 {
9889 enum machine_mode mode1, mode2;
9890 HOST_WIDE_INT bitsize, bitpos;
9891 tree offset;
9892 int volatilep = 0, must_force_mem;
9893 bool packedp = false;
9894 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9895 &mode1, &unsignedp, &volatilep, true);
9896 rtx orig_op0, memloc;
9897 bool mem_attrs_from_type = false;
9898
9899 /* If we got back the original object, something is wrong. Perhaps
9900 we are evaluating an expression too early. In any event, don't
9901 infinitely recurse. */
9902 gcc_assert (tem != exp);
9903
9904 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9905 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9906 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9907 packedp = true;
9908
9909 /* If TEM's type is a union of variable size, pass TARGET to the inner
9910 computation, since it will need a temporary and TARGET is known
9911 to have to do. This occurs in unchecked conversion in Ada. */
9912 orig_op0 = op0
9913 = expand_expr (tem,
9914 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9915 && COMPLETE_TYPE_P (TREE_TYPE (tem))
9916 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9917 != INTEGER_CST)
9918 && modifier != EXPAND_STACK_PARM
9919 ? target : NULL_RTX),
9920 VOIDmode,
9921 (modifier == EXPAND_INITIALIZER
9922 || modifier == EXPAND_CONST_ADDRESS
9923 || modifier == EXPAND_STACK_PARM)
9924 ? modifier : EXPAND_NORMAL);
9925
9926
9927 /* If the bitfield is volatile, we want to access it in the
9928 field's mode, not the computed mode.
9929 If a MEM has VOIDmode (external with incomplete type),
9930 use BLKmode for it instead. */
9931 if (MEM_P (op0))
9932 {
9933 if (volatilep && flag_strict_volatile_bitfields > 0)
9934 op0 = adjust_address (op0, mode1, 0);
9935 else if (GET_MODE (op0) == VOIDmode)
9936 op0 = adjust_address (op0, BLKmode, 0);
9937 }
9938
9939 mode2
9940 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9941
9942 /* If we have either an offset, a BLKmode result, or a reference
9943 outside the underlying object, we must force it to memory.
9944 Such a case can occur in Ada if we have unchecked conversion
9945 of an expression from a scalar type to an aggregate type or
9946 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9947 passed a partially uninitialized object or a view-conversion
9948 to a larger size. */
9949 must_force_mem = (offset
9950 || mode1 == BLKmode
9951 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9952
9953 /* Handle CONCAT first. */
9954 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9955 {
9956 if (bitpos == 0
9957 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9958 return op0;
9959 if (bitpos == 0
9960 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9961 && bitsize)
9962 {
9963 op0 = XEXP (op0, 0);
9964 mode2 = GET_MODE (op0);
9965 }
9966 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9967 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9968 && bitpos
9969 && bitsize)
9970 {
9971 op0 = XEXP (op0, 1);
9972 bitpos = 0;
9973 mode2 = GET_MODE (op0);
9974 }
9975 else
9976 /* Otherwise force into memory. */
9977 must_force_mem = 1;
9978 }
9979
9980 /* If this is a constant, put it in a register if it is a legitimate
9981 constant and we don't need a memory reference. */
9982 if (CONSTANT_P (op0)
9983 && mode2 != BLKmode
9984 && targetm.legitimate_constant_p (mode2, op0)
9985 && !must_force_mem)
9986 op0 = force_reg (mode2, op0);
9987
9988 /* Otherwise, if this is a constant, try to force it to the constant
9989 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9990 is a legitimate constant. */
9991 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9992 op0 = validize_mem (memloc);
9993
9994 /* Otherwise, if this is a constant or the object is not in memory
9995 and need be, put it there. */
9996 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9997 {
9998 tree nt = build_qualified_type (TREE_TYPE (tem),
9999 (TYPE_QUALS (TREE_TYPE (tem))
10000 | TYPE_QUAL_CONST));
10001 memloc = assign_temp (nt, 1, 1);
10002 emit_move_insn (memloc, op0);
10003 op0 = memloc;
10004 mem_attrs_from_type = true;
10005 }
10006
10007 if (offset)
10008 {
10009 enum machine_mode address_mode;
10010 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
10011 EXPAND_SUM);
10012
10013 gcc_assert (MEM_P (op0));
10014
10015 address_mode = get_address_mode (op0);
10016 if (GET_MODE (offset_rtx) != address_mode)
10017 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
10018
10019 if (GET_MODE (op0) == BLKmode
10020 /* A constant address in OP0 can have VOIDmode, we must
10021 not try to call force_reg in that case. */
10022 && GET_MODE (XEXP (op0, 0)) != VOIDmode
10023 && bitsize != 0
10024 && (bitpos % bitsize) == 0
10025 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
10026 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
10027 {
10028 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10029 bitpos = 0;
10030 }
10031
10032 op0 = offset_address (op0, offset_rtx,
10033 highest_pow2_factor (offset));
10034 }
10035
10036 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10037 record its alignment as BIGGEST_ALIGNMENT. */
10038 if (MEM_P (op0) && bitpos == 0 && offset != 0
10039 && is_aligning_offset (offset, tem))
10040 set_mem_align (op0, BIGGEST_ALIGNMENT);
10041
10042 /* Don't forget about volatility even if this is a bitfield. */
10043 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
10044 {
10045 if (op0 == orig_op0)
10046 op0 = copy_rtx (op0);
10047
10048 MEM_VOLATILE_P (op0) = 1;
10049 }
10050
10051 /* In cases where an aligned union has an unaligned object
10052 as a field, we might be extracting a BLKmode value from
10053 an integer-mode (e.g., SImode) object. Handle this case
10054 by doing the extract into an object as wide as the field
10055 (which we know to be the width of a basic mode), then
10056 storing into memory, and changing the mode to BLKmode. */
10057 if (mode1 == VOIDmode
10058 || REG_P (op0) || GET_CODE (op0) == SUBREG
10059 || (mode1 != BLKmode && ! direct_load[(int) mode1]
10060 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
10061 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
10062 && modifier != EXPAND_CONST_ADDRESS
10063 && modifier != EXPAND_INITIALIZER
10064 && modifier != EXPAND_MEMORY)
10065 /* If the field is volatile, we always want an aligned
10066 access. Do this in following two situations:
10067 1. the access is not already naturally
10068 aligned, otherwise "normal" (non-bitfield) volatile fields
10069 become non-addressable.
10070 2. the bitsize is narrower than the access size. Need
10071 to extract bitfields from the access. */
10072 || (volatilep && flag_strict_volatile_bitfields > 0
10073 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0
10074 || (mode1 != BLKmode
10075 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)))
10076 /* If the field isn't aligned enough to fetch as a memref,
10077 fetch it as a bit field. */
10078 || (mode1 != BLKmode
10079 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
10080 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
10081 || (MEM_P (op0)
10082 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
10083 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
10084 && ((modifier == EXPAND_CONST_ADDRESS
10085 || modifier == EXPAND_INITIALIZER)
10086 ? STRICT_ALIGNMENT
10087 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
10088 || (bitpos % BITS_PER_UNIT != 0)))
10089 /* If the type and the field are a constant size and the
10090 size of the type isn't the same size as the bitfield,
10091 we must use bitfield operations. */
10092 || (bitsize >= 0
10093 && TYPE_SIZE (TREE_TYPE (exp))
10094 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10095 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
10096 bitsize)))
10097 {
10098 enum machine_mode ext_mode = mode;
10099
10100 if (ext_mode == BLKmode
10101 && ! (target != 0 && MEM_P (op0)
10102 && MEM_P (target)
10103 && bitpos % BITS_PER_UNIT == 0))
10104 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
10105
10106 if (ext_mode == BLKmode)
10107 {
10108 if (target == 0)
10109 target = assign_temp (type, 1, 1);
10110
10111 if (bitsize == 0)
10112 return target;
10113
10114 /* In this case, BITPOS must start at a byte boundary and
10115 TARGET, if specified, must be a MEM. */
10116 gcc_assert (MEM_P (op0)
10117 && (!target || MEM_P (target))
10118 && !(bitpos % BITS_PER_UNIT));
10119
10120 emit_block_move (target,
10121 adjust_address (op0, VOIDmode,
10122 bitpos / BITS_PER_UNIT),
10123 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
10124 / BITS_PER_UNIT),
10125 (modifier == EXPAND_STACK_PARM
10126 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10127
10128 return target;
10129 }
10130
10131 op0 = validize_mem (op0);
10132
10133 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10134 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10135
10136 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
10137 (modifier == EXPAND_STACK_PARM
10138 ? NULL_RTX : target),
10139 ext_mode, ext_mode);
10140
10141 /* If the result is a record type and BITSIZE is narrower than
10142 the mode of OP0, an integral mode, and this is a big endian
10143 machine, we must put the field into the high-order bits. */
10144 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
10145 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
10146 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
10147 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
10148 GET_MODE_BITSIZE (GET_MODE (op0))
10149 - bitsize, op0, 1);
10150
10151 /* If the result type is BLKmode, store the data into a temporary
10152 of the appropriate type, but with the mode corresponding to the
10153 mode for the data we have (op0's mode). It's tempting to make
10154 this a constant type, since we know it's only being stored once,
10155 but that can cause problems if we are taking the address of this
10156 COMPONENT_REF because the MEM of any reference via that address
10157 will have flags corresponding to the type, which will not
10158 necessarily be constant. */
10159 if (mode == BLKmode)
10160 {
10161 rtx new_rtx;
10162
10163 new_rtx = assign_stack_temp_for_type (ext_mode,
10164 GET_MODE_BITSIZE (ext_mode),
10165 type);
10166 emit_move_insn (new_rtx, op0);
10167 op0 = copy_rtx (new_rtx);
10168 PUT_MODE (op0, BLKmode);
10169 }
10170
10171 return op0;
10172 }
10173
10174 /* If the result is BLKmode, use that to access the object
10175 now as well. */
10176 if (mode == BLKmode)
10177 mode1 = BLKmode;
10178
10179 /* Get a reference to just this component. */
10180 if (modifier == EXPAND_CONST_ADDRESS
10181 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10182 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
10183 else
10184 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10185
10186 if (op0 == orig_op0)
10187 op0 = copy_rtx (op0);
10188
10189 /* If op0 is a temporary because of forcing to memory, pass only the
10190 type to set_mem_attributes so that the original expression is never
10191 marked as ADDRESSABLE through MEM_EXPR of the temporary. */
10192 if (mem_attrs_from_type)
10193 set_mem_attributes (op0, type, 0);
10194 else
10195 set_mem_attributes (op0, exp, 0);
10196
10197 if (REG_P (XEXP (op0, 0)))
10198 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10199
10200 MEM_VOLATILE_P (op0) |= volatilep;
10201 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
10202 || modifier == EXPAND_CONST_ADDRESS
10203 || modifier == EXPAND_INITIALIZER)
10204 return op0;
10205 else if (target == 0)
10206 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
10207
10208 convert_move (target, op0, unsignedp);
10209 return target;
10210 }
10211
10212 case OBJ_TYPE_REF:
10213 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
10214
10215 case CALL_EXPR:
10216 /* All valid uses of __builtin_va_arg_pack () are removed during
10217 inlining. */
10218 if (CALL_EXPR_VA_ARG_PACK (exp))
10219 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
10220 {
10221 tree fndecl = get_callee_fndecl (exp), attr;
10222
10223 if (fndecl
10224 && (attr = lookup_attribute ("error",
10225 DECL_ATTRIBUTES (fndecl))) != NULL)
10226 error ("%Kcall to %qs declared with attribute error: %s",
10227 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10228 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10229 if (fndecl
10230 && (attr = lookup_attribute ("warning",
10231 DECL_ATTRIBUTES (fndecl))) != NULL)
10232 warning_at (tree_nonartificial_location (exp),
10233 0, "%Kcall to %qs declared with attribute warning: %s",
10234 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10235 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10236
10237 /* Check for a built-in function. */
10238 if (fndecl && DECL_BUILT_IN (fndecl))
10239 {
10240 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
10241 return expand_builtin (exp, target, subtarget, tmode, ignore);
10242 }
10243 }
10244 return expand_call (exp, target, ignore);
10245
10246 case VIEW_CONVERT_EXPR:
10247 op0 = NULL_RTX;
10248
10249 /* If we are converting to BLKmode, try to avoid an intermediate
10250 temporary by fetching an inner memory reference. */
10251 if (mode == BLKmode
10252 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10253 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10254 && handled_component_p (treeop0))
10255 {
10256 enum machine_mode mode1;
10257 HOST_WIDE_INT bitsize, bitpos;
10258 tree offset;
10259 int unsignedp;
10260 int volatilep = 0;
10261 tree tem
10262 = get_inner_reference (treeop0, &bitsize, &bitpos,
10263 &offset, &mode1, &unsignedp, &volatilep,
10264 true);
10265 rtx orig_op0;
10266
10267 /* ??? We should work harder and deal with non-zero offsets. */
10268 if (!offset
10269 && (bitpos % BITS_PER_UNIT) == 0
10270 && bitsize >= 0
10271 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
10272 {
10273 /* See the normal_inner_ref case for the rationale. */
10274 orig_op0
10275 = expand_expr (tem,
10276 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10277 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10278 != INTEGER_CST)
10279 && modifier != EXPAND_STACK_PARM
10280 ? target : NULL_RTX),
10281 VOIDmode,
10282 (modifier == EXPAND_INITIALIZER
10283 || modifier == EXPAND_CONST_ADDRESS
10284 || modifier == EXPAND_STACK_PARM)
10285 ? modifier : EXPAND_NORMAL);
10286
10287 if (MEM_P (orig_op0))
10288 {
10289 op0 = orig_op0;
10290
10291 /* Get a reference to just this component. */
10292 if (modifier == EXPAND_CONST_ADDRESS
10293 || modifier == EXPAND_SUM
10294 || modifier == EXPAND_INITIALIZER)
10295 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
10296 else
10297 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10298
10299 if (op0 == orig_op0)
10300 op0 = copy_rtx (op0);
10301
10302 set_mem_attributes (op0, treeop0, 0);
10303 if (REG_P (XEXP (op0, 0)))
10304 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10305
10306 MEM_VOLATILE_P (op0) |= volatilep;
10307 }
10308 }
10309 }
10310
10311 if (!op0)
10312 op0 = expand_expr (treeop0,
10313 NULL_RTX, VOIDmode, modifier);
10314
10315 /* If the input and output modes are both the same, we are done. */
10316 if (mode == GET_MODE (op0))
10317 ;
10318 /* If neither mode is BLKmode, and both modes are the same size
10319 then we can use gen_lowpart. */
10320 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10321 && (GET_MODE_PRECISION (mode)
10322 == GET_MODE_PRECISION (GET_MODE (op0)))
10323 && !COMPLEX_MODE_P (GET_MODE (op0)))
10324 {
10325 if (GET_CODE (op0) == SUBREG)
10326 op0 = force_reg (GET_MODE (op0), op0);
10327 temp = gen_lowpart_common (mode, op0);
10328 if (temp)
10329 op0 = temp;
10330 else
10331 {
10332 if (!REG_P (op0) && !MEM_P (op0))
10333 op0 = force_reg (GET_MODE (op0), op0);
10334 op0 = gen_lowpart (mode, op0);
10335 }
10336 }
10337 /* If both types are integral, convert from one mode to the other. */
10338 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10339 op0 = convert_modes (mode, GET_MODE (op0), op0,
10340 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10341 /* As a last resort, spill op0 to memory, and reload it in a
10342 different mode. */
10343 else if (!MEM_P (op0))
10344 {
10345 /* If the operand is not a MEM, force it into memory. Since we
10346 are going to be changing the mode of the MEM, don't call
10347 force_const_mem for constants because we don't allow pool
10348 constants to change mode. */
10349 tree inner_type = TREE_TYPE (treeop0);
10350
10351 gcc_assert (!TREE_ADDRESSABLE (exp));
10352
10353 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10354 target
10355 = assign_stack_temp_for_type
10356 (TYPE_MODE (inner_type),
10357 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
10358
10359 emit_move_insn (target, op0);
10360 op0 = target;
10361 }
10362
10363 /* At this point, OP0 is in the correct mode. If the output type is
10364 such that the operand is known to be aligned, indicate that it is.
10365 Otherwise, we need only be concerned about alignment for non-BLKmode
10366 results. */
10367 if (MEM_P (op0))
10368 {
10369 enum insn_code icode;
10370
10371 if (TYPE_ALIGN_OK (type))
10372 {
10373 /* ??? Copying the MEM without substantially changing it might
10374 run afoul of the code handling volatile memory references in
10375 store_expr, which assumes that TARGET is returned unmodified
10376 if it has been used. */
10377 op0 = copy_rtx (op0);
10378 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10379 }
10380 else if (mode != BLKmode
10381 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)
10382 /* If the target does have special handling for unaligned
10383 loads of mode then use them. */
10384 && ((icode = optab_handler (movmisalign_optab, mode))
10385 != CODE_FOR_nothing))
10386 {
10387 rtx reg, insn;
10388
10389 op0 = adjust_address (op0, mode, 0);
10390 /* We've already validated the memory, and we're creating a
10391 new pseudo destination. The predicates really can't
10392 fail. */
10393 reg = gen_reg_rtx (mode);
10394
10395 /* Nor can the insn generator. */
10396 insn = GEN_FCN (icode) (reg, op0);
10397 emit_insn (insn);
10398 return reg;
10399 }
10400 else if (STRICT_ALIGNMENT
10401 && mode != BLKmode
10402 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10403 {
10404 tree inner_type = TREE_TYPE (treeop0);
10405 HOST_WIDE_INT temp_size
10406 = MAX (int_size_in_bytes (inner_type),
10407 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10408 rtx new_rtx
10409 = assign_stack_temp_for_type (mode, temp_size, type);
10410 rtx new_with_op0_mode
10411 = adjust_address (new_rtx, GET_MODE (op0), 0);
10412
10413 gcc_assert (!TREE_ADDRESSABLE (exp));
10414
10415 if (GET_MODE (op0) == BLKmode)
10416 emit_block_move (new_with_op0_mode, op0,
10417 GEN_INT (GET_MODE_SIZE (mode)),
10418 (modifier == EXPAND_STACK_PARM
10419 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10420 else
10421 emit_move_insn (new_with_op0_mode, op0);
10422
10423 op0 = new_rtx;
10424 }
10425
10426 op0 = adjust_address (op0, mode, 0);
10427 }
10428
10429 return op0;
10430
10431 case MODIFY_EXPR:
10432 {
10433 tree lhs = treeop0;
10434 tree rhs = treeop1;
10435 gcc_assert (ignore);
10436
10437 /* Check for |= or &= of a bitfield of size one into another bitfield
10438 of size 1. In this case, (unless we need the result of the
10439 assignment) we can do this more efficiently with a
10440 test followed by an assignment, if necessary.
10441
10442 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10443 things change so we do, this code should be enhanced to
10444 support it. */
10445 if (TREE_CODE (lhs) == COMPONENT_REF
10446 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10447 || TREE_CODE (rhs) == BIT_AND_EXPR)
10448 && TREE_OPERAND (rhs, 0) == lhs
10449 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10450 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10451 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10452 {
10453 rtx label = gen_label_rtx ();
10454 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10455 do_jump (TREE_OPERAND (rhs, 1),
10456 value ? label : 0,
10457 value ? 0 : label, -1);
10458 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10459 false);
10460 do_pending_stack_adjust ();
10461 emit_label (label);
10462 return const0_rtx;
10463 }
10464
10465 expand_assignment (lhs, rhs, false);
10466 return const0_rtx;
10467 }
10468
10469 case ADDR_EXPR:
10470 return expand_expr_addr_expr (exp, target, tmode, modifier);
10471
10472 case REALPART_EXPR:
10473 op0 = expand_normal (treeop0);
10474 return read_complex_part (op0, false);
10475
10476 case IMAGPART_EXPR:
10477 op0 = expand_normal (treeop0);
10478 return read_complex_part (op0, true);
10479
10480 case RETURN_EXPR:
10481 case LABEL_EXPR:
10482 case GOTO_EXPR:
10483 case SWITCH_EXPR:
10484 case ASM_EXPR:
10485 /* Expanded in cfgexpand.c. */
10486 gcc_unreachable ();
10487
10488 case TRY_CATCH_EXPR:
10489 case CATCH_EXPR:
10490 case EH_FILTER_EXPR:
10491 case TRY_FINALLY_EXPR:
10492 /* Lowered by tree-eh.c. */
10493 gcc_unreachable ();
10494
10495 case WITH_CLEANUP_EXPR:
10496 case CLEANUP_POINT_EXPR:
10497 case TARGET_EXPR:
10498 case CASE_LABEL_EXPR:
10499 case VA_ARG_EXPR:
10500 case BIND_EXPR:
10501 case INIT_EXPR:
10502 case CONJ_EXPR:
10503 case COMPOUND_EXPR:
10504 case PREINCREMENT_EXPR:
10505 case PREDECREMENT_EXPR:
10506 case POSTINCREMENT_EXPR:
10507 case POSTDECREMENT_EXPR:
10508 case LOOP_EXPR:
10509 case EXIT_EXPR:
10510 case COMPOUND_LITERAL_EXPR:
10511 /* Lowered by gimplify.c. */
10512 gcc_unreachable ();
10513
10514 case FDESC_EXPR:
10515 /* Function descriptors are not valid except for as
10516 initialization constants, and should not be expanded. */
10517 gcc_unreachable ();
10518
10519 case WITH_SIZE_EXPR:
10520 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10521 have pulled out the size to use in whatever context it needed. */
10522 return expand_expr_real (treeop0, original_target, tmode,
10523 modifier, alt_rtl);
10524
10525 default:
10526 return expand_expr_real_2 (&ops, target, tmode, modifier);
10527 }
10528 }
10529 \f
10530 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10531 signedness of TYPE), possibly returning the result in TARGET. */
10532 static rtx
10533 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10534 {
10535 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10536 if (target && GET_MODE (target) != GET_MODE (exp))
10537 target = 0;
10538 /* For constant values, reduce using build_int_cst_type. */
10539 if (CONST_INT_P (exp))
10540 {
10541 HOST_WIDE_INT value = INTVAL (exp);
10542 tree t = build_int_cst_type (type, value);
10543 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10544 }
10545 else if (TYPE_UNSIGNED (type))
10546 {
10547 rtx mask = immed_double_int_const (double_int::mask (prec),
10548 GET_MODE (exp));
10549 return expand_and (GET_MODE (exp), exp, mask, target);
10550 }
10551 else
10552 {
10553 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10554 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10555 exp, count, target, 0);
10556 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10557 exp, count, target, 0);
10558 }
10559 }
10560 \f
10561 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10562 when applied to the address of EXP produces an address known to be
10563 aligned more than BIGGEST_ALIGNMENT. */
10564
10565 static int
10566 is_aligning_offset (const_tree offset, const_tree exp)
10567 {
10568 /* Strip off any conversions. */
10569 while (CONVERT_EXPR_P (offset))
10570 offset = TREE_OPERAND (offset, 0);
10571
10572 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10573 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10574 if (TREE_CODE (offset) != BIT_AND_EXPR
10575 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10576 || compare_tree_int (TREE_OPERAND (offset, 1),
10577 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10578 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10579 return 0;
10580
10581 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10582 It must be NEGATE_EXPR. Then strip any more conversions. */
10583 offset = TREE_OPERAND (offset, 0);
10584 while (CONVERT_EXPR_P (offset))
10585 offset = TREE_OPERAND (offset, 0);
10586
10587 if (TREE_CODE (offset) != NEGATE_EXPR)
10588 return 0;
10589
10590 offset = TREE_OPERAND (offset, 0);
10591 while (CONVERT_EXPR_P (offset))
10592 offset = TREE_OPERAND (offset, 0);
10593
10594 /* This must now be the address of EXP. */
10595 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10596 }
10597 \f
10598 /* Return the tree node if an ARG corresponds to a string constant or zero
10599 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10600 in bytes within the string that ARG is accessing. The type of the
10601 offset will be `sizetype'. */
10602
10603 tree
10604 string_constant (tree arg, tree *ptr_offset)
10605 {
10606 tree array, offset, lower_bound;
10607 STRIP_NOPS (arg);
10608
10609 if (TREE_CODE (arg) == ADDR_EXPR)
10610 {
10611 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10612 {
10613 *ptr_offset = size_zero_node;
10614 return TREE_OPERAND (arg, 0);
10615 }
10616 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10617 {
10618 array = TREE_OPERAND (arg, 0);
10619 offset = size_zero_node;
10620 }
10621 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10622 {
10623 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10624 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10625 if (TREE_CODE (array) != STRING_CST
10626 && TREE_CODE (array) != VAR_DECL)
10627 return 0;
10628
10629 /* Check if the array has a nonzero lower bound. */
10630 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10631 if (!integer_zerop (lower_bound))
10632 {
10633 /* If the offset and base aren't both constants, return 0. */
10634 if (TREE_CODE (lower_bound) != INTEGER_CST)
10635 return 0;
10636 if (TREE_CODE (offset) != INTEGER_CST)
10637 return 0;
10638 /* Adjust offset by the lower bound. */
10639 offset = size_diffop (fold_convert (sizetype, offset),
10640 fold_convert (sizetype, lower_bound));
10641 }
10642 }
10643 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10644 {
10645 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10646 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10647 if (TREE_CODE (array) != ADDR_EXPR)
10648 return 0;
10649 array = TREE_OPERAND (array, 0);
10650 if (TREE_CODE (array) != STRING_CST
10651 && TREE_CODE (array) != VAR_DECL)
10652 return 0;
10653 }
10654 else
10655 return 0;
10656 }
10657 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10658 {
10659 tree arg0 = TREE_OPERAND (arg, 0);
10660 tree arg1 = TREE_OPERAND (arg, 1);
10661
10662 STRIP_NOPS (arg0);
10663 STRIP_NOPS (arg1);
10664
10665 if (TREE_CODE (arg0) == ADDR_EXPR
10666 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10667 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10668 {
10669 array = TREE_OPERAND (arg0, 0);
10670 offset = arg1;
10671 }
10672 else if (TREE_CODE (arg1) == ADDR_EXPR
10673 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10674 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10675 {
10676 array = TREE_OPERAND (arg1, 0);
10677 offset = arg0;
10678 }
10679 else
10680 return 0;
10681 }
10682 else
10683 return 0;
10684
10685 if (TREE_CODE (array) == STRING_CST)
10686 {
10687 *ptr_offset = fold_convert (sizetype, offset);
10688 return array;
10689 }
10690 else if (TREE_CODE (array) == VAR_DECL
10691 || TREE_CODE (array) == CONST_DECL)
10692 {
10693 int length;
10694
10695 /* Variables initialized to string literals can be handled too. */
10696 if (!const_value_known_p (array)
10697 || !DECL_INITIAL (array)
10698 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10699 return 0;
10700
10701 /* Avoid const char foo[4] = "abcde"; */
10702 if (DECL_SIZE_UNIT (array) == NULL_TREE
10703 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10704 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10705 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10706 return 0;
10707
10708 /* If variable is bigger than the string literal, OFFSET must be constant
10709 and inside of the bounds of the string literal. */
10710 offset = fold_convert (sizetype, offset);
10711 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10712 && (! host_integerp (offset, 1)
10713 || compare_tree_int (offset, length) >= 0))
10714 return 0;
10715
10716 *ptr_offset = offset;
10717 return DECL_INITIAL (array);
10718 }
10719
10720 return 0;
10721 }
10722 \f
10723 /* Generate code to calculate OPS, and exploded expression
10724 using a store-flag instruction and return an rtx for the result.
10725 OPS reflects a comparison.
10726
10727 If TARGET is nonzero, store the result there if convenient.
10728
10729 Return zero if there is no suitable set-flag instruction
10730 available on this machine.
10731
10732 Once expand_expr has been called on the arguments of the comparison,
10733 we are committed to doing the store flag, since it is not safe to
10734 re-evaluate the expression. We emit the store-flag insn by calling
10735 emit_store_flag, but only expand the arguments if we have a reason
10736 to believe that emit_store_flag will be successful. If we think that
10737 it will, but it isn't, we have to simulate the store-flag with a
10738 set/jump/set sequence. */
10739
10740 static rtx
10741 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10742 {
10743 enum rtx_code code;
10744 tree arg0, arg1, type;
10745 tree tem;
10746 enum machine_mode operand_mode;
10747 int unsignedp;
10748 rtx op0, op1;
10749 rtx subtarget = target;
10750 location_t loc = ops->location;
10751
10752 arg0 = ops->op0;
10753 arg1 = ops->op1;
10754
10755 /* Don't crash if the comparison was erroneous. */
10756 if (arg0 == error_mark_node || arg1 == error_mark_node)
10757 return const0_rtx;
10758
10759 type = TREE_TYPE (arg0);
10760 operand_mode = TYPE_MODE (type);
10761 unsignedp = TYPE_UNSIGNED (type);
10762
10763 /* We won't bother with BLKmode store-flag operations because it would mean
10764 passing a lot of information to emit_store_flag. */
10765 if (operand_mode == BLKmode)
10766 return 0;
10767
10768 /* We won't bother with store-flag operations involving function pointers
10769 when function pointers must be canonicalized before comparisons. */
10770 #ifdef HAVE_canonicalize_funcptr_for_compare
10771 if (HAVE_canonicalize_funcptr_for_compare
10772 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10773 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10774 == FUNCTION_TYPE))
10775 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10776 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10777 == FUNCTION_TYPE))))
10778 return 0;
10779 #endif
10780
10781 STRIP_NOPS (arg0);
10782 STRIP_NOPS (arg1);
10783
10784 /* For vector typed comparisons emit code to generate the desired
10785 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10786 expander for this. */
10787 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10788 {
10789 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10790 tree if_true = constant_boolean_node (true, ops->type);
10791 tree if_false = constant_boolean_node (false, ops->type);
10792 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10793 }
10794
10795 /* Get the rtx comparison code to use. We know that EXP is a comparison
10796 operation of some type. Some comparisons against 1 and -1 can be
10797 converted to comparisons with zero. Do so here so that the tests
10798 below will be aware that we have a comparison with zero. These
10799 tests will not catch constants in the first operand, but constants
10800 are rarely passed as the first operand. */
10801
10802 switch (ops->code)
10803 {
10804 case EQ_EXPR:
10805 code = EQ;
10806 break;
10807 case NE_EXPR:
10808 code = NE;
10809 break;
10810 case LT_EXPR:
10811 if (integer_onep (arg1))
10812 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10813 else
10814 code = unsignedp ? LTU : LT;
10815 break;
10816 case LE_EXPR:
10817 if (! unsignedp && integer_all_onesp (arg1))
10818 arg1 = integer_zero_node, code = LT;
10819 else
10820 code = unsignedp ? LEU : LE;
10821 break;
10822 case GT_EXPR:
10823 if (! unsignedp && integer_all_onesp (arg1))
10824 arg1 = integer_zero_node, code = GE;
10825 else
10826 code = unsignedp ? GTU : GT;
10827 break;
10828 case GE_EXPR:
10829 if (integer_onep (arg1))
10830 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10831 else
10832 code = unsignedp ? GEU : GE;
10833 break;
10834
10835 case UNORDERED_EXPR:
10836 code = UNORDERED;
10837 break;
10838 case ORDERED_EXPR:
10839 code = ORDERED;
10840 break;
10841 case UNLT_EXPR:
10842 code = UNLT;
10843 break;
10844 case UNLE_EXPR:
10845 code = UNLE;
10846 break;
10847 case UNGT_EXPR:
10848 code = UNGT;
10849 break;
10850 case UNGE_EXPR:
10851 code = UNGE;
10852 break;
10853 case UNEQ_EXPR:
10854 code = UNEQ;
10855 break;
10856 case LTGT_EXPR:
10857 code = LTGT;
10858 break;
10859
10860 default:
10861 gcc_unreachable ();
10862 }
10863
10864 /* Put a constant second. */
10865 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10866 || TREE_CODE (arg0) == FIXED_CST)
10867 {
10868 tem = arg0; arg0 = arg1; arg1 = tem;
10869 code = swap_condition (code);
10870 }
10871
10872 /* If this is an equality or inequality test of a single bit, we can
10873 do this by shifting the bit being tested to the low-order bit and
10874 masking the result with the constant 1. If the condition was EQ,
10875 we xor it with 1. This does not require an scc insn and is faster
10876 than an scc insn even if we have it.
10877
10878 The code to make this transformation was moved into fold_single_bit_test,
10879 so we just call into the folder and expand its result. */
10880
10881 if ((code == NE || code == EQ)
10882 && integer_zerop (arg1)
10883 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10884 {
10885 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
10886 if (srcstmt
10887 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
10888 {
10889 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
10890 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10891 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
10892 gimple_assign_rhs1 (srcstmt),
10893 gimple_assign_rhs2 (srcstmt));
10894 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
10895 if (temp)
10896 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
10897 }
10898 }
10899
10900 if (! get_subtarget (target)
10901 || GET_MODE (subtarget) != operand_mode)
10902 subtarget = 0;
10903
10904 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10905
10906 if (target == 0)
10907 target = gen_reg_rtx (mode);
10908
10909 /* Try a cstore if possible. */
10910 return emit_store_flag_force (target, code, op0, op1,
10911 operand_mode, unsignedp,
10912 (TYPE_PRECISION (ops->type) == 1
10913 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10914 }
10915 \f
10916
10917 /* Stubs in case we haven't got a casesi insn. */
10918 #ifndef HAVE_casesi
10919 # define HAVE_casesi 0
10920 # define gen_casesi(a, b, c, d, e) (0)
10921 # define CODE_FOR_casesi CODE_FOR_nothing
10922 #endif
10923
10924 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10925 0 otherwise (i.e. if there is no casesi instruction).
10926
10927 DEFAULT_PROBABILITY is the probability of jumping to the default
10928 label. */
10929 int
10930 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10931 rtx table_label, rtx default_label, rtx fallback_label,
10932 int default_probability)
10933 {
10934 struct expand_operand ops[5];
10935 enum machine_mode index_mode = SImode;
10936 rtx op1, op2, index;
10937
10938 if (! HAVE_casesi)
10939 return 0;
10940
10941 /* Convert the index to SImode. */
10942 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10943 {
10944 enum machine_mode omode = TYPE_MODE (index_type);
10945 rtx rangertx = expand_normal (range);
10946
10947 /* We must handle the endpoints in the original mode. */
10948 index_expr = build2 (MINUS_EXPR, index_type,
10949 index_expr, minval);
10950 minval = integer_zero_node;
10951 index = expand_normal (index_expr);
10952 if (default_label)
10953 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10954 omode, 1, default_label,
10955 default_probability);
10956 /* Now we can safely truncate. */
10957 index = convert_to_mode (index_mode, index, 0);
10958 }
10959 else
10960 {
10961 if (TYPE_MODE (index_type) != index_mode)
10962 {
10963 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
10964 index_expr = fold_convert (index_type, index_expr);
10965 }
10966
10967 index = expand_normal (index_expr);
10968 }
10969
10970 do_pending_stack_adjust ();
10971
10972 op1 = expand_normal (minval);
10973 op2 = expand_normal (range);
10974
10975 create_input_operand (&ops[0], index, index_mode);
10976 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10977 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10978 create_fixed_operand (&ops[3], table_label);
10979 create_fixed_operand (&ops[4], (default_label
10980 ? default_label
10981 : fallback_label));
10982 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10983 return 1;
10984 }
10985
10986 /* Attempt to generate a tablejump instruction; same concept. */
10987 #ifndef HAVE_tablejump
10988 #define HAVE_tablejump 0
10989 #define gen_tablejump(x, y) (0)
10990 #endif
10991
10992 /* Subroutine of the next function.
10993
10994 INDEX is the value being switched on, with the lowest value
10995 in the table already subtracted.
10996 MODE is its expected mode (needed if INDEX is constant).
10997 RANGE is the length of the jump table.
10998 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10999
11000 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11001 index value is out of range.
11002 DEFAULT_PROBABILITY is the probability of jumping to
11003 the default label. */
11004
11005 static void
11006 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
11007 rtx default_label, int default_probability)
11008 {
11009 rtx temp, vector;
11010
11011 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
11012 cfun->cfg->max_jumptable_ents = INTVAL (range);
11013
11014 /* Do an unsigned comparison (in the proper mode) between the index
11015 expression and the value which represents the length of the range.
11016 Since we just finished subtracting the lower bound of the range
11017 from the index expression, this comparison allows us to simultaneously
11018 check that the original index expression value is both greater than
11019 or equal to the minimum value of the range and less than or equal to
11020 the maximum value of the range. */
11021
11022 if (default_label)
11023 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
11024 default_label, default_probability);
11025
11026
11027 /* If index is in range, it must fit in Pmode.
11028 Convert to Pmode so we can index with it. */
11029 if (mode != Pmode)
11030 index = convert_to_mode (Pmode, index, 1);
11031
11032 /* Don't let a MEM slip through, because then INDEX that comes
11033 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11034 and break_out_memory_refs will go to work on it and mess it up. */
11035 #ifdef PIC_CASE_VECTOR_ADDRESS
11036 if (flag_pic && !REG_P (index))
11037 index = copy_to_mode_reg (Pmode, index);
11038 #endif
11039
11040 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11041 GET_MODE_SIZE, because this indicates how large insns are. The other
11042 uses should all be Pmode, because they are addresses. This code
11043 could fail if addresses and insns are not the same size. */
11044 index = gen_rtx_PLUS (Pmode,
11045 gen_rtx_MULT (Pmode, index,
11046 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
11047 gen_rtx_LABEL_REF (Pmode, table_label));
11048 #ifdef PIC_CASE_VECTOR_ADDRESS
11049 if (flag_pic)
11050 index = PIC_CASE_VECTOR_ADDRESS (index);
11051 else
11052 #endif
11053 index = memory_address (CASE_VECTOR_MODE, index);
11054 temp = gen_reg_rtx (CASE_VECTOR_MODE);
11055 vector = gen_const_mem (CASE_VECTOR_MODE, index);
11056 convert_move (temp, vector, 0);
11057
11058 emit_jump_insn (gen_tablejump (temp, table_label));
11059
11060 /* If we are generating PIC code or if the table is PC-relative, the
11061 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11062 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
11063 emit_barrier ();
11064 }
11065
11066 int
11067 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
11068 rtx table_label, rtx default_label, int default_probability)
11069 {
11070 rtx index;
11071
11072 if (! HAVE_tablejump)
11073 return 0;
11074
11075 index_expr = fold_build2 (MINUS_EXPR, index_type,
11076 fold_convert (index_type, index_expr),
11077 fold_convert (index_type, minval));
11078 index = expand_normal (index_expr);
11079 do_pending_stack_adjust ();
11080
11081 do_tablejump (index, TYPE_MODE (index_type),
11082 convert_modes (TYPE_MODE (index_type),
11083 TYPE_MODE (TREE_TYPE (range)),
11084 expand_normal (range),
11085 TYPE_UNSIGNED (TREE_TYPE (range))),
11086 table_label, default_label, default_probability);
11087 return 1;
11088 }
11089
11090 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11091 static rtx
11092 const_vector_from_tree (tree exp)
11093 {
11094 rtvec v;
11095 unsigned i;
11096 int units;
11097 tree elt;
11098 enum machine_mode inner, mode;
11099
11100 mode = TYPE_MODE (TREE_TYPE (exp));
11101
11102 if (initializer_zerop (exp))
11103 return CONST0_RTX (mode);
11104
11105 units = GET_MODE_NUNITS (mode);
11106 inner = GET_MODE_INNER (mode);
11107
11108 v = rtvec_alloc (units);
11109
11110 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
11111 {
11112 elt = VECTOR_CST_ELT (exp, i);
11113
11114 if (TREE_CODE (elt) == REAL_CST)
11115 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
11116 inner);
11117 else if (TREE_CODE (elt) == FIXED_CST)
11118 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
11119 inner);
11120 else
11121 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
11122 inner);
11123 }
11124
11125 return gen_rtx_CONST_VECTOR (mode, v);
11126 }
11127
11128 /* Build a decl for a personality function given a language prefix. */
11129
11130 tree
11131 build_personality_function (const char *lang)
11132 {
11133 const char *unwind_and_version;
11134 tree decl, type;
11135 char *name;
11136
11137 switch (targetm_common.except_unwind_info (&global_options))
11138 {
11139 case UI_NONE:
11140 return NULL;
11141 case UI_SJLJ:
11142 unwind_and_version = "_sj0";
11143 break;
11144 case UI_DWARF2:
11145 case UI_TARGET:
11146 unwind_and_version = "_v0";
11147 break;
11148 case UI_SEH:
11149 unwind_and_version = "_seh0";
11150 break;
11151 default:
11152 gcc_unreachable ();
11153 }
11154
11155 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
11156
11157 type = build_function_type_list (integer_type_node, integer_type_node,
11158 long_long_unsigned_type_node,
11159 ptr_type_node, ptr_type_node, NULL_TREE);
11160 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
11161 get_identifier (name), type);
11162 DECL_ARTIFICIAL (decl) = 1;
11163 DECL_EXTERNAL (decl) = 1;
11164 TREE_PUBLIC (decl) = 1;
11165
11166 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11167 are the flags assigned by targetm.encode_section_info. */
11168 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
11169
11170 return decl;
11171 }
11172
11173 /* Extracts the personality function of DECL and returns the corresponding
11174 libfunc. */
11175
11176 rtx
11177 get_personality_function (tree decl)
11178 {
11179 tree personality = DECL_FUNCTION_PERSONALITY (decl);
11180 enum eh_personality_kind pk;
11181
11182 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
11183 if (pk == eh_personality_none)
11184 return NULL;
11185
11186 if (!personality
11187 && pk == eh_personality_any)
11188 personality = lang_hooks.eh_personality ();
11189
11190 if (pk == eh_personality_lang)
11191 gcc_assert (personality != NULL_TREE);
11192
11193 return XEXP (DECL_RTL (personality), 0);
11194 }
11195
11196 #include "gt-expr.h"