(Synchronize with addition made to binutils sources):
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "real.h"
28 #include "rtl.h"
29 #include "tree.h"
30 #include "flags.h"
31 #include "regs.h"
32 #include "hard-reg-set.h"
33 #include "except.h"
34 #include "function.h"
35 #include "insn-config.h"
36 #include "insn-attr.h"
37 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
38 #include "expr.h"
39 #include "optabs.h"
40 #include "libfuncs.h"
41 #include "recog.h"
42 #include "reload.h"
43 #include "output.h"
44 #include "typeclass.h"
45 #include "toplev.h"
46 #include "ggc.h"
47 #include "langhooks.h"
48 #include "intl.h"
49 #include "tm_p.h"
50 #include "tree-iterator.h"
51 #include "tree-pass.h"
52 #include "tree-flow.h"
53 #include "target.h"
54 #include "timevar.h"
55 #include "df.h"
56 #include "diagnostic.h"
57 #include "ssaexpand.h"
58
59 /* Decide whether a function's arguments should be processed
60 from first to last or from last to first.
61
62 They should if the stack and args grow in opposite directions, but
63 only if we have push insns. */
64
65 #ifdef PUSH_ROUNDING
66
67 #ifndef PUSH_ARGS_REVERSED
68 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
69 #define PUSH_ARGS_REVERSED /* If it's last to first. */
70 #endif
71 #endif
72
73 #endif
74
75 #ifndef STACK_PUSH_CODE
76 #ifdef STACK_GROWS_DOWNWARD
77 #define STACK_PUSH_CODE PRE_DEC
78 #else
79 #define STACK_PUSH_CODE PRE_INC
80 #endif
81 #endif
82
83
84 /* If this is nonzero, we do not bother generating VOLATILE
85 around volatile memory references, and we are willing to
86 output indirect addresses. If cse is to follow, we reject
87 indirect addresses so a useful potential cse is generated;
88 if it is used only once, instruction combination will produce
89 the same indirect address eventually. */
90 int cse_not_expected;
91
92 /* This structure is used by move_by_pieces to describe the move to
93 be performed. */
94 struct move_by_pieces
95 {
96 rtx to;
97 rtx to_addr;
98 int autinc_to;
99 int explicit_inc_to;
100 rtx from;
101 rtx from_addr;
102 int autinc_from;
103 int explicit_inc_from;
104 unsigned HOST_WIDE_INT len;
105 HOST_WIDE_INT offset;
106 int reverse;
107 };
108
109 /* This structure is used by store_by_pieces to describe the clear to
110 be performed. */
111
112 struct store_by_pieces
113 {
114 rtx to;
115 rtx to_addr;
116 int autinc_to;
117 int explicit_inc_to;
118 unsigned HOST_WIDE_INT len;
119 HOST_WIDE_INT offset;
120 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
121 void *constfundata;
122 int reverse;
123 };
124
125 static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT,
126 unsigned int,
127 unsigned int);
128 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
129 struct move_by_pieces *);
130 static bool block_move_libcall_safe_for_call_parm (void);
131 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
132 static tree emit_block_move_libcall_fn (int);
133 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
134 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
135 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
136 static void store_by_pieces_1 (struct store_by_pieces *, unsigned int);
137 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
138 struct store_by_pieces *);
139 static tree clear_storage_libcall_fn (int);
140 static rtx compress_float_constant (rtx, rtx);
141 static rtx get_subtarget (rtx);
142 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
143 HOST_WIDE_INT, enum machine_mode,
144 tree, tree, int, alias_set_type);
145 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
146 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT, enum machine_mode,
147 tree, tree, alias_set_type, bool);
148
149 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
150
151 static int is_aligning_offset (const_tree, const_tree);
152 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
153 enum expand_modifier);
154 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
155 static rtx do_store_flag (tree, rtx, enum machine_mode);
156 #ifdef PUSH_ROUNDING
157 static void emit_single_push_insn (enum machine_mode, rtx, tree);
158 #endif
159 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
160 static rtx const_vector_from_tree (tree);
161 static void write_complex_part (rtx, rtx, bool);
162
163 /* Record for each mode whether we can move a register directly to or
164 from an object of that mode in memory. If we can't, we won't try
165 to use that mode directly when accessing a field of that mode. */
166
167 static char direct_load[NUM_MACHINE_MODES];
168 static char direct_store[NUM_MACHINE_MODES];
169
170 /* Record for each mode whether we can float-extend from memory. */
171
172 static bool float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
173
174 /* This macro is used to determine whether move_by_pieces should be called
175 to perform a structure copy. */
176 #ifndef MOVE_BY_PIECES_P
177 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
178 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
179 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
180 #endif
181
182 /* This macro is used to determine whether clear_by_pieces should be
183 called to clear storage. */
184 #ifndef CLEAR_BY_PIECES_P
185 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
186 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
187 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
188 #endif
189
190 /* This macro is used to determine whether store_by_pieces should be
191 called to "memset" storage with byte values other than zero. */
192 #ifndef SET_BY_PIECES_P
193 #define SET_BY_PIECES_P(SIZE, ALIGN) \
194 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
195 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
196 #endif
197
198 /* This macro is used to determine whether store_by_pieces should be
199 called to "memcpy" storage when the source is a constant string. */
200 #ifndef STORE_BY_PIECES_P
201 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
202 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
203 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
204 #endif
205
206 /* This array records the insn_code of insns to perform block moves. */
207 enum insn_code movmem_optab[NUM_MACHINE_MODES];
208
209 /* This array records the insn_code of insns to perform block sets. */
210 enum insn_code setmem_optab[NUM_MACHINE_MODES];
211
212 /* These arrays record the insn_code of three different kinds of insns
213 to perform block compares. */
214 enum insn_code cmpstr_optab[NUM_MACHINE_MODES];
215 enum insn_code cmpstrn_optab[NUM_MACHINE_MODES];
216 enum insn_code cmpmem_optab[NUM_MACHINE_MODES];
217
218 /* Synchronization primitives. */
219 enum insn_code sync_add_optab[NUM_MACHINE_MODES];
220 enum insn_code sync_sub_optab[NUM_MACHINE_MODES];
221 enum insn_code sync_ior_optab[NUM_MACHINE_MODES];
222 enum insn_code sync_and_optab[NUM_MACHINE_MODES];
223 enum insn_code sync_xor_optab[NUM_MACHINE_MODES];
224 enum insn_code sync_nand_optab[NUM_MACHINE_MODES];
225 enum insn_code sync_old_add_optab[NUM_MACHINE_MODES];
226 enum insn_code sync_old_sub_optab[NUM_MACHINE_MODES];
227 enum insn_code sync_old_ior_optab[NUM_MACHINE_MODES];
228 enum insn_code sync_old_and_optab[NUM_MACHINE_MODES];
229 enum insn_code sync_old_xor_optab[NUM_MACHINE_MODES];
230 enum insn_code sync_old_nand_optab[NUM_MACHINE_MODES];
231 enum insn_code sync_new_add_optab[NUM_MACHINE_MODES];
232 enum insn_code sync_new_sub_optab[NUM_MACHINE_MODES];
233 enum insn_code sync_new_ior_optab[NUM_MACHINE_MODES];
234 enum insn_code sync_new_and_optab[NUM_MACHINE_MODES];
235 enum insn_code sync_new_xor_optab[NUM_MACHINE_MODES];
236 enum insn_code sync_new_nand_optab[NUM_MACHINE_MODES];
237 enum insn_code sync_compare_and_swap[NUM_MACHINE_MODES];
238 enum insn_code sync_lock_test_and_set[NUM_MACHINE_MODES];
239 enum insn_code sync_lock_release[NUM_MACHINE_MODES];
240
241 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
242
243 #ifndef SLOW_UNALIGNED_ACCESS
244 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
245 #endif
246 \f
247 /* This is run to set up which modes can be used
248 directly in memory and to initialize the block move optab. It is run
249 at the beginning of compilation and when the target is reinitialized. */
250
251 void
252 init_expr_target (void)
253 {
254 rtx insn, pat;
255 enum machine_mode mode;
256 int num_clobbers;
257 rtx mem, mem1;
258 rtx reg;
259
260 /* Try indexing by frame ptr and try by stack ptr.
261 It is known that on the Convex the stack ptr isn't a valid index.
262 With luck, one or the other is valid on any machine. */
263 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
264 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
265
266 /* A scratch register we can modify in-place below to avoid
267 useless RTL allocations. */
268 reg = gen_rtx_REG (VOIDmode, -1);
269
270 insn = rtx_alloc (INSN);
271 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
272 PATTERN (insn) = pat;
273
274 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
275 mode = (enum machine_mode) ((int) mode + 1))
276 {
277 int regno;
278
279 direct_load[(int) mode] = direct_store[(int) mode] = 0;
280 PUT_MODE (mem, mode);
281 PUT_MODE (mem1, mode);
282 PUT_MODE (reg, mode);
283
284 /* See if there is some register that can be used in this mode and
285 directly loaded or stored from memory. */
286
287 if (mode != VOIDmode && mode != BLKmode)
288 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
289 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
290 regno++)
291 {
292 if (! HARD_REGNO_MODE_OK (regno, mode))
293 continue;
294
295 SET_REGNO (reg, regno);
296
297 SET_SRC (pat) = mem;
298 SET_DEST (pat) = reg;
299 if (recog (pat, insn, &num_clobbers) >= 0)
300 direct_load[(int) mode] = 1;
301
302 SET_SRC (pat) = mem1;
303 SET_DEST (pat) = reg;
304 if (recog (pat, insn, &num_clobbers) >= 0)
305 direct_load[(int) mode] = 1;
306
307 SET_SRC (pat) = reg;
308 SET_DEST (pat) = mem;
309 if (recog (pat, insn, &num_clobbers) >= 0)
310 direct_store[(int) mode] = 1;
311
312 SET_SRC (pat) = reg;
313 SET_DEST (pat) = mem1;
314 if (recog (pat, insn, &num_clobbers) >= 0)
315 direct_store[(int) mode] = 1;
316 }
317 }
318
319 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
320
321 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
322 mode = GET_MODE_WIDER_MODE (mode))
323 {
324 enum machine_mode srcmode;
325 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
326 srcmode = GET_MODE_WIDER_MODE (srcmode))
327 {
328 enum insn_code ic;
329
330 ic = can_extend_p (mode, srcmode, 0);
331 if (ic == CODE_FOR_nothing)
332 continue;
333
334 PUT_MODE (mem, srcmode);
335
336 if ((*insn_data[ic].operand[1].predicate) (mem, srcmode))
337 float_extend_from_mem[mode][srcmode] = true;
338 }
339 }
340 }
341
342 /* This is run at the start of compiling a function. */
343
344 void
345 init_expr (void)
346 {
347 memset (&crtl->expr, 0, sizeof (crtl->expr));
348 }
349 \f
350 /* Copy data from FROM to TO, where the machine modes are not the same.
351 Both modes may be integer, or both may be floating, or both may be
352 fixed-point.
353 UNSIGNEDP should be nonzero if FROM is an unsigned type.
354 This causes zero-extension instead of sign-extension. */
355
356 void
357 convert_move (rtx to, rtx from, int unsignedp)
358 {
359 enum machine_mode to_mode = GET_MODE (to);
360 enum machine_mode from_mode = GET_MODE (from);
361 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
362 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
363 enum insn_code code;
364 rtx libcall;
365
366 /* rtx code for making an equivalent value. */
367 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
368 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
369
370
371 gcc_assert (to_real == from_real);
372 gcc_assert (to_mode != BLKmode);
373 gcc_assert (from_mode != BLKmode);
374
375 /* If the source and destination are already the same, then there's
376 nothing to do. */
377 if (to == from)
378 return;
379
380 /* If FROM is a SUBREG that indicates that we have already done at least
381 the required extension, strip it. We don't handle such SUBREGs as
382 TO here. */
383
384 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
385 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (from)))
386 >= GET_MODE_SIZE (to_mode))
387 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
388 from = gen_lowpart (to_mode, from), from_mode = to_mode;
389
390 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
391
392 if (to_mode == from_mode
393 || (from_mode == VOIDmode && CONSTANT_P (from)))
394 {
395 emit_move_insn (to, from);
396 return;
397 }
398
399 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
400 {
401 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
402
403 if (VECTOR_MODE_P (to_mode))
404 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
405 else
406 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
407
408 emit_move_insn (to, from);
409 return;
410 }
411
412 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
413 {
414 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
415 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
416 return;
417 }
418
419 if (to_real)
420 {
421 rtx value, insns;
422 convert_optab tab;
423
424 gcc_assert ((GET_MODE_PRECISION (from_mode)
425 != GET_MODE_PRECISION (to_mode))
426 || (DECIMAL_FLOAT_MODE_P (from_mode)
427 != DECIMAL_FLOAT_MODE_P (to_mode)));
428
429 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
430 /* Conversion between decimal float and binary float, same size. */
431 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
432 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
433 tab = sext_optab;
434 else
435 tab = trunc_optab;
436
437 /* Try converting directly if the insn is supported. */
438
439 code = convert_optab_handler (tab, to_mode, from_mode)->insn_code;
440 if (code != CODE_FOR_nothing)
441 {
442 emit_unop_insn (code, to, from,
443 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
444 return;
445 }
446
447 /* Otherwise use a libcall. */
448 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
449
450 /* Is this conversion implemented yet? */
451 gcc_assert (libcall);
452
453 start_sequence ();
454 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
455 1, from, from_mode);
456 insns = get_insns ();
457 end_sequence ();
458 emit_libcall_block (insns, to, value,
459 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
460 from)
461 : gen_rtx_FLOAT_EXTEND (to_mode, from));
462 return;
463 }
464
465 /* Handle pointer conversion. */ /* SPEE 900220. */
466 /* Targets are expected to provide conversion insns between PxImode and
467 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
468 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
469 {
470 enum machine_mode full_mode
471 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
472
473 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)->insn_code
474 != CODE_FOR_nothing);
475
476 if (full_mode != from_mode)
477 from = convert_to_mode (full_mode, from, unsignedp);
478 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode)->insn_code,
479 to, from, UNKNOWN);
480 return;
481 }
482 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
483 {
484 rtx new_from;
485 enum machine_mode full_mode
486 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
487
488 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)->insn_code
489 != CODE_FOR_nothing);
490
491 if (to_mode == full_mode)
492 {
493 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode)->insn_code,
494 to, from, UNKNOWN);
495 return;
496 }
497
498 new_from = gen_reg_rtx (full_mode);
499 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode)->insn_code,
500 new_from, from, UNKNOWN);
501
502 /* else proceed to integer conversions below. */
503 from_mode = full_mode;
504 from = new_from;
505 }
506
507 /* Make sure both are fixed-point modes or both are not. */
508 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
509 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
510 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
511 {
512 /* If we widen from_mode to to_mode and they are in the same class,
513 we won't saturate the result.
514 Otherwise, always saturate the result to play safe. */
515 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
516 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
517 expand_fixed_convert (to, from, 0, 0);
518 else
519 expand_fixed_convert (to, from, 0, 1);
520 return;
521 }
522
523 /* Now both modes are integers. */
524
525 /* Handle expanding beyond a word. */
526 if (GET_MODE_BITSIZE (from_mode) < GET_MODE_BITSIZE (to_mode)
527 && GET_MODE_BITSIZE (to_mode) > BITS_PER_WORD)
528 {
529 rtx insns;
530 rtx lowpart;
531 rtx fill_value;
532 rtx lowfrom;
533 int i;
534 enum machine_mode lowpart_mode;
535 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
536
537 /* Try converting directly if the insn is supported. */
538 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
539 != CODE_FOR_nothing)
540 {
541 /* If FROM is a SUBREG, put it into a register. Do this
542 so that we always generate the same set of insns for
543 better cse'ing; if an intermediate assignment occurred,
544 we won't be doing the operation directly on the SUBREG. */
545 if (optimize > 0 && GET_CODE (from) == SUBREG)
546 from = force_reg (from_mode, from);
547 emit_unop_insn (code, to, from, equiv_code);
548 return;
549 }
550 /* Next, try converting via full word. */
551 else if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD
552 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
553 != CODE_FOR_nothing))
554 {
555 rtx word_to = gen_reg_rtx (word_mode);
556 if (REG_P (to))
557 {
558 if (reg_overlap_mentioned_p (to, from))
559 from = force_reg (from_mode, from);
560 emit_clobber (to);
561 }
562 convert_move (word_to, from, unsignedp);
563 emit_unop_insn (code, to, word_to, equiv_code);
564 return;
565 }
566
567 /* No special multiword conversion insn; do it by hand. */
568 start_sequence ();
569
570 /* Since we will turn this into a no conflict block, we must ensure
571 that the source does not overlap the target. */
572
573 if (reg_overlap_mentioned_p (to, from))
574 from = force_reg (from_mode, from);
575
576 /* Get a copy of FROM widened to a word, if necessary. */
577 if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD)
578 lowpart_mode = word_mode;
579 else
580 lowpart_mode = from_mode;
581
582 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
583
584 lowpart = gen_lowpart (lowpart_mode, to);
585 emit_move_insn (lowpart, lowfrom);
586
587 /* Compute the value to put in each remaining word. */
588 if (unsignedp)
589 fill_value = const0_rtx;
590 else
591 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
592 LT, lowfrom, const0_rtx,
593 VOIDmode, 0, -1);
594
595 /* Fill the remaining words. */
596 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
597 {
598 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
599 rtx subword = operand_subword (to, index, 1, to_mode);
600
601 gcc_assert (subword);
602
603 if (fill_value != subword)
604 emit_move_insn (subword, fill_value);
605 }
606
607 insns = get_insns ();
608 end_sequence ();
609
610 emit_insn (insns);
611 return;
612 }
613
614 /* Truncating multi-word to a word or less. */
615 if (GET_MODE_BITSIZE (from_mode) > BITS_PER_WORD
616 && GET_MODE_BITSIZE (to_mode) <= BITS_PER_WORD)
617 {
618 if (!((MEM_P (from)
619 && ! MEM_VOLATILE_P (from)
620 && direct_load[(int) to_mode]
621 && ! mode_dependent_address_p (XEXP (from, 0)))
622 || REG_P (from)
623 || GET_CODE (from) == SUBREG))
624 from = force_reg (from_mode, from);
625 convert_move (to, gen_lowpart (word_mode, from), 0);
626 return;
627 }
628
629 /* Now follow all the conversions between integers
630 no more than a word long. */
631
632 /* For truncation, usually we can just refer to FROM in a narrower mode. */
633 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
634 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode),
635 GET_MODE_BITSIZE (from_mode)))
636 {
637 if (!((MEM_P (from)
638 && ! MEM_VOLATILE_P (from)
639 && direct_load[(int) to_mode]
640 && ! mode_dependent_address_p (XEXP (from, 0)))
641 || REG_P (from)
642 || GET_CODE (from) == SUBREG))
643 from = force_reg (from_mode, from);
644 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
645 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
646 from = copy_to_reg (from);
647 emit_move_insn (to, gen_lowpart (to_mode, from));
648 return;
649 }
650
651 /* Handle extension. */
652 if (GET_MODE_BITSIZE (to_mode) > GET_MODE_BITSIZE (from_mode))
653 {
654 /* Convert directly if that works. */
655 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
656 != CODE_FOR_nothing)
657 {
658 emit_unop_insn (code, to, from, equiv_code);
659 return;
660 }
661 else
662 {
663 enum machine_mode intermediate;
664 rtx tmp;
665 tree shift_amount;
666
667 /* Search for a mode to convert via. */
668 for (intermediate = from_mode; intermediate != VOIDmode;
669 intermediate = GET_MODE_WIDER_MODE (intermediate))
670 if (((can_extend_p (to_mode, intermediate, unsignedp)
671 != CODE_FOR_nothing)
672 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
673 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode),
674 GET_MODE_BITSIZE (intermediate))))
675 && (can_extend_p (intermediate, from_mode, unsignedp)
676 != CODE_FOR_nothing))
677 {
678 convert_move (to, convert_to_mode (intermediate, from,
679 unsignedp), unsignedp);
680 return;
681 }
682
683 /* No suitable intermediate mode.
684 Generate what we need with shifts. */
685 shift_amount = build_int_cst (NULL_TREE,
686 GET_MODE_BITSIZE (to_mode)
687 - GET_MODE_BITSIZE (from_mode));
688 from = gen_lowpart (to_mode, force_reg (from_mode, from));
689 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
690 to, unsignedp);
691 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
692 to, unsignedp);
693 if (tmp != to)
694 emit_move_insn (to, tmp);
695 return;
696 }
697 }
698
699 /* Support special truncate insns for certain modes. */
700 if (convert_optab_handler (trunc_optab, to_mode, from_mode)->insn_code != CODE_FOR_nothing)
701 {
702 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode)->insn_code,
703 to, from, UNKNOWN);
704 return;
705 }
706
707 /* Handle truncation of volatile memrefs, and so on;
708 the things that couldn't be truncated directly,
709 and for which there was no special instruction.
710
711 ??? Code above formerly short-circuited this, for most integer
712 mode pairs, with a force_reg in from_mode followed by a recursive
713 call to this routine. Appears always to have been wrong. */
714 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode))
715 {
716 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
717 emit_move_insn (to, temp);
718 return;
719 }
720
721 /* Mode combination is not recognized. */
722 gcc_unreachable ();
723 }
724
725 /* Return an rtx for a value that would result
726 from converting X to mode MODE.
727 Both X and MODE may be floating, or both integer.
728 UNSIGNEDP is nonzero if X is an unsigned value.
729 This can be done by referring to a part of X in place
730 or by copying to a new temporary with conversion. */
731
732 rtx
733 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
734 {
735 return convert_modes (mode, VOIDmode, x, unsignedp);
736 }
737
738 /* Return an rtx for a value that would result
739 from converting X from mode OLDMODE to mode MODE.
740 Both modes may be floating, or both integer.
741 UNSIGNEDP is nonzero if X is an unsigned value.
742
743 This can be done by referring to a part of X in place
744 or by copying to a new temporary with conversion.
745
746 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
747
748 rtx
749 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
750 {
751 rtx temp;
752
753 /* If FROM is a SUBREG that indicates that we have already done at least
754 the required extension, strip it. */
755
756 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
757 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
758 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
759 x = gen_lowpart (mode, x);
760
761 if (GET_MODE (x) != VOIDmode)
762 oldmode = GET_MODE (x);
763
764 if (mode == oldmode)
765 return x;
766
767 /* There is one case that we must handle specially: If we are converting
768 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
769 we are to interpret the constant as unsigned, gen_lowpart will do
770 the wrong if the constant appears negative. What we want to do is
771 make the high-order word of the constant zero, not all ones. */
772
773 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
774 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
775 && GET_CODE (x) == CONST_INT && INTVAL (x) < 0)
776 {
777 HOST_WIDE_INT val = INTVAL (x);
778
779 if (oldmode != VOIDmode
780 && HOST_BITS_PER_WIDE_INT > GET_MODE_BITSIZE (oldmode))
781 {
782 int width = GET_MODE_BITSIZE (oldmode);
783
784 /* We need to zero extend VAL. */
785 val &= ((HOST_WIDE_INT) 1 << width) - 1;
786 }
787
788 return immed_double_const (val, (HOST_WIDE_INT) 0, mode);
789 }
790
791 /* We can do this with a gen_lowpart if both desired and current modes
792 are integer, and this is either a constant integer, a register, or a
793 non-volatile MEM. Except for the constant case where MODE is no
794 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
795
796 if ((GET_CODE (x) == CONST_INT
797 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
798 || (GET_MODE_CLASS (mode) == MODE_INT
799 && GET_MODE_CLASS (oldmode) == MODE_INT
800 && (GET_CODE (x) == CONST_DOUBLE
801 || (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (oldmode)
802 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
803 && direct_load[(int) mode])
804 || (REG_P (x)
805 && (! HARD_REGISTER_P (x)
806 || HARD_REGNO_MODE_OK (REGNO (x), mode))
807 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
808 GET_MODE_BITSIZE (GET_MODE (x)))))))))
809 {
810 /* ?? If we don't know OLDMODE, we have to assume here that
811 X does not need sign- or zero-extension. This may not be
812 the case, but it's the best we can do. */
813 if (GET_CODE (x) == CONST_INT && oldmode != VOIDmode
814 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (oldmode))
815 {
816 HOST_WIDE_INT val = INTVAL (x);
817 int width = GET_MODE_BITSIZE (oldmode);
818
819 /* We must sign or zero-extend in this case. Start by
820 zero-extending, then sign extend if we need to. */
821 val &= ((HOST_WIDE_INT) 1 << width) - 1;
822 if (! unsignedp
823 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
824 val |= (HOST_WIDE_INT) (-1) << width;
825
826 return gen_int_mode (val, mode);
827 }
828
829 return gen_lowpart (mode, x);
830 }
831
832 /* Converting from integer constant into mode is always equivalent to an
833 subreg operation. */
834 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
835 {
836 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
837 return simplify_gen_subreg (mode, x, oldmode, 0);
838 }
839
840 temp = gen_reg_rtx (mode);
841 convert_move (temp, x, unsignedp);
842 return temp;
843 }
844 \f
845 /* STORE_MAX_PIECES is the number of bytes at a time that we can
846 store efficiently. Due to internal GCC limitations, this is
847 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
848 for an immediate constant. */
849
850 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
851
852 /* Determine whether the LEN bytes can be moved by using several move
853 instructions. Return nonzero if a call to move_by_pieces should
854 succeed. */
855
856 int
857 can_move_by_pieces (unsigned HOST_WIDE_INT len,
858 unsigned int align ATTRIBUTE_UNUSED)
859 {
860 return MOVE_BY_PIECES_P (len, align);
861 }
862
863 /* Generate several move instructions to copy LEN bytes from block FROM to
864 block TO. (These are MEM rtx's with BLKmode).
865
866 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
867 used to push FROM to the stack.
868
869 ALIGN is maximum stack alignment we can assume.
870
871 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
872 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
873 stpcpy. */
874
875 rtx
876 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
877 unsigned int align, int endp)
878 {
879 struct move_by_pieces data;
880 rtx to_addr, from_addr = XEXP (from, 0);
881 unsigned int max_size = MOVE_MAX_PIECES + 1;
882 enum machine_mode mode = VOIDmode, tmode;
883 enum insn_code icode;
884
885 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
886
887 data.offset = 0;
888 data.from_addr = from_addr;
889 if (to)
890 {
891 to_addr = XEXP (to, 0);
892 data.to = to;
893 data.autinc_to
894 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
895 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
896 data.reverse
897 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
898 }
899 else
900 {
901 to_addr = NULL_RTX;
902 data.to = NULL_RTX;
903 data.autinc_to = 1;
904 #ifdef STACK_GROWS_DOWNWARD
905 data.reverse = 1;
906 #else
907 data.reverse = 0;
908 #endif
909 }
910 data.to_addr = to_addr;
911 data.from = from;
912 data.autinc_from
913 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
914 || GET_CODE (from_addr) == POST_INC
915 || GET_CODE (from_addr) == POST_DEC);
916
917 data.explicit_inc_from = 0;
918 data.explicit_inc_to = 0;
919 if (data.reverse) data.offset = len;
920 data.len = len;
921
922 /* If copying requires more than two move insns,
923 copy addresses to registers (to make displacements shorter)
924 and use post-increment if available. */
925 if (!(data.autinc_from && data.autinc_to)
926 && move_by_pieces_ninsns (len, align, max_size) > 2)
927 {
928 /* Find the mode of the largest move... */
929 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
930 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
931 if (GET_MODE_SIZE (tmode) < max_size)
932 mode = tmode;
933
934 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
935 {
936 data.from_addr = copy_addr_to_reg (plus_constant (from_addr, len));
937 data.autinc_from = 1;
938 data.explicit_inc_from = -1;
939 }
940 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
941 {
942 data.from_addr = copy_addr_to_reg (from_addr);
943 data.autinc_from = 1;
944 data.explicit_inc_from = 1;
945 }
946 if (!data.autinc_from && CONSTANT_P (from_addr))
947 data.from_addr = copy_addr_to_reg (from_addr);
948 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
949 {
950 data.to_addr = copy_addr_to_reg (plus_constant (to_addr, len));
951 data.autinc_to = 1;
952 data.explicit_inc_to = -1;
953 }
954 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
955 {
956 data.to_addr = copy_addr_to_reg (to_addr);
957 data.autinc_to = 1;
958 data.explicit_inc_to = 1;
959 }
960 if (!data.autinc_to && CONSTANT_P (to_addr))
961 data.to_addr = copy_addr_to_reg (to_addr);
962 }
963
964 tmode = mode_for_size (MOVE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
965 if (align >= GET_MODE_ALIGNMENT (tmode))
966 align = GET_MODE_ALIGNMENT (tmode);
967 else
968 {
969 enum machine_mode xmode;
970
971 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
972 tmode != VOIDmode;
973 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
974 if (GET_MODE_SIZE (tmode) > MOVE_MAX_PIECES
975 || SLOW_UNALIGNED_ACCESS (tmode, align))
976 break;
977
978 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
979 }
980
981 /* First move what we can in the largest integer mode, then go to
982 successively smaller modes. */
983
984 while (max_size > 1)
985 {
986 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
987 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
988 if (GET_MODE_SIZE (tmode) < max_size)
989 mode = tmode;
990
991 if (mode == VOIDmode)
992 break;
993
994 icode = optab_handler (mov_optab, mode)->insn_code;
995 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
996 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
997
998 max_size = GET_MODE_SIZE (mode);
999 }
1000
1001 /* The code above should have handled everything. */
1002 gcc_assert (!data.len);
1003
1004 if (endp)
1005 {
1006 rtx to1;
1007
1008 gcc_assert (!data.reverse);
1009 if (data.autinc_to)
1010 {
1011 if (endp == 2)
1012 {
1013 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
1014 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
1015 else
1016 data.to_addr = copy_addr_to_reg (plus_constant (data.to_addr,
1017 -1));
1018 }
1019 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
1020 data.offset);
1021 }
1022 else
1023 {
1024 if (endp == 2)
1025 --data.offset;
1026 to1 = adjust_address (data.to, QImode, data.offset);
1027 }
1028 return to1;
1029 }
1030 else
1031 return data.to;
1032 }
1033
1034 /* Return number of insns required to move L bytes by pieces.
1035 ALIGN (in bits) is maximum alignment we can assume. */
1036
1037 static unsigned HOST_WIDE_INT
1038 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1039 unsigned int max_size)
1040 {
1041 unsigned HOST_WIDE_INT n_insns = 0;
1042 enum machine_mode tmode;
1043
1044 tmode = mode_for_size (MOVE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
1045 if (align >= GET_MODE_ALIGNMENT (tmode))
1046 align = GET_MODE_ALIGNMENT (tmode);
1047 else
1048 {
1049 enum machine_mode tmode, xmode;
1050
1051 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
1052 tmode != VOIDmode;
1053 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
1054 if (GET_MODE_SIZE (tmode) > MOVE_MAX_PIECES
1055 || SLOW_UNALIGNED_ACCESS (tmode, align))
1056 break;
1057
1058 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
1059 }
1060
1061 while (max_size > 1)
1062 {
1063 enum machine_mode mode = VOIDmode;
1064 enum insn_code icode;
1065
1066 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
1067 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
1068 if (GET_MODE_SIZE (tmode) < max_size)
1069 mode = tmode;
1070
1071 if (mode == VOIDmode)
1072 break;
1073
1074 icode = optab_handler (mov_optab, mode)->insn_code;
1075 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1076 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1077
1078 max_size = GET_MODE_SIZE (mode);
1079 }
1080
1081 gcc_assert (!l);
1082 return n_insns;
1083 }
1084
1085 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1086 with move instructions for mode MODE. GENFUN is the gen_... function
1087 to make a move insn for that mode. DATA has all the other info. */
1088
1089 static void
1090 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1091 struct move_by_pieces *data)
1092 {
1093 unsigned int size = GET_MODE_SIZE (mode);
1094 rtx to1 = NULL_RTX, from1;
1095
1096 while (data->len >= size)
1097 {
1098 if (data->reverse)
1099 data->offset -= size;
1100
1101 if (data->to)
1102 {
1103 if (data->autinc_to)
1104 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1105 data->offset);
1106 else
1107 to1 = adjust_address (data->to, mode, data->offset);
1108 }
1109
1110 if (data->autinc_from)
1111 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1112 data->offset);
1113 else
1114 from1 = adjust_address (data->from, mode, data->offset);
1115
1116 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1117 emit_insn (gen_add2_insn (data->to_addr,
1118 GEN_INT (-(HOST_WIDE_INT)size)));
1119 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1120 emit_insn (gen_add2_insn (data->from_addr,
1121 GEN_INT (-(HOST_WIDE_INT)size)));
1122
1123 if (data->to)
1124 emit_insn ((*genfun) (to1, from1));
1125 else
1126 {
1127 #ifdef PUSH_ROUNDING
1128 emit_single_push_insn (mode, from1, NULL);
1129 #else
1130 gcc_unreachable ();
1131 #endif
1132 }
1133
1134 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1135 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1136 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1137 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1138
1139 if (! data->reverse)
1140 data->offset += size;
1141
1142 data->len -= size;
1143 }
1144 }
1145 \f
1146 /* Emit code to move a block Y to a block X. This may be done with
1147 string-move instructions, with multiple scalar move instructions,
1148 or with a library call.
1149
1150 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1151 SIZE is an rtx that says how long they are.
1152 ALIGN is the maximum alignment we can assume they have.
1153 METHOD describes what kind of copy this is, and what mechanisms may be used.
1154
1155 Return the address of the new block, if memcpy is called and returns it,
1156 0 otherwise. */
1157
1158 rtx
1159 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1160 unsigned int expected_align, HOST_WIDE_INT expected_size)
1161 {
1162 bool may_use_call;
1163 rtx retval = 0;
1164 unsigned int align;
1165
1166 switch (method)
1167 {
1168 case BLOCK_OP_NORMAL:
1169 case BLOCK_OP_TAILCALL:
1170 may_use_call = true;
1171 break;
1172
1173 case BLOCK_OP_CALL_PARM:
1174 may_use_call = block_move_libcall_safe_for_call_parm ();
1175
1176 /* Make inhibit_defer_pop nonzero around the library call
1177 to force it to pop the arguments right away. */
1178 NO_DEFER_POP;
1179 break;
1180
1181 case BLOCK_OP_NO_LIBCALL:
1182 may_use_call = false;
1183 break;
1184
1185 default:
1186 gcc_unreachable ();
1187 }
1188
1189 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1190
1191 gcc_assert (MEM_P (x));
1192 gcc_assert (MEM_P (y));
1193 gcc_assert (size);
1194
1195 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1196 block copy is more efficient for other large modes, e.g. DCmode. */
1197 x = adjust_address (x, BLKmode, 0);
1198 y = adjust_address (y, BLKmode, 0);
1199
1200 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1201 can be incorrect is coming from __builtin_memcpy. */
1202 if (GET_CODE (size) == CONST_INT)
1203 {
1204 if (INTVAL (size) == 0)
1205 return 0;
1206
1207 x = shallow_copy_rtx (x);
1208 y = shallow_copy_rtx (y);
1209 set_mem_size (x, size);
1210 set_mem_size (y, size);
1211 }
1212
1213 if (GET_CODE (size) == CONST_INT && MOVE_BY_PIECES_P (INTVAL (size), align))
1214 move_by_pieces (x, y, INTVAL (size), align, 0);
1215 else if (emit_block_move_via_movmem (x, y, size, align,
1216 expected_align, expected_size))
1217 ;
1218 else if (may_use_call)
1219 retval = emit_block_move_via_libcall (x, y, size,
1220 method == BLOCK_OP_TAILCALL);
1221 else
1222 emit_block_move_via_loop (x, y, size, align);
1223
1224 if (method == BLOCK_OP_CALL_PARM)
1225 OK_DEFER_POP;
1226
1227 return retval;
1228 }
1229
1230 rtx
1231 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1232 {
1233 return emit_block_move_hints (x, y, size, method, 0, -1);
1234 }
1235
1236 /* A subroutine of emit_block_move. Returns true if calling the
1237 block move libcall will not clobber any parameters which may have
1238 already been placed on the stack. */
1239
1240 static bool
1241 block_move_libcall_safe_for_call_parm (void)
1242 {
1243 #if defined (REG_PARM_STACK_SPACE)
1244 tree fn;
1245 #endif
1246
1247 /* If arguments are pushed on the stack, then they're safe. */
1248 if (PUSH_ARGS)
1249 return true;
1250
1251 /* If registers go on the stack anyway, any argument is sure to clobber
1252 an outgoing argument. */
1253 #if defined (REG_PARM_STACK_SPACE)
1254 fn = emit_block_move_libcall_fn (false);
1255 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1256 && REG_PARM_STACK_SPACE (fn) != 0)
1257 return false;
1258 #endif
1259
1260 /* If any argument goes in memory, then it might clobber an outgoing
1261 argument. */
1262 {
1263 CUMULATIVE_ARGS args_so_far;
1264 tree fn, arg;
1265
1266 fn = emit_block_move_libcall_fn (false);
1267 INIT_CUMULATIVE_ARGS (args_so_far, TREE_TYPE (fn), NULL_RTX, 0, 3);
1268
1269 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1270 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1271 {
1272 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1273 rtx tmp = FUNCTION_ARG (args_so_far, mode, NULL_TREE, 1);
1274 if (!tmp || !REG_P (tmp))
1275 return false;
1276 if (targetm.calls.arg_partial_bytes (&args_so_far, mode, NULL, 1))
1277 return false;
1278 FUNCTION_ARG_ADVANCE (args_so_far, mode, NULL_TREE, 1);
1279 }
1280 }
1281 return true;
1282 }
1283
1284 /* A subroutine of emit_block_move. Expand a movmem pattern;
1285 return true if successful. */
1286
1287 static bool
1288 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1289 unsigned int expected_align, HOST_WIDE_INT expected_size)
1290 {
1291 rtx opalign = GEN_INT (align / BITS_PER_UNIT);
1292 int save_volatile_ok = volatile_ok;
1293 enum machine_mode mode;
1294
1295 if (expected_align < align)
1296 expected_align = align;
1297
1298 /* Since this is a move insn, we don't care about volatility. */
1299 volatile_ok = 1;
1300
1301 /* Try the most limited insn first, because there's no point
1302 including more than one in the machine description unless
1303 the more limited one has some advantage. */
1304
1305 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1306 mode = GET_MODE_WIDER_MODE (mode))
1307 {
1308 enum insn_code code = movmem_optab[(int) mode];
1309 insn_operand_predicate_fn pred;
1310
1311 if (code != CODE_FOR_nothing
1312 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1313 here because if SIZE is less than the mode mask, as it is
1314 returned by the macro, it will definitely be less than the
1315 actual mode mask. */
1316 && ((GET_CODE (size) == CONST_INT
1317 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1318 <= (GET_MODE_MASK (mode) >> 1)))
1319 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD)
1320 && ((pred = insn_data[(int) code].operand[0].predicate) == 0
1321 || (*pred) (x, BLKmode))
1322 && ((pred = insn_data[(int) code].operand[1].predicate) == 0
1323 || (*pred) (y, BLKmode))
1324 && ((pred = insn_data[(int) code].operand[3].predicate) == 0
1325 || (*pred) (opalign, VOIDmode)))
1326 {
1327 rtx op2;
1328 rtx last = get_last_insn ();
1329 rtx pat;
1330
1331 op2 = convert_to_mode (mode, size, 1);
1332 pred = insn_data[(int) code].operand[2].predicate;
1333 if (pred != 0 && ! (*pred) (op2, mode))
1334 op2 = copy_to_mode_reg (mode, op2);
1335
1336 /* ??? When called via emit_block_move_for_call, it'd be
1337 nice if there were some way to inform the backend, so
1338 that it doesn't fail the expansion because it thinks
1339 emitting the libcall would be more efficient. */
1340
1341 if (insn_data[(int) code].n_operands == 4)
1342 pat = GEN_FCN ((int) code) (x, y, op2, opalign);
1343 else
1344 pat = GEN_FCN ((int) code) (x, y, op2, opalign,
1345 GEN_INT (expected_align
1346 / BITS_PER_UNIT),
1347 GEN_INT (expected_size));
1348 if (pat)
1349 {
1350 emit_insn (pat);
1351 volatile_ok = save_volatile_ok;
1352 return true;
1353 }
1354 else
1355 delete_insns_since (last);
1356 }
1357 }
1358
1359 volatile_ok = save_volatile_ok;
1360 return false;
1361 }
1362
1363 /* A subroutine of emit_block_move. Expand a call to memcpy.
1364 Return the return value from memcpy, 0 otherwise. */
1365
1366 rtx
1367 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1368 {
1369 rtx dst_addr, src_addr;
1370 tree call_expr, fn, src_tree, dst_tree, size_tree;
1371 enum machine_mode size_mode;
1372 rtx retval;
1373
1374 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1375 pseudos. We can then place those new pseudos into a VAR_DECL and
1376 use them later. */
1377
1378 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1379 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1380
1381 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1382 src_addr = convert_memory_address (ptr_mode, src_addr);
1383
1384 dst_tree = make_tree (ptr_type_node, dst_addr);
1385 src_tree = make_tree (ptr_type_node, src_addr);
1386
1387 size_mode = TYPE_MODE (sizetype);
1388
1389 size = convert_to_mode (size_mode, size, 1);
1390 size = copy_to_mode_reg (size_mode, size);
1391
1392 /* It is incorrect to use the libcall calling conventions to call
1393 memcpy in this context. This could be a user call to memcpy and
1394 the user may wish to examine the return value from memcpy. For
1395 targets where libcalls and normal calls have different conventions
1396 for returning pointers, we could end up generating incorrect code. */
1397
1398 size_tree = make_tree (sizetype, size);
1399
1400 fn = emit_block_move_libcall_fn (true);
1401 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1402 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1403
1404 retval = expand_normal (call_expr);
1405
1406 return retval;
1407 }
1408
1409 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1410 for the function we use for block copies. The first time FOR_CALL
1411 is true, we call assemble_external. */
1412
1413 static GTY(()) tree block_move_fn;
1414
1415 void
1416 init_block_move_fn (const char *asmspec)
1417 {
1418 if (!block_move_fn)
1419 {
1420 tree args, fn;
1421
1422 fn = get_identifier ("memcpy");
1423 args = build_function_type_list (ptr_type_node, ptr_type_node,
1424 const_ptr_type_node, sizetype,
1425 NULL_TREE);
1426
1427 fn = build_decl (FUNCTION_DECL, fn, args);
1428 DECL_EXTERNAL (fn) = 1;
1429 TREE_PUBLIC (fn) = 1;
1430 DECL_ARTIFICIAL (fn) = 1;
1431 TREE_NOTHROW (fn) = 1;
1432 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1433 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1434
1435 block_move_fn = fn;
1436 }
1437
1438 if (asmspec)
1439 set_user_assembler_name (block_move_fn, asmspec);
1440 }
1441
1442 static tree
1443 emit_block_move_libcall_fn (int for_call)
1444 {
1445 static bool emitted_extern;
1446
1447 if (!block_move_fn)
1448 init_block_move_fn (NULL);
1449
1450 if (for_call && !emitted_extern)
1451 {
1452 emitted_extern = true;
1453 make_decl_rtl (block_move_fn);
1454 assemble_external (block_move_fn);
1455 }
1456
1457 return block_move_fn;
1458 }
1459
1460 /* A subroutine of emit_block_move. Copy the data via an explicit
1461 loop. This is used only when libcalls are forbidden. */
1462 /* ??? It'd be nice to copy in hunks larger than QImode. */
1463
1464 static void
1465 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1466 unsigned int align ATTRIBUTE_UNUSED)
1467 {
1468 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1469 enum machine_mode iter_mode;
1470
1471 iter_mode = GET_MODE (size);
1472 if (iter_mode == VOIDmode)
1473 iter_mode = word_mode;
1474
1475 top_label = gen_label_rtx ();
1476 cmp_label = gen_label_rtx ();
1477 iter = gen_reg_rtx (iter_mode);
1478
1479 emit_move_insn (iter, const0_rtx);
1480
1481 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1482 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1483 do_pending_stack_adjust ();
1484
1485 emit_jump (cmp_label);
1486 emit_label (top_label);
1487
1488 tmp = convert_modes (Pmode, iter_mode, iter, true);
1489 x_addr = gen_rtx_PLUS (Pmode, x_addr, tmp);
1490 y_addr = gen_rtx_PLUS (Pmode, y_addr, tmp);
1491 x = change_address (x, QImode, x_addr);
1492 y = change_address (y, QImode, y_addr);
1493
1494 emit_move_insn (x, y);
1495
1496 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1497 true, OPTAB_LIB_WIDEN);
1498 if (tmp != iter)
1499 emit_move_insn (iter, tmp);
1500
1501 emit_label (cmp_label);
1502
1503 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1504 true, top_label);
1505 }
1506 \f
1507 /* Copy all or part of a value X into registers starting at REGNO.
1508 The number of registers to be filled is NREGS. */
1509
1510 void
1511 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1512 {
1513 int i;
1514 #ifdef HAVE_load_multiple
1515 rtx pat;
1516 rtx last;
1517 #endif
1518
1519 if (nregs == 0)
1520 return;
1521
1522 if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
1523 x = validize_mem (force_const_mem (mode, x));
1524
1525 /* See if the machine can do this with a load multiple insn. */
1526 #ifdef HAVE_load_multiple
1527 if (HAVE_load_multiple)
1528 {
1529 last = get_last_insn ();
1530 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1531 GEN_INT (nregs));
1532 if (pat)
1533 {
1534 emit_insn (pat);
1535 return;
1536 }
1537 else
1538 delete_insns_since (last);
1539 }
1540 #endif
1541
1542 for (i = 0; i < nregs; i++)
1543 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1544 operand_subword_force (x, i, mode));
1545 }
1546
1547 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1548 The number of registers to be filled is NREGS. */
1549
1550 void
1551 move_block_from_reg (int regno, rtx x, int nregs)
1552 {
1553 int i;
1554
1555 if (nregs == 0)
1556 return;
1557
1558 /* See if the machine can do this with a store multiple insn. */
1559 #ifdef HAVE_store_multiple
1560 if (HAVE_store_multiple)
1561 {
1562 rtx last = get_last_insn ();
1563 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1564 GEN_INT (nregs));
1565 if (pat)
1566 {
1567 emit_insn (pat);
1568 return;
1569 }
1570 else
1571 delete_insns_since (last);
1572 }
1573 #endif
1574
1575 for (i = 0; i < nregs; i++)
1576 {
1577 rtx tem = operand_subword (x, i, 1, BLKmode);
1578
1579 gcc_assert (tem);
1580
1581 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1582 }
1583 }
1584
1585 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1586 ORIG, where ORIG is a non-consecutive group of registers represented by
1587 a PARALLEL. The clone is identical to the original except in that the
1588 original set of registers is replaced by a new set of pseudo registers.
1589 The new set has the same modes as the original set. */
1590
1591 rtx
1592 gen_group_rtx (rtx orig)
1593 {
1594 int i, length;
1595 rtx *tmps;
1596
1597 gcc_assert (GET_CODE (orig) == PARALLEL);
1598
1599 length = XVECLEN (orig, 0);
1600 tmps = XALLOCAVEC (rtx, length);
1601
1602 /* Skip a NULL entry in first slot. */
1603 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1604
1605 if (i)
1606 tmps[0] = 0;
1607
1608 for (; i < length; i++)
1609 {
1610 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1611 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1612
1613 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1614 }
1615
1616 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1617 }
1618
1619 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1620 except that values are placed in TMPS[i], and must later be moved
1621 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1622
1623 static void
1624 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1625 {
1626 rtx src;
1627 int start, i;
1628 enum machine_mode m = GET_MODE (orig_src);
1629
1630 gcc_assert (GET_CODE (dst) == PARALLEL);
1631
1632 if (m != VOIDmode
1633 && !SCALAR_INT_MODE_P (m)
1634 && !MEM_P (orig_src)
1635 && GET_CODE (orig_src) != CONCAT)
1636 {
1637 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1638 if (imode == BLKmode)
1639 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1640 else
1641 src = gen_reg_rtx (imode);
1642 if (imode != BLKmode)
1643 src = gen_lowpart (GET_MODE (orig_src), src);
1644 emit_move_insn (src, orig_src);
1645 /* ...and back again. */
1646 if (imode != BLKmode)
1647 src = gen_lowpart (imode, src);
1648 emit_group_load_1 (tmps, dst, src, type, ssize);
1649 return;
1650 }
1651
1652 /* Check for a NULL entry, used to indicate that the parameter goes
1653 both on the stack and in registers. */
1654 if (XEXP (XVECEXP (dst, 0, 0), 0))
1655 start = 0;
1656 else
1657 start = 1;
1658
1659 /* Process the pieces. */
1660 for (i = start; i < XVECLEN (dst, 0); i++)
1661 {
1662 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1663 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1664 unsigned int bytelen = GET_MODE_SIZE (mode);
1665 int shift = 0;
1666
1667 /* Handle trailing fragments that run over the size of the struct. */
1668 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1669 {
1670 /* Arrange to shift the fragment to where it belongs.
1671 extract_bit_field loads to the lsb of the reg. */
1672 if (
1673 #ifdef BLOCK_REG_PADDING
1674 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1675 == (BYTES_BIG_ENDIAN ? upward : downward)
1676 #else
1677 BYTES_BIG_ENDIAN
1678 #endif
1679 )
1680 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1681 bytelen = ssize - bytepos;
1682 gcc_assert (bytelen > 0);
1683 }
1684
1685 /* If we won't be loading directly from memory, protect the real source
1686 from strange tricks we might play; but make sure that the source can
1687 be loaded directly into the destination. */
1688 src = orig_src;
1689 if (!MEM_P (orig_src)
1690 && (!CONSTANT_P (orig_src)
1691 || (GET_MODE (orig_src) != mode
1692 && GET_MODE (orig_src) != VOIDmode)))
1693 {
1694 if (GET_MODE (orig_src) == VOIDmode)
1695 src = gen_reg_rtx (mode);
1696 else
1697 src = gen_reg_rtx (GET_MODE (orig_src));
1698
1699 emit_move_insn (src, orig_src);
1700 }
1701
1702 /* Optimize the access just a bit. */
1703 if (MEM_P (src)
1704 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1705 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1706 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1707 && bytelen == GET_MODE_SIZE (mode))
1708 {
1709 tmps[i] = gen_reg_rtx (mode);
1710 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1711 }
1712 else if (COMPLEX_MODE_P (mode)
1713 && GET_MODE (src) == mode
1714 && bytelen == GET_MODE_SIZE (mode))
1715 /* Let emit_move_complex do the bulk of the work. */
1716 tmps[i] = src;
1717 else if (GET_CODE (src) == CONCAT)
1718 {
1719 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1720 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1721
1722 if ((bytepos == 0 && bytelen == slen0)
1723 || (bytepos != 0 && bytepos + bytelen <= slen))
1724 {
1725 /* The following assumes that the concatenated objects all
1726 have the same size. In this case, a simple calculation
1727 can be used to determine the object and the bit field
1728 to be extracted. */
1729 tmps[i] = XEXP (src, bytepos / slen0);
1730 if (! CONSTANT_P (tmps[i])
1731 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1732 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1733 (bytepos % slen0) * BITS_PER_UNIT,
1734 1, NULL_RTX, mode, mode);
1735 }
1736 else
1737 {
1738 rtx mem;
1739
1740 gcc_assert (!bytepos);
1741 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1742 emit_move_insn (mem, src);
1743 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1744 0, 1, NULL_RTX, mode, mode);
1745 }
1746 }
1747 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1748 SIMD register, which is currently broken. While we get GCC
1749 to emit proper RTL for these cases, let's dump to memory. */
1750 else if (VECTOR_MODE_P (GET_MODE (dst))
1751 && REG_P (src))
1752 {
1753 int slen = GET_MODE_SIZE (GET_MODE (src));
1754 rtx mem;
1755
1756 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1757 emit_move_insn (mem, src);
1758 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1759 }
1760 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1761 && XVECLEN (dst, 0) > 1)
1762 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1763 else if (CONSTANT_P (src))
1764 {
1765 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1766
1767 if (len == ssize)
1768 tmps[i] = src;
1769 else
1770 {
1771 rtx first, second;
1772
1773 gcc_assert (2 * len == ssize);
1774 split_double (src, &first, &second);
1775 if (i)
1776 tmps[i] = second;
1777 else
1778 tmps[i] = first;
1779 }
1780 }
1781 else if (REG_P (src) && GET_MODE (src) == mode)
1782 tmps[i] = src;
1783 else
1784 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1785 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
1786 mode, mode);
1787
1788 if (shift)
1789 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1790 build_int_cst (NULL_TREE, shift), tmps[i], 0);
1791 }
1792 }
1793
1794 /* Emit code to move a block SRC of type TYPE to a block DST,
1795 where DST is non-consecutive registers represented by a PARALLEL.
1796 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1797 if not known. */
1798
1799 void
1800 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1801 {
1802 rtx *tmps;
1803 int i;
1804
1805 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1806 emit_group_load_1 (tmps, dst, src, type, ssize);
1807
1808 /* Copy the extracted pieces into the proper (probable) hard regs. */
1809 for (i = 0; i < XVECLEN (dst, 0); i++)
1810 {
1811 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1812 if (d == NULL)
1813 continue;
1814 emit_move_insn (d, tmps[i]);
1815 }
1816 }
1817
1818 /* Similar, but load SRC into new pseudos in a format that looks like
1819 PARALLEL. This can later be fed to emit_group_move to get things
1820 in the right place. */
1821
1822 rtx
1823 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1824 {
1825 rtvec vec;
1826 int i;
1827
1828 vec = rtvec_alloc (XVECLEN (parallel, 0));
1829 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1830
1831 /* Convert the vector to look just like the original PARALLEL, except
1832 with the computed values. */
1833 for (i = 0; i < XVECLEN (parallel, 0); i++)
1834 {
1835 rtx e = XVECEXP (parallel, 0, i);
1836 rtx d = XEXP (e, 0);
1837
1838 if (d)
1839 {
1840 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1841 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1842 }
1843 RTVEC_ELT (vec, i) = e;
1844 }
1845
1846 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1847 }
1848
1849 /* Emit code to move a block SRC to block DST, where SRC and DST are
1850 non-consecutive groups of registers, each represented by a PARALLEL. */
1851
1852 void
1853 emit_group_move (rtx dst, rtx src)
1854 {
1855 int i;
1856
1857 gcc_assert (GET_CODE (src) == PARALLEL
1858 && GET_CODE (dst) == PARALLEL
1859 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1860
1861 /* Skip first entry if NULL. */
1862 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1863 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1864 XEXP (XVECEXP (src, 0, i), 0));
1865 }
1866
1867 /* Move a group of registers represented by a PARALLEL into pseudos. */
1868
1869 rtx
1870 emit_group_move_into_temps (rtx src)
1871 {
1872 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1873 int i;
1874
1875 for (i = 0; i < XVECLEN (src, 0); i++)
1876 {
1877 rtx e = XVECEXP (src, 0, i);
1878 rtx d = XEXP (e, 0);
1879
1880 if (d)
1881 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1882 RTVEC_ELT (vec, i) = e;
1883 }
1884
1885 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1886 }
1887
1888 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1889 where SRC is non-consecutive registers represented by a PARALLEL.
1890 SSIZE represents the total size of block ORIG_DST, or -1 if not
1891 known. */
1892
1893 void
1894 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1895 {
1896 rtx *tmps, dst;
1897 int start, finish, i;
1898 enum machine_mode m = GET_MODE (orig_dst);
1899
1900 gcc_assert (GET_CODE (src) == PARALLEL);
1901
1902 if (!SCALAR_INT_MODE_P (m)
1903 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1904 {
1905 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1906 if (imode == BLKmode)
1907 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1908 else
1909 dst = gen_reg_rtx (imode);
1910 emit_group_store (dst, src, type, ssize);
1911 if (imode != BLKmode)
1912 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1913 emit_move_insn (orig_dst, dst);
1914 return;
1915 }
1916
1917 /* Check for a NULL entry, used to indicate that the parameter goes
1918 both on the stack and in registers. */
1919 if (XEXP (XVECEXP (src, 0, 0), 0))
1920 start = 0;
1921 else
1922 start = 1;
1923 finish = XVECLEN (src, 0);
1924
1925 tmps = XALLOCAVEC (rtx, finish);
1926
1927 /* Copy the (probable) hard regs into pseudos. */
1928 for (i = start; i < finish; i++)
1929 {
1930 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1931 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1932 {
1933 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1934 emit_move_insn (tmps[i], reg);
1935 }
1936 else
1937 tmps[i] = reg;
1938 }
1939
1940 /* If we won't be storing directly into memory, protect the real destination
1941 from strange tricks we might play. */
1942 dst = orig_dst;
1943 if (GET_CODE (dst) == PARALLEL)
1944 {
1945 rtx temp;
1946
1947 /* We can get a PARALLEL dst if there is a conditional expression in
1948 a return statement. In that case, the dst and src are the same,
1949 so no action is necessary. */
1950 if (rtx_equal_p (dst, src))
1951 return;
1952
1953 /* It is unclear if we can ever reach here, but we may as well handle
1954 it. Allocate a temporary, and split this into a store/load to/from
1955 the temporary. */
1956
1957 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1958 emit_group_store (temp, src, type, ssize);
1959 emit_group_load (dst, temp, type, ssize);
1960 return;
1961 }
1962 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1963 {
1964 enum machine_mode outer = GET_MODE (dst);
1965 enum machine_mode inner;
1966 HOST_WIDE_INT bytepos;
1967 bool done = false;
1968 rtx temp;
1969
1970 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1971 dst = gen_reg_rtx (outer);
1972
1973 /* Make life a bit easier for combine. */
1974 /* If the first element of the vector is the low part
1975 of the destination mode, use a paradoxical subreg to
1976 initialize the destination. */
1977 if (start < finish)
1978 {
1979 inner = GET_MODE (tmps[start]);
1980 bytepos = subreg_lowpart_offset (inner, outer);
1981 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1982 {
1983 temp = simplify_gen_subreg (outer, tmps[start],
1984 inner, 0);
1985 if (temp)
1986 {
1987 emit_move_insn (dst, temp);
1988 done = true;
1989 start++;
1990 }
1991 }
1992 }
1993
1994 /* If the first element wasn't the low part, try the last. */
1995 if (!done
1996 && start < finish - 1)
1997 {
1998 inner = GET_MODE (tmps[finish - 1]);
1999 bytepos = subreg_lowpart_offset (inner, outer);
2000 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
2001 {
2002 temp = simplify_gen_subreg (outer, tmps[finish - 1],
2003 inner, 0);
2004 if (temp)
2005 {
2006 emit_move_insn (dst, temp);
2007 done = true;
2008 finish--;
2009 }
2010 }
2011 }
2012
2013 /* Otherwise, simply initialize the result to zero. */
2014 if (!done)
2015 emit_move_insn (dst, CONST0_RTX (outer));
2016 }
2017
2018 /* Process the pieces. */
2019 for (i = start; i < finish; i++)
2020 {
2021 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2022 enum machine_mode mode = GET_MODE (tmps[i]);
2023 unsigned int bytelen = GET_MODE_SIZE (mode);
2024 unsigned int adj_bytelen = bytelen;
2025 rtx dest = dst;
2026
2027 /* Handle trailing fragments that run over the size of the struct. */
2028 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2029 adj_bytelen = ssize - bytepos;
2030
2031 if (GET_CODE (dst) == CONCAT)
2032 {
2033 if (bytepos + adj_bytelen
2034 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2035 dest = XEXP (dst, 0);
2036 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2037 {
2038 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2039 dest = XEXP (dst, 1);
2040 }
2041 else
2042 {
2043 enum machine_mode dest_mode = GET_MODE (dest);
2044 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2045
2046 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2047
2048 if (GET_MODE_ALIGNMENT (dest_mode)
2049 >= GET_MODE_ALIGNMENT (tmp_mode))
2050 {
2051 dest = assign_stack_temp (dest_mode,
2052 GET_MODE_SIZE (dest_mode),
2053 0);
2054 emit_move_insn (adjust_address (dest,
2055 tmp_mode,
2056 bytepos),
2057 tmps[i]);
2058 dst = dest;
2059 }
2060 else
2061 {
2062 dest = assign_stack_temp (tmp_mode,
2063 GET_MODE_SIZE (tmp_mode),
2064 0);
2065 emit_move_insn (dest, tmps[i]);
2066 dst = adjust_address (dest, dest_mode, bytepos);
2067 }
2068 break;
2069 }
2070 }
2071
2072 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2073 {
2074 /* store_bit_field always takes its value from the lsb.
2075 Move the fragment to the lsb if it's not already there. */
2076 if (
2077 #ifdef BLOCK_REG_PADDING
2078 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2079 == (BYTES_BIG_ENDIAN ? upward : downward)
2080 #else
2081 BYTES_BIG_ENDIAN
2082 #endif
2083 )
2084 {
2085 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2086 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2087 build_int_cst (NULL_TREE, shift),
2088 tmps[i], 0);
2089 }
2090 bytelen = adj_bytelen;
2091 }
2092
2093 /* Optimize the access just a bit. */
2094 if (MEM_P (dest)
2095 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2096 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2097 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2098 && bytelen == GET_MODE_SIZE (mode))
2099 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2100 else
2101 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2102 mode, tmps[i]);
2103 }
2104
2105 /* Copy from the pseudo into the (probable) hard reg. */
2106 if (orig_dst != dst)
2107 emit_move_insn (orig_dst, dst);
2108 }
2109
2110 /* Generate code to copy a BLKmode object of TYPE out of a
2111 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2112 is null, a stack temporary is created. TGTBLK is returned.
2113
2114 The purpose of this routine is to handle functions that return
2115 BLKmode structures in registers. Some machines (the PA for example)
2116 want to return all small structures in registers regardless of the
2117 structure's alignment. */
2118
2119 rtx
2120 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2121 {
2122 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2123 rtx src = NULL, dst = NULL;
2124 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2125 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2126 enum machine_mode copy_mode;
2127
2128 if (tgtblk == 0)
2129 {
2130 tgtblk = assign_temp (build_qualified_type (type,
2131 (TYPE_QUALS (type)
2132 | TYPE_QUAL_CONST)),
2133 0, 1, 1);
2134 preserve_temp_slots (tgtblk);
2135 }
2136
2137 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2138 into a new pseudo which is a full word. */
2139
2140 if (GET_MODE (srcreg) != BLKmode
2141 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2142 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2143
2144 /* If the structure doesn't take up a whole number of words, see whether
2145 SRCREG is padded on the left or on the right. If it's on the left,
2146 set PADDING_CORRECTION to the number of bits to skip.
2147
2148 In most ABIs, the structure will be returned at the least end of
2149 the register, which translates to right padding on little-endian
2150 targets and left padding on big-endian targets. The opposite
2151 holds if the structure is returned at the most significant
2152 end of the register. */
2153 if (bytes % UNITS_PER_WORD != 0
2154 && (targetm.calls.return_in_msb (type)
2155 ? !BYTES_BIG_ENDIAN
2156 : BYTES_BIG_ENDIAN))
2157 padding_correction
2158 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2159
2160 /* Copy the structure BITSIZE bits at a time. If the target lives in
2161 memory, take care of not reading/writing past its end by selecting
2162 a copy mode suited to BITSIZE. This should always be possible given
2163 how it is computed.
2164
2165 We could probably emit more efficient code for machines which do not use
2166 strict alignment, but it doesn't seem worth the effort at the current
2167 time. */
2168
2169 copy_mode = word_mode;
2170 if (MEM_P (tgtblk))
2171 {
2172 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2173 if (mem_mode != BLKmode)
2174 copy_mode = mem_mode;
2175 }
2176
2177 for (bitpos = 0, xbitpos = padding_correction;
2178 bitpos < bytes * BITS_PER_UNIT;
2179 bitpos += bitsize, xbitpos += bitsize)
2180 {
2181 /* We need a new source operand each time xbitpos is on a
2182 word boundary and when xbitpos == padding_correction
2183 (the first time through). */
2184 if (xbitpos % BITS_PER_WORD == 0
2185 || xbitpos == padding_correction)
2186 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2187 GET_MODE (srcreg));
2188
2189 /* We need a new destination operand each time bitpos is on
2190 a word boundary. */
2191 if (bitpos % BITS_PER_WORD == 0)
2192 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2193
2194 /* Use xbitpos for the source extraction (right justified) and
2195 bitpos for the destination store (left justified). */
2196 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, copy_mode,
2197 extract_bit_field (src, bitsize,
2198 xbitpos % BITS_PER_WORD, 1,
2199 NULL_RTX, copy_mode, copy_mode));
2200 }
2201
2202 return tgtblk;
2203 }
2204
2205 /* Add a USE expression for REG to the (possibly empty) list pointed
2206 to by CALL_FUSAGE. REG must denote a hard register. */
2207
2208 void
2209 use_reg (rtx *call_fusage, rtx reg)
2210 {
2211 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2212
2213 *call_fusage
2214 = gen_rtx_EXPR_LIST (VOIDmode,
2215 gen_rtx_USE (VOIDmode, reg), *call_fusage);
2216 }
2217
2218 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2219 starting at REGNO. All of these registers must be hard registers. */
2220
2221 void
2222 use_regs (rtx *call_fusage, int regno, int nregs)
2223 {
2224 int i;
2225
2226 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2227
2228 for (i = 0; i < nregs; i++)
2229 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2230 }
2231
2232 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2233 PARALLEL REGS. This is for calls that pass values in multiple
2234 non-contiguous locations. The Irix 6 ABI has examples of this. */
2235
2236 void
2237 use_group_regs (rtx *call_fusage, rtx regs)
2238 {
2239 int i;
2240
2241 for (i = 0; i < XVECLEN (regs, 0); i++)
2242 {
2243 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2244
2245 /* A NULL entry means the parameter goes both on the stack and in
2246 registers. This can also be a MEM for targets that pass values
2247 partially on the stack and partially in registers. */
2248 if (reg != 0 && REG_P (reg))
2249 use_reg (call_fusage, reg);
2250 }
2251 }
2252
2253 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2254 assigment and the code of the expresion on the RHS is CODE. Return
2255 NULL otherwise. */
2256
2257 static gimple
2258 get_def_for_expr (tree name, enum tree_code code)
2259 {
2260 gimple def_stmt;
2261
2262 if (TREE_CODE (name) != SSA_NAME)
2263 return NULL;
2264
2265 def_stmt = get_gimple_for_ssa_name (name);
2266 if (!def_stmt
2267 || gimple_assign_rhs_code (def_stmt) != code)
2268 return NULL;
2269
2270 return def_stmt;
2271 }
2272 \f
2273
2274 /* Determine whether the LEN bytes generated by CONSTFUN can be
2275 stored to memory using several move instructions. CONSTFUNDATA is
2276 a pointer which will be passed as argument in every CONSTFUN call.
2277 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2278 a memset operation and false if it's a copy of a constant string.
2279 Return nonzero if a call to store_by_pieces should succeed. */
2280
2281 int
2282 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2283 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2284 void *constfundata, unsigned int align, bool memsetp)
2285 {
2286 unsigned HOST_WIDE_INT l;
2287 unsigned int max_size;
2288 HOST_WIDE_INT offset = 0;
2289 enum machine_mode mode, tmode;
2290 enum insn_code icode;
2291 int reverse;
2292 rtx cst;
2293
2294 if (len == 0)
2295 return 1;
2296
2297 if (! (memsetp
2298 ? SET_BY_PIECES_P (len, align)
2299 : STORE_BY_PIECES_P (len, align)))
2300 return 0;
2301
2302 tmode = mode_for_size (STORE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
2303 if (align >= GET_MODE_ALIGNMENT (tmode))
2304 align = GET_MODE_ALIGNMENT (tmode);
2305 else
2306 {
2307 enum machine_mode xmode;
2308
2309 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
2310 tmode != VOIDmode;
2311 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
2312 if (GET_MODE_SIZE (tmode) > STORE_MAX_PIECES
2313 || SLOW_UNALIGNED_ACCESS (tmode, align))
2314 break;
2315
2316 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
2317 }
2318
2319 /* We would first store what we can in the largest integer mode, then go to
2320 successively smaller modes. */
2321
2322 for (reverse = 0;
2323 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2324 reverse++)
2325 {
2326 l = len;
2327 mode = VOIDmode;
2328 max_size = STORE_MAX_PIECES + 1;
2329 while (max_size > 1)
2330 {
2331 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2332 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2333 if (GET_MODE_SIZE (tmode) < max_size)
2334 mode = tmode;
2335
2336 if (mode == VOIDmode)
2337 break;
2338
2339 icode = optab_handler (mov_optab, mode)->insn_code;
2340 if (icode != CODE_FOR_nothing
2341 && align >= GET_MODE_ALIGNMENT (mode))
2342 {
2343 unsigned int size = GET_MODE_SIZE (mode);
2344
2345 while (l >= size)
2346 {
2347 if (reverse)
2348 offset -= size;
2349
2350 cst = (*constfun) (constfundata, offset, mode);
2351 if (!LEGITIMATE_CONSTANT_P (cst))
2352 return 0;
2353
2354 if (!reverse)
2355 offset += size;
2356
2357 l -= size;
2358 }
2359 }
2360
2361 max_size = GET_MODE_SIZE (mode);
2362 }
2363
2364 /* The code above should have handled everything. */
2365 gcc_assert (!l);
2366 }
2367
2368 return 1;
2369 }
2370
2371 /* Generate several move instructions to store LEN bytes generated by
2372 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2373 pointer which will be passed as argument in every CONSTFUN call.
2374 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2375 a memset operation and false if it's a copy of a constant string.
2376 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2377 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2378 stpcpy. */
2379
2380 rtx
2381 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2382 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2383 void *constfundata, unsigned int align, bool memsetp, int endp)
2384 {
2385 struct store_by_pieces data;
2386
2387 if (len == 0)
2388 {
2389 gcc_assert (endp != 2);
2390 return to;
2391 }
2392
2393 gcc_assert (memsetp
2394 ? SET_BY_PIECES_P (len, align)
2395 : STORE_BY_PIECES_P (len, align));
2396 data.constfun = constfun;
2397 data.constfundata = constfundata;
2398 data.len = len;
2399 data.to = to;
2400 store_by_pieces_1 (&data, align);
2401 if (endp)
2402 {
2403 rtx to1;
2404
2405 gcc_assert (!data.reverse);
2406 if (data.autinc_to)
2407 {
2408 if (endp == 2)
2409 {
2410 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2411 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2412 else
2413 data.to_addr = copy_addr_to_reg (plus_constant (data.to_addr,
2414 -1));
2415 }
2416 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2417 data.offset);
2418 }
2419 else
2420 {
2421 if (endp == 2)
2422 --data.offset;
2423 to1 = adjust_address (data.to, QImode, data.offset);
2424 }
2425 return to1;
2426 }
2427 else
2428 return data.to;
2429 }
2430
2431 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2432 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2433
2434 static void
2435 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2436 {
2437 struct store_by_pieces data;
2438
2439 if (len == 0)
2440 return;
2441
2442 data.constfun = clear_by_pieces_1;
2443 data.constfundata = NULL;
2444 data.len = len;
2445 data.to = to;
2446 store_by_pieces_1 (&data, align);
2447 }
2448
2449 /* Callback routine for clear_by_pieces.
2450 Return const0_rtx unconditionally. */
2451
2452 static rtx
2453 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2454 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2455 enum machine_mode mode ATTRIBUTE_UNUSED)
2456 {
2457 return const0_rtx;
2458 }
2459
2460 /* Subroutine of clear_by_pieces and store_by_pieces.
2461 Generate several move instructions to store LEN bytes of block TO. (A MEM
2462 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2463
2464 static void
2465 store_by_pieces_1 (struct store_by_pieces *data ATTRIBUTE_UNUSED,
2466 unsigned int align ATTRIBUTE_UNUSED)
2467 {
2468 rtx to_addr = XEXP (data->to, 0);
2469 unsigned int max_size = STORE_MAX_PIECES + 1;
2470 enum machine_mode mode = VOIDmode, tmode;
2471 enum insn_code icode;
2472
2473 data->offset = 0;
2474 data->to_addr = to_addr;
2475 data->autinc_to
2476 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2477 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2478
2479 data->explicit_inc_to = 0;
2480 data->reverse
2481 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2482 if (data->reverse)
2483 data->offset = data->len;
2484
2485 /* If storing requires more than two move insns,
2486 copy addresses to registers (to make displacements shorter)
2487 and use post-increment if available. */
2488 if (!data->autinc_to
2489 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2490 {
2491 /* Determine the main mode we'll be using. */
2492 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2493 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2494 if (GET_MODE_SIZE (tmode) < max_size)
2495 mode = tmode;
2496
2497 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2498 {
2499 data->to_addr = copy_addr_to_reg (plus_constant (to_addr, data->len));
2500 data->autinc_to = 1;
2501 data->explicit_inc_to = -1;
2502 }
2503
2504 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2505 && ! data->autinc_to)
2506 {
2507 data->to_addr = copy_addr_to_reg (to_addr);
2508 data->autinc_to = 1;
2509 data->explicit_inc_to = 1;
2510 }
2511
2512 if ( !data->autinc_to && CONSTANT_P (to_addr))
2513 data->to_addr = copy_addr_to_reg (to_addr);
2514 }
2515
2516 tmode = mode_for_size (STORE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
2517 if (align >= GET_MODE_ALIGNMENT (tmode))
2518 align = GET_MODE_ALIGNMENT (tmode);
2519 else
2520 {
2521 enum machine_mode xmode;
2522
2523 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
2524 tmode != VOIDmode;
2525 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
2526 if (GET_MODE_SIZE (tmode) > STORE_MAX_PIECES
2527 || SLOW_UNALIGNED_ACCESS (tmode, align))
2528 break;
2529
2530 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
2531 }
2532
2533 /* First store what we can in the largest integer mode, then go to
2534 successively smaller modes. */
2535
2536 while (max_size > 1)
2537 {
2538 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2539 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2540 if (GET_MODE_SIZE (tmode) < max_size)
2541 mode = tmode;
2542
2543 if (mode == VOIDmode)
2544 break;
2545
2546 icode = optab_handler (mov_optab, mode)->insn_code;
2547 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2548 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2549
2550 max_size = GET_MODE_SIZE (mode);
2551 }
2552
2553 /* The code above should have handled everything. */
2554 gcc_assert (!data->len);
2555 }
2556
2557 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2558 with move instructions for mode MODE. GENFUN is the gen_... function
2559 to make a move insn for that mode. DATA has all the other info. */
2560
2561 static void
2562 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2563 struct store_by_pieces *data)
2564 {
2565 unsigned int size = GET_MODE_SIZE (mode);
2566 rtx to1, cst;
2567
2568 while (data->len >= size)
2569 {
2570 if (data->reverse)
2571 data->offset -= size;
2572
2573 if (data->autinc_to)
2574 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2575 data->offset);
2576 else
2577 to1 = adjust_address (data->to, mode, data->offset);
2578
2579 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2580 emit_insn (gen_add2_insn (data->to_addr,
2581 GEN_INT (-(HOST_WIDE_INT) size)));
2582
2583 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2584 emit_insn ((*genfun) (to1, cst));
2585
2586 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2587 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2588
2589 if (! data->reverse)
2590 data->offset += size;
2591
2592 data->len -= size;
2593 }
2594 }
2595 \f
2596 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2597 its length in bytes. */
2598
2599 rtx
2600 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2601 unsigned int expected_align, HOST_WIDE_INT expected_size)
2602 {
2603 enum machine_mode mode = GET_MODE (object);
2604 unsigned int align;
2605
2606 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2607
2608 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2609 just move a zero. Otherwise, do this a piece at a time. */
2610 if (mode != BLKmode
2611 && GET_CODE (size) == CONST_INT
2612 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2613 {
2614 rtx zero = CONST0_RTX (mode);
2615 if (zero != NULL)
2616 {
2617 emit_move_insn (object, zero);
2618 return NULL;
2619 }
2620
2621 if (COMPLEX_MODE_P (mode))
2622 {
2623 zero = CONST0_RTX (GET_MODE_INNER (mode));
2624 if (zero != NULL)
2625 {
2626 write_complex_part (object, zero, 0);
2627 write_complex_part (object, zero, 1);
2628 return NULL;
2629 }
2630 }
2631 }
2632
2633 if (size == const0_rtx)
2634 return NULL;
2635
2636 align = MEM_ALIGN (object);
2637
2638 if (GET_CODE (size) == CONST_INT
2639 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2640 clear_by_pieces (object, INTVAL (size), align);
2641 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2642 expected_align, expected_size))
2643 ;
2644 else
2645 return set_storage_via_libcall (object, size, const0_rtx,
2646 method == BLOCK_OP_TAILCALL);
2647
2648 return NULL;
2649 }
2650
2651 rtx
2652 clear_storage (rtx object, rtx size, enum block_op_methods method)
2653 {
2654 return clear_storage_hints (object, size, method, 0, -1);
2655 }
2656
2657
2658 /* A subroutine of clear_storage. Expand a call to memset.
2659 Return the return value of memset, 0 otherwise. */
2660
2661 rtx
2662 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2663 {
2664 tree call_expr, fn, object_tree, size_tree, val_tree;
2665 enum machine_mode size_mode;
2666 rtx retval;
2667
2668 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2669 place those into new pseudos into a VAR_DECL and use them later. */
2670
2671 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2672
2673 size_mode = TYPE_MODE (sizetype);
2674 size = convert_to_mode (size_mode, size, 1);
2675 size = copy_to_mode_reg (size_mode, size);
2676
2677 /* It is incorrect to use the libcall calling conventions to call
2678 memset in this context. This could be a user call to memset and
2679 the user may wish to examine the return value from memset. For
2680 targets where libcalls and normal calls have different conventions
2681 for returning pointers, we could end up generating incorrect code. */
2682
2683 object_tree = make_tree (ptr_type_node, object);
2684 if (GET_CODE (val) != CONST_INT)
2685 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2686 size_tree = make_tree (sizetype, size);
2687 val_tree = make_tree (integer_type_node, val);
2688
2689 fn = clear_storage_libcall_fn (true);
2690 call_expr = build_call_expr (fn, 3,
2691 object_tree, integer_zero_node, size_tree);
2692 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2693
2694 retval = expand_normal (call_expr);
2695
2696 return retval;
2697 }
2698
2699 /* A subroutine of set_storage_via_libcall. Create the tree node
2700 for the function we use for block clears. The first time FOR_CALL
2701 is true, we call assemble_external. */
2702
2703 tree block_clear_fn;
2704
2705 void
2706 init_block_clear_fn (const char *asmspec)
2707 {
2708 if (!block_clear_fn)
2709 {
2710 tree fn, args;
2711
2712 fn = get_identifier ("memset");
2713 args = build_function_type_list (ptr_type_node, ptr_type_node,
2714 integer_type_node, sizetype,
2715 NULL_TREE);
2716
2717 fn = build_decl (FUNCTION_DECL, fn, args);
2718 DECL_EXTERNAL (fn) = 1;
2719 TREE_PUBLIC (fn) = 1;
2720 DECL_ARTIFICIAL (fn) = 1;
2721 TREE_NOTHROW (fn) = 1;
2722 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2723 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2724
2725 block_clear_fn = fn;
2726 }
2727
2728 if (asmspec)
2729 set_user_assembler_name (block_clear_fn, asmspec);
2730 }
2731
2732 static tree
2733 clear_storage_libcall_fn (int for_call)
2734 {
2735 static bool emitted_extern;
2736
2737 if (!block_clear_fn)
2738 init_block_clear_fn (NULL);
2739
2740 if (for_call && !emitted_extern)
2741 {
2742 emitted_extern = true;
2743 make_decl_rtl (block_clear_fn);
2744 assemble_external (block_clear_fn);
2745 }
2746
2747 return block_clear_fn;
2748 }
2749 \f
2750 /* Expand a setmem pattern; return true if successful. */
2751
2752 bool
2753 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2754 unsigned int expected_align, HOST_WIDE_INT expected_size)
2755 {
2756 /* Try the most limited insn first, because there's no point
2757 including more than one in the machine description unless
2758 the more limited one has some advantage. */
2759
2760 rtx opalign = GEN_INT (align / BITS_PER_UNIT);
2761 enum machine_mode mode;
2762
2763 if (expected_align < align)
2764 expected_align = align;
2765
2766 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2767 mode = GET_MODE_WIDER_MODE (mode))
2768 {
2769 enum insn_code code = setmem_optab[(int) mode];
2770 insn_operand_predicate_fn pred;
2771
2772 if (code != CODE_FOR_nothing
2773 /* We don't need MODE to be narrower than
2774 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2775 the mode mask, as it is returned by the macro, it will
2776 definitely be less than the actual mode mask. */
2777 && ((GET_CODE (size) == CONST_INT
2778 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2779 <= (GET_MODE_MASK (mode) >> 1)))
2780 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD)
2781 && ((pred = insn_data[(int) code].operand[0].predicate) == 0
2782 || (*pred) (object, BLKmode))
2783 && ((pred = insn_data[(int) code].operand[3].predicate) == 0
2784 || (*pred) (opalign, VOIDmode)))
2785 {
2786 rtx opsize, opchar;
2787 enum machine_mode char_mode;
2788 rtx last = get_last_insn ();
2789 rtx pat;
2790
2791 opsize = convert_to_mode (mode, size, 1);
2792 pred = insn_data[(int) code].operand[1].predicate;
2793 if (pred != 0 && ! (*pred) (opsize, mode))
2794 opsize = copy_to_mode_reg (mode, opsize);
2795
2796 opchar = val;
2797 char_mode = insn_data[(int) code].operand[2].mode;
2798 if (char_mode != VOIDmode)
2799 {
2800 opchar = convert_to_mode (char_mode, opchar, 1);
2801 pred = insn_data[(int) code].operand[2].predicate;
2802 if (pred != 0 && ! (*pred) (opchar, char_mode))
2803 opchar = copy_to_mode_reg (char_mode, opchar);
2804 }
2805
2806 if (insn_data[(int) code].n_operands == 4)
2807 pat = GEN_FCN ((int) code) (object, opsize, opchar, opalign);
2808 else
2809 pat = GEN_FCN ((int) code) (object, opsize, opchar, opalign,
2810 GEN_INT (expected_align
2811 / BITS_PER_UNIT),
2812 GEN_INT (expected_size));
2813 if (pat)
2814 {
2815 emit_insn (pat);
2816 return true;
2817 }
2818 else
2819 delete_insns_since (last);
2820 }
2821 }
2822
2823 return false;
2824 }
2825
2826 \f
2827 /* Write to one of the components of the complex value CPLX. Write VAL to
2828 the real part if IMAG_P is false, and the imaginary part if its true. */
2829
2830 static void
2831 write_complex_part (rtx cplx, rtx val, bool imag_p)
2832 {
2833 enum machine_mode cmode;
2834 enum machine_mode imode;
2835 unsigned ibitsize;
2836
2837 if (GET_CODE (cplx) == CONCAT)
2838 {
2839 emit_move_insn (XEXP (cplx, imag_p), val);
2840 return;
2841 }
2842
2843 cmode = GET_MODE (cplx);
2844 imode = GET_MODE_INNER (cmode);
2845 ibitsize = GET_MODE_BITSIZE (imode);
2846
2847 /* For MEMs simplify_gen_subreg may generate an invalid new address
2848 because, e.g., the original address is considered mode-dependent
2849 by the target, which restricts simplify_subreg from invoking
2850 adjust_address_nv. Instead of preparing fallback support for an
2851 invalid address, we call adjust_address_nv directly. */
2852 if (MEM_P (cplx))
2853 {
2854 emit_move_insn (adjust_address_nv (cplx, imode,
2855 imag_p ? GET_MODE_SIZE (imode) : 0),
2856 val);
2857 return;
2858 }
2859
2860 /* If the sub-object is at least word sized, then we know that subregging
2861 will work. This special case is important, since store_bit_field
2862 wants to operate on integer modes, and there's rarely an OImode to
2863 correspond to TCmode. */
2864 if (ibitsize >= BITS_PER_WORD
2865 /* For hard regs we have exact predicates. Assume we can split
2866 the original object if it spans an even number of hard regs.
2867 This special case is important for SCmode on 64-bit platforms
2868 where the natural size of floating-point regs is 32-bit. */
2869 || (REG_P (cplx)
2870 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2871 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2872 {
2873 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2874 imag_p ? GET_MODE_SIZE (imode) : 0);
2875 if (part)
2876 {
2877 emit_move_insn (part, val);
2878 return;
2879 }
2880 else
2881 /* simplify_gen_subreg may fail for sub-word MEMs. */
2882 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2883 }
2884
2885 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, imode, val);
2886 }
2887
2888 /* Extract one of the components of the complex value CPLX. Extract the
2889 real part if IMAG_P is false, and the imaginary part if it's true. */
2890
2891 static rtx
2892 read_complex_part (rtx cplx, bool imag_p)
2893 {
2894 enum machine_mode cmode, imode;
2895 unsigned ibitsize;
2896
2897 if (GET_CODE (cplx) == CONCAT)
2898 return XEXP (cplx, imag_p);
2899
2900 cmode = GET_MODE (cplx);
2901 imode = GET_MODE_INNER (cmode);
2902 ibitsize = GET_MODE_BITSIZE (imode);
2903
2904 /* Special case reads from complex constants that got spilled to memory. */
2905 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2906 {
2907 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2908 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2909 {
2910 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2911 if (CONSTANT_CLASS_P (part))
2912 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2913 }
2914 }
2915
2916 /* For MEMs simplify_gen_subreg may generate an invalid new address
2917 because, e.g., the original address is considered mode-dependent
2918 by the target, which restricts simplify_subreg from invoking
2919 adjust_address_nv. Instead of preparing fallback support for an
2920 invalid address, we call adjust_address_nv directly. */
2921 if (MEM_P (cplx))
2922 return adjust_address_nv (cplx, imode,
2923 imag_p ? GET_MODE_SIZE (imode) : 0);
2924
2925 /* If the sub-object is at least word sized, then we know that subregging
2926 will work. This special case is important, since extract_bit_field
2927 wants to operate on integer modes, and there's rarely an OImode to
2928 correspond to TCmode. */
2929 if (ibitsize >= BITS_PER_WORD
2930 /* For hard regs we have exact predicates. Assume we can split
2931 the original object if it spans an even number of hard regs.
2932 This special case is important for SCmode on 64-bit platforms
2933 where the natural size of floating-point regs is 32-bit. */
2934 || (REG_P (cplx)
2935 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2936 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2937 {
2938 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2939 imag_p ? GET_MODE_SIZE (imode) : 0);
2940 if (ret)
2941 return ret;
2942 else
2943 /* simplify_gen_subreg may fail for sub-word MEMs. */
2944 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2945 }
2946
2947 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2948 true, NULL_RTX, imode, imode);
2949 }
2950 \f
2951 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2952 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2953 represented in NEW_MODE. If FORCE is true, this will never happen, as
2954 we'll force-create a SUBREG if needed. */
2955
2956 static rtx
2957 emit_move_change_mode (enum machine_mode new_mode,
2958 enum machine_mode old_mode, rtx x, bool force)
2959 {
2960 rtx ret;
2961
2962 if (push_operand (x, GET_MODE (x)))
2963 {
2964 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2965 MEM_COPY_ATTRIBUTES (ret, x);
2966 }
2967 else if (MEM_P (x))
2968 {
2969 /* We don't have to worry about changing the address since the
2970 size in bytes is supposed to be the same. */
2971 if (reload_in_progress)
2972 {
2973 /* Copy the MEM to change the mode and move any
2974 substitutions from the old MEM to the new one. */
2975 ret = adjust_address_nv (x, new_mode, 0);
2976 copy_replacements (x, ret);
2977 }
2978 else
2979 ret = adjust_address (x, new_mode, 0);
2980 }
2981 else
2982 {
2983 /* Note that we do want simplify_subreg's behavior of validating
2984 that the new mode is ok for a hard register. If we were to use
2985 simplify_gen_subreg, we would create the subreg, but would
2986 probably run into the target not being able to implement it. */
2987 /* Except, of course, when FORCE is true, when this is exactly what
2988 we want. Which is needed for CCmodes on some targets. */
2989 if (force)
2990 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
2991 else
2992 ret = simplify_subreg (new_mode, x, old_mode, 0);
2993 }
2994
2995 return ret;
2996 }
2997
2998 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
2999 an integer mode of the same size as MODE. Returns the instruction
3000 emitted, or NULL if such a move could not be generated. */
3001
3002 static rtx
3003 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3004 {
3005 enum machine_mode imode;
3006 enum insn_code code;
3007
3008 /* There must exist a mode of the exact size we require. */
3009 imode = int_mode_for_mode (mode);
3010 if (imode == BLKmode)
3011 return NULL_RTX;
3012
3013 /* The target must support moves in this mode. */
3014 code = optab_handler (mov_optab, imode)->insn_code;
3015 if (code == CODE_FOR_nothing)
3016 return NULL_RTX;
3017
3018 x = emit_move_change_mode (imode, mode, x, force);
3019 if (x == NULL_RTX)
3020 return NULL_RTX;
3021 y = emit_move_change_mode (imode, mode, y, force);
3022 if (y == NULL_RTX)
3023 return NULL_RTX;
3024 return emit_insn (GEN_FCN (code) (x, y));
3025 }
3026
3027 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3028 Return an equivalent MEM that does not use an auto-increment. */
3029
3030 static rtx
3031 emit_move_resolve_push (enum machine_mode mode, rtx x)
3032 {
3033 enum rtx_code code = GET_CODE (XEXP (x, 0));
3034 HOST_WIDE_INT adjust;
3035 rtx temp;
3036
3037 adjust = GET_MODE_SIZE (mode);
3038 #ifdef PUSH_ROUNDING
3039 adjust = PUSH_ROUNDING (adjust);
3040 #endif
3041 if (code == PRE_DEC || code == POST_DEC)
3042 adjust = -adjust;
3043 else if (code == PRE_MODIFY || code == POST_MODIFY)
3044 {
3045 rtx expr = XEXP (XEXP (x, 0), 1);
3046 HOST_WIDE_INT val;
3047
3048 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3049 gcc_assert (GET_CODE (XEXP (expr, 1)) == CONST_INT);
3050 val = INTVAL (XEXP (expr, 1));
3051 if (GET_CODE (expr) == MINUS)
3052 val = -val;
3053 gcc_assert (adjust == val || adjust == -val);
3054 adjust = val;
3055 }
3056
3057 /* Do not use anti_adjust_stack, since we don't want to update
3058 stack_pointer_delta. */
3059 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3060 GEN_INT (adjust), stack_pointer_rtx,
3061 0, OPTAB_LIB_WIDEN);
3062 if (temp != stack_pointer_rtx)
3063 emit_move_insn (stack_pointer_rtx, temp);
3064
3065 switch (code)
3066 {
3067 case PRE_INC:
3068 case PRE_DEC:
3069 case PRE_MODIFY:
3070 temp = stack_pointer_rtx;
3071 break;
3072 case POST_INC:
3073 case POST_DEC:
3074 case POST_MODIFY:
3075 temp = plus_constant (stack_pointer_rtx, -adjust);
3076 break;
3077 default:
3078 gcc_unreachable ();
3079 }
3080
3081 return replace_equiv_address (x, temp);
3082 }
3083
3084 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3085 X is known to satisfy push_operand, and MODE is known to be complex.
3086 Returns the last instruction emitted. */
3087
3088 rtx
3089 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3090 {
3091 enum machine_mode submode = GET_MODE_INNER (mode);
3092 bool imag_first;
3093
3094 #ifdef PUSH_ROUNDING
3095 unsigned int submodesize = GET_MODE_SIZE (submode);
3096
3097 /* In case we output to the stack, but the size is smaller than the
3098 machine can push exactly, we need to use move instructions. */
3099 if (PUSH_ROUNDING (submodesize) != submodesize)
3100 {
3101 x = emit_move_resolve_push (mode, x);
3102 return emit_move_insn (x, y);
3103 }
3104 #endif
3105
3106 /* Note that the real part always precedes the imag part in memory
3107 regardless of machine's endianness. */
3108 switch (GET_CODE (XEXP (x, 0)))
3109 {
3110 case PRE_DEC:
3111 case POST_DEC:
3112 imag_first = true;
3113 break;
3114 case PRE_INC:
3115 case POST_INC:
3116 imag_first = false;
3117 break;
3118 default:
3119 gcc_unreachable ();
3120 }
3121
3122 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3123 read_complex_part (y, imag_first));
3124 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3125 read_complex_part (y, !imag_first));
3126 }
3127
3128 /* A subroutine of emit_move_complex. Perform the move from Y to X
3129 via two moves of the parts. Returns the last instruction emitted. */
3130
3131 rtx
3132 emit_move_complex_parts (rtx x, rtx y)
3133 {
3134 /* Show the output dies here. This is necessary for SUBREGs
3135 of pseudos since we cannot track their lifetimes correctly;
3136 hard regs shouldn't appear here except as return values. */
3137 if (!reload_completed && !reload_in_progress
3138 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3139 emit_clobber (x);
3140
3141 write_complex_part (x, read_complex_part (y, false), false);
3142 write_complex_part (x, read_complex_part (y, true), true);
3143
3144 return get_last_insn ();
3145 }
3146
3147 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3148 MODE is known to be complex. Returns the last instruction emitted. */
3149
3150 static rtx
3151 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3152 {
3153 bool try_int;
3154
3155 /* Need to take special care for pushes, to maintain proper ordering
3156 of the data, and possibly extra padding. */
3157 if (push_operand (x, mode))
3158 return emit_move_complex_push (mode, x, y);
3159
3160 /* See if we can coerce the target into moving both values at once. */
3161
3162 /* Move floating point as parts. */
3163 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3164 && optab_handler (mov_optab, GET_MODE_INNER (mode))->insn_code != CODE_FOR_nothing)
3165 try_int = false;
3166 /* Not possible if the values are inherently not adjacent. */
3167 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3168 try_int = false;
3169 /* Is possible if both are registers (or subregs of registers). */
3170 else if (register_operand (x, mode) && register_operand (y, mode))
3171 try_int = true;
3172 /* If one of the operands is a memory, and alignment constraints
3173 are friendly enough, we may be able to do combined memory operations.
3174 We do not attempt this if Y is a constant because that combination is
3175 usually better with the by-parts thing below. */
3176 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3177 && (!STRICT_ALIGNMENT
3178 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3179 try_int = true;
3180 else
3181 try_int = false;
3182
3183 if (try_int)
3184 {
3185 rtx ret;
3186
3187 /* For memory to memory moves, optimal behavior can be had with the
3188 existing block move logic. */
3189 if (MEM_P (x) && MEM_P (y))
3190 {
3191 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3192 BLOCK_OP_NO_LIBCALL);
3193 return get_last_insn ();
3194 }
3195
3196 ret = emit_move_via_integer (mode, x, y, true);
3197 if (ret)
3198 return ret;
3199 }
3200
3201 return emit_move_complex_parts (x, y);
3202 }
3203
3204 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3205 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3206
3207 static rtx
3208 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3209 {
3210 rtx ret;
3211
3212 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3213 if (mode != CCmode)
3214 {
3215 enum insn_code code = optab_handler (mov_optab, CCmode)->insn_code;
3216 if (code != CODE_FOR_nothing)
3217 {
3218 x = emit_move_change_mode (CCmode, mode, x, true);
3219 y = emit_move_change_mode (CCmode, mode, y, true);
3220 return emit_insn (GEN_FCN (code) (x, y));
3221 }
3222 }
3223
3224 /* Otherwise, find the MODE_INT mode of the same width. */
3225 ret = emit_move_via_integer (mode, x, y, false);
3226 gcc_assert (ret != NULL);
3227 return ret;
3228 }
3229
3230 /* Return true if word I of OP lies entirely in the
3231 undefined bits of a paradoxical subreg. */
3232
3233 static bool
3234 undefined_operand_subword_p (const_rtx op, int i)
3235 {
3236 enum machine_mode innermode, innermostmode;
3237 int offset;
3238 if (GET_CODE (op) != SUBREG)
3239 return false;
3240 innermode = GET_MODE (op);
3241 innermostmode = GET_MODE (SUBREG_REG (op));
3242 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3243 /* The SUBREG_BYTE represents offset, as if the value were stored in
3244 memory, except for a paradoxical subreg where we define
3245 SUBREG_BYTE to be 0; undo this exception as in
3246 simplify_subreg. */
3247 if (SUBREG_BYTE (op) == 0
3248 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3249 {
3250 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3251 if (WORDS_BIG_ENDIAN)
3252 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3253 if (BYTES_BIG_ENDIAN)
3254 offset += difference % UNITS_PER_WORD;
3255 }
3256 if (offset >= GET_MODE_SIZE (innermostmode)
3257 || offset <= -GET_MODE_SIZE (word_mode))
3258 return true;
3259 return false;
3260 }
3261
3262 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3263 MODE is any multi-word or full-word mode that lacks a move_insn
3264 pattern. Note that you will get better code if you define such
3265 patterns, even if they must turn into multiple assembler instructions. */
3266
3267 static rtx
3268 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3269 {
3270 rtx last_insn = 0;
3271 rtx seq, inner;
3272 bool need_clobber;
3273 int i;
3274
3275 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3276
3277 /* If X is a push on the stack, do the push now and replace
3278 X with a reference to the stack pointer. */
3279 if (push_operand (x, mode))
3280 x = emit_move_resolve_push (mode, x);
3281
3282 /* If we are in reload, see if either operand is a MEM whose address
3283 is scheduled for replacement. */
3284 if (reload_in_progress && MEM_P (x)
3285 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3286 x = replace_equiv_address_nv (x, inner);
3287 if (reload_in_progress && MEM_P (y)
3288 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3289 y = replace_equiv_address_nv (y, inner);
3290
3291 start_sequence ();
3292
3293 need_clobber = false;
3294 for (i = 0;
3295 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3296 i++)
3297 {
3298 rtx xpart = operand_subword (x, i, 1, mode);
3299 rtx ypart;
3300
3301 /* Do not generate code for a move if it would come entirely
3302 from the undefined bits of a paradoxical subreg. */
3303 if (undefined_operand_subword_p (y, i))
3304 continue;
3305
3306 ypart = operand_subword (y, i, 1, mode);
3307
3308 /* If we can't get a part of Y, put Y into memory if it is a
3309 constant. Otherwise, force it into a register. Then we must
3310 be able to get a part of Y. */
3311 if (ypart == 0 && CONSTANT_P (y))
3312 {
3313 y = use_anchored_address (force_const_mem (mode, y));
3314 ypart = operand_subword (y, i, 1, mode);
3315 }
3316 else if (ypart == 0)
3317 ypart = operand_subword_force (y, i, mode);
3318
3319 gcc_assert (xpart && ypart);
3320
3321 need_clobber |= (GET_CODE (xpart) == SUBREG);
3322
3323 last_insn = emit_move_insn (xpart, ypart);
3324 }
3325
3326 seq = get_insns ();
3327 end_sequence ();
3328
3329 /* Show the output dies here. This is necessary for SUBREGs
3330 of pseudos since we cannot track their lifetimes correctly;
3331 hard regs shouldn't appear here except as return values.
3332 We never want to emit such a clobber after reload. */
3333 if (x != y
3334 && ! (reload_in_progress || reload_completed)
3335 && need_clobber != 0)
3336 emit_clobber (x);
3337
3338 emit_insn (seq);
3339
3340 return last_insn;
3341 }
3342
3343 /* Low level part of emit_move_insn.
3344 Called just like emit_move_insn, but assumes X and Y
3345 are basically valid. */
3346
3347 rtx
3348 emit_move_insn_1 (rtx x, rtx y)
3349 {
3350 enum machine_mode mode = GET_MODE (x);
3351 enum insn_code code;
3352
3353 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3354
3355 code = optab_handler (mov_optab, mode)->insn_code;
3356 if (code != CODE_FOR_nothing)
3357 return emit_insn (GEN_FCN (code) (x, y));
3358
3359 /* Expand complex moves by moving real part and imag part. */
3360 if (COMPLEX_MODE_P (mode))
3361 return emit_move_complex (mode, x, y);
3362
3363 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3364 || ALL_FIXED_POINT_MODE_P (mode))
3365 {
3366 rtx result = emit_move_via_integer (mode, x, y, true);
3367
3368 /* If we can't find an integer mode, use multi words. */
3369 if (result)
3370 return result;
3371 else
3372 return emit_move_multi_word (mode, x, y);
3373 }
3374
3375 if (GET_MODE_CLASS (mode) == MODE_CC)
3376 return emit_move_ccmode (mode, x, y);
3377
3378 /* Try using a move pattern for the corresponding integer mode. This is
3379 only safe when simplify_subreg can convert MODE constants into integer
3380 constants. At present, it can only do this reliably if the value
3381 fits within a HOST_WIDE_INT. */
3382 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3383 {
3384 rtx ret = emit_move_via_integer (mode, x, y, false);
3385 if (ret)
3386 return ret;
3387 }
3388
3389 return emit_move_multi_word (mode, x, y);
3390 }
3391
3392 /* Generate code to copy Y into X.
3393 Both Y and X must have the same mode, except that
3394 Y can be a constant with VOIDmode.
3395 This mode cannot be BLKmode; use emit_block_move for that.
3396
3397 Return the last instruction emitted. */
3398
3399 rtx
3400 emit_move_insn (rtx x, rtx y)
3401 {
3402 enum machine_mode mode = GET_MODE (x);
3403 rtx y_cst = NULL_RTX;
3404 rtx last_insn, set;
3405
3406 gcc_assert (mode != BLKmode
3407 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3408
3409 if (CONSTANT_P (y))
3410 {
3411 if (optimize
3412 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3413 && (last_insn = compress_float_constant (x, y)))
3414 return last_insn;
3415
3416 y_cst = y;
3417
3418 if (!LEGITIMATE_CONSTANT_P (y))
3419 {
3420 y = force_const_mem (mode, y);
3421
3422 /* If the target's cannot_force_const_mem prevented the spill,
3423 assume that the target's move expanders will also take care
3424 of the non-legitimate constant. */
3425 if (!y)
3426 y = y_cst;
3427 else
3428 y = use_anchored_address (y);
3429 }
3430 }
3431
3432 /* If X or Y are memory references, verify that their addresses are valid
3433 for the machine. */
3434 if (MEM_P (x)
3435 && (! memory_address_p (GET_MODE (x), XEXP (x, 0))
3436 && ! push_operand (x, GET_MODE (x))))
3437 x = validize_mem (x);
3438
3439 if (MEM_P (y)
3440 && ! memory_address_p (GET_MODE (y), XEXP (y, 0)))
3441 y = validize_mem (y);
3442
3443 gcc_assert (mode != BLKmode);
3444
3445 last_insn = emit_move_insn_1 (x, y);
3446
3447 if (y_cst && REG_P (x)
3448 && (set = single_set (last_insn)) != NULL_RTX
3449 && SET_DEST (set) == x
3450 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3451 set_unique_reg_note (last_insn, REG_EQUAL, y_cst);
3452
3453 return last_insn;
3454 }
3455
3456 /* If Y is representable exactly in a narrower mode, and the target can
3457 perform the extension directly from constant or memory, then emit the
3458 move as an extension. */
3459
3460 static rtx
3461 compress_float_constant (rtx x, rtx y)
3462 {
3463 enum machine_mode dstmode = GET_MODE (x);
3464 enum machine_mode orig_srcmode = GET_MODE (y);
3465 enum machine_mode srcmode;
3466 REAL_VALUE_TYPE r;
3467 int oldcost, newcost;
3468 bool speed = optimize_insn_for_speed_p ();
3469
3470 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3471
3472 if (LEGITIMATE_CONSTANT_P (y))
3473 oldcost = rtx_cost (y, SET, speed);
3474 else
3475 oldcost = rtx_cost (force_const_mem (dstmode, y), SET, speed);
3476
3477 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3478 srcmode != orig_srcmode;
3479 srcmode = GET_MODE_WIDER_MODE (srcmode))
3480 {
3481 enum insn_code ic;
3482 rtx trunc_y, last_insn;
3483
3484 /* Skip if the target can't extend this way. */
3485 ic = can_extend_p (dstmode, srcmode, 0);
3486 if (ic == CODE_FOR_nothing)
3487 continue;
3488
3489 /* Skip if the narrowed value isn't exact. */
3490 if (! exact_real_truncate (srcmode, &r))
3491 continue;
3492
3493 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3494
3495 if (LEGITIMATE_CONSTANT_P (trunc_y))
3496 {
3497 /* Skip if the target needs extra instructions to perform
3498 the extension. */
3499 if (! (*insn_data[ic].operand[1].predicate) (trunc_y, srcmode))
3500 continue;
3501 /* This is valid, but may not be cheaper than the original. */
3502 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3503 if (oldcost < newcost)
3504 continue;
3505 }
3506 else if (float_extend_from_mem[dstmode][srcmode])
3507 {
3508 trunc_y = force_const_mem (srcmode, trunc_y);
3509 /* This is valid, but may not be cheaper than the original. */
3510 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3511 if (oldcost < newcost)
3512 continue;
3513 trunc_y = validize_mem (trunc_y);
3514 }
3515 else
3516 continue;
3517
3518 /* For CSE's benefit, force the compressed constant pool entry
3519 into a new pseudo. This constant may be used in different modes,
3520 and if not, combine will put things back together for us. */
3521 trunc_y = force_reg (srcmode, trunc_y);
3522 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3523 last_insn = get_last_insn ();
3524
3525 if (REG_P (x))
3526 set_unique_reg_note (last_insn, REG_EQUAL, y);
3527
3528 return last_insn;
3529 }
3530
3531 return NULL_RTX;
3532 }
3533 \f
3534 /* Pushing data onto the stack. */
3535
3536 /* Push a block of length SIZE (perhaps variable)
3537 and return an rtx to address the beginning of the block.
3538 The value may be virtual_outgoing_args_rtx.
3539
3540 EXTRA is the number of bytes of padding to push in addition to SIZE.
3541 BELOW nonzero means this padding comes at low addresses;
3542 otherwise, the padding comes at high addresses. */
3543
3544 rtx
3545 push_block (rtx size, int extra, int below)
3546 {
3547 rtx temp;
3548
3549 size = convert_modes (Pmode, ptr_mode, size, 1);
3550 if (CONSTANT_P (size))
3551 anti_adjust_stack (plus_constant (size, extra));
3552 else if (REG_P (size) && extra == 0)
3553 anti_adjust_stack (size);
3554 else
3555 {
3556 temp = copy_to_mode_reg (Pmode, size);
3557 if (extra != 0)
3558 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3559 temp, 0, OPTAB_LIB_WIDEN);
3560 anti_adjust_stack (temp);
3561 }
3562
3563 #ifndef STACK_GROWS_DOWNWARD
3564 if (0)
3565 #else
3566 if (1)
3567 #endif
3568 {
3569 temp = virtual_outgoing_args_rtx;
3570 if (extra != 0 && below)
3571 temp = plus_constant (temp, extra);
3572 }
3573 else
3574 {
3575 if (GET_CODE (size) == CONST_INT)
3576 temp = plus_constant (virtual_outgoing_args_rtx,
3577 -INTVAL (size) - (below ? 0 : extra));
3578 else if (extra != 0 && !below)
3579 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3580 negate_rtx (Pmode, plus_constant (size, extra)));
3581 else
3582 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3583 negate_rtx (Pmode, size));
3584 }
3585
3586 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3587 }
3588
3589 #ifdef PUSH_ROUNDING
3590
3591 /* Emit single push insn. */
3592
3593 static void
3594 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3595 {
3596 rtx dest_addr;
3597 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3598 rtx dest;
3599 enum insn_code icode;
3600 insn_operand_predicate_fn pred;
3601
3602 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3603 /* If there is push pattern, use it. Otherwise try old way of throwing
3604 MEM representing push operation to move expander. */
3605 icode = optab_handler (push_optab, mode)->insn_code;
3606 if (icode != CODE_FOR_nothing)
3607 {
3608 if (((pred = insn_data[(int) icode].operand[0].predicate)
3609 && !((*pred) (x, mode))))
3610 x = force_reg (mode, x);
3611 emit_insn (GEN_FCN (icode) (x));
3612 return;
3613 }
3614 if (GET_MODE_SIZE (mode) == rounded_size)
3615 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3616 /* If we are to pad downward, adjust the stack pointer first and
3617 then store X into the stack location using an offset. This is
3618 because emit_move_insn does not know how to pad; it does not have
3619 access to type. */
3620 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3621 {
3622 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3623 HOST_WIDE_INT offset;
3624
3625 emit_move_insn (stack_pointer_rtx,
3626 expand_binop (Pmode,
3627 #ifdef STACK_GROWS_DOWNWARD
3628 sub_optab,
3629 #else
3630 add_optab,
3631 #endif
3632 stack_pointer_rtx,
3633 GEN_INT (rounded_size),
3634 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3635
3636 offset = (HOST_WIDE_INT) padding_size;
3637 #ifdef STACK_GROWS_DOWNWARD
3638 if (STACK_PUSH_CODE == POST_DEC)
3639 /* We have already decremented the stack pointer, so get the
3640 previous value. */
3641 offset += (HOST_WIDE_INT) rounded_size;
3642 #else
3643 if (STACK_PUSH_CODE == POST_INC)
3644 /* We have already incremented the stack pointer, so get the
3645 previous value. */
3646 offset -= (HOST_WIDE_INT) rounded_size;
3647 #endif
3648 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3649 }
3650 else
3651 {
3652 #ifdef STACK_GROWS_DOWNWARD
3653 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3654 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3655 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3656 #else
3657 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3658 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3659 GEN_INT (rounded_size));
3660 #endif
3661 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3662 }
3663
3664 dest = gen_rtx_MEM (mode, dest_addr);
3665
3666 if (type != 0)
3667 {
3668 set_mem_attributes (dest, type, 1);
3669
3670 if (flag_optimize_sibling_calls)
3671 /* Function incoming arguments may overlap with sibling call
3672 outgoing arguments and we cannot allow reordering of reads
3673 from function arguments with stores to outgoing arguments
3674 of sibling calls. */
3675 set_mem_alias_set (dest, 0);
3676 }
3677 emit_move_insn (dest, x);
3678 }
3679 #endif
3680
3681 /* Generate code to push X onto the stack, assuming it has mode MODE and
3682 type TYPE.
3683 MODE is redundant except when X is a CONST_INT (since they don't
3684 carry mode info).
3685 SIZE is an rtx for the size of data to be copied (in bytes),
3686 needed only if X is BLKmode.
3687
3688 ALIGN (in bits) is maximum alignment we can assume.
3689
3690 If PARTIAL and REG are both nonzero, then copy that many of the first
3691 bytes of X into registers starting with REG, and push the rest of X.
3692 The amount of space pushed is decreased by PARTIAL bytes.
3693 REG must be a hard register in this case.
3694 If REG is zero but PARTIAL is not, take any all others actions for an
3695 argument partially in registers, but do not actually load any
3696 registers.
3697
3698 EXTRA is the amount in bytes of extra space to leave next to this arg.
3699 This is ignored if an argument block has already been allocated.
3700
3701 On a machine that lacks real push insns, ARGS_ADDR is the address of
3702 the bottom of the argument block for this call. We use indexing off there
3703 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3704 argument block has not been preallocated.
3705
3706 ARGS_SO_FAR is the size of args previously pushed for this call.
3707
3708 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3709 for arguments passed in registers. If nonzero, it will be the number
3710 of bytes required. */
3711
3712 void
3713 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3714 unsigned int align, int partial, rtx reg, int extra,
3715 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3716 rtx alignment_pad)
3717 {
3718 rtx xinner;
3719 enum direction stack_direction
3720 #ifdef STACK_GROWS_DOWNWARD
3721 = downward;
3722 #else
3723 = upward;
3724 #endif
3725
3726 /* Decide where to pad the argument: `downward' for below,
3727 `upward' for above, or `none' for don't pad it.
3728 Default is below for small data on big-endian machines; else above. */
3729 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3730
3731 /* Invert direction if stack is post-decrement.
3732 FIXME: why? */
3733 if (STACK_PUSH_CODE == POST_DEC)
3734 if (where_pad != none)
3735 where_pad = (where_pad == downward ? upward : downward);
3736
3737 xinner = x;
3738
3739 if (mode == BLKmode
3740 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3741 {
3742 /* Copy a block into the stack, entirely or partially. */
3743
3744 rtx temp;
3745 int used;
3746 int offset;
3747 int skip;
3748
3749 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3750 used = partial - offset;
3751
3752 if (mode != BLKmode)
3753 {
3754 /* A value is to be stored in an insufficiently aligned
3755 stack slot; copy via a suitably aligned slot if
3756 necessary. */
3757 size = GEN_INT (GET_MODE_SIZE (mode));
3758 if (!MEM_P (xinner))
3759 {
3760 temp = assign_temp (type, 0, 1, 1);
3761 emit_move_insn (temp, xinner);
3762 xinner = temp;
3763 }
3764 }
3765
3766 gcc_assert (size);
3767
3768 /* USED is now the # of bytes we need not copy to the stack
3769 because registers will take care of them. */
3770
3771 if (partial != 0)
3772 xinner = adjust_address (xinner, BLKmode, used);
3773
3774 /* If the partial register-part of the arg counts in its stack size,
3775 skip the part of stack space corresponding to the registers.
3776 Otherwise, start copying to the beginning of the stack space,
3777 by setting SKIP to 0. */
3778 skip = (reg_parm_stack_space == 0) ? 0 : used;
3779
3780 #ifdef PUSH_ROUNDING
3781 /* Do it with several push insns if that doesn't take lots of insns
3782 and if there is no difficulty with push insns that skip bytes
3783 on the stack for alignment purposes. */
3784 if (args_addr == 0
3785 && PUSH_ARGS
3786 && GET_CODE (size) == CONST_INT
3787 && skip == 0
3788 && MEM_ALIGN (xinner) >= align
3789 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
3790 /* Here we avoid the case of a structure whose weak alignment
3791 forces many pushes of a small amount of data,
3792 and such small pushes do rounding that causes trouble. */
3793 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
3794 || align >= BIGGEST_ALIGNMENT
3795 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
3796 == (align / BITS_PER_UNIT)))
3797 && PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
3798 {
3799 /* Push padding now if padding above and stack grows down,
3800 or if padding below and stack grows up.
3801 But if space already allocated, this has already been done. */
3802 if (extra && args_addr == 0
3803 && where_pad != none && where_pad != stack_direction)
3804 anti_adjust_stack (GEN_INT (extra));
3805
3806 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
3807 }
3808 else
3809 #endif /* PUSH_ROUNDING */
3810 {
3811 rtx target;
3812
3813 /* Otherwise make space on the stack and copy the data
3814 to the address of that space. */
3815
3816 /* Deduct words put into registers from the size we must copy. */
3817 if (partial != 0)
3818 {
3819 if (GET_CODE (size) == CONST_INT)
3820 size = GEN_INT (INTVAL (size) - used);
3821 else
3822 size = expand_binop (GET_MODE (size), sub_optab, size,
3823 GEN_INT (used), NULL_RTX, 0,
3824 OPTAB_LIB_WIDEN);
3825 }
3826
3827 /* Get the address of the stack space.
3828 In this case, we do not deal with EXTRA separately.
3829 A single stack adjust will do. */
3830 if (! args_addr)
3831 {
3832 temp = push_block (size, extra, where_pad == downward);
3833 extra = 0;
3834 }
3835 else if (GET_CODE (args_so_far) == CONST_INT)
3836 temp = memory_address (BLKmode,
3837 plus_constant (args_addr,
3838 skip + INTVAL (args_so_far)));
3839 else
3840 temp = memory_address (BLKmode,
3841 plus_constant (gen_rtx_PLUS (Pmode,
3842 args_addr,
3843 args_so_far),
3844 skip));
3845
3846 if (!ACCUMULATE_OUTGOING_ARGS)
3847 {
3848 /* If the source is referenced relative to the stack pointer,
3849 copy it to another register to stabilize it. We do not need
3850 to do this if we know that we won't be changing sp. */
3851
3852 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
3853 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
3854 temp = copy_to_reg (temp);
3855 }
3856
3857 target = gen_rtx_MEM (BLKmode, temp);
3858
3859 /* We do *not* set_mem_attributes here, because incoming arguments
3860 may overlap with sibling call outgoing arguments and we cannot
3861 allow reordering of reads from function arguments with stores
3862 to outgoing arguments of sibling calls. We do, however, want
3863 to record the alignment of the stack slot. */
3864 /* ALIGN may well be better aligned than TYPE, e.g. due to
3865 PARM_BOUNDARY. Assume the caller isn't lying. */
3866 set_mem_align (target, align);
3867
3868 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
3869 }
3870 }
3871 else if (partial > 0)
3872 {
3873 /* Scalar partly in registers. */
3874
3875 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
3876 int i;
3877 int not_stack;
3878 /* # bytes of start of argument
3879 that we must make space for but need not store. */
3880 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3881 int args_offset = INTVAL (args_so_far);
3882 int skip;
3883
3884 /* Push padding now if padding above and stack grows down,
3885 or if padding below and stack grows up.
3886 But if space already allocated, this has already been done. */
3887 if (extra && args_addr == 0
3888 && where_pad != none && where_pad != stack_direction)
3889 anti_adjust_stack (GEN_INT (extra));
3890
3891 /* If we make space by pushing it, we might as well push
3892 the real data. Otherwise, we can leave OFFSET nonzero
3893 and leave the space uninitialized. */
3894 if (args_addr == 0)
3895 offset = 0;
3896
3897 /* Now NOT_STACK gets the number of words that we don't need to
3898 allocate on the stack. Convert OFFSET to words too. */
3899 not_stack = (partial - offset) / UNITS_PER_WORD;
3900 offset /= UNITS_PER_WORD;
3901
3902 /* If the partial register-part of the arg counts in its stack size,
3903 skip the part of stack space corresponding to the registers.
3904 Otherwise, start copying to the beginning of the stack space,
3905 by setting SKIP to 0. */
3906 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
3907
3908 if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
3909 x = validize_mem (force_const_mem (mode, x));
3910
3911 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
3912 SUBREGs of such registers are not allowed. */
3913 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
3914 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
3915 x = copy_to_reg (x);
3916
3917 /* Loop over all the words allocated on the stack for this arg. */
3918 /* We can do it by words, because any scalar bigger than a word
3919 has a size a multiple of a word. */
3920 #ifndef PUSH_ARGS_REVERSED
3921 for (i = not_stack; i < size; i++)
3922 #else
3923 for (i = size - 1; i >= not_stack; i--)
3924 #endif
3925 if (i >= not_stack + offset)
3926 emit_push_insn (operand_subword_force (x, i, mode),
3927 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
3928 0, args_addr,
3929 GEN_INT (args_offset + ((i - not_stack + skip)
3930 * UNITS_PER_WORD)),
3931 reg_parm_stack_space, alignment_pad);
3932 }
3933 else
3934 {
3935 rtx addr;
3936 rtx dest;
3937
3938 /* Push padding now if padding above and stack grows down,
3939 or if padding below and stack grows up.
3940 But if space already allocated, this has already been done. */
3941 if (extra && args_addr == 0
3942 && where_pad != none && where_pad != stack_direction)
3943 anti_adjust_stack (GEN_INT (extra));
3944
3945 #ifdef PUSH_ROUNDING
3946 if (args_addr == 0 && PUSH_ARGS)
3947 emit_single_push_insn (mode, x, type);
3948 else
3949 #endif
3950 {
3951 if (GET_CODE (args_so_far) == CONST_INT)
3952 addr
3953 = memory_address (mode,
3954 plus_constant (args_addr,
3955 INTVAL (args_so_far)));
3956 else
3957 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
3958 args_so_far));
3959 dest = gen_rtx_MEM (mode, addr);
3960
3961 /* We do *not* set_mem_attributes here, because incoming arguments
3962 may overlap with sibling call outgoing arguments and we cannot
3963 allow reordering of reads from function arguments with stores
3964 to outgoing arguments of sibling calls. We do, however, want
3965 to record the alignment of the stack slot. */
3966 /* ALIGN may well be better aligned than TYPE, e.g. due to
3967 PARM_BOUNDARY. Assume the caller isn't lying. */
3968 set_mem_align (dest, align);
3969
3970 emit_move_insn (dest, x);
3971 }
3972 }
3973
3974 /* If part should go in registers, copy that part
3975 into the appropriate registers. Do this now, at the end,
3976 since mem-to-mem copies above may do function calls. */
3977 if (partial > 0 && reg != 0)
3978 {
3979 /* Handle calls that pass values in multiple non-contiguous locations.
3980 The Irix 6 ABI has examples of this. */
3981 if (GET_CODE (reg) == PARALLEL)
3982 emit_group_load (reg, x, type, -1);
3983 else
3984 {
3985 gcc_assert (partial % UNITS_PER_WORD == 0);
3986 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
3987 }
3988 }
3989
3990 if (extra && args_addr == 0 && where_pad == stack_direction)
3991 anti_adjust_stack (GEN_INT (extra));
3992
3993 if (alignment_pad && args_addr == 0)
3994 anti_adjust_stack (alignment_pad);
3995 }
3996 \f
3997 /* Return X if X can be used as a subtarget in a sequence of arithmetic
3998 operations. */
3999
4000 static rtx
4001 get_subtarget (rtx x)
4002 {
4003 return (optimize
4004 || x == 0
4005 /* Only registers can be subtargets. */
4006 || !REG_P (x)
4007 /* Don't use hard regs to avoid extending their life. */
4008 || REGNO (x) < FIRST_PSEUDO_REGISTER
4009 ? 0 : x);
4010 }
4011
4012 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4013 FIELD is a bitfield. Returns true if the optimization was successful,
4014 and there's nothing else to do. */
4015
4016 static bool
4017 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4018 unsigned HOST_WIDE_INT bitpos,
4019 enum machine_mode mode1, rtx str_rtx,
4020 tree to, tree src)
4021 {
4022 enum machine_mode str_mode = GET_MODE (str_rtx);
4023 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4024 tree op0, op1;
4025 rtx value, result;
4026 optab binop;
4027
4028 if (mode1 != VOIDmode
4029 || bitsize >= BITS_PER_WORD
4030 || str_bitsize > BITS_PER_WORD
4031 || TREE_SIDE_EFFECTS (to)
4032 || TREE_THIS_VOLATILE (to))
4033 return false;
4034
4035 STRIP_NOPS (src);
4036 if (!BINARY_CLASS_P (src)
4037 || TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4038 return false;
4039
4040 op0 = TREE_OPERAND (src, 0);
4041 op1 = TREE_OPERAND (src, 1);
4042 STRIP_NOPS (op0);
4043
4044 if (!operand_equal_p (to, op0, 0))
4045 return false;
4046
4047 if (MEM_P (str_rtx))
4048 {
4049 unsigned HOST_WIDE_INT offset1;
4050
4051 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4052 str_mode = word_mode;
4053 str_mode = get_best_mode (bitsize, bitpos,
4054 MEM_ALIGN (str_rtx), str_mode, 0);
4055 if (str_mode == VOIDmode)
4056 return false;
4057 str_bitsize = GET_MODE_BITSIZE (str_mode);
4058
4059 offset1 = bitpos;
4060 bitpos %= str_bitsize;
4061 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4062 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4063 }
4064 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4065 return false;
4066
4067 /* If the bit field covers the whole REG/MEM, store_field
4068 will likely generate better code. */
4069 if (bitsize >= str_bitsize)
4070 return false;
4071
4072 /* We can't handle fields split across multiple entities. */
4073 if (bitpos + bitsize > str_bitsize)
4074 return false;
4075
4076 if (BYTES_BIG_ENDIAN)
4077 bitpos = str_bitsize - bitpos - bitsize;
4078
4079 switch (TREE_CODE (src))
4080 {
4081 case PLUS_EXPR:
4082 case MINUS_EXPR:
4083 /* For now, just optimize the case of the topmost bitfield
4084 where we don't need to do any masking and also
4085 1 bit bitfields where xor can be used.
4086 We might win by one instruction for the other bitfields
4087 too if insv/extv instructions aren't used, so that
4088 can be added later. */
4089 if (bitpos + bitsize != str_bitsize
4090 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4091 break;
4092
4093 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4094 value = convert_modes (str_mode,
4095 TYPE_MODE (TREE_TYPE (op1)), value,
4096 TYPE_UNSIGNED (TREE_TYPE (op1)));
4097
4098 /* We may be accessing data outside the field, which means
4099 we can alias adjacent data. */
4100 if (MEM_P (str_rtx))
4101 {
4102 str_rtx = shallow_copy_rtx (str_rtx);
4103 set_mem_alias_set (str_rtx, 0);
4104 set_mem_expr (str_rtx, 0);
4105 }
4106
4107 binop = TREE_CODE (src) == PLUS_EXPR ? add_optab : sub_optab;
4108 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4109 {
4110 value = expand_and (str_mode, value, const1_rtx, NULL);
4111 binop = xor_optab;
4112 }
4113 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4114 build_int_cst (NULL_TREE, bitpos),
4115 NULL_RTX, 1);
4116 result = expand_binop (str_mode, binop, str_rtx,
4117 value, str_rtx, 1, OPTAB_WIDEN);
4118 if (result != str_rtx)
4119 emit_move_insn (str_rtx, result);
4120 return true;
4121
4122 case BIT_IOR_EXPR:
4123 case BIT_XOR_EXPR:
4124 if (TREE_CODE (op1) != INTEGER_CST)
4125 break;
4126 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4127 value = convert_modes (GET_MODE (str_rtx),
4128 TYPE_MODE (TREE_TYPE (op1)), value,
4129 TYPE_UNSIGNED (TREE_TYPE (op1)));
4130
4131 /* We may be accessing data outside the field, which means
4132 we can alias adjacent data. */
4133 if (MEM_P (str_rtx))
4134 {
4135 str_rtx = shallow_copy_rtx (str_rtx);
4136 set_mem_alias_set (str_rtx, 0);
4137 set_mem_expr (str_rtx, 0);
4138 }
4139
4140 binop = TREE_CODE (src) == BIT_IOR_EXPR ? ior_optab : xor_optab;
4141 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4142 {
4143 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4144 - 1);
4145 value = expand_and (GET_MODE (str_rtx), value, mask,
4146 NULL_RTX);
4147 }
4148 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4149 build_int_cst (NULL_TREE, bitpos),
4150 NULL_RTX, 1);
4151 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4152 value, str_rtx, 1, OPTAB_WIDEN);
4153 if (result != str_rtx)
4154 emit_move_insn (str_rtx, result);
4155 return true;
4156
4157 default:
4158 break;
4159 }
4160
4161 return false;
4162 }
4163
4164
4165 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4166 is true, try generating a nontemporal store. */
4167
4168 void
4169 expand_assignment (tree to, tree from, bool nontemporal)
4170 {
4171 rtx to_rtx = 0;
4172 rtx result;
4173
4174 /* Don't crash if the lhs of the assignment was erroneous. */
4175 if (TREE_CODE (to) == ERROR_MARK)
4176 {
4177 result = expand_normal (from);
4178 return;
4179 }
4180
4181 /* Optimize away no-op moves without side-effects. */
4182 if (operand_equal_p (to, from, 0))
4183 return;
4184
4185 /* Assignment of a structure component needs special treatment
4186 if the structure component's rtx is not simply a MEM.
4187 Assignment of an array element at a constant index, and assignment of
4188 an array element in an unaligned packed structure field, has the same
4189 problem. */
4190 if (handled_component_p (to)
4191 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4192 {
4193 enum machine_mode mode1;
4194 HOST_WIDE_INT bitsize, bitpos;
4195 tree offset;
4196 int unsignedp;
4197 int volatilep = 0;
4198 tree tem;
4199
4200 push_temp_slots ();
4201 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4202 &unsignedp, &volatilep, true);
4203
4204 /* If we are going to use store_bit_field and extract_bit_field,
4205 make sure to_rtx will be safe for multiple use. */
4206
4207 to_rtx = expand_normal (tem);
4208
4209 if (offset != 0)
4210 {
4211 rtx offset_rtx;
4212
4213 if (!MEM_P (to_rtx))
4214 {
4215 /* We can get constant negative offsets into arrays with broken
4216 user code. Translate this to a trap instead of ICEing. */
4217 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4218 expand_builtin_trap ();
4219 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4220 }
4221
4222 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4223 #ifdef POINTERS_EXTEND_UNSIGNED
4224 if (GET_MODE (offset_rtx) != Pmode)
4225 offset_rtx = convert_to_mode (Pmode, offset_rtx, 0);
4226 #else
4227 if (GET_MODE (offset_rtx) != ptr_mode)
4228 offset_rtx = convert_to_mode (ptr_mode, offset_rtx, 0);
4229 #endif
4230
4231 /* A constant address in TO_RTX can have VOIDmode, we must not try
4232 to call force_reg for that case. Avoid that case. */
4233 if (MEM_P (to_rtx)
4234 && GET_MODE (to_rtx) == BLKmode
4235 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4236 && bitsize > 0
4237 && (bitpos % bitsize) == 0
4238 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4239 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4240 {
4241 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4242 bitpos = 0;
4243 }
4244
4245 to_rtx = offset_address (to_rtx, offset_rtx,
4246 highest_pow2_factor_for_target (to,
4247 offset));
4248 }
4249
4250 /* Handle expand_expr of a complex value returning a CONCAT. */
4251 if (GET_CODE (to_rtx) == CONCAT)
4252 {
4253 if (TREE_CODE (TREE_TYPE (from)) == COMPLEX_TYPE)
4254 {
4255 gcc_assert (bitpos == 0);
4256 result = store_expr (from, to_rtx, false, nontemporal);
4257 }
4258 else
4259 {
4260 gcc_assert (bitpos == 0 || bitpos == GET_MODE_BITSIZE (mode1));
4261 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4262 nontemporal);
4263 }
4264 }
4265 else
4266 {
4267 if (MEM_P (to_rtx))
4268 {
4269 /* If the field is at offset zero, we could have been given the
4270 DECL_RTX of the parent struct. Don't munge it. */
4271 to_rtx = shallow_copy_rtx (to_rtx);
4272
4273 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4274
4275 /* Deal with volatile and readonly fields. The former is only
4276 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4277 if (volatilep)
4278 MEM_VOLATILE_P (to_rtx) = 1;
4279 if (component_uses_parent_alias_set (to))
4280 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4281 }
4282
4283 if (optimize_bitfield_assignment_op (bitsize, bitpos, mode1,
4284 to_rtx, to, from))
4285 result = NULL;
4286 else
4287 result = store_field (to_rtx, bitsize, bitpos, mode1, from,
4288 TREE_TYPE (tem), get_alias_set (to),
4289 nontemporal);
4290 }
4291
4292 if (result)
4293 preserve_temp_slots (result);
4294 free_temp_slots ();
4295 pop_temp_slots ();
4296 return;
4297 }
4298
4299 /* If the rhs is a function call and its value is not an aggregate,
4300 call the function before we start to compute the lhs.
4301 This is needed for correct code for cases such as
4302 val = setjmp (buf) on machines where reference to val
4303 requires loading up part of an address in a separate insn.
4304
4305 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4306 since it might be a promoted variable where the zero- or sign- extension
4307 needs to be done. Handling this in the normal way is safe because no
4308 computation is done before the call. The same is true for SSA names. */
4309 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4310 && COMPLETE_TYPE_P (TREE_TYPE (from))
4311 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4312 && ! (((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
4313 && REG_P (DECL_RTL (to)))
4314 || TREE_CODE (to) == SSA_NAME))
4315 {
4316 rtx value;
4317
4318 push_temp_slots ();
4319 value = expand_normal (from);
4320 if (to_rtx == 0)
4321 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4322
4323 /* Handle calls that return values in multiple non-contiguous locations.
4324 The Irix 6 ABI has examples of this. */
4325 if (GET_CODE (to_rtx) == PARALLEL)
4326 emit_group_load (to_rtx, value, TREE_TYPE (from),
4327 int_size_in_bytes (TREE_TYPE (from)));
4328 else if (GET_MODE (to_rtx) == BLKmode)
4329 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4330 else
4331 {
4332 if (POINTER_TYPE_P (TREE_TYPE (to)))
4333 value = convert_memory_address (GET_MODE (to_rtx), value);
4334 emit_move_insn (to_rtx, value);
4335 }
4336 preserve_temp_slots (to_rtx);
4337 free_temp_slots ();
4338 pop_temp_slots ();
4339 return;
4340 }
4341
4342 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
4343 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
4344
4345 if (to_rtx == 0)
4346 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4347
4348 /* Don't move directly into a return register. */
4349 if (TREE_CODE (to) == RESULT_DECL
4350 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4351 {
4352 rtx temp;
4353
4354 push_temp_slots ();
4355 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4356
4357 if (GET_CODE (to_rtx) == PARALLEL)
4358 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4359 int_size_in_bytes (TREE_TYPE (from)));
4360 else
4361 emit_move_insn (to_rtx, temp);
4362
4363 preserve_temp_slots (to_rtx);
4364 free_temp_slots ();
4365 pop_temp_slots ();
4366 return;
4367 }
4368
4369 /* In case we are returning the contents of an object which overlaps
4370 the place the value is being stored, use a safe function when copying
4371 a value through a pointer into a structure value return block. */
4372 if (TREE_CODE (to) == RESULT_DECL && TREE_CODE (from) == INDIRECT_REF
4373 && cfun->returns_struct
4374 && !cfun->returns_pcc_struct)
4375 {
4376 rtx from_rtx, size;
4377
4378 push_temp_slots ();
4379 size = expr_size (from);
4380 from_rtx = expand_normal (from);
4381
4382 emit_library_call (memmove_libfunc, LCT_NORMAL,
4383 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4384 XEXP (from_rtx, 0), Pmode,
4385 convert_to_mode (TYPE_MODE (sizetype),
4386 size, TYPE_UNSIGNED (sizetype)),
4387 TYPE_MODE (sizetype));
4388
4389 preserve_temp_slots (to_rtx);
4390 free_temp_slots ();
4391 pop_temp_slots ();
4392 return;
4393 }
4394
4395 /* Compute FROM and store the value in the rtx we got. */
4396
4397 push_temp_slots ();
4398 result = store_expr (from, to_rtx, 0, nontemporal);
4399 preserve_temp_slots (result);
4400 free_temp_slots ();
4401 pop_temp_slots ();
4402 return;
4403 }
4404
4405 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4406 succeeded, false otherwise. */
4407
4408 static bool
4409 emit_storent_insn (rtx to, rtx from)
4410 {
4411 enum machine_mode mode = GET_MODE (to), imode;
4412 enum insn_code code = optab_handler (storent_optab, mode)->insn_code;
4413 rtx pattern;
4414
4415 if (code == CODE_FOR_nothing)
4416 return false;
4417
4418 imode = insn_data[code].operand[0].mode;
4419 if (!insn_data[code].operand[0].predicate (to, imode))
4420 return false;
4421
4422 imode = insn_data[code].operand[1].mode;
4423 if (!insn_data[code].operand[1].predicate (from, imode))
4424 {
4425 from = copy_to_mode_reg (imode, from);
4426 if (!insn_data[code].operand[1].predicate (from, imode))
4427 return false;
4428 }
4429
4430 pattern = GEN_FCN (code) (to, from);
4431 if (pattern == NULL_RTX)
4432 return false;
4433
4434 emit_insn (pattern);
4435 return true;
4436 }
4437
4438 /* Generate code for computing expression EXP,
4439 and storing the value into TARGET.
4440
4441 If the mode is BLKmode then we may return TARGET itself.
4442 It turns out that in BLKmode it doesn't cause a problem.
4443 because C has no operators that could combine two different
4444 assignments into the same BLKmode object with different values
4445 with no sequence point. Will other languages need this to
4446 be more thorough?
4447
4448 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4449 stack, and block moves may need to be treated specially.
4450
4451 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4452
4453 rtx
4454 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4455 {
4456 rtx temp;
4457 rtx alt_rtl = NULL_RTX;
4458 int dont_return_target = 0;
4459
4460 if (VOID_TYPE_P (TREE_TYPE (exp)))
4461 {
4462 /* C++ can generate ?: expressions with a throw expression in one
4463 branch and an rvalue in the other. Here, we resolve attempts to
4464 store the throw expression's nonexistent result. */
4465 gcc_assert (!call_param_p);
4466 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4467 return NULL_RTX;
4468 }
4469 if (TREE_CODE (exp) == COMPOUND_EXPR)
4470 {
4471 /* Perform first part of compound expression, then assign from second
4472 part. */
4473 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4474 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4475 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4476 nontemporal);
4477 }
4478 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4479 {
4480 /* For conditional expression, get safe form of the target. Then
4481 test the condition, doing the appropriate assignment on either
4482 side. This avoids the creation of unnecessary temporaries.
4483 For non-BLKmode, it is more efficient not to do this. */
4484
4485 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
4486
4487 do_pending_stack_adjust ();
4488 NO_DEFER_POP;
4489 jumpifnot (TREE_OPERAND (exp, 0), lab1);
4490 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4491 nontemporal);
4492 emit_jump_insn (gen_jump (lab2));
4493 emit_barrier ();
4494 emit_label (lab1);
4495 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
4496 nontemporal);
4497 emit_label (lab2);
4498 OK_DEFER_POP;
4499
4500 return NULL_RTX;
4501 }
4502 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
4503 /* If this is a scalar in a register that is stored in a wider mode
4504 than the declared mode, compute the result into its declared mode
4505 and then convert to the wider mode. Our value is the computed
4506 expression. */
4507 {
4508 rtx inner_target = 0;
4509
4510 /* We can do the conversion inside EXP, which will often result
4511 in some optimizations. Do the conversion in two steps: first
4512 change the signedness, if needed, then the extend. But don't
4513 do this if the type of EXP is a subtype of something else
4514 since then the conversion might involve more than just
4515 converting modes. */
4516 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
4517 && TREE_TYPE (TREE_TYPE (exp)) == 0
4518 && GET_MODE_PRECISION (GET_MODE (target))
4519 == TYPE_PRECISION (TREE_TYPE (exp)))
4520 {
4521 if (TYPE_UNSIGNED (TREE_TYPE (exp))
4522 != SUBREG_PROMOTED_UNSIGNED_P (target))
4523 {
4524 /* Some types, e.g. Fortran's logical*4, won't have a signed
4525 version, so use the mode instead. */
4526 tree ntype
4527 = (signed_or_unsigned_type_for
4528 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
4529 if (ntype == NULL)
4530 ntype = lang_hooks.types.type_for_mode
4531 (TYPE_MODE (TREE_TYPE (exp)),
4532 SUBREG_PROMOTED_UNSIGNED_P (target));
4533
4534 exp = fold_convert (ntype, exp);
4535 }
4536
4537 exp = fold_convert (lang_hooks.types.type_for_mode
4538 (GET_MODE (SUBREG_REG (target)),
4539 SUBREG_PROMOTED_UNSIGNED_P (target)),
4540 exp);
4541
4542 inner_target = SUBREG_REG (target);
4543 }
4544
4545 temp = expand_expr (exp, inner_target, VOIDmode,
4546 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4547
4548 /* If TEMP is a VOIDmode constant, use convert_modes to make
4549 sure that we properly convert it. */
4550 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
4551 {
4552 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4553 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
4554 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
4555 GET_MODE (target), temp,
4556 SUBREG_PROMOTED_UNSIGNED_P (target));
4557 }
4558
4559 convert_move (SUBREG_REG (target), temp,
4560 SUBREG_PROMOTED_UNSIGNED_P (target));
4561
4562 return NULL_RTX;
4563 }
4564 else if (TREE_CODE (exp) == STRING_CST
4565 && !nontemporal && !call_param_p
4566 && TREE_STRING_LENGTH (exp) > 0
4567 && TYPE_MODE (TREE_TYPE (exp)) == BLKmode)
4568 {
4569 /* Optimize initialization of an array with a STRING_CST. */
4570 HOST_WIDE_INT exp_len, str_copy_len;
4571 rtx dest_mem;
4572
4573 exp_len = int_expr_size (exp);
4574 if (exp_len <= 0)
4575 goto normal_expr;
4576
4577 str_copy_len = strlen (TREE_STRING_POINTER (exp));
4578 if (str_copy_len < TREE_STRING_LENGTH (exp) - 1)
4579 goto normal_expr;
4580
4581 str_copy_len = TREE_STRING_LENGTH (exp);
4582 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0)
4583 {
4584 str_copy_len += STORE_MAX_PIECES - 1;
4585 str_copy_len &= ~(STORE_MAX_PIECES - 1);
4586 }
4587 str_copy_len = MIN (str_copy_len, exp_len);
4588 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
4589 CONST_CAST(char *, TREE_STRING_POINTER (exp)),
4590 MEM_ALIGN (target), false))
4591 goto normal_expr;
4592
4593 dest_mem = target;
4594
4595 dest_mem = store_by_pieces (dest_mem,
4596 str_copy_len, builtin_strncpy_read_str,
4597 CONST_CAST(char *, TREE_STRING_POINTER (exp)),
4598 MEM_ALIGN (target), false,
4599 exp_len > str_copy_len ? 1 : 0);
4600 if (exp_len > str_copy_len)
4601 clear_storage (adjust_address (dest_mem, BLKmode, 0),
4602 GEN_INT (exp_len - str_copy_len),
4603 BLOCK_OP_NORMAL);
4604 return NULL_RTX;
4605 }
4606 else
4607 {
4608 rtx tmp_target;
4609
4610 normal_expr:
4611 /* If we want to use a nontemporal store, force the value to
4612 register first. */
4613 tmp_target = nontemporal ? NULL_RTX : target;
4614 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
4615 (call_param_p
4616 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
4617 &alt_rtl);
4618 /* Return TARGET if it's a specified hardware register.
4619 If TARGET is a volatile mem ref, either return TARGET
4620 or return a reg copied *from* TARGET; ANSI requires this.
4621
4622 Otherwise, if TEMP is not TARGET, return TEMP
4623 if it is constant (for efficiency),
4624 or if we really want the correct value. */
4625 if (!(target && REG_P (target)
4626 && REGNO (target) < FIRST_PSEUDO_REGISTER)
4627 && !(MEM_P (target) && MEM_VOLATILE_P (target))
4628 && ! rtx_equal_p (temp, target)
4629 && CONSTANT_P (temp))
4630 dont_return_target = 1;
4631 }
4632
4633 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
4634 the same as that of TARGET, adjust the constant. This is needed, for
4635 example, in case it is a CONST_DOUBLE and we want only a word-sized
4636 value. */
4637 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
4638 && TREE_CODE (exp) != ERROR_MARK
4639 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
4640 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4641 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
4642
4643 /* If value was not generated in the target, store it there.
4644 Convert the value to TARGET's type first if necessary and emit the
4645 pending incrementations that have been queued when expanding EXP.
4646 Note that we cannot emit the whole queue blindly because this will
4647 effectively disable the POST_INC optimization later.
4648
4649 If TEMP and TARGET compare equal according to rtx_equal_p, but
4650 one or both of them are volatile memory refs, we have to distinguish
4651 two cases:
4652 - expand_expr has used TARGET. In this case, we must not generate
4653 another copy. This can be detected by TARGET being equal according
4654 to == .
4655 - expand_expr has not used TARGET - that means that the source just
4656 happens to have the same RTX form. Since temp will have been created
4657 by expand_expr, it will compare unequal according to == .
4658 We must generate a copy in this case, to reach the correct number
4659 of volatile memory references. */
4660
4661 if ((! rtx_equal_p (temp, target)
4662 || (temp != target && (side_effects_p (temp)
4663 || side_effects_p (target))))
4664 && TREE_CODE (exp) != ERROR_MARK
4665 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
4666 but TARGET is not valid memory reference, TEMP will differ
4667 from TARGET although it is really the same location. */
4668 && !(alt_rtl && rtx_equal_p (alt_rtl, target))
4669 /* If there's nothing to copy, don't bother. Don't call
4670 expr_size unless necessary, because some front-ends (C++)
4671 expr_size-hook must not be given objects that are not
4672 supposed to be bit-copied or bit-initialized. */
4673 && expr_size (exp) != const0_rtx)
4674 {
4675 if (GET_MODE (temp) != GET_MODE (target)
4676 && GET_MODE (temp) != VOIDmode)
4677 {
4678 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
4679 if (dont_return_target)
4680 {
4681 /* In this case, we will return TEMP,
4682 so make sure it has the proper mode.
4683 But don't forget to store the value into TARGET. */
4684 temp = convert_to_mode (GET_MODE (target), temp, unsignedp);
4685 emit_move_insn (target, temp);
4686 }
4687 else if (GET_MODE (target) == BLKmode
4688 || GET_MODE (temp) == BLKmode)
4689 emit_block_move (target, temp, expr_size (exp),
4690 (call_param_p
4691 ? BLOCK_OP_CALL_PARM
4692 : BLOCK_OP_NORMAL));
4693 else
4694 convert_move (target, temp, unsignedp);
4695 }
4696
4697 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
4698 {
4699 /* Handle copying a string constant into an array. The string
4700 constant may be shorter than the array. So copy just the string's
4701 actual length, and clear the rest. First get the size of the data
4702 type of the string, which is actually the size of the target. */
4703 rtx size = expr_size (exp);
4704
4705 if (GET_CODE (size) == CONST_INT
4706 && INTVAL (size) < TREE_STRING_LENGTH (exp))
4707 emit_block_move (target, temp, size,
4708 (call_param_p
4709 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4710 else
4711 {
4712 /* Compute the size of the data to copy from the string. */
4713 tree copy_size
4714 = size_binop (MIN_EXPR,
4715 make_tree (sizetype, size),
4716 size_int (TREE_STRING_LENGTH (exp)));
4717 rtx copy_size_rtx
4718 = expand_expr (copy_size, NULL_RTX, VOIDmode,
4719 (call_param_p
4720 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
4721 rtx label = 0;
4722
4723 /* Copy that much. */
4724 copy_size_rtx = convert_to_mode (ptr_mode, copy_size_rtx,
4725 TYPE_UNSIGNED (sizetype));
4726 emit_block_move (target, temp, copy_size_rtx,
4727 (call_param_p
4728 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4729
4730 /* Figure out how much is left in TARGET that we have to clear.
4731 Do all calculations in ptr_mode. */
4732 if (GET_CODE (copy_size_rtx) == CONST_INT)
4733 {
4734 size = plus_constant (size, -INTVAL (copy_size_rtx));
4735 target = adjust_address (target, BLKmode,
4736 INTVAL (copy_size_rtx));
4737 }
4738 else
4739 {
4740 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
4741 copy_size_rtx, NULL_RTX, 0,
4742 OPTAB_LIB_WIDEN);
4743
4744 #ifdef POINTERS_EXTEND_UNSIGNED
4745 if (GET_MODE (copy_size_rtx) != Pmode)
4746 copy_size_rtx = convert_to_mode (Pmode, copy_size_rtx,
4747 TYPE_UNSIGNED (sizetype));
4748 #endif
4749
4750 target = offset_address (target, copy_size_rtx,
4751 highest_pow2_factor (copy_size));
4752 label = gen_label_rtx ();
4753 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
4754 GET_MODE (size), 0, label);
4755 }
4756
4757 if (size != const0_rtx)
4758 clear_storage (target, size, BLOCK_OP_NORMAL);
4759
4760 if (label)
4761 emit_label (label);
4762 }
4763 }
4764 /* Handle calls that return values in multiple non-contiguous locations.
4765 The Irix 6 ABI has examples of this. */
4766 else if (GET_CODE (target) == PARALLEL)
4767 emit_group_load (target, temp, TREE_TYPE (exp),
4768 int_size_in_bytes (TREE_TYPE (exp)));
4769 else if (GET_MODE (temp) == BLKmode)
4770 emit_block_move (target, temp, expr_size (exp),
4771 (call_param_p
4772 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4773 else if (nontemporal
4774 && emit_storent_insn (target, temp))
4775 /* If we managed to emit a nontemporal store, there is nothing else to
4776 do. */
4777 ;
4778 else
4779 {
4780 temp = force_operand (temp, target);
4781 if (temp != target)
4782 emit_move_insn (target, temp);
4783 }
4784 }
4785
4786 return NULL_RTX;
4787 }
4788 \f
4789 /* Helper for categorize_ctor_elements. Identical interface. */
4790
4791 static bool
4792 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
4793 HOST_WIDE_INT *p_elt_count,
4794 bool *p_must_clear)
4795 {
4796 unsigned HOST_WIDE_INT idx;
4797 HOST_WIDE_INT nz_elts, elt_count;
4798 tree value, purpose;
4799
4800 /* Whether CTOR is a valid constant initializer, in accordance with what
4801 initializer_constant_valid_p does. If inferred from the constructor
4802 elements, true until proven otherwise. */
4803 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
4804 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
4805
4806 nz_elts = 0;
4807 elt_count = 0;
4808
4809 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
4810 {
4811 HOST_WIDE_INT mult;
4812
4813 mult = 1;
4814 if (TREE_CODE (purpose) == RANGE_EXPR)
4815 {
4816 tree lo_index = TREE_OPERAND (purpose, 0);
4817 tree hi_index = TREE_OPERAND (purpose, 1);
4818
4819 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
4820 mult = (tree_low_cst (hi_index, 1)
4821 - tree_low_cst (lo_index, 1) + 1);
4822 }
4823
4824 switch (TREE_CODE (value))
4825 {
4826 case CONSTRUCTOR:
4827 {
4828 HOST_WIDE_INT nz = 0, ic = 0;
4829
4830 bool const_elt_p
4831 = categorize_ctor_elements_1 (value, &nz, &ic, p_must_clear);
4832
4833 nz_elts += mult * nz;
4834 elt_count += mult * ic;
4835
4836 if (const_from_elts_p && const_p)
4837 const_p = const_elt_p;
4838 }
4839 break;
4840
4841 case INTEGER_CST:
4842 case REAL_CST:
4843 case FIXED_CST:
4844 if (!initializer_zerop (value))
4845 nz_elts += mult;
4846 elt_count += mult;
4847 break;
4848
4849 case STRING_CST:
4850 nz_elts += mult * TREE_STRING_LENGTH (value);
4851 elt_count += mult * TREE_STRING_LENGTH (value);
4852 break;
4853
4854 case COMPLEX_CST:
4855 if (!initializer_zerop (TREE_REALPART (value)))
4856 nz_elts += mult;
4857 if (!initializer_zerop (TREE_IMAGPART (value)))
4858 nz_elts += mult;
4859 elt_count += mult;
4860 break;
4861
4862 case VECTOR_CST:
4863 {
4864 tree v;
4865 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
4866 {
4867 if (!initializer_zerop (TREE_VALUE (v)))
4868 nz_elts += mult;
4869 elt_count += mult;
4870 }
4871 }
4872 break;
4873
4874 default:
4875 nz_elts += mult;
4876 elt_count += mult;
4877
4878 if (const_from_elts_p && const_p)
4879 const_p = initializer_constant_valid_p (value, TREE_TYPE (value))
4880 != NULL_TREE;
4881 break;
4882 }
4883 }
4884
4885 if (!*p_must_clear
4886 && (TREE_CODE (TREE_TYPE (ctor)) == UNION_TYPE
4887 || TREE_CODE (TREE_TYPE (ctor)) == QUAL_UNION_TYPE))
4888 {
4889 tree init_sub_type;
4890 bool clear_this = true;
4891
4892 if (!VEC_empty (constructor_elt, CONSTRUCTOR_ELTS (ctor)))
4893 {
4894 /* We don't expect more than one element of the union to be
4895 initialized. Not sure what we should do otherwise... */
4896 gcc_assert (VEC_length (constructor_elt, CONSTRUCTOR_ELTS (ctor))
4897 == 1);
4898
4899 init_sub_type = TREE_TYPE (VEC_index (constructor_elt,
4900 CONSTRUCTOR_ELTS (ctor),
4901 0)->value);
4902
4903 /* ??? We could look at each element of the union, and find the
4904 largest element. Which would avoid comparing the size of the
4905 initialized element against any tail padding in the union.
4906 Doesn't seem worth the effort... */
4907 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (ctor)),
4908 TYPE_SIZE (init_sub_type)) == 1)
4909 {
4910 /* And now we have to find out if the element itself is fully
4911 constructed. E.g. for union { struct { int a, b; } s; } u
4912 = { .s = { .a = 1 } }. */
4913 if (elt_count == count_type_elements (init_sub_type, false))
4914 clear_this = false;
4915 }
4916 }
4917
4918 *p_must_clear = clear_this;
4919 }
4920
4921 *p_nz_elts += nz_elts;
4922 *p_elt_count += elt_count;
4923
4924 return const_p;
4925 }
4926
4927 /* Examine CTOR to discover:
4928 * how many scalar fields are set to nonzero values,
4929 and place it in *P_NZ_ELTS;
4930 * how many scalar fields in total are in CTOR,
4931 and place it in *P_ELT_COUNT.
4932 * if a type is a union, and the initializer from the constructor
4933 is not the largest element in the union, then set *p_must_clear.
4934
4935 Return whether or not CTOR is a valid static constant initializer, the same
4936 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
4937
4938 bool
4939 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
4940 HOST_WIDE_INT *p_elt_count,
4941 bool *p_must_clear)
4942 {
4943 *p_nz_elts = 0;
4944 *p_elt_count = 0;
4945 *p_must_clear = false;
4946
4947 return
4948 categorize_ctor_elements_1 (ctor, p_nz_elts, p_elt_count, p_must_clear);
4949 }
4950
4951 /* Count the number of scalars in TYPE. Return -1 on overflow or
4952 variable-sized. If ALLOW_FLEXARR is true, don't count flexible
4953 array member at the end of the structure. */
4954
4955 HOST_WIDE_INT
4956 count_type_elements (const_tree type, bool allow_flexarr)
4957 {
4958 const HOST_WIDE_INT max = ~((HOST_WIDE_INT)1 << (HOST_BITS_PER_WIDE_INT-1));
4959 switch (TREE_CODE (type))
4960 {
4961 case ARRAY_TYPE:
4962 {
4963 tree telts = array_type_nelts (type);
4964 if (telts && host_integerp (telts, 1))
4965 {
4966 HOST_WIDE_INT n = tree_low_cst (telts, 1) + 1;
4967 HOST_WIDE_INT m = count_type_elements (TREE_TYPE (type), false);
4968 if (n == 0)
4969 return 0;
4970 else if (max / n > m)
4971 return n * m;
4972 }
4973 return -1;
4974 }
4975
4976 case RECORD_TYPE:
4977 {
4978 HOST_WIDE_INT n = 0, t;
4979 tree f;
4980
4981 for (f = TYPE_FIELDS (type); f ; f = TREE_CHAIN (f))
4982 if (TREE_CODE (f) == FIELD_DECL)
4983 {
4984 t = count_type_elements (TREE_TYPE (f), false);
4985 if (t < 0)
4986 {
4987 /* Check for structures with flexible array member. */
4988 tree tf = TREE_TYPE (f);
4989 if (allow_flexarr
4990 && TREE_CHAIN (f) == NULL
4991 && TREE_CODE (tf) == ARRAY_TYPE
4992 && TYPE_DOMAIN (tf)
4993 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
4994 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
4995 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
4996 && int_size_in_bytes (type) >= 0)
4997 break;
4998
4999 return -1;
5000 }
5001 n += t;
5002 }
5003
5004 return n;
5005 }
5006
5007 case UNION_TYPE:
5008 case QUAL_UNION_TYPE:
5009 return -1;
5010
5011 case COMPLEX_TYPE:
5012 return 2;
5013
5014 case VECTOR_TYPE:
5015 return TYPE_VECTOR_SUBPARTS (type);
5016
5017 case INTEGER_TYPE:
5018 case REAL_TYPE:
5019 case FIXED_POINT_TYPE:
5020 case ENUMERAL_TYPE:
5021 case BOOLEAN_TYPE:
5022 case POINTER_TYPE:
5023 case OFFSET_TYPE:
5024 case REFERENCE_TYPE:
5025 return 1;
5026
5027 case ERROR_MARK:
5028 return 0;
5029
5030 case VOID_TYPE:
5031 case METHOD_TYPE:
5032 case FUNCTION_TYPE:
5033 case LANG_TYPE:
5034 default:
5035 gcc_unreachable ();
5036 }
5037 }
5038
5039 /* Return 1 if EXP contains mostly (3/4) zeros. */
5040
5041 static int
5042 mostly_zeros_p (const_tree exp)
5043 {
5044 if (TREE_CODE (exp) == CONSTRUCTOR)
5045
5046 {
5047 HOST_WIDE_INT nz_elts, count, elts;
5048 bool must_clear;
5049
5050 categorize_ctor_elements (exp, &nz_elts, &count, &must_clear);
5051 if (must_clear)
5052 return 1;
5053
5054 elts = count_type_elements (TREE_TYPE (exp), false);
5055
5056 return nz_elts < elts / 4;
5057 }
5058
5059 return initializer_zerop (exp);
5060 }
5061
5062 /* Return 1 if EXP contains all zeros. */
5063
5064 static int
5065 all_zeros_p (const_tree exp)
5066 {
5067 if (TREE_CODE (exp) == CONSTRUCTOR)
5068
5069 {
5070 HOST_WIDE_INT nz_elts, count;
5071 bool must_clear;
5072
5073 categorize_ctor_elements (exp, &nz_elts, &count, &must_clear);
5074 return nz_elts == 0;
5075 }
5076
5077 return initializer_zerop (exp);
5078 }
5079 \f
5080 /* Helper function for store_constructor.
5081 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5082 TYPE is the type of the CONSTRUCTOR, not the element type.
5083 CLEARED is as for store_constructor.
5084 ALIAS_SET is the alias set to use for any stores.
5085
5086 This provides a recursive shortcut back to store_constructor when it isn't
5087 necessary to go through store_field. This is so that we can pass through
5088 the cleared field to let store_constructor know that we may not have to
5089 clear a substructure if the outer structure has already been cleared. */
5090
5091 static void
5092 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5093 HOST_WIDE_INT bitpos, enum machine_mode mode,
5094 tree exp, tree type, int cleared,
5095 alias_set_type alias_set)
5096 {
5097 if (TREE_CODE (exp) == CONSTRUCTOR
5098 /* We can only call store_constructor recursively if the size and
5099 bit position are on a byte boundary. */
5100 && bitpos % BITS_PER_UNIT == 0
5101 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5102 /* If we have a nonzero bitpos for a register target, then we just
5103 let store_field do the bitfield handling. This is unlikely to
5104 generate unnecessary clear instructions anyways. */
5105 && (bitpos == 0 || MEM_P (target)))
5106 {
5107 if (MEM_P (target))
5108 target
5109 = adjust_address (target,
5110 GET_MODE (target) == BLKmode
5111 || 0 != (bitpos
5112 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5113 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5114
5115
5116 /* Update the alias set, if required. */
5117 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5118 && MEM_ALIAS_SET (target) != 0)
5119 {
5120 target = copy_rtx (target);
5121 set_mem_alias_set (target, alias_set);
5122 }
5123
5124 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5125 }
5126 else
5127 store_field (target, bitsize, bitpos, mode, exp, type, alias_set, false);
5128 }
5129
5130 /* Store the value of constructor EXP into the rtx TARGET.
5131 TARGET is either a REG or a MEM; we know it cannot conflict, since
5132 safe_from_p has been called.
5133 CLEARED is true if TARGET is known to have been zero'd.
5134 SIZE is the number of bytes of TARGET we are allowed to modify: this
5135 may not be the same as the size of EXP if we are assigning to a field
5136 which has been packed to exclude padding bits. */
5137
5138 static void
5139 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5140 {
5141 tree type = TREE_TYPE (exp);
5142 #ifdef WORD_REGISTER_OPERATIONS
5143 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5144 #endif
5145
5146 switch (TREE_CODE (type))
5147 {
5148 case RECORD_TYPE:
5149 case UNION_TYPE:
5150 case QUAL_UNION_TYPE:
5151 {
5152 unsigned HOST_WIDE_INT idx;
5153 tree field, value;
5154
5155 /* If size is zero or the target is already cleared, do nothing. */
5156 if (size == 0 || cleared)
5157 cleared = 1;
5158 /* We either clear the aggregate or indicate the value is dead. */
5159 else if ((TREE_CODE (type) == UNION_TYPE
5160 || TREE_CODE (type) == QUAL_UNION_TYPE)
5161 && ! CONSTRUCTOR_ELTS (exp))
5162 /* If the constructor is empty, clear the union. */
5163 {
5164 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5165 cleared = 1;
5166 }
5167
5168 /* If we are building a static constructor into a register,
5169 set the initial value as zero so we can fold the value into
5170 a constant. But if more than one register is involved,
5171 this probably loses. */
5172 else if (REG_P (target) && TREE_STATIC (exp)
5173 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5174 {
5175 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5176 cleared = 1;
5177 }
5178
5179 /* If the constructor has fewer fields than the structure or
5180 if we are initializing the structure to mostly zeros, clear
5181 the whole structure first. Don't do this if TARGET is a
5182 register whose mode size isn't equal to SIZE since
5183 clear_storage can't handle this case. */
5184 else if (size > 0
5185 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5186 != fields_length (type))
5187 || mostly_zeros_p (exp))
5188 && (!REG_P (target)
5189 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5190 == size)))
5191 {
5192 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5193 cleared = 1;
5194 }
5195
5196 if (REG_P (target) && !cleared)
5197 emit_clobber (target);
5198
5199 /* Store each element of the constructor into the
5200 corresponding field of TARGET. */
5201 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5202 {
5203 enum machine_mode mode;
5204 HOST_WIDE_INT bitsize;
5205 HOST_WIDE_INT bitpos = 0;
5206 tree offset;
5207 rtx to_rtx = target;
5208
5209 /* Just ignore missing fields. We cleared the whole
5210 structure, above, if any fields are missing. */
5211 if (field == 0)
5212 continue;
5213
5214 if (cleared && initializer_zerop (value))
5215 continue;
5216
5217 if (host_integerp (DECL_SIZE (field), 1))
5218 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5219 else
5220 bitsize = -1;
5221
5222 mode = DECL_MODE (field);
5223 if (DECL_BIT_FIELD (field))
5224 mode = VOIDmode;
5225
5226 offset = DECL_FIELD_OFFSET (field);
5227 if (host_integerp (offset, 0)
5228 && host_integerp (bit_position (field), 0))
5229 {
5230 bitpos = int_bit_position (field);
5231 offset = 0;
5232 }
5233 else
5234 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5235
5236 if (offset)
5237 {
5238 rtx offset_rtx;
5239
5240 offset
5241 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5242 make_tree (TREE_TYPE (exp),
5243 target));
5244
5245 offset_rtx = expand_normal (offset);
5246 gcc_assert (MEM_P (to_rtx));
5247
5248 #ifdef POINTERS_EXTEND_UNSIGNED
5249 if (GET_MODE (offset_rtx) != Pmode)
5250 offset_rtx = convert_to_mode (Pmode, offset_rtx, 0);
5251 #else
5252 if (GET_MODE (offset_rtx) != ptr_mode)
5253 offset_rtx = convert_to_mode (ptr_mode, offset_rtx, 0);
5254 #endif
5255
5256 to_rtx = offset_address (to_rtx, offset_rtx,
5257 highest_pow2_factor (offset));
5258 }
5259
5260 #ifdef WORD_REGISTER_OPERATIONS
5261 /* If this initializes a field that is smaller than a
5262 word, at the start of a word, try to widen it to a full
5263 word. This special case allows us to output C++ member
5264 function initializations in a form that the optimizers
5265 can understand. */
5266 if (REG_P (target)
5267 && bitsize < BITS_PER_WORD
5268 && bitpos % BITS_PER_WORD == 0
5269 && GET_MODE_CLASS (mode) == MODE_INT
5270 && TREE_CODE (value) == INTEGER_CST
5271 && exp_size >= 0
5272 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5273 {
5274 tree type = TREE_TYPE (value);
5275
5276 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5277 {
5278 type = lang_hooks.types.type_for_size
5279 (BITS_PER_WORD, TYPE_UNSIGNED (type));
5280 value = fold_convert (type, value);
5281 }
5282
5283 if (BYTES_BIG_ENDIAN)
5284 value
5285 = fold_build2 (LSHIFT_EXPR, type, value,
5286 build_int_cst (type,
5287 BITS_PER_WORD - bitsize));
5288 bitsize = BITS_PER_WORD;
5289 mode = word_mode;
5290 }
5291 #endif
5292
5293 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5294 && DECL_NONADDRESSABLE_P (field))
5295 {
5296 to_rtx = copy_rtx (to_rtx);
5297 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5298 }
5299
5300 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5301 value, type, cleared,
5302 get_alias_set (TREE_TYPE (field)));
5303 }
5304 break;
5305 }
5306 case ARRAY_TYPE:
5307 {
5308 tree value, index;
5309 unsigned HOST_WIDE_INT i;
5310 int need_to_clear;
5311 tree domain;
5312 tree elttype = TREE_TYPE (type);
5313 int const_bounds_p;
5314 HOST_WIDE_INT minelt = 0;
5315 HOST_WIDE_INT maxelt = 0;
5316
5317 domain = TYPE_DOMAIN (type);
5318 const_bounds_p = (TYPE_MIN_VALUE (domain)
5319 && TYPE_MAX_VALUE (domain)
5320 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5321 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5322
5323 /* If we have constant bounds for the range of the type, get them. */
5324 if (const_bounds_p)
5325 {
5326 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5327 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5328 }
5329
5330 /* If the constructor has fewer elements than the array, clear
5331 the whole array first. Similarly if this is static
5332 constructor of a non-BLKmode object. */
5333 if (cleared)
5334 need_to_clear = 0;
5335 else if (REG_P (target) && TREE_STATIC (exp))
5336 need_to_clear = 1;
5337 else
5338 {
5339 unsigned HOST_WIDE_INT idx;
5340 tree index, value;
5341 HOST_WIDE_INT count = 0, zero_count = 0;
5342 need_to_clear = ! const_bounds_p;
5343
5344 /* This loop is a more accurate version of the loop in
5345 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5346 is also needed to check for missing elements. */
5347 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5348 {
5349 HOST_WIDE_INT this_node_count;
5350
5351 if (need_to_clear)
5352 break;
5353
5354 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5355 {
5356 tree lo_index = TREE_OPERAND (index, 0);
5357 tree hi_index = TREE_OPERAND (index, 1);
5358
5359 if (! host_integerp (lo_index, 1)
5360 || ! host_integerp (hi_index, 1))
5361 {
5362 need_to_clear = 1;
5363 break;
5364 }
5365
5366 this_node_count = (tree_low_cst (hi_index, 1)
5367 - tree_low_cst (lo_index, 1) + 1);
5368 }
5369 else
5370 this_node_count = 1;
5371
5372 count += this_node_count;
5373 if (mostly_zeros_p (value))
5374 zero_count += this_node_count;
5375 }
5376
5377 /* Clear the entire array first if there are any missing
5378 elements, or if the incidence of zero elements is >=
5379 75%. */
5380 if (! need_to_clear
5381 && (count < maxelt - minelt + 1
5382 || 4 * zero_count >= 3 * count))
5383 need_to_clear = 1;
5384 }
5385
5386 if (need_to_clear && size > 0)
5387 {
5388 if (REG_P (target))
5389 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5390 else
5391 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5392 cleared = 1;
5393 }
5394
5395 if (!cleared && REG_P (target))
5396 /* Inform later passes that the old value is dead. */
5397 emit_clobber (target);
5398
5399 /* Store each element of the constructor into the
5400 corresponding element of TARGET, determined by counting the
5401 elements. */
5402 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5403 {
5404 enum machine_mode mode;
5405 HOST_WIDE_INT bitsize;
5406 HOST_WIDE_INT bitpos;
5407 int unsignedp;
5408 rtx xtarget = target;
5409
5410 if (cleared && initializer_zerop (value))
5411 continue;
5412
5413 unsignedp = TYPE_UNSIGNED (elttype);
5414 mode = TYPE_MODE (elttype);
5415 if (mode == BLKmode)
5416 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5417 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5418 : -1);
5419 else
5420 bitsize = GET_MODE_BITSIZE (mode);
5421
5422 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5423 {
5424 tree lo_index = TREE_OPERAND (index, 0);
5425 tree hi_index = TREE_OPERAND (index, 1);
5426 rtx index_r, pos_rtx;
5427 HOST_WIDE_INT lo, hi, count;
5428 tree position;
5429
5430 /* If the range is constant and "small", unroll the loop. */
5431 if (const_bounds_p
5432 && host_integerp (lo_index, 0)
5433 && host_integerp (hi_index, 0)
5434 && (lo = tree_low_cst (lo_index, 0),
5435 hi = tree_low_cst (hi_index, 0),
5436 count = hi - lo + 1,
5437 (!MEM_P (target)
5438 || count <= 2
5439 || (host_integerp (TYPE_SIZE (elttype), 1)
5440 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5441 <= 40 * 8)))))
5442 {
5443 lo -= minelt; hi -= minelt;
5444 for (; lo <= hi; lo++)
5445 {
5446 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
5447
5448 if (MEM_P (target)
5449 && !MEM_KEEP_ALIAS_SET_P (target)
5450 && TREE_CODE (type) == ARRAY_TYPE
5451 && TYPE_NONALIASED_COMPONENT (type))
5452 {
5453 target = copy_rtx (target);
5454 MEM_KEEP_ALIAS_SET_P (target) = 1;
5455 }
5456
5457 store_constructor_field
5458 (target, bitsize, bitpos, mode, value, type, cleared,
5459 get_alias_set (elttype));
5460 }
5461 }
5462 else
5463 {
5464 rtx loop_start = gen_label_rtx ();
5465 rtx loop_end = gen_label_rtx ();
5466 tree exit_cond;
5467
5468 expand_normal (hi_index);
5469 unsignedp = TYPE_UNSIGNED (domain);
5470
5471 index = build_decl (VAR_DECL, NULL_TREE, domain);
5472
5473 index_r
5474 = gen_reg_rtx (promote_mode (domain, DECL_MODE (index),
5475 &unsignedp, 0));
5476 SET_DECL_RTL (index, index_r);
5477 store_expr (lo_index, index_r, 0, false);
5478
5479 /* Build the head of the loop. */
5480 do_pending_stack_adjust ();
5481 emit_label (loop_start);
5482
5483 /* Assign value to element index. */
5484 position =
5485 fold_convert (ssizetype,
5486 fold_build2 (MINUS_EXPR,
5487 TREE_TYPE (index),
5488 index,
5489 TYPE_MIN_VALUE (domain)));
5490
5491 position =
5492 size_binop (MULT_EXPR, position,
5493 fold_convert (ssizetype,
5494 TYPE_SIZE_UNIT (elttype)));
5495
5496 pos_rtx = expand_normal (position);
5497 xtarget = offset_address (target, pos_rtx,
5498 highest_pow2_factor (position));
5499 xtarget = adjust_address (xtarget, mode, 0);
5500 if (TREE_CODE (value) == CONSTRUCTOR)
5501 store_constructor (value, xtarget, cleared,
5502 bitsize / BITS_PER_UNIT);
5503 else
5504 store_expr (value, xtarget, 0, false);
5505
5506 /* Generate a conditional jump to exit the loop. */
5507 exit_cond = build2 (LT_EXPR, integer_type_node,
5508 index, hi_index);
5509 jumpif (exit_cond, loop_end);
5510
5511 /* Update the loop counter, and jump to the head of
5512 the loop. */
5513 expand_assignment (index,
5514 build2 (PLUS_EXPR, TREE_TYPE (index),
5515 index, integer_one_node),
5516 false);
5517
5518 emit_jump (loop_start);
5519
5520 /* Build the end of the loop. */
5521 emit_label (loop_end);
5522 }
5523 }
5524 else if ((index != 0 && ! host_integerp (index, 0))
5525 || ! host_integerp (TYPE_SIZE (elttype), 1))
5526 {
5527 tree position;
5528
5529 if (index == 0)
5530 index = ssize_int (1);
5531
5532 if (minelt)
5533 index = fold_convert (ssizetype,
5534 fold_build2 (MINUS_EXPR,
5535 TREE_TYPE (index),
5536 index,
5537 TYPE_MIN_VALUE (domain)));
5538
5539 position =
5540 size_binop (MULT_EXPR, index,
5541 fold_convert (ssizetype,
5542 TYPE_SIZE_UNIT (elttype)));
5543 xtarget = offset_address (target,
5544 expand_normal (position),
5545 highest_pow2_factor (position));
5546 xtarget = adjust_address (xtarget, mode, 0);
5547 store_expr (value, xtarget, 0, false);
5548 }
5549 else
5550 {
5551 if (index != 0)
5552 bitpos = ((tree_low_cst (index, 0) - minelt)
5553 * tree_low_cst (TYPE_SIZE (elttype), 1));
5554 else
5555 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
5556
5557 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
5558 && TREE_CODE (type) == ARRAY_TYPE
5559 && TYPE_NONALIASED_COMPONENT (type))
5560 {
5561 target = copy_rtx (target);
5562 MEM_KEEP_ALIAS_SET_P (target) = 1;
5563 }
5564 store_constructor_field (target, bitsize, bitpos, mode, value,
5565 type, cleared, get_alias_set (elttype));
5566 }
5567 }
5568 break;
5569 }
5570
5571 case VECTOR_TYPE:
5572 {
5573 unsigned HOST_WIDE_INT idx;
5574 constructor_elt *ce;
5575 int i;
5576 int need_to_clear;
5577 int icode = 0;
5578 tree elttype = TREE_TYPE (type);
5579 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
5580 enum machine_mode eltmode = TYPE_MODE (elttype);
5581 HOST_WIDE_INT bitsize;
5582 HOST_WIDE_INT bitpos;
5583 rtvec vector = NULL;
5584 unsigned n_elts;
5585 alias_set_type alias;
5586
5587 gcc_assert (eltmode != BLKmode);
5588
5589 n_elts = TYPE_VECTOR_SUBPARTS (type);
5590 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
5591 {
5592 enum machine_mode mode = GET_MODE (target);
5593
5594 icode = (int) optab_handler (vec_init_optab, mode)->insn_code;
5595 if (icode != CODE_FOR_nothing)
5596 {
5597 unsigned int i;
5598
5599 vector = rtvec_alloc (n_elts);
5600 for (i = 0; i < n_elts; i++)
5601 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
5602 }
5603 }
5604
5605 /* If the constructor has fewer elements than the vector,
5606 clear the whole array first. Similarly if this is static
5607 constructor of a non-BLKmode object. */
5608 if (cleared)
5609 need_to_clear = 0;
5610 else if (REG_P (target) && TREE_STATIC (exp))
5611 need_to_clear = 1;
5612 else
5613 {
5614 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
5615 tree value;
5616
5617 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
5618 {
5619 int n_elts_here = tree_low_cst
5620 (int_const_binop (TRUNC_DIV_EXPR,
5621 TYPE_SIZE (TREE_TYPE (value)),
5622 TYPE_SIZE (elttype), 0), 1);
5623
5624 count += n_elts_here;
5625 if (mostly_zeros_p (value))
5626 zero_count += n_elts_here;
5627 }
5628
5629 /* Clear the entire vector first if there are any missing elements,
5630 or if the incidence of zero elements is >= 75%. */
5631 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
5632 }
5633
5634 if (need_to_clear && size > 0 && !vector)
5635 {
5636 if (REG_P (target))
5637 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5638 else
5639 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5640 cleared = 1;
5641 }
5642
5643 /* Inform later passes that the old value is dead. */
5644 if (!cleared && !vector && REG_P (target))
5645 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5646
5647 if (MEM_P (target))
5648 alias = MEM_ALIAS_SET (target);
5649 else
5650 alias = get_alias_set (elttype);
5651
5652 /* Store each element of the constructor into the corresponding
5653 element of TARGET, determined by counting the elements. */
5654 for (idx = 0, i = 0;
5655 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
5656 idx++, i += bitsize / elt_size)
5657 {
5658 HOST_WIDE_INT eltpos;
5659 tree value = ce->value;
5660
5661 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
5662 if (cleared && initializer_zerop (value))
5663 continue;
5664
5665 if (ce->index)
5666 eltpos = tree_low_cst (ce->index, 1);
5667 else
5668 eltpos = i;
5669
5670 if (vector)
5671 {
5672 /* Vector CONSTRUCTORs should only be built from smaller
5673 vectors in the case of BLKmode vectors. */
5674 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
5675 RTVEC_ELT (vector, eltpos)
5676 = expand_normal (value);
5677 }
5678 else
5679 {
5680 enum machine_mode value_mode =
5681 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
5682 ? TYPE_MODE (TREE_TYPE (value))
5683 : eltmode;
5684 bitpos = eltpos * elt_size;
5685 store_constructor_field (target, bitsize, bitpos,
5686 value_mode, value, type,
5687 cleared, alias);
5688 }
5689 }
5690
5691 if (vector)
5692 emit_insn (GEN_FCN (icode)
5693 (target,
5694 gen_rtx_PARALLEL (GET_MODE (target), vector)));
5695 break;
5696 }
5697
5698 default:
5699 gcc_unreachable ();
5700 }
5701 }
5702
5703 /* Store the value of EXP (an expression tree)
5704 into a subfield of TARGET which has mode MODE and occupies
5705 BITSIZE bits, starting BITPOS bits from the start of TARGET.
5706 If MODE is VOIDmode, it means that we are storing into a bit-field.
5707
5708 Always return const0_rtx unless we have something particular to
5709 return.
5710
5711 TYPE is the type of the underlying object,
5712
5713 ALIAS_SET is the alias set for the destination. This value will
5714 (in general) be different from that for TARGET, since TARGET is a
5715 reference to the containing structure.
5716
5717 If NONTEMPORAL is true, try generating a nontemporal store. */
5718
5719 static rtx
5720 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
5721 enum machine_mode mode, tree exp, tree type,
5722 alias_set_type alias_set, bool nontemporal)
5723 {
5724 HOST_WIDE_INT width_mask = 0;
5725
5726 if (TREE_CODE (exp) == ERROR_MARK)
5727 return const0_rtx;
5728
5729 /* If we have nothing to store, do nothing unless the expression has
5730 side-effects. */
5731 if (bitsize == 0)
5732 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5733 else if (bitsize >= 0 && bitsize < HOST_BITS_PER_WIDE_INT)
5734 width_mask = ((HOST_WIDE_INT) 1 << bitsize) - 1;
5735
5736 /* If we are storing into an unaligned field of an aligned union that is
5737 in a register, we may have the mode of TARGET being an integer mode but
5738 MODE == BLKmode. In that case, get an aligned object whose size and
5739 alignment are the same as TARGET and store TARGET into it (we can avoid
5740 the store if the field being stored is the entire width of TARGET). Then
5741 call ourselves recursively to store the field into a BLKmode version of
5742 that object. Finally, load from the object into TARGET. This is not
5743 very efficient in general, but should only be slightly more expensive
5744 than the otherwise-required unaligned accesses. Perhaps this can be
5745 cleaned up later. It's tempting to make OBJECT readonly, but it's set
5746 twice, once with emit_move_insn and once via store_field. */
5747
5748 if (mode == BLKmode
5749 && (REG_P (target) || GET_CODE (target) == SUBREG))
5750 {
5751 rtx object = assign_temp (type, 0, 1, 1);
5752 rtx blk_object = adjust_address (object, BLKmode, 0);
5753
5754 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
5755 emit_move_insn (object, target);
5756
5757 store_field (blk_object, bitsize, bitpos, mode, exp, type, alias_set,
5758 nontemporal);
5759
5760 emit_move_insn (target, object);
5761
5762 /* We want to return the BLKmode version of the data. */
5763 return blk_object;
5764 }
5765
5766 if (GET_CODE (target) == CONCAT)
5767 {
5768 /* We're storing into a struct containing a single __complex. */
5769
5770 gcc_assert (!bitpos);
5771 return store_expr (exp, target, 0, nontemporal);
5772 }
5773
5774 /* If the structure is in a register or if the component
5775 is a bit field, we cannot use addressing to access it.
5776 Use bit-field techniques or SUBREG to store in it. */
5777
5778 if (mode == VOIDmode
5779 || (mode != BLKmode && ! direct_store[(int) mode]
5780 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
5781 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
5782 || REG_P (target)
5783 || GET_CODE (target) == SUBREG
5784 /* If the field isn't aligned enough to store as an ordinary memref,
5785 store it as a bit field. */
5786 || (mode != BLKmode
5787 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
5788 || bitpos % GET_MODE_ALIGNMENT (mode))
5789 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
5790 || (bitpos % BITS_PER_UNIT != 0)))
5791 /* If the RHS and field are a constant size and the size of the
5792 RHS isn't the same size as the bitfield, we must use bitfield
5793 operations. */
5794 || (bitsize >= 0
5795 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
5796 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0))
5797 {
5798 rtx temp;
5799 gimple nop_def;
5800
5801 /* If EXP is a NOP_EXPR of precision less than its mode, then that
5802 implies a mask operation. If the precision is the same size as
5803 the field we're storing into, that mask is redundant. This is
5804 particularly common with bit field assignments generated by the
5805 C front end. */
5806 nop_def = get_def_for_expr (exp, NOP_EXPR);
5807 if (nop_def)
5808 {
5809 tree type = TREE_TYPE (exp);
5810 if (INTEGRAL_TYPE_P (type)
5811 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
5812 && bitsize == TYPE_PRECISION (type))
5813 {
5814 tree op = gimple_assign_rhs1 (nop_def);
5815 type = TREE_TYPE (op);
5816 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
5817 exp = op;
5818 }
5819 }
5820
5821 temp = expand_normal (exp);
5822
5823 /* If BITSIZE is narrower than the size of the type of EXP
5824 we will be narrowing TEMP. Normally, what's wanted are the
5825 low-order bits. However, if EXP's type is a record and this is
5826 big-endian machine, we want the upper BITSIZE bits. */
5827 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
5828 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
5829 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
5830 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
5831 size_int (GET_MODE_BITSIZE (GET_MODE (temp))
5832 - bitsize),
5833 NULL_RTX, 1);
5834
5835 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
5836 MODE. */
5837 if (mode != VOIDmode && mode != BLKmode
5838 && mode != TYPE_MODE (TREE_TYPE (exp)))
5839 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
5840
5841 /* If the modes of TEMP and TARGET are both BLKmode, both
5842 must be in memory and BITPOS must be aligned on a byte
5843 boundary. If so, we simply do a block copy. Likewise
5844 for a BLKmode-like TARGET. */
5845 if (GET_MODE (temp) == BLKmode
5846 && (GET_MODE (target) == BLKmode
5847 || (MEM_P (target)
5848 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
5849 && (bitpos % BITS_PER_UNIT) == 0
5850 && (bitsize % BITS_PER_UNIT) == 0)))
5851 {
5852 gcc_assert (MEM_P (target) && MEM_P (temp)
5853 && (bitpos % BITS_PER_UNIT) == 0);
5854
5855 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
5856 emit_block_move (target, temp,
5857 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
5858 / BITS_PER_UNIT),
5859 BLOCK_OP_NORMAL);
5860
5861 return const0_rtx;
5862 }
5863
5864 /* Store the value in the bitfield. */
5865 store_bit_field (target, bitsize, bitpos, mode, temp);
5866
5867 return const0_rtx;
5868 }
5869 else
5870 {
5871 /* Now build a reference to just the desired component. */
5872 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
5873
5874 if (to_rtx == target)
5875 to_rtx = copy_rtx (to_rtx);
5876
5877 MEM_SET_IN_STRUCT_P (to_rtx, 1);
5878 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
5879 set_mem_alias_set (to_rtx, alias_set);
5880
5881 return store_expr (exp, to_rtx, 0, nontemporal);
5882 }
5883 }
5884 \f
5885 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
5886 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
5887 codes and find the ultimate containing object, which we return.
5888
5889 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
5890 bit position, and *PUNSIGNEDP to the signedness of the field.
5891 If the position of the field is variable, we store a tree
5892 giving the variable offset (in units) in *POFFSET.
5893 This offset is in addition to the bit position.
5894 If the position is not variable, we store 0 in *POFFSET.
5895
5896 If any of the extraction expressions is volatile,
5897 we store 1 in *PVOLATILEP. Otherwise we don't change that.
5898
5899 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
5900 Otherwise, it is a mode that can be used to access the field.
5901
5902 If the field describes a variable-sized object, *PMODE is set to
5903 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
5904 this case, but the address of the object can be found.
5905
5906 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
5907 look through nodes that serve as markers of a greater alignment than
5908 the one that can be deduced from the expression. These nodes make it
5909 possible for front-ends to prevent temporaries from being created by
5910 the middle-end on alignment considerations. For that purpose, the
5911 normal operating mode at high-level is to always pass FALSE so that
5912 the ultimate containing object is really returned; moreover, the
5913 associated predicate handled_component_p will always return TRUE
5914 on these nodes, thus indicating that they are essentially handled
5915 by get_inner_reference. TRUE should only be passed when the caller
5916 is scanning the expression in order to build another representation
5917 and specifically knows how to handle these nodes; as such, this is
5918 the normal operating mode in the RTL expanders. */
5919
5920 tree
5921 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
5922 HOST_WIDE_INT *pbitpos, tree *poffset,
5923 enum machine_mode *pmode, int *punsignedp,
5924 int *pvolatilep, bool keep_aligning)
5925 {
5926 tree size_tree = 0;
5927 enum machine_mode mode = VOIDmode;
5928 bool blkmode_bitfield = false;
5929 tree offset = size_zero_node;
5930 tree bit_offset = bitsize_zero_node;
5931
5932 /* First get the mode, signedness, and size. We do this from just the
5933 outermost expression. */
5934 if (TREE_CODE (exp) == COMPONENT_REF)
5935 {
5936 tree field = TREE_OPERAND (exp, 1);
5937 size_tree = DECL_SIZE (field);
5938 if (!DECL_BIT_FIELD (field))
5939 mode = DECL_MODE (field);
5940 else if (DECL_MODE (field) == BLKmode)
5941 blkmode_bitfield = true;
5942
5943 *punsignedp = DECL_UNSIGNED (field);
5944 }
5945 else if (TREE_CODE (exp) == BIT_FIELD_REF)
5946 {
5947 size_tree = TREE_OPERAND (exp, 1);
5948 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
5949 || TYPE_UNSIGNED (TREE_TYPE (exp)));
5950
5951 /* For vector types, with the correct size of access, use the mode of
5952 inner type. */
5953 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
5954 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
5955 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
5956 mode = TYPE_MODE (TREE_TYPE (exp));
5957 }
5958 else
5959 {
5960 mode = TYPE_MODE (TREE_TYPE (exp));
5961 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5962
5963 if (mode == BLKmode)
5964 size_tree = TYPE_SIZE (TREE_TYPE (exp));
5965 else
5966 *pbitsize = GET_MODE_BITSIZE (mode);
5967 }
5968
5969 if (size_tree != 0)
5970 {
5971 if (! host_integerp (size_tree, 1))
5972 mode = BLKmode, *pbitsize = -1;
5973 else
5974 *pbitsize = tree_low_cst (size_tree, 1);
5975 }
5976
5977 /* Compute cumulative bit-offset for nested component-refs and array-refs,
5978 and find the ultimate containing object. */
5979 while (1)
5980 {
5981 switch (TREE_CODE (exp))
5982 {
5983 case BIT_FIELD_REF:
5984 bit_offset = size_binop (PLUS_EXPR, bit_offset,
5985 TREE_OPERAND (exp, 2));
5986 break;
5987
5988 case COMPONENT_REF:
5989 {
5990 tree field = TREE_OPERAND (exp, 1);
5991 tree this_offset = component_ref_field_offset (exp);
5992
5993 /* If this field hasn't been filled in yet, don't go past it.
5994 This should only happen when folding expressions made during
5995 type construction. */
5996 if (this_offset == 0)
5997 break;
5998
5999 offset = size_binop (PLUS_EXPR, offset, this_offset);
6000 bit_offset = size_binop (PLUS_EXPR, bit_offset,
6001 DECL_FIELD_BIT_OFFSET (field));
6002
6003 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6004 }
6005 break;
6006
6007 case ARRAY_REF:
6008 case ARRAY_RANGE_REF:
6009 {
6010 tree index = TREE_OPERAND (exp, 1);
6011 tree low_bound = array_ref_low_bound (exp);
6012 tree unit_size = array_ref_element_size (exp);
6013
6014 /* We assume all arrays have sizes that are a multiple of a byte.
6015 First subtract the lower bound, if any, in the type of the
6016 index, then convert to sizetype and multiply by the size of
6017 the array element. */
6018 if (! integer_zerop (low_bound))
6019 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6020 index, low_bound);
6021
6022 offset = size_binop (PLUS_EXPR, offset,
6023 size_binop (MULT_EXPR,
6024 fold_convert (sizetype, index),
6025 unit_size));
6026 }
6027 break;
6028
6029 case REALPART_EXPR:
6030 break;
6031
6032 case IMAGPART_EXPR:
6033 bit_offset = size_binop (PLUS_EXPR, bit_offset,
6034 bitsize_int (*pbitsize));
6035 break;
6036
6037 case VIEW_CONVERT_EXPR:
6038 if (keep_aligning && STRICT_ALIGNMENT
6039 && (TYPE_ALIGN (TREE_TYPE (exp))
6040 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6041 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6042 < BIGGEST_ALIGNMENT)
6043 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6044 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6045 goto done;
6046 break;
6047
6048 default:
6049 goto done;
6050 }
6051
6052 /* If any reference in the chain is volatile, the effect is volatile. */
6053 if (TREE_THIS_VOLATILE (exp))
6054 *pvolatilep = 1;
6055
6056 exp = TREE_OPERAND (exp, 0);
6057 }
6058 done:
6059
6060 /* If OFFSET is constant, see if we can return the whole thing as a
6061 constant bit position. Make sure to handle overflow during
6062 this conversion. */
6063 if (host_integerp (offset, 0))
6064 {
6065 double_int tem = double_int_mul (tree_to_double_int (offset),
6066 uhwi_to_double_int (BITS_PER_UNIT));
6067 tem = double_int_add (tem, tree_to_double_int (bit_offset));
6068 if (double_int_fits_in_shwi_p (tem))
6069 {
6070 *pbitpos = double_int_to_shwi (tem);
6071 *poffset = offset = NULL_TREE;
6072 }
6073 }
6074
6075 /* Otherwise, split it up. */
6076 if (offset)
6077 {
6078 *pbitpos = tree_low_cst (bit_offset, 0);
6079 *poffset = offset;
6080 }
6081
6082 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6083 if (mode == VOIDmode
6084 && blkmode_bitfield
6085 && (*pbitpos % BITS_PER_UNIT) == 0
6086 && (*pbitsize % BITS_PER_UNIT) == 0)
6087 *pmode = BLKmode;
6088 else
6089 *pmode = mode;
6090
6091 return exp;
6092 }
6093
6094 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6095 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6096 EXP is marked as PACKED. */
6097
6098 bool
6099 contains_packed_reference (const_tree exp)
6100 {
6101 bool packed_p = false;
6102
6103 while (1)
6104 {
6105 switch (TREE_CODE (exp))
6106 {
6107 case COMPONENT_REF:
6108 {
6109 tree field = TREE_OPERAND (exp, 1);
6110 packed_p = DECL_PACKED (field)
6111 || TYPE_PACKED (TREE_TYPE (field))
6112 || TYPE_PACKED (TREE_TYPE (exp));
6113 if (packed_p)
6114 goto done;
6115 }
6116 break;
6117
6118 case BIT_FIELD_REF:
6119 case ARRAY_REF:
6120 case ARRAY_RANGE_REF:
6121 case REALPART_EXPR:
6122 case IMAGPART_EXPR:
6123 case VIEW_CONVERT_EXPR:
6124 break;
6125
6126 default:
6127 goto done;
6128 }
6129 exp = TREE_OPERAND (exp, 0);
6130 }
6131 done:
6132 return packed_p;
6133 }
6134
6135 /* Return a tree of sizetype representing the size, in bytes, of the element
6136 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6137
6138 tree
6139 array_ref_element_size (tree exp)
6140 {
6141 tree aligned_size = TREE_OPERAND (exp, 3);
6142 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6143
6144 /* If a size was specified in the ARRAY_REF, it's the size measured
6145 in alignment units of the element type. So multiply by that value. */
6146 if (aligned_size)
6147 {
6148 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6149 sizetype from another type of the same width and signedness. */
6150 if (TREE_TYPE (aligned_size) != sizetype)
6151 aligned_size = fold_convert (sizetype, aligned_size);
6152 return size_binop (MULT_EXPR, aligned_size,
6153 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6154 }
6155
6156 /* Otherwise, take the size from that of the element type. Substitute
6157 any PLACEHOLDER_EXPR that we have. */
6158 else
6159 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6160 }
6161
6162 /* Return a tree representing the lower bound of the array mentioned in
6163 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6164
6165 tree
6166 array_ref_low_bound (tree exp)
6167 {
6168 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6169
6170 /* If a lower bound is specified in EXP, use it. */
6171 if (TREE_OPERAND (exp, 2))
6172 return TREE_OPERAND (exp, 2);
6173
6174 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6175 substituting for a PLACEHOLDER_EXPR as needed. */
6176 if (domain_type && TYPE_MIN_VALUE (domain_type))
6177 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6178
6179 /* Otherwise, return a zero of the appropriate type. */
6180 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6181 }
6182
6183 /* Return a tree representing the upper bound of the array mentioned in
6184 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6185
6186 tree
6187 array_ref_up_bound (tree exp)
6188 {
6189 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6190
6191 /* If there is a domain type and it has an upper bound, use it, substituting
6192 for a PLACEHOLDER_EXPR as needed. */
6193 if (domain_type && TYPE_MAX_VALUE (domain_type))
6194 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6195
6196 /* Otherwise fail. */
6197 return NULL_TREE;
6198 }
6199
6200 /* Return a tree representing the offset, in bytes, of the field referenced
6201 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6202
6203 tree
6204 component_ref_field_offset (tree exp)
6205 {
6206 tree aligned_offset = TREE_OPERAND (exp, 2);
6207 tree field = TREE_OPERAND (exp, 1);
6208
6209 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6210 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6211 value. */
6212 if (aligned_offset)
6213 {
6214 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6215 sizetype from another type of the same width and signedness. */
6216 if (TREE_TYPE (aligned_offset) != sizetype)
6217 aligned_offset = fold_convert (sizetype, aligned_offset);
6218 return size_binop (MULT_EXPR, aligned_offset,
6219 size_int (DECL_OFFSET_ALIGN (field) / BITS_PER_UNIT));
6220 }
6221
6222 /* Otherwise, take the offset from that of the field. Substitute
6223 any PLACEHOLDER_EXPR that we have. */
6224 else
6225 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6226 }
6227
6228 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6229
6230 static unsigned HOST_WIDE_INT
6231 target_align (const_tree target)
6232 {
6233 /* We might have a chain of nested references with intermediate misaligning
6234 bitfields components, so need to recurse to find out. */
6235
6236 unsigned HOST_WIDE_INT this_align, outer_align;
6237
6238 switch (TREE_CODE (target))
6239 {
6240 case BIT_FIELD_REF:
6241 return 1;
6242
6243 case COMPONENT_REF:
6244 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6245 outer_align = target_align (TREE_OPERAND (target, 0));
6246 return MIN (this_align, outer_align);
6247
6248 case ARRAY_REF:
6249 case ARRAY_RANGE_REF:
6250 this_align = TYPE_ALIGN (TREE_TYPE (target));
6251 outer_align = target_align (TREE_OPERAND (target, 0));
6252 return MIN (this_align, outer_align);
6253
6254 CASE_CONVERT:
6255 case NON_LVALUE_EXPR:
6256 case VIEW_CONVERT_EXPR:
6257 this_align = TYPE_ALIGN (TREE_TYPE (target));
6258 outer_align = target_align (TREE_OPERAND (target, 0));
6259 return MAX (this_align, outer_align);
6260
6261 default:
6262 return TYPE_ALIGN (TREE_TYPE (target));
6263 }
6264 }
6265
6266 \f
6267 /* Given an rtx VALUE that may contain additions and multiplications, return
6268 an equivalent value that just refers to a register, memory, or constant.
6269 This is done by generating instructions to perform the arithmetic and
6270 returning a pseudo-register containing the value.
6271
6272 The returned value may be a REG, SUBREG, MEM or constant. */
6273
6274 rtx
6275 force_operand (rtx value, rtx target)
6276 {
6277 rtx op1, op2;
6278 /* Use subtarget as the target for operand 0 of a binary operation. */
6279 rtx subtarget = get_subtarget (target);
6280 enum rtx_code code = GET_CODE (value);
6281
6282 /* Check for subreg applied to an expression produced by loop optimizer. */
6283 if (code == SUBREG
6284 && !REG_P (SUBREG_REG (value))
6285 && !MEM_P (SUBREG_REG (value)))
6286 {
6287 value
6288 = simplify_gen_subreg (GET_MODE (value),
6289 force_reg (GET_MODE (SUBREG_REG (value)),
6290 force_operand (SUBREG_REG (value),
6291 NULL_RTX)),
6292 GET_MODE (SUBREG_REG (value)),
6293 SUBREG_BYTE (value));
6294 code = GET_CODE (value);
6295 }
6296
6297 /* Check for a PIC address load. */
6298 if ((code == PLUS || code == MINUS)
6299 && XEXP (value, 0) == pic_offset_table_rtx
6300 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6301 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6302 || GET_CODE (XEXP (value, 1)) == CONST))
6303 {
6304 if (!subtarget)
6305 subtarget = gen_reg_rtx (GET_MODE (value));
6306 emit_move_insn (subtarget, value);
6307 return subtarget;
6308 }
6309
6310 if (ARITHMETIC_P (value))
6311 {
6312 op2 = XEXP (value, 1);
6313 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6314 subtarget = 0;
6315 if (code == MINUS && GET_CODE (op2) == CONST_INT)
6316 {
6317 code = PLUS;
6318 op2 = negate_rtx (GET_MODE (value), op2);
6319 }
6320
6321 /* Check for an addition with OP2 a constant integer and our first
6322 operand a PLUS of a virtual register and something else. In that
6323 case, we want to emit the sum of the virtual register and the
6324 constant first and then add the other value. This allows virtual
6325 register instantiation to simply modify the constant rather than
6326 creating another one around this addition. */
6327 if (code == PLUS && GET_CODE (op2) == CONST_INT
6328 && GET_CODE (XEXP (value, 0)) == PLUS
6329 && REG_P (XEXP (XEXP (value, 0), 0))
6330 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6331 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6332 {
6333 rtx temp = expand_simple_binop (GET_MODE (value), code,
6334 XEXP (XEXP (value, 0), 0), op2,
6335 subtarget, 0, OPTAB_LIB_WIDEN);
6336 return expand_simple_binop (GET_MODE (value), code, temp,
6337 force_operand (XEXP (XEXP (value,
6338 0), 1), 0),
6339 target, 0, OPTAB_LIB_WIDEN);
6340 }
6341
6342 op1 = force_operand (XEXP (value, 0), subtarget);
6343 op2 = force_operand (op2, NULL_RTX);
6344 switch (code)
6345 {
6346 case MULT:
6347 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6348 case DIV:
6349 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6350 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6351 target, 1, OPTAB_LIB_WIDEN);
6352 else
6353 return expand_divmod (0,
6354 FLOAT_MODE_P (GET_MODE (value))
6355 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6356 GET_MODE (value), op1, op2, target, 0);
6357 case MOD:
6358 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6359 target, 0);
6360 case UDIV:
6361 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6362 target, 1);
6363 case UMOD:
6364 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6365 target, 1);
6366 case ASHIFTRT:
6367 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6368 target, 0, OPTAB_LIB_WIDEN);
6369 default:
6370 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6371 target, 1, OPTAB_LIB_WIDEN);
6372 }
6373 }
6374 if (UNARY_P (value))
6375 {
6376 if (!target)
6377 target = gen_reg_rtx (GET_MODE (value));
6378 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6379 switch (code)
6380 {
6381 case ZERO_EXTEND:
6382 case SIGN_EXTEND:
6383 case TRUNCATE:
6384 case FLOAT_EXTEND:
6385 case FLOAT_TRUNCATE:
6386 convert_move (target, op1, code == ZERO_EXTEND);
6387 return target;
6388
6389 case FIX:
6390 case UNSIGNED_FIX:
6391 expand_fix (target, op1, code == UNSIGNED_FIX);
6392 return target;
6393
6394 case FLOAT:
6395 case UNSIGNED_FLOAT:
6396 expand_float (target, op1, code == UNSIGNED_FLOAT);
6397 return target;
6398
6399 default:
6400 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
6401 }
6402 }
6403
6404 #ifdef INSN_SCHEDULING
6405 /* On machines that have insn scheduling, we want all memory reference to be
6406 explicit, so we need to deal with such paradoxical SUBREGs. */
6407 if (GET_CODE (value) == SUBREG && MEM_P (SUBREG_REG (value))
6408 && (GET_MODE_SIZE (GET_MODE (value))
6409 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (value)))))
6410 value
6411 = simplify_gen_subreg (GET_MODE (value),
6412 force_reg (GET_MODE (SUBREG_REG (value)),
6413 force_operand (SUBREG_REG (value),
6414 NULL_RTX)),
6415 GET_MODE (SUBREG_REG (value)),
6416 SUBREG_BYTE (value));
6417 #endif
6418
6419 return value;
6420 }
6421 \f
6422 /* Subroutine of expand_expr: return nonzero iff there is no way that
6423 EXP can reference X, which is being modified. TOP_P is nonzero if this
6424 call is going to be used to determine whether we need a temporary
6425 for EXP, as opposed to a recursive call to this function.
6426
6427 It is always safe for this routine to return zero since it merely
6428 searches for optimization opportunities. */
6429
6430 int
6431 safe_from_p (const_rtx x, tree exp, int top_p)
6432 {
6433 rtx exp_rtl = 0;
6434 int i, nops;
6435
6436 if (x == 0
6437 /* If EXP has varying size, we MUST use a target since we currently
6438 have no way of allocating temporaries of variable size
6439 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
6440 So we assume here that something at a higher level has prevented a
6441 clash. This is somewhat bogus, but the best we can do. Only
6442 do this when X is BLKmode and when we are at the top level. */
6443 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
6444 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
6445 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
6446 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
6447 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
6448 != INTEGER_CST)
6449 && GET_MODE (x) == BLKmode)
6450 /* If X is in the outgoing argument area, it is always safe. */
6451 || (MEM_P (x)
6452 && (XEXP (x, 0) == virtual_outgoing_args_rtx
6453 || (GET_CODE (XEXP (x, 0)) == PLUS
6454 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
6455 return 1;
6456
6457 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
6458 find the underlying pseudo. */
6459 if (GET_CODE (x) == SUBREG)
6460 {
6461 x = SUBREG_REG (x);
6462 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6463 return 0;
6464 }
6465
6466 /* Now look at our tree code and possibly recurse. */
6467 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
6468 {
6469 case tcc_declaration:
6470 exp_rtl = DECL_RTL_IF_SET (exp);
6471 break;
6472
6473 case tcc_constant:
6474 return 1;
6475
6476 case tcc_exceptional:
6477 if (TREE_CODE (exp) == TREE_LIST)
6478 {
6479 while (1)
6480 {
6481 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
6482 return 0;
6483 exp = TREE_CHAIN (exp);
6484 if (!exp)
6485 return 1;
6486 if (TREE_CODE (exp) != TREE_LIST)
6487 return safe_from_p (x, exp, 0);
6488 }
6489 }
6490 else if (TREE_CODE (exp) == CONSTRUCTOR)
6491 {
6492 constructor_elt *ce;
6493 unsigned HOST_WIDE_INT idx;
6494
6495 for (idx = 0;
6496 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6497 idx++)
6498 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
6499 || !safe_from_p (x, ce->value, 0))
6500 return 0;
6501 return 1;
6502 }
6503 else if (TREE_CODE (exp) == ERROR_MARK)
6504 return 1; /* An already-visited SAVE_EXPR? */
6505 else
6506 return 0;
6507
6508 case tcc_statement:
6509 /* The only case we look at here is the DECL_INITIAL inside a
6510 DECL_EXPR. */
6511 return (TREE_CODE (exp) != DECL_EXPR
6512 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
6513 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
6514 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
6515
6516 case tcc_binary:
6517 case tcc_comparison:
6518 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
6519 return 0;
6520 /* Fall through. */
6521
6522 case tcc_unary:
6523 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6524
6525 case tcc_expression:
6526 case tcc_reference:
6527 case tcc_vl_exp:
6528 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
6529 the expression. If it is set, we conflict iff we are that rtx or
6530 both are in memory. Otherwise, we check all operands of the
6531 expression recursively. */
6532
6533 switch (TREE_CODE (exp))
6534 {
6535 case ADDR_EXPR:
6536 /* If the operand is static or we are static, we can't conflict.
6537 Likewise if we don't conflict with the operand at all. */
6538 if (staticp (TREE_OPERAND (exp, 0))
6539 || TREE_STATIC (exp)
6540 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
6541 return 1;
6542
6543 /* Otherwise, the only way this can conflict is if we are taking
6544 the address of a DECL a that address if part of X, which is
6545 very rare. */
6546 exp = TREE_OPERAND (exp, 0);
6547 if (DECL_P (exp))
6548 {
6549 if (!DECL_RTL_SET_P (exp)
6550 || !MEM_P (DECL_RTL (exp)))
6551 return 0;
6552 else
6553 exp_rtl = XEXP (DECL_RTL (exp), 0);
6554 }
6555 break;
6556
6557 case MISALIGNED_INDIRECT_REF:
6558 case ALIGN_INDIRECT_REF:
6559 case INDIRECT_REF:
6560 if (MEM_P (x)
6561 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
6562 get_alias_set (exp)))
6563 return 0;
6564 break;
6565
6566 case CALL_EXPR:
6567 /* Assume that the call will clobber all hard registers and
6568 all of memory. */
6569 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6570 || MEM_P (x))
6571 return 0;
6572 break;
6573
6574 case WITH_CLEANUP_EXPR:
6575 case CLEANUP_POINT_EXPR:
6576 /* Lowered by gimplify.c. */
6577 gcc_unreachable ();
6578
6579 case SAVE_EXPR:
6580 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6581
6582 default:
6583 break;
6584 }
6585
6586 /* If we have an rtx, we do not need to scan our operands. */
6587 if (exp_rtl)
6588 break;
6589
6590 nops = TREE_OPERAND_LENGTH (exp);
6591 for (i = 0; i < nops; i++)
6592 if (TREE_OPERAND (exp, i) != 0
6593 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
6594 return 0;
6595
6596 break;
6597
6598 case tcc_type:
6599 /* Should never get a type here. */
6600 gcc_unreachable ();
6601 }
6602
6603 /* If we have an rtl, find any enclosed object. Then see if we conflict
6604 with it. */
6605 if (exp_rtl)
6606 {
6607 if (GET_CODE (exp_rtl) == SUBREG)
6608 {
6609 exp_rtl = SUBREG_REG (exp_rtl);
6610 if (REG_P (exp_rtl)
6611 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
6612 return 0;
6613 }
6614
6615 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
6616 are memory and they conflict. */
6617 return ! (rtx_equal_p (x, exp_rtl)
6618 || (MEM_P (x) && MEM_P (exp_rtl)
6619 && true_dependence (exp_rtl, VOIDmode, x,
6620 rtx_addr_varies_p)));
6621 }
6622
6623 /* If we reach here, it is safe. */
6624 return 1;
6625 }
6626
6627 \f
6628 /* Return the highest power of two that EXP is known to be a multiple of.
6629 This is used in updating alignment of MEMs in array references. */
6630
6631 unsigned HOST_WIDE_INT
6632 highest_pow2_factor (const_tree exp)
6633 {
6634 unsigned HOST_WIDE_INT c0, c1;
6635
6636 switch (TREE_CODE (exp))
6637 {
6638 case INTEGER_CST:
6639 /* We can find the lowest bit that's a one. If the low
6640 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
6641 We need to handle this case since we can find it in a COND_EXPR,
6642 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
6643 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
6644 later ICE. */
6645 if (TREE_OVERFLOW (exp))
6646 return BIGGEST_ALIGNMENT;
6647 else
6648 {
6649 /* Note: tree_low_cst is intentionally not used here,
6650 we don't care about the upper bits. */
6651 c0 = TREE_INT_CST_LOW (exp);
6652 c0 &= -c0;
6653 return c0 ? c0 : BIGGEST_ALIGNMENT;
6654 }
6655 break;
6656
6657 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
6658 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6659 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6660 return MIN (c0, c1);
6661
6662 case MULT_EXPR:
6663 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6664 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6665 return c0 * c1;
6666
6667 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
6668 case CEIL_DIV_EXPR:
6669 if (integer_pow2p (TREE_OPERAND (exp, 1))
6670 && host_integerp (TREE_OPERAND (exp, 1), 1))
6671 {
6672 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6673 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
6674 return MAX (1, c0 / c1);
6675 }
6676 break;
6677
6678 case BIT_AND_EXPR:
6679 /* The highest power of two of a bit-and expression is the maximum of
6680 that of its operands. We typically get here for a complex LHS and
6681 a constant negative power of two on the RHS to force an explicit
6682 alignment, so don't bother looking at the LHS. */
6683 return highest_pow2_factor (TREE_OPERAND (exp, 1));
6684
6685 CASE_CONVERT:
6686 case SAVE_EXPR:
6687 return highest_pow2_factor (TREE_OPERAND (exp, 0));
6688
6689 case COMPOUND_EXPR:
6690 return highest_pow2_factor (TREE_OPERAND (exp, 1));
6691
6692 case COND_EXPR:
6693 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6694 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
6695 return MIN (c0, c1);
6696
6697 default:
6698 break;
6699 }
6700
6701 return 1;
6702 }
6703
6704 /* Similar, except that the alignment requirements of TARGET are
6705 taken into account. Assume it is at least as aligned as its
6706 type, unless it is a COMPONENT_REF in which case the layout of
6707 the structure gives the alignment. */
6708
6709 static unsigned HOST_WIDE_INT
6710 highest_pow2_factor_for_target (const_tree target, const_tree exp)
6711 {
6712 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
6713 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
6714
6715 return MAX (factor, talign);
6716 }
6717 \f
6718 /* Return &VAR expression for emulated thread local VAR. */
6719
6720 static tree
6721 emutls_var_address (tree var)
6722 {
6723 tree emuvar = emutls_decl (var);
6724 tree fn = built_in_decls [BUILT_IN_EMUTLS_GET_ADDRESS];
6725 tree arg = build_fold_addr_expr_with_type (emuvar, ptr_type_node);
6726 tree arglist = build_tree_list (NULL_TREE, arg);
6727 tree call = build_function_call_expr (fn, arglist);
6728 return fold_convert (build_pointer_type (TREE_TYPE (var)), call);
6729 }
6730 \f
6731
6732 /* Subroutine of expand_expr. Expand the two operands of a binary
6733 expression EXP0 and EXP1 placing the results in OP0 and OP1.
6734 The value may be stored in TARGET if TARGET is nonzero. The
6735 MODIFIER argument is as documented by expand_expr. */
6736
6737 static void
6738 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
6739 enum expand_modifier modifier)
6740 {
6741 if (! safe_from_p (target, exp1, 1))
6742 target = 0;
6743 if (operand_equal_p (exp0, exp1, 0))
6744 {
6745 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6746 *op1 = copy_rtx (*op0);
6747 }
6748 else
6749 {
6750 /* If we need to preserve evaluation order, copy exp0 into its own
6751 temporary variable so that it can't be clobbered by exp1. */
6752 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
6753 exp0 = save_expr (exp0);
6754 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6755 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
6756 }
6757 }
6758
6759 \f
6760 /* Return a MEM that contains constant EXP. DEFER is as for
6761 output_constant_def and MODIFIER is as for expand_expr. */
6762
6763 static rtx
6764 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
6765 {
6766 rtx mem;
6767
6768 mem = output_constant_def (exp, defer);
6769 if (modifier != EXPAND_INITIALIZER)
6770 mem = use_anchored_address (mem);
6771 return mem;
6772 }
6773
6774 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
6775 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
6776
6777 static rtx
6778 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
6779 enum expand_modifier modifier)
6780 {
6781 rtx result, subtarget;
6782 tree inner, offset;
6783 HOST_WIDE_INT bitsize, bitpos;
6784 int volatilep, unsignedp;
6785 enum machine_mode mode1;
6786
6787 /* If we are taking the address of a constant and are at the top level,
6788 we have to use output_constant_def since we can't call force_const_mem
6789 at top level. */
6790 /* ??? This should be considered a front-end bug. We should not be
6791 generating ADDR_EXPR of something that isn't an LVALUE. The only
6792 exception here is STRING_CST. */
6793 if (CONSTANT_CLASS_P (exp))
6794 return XEXP (expand_expr_constant (exp, 0, modifier), 0);
6795
6796 /* Everything must be something allowed by is_gimple_addressable. */
6797 switch (TREE_CODE (exp))
6798 {
6799 case INDIRECT_REF:
6800 /* This case will happen via recursion for &a->b. */
6801 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
6802
6803 case CONST_DECL:
6804 /* Recurse and make the output_constant_def clause above handle this. */
6805 return expand_expr_addr_expr_1 (DECL_INITIAL (exp), target,
6806 tmode, modifier);
6807
6808 case REALPART_EXPR:
6809 /* The real part of the complex number is always first, therefore
6810 the address is the same as the address of the parent object. */
6811 offset = 0;
6812 bitpos = 0;
6813 inner = TREE_OPERAND (exp, 0);
6814 break;
6815
6816 case IMAGPART_EXPR:
6817 /* The imaginary part of the complex number is always second.
6818 The expression is therefore always offset by the size of the
6819 scalar type. */
6820 offset = 0;
6821 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
6822 inner = TREE_OPERAND (exp, 0);
6823 break;
6824
6825 case VAR_DECL:
6826 /* TLS emulation hook - replace __thread VAR's &VAR with
6827 __emutls_get_address (&_emutls.VAR). */
6828 if (! targetm.have_tls
6829 && TREE_CODE (exp) == VAR_DECL
6830 && DECL_THREAD_LOCAL_P (exp))
6831 {
6832 exp = emutls_var_address (exp);
6833 return expand_expr (exp, target, tmode, modifier);
6834 }
6835 /* Fall through. */
6836
6837 default:
6838 /* If the object is a DECL, then expand it for its rtl. Don't bypass
6839 expand_expr, as that can have various side effects; LABEL_DECLs for
6840 example, may not have their DECL_RTL set yet. Expand the rtl of
6841 CONSTRUCTORs too, which should yield a memory reference for the
6842 constructor's contents. Assume language specific tree nodes can
6843 be expanded in some interesting way. */
6844 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
6845 if (DECL_P (exp)
6846 || TREE_CODE (exp) == CONSTRUCTOR
6847 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
6848 {
6849 result = expand_expr (exp, target, tmode,
6850 modifier == EXPAND_INITIALIZER
6851 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
6852
6853 /* If the DECL isn't in memory, then the DECL wasn't properly
6854 marked TREE_ADDRESSABLE, which will be either a front-end
6855 or a tree optimizer bug. */
6856 gcc_assert (MEM_P (result));
6857 result = XEXP (result, 0);
6858
6859 /* ??? Is this needed anymore? */
6860 if (DECL_P (exp) && !TREE_USED (exp) == 0)
6861 {
6862 assemble_external (exp);
6863 TREE_USED (exp) = 1;
6864 }
6865
6866 if (modifier != EXPAND_INITIALIZER
6867 && modifier != EXPAND_CONST_ADDRESS)
6868 result = force_operand (result, target);
6869 return result;
6870 }
6871
6872 /* Pass FALSE as the last argument to get_inner_reference although
6873 we are expanding to RTL. The rationale is that we know how to
6874 handle "aligning nodes" here: we can just bypass them because
6875 they won't change the final object whose address will be returned
6876 (they actually exist only for that purpose). */
6877 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
6878 &mode1, &unsignedp, &volatilep, false);
6879 break;
6880 }
6881
6882 /* We must have made progress. */
6883 gcc_assert (inner != exp);
6884
6885 subtarget = offset || bitpos ? NULL_RTX : target;
6886 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
6887 inner alignment, force the inner to be sufficiently aligned. */
6888 if (CONSTANT_CLASS_P (inner)
6889 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
6890 {
6891 inner = copy_node (inner);
6892 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
6893 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
6894 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
6895 }
6896 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier);
6897
6898 if (offset)
6899 {
6900 rtx tmp;
6901
6902 if (modifier != EXPAND_NORMAL)
6903 result = force_operand (result, NULL);
6904 tmp = expand_expr (offset, NULL_RTX, tmode,
6905 modifier == EXPAND_INITIALIZER
6906 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
6907
6908 result = convert_memory_address (tmode, result);
6909 tmp = convert_memory_address (tmode, tmp);
6910
6911 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
6912 result = gen_rtx_PLUS (tmode, result, tmp);
6913 else
6914 {
6915 subtarget = bitpos ? NULL_RTX : target;
6916 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
6917 1, OPTAB_LIB_WIDEN);
6918 }
6919 }
6920
6921 if (bitpos)
6922 {
6923 /* Someone beforehand should have rejected taking the address
6924 of such an object. */
6925 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
6926
6927 result = plus_constant (result, bitpos / BITS_PER_UNIT);
6928 if (modifier < EXPAND_SUM)
6929 result = force_operand (result, target);
6930 }
6931
6932 return result;
6933 }
6934
6935 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
6936 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
6937
6938 static rtx
6939 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
6940 enum expand_modifier modifier)
6941 {
6942 enum machine_mode rmode;
6943 rtx result;
6944
6945 /* Target mode of VOIDmode says "whatever's natural". */
6946 if (tmode == VOIDmode)
6947 tmode = TYPE_MODE (TREE_TYPE (exp));
6948
6949 /* We can get called with some Weird Things if the user does silliness
6950 like "(short) &a". In that case, convert_memory_address won't do
6951 the right thing, so ignore the given target mode. */
6952 if (tmode != Pmode && tmode != ptr_mode)
6953 tmode = Pmode;
6954
6955 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
6956 tmode, modifier);
6957
6958 /* Despite expand_expr claims concerning ignoring TMODE when not
6959 strictly convenient, stuff breaks if we don't honor it. Note
6960 that combined with the above, we only do this for pointer modes. */
6961 rmode = GET_MODE (result);
6962 if (rmode == VOIDmode)
6963 rmode = tmode;
6964 if (rmode != tmode)
6965 result = convert_memory_address (tmode, result);
6966
6967 return result;
6968 }
6969
6970 /* Generate code for computing CONSTRUCTOR EXP.
6971 An rtx for the computed value is returned. If AVOID_TEMP_MEM
6972 is TRUE, instead of creating a temporary variable in memory
6973 NULL is returned and the caller needs to handle it differently. */
6974
6975 static rtx
6976 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
6977 bool avoid_temp_mem)
6978 {
6979 tree type = TREE_TYPE (exp);
6980 enum machine_mode mode = TYPE_MODE (type);
6981
6982 /* Try to avoid creating a temporary at all. This is possible
6983 if all of the initializer is zero.
6984 FIXME: try to handle all [0..255] initializers we can handle
6985 with memset. */
6986 if (TREE_STATIC (exp)
6987 && !TREE_ADDRESSABLE (exp)
6988 && target != 0 && mode == BLKmode
6989 && all_zeros_p (exp))
6990 {
6991 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
6992 return target;
6993 }
6994
6995 /* All elts simple constants => refer to a constant in memory. But
6996 if this is a non-BLKmode mode, let it store a field at a time
6997 since that should make a CONST_INT or CONST_DOUBLE when we
6998 fold. Likewise, if we have a target we can use, it is best to
6999 store directly into the target unless the type is large enough
7000 that memcpy will be used. If we are making an initializer and
7001 all operands are constant, put it in memory as well.
7002
7003 FIXME: Avoid trying to fill vector constructors piece-meal.
7004 Output them with output_constant_def below unless we're sure
7005 they're zeros. This should go away when vector initializers
7006 are treated like VECTOR_CST instead of arrays. */
7007 if ((TREE_STATIC (exp)
7008 && ((mode == BLKmode
7009 && ! (target != 0 && safe_from_p (target, exp, 1)))
7010 || TREE_ADDRESSABLE (exp)
7011 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7012 && (! MOVE_BY_PIECES_P
7013 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7014 TYPE_ALIGN (type)))
7015 && ! mostly_zeros_p (exp))))
7016 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7017 && TREE_CONSTANT (exp)))
7018 {
7019 rtx constructor;
7020
7021 if (avoid_temp_mem)
7022 return NULL_RTX;
7023
7024 constructor = expand_expr_constant (exp, 1, modifier);
7025
7026 if (modifier != EXPAND_CONST_ADDRESS
7027 && modifier != EXPAND_INITIALIZER
7028 && modifier != EXPAND_SUM)
7029 constructor = validize_mem (constructor);
7030
7031 return constructor;
7032 }
7033
7034 /* Handle calls that pass values in multiple non-contiguous
7035 locations. The Irix 6 ABI has examples of this. */
7036 if (target == 0 || ! safe_from_p (target, exp, 1)
7037 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7038 {
7039 if (avoid_temp_mem)
7040 return NULL_RTX;
7041
7042 target
7043 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7044 | (TREE_READONLY (exp)
7045 * TYPE_QUAL_CONST))),
7046 0, TREE_ADDRESSABLE (exp), 1);
7047 }
7048
7049 store_constructor (exp, target, 0, int_expr_size (exp));
7050 return target;
7051 }
7052
7053
7054 /* expand_expr: generate code for computing expression EXP.
7055 An rtx for the computed value is returned. The value is never null.
7056 In the case of a void EXP, const0_rtx is returned.
7057
7058 The value may be stored in TARGET if TARGET is nonzero.
7059 TARGET is just a suggestion; callers must assume that
7060 the rtx returned may not be the same as TARGET.
7061
7062 If TARGET is CONST0_RTX, it means that the value will be ignored.
7063
7064 If TMODE is not VOIDmode, it suggests generating the
7065 result in mode TMODE. But this is done only when convenient.
7066 Otherwise, TMODE is ignored and the value generated in its natural mode.
7067 TMODE is just a suggestion; callers must assume that
7068 the rtx returned may not have mode TMODE.
7069
7070 Note that TARGET may have neither TMODE nor MODE. In that case, it
7071 probably will not be used.
7072
7073 If MODIFIER is EXPAND_SUM then when EXP is an addition
7074 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7075 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7076 products as above, or REG or MEM, or constant.
7077 Ordinarily in such cases we would output mul or add instructions
7078 and then return a pseudo reg containing the sum.
7079
7080 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7081 it also marks a label as absolutely required (it can't be dead).
7082 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7083 This is used for outputting expressions used in initializers.
7084
7085 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7086 with a constant address even if that address is not normally legitimate.
7087 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7088
7089 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7090 a call parameter. Such targets require special care as we haven't yet
7091 marked TARGET so that it's safe from being trashed by libcalls. We
7092 don't want to use TARGET for anything but the final result;
7093 Intermediate values must go elsewhere. Additionally, calls to
7094 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7095
7096 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7097 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7098 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7099 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7100 recursively. */
7101
7102 static rtx expand_expr_real_1 (tree, rtx, enum machine_mode,
7103 enum expand_modifier, rtx *);
7104
7105 rtx
7106 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7107 enum expand_modifier modifier, rtx *alt_rtl)
7108 {
7109 int rn = -1;
7110 rtx ret, last = NULL;
7111
7112 /* Handle ERROR_MARK before anybody tries to access its type. */
7113 if (TREE_CODE (exp) == ERROR_MARK
7114 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7115 {
7116 ret = CONST0_RTX (tmode);
7117 return ret ? ret : const0_rtx;
7118 }
7119
7120 if (flag_non_call_exceptions)
7121 {
7122 rn = lookup_expr_eh_region (exp);
7123
7124 /* If rn < 0, then either (1) tree-ssa not used or (2) doesn't throw. */
7125 if (rn >= 0)
7126 last = get_last_insn ();
7127 }
7128
7129 /* If this is an expression of some kind and it has an associated line
7130 number, then emit the line number before expanding the expression.
7131
7132 We need to save and restore the file and line information so that
7133 errors discovered during expansion are emitted with the right
7134 information. It would be better of the diagnostic routines
7135 used the file/line information embedded in the tree nodes rather
7136 than globals. */
7137 if (cfun && EXPR_HAS_LOCATION (exp))
7138 {
7139 location_t saved_location = input_location;
7140 input_location = EXPR_LOCATION (exp);
7141 set_curr_insn_source_location (input_location);
7142
7143 /* Record where the insns produced belong. */
7144 set_curr_insn_block (TREE_BLOCK (exp));
7145
7146 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7147
7148 input_location = saved_location;
7149 }
7150 else
7151 {
7152 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7153 }
7154
7155 /* If using non-call exceptions, mark all insns that may trap.
7156 expand_call() will mark CALL_INSNs before we get to this code,
7157 but it doesn't handle libcalls, and these may trap. */
7158 if (rn >= 0)
7159 {
7160 rtx insn;
7161 for (insn = next_real_insn (last); insn;
7162 insn = next_real_insn (insn))
7163 {
7164 if (! find_reg_note (insn, REG_EH_REGION, NULL_RTX)
7165 /* If we want exceptions for non-call insns, any
7166 may_trap_p instruction may throw. */
7167 && GET_CODE (PATTERN (insn)) != CLOBBER
7168 && GET_CODE (PATTERN (insn)) != USE
7169 && (CALL_P (insn) || may_trap_p (PATTERN (insn))))
7170 add_reg_note (insn, REG_EH_REGION, GEN_INT (rn));
7171 }
7172 }
7173
7174 return ret;
7175 }
7176
7177 static rtx
7178 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
7179 enum expand_modifier modifier, rtx *alt_rtl)
7180 {
7181 rtx op0, op1, op2, temp, decl_rtl;
7182 tree type;
7183 int unsignedp;
7184 enum machine_mode mode;
7185 enum tree_code code = TREE_CODE (exp);
7186 optab this_optab;
7187 rtx subtarget, original_target;
7188 int ignore;
7189 tree context, subexp0, subexp1;
7190 bool reduce_bit_field;
7191 gimple subexp0_def, subexp1_def;
7192 tree top0, top1;
7193 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7194 ? reduce_to_bit_field_precision ((expr), \
7195 target, \
7196 type) \
7197 : (expr))
7198
7199 type = TREE_TYPE (exp);
7200 mode = TYPE_MODE (type);
7201 unsignedp = TYPE_UNSIGNED (type);
7202
7203 ignore = (target == const0_rtx
7204 || ((CONVERT_EXPR_CODE_P (code)
7205 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7206 && TREE_CODE (type) == VOID_TYPE));
7207
7208 /* An operation in what may be a bit-field type needs the
7209 result to be reduced to the precision of the bit-field type,
7210 which is narrower than that of the type's mode. */
7211 reduce_bit_field = (!ignore
7212 && TREE_CODE (type) == INTEGER_TYPE
7213 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7214
7215 /* If we are going to ignore this result, we need only do something
7216 if there is a side-effect somewhere in the expression. If there
7217 is, short-circuit the most common cases here. Note that we must
7218 not call expand_expr with anything but const0_rtx in case this
7219 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
7220
7221 if (ignore)
7222 {
7223 if (! TREE_SIDE_EFFECTS (exp))
7224 return const0_rtx;
7225
7226 /* Ensure we reference a volatile object even if value is ignored, but
7227 don't do this if all we are doing is taking its address. */
7228 if (TREE_THIS_VOLATILE (exp)
7229 && TREE_CODE (exp) != FUNCTION_DECL
7230 && mode != VOIDmode && mode != BLKmode
7231 && modifier != EXPAND_CONST_ADDRESS)
7232 {
7233 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
7234 if (MEM_P (temp))
7235 temp = copy_to_reg (temp);
7236 return const0_rtx;
7237 }
7238
7239 if (TREE_CODE_CLASS (code) == tcc_unary
7240 || code == COMPONENT_REF || code == INDIRECT_REF)
7241 return expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
7242 modifier);
7243
7244 else if (TREE_CODE_CLASS (code) == tcc_binary
7245 || TREE_CODE_CLASS (code) == tcc_comparison
7246 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
7247 {
7248 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode, modifier);
7249 expand_expr (TREE_OPERAND (exp, 1), const0_rtx, VOIDmode, modifier);
7250 return const0_rtx;
7251 }
7252 else if (code == BIT_FIELD_REF)
7253 {
7254 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode, modifier);
7255 expand_expr (TREE_OPERAND (exp, 1), const0_rtx, VOIDmode, modifier);
7256 expand_expr (TREE_OPERAND (exp, 2), const0_rtx, VOIDmode, modifier);
7257 return const0_rtx;
7258 }
7259
7260 target = 0;
7261 }
7262
7263 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7264 target = 0;
7265
7266 /* Use subtarget as the target for operand 0 of a binary operation. */
7267 subtarget = get_subtarget (target);
7268 original_target = target;
7269
7270 switch (code)
7271 {
7272 case LABEL_DECL:
7273 {
7274 tree function = decl_function_context (exp);
7275
7276 temp = label_rtx (exp);
7277 temp = gen_rtx_LABEL_REF (Pmode, temp);
7278
7279 if (function != current_function_decl
7280 && function != 0)
7281 LABEL_REF_NONLOCAL_P (temp) = 1;
7282
7283 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
7284 return temp;
7285 }
7286
7287 case SSA_NAME:
7288 /* ??? ivopts calls expander, without any preparation from
7289 out-of-ssa. So fake instructions as if this was an access to the
7290 base variable. This unnecessarily allocates a pseudo, see how we can
7291 reuse it, if partition base vars have it set already. */
7292 if (!currently_expanding_to_rtl)
7293 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier, NULL);
7294 {
7295 gimple g = get_gimple_for_ssa_name (exp);
7296 if (g)
7297 return expand_expr_real_1 (gimple_assign_rhs_to_tree (g), target,
7298 tmode, modifier, NULL);
7299 }
7300 decl_rtl = get_rtx_for_ssa_name (exp);
7301 exp = SSA_NAME_VAR (exp);
7302 goto expand_decl_rtl;
7303
7304 case PARM_DECL:
7305 case VAR_DECL:
7306 /* If a static var's type was incomplete when the decl was written,
7307 but the type is complete now, lay out the decl now. */
7308 if (DECL_SIZE (exp) == 0
7309 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
7310 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
7311 layout_decl (exp, 0);
7312
7313 /* TLS emulation hook - replace __thread vars with
7314 *__emutls_get_address (&_emutls.var). */
7315 if (! targetm.have_tls
7316 && TREE_CODE (exp) == VAR_DECL
7317 && DECL_THREAD_LOCAL_P (exp))
7318 {
7319 exp = build_fold_indirect_ref (emutls_var_address (exp));
7320 return expand_expr_real_1 (exp, target, tmode, modifier, NULL);
7321 }
7322
7323 /* ... fall through ... */
7324
7325 case FUNCTION_DECL:
7326 case RESULT_DECL:
7327 decl_rtl = DECL_RTL (exp);
7328 expand_decl_rtl:
7329 gcc_assert (decl_rtl);
7330 decl_rtl = copy_rtx (decl_rtl);
7331
7332 /* Ensure variable marked as used even if it doesn't go through
7333 a parser. If it hasn't be used yet, write out an external
7334 definition. */
7335 if (! TREE_USED (exp))
7336 {
7337 assemble_external (exp);
7338 TREE_USED (exp) = 1;
7339 }
7340
7341 /* Show we haven't gotten RTL for this yet. */
7342 temp = 0;
7343
7344 /* Variables inherited from containing functions should have
7345 been lowered by this point. */
7346 context = decl_function_context (exp);
7347 gcc_assert (!context
7348 || context == current_function_decl
7349 || TREE_STATIC (exp)
7350 /* ??? C++ creates functions that are not TREE_STATIC. */
7351 || TREE_CODE (exp) == FUNCTION_DECL);
7352
7353 /* This is the case of an array whose size is to be determined
7354 from its initializer, while the initializer is still being parsed.
7355 See expand_decl. */
7356
7357 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
7358 temp = validize_mem (decl_rtl);
7359
7360 /* If DECL_RTL is memory, we are in the normal case and the
7361 address is not valid, get the address into a register. */
7362
7363 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
7364 {
7365 if (alt_rtl)
7366 *alt_rtl = decl_rtl;
7367 decl_rtl = use_anchored_address (decl_rtl);
7368 if (modifier != EXPAND_CONST_ADDRESS
7369 && modifier != EXPAND_SUM
7370 && !memory_address_p (DECL_MODE (exp), XEXP (decl_rtl, 0)))
7371 temp = replace_equiv_address (decl_rtl,
7372 copy_rtx (XEXP (decl_rtl, 0)));
7373 }
7374
7375 /* If we got something, return it. But first, set the alignment
7376 if the address is a register. */
7377 if (temp != 0)
7378 {
7379 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
7380 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
7381
7382 return temp;
7383 }
7384
7385 /* If the mode of DECL_RTL does not match that of the decl, it
7386 must be a promoted value. We return a SUBREG of the wanted mode,
7387 but mark it so that we know that it was already extended. */
7388
7389 if (REG_P (decl_rtl)
7390 && GET_MODE (decl_rtl) != DECL_MODE (exp))
7391 {
7392 enum machine_mode pmode;
7393
7394 /* Get the signedness used for this variable. Ensure we get the
7395 same mode we got when the variable was declared. */
7396 pmode = promote_mode (type, DECL_MODE (exp), &unsignedp,
7397 (TREE_CODE (exp) == RESULT_DECL
7398 || TREE_CODE (exp) == PARM_DECL) ? 1 : 0);
7399 gcc_assert (GET_MODE (decl_rtl) == pmode);
7400
7401 temp = gen_lowpart_SUBREG (mode, decl_rtl);
7402 SUBREG_PROMOTED_VAR_P (temp) = 1;
7403 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
7404 return temp;
7405 }
7406
7407 return decl_rtl;
7408
7409 case INTEGER_CST:
7410 temp = immed_double_const (TREE_INT_CST_LOW (exp),
7411 TREE_INT_CST_HIGH (exp), mode);
7412
7413 return temp;
7414
7415 case VECTOR_CST:
7416 {
7417 tree tmp = NULL_TREE;
7418 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
7419 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
7420 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
7421 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
7422 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
7423 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
7424 return const_vector_from_tree (exp);
7425 if (GET_MODE_CLASS (mode) == MODE_INT)
7426 {
7427 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
7428 if (type_for_mode)
7429 tmp = fold_unary (VIEW_CONVERT_EXPR, type_for_mode, exp);
7430 }
7431 if (!tmp)
7432 tmp = build_constructor_from_list (type,
7433 TREE_VECTOR_CST_ELTS (exp));
7434 return expand_expr (tmp, ignore ? const0_rtx : target,
7435 tmode, modifier);
7436 }
7437
7438 case CONST_DECL:
7439 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
7440
7441 case REAL_CST:
7442 /* If optimized, generate immediate CONST_DOUBLE
7443 which will be turned into memory by reload if necessary.
7444
7445 We used to force a register so that loop.c could see it. But
7446 this does not allow gen_* patterns to perform optimizations with
7447 the constants. It also produces two insns in cases like "x = 1.0;".
7448 On most machines, floating-point constants are not permitted in
7449 many insns, so we'd end up copying it to a register in any case.
7450
7451 Now, we do the copying in expand_binop, if appropriate. */
7452 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
7453 TYPE_MODE (TREE_TYPE (exp)));
7454
7455 case FIXED_CST:
7456 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
7457 TYPE_MODE (TREE_TYPE (exp)));
7458
7459 case COMPLEX_CST:
7460 /* Handle evaluating a complex constant in a CONCAT target. */
7461 if (original_target && GET_CODE (original_target) == CONCAT)
7462 {
7463 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
7464 rtx rtarg, itarg;
7465
7466 rtarg = XEXP (original_target, 0);
7467 itarg = XEXP (original_target, 1);
7468
7469 /* Move the real and imaginary parts separately. */
7470 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
7471 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
7472
7473 if (op0 != rtarg)
7474 emit_move_insn (rtarg, op0);
7475 if (op1 != itarg)
7476 emit_move_insn (itarg, op1);
7477
7478 return original_target;
7479 }
7480
7481 /* ... fall through ... */
7482
7483 case STRING_CST:
7484 temp = expand_expr_constant (exp, 1, modifier);
7485
7486 /* temp contains a constant address.
7487 On RISC machines where a constant address isn't valid,
7488 make some insns to get that address into a register. */
7489 if (modifier != EXPAND_CONST_ADDRESS
7490 && modifier != EXPAND_INITIALIZER
7491 && modifier != EXPAND_SUM
7492 && ! memory_address_p (mode, XEXP (temp, 0)))
7493 return replace_equiv_address (temp,
7494 copy_rtx (XEXP (temp, 0)));
7495 return temp;
7496
7497 case SAVE_EXPR:
7498 {
7499 tree val = TREE_OPERAND (exp, 0);
7500 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
7501
7502 if (!SAVE_EXPR_RESOLVED_P (exp))
7503 {
7504 /* We can indeed still hit this case, typically via builtin
7505 expanders calling save_expr immediately before expanding
7506 something. Assume this means that we only have to deal
7507 with non-BLKmode values. */
7508 gcc_assert (GET_MODE (ret) != BLKmode);
7509
7510 val = build_decl (VAR_DECL, NULL, TREE_TYPE (exp));
7511 DECL_ARTIFICIAL (val) = 1;
7512 DECL_IGNORED_P (val) = 1;
7513 TREE_OPERAND (exp, 0) = val;
7514 SAVE_EXPR_RESOLVED_P (exp) = 1;
7515
7516 if (!CONSTANT_P (ret))
7517 ret = copy_to_reg (ret);
7518 SET_DECL_RTL (val, ret);
7519 }
7520
7521 return ret;
7522 }
7523
7524 case GOTO_EXPR:
7525 if (TREE_CODE (TREE_OPERAND (exp, 0)) == LABEL_DECL)
7526 expand_goto (TREE_OPERAND (exp, 0));
7527 else
7528 expand_computed_goto (TREE_OPERAND (exp, 0));
7529 return const0_rtx;
7530
7531 case CONSTRUCTOR:
7532 /* If we don't need the result, just ensure we evaluate any
7533 subexpressions. */
7534 if (ignore)
7535 {
7536 unsigned HOST_WIDE_INT idx;
7537 tree value;
7538
7539 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
7540 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
7541
7542 return const0_rtx;
7543 }
7544
7545 return expand_constructor (exp, target, modifier, false);
7546
7547 case MISALIGNED_INDIRECT_REF:
7548 case ALIGN_INDIRECT_REF:
7549 case INDIRECT_REF:
7550 {
7551 tree exp1 = TREE_OPERAND (exp, 0);
7552
7553 if (modifier != EXPAND_WRITE)
7554 {
7555 tree t;
7556
7557 t = fold_read_from_constant_string (exp);
7558 if (t)
7559 return expand_expr (t, target, tmode, modifier);
7560 }
7561
7562 op0 = expand_expr (exp1, NULL_RTX, VOIDmode, EXPAND_SUM);
7563 op0 = memory_address (mode, op0);
7564
7565 if (code == ALIGN_INDIRECT_REF)
7566 {
7567 int align = TYPE_ALIGN_UNIT (type);
7568 op0 = gen_rtx_AND (Pmode, op0, GEN_INT (-align));
7569 op0 = memory_address (mode, op0);
7570 }
7571
7572 temp = gen_rtx_MEM (mode, op0);
7573
7574 set_mem_attributes (temp, exp, 0);
7575
7576 /* Resolve the misalignment now, so that we don't have to remember
7577 to resolve it later. Of course, this only works for reads. */
7578 /* ??? When we get around to supporting writes, we'll have to handle
7579 this in store_expr directly. The vectorizer isn't generating
7580 those yet, however. */
7581 if (code == MISALIGNED_INDIRECT_REF)
7582 {
7583 int icode;
7584 rtx reg, insn;
7585
7586 gcc_assert (modifier == EXPAND_NORMAL
7587 || modifier == EXPAND_STACK_PARM);
7588
7589 /* The vectorizer should have already checked the mode. */
7590 icode = optab_handler (movmisalign_optab, mode)->insn_code;
7591 gcc_assert (icode != CODE_FOR_nothing);
7592
7593 /* We've already validated the memory, and we're creating a
7594 new pseudo destination. The predicates really can't fail. */
7595 reg = gen_reg_rtx (mode);
7596
7597 /* Nor can the insn generator. */
7598 insn = GEN_FCN (icode) (reg, temp);
7599 emit_insn (insn);
7600
7601 return reg;
7602 }
7603
7604 return temp;
7605 }
7606
7607 case TARGET_MEM_REF:
7608 {
7609 struct mem_address addr;
7610
7611 get_address_description (exp, &addr);
7612 op0 = addr_for_mem_ref (&addr, true);
7613 op0 = memory_address (mode, op0);
7614 temp = gen_rtx_MEM (mode, op0);
7615 set_mem_attributes (temp, TMR_ORIGINAL (exp), 0);
7616 }
7617 return temp;
7618
7619 case ARRAY_REF:
7620
7621 {
7622 tree array = TREE_OPERAND (exp, 0);
7623 tree index = TREE_OPERAND (exp, 1);
7624
7625 /* Fold an expression like: "foo"[2].
7626 This is not done in fold so it won't happen inside &.
7627 Don't fold if this is for wide characters since it's too
7628 difficult to do correctly and this is a very rare case. */
7629
7630 if (modifier != EXPAND_CONST_ADDRESS
7631 && modifier != EXPAND_INITIALIZER
7632 && modifier != EXPAND_MEMORY)
7633 {
7634 tree t = fold_read_from_constant_string (exp);
7635
7636 if (t)
7637 return expand_expr (t, target, tmode, modifier);
7638 }
7639
7640 /* If this is a constant index into a constant array,
7641 just get the value from the array. Handle both the cases when
7642 we have an explicit constructor and when our operand is a variable
7643 that was declared const. */
7644
7645 if (modifier != EXPAND_CONST_ADDRESS
7646 && modifier != EXPAND_INITIALIZER
7647 && modifier != EXPAND_MEMORY
7648 && TREE_CODE (array) == CONSTRUCTOR
7649 && ! TREE_SIDE_EFFECTS (array)
7650 && TREE_CODE (index) == INTEGER_CST)
7651 {
7652 unsigned HOST_WIDE_INT ix;
7653 tree field, value;
7654
7655 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
7656 field, value)
7657 if (tree_int_cst_equal (field, index))
7658 {
7659 if (!TREE_SIDE_EFFECTS (value))
7660 return expand_expr (fold (value), target, tmode, modifier);
7661 break;
7662 }
7663 }
7664
7665 else if (optimize >= 1
7666 && modifier != EXPAND_CONST_ADDRESS
7667 && modifier != EXPAND_INITIALIZER
7668 && modifier != EXPAND_MEMORY
7669 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
7670 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
7671 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
7672 && targetm.binds_local_p (array))
7673 {
7674 if (TREE_CODE (index) == INTEGER_CST)
7675 {
7676 tree init = DECL_INITIAL (array);
7677
7678 if (TREE_CODE (init) == CONSTRUCTOR)
7679 {
7680 unsigned HOST_WIDE_INT ix;
7681 tree field, value;
7682
7683 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
7684 field, value)
7685 if (tree_int_cst_equal (field, index))
7686 {
7687 if (TREE_SIDE_EFFECTS (value))
7688 break;
7689
7690 if (TREE_CODE (value) == CONSTRUCTOR)
7691 {
7692 /* If VALUE is a CONSTRUCTOR, this
7693 optimization is only useful if
7694 this doesn't store the CONSTRUCTOR
7695 into memory. If it does, it is more
7696 efficient to just load the data from
7697 the array directly. */
7698 rtx ret = expand_constructor (value, target,
7699 modifier, true);
7700 if (ret == NULL_RTX)
7701 break;
7702 }
7703
7704 return expand_expr (fold (value), target, tmode,
7705 modifier);
7706 }
7707 }
7708 else if(TREE_CODE (init) == STRING_CST)
7709 {
7710 tree index1 = index;
7711 tree low_bound = array_ref_low_bound (exp);
7712 index1 = fold_convert (sizetype, TREE_OPERAND (exp, 1));
7713
7714 /* Optimize the special-case of a zero lower bound.
7715
7716 We convert the low_bound to sizetype to avoid some problems
7717 with constant folding. (E.g. suppose the lower bound is 1,
7718 and its mode is QI. Without the conversion,l (ARRAY
7719 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
7720 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
7721
7722 if (! integer_zerop (low_bound))
7723 index1 = size_diffop (index1, fold_convert (sizetype,
7724 low_bound));
7725
7726 if (0 > compare_tree_int (index1,
7727 TREE_STRING_LENGTH (init)))
7728 {
7729 tree type = TREE_TYPE (TREE_TYPE (init));
7730 enum machine_mode mode = TYPE_MODE (type);
7731
7732 if (GET_MODE_CLASS (mode) == MODE_INT
7733 && GET_MODE_SIZE (mode) == 1)
7734 return gen_int_mode (TREE_STRING_POINTER (init)
7735 [TREE_INT_CST_LOW (index1)],
7736 mode);
7737 }
7738 }
7739 }
7740 }
7741 }
7742 goto normal_inner_ref;
7743
7744 case COMPONENT_REF:
7745 /* If the operand is a CONSTRUCTOR, we can just extract the
7746 appropriate field if it is present. */
7747 if (TREE_CODE (TREE_OPERAND (exp, 0)) == CONSTRUCTOR)
7748 {
7749 unsigned HOST_WIDE_INT idx;
7750 tree field, value;
7751
7752 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (TREE_OPERAND (exp, 0)),
7753 idx, field, value)
7754 if (field == TREE_OPERAND (exp, 1)
7755 /* We can normally use the value of the field in the
7756 CONSTRUCTOR. However, if this is a bitfield in
7757 an integral mode that we can fit in a HOST_WIDE_INT,
7758 we must mask only the number of bits in the bitfield,
7759 since this is done implicitly by the constructor. If
7760 the bitfield does not meet either of those conditions,
7761 we can't do this optimization. */
7762 && (! DECL_BIT_FIELD (field)
7763 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
7764 && (GET_MODE_BITSIZE (DECL_MODE (field))
7765 <= HOST_BITS_PER_WIDE_INT))))
7766 {
7767 if (DECL_BIT_FIELD (field)
7768 && modifier == EXPAND_STACK_PARM)
7769 target = 0;
7770 op0 = expand_expr (value, target, tmode, modifier);
7771 if (DECL_BIT_FIELD (field))
7772 {
7773 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
7774 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
7775
7776 if (TYPE_UNSIGNED (TREE_TYPE (field)))
7777 {
7778 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
7779 op0 = expand_and (imode, op0, op1, target);
7780 }
7781 else
7782 {
7783 tree count
7784 = build_int_cst (NULL_TREE,
7785 GET_MODE_BITSIZE (imode) - bitsize);
7786
7787 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
7788 target, 0);
7789 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
7790 target, 0);
7791 }
7792 }
7793
7794 return op0;
7795 }
7796 }
7797 goto normal_inner_ref;
7798
7799 case BIT_FIELD_REF:
7800 case ARRAY_RANGE_REF:
7801 normal_inner_ref:
7802 {
7803 enum machine_mode mode1, mode2;
7804 HOST_WIDE_INT bitsize, bitpos;
7805 tree offset;
7806 int volatilep = 0, must_force_mem;
7807 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7808 &mode1, &unsignedp, &volatilep, true);
7809 rtx orig_op0, memloc;
7810
7811 /* If we got back the original object, something is wrong. Perhaps
7812 we are evaluating an expression too early. In any event, don't
7813 infinitely recurse. */
7814 gcc_assert (tem != exp);
7815
7816 /* If TEM's type is a union of variable size, pass TARGET to the inner
7817 computation, since it will need a temporary and TARGET is known
7818 to have to do. This occurs in unchecked conversion in Ada. */
7819 orig_op0 = op0
7820 = expand_expr (tem,
7821 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
7822 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
7823 != INTEGER_CST)
7824 && modifier != EXPAND_STACK_PARM
7825 ? target : NULL_RTX),
7826 VOIDmode,
7827 (modifier == EXPAND_INITIALIZER
7828 || modifier == EXPAND_CONST_ADDRESS
7829 || modifier == EXPAND_STACK_PARM)
7830 ? modifier : EXPAND_NORMAL);
7831
7832 mode2
7833 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
7834
7835 /* If we have either an offset, a BLKmode result, or a reference
7836 outside the underlying object, we must force it to memory.
7837 Such a case can occur in Ada if we have unchecked conversion
7838 of an expression from a scalar type to an aggregate type or
7839 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
7840 passed a partially uninitialized object or a view-conversion
7841 to a larger size. */
7842 must_force_mem = (offset
7843 || mode1 == BLKmode
7844 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
7845
7846 /* If this is a constant, put it in a register if it is a legitimate
7847 constant and we don't need a memory reference. */
7848 if (CONSTANT_P (op0)
7849 && mode2 != BLKmode
7850 && LEGITIMATE_CONSTANT_P (op0)
7851 && !must_force_mem)
7852 op0 = force_reg (mode2, op0);
7853
7854 /* Otherwise, if this is a constant, try to force it to the constant
7855 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
7856 is a legitimate constant. */
7857 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
7858 op0 = validize_mem (memloc);
7859
7860 /* Otherwise, if this is a constant or the object is not in memory
7861 and need be, put it there. */
7862 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
7863 {
7864 tree nt = build_qualified_type (TREE_TYPE (tem),
7865 (TYPE_QUALS (TREE_TYPE (tem))
7866 | TYPE_QUAL_CONST));
7867 memloc = assign_temp (nt, 1, 1, 1);
7868 emit_move_insn (memloc, op0);
7869 op0 = memloc;
7870 }
7871
7872 if (offset)
7873 {
7874 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
7875 EXPAND_SUM);
7876
7877 gcc_assert (MEM_P (op0));
7878
7879 #ifdef POINTERS_EXTEND_UNSIGNED
7880 if (GET_MODE (offset_rtx) != Pmode)
7881 offset_rtx = convert_to_mode (Pmode, offset_rtx, 0);
7882 #else
7883 if (GET_MODE (offset_rtx) != ptr_mode)
7884 offset_rtx = convert_to_mode (ptr_mode, offset_rtx, 0);
7885 #endif
7886
7887 if (GET_MODE (op0) == BLKmode
7888 /* A constant address in OP0 can have VOIDmode, we must
7889 not try to call force_reg in that case. */
7890 && GET_MODE (XEXP (op0, 0)) != VOIDmode
7891 && bitsize != 0
7892 && (bitpos % bitsize) == 0
7893 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
7894 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
7895 {
7896 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
7897 bitpos = 0;
7898 }
7899
7900 op0 = offset_address (op0, offset_rtx,
7901 highest_pow2_factor (offset));
7902 }
7903
7904 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
7905 record its alignment as BIGGEST_ALIGNMENT. */
7906 if (MEM_P (op0) && bitpos == 0 && offset != 0
7907 && is_aligning_offset (offset, tem))
7908 set_mem_align (op0, BIGGEST_ALIGNMENT);
7909
7910 /* Don't forget about volatility even if this is a bitfield. */
7911 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
7912 {
7913 if (op0 == orig_op0)
7914 op0 = copy_rtx (op0);
7915
7916 MEM_VOLATILE_P (op0) = 1;
7917 }
7918
7919 /* The following code doesn't handle CONCAT.
7920 Assume only bitpos == 0 can be used for CONCAT, due to
7921 one element arrays having the same mode as its element. */
7922 if (GET_CODE (op0) == CONCAT)
7923 {
7924 gcc_assert (bitpos == 0
7925 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)));
7926 return op0;
7927 }
7928
7929 /* In cases where an aligned union has an unaligned object
7930 as a field, we might be extracting a BLKmode value from
7931 an integer-mode (e.g., SImode) object. Handle this case
7932 by doing the extract into an object as wide as the field
7933 (which we know to be the width of a basic mode), then
7934 storing into memory, and changing the mode to BLKmode. */
7935 if (mode1 == VOIDmode
7936 || REG_P (op0) || GET_CODE (op0) == SUBREG
7937 || (mode1 != BLKmode && ! direct_load[(int) mode1]
7938 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
7939 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
7940 && modifier != EXPAND_CONST_ADDRESS
7941 && modifier != EXPAND_INITIALIZER)
7942 /* If the field isn't aligned enough to fetch as a memref,
7943 fetch it as a bit field. */
7944 || (mode1 != BLKmode
7945 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
7946 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
7947 || (MEM_P (op0)
7948 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
7949 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
7950 && ((modifier == EXPAND_CONST_ADDRESS
7951 || modifier == EXPAND_INITIALIZER)
7952 ? STRICT_ALIGNMENT
7953 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
7954 || (bitpos % BITS_PER_UNIT != 0)))
7955 /* If the type and the field are a constant size and the
7956 size of the type isn't the same size as the bitfield,
7957 we must use bitfield operations. */
7958 || (bitsize >= 0
7959 && TYPE_SIZE (TREE_TYPE (exp))
7960 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
7961 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
7962 bitsize)))
7963 {
7964 enum machine_mode ext_mode = mode;
7965
7966 if (ext_mode == BLKmode
7967 && ! (target != 0 && MEM_P (op0)
7968 && MEM_P (target)
7969 && bitpos % BITS_PER_UNIT == 0))
7970 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
7971
7972 if (ext_mode == BLKmode)
7973 {
7974 if (target == 0)
7975 target = assign_temp (type, 0, 1, 1);
7976
7977 if (bitsize == 0)
7978 return target;
7979
7980 /* In this case, BITPOS must start at a byte boundary and
7981 TARGET, if specified, must be a MEM. */
7982 gcc_assert (MEM_P (op0)
7983 && (!target || MEM_P (target))
7984 && !(bitpos % BITS_PER_UNIT));
7985
7986 emit_block_move (target,
7987 adjust_address (op0, VOIDmode,
7988 bitpos / BITS_PER_UNIT),
7989 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
7990 / BITS_PER_UNIT),
7991 (modifier == EXPAND_STACK_PARM
7992 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
7993
7994 return target;
7995 }
7996
7997 op0 = validize_mem (op0);
7998
7999 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
8000 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
8001
8002 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
8003 (modifier == EXPAND_STACK_PARM
8004 ? NULL_RTX : target),
8005 ext_mode, ext_mode);
8006
8007 /* If the result is a record type and BITSIZE is narrower than
8008 the mode of OP0, an integral mode, and this is a big endian
8009 machine, we must put the field into the high-order bits. */
8010 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
8011 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
8012 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
8013 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
8014 size_int (GET_MODE_BITSIZE (GET_MODE (op0))
8015 - bitsize),
8016 op0, 1);
8017
8018 /* If the result type is BLKmode, store the data into a temporary
8019 of the appropriate type, but with the mode corresponding to the
8020 mode for the data we have (op0's mode). It's tempting to make
8021 this a constant type, since we know it's only being stored once,
8022 but that can cause problems if we are taking the address of this
8023 COMPONENT_REF because the MEM of any reference via that address
8024 will have flags corresponding to the type, which will not
8025 necessarily be constant. */
8026 if (mode == BLKmode)
8027 {
8028 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
8029 rtx new_rtx;
8030
8031 /* If the reference doesn't use the alias set of its type,
8032 we cannot create the temporary using that type. */
8033 if (component_uses_parent_alias_set (exp))
8034 {
8035 new_rtx = assign_stack_local (ext_mode, size, 0);
8036 set_mem_alias_set (new_rtx, get_alias_set (exp));
8037 }
8038 else
8039 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
8040
8041 emit_move_insn (new_rtx, op0);
8042 op0 = copy_rtx (new_rtx);
8043 PUT_MODE (op0, BLKmode);
8044 set_mem_attributes (op0, exp, 1);
8045 }
8046
8047 return op0;
8048 }
8049
8050 /* If the result is BLKmode, use that to access the object
8051 now as well. */
8052 if (mode == BLKmode)
8053 mode1 = BLKmode;
8054
8055 /* Get a reference to just this component. */
8056 if (modifier == EXPAND_CONST_ADDRESS
8057 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8058 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
8059 else
8060 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
8061
8062 if (op0 == orig_op0)
8063 op0 = copy_rtx (op0);
8064
8065 set_mem_attributes (op0, exp, 0);
8066 if (REG_P (XEXP (op0, 0)))
8067 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
8068
8069 MEM_VOLATILE_P (op0) |= volatilep;
8070 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
8071 || modifier == EXPAND_CONST_ADDRESS
8072 || modifier == EXPAND_INITIALIZER)
8073 return op0;
8074 else if (target == 0)
8075 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8076
8077 convert_move (target, op0, unsignedp);
8078 return target;
8079 }
8080
8081 case OBJ_TYPE_REF:
8082 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
8083
8084 case CALL_EXPR:
8085 /* All valid uses of __builtin_va_arg_pack () are removed during
8086 inlining. */
8087 if (CALL_EXPR_VA_ARG_PACK (exp))
8088 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
8089 {
8090 tree fndecl = get_callee_fndecl (exp), attr;
8091
8092 if (fndecl
8093 && (attr = lookup_attribute ("error",
8094 DECL_ATTRIBUTES (fndecl))) != NULL)
8095 error ("%Kcall to %qs declared with attribute error: %s",
8096 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
8097 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
8098 if (fndecl
8099 && (attr = lookup_attribute ("warning",
8100 DECL_ATTRIBUTES (fndecl))) != NULL)
8101 warning_at (tree_nonartificial_location (exp),
8102 0, "%Kcall to %qs declared with attribute warning: %s",
8103 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
8104 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
8105
8106 /* Check for a built-in function. */
8107 if (fndecl && DECL_BUILT_IN (fndecl))
8108 {
8109 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
8110 return expand_builtin (exp, target, subtarget, tmode, ignore);
8111 }
8112 }
8113 return expand_call (exp, target, ignore);
8114
8115 case PAREN_EXPR:
8116 CASE_CONVERT:
8117 if (TREE_OPERAND (exp, 0) == error_mark_node)
8118 return const0_rtx;
8119
8120 if (TREE_CODE (type) == UNION_TYPE)
8121 {
8122 tree valtype = TREE_TYPE (TREE_OPERAND (exp, 0));
8123
8124 /* If both input and output are BLKmode, this conversion isn't doing
8125 anything except possibly changing memory attribute. */
8126 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8127 {
8128 rtx result = expand_expr (TREE_OPERAND (exp, 0), target, tmode,
8129 modifier);
8130
8131 result = copy_rtx (result);
8132 set_mem_attributes (result, exp, 0);
8133 return result;
8134 }
8135
8136 if (target == 0)
8137 {
8138 if (TYPE_MODE (type) != BLKmode)
8139 target = gen_reg_rtx (TYPE_MODE (type));
8140 else
8141 target = assign_temp (type, 0, 1, 1);
8142 }
8143
8144 if (MEM_P (target))
8145 /* Store data into beginning of memory target. */
8146 store_expr (TREE_OPERAND (exp, 0),
8147 adjust_address (target, TYPE_MODE (valtype), 0),
8148 modifier == EXPAND_STACK_PARM,
8149 false);
8150
8151 else
8152 {
8153 gcc_assert (REG_P (target));
8154
8155 /* Store this field into a union of the proper type. */
8156 store_field (target,
8157 MIN ((int_size_in_bytes (TREE_TYPE
8158 (TREE_OPERAND (exp, 0)))
8159 * BITS_PER_UNIT),
8160 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
8161 0, TYPE_MODE (valtype), TREE_OPERAND (exp, 0),
8162 type, 0, false);
8163 }
8164
8165 /* Return the entire union. */
8166 return target;
8167 }
8168
8169 if (mode == TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))))
8170 {
8171 op0 = expand_expr (TREE_OPERAND (exp, 0), target, VOIDmode,
8172 modifier);
8173
8174 /* If the signedness of the conversion differs and OP0 is
8175 a promoted SUBREG, clear that indication since we now
8176 have to do the proper extension. */
8177 if (TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))) != unsignedp
8178 && GET_CODE (op0) == SUBREG)
8179 SUBREG_PROMOTED_VAR_P (op0) = 0;
8180
8181 return REDUCE_BIT_FIELD (op0);
8182 }
8183
8184 op0 = expand_expr (TREE_OPERAND (exp, 0), NULL_RTX, mode,
8185 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8186 if (GET_MODE (op0) == mode)
8187 ;
8188
8189 /* If OP0 is a constant, just convert it into the proper mode. */
8190 else if (CONSTANT_P (op0))
8191 {
8192 tree inner_type = TREE_TYPE (TREE_OPERAND (exp, 0));
8193 enum machine_mode inner_mode = TYPE_MODE (inner_type);
8194
8195 if (modifier == EXPAND_INITIALIZER)
8196 op0 = simplify_gen_subreg (mode, op0, inner_mode,
8197 subreg_lowpart_offset (mode,
8198 inner_mode));
8199 else
8200 op0= convert_modes (mode, inner_mode, op0,
8201 TYPE_UNSIGNED (inner_type));
8202 }
8203
8204 else if (modifier == EXPAND_INITIALIZER)
8205 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8206
8207 else if (target == 0)
8208 op0 = convert_to_mode (mode, op0,
8209 TYPE_UNSIGNED (TREE_TYPE
8210 (TREE_OPERAND (exp, 0))));
8211 else
8212 {
8213 convert_move (target, op0,
8214 TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))));
8215 op0 = target;
8216 }
8217
8218 return REDUCE_BIT_FIELD (op0);
8219
8220 case VIEW_CONVERT_EXPR:
8221 op0 = NULL_RTX;
8222
8223 /* If we are converting to BLKmode, try to avoid an intermediate
8224 temporary by fetching an inner memory reference. */
8225 if (mode == BLKmode
8226 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
8227 && TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))) != BLKmode
8228 && handled_component_p (TREE_OPERAND (exp, 0)))
8229 {
8230 enum machine_mode mode1;
8231 HOST_WIDE_INT bitsize, bitpos;
8232 tree offset;
8233 int unsignedp;
8234 int volatilep = 0;
8235 tree tem
8236 = get_inner_reference (TREE_OPERAND (exp, 0), &bitsize, &bitpos,
8237 &offset, &mode1, &unsignedp, &volatilep,
8238 true);
8239 rtx orig_op0;
8240
8241 /* ??? We should work harder and deal with non-zero offsets. */
8242 if (!offset
8243 && (bitpos % BITS_PER_UNIT) == 0
8244 && bitsize >= 0
8245 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
8246 {
8247 /* See the normal_inner_ref case for the rationale. */
8248 orig_op0
8249 = expand_expr (tem,
8250 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
8251 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
8252 != INTEGER_CST)
8253 && modifier != EXPAND_STACK_PARM
8254 ? target : NULL_RTX),
8255 VOIDmode,
8256 (modifier == EXPAND_INITIALIZER
8257 || modifier == EXPAND_CONST_ADDRESS
8258 || modifier == EXPAND_STACK_PARM)
8259 ? modifier : EXPAND_NORMAL);
8260
8261 if (MEM_P (orig_op0))
8262 {
8263 op0 = orig_op0;
8264
8265 /* Get a reference to just this component. */
8266 if (modifier == EXPAND_CONST_ADDRESS
8267 || modifier == EXPAND_SUM
8268 || modifier == EXPAND_INITIALIZER)
8269 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
8270 else
8271 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
8272
8273 if (op0 == orig_op0)
8274 op0 = copy_rtx (op0);
8275
8276 set_mem_attributes (op0, TREE_OPERAND (exp, 0), 0);
8277 if (REG_P (XEXP (op0, 0)))
8278 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
8279
8280 MEM_VOLATILE_P (op0) |= volatilep;
8281 }
8282 }
8283 }
8284
8285 if (!op0)
8286 op0 = expand_expr (TREE_OPERAND (exp, 0),
8287 NULL_RTX, VOIDmode, modifier);
8288
8289 /* If the input and output modes are both the same, we are done. */
8290 if (mode == GET_MODE (op0))
8291 ;
8292 /* If neither mode is BLKmode, and both modes are the same size
8293 then we can use gen_lowpart. */
8294 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
8295 && GET_MODE_SIZE (mode) == GET_MODE_SIZE (GET_MODE (op0)))
8296 {
8297 if (GET_CODE (op0) == SUBREG)
8298 op0 = force_reg (GET_MODE (op0), op0);
8299 op0 = gen_lowpart (mode, op0);
8300 }
8301 /* If both modes are integral, then we can convert from one to the
8302 other. */
8303 else if (SCALAR_INT_MODE_P (GET_MODE (op0)) && SCALAR_INT_MODE_P (mode))
8304 op0 = convert_modes (mode, GET_MODE (op0), op0,
8305 TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))));
8306 /* As a last resort, spill op0 to memory, and reload it in a
8307 different mode. */
8308 else if (!MEM_P (op0))
8309 {
8310 /* If the operand is not a MEM, force it into memory. Since we
8311 are going to be changing the mode of the MEM, don't call
8312 force_const_mem for constants because we don't allow pool
8313 constants to change mode. */
8314 tree inner_type = TREE_TYPE (TREE_OPERAND (exp, 0));
8315
8316 gcc_assert (!TREE_ADDRESSABLE (exp));
8317
8318 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
8319 target
8320 = assign_stack_temp_for_type
8321 (TYPE_MODE (inner_type),
8322 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
8323
8324 emit_move_insn (target, op0);
8325 op0 = target;
8326 }
8327
8328 /* At this point, OP0 is in the correct mode. If the output type is
8329 such that the operand is known to be aligned, indicate that it is.
8330 Otherwise, we need only be concerned about alignment for non-BLKmode
8331 results. */
8332 if (MEM_P (op0))
8333 {
8334 op0 = copy_rtx (op0);
8335
8336 if (TYPE_ALIGN_OK (type))
8337 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
8338 else if (STRICT_ALIGNMENT
8339 && mode != BLKmode
8340 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
8341 {
8342 tree inner_type = TREE_TYPE (TREE_OPERAND (exp, 0));
8343 HOST_WIDE_INT temp_size
8344 = MAX (int_size_in_bytes (inner_type),
8345 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
8346 rtx new_rtx
8347 = assign_stack_temp_for_type (mode, temp_size, 0, type);
8348 rtx new_with_op0_mode
8349 = adjust_address (new_rtx, GET_MODE (op0), 0);
8350
8351 gcc_assert (!TREE_ADDRESSABLE (exp));
8352
8353 if (GET_MODE (op0) == BLKmode)
8354 emit_block_move (new_with_op0_mode, op0,
8355 GEN_INT (GET_MODE_SIZE (mode)),
8356 (modifier == EXPAND_STACK_PARM
8357 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
8358 else
8359 emit_move_insn (new_with_op0_mode, op0);
8360
8361 op0 = new_rtx;
8362 }
8363
8364 op0 = adjust_address (op0, mode, 0);
8365 }
8366
8367 return op0;
8368
8369 case POINTER_PLUS_EXPR:
8370 /* Even though the sizetype mode and the pointer's mode can be different
8371 expand is able to handle this correctly and get the correct result out
8372 of the PLUS_EXPR code. */
8373 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8374 if sizetype precision is smaller than pointer precision. */
8375 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8376 exp = build2 (PLUS_EXPR, type,
8377 TREE_OPERAND (exp, 0),
8378 fold_convert (type,
8379 fold_convert (ssizetype,
8380 TREE_OPERAND (exp, 1))));
8381 case PLUS_EXPR:
8382
8383 /* Check if this is a case for multiplication and addition. */
8384 if ((TREE_CODE (type) == INTEGER_TYPE
8385 || TREE_CODE (type) == FIXED_POINT_TYPE)
8386 && (subexp0_def = get_def_for_expr (TREE_OPERAND (exp, 0),
8387 MULT_EXPR)))
8388 {
8389 tree subsubexp0, subsubexp1;
8390 gimple subsubexp0_def, subsubexp1_def;
8391 enum tree_code this_code;
8392
8393 this_code = TREE_CODE (type) == INTEGER_TYPE ? NOP_EXPR
8394 : FIXED_CONVERT_EXPR;
8395 subsubexp0 = gimple_assign_rhs1 (subexp0_def);
8396 subsubexp0_def = get_def_for_expr (subsubexp0, this_code);
8397 subsubexp1 = gimple_assign_rhs2 (subexp0_def);
8398 subsubexp1_def = get_def_for_expr (subsubexp1, this_code);
8399 if (subsubexp0_def && subsubexp1_def
8400 && (top0 = gimple_assign_rhs1 (subsubexp0_def))
8401 && (top1 = gimple_assign_rhs1 (subsubexp1_def))
8402 && (TYPE_PRECISION (TREE_TYPE (top0))
8403 < TYPE_PRECISION (TREE_TYPE (subsubexp0)))
8404 && (TYPE_PRECISION (TREE_TYPE (top0))
8405 == TYPE_PRECISION (TREE_TYPE (top1)))
8406 && (TYPE_UNSIGNED (TREE_TYPE (top0))
8407 == TYPE_UNSIGNED (TREE_TYPE (top1))))
8408 {
8409 tree op0type = TREE_TYPE (top0);
8410 enum machine_mode innermode = TYPE_MODE (op0type);
8411 bool zextend_p = TYPE_UNSIGNED (op0type);
8412 bool sat_p = TYPE_SATURATING (TREE_TYPE (subsubexp0));
8413 if (sat_p == 0)
8414 this_optab = zextend_p ? umadd_widen_optab : smadd_widen_optab;
8415 else
8416 this_optab = zextend_p ? usmadd_widen_optab
8417 : ssmadd_widen_optab;
8418 if (mode == GET_MODE_2XWIDER_MODE (innermode)
8419 && (optab_handler (this_optab, mode)->insn_code
8420 != CODE_FOR_nothing))
8421 {
8422 expand_operands (top0, top1, NULL_RTX, &op0, &op1,
8423 EXPAND_NORMAL);
8424 op2 = expand_expr (TREE_OPERAND (exp, 1), subtarget,
8425 VOIDmode, EXPAND_NORMAL);
8426 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8427 target, unsignedp);
8428 gcc_assert (temp);
8429 return REDUCE_BIT_FIELD (temp);
8430 }
8431 }
8432 }
8433
8434 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8435 something else, make sure we add the register to the constant and
8436 then to the other thing. This case can occur during strength
8437 reduction and doing it this way will produce better code if the
8438 frame pointer or argument pointer is eliminated.
8439
8440 fold-const.c will ensure that the constant is always in the inner
8441 PLUS_EXPR, so the only case we need to do anything about is if
8442 sp, ap, or fp is our second argument, in which case we must swap
8443 the innermost first argument and our second argument. */
8444
8445 if (TREE_CODE (TREE_OPERAND (exp, 0)) == PLUS_EXPR
8446 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 1)) == INTEGER_CST
8447 && TREE_CODE (TREE_OPERAND (exp, 1)) == VAR_DECL
8448 && (DECL_RTL (TREE_OPERAND (exp, 1)) == frame_pointer_rtx
8449 || DECL_RTL (TREE_OPERAND (exp, 1)) == stack_pointer_rtx
8450 || DECL_RTL (TREE_OPERAND (exp, 1)) == arg_pointer_rtx))
8451 {
8452 tree t = TREE_OPERAND (exp, 1);
8453
8454 TREE_OPERAND (exp, 1) = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
8455 TREE_OPERAND (TREE_OPERAND (exp, 0), 0) = t;
8456 }
8457
8458 /* If the result is to be ptr_mode and we are adding an integer to
8459 something, we might be forming a constant. So try to use
8460 plus_constant. If it produces a sum and we can't accept it,
8461 use force_operand. This allows P = &ARR[const] to generate
8462 efficient code on machines where a SYMBOL_REF is not a valid
8463 address.
8464
8465 If this is an EXPAND_SUM call, always return the sum. */
8466 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8467 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8468 {
8469 if (modifier == EXPAND_STACK_PARM)
8470 target = 0;
8471 if (TREE_CODE (TREE_OPERAND (exp, 0)) == INTEGER_CST
8472 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
8473 && TREE_CONSTANT (TREE_OPERAND (exp, 1)))
8474 {
8475 rtx constant_part;
8476
8477 op1 = expand_expr (TREE_OPERAND (exp, 1), subtarget, VOIDmode,
8478 EXPAND_SUM);
8479 /* Use immed_double_const to ensure that the constant is
8480 truncated according to the mode of OP1, then sign extended
8481 to a HOST_WIDE_INT. Using the constant directly can result
8482 in non-canonical RTL in a 64x32 cross compile. */
8483 constant_part
8484 = immed_double_const (TREE_INT_CST_LOW (TREE_OPERAND (exp, 0)),
8485 (HOST_WIDE_INT) 0,
8486 TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 1))));
8487 op1 = plus_constant (op1, INTVAL (constant_part));
8488 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8489 op1 = force_operand (op1, target);
8490 return REDUCE_BIT_FIELD (op1);
8491 }
8492
8493 else if (TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST
8494 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
8495 && TREE_CONSTANT (TREE_OPERAND (exp, 0)))
8496 {
8497 rtx constant_part;
8498
8499 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode,
8500 (modifier == EXPAND_INITIALIZER
8501 ? EXPAND_INITIALIZER : EXPAND_SUM));
8502 if (! CONSTANT_P (op0))
8503 {
8504 op1 = expand_expr (TREE_OPERAND (exp, 1), NULL_RTX,
8505 VOIDmode, modifier);
8506 /* Return a PLUS if modifier says it's OK. */
8507 if (modifier == EXPAND_SUM
8508 || modifier == EXPAND_INITIALIZER)
8509 return simplify_gen_binary (PLUS, mode, op0, op1);
8510 goto binop2;
8511 }
8512 /* Use immed_double_const to ensure that the constant is
8513 truncated according to the mode of OP1, then sign extended
8514 to a HOST_WIDE_INT. Using the constant directly can result
8515 in non-canonical RTL in a 64x32 cross compile. */
8516 constant_part
8517 = immed_double_const (TREE_INT_CST_LOW (TREE_OPERAND (exp, 1)),
8518 (HOST_WIDE_INT) 0,
8519 TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))));
8520 op0 = plus_constant (op0, INTVAL (constant_part));
8521 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8522 op0 = force_operand (op0, target);
8523 return REDUCE_BIT_FIELD (op0);
8524 }
8525 }
8526
8527 /* No sense saving up arithmetic to be done
8528 if it's all in the wrong mode to form part of an address.
8529 And force_operand won't know whether to sign-extend or
8530 zero-extend. */
8531 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8532 || mode != ptr_mode)
8533 {
8534 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8535 subtarget, &op0, &op1, EXPAND_NORMAL);
8536 if (op0 == const0_rtx)
8537 return op1;
8538 if (op1 == const0_rtx)
8539 return op0;
8540 goto binop2;
8541 }
8542
8543 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8544 subtarget, &op0, &op1, modifier);
8545 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8546
8547 case MINUS_EXPR:
8548 /* Check if this is a case for multiplication and subtraction. */
8549 if ((TREE_CODE (type) == INTEGER_TYPE
8550 || TREE_CODE (type) == FIXED_POINT_TYPE)
8551 && (subexp1_def = get_def_for_expr (TREE_OPERAND (exp, 1),
8552 MULT_EXPR)))
8553 {
8554 tree subsubexp0, subsubexp1;
8555 gimple subsubexp0_def, subsubexp1_def;
8556 enum tree_code this_code;
8557
8558 this_code = TREE_CODE (type) == INTEGER_TYPE ? NOP_EXPR
8559 : FIXED_CONVERT_EXPR;
8560 subsubexp0 = gimple_assign_rhs1 (subexp1_def);
8561 subsubexp0_def = get_def_for_expr (subsubexp0, this_code);
8562 subsubexp1 = gimple_assign_rhs2 (subexp1_def);
8563 subsubexp1_def = get_def_for_expr (subsubexp1, this_code);
8564 if (subsubexp0_def && subsubexp1_def
8565 && (top0 = gimple_assign_rhs1 (subsubexp0_def))
8566 && (top1 = gimple_assign_rhs1 (subsubexp1_def))
8567 && (TYPE_PRECISION (TREE_TYPE (top0))
8568 < TYPE_PRECISION (TREE_TYPE (subsubexp0)))
8569 && (TYPE_PRECISION (TREE_TYPE (top0))
8570 == TYPE_PRECISION (TREE_TYPE (top1)))
8571 && (TYPE_UNSIGNED (TREE_TYPE (top0))
8572 == TYPE_UNSIGNED (TREE_TYPE (top1))))
8573 {
8574 tree op0type = TREE_TYPE (top0);
8575 enum machine_mode innermode = TYPE_MODE (op0type);
8576 bool zextend_p = TYPE_UNSIGNED (op0type);
8577 bool sat_p = TYPE_SATURATING (TREE_TYPE (subsubexp0));
8578 if (sat_p == 0)
8579 this_optab = zextend_p ? umsub_widen_optab : smsub_widen_optab;
8580 else
8581 this_optab = zextend_p ? usmsub_widen_optab
8582 : ssmsub_widen_optab;
8583 if (mode == GET_MODE_2XWIDER_MODE (innermode)
8584 && (optab_handler (this_optab, mode)->insn_code
8585 != CODE_FOR_nothing))
8586 {
8587 expand_operands (top0, top1, NULL_RTX, &op0, &op1,
8588 EXPAND_NORMAL);
8589 op2 = expand_expr (TREE_OPERAND (exp, 0), subtarget,
8590 VOIDmode, EXPAND_NORMAL);
8591 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8592 target, unsignedp);
8593 gcc_assert (temp);
8594 return REDUCE_BIT_FIELD (temp);
8595 }
8596 }
8597 }
8598
8599 /* For initializers, we are allowed to return a MINUS of two
8600 symbolic constants. Here we handle all cases when both operands
8601 are constant. */
8602 /* Handle difference of two symbolic constants,
8603 for the sake of an initializer. */
8604 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8605 && really_constant_p (TREE_OPERAND (exp, 0))
8606 && really_constant_p (TREE_OPERAND (exp, 1)))
8607 {
8608 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8609 NULL_RTX, &op0, &op1, modifier);
8610
8611 /* If the last operand is a CONST_INT, use plus_constant of
8612 the negated constant. Else make the MINUS. */
8613 if (GET_CODE (op1) == CONST_INT)
8614 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
8615 else
8616 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8617 }
8618
8619 /* No sense saving up arithmetic to be done
8620 if it's all in the wrong mode to form part of an address.
8621 And force_operand won't know whether to sign-extend or
8622 zero-extend. */
8623 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8624 || mode != ptr_mode)
8625 goto binop;
8626
8627 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8628 subtarget, &op0, &op1, modifier);
8629
8630 /* Convert A - const to A + (-const). */
8631 if (GET_CODE (op1) == CONST_INT)
8632 {
8633 op1 = negate_rtx (mode, op1);
8634 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8635 }
8636
8637 goto binop2;
8638
8639 case MULT_EXPR:
8640 /* If this is a fixed-point operation, then we cannot use the code
8641 below because "expand_mult" doesn't support sat/no-sat fixed-point
8642 multiplications. */
8643 if (ALL_FIXED_POINT_MODE_P (mode))
8644 goto binop;
8645
8646 /* If first operand is constant, swap them.
8647 Thus the following special case checks need only
8648 check the second operand. */
8649 if (TREE_CODE (TREE_OPERAND (exp, 0)) == INTEGER_CST)
8650 {
8651 tree t1 = TREE_OPERAND (exp, 0);
8652 TREE_OPERAND (exp, 0) = TREE_OPERAND (exp, 1);
8653 TREE_OPERAND (exp, 1) = t1;
8654 }
8655
8656 /* Attempt to return something suitable for generating an
8657 indexed address, for machines that support that. */
8658
8659 if (modifier == EXPAND_SUM && mode == ptr_mode
8660 && host_integerp (TREE_OPERAND (exp, 1), 0))
8661 {
8662 tree exp1 = TREE_OPERAND (exp, 1);
8663
8664 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode,
8665 EXPAND_SUM);
8666
8667 if (!REG_P (op0))
8668 op0 = force_operand (op0, NULL_RTX);
8669 if (!REG_P (op0))
8670 op0 = copy_to_mode_reg (mode, op0);
8671
8672 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8673 gen_int_mode (tree_low_cst (exp1, 0),
8674 TYPE_MODE (TREE_TYPE (exp1)))));
8675 }
8676
8677 if (modifier == EXPAND_STACK_PARM)
8678 target = 0;
8679
8680 /* Check for multiplying things that have been extended
8681 from a narrower type. If this machine supports multiplying
8682 in that narrower type with a result in the desired type,
8683 do it that way, and avoid the explicit type-conversion. */
8684
8685 subexp0 = TREE_OPERAND (exp, 0);
8686 subexp1 = TREE_OPERAND (exp, 1);
8687 subexp0_def = get_def_for_expr (subexp0, NOP_EXPR);
8688 subexp1_def = get_def_for_expr (subexp1, NOP_EXPR);
8689 top0 = top1 = NULL_TREE;
8690
8691 /* First, check if we have a multiplication of one signed and one
8692 unsigned operand. */
8693 if (subexp0_def
8694 && (top0 = gimple_assign_rhs1 (subexp0_def))
8695 && subexp1_def
8696 && (top1 = gimple_assign_rhs1 (subexp1_def))
8697 && TREE_CODE (type) == INTEGER_TYPE
8698 && (TYPE_PRECISION (TREE_TYPE (top0))
8699 < TYPE_PRECISION (TREE_TYPE (subexp0)))
8700 && (TYPE_PRECISION (TREE_TYPE (top0))
8701 == TYPE_PRECISION (TREE_TYPE (top1)))
8702 && (TYPE_UNSIGNED (TREE_TYPE (top0))
8703 != TYPE_UNSIGNED (TREE_TYPE (top1))))
8704 {
8705 enum machine_mode innermode
8706 = TYPE_MODE (TREE_TYPE (top0));
8707 this_optab = usmul_widen_optab;
8708 if (mode == GET_MODE_WIDER_MODE (innermode))
8709 {
8710 if (optab_handler (this_optab, mode)->insn_code != CODE_FOR_nothing)
8711 {
8712 if (TYPE_UNSIGNED (TREE_TYPE (top0)))
8713 expand_operands (top0, top1, NULL_RTX, &op0, &op1,
8714 EXPAND_NORMAL);
8715 else
8716 expand_operands (top0, top1, NULL_RTX, &op1, &op0,
8717 EXPAND_NORMAL);
8718
8719 goto binop3;
8720 }
8721 }
8722 }
8723 /* Check for a multiplication with matching signedness. If
8724 valid, TOP0 and TOP1 were set in the previous if
8725 condition. */
8726 else if (top0
8727 && TREE_CODE (type) == INTEGER_TYPE
8728 && (TYPE_PRECISION (TREE_TYPE (top0))
8729 < TYPE_PRECISION (TREE_TYPE (subexp0)))
8730 && ((TREE_CODE (subexp1) == INTEGER_CST
8731 && int_fits_type_p (subexp1, TREE_TYPE (top0))
8732 /* Don't use a widening multiply if a shift will do. */
8733 && ((GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (subexp1)))
8734 > HOST_BITS_PER_WIDE_INT)
8735 || exact_log2 (TREE_INT_CST_LOW (subexp1)) < 0))
8736 ||
8737 (top1
8738 && (TYPE_PRECISION (TREE_TYPE (top1))
8739 == TYPE_PRECISION (TREE_TYPE (top0))
8740 /* If both operands are extended, they must either both
8741 be zero-extended or both be sign-extended. */
8742 && (TYPE_UNSIGNED (TREE_TYPE (top1))
8743 == TYPE_UNSIGNED (TREE_TYPE (top0)))))))
8744 {
8745 tree op0type = TREE_TYPE (top0);
8746 enum machine_mode innermode = TYPE_MODE (op0type);
8747 bool zextend_p = TYPE_UNSIGNED (op0type);
8748 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8749 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8750
8751 if (mode == GET_MODE_2XWIDER_MODE (innermode))
8752 {
8753 if (optab_handler (this_optab, mode)->insn_code != CODE_FOR_nothing)
8754 {
8755 if (TREE_CODE (subexp1) == INTEGER_CST)
8756 expand_operands (top0, subexp1, NULL_RTX, &op0, &op1,
8757 EXPAND_NORMAL);
8758 else
8759 expand_operands (top0, top1, NULL_RTX, &op0, &op1,
8760 EXPAND_NORMAL);
8761 goto binop3;
8762 }
8763 else if (optab_handler (other_optab, mode)->insn_code != CODE_FOR_nothing
8764 && innermode == word_mode)
8765 {
8766 rtx htem, hipart;
8767 op0 = expand_normal (top0);
8768 if (TREE_CODE (subexp1) == INTEGER_CST)
8769 op1 = convert_modes (innermode, mode,
8770 expand_normal (subexp1), unsignedp);
8771 else
8772 op1 = expand_normal (top1);
8773 temp = expand_binop (mode, other_optab, op0, op1, target,
8774 unsignedp, OPTAB_LIB_WIDEN);
8775 hipart = gen_highpart (innermode, temp);
8776 htem = expand_mult_highpart_adjust (innermode, hipart,
8777 op0, op1, hipart,
8778 zextend_p);
8779 if (htem != hipart)
8780 emit_move_insn (hipart, htem);
8781 return REDUCE_BIT_FIELD (temp);
8782 }
8783 }
8784 }
8785 expand_operands (subexp0, subexp1, subtarget, &op0, &op1, EXPAND_NORMAL);
8786 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8787
8788 case TRUNC_DIV_EXPR:
8789 case FLOOR_DIV_EXPR:
8790 case CEIL_DIV_EXPR:
8791 case ROUND_DIV_EXPR:
8792 case EXACT_DIV_EXPR:
8793 /* If this is a fixed-point operation, then we cannot use the code
8794 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8795 divisions. */
8796 if (ALL_FIXED_POINT_MODE_P (mode))
8797 goto binop;
8798
8799 if (modifier == EXPAND_STACK_PARM)
8800 target = 0;
8801 /* Possible optimization: compute the dividend with EXPAND_SUM
8802 then if the divisor is constant can optimize the case
8803 where some terms of the dividend have coeffs divisible by it. */
8804 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8805 subtarget, &op0, &op1, EXPAND_NORMAL);
8806 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8807
8808 case RDIV_EXPR:
8809 goto binop;
8810
8811 case TRUNC_MOD_EXPR:
8812 case FLOOR_MOD_EXPR:
8813 case CEIL_MOD_EXPR:
8814 case ROUND_MOD_EXPR:
8815 if (modifier == EXPAND_STACK_PARM)
8816 target = 0;
8817 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8818 subtarget, &op0, &op1, EXPAND_NORMAL);
8819 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8820
8821 case FIXED_CONVERT_EXPR:
8822 op0 = expand_normal (TREE_OPERAND (exp, 0));
8823 if (target == 0 || modifier == EXPAND_STACK_PARM)
8824 target = gen_reg_rtx (mode);
8825
8826 if ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == INTEGER_TYPE
8827 && TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))))
8828 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8829 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8830 else
8831 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8832 return target;
8833
8834 case FIX_TRUNC_EXPR:
8835 op0 = expand_normal (TREE_OPERAND (exp, 0));
8836 if (target == 0 || modifier == EXPAND_STACK_PARM)
8837 target = gen_reg_rtx (mode);
8838 expand_fix (target, op0, unsignedp);
8839 return target;
8840
8841 case FLOAT_EXPR:
8842 op0 = expand_normal (TREE_OPERAND (exp, 0));
8843 if (target == 0 || modifier == EXPAND_STACK_PARM)
8844 target = gen_reg_rtx (mode);
8845 /* expand_float can't figure out what to do if FROM has VOIDmode.
8846 So give it the correct mode. With -O, cse will optimize this. */
8847 if (GET_MODE (op0) == VOIDmode)
8848 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))),
8849 op0);
8850 expand_float (target, op0,
8851 TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))));
8852 return target;
8853
8854 case NEGATE_EXPR:
8855 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget,
8856 VOIDmode, EXPAND_NORMAL);
8857 if (modifier == EXPAND_STACK_PARM)
8858 target = 0;
8859 temp = expand_unop (mode,
8860 optab_for_tree_code (NEGATE_EXPR, type,
8861 optab_default),
8862 op0, target, 0);
8863 gcc_assert (temp);
8864 return REDUCE_BIT_FIELD (temp);
8865
8866 case ABS_EXPR:
8867 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget,
8868 VOIDmode, EXPAND_NORMAL);
8869 if (modifier == EXPAND_STACK_PARM)
8870 target = 0;
8871
8872 /* ABS_EXPR is not valid for complex arguments. */
8873 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8874 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8875
8876 /* Unsigned abs is simply the operand. Testing here means we don't
8877 risk generating incorrect code below. */
8878 if (TYPE_UNSIGNED (type))
8879 return op0;
8880
8881 return expand_abs (mode, op0, target, unsignedp,
8882 safe_from_p (target, TREE_OPERAND (exp, 0), 1));
8883
8884 case MAX_EXPR:
8885 case MIN_EXPR:
8886 target = original_target;
8887 if (target == 0
8888 || modifier == EXPAND_STACK_PARM
8889 || (MEM_P (target) && MEM_VOLATILE_P (target))
8890 || GET_MODE (target) != mode
8891 || (REG_P (target)
8892 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8893 target = gen_reg_rtx (mode);
8894 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8895 target, &op0, &op1, EXPAND_NORMAL);
8896
8897 /* First try to do it with a special MIN or MAX instruction.
8898 If that does not win, use a conditional jump to select the proper
8899 value. */
8900 this_optab = optab_for_tree_code (code, type, optab_default);
8901 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8902 OPTAB_WIDEN);
8903 if (temp != 0)
8904 return temp;
8905
8906 /* At this point, a MEM target is no longer useful; we will get better
8907 code without it. */
8908
8909 if (! REG_P (target))
8910 target = gen_reg_rtx (mode);
8911
8912 /* If op1 was placed in target, swap op0 and op1. */
8913 if (target != op0 && target == op1)
8914 {
8915 temp = op0;
8916 op0 = op1;
8917 op1 = temp;
8918 }
8919
8920 /* We generate better code and avoid problems with op1 mentioning
8921 target by forcing op1 into a pseudo if it isn't a constant. */
8922 if (! CONSTANT_P (op1))
8923 op1 = force_reg (mode, op1);
8924
8925 {
8926 enum rtx_code comparison_code;
8927 rtx cmpop1 = op1;
8928
8929 if (code == MAX_EXPR)
8930 comparison_code = unsignedp ? GEU : GE;
8931 else
8932 comparison_code = unsignedp ? LEU : LE;
8933
8934 /* Canonicalize to comparisons against 0. */
8935 if (op1 == const1_rtx)
8936 {
8937 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8938 or (a != 0 ? a : 1) for unsigned.
8939 For MIN we are safe converting (a <= 1 ? a : 1)
8940 into (a <= 0 ? a : 1) */
8941 cmpop1 = const0_rtx;
8942 if (code == MAX_EXPR)
8943 comparison_code = unsignedp ? NE : GT;
8944 }
8945 if (op1 == constm1_rtx && !unsignedp)
8946 {
8947 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8948 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8949 cmpop1 = const0_rtx;
8950 if (code == MIN_EXPR)
8951 comparison_code = LT;
8952 }
8953 #ifdef HAVE_conditional_move
8954 /* Use a conditional move if possible. */
8955 if (can_conditionally_move_p (mode))
8956 {
8957 rtx insn;
8958
8959 /* ??? Same problem as in expmed.c: emit_conditional_move
8960 forces a stack adjustment via compare_from_rtx, and we
8961 lose the stack adjustment if the sequence we are about
8962 to create is discarded. */
8963 do_pending_stack_adjust ();
8964
8965 start_sequence ();
8966
8967 /* Try to emit the conditional move. */
8968 insn = emit_conditional_move (target, comparison_code,
8969 op0, cmpop1, mode,
8970 op0, op1, mode,
8971 unsignedp);
8972
8973 /* If we could do the conditional move, emit the sequence,
8974 and return. */
8975 if (insn)
8976 {
8977 rtx seq = get_insns ();
8978 end_sequence ();
8979 emit_insn (seq);
8980 return target;
8981 }
8982
8983 /* Otherwise discard the sequence and fall back to code with
8984 branches. */
8985 end_sequence ();
8986 }
8987 #endif
8988 if (target != op0)
8989 emit_move_insn (target, op0);
8990
8991 temp = gen_label_rtx ();
8992 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8993 unsignedp, mode, NULL_RTX, NULL_RTX, temp);
8994 }
8995 emit_move_insn (target, op1);
8996 emit_label (temp);
8997 return target;
8998
8999 case BIT_NOT_EXPR:
9000 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget,
9001 VOIDmode, EXPAND_NORMAL);
9002 if (modifier == EXPAND_STACK_PARM)
9003 target = 0;
9004 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
9005 gcc_assert (temp);
9006 return temp;
9007
9008 /* ??? Can optimize bitwise operations with one arg constant.
9009 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9010 and (a bitwise1 b) bitwise2 b (etc)
9011 but that is probably not worth while. */
9012
9013 /* BIT_AND_EXPR is for bitwise anding. TRUTH_AND_EXPR is for anding two
9014 boolean values when we want in all cases to compute both of them. In
9015 general it is fastest to do TRUTH_AND_EXPR by computing both operands
9016 as actual zero-or-1 values and then bitwise anding. In cases where
9017 there cannot be any side effects, better code would be made by
9018 treating TRUTH_AND_EXPR like TRUTH_ANDIF_EXPR; but the question is
9019 how to recognize those cases. */
9020
9021 case TRUTH_AND_EXPR:
9022 code = BIT_AND_EXPR;
9023 case BIT_AND_EXPR:
9024 goto binop;
9025
9026 case TRUTH_OR_EXPR:
9027 code = BIT_IOR_EXPR;
9028 case BIT_IOR_EXPR:
9029 goto binop;
9030
9031 case TRUTH_XOR_EXPR:
9032 code = BIT_XOR_EXPR;
9033 case BIT_XOR_EXPR:
9034 goto binop;
9035
9036 case LROTATE_EXPR:
9037 case RROTATE_EXPR:
9038 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
9039 || (GET_MODE_PRECISION (TYPE_MODE (type))
9040 == TYPE_PRECISION (type)));
9041 /* fall through */
9042
9043 case LSHIFT_EXPR:
9044 case RSHIFT_EXPR:
9045 /* If this is a fixed-point operation, then we cannot use the code
9046 below because "expand_shift" doesn't support sat/no-sat fixed-point
9047 shifts. */
9048 if (ALL_FIXED_POINT_MODE_P (mode))
9049 goto binop;
9050
9051 if (! safe_from_p (subtarget, TREE_OPERAND (exp, 1), 1))
9052 subtarget = 0;
9053 if (modifier == EXPAND_STACK_PARM)
9054 target = 0;
9055 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget,
9056 VOIDmode, EXPAND_NORMAL);
9057 temp = expand_shift (code, mode, op0, TREE_OPERAND (exp, 1), target,
9058 unsignedp);
9059 if (code == LSHIFT_EXPR)
9060 temp = REDUCE_BIT_FIELD (temp);
9061 return temp;
9062
9063 /* Could determine the answer when only additive constants differ. Also,
9064 the addition of one can be handled by changing the condition. */
9065 case LT_EXPR:
9066 case LE_EXPR:
9067 case GT_EXPR:
9068 case GE_EXPR:
9069 case EQ_EXPR:
9070 case NE_EXPR:
9071 case UNORDERED_EXPR:
9072 case ORDERED_EXPR:
9073 case UNLT_EXPR:
9074 case UNLE_EXPR:
9075 case UNGT_EXPR:
9076 case UNGE_EXPR:
9077 case UNEQ_EXPR:
9078 case LTGT_EXPR:
9079 temp = do_store_flag (exp,
9080 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
9081 tmode != VOIDmode ? tmode : mode);
9082 if (temp != 0)
9083 return temp;
9084
9085 /* For foo != 0, load foo, and if it is nonzero load 1 instead. */
9086 if (code == NE_EXPR && integer_zerop (TREE_OPERAND (exp, 1))
9087 && original_target
9088 && REG_P (original_target)
9089 && (GET_MODE (original_target)
9090 == TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0)))))
9091 {
9092 temp = expand_expr (TREE_OPERAND (exp, 0), original_target,
9093 VOIDmode, EXPAND_NORMAL);
9094
9095 /* If temp is constant, we can just compute the result. */
9096 if (GET_CODE (temp) == CONST_INT)
9097 {
9098 if (INTVAL (temp) != 0)
9099 emit_move_insn (target, const1_rtx);
9100 else
9101 emit_move_insn (target, const0_rtx);
9102
9103 return target;
9104 }
9105
9106 if (temp != original_target)
9107 {
9108 enum machine_mode mode1 = GET_MODE (temp);
9109 if (mode1 == VOIDmode)
9110 mode1 = tmode != VOIDmode ? tmode : mode;
9111
9112 temp = copy_to_mode_reg (mode1, temp);
9113 }
9114
9115 op1 = gen_label_rtx ();
9116 emit_cmp_and_jump_insns (temp, const0_rtx, EQ, NULL_RTX,
9117 GET_MODE (temp), unsignedp, op1);
9118 emit_move_insn (temp, const1_rtx);
9119 emit_label (op1);
9120 return temp;
9121 }
9122
9123 /* If no set-flag instruction, must generate a conditional store
9124 into a temporary variable. Drop through and handle this
9125 like && and ||. */
9126 /* Although TRUTH_{AND,OR}IF_EXPR aren't present in GIMPLE, they
9127 are occassionally created by folding during expansion. */
9128 case TRUTH_ANDIF_EXPR:
9129 case TRUTH_ORIF_EXPR:
9130 if (! ignore
9131 && (target == 0
9132 || modifier == EXPAND_STACK_PARM
9133 || ! safe_from_p (target, exp, 1)
9134 /* Make sure we don't have a hard reg (such as function's return
9135 value) live across basic blocks, if not optimizing. */
9136 || (!optimize && REG_P (target)
9137 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
9138 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9139
9140 if (target)
9141 emit_move_insn (target, const0_rtx);
9142
9143 op1 = gen_label_rtx ();
9144 jumpifnot (exp, op1);
9145
9146 if (target)
9147 emit_move_insn (target, const1_rtx);
9148
9149 emit_label (op1);
9150 return ignore ? const0_rtx : target;
9151
9152 case TRUTH_NOT_EXPR:
9153 if (modifier == EXPAND_STACK_PARM)
9154 target = 0;
9155 op0 = expand_expr (TREE_OPERAND (exp, 0), target,
9156 VOIDmode, EXPAND_NORMAL);
9157 /* The parser is careful to generate TRUTH_NOT_EXPR
9158 only with operands that are always zero or one. */
9159 temp = expand_binop (mode, xor_optab, op0, const1_rtx,
9160 target, 1, OPTAB_LIB_WIDEN);
9161 gcc_assert (temp);
9162 return temp;
9163
9164 case STATEMENT_LIST:
9165 {
9166 tree_stmt_iterator iter;
9167
9168 gcc_assert (ignore);
9169
9170 for (iter = tsi_start (exp); !tsi_end_p (iter); tsi_next (&iter))
9171 expand_expr (tsi_stmt (iter), const0_rtx, VOIDmode, modifier);
9172 }
9173 return const0_rtx;
9174
9175 case COND_EXPR:
9176 /* A COND_EXPR with its type being VOID_TYPE represents a
9177 conditional jump and is handled in
9178 expand_gimple_cond_expr. */
9179 gcc_assert (!VOID_TYPE_P (TREE_TYPE (exp)));
9180
9181 /* Note that COND_EXPRs whose type is a structure or union
9182 are required to be constructed to contain assignments of
9183 a temporary variable, so that we can evaluate them here
9184 for side effect only. If type is void, we must do likewise. */
9185
9186 gcc_assert (!TREE_ADDRESSABLE (type)
9187 && !ignore
9188 && TREE_TYPE (TREE_OPERAND (exp, 1)) != void_type_node
9189 && TREE_TYPE (TREE_OPERAND (exp, 2)) != void_type_node);
9190
9191 /* If we are not to produce a result, we have no target. Otherwise,
9192 if a target was specified use it; it will not be used as an
9193 intermediate target unless it is safe. If no target, use a
9194 temporary. */
9195
9196 if (modifier != EXPAND_STACK_PARM
9197 && original_target
9198 && safe_from_p (original_target, TREE_OPERAND (exp, 0), 1)
9199 && GET_MODE (original_target) == mode
9200 #ifdef HAVE_conditional_move
9201 && (! can_conditionally_move_p (mode)
9202 || REG_P (original_target))
9203 #endif
9204 && !MEM_P (original_target))
9205 temp = original_target;
9206 else
9207 temp = assign_temp (type, 0, 0, 1);
9208
9209 do_pending_stack_adjust ();
9210 NO_DEFER_POP;
9211 op0 = gen_label_rtx ();
9212 op1 = gen_label_rtx ();
9213 jumpifnot (TREE_OPERAND (exp, 0), op0);
9214 store_expr (TREE_OPERAND (exp, 1), temp,
9215 modifier == EXPAND_STACK_PARM,
9216 false);
9217
9218 emit_jump_insn (gen_jump (op1));
9219 emit_barrier ();
9220 emit_label (op0);
9221 store_expr (TREE_OPERAND (exp, 2), temp,
9222 modifier == EXPAND_STACK_PARM,
9223 false);
9224
9225 emit_label (op1);
9226 OK_DEFER_POP;
9227 return temp;
9228
9229 case VEC_COND_EXPR:
9230 target = expand_vec_cond_expr (exp, target);
9231 return target;
9232
9233 case MODIFY_EXPR:
9234 {
9235 tree lhs = TREE_OPERAND (exp, 0);
9236 tree rhs = TREE_OPERAND (exp, 1);
9237 gcc_assert (ignore);
9238
9239 /* Check for |= or &= of a bitfield of size one into another bitfield
9240 of size 1. In this case, (unless we need the result of the
9241 assignment) we can do this more efficiently with a
9242 test followed by an assignment, if necessary.
9243
9244 ??? At this point, we can't get a BIT_FIELD_REF here. But if
9245 things change so we do, this code should be enhanced to
9246 support it. */
9247 if (TREE_CODE (lhs) == COMPONENT_REF
9248 && (TREE_CODE (rhs) == BIT_IOR_EXPR
9249 || TREE_CODE (rhs) == BIT_AND_EXPR)
9250 && TREE_OPERAND (rhs, 0) == lhs
9251 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
9252 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
9253 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
9254 {
9255 rtx label = gen_label_rtx ();
9256 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
9257 do_jump (TREE_OPERAND (rhs, 1),
9258 value ? label : 0,
9259 value ? 0 : label);
9260 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
9261 MOVE_NONTEMPORAL (exp));
9262 do_pending_stack_adjust ();
9263 emit_label (label);
9264 return const0_rtx;
9265 }
9266
9267 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
9268 return const0_rtx;
9269 }
9270
9271 case RETURN_EXPR:
9272 if (!TREE_OPERAND (exp, 0))
9273 expand_null_return ();
9274 else
9275 expand_return (TREE_OPERAND (exp, 0));
9276 return const0_rtx;
9277
9278 case ADDR_EXPR:
9279 return expand_expr_addr_expr (exp, target, tmode, modifier);
9280
9281 case COMPLEX_EXPR:
9282 /* Get the rtx code of the operands. */
9283 op0 = expand_normal (TREE_OPERAND (exp, 0));
9284 op1 = expand_normal (TREE_OPERAND (exp, 1));
9285
9286 if (!target)
9287 target = gen_reg_rtx (TYPE_MODE (TREE_TYPE (exp)));
9288
9289 /* Move the real (op0) and imaginary (op1) parts to their location. */
9290 write_complex_part (target, op0, false);
9291 write_complex_part (target, op1, true);
9292
9293 return target;
9294
9295 case REALPART_EXPR:
9296 op0 = expand_normal (TREE_OPERAND (exp, 0));
9297 return read_complex_part (op0, false);
9298
9299 case IMAGPART_EXPR:
9300 op0 = expand_normal (TREE_OPERAND (exp, 0));
9301 return read_complex_part (op0, true);
9302
9303 case RESX_EXPR:
9304 expand_resx_expr (exp);
9305 return const0_rtx;
9306
9307 case TRY_CATCH_EXPR:
9308 case CATCH_EXPR:
9309 case EH_FILTER_EXPR:
9310 case TRY_FINALLY_EXPR:
9311 /* Lowered by tree-eh.c. */
9312 gcc_unreachable ();
9313
9314 case WITH_CLEANUP_EXPR:
9315 case CLEANUP_POINT_EXPR:
9316 case TARGET_EXPR:
9317 case CASE_LABEL_EXPR:
9318 case VA_ARG_EXPR:
9319 case BIND_EXPR:
9320 case INIT_EXPR:
9321 case CONJ_EXPR:
9322 case COMPOUND_EXPR:
9323 case PREINCREMENT_EXPR:
9324 case PREDECREMENT_EXPR:
9325 case POSTINCREMENT_EXPR:
9326 case POSTDECREMENT_EXPR:
9327 case LOOP_EXPR:
9328 case EXIT_EXPR:
9329 /* Lowered by gimplify.c. */
9330 gcc_unreachable ();
9331
9332 case EXC_PTR_EXPR:
9333 return get_exception_pointer ();
9334
9335 case FILTER_EXPR:
9336 return get_exception_filter ();
9337
9338 case FDESC_EXPR:
9339 /* Function descriptors are not valid except for as
9340 initialization constants, and should not be expanded. */
9341 gcc_unreachable ();
9342
9343 case SWITCH_EXPR:
9344 expand_case (exp);
9345 return const0_rtx;
9346
9347 case LABEL_EXPR:
9348 expand_label (TREE_OPERAND (exp, 0));
9349 return const0_rtx;
9350
9351 case ASM_EXPR:
9352 expand_asm_expr (exp);
9353 return const0_rtx;
9354
9355 case WITH_SIZE_EXPR:
9356 /* WITH_SIZE_EXPR expands to its first argument. The caller should
9357 have pulled out the size to use in whatever context it needed. */
9358 return expand_expr_real (TREE_OPERAND (exp, 0), original_target, tmode,
9359 modifier, alt_rtl);
9360
9361 case REALIGN_LOAD_EXPR:
9362 {
9363 tree oprnd0 = TREE_OPERAND (exp, 0);
9364 tree oprnd1 = TREE_OPERAND (exp, 1);
9365 tree oprnd2 = TREE_OPERAND (exp, 2);
9366 rtx op2;
9367
9368 this_optab = optab_for_tree_code (code, type, optab_default);
9369 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9370 op2 = expand_normal (oprnd2);
9371 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9372 target, unsignedp);
9373 gcc_assert (temp);
9374 return temp;
9375 }
9376
9377 case DOT_PROD_EXPR:
9378 {
9379 tree oprnd0 = TREE_OPERAND (exp, 0);
9380 tree oprnd1 = TREE_OPERAND (exp, 1);
9381 tree oprnd2 = TREE_OPERAND (exp, 2);
9382 rtx op2;
9383
9384 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9385 op2 = expand_normal (oprnd2);
9386 target = expand_widen_pattern_expr (exp, op0, op1, op2,
9387 target, unsignedp);
9388 return target;
9389 }
9390
9391 case WIDEN_SUM_EXPR:
9392 {
9393 tree oprnd0 = TREE_OPERAND (exp, 0);
9394 tree oprnd1 = TREE_OPERAND (exp, 1);
9395
9396 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9397 target = expand_widen_pattern_expr (exp, op0, NULL_RTX, op1,
9398 target, unsignedp);
9399 return target;
9400 }
9401
9402 case REDUC_MAX_EXPR:
9403 case REDUC_MIN_EXPR:
9404 case REDUC_PLUS_EXPR:
9405 {
9406 op0 = expand_normal (TREE_OPERAND (exp, 0));
9407 this_optab = optab_for_tree_code (code, type, optab_default);
9408 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
9409 gcc_assert (temp);
9410 return temp;
9411 }
9412
9413 case VEC_EXTRACT_EVEN_EXPR:
9414 case VEC_EXTRACT_ODD_EXPR:
9415 {
9416 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
9417 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9418 this_optab = optab_for_tree_code (code, type, optab_default);
9419 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
9420 OPTAB_WIDEN);
9421 gcc_assert (temp);
9422 return temp;
9423 }
9424
9425 case VEC_INTERLEAVE_HIGH_EXPR:
9426 case VEC_INTERLEAVE_LOW_EXPR:
9427 {
9428 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
9429 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9430 this_optab = optab_for_tree_code (code, type, optab_default);
9431 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
9432 OPTAB_WIDEN);
9433 gcc_assert (temp);
9434 return temp;
9435 }
9436
9437 case VEC_LSHIFT_EXPR:
9438 case VEC_RSHIFT_EXPR:
9439 {
9440 target = expand_vec_shift_expr (exp, target);
9441 return target;
9442 }
9443
9444 case VEC_UNPACK_HI_EXPR:
9445 case VEC_UNPACK_LO_EXPR:
9446 {
9447 op0 = expand_normal (TREE_OPERAND (exp, 0));
9448 this_optab = optab_for_tree_code (code, type, optab_default);
9449 temp = expand_widen_pattern_expr (exp, op0, NULL_RTX, NULL_RTX,
9450 target, unsignedp);
9451 gcc_assert (temp);
9452 return temp;
9453 }
9454
9455 case VEC_UNPACK_FLOAT_HI_EXPR:
9456 case VEC_UNPACK_FLOAT_LO_EXPR:
9457 {
9458 op0 = expand_normal (TREE_OPERAND (exp, 0));
9459 /* The signedness is determined from input operand. */
9460 this_optab = optab_for_tree_code (code,
9461 TREE_TYPE (TREE_OPERAND (exp, 0)),
9462 optab_default);
9463 temp = expand_widen_pattern_expr
9464 (exp, op0, NULL_RTX, NULL_RTX,
9465 target, TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))));
9466
9467 gcc_assert (temp);
9468 return temp;
9469 }
9470
9471 case VEC_WIDEN_MULT_HI_EXPR:
9472 case VEC_WIDEN_MULT_LO_EXPR:
9473 {
9474 tree oprnd0 = TREE_OPERAND (exp, 0);
9475 tree oprnd1 = TREE_OPERAND (exp, 1);
9476
9477 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9478 target = expand_widen_pattern_expr (exp, op0, op1, NULL_RTX,
9479 target, unsignedp);
9480 gcc_assert (target);
9481 return target;
9482 }
9483
9484 case VEC_PACK_TRUNC_EXPR:
9485 case VEC_PACK_SAT_EXPR:
9486 case VEC_PACK_FIX_TRUNC_EXPR:
9487 mode = TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0)));
9488 goto binop;
9489
9490 case COMPOUND_LITERAL_EXPR:
9491 {
9492 /* Initialize the anonymous variable declared in the compound
9493 literal, then return the variable. */
9494 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
9495
9496 /* Create RTL for this variable. */
9497 if (!DECL_RTL_SET_P (decl))
9498 {
9499 if (DECL_HARD_REGISTER (decl))
9500 /* The user specified an assembler name for this variable.
9501 Set that up now. */
9502 rest_of_decl_compilation (decl, 0, 0);
9503 else
9504 expand_decl (decl);
9505 }
9506
9507 return expand_expr_real (decl, original_target, tmode,
9508 modifier, alt_rtl);
9509 }
9510
9511 default:
9512 gcc_unreachable ();
9513 }
9514
9515 /* Here to do an ordinary binary operator. */
9516 binop:
9517 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
9518 subtarget, &op0, &op1, EXPAND_NORMAL);
9519 binop2:
9520 this_optab = optab_for_tree_code (code, type, optab_default);
9521 binop3:
9522 if (modifier == EXPAND_STACK_PARM)
9523 target = 0;
9524 temp = expand_binop (mode, this_optab, op0, op1, target,
9525 unsignedp, OPTAB_LIB_WIDEN);
9526 gcc_assert (temp);
9527 return REDUCE_BIT_FIELD (temp);
9528 }
9529 #undef REDUCE_BIT_FIELD
9530 \f
9531 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
9532 signedness of TYPE), possibly returning the result in TARGET. */
9533 static rtx
9534 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
9535 {
9536 HOST_WIDE_INT prec = TYPE_PRECISION (type);
9537 if (target && GET_MODE (target) != GET_MODE (exp))
9538 target = 0;
9539 /* For constant values, reduce using build_int_cst_type. */
9540 if (GET_CODE (exp) == CONST_INT)
9541 {
9542 HOST_WIDE_INT value = INTVAL (exp);
9543 tree t = build_int_cst_type (type, value);
9544 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
9545 }
9546 else if (TYPE_UNSIGNED (type))
9547 {
9548 rtx mask;
9549 if (prec < HOST_BITS_PER_WIDE_INT)
9550 mask = immed_double_const (((unsigned HOST_WIDE_INT) 1 << prec) - 1, 0,
9551 GET_MODE (exp));
9552 else
9553 mask = immed_double_const ((unsigned HOST_WIDE_INT) -1,
9554 ((unsigned HOST_WIDE_INT) 1
9555 << (prec - HOST_BITS_PER_WIDE_INT)) - 1,
9556 GET_MODE (exp));
9557 return expand_and (GET_MODE (exp), exp, mask, target);
9558 }
9559 else
9560 {
9561 tree count = build_int_cst (NULL_TREE,
9562 GET_MODE_BITSIZE (GET_MODE (exp)) - prec);
9563 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0);
9564 return expand_shift (RSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0);
9565 }
9566 }
9567 \f
9568 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
9569 when applied to the address of EXP produces an address known to be
9570 aligned more than BIGGEST_ALIGNMENT. */
9571
9572 static int
9573 is_aligning_offset (const_tree offset, const_tree exp)
9574 {
9575 /* Strip off any conversions. */
9576 while (CONVERT_EXPR_P (offset))
9577 offset = TREE_OPERAND (offset, 0);
9578
9579 /* We must now have a BIT_AND_EXPR with a constant that is one less than
9580 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
9581 if (TREE_CODE (offset) != BIT_AND_EXPR
9582 || !host_integerp (TREE_OPERAND (offset, 1), 1)
9583 || compare_tree_int (TREE_OPERAND (offset, 1),
9584 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
9585 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
9586 return 0;
9587
9588 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
9589 It must be NEGATE_EXPR. Then strip any more conversions. */
9590 offset = TREE_OPERAND (offset, 0);
9591 while (CONVERT_EXPR_P (offset))
9592 offset = TREE_OPERAND (offset, 0);
9593
9594 if (TREE_CODE (offset) != NEGATE_EXPR)
9595 return 0;
9596
9597 offset = TREE_OPERAND (offset, 0);
9598 while (CONVERT_EXPR_P (offset))
9599 offset = TREE_OPERAND (offset, 0);
9600
9601 /* This must now be the address of EXP. */
9602 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
9603 }
9604 \f
9605 /* Return the tree node if an ARG corresponds to a string constant or zero
9606 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
9607 in bytes within the string that ARG is accessing. The type of the
9608 offset will be `sizetype'. */
9609
9610 tree
9611 string_constant (tree arg, tree *ptr_offset)
9612 {
9613 tree array, offset, lower_bound;
9614 STRIP_NOPS (arg);
9615
9616 if (TREE_CODE (arg) == ADDR_EXPR)
9617 {
9618 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
9619 {
9620 *ptr_offset = size_zero_node;
9621 return TREE_OPERAND (arg, 0);
9622 }
9623 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
9624 {
9625 array = TREE_OPERAND (arg, 0);
9626 offset = size_zero_node;
9627 }
9628 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
9629 {
9630 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
9631 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
9632 if (TREE_CODE (array) != STRING_CST
9633 && TREE_CODE (array) != VAR_DECL)
9634 return 0;
9635
9636 /* Check if the array has a nonzero lower bound. */
9637 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
9638 if (!integer_zerop (lower_bound))
9639 {
9640 /* If the offset and base aren't both constants, return 0. */
9641 if (TREE_CODE (lower_bound) != INTEGER_CST)
9642 return 0;
9643 if (TREE_CODE (offset) != INTEGER_CST)
9644 return 0;
9645 /* Adjust offset by the lower bound. */
9646 offset = size_diffop (fold_convert (sizetype, offset),
9647 fold_convert (sizetype, lower_bound));
9648 }
9649 }
9650 else
9651 return 0;
9652 }
9653 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
9654 {
9655 tree arg0 = TREE_OPERAND (arg, 0);
9656 tree arg1 = TREE_OPERAND (arg, 1);
9657
9658 STRIP_NOPS (arg0);
9659 STRIP_NOPS (arg1);
9660
9661 if (TREE_CODE (arg0) == ADDR_EXPR
9662 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
9663 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
9664 {
9665 array = TREE_OPERAND (arg0, 0);
9666 offset = arg1;
9667 }
9668 else if (TREE_CODE (arg1) == ADDR_EXPR
9669 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
9670 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
9671 {
9672 array = TREE_OPERAND (arg1, 0);
9673 offset = arg0;
9674 }
9675 else
9676 return 0;
9677 }
9678 else
9679 return 0;
9680
9681 if (TREE_CODE (array) == STRING_CST)
9682 {
9683 *ptr_offset = fold_convert (sizetype, offset);
9684 return array;
9685 }
9686 else if (TREE_CODE (array) == VAR_DECL)
9687 {
9688 int length;
9689
9690 /* Variables initialized to string literals can be handled too. */
9691 if (DECL_INITIAL (array) == NULL_TREE
9692 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
9693 return 0;
9694
9695 /* If they are read-only, non-volatile and bind locally. */
9696 if (! TREE_READONLY (array)
9697 || TREE_SIDE_EFFECTS (array)
9698 || ! targetm.binds_local_p (array))
9699 return 0;
9700
9701 /* Avoid const char foo[4] = "abcde"; */
9702 if (DECL_SIZE_UNIT (array) == NULL_TREE
9703 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
9704 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
9705 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
9706 return 0;
9707
9708 /* If variable is bigger than the string literal, OFFSET must be constant
9709 and inside of the bounds of the string literal. */
9710 offset = fold_convert (sizetype, offset);
9711 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
9712 && (! host_integerp (offset, 1)
9713 || compare_tree_int (offset, length) >= 0))
9714 return 0;
9715
9716 *ptr_offset = offset;
9717 return DECL_INITIAL (array);
9718 }
9719
9720 return 0;
9721 }
9722 \f
9723 /* Generate code to calculate EXP using a store-flag instruction
9724 and return an rtx for the result. EXP is either a comparison
9725 or a TRUTH_NOT_EXPR whose operand is a comparison.
9726
9727 If TARGET is nonzero, store the result there if convenient.
9728
9729 Return zero if there is no suitable set-flag instruction
9730 available on this machine.
9731
9732 Once expand_expr has been called on the arguments of the comparison,
9733 we are committed to doing the store flag, since it is not safe to
9734 re-evaluate the expression. We emit the store-flag insn by calling
9735 emit_store_flag, but only expand the arguments if we have a reason
9736 to believe that emit_store_flag will be successful. If we think that
9737 it will, but it isn't, we have to simulate the store-flag with a
9738 set/jump/set sequence. */
9739
9740 static rtx
9741 do_store_flag (tree exp, rtx target, enum machine_mode mode)
9742 {
9743 enum rtx_code code;
9744 tree arg0, arg1, type;
9745 tree tem;
9746 enum machine_mode operand_mode;
9747 int invert = 0;
9748 int unsignedp;
9749 rtx op0, op1;
9750 rtx subtarget = target;
9751 rtx result, label;
9752
9753 /* If this is a TRUTH_NOT_EXPR, set a flag indicating we must invert the
9754 result at the end. We can't simply invert the test since it would
9755 have already been inverted if it were valid. This case occurs for
9756 some floating-point comparisons. */
9757
9758 if (TREE_CODE (exp) == TRUTH_NOT_EXPR)
9759 invert = 1, exp = TREE_OPERAND (exp, 0);
9760
9761 arg0 = TREE_OPERAND (exp, 0);
9762 arg1 = TREE_OPERAND (exp, 1);
9763
9764 /* Don't crash if the comparison was erroneous. */
9765 if (arg0 == error_mark_node || arg1 == error_mark_node)
9766 return const0_rtx;
9767
9768 type = TREE_TYPE (arg0);
9769 operand_mode = TYPE_MODE (type);
9770 unsignedp = TYPE_UNSIGNED (type);
9771
9772 /* We won't bother with BLKmode store-flag operations because it would mean
9773 passing a lot of information to emit_store_flag. */
9774 if (operand_mode == BLKmode)
9775 return 0;
9776
9777 /* We won't bother with store-flag operations involving function pointers
9778 when function pointers must be canonicalized before comparisons. */
9779 #ifdef HAVE_canonicalize_funcptr_for_compare
9780 if (HAVE_canonicalize_funcptr_for_compare
9781 && ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == POINTER_TYPE
9782 && (TREE_CODE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))))
9783 == FUNCTION_TYPE))
9784 || (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 1))) == POINTER_TYPE
9785 && (TREE_CODE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1))))
9786 == FUNCTION_TYPE))))
9787 return 0;
9788 #endif
9789
9790 STRIP_NOPS (arg0);
9791 STRIP_NOPS (arg1);
9792
9793 /* Get the rtx comparison code to use. We know that EXP is a comparison
9794 operation of some type. Some comparisons against 1 and -1 can be
9795 converted to comparisons with zero. Do so here so that the tests
9796 below will be aware that we have a comparison with zero. These
9797 tests will not catch constants in the first operand, but constants
9798 are rarely passed as the first operand. */
9799
9800 switch (TREE_CODE (exp))
9801 {
9802 case EQ_EXPR:
9803 code = EQ;
9804 break;
9805 case NE_EXPR:
9806 code = NE;
9807 break;
9808 case LT_EXPR:
9809 if (integer_onep (arg1))
9810 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
9811 else
9812 code = unsignedp ? LTU : LT;
9813 break;
9814 case LE_EXPR:
9815 if (! unsignedp && integer_all_onesp (arg1))
9816 arg1 = integer_zero_node, code = LT;
9817 else
9818 code = unsignedp ? LEU : LE;
9819 break;
9820 case GT_EXPR:
9821 if (! unsignedp && integer_all_onesp (arg1))
9822 arg1 = integer_zero_node, code = GE;
9823 else
9824 code = unsignedp ? GTU : GT;
9825 break;
9826 case GE_EXPR:
9827 if (integer_onep (arg1))
9828 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
9829 else
9830 code = unsignedp ? GEU : GE;
9831 break;
9832
9833 case UNORDERED_EXPR:
9834 code = UNORDERED;
9835 break;
9836 case ORDERED_EXPR:
9837 code = ORDERED;
9838 break;
9839 case UNLT_EXPR:
9840 code = UNLT;
9841 break;
9842 case UNLE_EXPR:
9843 code = UNLE;
9844 break;
9845 case UNGT_EXPR:
9846 code = UNGT;
9847 break;
9848 case UNGE_EXPR:
9849 code = UNGE;
9850 break;
9851 case UNEQ_EXPR:
9852 code = UNEQ;
9853 break;
9854 case LTGT_EXPR:
9855 code = LTGT;
9856 break;
9857
9858 default:
9859 gcc_unreachable ();
9860 }
9861
9862 /* Put a constant second. */
9863 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
9864 || TREE_CODE (arg0) == FIXED_CST)
9865 {
9866 tem = arg0; arg0 = arg1; arg1 = tem;
9867 code = swap_condition (code);
9868 }
9869
9870 /* If this is an equality or inequality test of a single bit, we can
9871 do this by shifting the bit being tested to the low-order bit and
9872 masking the result with the constant 1. If the condition was EQ,
9873 we xor it with 1. This does not require an scc insn and is faster
9874 than an scc insn even if we have it.
9875
9876 The code to make this transformation was moved into fold_single_bit_test,
9877 so we just call into the folder and expand its result. */
9878
9879 if ((code == NE || code == EQ)
9880 && TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1)
9881 && integer_pow2p (TREE_OPERAND (arg0, 1)))
9882 {
9883 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
9884 return expand_expr (fold_single_bit_test (code == NE ? NE_EXPR : EQ_EXPR,
9885 arg0, arg1, type),
9886 target, VOIDmode, EXPAND_NORMAL);
9887 }
9888
9889 /* Now see if we are likely to be able to do this. Return if not. */
9890 if (! can_compare_p (code, operand_mode, ccp_store_flag))
9891 return 0;
9892
9893 if (! get_subtarget (target)
9894 || GET_MODE (subtarget) != operand_mode)
9895 subtarget = 0;
9896
9897 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
9898
9899 if (target == 0)
9900 target = gen_reg_rtx (mode);
9901
9902 result = emit_store_flag (target, code, op0, op1,
9903 operand_mode, unsignedp, 1);
9904
9905 if (result)
9906 {
9907 if (invert)
9908 result = expand_binop (mode, xor_optab, result, const1_rtx,
9909 result, 0, OPTAB_LIB_WIDEN);
9910 return result;
9911 }
9912
9913 /* If this failed, we have to do this with set/compare/jump/set code. */
9914 if (!REG_P (target)
9915 || reg_mentioned_p (target, op0) || reg_mentioned_p (target, op1))
9916 target = gen_reg_rtx (GET_MODE (target));
9917
9918 emit_move_insn (target, invert ? const0_rtx : const1_rtx);
9919 label = gen_label_rtx ();
9920 do_compare_rtx_and_jump (op0, op1, code, unsignedp, operand_mode, NULL_RTX,
9921 NULL_RTX, label);
9922
9923 emit_move_insn (target, invert ? const1_rtx : const0_rtx);
9924 emit_label (label);
9925
9926 return target;
9927 }
9928 \f
9929
9930 /* Stubs in case we haven't got a casesi insn. */
9931 #ifndef HAVE_casesi
9932 # define HAVE_casesi 0
9933 # define gen_casesi(a, b, c, d, e) (0)
9934 # define CODE_FOR_casesi CODE_FOR_nothing
9935 #endif
9936
9937 /* Attempt to generate a casesi instruction. Returns 1 if successful,
9938 0 otherwise (i.e. if there is no casesi instruction). */
9939 int
9940 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
9941 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
9942 rtx fallback_label ATTRIBUTE_UNUSED)
9943 {
9944 enum machine_mode index_mode = SImode;
9945 int index_bits = GET_MODE_BITSIZE (index_mode);
9946 rtx op1, op2, index;
9947 enum machine_mode op_mode;
9948
9949 if (! HAVE_casesi)
9950 return 0;
9951
9952 /* Convert the index to SImode. */
9953 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
9954 {
9955 enum machine_mode omode = TYPE_MODE (index_type);
9956 rtx rangertx = expand_normal (range);
9957
9958 /* We must handle the endpoints in the original mode. */
9959 index_expr = build2 (MINUS_EXPR, index_type,
9960 index_expr, minval);
9961 minval = integer_zero_node;
9962 index = expand_normal (index_expr);
9963 if (default_label)
9964 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
9965 omode, 1, default_label);
9966 /* Now we can safely truncate. */
9967 index = convert_to_mode (index_mode, index, 0);
9968 }
9969 else
9970 {
9971 if (TYPE_MODE (index_type) != index_mode)
9972 {
9973 index_type = lang_hooks.types.type_for_size (index_bits, 0);
9974 index_expr = fold_convert (index_type, index_expr);
9975 }
9976
9977 index = expand_normal (index_expr);
9978 }
9979
9980 do_pending_stack_adjust ();
9981
9982 op_mode = insn_data[(int) CODE_FOR_casesi].operand[0].mode;
9983 if (! (*insn_data[(int) CODE_FOR_casesi].operand[0].predicate)
9984 (index, op_mode))
9985 index = copy_to_mode_reg (op_mode, index);
9986
9987 op1 = expand_normal (minval);
9988
9989 op_mode = insn_data[(int) CODE_FOR_casesi].operand[1].mode;
9990 op1 = convert_modes (op_mode, TYPE_MODE (TREE_TYPE (minval)),
9991 op1, TYPE_UNSIGNED (TREE_TYPE (minval)));
9992 if (! (*insn_data[(int) CODE_FOR_casesi].operand[1].predicate)
9993 (op1, op_mode))
9994 op1 = copy_to_mode_reg (op_mode, op1);
9995
9996 op2 = expand_normal (range);
9997
9998 op_mode = insn_data[(int) CODE_FOR_casesi].operand[2].mode;
9999 op2 = convert_modes (op_mode, TYPE_MODE (TREE_TYPE (range)),
10000 op2, TYPE_UNSIGNED (TREE_TYPE (range)));
10001 if (! (*insn_data[(int) CODE_FOR_casesi].operand[2].predicate)
10002 (op2, op_mode))
10003 op2 = copy_to_mode_reg (op_mode, op2);
10004
10005 emit_jump_insn (gen_casesi (index, op1, op2,
10006 table_label, !default_label
10007 ? fallback_label : default_label));
10008 return 1;
10009 }
10010
10011 /* Attempt to generate a tablejump instruction; same concept. */
10012 #ifndef HAVE_tablejump
10013 #define HAVE_tablejump 0
10014 #define gen_tablejump(x, y) (0)
10015 #endif
10016
10017 /* Subroutine of the next function.
10018
10019 INDEX is the value being switched on, with the lowest value
10020 in the table already subtracted.
10021 MODE is its expected mode (needed if INDEX is constant).
10022 RANGE is the length of the jump table.
10023 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10024
10025 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10026 index value is out of range. */
10027
10028 static void
10029 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10030 rtx default_label)
10031 {
10032 rtx temp, vector;
10033
10034 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10035 cfun->cfg->max_jumptable_ents = INTVAL (range);
10036
10037 /* Do an unsigned comparison (in the proper mode) between the index
10038 expression and the value which represents the length of the range.
10039 Since we just finished subtracting the lower bound of the range
10040 from the index expression, this comparison allows us to simultaneously
10041 check that the original index expression value is both greater than
10042 or equal to the minimum value of the range and less than or equal to
10043 the maximum value of the range. */
10044
10045 if (default_label)
10046 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10047 default_label);
10048
10049 /* If index is in range, it must fit in Pmode.
10050 Convert to Pmode so we can index with it. */
10051 if (mode != Pmode)
10052 index = convert_to_mode (Pmode, index, 1);
10053
10054 /* Don't let a MEM slip through, because then INDEX that comes
10055 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10056 and break_out_memory_refs will go to work on it and mess it up. */
10057 #ifdef PIC_CASE_VECTOR_ADDRESS
10058 if (flag_pic && !REG_P (index))
10059 index = copy_to_mode_reg (Pmode, index);
10060 #endif
10061
10062 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10063 GET_MODE_SIZE, because this indicates how large insns are. The other
10064 uses should all be Pmode, because they are addresses. This code
10065 could fail if addresses and insns are not the same size. */
10066 index = gen_rtx_PLUS (Pmode,
10067 gen_rtx_MULT (Pmode, index,
10068 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10069 gen_rtx_LABEL_REF (Pmode, table_label));
10070 #ifdef PIC_CASE_VECTOR_ADDRESS
10071 if (flag_pic)
10072 index = PIC_CASE_VECTOR_ADDRESS (index);
10073 else
10074 #endif
10075 index = memory_address (CASE_VECTOR_MODE, index);
10076 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10077 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10078 convert_move (temp, vector, 0);
10079
10080 emit_jump_insn (gen_tablejump (temp, table_label));
10081
10082 /* If we are generating PIC code or if the table is PC-relative, the
10083 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10084 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10085 emit_barrier ();
10086 }
10087
10088 int
10089 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10090 rtx table_label, rtx default_label)
10091 {
10092 rtx index;
10093
10094 if (! HAVE_tablejump)
10095 return 0;
10096
10097 index_expr = fold_build2 (MINUS_EXPR, index_type,
10098 fold_convert (index_type, index_expr),
10099 fold_convert (index_type, minval));
10100 index = expand_normal (index_expr);
10101 do_pending_stack_adjust ();
10102
10103 do_tablejump (index, TYPE_MODE (index_type),
10104 convert_modes (TYPE_MODE (index_type),
10105 TYPE_MODE (TREE_TYPE (range)),
10106 expand_normal (range),
10107 TYPE_UNSIGNED (TREE_TYPE (range))),
10108 table_label, default_label);
10109 return 1;
10110 }
10111
10112 /* Nonzero if the mode is a valid vector mode for this architecture.
10113 This returns nonzero even if there is no hardware support for the
10114 vector mode, but we can emulate with narrower modes. */
10115
10116 int
10117 vector_mode_valid_p (enum machine_mode mode)
10118 {
10119 enum mode_class mclass = GET_MODE_CLASS (mode);
10120 enum machine_mode innermode;
10121
10122 /* Doh! What's going on? */
10123 if (mclass != MODE_VECTOR_INT
10124 && mclass != MODE_VECTOR_FLOAT
10125 && mclass != MODE_VECTOR_FRACT
10126 && mclass != MODE_VECTOR_UFRACT
10127 && mclass != MODE_VECTOR_ACCUM
10128 && mclass != MODE_VECTOR_UACCUM)
10129 return 0;
10130
10131 /* Hardware support. Woo hoo! */
10132 if (targetm.vector_mode_supported_p (mode))
10133 return 1;
10134
10135 innermode = GET_MODE_INNER (mode);
10136
10137 /* We should probably return 1 if requesting V4DI and we have no DI,
10138 but we have V2DI, but this is probably very unlikely. */
10139
10140 /* If we have support for the inner mode, we can safely emulate it.
10141 We may not have V2DI, but me can emulate with a pair of DIs. */
10142 return targetm.scalar_mode_supported_p (innermode);
10143 }
10144
10145 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10146 static rtx
10147 const_vector_from_tree (tree exp)
10148 {
10149 rtvec v;
10150 int units, i;
10151 tree link, elt;
10152 enum machine_mode inner, mode;
10153
10154 mode = TYPE_MODE (TREE_TYPE (exp));
10155
10156 if (initializer_zerop (exp))
10157 return CONST0_RTX (mode);
10158
10159 units = GET_MODE_NUNITS (mode);
10160 inner = GET_MODE_INNER (mode);
10161
10162 v = rtvec_alloc (units);
10163
10164 link = TREE_VECTOR_CST_ELTS (exp);
10165 for (i = 0; link; link = TREE_CHAIN (link), ++i)
10166 {
10167 elt = TREE_VALUE (link);
10168
10169 if (TREE_CODE (elt) == REAL_CST)
10170 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10171 inner);
10172 else if (TREE_CODE (elt) == FIXED_CST)
10173 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10174 inner);
10175 else
10176 RTVEC_ELT (v, i) = immed_double_const (TREE_INT_CST_LOW (elt),
10177 TREE_INT_CST_HIGH (elt),
10178 inner);
10179 }
10180
10181 /* Initialize remaining elements to 0. */
10182 for (; i < units; ++i)
10183 RTVEC_ELT (v, i) = CONST0_RTX (inner);
10184
10185 return gen_rtx_CONST_VECTOR (mode, v);
10186 }
10187 #include "gt-expr.h"