* de.po: Update.
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
4 2012 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "common/common-target.h"
53 #include "timevar.h"
54 #include "df.h"
55 #include "diagnostic.h"
56 #include "ssaexpand.h"
57 #include "target-globals.h"
58 #include "params.h"
59
60 /* Decide whether a function's arguments should be processed
61 from first to last or from last to first.
62
63 They should if the stack and args grow in opposite directions, but
64 only if we have push insns. */
65
66 #ifdef PUSH_ROUNDING
67
68 #ifndef PUSH_ARGS_REVERSED
69 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
70 #define PUSH_ARGS_REVERSED /* If it's last to first. */
71 #endif
72 #endif
73
74 #endif
75
76 #ifndef STACK_PUSH_CODE
77 #ifdef STACK_GROWS_DOWNWARD
78 #define STACK_PUSH_CODE PRE_DEC
79 #else
80 #define STACK_PUSH_CODE PRE_INC
81 #endif
82 #endif
83
84
85 /* If this is nonzero, we do not bother generating VOLATILE
86 around volatile memory references, and we are willing to
87 output indirect addresses. If cse is to follow, we reject
88 indirect addresses so a useful potential cse is generated;
89 if it is used only once, instruction combination will produce
90 the same indirect address eventually. */
91 int cse_not_expected;
92
93 /* This structure is used by move_by_pieces to describe the move to
94 be performed. */
95 struct move_by_pieces_d
96 {
97 rtx to;
98 rtx to_addr;
99 int autinc_to;
100 int explicit_inc_to;
101 rtx from;
102 rtx from_addr;
103 int autinc_from;
104 int explicit_inc_from;
105 unsigned HOST_WIDE_INT len;
106 HOST_WIDE_INT offset;
107 int reverse;
108 };
109
110 /* This structure is used by store_by_pieces to describe the clear to
111 be performed. */
112
113 struct store_by_pieces_d
114 {
115 rtx to;
116 rtx to_addr;
117 int autinc_to;
118 int explicit_inc_to;
119 unsigned HOST_WIDE_INT len;
120 HOST_WIDE_INT offset;
121 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
122 void *constfundata;
123 int reverse;
124 };
125
126 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
127 struct move_by_pieces_d *);
128 static bool block_move_libcall_safe_for_call_parm (void);
129 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
130 static tree emit_block_move_libcall_fn (int);
131 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
132 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
133 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
134 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
135 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
136 struct store_by_pieces_d *);
137 static tree clear_storage_libcall_fn (int);
138 static rtx compress_float_constant (rtx, rtx);
139 static rtx get_subtarget (rtx);
140 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
141 HOST_WIDE_INT, enum machine_mode,
142 tree, tree, int, alias_set_type);
143 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
144 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
145 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
146 enum machine_mode,
147 tree, tree, alias_set_type, bool);
148
149 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
150
151 static int is_aligning_offset (const_tree, const_tree);
152 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
153 enum expand_modifier);
154 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
155 static rtx do_store_flag (sepops, rtx, enum machine_mode);
156 #ifdef PUSH_ROUNDING
157 static void emit_single_push_insn (enum machine_mode, rtx, tree);
158 #endif
159 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
160 static rtx const_vector_from_tree (tree);
161 static void write_complex_part (rtx, rtx, bool);
162
163 /* This macro is used to determine whether move_by_pieces should be called
164 to perform a structure copy. */
165 #ifndef MOVE_BY_PIECES_P
166 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
167 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
168 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
169 #endif
170
171 /* This macro is used to determine whether clear_by_pieces should be
172 called to clear storage. */
173 #ifndef CLEAR_BY_PIECES_P
174 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
175 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
176 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
177 #endif
178
179 /* This macro is used to determine whether store_by_pieces should be
180 called to "memset" storage with byte values other than zero. */
181 #ifndef SET_BY_PIECES_P
182 #define SET_BY_PIECES_P(SIZE, ALIGN) \
183 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
184 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
185 #endif
186
187 /* This macro is used to determine whether store_by_pieces should be
188 called to "memcpy" storage when the source is a constant string. */
189 #ifndef STORE_BY_PIECES_P
190 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
191 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
192 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
193 #endif
194
195 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
196
197 #ifndef SLOW_UNALIGNED_ACCESS
198 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
199 #endif
200 \f
201 /* This is run to set up which modes can be used
202 directly in memory and to initialize the block move optab. It is run
203 at the beginning of compilation and when the target is reinitialized. */
204
205 void
206 init_expr_target (void)
207 {
208 rtx insn, pat;
209 enum machine_mode mode;
210 int num_clobbers;
211 rtx mem, mem1;
212 rtx reg;
213
214 /* Try indexing by frame ptr and try by stack ptr.
215 It is known that on the Convex the stack ptr isn't a valid index.
216 With luck, one or the other is valid on any machine. */
217 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
218 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
219
220 /* A scratch register we can modify in-place below to avoid
221 useless RTL allocations. */
222 reg = gen_rtx_REG (VOIDmode, -1);
223
224 insn = rtx_alloc (INSN);
225 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
226 PATTERN (insn) = pat;
227
228 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
229 mode = (enum machine_mode) ((int) mode + 1))
230 {
231 int regno;
232
233 direct_load[(int) mode] = direct_store[(int) mode] = 0;
234 PUT_MODE (mem, mode);
235 PUT_MODE (mem1, mode);
236 PUT_MODE (reg, mode);
237
238 /* See if there is some register that can be used in this mode and
239 directly loaded or stored from memory. */
240
241 if (mode != VOIDmode && mode != BLKmode)
242 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
243 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
244 regno++)
245 {
246 if (! HARD_REGNO_MODE_OK (regno, mode))
247 continue;
248
249 SET_REGNO (reg, regno);
250
251 SET_SRC (pat) = mem;
252 SET_DEST (pat) = reg;
253 if (recog (pat, insn, &num_clobbers) >= 0)
254 direct_load[(int) mode] = 1;
255
256 SET_SRC (pat) = mem1;
257 SET_DEST (pat) = reg;
258 if (recog (pat, insn, &num_clobbers) >= 0)
259 direct_load[(int) mode] = 1;
260
261 SET_SRC (pat) = reg;
262 SET_DEST (pat) = mem;
263 if (recog (pat, insn, &num_clobbers) >= 0)
264 direct_store[(int) mode] = 1;
265
266 SET_SRC (pat) = reg;
267 SET_DEST (pat) = mem1;
268 if (recog (pat, insn, &num_clobbers) >= 0)
269 direct_store[(int) mode] = 1;
270 }
271 }
272
273 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
274
275 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
276 mode = GET_MODE_WIDER_MODE (mode))
277 {
278 enum machine_mode srcmode;
279 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
280 srcmode = GET_MODE_WIDER_MODE (srcmode))
281 {
282 enum insn_code ic;
283
284 ic = can_extend_p (mode, srcmode, 0);
285 if (ic == CODE_FOR_nothing)
286 continue;
287
288 PUT_MODE (mem, srcmode);
289
290 if (insn_operand_matches (ic, 1, mem))
291 float_extend_from_mem[mode][srcmode] = true;
292 }
293 }
294 }
295
296 /* This is run at the start of compiling a function. */
297
298 void
299 init_expr (void)
300 {
301 memset (&crtl->expr, 0, sizeof (crtl->expr));
302 }
303 \f
304 /* Copy data from FROM to TO, where the machine modes are not the same.
305 Both modes may be integer, or both may be floating, or both may be
306 fixed-point.
307 UNSIGNEDP should be nonzero if FROM is an unsigned type.
308 This causes zero-extension instead of sign-extension. */
309
310 void
311 convert_move (rtx to, rtx from, int unsignedp)
312 {
313 enum machine_mode to_mode = GET_MODE (to);
314 enum machine_mode from_mode = GET_MODE (from);
315 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
316 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
317 enum insn_code code;
318 rtx libcall;
319
320 /* rtx code for making an equivalent value. */
321 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
322 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
323
324
325 gcc_assert (to_real == from_real);
326 gcc_assert (to_mode != BLKmode);
327 gcc_assert (from_mode != BLKmode);
328
329 /* If the source and destination are already the same, then there's
330 nothing to do. */
331 if (to == from)
332 return;
333
334 /* If FROM is a SUBREG that indicates that we have already done at least
335 the required extension, strip it. We don't handle such SUBREGs as
336 TO here. */
337
338 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
339 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
340 >= GET_MODE_PRECISION (to_mode))
341 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
342 from = gen_lowpart (to_mode, from), from_mode = to_mode;
343
344 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
345
346 if (to_mode == from_mode
347 || (from_mode == VOIDmode && CONSTANT_P (from)))
348 {
349 emit_move_insn (to, from);
350 return;
351 }
352
353 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
354 {
355 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
356
357 if (VECTOR_MODE_P (to_mode))
358 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
359 else
360 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
361
362 emit_move_insn (to, from);
363 return;
364 }
365
366 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
367 {
368 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
369 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
370 return;
371 }
372
373 if (to_real)
374 {
375 rtx value, insns;
376 convert_optab tab;
377
378 gcc_assert ((GET_MODE_PRECISION (from_mode)
379 != GET_MODE_PRECISION (to_mode))
380 || (DECIMAL_FLOAT_MODE_P (from_mode)
381 != DECIMAL_FLOAT_MODE_P (to_mode)));
382
383 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
384 /* Conversion between decimal float and binary float, same size. */
385 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
386 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
387 tab = sext_optab;
388 else
389 tab = trunc_optab;
390
391 /* Try converting directly if the insn is supported. */
392
393 code = convert_optab_handler (tab, to_mode, from_mode);
394 if (code != CODE_FOR_nothing)
395 {
396 emit_unop_insn (code, to, from,
397 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
398 return;
399 }
400
401 /* Otherwise use a libcall. */
402 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
403
404 /* Is this conversion implemented yet? */
405 gcc_assert (libcall);
406
407 start_sequence ();
408 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
409 1, from, from_mode);
410 insns = get_insns ();
411 end_sequence ();
412 emit_libcall_block (insns, to, value,
413 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
414 from)
415 : gen_rtx_FLOAT_EXTEND (to_mode, from));
416 return;
417 }
418
419 /* Handle pointer conversion. */ /* SPEE 900220. */
420 /* Targets are expected to provide conversion insns between PxImode and
421 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
422 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
423 {
424 enum machine_mode full_mode
425 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
426
427 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
428 != CODE_FOR_nothing);
429
430 if (full_mode != from_mode)
431 from = convert_to_mode (full_mode, from, unsignedp);
432 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
433 to, from, UNKNOWN);
434 return;
435 }
436 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
437 {
438 rtx new_from;
439 enum machine_mode full_mode
440 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
441
442 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)
443 != CODE_FOR_nothing);
444
445 if (to_mode == full_mode)
446 {
447 emit_unop_insn (convert_optab_handler (sext_optab, full_mode,
448 from_mode),
449 to, from, UNKNOWN);
450 return;
451 }
452
453 new_from = gen_reg_rtx (full_mode);
454 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode),
455 new_from, from, UNKNOWN);
456
457 /* else proceed to integer conversions below. */
458 from_mode = full_mode;
459 from = new_from;
460 }
461
462 /* Make sure both are fixed-point modes or both are not. */
463 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
464 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
465 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
466 {
467 /* If we widen from_mode to to_mode and they are in the same class,
468 we won't saturate the result.
469 Otherwise, always saturate the result to play safe. */
470 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
471 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
472 expand_fixed_convert (to, from, 0, 0);
473 else
474 expand_fixed_convert (to, from, 0, 1);
475 return;
476 }
477
478 /* Now both modes are integers. */
479
480 /* Handle expanding beyond a word. */
481 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
482 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
483 {
484 rtx insns;
485 rtx lowpart;
486 rtx fill_value;
487 rtx lowfrom;
488 int i;
489 enum machine_mode lowpart_mode;
490 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
491
492 /* Try converting directly if the insn is supported. */
493 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
494 != CODE_FOR_nothing)
495 {
496 /* If FROM is a SUBREG, put it into a register. Do this
497 so that we always generate the same set of insns for
498 better cse'ing; if an intermediate assignment occurred,
499 we won't be doing the operation directly on the SUBREG. */
500 if (optimize > 0 && GET_CODE (from) == SUBREG)
501 from = force_reg (from_mode, from);
502 emit_unop_insn (code, to, from, equiv_code);
503 return;
504 }
505 /* Next, try converting via full word. */
506 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
507 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
508 != CODE_FOR_nothing))
509 {
510 rtx word_to = gen_reg_rtx (word_mode);
511 if (REG_P (to))
512 {
513 if (reg_overlap_mentioned_p (to, from))
514 from = force_reg (from_mode, from);
515 emit_clobber (to);
516 }
517 convert_move (word_to, from, unsignedp);
518 emit_unop_insn (code, to, word_to, equiv_code);
519 return;
520 }
521
522 /* No special multiword conversion insn; do it by hand. */
523 start_sequence ();
524
525 /* Since we will turn this into a no conflict block, we must ensure
526 that the source does not overlap the target. */
527
528 if (reg_overlap_mentioned_p (to, from))
529 from = force_reg (from_mode, from);
530
531 /* Get a copy of FROM widened to a word, if necessary. */
532 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
533 lowpart_mode = word_mode;
534 else
535 lowpart_mode = from_mode;
536
537 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
538
539 lowpart = gen_lowpart (lowpart_mode, to);
540 emit_move_insn (lowpart, lowfrom);
541
542 /* Compute the value to put in each remaining word. */
543 if (unsignedp)
544 fill_value = const0_rtx;
545 else
546 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
547 LT, lowfrom, const0_rtx,
548 VOIDmode, 0, -1);
549
550 /* Fill the remaining words. */
551 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
552 {
553 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
554 rtx subword = operand_subword (to, index, 1, to_mode);
555
556 gcc_assert (subword);
557
558 if (fill_value != subword)
559 emit_move_insn (subword, fill_value);
560 }
561
562 insns = get_insns ();
563 end_sequence ();
564
565 emit_insn (insns);
566 return;
567 }
568
569 /* Truncating multi-word to a word or less. */
570 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
571 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
572 {
573 if (!((MEM_P (from)
574 && ! MEM_VOLATILE_P (from)
575 && direct_load[(int) to_mode]
576 && ! mode_dependent_address_p (XEXP (from, 0)))
577 || REG_P (from)
578 || GET_CODE (from) == SUBREG))
579 from = force_reg (from_mode, from);
580 convert_move (to, gen_lowpart (word_mode, from), 0);
581 return;
582 }
583
584 /* Now follow all the conversions between integers
585 no more than a word long. */
586
587 /* For truncation, usually we can just refer to FROM in a narrower mode. */
588 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
589 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
590 {
591 if (!((MEM_P (from)
592 && ! MEM_VOLATILE_P (from)
593 && direct_load[(int) to_mode]
594 && ! mode_dependent_address_p (XEXP (from, 0)))
595 || REG_P (from)
596 || GET_CODE (from) == SUBREG))
597 from = force_reg (from_mode, from);
598 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
599 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
600 from = copy_to_reg (from);
601 emit_move_insn (to, gen_lowpart (to_mode, from));
602 return;
603 }
604
605 /* Handle extension. */
606 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
607 {
608 /* Convert directly if that works. */
609 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
610 != CODE_FOR_nothing)
611 {
612 emit_unop_insn (code, to, from, equiv_code);
613 return;
614 }
615 else
616 {
617 enum machine_mode intermediate;
618 rtx tmp;
619 int shift_amount;
620
621 /* Search for a mode to convert via. */
622 for (intermediate = from_mode; intermediate != VOIDmode;
623 intermediate = GET_MODE_WIDER_MODE (intermediate))
624 if (((can_extend_p (to_mode, intermediate, unsignedp)
625 != CODE_FOR_nothing)
626 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
627 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
628 && (can_extend_p (intermediate, from_mode, unsignedp)
629 != CODE_FOR_nothing))
630 {
631 convert_move (to, convert_to_mode (intermediate, from,
632 unsignedp), unsignedp);
633 return;
634 }
635
636 /* No suitable intermediate mode.
637 Generate what we need with shifts. */
638 shift_amount = (GET_MODE_PRECISION (to_mode)
639 - GET_MODE_PRECISION (from_mode));
640 from = gen_lowpart (to_mode, force_reg (from_mode, from));
641 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
642 to, unsignedp);
643 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
644 to, unsignedp);
645 if (tmp != to)
646 emit_move_insn (to, tmp);
647 return;
648 }
649 }
650
651 /* Support special truncate insns for certain modes. */
652 if (convert_optab_handler (trunc_optab, to_mode,
653 from_mode) != CODE_FOR_nothing)
654 {
655 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
656 to, from, UNKNOWN);
657 return;
658 }
659
660 /* Handle truncation of volatile memrefs, and so on;
661 the things that couldn't be truncated directly,
662 and for which there was no special instruction.
663
664 ??? Code above formerly short-circuited this, for most integer
665 mode pairs, with a force_reg in from_mode followed by a recursive
666 call to this routine. Appears always to have been wrong. */
667 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
668 {
669 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
670 emit_move_insn (to, temp);
671 return;
672 }
673
674 /* Mode combination is not recognized. */
675 gcc_unreachable ();
676 }
677
678 /* Return an rtx for a value that would result
679 from converting X to mode MODE.
680 Both X and MODE may be floating, or both integer.
681 UNSIGNEDP is nonzero if X is an unsigned value.
682 This can be done by referring to a part of X in place
683 or by copying to a new temporary with conversion. */
684
685 rtx
686 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
687 {
688 return convert_modes (mode, VOIDmode, x, unsignedp);
689 }
690
691 /* Return an rtx for a value that would result
692 from converting X from mode OLDMODE to mode MODE.
693 Both modes may be floating, or both integer.
694 UNSIGNEDP is nonzero if X is an unsigned value.
695
696 This can be done by referring to a part of X in place
697 or by copying to a new temporary with conversion.
698
699 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
700
701 rtx
702 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
703 {
704 rtx temp;
705
706 /* If FROM is a SUBREG that indicates that we have already done at least
707 the required extension, strip it. */
708
709 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
710 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
711 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
712 x = gen_lowpart (mode, x);
713
714 if (GET_MODE (x) != VOIDmode)
715 oldmode = GET_MODE (x);
716
717 if (mode == oldmode)
718 return x;
719
720 /* There is one case that we must handle specially: If we are converting
721 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
722 we are to interpret the constant as unsigned, gen_lowpart will do
723 the wrong if the constant appears negative. What we want to do is
724 make the high-order word of the constant zero, not all ones. */
725
726 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
727 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
728 && CONST_INT_P (x) && INTVAL (x) < 0)
729 {
730 double_int val = uhwi_to_double_int (INTVAL (x));
731
732 /* We need to zero extend VAL. */
733 if (oldmode != VOIDmode)
734 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
735
736 return immed_double_int_const (val, mode);
737 }
738
739 /* We can do this with a gen_lowpart if both desired and current modes
740 are integer, and this is either a constant integer, a register, or a
741 non-volatile MEM. Except for the constant case where MODE is no
742 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
743
744 if ((CONST_INT_P (x)
745 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
746 || (GET_MODE_CLASS (mode) == MODE_INT
747 && GET_MODE_CLASS (oldmode) == MODE_INT
748 && (GET_CODE (x) == CONST_DOUBLE
749 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
750 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
751 && direct_load[(int) mode])
752 || (REG_P (x)
753 && (! HARD_REGISTER_P (x)
754 || HARD_REGNO_MODE_OK (REGNO (x), mode))
755 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
756 GET_MODE (x))))))))
757 {
758 /* ?? If we don't know OLDMODE, we have to assume here that
759 X does not need sign- or zero-extension. This may not be
760 the case, but it's the best we can do. */
761 if (CONST_INT_P (x) && oldmode != VOIDmode
762 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
763 {
764 HOST_WIDE_INT val = INTVAL (x);
765
766 /* We must sign or zero-extend in this case. Start by
767 zero-extending, then sign extend if we need to. */
768 val &= GET_MODE_MASK (oldmode);
769 if (! unsignedp
770 && val_signbit_known_set_p (oldmode, val))
771 val |= ~GET_MODE_MASK (oldmode);
772
773 return gen_int_mode (val, mode);
774 }
775
776 return gen_lowpart (mode, x);
777 }
778
779 /* Converting from integer constant into mode is always equivalent to an
780 subreg operation. */
781 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
782 {
783 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
784 return simplify_gen_subreg (mode, x, oldmode, 0);
785 }
786
787 temp = gen_reg_rtx (mode);
788 convert_move (temp, x, unsignedp);
789 return temp;
790 }
791 \f
792 /* Return the largest alignment we can use for doing a move (or store)
793 of MAX_PIECES. ALIGN is the largest alignment we could use. */
794
795 static unsigned int
796 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
797 {
798 enum machine_mode tmode;
799
800 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
801 if (align >= GET_MODE_ALIGNMENT (tmode))
802 align = GET_MODE_ALIGNMENT (tmode);
803 else
804 {
805 enum machine_mode tmode, xmode;
806
807 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
808 tmode != VOIDmode;
809 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
810 if (GET_MODE_SIZE (tmode) > max_pieces
811 || SLOW_UNALIGNED_ACCESS (tmode, align))
812 break;
813
814 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
815 }
816
817 return align;
818 }
819
820 /* Return the widest integer mode no wider than SIZE. If no such mode
821 can be found, return VOIDmode. */
822
823 static enum machine_mode
824 widest_int_mode_for_size (unsigned int size)
825 {
826 enum machine_mode tmode, mode = VOIDmode;
827
828 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
829 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
830 if (GET_MODE_SIZE (tmode) < size)
831 mode = tmode;
832
833 return mode;
834 }
835
836 /* STORE_MAX_PIECES is the number of bytes at a time that we can
837 store efficiently. Due to internal GCC limitations, this is
838 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
839 for an immediate constant. */
840
841 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
842
843 /* Determine whether the LEN bytes can be moved by using several move
844 instructions. Return nonzero if a call to move_by_pieces should
845 succeed. */
846
847 int
848 can_move_by_pieces (unsigned HOST_WIDE_INT len,
849 unsigned int align ATTRIBUTE_UNUSED)
850 {
851 return MOVE_BY_PIECES_P (len, align);
852 }
853
854 /* Generate several move instructions to copy LEN bytes from block FROM to
855 block TO. (These are MEM rtx's with BLKmode).
856
857 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
858 used to push FROM to the stack.
859
860 ALIGN is maximum stack alignment we can assume.
861
862 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
863 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
864 stpcpy. */
865
866 rtx
867 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
868 unsigned int align, int endp)
869 {
870 struct move_by_pieces_d data;
871 enum machine_mode to_addr_mode, from_addr_mode
872 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
873 rtx to_addr, from_addr = XEXP (from, 0);
874 unsigned int max_size = MOVE_MAX_PIECES + 1;
875 enum insn_code icode;
876
877 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
878
879 data.offset = 0;
880 data.from_addr = from_addr;
881 if (to)
882 {
883 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
884 to_addr = XEXP (to, 0);
885 data.to = to;
886 data.autinc_to
887 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
888 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
889 data.reverse
890 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
891 }
892 else
893 {
894 to_addr_mode = VOIDmode;
895 to_addr = NULL_RTX;
896 data.to = NULL_RTX;
897 data.autinc_to = 1;
898 #ifdef STACK_GROWS_DOWNWARD
899 data.reverse = 1;
900 #else
901 data.reverse = 0;
902 #endif
903 }
904 data.to_addr = to_addr;
905 data.from = from;
906 data.autinc_from
907 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
908 || GET_CODE (from_addr) == POST_INC
909 || GET_CODE (from_addr) == POST_DEC);
910
911 data.explicit_inc_from = 0;
912 data.explicit_inc_to = 0;
913 if (data.reverse) data.offset = len;
914 data.len = len;
915
916 /* If copying requires more than two move insns,
917 copy addresses to registers (to make displacements shorter)
918 and use post-increment if available. */
919 if (!(data.autinc_from && data.autinc_to)
920 && move_by_pieces_ninsns (len, align, max_size) > 2)
921 {
922 /* Find the mode of the largest move...
923 MODE might not be used depending on the definitions of the
924 USE_* macros below. */
925 enum machine_mode mode ATTRIBUTE_UNUSED
926 = widest_int_mode_for_size (max_size);
927
928 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
929 {
930 data.from_addr = copy_to_mode_reg (from_addr_mode,
931 plus_constant (from_addr, len));
932 data.autinc_from = 1;
933 data.explicit_inc_from = -1;
934 }
935 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
936 {
937 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
938 data.autinc_from = 1;
939 data.explicit_inc_from = 1;
940 }
941 if (!data.autinc_from && CONSTANT_P (from_addr))
942 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
943 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
944 {
945 data.to_addr = copy_to_mode_reg (to_addr_mode,
946 plus_constant (to_addr, len));
947 data.autinc_to = 1;
948 data.explicit_inc_to = -1;
949 }
950 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
951 {
952 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
953 data.autinc_to = 1;
954 data.explicit_inc_to = 1;
955 }
956 if (!data.autinc_to && CONSTANT_P (to_addr))
957 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
958 }
959
960 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
961
962 /* First move what we can in the largest integer mode, then go to
963 successively smaller modes. */
964
965 while (max_size > 1)
966 {
967 enum machine_mode mode = widest_int_mode_for_size (max_size);
968
969 if (mode == VOIDmode)
970 break;
971
972 icode = optab_handler (mov_optab, mode);
973 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
974 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
975
976 max_size = GET_MODE_SIZE (mode);
977 }
978
979 /* The code above should have handled everything. */
980 gcc_assert (!data.len);
981
982 if (endp)
983 {
984 rtx to1;
985
986 gcc_assert (!data.reverse);
987 if (data.autinc_to)
988 {
989 if (endp == 2)
990 {
991 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
992 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
993 else
994 data.to_addr = copy_to_mode_reg (to_addr_mode,
995 plus_constant (data.to_addr,
996 -1));
997 }
998 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
999 data.offset);
1000 }
1001 else
1002 {
1003 if (endp == 2)
1004 --data.offset;
1005 to1 = adjust_address (data.to, QImode, data.offset);
1006 }
1007 return to1;
1008 }
1009 else
1010 return data.to;
1011 }
1012
1013 /* Return number of insns required to move L bytes by pieces.
1014 ALIGN (in bits) is maximum alignment we can assume. */
1015
1016 unsigned HOST_WIDE_INT
1017 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1018 unsigned int max_size)
1019 {
1020 unsigned HOST_WIDE_INT n_insns = 0;
1021
1022 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1023
1024 while (max_size > 1)
1025 {
1026 enum machine_mode mode;
1027 enum insn_code icode;
1028
1029 mode = widest_int_mode_for_size (max_size);
1030
1031 if (mode == VOIDmode)
1032 break;
1033
1034 icode = optab_handler (mov_optab, mode);
1035 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1036 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1037
1038 max_size = GET_MODE_SIZE (mode);
1039 }
1040
1041 gcc_assert (!l);
1042 return n_insns;
1043 }
1044
1045 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1046 with move instructions for mode MODE. GENFUN is the gen_... function
1047 to make a move insn for that mode. DATA has all the other info. */
1048
1049 static void
1050 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1051 struct move_by_pieces_d *data)
1052 {
1053 unsigned int size = GET_MODE_SIZE (mode);
1054 rtx to1 = NULL_RTX, from1;
1055
1056 while (data->len >= size)
1057 {
1058 if (data->reverse)
1059 data->offset -= size;
1060
1061 if (data->to)
1062 {
1063 if (data->autinc_to)
1064 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1065 data->offset);
1066 else
1067 to1 = adjust_address (data->to, mode, data->offset);
1068 }
1069
1070 if (data->autinc_from)
1071 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1072 data->offset);
1073 else
1074 from1 = adjust_address (data->from, mode, data->offset);
1075
1076 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1077 emit_insn (gen_add2_insn (data->to_addr,
1078 GEN_INT (-(HOST_WIDE_INT)size)));
1079 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1080 emit_insn (gen_add2_insn (data->from_addr,
1081 GEN_INT (-(HOST_WIDE_INT)size)));
1082
1083 if (data->to)
1084 emit_insn ((*genfun) (to1, from1));
1085 else
1086 {
1087 #ifdef PUSH_ROUNDING
1088 emit_single_push_insn (mode, from1, NULL);
1089 #else
1090 gcc_unreachable ();
1091 #endif
1092 }
1093
1094 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1095 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1096 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1097 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1098
1099 if (! data->reverse)
1100 data->offset += size;
1101
1102 data->len -= size;
1103 }
1104 }
1105 \f
1106 /* Emit code to move a block Y to a block X. This may be done with
1107 string-move instructions, with multiple scalar move instructions,
1108 or with a library call.
1109
1110 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1111 SIZE is an rtx that says how long they are.
1112 ALIGN is the maximum alignment we can assume they have.
1113 METHOD describes what kind of copy this is, and what mechanisms may be used.
1114
1115 Return the address of the new block, if memcpy is called and returns it,
1116 0 otherwise. */
1117
1118 rtx
1119 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1120 unsigned int expected_align, HOST_WIDE_INT expected_size)
1121 {
1122 bool may_use_call;
1123 rtx retval = 0;
1124 unsigned int align;
1125
1126 gcc_assert (size);
1127 if (CONST_INT_P (size)
1128 && INTVAL (size) == 0)
1129 return 0;
1130
1131 switch (method)
1132 {
1133 case BLOCK_OP_NORMAL:
1134 case BLOCK_OP_TAILCALL:
1135 may_use_call = true;
1136 break;
1137
1138 case BLOCK_OP_CALL_PARM:
1139 may_use_call = block_move_libcall_safe_for_call_parm ();
1140
1141 /* Make inhibit_defer_pop nonzero around the library call
1142 to force it to pop the arguments right away. */
1143 NO_DEFER_POP;
1144 break;
1145
1146 case BLOCK_OP_NO_LIBCALL:
1147 may_use_call = false;
1148 break;
1149
1150 default:
1151 gcc_unreachable ();
1152 }
1153
1154 gcc_assert (MEM_P (x) && MEM_P (y));
1155 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1156 gcc_assert (align >= BITS_PER_UNIT);
1157
1158 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1159 block copy is more efficient for other large modes, e.g. DCmode. */
1160 x = adjust_address (x, BLKmode, 0);
1161 y = adjust_address (y, BLKmode, 0);
1162
1163 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1164 can be incorrect is coming from __builtin_memcpy. */
1165 if (CONST_INT_P (size))
1166 {
1167 x = shallow_copy_rtx (x);
1168 y = shallow_copy_rtx (y);
1169 set_mem_size (x, INTVAL (size));
1170 set_mem_size (y, INTVAL (size));
1171 }
1172
1173 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1174 move_by_pieces (x, y, INTVAL (size), align, 0);
1175 else if (emit_block_move_via_movmem (x, y, size, align,
1176 expected_align, expected_size))
1177 ;
1178 else if (may_use_call
1179 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1180 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1181 {
1182 /* Since x and y are passed to a libcall, mark the corresponding
1183 tree EXPR as addressable. */
1184 tree y_expr = MEM_EXPR (y);
1185 tree x_expr = MEM_EXPR (x);
1186 if (y_expr)
1187 mark_addressable (y_expr);
1188 if (x_expr)
1189 mark_addressable (x_expr);
1190 retval = emit_block_move_via_libcall (x, y, size,
1191 method == BLOCK_OP_TAILCALL);
1192 }
1193
1194 else
1195 emit_block_move_via_loop (x, y, size, align);
1196
1197 if (method == BLOCK_OP_CALL_PARM)
1198 OK_DEFER_POP;
1199
1200 return retval;
1201 }
1202
1203 rtx
1204 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1205 {
1206 return emit_block_move_hints (x, y, size, method, 0, -1);
1207 }
1208
1209 /* A subroutine of emit_block_move. Returns true if calling the
1210 block move libcall will not clobber any parameters which may have
1211 already been placed on the stack. */
1212
1213 static bool
1214 block_move_libcall_safe_for_call_parm (void)
1215 {
1216 #if defined (REG_PARM_STACK_SPACE)
1217 tree fn;
1218 #endif
1219
1220 /* If arguments are pushed on the stack, then they're safe. */
1221 if (PUSH_ARGS)
1222 return true;
1223
1224 /* If registers go on the stack anyway, any argument is sure to clobber
1225 an outgoing argument. */
1226 #if defined (REG_PARM_STACK_SPACE)
1227 fn = emit_block_move_libcall_fn (false);
1228 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1229 depend on its argument. */
1230 (void) fn;
1231 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1232 && REG_PARM_STACK_SPACE (fn) != 0)
1233 return false;
1234 #endif
1235
1236 /* If any argument goes in memory, then it might clobber an outgoing
1237 argument. */
1238 {
1239 CUMULATIVE_ARGS args_so_far_v;
1240 cumulative_args_t args_so_far;
1241 tree fn, arg;
1242
1243 fn = emit_block_move_libcall_fn (false);
1244 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1245 args_so_far = pack_cumulative_args (&args_so_far_v);
1246
1247 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1248 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1249 {
1250 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1251 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1252 NULL_TREE, true);
1253 if (!tmp || !REG_P (tmp))
1254 return false;
1255 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1256 return false;
1257 targetm.calls.function_arg_advance (args_so_far, mode,
1258 NULL_TREE, true);
1259 }
1260 }
1261 return true;
1262 }
1263
1264 /* A subroutine of emit_block_move. Expand a movmem pattern;
1265 return true if successful. */
1266
1267 static bool
1268 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1269 unsigned int expected_align, HOST_WIDE_INT expected_size)
1270 {
1271 int save_volatile_ok = volatile_ok;
1272 enum machine_mode mode;
1273
1274 if (expected_align < align)
1275 expected_align = align;
1276
1277 /* Since this is a move insn, we don't care about volatility. */
1278 volatile_ok = 1;
1279
1280 /* Try the most limited insn first, because there's no point
1281 including more than one in the machine description unless
1282 the more limited one has some advantage. */
1283
1284 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1285 mode = GET_MODE_WIDER_MODE (mode))
1286 {
1287 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1288
1289 if (code != CODE_FOR_nothing
1290 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1291 here because if SIZE is less than the mode mask, as it is
1292 returned by the macro, it will definitely be less than the
1293 actual mode mask. */
1294 && ((CONST_INT_P (size)
1295 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1296 <= (GET_MODE_MASK (mode) >> 1)))
1297 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1298 {
1299 struct expand_operand ops[6];
1300 unsigned int nops;
1301
1302 /* ??? When called via emit_block_move_for_call, it'd be
1303 nice if there were some way to inform the backend, so
1304 that it doesn't fail the expansion because it thinks
1305 emitting the libcall would be more efficient. */
1306 nops = insn_data[(int) code].n_generator_args;
1307 gcc_assert (nops == 4 || nops == 6);
1308
1309 create_fixed_operand (&ops[0], x);
1310 create_fixed_operand (&ops[1], y);
1311 /* The check above guarantees that this size conversion is valid. */
1312 create_convert_operand_to (&ops[2], size, mode, true);
1313 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1314 if (nops == 6)
1315 {
1316 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1317 create_integer_operand (&ops[5], expected_size);
1318 }
1319 if (maybe_expand_insn (code, nops, ops))
1320 {
1321 volatile_ok = save_volatile_ok;
1322 return true;
1323 }
1324 }
1325 }
1326
1327 volatile_ok = save_volatile_ok;
1328 return false;
1329 }
1330
1331 /* A subroutine of emit_block_move. Expand a call to memcpy.
1332 Return the return value from memcpy, 0 otherwise. */
1333
1334 rtx
1335 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1336 {
1337 rtx dst_addr, src_addr;
1338 tree call_expr, fn, src_tree, dst_tree, size_tree;
1339 enum machine_mode size_mode;
1340 rtx retval;
1341
1342 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1343 pseudos. We can then place those new pseudos into a VAR_DECL and
1344 use them later. */
1345
1346 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1347 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1348
1349 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1350 src_addr = convert_memory_address (ptr_mode, src_addr);
1351
1352 dst_tree = make_tree (ptr_type_node, dst_addr);
1353 src_tree = make_tree (ptr_type_node, src_addr);
1354
1355 size_mode = TYPE_MODE (sizetype);
1356
1357 size = convert_to_mode (size_mode, size, 1);
1358 size = copy_to_mode_reg (size_mode, size);
1359
1360 /* It is incorrect to use the libcall calling conventions to call
1361 memcpy in this context. This could be a user call to memcpy and
1362 the user may wish to examine the return value from memcpy. For
1363 targets where libcalls and normal calls have different conventions
1364 for returning pointers, we could end up generating incorrect code. */
1365
1366 size_tree = make_tree (sizetype, size);
1367
1368 fn = emit_block_move_libcall_fn (true);
1369 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1370 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1371
1372 retval = expand_normal (call_expr);
1373
1374 return retval;
1375 }
1376
1377 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1378 for the function we use for block copies. The first time FOR_CALL
1379 is true, we call assemble_external. */
1380
1381 static GTY(()) tree block_move_fn;
1382
1383 void
1384 init_block_move_fn (const char *asmspec)
1385 {
1386 if (!block_move_fn)
1387 {
1388 tree args, fn;
1389
1390 fn = get_identifier ("memcpy");
1391 args = build_function_type_list (ptr_type_node, ptr_type_node,
1392 const_ptr_type_node, sizetype,
1393 NULL_TREE);
1394
1395 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1396 DECL_EXTERNAL (fn) = 1;
1397 TREE_PUBLIC (fn) = 1;
1398 DECL_ARTIFICIAL (fn) = 1;
1399 TREE_NOTHROW (fn) = 1;
1400 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1401 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1402
1403 block_move_fn = fn;
1404 }
1405
1406 if (asmspec)
1407 set_user_assembler_name (block_move_fn, asmspec);
1408 }
1409
1410 static tree
1411 emit_block_move_libcall_fn (int for_call)
1412 {
1413 static bool emitted_extern;
1414
1415 if (!block_move_fn)
1416 init_block_move_fn (NULL);
1417
1418 if (for_call && !emitted_extern)
1419 {
1420 emitted_extern = true;
1421 make_decl_rtl (block_move_fn);
1422 assemble_external (block_move_fn);
1423 }
1424
1425 return block_move_fn;
1426 }
1427
1428 /* A subroutine of emit_block_move. Copy the data via an explicit
1429 loop. This is used only when libcalls are forbidden. */
1430 /* ??? It'd be nice to copy in hunks larger than QImode. */
1431
1432 static void
1433 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1434 unsigned int align ATTRIBUTE_UNUSED)
1435 {
1436 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1437 enum machine_mode x_addr_mode
1438 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1439 enum machine_mode y_addr_mode
1440 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1441 enum machine_mode iter_mode;
1442
1443 iter_mode = GET_MODE (size);
1444 if (iter_mode == VOIDmode)
1445 iter_mode = word_mode;
1446
1447 top_label = gen_label_rtx ();
1448 cmp_label = gen_label_rtx ();
1449 iter = gen_reg_rtx (iter_mode);
1450
1451 emit_move_insn (iter, const0_rtx);
1452
1453 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1454 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1455 do_pending_stack_adjust ();
1456
1457 emit_jump (cmp_label);
1458 emit_label (top_label);
1459
1460 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1461 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1462
1463 if (x_addr_mode != y_addr_mode)
1464 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1465 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1466
1467 x = change_address (x, QImode, x_addr);
1468 y = change_address (y, QImode, y_addr);
1469
1470 emit_move_insn (x, y);
1471
1472 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1473 true, OPTAB_LIB_WIDEN);
1474 if (tmp != iter)
1475 emit_move_insn (iter, tmp);
1476
1477 emit_label (cmp_label);
1478
1479 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1480 true, top_label);
1481 }
1482 \f
1483 /* Copy all or part of a value X into registers starting at REGNO.
1484 The number of registers to be filled is NREGS. */
1485
1486 void
1487 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1488 {
1489 int i;
1490 #ifdef HAVE_load_multiple
1491 rtx pat;
1492 rtx last;
1493 #endif
1494
1495 if (nregs == 0)
1496 return;
1497
1498 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1499 x = validize_mem (force_const_mem (mode, x));
1500
1501 /* See if the machine can do this with a load multiple insn. */
1502 #ifdef HAVE_load_multiple
1503 if (HAVE_load_multiple)
1504 {
1505 last = get_last_insn ();
1506 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1507 GEN_INT (nregs));
1508 if (pat)
1509 {
1510 emit_insn (pat);
1511 return;
1512 }
1513 else
1514 delete_insns_since (last);
1515 }
1516 #endif
1517
1518 for (i = 0; i < nregs; i++)
1519 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1520 operand_subword_force (x, i, mode));
1521 }
1522
1523 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1524 The number of registers to be filled is NREGS. */
1525
1526 void
1527 move_block_from_reg (int regno, rtx x, int nregs)
1528 {
1529 int i;
1530
1531 if (nregs == 0)
1532 return;
1533
1534 /* See if the machine can do this with a store multiple insn. */
1535 #ifdef HAVE_store_multiple
1536 if (HAVE_store_multiple)
1537 {
1538 rtx last = get_last_insn ();
1539 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1540 GEN_INT (nregs));
1541 if (pat)
1542 {
1543 emit_insn (pat);
1544 return;
1545 }
1546 else
1547 delete_insns_since (last);
1548 }
1549 #endif
1550
1551 for (i = 0; i < nregs; i++)
1552 {
1553 rtx tem = operand_subword (x, i, 1, BLKmode);
1554
1555 gcc_assert (tem);
1556
1557 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1558 }
1559 }
1560
1561 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1562 ORIG, where ORIG is a non-consecutive group of registers represented by
1563 a PARALLEL. The clone is identical to the original except in that the
1564 original set of registers is replaced by a new set of pseudo registers.
1565 The new set has the same modes as the original set. */
1566
1567 rtx
1568 gen_group_rtx (rtx orig)
1569 {
1570 int i, length;
1571 rtx *tmps;
1572
1573 gcc_assert (GET_CODE (orig) == PARALLEL);
1574
1575 length = XVECLEN (orig, 0);
1576 tmps = XALLOCAVEC (rtx, length);
1577
1578 /* Skip a NULL entry in first slot. */
1579 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1580
1581 if (i)
1582 tmps[0] = 0;
1583
1584 for (; i < length; i++)
1585 {
1586 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1587 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1588
1589 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1590 }
1591
1592 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1593 }
1594
1595 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1596 except that values are placed in TMPS[i], and must later be moved
1597 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1598
1599 static void
1600 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1601 {
1602 rtx src;
1603 int start, i;
1604 enum machine_mode m = GET_MODE (orig_src);
1605
1606 gcc_assert (GET_CODE (dst) == PARALLEL);
1607
1608 if (m != VOIDmode
1609 && !SCALAR_INT_MODE_P (m)
1610 && !MEM_P (orig_src)
1611 && GET_CODE (orig_src) != CONCAT)
1612 {
1613 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1614 if (imode == BLKmode)
1615 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1616 else
1617 src = gen_reg_rtx (imode);
1618 if (imode != BLKmode)
1619 src = gen_lowpart (GET_MODE (orig_src), src);
1620 emit_move_insn (src, orig_src);
1621 /* ...and back again. */
1622 if (imode != BLKmode)
1623 src = gen_lowpart (imode, src);
1624 emit_group_load_1 (tmps, dst, src, type, ssize);
1625 return;
1626 }
1627
1628 /* Check for a NULL entry, used to indicate that the parameter goes
1629 both on the stack and in registers. */
1630 if (XEXP (XVECEXP (dst, 0, 0), 0))
1631 start = 0;
1632 else
1633 start = 1;
1634
1635 /* Process the pieces. */
1636 for (i = start; i < XVECLEN (dst, 0); i++)
1637 {
1638 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1639 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1640 unsigned int bytelen = GET_MODE_SIZE (mode);
1641 int shift = 0;
1642
1643 /* Handle trailing fragments that run over the size of the struct. */
1644 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1645 {
1646 /* Arrange to shift the fragment to where it belongs.
1647 extract_bit_field loads to the lsb of the reg. */
1648 if (
1649 #ifdef BLOCK_REG_PADDING
1650 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1651 == (BYTES_BIG_ENDIAN ? upward : downward)
1652 #else
1653 BYTES_BIG_ENDIAN
1654 #endif
1655 )
1656 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1657 bytelen = ssize - bytepos;
1658 gcc_assert (bytelen > 0);
1659 }
1660
1661 /* If we won't be loading directly from memory, protect the real source
1662 from strange tricks we might play; but make sure that the source can
1663 be loaded directly into the destination. */
1664 src = orig_src;
1665 if (!MEM_P (orig_src)
1666 && (!CONSTANT_P (orig_src)
1667 || (GET_MODE (orig_src) != mode
1668 && GET_MODE (orig_src) != VOIDmode)))
1669 {
1670 if (GET_MODE (orig_src) == VOIDmode)
1671 src = gen_reg_rtx (mode);
1672 else
1673 src = gen_reg_rtx (GET_MODE (orig_src));
1674
1675 emit_move_insn (src, orig_src);
1676 }
1677
1678 /* Optimize the access just a bit. */
1679 if (MEM_P (src)
1680 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1681 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1682 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1683 && bytelen == GET_MODE_SIZE (mode))
1684 {
1685 tmps[i] = gen_reg_rtx (mode);
1686 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1687 }
1688 else if (COMPLEX_MODE_P (mode)
1689 && GET_MODE (src) == mode
1690 && bytelen == GET_MODE_SIZE (mode))
1691 /* Let emit_move_complex do the bulk of the work. */
1692 tmps[i] = src;
1693 else if (GET_CODE (src) == CONCAT)
1694 {
1695 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1696 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1697
1698 if ((bytepos == 0 && bytelen == slen0)
1699 || (bytepos != 0 && bytepos + bytelen <= slen))
1700 {
1701 /* The following assumes that the concatenated objects all
1702 have the same size. In this case, a simple calculation
1703 can be used to determine the object and the bit field
1704 to be extracted. */
1705 tmps[i] = XEXP (src, bytepos / slen0);
1706 if (! CONSTANT_P (tmps[i])
1707 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1708 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1709 (bytepos % slen0) * BITS_PER_UNIT,
1710 1, false, NULL_RTX, mode, mode);
1711 }
1712 else
1713 {
1714 rtx mem;
1715
1716 gcc_assert (!bytepos);
1717 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1718 emit_move_insn (mem, src);
1719 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1720 0, 1, false, NULL_RTX, mode, mode);
1721 }
1722 }
1723 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1724 SIMD register, which is currently broken. While we get GCC
1725 to emit proper RTL for these cases, let's dump to memory. */
1726 else if (VECTOR_MODE_P (GET_MODE (dst))
1727 && REG_P (src))
1728 {
1729 int slen = GET_MODE_SIZE (GET_MODE (src));
1730 rtx mem;
1731
1732 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1733 emit_move_insn (mem, src);
1734 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1735 }
1736 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1737 && XVECLEN (dst, 0) > 1)
1738 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1739 else if (CONSTANT_P (src))
1740 {
1741 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1742
1743 if (len == ssize)
1744 tmps[i] = src;
1745 else
1746 {
1747 rtx first, second;
1748
1749 gcc_assert (2 * len == ssize);
1750 split_double (src, &first, &second);
1751 if (i)
1752 tmps[i] = second;
1753 else
1754 tmps[i] = first;
1755 }
1756 }
1757 else if (REG_P (src) && GET_MODE (src) == mode)
1758 tmps[i] = src;
1759 else
1760 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1761 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1762 mode, mode);
1763
1764 if (shift)
1765 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1766 shift, tmps[i], 0);
1767 }
1768 }
1769
1770 /* Emit code to move a block SRC of type TYPE to a block DST,
1771 where DST is non-consecutive registers represented by a PARALLEL.
1772 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1773 if not known. */
1774
1775 void
1776 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1777 {
1778 rtx *tmps;
1779 int i;
1780
1781 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1782 emit_group_load_1 (tmps, dst, src, type, ssize);
1783
1784 /* Copy the extracted pieces into the proper (probable) hard regs. */
1785 for (i = 0; i < XVECLEN (dst, 0); i++)
1786 {
1787 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1788 if (d == NULL)
1789 continue;
1790 emit_move_insn (d, tmps[i]);
1791 }
1792 }
1793
1794 /* Similar, but load SRC into new pseudos in a format that looks like
1795 PARALLEL. This can later be fed to emit_group_move to get things
1796 in the right place. */
1797
1798 rtx
1799 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1800 {
1801 rtvec vec;
1802 int i;
1803
1804 vec = rtvec_alloc (XVECLEN (parallel, 0));
1805 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1806
1807 /* Convert the vector to look just like the original PARALLEL, except
1808 with the computed values. */
1809 for (i = 0; i < XVECLEN (parallel, 0); i++)
1810 {
1811 rtx e = XVECEXP (parallel, 0, i);
1812 rtx d = XEXP (e, 0);
1813
1814 if (d)
1815 {
1816 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1817 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1818 }
1819 RTVEC_ELT (vec, i) = e;
1820 }
1821
1822 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1823 }
1824
1825 /* Emit code to move a block SRC to block DST, where SRC and DST are
1826 non-consecutive groups of registers, each represented by a PARALLEL. */
1827
1828 void
1829 emit_group_move (rtx dst, rtx src)
1830 {
1831 int i;
1832
1833 gcc_assert (GET_CODE (src) == PARALLEL
1834 && GET_CODE (dst) == PARALLEL
1835 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1836
1837 /* Skip first entry if NULL. */
1838 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1839 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1840 XEXP (XVECEXP (src, 0, i), 0));
1841 }
1842
1843 /* Move a group of registers represented by a PARALLEL into pseudos. */
1844
1845 rtx
1846 emit_group_move_into_temps (rtx src)
1847 {
1848 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1849 int i;
1850
1851 for (i = 0; i < XVECLEN (src, 0); i++)
1852 {
1853 rtx e = XVECEXP (src, 0, i);
1854 rtx d = XEXP (e, 0);
1855
1856 if (d)
1857 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1858 RTVEC_ELT (vec, i) = e;
1859 }
1860
1861 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1862 }
1863
1864 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1865 where SRC is non-consecutive registers represented by a PARALLEL.
1866 SSIZE represents the total size of block ORIG_DST, or -1 if not
1867 known. */
1868
1869 void
1870 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1871 {
1872 rtx *tmps, dst;
1873 int start, finish, i;
1874 enum machine_mode m = GET_MODE (orig_dst);
1875
1876 gcc_assert (GET_CODE (src) == PARALLEL);
1877
1878 if (!SCALAR_INT_MODE_P (m)
1879 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1880 {
1881 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1882 if (imode == BLKmode)
1883 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1884 else
1885 dst = gen_reg_rtx (imode);
1886 emit_group_store (dst, src, type, ssize);
1887 if (imode != BLKmode)
1888 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1889 emit_move_insn (orig_dst, dst);
1890 return;
1891 }
1892
1893 /* Check for a NULL entry, used to indicate that the parameter goes
1894 both on the stack and in registers. */
1895 if (XEXP (XVECEXP (src, 0, 0), 0))
1896 start = 0;
1897 else
1898 start = 1;
1899 finish = XVECLEN (src, 0);
1900
1901 tmps = XALLOCAVEC (rtx, finish);
1902
1903 /* Copy the (probable) hard regs into pseudos. */
1904 for (i = start; i < finish; i++)
1905 {
1906 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1907 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1908 {
1909 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1910 emit_move_insn (tmps[i], reg);
1911 }
1912 else
1913 tmps[i] = reg;
1914 }
1915
1916 /* If we won't be storing directly into memory, protect the real destination
1917 from strange tricks we might play. */
1918 dst = orig_dst;
1919 if (GET_CODE (dst) == PARALLEL)
1920 {
1921 rtx temp;
1922
1923 /* We can get a PARALLEL dst if there is a conditional expression in
1924 a return statement. In that case, the dst and src are the same,
1925 so no action is necessary. */
1926 if (rtx_equal_p (dst, src))
1927 return;
1928
1929 /* It is unclear if we can ever reach here, but we may as well handle
1930 it. Allocate a temporary, and split this into a store/load to/from
1931 the temporary. */
1932
1933 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1934 emit_group_store (temp, src, type, ssize);
1935 emit_group_load (dst, temp, type, ssize);
1936 return;
1937 }
1938 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1939 {
1940 enum machine_mode outer = GET_MODE (dst);
1941 enum machine_mode inner;
1942 HOST_WIDE_INT bytepos;
1943 bool done = false;
1944 rtx temp;
1945
1946 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1947 dst = gen_reg_rtx (outer);
1948
1949 /* Make life a bit easier for combine. */
1950 /* If the first element of the vector is the low part
1951 of the destination mode, use a paradoxical subreg to
1952 initialize the destination. */
1953 if (start < finish)
1954 {
1955 inner = GET_MODE (tmps[start]);
1956 bytepos = subreg_lowpart_offset (inner, outer);
1957 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1958 {
1959 temp = simplify_gen_subreg (outer, tmps[start],
1960 inner, 0);
1961 if (temp)
1962 {
1963 emit_move_insn (dst, temp);
1964 done = true;
1965 start++;
1966 }
1967 }
1968 }
1969
1970 /* If the first element wasn't the low part, try the last. */
1971 if (!done
1972 && start < finish - 1)
1973 {
1974 inner = GET_MODE (tmps[finish - 1]);
1975 bytepos = subreg_lowpart_offset (inner, outer);
1976 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1977 {
1978 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1979 inner, 0);
1980 if (temp)
1981 {
1982 emit_move_insn (dst, temp);
1983 done = true;
1984 finish--;
1985 }
1986 }
1987 }
1988
1989 /* Otherwise, simply initialize the result to zero. */
1990 if (!done)
1991 emit_move_insn (dst, CONST0_RTX (outer));
1992 }
1993
1994 /* Process the pieces. */
1995 for (i = start; i < finish; i++)
1996 {
1997 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
1998 enum machine_mode mode = GET_MODE (tmps[i]);
1999 unsigned int bytelen = GET_MODE_SIZE (mode);
2000 unsigned int adj_bytelen = bytelen;
2001 rtx dest = dst;
2002
2003 /* Handle trailing fragments that run over the size of the struct. */
2004 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2005 adj_bytelen = ssize - bytepos;
2006
2007 if (GET_CODE (dst) == CONCAT)
2008 {
2009 if (bytepos + adj_bytelen
2010 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2011 dest = XEXP (dst, 0);
2012 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2013 {
2014 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2015 dest = XEXP (dst, 1);
2016 }
2017 else
2018 {
2019 enum machine_mode dest_mode = GET_MODE (dest);
2020 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2021
2022 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2023
2024 if (GET_MODE_ALIGNMENT (dest_mode)
2025 >= GET_MODE_ALIGNMENT (tmp_mode))
2026 {
2027 dest = assign_stack_temp (dest_mode,
2028 GET_MODE_SIZE (dest_mode),
2029 0);
2030 emit_move_insn (adjust_address (dest,
2031 tmp_mode,
2032 bytepos),
2033 tmps[i]);
2034 dst = dest;
2035 }
2036 else
2037 {
2038 dest = assign_stack_temp (tmp_mode,
2039 GET_MODE_SIZE (tmp_mode),
2040 0);
2041 emit_move_insn (dest, tmps[i]);
2042 dst = adjust_address (dest, dest_mode, bytepos);
2043 }
2044 break;
2045 }
2046 }
2047
2048 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2049 {
2050 /* store_bit_field always takes its value from the lsb.
2051 Move the fragment to the lsb if it's not already there. */
2052 if (
2053 #ifdef BLOCK_REG_PADDING
2054 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2055 == (BYTES_BIG_ENDIAN ? upward : downward)
2056 #else
2057 BYTES_BIG_ENDIAN
2058 #endif
2059 )
2060 {
2061 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2062 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2063 shift, tmps[i], 0);
2064 }
2065 bytelen = adj_bytelen;
2066 }
2067
2068 /* Optimize the access just a bit. */
2069 if (MEM_P (dest)
2070 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2071 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2072 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2073 && bytelen == GET_MODE_SIZE (mode))
2074 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2075 else
2076 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2077 0, 0, mode, tmps[i]);
2078 }
2079
2080 /* Copy from the pseudo into the (probable) hard reg. */
2081 if (orig_dst != dst)
2082 emit_move_insn (orig_dst, dst);
2083 }
2084
2085 /* Generate code to copy a BLKmode object of TYPE out of a
2086 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2087 is null, a stack temporary is created. TGTBLK is returned.
2088
2089 The purpose of this routine is to handle functions that return
2090 BLKmode structures in registers. Some machines (the PA for example)
2091 want to return all small structures in registers regardless of the
2092 structure's alignment. */
2093
2094 rtx
2095 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2096 {
2097 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2098 rtx src = NULL, dst = NULL;
2099 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2100 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2101 enum machine_mode copy_mode;
2102
2103 if (tgtblk == 0)
2104 {
2105 tgtblk = assign_temp (build_qualified_type (type,
2106 (TYPE_QUALS (type)
2107 | TYPE_QUAL_CONST)),
2108 0, 1, 1);
2109 preserve_temp_slots (tgtblk);
2110 }
2111
2112 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2113 into a new pseudo which is a full word. */
2114
2115 if (GET_MODE (srcreg) != BLKmode
2116 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2117 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2118
2119 /* If the structure doesn't take up a whole number of words, see whether
2120 SRCREG is padded on the left or on the right. If it's on the left,
2121 set PADDING_CORRECTION to the number of bits to skip.
2122
2123 In most ABIs, the structure will be returned at the least end of
2124 the register, which translates to right padding on little-endian
2125 targets and left padding on big-endian targets. The opposite
2126 holds if the structure is returned at the most significant
2127 end of the register. */
2128 if (bytes % UNITS_PER_WORD != 0
2129 && (targetm.calls.return_in_msb (type)
2130 ? !BYTES_BIG_ENDIAN
2131 : BYTES_BIG_ENDIAN))
2132 padding_correction
2133 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2134
2135 /* Copy the structure BITSIZE bits at a time. If the target lives in
2136 memory, take care of not reading/writing past its end by selecting
2137 a copy mode suited to BITSIZE. This should always be possible given
2138 how it is computed.
2139
2140 We could probably emit more efficient code for machines which do not use
2141 strict alignment, but it doesn't seem worth the effort at the current
2142 time. */
2143
2144 copy_mode = word_mode;
2145 if (MEM_P (tgtblk))
2146 {
2147 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2148 if (mem_mode != BLKmode)
2149 copy_mode = mem_mode;
2150 }
2151
2152 for (bitpos = 0, xbitpos = padding_correction;
2153 bitpos < bytes * BITS_PER_UNIT;
2154 bitpos += bitsize, xbitpos += bitsize)
2155 {
2156 /* We need a new source operand each time xbitpos is on a
2157 word boundary and when xbitpos == padding_correction
2158 (the first time through). */
2159 if (xbitpos % BITS_PER_WORD == 0
2160 || xbitpos == padding_correction)
2161 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2162 GET_MODE (srcreg));
2163
2164 /* We need a new destination operand each time bitpos is on
2165 a word boundary. */
2166 if (bitpos % BITS_PER_WORD == 0)
2167 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2168
2169 /* Use xbitpos for the source extraction (right justified) and
2170 bitpos for the destination store (left justified). */
2171 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2172 extract_bit_field (src, bitsize,
2173 xbitpos % BITS_PER_WORD, 1, false,
2174 NULL_RTX, copy_mode, copy_mode));
2175 }
2176
2177 return tgtblk;
2178 }
2179
2180 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2181 register if it contains any data, otherwise return null.
2182
2183 This is used on targets that return BLKmode values in registers. */
2184
2185 rtx
2186 copy_blkmode_to_reg (enum machine_mode mode, tree src)
2187 {
2188 int i, n_regs;
2189 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2190 unsigned int bitsize;
2191 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2192 enum machine_mode dst_mode;
2193
2194 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2195
2196 x = expand_normal (src);
2197
2198 bytes = int_size_in_bytes (TREE_TYPE (src));
2199 if (bytes == 0)
2200 return NULL_RTX;
2201
2202 /* If the structure doesn't take up a whole number of words, see
2203 whether the register value should be padded on the left or on
2204 the right. Set PADDING_CORRECTION to the number of padding
2205 bits needed on the left side.
2206
2207 In most ABIs, the structure will be returned at the least end of
2208 the register, which translates to right padding on little-endian
2209 targets and left padding on big-endian targets. The opposite
2210 holds if the structure is returned at the most significant
2211 end of the register. */
2212 if (bytes % UNITS_PER_WORD != 0
2213 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2214 ? !BYTES_BIG_ENDIAN
2215 : BYTES_BIG_ENDIAN))
2216 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2217 * BITS_PER_UNIT));
2218
2219 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2220 dst_words = XALLOCAVEC (rtx, n_regs);
2221 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2222
2223 /* Copy the structure BITSIZE bits at a time. */
2224 for (bitpos = 0, xbitpos = padding_correction;
2225 bitpos < bytes * BITS_PER_UNIT;
2226 bitpos += bitsize, xbitpos += bitsize)
2227 {
2228 /* We need a new destination pseudo each time xbitpos is
2229 on a word boundary and when xbitpos == padding_correction
2230 (the first time through). */
2231 if (xbitpos % BITS_PER_WORD == 0
2232 || xbitpos == padding_correction)
2233 {
2234 /* Generate an appropriate register. */
2235 dst_word = gen_reg_rtx (word_mode);
2236 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2237
2238 /* Clear the destination before we move anything into it. */
2239 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2240 }
2241
2242 /* We need a new source operand each time bitpos is on a word
2243 boundary. */
2244 if (bitpos % BITS_PER_WORD == 0)
2245 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2246
2247 /* Use bitpos for the source extraction (left justified) and
2248 xbitpos for the destination store (right justified). */
2249 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2250 0, 0, word_mode,
2251 extract_bit_field (src_word, bitsize,
2252 bitpos % BITS_PER_WORD, 1, false,
2253 NULL_RTX, word_mode, word_mode));
2254 }
2255
2256 if (mode == BLKmode)
2257 {
2258 /* Find the smallest integer mode large enough to hold the
2259 entire structure. */
2260 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2261 mode != VOIDmode;
2262 mode = GET_MODE_WIDER_MODE (mode))
2263 /* Have we found a large enough mode? */
2264 if (GET_MODE_SIZE (mode) >= bytes)
2265 break;
2266
2267 /* A suitable mode should have been found. */
2268 gcc_assert (mode != VOIDmode);
2269 }
2270
2271 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2272 dst_mode = word_mode;
2273 else
2274 dst_mode = mode;
2275 dst = gen_reg_rtx (dst_mode);
2276
2277 for (i = 0; i < n_regs; i++)
2278 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2279
2280 if (mode != dst_mode)
2281 dst = gen_lowpart (mode, dst);
2282
2283 return dst;
2284 }
2285
2286 /* Add a USE expression for REG to the (possibly empty) list pointed
2287 to by CALL_FUSAGE. REG must denote a hard register. */
2288
2289 void
2290 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2291 {
2292 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2293
2294 *call_fusage
2295 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2296 }
2297
2298 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2299 starting at REGNO. All of these registers must be hard registers. */
2300
2301 void
2302 use_regs (rtx *call_fusage, int regno, int nregs)
2303 {
2304 int i;
2305
2306 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2307
2308 for (i = 0; i < nregs; i++)
2309 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2310 }
2311
2312 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2313 PARALLEL REGS. This is for calls that pass values in multiple
2314 non-contiguous locations. The Irix 6 ABI has examples of this. */
2315
2316 void
2317 use_group_regs (rtx *call_fusage, rtx regs)
2318 {
2319 int i;
2320
2321 for (i = 0; i < XVECLEN (regs, 0); i++)
2322 {
2323 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2324
2325 /* A NULL entry means the parameter goes both on the stack and in
2326 registers. This can also be a MEM for targets that pass values
2327 partially on the stack and partially in registers. */
2328 if (reg != 0 && REG_P (reg))
2329 use_reg (call_fusage, reg);
2330 }
2331 }
2332
2333 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2334 assigment and the code of the expresion on the RHS is CODE. Return
2335 NULL otherwise. */
2336
2337 static gimple
2338 get_def_for_expr (tree name, enum tree_code code)
2339 {
2340 gimple def_stmt;
2341
2342 if (TREE_CODE (name) != SSA_NAME)
2343 return NULL;
2344
2345 def_stmt = get_gimple_for_ssa_name (name);
2346 if (!def_stmt
2347 || gimple_assign_rhs_code (def_stmt) != code)
2348 return NULL;
2349
2350 return def_stmt;
2351 }
2352 \f
2353
2354 /* Determine whether the LEN bytes generated by CONSTFUN can be
2355 stored to memory using several move instructions. CONSTFUNDATA is
2356 a pointer which will be passed as argument in every CONSTFUN call.
2357 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2358 a memset operation and false if it's a copy of a constant string.
2359 Return nonzero if a call to store_by_pieces should succeed. */
2360
2361 int
2362 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2363 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2364 void *constfundata, unsigned int align, bool memsetp)
2365 {
2366 unsigned HOST_WIDE_INT l;
2367 unsigned int max_size;
2368 HOST_WIDE_INT offset = 0;
2369 enum machine_mode mode;
2370 enum insn_code icode;
2371 int reverse;
2372 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2373 rtx cst ATTRIBUTE_UNUSED;
2374
2375 if (len == 0)
2376 return 1;
2377
2378 if (! (memsetp
2379 ? SET_BY_PIECES_P (len, align)
2380 : STORE_BY_PIECES_P (len, align)))
2381 return 0;
2382
2383 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2384
2385 /* We would first store what we can in the largest integer mode, then go to
2386 successively smaller modes. */
2387
2388 for (reverse = 0;
2389 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2390 reverse++)
2391 {
2392 l = len;
2393 max_size = STORE_MAX_PIECES + 1;
2394 while (max_size > 1)
2395 {
2396 mode = widest_int_mode_for_size (max_size);
2397
2398 if (mode == VOIDmode)
2399 break;
2400
2401 icode = optab_handler (mov_optab, mode);
2402 if (icode != CODE_FOR_nothing
2403 && align >= GET_MODE_ALIGNMENT (mode))
2404 {
2405 unsigned int size = GET_MODE_SIZE (mode);
2406
2407 while (l >= size)
2408 {
2409 if (reverse)
2410 offset -= size;
2411
2412 cst = (*constfun) (constfundata, offset, mode);
2413 if (!targetm.legitimate_constant_p (mode, cst))
2414 return 0;
2415
2416 if (!reverse)
2417 offset += size;
2418
2419 l -= size;
2420 }
2421 }
2422
2423 max_size = GET_MODE_SIZE (mode);
2424 }
2425
2426 /* The code above should have handled everything. */
2427 gcc_assert (!l);
2428 }
2429
2430 return 1;
2431 }
2432
2433 /* Generate several move instructions to store LEN bytes generated by
2434 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2435 pointer which will be passed as argument in every CONSTFUN call.
2436 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2437 a memset operation and false if it's a copy of a constant string.
2438 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2439 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2440 stpcpy. */
2441
2442 rtx
2443 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2444 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2445 void *constfundata, unsigned int align, bool memsetp, int endp)
2446 {
2447 enum machine_mode to_addr_mode
2448 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2449 struct store_by_pieces_d data;
2450
2451 if (len == 0)
2452 {
2453 gcc_assert (endp != 2);
2454 return to;
2455 }
2456
2457 gcc_assert (memsetp
2458 ? SET_BY_PIECES_P (len, align)
2459 : STORE_BY_PIECES_P (len, align));
2460 data.constfun = constfun;
2461 data.constfundata = constfundata;
2462 data.len = len;
2463 data.to = to;
2464 store_by_pieces_1 (&data, align);
2465 if (endp)
2466 {
2467 rtx to1;
2468
2469 gcc_assert (!data.reverse);
2470 if (data.autinc_to)
2471 {
2472 if (endp == 2)
2473 {
2474 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2475 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2476 else
2477 data.to_addr = copy_to_mode_reg (to_addr_mode,
2478 plus_constant (data.to_addr,
2479 -1));
2480 }
2481 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2482 data.offset);
2483 }
2484 else
2485 {
2486 if (endp == 2)
2487 --data.offset;
2488 to1 = adjust_address (data.to, QImode, data.offset);
2489 }
2490 return to1;
2491 }
2492 else
2493 return data.to;
2494 }
2495
2496 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2497 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2498
2499 static void
2500 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2501 {
2502 struct store_by_pieces_d data;
2503
2504 if (len == 0)
2505 return;
2506
2507 data.constfun = clear_by_pieces_1;
2508 data.constfundata = NULL;
2509 data.len = len;
2510 data.to = to;
2511 store_by_pieces_1 (&data, align);
2512 }
2513
2514 /* Callback routine for clear_by_pieces.
2515 Return const0_rtx unconditionally. */
2516
2517 static rtx
2518 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2519 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2520 enum machine_mode mode ATTRIBUTE_UNUSED)
2521 {
2522 return const0_rtx;
2523 }
2524
2525 /* Subroutine of clear_by_pieces and store_by_pieces.
2526 Generate several move instructions to store LEN bytes of block TO. (A MEM
2527 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2528
2529 static void
2530 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2531 unsigned int align ATTRIBUTE_UNUSED)
2532 {
2533 enum machine_mode to_addr_mode
2534 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2535 rtx to_addr = XEXP (data->to, 0);
2536 unsigned int max_size = STORE_MAX_PIECES + 1;
2537 enum insn_code icode;
2538
2539 data->offset = 0;
2540 data->to_addr = to_addr;
2541 data->autinc_to
2542 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2543 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2544
2545 data->explicit_inc_to = 0;
2546 data->reverse
2547 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2548 if (data->reverse)
2549 data->offset = data->len;
2550
2551 /* If storing requires more than two move insns,
2552 copy addresses to registers (to make displacements shorter)
2553 and use post-increment if available. */
2554 if (!data->autinc_to
2555 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2556 {
2557 /* Determine the main mode we'll be using.
2558 MODE might not be used depending on the definitions of the
2559 USE_* macros below. */
2560 enum machine_mode mode ATTRIBUTE_UNUSED
2561 = widest_int_mode_for_size (max_size);
2562
2563 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2564 {
2565 data->to_addr = copy_to_mode_reg (to_addr_mode,
2566 plus_constant (to_addr, data->len));
2567 data->autinc_to = 1;
2568 data->explicit_inc_to = -1;
2569 }
2570
2571 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2572 && ! data->autinc_to)
2573 {
2574 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2575 data->autinc_to = 1;
2576 data->explicit_inc_to = 1;
2577 }
2578
2579 if ( !data->autinc_to && CONSTANT_P (to_addr))
2580 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2581 }
2582
2583 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2584
2585 /* First store what we can in the largest integer mode, then go to
2586 successively smaller modes. */
2587
2588 while (max_size > 1)
2589 {
2590 enum machine_mode mode = widest_int_mode_for_size (max_size);
2591
2592 if (mode == VOIDmode)
2593 break;
2594
2595 icode = optab_handler (mov_optab, mode);
2596 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2597 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2598
2599 max_size = GET_MODE_SIZE (mode);
2600 }
2601
2602 /* The code above should have handled everything. */
2603 gcc_assert (!data->len);
2604 }
2605
2606 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2607 with move instructions for mode MODE. GENFUN is the gen_... function
2608 to make a move insn for that mode. DATA has all the other info. */
2609
2610 static void
2611 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2612 struct store_by_pieces_d *data)
2613 {
2614 unsigned int size = GET_MODE_SIZE (mode);
2615 rtx to1, cst;
2616
2617 while (data->len >= size)
2618 {
2619 if (data->reverse)
2620 data->offset -= size;
2621
2622 if (data->autinc_to)
2623 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2624 data->offset);
2625 else
2626 to1 = adjust_address (data->to, mode, data->offset);
2627
2628 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2629 emit_insn (gen_add2_insn (data->to_addr,
2630 GEN_INT (-(HOST_WIDE_INT) size)));
2631
2632 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2633 emit_insn ((*genfun) (to1, cst));
2634
2635 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2636 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2637
2638 if (! data->reverse)
2639 data->offset += size;
2640
2641 data->len -= size;
2642 }
2643 }
2644 \f
2645 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2646 its length in bytes. */
2647
2648 rtx
2649 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2650 unsigned int expected_align, HOST_WIDE_INT expected_size)
2651 {
2652 enum machine_mode mode = GET_MODE (object);
2653 unsigned int align;
2654
2655 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2656
2657 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2658 just move a zero. Otherwise, do this a piece at a time. */
2659 if (mode != BLKmode
2660 && CONST_INT_P (size)
2661 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2662 {
2663 rtx zero = CONST0_RTX (mode);
2664 if (zero != NULL)
2665 {
2666 emit_move_insn (object, zero);
2667 return NULL;
2668 }
2669
2670 if (COMPLEX_MODE_P (mode))
2671 {
2672 zero = CONST0_RTX (GET_MODE_INNER (mode));
2673 if (zero != NULL)
2674 {
2675 write_complex_part (object, zero, 0);
2676 write_complex_part (object, zero, 1);
2677 return NULL;
2678 }
2679 }
2680 }
2681
2682 if (size == const0_rtx)
2683 return NULL;
2684
2685 align = MEM_ALIGN (object);
2686
2687 if (CONST_INT_P (size)
2688 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2689 clear_by_pieces (object, INTVAL (size), align);
2690 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2691 expected_align, expected_size))
2692 ;
2693 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2694 return set_storage_via_libcall (object, size, const0_rtx,
2695 method == BLOCK_OP_TAILCALL);
2696 else
2697 gcc_unreachable ();
2698
2699 return NULL;
2700 }
2701
2702 rtx
2703 clear_storage (rtx object, rtx size, enum block_op_methods method)
2704 {
2705 return clear_storage_hints (object, size, method, 0, -1);
2706 }
2707
2708
2709 /* A subroutine of clear_storage. Expand a call to memset.
2710 Return the return value of memset, 0 otherwise. */
2711
2712 rtx
2713 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2714 {
2715 tree call_expr, fn, object_tree, size_tree, val_tree;
2716 enum machine_mode size_mode;
2717 rtx retval;
2718
2719 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2720 place those into new pseudos into a VAR_DECL and use them later. */
2721
2722 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2723
2724 size_mode = TYPE_MODE (sizetype);
2725 size = convert_to_mode (size_mode, size, 1);
2726 size = copy_to_mode_reg (size_mode, size);
2727
2728 /* It is incorrect to use the libcall calling conventions to call
2729 memset in this context. This could be a user call to memset and
2730 the user may wish to examine the return value from memset. For
2731 targets where libcalls and normal calls have different conventions
2732 for returning pointers, we could end up generating incorrect code. */
2733
2734 object_tree = make_tree (ptr_type_node, object);
2735 if (!CONST_INT_P (val))
2736 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2737 size_tree = make_tree (sizetype, size);
2738 val_tree = make_tree (integer_type_node, val);
2739
2740 fn = clear_storage_libcall_fn (true);
2741 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2742 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2743
2744 retval = expand_normal (call_expr);
2745
2746 return retval;
2747 }
2748
2749 /* A subroutine of set_storage_via_libcall. Create the tree node
2750 for the function we use for block clears. The first time FOR_CALL
2751 is true, we call assemble_external. */
2752
2753 tree block_clear_fn;
2754
2755 void
2756 init_block_clear_fn (const char *asmspec)
2757 {
2758 if (!block_clear_fn)
2759 {
2760 tree fn, args;
2761
2762 fn = get_identifier ("memset");
2763 args = build_function_type_list (ptr_type_node, ptr_type_node,
2764 integer_type_node, sizetype,
2765 NULL_TREE);
2766
2767 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2768 DECL_EXTERNAL (fn) = 1;
2769 TREE_PUBLIC (fn) = 1;
2770 DECL_ARTIFICIAL (fn) = 1;
2771 TREE_NOTHROW (fn) = 1;
2772 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2773 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2774
2775 block_clear_fn = fn;
2776 }
2777
2778 if (asmspec)
2779 set_user_assembler_name (block_clear_fn, asmspec);
2780 }
2781
2782 static tree
2783 clear_storage_libcall_fn (int for_call)
2784 {
2785 static bool emitted_extern;
2786
2787 if (!block_clear_fn)
2788 init_block_clear_fn (NULL);
2789
2790 if (for_call && !emitted_extern)
2791 {
2792 emitted_extern = true;
2793 make_decl_rtl (block_clear_fn);
2794 assemble_external (block_clear_fn);
2795 }
2796
2797 return block_clear_fn;
2798 }
2799 \f
2800 /* Expand a setmem pattern; return true if successful. */
2801
2802 bool
2803 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2804 unsigned int expected_align, HOST_WIDE_INT expected_size)
2805 {
2806 /* Try the most limited insn first, because there's no point
2807 including more than one in the machine description unless
2808 the more limited one has some advantage. */
2809
2810 enum machine_mode mode;
2811
2812 if (expected_align < align)
2813 expected_align = align;
2814
2815 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2816 mode = GET_MODE_WIDER_MODE (mode))
2817 {
2818 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2819
2820 if (code != CODE_FOR_nothing
2821 /* We don't need MODE to be narrower than
2822 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2823 the mode mask, as it is returned by the macro, it will
2824 definitely be less than the actual mode mask. */
2825 && ((CONST_INT_P (size)
2826 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2827 <= (GET_MODE_MASK (mode) >> 1)))
2828 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2829 {
2830 struct expand_operand ops[6];
2831 unsigned int nops;
2832
2833 nops = insn_data[(int) code].n_generator_args;
2834 gcc_assert (nops == 4 || nops == 6);
2835
2836 create_fixed_operand (&ops[0], object);
2837 /* The check above guarantees that this size conversion is valid. */
2838 create_convert_operand_to (&ops[1], size, mode, true);
2839 create_convert_operand_from (&ops[2], val, byte_mode, true);
2840 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2841 if (nops == 6)
2842 {
2843 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2844 create_integer_operand (&ops[5], expected_size);
2845 }
2846 if (maybe_expand_insn (code, nops, ops))
2847 return true;
2848 }
2849 }
2850
2851 return false;
2852 }
2853
2854 \f
2855 /* Write to one of the components of the complex value CPLX. Write VAL to
2856 the real part if IMAG_P is false, and the imaginary part if its true. */
2857
2858 static void
2859 write_complex_part (rtx cplx, rtx val, bool imag_p)
2860 {
2861 enum machine_mode cmode;
2862 enum machine_mode imode;
2863 unsigned ibitsize;
2864
2865 if (GET_CODE (cplx) == CONCAT)
2866 {
2867 emit_move_insn (XEXP (cplx, imag_p), val);
2868 return;
2869 }
2870
2871 cmode = GET_MODE (cplx);
2872 imode = GET_MODE_INNER (cmode);
2873 ibitsize = GET_MODE_BITSIZE (imode);
2874
2875 /* For MEMs simplify_gen_subreg may generate an invalid new address
2876 because, e.g., the original address is considered mode-dependent
2877 by the target, which restricts simplify_subreg from invoking
2878 adjust_address_nv. Instead of preparing fallback support for an
2879 invalid address, we call adjust_address_nv directly. */
2880 if (MEM_P (cplx))
2881 {
2882 emit_move_insn (adjust_address_nv (cplx, imode,
2883 imag_p ? GET_MODE_SIZE (imode) : 0),
2884 val);
2885 return;
2886 }
2887
2888 /* If the sub-object is at least word sized, then we know that subregging
2889 will work. This special case is important, since store_bit_field
2890 wants to operate on integer modes, and there's rarely an OImode to
2891 correspond to TCmode. */
2892 if (ibitsize >= BITS_PER_WORD
2893 /* For hard regs we have exact predicates. Assume we can split
2894 the original object if it spans an even number of hard regs.
2895 This special case is important for SCmode on 64-bit platforms
2896 where the natural size of floating-point regs is 32-bit. */
2897 || (REG_P (cplx)
2898 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2899 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2900 {
2901 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2902 imag_p ? GET_MODE_SIZE (imode) : 0);
2903 if (part)
2904 {
2905 emit_move_insn (part, val);
2906 return;
2907 }
2908 else
2909 /* simplify_gen_subreg may fail for sub-word MEMs. */
2910 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2911 }
2912
2913 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2914 }
2915
2916 /* Extract one of the components of the complex value CPLX. Extract the
2917 real part if IMAG_P is false, and the imaginary part if it's true. */
2918
2919 static rtx
2920 read_complex_part (rtx cplx, bool imag_p)
2921 {
2922 enum machine_mode cmode, imode;
2923 unsigned ibitsize;
2924
2925 if (GET_CODE (cplx) == CONCAT)
2926 return XEXP (cplx, imag_p);
2927
2928 cmode = GET_MODE (cplx);
2929 imode = GET_MODE_INNER (cmode);
2930 ibitsize = GET_MODE_BITSIZE (imode);
2931
2932 /* Special case reads from complex constants that got spilled to memory. */
2933 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2934 {
2935 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2936 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2937 {
2938 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2939 if (CONSTANT_CLASS_P (part))
2940 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2941 }
2942 }
2943
2944 /* For MEMs simplify_gen_subreg may generate an invalid new address
2945 because, e.g., the original address is considered mode-dependent
2946 by the target, which restricts simplify_subreg from invoking
2947 adjust_address_nv. Instead of preparing fallback support for an
2948 invalid address, we call adjust_address_nv directly. */
2949 if (MEM_P (cplx))
2950 return adjust_address_nv (cplx, imode,
2951 imag_p ? GET_MODE_SIZE (imode) : 0);
2952
2953 /* If the sub-object is at least word sized, then we know that subregging
2954 will work. This special case is important, since extract_bit_field
2955 wants to operate on integer modes, and there's rarely an OImode to
2956 correspond to TCmode. */
2957 if (ibitsize >= BITS_PER_WORD
2958 /* For hard regs we have exact predicates. Assume we can split
2959 the original object if it spans an even number of hard regs.
2960 This special case is important for SCmode on 64-bit platforms
2961 where the natural size of floating-point regs is 32-bit. */
2962 || (REG_P (cplx)
2963 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2964 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2965 {
2966 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2967 imag_p ? GET_MODE_SIZE (imode) : 0);
2968 if (ret)
2969 return ret;
2970 else
2971 /* simplify_gen_subreg may fail for sub-word MEMs. */
2972 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2973 }
2974
2975 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2976 true, false, NULL_RTX, imode, imode);
2977 }
2978 \f
2979 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2980 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2981 represented in NEW_MODE. If FORCE is true, this will never happen, as
2982 we'll force-create a SUBREG if needed. */
2983
2984 static rtx
2985 emit_move_change_mode (enum machine_mode new_mode,
2986 enum machine_mode old_mode, rtx x, bool force)
2987 {
2988 rtx ret;
2989
2990 if (push_operand (x, GET_MODE (x)))
2991 {
2992 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2993 MEM_COPY_ATTRIBUTES (ret, x);
2994 }
2995 else if (MEM_P (x))
2996 {
2997 /* We don't have to worry about changing the address since the
2998 size in bytes is supposed to be the same. */
2999 if (reload_in_progress)
3000 {
3001 /* Copy the MEM to change the mode and move any
3002 substitutions from the old MEM to the new one. */
3003 ret = adjust_address_nv (x, new_mode, 0);
3004 copy_replacements (x, ret);
3005 }
3006 else
3007 ret = adjust_address (x, new_mode, 0);
3008 }
3009 else
3010 {
3011 /* Note that we do want simplify_subreg's behavior of validating
3012 that the new mode is ok for a hard register. If we were to use
3013 simplify_gen_subreg, we would create the subreg, but would
3014 probably run into the target not being able to implement it. */
3015 /* Except, of course, when FORCE is true, when this is exactly what
3016 we want. Which is needed for CCmodes on some targets. */
3017 if (force)
3018 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3019 else
3020 ret = simplify_subreg (new_mode, x, old_mode, 0);
3021 }
3022
3023 return ret;
3024 }
3025
3026 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3027 an integer mode of the same size as MODE. Returns the instruction
3028 emitted, or NULL if such a move could not be generated. */
3029
3030 static rtx
3031 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3032 {
3033 enum machine_mode imode;
3034 enum insn_code code;
3035
3036 /* There must exist a mode of the exact size we require. */
3037 imode = int_mode_for_mode (mode);
3038 if (imode == BLKmode)
3039 return NULL_RTX;
3040
3041 /* The target must support moves in this mode. */
3042 code = optab_handler (mov_optab, imode);
3043 if (code == CODE_FOR_nothing)
3044 return NULL_RTX;
3045
3046 x = emit_move_change_mode (imode, mode, x, force);
3047 if (x == NULL_RTX)
3048 return NULL_RTX;
3049 y = emit_move_change_mode (imode, mode, y, force);
3050 if (y == NULL_RTX)
3051 return NULL_RTX;
3052 return emit_insn (GEN_FCN (code) (x, y));
3053 }
3054
3055 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3056 Return an equivalent MEM that does not use an auto-increment. */
3057
3058 static rtx
3059 emit_move_resolve_push (enum machine_mode mode, rtx x)
3060 {
3061 enum rtx_code code = GET_CODE (XEXP (x, 0));
3062 HOST_WIDE_INT adjust;
3063 rtx temp;
3064
3065 adjust = GET_MODE_SIZE (mode);
3066 #ifdef PUSH_ROUNDING
3067 adjust = PUSH_ROUNDING (adjust);
3068 #endif
3069 if (code == PRE_DEC || code == POST_DEC)
3070 adjust = -adjust;
3071 else if (code == PRE_MODIFY || code == POST_MODIFY)
3072 {
3073 rtx expr = XEXP (XEXP (x, 0), 1);
3074 HOST_WIDE_INT val;
3075
3076 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3077 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3078 val = INTVAL (XEXP (expr, 1));
3079 if (GET_CODE (expr) == MINUS)
3080 val = -val;
3081 gcc_assert (adjust == val || adjust == -val);
3082 adjust = val;
3083 }
3084
3085 /* Do not use anti_adjust_stack, since we don't want to update
3086 stack_pointer_delta. */
3087 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3088 GEN_INT (adjust), stack_pointer_rtx,
3089 0, OPTAB_LIB_WIDEN);
3090 if (temp != stack_pointer_rtx)
3091 emit_move_insn (stack_pointer_rtx, temp);
3092
3093 switch (code)
3094 {
3095 case PRE_INC:
3096 case PRE_DEC:
3097 case PRE_MODIFY:
3098 temp = stack_pointer_rtx;
3099 break;
3100 case POST_INC:
3101 case POST_DEC:
3102 case POST_MODIFY:
3103 temp = plus_constant (stack_pointer_rtx, -adjust);
3104 break;
3105 default:
3106 gcc_unreachable ();
3107 }
3108
3109 return replace_equiv_address (x, temp);
3110 }
3111
3112 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3113 X is known to satisfy push_operand, and MODE is known to be complex.
3114 Returns the last instruction emitted. */
3115
3116 rtx
3117 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3118 {
3119 enum machine_mode submode = GET_MODE_INNER (mode);
3120 bool imag_first;
3121
3122 #ifdef PUSH_ROUNDING
3123 unsigned int submodesize = GET_MODE_SIZE (submode);
3124
3125 /* In case we output to the stack, but the size is smaller than the
3126 machine can push exactly, we need to use move instructions. */
3127 if (PUSH_ROUNDING (submodesize) != submodesize)
3128 {
3129 x = emit_move_resolve_push (mode, x);
3130 return emit_move_insn (x, y);
3131 }
3132 #endif
3133
3134 /* Note that the real part always precedes the imag part in memory
3135 regardless of machine's endianness. */
3136 switch (GET_CODE (XEXP (x, 0)))
3137 {
3138 case PRE_DEC:
3139 case POST_DEC:
3140 imag_first = true;
3141 break;
3142 case PRE_INC:
3143 case POST_INC:
3144 imag_first = false;
3145 break;
3146 default:
3147 gcc_unreachable ();
3148 }
3149
3150 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3151 read_complex_part (y, imag_first));
3152 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3153 read_complex_part (y, !imag_first));
3154 }
3155
3156 /* A subroutine of emit_move_complex. Perform the move from Y to X
3157 via two moves of the parts. Returns the last instruction emitted. */
3158
3159 rtx
3160 emit_move_complex_parts (rtx x, rtx y)
3161 {
3162 /* Show the output dies here. This is necessary for SUBREGs
3163 of pseudos since we cannot track their lifetimes correctly;
3164 hard regs shouldn't appear here except as return values. */
3165 if (!reload_completed && !reload_in_progress
3166 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3167 emit_clobber (x);
3168
3169 write_complex_part (x, read_complex_part (y, false), false);
3170 write_complex_part (x, read_complex_part (y, true), true);
3171
3172 return get_last_insn ();
3173 }
3174
3175 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3176 MODE is known to be complex. Returns the last instruction emitted. */
3177
3178 static rtx
3179 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3180 {
3181 bool try_int;
3182
3183 /* Need to take special care for pushes, to maintain proper ordering
3184 of the data, and possibly extra padding. */
3185 if (push_operand (x, mode))
3186 return emit_move_complex_push (mode, x, y);
3187
3188 /* See if we can coerce the target into moving both values at once. */
3189
3190 /* Move floating point as parts. */
3191 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3192 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3193 try_int = false;
3194 /* Not possible if the values are inherently not adjacent. */
3195 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3196 try_int = false;
3197 /* Is possible if both are registers (or subregs of registers). */
3198 else if (register_operand (x, mode) && register_operand (y, mode))
3199 try_int = true;
3200 /* If one of the operands is a memory, and alignment constraints
3201 are friendly enough, we may be able to do combined memory operations.
3202 We do not attempt this if Y is a constant because that combination is
3203 usually better with the by-parts thing below. */
3204 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3205 && (!STRICT_ALIGNMENT
3206 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3207 try_int = true;
3208 else
3209 try_int = false;
3210
3211 if (try_int)
3212 {
3213 rtx ret;
3214
3215 /* For memory to memory moves, optimal behavior can be had with the
3216 existing block move logic. */
3217 if (MEM_P (x) && MEM_P (y))
3218 {
3219 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3220 BLOCK_OP_NO_LIBCALL);
3221 return get_last_insn ();
3222 }
3223
3224 ret = emit_move_via_integer (mode, x, y, true);
3225 if (ret)
3226 return ret;
3227 }
3228
3229 return emit_move_complex_parts (x, y);
3230 }
3231
3232 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3233 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3234
3235 static rtx
3236 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3237 {
3238 rtx ret;
3239
3240 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3241 if (mode != CCmode)
3242 {
3243 enum insn_code code = optab_handler (mov_optab, CCmode);
3244 if (code != CODE_FOR_nothing)
3245 {
3246 x = emit_move_change_mode (CCmode, mode, x, true);
3247 y = emit_move_change_mode (CCmode, mode, y, true);
3248 return emit_insn (GEN_FCN (code) (x, y));
3249 }
3250 }
3251
3252 /* Otherwise, find the MODE_INT mode of the same width. */
3253 ret = emit_move_via_integer (mode, x, y, false);
3254 gcc_assert (ret != NULL);
3255 return ret;
3256 }
3257
3258 /* Return true if word I of OP lies entirely in the
3259 undefined bits of a paradoxical subreg. */
3260
3261 static bool
3262 undefined_operand_subword_p (const_rtx op, int i)
3263 {
3264 enum machine_mode innermode, innermostmode;
3265 int offset;
3266 if (GET_CODE (op) != SUBREG)
3267 return false;
3268 innermode = GET_MODE (op);
3269 innermostmode = GET_MODE (SUBREG_REG (op));
3270 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3271 /* The SUBREG_BYTE represents offset, as if the value were stored in
3272 memory, except for a paradoxical subreg where we define
3273 SUBREG_BYTE to be 0; undo this exception as in
3274 simplify_subreg. */
3275 if (SUBREG_BYTE (op) == 0
3276 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3277 {
3278 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3279 if (WORDS_BIG_ENDIAN)
3280 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3281 if (BYTES_BIG_ENDIAN)
3282 offset += difference % UNITS_PER_WORD;
3283 }
3284 if (offset >= GET_MODE_SIZE (innermostmode)
3285 || offset <= -GET_MODE_SIZE (word_mode))
3286 return true;
3287 return false;
3288 }
3289
3290 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3291 MODE is any multi-word or full-word mode that lacks a move_insn
3292 pattern. Note that you will get better code if you define such
3293 patterns, even if they must turn into multiple assembler instructions. */
3294
3295 static rtx
3296 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3297 {
3298 rtx last_insn = 0;
3299 rtx seq, inner;
3300 bool need_clobber;
3301 int i;
3302
3303 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3304
3305 /* If X is a push on the stack, do the push now and replace
3306 X with a reference to the stack pointer. */
3307 if (push_operand (x, mode))
3308 x = emit_move_resolve_push (mode, x);
3309
3310 /* If we are in reload, see if either operand is a MEM whose address
3311 is scheduled for replacement. */
3312 if (reload_in_progress && MEM_P (x)
3313 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3314 x = replace_equiv_address_nv (x, inner);
3315 if (reload_in_progress && MEM_P (y)
3316 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3317 y = replace_equiv_address_nv (y, inner);
3318
3319 start_sequence ();
3320
3321 need_clobber = false;
3322 for (i = 0;
3323 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3324 i++)
3325 {
3326 rtx xpart = operand_subword (x, i, 1, mode);
3327 rtx ypart;
3328
3329 /* Do not generate code for a move if it would come entirely
3330 from the undefined bits of a paradoxical subreg. */
3331 if (undefined_operand_subword_p (y, i))
3332 continue;
3333
3334 ypart = operand_subword (y, i, 1, mode);
3335
3336 /* If we can't get a part of Y, put Y into memory if it is a
3337 constant. Otherwise, force it into a register. Then we must
3338 be able to get a part of Y. */
3339 if (ypart == 0 && CONSTANT_P (y))
3340 {
3341 y = use_anchored_address (force_const_mem (mode, y));
3342 ypart = operand_subword (y, i, 1, mode);
3343 }
3344 else if (ypart == 0)
3345 ypart = operand_subword_force (y, i, mode);
3346
3347 gcc_assert (xpart && ypart);
3348
3349 need_clobber |= (GET_CODE (xpart) == SUBREG);
3350
3351 last_insn = emit_move_insn (xpart, ypart);
3352 }
3353
3354 seq = get_insns ();
3355 end_sequence ();
3356
3357 /* Show the output dies here. This is necessary for SUBREGs
3358 of pseudos since we cannot track their lifetimes correctly;
3359 hard regs shouldn't appear here except as return values.
3360 We never want to emit such a clobber after reload. */
3361 if (x != y
3362 && ! (reload_in_progress || reload_completed)
3363 && need_clobber != 0)
3364 emit_clobber (x);
3365
3366 emit_insn (seq);
3367
3368 return last_insn;
3369 }
3370
3371 /* Low level part of emit_move_insn.
3372 Called just like emit_move_insn, but assumes X and Y
3373 are basically valid. */
3374
3375 rtx
3376 emit_move_insn_1 (rtx x, rtx y)
3377 {
3378 enum machine_mode mode = GET_MODE (x);
3379 enum insn_code code;
3380
3381 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3382
3383 code = optab_handler (mov_optab, mode);
3384 if (code != CODE_FOR_nothing)
3385 return emit_insn (GEN_FCN (code) (x, y));
3386
3387 /* Expand complex moves by moving real part and imag part. */
3388 if (COMPLEX_MODE_P (mode))
3389 return emit_move_complex (mode, x, y);
3390
3391 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3392 || ALL_FIXED_POINT_MODE_P (mode))
3393 {
3394 rtx result = emit_move_via_integer (mode, x, y, true);
3395
3396 /* If we can't find an integer mode, use multi words. */
3397 if (result)
3398 return result;
3399 else
3400 return emit_move_multi_word (mode, x, y);
3401 }
3402
3403 if (GET_MODE_CLASS (mode) == MODE_CC)
3404 return emit_move_ccmode (mode, x, y);
3405
3406 /* Try using a move pattern for the corresponding integer mode. This is
3407 only safe when simplify_subreg can convert MODE constants into integer
3408 constants. At present, it can only do this reliably if the value
3409 fits within a HOST_WIDE_INT. */
3410 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3411 {
3412 rtx ret = emit_move_via_integer (mode, x, y, false);
3413 if (ret)
3414 return ret;
3415 }
3416
3417 return emit_move_multi_word (mode, x, y);
3418 }
3419
3420 /* Generate code to copy Y into X.
3421 Both Y and X must have the same mode, except that
3422 Y can be a constant with VOIDmode.
3423 This mode cannot be BLKmode; use emit_block_move for that.
3424
3425 Return the last instruction emitted. */
3426
3427 rtx
3428 emit_move_insn (rtx x, rtx y)
3429 {
3430 enum machine_mode mode = GET_MODE (x);
3431 rtx y_cst = NULL_RTX;
3432 rtx last_insn, set;
3433
3434 gcc_assert (mode != BLKmode
3435 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3436
3437 if (CONSTANT_P (y))
3438 {
3439 if (optimize
3440 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3441 && (last_insn = compress_float_constant (x, y)))
3442 return last_insn;
3443
3444 y_cst = y;
3445
3446 if (!targetm.legitimate_constant_p (mode, y))
3447 {
3448 y = force_const_mem (mode, y);
3449
3450 /* If the target's cannot_force_const_mem prevented the spill,
3451 assume that the target's move expanders will also take care
3452 of the non-legitimate constant. */
3453 if (!y)
3454 y = y_cst;
3455 else
3456 y = use_anchored_address (y);
3457 }
3458 }
3459
3460 /* If X or Y are memory references, verify that their addresses are valid
3461 for the machine. */
3462 if (MEM_P (x)
3463 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3464 MEM_ADDR_SPACE (x))
3465 && ! push_operand (x, GET_MODE (x))))
3466 x = validize_mem (x);
3467
3468 if (MEM_P (y)
3469 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3470 MEM_ADDR_SPACE (y)))
3471 y = validize_mem (y);
3472
3473 gcc_assert (mode != BLKmode);
3474
3475 last_insn = emit_move_insn_1 (x, y);
3476
3477 if (y_cst && REG_P (x)
3478 && (set = single_set (last_insn)) != NULL_RTX
3479 && SET_DEST (set) == x
3480 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3481 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3482
3483 return last_insn;
3484 }
3485
3486 /* If Y is representable exactly in a narrower mode, and the target can
3487 perform the extension directly from constant or memory, then emit the
3488 move as an extension. */
3489
3490 static rtx
3491 compress_float_constant (rtx x, rtx y)
3492 {
3493 enum machine_mode dstmode = GET_MODE (x);
3494 enum machine_mode orig_srcmode = GET_MODE (y);
3495 enum machine_mode srcmode;
3496 REAL_VALUE_TYPE r;
3497 int oldcost, newcost;
3498 bool speed = optimize_insn_for_speed_p ();
3499
3500 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3501
3502 if (targetm.legitimate_constant_p (dstmode, y))
3503 oldcost = set_src_cost (y, speed);
3504 else
3505 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3506
3507 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3508 srcmode != orig_srcmode;
3509 srcmode = GET_MODE_WIDER_MODE (srcmode))
3510 {
3511 enum insn_code ic;
3512 rtx trunc_y, last_insn;
3513
3514 /* Skip if the target can't extend this way. */
3515 ic = can_extend_p (dstmode, srcmode, 0);
3516 if (ic == CODE_FOR_nothing)
3517 continue;
3518
3519 /* Skip if the narrowed value isn't exact. */
3520 if (! exact_real_truncate (srcmode, &r))
3521 continue;
3522
3523 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3524
3525 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3526 {
3527 /* Skip if the target needs extra instructions to perform
3528 the extension. */
3529 if (!insn_operand_matches (ic, 1, trunc_y))
3530 continue;
3531 /* This is valid, but may not be cheaper than the original. */
3532 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3533 speed);
3534 if (oldcost < newcost)
3535 continue;
3536 }
3537 else if (float_extend_from_mem[dstmode][srcmode])
3538 {
3539 trunc_y = force_const_mem (srcmode, trunc_y);
3540 /* This is valid, but may not be cheaper than the original. */
3541 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3542 speed);
3543 if (oldcost < newcost)
3544 continue;
3545 trunc_y = validize_mem (trunc_y);
3546 }
3547 else
3548 continue;
3549
3550 /* For CSE's benefit, force the compressed constant pool entry
3551 into a new pseudo. This constant may be used in different modes,
3552 and if not, combine will put things back together for us. */
3553 trunc_y = force_reg (srcmode, trunc_y);
3554 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3555 last_insn = get_last_insn ();
3556
3557 if (REG_P (x))
3558 set_unique_reg_note (last_insn, REG_EQUAL, y);
3559
3560 return last_insn;
3561 }
3562
3563 return NULL_RTX;
3564 }
3565 \f
3566 /* Pushing data onto the stack. */
3567
3568 /* Push a block of length SIZE (perhaps variable)
3569 and return an rtx to address the beginning of the block.
3570 The value may be virtual_outgoing_args_rtx.
3571
3572 EXTRA is the number of bytes of padding to push in addition to SIZE.
3573 BELOW nonzero means this padding comes at low addresses;
3574 otherwise, the padding comes at high addresses. */
3575
3576 rtx
3577 push_block (rtx size, int extra, int below)
3578 {
3579 rtx temp;
3580
3581 size = convert_modes (Pmode, ptr_mode, size, 1);
3582 if (CONSTANT_P (size))
3583 anti_adjust_stack (plus_constant (size, extra));
3584 else if (REG_P (size) && extra == 0)
3585 anti_adjust_stack (size);
3586 else
3587 {
3588 temp = copy_to_mode_reg (Pmode, size);
3589 if (extra != 0)
3590 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3591 temp, 0, OPTAB_LIB_WIDEN);
3592 anti_adjust_stack (temp);
3593 }
3594
3595 #ifndef STACK_GROWS_DOWNWARD
3596 if (0)
3597 #else
3598 if (1)
3599 #endif
3600 {
3601 temp = virtual_outgoing_args_rtx;
3602 if (extra != 0 && below)
3603 temp = plus_constant (temp, extra);
3604 }
3605 else
3606 {
3607 if (CONST_INT_P (size))
3608 temp = plus_constant (virtual_outgoing_args_rtx,
3609 -INTVAL (size) - (below ? 0 : extra));
3610 else if (extra != 0 && !below)
3611 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3612 negate_rtx (Pmode, plus_constant (size, extra)));
3613 else
3614 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3615 negate_rtx (Pmode, size));
3616 }
3617
3618 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3619 }
3620
3621 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3622
3623 static rtx
3624 mem_autoinc_base (rtx mem)
3625 {
3626 if (MEM_P (mem))
3627 {
3628 rtx addr = XEXP (mem, 0);
3629 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3630 return XEXP (addr, 0);
3631 }
3632 return NULL;
3633 }
3634
3635 /* A utility routine used here, in reload, and in try_split. The insns
3636 after PREV up to and including LAST are known to adjust the stack,
3637 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3638 placing notes as appropriate. PREV may be NULL, indicating the
3639 entire insn sequence prior to LAST should be scanned.
3640
3641 The set of allowed stack pointer modifications is small:
3642 (1) One or more auto-inc style memory references (aka pushes),
3643 (2) One or more addition/subtraction with the SP as destination,
3644 (3) A single move insn with the SP as destination,
3645 (4) A call_pop insn,
3646 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3647
3648 Insns in the sequence that do not modify the SP are ignored,
3649 except for noreturn calls.
3650
3651 The return value is the amount of adjustment that can be trivially
3652 verified, via immediate operand or auto-inc. If the adjustment
3653 cannot be trivially extracted, the return value is INT_MIN. */
3654
3655 HOST_WIDE_INT
3656 find_args_size_adjust (rtx insn)
3657 {
3658 rtx dest, set, pat;
3659 int i;
3660
3661 pat = PATTERN (insn);
3662 set = NULL;
3663
3664 /* Look for a call_pop pattern. */
3665 if (CALL_P (insn))
3666 {
3667 /* We have to allow non-call_pop patterns for the case
3668 of emit_single_push_insn of a TLS address. */
3669 if (GET_CODE (pat) != PARALLEL)
3670 return 0;
3671
3672 /* All call_pop have a stack pointer adjust in the parallel.
3673 The call itself is always first, and the stack adjust is
3674 usually last, so search from the end. */
3675 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3676 {
3677 set = XVECEXP (pat, 0, i);
3678 if (GET_CODE (set) != SET)
3679 continue;
3680 dest = SET_DEST (set);
3681 if (dest == stack_pointer_rtx)
3682 break;
3683 }
3684 /* We'd better have found the stack pointer adjust. */
3685 if (i == 0)
3686 return 0;
3687 /* Fall through to process the extracted SET and DEST
3688 as if it was a standalone insn. */
3689 }
3690 else if (GET_CODE (pat) == SET)
3691 set = pat;
3692 else if ((set = single_set (insn)) != NULL)
3693 ;
3694 else if (GET_CODE (pat) == PARALLEL)
3695 {
3696 /* ??? Some older ports use a parallel with a stack adjust
3697 and a store for a PUSH_ROUNDING pattern, rather than a
3698 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3699 /* ??? See h8300 and m68k, pushqi1. */
3700 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3701 {
3702 set = XVECEXP (pat, 0, i);
3703 if (GET_CODE (set) != SET)
3704 continue;
3705 dest = SET_DEST (set);
3706 if (dest == stack_pointer_rtx)
3707 break;
3708
3709 /* We do not expect an auto-inc of the sp in the parallel. */
3710 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3711 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3712 != stack_pointer_rtx);
3713 }
3714 if (i < 0)
3715 return 0;
3716 }
3717 else
3718 return 0;
3719
3720 dest = SET_DEST (set);
3721
3722 /* Look for direct modifications of the stack pointer. */
3723 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3724 {
3725 /* Look for a trivial adjustment, otherwise assume nothing. */
3726 /* Note that the SPU restore_stack_block pattern refers to
3727 the stack pointer in V4SImode. Consider that non-trivial. */
3728 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3729 && GET_CODE (SET_SRC (set)) == PLUS
3730 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3731 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3732 return INTVAL (XEXP (SET_SRC (set), 1));
3733 /* ??? Reload can generate no-op moves, which will be cleaned
3734 up later. Recognize it and continue searching. */
3735 else if (rtx_equal_p (dest, SET_SRC (set)))
3736 return 0;
3737 else
3738 return HOST_WIDE_INT_MIN;
3739 }
3740 else
3741 {
3742 rtx mem, addr;
3743
3744 /* Otherwise only think about autoinc patterns. */
3745 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3746 {
3747 mem = dest;
3748 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3749 != stack_pointer_rtx);
3750 }
3751 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3752 mem = SET_SRC (set);
3753 else
3754 return 0;
3755
3756 addr = XEXP (mem, 0);
3757 switch (GET_CODE (addr))
3758 {
3759 case PRE_INC:
3760 case POST_INC:
3761 return GET_MODE_SIZE (GET_MODE (mem));
3762 case PRE_DEC:
3763 case POST_DEC:
3764 return -GET_MODE_SIZE (GET_MODE (mem));
3765 case PRE_MODIFY:
3766 case POST_MODIFY:
3767 addr = XEXP (addr, 1);
3768 gcc_assert (GET_CODE (addr) == PLUS);
3769 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3770 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3771 return INTVAL (XEXP (addr, 1));
3772 default:
3773 gcc_unreachable ();
3774 }
3775 }
3776 }
3777
3778 int
3779 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3780 {
3781 int args_size = end_args_size;
3782 bool saw_unknown = false;
3783 rtx insn;
3784
3785 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3786 {
3787 HOST_WIDE_INT this_delta;
3788
3789 if (!NONDEBUG_INSN_P (insn))
3790 continue;
3791
3792 this_delta = find_args_size_adjust (insn);
3793 if (this_delta == 0)
3794 {
3795 if (!CALL_P (insn)
3796 || ACCUMULATE_OUTGOING_ARGS
3797 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3798 continue;
3799 }
3800
3801 gcc_assert (!saw_unknown);
3802 if (this_delta == HOST_WIDE_INT_MIN)
3803 saw_unknown = true;
3804
3805 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3806 #ifdef STACK_GROWS_DOWNWARD
3807 this_delta = -this_delta;
3808 #endif
3809 args_size -= this_delta;
3810 }
3811
3812 return saw_unknown ? INT_MIN : args_size;
3813 }
3814
3815 #ifdef PUSH_ROUNDING
3816 /* Emit single push insn. */
3817
3818 static void
3819 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3820 {
3821 rtx dest_addr;
3822 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3823 rtx dest;
3824 enum insn_code icode;
3825
3826 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3827 /* If there is push pattern, use it. Otherwise try old way of throwing
3828 MEM representing push operation to move expander. */
3829 icode = optab_handler (push_optab, mode);
3830 if (icode != CODE_FOR_nothing)
3831 {
3832 struct expand_operand ops[1];
3833
3834 create_input_operand (&ops[0], x, mode);
3835 if (maybe_expand_insn (icode, 1, ops))
3836 return;
3837 }
3838 if (GET_MODE_SIZE (mode) == rounded_size)
3839 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3840 /* If we are to pad downward, adjust the stack pointer first and
3841 then store X into the stack location using an offset. This is
3842 because emit_move_insn does not know how to pad; it does not have
3843 access to type. */
3844 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3845 {
3846 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3847 HOST_WIDE_INT offset;
3848
3849 emit_move_insn (stack_pointer_rtx,
3850 expand_binop (Pmode,
3851 #ifdef STACK_GROWS_DOWNWARD
3852 sub_optab,
3853 #else
3854 add_optab,
3855 #endif
3856 stack_pointer_rtx,
3857 GEN_INT (rounded_size),
3858 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3859
3860 offset = (HOST_WIDE_INT) padding_size;
3861 #ifdef STACK_GROWS_DOWNWARD
3862 if (STACK_PUSH_CODE == POST_DEC)
3863 /* We have already decremented the stack pointer, so get the
3864 previous value. */
3865 offset += (HOST_WIDE_INT) rounded_size;
3866 #else
3867 if (STACK_PUSH_CODE == POST_INC)
3868 /* We have already incremented the stack pointer, so get the
3869 previous value. */
3870 offset -= (HOST_WIDE_INT) rounded_size;
3871 #endif
3872 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3873 }
3874 else
3875 {
3876 #ifdef STACK_GROWS_DOWNWARD
3877 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3878 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3879 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3880 #else
3881 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3882 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3883 GEN_INT (rounded_size));
3884 #endif
3885 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3886 }
3887
3888 dest = gen_rtx_MEM (mode, dest_addr);
3889
3890 if (type != 0)
3891 {
3892 set_mem_attributes (dest, type, 1);
3893
3894 if (flag_optimize_sibling_calls)
3895 /* Function incoming arguments may overlap with sibling call
3896 outgoing arguments and we cannot allow reordering of reads
3897 from function arguments with stores to outgoing arguments
3898 of sibling calls. */
3899 set_mem_alias_set (dest, 0);
3900 }
3901 emit_move_insn (dest, x);
3902 }
3903
3904 /* Emit and annotate a single push insn. */
3905
3906 static void
3907 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3908 {
3909 int delta, old_delta = stack_pointer_delta;
3910 rtx prev = get_last_insn ();
3911 rtx last;
3912
3913 emit_single_push_insn_1 (mode, x, type);
3914
3915 last = get_last_insn ();
3916
3917 /* Notice the common case where we emitted exactly one insn. */
3918 if (PREV_INSN (last) == prev)
3919 {
3920 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3921 return;
3922 }
3923
3924 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3925 gcc_assert (delta == INT_MIN || delta == old_delta);
3926 }
3927 #endif
3928
3929 /* Generate code to push X onto the stack, assuming it has mode MODE and
3930 type TYPE.
3931 MODE is redundant except when X is a CONST_INT (since they don't
3932 carry mode info).
3933 SIZE is an rtx for the size of data to be copied (in bytes),
3934 needed only if X is BLKmode.
3935
3936 ALIGN (in bits) is maximum alignment we can assume.
3937
3938 If PARTIAL and REG are both nonzero, then copy that many of the first
3939 bytes of X into registers starting with REG, and push the rest of X.
3940 The amount of space pushed is decreased by PARTIAL bytes.
3941 REG must be a hard register in this case.
3942 If REG is zero but PARTIAL is not, take any all others actions for an
3943 argument partially in registers, but do not actually load any
3944 registers.
3945
3946 EXTRA is the amount in bytes of extra space to leave next to this arg.
3947 This is ignored if an argument block has already been allocated.
3948
3949 On a machine that lacks real push insns, ARGS_ADDR is the address of
3950 the bottom of the argument block for this call. We use indexing off there
3951 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3952 argument block has not been preallocated.
3953
3954 ARGS_SO_FAR is the size of args previously pushed for this call.
3955
3956 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3957 for arguments passed in registers. If nonzero, it will be the number
3958 of bytes required. */
3959
3960 void
3961 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3962 unsigned int align, int partial, rtx reg, int extra,
3963 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3964 rtx alignment_pad)
3965 {
3966 rtx xinner;
3967 enum direction stack_direction
3968 #ifdef STACK_GROWS_DOWNWARD
3969 = downward;
3970 #else
3971 = upward;
3972 #endif
3973
3974 /* Decide where to pad the argument: `downward' for below,
3975 `upward' for above, or `none' for don't pad it.
3976 Default is below for small data on big-endian machines; else above. */
3977 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3978
3979 /* Invert direction if stack is post-decrement.
3980 FIXME: why? */
3981 if (STACK_PUSH_CODE == POST_DEC)
3982 if (where_pad != none)
3983 where_pad = (where_pad == downward ? upward : downward);
3984
3985 xinner = x;
3986
3987 if (mode == BLKmode
3988 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3989 {
3990 /* Copy a block into the stack, entirely or partially. */
3991
3992 rtx temp;
3993 int used;
3994 int offset;
3995 int skip;
3996
3997 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3998 used = partial - offset;
3999
4000 if (mode != BLKmode)
4001 {
4002 /* A value is to be stored in an insufficiently aligned
4003 stack slot; copy via a suitably aligned slot if
4004 necessary. */
4005 size = GEN_INT (GET_MODE_SIZE (mode));
4006 if (!MEM_P (xinner))
4007 {
4008 temp = assign_temp (type, 0, 1, 1);
4009 emit_move_insn (temp, xinner);
4010 xinner = temp;
4011 }
4012 }
4013
4014 gcc_assert (size);
4015
4016 /* USED is now the # of bytes we need not copy to the stack
4017 because registers will take care of them. */
4018
4019 if (partial != 0)
4020 xinner = adjust_address (xinner, BLKmode, used);
4021
4022 /* If the partial register-part of the arg counts in its stack size,
4023 skip the part of stack space corresponding to the registers.
4024 Otherwise, start copying to the beginning of the stack space,
4025 by setting SKIP to 0. */
4026 skip = (reg_parm_stack_space == 0) ? 0 : used;
4027
4028 #ifdef PUSH_ROUNDING
4029 /* Do it with several push insns if that doesn't take lots of insns
4030 and if there is no difficulty with push insns that skip bytes
4031 on the stack for alignment purposes. */
4032 if (args_addr == 0
4033 && PUSH_ARGS
4034 && CONST_INT_P (size)
4035 && skip == 0
4036 && MEM_ALIGN (xinner) >= align
4037 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
4038 /* Here we avoid the case of a structure whose weak alignment
4039 forces many pushes of a small amount of data,
4040 and such small pushes do rounding that causes trouble. */
4041 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4042 || align >= BIGGEST_ALIGNMENT
4043 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4044 == (align / BITS_PER_UNIT)))
4045 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4046 {
4047 /* Push padding now if padding above and stack grows down,
4048 or if padding below and stack grows up.
4049 But if space already allocated, this has already been done. */
4050 if (extra && args_addr == 0
4051 && where_pad != none && where_pad != stack_direction)
4052 anti_adjust_stack (GEN_INT (extra));
4053
4054 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4055 }
4056 else
4057 #endif /* PUSH_ROUNDING */
4058 {
4059 rtx target;
4060
4061 /* Otherwise make space on the stack and copy the data
4062 to the address of that space. */
4063
4064 /* Deduct words put into registers from the size we must copy. */
4065 if (partial != 0)
4066 {
4067 if (CONST_INT_P (size))
4068 size = GEN_INT (INTVAL (size) - used);
4069 else
4070 size = expand_binop (GET_MODE (size), sub_optab, size,
4071 GEN_INT (used), NULL_RTX, 0,
4072 OPTAB_LIB_WIDEN);
4073 }
4074
4075 /* Get the address of the stack space.
4076 In this case, we do not deal with EXTRA separately.
4077 A single stack adjust will do. */
4078 if (! args_addr)
4079 {
4080 temp = push_block (size, extra, where_pad == downward);
4081 extra = 0;
4082 }
4083 else if (CONST_INT_P (args_so_far))
4084 temp = memory_address (BLKmode,
4085 plus_constant (args_addr,
4086 skip + INTVAL (args_so_far)));
4087 else
4088 temp = memory_address (BLKmode,
4089 plus_constant (gen_rtx_PLUS (Pmode,
4090 args_addr,
4091 args_so_far),
4092 skip));
4093
4094 if (!ACCUMULATE_OUTGOING_ARGS)
4095 {
4096 /* If the source is referenced relative to the stack pointer,
4097 copy it to another register to stabilize it. We do not need
4098 to do this if we know that we won't be changing sp. */
4099
4100 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4101 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4102 temp = copy_to_reg (temp);
4103 }
4104
4105 target = gen_rtx_MEM (BLKmode, temp);
4106
4107 /* We do *not* set_mem_attributes here, because incoming arguments
4108 may overlap with sibling call outgoing arguments and we cannot
4109 allow reordering of reads from function arguments with stores
4110 to outgoing arguments of sibling calls. We do, however, want
4111 to record the alignment of the stack slot. */
4112 /* ALIGN may well be better aligned than TYPE, e.g. due to
4113 PARM_BOUNDARY. Assume the caller isn't lying. */
4114 set_mem_align (target, align);
4115
4116 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4117 }
4118 }
4119 else if (partial > 0)
4120 {
4121 /* Scalar partly in registers. */
4122
4123 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4124 int i;
4125 int not_stack;
4126 /* # bytes of start of argument
4127 that we must make space for but need not store. */
4128 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4129 int args_offset = INTVAL (args_so_far);
4130 int skip;
4131
4132 /* Push padding now if padding above and stack grows down,
4133 or if padding below and stack grows up.
4134 But if space already allocated, this has already been done. */
4135 if (extra && args_addr == 0
4136 && where_pad != none && where_pad != stack_direction)
4137 anti_adjust_stack (GEN_INT (extra));
4138
4139 /* If we make space by pushing it, we might as well push
4140 the real data. Otherwise, we can leave OFFSET nonzero
4141 and leave the space uninitialized. */
4142 if (args_addr == 0)
4143 offset = 0;
4144
4145 /* Now NOT_STACK gets the number of words that we don't need to
4146 allocate on the stack. Convert OFFSET to words too. */
4147 not_stack = (partial - offset) / UNITS_PER_WORD;
4148 offset /= UNITS_PER_WORD;
4149
4150 /* If the partial register-part of the arg counts in its stack size,
4151 skip the part of stack space corresponding to the registers.
4152 Otherwise, start copying to the beginning of the stack space,
4153 by setting SKIP to 0. */
4154 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4155
4156 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4157 x = validize_mem (force_const_mem (mode, x));
4158
4159 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4160 SUBREGs of such registers are not allowed. */
4161 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4162 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4163 x = copy_to_reg (x);
4164
4165 /* Loop over all the words allocated on the stack for this arg. */
4166 /* We can do it by words, because any scalar bigger than a word
4167 has a size a multiple of a word. */
4168 #ifndef PUSH_ARGS_REVERSED
4169 for (i = not_stack; i < size; i++)
4170 #else
4171 for (i = size - 1; i >= not_stack; i--)
4172 #endif
4173 if (i >= not_stack + offset)
4174 emit_push_insn (operand_subword_force (x, i, mode),
4175 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4176 0, args_addr,
4177 GEN_INT (args_offset + ((i - not_stack + skip)
4178 * UNITS_PER_WORD)),
4179 reg_parm_stack_space, alignment_pad);
4180 }
4181 else
4182 {
4183 rtx addr;
4184 rtx dest;
4185
4186 /* Push padding now if padding above and stack grows down,
4187 or if padding below and stack grows up.
4188 But if space already allocated, this has already been done. */
4189 if (extra && args_addr == 0
4190 && where_pad != none && where_pad != stack_direction)
4191 anti_adjust_stack (GEN_INT (extra));
4192
4193 #ifdef PUSH_ROUNDING
4194 if (args_addr == 0 && PUSH_ARGS)
4195 emit_single_push_insn (mode, x, type);
4196 else
4197 #endif
4198 {
4199 if (CONST_INT_P (args_so_far))
4200 addr
4201 = memory_address (mode,
4202 plus_constant (args_addr,
4203 INTVAL (args_so_far)));
4204 else
4205 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4206 args_so_far));
4207 dest = gen_rtx_MEM (mode, addr);
4208
4209 /* We do *not* set_mem_attributes here, because incoming arguments
4210 may overlap with sibling call outgoing arguments and we cannot
4211 allow reordering of reads from function arguments with stores
4212 to outgoing arguments of sibling calls. We do, however, want
4213 to record the alignment of the stack slot. */
4214 /* ALIGN may well be better aligned than TYPE, e.g. due to
4215 PARM_BOUNDARY. Assume the caller isn't lying. */
4216 set_mem_align (dest, align);
4217
4218 emit_move_insn (dest, x);
4219 }
4220 }
4221
4222 /* If part should go in registers, copy that part
4223 into the appropriate registers. Do this now, at the end,
4224 since mem-to-mem copies above may do function calls. */
4225 if (partial > 0 && reg != 0)
4226 {
4227 /* Handle calls that pass values in multiple non-contiguous locations.
4228 The Irix 6 ABI has examples of this. */
4229 if (GET_CODE (reg) == PARALLEL)
4230 emit_group_load (reg, x, type, -1);
4231 else
4232 {
4233 gcc_assert (partial % UNITS_PER_WORD == 0);
4234 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4235 }
4236 }
4237
4238 if (extra && args_addr == 0 && where_pad == stack_direction)
4239 anti_adjust_stack (GEN_INT (extra));
4240
4241 if (alignment_pad && args_addr == 0)
4242 anti_adjust_stack (alignment_pad);
4243 }
4244 \f
4245 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4246 operations. */
4247
4248 static rtx
4249 get_subtarget (rtx x)
4250 {
4251 return (optimize
4252 || x == 0
4253 /* Only registers can be subtargets. */
4254 || !REG_P (x)
4255 /* Don't use hard regs to avoid extending their life. */
4256 || REGNO (x) < FIRST_PSEUDO_REGISTER
4257 ? 0 : x);
4258 }
4259
4260 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4261 FIELD is a bitfield. Returns true if the optimization was successful,
4262 and there's nothing else to do. */
4263
4264 static bool
4265 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4266 unsigned HOST_WIDE_INT bitpos,
4267 unsigned HOST_WIDE_INT bitregion_start,
4268 unsigned HOST_WIDE_INT bitregion_end,
4269 enum machine_mode mode1, rtx str_rtx,
4270 tree to, tree src)
4271 {
4272 enum machine_mode str_mode = GET_MODE (str_rtx);
4273 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4274 tree op0, op1;
4275 rtx value, result;
4276 optab binop;
4277 gimple srcstmt;
4278 enum tree_code code;
4279
4280 if (mode1 != VOIDmode
4281 || bitsize >= BITS_PER_WORD
4282 || str_bitsize > BITS_PER_WORD
4283 || TREE_SIDE_EFFECTS (to)
4284 || TREE_THIS_VOLATILE (to))
4285 return false;
4286
4287 STRIP_NOPS (src);
4288 if (TREE_CODE (src) != SSA_NAME)
4289 return false;
4290 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4291 return false;
4292
4293 srcstmt = get_gimple_for_ssa_name (src);
4294 if (!srcstmt
4295 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4296 return false;
4297
4298 code = gimple_assign_rhs_code (srcstmt);
4299
4300 op0 = gimple_assign_rhs1 (srcstmt);
4301
4302 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4303 to find its initialization. Hopefully the initialization will
4304 be from a bitfield load. */
4305 if (TREE_CODE (op0) == SSA_NAME)
4306 {
4307 gimple op0stmt = get_gimple_for_ssa_name (op0);
4308
4309 /* We want to eventually have OP0 be the same as TO, which
4310 should be a bitfield. */
4311 if (!op0stmt
4312 || !is_gimple_assign (op0stmt)
4313 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4314 return false;
4315 op0 = gimple_assign_rhs1 (op0stmt);
4316 }
4317
4318 op1 = gimple_assign_rhs2 (srcstmt);
4319
4320 if (!operand_equal_p (to, op0, 0))
4321 return false;
4322
4323 if (MEM_P (str_rtx))
4324 {
4325 unsigned HOST_WIDE_INT offset1;
4326
4327 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4328 str_mode = word_mode;
4329 str_mode = get_best_mode (bitsize, bitpos,
4330 bitregion_start, bitregion_end,
4331 MEM_ALIGN (str_rtx), str_mode, 0);
4332 if (str_mode == VOIDmode)
4333 return false;
4334 str_bitsize = GET_MODE_BITSIZE (str_mode);
4335
4336 offset1 = bitpos;
4337 bitpos %= str_bitsize;
4338 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4339 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4340 }
4341 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4342 return false;
4343
4344 /* If the bit field covers the whole REG/MEM, store_field
4345 will likely generate better code. */
4346 if (bitsize >= str_bitsize)
4347 return false;
4348
4349 /* We can't handle fields split across multiple entities. */
4350 if (bitpos + bitsize > str_bitsize)
4351 return false;
4352
4353 if (BYTES_BIG_ENDIAN)
4354 bitpos = str_bitsize - bitpos - bitsize;
4355
4356 switch (code)
4357 {
4358 case PLUS_EXPR:
4359 case MINUS_EXPR:
4360 /* For now, just optimize the case of the topmost bitfield
4361 where we don't need to do any masking and also
4362 1 bit bitfields where xor can be used.
4363 We might win by one instruction for the other bitfields
4364 too if insv/extv instructions aren't used, so that
4365 can be added later. */
4366 if (bitpos + bitsize != str_bitsize
4367 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4368 break;
4369
4370 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4371 value = convert_modes (str_mode,
4372 TYPE_MODE (TREE_TYPE (op1)), value,
4373 TYPE_UNSIGNED (TREE_TYPE (op1)));
4374
4375 /* We may be accessing data outside the field, which means
4376 we can alias adjacent data. */
4377 if (MEM_P (str_rtx))
4378 {
4379 str_rtx = shallow_copy_rtx (str_rtx);
4380 set_mem_alias_set (str_rtx, 0);
4381 set_mem_expr (str_rtx, 0);
4382 }
4383
4384 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4385 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4386 {
4387 value = expand_and (str_mode, value, const1_rtx, NULL);
4388 binop = xor_optab;
4389 }
4390 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4391 bitpos, NULL_RTX, 1);
4392 result = expand_binop (str_mode, binop, str_rtx,
4393 value, str_rtx, 1, OPTAB_WIDEN);
4394 if (result != str_rtx)
4395 emit_move_insn (str_rtx, result);
4396 return true;
4397
4398 case BIT_IOR_EXPR:
4399 case BIT_XOR_EXPR:
4400 if (TREE_CODE (op1) != INTEGER_CST)
4401 break;
4402 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4403 value = convert_modes (GET_MODE (str_rtx),
4404 TYPE_MODE (TREE_TYPE (op1)), value,
4405 TYPE_UNSIGNED (TREE_TYPE (op1)));
4406
4407 /* We may be accessing data outside the field, which means
4408 we can alias adjacent data. */
4409 if (MEM_P (str_rtx))
4410 {
4411 str_rtx = shallow_copy_rtx (str_rtx);
4412 set_mem_alias_set (str_rtx, 0);
4413 set_mem_expr (str_rtx, 0);
4414 }
4415
4416 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4417 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4418 {
4419 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4420 - 1);
4421 value = expand_and (GET_MODE (str_rtx), value, mask,
4422 NULL_RTX);
4423 }
4424 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4425 bitpos, NULL_RTX, 1);
4426 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4427 value, str_rtx, 1, OPTAB_WIDEN);
4428 if (result != str_rtx)
4429 emit_move_insn (str_rtx, result);
4430 return true;
4431
4432 default:
4433 break;
4434 }
4435
4436 return false;
4437 }
4438
4439 /* In the C++ memory model, consecutive bit fields in a structure are
4440 considered one memory location.
4441
4442 Given a COMPONENT_REF, this function returns the bit range of
4443 consecutive bits in which this COMPONENT_REF belongs in. The
4444 values are returned in *BITSTART and *BITEND. If either the C++
4445 memory model is not activated, or this memory access is not thread
4446 visible, 0 is returned in *BITSTART and *BITEND.
4447
4448 EXP is the COMPONENT_REF.
4449 INNERDECL is the actual object being referenced.
4450 BITPOS is the position in bits where the bit starts within the structure.
4451 BITSIZE is size in bits of the field being referenced in EXP.
4452
4453 For example, while storing into FOO.A here...
4454
4455 struct {
4456 BIT 0:
4457 unsigned int a : 4;
4458 unsigned int b : 1;
4459 BIT 8:
4460 unsigned char c;
4461 unsigned int d : 6;
4462 } foo;
4463
4464 ...we are not allowed to store past <b>, so for the layout above, a
4465 range of 0..7 (because no one cares if we store into the
4466 padding). */
4467
4468 static void
4469 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4470 unsigned HOST_WIDE_INT *bitend,
4471 tree exp, tree innerdecl,
4472 HOST_WIDE_INT bitpos, HOST_WIDE_INT bitsize)
4473 {
4474 tree field, record_type, fld;
4475 bool found_field = false;
4476 bool prev_field_is_bitfield;
4477
4478 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4479
4480 /* If other threads can't see this value, no need to restrict stores. */
4481 if (ALLOW_STORE_DATA_RACES
4482 || ((TREE_CODE (innerdecl) == MEM_REF
4483 || TREE_CODE (innerdecl) == TARGET_MEM_REF)
4484 && !ptr_deref_may_alias_global_p (TREE_OPERAND (innerdecl, 0)))
4485 || (DECL_P (innerdecl)
4486 && ((TREE_CODE (innerdecl) == VAR_DECL
4487 && DECL_THREAD_LOCAL_P (innerdecl))
4488 || !TREE_STATIC (innerdecl))))
4489 {
4490 *bitstart = *bitend = 0;
4491 return;
4492 }
4493
4494 /* Bit field we're storing into. */
4495 field = TREE_OPERAND (exp, 1);
4496 record_type = DECL_FIELD_CONTEXT (field);
4497
4498 /* Count the contiguous bitfields for the memory location that
4499 contains FIELD. */
4500 *bitstart = 0;
4501 prev_field_is_bitfield = true;
4502 for (fld = TYPE_FIELDS (record_type); fld; fld = DECL_CHAIN (fld))
4503 {
4504 tree t, offset;
4505 enum machine_mode mode;
4506 int unsignedp, volatilep;
4507
4508 if (TREE_CODE (fld) != FIELD_DECL)
4509 continue;
4510
4511 t = build3 (COMPONENT_REF, TREE_TYPE (exp),
4512 unshare_expr (TREE_OPERAND (exp, 0)),
4513 fld, NULL_TREE);
4514 get_inner_reference (t, &bitsize, &bitpos, &offset,
4515 &mode, &unsignedp, &volatilep, true);
4516
4517 if (field == fld)
4518 found_field = true;
4519
4520 if (DECL_BIT_FIELD_TYPE (fld) && bitsize > 0)
4521 {
4522 if (prev_field_is_bitfield == false)
4523 {
4524 *bitstart = bitpos;
4525 prev_field_is_bitfield = true;
4526 }
4527 }
4528 else
4529 {
4530 prev_field_is_bitfield = false;
4531 if (found_field)
4532 break;
4533 }
4534 }
4535 gcc_assert (found_field);
4536
4537 if (fld)
4538 {
4539 /* We found the end of the bit field sequence. Include the
4540 padding up to the next field and be done. */
4541 *bitend = bitpos - 1;
4542 }
4543 else
4544 {
4545 /* If this is the last element in the structure, include the padding
4546 at the end of structure. */
4547 *bitend = TREE_INT_CST_LOW (TYPE_SIZE (record_type)) - 1;
4548 }
4549 }
4550
4551 /* Returns true if the MEM_REF REF refers to an object that does not
4552 reside in memory and has non-BLKmode. */
4553
4554 static bool
4555 mem_ref_refers_to_non_mem_p (tree ref)
4556 {
4557 tree base = TREE_OPERAND (ref, 0);
4558 if (TREE_CODE (base) != ADDR_EXPR)
4559 return false;
4560 base = TREE_OPERAND (base, 0);
4561 return (DECL_P (base)
4562 && !TREE_ADDRESSABLE (base)
4563 && DECL_MODE (base) != BLKmode
4564 && DECL_RTL_SET_P (base)
4565 && !MEM_P (DECL_RTL (base)));
4566 }
4567
4568 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4569 is true, try generating a nontemporal store. */
4570
4571 void
4572 expand_assignment (tree to, tree from, bool nontemporal)
4573 {
4574 rtx to_rtx = 0;
4575 rtx result;
4576 enum machine_mode mode;
4577 unsigned int align;
4578 enum insn_code icode;
4579
4580 /* Don't crash if the lhs of the assignment was erroneous. */
4581 if (TREE_CODE (to) == ERROR_MARK)
4582 {
4583 expand_normal (from);
4584 return;
4585 }
4586
4587 /* Optimize away no-op moves without side-effects. */
4588 if (operand_equal_p (to, from, 0))
4589 return;
4590
4591 /* Handle misaligned stores. */
4592 mode = TYPE_MODE (TREE_TYPE (to));
4593 if ((TREE_CODE (to) == MEM_REF
4594 || TREE_CODE (to) == TARGET_MEM_REF)
4595 && mode != BLKmode
4596 && ((align = get_object_or_type_alignment (to))
4597 < GET_MODE_ALIGNMENT (mode))
4598 && ((icode = optab_handler (movmisalign_optab, mode))
4599 != CODE_FOR_nothing))
4600 {
4601 addr_space_t as
4602 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (to, 0))));
4603 struct expand_operand ops[2];
4604 enum machine_mode address_mode;
4605 rtx reg, op0, mem;
4606
4607 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4608 reg = force_not_mem (reg);
4609
4610 if (TREE_CODE (to) == MEM_REF)
4611 {
4612 tree base = TREE_OPERAND (to, 0);
4613 address_mode = targetm.addr_space.address_mode (as);
4614 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4615 op0 = convert_memory_address_addr_space (address_mode, op0, as);
4616 if (!integer_zerop (TREE_OPERAND (to, 1)))
4617 {
4618 rtx off
4619 = immed_double_int_const (mem_ref_offset (to), address_mode);
4620 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
4621 }
4622 op0 = memory_address_addr_space (mode, op0, as);
4623 mem = gen_rtx_MEM (mode, op0);
4624 set_mem_attributes (mem, to, 0);
4625 set_mem_addr_space (mem, as);
4626 }
4627 else if (TREE_CODE (to) == TARGET_MEM_REF)
4628 {
4629 struct mem_address addr;
4630 get_address_description (to, &addr);
4631 op0 = addr_for_mem_ref (&addr, as, true);
4632 op0 = memory_address_addr_space (mode, op0, as);
4633 mem = gen_rtx_MEM (mode, op0);
4634 set_mem_attributes (mem, to, 0);
4635 set_mem_addr_space (mem, as);
4636 }
4637 else
4638 gcc_unreachable ();
4639 if (TREE_THIS_VOLATILE (to))
4640 MEM_VOLATILE_P (mem) = 1;
4641
4642 create_fixed_operand (&ops[0], mem);
4643 create_input_operand (&ops[1], reg, mode);
4644 /* The movmisalign<mode> pattern cannot fail, else the assignment would
4645 silently be omitted. */
4646 expand_insn (icode, 2, ops);
4647 return;
4648 }
4649
4650 /* Assignment of a structure component needs special treatment
4651 if the structure component's rtx is not simply a MEM.
4652 Assignment of an array element at a constant index, and assignment of
4653 an array element in an unaligned packed structure field, has the same
4654 problem. Same for (partially) storing into a non-memory object. */
4655 if (handled_component_p (to)
4656 || (TREE_CODE (to) == MEM_REF
4657 && mem_ref_refers_to_non_mem_p (to))
4658 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4659 {
4660 enum machine_mode mode1;
4661 HOST_WIDE_INT bitsize, bitpos;
4662 unsigned HOST_WIDE_INT bitregion_start = 0;
4663 unsigned HOST_WIDE_INT bitregion_end = 0;
4664 tree offset;
4665 int unsignedp;
4666 int volatilep = 0;
4667 tree tem;
4668 bool misalignp;
4669
4670 push_temp_slots ();
4671 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4672 &unsignedp, &volatilep, true);
4673
4674 if (TREE_CODE (to) == COMPONENT_REF
4675 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4676 get_bit_range (&bitregion_start, &bitregion_end,
4677 to, tem, bitpos, bitsize);
4678
4679 /* If we are going to use store_bit_field and extract_bit_field,
4680 make sure to_rtx will be safe for multiple use. */
4681 mode = TYPE_MODE (TREE_TYPE (tem));
4682 if (TREE_CODE (tem) == MEM_REF
4683 && mode != BLKmode
4684 && ((align = get_object_or_type_alignment (tem))
4685 < GET_MODE_ALIGNMENT (mode))
4686 && ((icode = optab_handler (movmisalign_optab, mode))
4687 != CODE_FOR_nothing))
4688 {
4689 misalignp = true;
4690 to_rtx = gen_reg_rtx (mode);
4691 }
4692 else
4693 {
4694 misalignp = false;
4695 to_rtx = expand_normal (tem);
4696 }
4697
4698 /* If the bitfield is volatile, we want to access it in the
4699 field's mode, not the computed mode.
4700 If a MEM has VOIDmode (external with incomplete type),
4701 use BLKmode for it instead. */
4702 if (MEM_P (to_rtx))
4703 {
4704 if (volatilep && flag_strict_volatile_bitfields > 0)
4705 to_rtx = adjust_address (to_rtx, mode1, 0);
4706 else if (GET_MODE (to_rtx) == VOIDmode)
4707 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4708 }
4709
4710 if (offset != 0)
4711 {
4712 enum machine_mode address_mode;
4713 rtx offset_rtx;
4714
4715 if (!MEM_P (to_rtx))
4716 {
4717 /* We can get constant negative offsets into arrays with broken
4718 user code. Translate this to a trap instead of ICEing. */
4719 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4720 expand_builtin_trap ();
4721 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4722 }
4723
4724 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4725 address_mode
4726 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4727 if (GET_MODE (offset_rtx) != address_mode)
4728 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4729
4730 /* A constant address in TO_RTX can have VOIDmode, we must not try
4731 to call force_reg for that case. Avoid that case. */
4732 if (MEM_P (to_rtx)
4733 && GET_MODE (to_rtx) == BLKmode
4734 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4735 && bitsize > 0
4736 && (bitpos % bitsize) == 0
4737 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4738 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4739 {
4740 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4741 bitpos = 0;
4742 }
4743
4744 to_rtx = offset_address (to_rtx, offset_rtx,
4745 highest_pow2_factor_for_target (to,
4746 offset));
4747 }
4748
4749 /* No action is needed if the target is not a memory and the field
4750 lies completely outside that target. This can occur if the source
4751 code contains an out-of-bounds access to a small array. */
4752 if (!MEM_P (to_rtx)
4753 && GET_MODE (to_rtx) != BLKmode
4754 && (unsigned HOST_WIDE_INT) bitpos
4755 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4756 {
4757 expand_normal (from);
4758 result = NULL;
4759 }
4760 /* Handle expand_expr of a complex value returning a CONCAT. */
4761 else if (GET_CODE (to_rtx) == CONCAT)
4762 {
4763 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4764 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4765 && bitpos == 0
4766 && bitsize == mode_bitsize)
4767 result = store_expr (from, to_rtx, false, nontemporal);
4768 else if (bitsize == mode_bitsize / 2
4769 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4770 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4771 nontemporal);
4772 else if (bitpos + bitsize <= mode_bitsize / 2)
4773 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4774 bitregion_start, bitregion_end,
4775 mode1, from, TREE_TYPE (tem),
4776 get_alias_set (to), nontemporal);
4777 else if (bitpos >= mode_bitsize / 2)
4778 result = store_field (XEXP (to_rtx, 1), bitsize,
4779 bitpos - mode_bitsize / 2,
4780 bitregion_start, bitregion_end,
4781 mode1, from,
4782 TREE_TYPE (tem), get_alias_set (to),
4783 nontemporal);
4784 else if (bitpos == 0 && bitsize == mode_bitsize)
4785 {
4786 rtx from_rtx;
4787 result = expand_normal (from);
4788 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4789 TYPE_MODE (TREE_TYPE (from)), 0);
4790 emit_move_insn (XEXP (to_rtx, 0),
4791 read_complex_part (from_rtx, false));
4792 emit_move_insn (XEXP (to_rtx, 1),
4793 read_complex_part (from_rtx, true));
4794 }
4795 else
4796 {
4797 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4798 GET_MODE_SIZE (GET_MODE (to_rtx)),
4799 0);
4800 write_complex_part (temp, XEXP (to_rtx, 0), false);
4801 write_complex_part (temp, XEXP (to_rtx, 1), true);
4802 result = store_field (temp, bitsize, bitpos,
4803 bitregion_start, bitregion_end,
4804 mode1, from,
4805 TREE_TYPE (tem), get_alias_set (to),
4806 nontemporal);
4807 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4808 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4809 }
4810 }
4811 else
4812 {
4813 if (MEM_P (to_rtx))
4814 {
4815 /* If the field is at offset zero, we could have been given the
4816 DECL_RTX of the parent struct. Don't munge it. */
4817 to_rtx = shallow_copy_rtx (to_rtx);
4818
4819 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4820
4821 /* Deal with volatile and readonly fields. The former is only
4822 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4823 if (volatilep)
4824 MEM_VOLATILE_P (to_rtx) = 1;
4825 if (component_uses_parent_alias_set (to))
4826 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4827 }
4828
4829 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4830 bitregion_start, bitregion_end,
4831 mode1,
4832 to_rtx, to, from))
4833 result = NULL;
4834 else
4835 result = store_field (to_rtx, bitsize, bitpos,
4836 bitregion_start, bitregion_end,
4837 mode1, from,
4838 TREE_TYPE (tem), get_alias_set (to),
4839 nontemporal);
4840 }
4841
4842 if (misalignp)
4843 {
4844 struct expand_operand ops[2];
4845 enum machine_mode address_mode;
4846 rtx op0, mem;
4847 addr_space_t as = TYPE_ADDR_SPACE
4848 (TREE_TYPE (TREE_TYPE (TREE_OPERAND (tem, 0))));
4849 tree base = TREE_OPERAND (tem, 0);
4850 address_mode = targetm.addr_space.address_mode (as);
4851 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4852 op0 = convert_memory_address_addr_space (address_mode, op0, as);
4853 if (!integer_zerop (TREE_OPERAND (tem, 1)))
4854 {
4855 rtx off = immed_double_int_const (mem_ref_offset (tem),
4856 address_mode);
4857 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
4858 }
4859 op0 = memory_address_addr_space (mode, op0, as);
4860 mem = gen_rtx_MEM (mode, op0);
4861 set_mem_attributes (mem, tem, 0);
4862 set_mem_addr_space (mem, as);
4863 if (TREE_THIS_VOLATILE (tem))
4864 MEM_VOLATILE_P (mem) = 1;
4865
4866 create_fixed_operand (&ops[0], mem);
4867 create_input_operand (&ops[1], to_rtx, mode);
4868 /* The movmisalign<mode> pattern cannot fail, else the assignment
4869 would silently be omitted. */
4870 expand_insn (icode, 2, ops);
4871 }
4872
4873 if (result)
4874 preserve_temp_slots (result);
4875 free_temp_slots ();
4876 pop_temp_slots ();
4877 return;
4878 }
4879
4880 /* If the rhs is a function call and its value is not an aggregate,
4881 call the function before we start to compute the lhs.
4882 This is needed for correct code for cases such as
4883 val = setjmp (buf) on machines where reference to val
4884 requires loading up part of an address in a separate insn.
4885
4886 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4887 since it might be a promoted variable where the zero- or sign- extension
4888 needs to be done. Handling this in the normal way is safe because no
4889 computation is done before the call. The same is true for SSA names. */
4890 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4891 && COMPLETE_TYPE_P (TREE_TYPE (from))
4892 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4893 && ! (((TREE_CODE (to) == VAR_DECL
4894 || TREE_CODE (to) == PARM_DECL
4895 || TREE_CODE (to) == RESULT_DECL)
4896 && REG_P (DECL_RTL (to)))
4897 || TREE_CODE (to) == SSA_NAME))
4898 {
4899 rtx value;
4900
4901 push_temp_slots ();
4902 value = expand_normal (from);
4903 if (to_rtx == 0)
4904 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4905
4906 /* Handle calls that return values in multiple non-contiguous locations.
4907 The Irix 6 ABI has examples of this. */
4908 if (GET_CODE (to_rtx) == PARALLEL)
4909 emit_group_load (to_rtx, value, TREE_TYPE (from),
4910 int_size_in_bytes (TREE_TYPE (from)));
4911 else if (GET_MODE (to_rtx) == BLKmode)
4912 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4913 else
4914 {
4915 if (POINTER_TYPE_P (TREE_TYPE (to)))
4916 value = convert_memory_address_addr_space
4917 (GET_MODE (to_rtx), value,
4918 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4919
4920 emit_move_insn (to_rtx, value);
4921 }
4922 preserve_temp_slots (to_rtx);
4923 free_temp_slots ();
4924 pop_temp_slots ();
4925 return;
4926 }
4927
4928 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
4929 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4930
4931 /* Don't move directly into a return register. */
4932 if (TREE_CODE (to) == RESULT_DECL
4933 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4934 {
4935 rtx temp;
4936
4937 push_temp_slots ();
4938 if (REG_P (to_rtx) && TYPE_MODE (TREE_TYPE (from)) == BLKmode)
4939 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
4940 else
4941 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4942
4943 if (GET_CODE (to_rtx) == PARALLEL)
4944 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4945 int_size_in_bytes (TREE_TYPE (from)));
4946 else if (temp)
4947 emit_move_insn (to_rtx, temp);
4948
4949 preserve_temp_slots (to_rtx);
4950 free_temp_slots ();
4951 pop_temp_slots ();
4952 return;
4953 }
4954
4955 /* In case we are returning the contents of an object which overlaps
4956 the place the value is being stored, use a safe function when copying
4957 a value through a pointer into a structure value return block. */
4958 if (TREE_CODE (to) == RESULT_DECL
4959 && TREE_CODE (from) == INDIRECT_REF
4960 && ADDR_SPACE_GENERIC_P
4961 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4962 && refs_may_alias_p (to, from)
4963 && cfun->returns_struct
4964 && !cfun->returns_pcc_struct)
4965 {
4966 rtx from_rtx, size;
4967
4968 push_temp_slots ();
4969 size = expr_size (from);
4970 from_rtx = expand_normal (from);
4971
4972 emit_library_call (memmove_libfunc, LCT_NORMAL,
4973 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4974 XEXP (from_rtx, 0), Pmode,
4975 convert_to_mode (TYPE_MODE (sizetype),
4976 size, TYPE_UNSIGNED (sizetype)),
4977 TYPE_MODE (sizetype));
4978
4979 preserve_temp_slots (to_rtx);
4980 free_temp_slots ();
4981 pop_temp_slots ();
4982 return;
4983 }
4984
4985 /* Compute FROM and store the value in the rtx we got. */
4986
4987 push_temp_slots ();
4988 result = store_expr (from, to_rtx, 0, nontemporal);
4989 preserve_temp_slots (result);
4990 free_temp_slots ();
4991 pop_temp_slots ();
4992 return;
4993 }
4994
4995 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4996 succeeded, false otherwise. */
4997
4998 bool
4999 emit_storent_insn (rtx to, rtx from)
5000 {
5001 struct expand_operand ops[2];
5002 enum machine_mode mode = GET_MODE (to);
5003 enum insn_code code = optab_handler (storent_optab, mode);
5004
5005 if (code == CODE_FOR_nothing)
5006 return false;
5007
5008 create_fixed_operand (&ops[0], to);
5009 create_input_operand (&ops[1], from, mode);
5010 return maybe_expand_insn (code, 2, ops);
5011 }
5012
5013 /* Generate code for computing expression EXP,
5014 and storing the value into TARGET.
5015
5016 If the mode is BLKmode then we may return TARGET itself.
5017 It turns out that in BLKmode it doesn't cause a problem.
5018 because C has no operators that could combine two different
5019 assignments into the same BLKmode object with different values
5020 with no sequence point. Will other languages need this to
5021 be more thorough?
5022
5023 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5024 stack, and block moves may need to be treated specially.
5025
5026 If NONTEMPORAL is true, try using a nontemporal store instruction. */
5027
5028 rtx
5029 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
5030 {
5031 rtx temp;
5032 rtx alt_rtl = NULL_RTX;
5033 location_t loc = EXPR_LOCATION (exp);
5034
5035 if (VOID_TYPE_P (TREE_TYPE (exp)))
5036 {
5037 /* C++ can generate ?: expressions with a throw expression in one
5038 branch and an rvalue in the other. Here, we resolve attempts to
5039 store the throw expression's nonexistent result. */
5040 gcc_assert (!call_param_p);
5041 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5042 return NULL_RTX;
5043 }
5044 if (TREE_CODE (exp) == COMPOUND_EXPR)
5045 {
5046 /* Perform first part of compound expression, then assign from second
5047 part. */
5048 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5049 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5050 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5051 nontemporal);
5052 }
5053 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5054 {
5055 /* For conditional expression, get safe form of the target. Then
5056 test the condition, doing the appropriate assignment on either
5057 side. This avoids the creation of unnecessary temporaries.
5058 For non-BLKmode, it is more efficient not to do this. */
5059
5060 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
5061
5062 do_pending_stack_adjust ();
5063 NO_DEFER_POP;
5064 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5065 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5066 nontemporal);
5067 emit_jump_insn (gen_jump (lab2));
5068 emit_barrier ();
5069 emit_label (lab1);
5070 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5071 nontemporal);
5072 emit_label (lab2);
5073 OK_DEFER_POP;
5074
5075 return NULL_RTX;
5076 }
5077 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5078 /* If this is a scalar in a register that is stored in a wider mode
5079 than the declared mode, compute the result into its declared mode
5080 and then convert to the wider mode. Our value is the computed
5081 expression. */
5082 {
5083 rtx inner_target = 0;
5084
5085 /* We can do the conversion inside EXP, which will often result
5086 in some optimizations. Do the conversion in two steps: first
5087 change the signedness, if needed, then the extend. But don't
5088 do this if the type of EXP is a subtype of something else
5089 since then the conversion might involve more than just
5090 converting modes. */
5091 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5092 && TREE_TYPE (TREE_TYPE (exp)) == 0
5093 && GET_MODE_PRECISION (GET_MODE (target))
5094 == TYPE_PRECISION (TREE_TYPE (exp)))
5095 {
5096 if (TYPE_UNSIGNED (TREE_TYPE (exp))
5097 != SUBREG_PROMOTED_UNSIGNED_P (target))
5098 {
5099 /* Some types, e.g. Fortran's logical*4, won't have a signed
5100 version, so use the mode instead. */
5101 tree ntype
5102 = (signed_or_unsigned_type_for
5103 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
5104 if (ntype == NULL)
5105 ntype = lang_hooks.types.type_for_mode
5106 (TYPE_MODE (TREE_TYPE (exp)),
5107 SUBREG_PROMOTED_UNSIGNED_P (target));
5108
5109 exp = fold_convert_loc (loc, ntype, exp);
5110 }
5111
5112 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5113 (GET_MODE (SUBREG_REG (target)),
5114 SUBREG_PROMOTED_UNSIGNED_P (target)),
5115 exp);
5116
5117 inner_target = SUBREG_REG (target);
5118 }
5119
5120 temp = expand_expr (exp, inner_target, VOIDmode,
5121 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5122
5123 /* If TEMP is a VOIDmode constant, use convert_modes to make
5124 sure that we properly convert it. */
5125 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5126 {
5127 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5128 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
5129 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5130 GET_MODE (target), temp,
5131 SUBREG_PROMOTED_UNSIGNED_P (target));
5132 }
5133
5134 convert_move (SUBREG_REG (target), temp,
5135 SUBREG_PROMOTED_UNSIGNED_P (target));
5136
5137 return NULL_RTX;
5138 }
5139 else if ((TREE_CODE (exp) == STRING_CST
5140 || (TREE_CODE (exp) == MEM_REF
5141 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5142 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5143 == STRING_CST
5144 && integer_zerop (TREE_OPERAND (exp, 1))))
5145 && !nontemporal && !call_param_p
5146 && MEM_P (target))
5147 {
5148 /* Optimize initialization of an array with a STRING_CST. */
5149 HOST_WIDE_INT exp_len, str_copy_len;
5150 rtx dest_mem;
5151 tree str = TREE_CODE (exp) == STRING_CST
5152 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5153
5154 exp_len = int_expr_size (exp);
5155 if (exp_len <= 0)
5156 goto normal_expr;
5157
5158 if (TREE_STRING_LENGTH (str) <= 0)
5159 goto normal_expr;
5160
5161 str_copy_len = strlen (TREE_STRING_POINTER (str));
5162 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5163 goto normal_expr;
5164
5165 str_copy_len = TREE_STRING_LENGTH (str);
5166 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5167 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5168 {
5169 str_copy_len += STORE_MAX_PIECES - 1;
5170 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5171 }
5172 str_copy_len = MIN (str_copy_len, exp_len);
5173 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5174 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5175 MEM_ALIGN (target), false))
5176 goto normal_expr;
5177
5178 dest_mem = target;
5179
5180 dest_mem = store_by_pieces (dest_mem,
5181 str_copy_len, builtin_strncpy_read_str,
5182 CONST_CAST (char *,
5183 TREE_STRING_POINTER (str)),
5184 MEM_ALIGN (target), false,
5185 exp_len > str_copy_len ? 1 : 0);
5186 if (exp_len > str_copy_len)
5187 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5188 GEN_INT (exp_len - str_copy_len),
5189 BLOCK_OP_NORMAL);
5190 return NULL_RTX;
5191 }
5192 else
5193 {
5194 rtx tmp_target;
5195
5196 normal_expr:
5197 /* If we want to use a nontemporal store, force the value to
5198 register first. */
5199 tmp_target = nontemporal ? NULL_RTX : target;
5200 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5201 (call_param_p
5202 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5203 &alt_rtl);
5204 }
5205
5206 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5207 the same as that of TARGET, adjust the constant. This is needed, for
5208 example, in case it is a CONST_DOUBLE and we want only a word-sized
5209 value. */
5210 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5211 && TREE_CODE (exp) != ERROR_MARK
5212 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5213 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5214 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5215
5216 /* If value was not generated in the target, store it there.
5217 Convert the value to TARGET's type first if necessary and emit the
5218 pending incrementations that have been queued when expanding EXP.
5219 Note that we cannot emit the whole queue blindly because this will
5220 effectively disable the POST_INC optimization later.
5221
5222 If TEMP and TARGET compare equal according to rtx_equal_p, but
5223 one or both of them are volatile memory refs, we have to distinguish
5224 two cases:
5225 - expand_expr has used TARGET. In this case, we must not generate
5226 another copy. This can be detected by TARGET being equal according
5227 to == .
5228 - expand_expr has not used TARGET - that means that the source just
5229 happens to have the same RTX form. Since temp will have been created
5230 by expand_expr, it will compare unequal according to == .
5231 We must generate a copy in this case, to reach the correct number
5232 of volatile memory references. */
5233
5234 if ((! rtx_equal_p (temp, target)
5235 || (temp != target && (side_effects_p (temp)
5236 || side_effects_p (target))))
5237 && TREE_CODE (exp) != ERROR_MARK
5238 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5239 but TARGET is not valid memory reference, TEMP will differ
5240 from TARGET although it is really the same location. */
5241 && !(alt_rtl
5242 && rtx_equal_p (alt_rtl, target)
5243 && !side_effects_p (alt_rtl)
5244 && !side_effects_p (target))
5245 /* If there's nothing to copy, don't bother. Don't call
5246 expr_size unless necessary, because some front-ends (C++)
5247 expr_size-hook must not be given objects that are not
5248 supposed to be bit-copied or bit-initialized. */
5249 && expr_size (exp) != const0_rtx)
5250 {
5251 if (GET_MODE (temp) != GET_MODE (target)
5252 && GET_MODE (temp) != VOIDmode)
5253 {
5254 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5255 if (GET_MODE (target) == BLKmode
5256 && GET_MODE (temp) == BLKmode)
5257 emit_block_move (target, temp, expr_size (exp),
5258 (call_param_p
5259 ? BLOCK_OP_CALL_PARM
5260 : BLOCK_OP_NORMAL));
5261 else if (GET_MODE (target) == BLKmode)
5262 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5263 0, 0, 0, GET_MODE (temp), temp);
5264 else
5265 convert_move (target, temp, unsignedp);
5266 }
5267
5268 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5269 {
5270 /* Handle copying a string constant into an array. The string
5271 constant may be shorter than the array. So copy just the string's
5272 actual length, and clear the rest. First get the size of the data
5273 type of the string, which is actually the size of the target. */
5274 rtx size = expr_size (exp);
5275
5276 if (CONST_INT_P (size)
5277 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5278 emit_block_move (target, temp, size,
5279 (call_param_p
5280 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5281 else
5282 {
5283 enum machine_mode pointer_mode
5284 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5285 enum machine_mode address_mode
5286 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
5287
5288 /* Compute the size of the data to copy from the string. */
5289 tree copy_size
5290 = size_binop_loc (loc, MIN_EXPR,
5291 make_tree (sizetype, size),
5292 size_int (TREE_STRING_LENGTH (exp)));
5293 rtx copy_size_rtx
5294 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5295 (call_param_p
5296 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5297 rtx label = 0;
5298
5299 /* Copy that much. */
5300 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5301 TYPE_UNSIGNED (sizetype));
5302 emit_block_move (target, temp, copy_size_rtx,
5303 (call_param_p
5304 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5305
5306 /* Figure out how much is left in TARGET that we have to clear.
5307 Do all calculations in pointer_mode. */
5308 if (CONST_INT_P (copy_size_rtx))
5309 {
5310 size = plus_constant (size, -INTVAL (copy_size_rtx));
5311 target = adjust_address (target, BLKmode,
5312 INTVAL (copy_size_rtx));
5313 }
5314 else
5315 {
5316 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5317 copy_size_rtx, NULL_RTX, 0,
5318 OPTAB_LIB_WIDEN);
5319
5320 if (GET_MODE (copy_size_rtx) != address_mode)
5321 copy_size_rtx = convert_to_mode (address_mode,
5322 copy_size_rtx,
5323 TYPE_UNSIGNED (sizetype));
5324
5325 target = offset_address (target, copy_size_rtx,
5326 highest_pow2_factor (copy_size));
5327 label = gen_label_rtx ();
5328 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5329 GET_MODE (size), 0, label);
5330 }
5331
5332 if (size != const0_rtx)
5333 clear_storage (target, size, BLOCK_OP_NORMAL);
5334
5335 if (label)
5336 emit_label (label);
5337 }
5338 }
5339 /* Handle calls that return values in multiple non-contiguous locations.
5340 The Irix 6 ABI has examples of this. */
5341 else if (GET_CODE (target) == PARALLEL)
5342 emit_group_load (target, temp, TREE_TYPE (exp),
5343 int_size_in_bytes (TREE_TYPE (exp)));
5344 else if (GET_MODE (temp) == BLKmode)
5345 emit_block_move (target, temp, expr_size (exp),
5346 (call_param_p
5347 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5348 else if (nontemporal
5349 && emit_storent_insn (target, temp))
5350 /* If we managed to emit a nontemporal store, there is nothing else to
5351 do. */
5352 ;
5353 else
5354 {
5355 temp = force_operand (temp, target);
5356 if (temp != target)
5357 emit_move_insn (target, temp);
5358 }
5359 }
5360
5361 return NULL_RTX;
5362 }
5363 \f
5364 /* Return true if field F of structure TYPE is a flexible array. */
5365
5366 static bool
5367 flexible_array_member_p (const_tree f, const_tree type)
5368 {
5369 const_tree tf;
5370
5371 tf = TREE_TYPE (f);
5372 return (DECL_CHAIN (f) == NULL
5373 && TREE_CODE (tf) == ARRAY_TYPE
5374 && TYPE_DOMAIN (tf)
5375 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5376 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5377 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5378 && int_size_in_bytes (type) >= 0);
5379 }
5380
5381 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5382 must have in order for it to completely initialize a value of type TYPE.
5383 Return -1 if the number isn't known.
5384
5385 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5386
5387 static HOST_WIDE_INT
5388 count_type_elements (const_tree type, bool for_ctor_p)
5389 {
5390 switch (TREE_CODE (type))
5391 {
5392 case ARRAY_TYPE:
5393 {
5394 tree nelts;
5395
5396 nelts = array_type_nelts (type);
5397 if (nelts && host_integerp (nelts, 1))
5398 {
5399 unsigned HOST_WIDE_INT n;
5400
5401 n = tree_low_cst (nelts, 1) + 1;
5402 if (n == 0 || for_ctor_p)
5403 return n;
5404 else
5405 return n * count_type_elements (TREE_TYPE (type), false);
5406 }
5407 return for_ctor_p ? -1 : 1;
5408 }
5409
5410 case RECORD_TYPE:
5411 {
5412 unsigned HOST_WIDE_INT n;
5413 tree f;
5414
5415 n = 0;
5416 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5417 if (TREE_CODE (f) == FIELD_DECL)
5418 {
5419 if (!for_ctor_p)
5420 n += count_type_elements (TREE_TYPE (f), false);
5421 else if (!flexible_array_member_p (f, type))
5422 /* Don't count flexible arrays, which are not supposed
5423 to be initialized. */
5424 n += 1;
5425 }
5426
5427 return n;
5428 }
5429
5430 case UNION_TYPE:
5431 case QUAL_UNION_TYPE:
5432 {
5433 tree f;
5434 HOST_WIDE_INT n, m;
5435
5436 gcc_assert (!for_ctor_p);
5437 /* Estimate the number of scalars in each field and pick the
5438 maximum. Other estimates would do instead; the idea is simply
5439 to make sure that the estimate is not sensitive to the ordering
5440 of the fields. */
5441 n = 1;
5442 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5443 if (TREE_CODE (f) == FIELD_DECL)
5444 {
5445 m = count_type_elements (TREE_TYPE (f), false);
5446 /* If the field doesn't span the whole union, add an extra
5447 scalar for the rest. */
5448 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5449 TYPE_SIZE (type)) != 1)
5450 m++;
5451 if (n < m)
5452 n = m;
5453 }
5454 return n;
5455 }
5456
5457 case COMPLEX_TYPE:
5458 return 2;
5459
5460 case VECTOR_TYPE:
5461 return TYPE_VECTOR_SUBPARTS (type);
5462
5463 case INTEGER_TYPE:
5464 case REAL_TYPE:
5465 case FIXED_POINT_TYPE:
5466 case ENUMERAL_TYPE:
5467 case BOOLEAN_TYPE:
5468 case POINTER_TYPE:
5469 case OFFSET_TYPE:
5470 case REFERENCE_TYPE:
5471 case NULLPTR_TYPE:
5472 return 1;
5473
5474 case ERROR_MARK:
5475 return 0;
5476
5477 case VOID_TYPE:
5478 case METHOD_TYPE:
5479 case FUNCTION_TYPE:
5480 case LANG_TYPE:
5481 default:
5482 gcc_unreachable ();
5483 }
5484 }
5485
5486 /* Helper for categorize_ctor_elements. Identical interface. */
5487
5488 static bool
5489 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5490 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5491 {
5492 unsigned HOST_WIDE_INT idx;
5493 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5494 tree value, purpose, elt_type;
5495
5496 /* Whether CTOR is a valid constant initializer, in accordance with what
5497 initializer_constant_valid_p does. If inferred from the constructor
5498 elements, true until proven otherwise. */
5499 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5500 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5501
5502 nz_elts = 0;
5503 init_elts = 0;
5504 num_fields = 0;
5505 elt_type = NULL_TREE;
5506
5507 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5508 {
5509 HOST_WIDE_INT mult = 1;
5510
5511 if (TREE_CODE (purpose) == RANGE_EXPR)
5512 {
5513 tree lo_index = TREE_OPERAND (purpose, 0);
5514 tree hi_index = TREE_OPERAND (purpose, 1);
5515
5516 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5517 mult = (tree_low_cst (hi_index, 1)
5518 - tree_low_cst (lo_index, 1) + 1);
5519 }
5520 num_fields += mult;
5521 elt_type = TREE_TYPE (value);
5522
5523 switch (TREE_CODE (value))
5524 {
5525 case CONSTRUCTOR:
5526 {
5527 HOST_WIDE_INT nz = 0, ic = 0;
5528
5529 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5530 p_complete);
5531
5532 nz_elts += mult * nz;
5533 init_elts += mult * ic;
5534
5535 if (const_from_elts_p && const_p)
5536 const_p = const_elt_p;
5537 }
5538 break;
5539
5540 case INTEGER_CST:
5541 case REAL_CST:
5542 case FIXED_CST:
5543 if (!initializer_zerop (value))
5544 nz_elts += mult;
5545 init_elts += mult;
5546 break;
5547
5548 case STRING_CST:
5549 nz_elts += mult * TREE_STRING_LENGTH (value);
5550 init_elts += mult * TREE_STRING_LENGTH (value);
5551 break;
5552
5553 case COMPLEX_CST:
5554 if (!initializer_zerop (TREE_REALPART (value)))
5555 nz_elts += mult;
5556 if (!initializer_zerop (TREE_IMAGPART (value)))
5557 nz_elts += mult;
5558 init_elts += mult;
5559 break;
5560
5561 case VECTOR_CST:
5562 {
5563 tree v;
5564 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
5565 {
5566 if (!initializer_zerop (TREE_VALUE (v)))
5567 nz_elts += mult;
5568 init_elts += mult;
5569 }
5570 }
5571 break;
5572
5573 default:
5574 {
5575 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5576 nz_elts += mult * tc;
5577 init_elts += mult * tc;
5578
5579 if (const_from_elts_p && const_p)
5580 const_p = initializer_constant_valid_p (value, elt_type)
5581 != NULL_TREE;
5582 }
5583 break;
5584 }
5585 }
5586
5587 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5588 num_fields, elt_type))
5589 *p_complete = false;
5590
5591 *p_nz_elts += nz_elts;
5592 *p_init_elts += init_elts;
5593
5594 return const_p;
5595 }
5596
5597 /* Examine CTOR to discover:
5598 * how many scalar fields are set to nonzero values,
5599 and place it in *P_NZ_ELTS;
5600 * how many scalar fields in total are in CTOR,
5601 and place it in *P_ELT_COUNT.
5602 * whether the constructor is complete -- in the sense that every
5603 meaningful byte is explicitly given a value --
5604 and place it in *P_COMPLETE.
5605
5606 Return whether or not CTOR is a valid static constant initializer, the same
5607 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5608
5609 bool
5610 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5611 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5612 {
5613 *p_nz_elts = 0;
5614 *p_init_elts = 0;
5615 *p_complete = true;
5616
5617 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5618 }
5619
5620 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5621 of which had type LAST_TYPE. Each element was itself a complete
5622 initializer, in the sense that every meaningful byte was explicitly
5623 given a value. Return true if the same is true for the constructor
5624 as a whole. */
5625
5626 bool
5627 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5628 const_tree last_type)
5629 {
5630 if (TREE_CODE (type) == UNION_TYPE
5631 || TREE_CODE (type) == QUAL_UNION_TYPE)
5632 {
5633 if (num_elts == 0)
5634 return false;
5635
5636 gcc_assert (num_elts == 1 && last_type);
5637
5638 /* ??? We could look at each element of the union, and find the
5639 largest element. Which would avoid comparing the size of the
5640 initialized element against any tail padding in the union.
5641 Doesn't seem worth the effort... */
5642 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5643 }
5644
5645 return count_type_elements (type, true) == num_elts;
5646 }
5647
5648 /* Return 1 if EXP contains mostly (3/4) zeros. */
5649
5650 static int
5651 mostly_zeros_p (const_tree exp)
5652 {
5653 if (TREE_CODE (exp) == CONSTRUCTOR)
5654 {
5655 HOST_WIDE_INT nz_elts, init_elts;
5656 bool complete_p;
5657
5658 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5659 return !complete_p || nz_elts < init_elts / 4;
5660 }
5661
5662 return initializer_zerop (exp);
5663 }
5664
5665 /* Return 1 if EXP contains all zeros. */
5666
5667 static int
5668 all_zeros_p (const_tree exp)
5669 {
5670 if (TREE_CODE (exp) == CONSTRUCTOR)
5671 {
5672 HOST_WIDE_INT nz_elts, init_elts;
5673 bool complete_p;
5674
5675 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5676 return nz_elts == 0;
5677 }
5678
5679 return initializer_zerop (exp);
5680 }
5681 \f
5682 /* Helper function for store_constructor.
5683 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5684 TYPE is the type of the CONSTRUCTOR, not the element type.
5685 CLEARED is as for store_constructor.
5686 ALIAS_SET is the alias set to use for any stores.
5687
5688 This provides a recursive shortcut back to store_constructor when it isn't
5689 necessary to go through store_field. This is so that we can pass through
5690 the cleared field to let store_constructor know that we may not have to
5691 clear a substructure if the outer structure has already been cleared. */
5692
5693 static void
5694 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5695 HOST_WIDE_INT bitpos, enum machine_mode mode,
5696 tree exp, tree type, int cleared,
5697 alias_set_type alias_set)
5698 {
5699 if (TREE_CODE (exp) == CONSTRUCTOR
5700 /* We can only call store_constructor recursively if the size and
5701 bit position are on a byte boundary. */
5702 && bitpos % BITS_PER_UNIT == 0
5703 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5704 /* If we have a nonzero bitpos for a register target, then we just
5705 let store_field do the bitfield handling. This is unlikely to
5706 generate unnecessary clear instructions anyways. */
5707 && (bitpos == 0 || MEM_P (target)))
5708 {
5709 if (MEM_P (target))
5710 target
5711 = adjust_address (target,
5712 GET_MODE (target) == BLKmode
5713 || 0 != (bitpos
5714 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5715 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5716
5717
5718 /* Update the alias set, if required. */
5719 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5720 && MEM_ALIAS_SET (target) != 0)
5721 {
5722 target = copy_rtx (target);
5723 set_mem_alias_set (target, alias_set);
5724 }
5725
5726 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5727 }
5728 else
5729 store_field (target, bitsize, bitpos, 0, 0, mode, exp, type, alias_set,
5730 false);
5731 }
5732
5733 /* Store the value of constructor EXP into the rtx TARGET.
5734 TARGET is either a REG or a MEM; we know it cannot conflict, since
5735 safe_from_p has been called.
5736 CLEARED is true if TARGET is known to have been zero'd.
5737 SIZE is the number of bytes of TARGET we are allowed to modify: this
5738 may not be the same as the size of EXP if we are assigning to a field
5739 which has been packed to exclude padding bits. */
5740
5741 static void
5742 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5743 {
5744 tree type = TREE_TYPE (exp);
5745 #ifdef WORD_REGISTER_OPERATIONS
5746 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5747 #endif
5748
5749 switch (TREE_CODE (type))
5750 {
5751 case RECORD_TYPE:
5752 case UNION_TYPE:
5753 case QUAL_UNION_TYPE:
5754 {
5755 unsigned HOST_WIDE_INT idx;
5756 tree field, value;
5757
5758 /* If size is zero or the target is already cleared, do nothing. */
5759 if (size == 0 || cleared)
5760 cleared = 1;
5761 /* We either clear the aggregate or indicate the value is dead. */
5762 else if ((TREE_CODE (type) == UNION_TYPE
5763 || TREE_CODE (type) == QUAL_UNION_TYPE)
5764 && ! CONSTRUCTOR_ELTS (exp))
5765 /* If the constructor is empty, clear the union. */
5766 {
5767 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5768 cleared = 1;
5769 }
5770
5771 /* If we are building a static constructor into a register,
5772 set the initial value as zero so we can fold the value into
5773 a constant. But if more than one register is involved,
5774 this probably loses. */
5775 else if (REG_P (target) && TREE_STATIC (exp)
5776 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5777 {
5778 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5779 cleared = 1;
5780 }
5781
5782 /* If the constructor has fewer fields than the structure or
5783 if we are initializing the structure to mostly zeros, clear
5784 the whole structure first. Don't do this if TARGET is a
5785 register whose mode size isn't equal to SIZE since
5786 clear_storage can't handle this case. */
5787 else if (size > 0
5788 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5789 != fields_length (type))
5790 || mostly_zeros_p (exp))
5791 && (!REG_P (target)
5792 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5793 == size)))
5794 {
5795 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5796 cleared = 1;
5797 }
5798
5799 if (REG_P (target) && !cleared)
5800 emit_clobber (target);
5801
5802 /* Store each element of the constructor into the
5803 corresponding field of TARGET. */
5804 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5805 {
5806 enum machine_mode mode;
5807 HOST_WIDE_INT bitsize;
5808 HOST_WIDE_INT bitpos = 0;
5809 tree offset;
5810 rtx to_rtx = target;
5811
5812 /* Just ignore missing fields. We cleared the whole
5813 structure, above, if any fields are missing. */
5814 if (field == 0)
5815 continue;
5816
5817 if (cleared && initializer_zerop (value))
5818 continue;
5819
5820 if (host_integerp (DECL_SIZE (field), 1))
5821 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5822 else
5823 bitsize = -1;
5824
5825 mode = DECL_MODE (field);
5826 if (DECL_BIT_FIELD (field))
5827 mode = VOIDmode;
5828
5829 offset = DECL_FIELD_OFFSET (field);
5830 if (host_integerp (offset, 0)
5831 && host_integerp (bit_position (field), 0))
5832 {
5833 bitpos = int_bit_position (field);
5834 offset = 0;
5835 }
5836 else
5837 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5838
5839 if (offset)
5840 {
5841 enum machine_mode address_mode;
5842 rtx offset_rtx;
5843
5844 offset
5845 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5846 make_tree (TREE_TYPE (exp),
5847 target));
5848
5849 offset_rtx = expand_normal (offset);
5850 gcc_assert (MEM_P (to_rtx));
5851
5852 address_mode
5853 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5854 if (GET_MODE (offset_rtx) != address_mode)
5855 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5856
5857 to_rtx = offset_address (to_rtx, offset_rtx,
5858 highest_pow2_factor (offset));
5859 }
5860
5861 #ifdef WORD_REGISTER_OPERATIONS
5862 /* If this initializes a field that is smaller than a
5863 word, at the start of a word, try to widen it to a full
5864 word. This special case allows us to output C++ member
5865 function initializations in a form that the optimizers
5866 can understand. */
5867 if (REG_P (target)
5868 && bitsize < BITS_PER_WORD
5869 && bitpos % BITS_PER_WORD == 0
5870 && GET_MODE_CLASS (mode) == MODE_INT
5871 && TREE_CODE (value) == INTEGER_CST
5872 && exp_size >= 0
5873 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5874 {
5875 tree type = TREE_TYPE (value);
5876
5877 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5878 {
5879 type = lang_hooks.types.type_for_size
5880 (BITS_PER_WORD, TYPE_UNSIGNED (type));
5881 value = fold_convert (type, value);
5882 }
5883
5884 if (BYTES_BIG_ENDIAN)
5885 value
5886 = fold_build2 (LSHIFT_EXPR, type, value,
5887 build_int_cst (type,
5888 BITS_PER_WORD - bitsize));
5889 bitsize = BITS_PER_WORD;
5890 mode = word_mode;
5891 }
5892 #endif
5893
5894 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5895 && DECL_NONADDRESSABLE_P (field))
5896 {
5897 to_rtx = copy_rtx (to_rtx);
5898 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5899 }
5900
5901 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5902 value, type, cleared,
5903 get_alias_set (TREE_TYPE (field)));
5904 }
5905 break;
5906 }
5907 case ARRAY_TYPE:
5908 {
5909 tree value, index;
5910 unsigned HOST_WIDE_INT i;
5911 int need_to_clear;
5912 tree domain;
5913 tree elttype = TREE_TYPE (type);
5914 int const_bounds_p;
5915 HOST_WIDE_INT minelt = 0;
5916 HOST_WIDE_INT maxelt = 0;
5917
5918 domain = TYPE_DOMAIN (type);
5919 const_bounds_p = (TYPE_MIN_VALUE (domain)
5920 && TYPE_MAX_VALUE (domain)
5921 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5922 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5923
5924 /* If we have constant bounds for the range of the type, get them. */
5925 if (const_bounds_p)
5926 {
5927 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5928 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5929 }
5930
5931 /* If the constructor has fewer elements than the array, clear
5932 the whole array first. Similarly if this is static
5933 constructor of a non-BLKmode object. */
5934 if (cleared)
5935 need_to_clear = 0;
5936 else if (REG_P (target) && TREE_STATIC (exp))
5937 need_to_clear = 1;
5938 else
5939 {
5940 unsigned HOST_WIDE_INT idx;
5941 tree index, value;
5942 HOST_WIDE_INT count = 0, zero_count = 0;
5943 need_to_clear = ! const_bounds_p;
5944
5945 /* This loop is a more accurate version of the loop in
5946 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5947 is also needed to check for missing elements. */
5948 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5949 {
5950 HOST_WIDE_INT this_node_count;
5951
5952 if (need_to_clear)
5953 break;
5954
5955 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5956 {
5957 tree lo_index = TREE_OPERAND (index, 0);
5958 tree hi_index = TREE_OPERAND (index, 1);
5959
5960 if (! host_integerp (lo_index, 1)
5961 || ! host_integerp (hi_index, 1))
5962 {
5963 need_to_clear = 1;
5964 break;
5965 }
5966
5967 this_node_count = (tree_low_cst (hi_index, 1)
5968 - tree_low_cst (lo_index, 1) + 1);
5969 }
5970 else
5971 this_node_count = 1;
5972
5973 count += this_node_count;
5974 if (mostly_zeros_p (value))
5975 zero_count += this_node_count;
5976 }
5977
5978 /* Clear the entire array first if there are any missing
5979 elements, or if the incidence of zero elements is >=
5980 75%. */
5981 if (! need_to_clear
5982 && (count < maxelt - minelt + 1
5983 || 4 * zero_count >= 3 * count))
5984 need_to_clear = 1;
5985 }
5986
5987 if (need_to_clear && size > 0)
5988 {
5989 if (REG_P (target))
5990 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5991 else
5992 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5993 cleared = 1;
5994 }
5995
5996 if (!cleared && REG_P (target))
5997 /* Inform later passes that the old value is dead. */
5998 emit_clobber (target);
5999
6000 /* Store each element of the constructor into the
6001 corresponding element of TARGET, determined by counting the
6002 elements. */
6003 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
6004 {
6005 enum machine_mode mode;
6006 HOST_WIDE_INT bitsize;
6007 HOST_WIDE_INT bitpos;
6008 rtx xtarget = target;
6009
6010 if (cleared && initializer_zerop (value))
6011 continue;
6012
6013 mode = TYPE_MODE (elttype);
6014 if (mode == BLKmode)
6015 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
6016 ? tree_low_cst (TYPE_SIZE (elttype), 1)
6017 : -1);
6018 else
6019 bitsize = GET_MODE_BITSIZE (mode);
6020
6021 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6022 {
6023 tree lo_index = TREE_OPERAND (index, 0);
6024 tree hi_index = TREE_OPERAND (index, 1);
6025 rtx index_r, pos_rtx;
6026 HOST_WIDE_INT lo, hi, count;
6027 tree position;
6028
6029 /* If the range is constant and "small", unroll the loop. */
6030 if (const_bounds_p
6031 && host_integerp (lo_index, 0)
6032 && host_integerp (hi_index, 0)
6033 && (lo = tree_low_cst (lo_index, 0),
6034 hi = tree_low_cst (hi_index, 0),
6035 count = hi - lo + 1,
6036 (!MEM_P (target)
6037 || count <= 2
6038 || (host_integerp (TYPE_SIZE (elttype), 1)
6039 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
6040 <= 40 * 8)))))
6041 {
6042 lo -= minelt; hi -= minelt;
6043 for (; lo <= hi; lo++)
6044 {
6045 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
6046
6047 if (MEM_P (target)
6048 && !MEM_KEEP_ALIAS_SET_P (target)
6049 && TREE_CODE (type) == ARRAY_TYPE
6050 && TYPE_NONALIASED_COMPONENT (type))
6051 {
6052 target = copy_rtx (target);
6053 MEM_KEEP_ALIAS_SET_P (target) = 1;
6054 }
6055
6056 store_constructor_field
6057 (target, bitsize, bitpos, mode, value, type, cleared,
6058 get_alias_set (elttype));
6059 }
6060 }
6061 else
6062 {
6063 rtx loop_start = gen_label_rtx ();
6064 rtx loop_end = gen_label_rtx ();
6065 tree exit_cond;
6066
6067 expand_normal (hi_index);
6068
6069 index = build_decl (EXPR_LOCATION (exp),
6070 VAR_DECL, NULL_TREE, domain);
6071 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6072 SET_DECL_RTL (index, index_r);
6073 store_expr (lo_index, index_r, 0, false);
6074
6075 /* Build the head of the loop. */
6076 do_pending_stack_adjust ();
6077 emit_label (loop_start);
6078
6079 /* Assign value to element index. */
6080 position =
6081 fold_convert (ssizetype,
6082 fold_build2 (MINUS_EXPR,
6083 TREE_TYPE (index),
6084 index,
6085 TYPE_MIN_VALUE (domain)));
6086
6087 position =
6088 size_binop (MULT_EXPR, position,
6089 fold_convert (ssizetype,
6090 TYPE_SIZE_UNIT (elttype)));
6091
6092 pos_rtx = expand_normal (position);
6093 xtarget = offset_address (target, pos_rtx,
6094 highest_pow2_factor (position));
6095 xtarget = adjust_address (xtarget, mode, 0);
6096 if (TREE_CODE (value) == CONSTRUCTOR)
6097 store_constructor (value, xtarget, cleared,
6098 bitsize / BITS_PER_UNIT);
6099 else
6100 store_expr (value, xtarget, 0, false);
6101
6102 /* Generate a conditional jump to exit the loop. */
6103 exit_cond = build2 (LT_EXPR, integer_type_node,
6104 index, hi_index);
6105 jumpif (exit_cond, loop_end, -1);
6106
6107 /* Update the loop counter, and jump to the head of
6108 the loop. */
6109 expand_assignment (index,
6110 build2 (PLUS_EXPR, TREE_TYPE (index),
6111 index, integer_one_node),
6112 false);
6113
6114 emit_jump (loop_start);
6115
6116 /* Build the end of the loop. */
6117 emit_label (loop_end);
6118 }
6119 }
6120 else if ((index != 0 && ! host_integerp (index, 0))
6121 || ! host_integerp (TYPE_SIZE (elttype), 1))
6122 {
6123 tree position;
6124
6125 if (index == 0)
6126 index = ssize_int (1);
6127
6128 if (minelt)
6129 index = fold_convert (ssizetype,
6130 fold_build2 (MINUS_EXPR,
6131 TREE_TYPE (index),
6132 index,
6133 TYPE_MIN_VALUE (domain)));
6134
6135 position =
6136 size_binop (MULT_EXPR, index,
6137 fold_convert (ssizetype,
6138 TYPE_SIZE_UNIT (elttype)));
6139 xtarget = offset_address (target,
6140 expand_normal (position),
6141 highest_pow2_factor (position));
6142 xtarget = adjust_address (xtarget, mode, 0);
6143 store_expr (value, xtarget, 0, false);
6144 }
6145 else
6146 {
6147 if (index != 0)
6148 bitpos = ((tree_low_cst (index, 0) - minelt)
6149 * tree_low_cst (TYPE_SIZE (elttype), 1));
6150 else
6151 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
6152
6153 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6154 && TREE_CODE (type) == ARRAY_TYPE
6155 && TYPE_NONALIASED_COMPONENT (type))
6156 {
6157 target = copy_rtx (target);
6158 MEM_KEEP_ALIAS_SET_P (target) = 1;
6159 }
6160 store_constructor_field (target, bitsize, bitpos, mode, value,
6161 type, cleared, get_alias_set (elttype));
6162 }
6163 }
6164 break;
6165 }
6166
6167 case VECTOR_TYPE:
6168 {
6169 unsigned HOST_WIDE_INT idx;
6170 constructor_elt *ce;
6171 int i;
6172 int need_to_clear;
6173 int icode = 0;
6174 tree elttype = TREE_TYPE (type);
6175 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
6176 enum machine_mode eltmode = TYPE_MODE (elttype);
6177 HOST_WIDE_INT bitsize;
6178 HOST_WIDE_INT bitpos;
6179 rtvec vector = NULL;
6180 unsigned n_elts;
6181 alias_set_type alias;
6182
6183 gcc_assert (eltmode != BLKmode);
6184
6185 n_elts = TYPE_VECTOR_SUBPARTS (type);
6186 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6187 {
6188 enum machine_mode mode = GET_MODE (target);
6189
6190 icode = (int) optab_handler (vec_init_optab, mode);
6191 if (icode != CODE_FOR_nothing)
6192 {
6193 unsigned int i;
6194
6195 vector = rtvec_alloc (n_elts);
6196 for (i = 0; i < n_elts; i++)
6197 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6198 }
6199 }
6200
6201 /* If the constructor has fewer elements than the vector,
6202 clear the whole array first. Similarly if this is static
6203 constructor of a non-BLKmode object. */
6204 if (cleared)
6205 need_to_clear = 0;
6206 else if (REG_P (target) && TREE_STATIC (exp))
6207 need_to_clear = 1;
6208 else
6209 {
6210 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6211 tree value;
6212
6213 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6214 {
6215 int n_elts_here = tree_low_cst
6216 (int_const_binop (TRUNC_DIV_EXPR,
6217 TYPE_SIZE (TREE_TYPE (value)),
6218 TYPE_SIZE (elttype)), 1);
6219
6220 count += n_elts_here;
6221 if (mostly_zeros_p (value))
6222 zero_count += n_elts_here;
6223 }
6224
6225 /* Clear the entire vector first if there are any missing elements,
6226 or if the incidence of zero elements is >= 75%. */
6227 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6228 }
6229
6230 if (need_to_clear && size > 0 && !vector)
6231 {
6232 if (REG_P (target))
6233 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6234 else
6235 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6236 cleared = 1;
6237 }
6238
6239 /* Inform later passes that the old value is dead. */
6240 if (!cleared && !vector && REG_P (target))
6241 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6242
6243 if (MEM_P (target))
6244 alias = MEM_ALIAS_SET (target);
6245 else
6246 alias = get_alias_set (elttype);
6247
6248 /* Store each element of the constructor into the corresponding
6249 element of TARGET, determined by counting the elements. */
6250 for (idx = 0, i = 0;
6251 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6252 idx++, i += bitsize / elt_size)
6253 {
6254 HOST_WIDE_INT eltpos;
6255 tree value = ce->value;
6256
6257 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6258 if (cleared && initializer_zerop (value))
6259 continue;
6260
6261 if (ce->index)
6262 eltpos = tree_low_cst (ce->index, 1);
6263 else
6264 eltpos = i;
6265
6266 if (vector)
6267 {
6268 /* Vector CONSTRUCTORs should only be built from smaller
6269 vectors in the case of BLKmode vectors. */
6270 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6271 RTVEC_ELT (vector, eltpos)
6272 = expand_normal (value);
6273 }
6274 else
6275 {
6276 enum machine_mode value_mode =
6277 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6278 ? TYPE_MODE (TREE_TYPE (value))
6279 : eltmode;
6280 bitpos = eltpos * elt_size;
6281 store_constructor_field (target, bitsize, bitpos,
6282 value_mode, value, type,
6283 cleared, alias);
6284 }
6285 }
6286
6287 if (vector)
6288 emit_insn (GEN_FCN (icode)
6289 (target,
6290 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6291 break;
6292 }
6293
6294 default:
6295 gcc_unreachable ();
6296 }
6297 }
6298
6299 /* Store the value of EXP (an expression tree)
6300 into a subfield of TARGET which has mode MODE and occupies
6301 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6302 If MODE is VOIDmode, it means that we are storing into a bit-field.
6303
6304 BITREGION_START is bitpos of the first bitfield in this region.
6305 BITREGION_END is the bitpos of the ending bitfield in this region.
6306 These two fields are 0, if the C++ memory model does not apply,
6307 or we are not interested in keeping track of bitfield regions.
6308
6309 Always return const0_rtx unless we have something particular to
6310 return.
6311
6312 TYPE is the type of the underlying object,
6313
6314 ALIAS_SET is the alias set for the destination. This value will
6315 (in general) be different from that for TARGET, since TARGET is a
6316 reference to the containing structure.
6317
6318 If NONTEMPORAL is true, try generating a nontemporal store. */
6319
6320 static rtx
6321 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6322 unsigned HOST_WIDE_INT bitregion_start,
6323 unsigned HOST_WIDE_INT bitregion_end,
6324 enum machine_mode mode, tree exp, tree type,
6325 alias_set_type alias_set, bool nontemporal)
6326 {
6327 if (TREE_CODE (exp) == ERROR_MARK)
6328 return const0_rtx;
6329
6330 /* If we have nothing to store, do nothing unless the expression has
6331 side-effects. */
6332 if (bitsize == 0)
6333 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6334
6335 /* If we are storing into an unaligned field of an aligned union that is
6336 in a register, we may have the mode of TARGET being an integer mode but
6337 MODE == BLKmode. In that case, get an aligned object whose size and
6338 alignment are the same as TARGET and store TARGET into it (we can avoid
6339 the store if the field being stored is the entire width of TARGET). Then
6340 call ourselves recursively to store the field into a BLKmode version of
6341 that object. Finally, load from the object into TARGET. This is not
6342 very efficient in general, but should only be slightly more expensive
6343 than the otherwise-required unaligned accesses. Perhaps this can be
6344 cleaned up later. It's tempting to make OBJECT readonly, but it's set
6345 twice, once with emit_move_insn and once via store_field. */
6346
6347 if (mode == BLKmode
6348 && (REG_P (target) || GET_CODE (target) == SUBREG))
6349 {
6350 rtx object = assign_temp (type, 0, 1, 1);
6351 rtx blk_object = adjust_address (object, BLKmode, 0);
6352
6353 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
6354 emit_move_insn (object, target);
6355
6356 store_field (blk_object, bitsize, bitpos,
6357 bitregion_start, bitregion_end,
6358 mode, exp, type, MEM_ALIAS_SET (blk_object), nontemporal);
6359
6360 emit_move_insn (target, object);
6361
6362 /* We want to return the BLKmode version of the data. */
6363 return blk_object;
6364 }
6365
6366 if (GET_CODE (target) == CONCAT)
6367 {
6368 /* We're storing into a struct containing a single __complex. */
6369
6370 gcc_assert (!bitpos);
6371 return store_expr (exp, target, 0, nontemporal);
6372 }
6373
6374 /* If the structure is in a register or if the component
6375 is a bit field, we cannot use addressing to access it.
6376 Use bit-field techniques or SUBREG to store in it. */
6377
6378 if (mode == VOIDmode
6379 || (mode != BLKmode && ! direct_store[(int) mode]
6380 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6381 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6382 || REG_P (target)
6383 || GET_CODE (target) == SUBREG
6384 /* If the field isn't aligned enough to store as an ordinary memref,
6385 store it as a bit field. */
6386 || (mode != BLKmode
6387 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6388 || bitpos % GET_MODE_ALIGNMENT (mode))
6389 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6390 || (bitpos % BITS_PER_UNIT != 0)))
6391 || (bitsize >= 0 && mode != BLKmode
6392 && GET_MODE_BITSIZE (mode) > bitsize)
6393 /* If the RHS and field are a constant size and the size of the
6394 RHS isn't the same size as the bitfield, we must use bitfield
6395 operations. */
6396 || (bitsize >= 0
6397 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6398 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6399 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6400 decl we must use bitfield operations. */
6401 || (bitsize >= 0
6402 && TREE_CODE (exp) == MEM_REF
6403 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6404 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6405 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6406 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6407 {
6408 rtx temp;
6409 gimple nop_def;
6410
6411 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6412 implies a mask operation. If the precision is the same size as
6413 the field we're storing into, that mask is redundant. This is
6414 particularly common with bit field assignments generated by the
6415 C front end. */
6416 nop_def = get_def_for_expr (exp, NOP_EXPR);
6417 if (nop_def)
6418 {
6419 tree type = TREE_TYPE (exp);
6420 if (INTEGRAL_TYPE_P (type)
6421 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6422 && bitsize == TYPE_PRECISION (type))
6423 {
6424 tree op = gimple_assign_rhs1 (nop_def);
6425 type = TREE_TYPE (op);
6426 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6427 exp = op;
6428 }
6429 }
6430
6431 temp = expand_normal (exp);
6432
6433 /* If BITSIZE is narrower than the size of the type of EXP
6434 we will be narrowing TEMP. Normally, what's wanted are the
6435 low-order bits. However, if EXP's type is a record and this is
6436 big-endian machine, we want the upper BITSIZE bits. */
6437 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6438 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6439 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6440 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6441 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6442 NULL_RTX, 1);
6443
6444 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
6445 MODE. */
6446 if (mode != VOIDmode && mode != BLKmode
6447 && mode != TYPE_MODE (TREE_TYPE (exp)))
6448 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6449
6450 /* If the modes of TEMP and TARGET are both BLKmode, both
6451 must be in memory and BITPOS must be aligned on a byte
6452 boundary. If so, we simply do a block copy. Likewise
6453 for a BLKmode-like TARGET. */
6454 if (GET_MODE (temp) == BLKmode
6455 && (GET_MODE (target) == BLKmode
6456 || (MEM_P (target)
6457 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6458 && (bitpos % BITS_PER_UNIT) == 0
6459 && (bitsize % BITS_PER_UNIT) == 0)))
6460 {
6461 gcc_assert (MEM_P (target) && MEM_P (temp)
6462 && (bitpos % BITS_PER_UNIT) == 0);
6463
6464 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6465 emit_block_move (target, temp,
6466 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6467 / BITS_PER_UNIT),
6468 BLOCK_OP_NORMAL);
6469
6470 return const0_rtx;
6471 }
6472
6473 /* Store the value in the bitfield. */
6474 store_bit_field (target, bitsize, bitpos,
6475 bitregion_start, bitregion_end,
6476 mode, temp);
6477
6478 return const0_rtx;
6479 }
6480 else
6481 {
6482 /* Now build a reference to just the desired component. */
6483 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6484
6485 if (to_rtx == target)
6486 to_rtx = copy_rtx (to_rtx);
6487
6488 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6489 set_mem_alias_set (to_rtx, alias_set);
6490
6491 return store_expr (exp, to_rtx, 0, nontemporal);
6492 }
6493 }
6494 \f
6495 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6496 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6497 codes and find the ultimate containing object, which we return.
6498
6499 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6500 bit position, and *PUNSIGNEDP to the signedness of the field.
6501 If the position of the field is variable, we store a tree
6502 giving the variable offset (in units) in *POFFSET.
6503 This offset is in addition to the bit position.
6504 If the position is not variable, we store 0 in *POFFSET.
6505
6506 If any of the extraction expressions is volatile,
6507 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6508
6509 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6510 Otherwise, it is a mode that can be used to access the field.
6511
6512 If the field describes a variable-sized object, *PMODE is set to
6513 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6514 this case, but the address of the object can be found.
6515
6516 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6517 look through nodes that serve as markers of a greater alignment than
6518 the one that can be deduced from the expression. These nodes make it
6519 possible for front-ends to prevent temporaries from being created by
6520 the middle-end on alignment considerations. For that purpose, the
6521 normal operating mode at high-level is to always pass FALSE so that
6522 the ultimate containing object is really returned; moreover, the
6523 associated predicate handled_component_p will always return TRUE
6524 on these nodes, thus indicating that they are essentially handled
6525 by get_inner_reference. TRUE should only be passed when the caller
6526 is scanning the expression in order to build another representation
6527 and specifically knows how to handle these nodes; as such, this is
6528 the normal operating mode in the RTL expanders. */
6529
6530 tree
6531 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6532 HOST_WIDE_INT *pbitpos, tree *poffset,
6533 enum machine_mode *pmode, int *punsignedp,
6534 int *pvolatilep, bool keep_aligning)
6535 {
6536 tree size_tree = 0;
6537 enum machine_mode mode = VOIDmode;
6538 bool blkmode_bitfield = false;
6539 tree offset = size_zero_node;
6540 double_int bit_offset = double_int_zero;
6541
6542 /* First get the mode, signedness, and size. We do this from just the
6543 outermost expression. */
6544 *pbitsize = -1;
6545 if (TREE_CODE (exp) == COMPONENT_REF)
6546 {
6547 tree field = TREE_OPERAND (exp, 1);
6548 size_tree = DECL_SIZE (field);
6549 if (!DECL_BIT_FIELD (field))
6550 mode = DECL_MODE (field);
6551 else if (DECL_MODE (field) == BLKmode)
6552 blkmode_bitfield = true;
6553 else if (TREE_THIS_VOLATILE (exp)
6554 && flag_strict_volatile_bitfields > 0)
6555 /* Volatile bitfields should be accessed in the mode of the
6556 field's type, not the mode computed based on the bit
6557 size. */
6558 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6559
6560 *punsignedp = DECL_UNSIGNED (field);
6561 }
6562 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6563 {
6564 size_tree = TREE_OPERAND (exp, 1);
6565 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6566 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6567
6568 /* For vector types, with the correct size of access, use the mode of
6569 inner type. */
6570 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6571 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6572 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6573 mode = TYPE_MODE (TREE_TYPE (exp));
6574 }
6575 else
6576 {
6577 mode = TYPE_MODE (TREE_TYPE (exp));
6578 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6579
6580 if (mode == BLKmode)
6581 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6582 else
6583 *pbitsize = GET_MODE_BITSIZE (mode);
6584 }
6585
6586 if (size_tree != 0)
6587 {
6588 if (! host_integerp (size_tree, 1))
6589 mode = BLKmode, *pbitsize = -1;
6590 else
6591 *pbitsize = tree_low_cst (size_tree, 1);
6592 }
6593
6594 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6595 and find the ultimate containing object. */
6596 while (1)
6597 {
6598 switch (TREE_CODE (exp))
6599 {
6600 case BIT_FIELD_REF:
6601 bit_offset
6602 = double_int_add (bit_offset,
6603 tree_to_double_int (TREE_OPERAND (exp, 2)));
6604 break;
6605
6606 case COMPONENT_REF:
6607 {
6608 tree field = TREE_OPERAND (exp, 1);
6609 tree this_offset = component_ref_field_offset (exp);
6610
6611 /* If this field hasn't been filled in yet, don't go past it.
6612 This should only happen when folding expressions made during
6613 type construction. */
6614 if (this_offset == 0)
6615 break;
6616
6617 offset = size_binop (PLUS_EXPR, offset, this_offset);
6618 bit_offset = double_int_add (bit_offset,
6619 tree_to_double_int
6620 (DECL_FIELD_BIT_OFFSET (field)));
6621
6622 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6623 }
6624 break;
6625
6626 case ARRAY_REF:
6627 case ARRAY_RANGE_REF:
6628 {
6629 tree index = TREE_OPERAND (exp, 1);
6630 tree low_bound = array_ref_low_bound (exp);
6631 tree unit_size = array_ref_element_size (exp);
6632
6633 /* We assume all arrays have sizes that are a multiple of a byte.
6634 First subtract the lower bound, if any, in the type of the
6635 index, then convert to sizetype and multiply by the size of
6636 the array element. */
6637 if (! integer_zerop (low_bound))
6638 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6639 index, low_bound);
6640
6641 offset = size_binop (PLUS_EXPR, offset,
6642 size_binop (MULT_EXPR,
6643 fold_convert (sizetype, index),
6644 unit_size));
6645 }
6646 break;
6647
6648 case REALPART_EXPR:
6649 break;
6650
6651 case IMAGPART_EXPR:
6652 bit_offset = double_int_add (bit_offset,
6653 uhwi_to_double_int (*pbitsize));
6654 break;
6655
6656 case VIEW_CONVERT_EXPR:
6657 if (keep_aligning && STRICT_ALIGNMENT
6658 && (TYPE_ALIGN (TREE_TYPE (exp))
6659 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6660 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6661 < BIGGEST_ALIGNMENT)
6662 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6663 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6664 goto done;
6665 break;
6666
6667 case MEM_REF:
6668 /* Hand back the decl for MEM[&decl, off]. */
6669 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6670 {
6671 tree off = TREE_OPERAND (exp, 1);
6672 if (!integer_zerop (off))
6673 {
6674 double_int boff, coff = mem_ref_offset (exp);
6675 boff = double_int_lshift (coff,
6676 BITS_PER_UNIT == 8
6677 ? 3 : exact_log2 (BITS_PER_UNIT),
6678 HOST_BITS_PER_DOUBLE_INT, true);
6679 bit_offset = double_int_add (bit_offset, boff);
6680 }
6681 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6682 }
6683 goto done;
6684
6685 default:
6686 goto done;
6687 }
6688
6689 /* If any reference in the chain is volatile, the effect is volatile. */
6690 if (TREE_THIS_VOLATILE (exp))
6691 *pvolatilep = 1;
6692
6693 exp = TREE_OPERAND (exp, 0);
6694 }
6695 done:
6696
6697 /* If OFFSET is constant, see if we can return the whole thing as a
6698 constant bit position. Make sure to handle overflow during
6699 this conversion. */
6700 if (TREE_CODE (offset) == INTEGER_CST)
6701 {
6702 double_int tem = tree_to_double_int (offset);
6703 tem = double_int_sext (tem, TYPE_PRECISION (sizetype));
6704 tem = double_int_lshift (tem,
6705 BITS_PER_UNIT == 8
6706 ? 3 : exact_log2 (BITS_PER_UNIT),
6707 HOST_BITS_PER_DOUBLE_INT, true);
6708 tem = double_int_add (tem, bit_offset);
6709 if (double_int_fits_in_shwi_p (tem))
6710 {
6711 *pbitpos = double_int_to_shwi (tem);
6712 *poffset = offset = NULL_TREE;
6713 }
6714 }
6715
6716 /* Otherwise, split it up. */
6717 if (offset)
6718 {
6719 /* Avoid returning a negative bitpos as this may wreak havoc later. */
6720 if (double_int_negative_p (bit_offset))
6721 {
6722 double_int mask
6723 = double_int_mask (BITS_PER_UNIT == 8
6724 ? 3 : exact_log2 (BITS_PER_UNIT));
6725 double_int tem = double_int_and_not (bit_offset, mask);
6726 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
6727 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
6728 bit_offset = double_int_sub (bit_offset, tem);
6729 tem = double_int_rshift (tem,
6730 BITS_PER_UNIT == 8
6731 ? 3 : exact_log2 (BITS_PER_UNIT),
6732 HOST_BITS_PER_DOUBLE_INT, true);
6733 offset = size_binop (PLUS_EXPR, offset,
6734 double_int_to_tree (sizetype, tem));
6735 }
6736
6737 *pbitpos = double_int_to_shwi (bit_offset);
6738 *poffset = offset;
6739 }
6740
6741 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6742 if (mode == VOIDmode
6743 && blkmode_bitfield
6744 && (*pbitpos % BITS_PER_UNIT) == 0
6745 && (*pbitsize % BITS_PER_UNIT) == 0)
6746 *pmode = BLKmode;
6747 else
6748 *pmode = mode;
6749
6750 return exp;
6751 }
6752
6753 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6754 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6755 EXP is marked as PACKED. */
6756
6757 bool
6758 contains_packed_reference (const_tree exp)
6759 {
6760 bool packed_p = false;
6761
6762 while (1)
6763 {
6764 switch (TREE_CODE (exp))
6765 {
6766 case COMPONENT_REF:
6767 {
6768 tree field = TREE_OPERAND (exp, 1);
6769 packed_p = DECL_PACKED (field)
6770 || TYPE_PACKED (TREE_TYPE (field))
6771 || TYPE_PACKED (TREE_TYPE (exp));
6772 if (packed_p)
6773 goto done;
6774 }
6775 break;
6776
6777 case BIT_FIELD_REF:
6778 case ARRAY_REF:
6779 case ARRAY_RANGE_REF:
6780 case REALPART_EXPR:
6781 case IMAGPART_EXPR:
6782 case VIEW_CONVERT_EXPR:
6783 break;
6784
6785 default:
6786 goto done;
6787 }
6788 exp = TREE_OPERAND (exp, 0);
6789 }
6790 done:
6791 return packed_p;
6792 }
6793
6794 /* Return a tree of sizetype representing the size, in bytes, of the element
6795 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6796
6797 tree
6798 array_ref_element_size (tree exp)
6799 {
6800 tree aligned_size = TREE_OPERAND (exp, 3);
6801 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6802 location_t loc = EXPR_LOCATION (exp);
6803
6804 /* If a size was specified in the ARRAY_REF, it's the size measured
6805 in alignment units of the element type. So multiply by that value. */
6806 if (aligned_size)
6807 {
6808 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6809 sizetype from another type of the same width and signedness. */
6810 if (TREE_TYPE (aligned_size) != sizetype)
6811 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6812 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6813 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6814 }
6815
6816 /* Otherwise, take the size from that of the element type. Substitute
6817 any PLACEHOLDER_EXPR that we have. */
6818 else
6819 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6820 }
6821
6822 /* Return a tree representing the lower bound of the array mentioned in
6823 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6824
6825 tree
6826 array_ref_low_bound (tree exp)
6827 {
6828 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6829
6830 /* If a lower bound is specified in EXP, use it. */
6831 if (TREE_OPERAND (exp, 2))
6832 return TREE_OPERAND (exp, 2);
6833
6834 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6835 substituting for a PLACEHOLDER_EXPR as needed. */
6836 if (domain_type && TYPE_MIN_VALUE (domain_type))
6837 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6838
6839 /* Otherwise, return a zero of the appropriate type. */
6840 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6841 }
6842
6843 /* Return a tree representing the upper bound of the array mentioned in
6844 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6845
6846 tree
6847 array_ref_up_bound (tree exp)
6848 {
6849 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6850
6851 /* If there is a domain type and it has an upper bound, use it, substituting
6852 for a PLACEHOLDER_EXPR as needed. */
6853 if (domain_type && TYPE_MAX_VALUE (domain_type))
6854 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6855
6856 /* Otherwise fail. */
6857 return NULL_TREE;
6858 }
6859
6860 /* Return a tree representing the offset, in bytes, of the field referenced
6861 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6862
6863 tree
6864 component_ref_field_offset (tree exp)
6865 {
6866 tree aligned_offset = TREE_OPERAND (exp, 2);
6867 tree field = TREE_OPERAND (exp, 1);
6868 location_t loc = EXPR_LOCATION (exp);
6869
6870 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6871 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6872 value. */
6873 if (aligned_offset)
6874 {
6875 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6876 sizetype from another type of the same width and signedness. */
6877 if (TREE_TYPE (aligned_offset) != sizetype)
6878 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6879 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6880 size_int (DECL_OFFSET_ALIGN (field)
6881 / BITS_PER_UNIT));
6882 }
6883
6884 /* Otherwise, take the offset from that of the field. Substitute
6885 any PLACEHOLDER_EXPR that we have. */
6886 else
6887 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6888 }
6889
6890 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6891
6892 static unsigned HOST_WIDE_INT
6893 target_align (const_tree target)
6894 {
6895 /* We might have a chain of nested references with intermediate misaligning
6896 bitfields components, so need to recurse to find out. */
6897
6898 unsigned HOST_WIDE_INT this_align, outer_align;
6899
6900 switch (TREE_CODE (target))
6901 {
6902 case BIT_FIELD_REF:
6903 return 1;
6904
6905 case COMPONENT_REF:
6906 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6907 outer_align = target_align (TREE_OPERAND (target, 0));
6908 return MIN (this_align, outer_align);
6909
6910 case ARRAY_REF:
6911 case ARRAY_RANGE_REF:
6912 this_align = TYPE_ALIGN (TREE_TYPE (target));
6913 outer_align = target_align (TREE_OPERAND (target, 0));
6914 return MIN (this_align, outer_align);
6915
6916 CASE_CONVERT:
6917 case NON_LVALUE_EXPR:
6918 case VIEW_CONVERT_EXPR:
6919 this_align = TYPE_ALIGN (TREE_TYPE (target));
6920 outer_align = target_align (TREE_OPERAND (target, 0));
6921 return MAX (this_align, outer_align);
6922
6923 default:
6924 return TYPE_ALIGN (TREE_TYPE (target));
6925 }
6926 }
6927
6928 \f
6929 /* Given an rtx VALUE that may contain additions and multiplications, return
6930 an equivalent value that just refers to a register, memory, or constant.
6931 This is done by generating instructions to perform the arithmetic and
6932 returning a pseudo-register containing the value.
6933
6934 The returned value may be a REG, SUBREG, MEM or constant. */
6935
6936 rtx
6937 force_operand (rtx value, rtx target)
6938 {
6939 rtx op1, op2;
6940 /* Use subtarget as the target for operand 0 of a binary operation. */
6941 rtx subtarget = get_subtarget (target);
6942 enum rtx_code code = GET_CODE (value);
6943
6944 /* Check for subreg applied to an expression produced by loop optimizer. */
6945 if (code == SUBREG
6946 && !REG_P (SUBREG_REG (value))
6947 && !MEM_P (SUBREG_REG (value)))
6948 {
6949 value
6950 = simplify_gen_subreg (GET_MODE (value),
6951 force_reg (GET_MODE (SUBREG_REG (value)),
6952 force_operand (SUBREG_REG (value),
6953 NULL_RTX)),
6954 GET_MODE (SUBREG_REG (value)),
6955 SUBREG_BYTE (value));
6956 code = GET_CODE (value);
6957 }
6958
6959 /* Check for a PIC address load. */
6960 if ((code == PLUS || code == MINUS)
6961 && XEXP (value, 0) == pic_offset_table_rtx
6962 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6963 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6964 || GET_CODE (XEXP (value, 1)) == CONST))
6965 {
6966 if (!subtarget)
6967 subtarget = gen_reg_rtx (GET_MODE (value));
6968 emit_move_insn (subtarget, value);
6969 return subtarget;
6970 }
6971
6972 if (ARITHMETIC_P (value))
6973 {
6974 op2 = XEXP (value, 1);
6975 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6976 subtarget = 0;
6977 if (code == MINUS && CONST_INT_P (op2))
6978 {
6979 code = PLUS;
6980 op2 = negate_rtx (GET_MODE (value), op2);
6981 }
6982
6983 /* Check for an addition with OP2 a constant integer and our first
6984 operand a PLUS of a virtual register and something else. In that
6985 case, we want to emit the sum of the virtual register and the
6986 constant first and then add the other value. This allows virtual
6987 register instantiation to simply modify the constant rather than
6988 creating another one around this addition. */
6989 if (code == PLUS && CONST_INT_P (op2)
6990 && GET_CODE (XEXP (value, 0)) == PLUS
6991 && REG_P (XEXP (XEXP (value, 0), 0))
6992 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6993 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6994 {
6995 rtx temp = expand_simple_binop (GET_MODE (value), code,
6996 XEXP (XEXP (value, 0), 0), op2,
6997 subtarget, 0, OPTAB_LIB_WIDEN);
6998 return expand_simple_binop (GET_MODE (value), code, temp,
6999 force_operand (XEXP (XEXP (value,
7000 0), 1), 0),
7001 target, 0, OPTAB_LIB_WIDEN);
7002 }
7003
7004 op1 = force_operand (XEXP (value, 0), subtarget);
7005 op2 = force_operand (op2, NULL_RTX);
7006 switch (code)
7007 {
7008 case MULT:
7009 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7010 case DIV:
7011 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7012 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7013 target, 1, OPTAB_LIB_WIDEN);
7014 else
7015 return expand_divmod (0,
7016 FLOAT_MODE_P (GET_MODE (value))
7017 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7018 GET_MODE (value), op1, op2, target, 0);
7019 case MOD:
7020 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7021 target, 0);
7022 case UDIV:
7023 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7024 target, 1);
7025 case UMOD:
7026 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7027 target, 1);
7028 case ASHIFTRT:
7029 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7030 target, 0, OPTAB_LIB_WIDEN);
7031 default:
7032 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7033 target, 1, OPTAB_LIB_WIDEN);
7034 }
7035 }
7036 if (UNARY_P (value))
7037 {
7038 if (!target)
7039 target = gen_reg_rtx (GET_MODE (value));
7040 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7041 switch (code)
7042 {
7043 case ZERO_EXTEND:
7044 case SIGN_EXTEND:
7045 case TRUNCATE:
7046 case FLOAT_EXTEND:
7047 case FLOAT_TRUNCATE:
7048 convert_move (target, op1, code == ZERO_EXTEND);
7049 return target;
7050
7051 case FIX:
7052 case UNSIGNED_FIX:
7053 expand_fix (target, op1, code == UNSIGNED_FIX);
7054 return target;
7055
7056 case FLOAT:
7057 case UNSIGNED_FLOAT:
7058 expand_float (target, op1, code == UNSIGNED_FLOAT);
7059 return target;
7060
7061 default:
7062 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7063 }
7064 }
7065
7066 #ifdef INSN_SCHEDULING
7067 /* On machines that have insn scheduling, we want all memory reference to be
7068 explicit, so we need to deal with such paradoxical SUBREGs. */
7069 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7070 value
7071 = simplify_gen_subreg (GET_MODE (value),
7072 force_reg (GET_MODE (SUBREG_REG (value)),
7073 force_operand (SUBREG_REG (value),
7074 NULL_RTX)),
7075 GET_MODE (SUBREG_REG (value)),
7076 SUBREG_BYTE (value));
7077 #endif
7078
7079 return value;
7080 }
7081 \f
7082 /* Subroutine of expand_expr: return nonzero iff there is no way that
7083 EXP can reference X, which is being modified. TOP_P is nonzero if this
7084 call is going to be used to determine whether we need a temporary
7085 for EXP, as opposed to a recursive call to this function.
7086
7087 It is always safe for this routine to return zero since it merely
7088 searches for optimization opportunities. */
7089
7090 int
7091 safe_from_p (const_rtx x, tree exp, int top_p)
7092 {
7093 rtx exp_rtl = 0;
7094 int i, nops;
7095
7096 if (x == 0
7097 /* If EXP has varying size, we MUST use a target since we currently
7098 have no way of allocating temporaries of variable size
7099 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7100 So we assume here that something at a higher level has prevented a
7101 clash. This is somewhat bogus, but the best we can do. Only
7102 do this when X is BLKmode and when we are at the top level. */
7103 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7104 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7105 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7106 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7107 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7108 != INTEGER_CST)
7109 && GET_MODE (x) == BLKmode)
7110 /* If X is in the outgoing argument area, it is always safe. */
7111 || (MEM_P (x)
7112 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7113 || (GET_CODE (XEXP (x, 0)) == PLUS
7114 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7115 return 1;
7116
7117 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7118 find the underlying pseudo. */
7119 if (GET_CODE (x) == SUBREG)
7120 {
7121 x = SUBREG_REG (x);
7122 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7123 return 0;
7124 }
7125
7126 /* Now look at our tree code and possibly recurse. */
7127 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7128 {
7129 case tcc_declaration:
7130 exp_rtl = DECL_RTL_IF_SET (exp);
7131 break;
7132
7133 case tcc_constant:
7134 return 1;
7135
7136 case tcc_exceptional:
7137 if (TREE_CODE (exp) == TREE_LIST)
7138 {
7139 while (1)
7140 {
7141 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7142 return 0;
7143 exp = TREE_CHAIN (exp);
7144 if (!exp)
7145 return 1;
7146 if (TREE_CODE (exp) != TREE_LIST)
7147 return safe_from_p (x, exp, 0);
7148 }
7149 }
7150 else if (TREE_CODE (exp) == CONSTRUCTOR)
7151 {
7152 constructor_elt *ce;
7153 unsigned HOST_WIDE_INT idx;
7154
7155 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
7156 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7157 || !safe_from_p (x, ce->value, 0))
7158 return 0;
7159 return 1;
7160 }
7161 else if (TREE_CODE (exp) == ERROR_MARK)
7162 return 1; /* An already-visited SAVE_EXPR? */
7163 else
7164 return 0;
7165
7166 case tcc_statement:
7167 /* The only case we look at here is the DECL_INITIAL inside a
7168 DECL_EXPR. */
7169 return (TREE_CODE (exp) != DECL_EXPR
7170 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7171 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7172 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7173
7174 case tcc_binary:
7175 case tcc_comparison:
7176 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7177 return 0;
7178 /* Fall through. */
7179
7180 case tcc_unary:
7181 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7182
7183 case tcc_expression:
7184 case tcc_reference:
7185 case tcc_vl_exp:
7186 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7187 the expression. If it is set, we conflict iff we are that rtx or
7188 both are in memory. Otherwise, we check all operands of the
7189 expression recursively. */
7190
7191 switch (TREE_CODE (exp))
7192 {
7193 case ADDR_EXPR:
7194 /* If the operand is static or we are static, we can't conflict.
7195 Likewise if we don't conflict with the operand at all. */
7196 if (staticp (TREE_OPERAND (exp, 0))
7197 || TREE_STATIC (exp)
7198 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7199 return 1;
7200
7201 /* Otherwise, the only way this can conflict is if we are taking
7202 the address of a DECL a that address if part of X, which is
7203 very rare. */
7204 exp = TREE_OPERAND (exp, 0);
7205 if (DECL_P (exp))
7206 {
7207 if (!DECL_RTL_SET_P (exp)
7208 || !MEM_P (DECL_RTL (exp)))
7209 return 0;
7210 else
7211 exp_rtl = XEXP (DECL_RTL (exp), 0);
7212 }
7213 break;
7214
7215 case MEM_REF:
7216 if (MEM_P (x)
7217 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7218 get_alias_set (exp)))
7219 return 0;
7220 break;
7221
7222 case CALL_EXPR:
7223 /* Assume that the call will clobber all hard registers and
7224 all of memory. */
7225 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7226 || MEM_P (x))
7227 return 0;
7228 break;
7229
7230 case WITH_CLEANUP_EXPR:
7231 case CLEANUP_POINT_EXPR:
7232 /* Lowered by gimplify.c. */
7233 gcc_unreachable ();
7234
7235 case SAVE_EXPR:
7236 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7237
7238 default:
7239 break;
7240 }
7241
7242 /* If we have an rtx, we do not need to scan our operands. */
7243 if (exp_rtl)
7244 break;
7245
7246 nops = TREE_OPERAND_LENGTH (exp);
7247 for (i = 0; i < nops; i++)
7248 if (TREE_OPERAND (exp, i) != 0
7249 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7250 return 0;
7251
7252 break;
7253
7254 case tcc_type:
7255 /* Should never get a type here. */
7256 gcc_unreachable ();
7257 }
7258
7259 /* If we have an rtl, find any enclosed object. Then see if we conflict
7260 with it. */
7261 if (exp_rtl)
7262 {
7263 if (GET_CODE (exp_rtl) == SUBREG)
7264 {
7265 exp_rtl = SUBREG_REG (exp_rtl);
7266 if (REG_P (exp_rtl)
7267 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7268 return 0;
7269 }
7270
7271 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7272 are memory and they conflict. */
7273 return ! (rtx_equal_p (x, exp_rtl)
7274 || (MEM_P (x) && MEM_P (exp_rtl)
7275 && true_dependence (exp_rtl, VOIDmode, x)));
7276 }
7277
7278 /* If we reach here, it is safe. */
7279 return 1;
7280 }
7281
7282 \f
7283 /* Return the highest power of two that EXP is known to be a multiple of.
7284 This is used in updating alignment of MEMs in array references. */
7285
7286 unsigned HOST_WIDE_INT
7287 highest_pow2_factor (const_tree exp)
7288 {
7289 unsigned HOST_WIDE_INT c0, c1;
7290
7291 switch (TREE_CODE (exp))
7292 {
7293 case INTEGER_CST:
7294 /* We can find the lowest bit that's a one. If the low
7295 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7296 We need to handle this case since we can find it in a COND_EXPR,
7297 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7298 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7299 later ICE. */
7300 if (TREE_OVERFLOW (exp))
7301 return BIGGEST_ALIGNMENT;
7302 else
7303 {
7304 /* Note: tree_low_cst is intentionally not used here,
7305 we don't care about the upper bits. */
7306 c0 = TREE_INT_CST_LOW (exp);
7307 c0 &= -c0;
7308 return c0 ? c0 : BIGGEST_ALIGNMENT;
7309 }
7310 break;
7311
7312 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7313 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7314 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7315 return MIN (c0, c1);
7316
7317 case MULT_EXPR:
7318 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7319 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7320 return c0 * c1;
7321
7322 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7323 case CEIL_DIV_EXPR:
7324 if (integer_pow2p (TREE_OPERAND (exp, 1))
7325 && host_integerp (TREE_OPERAND (exp, 1), 1))
7326 {
7327 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7328 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7329 return MAX (1, c0 / c1);
7330 }
7331 break;
7332
7333 case BIT_AND_EXPR:
7334 /* The highest power of two of a bit-and expression is the maximum of
7335 that of its operands. We typically get here for a complex LHS and
7336 a constant negative power of two on the RHS to force an explicit
7337 alignment, so don't bother looking at the LHS. */
7338 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7339
7340 CASE_CONVERT:
7341 case SAVE_EXPR:
7342 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7343
7344 case COMPOUND_EXPR:
7345 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7346
7347 case COND_EXPR:
7348 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7349 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7350 return MIN (c0, c1);
7351
7352 default:
7353 break;
7354 }
7355
7356 return 1;
7357 }
7358
7359 /* Similar, except that the alignment requirements of TARGET are
7360 taken into account. Assume it is at least as aligned as its
7361 type, unless it is a COMPONENT_REF in which case the layout of
7362 the structure gives the alignment. */
7363
7364 static unsigned HOST_WIDE_INT
7365 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7366 {
7367 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7368 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7369
7370 return MAX (factor, talign);
7371 }
7372 \f
7373 /* Subroutine of expand_expr. Expand the two operands of a binary
7374 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7375 The value may be stored in TARGET if TARGET is nonzero. The
7376 MODIFIER argument is as documented by expand_expr. */
7377
7378 static void
7379 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7380 enum expand_modifier modifier)
7381 {
7382 if (! safe_from_p (target, exp1, 1))
7383 target = 0;
7384 if (operand_equal_p (exp0, exp1, 0))
7385 {
7386 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7387 *op1 = copy_rtx (*op0);
7388 }
7389 else
7390 {
7391 /* If we need to preserve evaluation order, copy exp0 into its own
7392 temporary variable so that it can't be clobbered by exp1. */
7393 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7394 exp0 = save_expr (exp0);
7395 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7396 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7397 }
7398 }
7399
7400 \f
7401 /* Return a MEM that contains constant EXP. DEFER is as for
7402 output_constant_def and MODIFIER is as for expand_expr. */
7403
7404 static rtx
7405 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7406 {
7407 rtx mem;
7408
7409 mem = output_constant_def (exp, defer);
7410 if (modifier != EXPAND_INITIALIZER)
7411 mem = use_anchored_address (mem);
7412 return mem;
7413 }
7414
7415 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7416 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7417
7418 static rtx
7419 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7420 enum expand_modifier modifier, addr_space_t as)
7421 {
7422 rtx result, subtarget;
7423 tree inner, offset;
7424 HOST_WIDE_INT bitsize, bitpos;
7425 int volatilep, unsignedp;
7426 enum machine_mode mode1;
7427
7428 /* If we are taking the address of a constant and are at the top level,
7429 we have to use output_constant_def since we can't call force_const_mem
7430 at top level. */
7431 /* ??? This should be considered a front-end bug. We should not be
7432 generating ADDR_EXPR of something that isn't an LVALUE. The only
7433 exception here is STRING_CST. */
7434 if (CONSTANT_CLASS_P (exp))
7435 {
7436 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7437 if (modifier < EXPAND_SUM)
7438 result = force_operand (result, target);
7439 return result;
7440 }
7441
7442 /* Everything must be something allowed by is_gimple_addressable. */
7443 switch (TREE_CODE (exp))
7444 {
7445 case INDIRECT_REF:
7446 /* This case will happen via recursion for &a->b. */
7447 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7448
7449 case MEM_REF:
7450 {
7451 tree tem = TREE_OPERAND (exp, 0);
7452 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7453 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7454 return expand_expr (tem, target, tmode, modifier);
7455 }
7456
7457 case CONST_DECL:
7458 /* Expand the initializer like constants above. */
7459 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7460 0, modifier), 0);
7461 if (modifier < EXPAND_SUM)
7462 result = force_operand (result, target);
7463 return result;
7464
7465 case REALPART_EXPR:
7466 /* The real part of the complex number is always first, therefore
7467 the address is the same as the address of the parent object. */
7468 offset = 0;
7469 bitpos = 0;
7470 inner = TREE_OPERAND (exp, 0);
7471 break;
7472
7473 case IMAGPART_EXPR:
7474 /* The imaginary part of the complex number is always second.
7475 The expression is therefore always offset by the size of the
7476 scalar type. */
7477 offset = 0;
7478 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7479 inner = TREE_OPERAND (exp, 0);
7480 break;
7481
7482 default:
7483 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7484 expand_expr, as that can have various side effects; LABEL_DECLs for
7485 example, may not have their DECL_RTL set yet. Expand the rtl of
7486 CONSTRUCTORs too, which should yield a memory reference for the
7487 constructor's contents. Assume language specific tree nodes can
7488 be expanded in some interesting way. */
7489 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7490 if (DECL_P (exp)
7491 || TREE_CODE (exp) == CONSTRUCTOR
7492 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7493 {
7494 result = expand_expr (exp, target, tmode,
7495 modifier == EXPAND_INITIALIZER
7496 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7497
7498 /* If the DECL isn't in memory, then the DECL wasn't properly
7499 marked TREE_ADDRESSABLE, which will be either a front-end
7500 or a tree optimizer bug. */
7501
7502 if (TREE_ADDRESSABLE (exp)
7503 && ! MEM_P (result)
7504 && ! targetm.calls.allocate_stack_slots_for_args())
7505 {
7506 error ("local frame unavailable (naked function?)");
7507 return result;
7508 }
7509 else
7510 gcc_assert (MEM_P (result));
7511 result = XEXP (result, 0);
7512
7513 /* ??? Is this needed anymore? */
7514 if (DECL_P (exp) && !TREE_USED (exp) == 0)
7515 {
7516 assemble_external (exp);
7517 TREE_USED (exp) = 1;
7518 }
7519
7520 if (modifier != EXPAND_INITIALIZER
7521 && modifier != EXPAND_CONST_ADDRESS
7522 && modifier != EXPAND_SUM)
7523 result = force_operand (result, target);
7524 return result;
7525 }
7526
7527 /* Pass FALSE as the last argument to get_inner_reference although
7528 we are expanding to RTL. The rationale is that we know how to
7529 handle "aligning nodes" here: we can just bypass them because
7530 they won't change the final object whose address will be returned
7531 (they actually exist only for that purpose). */
7532 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7533 &mode1, &unsignedp, &volatilep, false);
7534 break;
7535 }
7536
7537 /* We must have made progress. */
7538 gcc_assert (inner != exp);
7539
7540 subtarget = offset || bitpos ? NULL_RTX : target;
7541 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7542 inner alignment, force the inner to be sufficiently aligned. */
7543 if (CONSTANT_CLASS_P (inner)
7544 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7545 {
7546 inner = copy_node (inner);
7547 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7548 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7549 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7550 }
7551 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7552
7553 if (offset)
7554 {
7555 rtx tmp;
7556
7557 if (modifier != EXPAND_NORMAL)
7558 result = force_operand (result, NULL);
7559 tmp = expand_expr (offset, NULL_RTX, tmode,
7560 modifier == EXPAND_INITIALIZER
7561 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7562
7563 result = convert_memory_address_addr_space (tmode, result, as);
7564 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7565
7566 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7567 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7568 else
7569 {
7570 subtarget = bitpos ? NULL_RTX : target;
7571 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7572 1, OPTAB_LIB_WIDEN);
7573 }
7574 }
7575
7576 if (bitpos)
7577 {
7578 /* Someone beforehand should have rejected taking the address
7579 of such an object. */
7580 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7581
7582 result = plus_constant (result, bitpos / BITS_PER_UNIT);
7583 if (modifier < EXPAND_SUM)
7584 result = force_operand (result, target);
7585 }
7586
7587 return result;
7588 }
7589
7590 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7591 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7592
7593 static rtx
7594 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7595 enum expand_modifier modifier)
7596 {
7597 addr_space_t as = ADDR_SPACE_GENERIC;
7598 enum machine_mode address_mode = Pmode;
7599 enum machine_mode pointer_mode = ptr_mode;
7600 enum machine_mode rmode;
7601 rtx result;
7602
7603 /* Target mode of VOIDmode says "whatever's natural". */
7604 if (tmode == VOIDmode)
7605 tmode = TYPE_MODE (TREE_TYPE (exp));
7606
7607 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7608 {
7609 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7610 address_mode = targetm.addr_space.address_mode (as);
7611 pointer_mode = targetm.addr_space.pointer_mode (as);
7612 }
7613
7614 /* We can get called with some Weird Things if the user does silliness
7615 like "(short) &a". In that case, convert_memory_address won't do
7616 the right thing, so ignore the given target mode. */
7617 if (tmode != address_mode && tmode != pointer_mode)
7618 tmode = address_mode;
7619
7620 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7621 tmode, modifier, as);
7622
7623 /* Despite expand_expr claims concerning ignoring TMODE when not
7624 strictly convenient, stuff breaks if we don't honor it. Note
7625 that combined with the above, we only do this for pointer modes. */
7626 rmode = GET_MODE (result);
7627 if (rmode == VOIDmode)
7628 rmode = tmode;
7629 if (rmode != tmode)
7630 result = convert_memory_address_addr_space (tmode, result, as);
7631
7632 return result;
7633 }
7634
7635 /* Generate code for computing CONSTRUCTOR EXP.
7636 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7637 is TRUE, instead of creating a temporary variable in memory
7638 NULL is returned and the caller needs to handle it differently. */
7639
7640 static rtx
7641 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7642 bool avoid_temp_mem)
7643 {
7644 tree type = TREE_TYPE (exp);
7645 enum machine_mode mode = TYPE_MODE (type);
7646
7647 /* Try to avoid creating a temporary at all. This is possible
7648 if all of the initializer is zero.
7649 FIXME: try to handle all [0..255] initializers we can handle
7650 with memset. */
7651 if (TREE_STATIC (exp)
7652 && !TREE_ADDRESSABLE (exp)
7653 && target != 0 && mode == BLKmode
7654 && all_zeros_p (exp))
7655 {
7656 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7657 return target;
7658 }
7659
7660 /* All elts simple constants => refer to a constant in memory. But
7661 if this is a non-BLKmode mode, let it store a field at a time
7662 since that should make a CONST_INT or CONST_DOUBLE when we
7663 fold. Likewise, if we have a target we can use, it is best to
7664 store directly into the target unless the type is large enough
7665 that memcpy will be used. If we are making an initializer and
7666 all operands are constant, put it in memory as well.
7667
7668 FIXME: Avoid trying to fill vector constructors piece-meal.
7669 Output them with output_constant_def below unless we're sure
7670 they're zeros. This should go away when vector initializers
7671 are treated like VECTOR_CST instead of arrays. */
7672 if ((TREE_STATIC (exp)
7673 && ((mode == BLKmode
7674 && ! (target != 0 && safe_from_p (target, exp, 1)))
7675 || TREE_ADDRESSABLE (exp)
7676 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7677 && (! MOVE_BY_PIECES_P
7678 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7679 TYPE_ALIGN (type)))
7680 && ! mostly_zeros_p (exp))))
7681 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7682 && TREE_CONSTANT (exp)))
7683 {
7684 rtx constructor;
7685
7686 if (avoid_temp_mem)
7687 return NULL_RTX;
7688
7689 constructor = expand_expr_constant (exp, 1, modifier);
7690
7691 if (modifier != EXPAND_CONST_ADDRESS
7692 && modifier != EXPAND_INITIALIZER
7693 && modifier != EXPAND_SUM)
7694 constructor = validize_mem (constructor);
7695
7696 return constructor;
7697 }
7698
7699 /* Handle calls that pass values in multiple non-contiguous
7700 locations. The Irix 6 ABI has examples of this. */
7701 if (target == 0 || ! safe_from_p (target, exp, 1)
7702 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7703 {
7704 if (avoid_temp_mem)
7705 return NULL_RTX;
7706
7707 target
7708 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7709 | (TREE_READONLY (exp)
7710 * TYPE_QUAL_CONST))),
7711 0, TREE_ADDRESSABLE (exp), 1);
7712 }
7713
7714 store_constructor (exp, target, 0, int_expr_size (exp));
7715 return target;
7716 }
7717
7718
7719 /* expand_expr: generate code for computing expression EXP.
7720 An rtx for the computed value is returned. The value is never null.
7721 In the case of a void EXP, const0_rtx is returned.
7722
7723 The value may be stored in TARGET if TARGET is nonzero.
7724 TARGET is just a suggestion; callers must assume that
7725 the rtx returned may not be the same as TARGET.
7726
7727 If TARGET is CONST0_RTX, it means that the value will be ignored.
7728
7729 If TMODE is not VOIDmode, it suggests generating the
7730 result in mode TMODE. But this is done only when convenient.
7731 Otherwise, TMODE is ignored and the value generated in its natural mode.
7732 TMODE is just a suggestion; callers must assume that
7733 the rtx returned may not have mode TMODE.
7734
7735 Note that TARGET may have neither TMODE nor MODE. In that case, it
7736 probably will not be used.
7737
7738 If MODIFIER is EXPAND_SUM then when EXP is an addition
7739 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7740 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7741 products as above, or REG or MEM, or constant.
7742 Ordinarily in such cases we would output mul or add instructions
7743 and then return a pseudo reg containing the sum.
7744
7745 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7746 it also marks a label as absolutely required (it can't be dead).
7747 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7748 This is used for outputting expressions used in initializers.
7749
7750 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7751 with a constant address even if that address is not normally legitimate.
7752 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7753
7754 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7755 a call parameter. Such targets require special care as we haven't yet
7756 marked TARGET so that it's safe from being trashed by libcalls. We
7757 don't want to use TARGET for anything but the final result;
7758 Intermediate values must go elsewhere. Additionally, calls to
7759 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7760
7761 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7762 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7763 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7764 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7765 recursively. */
7766
7767 rtx
7768 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7769 enum expand_modifier modifier, rtx *alt_rtl)
7770 {
7771 rtx ret;
7772
7773 /* Handle ERROR_MARK before anybody tries to access its type. */
7774 if (TREE_CODE (exp) == ERROR_MARK
7775 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7776 {
7777 ret = CONST0_RTX (tmode);
7778 return ret ? ret : const0_rtx;
7779 }
7780
7781 /* If this is an expression of some kind and it has an associated line
7782 number, then emit the line number before expanding the expression.
7783
7784 We need to save and restore the file and line information so that
7785 errors discovered during expansion are emitted with the right
7786 information. It would be better of the diagnostic routines
7787 used the file/line information embedded in the tree nodes rather
7788 than globals. */
7789 if (cfun && EXPR_HAS_LOCATION (exp))
7790 {
7791 location_t saved_location = input_location;
7792 location_t saved_curr_loc = get_curr_insn_source_location ();
7793 tree saved_block = get_curr_insn_block ();
7794 input_location = EXPR_LOCATION (exp);
7795 set_curr_insn_source_location (input_location);
7796
7797 /* Record where the insns produced belong. */
7798 set_curr_insn_block (TREE_BLOCK (exp));
7799
7800 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7801
7802 input_location = saved_location;
7803 set_curr_insn_block (saved_block);
7804 set_curr_insn_source_location (saved_curr_loc);
7805 }
7806 else
7807 {
7808 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7809 }
7810
7811 return ret;
7812 }
7813
7814 rtx
7815 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7816 enum expand_modifier modifier)
7817 {
7818 rtx op0, op1, op2, temp;
7819 tree type;
7820 int unsignedp;
7821 enum machine_mode mode;
7822 enum tree_code code = ops->code;
7823 optab this_optab;
7824 rtx subtarget, original_target;
7825 int ignore;
7826 bool reduce_bit_field;
7827 location_t loc = ops->location;
7828 tree treeop0, treeop1, treeop2;
7829 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7830 ? reduce_to_bit_field_precision ((expr), \
7831 target, \
7832 type) \
7833 : (expr))
7834
7835 type = ops->type;
7836 mode = TYPE_MODE (type);
7837 unsignedp = TYPE_UNSIGNED (type);
7838
7839 treeop0 = ops->op0;
7840 treeop1 = ops->op1;
7841 treeop2 = ops->op2;
7842
7843 /* We should be called only on simple (binary or unary) expressions,
7844 exactly those that are valid in gimple expressions that aren't
7845 GIMPLE_SINGLE_RHS (or invalid). */
7846 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7847 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7848 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7849
7850 ignore = (target == const0_rtx
7851 || ((CONVERT_EXPR_CODE_P (code)
7852 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7853 && TREE_CODE (type) == VOID_TYPE));
7854
7855 /* We should be called only if we need the result. */
7856 gcc_assert (!ignore);
7857
7858 /* An operation in what may be a bit-field type needs the
7859 result to be reduced to the precision of the bit-field type,
7860 which is narrower than that of the type's mode. */
7861 reduce_bit_field = (INTEGRAL_TYPE_P (type)
7862 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7863
7864 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7865 target = 0;
7866
7867 /* Use subtarget as the target for operand 0 of a binary operation. */
7868 subtarget = get_subtarget (target);
7869 original_target = target;
7870
7871 switch (code)
7872 {
7873 case NON_LVALUE_EXPR:
7874 case PAREN_EXPR:
7875 CASE_CONVERT:
7876 if (treeop0 == error_mark_node)
7877 return const0_rtx;
7878
7879 if (TREE_CODE (type) == UNION_TYPE)
7880 {
7881 tree valtype = TREE_TYPE (treeop0);
7882
7883 /* If both input and output are BLKmode, this conversion isn't doing
7884 anything except possibly changing memory attribute. */
7885 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7886 {
7887 rtx result = expand_expr (treeop0, target, tmode,
7888 modifier);
7889
7890 result = copy_rtx (result);
7891 set_mem_attributes (result, type, 0);
7892 return result;
7893 }
7894
7895 if (target == 0)
7896 {
7897 if (TYPE_MODE (type) != BLKmode)
7898 target = gen_reg_rtx (TYPE_MODE (type));
7899 else
7900 target = assign_temp (type, 0, 1, 1);
7901 }
7902
7903 if (MEM_P (target))
7904 /* Store data into beginning of memory target. */
7905 store_expr (treeop0,
7906 adjust_address (target, TYPE_MODE (valtype), 0),
7907 modifier == EXPAND_STACK_PARM,
7908 false);
7909
7910 else
7911 {
7912 gcc_assert (REG_P (target));
7913
7914 /* Store this field into a union of the proper type. */
7915 store_field (target,
7916 MIN ((int_size_in_bytes (TREE_TYPE
7917 (treeop0))
7918 * BITS_PER_UNIT),
7919 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7920 0, 0, 0, TYPE_MODE (valtype), treeop0,
7921 type, 0, false);
7922 }
7923
7924 /* Return the entire union. */
7925 return target;
7926 }
7927
7928 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
7929 {
7930 op0 = expand_expr (treeop0, target, VOIDmode,
7931 modifier);
7932
7933 /* If the signedness of the conversion differs and OP0 is
7934 a promoted SUBREG, clear that indication since we now
7935 have to do the proper extension. */
7936 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
7937 && GET_CODE (op0) == SUBREG)
7938 SUBREG_PROMOTED_VAR_P (op0) = 0;
7939
7940 return REDUCE_BIT_FIELD (op0);
7941 }
7942
7943 op0 = expand_expr (treeop0, NULL_RTX, mode,
7944 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
7945 if (GET_MODE (op0) == mode)
7946 ;
7947
7948 /* If OP0 is a constant, just convert it into the proper mode. */
7949 else if (CONSTANT_P (op0))
7950 {
7951 tree inner_type = TREE_TYPE (treeop0);
7952 enum machine_mode inner_mode = GET_MODE (op0);
7953
7954 if (inner_mode == VOIDmode)
7955 inner_mode = TYPE_MODE (inner_type);
7956
7957 if (modifier == EXPAND_INITIALIZER)
7958 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7959 subreg_lowpart_offset (mode,
7960 inner_mode));
7961 else
7962 op0= convert_modes (mode, inner_mode, op0,
7963 TYPE_UNSIGNED (inner_type));
7964 }
7965
7966 else if (modifier == EXPAND_INITIALIZER)
7967 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7968
7969 else if (target == 0)
7970 op0 = convert_to_mode (mode, op0,
7971 TYPE_UNSIGNED (TREE_TYPE
7972 (treeop0)));
7973 else
7974 {
7975 convert_move (target, op0,
7976 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7977 op0 = target;
7978 }
7979
7980 return REDUCE_BIT_FIELD (op0);
7981
7982 case ADDR_SPACE_CONVERT_EXPR:
7983 {
7984 tree treeop0_type = TREE_TYPE (treeop0);
7985 addr_space_t as_to;
7986 addr_space_t as_from;
7987
7988 gcc_assert (POINTER_TYPE_P (type));
7989 gcc_assert (POINTER_TYPE_P (treeop0_type));
7990
7991 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
7992 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
7993
7994 /* Conversions between pointers to the same address space should
7995 have been implemented via CONVERT_EXPR / NOP_EXPR. */
7996 gcc_assert (as_to != as_from);
7997
7998 /* Ask target code to handle conversion between pointers
7999 to overlapping address spaces. */
8000 if (targetm.addr_space.subset_p (as_to, as_from)
8001 || targetm.addr_space.subset_p (as_from, as_to))
8002 {
8003 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8004 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8005 gcc_assert (op0);
8006 return op0;
8007 }
8008
8009 /* For disjoint address spaces, converting anything but
8010 a null pointer invokes undefined behaviour. We simply
8011 always return a null pointer here. */
8012 return CONST0_RTX (mode);
8013 }
8014
8015 case POINTER_PLUS_EXPR:
8016 /* Even though the sizetype mode and the pointer's mode can be different
8017 expand is able to handle this correctly and get the correct result out
8018 of the PLUS_EXPR code. */
8019 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8020 if sizetype precision is smaller than pointer precision. */
8021 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8022 treeop1 = fold_convert_loc (loc, type,
8023 fold_convert_loc (loc, ssizetype,
8024 treeop1));
8025 case PLUS_EXPR:
8026 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8027 something else, make sure we add the register to the constant and
8028 then to the other thing. This case can occur during strength
8029 reduction and doing it this way will produce better code if the
8030 frame pointer or argument pointer is eliminated.
8031
8032 fold-const.c will ensure that the constant is always in the inner
8033 PLUS_EXPR, so the only case we need to do anything about is if
8034 sp, ap, or fp is our second argument, in which case we must swap
8035 the innermost first argument and our second argument. */
8036
8037 if (TREE_CODE (treeop0) == PLUS_EXPR
8038 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8039 && TREE_CODE (treeop1) == VAR_DECL
8040 && (DECL_RTL (treeop1) == frame_pointer_rtx
8041 || DECL_RTL (treeop1) == stack_pointer_rtx
8042 || DECL_RTL (treeop1) == arg_pointer_rtx))
8043 {
8044 tree t = treeop1;
8045
8046 treeop1 = TREE_OPERAND (treeop0, 0);
8047 TREE_OPERAND (treeop0, 0) = t;
8048 }
8049
8050 /* If the result is to be ptr_mode and we are adding an integer to
8051 something, we might be forming a constant. So try to use
8052 plus_constant. If it produces a sum and we can't accept it,
8053 use force_operand. This allows P = &ARR[const] to generate
8054 efficient code on machines where a SYMBOL_REF is not a valid
8055 address.
8056
8057 If this is an EXPAND_SUM call, always return the sum. */
8058 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8059 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8060 {
8061 if (modifier == EXPAND_STACK_PARM)
8062 target = 0;
8063 if (TREE_CODE (treeop0) == INTEGER_CST
8064 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8065 && TREE_CONSTANT (treeop1))
8066 {
8067 rtx constant_part;
8068
8069 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8070 EXPAND_SUM);
8071 /* Use immed_double_const to ensure that the constant is
8072 truncated according to the mode of OP1, then sign extended
8073 to a HOST_WIDE_INT. Using the constant directly can result
8074 in non-canonical RTL in a 64x32 cross compile. */
8075 constant_part
8076 = immed_double_const (TREE_INT_CST_LOW (treeop0),
8077 (HOST_WIDE_INT) 0,
8078 TYPE_MODE (TREE_TYPE (treeop1)));
8079 op1 = plus_constant (op1, INTVAL (constant_part));
8080 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8081 op1 = force_operand (op1, target);
8082 return REDUCE_BIT_FIELD (op1);
8083 }
8084
8085 else if (TREE_CODE (treeop1) == INTEGER_CST
8086 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8087 && TREE_CONSTANT (treeop0))
8088 {
8089 rtx constant_part;
8090
8091 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8092 (modifier == EXPAND_INITIALIZER
8093 ? EXPAND_INITIALIZER : EXPAND_SUM));
8094 if (! CONSTANT_P (op0))
8095 {
8096 op1 = expand_expr (treeop1, NULL_RTX,
8097 VOIDmode, modifier);
8098 /* Return a PLUS if modifier says it's OK. */
8099 if (modifier == EXPAND_SUM
8100 || modifier == EXPAND_INITIALIZER)
8101 return simplify_gen_binary (PLUS, mode, op0, op1);
8102 goto binop2;
8103 }
8104 /* Use immed_double_const to ensure that the constant is
8105 truncated according to the mode of OP1, then sign extended
8106 to a HOST_WIDE_INT. Using the constant directly can result
8107 in non-canonical RTL in a 64x32 cross compile. */
8108 constant_part
8109 = immed_double_const (TREE_INT_CST_LOW (treeop1),
8110 (HOST_WIDE_INT) 0,
8111 TYPE_MODE (TREE_TYPE (treeop0)));
8112 op0 = plus_constant (op0, INTVAL (constant_part));
8113 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8114 op0 = force_operand (op0, target);
8115 return REDUCE_BIT_FIELD (op0);
8116 }
8117 }
8118
8119 /* Use TER to expand pointer addition of a negated value
8120 as pointer subtraction. */
8121 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8122 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8123 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8124 && TREE_CODE (treeop1) == SSA_NAME
8125 && TYPE_MODE (TREE_TYPE (treeop0))
8126 == TYPE_MODE (TREE_TYPE (treeop1)))
8127 {
8128 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8129 if (def)
8130 {
8131 treeop1 = gimple_assign_rhs1 (def);
8132 code = MINUS_EXPR;
8133 goto do_minus;
8134 }
8135 }
8136
8137 /* No sense saving up arithmetic to be done
8138 if it's all in the wrong mode to form part of an address.
8139 And force_operand won't know whether to sign-extend or
8140 zero-extend. */
8141 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8142 || mode != ptr_mode)
8143 {
8144 expand_operands (treeop0, treeop1,
8145 subtarget, &op0, &op1, EXPAND_NORMAL);
8146 if (op0 == const0_rtx)
8147 return op1;
8148 if (op1 == const0_rtx)
8149 return op0;
8150 goto binop2;
8151 }
8152
8153 expand_operands (treeop0, treeop1,
8154 subtarget, &op0, &op1, modifier);
8155 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8156
8157 case MINUS_EXPR:
8158 do_minus:
8159 /* For initializers, we are allowed to return a MINUS of two
8160 symbolic constants. Here we handle all cases when both operands
8161 are constant. */
8162 /* Handle difference of two symbolic constants,
8163 for the sake of an initializer. */
8164 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8165 && really_constant_p (treeop0)
8166 && really_constant_p (treeop1))
8167 {
8168 expand_operands (treeop0, treeop1,
8169 NULL_RTX, &op0, &op1, modifier);
8170
8171 /* If the last operand is a CONST_INT, use plus_constant of
8172 the negated constant. Else make the MINUS. */
8173 if (CONST_INT_P (op1))
8174 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
8175 else
8176 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8177 }
8178
8179 /* No sense saving up arithmetic to be done
8180 if it's all in the wrong mode to form part of an address.
8181 And force_operand won't know whether to sign-extend or
8182 zero-extend. */
8183 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8184 || mode != ptr_mode)
8185 goto binop;
8186
8187 expand_operands (treeop0, treeop1,
8188 subtarget, &op0, &op1, modifier);
8189
8190 /* Convert A - const to A + (-const). */
8191 if (CONST_INT_P (op1))
8192 {
8193 op1 = negate_rtx (mode, op1);
8194 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8195 }
8196
8197 goto binop2;
8198
8199 case WIDEN_MULT_PLUS_EXPR:
8200 case WIDEN_MULT_MINUS_EXPR:
8201 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8202 op2 = expand_normal (treeop2);
8203 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8204 target, unsignedp);
8205 return target;
8206
8207 case WIDEN_MULT_EXPR:
8208 /* If first operand is constant, swap them.
8209 Thus the following special case checks need only
8210 check the second operand. */
8211 if (TREE_CODE (treeop0) == INTEGER_CST)
8212 {
8213 tree t1 = treeop0;
8214 treeop0 = treeop1;
8215 treeop1 = t1;
8216 }
8217
8218 /* First, check if we have a multiplication of one signed and one
8219 unsigned operand. */
8220 if (TREE_CODE (treeop1) != INTEGER_CST
8221 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8222 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8223 {
8224 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8225 this_optab = usmul_widen_optab;
8226 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8227 != CODE_FOR_nothing)
8228 {
8229 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8230 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8231 EXPAND_NORMAL);
8232 else
8233 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8234 EXPAND_NORMAL);
8235 goto binop3;
8236 }
8237 }
8238 /* Check for a multiplication with matching signedness. */
8239 else if ((TREE_CODE (treeop1) == INTEGER_CST
8240 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8241 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8242 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8243 {
8244 tree op0type = TREE_TYPE (treeop0);
8245 enum machine_mode innermode = TYPE_MODE (op0type);
8246 bool zextend_p = TYPE_UNSIGNED (op0type);
8247 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8248 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8249
8250 if (TREE_CODE (treeop0) != INTEGER_CST)
8251 {
8252 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8253 != CODE_FOR_nothing)
8254 {
8255 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8256 EXPAND_NORMAL);
8257 temp = expand_widening_mult (mode, op0, op1, target,
8258 unsignedp, this_optab);
8259 return REDUCE_BIT_FIELD (temp);
8260 }
8261 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8262 != CODE_FOR_nothing
8263 && innermode == word_mode)
8264 {
8265 rtx htem, hipart;
8266 op0 = expand_normal (treeop0);
8267 if (TREE_CODE (treeop1) == INTEGER_CST)
8268 op1 = convert_modes (innermode, mode,
8269 expand_normal (treeop1), unsignedp);
8270 else
8271 op1 = expand_normal (treeop1);
8272 temp = expand_binop (mode, other_optab, op0, op1, target,
8273 unsignedp, OPTAB_LIB_WIDEN);
8274 hipart = gen_highpart (innermode, temp);
8275 htem = expand_mult_highpart_adjust (innermode, hipart,
8276 op0, op1, hipart,
8277 zextend_p);
8278 if (htem != hipart)
8279 emit_move_insn (hipart, htem);
8280 return REDUCE_BIT_FIELD (temp);
8281 }
8282 }
8283 }
8284 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8285 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8286 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8287 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8288
8289 case FMA_EXPR:
8290 {
8291 optab opt = fma_optab;
8292 gimple def0, def2;
8293
8294 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8295 call. */
8296 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8297 {
8298 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8299 tree call_expr;
8300
8301 gcc_assert (fn != NULL_TREE);
8302 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8303 return expand_builtin (call_expr, target, subtarget, mode, false);
8304 }
8305
8306 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8307 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8308
8309 op0 = op2 = NULL;
8310
8311 if (def0 && def2
8312 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8313 {
8314 opt = fnms_optab;
8315 op0 = expand_normal (gimple_assign_rhs1 (def0));
8316 op2 = expand_normal (gimple_assign_rhs1 (def2));
8317 }
8318 else if (def0
8319 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8320 {
8321 opt = fnma_optab;
8322 op0 = expand_normal (gimple_assign_rhs1 (def0));
8323 }
8324 else if (def2
8325 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8326 {
8327 opt = fms_optab;
8328 op2 = expand_normal (gimple_assign_rhs1 (def2));
8329 }
8330
8331 if (op0 == NULL)
8332 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8333 if (op2 == NULL)
8334 op2 = expand_normal (treeop2);
8335 op1 = expand_normal (treeop1);
8336
8337 return expand_ternary_op (TYPE_MODE (type), opt,
8338 op0, op1, op2, target, 0);
8339 }
8340
8341 case MULT_EXPR:
8342 /* If this is a fixed-point operation, then we cannot use the code
8343 below because "expand_mult" doesn't support sat/no-sat fixed-point
8344 multiplications. */
8345 if (ALL_FIXED_POINT_MODE_P (mode))
8346 goto binop;
8347
8348 /* If first operand is constant, swap them.
8349 Thus the following special case checks need only
8350 check the second operand. */
8351 if (TREE_CODE (treeop0) == INTEGER_CST)
8352 {
8353 tree t1 = treeop0;
8354 treeop0 = treeop1;
8355 treeop1 = t1;
8356 }
8357
8358 /* Attempt to return something suitable for generating an
8359 indexed address, for machines that support that. */
8360
8361 if (modifier == EXPAND_SUM && mode == ptr_mode
8362 && host_integerp (treeop1, 0))
8363 {
8364 tree exp1 = treeop1;
8365
8366 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8367 EXPAND_SUM);
8368
8369 if (!REG_P (op0))
8370 op0 = force_operand (op0, NULL_RTX);
8371 if (!REG_P (op0))
8372 op0 = copy_to_mode_reg (mode, op0);
8373
8374 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8375 gen_int_mode (tree_low_cst (exp1, 0),
8376 TYPE_MODE (TREE_TYPE (exp1)))));
8377 }
8378
8379 if (modifier == EXPAND_STACK_PARM)
8380 target = 0;
8381
8382 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8383 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8384
8385 case TRUNC_DIV_EXPR:
8386 case FLOOR_DIV_EXPR:
8387 case CEIL_DIV_EXPR:
8388 case ROUND_DIV_EXPR:
8389 case EXACT_DIV_EXPR:
8390 /* If this is a fixed-point operation, then we cannot use the code
8391 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8392 divisions. */
8393 if (ALL_FIXED_POINT_MODE_P (mode))
8394 goto binop;
8395
8396 if (modifier == EXPAND_STACK_PARM)
8397 target = 0;
8398 /* Possible optimization: compute the dividend with EXPAND_SUM
8399 then if the divisor is constant can optimize the case
8400 where some terms of the dividend have coeffs divisible by it. */
8401 expand_operands (treeop0, treeop1,
8402 subtarget, &op0, &op1, EXPAND_NORMAL);
8403 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8404
8405 case RDIV_EXPR:
8406 goto binop;
8407
8408 case TRUNC_MOD_EXPR:
8409 case FLOOR_MOD_EXPR:
8410 case CEIL_MOD_EXPR:
8411 case ROUND_MOD_EXPR:
8412 if (modifier == EXPAND_STACK_PARM)
8413 target = 0;
8414 expand_operands (treeop0, treeop1,
8415 subtarget, &op0, &op1, EXPAND_NORMAL);
8416 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8417
8418 case FIXED_CONVERT_EXPR:
8419 op0 = expand_normal (treeop0);
8420 if (target == 0 || modifier == EXPAND_STACK_PARM)
8421 target = gen_reg_rtx (mode);
8422
8423 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8424 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8425 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8426 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8427 else
8428 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8429 return target;
8430
8431 case FIX_TRUNC_EXPR:
8432 op0 = expand_normal (treeop0);
8433 if (target == 0 || modifier == EXPAND_STACK_PARM)
8434 target = gen_reg_rtx (mode);
8435 expand_fix (target, op0, unsignedp);
8436 return target;
8437
8438 case FLOAT_EXPR:
8439 op0 = expand_normal (treeop0);
8440 if (target == 0 || modifier == EXPAND_STACK_PARM)
8441 target = gen_reg_rtx (mode);
8442 /* expand_float can't figure out what to do if FROM has VOIDmode.
8443 So give it the correct mode. With -O, cse will optimize this. */
8444 if (GET_MODE (op0) == VOIDmode)
8445 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8446 op0);
8447 expand_float (target, op0,
8448 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8449 return target;
8450
8451 case NEGATE_EXPR:
8452 op0 = expand_expr (treeop0, subtarget,
8453 VOIDmode, EXPAND_NORMAL);
8454 if (modifier == EXPAND_STACK_PARM)
8455 target = 0;
8456 temp = expand_unop (mode,
8457 optab_for_tree_code (NEGATE_EXPR, type,
8458 optab_default),
8459 op0, target, 0);
8460 gcc_assert (temp);
8461 return REDUCE_BIT_FIELD (temp);
8462
8463 case ABS_EXPR:
8464 op0 = expand_expr (treeop0, subtarget,
8465 VOIDmode, EXPAND_NORMAL);
8466 if (modifier == EXPAND_STACK_PARM)
8467 target = 0;
8468
8469 /* ABS_EXPR is not valid for complex arguments. */
8470 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8471 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8472
8473 /* Unsigned abs is simply the operand. Testing here means we don't
8474 risk generating incorrect code below. */
8475 if (TYPE_UNSIGNED (type))
8476 return op0;
8477
8478 return expand_abs (mode, op0, target, unsignedp,
8479 safe_from_p (target, treeop0, 1));
8480
8481 case MAX_EXPR:
8482 case MIN_EXPR:
8483 target = original_target;
8484 if (target == 0
8485 || modifier == EXPAND_STACK_PARM
8486 || (MEM_P (target) && MEM_VOLATILE_P (target))
8487 || GET_MODE (target) != mode
8488 || (REG_P (target)
8489 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8490 target = gen_reg_rtx (mode);
8491 expand_operands (treeop0, treeop1,
8492 target, &op0, &op1, EXPAND_NORMAL);
8493
8494 /* First try to do it with a special MIN or MAX instruction.
8495 If that does not win, use a conditional jump to select the proper
8496 value. */
8497 this_optab = optab_for_tree_code (code, type, optab_default);
8498 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8499 OPTAB_WIDEN);
8500 if (temp != 0)
8501 return temp;
8502
8503 /* At this point, a MEM target is no longer useful; we will get better
8504 code without it. */
8505
8506 if (! REG_P (target))
8507 target = gen_reg_rtx (mode);
8508
8509 /* If op1 was placed in target, swap op0 and op1. */
8510 if (target != op0 && target == op1)
8511 {
8512 temp = op0;
8513 op0 = op1;
8514 op1 = temp;
8515 }
8516
8517 /* We generate better code and avoid problems with op1 mentioning
8518 target by forcing op1 into a pseudo if it isn't a constant. */
8519 if (! CONSTANT_P (op1))
8520 op1 = force_reg (mode, op1);
8521
8522 {
8523 enum rtx_code comparison_code;
8524 rtx cmpop1 = op1;
8525
8526 if (code == MAX_EXPR)
8527 comparison_code = unsignedp ? GEU : GE;
8528 else
8529 comparison_code = unsignedp ? LEU : LE;
8530
8531 /* Canonicalize to comparisons against 0. */
8532 if (op1 == const1_rtx)
8533 {
8534 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8535 or (a != 0 ? a : 1) for unsigned.
8536 For MIN we are safe converting (a <= 1 ? a : 1)
8537 into (a <= 0 ? a : 1) */
8538 cmpop1 = const0_rtx;
8539 if (code == MAX_EXPR)
8540 comparison_code = unsignedp ? NE : GT;
8541 }
8542 if (op1 == constm1_rtx && !unsignedp)
8543 {
8544 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8545 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8546 cmpop1 = const0_rtx;
8547 if (code == MIN_EXPR)
8548 comparison_code = LT;
8549 }
8550 #ifdef HAVE_conditional_move
8551 /* Use a conditional move if possible. */
8552 if (can_conditionally_move_p (mode))
8553 {
8554 rtx insn;
8555
8556 /* ??? Same problem as in expmed.c: emit_conditional_move
8557 forces a stack adjustment via compare_from_rtx, and we
8558 lose the stack adjustment if the sequence we are about
8559 to create is discarded. */
8560 do_pending_stack_adjust ();
8561
8562 start_sequence ();
8563
8564 /* Try to emit the conditional move. */
8565 insn = emit_conditional_move (target, comparison_code,
8566 op0, cmpop1, mode,
8567 op0, op1, mode,
8568 unsignedp);
8569
8570 /* If we could do the conditional move, emit the sequence,
8571 and return. */
8572 if (insn)
8573 {
8574 rtx seq = get_insns ();
8575 end_sequence ();
8576 emit_insn (seq);
8577 return target;
8578 }
8579
8580 /* Otherwise discard the sequence and fall back to code with
8581 branches. */
8582 end_sequence ();
8583 }
8584 #endif
8585 if (target != op0)
8586 emit_move_insn (target, op0);
8587
8588 temp = gen_label_rtx ();
8589 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8590 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8591 -1);
8592 }
8593 emit_move_insn (target, op1);
8594 emit_label (temp);
8595 return target;
8596
8597 case BIT_NOT_EXPR:
8598 op0 = expand_expr (treeop0, subtarget,
8599 VOIDmode, EXPAND_NORMAL);
8600 if (modifier == EXPAND_STACK_PARM)
8601 target = 0;
8602 /* In case we have to reduce the result to bitfield precision
8603 for unsigned bitfield expand this as XOR with a proper constant
8604 instead. */
8605 if (reduce_bit_field && TYPE_UNSIGNED (type))
8606 temp = expand_binop (mode, xor_optab, op0,
8607 immed_double_int_const
8608 (double_int_mask (TYPE_PRECISION (type)), mode),
8609 target, 1, OPTAB_LIB_WIDEN);
8610 else
8611 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8612 gcc_assert (temp);
8613 return temp;
8614
8615 /* ??? Can optimize bitwise operations with one arg constant.
8616 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8617 and (a bitwise1 b) bitwise2 b (etc)
8618 but that is probably not worth while. */
8619
8620 case BIT_AND_EXPR:
8621 case BIT_IOR_EXPR:
8622 case BIT_XOR_EXPR:
8623 goto binop;
8624
8625 case LROTATE_EXPR:
8626 case RROTATE_EXPR:
8627 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8628 || (GET_MODE_PRECISION (TYPE_MODE (type))
8629 == TYPE_PRECISION (type)));
8630 /* fall through */
8631
8632 case LSHIFT_EXPR:
8633 case RSHIFT_EXPR:
8634 /* If this is a fixed-point operation, then we cannot use the code
8635 below because "expand_shift" doesn't support sat/no-sat fixed-point
8636 shifts. */
8637 if (ALL_FIXED_POINT_MODE_P (mode))
8638 goto binop;
8639
8640 if (! safe_from_p (subtarget, treeop1, 1))
8641 subtarget = 0;
8642 if (modifier == EXPAND_STACK_PARM)
8643 target = 0;
8644 op0 = expand_expr (treeop0, subtarget,
8645 VOIDmode, EXPAND_NORMAL);
8646 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8647 unsignedp);
8648 if (code == LSHIFT_EXPR)
8649 temp = REDUCE_BIT_FIELD (temp);
8650 return temp;
8651
8652 /* Could determine the answer when only additive constants differ. Also,
8653 the addition of one can be handled by changing the condition. */
8654 case LT_EXPR:
8655 case LE_EXPR:
8656 case GT_EXPR:
8657 case GE_EXPR:
8658 case EQ_EXPR:
8659 case NE_EXPR:
8660 case UNORDERED_EXPR:
8661 case ORDERED_EXPR:
8662 case UNLT_EXPR:
8663 case UNLE_EXPR:
8664 case UNGT_EXPR:
8665 case UNGE_EXPR:
8666 case UNEQ_EXPR:
8667 case LTGT_EXPR:
8668 temp = do_store_flag (ops,
8669 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8670 tmode != VOIDmode ? tmode : mode);
8671 if (temp)
8672 return temp;
8673
8674 /* Use a compare and a jump for BLKmode comparisons, or for function
8675 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8676
8677 if ((target == 0
8678 || modifier == EXPAND_STACK_PARM
8679 || ! safe_from_p (target, treeop0, 1)
8680 || ! safe_from_p (target, treeop1, 1)
8681 /* Make sure we don't have a hard reg (such as function's return
8682 value) live across basic blocks, if not optimizing. */
8683 || (!optimize && REG_P (target)
8684 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8685 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8686
8687 emit_move_insn (target, const0_rtx);
8688
8689 op1 = gen_label_rtx ();
8690 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8691
8692 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8693 emit_move_insn (target, constm1_rtx);
8694 else
8695 emit_move_insn (target, const1_rtx);
8696
8697 emit_label (op1);
8698 return target;
8699
8700 case COMPLEX_EXPR:
8701 /* Get the rtx code of the operands. */
8702 op0 = expand_normal (treeop0);
8703 op1 = expand_normal (treeop1);
8704
8705 if (!target)
8706 target = gen_reg_rtx (TYPE_MODE (type));
8707
8708 /* Move the real (op0) and imaginary (op1) parts to their location. */
8709 write_complex_part (target, op0, false);
8710 write_complex_part (target, op1, true);
8711
8712 return target;
8713
8714 case WIDEN_SUM_EXPR:
8715 {
8716 tree oprnd0 = treeop0;
8717 tree oprnd1 = treeop1;
8718
8719 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8720 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8721 target, unsignedp);
8722 return target;
8723 }
8724
8725 case REDUC_MAX_EXPR:
8726 case REDUC_MIN_EXPR:
8727 case REDUC_PLUS_EXPR:
8728 {
8729 op0 = expand_normal (treeop0);
8730 this_optab = optab_for_tree_code (code, type, optab_default);
8731 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8732 gcc_assert (temp);
8733 return temp;
8734 }
8735
8736 case VEC_LSHIFT_EXPR:
8737 case VEC_RSHIFT_EXPR:
8738 {
8739 target = expand_vec_shift_expr (ops, target);
8740 return target;
8741 }
8742
8743 case VEC_UNPACK_HI_EXPR:
8744 case VEC_UNPACK_LO_EXPR:
8745 {
8746 op0 = expand_normal (treeop0);
8747 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8748 target, unsignedp);
8749 gcc_assert (temp);
8750 return temp;
8751 }
8752
8753 case VEC_UNPACK_FLOAT_HI_EXPR:
8754 case VEC_UNPACK_FLOAT_LO_EXPR:
8755 {
8756 op0 = expand_normal (treeop0);
8757 /* The signedness is determined from input operand. */
8758 temp = expand_widen_pattern_expr
8759 (ops, op0, NULL_RTX, NULL_RTX,
8760 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8761
8762 gcc_assert (temp);
8763 return temp;
8764 }
8765
8766 case VEC_WIDEN_MULT_HI_EXPR:
8767 case VEC_WIDEN_MULT_LO_EXPR:
8768 {
8769 tree oprnd0 = treeop0;
8770 tree oprnd1 = treeop1;
8771
8772 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8773 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8774 target, unsignedp);
8775 gcc_assert (target);
8776 return target;
8777 }
8778
8779 case VEC_WIDEN_LSHIFT_HI_EXPR:
8780 case VEC_WIDEN_LSHIFT_LO_EXPR:
8781 {
8782 tree oprnd0 = treeop0;
8783 tree oprnd1 = treeop1;
8784
8785 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8786 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8787 target, unsignedp);
8788 gcc_assert (target);
8789 return target;
8790 }
8791
8792 case VEC_PACK_TRUNC_EXPR:
8793 case VEC_PACK_SAT_EXPR:
8794 case VEC_PACK_FIX_TRUNC_EXPR:
8795 mode = TYPE_MODE (TREE_TYPE (treeop0));
8796 goto binop;
8797
8798 case VEC_PERM_EXPR:
8799 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
8800 op2 = expand_normal (treeop2);
8801
8802 /* Careful here: if the target doesn't support integral vector modes,
8803 a constant selection vector could wind up smooshed into a normal
8804 integral constant. */
8805 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
8806 {
8807 tree sel_type = TREE_TYPE (treeop2);
8808 enum machine_mode vmode
8809 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
8810 TYPE_VECTOR_SUBPARTS (sel_type));
8811 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
8812 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
8813 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
8814 }
8815 else
8816 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
8817
8818 temp = expand_vec_perm (mode, op0, op1, op2, target);
8819 gcc_assert (temp);
8820 return temp;
8821
8822 case DOT_PROD_EXPR:
8823 {
8824 tree oprnd0 = treeop0;
8825 tree oprnd1 = treeop1;
8826 tree oprnd2 = treeop2;
8827 rtx op2;
8828
8829 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8830 op2 = expand_normal (oprnd2);
8831 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8832 target, unsignedp);
8833 return target;
8834 }
8835
8836 case REALIGN_LOAD_EXPR:
8837 {
8838 tree oprnd0 = treeop0;
8839 tree oprnd1 = treeop1;
8840 tree oprnd2 = treeop2;
8841 rtx op2;
8842
8843 this_optab = optab_for_tree_code (code, type, optab_default);
8844 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8845 op2 = expand_normal (oprnd2);
8846 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8847 target, unsignedp);
8848 gcc_assert (temp);
8849 return temp;
8850 }
8851
8852 case COND_EXPR:
8853 /* A COND_EXPR with its type being VOID_TYPE represents a
8854 conditional jump and is handled in
8855 expand_gimple_cond_expr. */
8856 gcc_assert (!VOID_TYPE_P (type));
8857
8858 /* Note that COND_EXPRs whose type is a structure or union
8859 are required to be constructed to contain assignments of
8860 a temporary variable, so that we can evaluate them here
8861 for side effect only. If type is void, we must do likewise. */
8862
8863 gcc_assert (!TREE_ADDRESSABLE (type)
8864 && !ignore
8865 && TREE_TYPE (treeop1) != void_type_node
8866 && TREE_TYPE (treeop2) != void_type_node);
8867
8868 /* If we are not to produce a result, we have no target. Otherwise,
8869 if a target was specified use it; it will not be used as an
8870 intermediate target unless it is safe. If no target, use a
8871 temporary. */
8872
8873 if (modifier != EXPAND_STACK_PARM
8874 && original_target
8875 && safe_from_p (original_target, treeop0, 1)
8876 && GET_MODE (original_target) == mode
8877 #ifdef HAVE_conditional_move
8878 && (! can_conditionally_move_p (mode)
8879 || REG_P (original_target))
8880 #endif
8881 && !MEM_P (original_target))
8882 temp = original_target;
8883 else
8884 temp = assign_temp (type, 0, 0, 1);
8885
8886 do_pending_stack_adjust ();
8887 NO_DEFER_POP;
8888 op0 = gen_label_rtx ();
8889 op1 = gen_label_rtx ();
8890 jumpifnot (treeop0, op0, -1);
8891 store_expr (treeop1, temp,
8892 modifier == EXPAND_STACK_PARM,
8893 false);
8894
8895 emit_jump_insn (gen_jump (op1));
8896 emit_barrier ();
8897 emit_label (op0);
8898 store_expr (treeop2, temp,
8899 modifier == EXPAND_STACK_PARM,
8900 false);
8901
8902 emit_label (op1);
8903 OK_DEFER_POP;
8904 return temp;
8905
8906 case VEC_COND_EXPR:
8907 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
8908 return target;
8909
8910 default:
8911 gcc_unreachable ();
8912 }
8913
8914 /* Here to do an ordinary binary operator. */
8915 binop:
8916 expand_operands (treeop0, treeop1,
8917 subtarget, &op0, &op1, EXPAND_NORMAL);
8918 binop2:
8919 this_optab = optab_for_tree_code (code, type, optab_default);
8920 binop3:
8921 if (modifier == EXPAND_STACK_PARM)
8922 target = 0;
8923 temp = expand_binop (mode, this_optab, op0, op1, target,
8924 unsignedp, OPTAB_LIB_WIDEN);
8925 gcc_assert (temp);
8926 /* Bitwise operations do not need bitfield reduction as we expect their
8927 operands being properly truncated. */
8928 if (code == BIT_XOR_EXPR
8929 || code == BIT_AND_EXPR
8930 || code == BIT_IOR_EXPR)
8931 return temp;
8932 return REDUCE_BIT_FIELD (temp);
8933 }
8934 #undef REDUCE_BIT_FIELD
8935
8936 rtx
8937 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
8938 enum expand_modifier modifier, rtx *alt_rtl)
8939 {
8940 rtx op0, op1, temp, decl_rtl;
8941 tree type;
8942 int unsignedp;
8943 enum machine_mode mode;
8944 enum tree_code code = TREE_CODE (exp);
8945 rtx subtarget, original_target;
8946 int ignore;
8947 tree context;
8948 bool reduce_bit_field;
8949 location_t loc = EXPR_LOCATION (exp);
8950 struct separate_ops ops;
8951 tree treeop0, treeop1, treeop2;
8952 tree ssa_name = NULL_TREE;
8953 gimple g;
8954
8955 type = TREE_TYPE (exp);
8956 mode = TYPE_MODE (type);
8957 unsignedp = TYPE_UNSIGNED (type);
8958
8959 treeop0 = treeop1 = treeop2 = NULL_TREE;
8960 if (!VL_EXP_CLASS_P (exp))
8961 switch (TREE_CODE_LENGTH (code))
8962 {
8963 default:
8964 case 3: treeop2 = TREE_OPERAND (exp, 2);
8965 case 2: treeop1 = TREE_OPERAND (exp, 1);
8966 case 1: treeop0 = TREE_OPERAND (exp, 0);
8967 case 0: break;
8968 }
8969 ops.code = code;
8970 ops.type = type;
8971 ops.op0 = treeop0;
8972 ops.op1 = treeop1;
8973 ops.op2 = treeop2;
8974 ops.location = loc;
8975
8976 ignore = (target == const0_rtx
8977 || ((CONVERT_EXPR_CODE_P (code)
8978 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8979 && TREE_CODE (type) == VOID_TYPE));
8980
8981 /* An operation in what may be a bit-field type needs the
8982 result to be reduced to the precision of the bit-field type,
8983 which is narrower than that of the type's mode. */
8984 reduce_bit_field = (!ignore
8985 && INTEGRAL_TYPE_P (type)
8986 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8987
8988 /* If we are going to ignore this result, we need only do something
8989 if there is a side-effect somewhere in the expression. If there
8990 is, short-circuit the most common cases here. Note that we must
8991 not call expand_expr with anything but const0_rtx in case this
8992 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
8993
8994 if (ignore)
8995 {
8996 if (! TREE_SIDE_EFFECTS (exp))
8997 return const0_rtx;
8998
8999 /* Ensure we reference a volatile object even if value is ignored, but
9000 don't do this if all we are doing is taking its address. */
9001 if (TREE_THIS_VOLATILE (exp)
9002 && TREE_CODE (exp) != FUNCTION_DECL
9003 && mode != VOIDmode && mode != BLKmode
9004 && modifier != EXPAND_CONST_ADDRESS)
9005 {
9006 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9007 if (MEM_P (temp))
9008 copy_to_reg (temp);
9009 return const0_rtx;
9010 }
9011
9012 if (TREE_CODE_CLASS (code) == tcc_unary
9013 || code == COMPONENT_REF || code == INDIRECT_REF)
9014 return expand_expr (treeop0, const0_rtx, VOIDmode,
9015 modifier);
9016
9017 else if (TREE_CODE_CLASS (code) == tcc_binary
9018 || TREE_CODE_CLASS (code) == tcc_comparison
9019 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9020 {
9021 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9022 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9023 return const0_rtx;
9024 }
9025 else if (code == BIT_FIELD_REF)
9026 {
9027 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9028 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9029 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
9030 return const0_rtx;
9031 }
9032
9033 target = 0;
9034 }
9035
9036 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9037 target = 0;
9038
9039 /* Use subtarget as the target for operand 0 of a binary operation. */
9040 subtarget = get_subtarget (target);
9041 original_target = target;
9042
9043 switch (code)
9044 {
9045 case LABEL_DECL:
9046 {
9047 tree function = decl_function_context (exp);
9048
9049 temp = label_rtx (exp);
9050 temp = gen_rtx_LABEL_REF (Pmode, temp);
9051
9052 if (function != current_function_decl
9053 && function != 0)
9054 LABEL_REF_NONLOCAL_P (temp) = 1;
9055
9056 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9057 return temp;
9058 }
9059
9060 case SSA_NAME:
9061 /* ??? ivopts calls expander, without any preparation from
9062 out-of-ssa. So fake instructions as if this was an access to the
9063 base variable. This unnecessarily allocates a pseudo, see how we can
9064 reuse it, if partition base vars have it set already. */
9065 if (!currently_expanding_to_rtl)
9066 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
9067 NULL);
9068
9069 g = get_gimple_for_ssa_name (exp);
9070 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9071 if (g == NULL
9072 && modifier == EXPAND_INITIALIZER
9073 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9074 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9075 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9076 g = SSA_NAME_DEF_STMT (exp);
9077 if (g)
9078 return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
9079 modifier, NULL);
9080
9081 ssa_name = exp;
9082 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9083 exp = SSA_NAME_VAR (ssa_name);
9084 goto expand_decl_rtl;
9085
9086 case PARM_DECL:
9087 case VAR_DECL:
9088 /* If a static var's type was incomplete when the decl was written,
9089 but the type is complete now, lay out the decl now. */
9090 if (DECL_SIZE (exp) == 0
9091 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9092 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9093 layout_decl (exp, 0);
9094
9095 /* ... fall through ... */
9096
9097 case FUNCTION_DECL:
9098 case RESULT_DECL:
9099 decl_rtl = DECL_RTL (exp);
9100 expand_decl_rtl:
9101 gcc_assert (decl_rtl);
9102 decl_rtl = copy_rtx (decl_rtl);
9103 /* Record writes to register variables. */
9104 if (modifier == EXPAND_WRITE
9105 && REG_P (decl_rtl)
9106 && HARD_REGISTER_P (decl_rtl))
9107 add_to_hard_reg_set (&crtl->asm_clobbers,
9108 GET_MODE (decl_rtl), REGNO (decl_rtl));
9109
9110 /* Ensure variable marked as used even if it doesn't go through
9111 a parser. If it hasn't be used yet, write out an external
9112 definition. */
9113 if (! TREE_USED (exp))
9114 {
9115 assemble_external (exp);
9116 TREE_USED (exp) = 1;
9117 }
9118
9119 /* Show we haven't gotten RTL for this yet. */
9120 temp = 0;
9121
9122 /* Variables inherited from containing functions should have
9123 been lowered by this point. */
9124 context = decl_function_context (exp);
9125 gcc_assert (!context
9126 || context == current_function_decl
9127 || TREE_STATIC (exp)
9128 || DECL_EXTERNAL (exp)
9129 /* ??? C++ creates functions that are not TREE_STATIC. */
9130 || TREE_CODE (exp) == FUNCTION_DECL);
9131
9132 /* This is the case of an array whose size is to be determined
9133 from its initializer, while the initializer is still being parsed.
9134 See expand_decl. */
9135
9136 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9137 temp = validize_mem (decl_rtl);
9138
9139 /* If DECL_RTL is memory, we are in the normal case and the
9140 address is not valid, get the address into a register. */
9141
9142 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9143 {
9144 if (alt_rtl)
9145 *alt_rtl = decl_rtl;
9146 decl_rtl = use_anchored_address (decl_rtl);
9147 if (modifier != EXPAND_CONST_ADDRESS
9148 && modifier != EXPAND_SUM
9149 && !memory_address_addr_space_p (DECL_MODE (exp),
9150 XEXP (decl_rtl, 0),
9151 MEM_ADDR_SPACE (decl_rtl)))
9152 temp = replace_equiv_address (decl_rtl,
9153 copy_rtx (XEXP (decl_rtl, 0)));
9154 }
9155
9156 /* If we got something, return it. But first, set the alignment
9157 if the address is a register. */
9158 if (temp != 0)
9159 {
9160 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9161 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9162
9163 return temp;
9164 }
9165
9166 /* If the mode of DECL_RTL does not match that of the decl,
9167 there are two cases: we are dealing with a BLKmode value
9168 that is returned in a register, or we are dealing with
9169 a promoted value. In the latter case, return a SUBREG
9170 of the wanted mode, but mark it so that we know that it
9171 was already extended. */
9172 if (REG_P (decl_rtl)
9173 && DECL_MODE (exp) != BLKmode
9174 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9175 {
9176 enum machine_mode pmode;
9177
9178 /* Get the signedness to be used for this variable. Ensure we get
9179 the same mode we got when the variable was declared. */
9180 if (code == SSA_NAME
9181 && (g = SSA_NAME_DEF_STMT (ssa_name))
9182 && gimple_code (g) == GIMPLE_CALL)
9183 {
9184 gcc_assert (!gimple_call_internal_p (g));
9185 pmode = promote_function_mode (type, mode, &unsignedp,
9186 gimple_call_fntype (g),
9187 2);
9188 }
9189 else
9190 pmode = promote_decl_mode (exp, &unsignedp);
9191 gcc_assert (GET_MODE (decl_rtl) == pmode);
9192
9193 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9194 SUBREG_PROMOTED_VAR_P (temp) = 1;
9195 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
9196 return temp;
9197 }
9198
9199 return decl_rtl;
9200
9201 case INTEGER_CST:
9202 temp = immed_double_const (TREE_INT_CST_LOW (exp),
9203 TREE_INT_CST_HIGH (exp), mode);
9204
9205 return temp;
9206
9207 case VECTOR_CST:
9208 {
9209 tree tmp = NULL_TREE;
9210 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9211 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9212 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9213 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9214 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9215 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9216 return const_vector_from_tree (exp);
9217 if (GET_MODE_CLASS (mode) == MODE_INT)
9218 {
9219 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9220 if (type_for_mode)
9221 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9222 }
9223 if (!tmp)
9224 tmp = build_constructor_from_list (type,
9225 TREE_VECTOR_CST_ELTS (exp));
9226 return expand_expr (tmp, ignore ? const0_rtx : target,
9227 tmode, modifier);
9228 }
9229
9230 case CONST_DECL:
9231 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9232
9233 case REAL_CST:
9234 /* If optimized, generate immediate CONST_DOUBLE
9235 which will be turned into memory by reload if necessary.
9236
9237 We used to force a register so that loop.c could see it. But
9238 this does not allow gen_* patterns to perform optimizations with
9239 the constants. It also produces two insns in cases like "x = 1.0;".
9240 On most machines, floating-point constants are not permitted in
9241 many insns, so we'd end up copying it to a register in any case.
9242
9243 Now, we do the copying in expand_binop, if appropriate. */
9244 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9245 TYPE_MODE (TREE_TYPE (exp)));
9246
9247 case FIXED_CST:
9248 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9249 TYPE_MODE (TREE_TYPE (exp)));
9250
9251 case COMPLEX_CST:
9252 /* Handle evaluating a complex constant in a CONCAT target. */
9253 if (original_target && GET_CODE (original_target) == CONCAT)
9254 {
9255 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9256 rtx rtarg, itarg;
9257
9258 rtarg = XEXP (original_target, 0);
9259 itarg = XEXP (original_target, 1);
9260
9261 /* Move the real and imaginary parts separately. */
9262 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9263 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9264
9265 if (op0 != rtarg)
9266 emit_move_insn (rtarg, op0);
9267 if (op1 != itarg)
9268 emit_move_insn (itarg, op1);
9269
9270 return original_target;
9271 }
9272
9273 /* ... fall through ... */
9274
9275 case STRING_CST:
9276 temp = expand_expr_constant (exp, 1, modifier);
9277
9278 /* temp contains a constant address.
9279 On RISC machines where a constant address isn't valid,
9280 make some insns to get that address into a register. */
9281 if (modifier != EXPAND_CONST_ADDRESS
9282 && modifier != EXPAND_INITIALIZER
9283 && modifier != EXPAND_SUM
9284 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9285 MEM_ADDR_SPACE (temp)))
9286 return replace_equiv_address (temp,
9287 copy_rtx (XEXP (temp, 0)));
9288 return temp;
9289
9290 case SAVE_EXPR:
9291 {
9292 tree val = treeop0;
9293 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
9294
9295 if (!SAVE_EXPR_RESOLVED_P (exp))
9296 {
9297 /* We can indeed still hit this case, typically via builtin
9298 expanders calling save_expr immediately before expanding
9299 something. Assume this means that we only have to deal
9300 with non-BLKmode values. */
9301 gcc_assert (GET_MODE (ret) != BLKmode);
9302
9303 val = build_decl (EXPR_LOCATION (exp),
9304 VAR_DECL, NULL, TREE_TYPE (exp));
9305 DECL_ARTIFICIAL (val) = 1;
9306 DECL_IGNORED_P (val) = 1;
9307 treeop0 = val;
9308 TREE_OPERAND (exp, 0) = treeop0;
9309 SAVE_EXPR_RESOLVED_P (exp) = 1;
9310
9311 if (!CONSTANT_P (ret))
9312 ret = copy_to_reg (ret);
9313 SET_DECL_RTL (val, ret);
9314 }
9315
9316 return ret;
9317 }
9318
9319
9320 case CONSTRUCTOR:
9321 /* If we don't need the result, just ensure we evaluate any
9322 subexpressions. */
9323 if (ignore)
9324 {
9325 unsigned HOST_WIDE_INT idx;
9326 tree value;
9327
9328 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9329 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9330
9331 return const0_rtx;
9332 }
9333
9334 return expand_constructor (exp, target, modifier, false);
9335
9336 case TARGET_MEM_REF:
9337 {
9338 addr_space_t as
9339 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9340 struct mem_address addr;
9341 enum insn_code icode;
9342 unsigned int align;
9343
9344 get_address_description (exp, &addr);
9345 op0 = addr_for_mem_ref (&addr, as, true);
9346 op0 = memory_address_addr_space (mode, op0, as);
9347 temp = gen_rtx_MEM (mode, op0);
9348 set_mem_attributes (temp, exp, 0);
9349 set_mem_addr_space (temp, as);
9350 align = get_object_or_type_alignment (exp);
9351 if (mode != BLKmode
9352 && align < GET_MODE_ALIGNMENT (mode)
9353 /* If the target does not have special handling for unaligned
9354 loads of mode then it can use regular moves for them. */
9355 && ((icode = optab_handler (movmisalign_optab, mode))
9356 != CODE_FOR_nothing))
9357 {
9358 struct expand_operand ops[2];
9359
9360 /* We've already validated the memory, and we're creating a
9361 new pseudo destination. The predicates really can't fail,
9362 nor can the generator. */
9363 create_output_operand (&ops[0], NULL_RTX, mode);
9364 create_fixed_operand (&ops[1], temp);
9365 expand_insn (icode, 2, ops);
9366 return ops[0].value;
9367 }
9368 return temp;
9369 }
9370
9371 case MEM_REF:
9372 {
9373 addr_space_t as
9374 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9375 enum machine_mode address_mode;
9376 tree base = TREE_OPERAND (exp, 0);
9377 gimple def_stmt;
9378 enum insn_code icode;
9379 unsigned align;
9380 /* Handle expansion of non-aliased memory with non-BLKmode. That
9381 might end up in a register. */
9382 if (mem_ref_refers_to_non_mem_p (exp))
9383 {
9384 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9385 tree bit_offset;
9386 tree bftype;
9387 base = TREE_OPERAND (base, 0);
9388 if (offset == 0
9389 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9390 && (GET_MODE_BITSIZE (DECL_MODE (base))
9391 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9392 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9393 TREE_TYPE (exp), base),
9394 target, tmode, modifier);
9395 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9396 bftype = TREE_TYPE (base);
9397 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9398 bftype = TREE_TYPE (exp);
9399 else
9400 {
9401 temp = assign_stack_temp (DECL_MODE (base),
9402 GET_MODE_SIZE (DECL_MODE (base)),
9403 0);
9404 store_expr (base, temp, 0, false);
9405 temp = adjust_address (temp, BLKmode, offset);
9406 set_mem_size (temp, int_size_in_bytes (TREE_TYPE (exp)));
9407 return temp;
9408 }
9409 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9410 base,
9411 TYPE_SIZE (TREE_TYPE (exp)),
9412 bit_offset),
9413 target, tmode, modifier);
9414 }
9415 address_mode = targetm.addr_space.address_mode (as);
9416 base = TREE_OPERAND (exp, 0);
9417 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9418 {
9419 tree mask = gimple_assign_rhs2 (def_stmt);
9420 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9421 gimple_assign_rhs1 (def_stmt), mask);
9422 TREE_OPERAND (exp, 0) = base;
9423 }
9424 align = get_object_or_type_alignment (exp);
9425 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9426 op0 = memory_address_addr_space (address_mode, op0, as);
9427 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9428 {
9429 rtx off
9430 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9431 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9432 }
9433 op0 = memory_address_addr_space (mode, op0, as);
9434 temp = gen_rtx_MEM (mode, op0);
9435 set_mem_attributes (temp, exp, 0);
9436 set_mem_addr_space (temp, as);
9437 if (TREE_THIS_VOLATILE (exp))
9438 MEM_VOLATILE_P (temp) = 1;
9439 if (mode != BLKmode
9440 && align < GET_MODE_ALIGNMENT (mode)
9441 /* If the target does not have special handling for unaligned
9442 loads of mode then it can use regular moves for them. */
9443 && ((icode = optab_handler (movmisalign_optab, mode))
9444 != CODE_FOR_nothing))
9445 {
9446 struct expand_operand ops[2];
9447
9448 /* We've already validated the memory, and we're creating a
9449 new pseudo destination. The predicates really can't fail,
9450 nor can the generator. */
9451 create_output_operand (&ops[0], NULL_RTX, mode);
9452 create_fixed_operand (&ops[1], temp);
9453 expand_insn (icode, 2, ops);
9454 return ops[0].value;
9455 }
9456 return temp;
9457 }
9458
9459 case ARRAY_REF:
9460
9461 {
9462 tree array = treeop0;
9463 tree index = treeop1;
9464
9465 /* Fold an expression like: "foo"[2].
9466 This is not done in fold so it won't happen inside &.
9467 Don't fold if this is for wide characters since it's too
9468 difficult to do correctly and this is a very rare case. */
9469
9470 if (modifier != EXPAND_CONST_ADDRESS
9471 && modifier != EXPAND_INITIALIZER
9472 && modifier != EXPAND_MEMORY)
9473 {
9474 tree t = fold_read_from_constant_string (exp);
9475
9476 if (t)
9477 return expand_expr (t, target, tmode, modifier);
9478 }
9479
9480 /* If this is a constant index into a constant array,
9481 just get the value from the array. Handle both the cases when
9482 we have an explicit constructor and when our operand is a variable
9483 that was declared const. */
9484
9485 if (modifier != EXPAND_CONST_ADDRESS
9486 && modifier != EXPAND_INITIALIZER
9487 && modifier != EXPAND_MEMORY
9488 && TREE_CODE (array) == CONSTRUCTOR
9489 && ! TREE_SIDE_EFFECTS (array)
9490 && TREE_CODE (index) == INTEGER_CST)
9491 {
9492 unsigned HOST_WIDE_INT ix;
9493 tree field, value;
9494
9495 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9496 field, value)
9497 if (tree_int_cst_equal (field, index))
9498 {
9499 if (!TREE_SIDE_EFFECTS (value))
9500 return expand_expr (fold (value), target, tmode, modifier);
9501 break;
9502 }
9503 }
9504
9505 else if (optimize >= 1
9506 && modifier != EXPAND_CONST_ADDRESS
9507 && modifier != EXPAND_INITIALIZER
9508 && modifier != EXPAND_MEMORY
9509 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9510 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9511 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9512 && const_value_known_p (array))
9513 {
9514 if (TREE_CODE (index) == INTEGER_CST)
9515 {
9516 tree init = DECL_INITIAL (array);
9517
9518 if (TREE_CODE (init) == CONSTRUCTOR)
9519 {
9520 unsigned HOST_WIDE_INT ix;
9521 tree field, value;
9522
9523 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9524 field, value)
9525 if (tree_int_cst_equal (field, index))
9526 {
9527 if (TREE_SIDE_EFFECTS (value))
9528 break;
9529
9530 if (TREE_CODE (value) == CONSTRUCTOR)
9531 {
9532 /* If VALUE is a CONSTRUCTOR, this
9533 optimization is only useful if
9534 this doesn't store the CONSTRUCTOR
9535 into memory. If it does, it is more
9536 efficient to just load the data from
9537 the array directly. */
9538 rtx ret = expand_constructor (value, target,
9539 modifier, true);
9540 if (ret == NULL_RTX)
9541 break;
9542 }
9543
9544 return expand_expr (fold (value), target, tmode,
9545 modifier);
9546 }
9547 }
9548 else if(TREE_CODE (init) == STRING_CST)
9549 {
9550 tree index1 = index;
9551 tree low_bound = array_ref_low_bound (exp);
9552 index1 = fold_convert_loc (loc, sizetype,
9553 treeop1);
9554
9555 /* Optimize the special-case of a zero lower bound.
9556
9557 We convert the low_bound to sizetype to avoid some problems
9558 with constant folding. (E.g. suppose the lower bound is 1,
9559 and its mode is QI. Without the conversion,l (ARRAY
9560 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9561 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9562
9563 if (! integer_zerop (low_bound))
9564 index1 = size_diffop_loc (loc, index1,
9565 fold_convert_loc (loc, sizetype,
9566 low_bound));
9567
9568 if (0 > compare_tree_int (index1,
9569 TREE_STRING_LENGTH (init)))
9570 {
9571 tree type = TREE_TYPE (TREE_TYPE (init));
9572 enum machine_mode mode = TYPE_MODE (type);
9573
9574 if (GET_MODE_CLASS (mode) == MODE_INT
9575 && GET_MODE_SIZE (mode) == 1)
9576 return gen_int_mode (TREE_STRING_POINTER (init)
9577 [TREE_INT_CST_LOW (index1)],
9578 mode);
9579 }
9580 }
9581 }
9582 }
9583 }
9584 goto normal_inner_ref;
9585
9586 case COMPONENT_REF:
9587 /* If the operand is a CONSTRUCTOR, we can just extract the
9588 appropriate field if it is present. */
9589 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9590 {
9591 unsigned HOST_WIDE_INT idx;
9592 tree field, value;
9593
9594 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9595 idx, field, value)
9596 if (field == treeop1
9597 /* We can normally use the value of the field in the
9598 CONSTRUCTOR. However, if this is a bitfield in
9599 an integral mode that we can fit in a HOST_WIDE_INT,
9600 we must mask only the number of bits in the bitfield,
9601 since this is done implicitly by the constructor. If
9602 the bitfield does not meet either of those conditions,
9603 we can't do this optimization. */
9604 && (! DECL_BIT_FIELD (field)
9605 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9606 && (GET_MODE_PRECISION (DECL_MODE (field))
9607 <= HOST_BITS_PER_WIDE_INT))))
9608 {
9609 if (DECL_BIT_FIELD (field)
9610 && modifier == EXPAND_STACK_PARM)
9611 target = 0;
9612 op0 = expand_expr (value, target, tmode, modifier);
9613 if (DECL_BIT_FIELD (field))
9614 {
9615 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9616 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9617
9618 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9619 {
9620 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9621 op0 = expand_and (imode, op0, op1, target);
9622 }
9623 else
9624 {
9625 int count = GET_MODE_PRECISION (imode) - bitsize;
9626
9627 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9628 target, 0);
9629 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9630 target, 0);
9631 }
9632 }
9633
9634 return op0;
9635 }
9636 }
9637 goto normal_inner_ref;
9638
9639 case BIT_FIELD_REF:
9640 case ARRAY_RANGE_REF:
9641 normal_inner_ref:
9642 {
9643 enum machine_mode mode1, mode2;
9644 HOST_WIDE_INT bitsize, bitpos;
9645 tree offset;
9646 int volatilep = 0, must_force_mem;
9647 bool packedp = false;
9648 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9649 &mode1, &unsignedp, &volatilep, true);
9650 rtx orig_op0, memloc;
9651
9652 /* If we got back the original object, something is wrong. Perhaps
9653 we are evaluating an expression too early. In any event, don't
9654 infinitely recurse. */
9655 gcc_assert (tem != exp);
9656
9657 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9658 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9659 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9660 packedp = true;
9661
9662 /* If TEM's type is a union of variable size, pass TARGET to the inner
9663 computation, since it will need a temporary and TARGET is known
9664 to have to do. This occurs in unchecked conversion in Ada. */
9665 orig_op0 = op0
9666 = expand_expr (tem,
9667 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9668 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9669 != INTEGER_CST)
9670 && modifier != EXPAND_STACK_PARM
9671 ? target : NULL_RTX),
9672 VOIDmode,
9673 (modifier == EXPAND_INITIALIZER
9674 || modifier == EXPAND_CONST_ADDRESS
9675 || modifier == EXPAND_STACK_PARM)
9676 ? modifier : EXPAND_NORMAL);
9677
9678
9679 /* If the bitfield is volatile, we want to access it in the
9680 field's mode, not the computed mode.
9681 If a MEM has VOIDmode (external with incomplete type),
9682 use BLKmode for it instead. */
9683 if (MEM_P (op0))
9684 {
9685 if (volatilep && flag_strict_volatile_bitfields > 0)
9686 op0 = adjust_address (op0, mode1, 0);
9687 else if (GET_MODE (op0) == VOIDmode)
9688 op0 = adjust_address (op0, BLKmode, 0);
9689 }
9690
9691 mode2
9692 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9693
9694 /* If we have either an offset, a BLKmode result, or a reference
9695 outside the underlying object, we must force it to memory.
9696 Such a case can occur in Ada if we have unchecked conversion
9697 of an expression from a scalar type to an aggregate type or
9698 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9699 passed a partially uninitialized object or a view-conversion
9700 to a larger size. */
9701 must_force_mem = (offset
9702 || mode1 == BLKmode
9703 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9704
9705 /* Handle CONCAT first. */
9706 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9707 {
9708 if (bitpos == 0
9709 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9710 return op0;
9711 if (bitpos == 0
9712 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9713 && bitsize)
9714 {
9715 op0 = XEXP (op0, 0);
9716 mode2 = GET_MODE (op0);
9717 }
9718 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9719 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9720 && bitpos
9721 && bitsize)
9722 {
9723 op0 = XEXP (op0, 1);
9724 bitpos = 0;
9725 mode2 = GET_MODE (op0);
9726 }
9727 else
9728 /* Otherwise force into memory. */
9729 must_force_mem = 1;
9730 }
9731
9732 /* If this is a constant, put it in a register if it is a legitimate
9733 constant and we don't need a memory reference. */
9734 if (CONSTANT_P (op0)
9735 && mode2 != BLKmode
9736 && targetm.legitimate_constant_p (mode2, op0)
9737 && !must_force_mem)
9738 op0 = force_reg (mode2, op0);
9739
9740 /* Otherwise, if this is a constant, try to force it to the constant
9741 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9742 is a legitimate constant. */
9743 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9744 op0 = validize_mem (memloc);
9745
9746 /* Otherwise, if this is a constant or the object is not in memory
9747 and need be, put it there. */
9748 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9749 {
9750 tree nt = build_qualified_type (TREE_TYPE (tem),
9751 (TYPE_QUALS (TREE_TYPE (tem))
9752 | TYPE_QUAL_CONST));
9753 memloc = assign_temp (nt, 1, 1, 1);
9754 emit_move_insn (memloc, op0);
9755 op0 = memloc;
9756 }
9757
9758 if (offset)
9759 {
9760 enum machine_mode address_mode;
9761 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9762 EXPAND_SUM);
9763
9764 gcc_assert (MEM_P (op0));
9765
9766 address_mode
9767 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9768 if (GET_MODE (offset_rtx) != address_mode)
9769 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9770
9771 if (GET_MODE (op0) == BLKmode
9772 /* A constant address in OP0 can have VOIDmode, we must
9773 not try to call force_reg in that case. */
9774 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9775 && bitsize != 0
9776 && (bitpos % bitsize) == 0
9777 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9778 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9779 {
9780 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9781 bitpos = 0;
9782 }
9783
9784 op0 = offset_address (op0, offset_rtx,
9785 highest_pow2_factor (offset));
9786 }
9787
9788 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9789 record its alignment as BIGGEST_ALIGNMENT. */
9790 if (MEM_P (op0) && bitpos == 0 && offset != 0
9791 && is_aligning_offset (offset, tem))
9792 set_mem_align (op0, BIGGEST_ALIGNMENT);
9793
9794 /* Don't forget about volatility even if this is a bitfield. */
9795 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9796 {
9797 if (op0 == orig_op0)
9798 op0 = copy_rtx (op0);
9799
9800 MEM_VOLATILE_P (op0) = 1;
9801 }
9802
9803 /* In cases where an aligned union has an unaligned object
9804 as a field, we might be extracting a BLKmode value from
9805 an integer-mode (e.g., SImode) object. Handle this case
9806 by doing the extract into an object as wide as the field
9807 (which we know to be the width of a basic mode), then
9808 storing into memory, and changing the mode to BLKmode. */
9809 if (mode1 == VOIDmode
9810 || REG_P (op0) || GET_CODE (op0) == SUBREG
9811 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9812 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9813 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9814 && modifier != EXPAND_CONST_ADDRESS
9815 && modifier != EXPAND_INITIALIZER)
9816 /* If the field is volatile, we always want an aligned
9817 access. Do this in following two situations:
9818 1. the access is not already naturally
9819 aligned, otherwise "normal" (non-bitfield) volatile fields
9820 become non-addressable.
9821 2. the bitsize is narrower than the access size. Need
9822 to extract bitfields from the access. */
9823 || (volatilep && flag_strict_volatile_bitfields > 0
9824 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0
9825 || (mode1 != BLKmode
9826 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)))
9827 /* If the field isn't aligned enough to fetch as a memref,
9828 fetch it as a bit field. */
9829 || (mode1 != BLKmode
9830 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9831 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9832 || (MEM_P (op0)
9833 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9834 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9835 && ((modifier == EXPAND_CONST_ADDRESS
9836 || modifier == EXPAND_INITIALIZER)
9837 ? STRICT_ALIGNMENT
9838 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9839 || (bitpos % BITS_PER_UNIT != 0)))
9840 /* If the type and the field are a constant size and the
9841 size of the type isn't the same size as the bitfield,
9842 we must use bitfield operations. */
9843 || (bitsize >= 0
9844 && TYPE_SIZE (TREE_TYPE (exp))
9845 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9846 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9847 bitsize)))
9848 {
9849 enum machine_mode ext_mode = mode;
9850
9851 if (ext_mode == BLKmode
9852 && ! (target != 0 && MEM_P (op0)
9853 && MEM_P (target)
9854 && bitpos % BITS_PER_UNIT == 0))
9855 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9856
9857 if (ext_mode == BLKmode)
9858 {
9859 if (target == 0)
9860 target = assign_temp (type, 0, 1, 1);
9861
9862 if (bitsize == 0)
9863 return target;
9864
9865 /* In this case, BITPOS must start at a byte boundary and
9866 TARGET, if specified, must be a MEM. */
9867 gcc_assert (MEM_P (op0)
9868 && (!target || MEM_P (target))
9869 && !(bitpos % BITS_PER_UNIT));
9870
9871 emit_block_move (target,
9872 adjust_address (op0, VOIDmode,
9873 bitpos / BITS_PER_UNIT),
9874 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9875 / BITS_PER_UNIT),
9876 (modifier == EXPAND_STACK_PARM
9877 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9878
9879 return target;
9880 }
9881
9882 op0 = validize_mem (op0);
9883
9884 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9885 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9886
9887 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
9888 (modifier == EXPAND_STACK_PARM
9889 ? NULL_RTX : target),
9890 ext_mode, ext_mode);
9891
9892 /* If the result is a record type and BITSIZE is narrower than
9893 the mode of OP0, an integral mode, and this is a big endian
9894 machine, we must put the field into the high-order bits. */
9895 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
9896 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
9897 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
9898 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
9899 GET_MODE_BITSIZE (GET_MODE (op0))
9900 - bitsize, op0, 1);
9901
9902 /* If the result type is BLKmode, store the data into a temporary
9903 of the appropriate type, but with the mode corresponding to the
9904 mode for the data we have (op0's mode). It's tempting to make
9905 this a constant type, since we know it's only being stored once,
9906 but that can cause problems if we are taking the address of this
9907 COMPONENT_REF because the MEM of any reference via that address
9908 will have flags corresponding to the type, which will not
9909 necessarily be constant. */
9910 if (mode == BLKmode)
9911 {
9912 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
9913 rtx new_rtx;
9914
9915 /* If the reference doesn't use the alias set of its type,
9916 we cannot create the temporary using that type. */
9917 if (component_uses_parent_alias_set (exp))
9918 {
9919 new_rtx = assign_stack_local (ext_mode, size, 0);
9920 set_mem_alias_set (new_rtx, get_alias_set (exp));
9921 }
9922 else
9923 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
9924
9925 emit_move_insn (new_rtx, op0);
9926 op0 = copy_rtx (new_rtx);
9927 PUT_MODE (op0, BLKmode);
9928 set_mem_attributes (op0, exp, 1);
9929 }
9930
9931 return op0;
9932 }
9933
9934 /* If the result is BLKmode, use that to access the object
9935 now as well. */
9936 if (mode == BLKmode)
9937 mode1 = BLKmode;
9938
9939 /* Get a reference to just this component. */
9940 if (modifier == EXPAND_CONST_ADDRESS
9941 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
9942 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
9943 else
9944 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9945
9946 if (op0 == orig_op0)
9947 op0 = copy_rtx (op0);
9948
9949 set_mem_attributes (op0, exp, 0);
9950 if (REG_P (XEXP (op0, 0)))
9951 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9952
9953 MEM_VOLATILE_P (op0) |= volatilep;
9954 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
9955 || modifier == EXPAND_CONST_ADDRESS
9956 || modifier == EXPAND_INITIALIZER)
9957 return op0;
9958 else if (target == 0)
9959 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9960
9961 convert_move (target, op0, unsignedp);
9962 return target;
9963 }
9964
9965 case OBJ_TYPE_REF:
9966 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
9967
9968 case CALL_EXPR:
9969 /* All valid uses of __builtin_va_arg_pack () are removed during
9970 inlining. */
9971 if (CALL_EXPR_VA_ARG_PACK (exp))
9972 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
9973 {
9974 tree fndecl = get_callee_fndecl (exp), attr;
9975
9976 if (fndecl
9977 && (attr = lookup_attribute ("error",
9978 DECL_ATTRIBUTES (fndecl))) != NULL)
9979 error ("%Kcall to %qs declared with attribute error: %s",
9980 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9981 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9982 if (fndecl
9983 && (attr = lookup_attribute ("warning",
9984 DECL_ATTRIBUTES (fndecl))) != NULL)
9985 warning_at (tree_nonartificial_location (exp),
9986 0, "%Kcall to %qs declared with attribute warning: %s",
9987 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9988 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9989
9990 /* Check for a built-in function. */
9991 if (fndecl && DECL_BUILT_IN (fndecl))
9992 {
9993 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
9994 return expand_builtin (exp, target, subtarget, tmode, ignore);
9995 }
9996 }
9997 return expand_call (exp, target, ignore);
9998
9999 case VIEW_CONVERT_EXPR:
10000 op0 = NULL_RTX;
10001
10002 /* If we are converting to BLKmode, try to avoid an intermediate
10003 temporary by fetching an inner memory reference. */
10004 if (mode == BLKmode
10005 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10006 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10007 && handled_component_p (treeop0))
10008 {
10009 enum machine_mode mode1;
10010 HOST_WIDE_INT bitsize, bitpos;
10011 tree offset;
10012 int unsignedp;
10013 int volatilep = 0;
10014 tree tem
10015 = get_inner_reference (treeop0, &bitsize, &bitpos,
10016 &offset, &mode1, &unsignedp, &volatilep,
10017 true);
10018 rtx orig_op0;
10019
10020 /* ??? We should work harder and deal with non-zero offsets. */
10021 if (!offset
10022 && (bitpos % BITS_PER_UNIT) == 0
10023 && bitsize >= 0
10024 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
10025 {
10026 /* See the normal_inner_ref case for the rationale. */
10027 orig_op0
10028 = expand_expr (tem,
10029 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10030 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10031 != INTEGER_CST)
10032 && modifier != EXPAND_STACK_PARM
10033 ? target : NULL_RTX),
10034 VOIDmode,
10035 (modifier == EXPAND_INITIALIZER
10036 || modifier == EXPAND_CONST_ADDRESS
10037 || modifier == EXPAND_STACK_PARM)
10038 ? modifier : EXPAND_NORMAL);
10039
10040 if (MEM_P (orig_op0))
10041 {
10042 op0 = orig_op0;
10043
10044 /* Get a reference to just this component. */
10045 if (modifier == EXPAND_CONST_ADDRESS
10046 || modifier == EXPAND_SUM
10047 || modifier == EXPAND_INITIALIZER)
10048 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
10049 else
10050 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10051
10052 if (op0 == orig_op0)
10053 op0 = copy_rtx (op0);
10054
10055 set_mem_attributes (op0, treeop0, 0);
10056 if (REG_P (XEXP (op0, 0)))
10057 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10058
10059 MEM_VOLATILE_P (op0) |= volatilep;
10060 }
10061 }
10062 }
10063
10064 if (!op0)
10065 op0 = expand_expr (treeop0,
10066 NULL_RTX, VOIDmode, modifier);
10067
10068 /* If the input and output modes are both the same, we are done. */
10069 if (mode == GET_MODE (op0))
10070 ;
10071 /* If neither mode is BLKmode, and both modes are the same size
10072 then we can use gen_lowpart. */
10073 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10074 && (GET_MODE_PRECISION (mode)
10075 == GET_MODE_PRECISION (GET_MODE (op0)))
10076 && !COMPLEX_MODE_P (GET_MODE (op0)))
10077 {
10078 if (GET_CODE (op0) == SUBREG)
10079 op0 = force_reg (GET_MODE (op0), op0);
10080 temp = gen_lowpart_common (mode, op0);
10081 if (temp)
10082 op0 = temp;
10083 else
10084 {
10085 if (!REG_P (op0) && !MEM_P (op0))
10086 op0 = force_reg (GET_MODE (op0), op0);
10087 op0 = gen_lowpart (mode, op0);
10088 }
10089 }
10090 /* If both types are integral, convert from one mode to the other. */
10091 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10092 op0 = convert_modes (mode, GET_MODE (op0), op0,
10093 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10094 /* As a last resort, spill op0 to memory, and reload it in a
10095 different mode. */
10096 else if (!MEM_P (op0))
10097 {
10098 /* If the operand is not a MEM, force it into memory. Since we
10099 are going to be changing the mode of the MEM, don't call
10100 force_const_mem for constants because we don't allow pool
10101 constants to change mode. */
10102 tree inner_type = TREE_TYPE (treeop0);
10103
10104 gcc_assert (!TREE_ADDRESSABLE (exp));
10105
10106 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10107 target
10108 = assign_stack_temp_for_type
10109 (TYPE_MODE (inner_type),
10110 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
10111
10112 emit_move_insn (target, op0);
10113 op0 = target;
10114 }
10115
10116 /* At this point, OP0 is in the correct mode. If the output type is
10117 such that the operand is known to be aligned, indicate that it is.
10118 Otherwise, we need only be concerned about alignment for non-BLKmode
10119 results. */
10120 if (MEM_P (op0))
10121 {
10122 enum insn_code icode;
10123
10124 op0 = copy_rtx (op0);
10125
10126 if (TYPE_ALIGN_OK (type))
10127 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10128 else if (mode != BLKmode
10129 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)
10130 /* If the target does have special handling for unaligned
10131 loads of mode then use them. */
10132 && ((icode = optab_handler (movmisalign_optab, mode))
10133 != CODE_FOR_nothing))
10134 {
10135 rtx reg, insn;
10136
10137 op0 = adjust_address (op0, mode, 0);
10138 /* We've already validated the memory, and we're creating a
10139 new pseudo destination. The predicates really can't
10140 fail. */
10141 reg = gen_reg_rtx (mode);
10142
10143 /* Nor can the insn generator. */
10144 insn = GEN_FCN (icode) (reg, op0);
10145 emit_insn (insn);
10146 return reg;
10147 }
10148 else if (STRICT_ALIGNMENT
10149 && mode != BLKmode
10150 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10151 {
10152 tree inner_type = TREE_TYPE (treeop0);
10153 HOST_WIDE_INT temp_size
10154 = MAX (int_size_in_bytes (inner_type),
10155 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10156 rtx new_rtx
10157 = assign_stack_temp_for_type (mode, temp_size, 0, type);
10158 rtx new_with_op0_mode
10159 = adjust_address (new_rtx, GET_MODE (op0), 0);
10160
10161 gcc_assert (!TREE_ADDRESSABLE (exp));
10162
10163 if (GET_MODE (op0) == BLKmode)
10164 emit_block_move (new_with_op0_mode, op0,
10165 GEN_INT (GET_MODE_SIZE (mode)),
10166 (modifier == EXPAND_STACK_PARM
10167 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10168 else
10169 emit_move_insn (new_with_op0_mode, op0);
10170
10171 op0 = new_rtx;
10172 }
10173
10174 op0 = adjust_address (op0, mode, 0);
10175 }
10176
10177 return op0;
10178
10179 case MODIFY_EXPR:
10180 {
10181 tree lhs = treeop0;
10182 tree rhs = treeop1;
10183 gcc_assert (ignore);
10184
10185 /* Check for |= or &= of a bitfield of size one into another bitfield
10186 of size 1. In this case, (unless we need the result of the
10187 assignment) we can do this more efficiently with a
10188 test followed by an assignment, if necessary.
10189
10190 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10191 things change so we do, this code should be enhanced to
10192 support it. */
10193 if (TREE_CODE (lhs) == COMPONENT_REF
10194 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10195 || TREE_CODE (rhs) == BIT_AND_EXPR)
10196 && TREE_OPERAND (rhs, 0) == lhs
10197 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10198 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10199 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10200 {
10201 rtx label = gen_label_rtx ();
10202 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10203 do_jump (TREE_OPERAND (rhs, 1),
10204 value ? label : 0,
10205 value ? 0 : label, -1);
10206 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10207 MOVE_NONTEMPORAL (exp));
10208 do_pending_stack_adjust ();
10209 emit_label (label);
10210 return const0_rtx;
10211 }
10212
10213 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
10214 return const0_rtx;
10215 }
10216
10217 case ADDR_EXPR:
10218 return expand_expr_addr_expr (exp, target, tmode, modifier);
10219
10220 case REALPART_EXPR:
10221 op0 = expand_normal (treeop0);
10222 return read_complex_part (op0, false);
10223
10224 case IMAGPART_EXPR:
10225 op0 = expand_normal (treeop0);
10226 return read_complex_part (op0, true);
10227
10228 case RETURN_EXPR:
10229 case LABEL_EXPR:
10230 case GOTO_EXPR:
10231 case SWITCH_EXPR:
10232 case ASM_EXPR:
10233 /* Expanded in cfgexpand.c. */
10234 gcc_unreachable ();
10235
10236 case TRY_CATCH_EXPR:
10237 case CATCH_EXPR:
10238 case EH_FILTER_EXPR:
10239 case TRY_FINALLY_EXPR:
10240 /* Lowered by tree-eh.c. */
10241 gcc_unreachable ();
10242
10243 case WITH_CLEANUP_EXPR:
10244 case CLEANUP_POINT_EXPR:
10245 case TARGET_EXPR:
10246 case CASE_LABEL_EXPR:
10247 case VA_ARG_EXPR:
10248 case BIND_EXPR:
10249 case INIT_EXPR:
10250 case CONJ_EXPR:
10251 case COMPOUND_EXPR:
10252 case PREINCREMENT_EXPR:
10253 case PREDECREMENT_EXPR:
10254 case POSTINCREMENT_EXPR:
10255 case POSTDECREMENT_EXPR:
10256 case LOOP_EXPR:
10257 case EXIT_EXPR:
10258 /* Lowered by gimplify.c. */
10259 gcc_unreachable ();
10260
10261 case FDESC_EXPR:
10262 /* Function descriptors are not valid except for as
10263 initialization constants, and should not be expanded. */
10264 gcc_unreachable ();
10265
10266 case WITH_SIZE_EXPR:
10267 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10268 have pulled out the size to use in whatever context it needed. */
10269 return expand_expr_real (treeop0, original_target, tmode,
10270 modifier, alt_rtl);
10271
10272 case COMPOUND_LITERAL_EXPR:
10273 {
10274 /* Initialize the anonymous variable declared in the compound
10275 literal, then return the variable. */
10276 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
10277
10278 /* Create RTL for this variable. */
10279 if (!DECL_RTL_SET_P (decl))
10280 {
10281 if (DECL_HARD_REGISTER (decl))
10282 /* The user specified an assembler name for this variable.
10283 Set that up now. */
10284 rest_of_decl_compilation (decl, 0, 0);
10285 else
10286 expand_decl (decl);
10287 }
10288
10289 return expand_expr_real (decl, original_target, tmode,
10290 modifier, alt_rtl);
10291 }
10292
10293 default:
10294 return expand_expr_real_2 (&ops, target, tmode, modifier);
10295 }
10296 }
10297 \f
10298 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10299 signedness of TYPE), possibly returning the result in TARGET. */
10300 static rtx
10301 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10302 {
10303 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10304 if (target && GET_MODE (target) != GET_MODE (exp))
10305 target = 0;
10306 /* For constant values, reduce using build_int_cst_type. */
10307 if (CONST_INT_P (exp))
10308 {
10309 HOST_WIDE_INT value = INTVAL (exp);
10310 tree t = build_int_cst_type (type, value);
10311 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10312 }
10313 else if (TYPE_UNSIGNED (type))
10314 {
10315 rtx mask = immed_double_int_const (double_int_mask (prec),
10316 GET_MODE (exp));
10317 return expand_and (GET_MODE (exp), exp, mask, target);
10318 }
10319 else
10320 {
10321 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10322 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10323 exp, count, target, 0);
10324 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10325 exp, count, target, 0);
10326 }
10327 }
10328 \f
10329 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10330 when applied to the address of EXP produces an address known to be
10331 aligned more than BIGGEST_ALIGNMENT. */
10332
10333 static int
10334 is_aligning_offset (const_tree offset, const_tree exp)
10335 {
10336 /* Strip off any conversions. */
10337 while (CONVERT_EXPR_P (offset))
10338 offset = TREE_OPERAND (offset, 0);
10339
10340 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10341 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10342 if (TREE_CODE (offset) != BIT_AND_EXPR
10343 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10344 || compare_tree_int (TREE_OPERAND (offset, 1),
10345 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10346 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10347 return 0;
10348
10349 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10350 It must be NEGATE_EXPR. Then strip any more conversions. */
10351 offset = TREE_OPERAND (offset, 0);
10352 while (CONVERT_EXPR_P (offset))
10353 offset = TREE_OPERAND (offset, 0);
10354
10355 if (TREE_CODE (offset) != NEGATE_EXPR)
10356 return 0;
10357
10358 offset = TREE_OPERAND (offset, 0);
10359 while (CONVERT_EXPR_P (offset))
10360 offset = TREE_OPERAND (offset, 0);
10361
10362 /* This must now be the address of EXP. */
10363 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10364 }
10365 \f
10366 /* Return the tree node if an ARG corresponds to a string constant or zero
10367 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10368 in bytes within the string that ARG is accessing. The type of the
10369 offset will be `sizetype'. */
10370
10371 tree
10372 string_constant (tree arg, tree *ptr_offset)
10373 {
10374 tree array, offset, lower_bound;
10375 STRIP_NOPS (arg);
10376
10377 if (TREE_CODE (arg) == ADDR_EXPR)
10378 {
10379 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10380 {
10381 *ptr_offset = size_zero_node;
10382 return TREE_OPERAND (arg, 0);
10383 }
10384 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10385 {
10386 array = TREE_OPERAND (arg, 0);
10387 offset = size_zero_node;
10388 }
10389 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10390 {
10391 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10392 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10393 if (TREE_CODE (array) != STRING_CST
10394 && TREE_CODE (array) != VAR_DECL)
10395 return 0;
10396
10397 /* Check if the array has a nonzero lower bound. */
10398 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10399 if (!integer_zerop (lower_bound))
10400 {
10401 /* If the offset and base aren't both constants, return 0. */
10402 if (TREE_CODE (lower_bound) != INTEGER_CST)
10403 return 0;
10404 if (TREE_CODE (offset) != INTEGER_CST)
10405 return 0;
10406 /* Adjust offset by the lower bound. */
10407 offset = size_diffop (fold_convert (sizetype, offset),
10408 fold_convert (sizetype, lower_bound));
10409 }
10410 }
10411 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10412 {
10413 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10414 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10415 if (TREE_CODE (array) != ADDR_EXPR)
10416 return 0;
10417 array = TREE_OPERAND (array, 0);
10418 if (TREE_CODE (array) != STRING_CST
10419 && TREE_CODE (array) != VAR_DECL)
10420 return 0;
10421 }
10422 else
10423 return 0;
10424 }
10425 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10426 {
10427 tree arg0 = TREE_OPERAND (arg, 0);
10428 tree arg1 = TREE_OPERAND (arg, 1);
10429
10430 STRIP_NOPS (arg0);
10431 STRIP_NOPS (arg1);
10432
10433 if (TREE_CODE (arg0) == ADDR_EXPR
10434 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10435 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10436 {
10437 array = TREE_OPERAND (arg0, 0);
10438 offset = arg1;
10439 }
10440 else if (TREE_CODE (arg1) == ADDR_EXPR
10441 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10442 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10443 {
10444 array = TREE_OPERAND (arg1, 0);
10445 offset = arg0;
10446 }
10447 else
10448 return 0;
10449 }
10450 else
10451 return 0;
10452
10453 if (TREE_CODE (array) == STRING_CST)
10454 {
10455 *ptr_offset = fold_convert (sizetype, offset);
10456 return array;
10457 }
10458 else if (TREE_CODE (array) == VAR_DECL
10459 || TREE_CODE (array) == CONST_DECL)
10460 {
10461 int length;
10462
10463 /* Variables initialized to string literals can be handled too. */
10464 if (!const_value_known_p (array)
10465 || !DECL_INITIAL (array)
10466 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10467 return 0;
10468
10469 /* Avoid const char foo[4] = "abcde"; */
10470 if (DECL_SIZE_UNIT (array) == NULL_TREE
10471 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10472 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10473 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10474 return 0;
10475
10476 /* If variable is bigger than the string literal, OFFSET must be constant
10477 and inside of the bounds of the string literal. */
10478 offset = fold_convert (sizetype, offset);
10479 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10480 && (! host_integerp (offset, 1)
10481 || compare_tree_int (offset, length) >= 0))
10482 return 0;
10483
10484 *ptr_offset = offset;
10485 return DECL_INITIAL (array);
10486 }
10487
10488 return 0;
10489 }
10490 \f
10491 /* Generate code to calculate OPS, and exploded expression
10492 using a store-flag instruction and return an rtx for the result.
10493 OPS reflects a comparison.
10494
10495 If TARGET is nonzero, store the result there if convenient.
10496
10497 Return zero if there is no suitable set-flag instruction
10498 available on this machine.
10499
10500 Once expand_expr has been called on the arguments of the comparison,
10501 we are committed to doing the store flag, since it is not safe to
10502 re-evaluate the expression. We emit the store-flag insn by calling
10503 emit_store_flag, but only expand the arguments if we have a reason
10504 to believe that emit_store_flag will be successful. If we think that
10505 it will, but it isn't, we have to simulate the store-flag with a
10506 set/jump/set sequence. */
10507
10508 static rtx
10509 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10510 {
10511 enum rtx_code code;
10512 tree arg0, arg1, type;
10513 tree tem;
10514 enum machine_mode operand_mode;
10515 int unsignedp;
10516 rtx op0, op1;
10517 rtx subtarget = target;
10518 location_t loc = ops->location;
10519
10520 arg0 = ops->op0;
10521 arg1 = ops->op1;
10522
10523 /* Don't crash if the comparison was erroneous. */
10524 if (arg0 == error_mark_node || arg1 == error_mark_node)
10525 return const0_rtx;
10526
10527 type = TREE_TYPE (arg0);
10528 operand_mode = TYPE_MODE (type);
10529 unsignedp = TYPE_UNSIGNED (type);
10530
10531 /* We won't bother with BLKmode store-flag operations because it would mean
10532 passing a lot of information to emit_store_flag. */
10533 if (operand_mode == BLKmode)
10534 return 0;
10535
10536 /* We won't bother with store-flag operations involving function pointers
10537 when function pointers must be canonicalized before comparisons. */
10538 #ifdef HAVE_canonicalize_funcptr_for_compare
10539 if (HAVE_canonicalize_funcptr_for_compare
10540 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10541 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10542 == FUNCTION_TYPE))
10543 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10544 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10545 == FUNCTION_TYPE))))
10546 return 0;
10547 #endif
10548
10549 STRIP_NOPS (arg0);
10550 STRIP_NOPS (arg1);
10551
10552 /* For vector typed comparisons emit code to generate the desired
10553 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10554 expander for this. */
10555 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10556 {
10557 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10558 tree if_true = constant_boolean_node (true, ops->type);
10559 tree if_false = constant_boolean_node (false, ops->type);
10560 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10561 }
10562
10563 /* For vector typed comparisons emit code to generate the desired
10564 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10565 expander for this. */
10566 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10567 {
10568 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10569 tree if_true = constant_boolean_node (true, ops->type);
10570 tree if_false = constant_boolean_node (false, ops->type);
10571 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10572 }
10573
10574 /* Get the rtx comparison code to use. We know that EXP is a comparison
10575 operation of some type. Some comparisons against 1 and -1 can be
10576 converted to comparisons with zero. Do so here so that the tests
10577 below will be aware that we have a comparison with zero. These
10578 tests will not catch constants in the first operand, but constants
10579 are rarely passed as the first operand. */
10580
10581 switch (ops->code)
10582 {
10583 case EQ_EXPR:
10584 code = EQ;
10585 break;
10586 case NE_EXPR:
10587 code = NE;
10588 break;
10589 case LT_EXPR:
10590 if (integer_onep (arg1))
10591 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10592 else
10593 code = unsignedp ? LTU : LT;
10594 break;
10595 case LE_EXPR:
10596 if (! unsignedp && integer_all_onesp (arg1))
10597 arg1 = integer_zero_node, code = LT;
10598 else
10599 code = unsignedp ? LEU : LE;
10600 break;
10601 case GT_EXPR:
10602 if (! unsignedp && integer_all_onesp (arg1))
10603 arg1 = integer_zero_node, code = GE;
10604 else
10605 code = unsignedp ? GTU : GT;
10606 break;
10607 case GE_EXPR:
10608 if (integer_onep (arg1))
10609 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10610 else
10611 code = unsignedp ? GEU : GE;
10612 break;
10613
10614 case UNORDERED_EXPR:
10615 code = UNORDERED;
10616 break;
10617 case ORDERED_EXPR:
10618 code = ORDERED;
10619 break;
10620 case UNLT_EXPR:
10621 code = UNLT;
10622 break;
10623 case UNLE_EXPR:
10624 code = UNLE;
10625 break;
10626 case UNGT_EXPR:
10627 code = UNGT;
10628 break;
10629 case UNGE_EXPR:
10630 code = UNGE;
10631 break;
10632 case UNEQ_EXPR:
10633 code = UNEQ;
10634 break;
10635 case LTGT_EXPR:
10636 code = LTGT;
10637 break;
10638
10639 default:
10640 gcc_unreachable ();
10641 }
10642
10643 /* Put a constant second. */
10644 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10645 || TREE_CODE (arg0) == FIXED_CST)
10646 {
10647 tem = arg0; arg0 = arg1; arg1 = tem;
10648 code = swap_condition (code);
10649 }
10650
10651 /* If this is an equality or inequality test of a single bit, we can
10652 do this by shifting the bit being tested to the low-order bit and
10653 masking the result with the constant 1. If the condition was EQ,
10654 we xor it with 1. This does not require an scc insn and is faster
10655 than an scc insn even if we have it.
10656
10657 The code to make this transformation was moved into fold_single_bit_test,
10658 so we just call into the folder and expand its result. */
10659
10660 if ((code == NE || code == EQ)
10661 && integer_zerop (arg1)
10662 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10663 {
10664 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
10665 if (srcstmt
10666 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
10667 {
10668 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
10669 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10670 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
10671 gimple_assign_rhs1 (srcstmt),
10672 gimple_assign_rhs2 (srcstmt));
10673 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
10674 if (temp)
10675 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
10676 }
10677 }
10678
10679 if (! get_subtarget (target)
10680 || GET_MODE (subtarget) != operand_mode)
10681 subtarget = 0;
10682
10683 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10684
10685 if (target == 0)
10686 target = gen_reg_rtx (mode);
10687
10688 /* Try a cstore if possible. */
10689 return emit_store_flag_force (target, code, op0, op1,
10690 operand_mode, unsignedp,
10691 (TYPE_PRECISION (ops->type) == 1
10692 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10693 }
10694 \f
10695
10696 /* Stubs in case we haven't got a casesi insn. */
10697 #ifndef HAVE_casesi
10698 # define HAVE_casesi 0
10699 # define gen_casesi(a, b, c, d, e) (0)
10700 # define CODE_FOR_casesi CODE_FOR_nothing
10701 #endif
10702
10703 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10704 0 otherwise (i.e. if there is no casesi instruction). */
10705 int
10706 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10707 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10708 rtx fallback_label ATTRIBUTE_UNUSED)
10709 {
10710 struct expand_operand ops[5];
10711 enum machine_mode index_mode = SImode;
10712 int index_bits = GET_MODE_BITSIZE (index_mode);
10713 rtx op1, op2, index;
10714
10715 if (! HAVE_casesi)
10716 return 0;
10717
10718 /* Convert the index to SImode. */
10719 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10720 {
10721 enum machine_mode omode = TYPE_MODE (index_type);
10722 rtx rangertx = expand_normal (range);
10723
10724 /* We must handle the endpoints in the original mode. */
10725 index_expr = build2 (MINUS_EXPR, index_type,
10726 index_expr, minval);
10727 minval = integer_zero_node;
10728 index = expand_normal (index_expr);
10729 if (default_label)
10730 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10731 omode, 1, default_label);
10732 /* Now we can safely truncate. */
10733 index = convert_to_mode (index_mode, index, 0);
10734 }
10735 else
10736 {
10737 if (TYPE_MODE (index_type) != index_mode)
10738 {
10739 index_type = lang_hooks.types.type_for_size (index_bits, 0);
10740 index_expr = fold_convert (index_type, index_expr);
10741 }
10742
10743 index = expand_normal (index_expr);
10744 }
10745
10746 do_pending_stack_adjust ();
10747
10748 op1 = expand_normal (minval);
10749 op2 = expand_normal (range);
10750
10751 create_input_operand (&ops[0], index, index_mode);
10752 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10753 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10754 create_fixed_operand (&ops[3], table_label);
10755 create_fixed_operand (&ops[4], (default_label
10756 ? default_label
10757 : fallback_label));
10758 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10759 return 1;
10760 }
10761
10762 /* Attempt to generate a tablejump instruction; same concept. */
10763 #ifndef HAVE_tablejump
10764 #define HAVE_tablejump 0
10765 #define gen_tablejump(x, y) (0)
10766 #endif
10767
10768 /* Subroutine of the next function.
10769
10770 INDEX is the value being switched on, with the lowest value
10771 in the table already subtracted.
10772 MODE is its expected mode (needed if INDEX is constant).
10773 RANGE is the length of the jump table.
10774 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10775
10776 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10777 index value is out of range. */
10778
10779 static void
10780 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10781 rtx default_label)
10782 {
10783 rtx temp, vector;
10784
10785 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10786 cfun->cfg->max_jumptable_ents = INTVAL (range);
10787
10788 /* Do an unsigned comparison (in the proper mode) between the index
10789 expression and the value which represents the length of the range.
10790 Since we just finished subtracting the lower bound of the range
10791 from the index expression, this comparison allows us to simultaneously
10792 check that the original index expression value is both greater than
10793 or equal to the minimum value of the range and less than or equal to
10794 the maximum value of the range. */
10795
10796 if (default_label)
10797 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10798 default_label);
10799
10800 /* If index is in range, it must fit in Pmode.
10801 Convert to Pmode so we can index with it. */
10802 if (mode != Pmode)
10803 index = convert_to_mode (Pmode, index, 1);
10804
10805 /* Don't let a MEM slip through, because then INDEX that comes
10806 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10807 and break_out_memory_refs will go to work on it and mess it up. */
10808 #ifdef PIC_CASE_VECTOR_ADDRESS
10809 if (flag_pic && !REG_P (index))
10810 index = copy_to_mode_reg (Pmode, index);
10811 #endif
10812
10813 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10814 GET_MODE_SIZE, because this indicates how large insns are. The other
10815 uses should all be Pmode, because they are addresses. This code
10816 could fail if addresses and insns are not the same size. */
10817 index = gen_rtx_PLUS (Pmode,
10818 gen_rtx_MULT (Pmode, index,
10819 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10820 gen_rtx_LABEL_REF (Pmode, table_label));
10821 #ifdef PIC_CASE_VECTOR_ADDRESS
10822 if (flag_pic)
10823 index = PIC_CASE_VECTOR_ADDRESS (index);
10824 else
10825 #endif
10826 index = memory_address (CASE_VECTOR_MODE, index);
10827 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10828 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10829 convert_move (temp, vector, 0);
10830
10831 emit_jump_insn (gen_tablejump (temp, table_label));
10832
10833 /* If we are generating PIC code or if the table is PC-relative, the
10834 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10835 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10836 emit_barrier ();
10837 }
10838
10839 int
10840 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10841 rtx table_label, rtx default_label)
10842 {
10843 rtx index;
10844
10845 if (! HAVE_tablejump)
10846 return 0;
10847
10848 index_expr = fold_build2 (MINUS_EXPR, index_type,
10849 fold_convert (index_type, index_expr),
10850 fold_convert (index_type, minval));
10851 index = expand_normal (index_expr);
10852 do_pending_stack_adjust ();
10853
10854 do_tablejump (index, TYPE_MODE (index_type),
10855 convert_modes (TYPE_MODE (index_type),
10856 TYPE_MODE (TREE_TYPE (range)),
10857 expand_normal (range),
10858 TYPE_UNSIGNED (TREE_TYPE (range))),
10859 table_label, default_label);
10860 return 1;
10861 }
10862
10863 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10864 static rtx
10865 const_vector_from_tree (tree exp)
10866 {
10867 rtvec v;
10868 int units, i;
10869 tree link, elt;
10870 enum machine_mode inner, mode;
10871
10872 mode = TYPE_MODE (TREE_TYPE (exp));
10873
10874 if (initializer_zerop (exp))
10875 return CONST0_RTX (mode);
10876
10877 units = GET_MODE_NUNITS (mode);
10878 inner = GET_MODE_INNER (mode);
10879
10880 v = rtvec_alloc (units);
10881
10882 link = TREE_VECTOR_CST_ELTS (exp);
10883 for (i = 0; link; link = TREE_CHAIN (link), ++i)
10884 {
10885 elt = TREE_VALUE (link);
10886
10887 if (TREE_CODE (elt) == REAL_CST)
10888 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10889 inner);
10890 else if (TREE_CODE (elt) == FIXED_CST)
10891 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10892 inner);
10893 else
10894 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10895 inner);
10896 }
10897
10898 /* Initialize remaining elements to 0. */
10899 for (; i < units; ++i)
10900 RTVEC_ELT (v, i) = CONST0_RTX (inner);
10901
10902 return gen_rtx_CONST_VECTOR (mode, v);
10903 }
10904
10905 /* Build a decl for a personality function given a language prefix. */
10906
10907 tree
10908 build_personality_function (const char *lang)
10909 {
10910 const char *unwind_and_version;
10911 tree decl, type;
10912 char *name;
10913
10914 switch (targetm_common.except_unwind_info (&global_options))
10915 {
10916 case UI_NONE:
10917 return NULL;
10918 case UI_SJLJ:
10919 unwind_and_version = "_sj0";
10920 break;
10921 case UI_DWARF2:
10922 case UI_TARGET:
10923 unwind_and_version = "_v0";
10924 break;
10925 default:
10926 gcc_unreachable ();
10927 }
10928
10929 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
10930
10931 type = build_function_type_list (integer_type_node, integer_type_node,
10932 long_long_unsigned_type_node,
10933 ptr_type_node, ptr_type_node, NULL_TREE);
10934 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
10935 get_identifier (name), type);
10936 DECL_ARTIFICIAL (decl) = 1;
10937 DECL_EXTERNAL (decl) = 1;
10938 TREE_PUBLIC (decl) = 1;
10939
10940 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
10941 are the flags assigned by targetm.encode_section_info. */
10942 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
10943
10944 return decl;
10945 }
10946
10947 /* Extracts the personality function of DECL and returns the corresponding
10948 libfunc. */
10949
10950 rtx
10951 get_personality_function (tree decl)
10952 {
10953 tree personality = DECL_FUNCTION_PERSONALITY (decl);
10954 enum eh_personality_kind pk;
10955
10956 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
10957 if (pk == eh_personality_none)
10958 return NULL;
10959
10960 if (!personality
10961 && pk == eh_personality_any)
10962 personality = lang_hooks.eh_personality ();
10963
10964 if (pk == eh_personality_lang)
10965 gcc_assert (personality != NULL_TREE);
10966
10967 return XEXP (DECL_RTL (personality), 0);
10968 }
10969
10970 #include "gt-expr.h"