real.h (struct real_format): Split the signbit field into two two fields, signbit_ro...
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "real.h"
28 #include "rtl.h"
29 #include "tree.h"
30 #include "flags.h"
31 #include "regs.h"
32 #include "hard-reg-set.h"
33 #include "except.h"
34 #include "function.h"
35 #include "insn-config.h"
36 #include "insn-attr.h"
37 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
38 #include "expr.h"
39 #include "optabs.h"
40 #include "libfuncs.h"
41 #include "recog.h"
42 #include "reload.h"
43 #include "output.h"
44 #include "typeclass.h"
45 #include "toplev.h"
46 #include "ggc.h"
47 #include "langhooks.h"
48 #include "intl.h"
49 #include "tm_p.h"
50 #include "tree-iterator.h"
51 #include "tree-pass.h"
52 #include "tree-flow.h"
53 #include "target.h"
54 #include "timevar.h"
55
56 /* Decide whether a function's arguments should be processed
57 from first to last or from last to first.
58
59 They should if the stack and args grow in opposite directions, but
60 only if we have push insns. */
61
62 #ifdef PUSH_ROUNDING
63
64 #ifndef PUSH_ARGS_REVERSED
65 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
66 #define PUSH_ARGS_REVERSED /* If it's last to first. */
67 #endif
68 #endif
69
70 #endif
71
72 #ifndef STACK_PUSH_CODE
73 #ifdef STACK_GROWS_DOWNWARD
74 #define STACK_PUSH_CODE PRE_DEC
75 #else
76 #define STACK_PUSH_CODE PRE_INC
77 #endif
78 #endif
79
80
81 /* If this is nonzero, we do not bother generating VOLATILE
82 around volatile memory references, and we are willing to
83 output indirect addresses. If cse is to follow, we reject
84 indirect addresses so a useful potential cse is generated;
85 if it is used only once, instruction combination will produce
86 the same indirect address eventually. */
87 int cse_not_expected;
88
89 /* This structure is used by move_by_pieces to describe the move to
90 be performed. */
91 struct move_by_pieces
92 {
93 rtx to;
94 rtx to_addr;
95 int autinc_to;
96 int explicit_inc_to;
97 rtx from;
98 rtx from_addr;
99 int autinc_from;
100 int explicit_inc_from;
101 unsigned HOST_WIDE_INT len;
102 HOST_WIDE_INT offset;
103 int reverse;
104 };
105
106 /* This structure is used by store_by_pieces to describe the clear to
107 be performed. */
108
109 struct store_by_pieces
110 {
111 rtx to;
112 rtx to_addr;
113 int autinc_to;
114 int explicit_inc_to;
115 unsigned HOST_WIDE_INT len;
116 HOST_WIDE_INT offset;
117 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
118 void *constfundata;
119 int reverse;
120 };
121
122 static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT,
123 unsigned int,
124 unsigned int);
125 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
126 struct move_by_pieces *);
127 static bool block_move_libcall_safe_for_call_parm (void);
128 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned);
129 static rtx emit_block_move_via_libcall (rtx, rtx, rtx);
130 static tree emit_block_move_libcall_fn (int);
131 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
132 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
133 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
134 static void store_by_pieces_1 (struct store_by_pieces *, unsigned int);
135 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
136 struct store_by_pieces *);
137 static bool clear_storage_via_clrmem (rtx, rtx, unsigned);
138 static rtx clear_storage_via_libcall (rtx, rtx);
139 static tree clear_storage_libcall_fn (int);
140 static rtx compress_float_constant (rtx, rtx);
141 static rtx get_subtarget (rtx);
142 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
143 HOST_WIDE_INT, enum machine_mode,
144 tree, tree, int, int);
145 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
146 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT, enum machine_mode,
147 tree, tree, int);
148
149 static unsigned HOST_WIDE_INT highest_pow2_factor (tree);
150 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (tree, tree);
151
152 static int is_aligning_offset (tree, tree);
153 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
154 enum expand_modifier);
155 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
156 static rtx do_store_flag (tree, rtx, enum machine_mode, int);
157 #ifdef PUSH_ROUNDING
158 static void emit_single_push_insn (enum machine_mode, rtx, tree);
159 #endif
160 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
161 static rtx const_vector_from_tree (tree);
162 static void write_complex_part (rtx, rtx, bool);
163
164 /* Record for each mode whether we can move a register directly to or
165 from an object of that mode in memory. If we can't, we won't try
166 to use that mode directly when accessing a field of that mode. */
167
168 static char direct_load[NUM_MACHINE_MODES];
169 static char direct_store[NUM_MACHINE_MODES];
170
171 /* Record for each mode whether we can float-extend from memory. */
172
173 static bool float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
174
175 /* This macro is used to determine whether move_by_pieces should be called
176 to perform a structure copy. */
177 #ifndef MOVE_BY_PIECES_P
178 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
179 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
180 < (unsigned int) MOVE_RATIO)
181 #endif
182
183 /* This macro is used to determine whether clear_by_pieces should be
184 called to clear storage. */
185 #ifndef CLEAR_BY_PIECES_P
186 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
187 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
188 < (unsigned int) CLEAR_RATIO)
189 #endif
190
191 /* This macro is used to determine whether store_by_pieces should be
192 called to "memset" storage with byte values other than zero, or
193 to "memcpy" storage when the source is a constant string. */
194 #ifndef STORE_BY_PIECES_P
195 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
196 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
197 < (unsigned int) MOVE_RATIO)
198 #endif
199
200 /* This array records the insn_code of insns to perform block moves. */
201 enum insn_code movmem_optab[NUM_MACHINE_MODES];
202
203 /* This array records the insn_code of insns to perform block clears. */
204 enum insn_code clrmem_optab[NUM_MACHINE_MODES];
205
206 /* These arrays record the insn_code of two different kinds of insns
207 to perform block compares. */
208 enum insn_code cmpstr_optab[NUM_MACHINE_MODES];
209 enum insn_code cmpmem_optab[NUM_MACHINE_MODES];
210
211 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
212
213 #ifndef SLOW_UNALIGNED_ACCESS
214 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
215 #endif
216 \f
217 /* This is run once per compilation to set up which modes can be used
218 directly in memory and to initialize the block move optab. */
219
220 void
221 init_expr_once (void)
222 {
223 rtx insn, pat;
224 enum machine_mode mode;
225 int num_clobbers;
226 rtx mem, mem1;
227 rtx reg;
228
229 /* Try indexing by frame ptr and try by stack ptr.
230 It is known that on the Convex the stack ptr isn't a valid index.
231 With luck, one or the other is valid on any machine. */
232 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
233 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
234
235 /* A scratch register we can modify in-place below to avoid
236 useless RTL allocations. */
237 reg = gen_rtx_REG (VOIDmode, -1);
238
239 insn = rtx_alloc (INSN);
240 pat = gen_rtx_SET (0, NULL_RTX, NULL_RTX);
241 PATTERN (insn) = pat;
242
243 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
244 mode = (enum machine_mode) ((int) mode + 1))
245 {
246 int regno;
247
248 direct_load[(int) mode] = direct_store[(int) mode] = 0;
249 PUT_MODE (mem, mode);
250 PUT_MODE (mem1, mode);
251 PUT_MODE (reg, mode);
252
253 /* See if there is some register that can be used in this mode and
254 directly loaded or stored from memory. */
255
256 if (mode != VOIDmode && mode != BLKmode)
257 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
258 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
259 regno++)
260 {
261 if (! HARD_REGNO_MODE_OK (regno, mode))
262 continue;
263
264 REGNO (reg) = regno;
265
266 SET_SRC (pat) = mem;
267 SET_DEST (pat) = reg;
268 if (recog (pat, insn, &num_clobbers) >= 0)
269 direct_load[(int) mode] = 1;
270
271 SET_SRC (pat) = mem1;
272 SET_DEST (pat) = reg;
273 if (recog (pat, insn, &num_clobbers) >= 0)
274 direct_load[(int) mode] = 1;
275
276 SET_SRC (pat) = reg;
277 SET_DEST (pat) = mem;
278 if (recog (pat, insn, &num_clobbers) >= 0)
279 direct_store[(int) mode] = 1;
280
281 SET_SRC (pat) = reg;
282 SET_DEST (pat) = mem1;
283 if (recog (pat, insn, &num_clobbers) >= 0)
284 direct_store[(int) mode] = 1;
285 }
286 }
287
288 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
289
290 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
291 mode = GET_MODE_WIDER_MODE (mode))
292 {
293 enum machine_mode srcmode;
294 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
295 srcmode = GET_MODE_WIDER_MODE (srcmode))
296 {
297 enum insn_code ic;
298
299 ic = can_extend_p (mode, srcmode, 0);
300 if (ic == CODE_FOR_nothing)
301 continue;
302
303 PUT_MODE (mem, srcmode);
304
305 if ((*insn_data[ic].operand[1].predicate) (mem, srcmode))
306 float_extend_from_mem[mode][srcmode] = true;
307 }
308 }
309 }
310
311 /* This is run at the start of compiling a function. */
312
313 void
314 init_expr (void)
315 {
316 cfun->expr = ggc_alloc_cleared (sizeof (struct expr_status));
317 }
318 \f
319 /* Copy data from FROM to TO, where the machine modes are not the same.
320 Both modes may be integer, or both may be floating.
321 UNSIGNEDP should be nonzero if FROM is an unsigned type.
322 This causes zero-extension instead of sign-extension. */
323
324 void
325 convert_move (rtx to, rtx from, int unsignedp)
326 {
327 enum machine_mode to_mode = GET_MODE (to);
328 enum machine_mode from_mode = GET_MODE (from);
329 int to_real = GET_MODE_CLASS (to_mode) == MODE_FLOAT;
330 int from_real = GET_MODE_CLASS (from_mode) == MODE_FLOAT;
331 enum insn_code code;
332 rtx libcall;
333
334 /* rtx code for making an equivalent value. */
335 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
336 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
337
338
339 gcc_assert (to_real == from_real);
340
341 /* If the source and destination are already the same, then there's
342 nothing to do. */
343 if (to == from)
344 return;
345
346 /* If FROM is a SUBREG that indicates that we have already done at least
347 the required extension, strip it. We don't handle such SUBREGs as
348 TO here. */
349
350 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
351 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (from)))
352 >= GET_MODE_SIZE (to_mode))
353 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
354 from = gen_lowpart (to_mode, from), from_mode = to_mode;
355
356 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
357
358 if (to_mode == from_mode
359 || (from_mode == VOIDmode && CONSTANT_P (from)))
360 {
361 emit_move_insn (to, from);
362 return;
363 }
364
365 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
366 {
367 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
368
369 if (VECTOR_MODE_P (to_mode))
370 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
371 else
372 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
373
374 emit_move_insn (to, from);
375 return;
376 }
377
378 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
379 {
380 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
381 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
382 return;
383 }
384
385 if (to_real)
386 {
387 rtx value, insns;
388 convert_optab tab;
389
390 gcc_assert (GET_MODE_PRECISION (from_mode)
391 != GET_MODE_PRECISION (to_mode));
392
393 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
394 tab = sext_optab;
395 else
396 tab = trunc_optab;
397
398 /* Try converting directly if the insn is supported. */
399
400 code = tab->handlers[to_mode][from_mode].insn_code;
401 if (code != CODE_FOR_nothing)
402 {
403 emit_unop_insn (code, to, from,
404 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
405 return;
406 }
407
408 /* Otherwise use a libcall. */
409 libcall = tab->handlers[to_mode][from_mode].libfunc;
410
411 /* Is this conversion implemented yet? */
412 gcc_assert (libcall);
413
414 start_sequence ();
415 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
416 1, from, from_mode);
417 insns = get_insns ();
418 end_sequence ();
419 emit_libcall_block (insns, to, value,
420 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
421 from)
422 : gen_rtx_FLOAT_EXTEND (to_mode, from));
423 return;
424 }
425
426 /* Handle pointer conversion. */ /* SPEE 900220. */
427 /* Targets are expected to provide conversion insns between PxImode and
428 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
429 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
430 {
431 enum machine_mode full_mode
432 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
433
434 gcc_assert (trunc_optab->handlers[to_mode][full_mode].insn_code
435 != CODE_FOR_nothing);
436
437 if (full_mode != from_mode)
438 from = convert_to_mode (full_mode, from, unsignedp);
439 emit_unop_insn (trunc_optab->handlers[to_mode][full_mode].insn_code,
440 to, from, UNKNOWN);
441 return;
442 }
443 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
444 {
445 enum machine_mode full_mode
446 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
447
448 gcc_assert (sext_optab->handlers[full_mode][from_mode].insn_code
449 != CODE_FOR_nothing);
450
451 emit_unop_insn (sext_optab->handlers[full_mode][from_mode].insn_code,
452 to, from, UNKNOWN);
453 if (to_mode == full_mode)
454 return;
455
456 /* else proceed to integer conversions below. */
457 from_mode = full_mode;
458 }
459
460 /* Now both modes are integers. */
461
462 /* Handle expanding beyond a word. */
463 if (GET_MODE_BITSIZE (from_mode) < GET_MODE_BITSIZE (to_mode)
464 && GET_MODE_BITSIZE (to_mode) > BITS_PER_WORD)
465 {
466 rtx insns;
467 rtx lowpart;
468 rtx fill_value;
469 rtx lowfrom;
470 int i;
471 enum machine_mode lowpart_mode;
472 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
473
474 /* Try converting directly if the insn is supported. */
475 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
476 != CODE_FOR_nothing)
477 {
478 /* If FROM is a SUBREG, put it into a register. Do this
479 so that we always generate the same set of insns for
480 better cse'ing; if an intermediate assignment occurred,
481 we won't be doing the operation directly on the SUBREG. */
482 if (optimize > 0 && GET_CODE (from) == SUBREG)
483 from = force_reg (from_mode, from);
484 emit_unop_insn (code, to, from, equiv_code);
485 return;
486 }
487 /* Next, try converting via full word. */
488 else if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD
489 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
490 != CODE_FOR_nothing))
491 {
492 if (REG_P (to))
493 {
494 if (reg_overlap_mentioned_p (to, from))
495 from = force_reg (from_mode, from);
496 emit_insn (gen_rtx_CLOBBER (VOIDmode, to));
497 }
498 convert_move (gen_lowpart (word_mode, to), from, unsignedp);
499 emit_unop_insn (code, to,
500 gen_lowpart (word_mode, to), equiv_code);
501 return;
502 }
503
504 /* No special multiword conversion insn; do it by hand. */
505 start_sequence ();
506
507 /* Since we will turn this into a no conflict block, we must ensure
508 that the source does not overlap the target. */
509
510 if (reg_overlap_mentioned_p (to, from))
511 from = force_reg (from_mode, from);
512
513 /* Get a copy of FROM widened to a word, if necessary. */
514 if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD)
515 lowpart_mode = word_mode;
516 else
517 lowpart_mode = from_mode;
518
519 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
520
521 lowpart = gen_lowpart (lowpart_mode, to);
522 emit_move_insn (lowpart, lowfrom);
523
524 /* Compute the value to put in each remaining word. */
525 if (unsignedp)
526 fill_value = const0_rtx;
527 else
528 {
529 #ifdef HAVE_slt
530 if (HAVE_slt
531 && insn_data[(int) CODE_FOR_slt].operand[0].mode == word_mode
532 && STORE_FLAG_VALUE == -1)
533 {
534 emit_cmp_insn (lowfrom, const0_rtx, NE, NULL_RTX,
535 lowpart_mode, 0);
536 fill_value = gen_reg_rtx (word_mode);
537 emit_insn (gen_slt (fill_value));
538 }
539 else
540 #endif
541 {
542 fill_value
543 = expand_shift (RSHIFT_EXPR, lowpart_mode, lowfrom,
544 size_int (GET_MODE_BITSIZE (lowpart_mode) - 1),
545 NULL_RTX, 0);
546 fill_value = convert_to_mode (word_mode, fill_value, 1);
547 }
548 }
549
550 /* Fill the remaining words. */
551 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
552 {
553 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
554 rtx subword = operand_subword (to, index, 1, to_mode);
555
556 gcc_assert (subword);
557
558 if (fill_value != subword)
559 emit_move_insn (subword, fill_value);
560 }
561
562 insns = get_insns ();
563 end_sequence ();
564
565 emit_no_conflict_block (insns, to, from, NULL_RTX,
566 gen_rtx_fmt_e (equiv_code, to_mode, copy_rtx (from)));
567 return;
568 }
569
570 /* Truncating multi-word to a word or less. */
571 if (GET_MODE_BITSIZE (from_mode) > BITS_PER_WORD
572 && GET_MODE_BITSIZE (to_mode) <= BITS_PER_WORD)
573 {
574 if (!((MEM_P (from)
575 && ! MEM_VOLATILE_P (from)
576 && direct_load[(int) to_mode]
577 && ! mode_dependent_address_p (XEXP (from, 0)))
578 || REG_P (from)
579 || GET_CODE (from) == SUBREG))
580 from = force_reg (from_mode, from);
581 convert_move (to, gen_lowpart (word_mode, from), 0);
582 return;
583 }
584
585 /* Now follow all the conversions between integers
586 no more than a word long. */
587
588 /* For truncation, usually we can just refer to FROM in a narrower mode. */
589 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
590 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode),
591 GET_MODE_BITSIZE (from_mode)))
592 {
593 if (!((MEM_P (from)
594 && ! MEM_VOLATILE_P (from)
595 && direct_load[(int) to_mode]
596 && ! mode_dependent_address_p (XEXP (from, 0)))
597 || REG_P (from)
598 || GET_CODE (from) == SUBREG))
599 from = force_reg (from_mode, from);
600 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
601 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
602 from = copy_to_reg (from);
603 emit_move_insn (to, gen_lowpart (to_mode, from));
604 return;
605 }
606
607 /* Handle extension. */
608 if (GET_MODE_BITSIZE (to_mode) > GET_MODE_BITSIZE (from_mode))
609 {
610 /* Convert directly if that works. */
611 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
612 != CODE_FOR_nothing)
613 {
614 if (flag_force_mem)
615 from = force_not_mem (from);
616
617 emit_unop_insn (code, to, from, equiv_code);
618 return;
619 }
620 else
621 {
622 enum machine_mode intermediate;
623 rtx tmp;
624 tree shift_amount;
625
626 /* Search for a mode to convert via. */
627 for (intermediate = from_mode; intermediate != VOIDmode;
628 intermediate = GET_MODE_WIDER_MODE (intermediate))
629 if (((can_extend_p (to_mode, intermediate, unsignedp)
630 != CODE_FOR_nothing)
631 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
632 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode),
633 GET_MODE_BITSIZE (intermediate))))
634 && (can_extend_p (intermediate, from_mode, unsignedp)
635 != CODE_FOR_nothing))
636 {
637 convert_move (to, convert_to_mode (intermediate, from,
638 unsignedp), unsignedp);
639 return;
640 }
641
642 /* No suitable intermediate mode.
643 Generate what we need with shifts. */
644 shift_amount = build_int_cst (NULL_TREE,
645 GET_MODE_BITSIZE (to_mode)
646 - GET_MODE_BITSIZE (from_mode));
647 from = gen_lowpart (to_mode, force_reg (from_mode, from));
648 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
649 to, unsignedp);
650 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
651 to, unsignedp);
652 if (tmp != to)
653 emit_move_insn (to, tmp);
654 return;
655 }
656 }
657
658 /* Support special truncate insns for certain modes. */
659 if (trunc_optab->handlers[to_mode][from_mode].insn_code != CODE_FOR_nothing)
660 {
661 emit_unop_insn (trunc_optab->handlers[to_mode][from_mode].insn_code,
662 to, from, UNKNOWN);
663 return;
664 }
665
666 /* Handle truncation of volatile memrefs, and so on;
667 the things that couldn't be truncated directly,
668 and for which there was no special instruction.
669
670 ??? Code above formerly short-circuited this, for most integer
671 mode pairs, with a force_reg in from_mode followed by a recursive
672 call to this routine. Appears always to have been wrong. */
673 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode))
674 {
675 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
676 emit_move_insn (to, temp);
677 return;
678 }
679
680 /* Mode combination is not recognized. */
681 gcc_unreachable ();
682 }
683
684 /* Return an rtx for a value that would result
685 from converting X to mode MODE.
686 Both X and MODE may be floating, or both integer.
687 UNSIGNEDP is nonzero if X is an unsigned value.
688 This can be done by referring to a part of X in place
689 or by copying to a new temporary with conversion. */
690
691 rtx
692 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
693 {
694 return convert_modes (mode, VOIDmode, x, unsignedp);
695 }
696
697 /* Return an rtx for a value that would result
698 from converting X from mode OLDMODE to mode MODE.
699 Both modes may be floating, or both integer.
700 UNSIGNEDP is nonzero if X is an unsigned value.
701
702 This can be done by referring to a part of X in place
703 or by copying to a new temporary with conversion.
704
705 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
706
707 rtx
708 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
709 {
710 rtx temp;
711
712 /* If FROM is a SUBREG that indicates that we have already done at least
713 the required extension, strip it. */
714
715 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
716 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
717 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
718 x = gen_lowpart (mode, x);
719
720 if (GET_MODE (x) != VOIDmode)
721 oldmode = GET_MODE (x);
722
723 if (mode == oldmode)
724 return x;
725
726 /* There is one case that we must handle specially: If we are converting
727 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
728 we are to interpret the constant as unsigned, gen_lowpart will do
729 the wrong if the constant appears negative. What we want to do is
730 make the high-order word of the constant zero, not all ones. */
731
732 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
733 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
734 && GET_CODE (x) == CONST_INT && INTVAL (x) < 0)
735 {
736 HOST_WIDE_INT val = INTVAL (x);
737
738 if (oldmode != VOIDmode
739 && HOST_BITS_PER_WIDE_INT > GET_MODE_BITSIZE (oldmode))
740 {
741 int width = GET_MODE_BITSIZE (oldmode);
742
743 /* We need to zero extend VAL. */
744 val &= ((HOST_WIDE_INT) 1 << width) - 1;
745 }
746
747 return immed_double_const (val, (HOST_WIDE_INT) 0, mode);
748 }
749
750 /* We can do this with a gen_lowpart if both desired and current modes
751 are integer, and this is either a constant integer, a register, or a
752 non-volatile MEM. Except for the constant case where MODE is no
753 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
754
755 if ((GET_CODE (x) == CONST_INT
756 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
757 || (GET_MODE_CLASS (mode) == MODE_INT
758 && GET_MODE_CLASS (oldmode) == MODE_INT
759 && (GET_CODE (x) == CONST_DOUBLE
760 || (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (oldmode)
761 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
762 && direct_load[(int) mode])
763 || (REG_P (x)
764 && (! HARD_REGISTER_P (x)
765 || HARD_REGNO_MODE_OK (REGNO (x), mode))
766 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
767 GET_MODE_BITSIZE (GET_MODE (x)))))))))
768 {
769 /* ?? If we don't know OLDMODE, we have to assume here that
770 X does not need sign- or zero-extension. This may not be
771 the case, but it's the best we can do. */
772 if (GET_CODE (x) == CONST_INT && oldmode != VOIDmode
773 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (oldmode))
774 {
775 HOST_WIDE_INT val = INTVAL (x);
776 int width = GET_MODE_BITSIZE (oldmode);
777
778 /* We must sign or zero-extend in this case. Start by
779 zero-extending, then sign extend if we need to. */
780 val &= ((HOST_WIDE_INT) 1 << width) - 1;
781 if (! unsignedp
782 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
783 val |= (HOST_WIDE_INT) (-1) << width;
784
785 return gen_int_mode (val, mode);
786 }
787
788 return gen_lowpart (mode, x);
789 }
790
791 /* Converting from integer constant into mode is always equivalent to an
792 subreg operation. */
793 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
794 {
795 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
796 return simplify_gen_subreg (mode, x, oldmode, 0);
797 }
798
799 temp = gen_reg_rtx (mode);
800 convert_move (temp, x, unsignedp);
801 return temp;
802 }
803 \f
804 /* STORE_MAX_PIECES is the number of bytes at a time that we can
805 store efficiently. Due to internal GCC limitations, this is
806 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
807 for an immediate constant. */
808
809 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
810
811 /* Determine whether the LEN bytes can be moved by using several move
812 instructions. Return nonzero if a call to move_by_pieces should
813 succeed. */
814
815 int
816 can_move_by_pieces (unsigned HOST_WIDE_INT len,
817 unsigned int align ATTRIBUTE_UNUSED)
818 {
819 return MOVE_BY_PIECES_P (len, align);
820 }
821
822 /* Generate several move instructions to copy LEN bytes from block FROM to
823 block TO. (These are MEM rtx's with BLKmode).
824
825 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
826 used to push FROM to the stack.
827
828 ALIGN is maximum stack alignment we can assume.
829
830 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
831 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
832 stpcpy. */
833
834 rtx
835 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
836 unsigned int align, int endp)
837 {
838 struct move_by_pieces data;
839 rtx to_addr, from_addr = XEXP (from, 0);
840 unsigned int max_size = MOVE_MAX_PIECES + 1;
841 enum machine_mode mode = VOIDmode, tmode;
842 enum insn_code icode;
843
844 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
845
846 data.offset = 0;
847 data.from_addr = from_addr;
848 if (to)
849 {
850 to_addr = XEXP (to, 0);
851 data.to = to;
852 data.autinc_to
853 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
854 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
855 data.reverse
856 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
857 }
858 else
859 {
860 to_addr = NULL_RTX;
861 data.to = NULL_RTX;
862 data.autinc_to = 1;
863 #ifdef STACK_GROWS_DOWNWARD
864 data.reverse = 1;
865 #else
866 data.reverse = 0;
867 #endif
868 }
869 data.to_addr = to_addr;
870 data.from = from;
871 data.autinc_from
872 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
873 || GET_CODE (from_addr) == POST_INC
874 || GET_CODE (from_addr) == POST_DEC);
875
876 data.explicit_inc_from = 0;
877 data.explicit_inc_to = 0;
878 if (data.reverse) data.offset = len;
879 data.len = len;
880
881 /* If copying requires more than two move insns,
882 copy addresses to registers (to make displacements shorter)
883 and use post-increment if available. */
884 if (!(data.autinc_from && data.autinc_to)
885 && move_by_pieces_ninsns (len, align, max_size) > 2)
886 {
887 /* Find the mode of the largest move... */
888 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
889 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
890 if (GET_MODE_SIZE (tmode) < max_size)
891 mode = tmode;
892
893 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
894 {
895 data.from_addr = copy_addr_to_reg (plus_constant (from_addr, len));
896 data.autinc_from = 1;
897 data.explicit_inc_from = -1;
898 }
899 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
900 {
901 data.from_addr = copy_addr_to_reg (from_addr);
902 data.autinc_from = 1;
903 data.explicit_inc_from = 1;
904 }
905 if (!data.autinc_from && CONSTANT_P (from_addr))
906 data.from_addr = copy_addr_to_reg (from_addr);
907 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
908 {
909 data.to_addr = copy_addr_to_reg (plus_constant (to_addr, len));
910 data.autinc_to = 1;
911 data.explicit_inc_to = -1;
912 }
913 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
914 {
915 data.to_addr = copy_addr_to_reg (to_addr);
916 data.autinc_to = 1;
917 data.explicit_inc_to = 1;
918 }
919 if (!data.autinc_to && CONSTANT_P (to_addr))
920 data.to_addr = copy_addr_to_reg (to_addr);
921 }
922
923 tmode = mode_for_size (MOVE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
924 if (align >= GET_MODE_ALIGNMENT (tmode))
925 align = GET_MODE_ALIGNMENT (tmode);
926 else
927 {
928 enum machine_mode xmode;
929
930 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
931 tmode != VOIDmode;
932 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
933 if (GET_MODE_SIZE (tmode) > MOVE_MAX_PIECES
934 || SLOW_UNALIGNED_ACCESS (tmode, align))
935 break;
936
937 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
938 }
939
940 /* First move what we can in the largest integer mode, then go to
941 successively smaller modes. */
942
943 while (max_size > 1)
944 {
945 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
946 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
947 if (GET_MODE_SIZE (tmode) < max_size)
948 mode = tmode;
949
950 if (mode == VOIDmode)
951 break;
952
953 icode = mov_optab->handlers[(int) mode].insn_code;
954 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
955 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
956
957 max_size = GET_MODE_SIZE (mode);
958 }
959
960 /* The code above should have handled everything. */
961 gcc_assert (!data.len);
962
963 if (endp)
964 {
965 rtx to1;
966
967 gcc_assert (!data.reverse);
968 if (data.autinc_to)
969 {
970 if (endp == 2)
971 {
972 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
973 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
974 else
975 data.to_addr = copy_addr_to_reg (plus_constant (data.to_addr,
976 -1));
977 }
978 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
979 data.offset);
980 }
981 else
982 {
983 if (endp == 2)
984 --data.offset;
985 to1 = adjust_address (data.to, QImode, data.offset);
986 }
987 return to1;
988 }
989 else
990 return data.to;
991 }
992
993 /* Return number of insns required to move L bytes by pieces.
994 ALIGN (in bits) is maximum alignment we can assume. */
995
996 static unsigned HOST_WIDE_INT
997 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
998 unsigned int max_size)
999 {
1000 unsigned HOST_WIDE_INT n_insns = 0;
1001 enum machine_mode tmode;
1002
1003 tmode = mode_for_size (MOVE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
1004 if (align >= GET_MODE_ALIGNMENT (tmode))
1005 align = GET_MODE_ALIGNMENT (tmode);
1006 else
1007 {
1008 enum machine_mode tmode, xmode;
1009
1010 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
1011 tmode != VOIDmode;
1012 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
1013 if (GET_MODE_SIZE (tmode) > MOVE_MAX_PIECES
1014 || SLOW_UNALIGNED_ACCESS (tmode, align))
1015 break;
1016
1017 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
1018 }
1019
1020 while (max_size > 1)
1021 {
1022 enum machine_mode mode = VOIDmode;
1023 enum insn_code icode;
1024
1025 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
1026 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
1027 if (GET_MODE_SIZE (tmode) < max_size)
1028 mode = tmode;
1029
1030 if (mode == VOIDmode)
1031 break;
1032
1033 icode = mov_optab->handlers[(int) mode].insn_code;
1034 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1035 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1036
1037 max_size = GET_MODE_SIZE (mode);
1038 }
1039
1040 gcc_assert (!l);
1041 return n_insns;
1042 }
1043
1044 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1045 with move instructions for mode MODE. GENFUN is the gen_... function
1046 to make a move insn for that mode. DATA has all the other info. */
1047
1048 static void
1049 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1050 struct move_by_pieces *data)
1051 {
1052 unsigned int size = GET_MODE_SIZE (mode);
1053 rtx to1 = NULL_RTX, from1;
1054
1055 while (data->len >= size)
1056 {
1057 if (data->reverse)
1058 data->offset -= size;
1059
1060 if (data->to)
1061 {
1062 if (data->autinc_to)
1063 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1064 data->offset);
1065 else
1066 to1 = adjust_address (data->to, mode, data->offset);
1067 }
1068
1069 if (data->autinc_from)
1070 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1071 data->offset);
1072 else
1073 from1 = adjust_address (data->from, mode, data->offset);
1074
1075 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1076 emit_insn (gen_add2_insn (data->to_addr,
1077 GEN_INT (-(HOST_WIDE_INT)size)));
1078 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1079 emit_insn (gen_add2_insn (data->from_addr,
1080 GEN_INT (-(HOST_WIDE_INT)size)));
1081
1082 if (data->to)
1083 emit_insn ((*genfun) (to1, from1));
1084 else
1085 {
1086 #ifdef PUSH_ROUNDING
1087 emit_single_push_insn (mode, from1, NULL);
1088 #else
1089 gcc_unreachable ();
1090 #endif
1091 }
1092
1093 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1094 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1095 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1096 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1097
1098 if (! data->reverse)
1099 data->offset += size;
1100
1101 data->len -= size;
1102 }
1103 }
1104 \f
1105 /* Emit code to move a block Y to a block X. This may be done with
1106 string-move instructions, with multiple scalar move instructions,
1107 or with a library call.
1108
1109 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1110 SIZE is an rtx that says how long they are.
1111 ALIGN is the maximum alignment we can assume they have.
1112 METHOD describes what kind of copy this is, and what mechanisms may be used.
1113
1114 Return the address of the new block, if memcpy is called and returns it,
1115 0 otherwise. */
1116
1117 rtx
1118 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1119 {
1120 bool may_use_call;
1121 rtx retval = 0;
1122 unsigned int align;
1123
1124 switch (method)
1125 {
1126 case BLOCK_OP_NORMAL:
1127 may_use_call = true;
1128 break;
1129
1130 case BLOCK_OP_CALL_PARM:
1131 may_use_call = block_move_libcall_safe_for_call_parm ();
1132
1133 /* Make inhibit_defer_pop nonzero around the library call
1134 to force it to pop the arguments right away. */
1135 NO_DEFER_POP;
1136 break;
1137
1138 case BLOCK_OP_NO_LIBCALL:
1139 may_use_call = false;
1140 break;
1141
1142 default:
1143 gcc_unreachable ();
1144 }
1145
1146 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1147
1148 gcc_assert (MEM_P (x));
1149 gcc_assert (MEM_P (y));
1150 gcc_assert (size);
1151
1152 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1153 block copy is more efficient for other large modes, e.g. DCmode. */
1154 x = adjust_address (x, BLKmode, 0);
1155 y = adjust_address (y, BLKmode, 0);
1156
1157 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1158 can be incorrect is coming from __builtin_memcpy. */
1159 if (GET_CODE (size) == CONST_INT)
1160 {
1161 if (INTVAL (size) == 0)
1162 return 0;
1163
1164 x = shallow_copy_rtx (x);
1165 y = shallow_copy_rtx (y);
1166 set_mem_size (x, size);
1167 set_mem_size (y, size);
1168 }
1169
1170 if (GET_CODE (size) == CONST_INT && MOVE_BY_PIECES_P (INTVAL (size), align))
1171 move_by_pieces (x, y, INTVAL (size), align, 0);
1172 else if (emit_block_move_via_movmem (x, y, size, align))
1173 ;
1174 else if (may_use_call)
1175 retval = emit_block_move_via_libcall (x, y, size);
1176 else
1177 emit_block_move_via_loop (x, y, size, align);
1178
1179 if (method == BLOCK_OP_CALL_PARM)
1180 OK_DEFER_POP;
1181
1182 return retval;
1183 }
1184
1185 /* A subroutine of emit_block_move. Returns true if calling the
1186 block move libcall will not clobber any parameters which may have
1187 already been placed on the stack. */
1188
1189 static bool
1190 block_move_libcall_safe_for_call_parm (void)
1191 {
1192 /* If arguments are pushed on the stack, then they're safe. */
1193 if (PUSH_ARGS)
1194 return true;
1195
1196 /* If registers go on the stack anyway, any argument is sure to clobber
1197 an outgoing argument. */
1198 #if defined (REG_PARM_STACK_SPACE) && defined (OUTGOING_REG_PARM_STACK_SPACE)
1199 {
1200 tree fn = emit_block_move_libcall_fn (false);
1201 (void) fn;
1202 if (REG_PARM_STACK_SPACE (fn) != 0)
1203 return false;
1204 }
1205 #endif
1206
1207 /* If any argument goes in memory, then it might clobber an outgoing
1208 argument. */
1209 {
1210 CUMULATIVE_ARGS args_so_far;
1211 tree fn, arg;
1212
1213 fn = emit_block_move_libcall_fn (false);
1214 INIT_CUMULATIVE_ARGS (args_so_far, TREE_TYPE (fn), NULL_RTX, 0, 3);
1215
1216 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1217 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1218 {
1219 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1220 rtx tmp = FUNCTION_ARG (args_so_far, mode, NULL_TREE, 1);
1221 if (!tmp || !REG_P (tmp))
1222 return false;
1223 if (targetm.calls.arg_partial_bytes (&args_so_far, mode, NULL, 1))
1224 return false;
1225 FUNCTION_ARG_ADVANCE (args_so_far, mode, NULL_TREE, 1);
1226 }
1227 }
1228 return true;
1229 }
1230
1231 /* A subroutine of emit_block_move. Expand a movmem pattern;
1232 return true if successful. */
1233
1234 static bool
1235 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align)
1236 {
1237 rtx opalign = GEN_INT (align / BITS_PER_UNIT);
1238 int save_volatile_ok = volatile_ok;
1239 enum machine_mode mode;
1240
1241 /* Since this is a move insn, we don't care about volatility. */
1242 volatile_ok = 1;
1243
1244 /* Try the most limited insn first, because there's no point
1245 including more than one in the machine description unless
1246 the more limited one has some advantage. */
1247
1248 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1249 mode = GET_MODE_WIDER_MODE (mode))
1250 {
1251 enum insn_code code = movmem_optab[(int) mode];
1252 insn_operand_predicate_fn pred;
1253
1254 if (code != CODE_FOR_nothing
1255 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1256 here because if SIZE is less than the mode mask, as it is
1257 returned by the macro, it will definitely be less than the
1258 actual mode mask. */
1259 && ((GET_CODE (size) == CONST_INT
1260 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1261 <= (GET_MODE_MASK (mode) >> 1)))
1262 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD)
1263 && ((pred = insn_data[(int) code].operand[0].predicate) == 0
1264 || (*pred) (x, BLKmode))
1265 && ((pred = insn_data[(int) code].operand[1].predicate) == 0
1266 || (*pred) (y, BLKmode))
1267 && ((pred = insn_data[(int) code].operand[3].predicate) == 0
1268 || (*pred) (opalign, VOIDmode)))
1269 {
1270 rtx op2;
1271 rtx last = get_last_insn ();
1272 rtx pat;
1273
1274 op2 = convert_to_mode (mode, size, 1);
1275 pred = insn_data[(int) code].operand[2].predicate;
1276 if (pred != 0 && ! (*pred) (op2, mode))
1277 op2 = copy_to_mode_reg (mode, op2);
1278
1279 /* ??? When called via emit_block_move_for_call, it'd be
1280 nice if there were some way to inform the backend, so
1281 that it doesn't fail the expansion because it thinks
1282 emitting the libcall would be more efficient. */
1283
1284 pat = GEN_FCN ((int) code) (x, y, op2, opalign);
1285 if (pat)
1286 {
1287 emit_insn (pat);
1288 volatile_ok = save_volatile_ok;
1289 return true;
1290 }
1291 else
1292 delete_insns_since (last);
1293 }
1294 }
1295
1296 volatile_ok = save_volatile_ok;
1297 return false;
1298 }
1299
1300 /* A subroutine of emit_block_move. Expand a call to memcpy.
1301 Return the return value from memcpy, 0 otherwise. */
1302
1303 static rtx
1304 emit_block_move_via_libcall (rtx dst, rtx src, rtx size)
1305 {
1306 rtx dst_addr, src_addr;
1307 tree call_expr, arg_list, fn, src_tree, dst_tree, size_tree;
1308 enum machine_mode size_mode;
1309 rtx retval;
1310
1311 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1312 pseudos. We can then place those new pseudos into a VAR_DECL and
1313 use them later. */
1314
1315 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1316 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1317
1318 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1319 src_addr = convert_memory_address (ptr_mode, src_addr);
1320
1321 dst_tree = make_tree (ptr_type_node, dst_addr);
1322 src_tree = make_tree (ptr_type_node, src_addr);
1323
1324 size_mode = TYPE_MODE (sizetype);
1325
1326 size = convert_to_mode (size_mode, size, 1);
1327 size = copy_to_mode_reg (size_mode, size);
1328
1329 /* It is incorrect to use the libcall calling conventions to call
1330 memcpy in this context. This could be a user call to memcpy and
1331 the user may wish to examine the return value from memcpy. For
1332 targets where libcalls and normal calls have different conventions
1333 for returning pointers, we could end up generating incorrect code. */
1334
1335 size_tree = make_tree (sizetype, size);
1336
1337 fn = emit_block_move_libcall_fn (true);
1338 arg_list = tree_cons (NULL_TREE, size_tree, NULL_TREE);
1339 arg_list = tree_cons (NULL_TREE, src_tree, arg_list);
1340 arg_list = tree_cons (NULL_TREE, dst_tree, arg_list);
1341
1342 /* Now we have to build up the CALL_EXPR itself. */
1343 call_expr = build1 (ADDR_EXPR, build_pointer_type (TREE_TYPE (fn)), fn);
1344 call_expr = build3 (CALL_EXPR, TREE_TYPE (TREE_TYPE (fn)),
1345 call_expr, arg_list, NULL_TREE);
1346
1347 retval = expand_expr (call_expr, NULL_RTX, VOIDmode, 0);
1348
1349 return retval;
1350 }
1351
1352 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1353 for the function we use for block copies. The first time FOR_CALL
1354 is true, we call assemble_external. */
1355
1356 static GTY(()) tree block_move_fn;
1357
1358 void
1359 init_block_move_fn (const char *asmspec)
1360 {
1361 if (!block_move_fn)
1362 {
1363 tree args, fn;
1364
1365 fn = get_identifier ("memcpy");
1366 args = build_function_type_list (ptr_type_node, ptr_type_node,
1367 const_ptr_type_node, sizetype,
1368 NULL_TREE);
1369
1370 fn = build_decl (FUNCTION_DECL, fn, args);
1371 DECL_EXTERNAL (fn) = 1;
1372 TREE_PUBLIC (fn) = 1;
1373 DECL_ARTIFICIAL (fn) = 1;
1374 TREE_NOTHROW (fn) = 1;
1375
1376 block_move_fn = fn;
1377 }
1378
1379 if (asmspec)
1380 set_user_assembler_name (block_move_fn, asmspec);
1381 }
1382
1383 static tree
1384 emit_block_move_libcall_fn (int for_call)
1385 {
1386 static bool emitted_extern;
1387
1388 if (!block_move_fn)
1389 init_block_move_fn (NULL);
1390
1391 if (for_call && !emitted_extern)
1392 {
1393 emitted_extern = true;
1394 make_decl_rtl (block_move_fn);
1395 assemble_external (block_move_fn);
1396 }
1397
1398 return block_move_fn;
1399 }
1400
1401 /* A subroutine of emit_block_move. Copy the data via an explicit
1402 loop. This is used only when libcalls are forbidden. */
1403 /* ??? It'd be nice to copy in hunks larger than QImode. */
1404
1405 static void
1406 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1407 unsigned int align ATTRIBUTE_UNUSED)
1408 {
1409 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1410 enum machine_mode iter_mode;
1411
1412 iter_mode = GET_MODE (size);
1413 if (iter_mode == VOIDmode)
1414 iter_mode = word_mode;
1415
1416 top_label = gen_label_rtx ();
1417 cmp_label = gen_label_rtx ();
1418 iter = gen_reg_rtx (iter_mode);
1419
1420 emit_move_insn (iter, const0_rtx);
1421
1422 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1423 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1424 do_pending_stack_adjust ();
1425
1426 emit_jump (cmp_label);
1427 emit_label (top_label);
1428
1429 tmp = convert_modes (Pmode, iter_mode, iter, true);
1430 x_addr = gen_rtx_PLUS (Pmode, x_addr, tmp);
1431 y_addr = gen_rtx_PLUS (Pmode, y_addr, tmp);
1432 x = change_address (x, QImode, x_addr);
1433 y = change_address (y, QImode, y_addr);
1434
1435 emit_move_insn (x, y);
1436
1437 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1438 true, OPTAB_LIB_WIDEN);
1439 if (tmp != iter)
1440 emit_move_insn (iter, tmp);
1441
1442 emit_label (cmp_label);
1443
1444 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1445 true, top_label);
1446 }
1447 \f
1448 /* Copy all or part of a value X into registers starting at REGNO.
1449 The number of registers to be filled is NREGS. */
1450
1451 void
1452 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1453 {
1454 int i;
1455 #ifdef HAVE_load_multiple
1456 rtx pat;
1457 rtx last;
1458 #endif
1459
1460 if (nregs == 0)
1461 return;
1462
1463 if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
1464 x = validize_mem (force_const_mem (mode, x));
1465
1466 /* See if the machine can do this with a load multiple insn. */
1467 #ifdef HAVE_load_multiple
1468 if (HAVE_load_multiple)
1469 {
1470 last = get_last_insn ();
1471 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1472 GEN_INT (nregs));
1473 if (pat)
1474 {
1475 emit_insn (pat);
1476 return;
1477 }
1478 else
1479 delete_insns_since (last);
1480 }
1481 #endif
1482
1483 for (i = 0; i < nregs; i++)
1484 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1485 operand_subword_force (x, i, mode));
1486 }
1487
1488 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1489 The number of registers to be filled is NREGS. */
1490
1491 void
1492 move_block_from_reg (int regno, rtx x, int nregs)
1493 {
1494 int i;
1495
1496 if (nregs == 0)
1497 return;
1498
1499 /* See if the machine can do this with a store multiple insn. */
1500 #ifdef HAVE_store_multiple
1501 if (HAVE_store_multiple)
1502 {
1503 rtx last = get_last_insn ();
1504 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1505 GEN_INT (nregs));
1506 if (pat)
1507 {
1508 emit_insn (pat);
1509 return;
1510 }
1511 else
1512 delete_insns_since (last);
1513 }
1514 #endif
1515
1516 for (i = 0; i < nregs; i++)
1517 {
1518 rtx tem = operand_subword (x, i, 1, BLKmode);
1519
1520 gcc_assert (tem);
1521
1522 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1523 }
1524 }
1525
1526 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1527 ORIG, where ORIG is a non-consecutive group of registers represented by
1528 a PARALLEL. The clone is identical to the original except in that the
1529 original set of registers is replaced by a new set of pseudo registers.
1530 The new set has the same modes as the original set. */
1531
1532 rtx
1533 gen_group_rtx (rtx orig)
1534 {
1535 int i, length;
1536 rtx *tmps;
1537
1538 gcc_assert (GET_CODE (orig) == PARALLEL);
1539
1540 length = XVECLEN (orig, 0);
1541 tmps = alloca (sizeof (rtx) * length);
1542
1543 /* Skip a NULL entry in first slot. */
1544 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1545
1546 if (i)
1547 tmps[0] = 0;
1548
1549 for (; i < length; i++)
1550 {
1551 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1552 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1553
1554 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1555 }
1556
1557 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1558 }
1559
1560 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1561 except that values are placed in TMPS[i], and must later be moved
1562 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1563
1564 static void
1565 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1566 {
1567 rtx src;
1568 int start, i;
1569 enum machine_mode m = GET_MODE (orig_src);
1570
1571 gcc_assert (GET_CODE (dst) == PARALLEL);
1572
1573 if (m != VOIDmode
1574 && !SCALAR_INT_MODE_P (m)
1575 && !MEM_P (orig_src)
1576 && GET_CODE (orig_src) != CONCAT)
1577 {
1578 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1579 if (imode == BLKmode)
1580 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1581 else
1582 src = gen_reg_rtx (imode);
1583 if (imode != BLKmode)
1584 src = gen_lowpart (GET_MODE (orig_src), src);
1585 emit_move_insn (src, orig_src);
1586 /* ...and back again. */
1587 if (imode != BLKmode)
1588 src = gen_lowpart (imode, src);
1589 emit_group_load_1 (tmps, dst, src, type, ssize);
1590 return;
1591 }
1592
1593 /* Check for a NULL entry, used to indicate that the parameter goes
1594 both on the stack and in registers. */
1595 if (XEXP (XVECEXP (dst, 0, 0), 0))
1596 start = 0;
1597 else
1598 start = 1;
1599
1600 /* Process the pieces. */
1601 for (i = start; i < XVECLEN (dst, 0); i++)
1602 {
1603 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1604 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1605 unsigned int bytelen = GET_MODE_SIZE (mode);
1606 int shift = 0;
1607
1608 /* Handle trailing fragments that run over the size of the struct. */
1609 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1610 {
1611 /* Arrange to shift the fragment to where it belongs.
1612 extract_bit_field loads to the lsb of the reg. */
1613 if (
1614 #ifdef BLOCK_REG_PADDING
1615 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1616 == (BYTES_BIG_ENDIAN ? upward : downward)
1617 #else
1618 BYTES_BIG_ENDIAN
1619 #endif
1620 )
1621 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1622 bytelen = ssize - bytepos;
1623 gcc_assert (bytelen > 0);
1624 }
1625
1626 /* If we won't be loading directly from memory, protect the real source
1627 from strange tricks we might play; but make sure that the source can
1628 be loaded directly into the destination. */
1629 src = orig_src;
1630 if (!MEM_P (orig_src)
1631 && (!CONSTANT_P (orig_src)
1632 || (GET_MODE (orig_src) != mode
1633 && GET_MODE (orig_src) != VOIDmode)))
1634 {
1635 if (GET_MODE (orig_src) == VOIDmode)
1636 src = gen_reg_rtx (mode);
1637 else
1638 src = gen_reg_rtx (GET_MODE (orig_src));
1639
1640 emit_move_insn (src, orig_src);
1641 }
1642
1643 /* Optimize the access just a bit. */
1644 if (MEM_P (src)
1645 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1646 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1647 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1648 && bytelen == GET_MODE_SIZE (mode))
1649 {
1650 tmps[i] = gen_reg_rtx (mode);
1651 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1652 }
1653 else if (COMPLEX_MODE_P (mode)
1654 && GET_MODE (src) == mode
1655 && bytelen == GET_MODE_SIZE (mode))
1656 /* Let emit_move_complex do the bulk of the work. */
1657 tmps[i] = src;
1658 else if (GET_CODE (src) == CONCAT)
1659 {
1660 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1661 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1662
1663 if ((bytepos == 0 && bytelen == slen0)
1664 || (bytepos != 0 && bytepos + bytelen <= slen))
1665 {
1666 /* The following assumes that the concatenated objects all
1667 have the same size. In this case, a simple calculation
1668 can be used to determine the object and the bit field
1669 to be extracted. */
1670 tmps[i] = XEXP (src, bytepos / slen0);
1671 if (! CONSTANT_P (tmps[i])
1672 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1673 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1674 (bytepos % slen0) * BITS_PER_UNIT,
1675 1, NULL_RTX, mode, mode);
1676 }
1677 else
1678 {
1679 rtx mem;
1680
1681 gcc_assert (!bytepos);
1682 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1683 emit_move_insn (mem, src);
1684 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1685 0, 1, NULL_RTX, mode, mode);
1686 }
1687 }
1688 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1689 SIMD register, which is currently broken. While we get GCC
1690 to emit proper RTL for these cases, let's dump to memory. */
1691 else if (VECTOR_MODE_P (GET_MODE (dst))
1692 && REG_P (src))
1693 {
1694 int slen = GET_MODE_SIZE (GET_MODE (src));
1695 rtx mem;
1696
1697 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1698 emit_move_insn (mem, src);
1699 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1700 }
1701 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1702 && XVECLEN (dst, 0) > 1)
1703 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1704 else if (CONSTANT_P (src)
1705 || (REG_P (src) && GET_MODE (src) == mode))
1706 tmps[i] = src;
1707 else
1708 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1709 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
1710 mode, mode);
1711
1712 if (shift)
1713 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1714 build_int_cst (NULL_TREE, shift), tmps[i], 0);
1715 }
1716 }
1717
1718 /* Emit code to move a block SRC of type TYPE to a block DST,
1719 where DST is non-consecutive registers represented by a PARALLEL.
1720 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1721 if not known. */
1722
1723 void
1724 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1725 {
1726 rtx *tmps;
1727 int i;
1728
1729 tmps = alloca (sizeof (rtx) * XVECLEN (dst, 0));
1730 emit_group_load_1 (tmps, dst, src, type, ssize);
1731
1732 /* Copy the extracted pieces into the proper (probable) hard regs. */
1733 for (i = 0; i < XVECLEN (dst, 0); i++)
1734 {
1735 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1736 if (d == NULL)
1737 continue;
1738 emit_move_insn (d, tmps[i]);
1739 }
1740 }
1741
1742 /* Similar, but load SRC into new pseudos in a format that looks like
1743 PARALLEL. This can later be fed to emit_group_move to get things
1744 in the right place. */
1745
1746 rtx
1747 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1748 {
1749 rtvec vec;
1750 int i;
1751
1752 vec = rtvec_alloc (XVECLEN (parallel, 0));
1753 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1754
1755 /* Convert the vector to look just like the original PARALLEL, except
1756 with the computed values. */
1757 for (i = 0; i < XVECLEN (parallel, 0); i++)
1758 {
1759 rtx e = XVECEXP (parallel, 0, i);
1760 rtx d = XEXP (e, 0);
1761
1762 if (d)
1763 {
1764 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1765 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1766 }
1767 RTVEC_ELT (vec, i) = e;
1768 }
1769
1770 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1771 }
1772
1773 /* Emit code to move a block SRC to block DST, where SRC and DST are
1774 non-consecutive groups of registers, each represented by a PARALLEL. */
1775
1776 void
1777 emit_group_move (rtx dst, rtx src)
1778 {
1779 int i;
1780
1781 gcc_assert (GET_CODE (src) == PARALLEL
1782 && GET_CODE (dst) == PARALLEL
1783 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1784
1785 /* Skip first entry if NULL. */
1786 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1787 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1788 XEXP (XVECEXP (src, 0, i), 0));
1789 }
1790
1791 /* Move a group of registers represented by a PARALLEL into pseudos. */
1792
1793 rtx
1794 emit_group_move_into_temps (rtx src)
1795 {
1796 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1797 int i;
1798
1799 for (i = 0; i < XVECLEN (src, 0); i++)
1800 {
1801 rtx e = XVECEXP (src, 0, i);
1802 rtx d = XEXP (e, 0);
1803
1804 if (d)
1805 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1806 RTVEC_ELT (vec, i) = e;
1807 }
1808
1809 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1810 }
1811
1812 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1813 where SRC is non-consecutive registers represented by a PARALLEL.
1814 SSIZE represents the total size of block ORIG_DST, or -1 if not
1815 known. */
1816
1817 void
1818 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1819 {
1820 rtx *tmps, dst;
1821 int start, i;
1822 enum machine_mode m = GET_MODE (orig_dst);
1823
1824 gcc_assert (GET_CODE (src) == PARALLEL);
1825
1826 if (!SCALAR_INT_MODE_P (m)
1827 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1828 {
1829 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1830 if (imode == BLKmode)
1831 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1832 else
1833 dst = gen_reg_rtx (imode);
1834 emit_group_store (dst, src, type, ssize);
1835 if (imode != BLKmode)
1836 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1837 emit_move_insn (orig_dst, dst);
1838 return;
1839 }
1840
1841 /* Check for a NULL entry, used to indicate that the parameter goes
1842 both on the stack and in registers. */
1843 if (XEXP (XVECEXP (src, 0, 0), 0))
1844 start = 0;
1845 else
1846 start = 1;
1847
1848 tmps = alloca (sizeof (rtx) * XVECLEN (src, 0));
1849
1850 /* Copy the (probable) hard regs into pseudos. */
1851 for (i = start; i < XVECLEN (src, 0); i++)
1852 {
1853 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1854 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1855 emit_move_insn (tmps[i], reg);
1856 }
1857
1858 /* If we won't be storing directly into memory, protect the real destination
1859 from strange tricks we might play. */
1860 dst = orig_dst;
1861 if (GET_CODE (dst) == PARALLEL)
1862 {
1863 rtx temp;
1864
1865 /* We can get a PARALLEL dst if there is a conditional expression in
1866 a return statement. In that case, the dst and src are the same,
1867 so no action is necessary. */
1868 if (rtx_equal_p (dst, src))
1869 return;
1870
1871 /* It is unclear if we can ever reach here, but we may as well handle
1872 it. Allocate a temporary, and split this into a store/load to/from
1873 the temporary. */
1874
1875 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1876 emit_group_store (temp, src, type, ssize);
1877 emit_group_load (dst, temp, type, ssize);
1878 return;
1879 }
1880 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1881 {
1882 dst = gen_reg_rtx (GET_MODE (orig_dst));
1883 /* Make life a bit easier for combine. */
1884 emit_move_insn (dst, CONST0_RTX (GET_MODE (orig_dst)));
1885 }
1886
1887 /* Process the pieces. */
1888 for (i = start; i < XVECLEN (src, 0); i++)
1889 {
1890 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
1891 enum machine_mode mode = GET_MODE (tmps[i]);
1892 unsigned int bytelen = GET_MODE_SIZE (mode);
1893 rtx dest = dst;
1894
1895 /* Handle trailing fragments that run over the size of the struct. */
1896 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1897 {
1898 /* store_bit_field always takes its value from the lsb.
1899 Move the fragment to the lsb if it's not already there. */
1900 if (
1901 #ifdef BLOCK_REG_PADDING
1902 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
1903 == (BYTES_BIG_ENDIAN ? upward : downward)
1904 #else
1905 BYTES_BIG_ENDIAN
1906 #endif
1907 )
1908 {
1909 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1910 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
1911 build_int_cst (NULL_TREE, shift),
1912 tmps[i], 0);
1913 }
1914 bytelen = ssize - bytepos;
1915 }
1916
1917 if (GET_CODE (dst) == CONCAT)
1918 {
1919 if (bytepos + bytelen <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
1920 dest = XEXP (dst, 0);
1921 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
1922 {
1923 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
1924 dest = XEXP (dst, 1);
1925 }
1926 else
1927 {
1928 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
1929 dest = assign_stack_temp (GET_MODE (dest),
1930 GET_MODE_SIZE (GET_MODE (dest)), 0);
1931 emit_move_insn (adjust_address (dest, GET_MODE (tmps[i]), bytepos),
1932 tmps[i]);
1933 dst = dest;
1934 break;
1935 }
1936 }
1937
1938 /* Optimize the access just a bit. */
1939 if (MEM_P (dest)
1940 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
1941 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
1942 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1943 && bytelen == GET_MODE_SIZE (mode))
1944 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
1945 else
1946 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
1947 mode, tmps[i]);
1948 }
1949
1950 /* Copy from the pseudo into the (probable) hard reg. */
1951 if (orig_dst != dst)
1952 emit_move_insn (orig_dst, dst);
1953 }
1954
1955 /* Generate code to copy a BLKmode object of TYPE out of a
1956 set of registers starting with SRCREG into TGTBLK. If TGTBLK
1957 is null, a stack temporary is created. TGTBLK is returned.
1958
1959 The purpose of this routine is to handle functions that return
1960 BLKmode structures in registers. Some machines (the PA for example)
1961 want to return all small structures in registers regardless of the
1962 structure's alignment. */
1963
1964 rtx
1965 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
1966 {
1967 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
1968 rtx src = NULL, dst = NULL;
1969 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
1970 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
1971
1972 if (tgtblk == 0)
1973 {
1974 tgtblk = assign_temp (build_qualified_type (type,
1975 (TYPE_QUALS (type)
1976 | TYPE_QUAL_CONST)),
1977 0, 1, 1);
1978 preserve_temp_slots (tgtblk);
1979 }
1980
1981 /* This code assumes srcreg is at least a full word. If it isn't, copy it
1982 into a new pseudo which is a full word. */
1983
1984 if (GET_MODE (srcreg) != BLKmode
1985 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
1986 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
1987
1988 /* If the structure doesn't take up a whole number of words, see whether
1989 SRCREG is padded on the left or on the right. If it's on the left,
1990 set PADDING_CORRECTION to the number of bits to skip.
1991
1992 In most ABIs, the structure will be returned at the least end of
1993 the register, which translates to right padding on little-endian
1994 targets and left padding on big-endian targets. The opposite
1995 holds if the structure is returned at the most significant
1996 end of the register. */
1997 if (bytes % UNITS_PER_WORD != 0
1998 && (targetm.calls.return_in_msb (type)
1999 ? !BYTES_BIG_ENDIAN
2000 : BYTES_BIG_ENDIAN))
2001 padding_correction
2002 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2003
2004 /* Copy the structure BITSIZE bites at a time.
2005
2006 We could probably emit more efficient code for machines which do not use
2007 strict alignment, but it doesn't seem worth the effort at the current
2008 time. */
2009 for (bitpos = 0, xbitpos = padding_correction;
2010 bitpos < bytes * BITS_PER_UNIT;
2011 bitpos += bitsize, xbitpos += bitsize)
2012 {
2013 /* We need a new source operand each time xbitpos is on a
2014 word boundary and when xbitpos == padding_correction
2015 (the first time through). */
2016 if (xbitpos % BITS_PER_WORD == 0
2017 || xbitpos == padding_correction)
2018 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2019 GET_MODE (srcreg));
2020
2021 /* We need a new destination operand each time bitpos is on
2022 a word boundary. */
2023 if (bitpos % BITS_PER_WORD == 0)
2024 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2025
2026 /* Use xbitpos for the source extraction (right justified) and
2027 xbitpos for the destination store (left justified). */
2028 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, word_mode,
2029 extract_bit_field (src, bitsize,
2030 xbitpos % BITS_PER_WORD, 1,
2031 NULL_RTX, word_mode, word_mode));
2032 }
2033
2034 return tgtblk;
2035 }
2036
2037 /* Add a USE expression for REG to the (possibly empty) list pointed
2038 to by CALL_FUSAGE. REG must denote a hard register. */
2039
2040 void
2041 use_reg (rtx *call_fusage, rtx reg)
2042 {
2043 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2044
2045 *call_fusage
2046 = gen_rtx_EXPR_LIST (VOIDmode,
2047 gen_rtx_USE (VOIDmode, reg), *call_fusage);
2048 }
2049
2050 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2051 starting at REGNO. All of these registers must be hard registers. */
2052
2053 void
2054 use_regs (rtx *call_fusage, int regno, int nregs)
2055 {
2056 int i;
2057
2058 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2059
2060 for (i = 0; i < nregs; i++)
2061 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2062 }
2063
2064 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2065 PARALLEL REGS. This is for calls that pass values in multiple
2066 non-contiguous locations. The Irix 6 ABI has examples of this. */
2067
2068 void
2069 use_group_regs (rtx *call_fusage, rtx regs)
2070 {
2071 int i;
2072
2073 for (i = 0; i < XVECLEN (regs, 0); i++)
2074 {
2075 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2076
2077 /* A NULL entry means the parameter goes both on the stack and in
2078 registers. This can also be a MEM for targets that pass values
2079 partially on the stack and partially in registers. */
2080 if (reg != 0 && REG_P (reg))
2081 use_reg (call_fusage, reg);
2082 }
2083 }
2084 \f
2085
2086 /* Determine whether the LEN bytes generated by CONSTFUN can be
2087 stored to memory using several move instructions. CONSTFUNDATA is
2088 a pointer which will be passed as argument in every CONSTFUN call.
2089 ALIGN is maximum alignment we can assume. Return nonzero if a
2090 call to store_by_pieces should succeed. */
2091
2092 int
2093 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2094 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2095 void *constfundata, unsigned int align)
2096 {
2097 unsigned HOST_WIDE_INT l;
2098 unsigned int max_size;
2099 HOST_WIDE_INT offset = 0;
2100 enum machine_mode mode, tmode;
2101 enum insn_code icode;
2102 int reverse;
2103 rtx cst;
2104
2105 if (len == 0)
2106 return 1;
2107
2108 if (! STORE_BY_PIECES_P (len, align))
2109 return 0;
2110
2111 tmode = mode_for_size (STORE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
2112 if (align >= GET_MODE_ALIGNMENT (tmode))
2113 align = GET_MODE_ALIGNMENT (tmode);
2114 else
2115 {
2116 enum machine_mode xmode;
2117
2118 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
2119 tmode != VOIDmode;
2120 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
2121 if (GET_MODE_SIZE (tmode) > STORE_MAX_PIECES
2122 || SLOW_UNALIGNED_ACCESS (tmode, align))
2123 break;
2124
2125 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
2126 }
2127
2128 /* We would first store what we can in the largest integer mode, then go to
2129 successively smaller modes. */
2130
2131 for (reverse = 0;
2132 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2133 reverse++)
2134 {
2135 l = len;
2136 mode = VOIDmode;
2137 max_size = STORE_MAX_PIECES + 1;
2138 while (max_size > 1)
2139 {
2140 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2141 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2142 if (GET_MODE_SIZE (tmode) < max_size)
2143 mode = tmode;
2144
2145 if (mode == VOIDmode)
2146 break;
2147
2148 icode = mov_optab->handlers[(int) mode].insn_code;
2149 if (icode != CODE_FOR_nothing
2150 && align >= GET_MODE_ALIGNMENT (mode))
2151 {
2152 unsigned int size = GET_MODE_SIZE (mode);
2153
2154 while (l >= size)
2155 {
2156 if (reverse)
2157 offset -= size;
2158
2159 cst = (*constfun) (constfundata, offset, mode);
2160 if (!LEGITIMATE_CONSTANT_P (cst))
2161 return 0;
2162
2163 if (!reverse)
2164 offset += size;
2165
2166 l -= size;
2167 }
2168 }
2169
2170 max_size = GET_MODE_SIZE (mode);
2171 }
2172
2173 /* The code above should have handled everything. */
2174 gcc_assert (!l);
2175 }
2176
2177 return 1;
2178 }
2179
2180 /* Generate several move instructions to store LEN bytes generated by
2181 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2182 pointer which will be passed as argument in every CONSTFUN call.
2183 ALIGN is maximum alignment we can assume.
2184 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2185 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2186 stpcpy. */
2187
2188 rtx
2189 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2190 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2191 void *constfundata, unsigned int align, int endp)
2192 {
2193 struct store_by_pieces data;
2194
2195 if (len == 0)
2196 {
2197 gcc_assert (endp != 2);
2198 return to;
2199 }
2200
2201 gcc_assert (STORE_BY_PIECES_P (len, align));
2202 data.constfun = constfun;
2203 data.constfundata = constfundata;
2204 data.len = len;
2205 data.to = to;
2206 store_by_pieces_1 (&data, align);
2207 if (endp)
2208 {
2209 rtx to1;
2210
2211 gcc_assert (!data.reverse);
2212 if (data.autinc_to)
2213 {
2214 if (endp == 2)
2215 {
2216 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2217 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2218 else
2219 data.to_addr = copy_addr_to_reg (plus_constant (data.to_addr,
2220 -1));
2221 }
2222 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2223 data.offset);
2224 }
2225 else
2226 {
2227 if (endp == 2)
2228 --data.offset;
2229 to1 = adjust_address (data.to, QImode, data.offset);
2230 }
2231 return to1;
2232 }
2233 else
2234 return data.to;
2235 }
2236
2237 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2238 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2239
2240 static void
2241 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2242 {
2243 struct store_by_pieces data;
2244
2245 if (len == 0)
2246 return;
2247
2248 data.constfun = clear_by_pieces_1;
2249 data.constfundata = NULL;
2250 data.len = len;
2251 data.to = to;
2252 store_by_pieces_1 (&data, align);
2253 }
2254
2255 /* Callback routine for clear_by_pieces.
2256 Return const0_rtx unconditionally. */
2257
2258 static rtx
2259 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2260 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2261 enum machine_mode mode ATTRIBUTE_UNUSED)
2262 {
2263 return const0_rtx;
2264 }
2265
2266 /* Subroutine of clear_by_pieces and store_by_pieces.
2267 Generate several move instructions to store LEN bytes of block TO. (A MEM
2268 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2269
2270 static void
2271 store_by_pieces_1 (struct store_by_pieces *data ATTRIBUTE_UNUSED,
2272 unsigned int align ATTRIBUTE_UNUSED)
2273 {
2274 rtx to_addr = XEXP (data->to, 0);
2275 unsigned int max_size = STORE_MAX_PIECES + 1;
2276 enum machine_mode mode = VOIDmode, tmode;
2277 enum insn_code icode;
2278
2279 data->offset = 0;
2280 data->to_addr = to_addr;
2281 data->autinc_to
2282 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2283 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2284
2285 data->explicit_inc_to = 0;
2286 data->reverse
2287 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2288 if (data->reverse)
2289 data->offset = data->len;
2290
2291 /* If storing requires more than two move insns,
2292 copy addresses to registers (to make displacements shorter)
2293 and use post-increment if available. */
2294 if (!data->autinc_to
2295 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2296 {
2297 /* Determine the main mode we'll be using. */
2298 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2299 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2300 if (GET_MODE_SIZE (tmode) < max_size)
2301 mode = tmode;
2302
2303 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2304 {
2305 data->to_addr = copy_addr_to_reg (plus_constant (to_addr, data->len));
2306 data->autinc_to = 1;
2307 data->explicit_inc_to = -1;
2308 }
2309
2310 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2311 && ! data->autinc_to)
2312 {
2313 data->to_addr = copy_addr_to_reg (to_addr);
2314 data->autinc_to = 1;
2315 data->explicit_inc_to = 1;
2316 }
2317
2318 if ( !data->autinc_to && CONSTANT_P (to_addr))
2319 data->to_addr = copy_addr_to_reg (to_addr);
2320 }
2321
2322 tmode = mode_for_size (STORE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
2323 if (align >= GET_MODE_ALIGNMENT (tmode))
2324 align = GET_MODE_ALIGNMENT (tmode);
2325 else
2326 {
2327 enum machine_mode xmode;
2328
2329 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
2330 tmode != VOIDmode;
2331 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
2332 if (GET_MODE_SIZE (tmode) > STORE_MAX_PIECES
2333 || SLOW_UNALIGNED_ACCESS (tmode, align))
2334 break;
2335
2336 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
2337 }
2338
2339 /* First store what we can in the largest integer mode, then go to
2340 successively smaller modes. */
2341
2342 while (max_size > 1)
2343 {
2344 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2345 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2346 if (GET_MODE_SIZE (tmode) < max_size)
2347 mode = tmode;
2348
2349 if (mode == VOIDmode)
2350 break;
2351
2352 icode = mov_optab->handlers[(int) mode].insn_code;
2353 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2354 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2355
2356 max_size = GET_MODE_SIZE (mode);
2357 }
2358
2359 /* The code above should have handled everything. */
2360 gcc_assert (!data->len);
2361 }
2362
2363 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2364 with move instructions for mode MODE. GENFUN is the gen_... function
2365 to make a move insn for that mode. DATA has all the other info. */
2366
2367 static void
2368 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2369 struct store_by_pieces *data)
2370 {
2371 unsigned int size = GET_MODE_SIZE (mode);
2372 rtx to1, cst;
2373
2374 while (data->len >= size)
2375 {
2376 if (data->reverse)
2377 data->offset -= size;
2378
2379 if (data->autinc_to)
2380 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2381 data->offset);
2382 else
2383 to1 = adjust_address (data->to, mode, data->offset);
2384
2385 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2386 emit_insn (gen_add2_insn (data->to_addr,
2387 GEN_INT (-(HOST_WIDE_INT) size)));
2388
2389 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2390 emit_insn ((*genfun) (to1, cst));
2391
2392 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2393 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2394
2395 if (! data->reverse)
2396 data->offset += size;
2397
2398 data->len -= size;
2399 }
2400 }
2401 \f
2402 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2403 its length in bytes. */
2404
2405 rtx
2406 clear_storage (rtx object, rtx size)
2407 {
2408 enum machine_mode mode = GET_MODE (object);
2409 unsigned int align;
2410
2411 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2412 just move a zero. Otherwise, do this a piece at a time. */
2413 if (mode != BLKmode
2414 && GET_CODE (size) == CONST_INT
2415 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2416 {
2417 rtx zero = CONST0_RTX (mode);
2418 if (zero != NULL)
2419 {
2420 emit_move_insn (object, zero);
2421 return NULL;
2422 }
2423
2424 if (COMPLEX_MODE_P (mode))
2425 {
2426 zero = CONST0_RTX (GET_MODE_INNER (mode));
2427 if (zero != NULL)
2428 {
2429 write_complex_part (object, zero, 0);
2430 write_complex_part (object, zero, 1);
2431 return NULL;
2432 }
2433 }
2434 }
2435
2436 if (size == const0_rtx)
2437 return NULL;
2438
2439 align = MEM_ALIGN (object);
2440
2441 if (GET_CODE (size) == CONST_INT
2442 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2443 clear_by_pieces (object, INTVAL (size), align);
2444 else if (clear_storage_via_clrmem (object, size, align))
2445 ;
2446 else
2447 return clear_storage_via_libcall (object, size);
2448
2449 return NULL;
2450 }
2451
2452 /* A subroutine of clear_storage. Expand a clrmem pattern;
2453 return true if successful. */
2454
2455 static bool
2456 clear_storage_via_clrmem (rtx object, rtx size, unsigned int align)
2457 {
2458 /* Try the most limited insn first, because there's no point
2459 including more than one in the machine description unless
2460 the more limited one has some advantage. */
2461
2462 rtx opalign = GEN_INT (align / BITS_PER_UNIT);
2463 enum machine_mode mode;
2464
2465 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2466 mode = GET_MODE_WIDER_MODE (mode))
2467 {
2468 enum insn_code code = clrmem_optab[(int) mode];
2469 insn_operand_predicate_fn pred;
2470
2471 if (code != CODE_FOR_nothing
2472 /* We don't need MODE to be narrower than
2473 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2474 the mode mask, as it is returned by the macro, it will
2475 definitely be less than the actual mode mask. */
2476 && ((GET_CODE (size) == CONST_INT
2477 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2478 <= (GET_MODE_MASK (mode) >> 1)))
2479 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD)
2480 && ((pred = insn_data[(int) code].operand[0].predicate) == 0
2481 || (*pred) (object, BLKmode))
2482 && ((pred = insn_data[(int) code].operand[2].predicate) == 0
2483 || (*pred) (opalign, VOIDmode)))
2484 {
2485 rtx op1;
2486 rtx last = get_last_insn ();
2487 rtx pat;
2488
2489 op1 = convert_to_mode (mode, size, 1);
2490 pred = insn_data[(int) code].operand[1].predicate;
2491 if (pred != 0 && ! (*pred) (op1, mode))
2492 op1 = copy_to_mode_reg (mode, op1);
2493
2494 pat = GEN_FCN ((int) code) (object, op1, opalign);
2495 if (pat)
2496 {
2497 emit_insn (pat);
2498 return true;
2499 }
2500 else
2501 delete_insns_since (last);
2502 }
2503 }
2504
2505 return false;
2506 }
2507
2508 /* A subroutine of clear_storage. Expand a call to memset.
2509 Return the return value of memset, 0 otherwise. */
2510
2511 static rtx
2512 clear_storage_via_libcall (rtx object, rtx size)
2513 {
2514 tree call_expr, arg_list, fn, object_tree, size_tree;
2515 enum machine_mode size_mode;
2516 rtx retval;
2517
2518 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2519 place those into new pseudos into a VAR_DECL and use them later. */
2520
2521 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2522
2523 size_mode = TYPE_MODE (sizetype);
2524 size = convert_to_mode (size_mode, size, 1);
2525 size = copy_to_mode_reg (size_mode, size);
2526
2527 /* It is incorrect to use the libcall calling conventions to call
2528 memset in this context. This could be a user call to memset and
2529 the user may wish to examine the return value from memset. For
2530 targets where libcalls and normal calls have different conventions
2531 for returning pointers, we could end up generating incorrect code. */
2532
2533 object_tree = make_tree (ptr_type_node, object);
2534 size_tree = make_tree (sizetype, size);
2535
2536 fn = clear_storage_libcall_fn (true);
2537 arg_list = tree_cons (NULL_TREE, size_tree, NULL_TREE);
2538 arg_list = tree_cons (NULL_TREE, integer_zero_node, arg_list);
2539 arg_list = tree_cons (NULL_TREE, object_tree, arg_list);
2540
2541 /* Now we have to build up the CALL_EXPR itself. */
2542 call_expr = build1 (ADDR_EXPR, build_pointer_type (TREE_TYPE (fn)), fn);
2543 call_expr = build3 (CALL_EXPR, TREE_TYPE (TREE_TYPE (fn)),
2544 call_expr, arg_list, NULL_TREE);
2545
2546 retval = expand_expr (call_expr, NULL_RTX, VOIDmode, 0);
2547
2548 return retval;
2549 }
2550
2551 /* A subroutine of clear_storage_via_libcall. Create the tree node
2552 for the function we use for block clears. The first time FOR_CALL
2553 is true, we call assemble_external. */
2554
2555 static GTY(()) tree block_clear_fn;
2556
2557 void
2558 init_block_clear_fn (const char *asmspec)
2559 {
2560 if (!block_clear_fn)
2561 {
2562 tree fn, args;
2563
2564 fn = get_identifier ("memset");
2565 args = build_function_type_list (ptr_type_node, ptr_type_node,
2566 integer_type_node, sizetype,
2567 NULL_TREE);
2568
2569 fn = build_decl (FUNCTION_DECL, fn, args);
2570 DECL_EXTERNAL (fn) = 1;
2571 TREE_PUBLIC (fn) = 1;
2572 DECL_ARTIFICIAL (fn) = 1;
2573 TREE_NOTHROW (fn) = 1;
2574
2575 block_clear_fn = fn;
2576 }
2577
2578 if (asmspec)
2579 set_user_assembler_name (block_clear_fn, asmspec);
2580 }
2581
2582 static tree
2583 clear_storage_libcall_fn (int for_call)
2584 {
2585 static bool emitted_extern;
2586
2587 if (!block_clear_fn)
2588 init_block_clear_fn (NULL);
2589
2590 if (for_call && !emitted_extern)
2591 {
2592 emitted_extern = true;
2593 make_decl_rtl (block_clear_fn);
2594 assemble_external (block_clear_fn);
2595 }
2596
2597 return block_clear_fn;
2598 }
2599 \f
2600 /* Write to one of the components of the complex value CPLX. Write VAL to
2601 the real part if IMAG_P is false, and the imaginary part if its true. */
2602
2603 static void
2604 write_complex_part (rtx cplx, rtx val, bool imag_p)
2605 {
2606 enum machine_mode cmode;
2607 enum machine_mode imode;
2608 unsigned ibitsize;
2609
2610 if (GET_CODE (cplx) == CONCAT)
2611 {
2612 emit_move_insn (XEXP (cplx, imag_p), val);
2613 return;
2614 }
2615
2616 cmode = GET_MODE (cplx);
2617 imode = GET_MODE_INNER (cmode);
2618 ibitsize = GET_MODE_BITSIZE (imode);
2619
2620 /* If the sub-object is at least word sized, then we know that subregging
2621 will work. This special case is important, since store_bit_field
2622 wants to operate on integer modes, and there's rarely an OImode to
2623 correspond to TCmode. */
2624 if (ibitsize >= BITS_PER_WORD
2625 /* For hard regs we have exact predicates. Assume we can split
2626 the original object if it spans an even number of hard regs.
2627 This special case is important for SCmode on 64-bit platforms
2628 where the natural size of floating-point regs is 32-bit. */
2629 || (GET_CODE (cplx) == REG
2630 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2631 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0)
2632 /* For MEMs we always try to make a "subreg", that is to adjust
2633 the MEM, because store_bit_field may generate overly
2634 convoluted RTL for sub-word fields. */
2635 || MEM_P (cplx))
2636 {
2637 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2638 imag_p ? GET_MODE_SIZE (imode) : 0);
2639 if (part)
2640 {
2641 emit_move_insn (part, val);
2642 return;
2643 }
2644 else
2645 /* simplify_gen_subreg may fail for sub-word MEMs. */
2646 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2647 }
2648
2649 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, imode, val);
2650 }
2651
2652 /* Extract one of the components of the complex value CPLX. Extract the
2653 real part if IMAG_P is false, and the imaginary part if it's true. */
2654
2655 static rtx
2656 read_complex_part (rtx cplx, bool imag_p)
2657 {
2658 enum machine_mode cmode, imode;
2659 unsigned ibitsize;
2660
2661 if (GET_CODE (cplx) == CONCAT)
2662 return XEXP (cplx, imag_p);
2663
2664 cmode = GET_MODE (cplx);
2665 imode = GET_MODE_INNER (cmode);
2666 ibitsize = GET_MODE_BITSIZE (imode);
2667
2668 /* Special case reads from complex constants that got spilled to memory. */
2669 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2670 {
2671 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2672 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2673 {
2674 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2675 if (CONSTANT_CLASS_P (part))
2676 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2677 }
2678 }
2679
2680 /* If the sub-object is at least word sized, then we know that subregging
2681 will work. This special case is important, since extract_bit_field
2682 wants to operate on integer modes, and there's rarely an OImode to
2683 correspond to TCmode. */
2684 if (ibitsize >= BITS_PER_WORD
2685 /* For hard regs we have exact predicates. Assume we can split
2686 the original object if it spans an even number of hard regs.
2687 This special case is important for SCmode on 64-bit platforms
2688 where the natural size of floating-point regs is 32-bit. */
2689 || (GET_CODE (cplx) == REG
2690 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2691 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0)
2692 /* For MEMs we always try to make a "subreg", that is to adjust
2693 the MEM, because extract_bit_field may generate overly
2694 convoluted RTL for sub-word fields. */
2695 || MEM_P (cplx))
2696 {
2697 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2698 imag_p ? GET_MODE_SIZE (imode) : 0);
2699 if (ret)
2700 return ret;
2701 else
2702 /* simplify_gen_subreg may fail for sub-word MEMs. */
2703 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2704 }
2705
2706 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2707 true, NULL_RTX, imode, imode);
2708 }
2709 \f
2710 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2711 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2712 represented in NEW_MODE. If FORCE is true, this will never happen, as
2713 we'll force-create a SUBREG if needed. */
2714
2715 static rtx
2716 emit_move_change_mode (enum machine_mode new_mode,
2717 enum machine_mode old_mode, rtx x, bool force)
2718 {
2719 rtx ret;
2720
2721 if (reload_in_progress && MEM_P (x))
2722 {
2723 /* We can't use gen_lowpart here because it may call change_address
2724 which is not appropriate if we were called when a reload was in
2725 progress. We don't have to worry about changing the address since
2726 the size in bytes is supposed to be the same. Copy the MEM to
2727 change the mode and move any substitutions from the old MEM to
2728 the new one. */
2729
2730 ret = adjust_address_nv (x, new_mode, 0);
2731 copy_replacements (x, ret);
2732 }
2733 else
2734 {
2735 /* Note that we do want simplify_subreg's behavior of validating
2736 that the new mode is ok for a hard register. If we were to use
2737 simplify_gen_subreg, we would create the subreg, but would
2738 probably run into the target not being able to implement it. */
2739 /* Except, of course, when FORCE is true, when this is exactly what
2740 we want. Which is needed for CCmodes on some targets. */
2741 if (force)
2742 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
2743 else
2744 ret = simplify_subreg (new_mode, x, old_mode, 0);
2745 }
2746
2747 return ret;
2748 }
2749
2750 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
2751 an integer mode of the same size as MODE. Returns the instruction
2752 emitted, or NULL if such a move could not be generated. */
2753
2754 static rtx
2755 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y)
2756 {
2757 enum machine_mode imode;
2758 enum insn_code code;
2759
2760 /* There must exist a mode of the exact size we require. */
2761 imode = int_mode_for_mode (mode);
2762 if (imode == BLKmode)
2763 return NULL_RTX;
2764
2765 /* The target must support moves in this mode. */
2766 code = mov_optab->handlers[imode].insn_code;
2767 if (code == CODE_FOR_nothing)
2768 return NULL_RTX;
2769
2770 x = emit_move_change_mode (imode, mode, x, false);
2771 if (x == NULL_RTX)
2772 return NULL_RTX;
2773 y = emit_move_change_mode (imode, mode, y, false);
2774 if (y == NULL_RTX)
2775 return NULL_RTX;
2776 return emit_insn (GEN_FCN (code) (x, y));
2777 }
2778
2779 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
2780 Return an equivalent MEM that does not use an auto-increment. */
2781
2782 static rtx
2783 emit_move_resolve_push (enum machine_mode mode, rtx x)
2784 {
2785 enum rtx_code code = GET_CODE (XEXP (x, 0));
2786 HOST_WIDE_INT adjust;
2787 rtx temp;
2788
2789 adjust = GET_MODE_SIZE (mode);
2790 #ifdef PUSH_ROUNDING
2791 adjust = PUSH_ROUNDING (adjust);
2792 #endif
2793 if (code == PRE_DEC || code == POST_DEC)
2794 adjust = -adjust;
2795
2796 /* Do not use anti_adjust_stack, since we don't want to update
2797 stack_pointer_delta. */
2798 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
2799 GEN_INT (adjust), stack_pointer_rtx,
2800 0, OPTAB_LIB_WIDEN);
2801 if (temp != stack_pointer_rtx)
2802 emit_move_insn (stack_pointer_rtx, temp);
2803
2804 switch (code)
2805 {
2806 case PRE_INC:
2807 case PRE_DEC:
2808 temp = stack_pointer_rtx;
2809 break;
2810 case POST_INC:
2811 temp = plus_constant (stack_pointer_rtx, -GET_MODE_SIZE (mode));
2812 break;
2813 case POST_DEC:
2814 temp = plus_constant (stack_pointer_rtx, GET_MODE_SIZE (mode));
2815 break;
2816 default:
2817 gcc_unreachable ();
2818 }
2819
2820 return replace_equiv_address (x, temp);
2821 }
2822
2823 /* A subroutine of emit_move_complex. Generate a move from Y into X.
2824 X is known to satisfy push_operand, and MODE is known to be complex.
2825 Returns the last instruction emitted. */
2826
2827 static rtx
2828 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
2829 {
2830 enum machine_mode submode = GET_MODE_INNER (mode);
2831 bool imag_first;
2832
2833 #ifdef PUSH_ROUNDING
2834 unsigned int submodesize = GET_MODE_SIZE (submode);
2835
2836 /* In case we output to the stack, but the size is smaller than the
2837 machine can push exactly, we need to use move instructions. */
2838 if (PUSH_ROUNDING (submodesize) != submodesize)
2839 {
2840 x = emit_move_resolve_push (mode, x);
2841 return emit_move_insn (x, y);
2842 }
2843 #endif
2844
2845 /* Note that the real part always precedes the imag part in memory
2846 regardless of machine's endianness. */
2847 switch (GET_CODE (XEXP (x, 0)))
2848 {
2849 case PRE_DEC:
2850 case POST_DEC:
2851 imag_first = true;
2852 break;
2853 case PRE_INC:
2854 case POST_INC:
2855 imag_first = false;
2856 break;
2857 default:
2858 gcc_unreachable ();
2859 }
2860
2861 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
2862 read_complex_part (y, imag_first));
2863 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
2864 read_complex_part (y, !imag_first));
2865 }
2866
2867 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
2868 MODE is known to be complex. Returns the last instruction emitted. */
2869
2870 static rtx
2871 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
2872 {
2873 bool try_int;
2874
2875 /* Need to take special care for pushes, to maintain proper ordering
2876 of the data, and possibly extra padding. */
2877 if (push_operand (x, mode))
2878 return emit_move_complex_push (mode, x, y);
2879
2880 /* See if we can coerce the target into moving both values at once. */
2881
2882 /* Move floating point as parts. */
2883 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
2884 && mov_optab->handlers[GET_MODE_INNER (mode)].insn_code != CODE_FOR_nothing)
2885 try_int = false;
2886 /* Not possible if the values are inherently not adjacent. */
2887 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
2888 try_int = false;
2889 /* Is possible if both are registers (or subregs of registers). */
2890 else if (register_operand (x, mode) && register_operand (y, mode))
2891 try_int = true;
2892 /* If one of the operands is a memory, and alignment constraints
2893 are friendly enough, we may be able to do combined memory operations.
2894 We do not attempt this if Y is a constant because that combination is
2895 usually better with the by-parts thing below. */
2896 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
2897 && (!STRICT_ALIGNMENT
2898 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
2899 try_int = true;
2900 else
2901 try_int = false;
2902
2903 if (try_int)
2904 {
2905 rtx ret;
2906
2907 /* For memory to memory moves, optimal behavior can be had with the
2908 existing block move logic. */
2909 if (MEM_P (x) && MEM_P (y))
2910 {
2911 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
2912 BLOCK_OP_NO_LIBCALL);
2913 return get_last_insn ();
2914 }
2915
2916 ret = emit_move_via_integer (mode, x, y);
2917 if (ret)
2918 return ret;
2919 }
2920
2921 /* Show the output dies here. This is necessary for SUBREGs
2922 of pseudos since we cannot track their lifetimes correctly;
2923 hard regs shouldn't appear here except as return values. */
2924 if (!reload_completed && !reload_in_progress
2925 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
2926 emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
2927
2928 write_complex_part (x, read_complex_part (y, false), false);
2929 write_complex_part (x, read_complex_part (y, true), true);
2930 return get_last_insn ();
2931 }
2932
2933 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
2934 MODE is known to be MODE_CC. Returns the last instruction emitted. */
2935
2936 static rtx
2937 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
2938 {
2939 rtx ret;
2940
2941 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
2942 if (mode != CCmode)
2943 {
2944 enum insn_code code = mov_optab->handlers[CCmode].insn_code;
2945 if (code != CODE_FOR_nothing)
2946 {
2947 x = emit_move_change_mode (CCmode, mode, x, true);
2948 y = emit_move_change_mode (CCmode, mode, y, true);
2949 return emit_insn (GEN_FCN (code) (x, y));
2950 }
2951 }
2952
2953 /* Otherwise, find the MODE_INT mode of the same width. */
2954 ret = emit_move_via_integer (mode, x, y);
2955 gcc_assert (ret != NULL);
2956 return ret;
2957 }
2958
2959 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
2960 MODE is any multi-word or full-word mode that lacks a move_insn
2961 pattern. Note that you will get better code if you define such
2962 patterns, even if they must turn into multiple assembler instructions. */
2963
2964 static rtx
2965 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
2966 {
2967 rtx last_insn = 0;
2968 rtx seq, inner;
2969 bool need_clobber;
2970 int i;
2971
2972 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
2973
2974 /* If X is a push on the stack, do the push now and replace
2975 X with a reference to the stack pointer. */
2976 if (push_operand (x, mode))
2977 x = emit_move_resolve_push (mode, x);
2978
2979 /* If we are in reload, see if either operand is a MEM whose address
2980 is scheduled for replacement. */
2981 if (reload_in_progress && MEM_P (x)
2982 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
2983 x = replace_equiv_address_nv (x, inner);
2984 if (reload_in_progress && MEM_P (y)
2985 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
2986 y = replace_equiv_address_nv (y, inner);
2987
2988 start_sequence ();
2989
2990 need_clobber = false;
2991 for (i = 0;
2992 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
2993 i++)
2994 {
2995 rtx xpart = operand_subword (x, i, 1, mode);
2996 rtx ypart = operand_subword (y, i, 1, mode);
2997
2998 /* If we can't get a part of Y, put Y into memory if it is a
2999 constant. Otherwise, force it into a register. If we still
3000 can't get a part of Y, abort. */
3001 if (ypart == 0 && CONSTANT_P (y))
3002 {
3003 y = force_const_mem (mode, y);
3004 ypart = operand_subword (y, i, 1, mode);
3005 }
3006 else if (ypart == 0)
3007 ypart = operand_subword_force (y, i, mode);
3008
3009 gcc_assert (xpart && ypart);
3010
3011 need_clobber |= (GET_CODE (xpart) == SUBREG);
3012
3013 last_insn = emit_move_insn (xpart, ypart);
3014 }
3015
3016 seq = get_insns ();
3017 end_sequence ();
3018
3019 /* Show the output dies here. This is necessary for SUBREGs
3020 of pseudos since we cannot track their lifetimes correctly;
3021 hard regs shouldn't appear here except as return values.
3022 We never want to emit such a clobber after reload. */
3023 if (x != y
3024 && ! (reload_in_progress || reload_completed)
3025 && need_clobber != 0)
3026 emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
3027
3028 emit_insn (seq);
3029
3030 return last_insn;
3031 }
3032
3033 /* Low level part of emit_move_insn.
3034 Called just like emit_move_insn, but assumes X and Y
3035 are basically valid. */
3036
3037 rtx
3038 emit_move_insn_1 (rtx x, rtx y)
3039 {
3040 enum machine_mode mode = GET_MODE (x);
3041 enum insn_code code;
3042
3043 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3044
3045 code = mov_optab->handlers[mode].insn_code;
3046 if (code != CODE_FOR_nothing)
3047 return emit_insn (GEN_FCN (code) (x, y));
3048
3049 /* Expand complex moves by moving real part and imag part. */
3050 if (COMPLEX_MODE_P (mode))
3051 return emit_move_complex (mode, x, y);
3052
3053 if (GET_MODE_CLASS (mode) == MODE_CC)
3054 return emit_move_ccmode (mode, x, y);
3055
3056 /* Try using a move pattern for the corresponding integer mode. This is
3057 only safe when simplify_subreg can convert MODE constants into integer
3058 constants. At present, it can only do this reliably if the value
3059 fits within a HOST_WIDE_INT. */
3060 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3061 {
3062 rtx ret = emit_move_via_integer (mode, x, y);
3063 if (ret)
3064 return ret;
3065 }
3066
3067 return emit_move_multi_word (mode, x, y);
3068 }
3069
3070 /* Generate code to copy Y into X.
3071 Both Y and X must have the same mode, except that
3072 Y can be a constant with VOIDmode.
3073 This mode cannot be BLKmode; use emit_block_move for that.
3074
3075 Return the last instruction emitted. */
3076
3077 rtx
3078 emit_move_insn (rtx x, rtx y)
3079 {
3080 enum machine_mode mode = GET_MODE (x);
3081 rtx y_cst = NULL_RTX;
3082 rtx last_insn, set;
3083
3084 gcc_assert (mode != BLKmode
3085 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3086
3087 if (CONSTANT_P (y))
3088 {
3089 if (optimize
3090 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3091 && (last_insn = compress_float_constant (x, y)))
3092 return last_insn;
3093
3094 y_cst = y;
3095
3096 if (!LEGITIMATE_CONSTANT_P (y))
3097 {
3098 y = force_const_mem (mode, y);
3099
3100 /* If the target's cannot_force_const_mem prevented the spill,
3101 assume that the target's move expanders will also take care
3102 of the non-legitimate constant. */
3103 if (!y)
3104 y = y_cst;
3105 }
3106 }
3107
3108 /* If X or Y are memory references, verify that their addresses are valid
3109 for the machine. */
3110 if (MEM_P (x)
3111 && ((! memory_address_p (GET_MODE (x), XEXP (x, 0))
3112 && ! push_operand (x, GET_MODE (x)))
3113 || (flag_force_addr
3114 && CONSTANT_ADDRESS_P (XEXP (x, 0)))))
3115 x = validize_mem (x);
3116
3117 if (MEM_P (y)
3118 && (! memory_address_p (GET_MODE (y), XEXP (y, 0))
3119 || (flag_force_addr
3120 && CONSTANT_ADDRESS_P (XEXP (y, 0)))))
3121 y = validize_mem (y);
3122
3123 gcc_assert (mode != BLKmode);
3124
3125 last_insn = emit_move_insn_1 (x, y);
3126
3127 if (y_cst && REG_P (x)
3128 && (set = single_set (last_insn)) != NULL_RTX
3129 && SET_DEST (set) == x
3130 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3131 set_unique_reg_note (last_insn, REG_EQUAL, y_cst);
3132
3133 return last_insn;
3134 }
3135
3136 /* If Y is representable exactly in a narrower mode, and the target can
3137 perform the extension directly from constant or memory, then emit the
3138 move as an extension. */
3139
3140 static rtx
3141 compress_float_constant (rtx x, rtx y)
3142 {
3143 enum machine_mode dstmode = GET_MODE (x);
3144 enum machine_mode orig_srcmode = GET_MODE (y);
3145 enum machine_mode srcmode;
3146 REAL_VALUE_TYPE r;
3147
3148 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3149
3150 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3151 srcmode != orig_srcmode;
3152 srcmode = GET_MODE_WIDER_MODE (srcmode))
3153 {
3154 enum insn_code ic;
3155 rtx trunc_y, last_insn;
3156
3157 /* Skip if the target can't extend this way. */
3158 ic = can_extend_p (dstmode, srcmode, 0);
3159 if (ic == CODE_FOR_nothing)
3160 continue;
3161
3162 /* Skip if the narrowed value isn't exact. */
3163 if (! exact_real_truncate (srcmode, &r))
3164 continue;
3165
3166 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3167
3168 if (LEGITIMATE_CONSTANT_P (trunc_y))
3169 {
3170 /* Skip if the target needs extra instructions to perform
3171 the extension. */
3172 if (! (*insn_data[ic].operand[1].predicate) (trunc_y, srcmode))
3173 continue;
3174 }
3175 else if (float_extend_from_mem[dstmode][srcmode])
3176 trunc_y = validize_mem (force_const_mem (srcmode, trunc_y));
3177 else
3178 continue;
3179
3180 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3181 last_insn = get_last_insn ();
3182
3183 if (REG_P (x))
3184 set_unique_reg_note (last_insn, REG_EQUAL, y);
3185
3186 return last_insn;
3187 }
3188
3189 return NULL_RTX;
3190 }
3191 \f
3192 /* Pushing data onto the stack. */
3193
3194 /* Push a block of length SIZE (perhaps variable)
3195 and return an rtx to address the beginning of the block.
3196 The value may be virtual_outgoing_args_rtx.
3197
3198 EXTRA is the number of bytes of padding to push in addition to SIZE.
3199 BELOW nonzero means this padding comes at low addresses;
3200 otherwise, the padding comes at high addresses. */
3201
3202 rtx
3203 push_block (rtx size, int extra, int below)
3204 {
3205 rtx temp;
3206
3207 size = convert_modes (Pmode, ptr_mode, size, 1);
3208 if (CONSTANT_P (size))
3209 anti_adjust_stack (plus_constant (size, extra));
3210 else if (REG_P (size) && extra == 0)
3211 anti_adjust_stack (size);
3212 else
3213 {
3214 temp = copy_to_mode_reg (Pmode, size);
3215 if (extra != 0)
3216 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3217 temp, 0, OPTAB_LIB_WIDEN);
3218 anti_adjust_stack (temp);
3219 }
3220
3221 #ifndef STACK_GROWS_DOWNWARD
3222 if (0)
3223 #else
3224 if (1)
3225 #endif
3226 {
3227 temp = virtual_outgoing_args_rtx;
3228 if (extra != 0 && below)
3229 temp = plus_constant (temp, extra);
3230 }
3231 else
3232 {
3233 if (GET_CODE (size) == CONST_INT)
3234 temp = plus_constant (virtual_outgoing_args_rtx,
3235 -INTVAL (size) - (below ? 0 : extra));
3236 else if (extra != 0 && !below)
3237 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3238 negate_rtx (Pmode, plus_constant (size, extra)));
3239 else
3240 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3241 negate_rtx (Pmode, size));
3242 }
3243
3244 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3245 }
3246
3247 #ifdef PUSH_ROUNDING
3248
3249 /* Emit single push insn. */
3250
3251 static void
3252 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3253 {
3254 rtx dest_addr;
3255 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3256 rtx dest;
3257 enum insn_code icode;
3258 insn_operand_predicate_fn pred;
3259
3260 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3261 /* If there is push pattern, use it. Otherwise try old way of throwing
3262 MEM representing push operation to move expander. */
3263 icode = push_optab->handlers[(int) mode].insn_code;
3264 if (icode != CODE_FOR_nothing)
3265 {
3266 if (((pred = insn_data[(int) icode].operand[0].predicate)
3267 && !((*pred) (x, mode))))
3268 x = force_reg (mode, x);
3269 emit_insn (GEN_FCN (icode) (x));
3270 return;
3271 }
3272 if (GET_MODE_SIZE (mode) == rounded_size)
3273 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3274 /* If we are to pad downward, adjust the stack pointer first and
3275 then store X into the stack location using an offset. This is
3276 because emit_move_insn does not know how to pad; it does not have
3277 access to type. */
3278 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3279 {
3280 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3281 HOST_WIDE_INT offset;
3282
3283 emit_move_insn (stack_pointer_rtx,
3284 expand_binop (Pmode,
3285 #ifdef STACK_GROWS_DOWNWARD
3286 sub_optab,
3287 #else
3288 add_optab,
3289 #endif
3290 stack_pointer_rtx,
3291 GEN_INT (rounded_size),
3292 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3293
3294 offset = (HOST_WIDE_INT) padding_size;
3295 #ifdef STACK_GROWS_DOWNWARD
3296 if (STACK_PUSH_CODE == POST_DEC)
3297 /* We have already decremented the stack pointer, so get the
3298 previous value. */
3299 offset += (HOST_WIDE_INT) rounded_size;
3300 #else
3301 if (STACK_PUSH_CODE == POST_INC)
3302 /* We have already incremented the stack pointer, so get the
3303 previous value. */
3304 offset -= (HOST_WIDE_INT) rounded_size;
3305 #endif
3306 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3307 }
3308 else
3309 {
3310 #ifdef STACK_GROWS_DOWNWARD
3311 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3312 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3313 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3314 #else
3315 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3316 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3317 GEN_INT (rounded_size));
3318 #endif
3319 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3320 }
3321
3322 dest = gen_rtx_MEM (mode, dest_addr);
3323
3324 if (type != 0)
3325 {
3326 set_mem_attributes (dest, type, 1);
3327
3328 if (flag_optimize_sibling_calls)
3329 /* Function incoming arguments may overlap with sibling call
3330 outgoing arguments and we cannot allow reordering of reads
3331 from function arguments with stores to outgoing arguments
3332 of sibling calls. */
3333 set_mem_alias_set (dest, 0);
3334 }
3335 emit_move_insn (dest, x);
3336 }
3337 #endif
3338
3339 /* Generate code to push X onto the stack, assuming it has mode MODE and
3340 type TYPE.
3341 MODE is redundant except when X is a CONST_INT (since they don't
3342 carry mode info).
3343 SIZE is an rtx for the size of data to be copied (in bytes),
3344 needed only if X is BLKmode.
3345
3346 ALIGN (in bits) is maximum alignment we can assume.
3347
3348 If PARTIAL and REG are both nonzero, then copy that many of the first
3349 bytes of X into registers starting with REG, and push the rest of X.
3350 The amount of space pushed is decreased by PARTIAL bytes.
3351 REG must be a hard register in this case.
3352 If REG is zero but PARTIAL is not, take any all others actions for an
3353 argument partially in registers, but do not actually load any
3354 registers.
3355
3356 EXTRA is the amount in bytes of extra space to leave next to this arg.
3357 This is ignored if an argument block has already been allocated.
3358
3359 On a machine that lacks real push insns, ARGS_ADDR is the address of
3360 the bottom of the argument block for this call. We use indexing off there
3361 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3362 argument block has not been preallocated.
3363
3364 ARGS_SO_FAR is the size of args previously pushed for this call.
3365
3366 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3367 for arguments passed in registers. If nonzero, it will be the number
3368 of bytes required. */
3369
3370 void
3371 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3372 unsigned int align, int partial, rtx reg, int extra,
3373 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3374 rtx alignment_pad)
3375 {
3376 rtx xinner;
3377 enum direction stack_direction
3378 #ifdef STACK_GROWS_DOWNWARD
3379 = downward;
3380 #else
3381 = upward;
3382 #endif
3383
3384 /* Decide where to pad the argument: `downward' for below,
3385 `upward' for above, or `none' for don't pad it.
3386 Default is below for small data on big-endian machines; else above. */
3387 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3388
3389 /* Invert direction if stack is post-decrement.
3390 FIXME: why? */
3391 if (STACK_PUSH_CODE == POST_DEC)
3392 if (where_pad != none)
3393 where_pad = (where_pad == downward ? upward : downward);
3394
3395 xinner = x;
3396
3397 if (mode == BLKmode)
3398 {
3399 /* Copy a block into the stack, entirely or partially. */
3400
3401 rtx temp;
3402 int used;
3403 int offset;
3404 int skip;
3405
3406 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3407 used = partial - offset;
3408
3409 gcc_assert (size);
3410
3411 /* USED is now the # of bytes we need not copy to the stack
3412 because registers will take care of them. */
3413
3414 if (partial != 0)
3415 xinner = adjust_address (xinner, BLKmode, used);
3416
3417 /* If the partial register-part of the arg counts in its stack size,
3418 skip the part of stack space corresponding to the registers.
3419 Otherwise, start copying to the beginning of the stack space,
3420 by setting SKIP to 0. */
3421 skip = (reg_parm_stack_space == 0) ? 0 : used;
3422
3423 #ifdef PUSH_ROUNDING
3424 /* Do it with several push insns if that doesn't take lots of insns
3425 and if there is no difficulty with push insns that skip bytes
3426 on the stack for alignment purposes. */
3427 if (args_addr == 0
3428 && PUSH_ARGS
3429 && GET_CODE (size) == CONST_INT
3430 && skip == 0
3431 && MEM_ALIGN (xinner) >= align
3432 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
3433 /* Here we avoid the case of a structure whose weak alignment
3434 forces many pushes of a small amount of data,
3435 and such small pushes do rounding that causes trouble. */
3436 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
3437 || align >= BIGGEST_ALIGNMENT
3438 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
3439 == (align / BITS_PER_UNIT)))
3440 && PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
3441 {
3442 /* Push padding now if padding above and stack grows down,
3443 or if padding below and stack grows up.
3444 But if space already allocated, this has already been done. */
3445 if (extra && args_addr == 0
3446 && where_pad != none && where_pad != stack_direction)
3447 anti_adjust_stack (GEN_INT (extra));
3448
3449 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
3450 }
3451 else
3452 #endif /* PUSH_ROUNDING */
3453 {
3454 rtx target;
3455
3456 /* Otherwise make space on the stack and copy the data
3457 to the address of that space. */
3458
3459 /* Deduct words put into registers from the size we must copy. */
3460 if (partial != 0)
3461 {
3462 if (GET_CODE (size) == CONST_INT)
3463 size = GEN_INT (INTVAL (size) - used);
3464 else
3465 size = expand_binop (GET_MODE (size), sub_optab, size,
3466 GEN_INT (used), NULL_RTX, 0,
3467 OPTAB_LIB_WIDEN);
3468 }
3469
3470 /* Get the address of the stack space.
3471 In this case, we do not deal with EXTRA separately.
3472 A single stack adjust will do. */
3473 if (! args_addr)
3474 {
3475 temp = push_block (size, extra, where_pad == downward);
3476 extra = 0;
3477 }
3478 else if (GET_CODE (args_so_far) == CONST_INT)
3479 temp = memory_address (BLKmode,
3480 plus_constant (args_addr,
3481 skip + INTVAL (args_so_far)));
3482 else
3483 temp = memory_address (BLKmode,
3484 plus_constant (gen_rtx_PLUS (Pmode,
3485 args_addr,
3486 args_so_far),
3487 skip));
3488
3489 if (!ACCUMULATE_OUTGOING_ARGS)
3490 {
3491 /* If the source is referenced relative to the stack pointer,
3492 copy it to another register to stabilize it. We do not need
3493 to do this if we know that we won't be changing sp. */
3494
3495 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
3496 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
3497 temp = copy_to_reg (temp);
3498 }
3499
3500 target = gen_rtx_MEM (BLKmode, temp);
3501
3502 /* We do *not* set_mem_attributes here, because incoming arguments
3503 may overlap with sibling call outgoing arguments and we cannot
3504 allow reordering of reads from function arguments with stores
3505 to outgoing arguments of sibling calls. We do, however, want
3506 to record the alignment of the stack slot. */
3507 /* ALIGN may well be better aligned than TYPE, e.g. due to
3508 PARM_BOUNDARY. Assume the caller isn't lying. */
3509 set_mem_align (target, align);
3510
3511 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
3512 }
3513 }
3514 else if (partial > 0)
3515 {
3516 /* Scalar partly in registers. */
3517
3518 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
3519 int i;
3520 int not_stack;
3521 /* # bytes of start of argument
3522 that we must make space for but need not store. */
3523 int offset = partial % (PARM_BOUNDARY / BITS_PER_WORD);
3524 int args_offset = INTVAL (args_so_far);
3525 int skip;
3526
3527 /* Push padding now if padding above and stack grows down,
3528 or if padding below and stack grows up.
3529 But if space already allocated, this has already been done. */
3530 if (extra && args_addr == 0
3531 && where_pad != none && where_pad != stack_direction)
3532 anti_adjust_stack (GEN_INT (extra));
3533
3534 /* If we make space by pushing it, we might as well push
3535 the real data. Otherwise, we can leave OFFSET nonzero
3536 and leave the space uninitialized. */
3537 if (args_addr == 0)
3538 offset = 0;
3539
3540 /* Now NOT_STACK gets the number of words that we don't need to
3541 allocate on the stack. */
3542 not_stack = (partial - offset) / UNITS_PER_WORD;
3543
3544 /* If the partial register-part of the arg counts in its stack size,
3545 skip the part of stack space corresponding to the registers.
3546 Otherwise, start copying to the beginning of the stack space,
3547 by setting SKIP to 0. */
3548 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
3549
3550 if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
3551 x = validize_mem (force_const_mem (mode, x));
3552
3553 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
3554 SUBREGs of such registers are not allowed. */
3555 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
3556 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
3557 x = copy_to_reg (x);
3558
3559 /* Loop over all the words allocated on the stack for this arg. */
3560 /* We can do it by words, because any scalar bigger than a word
3561 has a size a multiple of a word. */
3562 #ifndef PUSH_ARGS_REVERSED
3563 for (i = not_stack; i < size; i++)
3564 #else
3565 for (i = size - 1; i >= not_stack; i--)
3566 #endif
3567 if (i >= not_stack + offset)
3568 emit_push_insn (operand_subword_force (x, i, mode),
3569 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
3570 0, args_addr,
3571 GEN_INT (args_offset + ((i - not_stack + skip)
3572 * UNITS_PER_WORD)),
3573 reg_parm_stack_space, alignment_pad);
3574 }
3575 else
3576 {
3577 rtx addr;
3578 rtx dest;
3579
3580 /* Push padding now if padding above and stack grows down,
3581 or if padding below and stack grows up.
3582 But if space already allocated, this has already been done. */
3583 if (extra && args_addr == 0
3584 && where_pad != none && where_pad != stack_direction)
3585 anti_adjust_stack (GEN_INT (extra));
3586
3587 #ifdef PUSH_ROUNDING
3588 if (args_addr == 0 && PUSH_ARGS)
3589 emit_single_push_insn (mode, x, type);
3590 else
3591 #endif
3592 {
3593 if (GET_CODE (args_so_far) == CONST_INT)
3594 addr
3595 = memory_address (mode,
3596 plus_constant (args_addr,
3597 INTVAL (args_so_far)));
3598 else
3599 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
3600 args_so_far));
3601 dest = gen_rtx_MEM (mode, addr);
3602
3603 /* We do *not* set_mem_attributes here, because incoming arguments
3604 may overlap with sibling call outgoing arguments and we cannot
3605 allow reordering of reads from function arguments with stores
3606 to outgoing arguments of sibling calls. We do, however, want
3607 to record the alignment of the stack slot. */
3608 /* ALIGN may well be better aligned than TYPE, e.g. due to
3609 PARM_BOUNDARY. Assume the caller isn't lying. */
3610 set_mem_align (dest, align);
3611
3612 emit_move_insn (dest, x);
3613 }
3614 }
3615
3616 /* If part should go in registers, copy that part
3617 into the appropriate registers. Do this now, at the end,
3618 since mem-to-mem copies above may do function calls. */
3619 if (partial > 0 && reg != 0)
3620 {
3621 /* Handle calls that pass values in multiple non-contiguous locations.
3622 The Irix 6 ABI has examples of this. */
3623 if (GET_CODE (reg) == PARALLEL)
3624 emit_group_load (reg, x, type, -1);
3625 else
3626 {
3627 gcc_assert (partial % UNITS_PER_WORD == 0);
3628 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
3629 }
3630 }
3631
3632 if (extra && args_addr == 0 && where_pad == stack_direction)
3633 anti_adjust_stack (GEN_INT (extra));
3634
3635 if (alignment_pad && args_addr == 0)
3636 anti_adjust_stack (alignment_pad);
3637 }
3638 \f
3639 /* Return X if X can be used as a subtarget in a sequence of arithmetic
3640 operations. */
3641
3642 static rtx
3643 get_subtarget (rtx x)
3644 {
3645 return (optimize
3646 || x == 0
3647 /* Only registers can be subtargets. */
3648 || !REG_P (x)
3649 /* Don't use hard regs to avoid extending their life. */
3650 || REGNO (x) < FIRST_PSEUDO_REGISTER
3651 ? 0 : x);
3652 }
3653
3654 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
3655 FIELD is a bitfield. Returns true if the optimization was successful,
3656 and there's nothing else to do. */
3657
3658 static bool
3659 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
3660 unsigned HOST_WIDE_INT bitpos,
3661 enum machine_mode mode1, rtx str_rtx,
3662 tree to, tree src)
3663 {
3664 enum machine_mode str_mode = GET_MODE (str_rtx);
3665 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
3666 tree op0, op1;
3667 rtx value, result;
3668 optab binop;
3669
3670 if (mode1 != VOIDmode
3671 || bitsize >= BITS_PER_WORD
3672 || str_bitsize > BITS_PER_WORD
3673 || TREE_SIDE_EFFECTS (to)
3674 || TREE_THIS_VOLATILE (to))
3675 return false;
3676
3677 STRIP_NOPS (src);
3678 if (!BINARY_CLASS_P (src)
3679 || TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
3680 return false;
3681
3682 op0 = TREE_OPERAND (src, 0);
3683 op1 = TREE_OPERAND (src, 1);
3684 STRIP_NOPS (op0);
3685
3686 if (!operand_equal_p (to, op0, 0))
3687 return false;
3688
3689 if (MEM_P (str_rtx))
3690 {
3691 unsigned HOST_WIDE_INT offset1;
3692
3693 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
3694 str_mode = word_mode;
3695 str_mode = get_best_mode (bitsize, bitpos,
3696 MEM_ALIGN (str_rtx), str_mode, 0);
3697 if (str_mode == VOIDmode)
3698 return false;
3699 str_bitsize = GET_MODE_BITSIZE (str_mode);
3700
3701 offset1 = bitpos;
3702 bitpos %= str_bitsize;
3703 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
3704 str_rtx = adjust_address (str_rtx, str_mode, offset1);
3705 }
3706 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
3707 return false;
3708
3709 /* If the bit field covers the whole REG/MEM, store_field
3710 will likely generate better code. */
3711 if (bitsize >= str_bitsize)
3712 return false;
3713
3714 /* We can't handle fields split across multiple entities. */
3715 if (bitpos + bitsize > str_bitsize)
3716 return false;
3717
3718 if (BYTES_BIG_ENDIAN)
3719 bitpos = str_bitsize - bitpos - bitsize;
3720
3721 switch (TREE_CODE (src))
3722 {
3723 case PLUS_EXPR:
3724 case MINUS_EXPR:
3725 /* For now, just optimize the case of the topmost bitfield
3726 where we don't need to do any masking and also
3727 1 bit bitfields where xor can be used.
3728 We might win by one instruction for the other bitfields
3729 too if insv/extv instructions aren't used, so that
3730 can be added later. */
3731 if (bitpos + bitsize != str_bitsize
3732 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
3733 break;
3734
3735 value = expand_expr (op1, NULL_RTX, str_mode, 0);
3736 value = convert_modes (str_mode,
3737 TYPE_MODE (TREE_TYPE (op1)), value,
3738 TYPE_UNSIGNED (TREE_TYPE (op1)));
3739
3740 /* We may be accessing data outside the field, which means
3741 we can alias adjacent data. */
3742 if (MEM_P (str_rtx))
3743 {
3744 str_rtx = shallow_copy_rtx (str_rtx);
3745 set_mem_alias_set (str_rtx, 0);
3746 set_mem_expr (str_rtx, 0);
3747 }
3748
3749 binop = TREE_CODE (src) == PLUS_EXPR ? add_optab : sub_optab;
3750 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
3751 {
3752 value = expand_and (str_mode, value, const1_rtx, NULL);
3753 binop = xor_optab;
3754 }
3755 value = expand_shift (LSHIFT_EXPR, str_mode, value,
3756 build_int_cst (NULL_TREE, bitpos),
3757 NULL_RTX, 1);
3758 result = expand_binop (str_mode, binop, str_rtx,
3759 value, str_rtx, 1, OPTAB_WIDEN);
3760 if (result != str_rtx)
3761 emit_move_insn (str_rtx, result);
3762 return true;
3763
3764 case BIT_IOR_EXPR:
3765 case BIT_XOR_EXPR:
3766 if (TREE_CODE (op1) != INTEGER_CST)
3767 break;
3768 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), 0);
3769 value = convert_modes (GET_MODE (str_rtx),
3770 TYPE_MODE (TREE_TYPE (op1)), value,
3771 TYPE_UNSIGNED (TREE_TYPE (op1)));
3772
3773 /* We may be accessing data outside the field, which means
3774 we can alias adjacent data. */
3775 if (MEM_P (str_rtx))
3776 {
3777 str_rtx = shallow_copy_rtx (str_rtx);
3778 set_mem_alias_set (str_rtx, 0);
3779 set_mem_expr (str_rtx, 0);
3780 }
3781
3782 binop = TREE_CODE (src) == BIT_IOR_EXPR ? ior_optab : xor_optab;
3783 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
3784 {
3785 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
3786 - 1);
3787 value = expand_and (GET_MODE (str_rtx), value, mask,
3788 NULL_RTX);
3789 }
3790 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
3791 build_int_cst (NULL_TREE, bitpos),
3792 NULL_RTX, 1);
3793 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
3794 value, str_rtx, 1, OPTAB_WIDEN);
3795 if (result != str_rtx)
3796 emit_move_insn (str_rtx, result);
3797 return true;
3798
3799 default:
3800 break;
3801 }
3802
3803 return false;
3804 }
3805
3806
3807 /* Expand an assignment that stores the value of FROM into TO. */
3808
3809 void
3810 expand_assignment (tree to, tree from)
3811 {
3812 rtx to_rtx = 0;
3813 rtx result;
3814
3815 /* Don't crash if the lhs of the assignment was erroneous. */
3816
3817 if (TREE_CODE (to) == ERROR_MARK)
3818 {
3819 result = expand_expr (from, NULL_RTX, VOIDmode, 0);
3820 return;
3821 }
3822
3823 /* Assignment of a structure component needs special treatment
3824 if the structure component's rtx is not simply a MEM.
3825 Assignment of an array element at a constant index, and assignment of
3826 an array element in an unaligned packed structure field, has the same
3827 problem. */
3828 if (handled_component_p (to)
3829 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
3830 {
3831 enum machine_mode mode1;
3832 HOST_WIDE_INT bitsize, bitpos;
3833 tree offset;
3834 int unsignedp;
3835 int volatilep = 0;
3836 tree tem;
3837
3838 push_temp_slots ();
3839 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
3840 &unsignedp, &volatilep, true);
3841
3842 /* If we are going to use store_bit_field and extract_bit_field,
3843 make sure to_rtx will be safe for multiple use. */
3844
3845 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, 0);
3846
3847 if (offset != 0)
3848 {
3849 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
3850
3851 gcc_assert (MEM_P (to_rtx));
3852
3853 #ifdef POINTERS_EXTEND_UNSIGNED
3854 if (GET_MODE (offset_rtx) != Pmode)
3855 offset_rtx = convert_to_mode (Pmode, offset_rtx, 0);
3856 #else
3857 if (GET_MODE (offset_rtx) != ptr_mode)
3858 offset_rtx = convert_to_mode (ptr_mode, offset_rtx, 0);
3859 #endif
3860
3861 /* A constant address in TO_RTX can have VOIDmode, we must not try
3862 to call force_reg for that case. Avoid that case. */
3863 if (MEM_P (to_rtx)
3864 && GET_MODE (to_rtx) == BLKmode
3865 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
3866 && bitsize > 0
3867 && (bitpos % bitsize) == 0
3868 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
3869 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
3870 {
3871 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
3872 bitpos = 0;
3873 }
3874
3875 to_rtx = offset_address (to_rtx, offset_rtx,
3876 highest_pow2_factor_for_target (to,
3877 offset));
3878 }
3879
3880 /* Handle expand_expr of a complex value returning a CONCAT. */
3881 if (GET_CODE (to_rtx) == CONCAT)
3882 {
3883 if (TREE_CODE (TREE_TYPE (from)) == COMPLEX_TYPE)
3884 {
3885 gcc_assert (bitpos == 0);
3886 result = store_expr (from, to_rtx, false);
3887 }
3888 else
3889 {
3890 gcc_assert (bitpos == 0 || bitpos == GET_MODE_BITSIZE (mode1));
3891 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false);
3892 }
3893 }
3894 else
3895 {
3896 if (MEM_P (to_rtx))
3897 {
3898 /* If the field is at offset zero, we could have been given the
3899 DECL_RTX of the parent struct. Don't munge it. */
3900 to_rtx = shallow_copy_rtx (to_rtx);
3901
3902 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
3903
3904 /* Deal with volatile and readonly fields. The former is only
3905 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
3906 if (volatilep)
3907 MEM_VOLATILE_P (to_rtx) = 1;
3908 if (component_uses_parent_alias_set (to))
3909 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
3910 }
3911
3912 if (optimize_bitfield_assignment_op (bitsize, bitpos, mode1,
3913 to_rtx, to, from))
3914 result = NULL;
3915 else
3916 result = store_field (to_rtx, bitsize, bitpos, mode1, from,
3917 TREE_TYPE (tem), get_alias_set (to));
3918 }
3919
3920 if (result)
3921 preserve_temp_slots (result);
3922 free_temp_slots ();
3923 pop_temp_slots ();
3924 return;
3925 }
3926
3927 /* If the rhs is a function call and its value is not an aggregate,
3928 call the function before we start to compute the lhs.
3929 This is needed for correct code for cases such as
3930 val = setjmp (buf) on machines where reference to val
3931 requires loading up part of an address in a separate insn.
3932
3933 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
3934 since it might be a promoted variable where the zero- or sign- extension
3935 needs to be done. Handling this in the normal way is safe because no
3936 computation is done before the call. */
3937 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
3938 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
3939 && ! ((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
3940 && REG_P (DECL_RTL (to))))
3941 {
3942 rtx value;
3943
3944 push_temp_slots ();
3945 value = expand_expr (from, NULL_RTX, VOIDmode, 0);
3946 if (to_rtx == 0)
3947 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
3948
3949 /* Handle calls that return values in multiple non-contiguous locations.
3950 The Irix 6 ABI has examples of this. */
3951 if (GET_CODE (to_rtx) == PARALLEL)
3952 emit_group_load (to_rtx, value, TREE_TYPE (from),
3953 int_size_in_bytes (TREE_TYPE (from)));
3954 else if (GET_MODE (to_rtx) == BLKmode)
3955 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
3956 else
3957 {
3958 if (POINTER_TYPE_P (TREE_TYPE (to)))
3959 value = convert_memory_address (GET_MODE (to_rtx), value);
3960 emit_move_insn (to_rtx, value);
3961 }
3962 preserve_temp_slots (to_rtx);
3963 free_temp_slots ();
3964 pop_temp_slots ();
3965 return;
3966 }
3967
3968 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
3969 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
3970
3971 if (to_rtx == 0)
3972 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
3973
3974 /* Don't move directly into a return register. */
3975 if (TREE_CODE (to) == RESULT_DECL
3976 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
3977 {
3978 rtx temp;
3979
3980 push_temp_slots ();
3981 temp = expand_expr (from, 0, GET_MODE (to_rtx), 0);
3982
3983 if (GET_CODE (to_rtx) == PARALLEL)
3984 emit_group_load (to_rtx, temp, TREE_TYPE (from),
3985 int_size_in_bytes (TREE_TYPE (from)));
3986 else
3987 emit_move_insn (to_rtx, temp);
3988
3989 preserve_temp_slots (to_rtx);
3990 free_temp_slots ();
3991 pop_temp_slots ();
3992 return;
3993 }
3994
3995 /* In case we are returning the contents of an object which overlaps
3996 the place the value is being stored, use a safe function when copying
3997 a value through a pointer into a structure value return block. */
3998 if (TREE_CODE (to) == RESULT_DECL && TREE_CODE (from) == INDIRECT_REF
3999 && current_function_returns_struct
4000 && !current_function_returns_pcc_struct)
4001 {
4002 rtx from_rtx, size;
4003
4004 push_temp_slots ();
4005 size = expr_size (from);
4006 from_rtx = expand_expr (from, NULL_RTX, VOIDmode, 0);
4007
4008 emit_library_call (memmove_libfunc, LCT_NORMAL,
4009 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4010 XEXP (from_rtx, 0), Pmode,
4011 convert_to_mode (TYPE_MODE (sizetype),
4012 size, TYPE_UNSIGNED (sizetype)),
4013 TYPE_MODE (sizetype));
4014
4015 preserve_temp_slots (to_rtx);
4016 free_temp_slots ();
4017 pop_temp_slots ();
4018 return;
4019 }
4020
4021 /* Compute FROM and store the value in the rtx we got. */
4022
4023 push_temp_slots ();
4024 result = store_expr (from, to_rtx, 0);
4025 preserve_temp_slots (result);
4026 free_temp_slots ();
4027 pop_temp_slots ();
4028 return;
4029 }
4030
4031 /* Generate code for computing expression EXP,
4032 and storing the value into TARGET.
4033
4034 If the mode is BLKmode then we may return TARGET itself.
4035 It turns out that in BLKmode it doesn't cause a problem.
4036 because C has no operators that could combine two different
4037 assignments into the same BLKmode object with different values
4038 with no sequence point. Will other languages need this to
4039 be more thorough?
4040
4041 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4042 stack, and block moves may need to be treated specially. */
4043
4044 rtx
4045 store_expr (tree exp, rtx target, int call_param_p)
4046 {
4047 rtx temp;
4048 rtx alt_rtl = NULL_RTX;
4049 int dont_return_target = 0;
4050
4051 if (VOID_TYPE_P (TREE_TYPE (exp)))
4052 {
4053 /* C++ can generate ?: expressions with a throw expression in one
4054 branch and an rvalue in the other. Here, we resolve attempts to
4055 store the throw expression's nonexistent result. */
4056 gcc_assert (!call_param_p);
4057 expand_expr (exp, const0_rtx, VOIDmode, 0);
4058 return NULL_RTX;
4059 }
4060 if (TREE_CODE (exp) == COMPOUND_EXPR)
4061 {
4062 /* Perform first part of compound expression, then assign from second
4063 part. */
4064 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4065 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4066 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p);
4067 }
4068 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4069 {
4070 /* For conditional expression, get safe form of the target. Then
4071 test the condition, doing the appropriate assignment on either
4072 side. This avoids the creation of unnecessary temporaries.
4073 For non-BLKmode, it is more efficient not to do this. */
4074
4075 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
4076
4077 do_pending_stack_adjust ();
4078 NO_DEFER_POP;
4079 jumpifnot (TREE_OPERAND (exp, 0), lab1);
4080 store_expr (TREE_OPERAND (exp, 1), target, call_param_p);
4081 emit_jump_insn (gen_jump (lab2));
4082 emit_barrier ();
4083 emit_label (lab1);
4084 store_expr (TREE_OPERAND (exp, 2), target, call_param_p);
4085 emit_label (lab2);
4086 OK_DEFER_POP;
4087
4088 return NULL_RTX;
4089 }
4090 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
4091 /* If this is a scalar in a register that is stored in a wider mode
4092 than the declared mode, compute the result into its declared mode
4093 and then convert to the wider mode. Our value is the computed
4094 expression. */
4095 {
4096 rtx inner_target = 0;
4097
4098 /* We can do the conversion inside EXP, which will often result
4099 in some optimizations. Do the conversion in two steps: first
4100 change the signedness, if needed, then the extend. But don't
4101 do this if the type of EXP is a subtype of something else
4102 since then the conversion might involve more than just
4103 converting modes. */
4104 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
4105 && TREE_TYPE (TREE_TYPE (exp)) == 0
4106 && (!lang_hooks.reduce_bit_field_operations
4107 || (GET_MODE_PRECISION (GET_MODE (target))
4108 == TYPE_PRECISION (TREE_TYPE (exp)))))
4109 {
4110 if (TYPE_UNSIGNED (TREE_TYPE (exp))
4111 != SUBREG_PROMOTED_UNSIGNED_P (target))
4112 exp = convert
4113 (lang_hooks.types.signed_or_unsigned_type
4114 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)), exp);
4115
4116 exp = convert (lang_hooks.types.type_for_mode
4117 (GET_MODE (SUBREG_REG (target)),
4118 SUBREG_PROMOTED_UNSIGNED_P (target)),
4119 exp);
4120
4121 inner_target = SUBREG_REG (target);
4122 }
4123
4124 temp = expand_expr (exp, inner_target, VOIDmode,
4125 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4126
4127 /* If TEMP is a VOIDmode constant, use convert_modes to make
4128 sure that we properly convert it. */
4129 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
4130 {
4131 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4132 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
4133 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
4134 GET_MODE (target), temp,
4135 SUBREG_PROMOTED_UNSIGNED_P (target));
4136 }
4137
4138 convert_move (SUBREG_REG (target), temp,
4139 SUBREG_PROMOTED_UNSIGNED_P (target));
4140
4141 return NULL_RTX;
4142 }
4143 else
4144 {
4145 temp = expand_expr_real (exp, target, GET_MODE (target),
4146 (call_param_p
4147 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
4148 &alt_rtl);
4149 /* Return TARGET if it's a specified hardware register.
4150 If TARGET is a volatile mem ref, either return TARGET
4151 or return a reg copied *from* TARGET; ANSI requires this.
4152
4153 Otherwise, if TEMP is not TARGET, return TEMP
4154 if it is constant (for efficiency),
4155 or if we really want the correct value. */
4156 if (!(target && REG_P (target)
4157 && REGNO (target) < FIRST_PSEUDO_REGISTER)
4158 && !(MEM_P (target) && MEM_VOLATILE_P (target))
4159 && ! rtx_equal_p (temp, target)
4160 && CONSTANT_P (temp))
4161 dont_return_target = 1;
4162 }
4163
4164 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
4165 the same as that of TARGET, adjust the constant. This is needed, for
4166 example, in case it is a CONST_DOUBLE and we want only a word-sized
4167 value. */
4168 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
4169 && TREE_CODE (exp) != ERROR_MARK
4170 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
4171 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4172 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
4173
4174 /* If value was not generated in the target, store it there.
4175 Convert the value to TARGET's type first if necessary and emit the
4176 pending incrementations that have been queued when expanding EXP.
4177 Note that we cannot emit the whole queue blindly because this will
4178 effectively disable the POST_INC optimization later.
4179
4180 If TEMP and TARGET compare equal according to rtx_equal_p, but
4181 one or both of them are volatile memory refs, we have to distinguish
4182 two cases:
4183 - expand_expr has used TARGET. In this case, we must not generate
4184 another copy. This can be detected by TARGET being equal according
4185 to == .
4186 - expand_expr has not used TARGET - that means that the source just
4187 happens to have the same RTX form. Since temp will have been created
4188 by expand_expr, it will compare unequal according to == .
4189 We must generate a copy in this case, to reach the correct number
4190 of volatile memory references. */
4191
4192 if ((! rtx_equal_p (temp, target)
4193 || (temp != target && (side_effects_p (temp)
4194 || side_effects_p (target))))
4195 && TREE_CODE (exp) != ERROR_MARK
4196 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
4197 but TARGET is not valid memory reference, TEMP will differ
4198 from TARGET although it is really the same location. */
4199 && !(alt_rtl && rtx_equal_p (alt_rtl, target))
4200 /* If there's nothing to copy, don't bother. Don't call expr_size
4201 unless necessary, because some front-ends (C++) expr_size-hook
4202 aborts on objects that are not supposed to be bit-copied or
4203 bit-initialized. */
4204 && expr_size (exp) != const0_rtx)
4205 {
4206 if (GET_MODE (temp) != GET_MODE (target)
4207 && GET_MODE (temp) != VOIDmode)
4208 {
4209 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
4210 if (dont_return_target)
4211 {
4212 /* In this case, we will return TEMP,
4213 so make sure it has the proper mode.
4214 But don't forget to store the value into TARGET. */
4215 temp = convert_to_mode (GET_MODE (target), temp, unsignedp);
4216 emit_move_insn (target, temp);
4217 }
4218 else
4219 convert_move (target, temp, unsignedp);
4220 }
4221
4222 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
4223 {
4224 /* Handle copying a string constant into an array. The string
4225 constant may be shorter than the array. So copy just the string's
4226 actual length, and clear the rest. First get the size of the data
4227 type of the string, which is actually the size of the target. */
4228 rtx size = expr_size (exp);
4229
4230 if (GET_CODE (size) == CONST_INT
4231 && INTVAL (size) < TREE_STRING_LENGTH (exp))
4232 emit_block_move (target, temp, size,
4233 (call_param_p
4234 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4235 else
4236 {
4237 /* Compute the size of the data to copy from the string. */
4238 tree copy_size
4239 = size_binop (MIN_EXPR,
4240 make_tree (sizetype, size),
4241 size_int (TREE_STRING_LENGTH (exp)));
4242 rtx copy_size_rtx
4243 = expand_expr (copy_size, NULL_RTX, VOIDmode,
4244 (call_param_p
4245 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
4246 rtx label = 0;
4247
4248 /* Copy that much. */
4249 copy_size_rtx = convert_to_mode (ptr_mode, copy_size_rtx,
4250 TYPE_UNSIGNED (sizetype));
4251 emit_block_move (target, temp, copy_size_rtx,
4252 (call_param_p
4253 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4254
4255 /* Figure out how much is left in TARGET that we have to clear.
4256 Do all calculations in ptr_mode. */
4257 if (GET_CODE (copy_size_rtx) == CONST_INT)
4258 {
4259 size = plus_constant (size, -INTVAL (copy_size_rtx));
4260 target = adjust_address (target, BLKmode,
4261 INTVAL (copy_size_rtx));
4262 }
4263 else
4264 {
4265 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
4266 copy_size_rtx, NULL_RTX, 0,
4267 OPTAB_LIB_WIDEN);
4268
4269 #ifdef POINTERS_EXTEND_UNSIGNED
4270 if (GET_MODE (copy_size_rtx) != Pmode)
4271 copy_size_rtx = convert_to_mode (Pmode, copy_size_rtx,
4272 TYPE_UNSIGNED (sizetype));
4273 #endif
4274
4275 target = offset_address (target, copy_size_rtx,
4276 highest_pow2_factor (copy_size));
4277 label = gen_label_rtx ();
4278 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
4279 GET_MODE (size), 0, label);
4280 }
4281
4282 if (size != const0_rtx)
4283 clear_storage (target, size);
4284
4285 if (label)
4286 emit_label (label);
4287 }
4288 }
4289 /* Handle calls that return values in multiple non-contiguous locations.
4290 The Irix 6 ABI has examples of this. */
4291 else if (GET_CODE (target) == PARALLEL)
4292 emit_group_load (target, temp, TREE_TYPE (exp),
4293 int_size_in_bytes (TREE_TYPE (exp)));
4294 else if (GET_MODE (temp) == BLKmode)
4295 emit_block_move (target, temp, expr_size (exp),
4296 (call_param_p
4297 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4298 else
4299 {
4300 temp = force_operand (temp, target);
4301 if (temp != target)
4302 emit_move_insn (target, temp);
4303 }
4304 }
4305
4306 return NULL_RTX;
4307 }
4308 \f
4309 /* Examine CTOR to discover:
4310 * how many scalar fields are set to nonzero values,
4311 and place it in *P_NZ_ELTS;
4312 * how many scalar fields are set to non-constant values,
4313 and place it in *P_NC_ELTS; and
4314 * how many scalar fields in total are in CTOR,
4315 and place it in *P_ELT_COUNT.
4316 * if a type is a union, and the initializer from the constructor
4317 is not the largest element in the union, then set *p_must_clear. */
4318
4319 static void
4320 categorize_ctor_elements_1 (tree ctor, HOST_WIDE_INT *p_nz_elts,
4321 HOST_WIDE_INT *p_nc_elts,
4322 HOST_WIDE_INT *p_elt_count,
4323 bool *p_must_clear)
4324 {
4325 HOST_WIDE_INT nz_elts, nc_elts, elt_count;
4326 tree list;
4327
4328 nz_elts = 0;
4329 nc_elts = 0;
4330 elt_count = 0;
4331
4332 for (list = CONSTRUCTOR_ELTS (ctor); list; list = TREE_CHAIN (list))
4333 {
4334 tree value = TREE_VALUE (list);
4335 tree purpose = TREE_PURPOSE (list);
4336 HOST_WIDE_INT mult;
4337
4338 mult = 1;
4339 if (TREE_CODE (purpose) == RANGE_EXPR)
4340 {
4341 tree lo_index = TREE_OPERAND (purpose, 0);
4342 tree hi_index = TREE_OPERAND (purpose, 1);
4343
4344 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
4345 mult = (tree_low_cst (hi_index, 1)
4346 - tree_low_cst (lo_index, 1) + 1);
4347 }
4348
4349 switch (TREE_CODE (value))
4350 {
4351 case CONSTRUCTOR:
4352 {
4353 HOST_WIDE_INT nz = 0, nc = 0, ic = 0;
4354 categorize_ctor_elements_1 (value, &nz, &nc, &ic, p_must_clear);
4355 nz_elts += mult * nz;
4356 nc_elts += mult * nc;
4357 elt_count += mult * ic;
4358 }
4359 break;
4360
4361 case INTEGER_CST:
4362 case REAL_CST:
4363 if (!initializer_zerop (value))
4364 nz_elts += mult;
4365 elt_count += mult;
4366 break;
4367
4368 case STRING_CST:
4369 nz_elts += mult * TREE_STRING_LENGTH (value);
4370 elt_count += mult * TREE_STRING_LENGTH (value);
4371 break;
4372
4373 case COMPLEX_CST:
4374 if (!initializer_zerop (TREE_REALPART (value)))
4375 nz_elts += mult;
4376 if (!initializer_zerop (TREE_IMAGPART (value)))
4377 nz_elts += mult;
4378 elt_count += mult;
4379 break;
4380
4381 case VECTOR_CST:
4382 {
4383 tree v;
4384 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
4385 {
4386 if (!initializer_zerop (TREE_VALUE (v)))
4387 nz_elts += mult;
4388 elt_count += mult;
4389 }
4390 }
4391 break;
4392
4393 default:
4394 nz_elts += mult;
4395 elt_count += mult;
4396 if (!initializer_constant_valid_p (value, TREE_TYPE (value)))
4397 nc_elts += mult;
4398 break;
4399 }
4400 }
4401
4402 if (!*p_must_clear
4403 && (TREE_CODE (TREE_TYPE (ctor)) == UNION_TYPE
4404 || TREE_CODE (TREE_TYPE (ctor)) == QUAL_UNION_TYPE))
4405 {
4406 tree init_sub_type;
4407 bool clear_this = true;
4408
4409 list = CONSTRUCTOR_ELTS (ctor);
4410 if (list)
4411 {
4412 /* We don't expect more than one element of the union to be
4413 initialized. Not sure what we should do otherwise... */
4414 gcc_assert (TREE_CHAIN (list) == NULL);
4415
4416 init_sub_type = TREE_TYPE (TREE_VALUE (list));
4417
4418 /* ??? We could look at each element of the union, and find the
4419 largest element. Which would avoid comparing the size of the
4420 initialized element against any tail padding in the union.
4421 Doesn't seem worth the effort... */
4422 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (ctor)),
4423 TYPE_SIZE (init_sub_type)) == 1)
4424 {
4425 /* And now we have to find out if the element itself is fully
4426 constructed. E.g. for union { struct { int a, b; } s; } u
4427 = { .s = { .a = 1 } }. */
4428 if (elt_count == count_type_elements (init_sub_type))
4429 clear_this = false;
4430 }
4431 }
4432
4433 *p_must_clear = clear_this;
4434 }
4435
4436 *p_nz_elts += nz_elts;
4437 *p_nc_elts += nc_elts;
4438 *p_elt_count += elt_count;
4439 }
4440
4441 void
4442 categorize_ctor_elements (tree ctor, HOST_WIDE_INT *p_nz_elts,
4443 HOST_WIDE_INT *p_nc_elts,
4444 HOST_WIDE_INT *p_elt_count,
4445 bool *p_must_clear)
4446 {
4447 *p_nz_elts = 0;
4448 *p_nc_elts = 0;
4449 *p_elt_count = 0;
4450 *p_must_clear = false;
4451 categorize_ctor_elements_1 (ctor, p_nz_elts, p_nc_elts, p_elt_count,
4452 p_must_clear);
4453 }
4454
4455 /* Count the number of scalars in TYPE. Return -1 on overflow or
4456 variable-sized. */
4457
4458 HOST_WIDE_INT
4459 count_type_elements (tree type)
4460 {
4461 const HOST_WIDE_INT max = ~((HOST_WIDE_INT)1 << (HOST_BITS_PER_WIDE_INT-1));
4462 switch (TREE_CODE (type))
4463 {
4464 case ARRAY_TYPE:
4465 {
4466 tree telts = array_type_nelts (type);
4467 if (telts && host_integerp (telts, 1))
4468 {
4469 HOST_WIDE_INT n = tree_low_cst (telts, 1) + 1;
4470 HOST_WIDE_INT m = count_type_elements (TREE_TYPE (type));
4471 if (n == 0)
4472 return 0;
4473 else if (max / n > m)
4474 return n * m;
4475 }
4476 return -1;
4477 }
4478
4479 case RECORD_TYPE:
4480 {
4481 HOST_WIDE_INT n = 0, t;
4482 tree f;
4483
4484 for (f = TYPE_FIELDS (type); f ; f = TREE_CHAIN (f))
4485 if (TREE_CODE (f) == FIELD_DECL)
4486 {
4487 t = count_type_elements (TREE_TYPE (f));
4488 if (t < 0)
4489 return -1;
4490 n += t;
4491 }
4492
4493 return n;
4494 }
4495
4496 case UNION_TYPE:
4497 case QUAL_UNION_TYPE:
4498 {
4499 /* Ho hum. How in the world do we guess here? Clearly it isn't
4500 right to count the fields. Guess based on the number of words. */
4501 HOST_WIDE_INT n = int_size_in_bytes (type);
4502 if (n < 0)
4503 return -1;
4504 return n / UNITS_PER_WORD;
4505 }
4506
4507 case COMPLEX_TYPE:
4508 return 2;
4509
4510 case VECTOR_TYPE:
4511 return TYPE_VECTOR_SUBPARTS (type);
4512
4513 case INTEGER_TYPE:
4514 case REAL_TYPE:
4515 case ENUMERAL_TYPE:
4516 case BOOLEAN_TYPE:
4517 case CHAR_TYPE:
4518 case POINTER_TYPE:
4519 case OFFSET_TYPE:
4520 case REFERENCE_TYPE:
4521 return 1;
4522
4523 case VOID_TYPE:
4524 case METHOD_TYPE:
4525 case FILE_TYPE:
4526 case FUNCTION_TYPE:
4527 case LANG_TYPE:
4528 default:
4529 gcc_unreachable ();
4530 }
4531 }
4532
4533 /* Return 1 if EXP contains mostly (3/4) zeros. */
4534
4535 static int
4536 mostly_zeros_p (tree exp)
4537 {
4538 if (TREE_CODE (exp) == CONSTRUCTOR)
4539
4540 {
4541 HOST_WIDE_INT nz_elts, nc_elts, count, elts;
4542 bool must_clear;
4543
4544 categorize_ctor_elements (exp, &nz_elts, &nc_elts, &count, &must_clear);
4545 if (must_clear)
4546 return 1;
4547
4548 elts = count_type_elements (TREE_TYPE (exp));
4549
4550 return nz_elts < elts / 4;
4551 }
4552
4553 return initializer_zerop (exp);
4554 }
4555 \f
4556 /* Helper function for store_constructor.
4557 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
4558 TYPE is the type of the CONSTRUCTOR, not the element type.
4559 CLEARED is as for store_constructor.
4560 ALIAS_SET is the alias set to use for any stores.
4561
4562 This provides a recursive shortcut back to store_constructor when it isn't
4563 necessary to go through store_field. This is so that we can pass through
4564 the cleared field to let store_constructor know that we may not have to
4565 clear a substructure if the outer structure has already been cleared. */
4566
4567 static void
4568 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
4569 HOST_WIDE_INT bitpos, enum machine_mode mode,
4570 tree exp, tree type, int cleared, int alias_set)
4571 {
4572 if (TREE_CODE (exp) == CONSTRUCTOR
4573 /* We can only call store_constructor recursively if the size and
4574 bit position are on a byte boundary. */
4575 && bitpos % BITS_PER_UNIT == 0
4576 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
4577 /* If we have a nonzero bitpos for a register target, then we just
4578 let store_field do the bitfield handling. This is unlikely to
4579 generate unnecessary clear instructions anyways. */
4580 && (bitpos == 0 || MEM_P (target)))
4581 {
4582 if (MEM_P (target))
4583 target
4584 = adjust_address (target,
4585 GET_MODE (target) == BLKmode
4586 || 0 != (bitpos
4587 % GET_MODE_ALIGNMENT (GET_MODE (target)))
4588 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
4589
4590
4591 /* Update the alias set, if required. */
4592 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
4593 && MEM_ALIAS_SET (target) != 0)
4594 {
4595 target = copy_rtx (target);
4596 set_mem_alias_set (target, alias_set);
4597 }
4598
4599 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
4600 }
4601 else
4602 store_field (target, bitsize, bitpos, mode, exp, type, alias_set);
4603 }
4604
4605 /* Store the value of constructor EXP into the rtx TARGET.
4606 TARGET is either a REG or a MEM; we know it cannot conflict, since
4607 safe_from_p has been called.
4608 CLEARED is true if TARGET is known to have been zero'd.
4609 SIZE is the number of bytes of TARGET we are allowed to modify: this
4610 may not be the same as the size of EXP if we are assigning to a field
4611 which has been packed to exclude padding bits. */
4612
4613 static void
4614 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
4615 {
4616 tree type = TREE_TYPE (exp);
4617 #ifdef WORD_REGISTER_OPERATIONS
4618 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
4619 #endif
4620
4621 switch (TREE_CODE (type))
4622 {
4623 case RECORD_TYPE:
4624 case UNION_TYPE:
4625 case QUAL_UNION_TYPE:
4626 {
4627 tree elt;
4628
4629 /* If size is zero or the target is already cleared, do nothing. */
4630 if (size == 0 || cleared)
4631 cleared = 1;
4632 /* We either clear the aggregate or indicate the value is dead. */
4633 else if ((TREE_CODE (type) == UNION_TYPE
4634 || TREE_CODE (type) == QUAL_UNION_TYPE)
4635 && ! CONSTRUCTOR_ELTS (exp))
4636 /* If the constructor is empty, clear the union. */
4637 {
4638 clear_storage (target, expr_size (exp));
4639 cleared = 1;
4640 }
4641
4642 /* If we are building a static constructor into a register,
4643 set the initial value as zero so we can fold the value into
4644 a constant. But if more than one register is involved,
4645 this probably loses. */
4646 else if (REG_P (target) && TREE_STATIC (exp)
4647 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
4648 {
4649 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
4650 cleared = 1;
4651 }
4652
4653 /* If the constructor has fewer fields than the structure or
4654 if we are initializing the structure to mostly zeros, clear
4655 the whole structure first. Don't do this if TARGET is a
4656 register whose mode size isn't equal to SIZE since
4657 clear_storage can't handle this case. */
4658 else if (size > 0
4659 && ((list_length (CONSTRUCTOR_ELTS (exp))
4660 != fields_length (type))
4661 || mostly_zeros_p (exp))
4662 && (!REG_P (target)
4663 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
4664 == size)))
4665 {
4666 clear_storage (target, GEN_INT (size));
4667 cleared = 1;
4668 }
4669
4670 if (! cleared)
4671 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
4672
4673 /* Store each element of the constructor into the
4674 corresponding field of TARGET. */
4675
4676 for (elt = CONSTRUCTOR_ELTS (exp); elt; elt = TREE_CHAIN (elt))
4677 {
4678 tree field = TREE_PURPOSE (elt);
4679 tree value = TREE_VALUE (elt);
4680 enum machine_mode mode;
4681 HOST_WIDE_INT bitsize;
4682 HOST_WIDE_INT bitpos = 0;
4683 tree offset;
4684 rtx to_rtx = target;
4685
4686 /* Just ignore missing fields. We cleared the whole
4687 structure, above, if any fields are missing. */
4688 if (field == 0)
4689 continue;
4690
4691 if (cleared && initializer_zerop (value))
4692 continue;
4693
4694 if (host_integerp (DECL_SIZE (field), 1))
4695 bitsize = tree_low_cst (DECL_SIZE (field), 1);
4696 else
4697 bitsize = -1;
4698
4699 mode = DECL_MODE (field);
4700 if (DECL_BIT_FIELD (field))
4701 mode = VOIDmode;
4702
4703 offset = DECL_FIELD_OFFSET (field);
4704 if (host_integerp (offset, 0)
4705 && host_integerp (bit_position (field), 0))
4706 {
4707 bitpos = int_bit_position (field);
4708 offset = 0;
4709 }
4710 else
4711 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
4712
4713 if (offset)
4714 {
4715 rtx offset_rtx;
4716
4717 offset
4718 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
4719 make_tree (TREE_TYPE (exp),
4720 target));
4721
4722 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, 0);
4723 gcc_assert (MEM_P (to_rtx));
4724
4725 #ifdef POINTERS_EXTEND_UNSIGNED
4726 if (GET_MODE (offset_rtx) != Pmode)
4727 offset_rtx = convert_to_mode (Pmode, offset_rtx, 0);
4728 #else
4729 if (GET_MODE (offset_rtx) != ptr_mode)
4730 offset_rtx = convert_to_mode (ptr_mode, offset_rtx, 0);
4731 #endif
4732
4733 to_rtx = offset_address (to_rtx, offset_rtx,
4734 highest_pow2_factor (offset));
4735 }
4736
4737 #ifdef WORD_REGISTER_OPERATIONS
4738 /* If this initializes a field that is smaller than a
4739 word, at the start of a word, try to widen it to a full
4740 word. This special case allows us to output C++ member
4741 function initializations in a form that the optimizers
4742 can understand. */
4743 if (REG_P (target)
4744 && bitsize < BITS_PER_WORD
4745 && bitpos % BITS_PER_WORD == 0
4746 && GET_MODE_CLASS (mode) == MODE_INT
4747 && TREE_CODE (value) == INTEGER_CST
4748 && exp_size >= 0
4749 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
4750 {
4751 tree type = TREE_TYPE (value);
4752
4753 if (TYPE_PRECISION (type) < BITS_PER_WORD)
4754 {
4755 type = lang_hooks.types.type_for_size
4756 (BITS_PER_WORD, TYPE_UNSIGNED (type));
4757 value = convert (type, value);
4758 }
4759
4760 if (BYTES_BIG_ENDIAN)
4761 value
4762 = fold (build2 (LSHIFT_EXPR, type, value,
4763 build_int_cst (NULL_TREE,
4764 BITS_PER_WORD - bitsize)));
4765 bitsize = BITS_PER_WORD;
4766 mode = word_mode;
4767 }
4768 #endif
4769
4770 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
4771 && DECL_NONADDRESSABLE_P (field))
4772 {
4773 to_rtx = copy_rtx (to_rtx);
4774 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4775 }
4776
4777 store_constructor_field (to_rtx, bitsize, bitpos, mode,
4778 value, type, cleared,
4779 get_alias_set (TREE_TYPE (field)));
4780 }
4781 break;
4782 }
4783 case ARRAY_TYPE:
4784 {
4785 tree elt;
4786 int i;
4787 int need_to_clear;
4788 tree domain;
4789 tree elttype = TREE_TYPE (type);
4790 int const_bounds_p;
4791 HOST_WIDE_INT minelt = 0;
4792 HOST_WIDE_INT maxelt = 0;
4793
4794 domain = TYPE_DOMAIN (type);
4795 const_bounds_p = (TYPE_MIN_VALUE (domain)
4796 && TYPE_MAX_VALUE (domain)
4797 && host_integerp (TYPE_MIN_VALUE (domain), 0)
4798 && host_integerp (TYPE_MAX_VALUE (domain), 0));
4799
4800 /* If we have constant bounds for the range of the type, get them. */
4801 if (const_bounds_p)
4802 {
4803 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
4804 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
4805 }
4806
4807 /* If the constructor has fewer elements than the array, clear
4808 the whole array first. Similarly if this is static
4809 constructor of a non-BLKmode object. */
4810 if (cleared)
4811 need_to_clear = 0;
4812 else if (REG_P (target) && TREE_STATIC (exp))
4813 need_to_clear = 1;
4814 else
4815 {
4816 HOST_WIDE_INT count = 0, zero_count = 0;
4817 need_to_clear = ! const_bounds_p;
4818
4819 /* This loop is a more accurate version of the loop in
4820 mostly_zeros_p (it handles RANGE_EXPR in an index). It
4821 is also needed to check for missing elements. */
4822 for (elt = CONSTRUCTOR_ELTS (exp);
4823 elt != NULL_TREE && ! need_to_clear;
4824 elt = TREE_CHAIN (elt))
4825 {
4826 tree index = TREE_PURPOSE (elt);
4827 HOST_WIDE_INT this_node_count;
4828
4829 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
4830 {
4831 tree lo_index = TREE_OPERAND (index, 0);
4832 tree hi_index = TREE_OPERAND (index, 1);
4833
4834 if (! host_integerp (lo_index, 1)
4835 || ! host_integerp (hi_index, 1))
4836 {
4837 need_to_clear = 1;
4838 break;
4839 }
4840
4841 this_node_count = (tree_low_cst (hi_index, 1)
4842 - tree_low_cst (lo_index, 1) + 1);
4843 }
4844 else
4845 this_node_count = 1;
4846
4847 count += this_node_count;
4848 if (mostly_zeros_p (TREE_VALUE (elt)))
4849 zero_count += this_node_count;
4850 }
4851
4852 /* Clear the entire array first if there are any missing
4853 elements, or if the incidence of zero elements is >=
4854 75%. */
4855 if (! need_to_clear
4856 && (count < maxelt - minelt + 1
4857 || 4 * zero_count >= 3 * count))
4858 need_to_clear = 1;
4859 }
4860
4861 if (need_to_clear && size > 0)
4862 {
4863 if (REG_P (target))
4864 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
4865 else
4866 clear_storage (target, GEN_INT (size));
4867 cleared = 1;
4868 }
4869
4870 if (!cleared && REG_P (target))
4871 /* Inform later passes that the old value is dead. */
4872 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
4873
4874 /* Store each element of the constructor into the
4875 corresponding element of TARGET, determined by counting the
4876 elements. */
4877 for (elt = CONSTRUCTOR_ELTS (exp), i = 0;
4878 elt;
4879 elt = TREE_CHAIN (elt), i++)
4880 {
4881 enum machine_mode mode;
4882 HOST_WIDE_INT bitsize;
4883 HOST_WIDE_INT bitpos;
4884 int unsignedp;
4885 tree value = TREE_VALUE (elt);
4886 tree index = TREE_PURPOSE (elt);
4887 rtx xtarget = target;
4888
4889 if (cleared && initializer_zerop (value))
4890 continue;
4891
4892 unsignedp = TYPE_UNSIGNED (elttype);
4893 mode = TYPE_MODE (elttype);
4894 if (mode == BLKmode)
4895 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
4896 ? tree_low_cst (TYPE_SIZE (elttype), 1)
4897 : -1);
4898 else
4899 bitsize = GET_MODE_BITSIZE (mode);
4900
4901 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
4902 {
4903 tree lo_index = TREE_OPERAND (index, 0);
4904 tree hi_index = TREE_OPERAND (index, 1);
4905 rtx index_r, pos_rtx;
4906 HOST_WIDE_INT lo, hi, count;
4907 tree position;
4908
4909 /* If the range is constant and "small", unroll the loop. */
4910 if (const_bounds_p
4911 && host_integerp (lo_index, 0)
4912 && host_integerp (hi_index, 0)
4913 && (lo = tree_low_cst (lo_index, 0),
4914 hi = tree_low_cst (hi_index, 0),
4915 count = hi - lo + 1,
4916 (!MEM_P (target)
4917 || count <= 2
4918 || (host_integerp (TYPE_SIZE (elttype), 1)
4919 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
4920 <= 40 * 8)))))
4921 {
4922 lo -= minelt; hi -= minelt;
4923 for (; lo <= hi; lo++)
4924 {
4925 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
4926
4927 if (MEM_P (target)
4928 && !MEM_KEEP_ALIAS_SET_P (target)
4929 && TREE_CODE (type) == ARRAY_TYPE
4930 && TYPE_NONALIASED_COMPONENT (type))
4931 {
4932 target = copy_rtx (target);
4933 MEM_KEEP_ALIAS_SET_P (target) = 1;
4934 }
4935
4936 store_constructor_field
4937 (target, bitsize, bitpos, mode, value, type, cleared,
4938 get_alias_set (elttype));
4939 }
4940 }
4941 else
4942 {
4943 rtx loop_start = gen_label_rtx ();
4944 rtx loop_end = gen_label_rtx ();
4945 tree exit_cond;
4946
4947 expand_expr (hi_index, NULL_RTX, VOIDmode, 0);
4948 unsignedp = TYPE_UNSIGNED (domain);
4949
4950 index = build_decl (VAR_DECL, NULL_TREE, domain);
4951
4952 index_r
4953 = gen_reg_rtx (promote_mode (domain, DECL_MODE (index),
4954 &unsignedp, 0));
4955 SET_DECL_RTL (index, index_r);
4956 store_expr (lo_index, index_r, 0);
4957
4958 /* Build the head of the loop. */
4959 do_pending_stack_adjust ();
4960 emit_label (loop_start);
4961
4962 /* Assign value to element index. */
4963 position
4964 = convert (ssizetype,
4965 fold (build2 (MINUS_EXPR, TREE_TYPE (index),
4966 index, TYPE_MIN_VALUE (domain))));
4967 position = size_binop (MULT_EXPR, position,
4968 convert (ssizetype,
4969 TYPE_SIZE_UNIT (elttype)));
4970
4971 pos_rtx = expand_expr (position, 0, VOIDmode, 0);
4972 xtarget = offset_address (target, pos_rtx,
4973 highest_pow2_factor (position));
4974 xtarget = adjust_address (xtarget, mode, 0);
4975 if (TREE_CODE (value) == CONSTRUCTOR)
4976 store_constructor (value, xtarget, cleared,
4977 bitsize / BITS_PER_UNIT);
4978 else
4979 store_expr (value, xtarget, 0);
4980
4981 /* Generate a conditional jump to exit the loop. */
4982 exit_cond = build2 (LT_EXPR, integer_type_node,
4983 index, hi_index);
4984 jumpif (exit_cond, loop_end);
4985
4986 /* Update the loop counter, and jump to the head of
4987 the loop. */
4988 expand_assignment (index,
4989 build2 (PLUS_EXPR, TREE_TYPE (index),
4990 index, integer_one_node));
4991
4992 emit_jump (loop_start);
4993
4994 /* Build the end of the loop. */
4995 emit_label (loop_end);
4996 }
4997 }
4998 else if ((index != 0 && ! host_integerp (index, 0))
4999 || ! host_integerp (TYPE_SIZE (elttype), 1))
5000 {
5001 tree position;
5002
5003 if (index == 0)
5004 index = ssize_int (1);
5005
5006 if (minelt)
5007 index = fold_convert (ssizetype,
5008 fold (build2 (MINUS_EXPR,
5009 TREE_TYPE (index),
5010 index,
5011 TYPE_MIN_VALUE (domain))));
5012
5013 position = size_binop (MULT_EXPR, index,
5014 convert (ssizetype,
5015 TYPE_SIZE_UNIT (elttype)));
5016 xtarget = offset_address (target,
5017 expand_expr (position, 0, VOIDmode, 0),
5018 highest_pow2_factor (position));
5019 xtarget = adjust_address (xtarget, mode, 0);
5020 store_expr (value, xtarget, 0);
5021 }
5022 else
5023 {
5024 if (index != 0)
5025 bitpos = ((tree_low_cst (index, 0) - minelt)
5026 * tree_low_cst (TYPE_SIZE (elttype), 1));
5027 else
5028 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
5029
5030 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
5031 && TREE_CODE (type) == ARRAY_TYPE
5032 && TYPE_NONALIASED_COMPONENT (type))
5033 {
5034 target = copy_rtx (target);
5035 MEM_KEEP_ALIAS_SET_P (target) = 1;
5036 }
5037 store_constructor_field (target, bitsize, bitpos, mode, value,
5038 type, cleared, get_alias_set (elttype));
5039 }
5040 }
5041 break;
5042 }
5043
5044 case VECTOR_TYPE:
5045 {
5046 tree elt;
5047 int i;
5048 int need_to_clear;
5049 int icode = 0;
5050 tree elttype = TREE_TYPE (type);
5051 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
5052 enum machine_mode eltmode = TYPE_MODE (elttype);
5053 HOST_WIDE_INT bitsize;
5054 HOST_WIDE_INT bitpos;
5055 rtvec vector = NULL;
5056 unsigned n_elts;
5057
5058 gcc_assert (eltmode != BLKmode);
5059
5060 n_elts = TYPE_VECTOR_SUBPARTS (type);
5061 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
5062 {
5063 enum machine_mode mode = GET_MODE (target);
5064
5065 icode = (int) vec_init_optab->handlers[mode].insn_code;
5066 if (icode != CODE_FOR_nothing)
5067 {
5068 unsigned int i;
5069
5070 vector = rtvec_alloc (n_elts);
5071 for (i = 0; i < n_elts; i++)
5072 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
5073 }
5074 }
5075
5076 /* If the constructor has fewer elements than the vector,
5077 clear the whole array first. Similarly if this is static
5078 constructor of a non-BLKmode object. */
5079 if (cleared)
5080 need_to_clear = 0;
5081 else if (REG_P (target) && TREE_STATIC (exp))
5082 need_to_clear = 1;
5083 else
5084 {
5085 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
5086
5087 for (elt = CONSTRUCTOR_ELTS (exp);
5088 elt != NULL_TREE;
5089 elt = TREE_CHAIN (elt))
5090 {
5091 int n_elts_here = tree_low_cst
5092 (int_const_binop (TRUNC_DIV_EXPR,
5093 TYPE_SIZE (TREE_TYPE (TREE_VALUE (elt))),
5094 TYPE_SIZE (elttype), 0), 1);
5095
5096 count += n_elts_here;
5097 if (mostly_zeros_p (TREE_VALUE (elt)))
5098 zero_count += n_elts_here;
5099 }
5100
5101 /* Clear the entire vector first if there are any missing elements,
5102 or if the incidence of zero elements is >= 75%. */
5103 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
5104 }
5105
5106 if (need_to_clear && size > 0 && !vector)
5107 {
5108 if (REG_P (target))
5109 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5110 else
5111 clear_storage (target, GEN_INT (size));
5112 cleared = 1;
5113 }
5114
5115 if (!cleared && REG_P (target))
5116 /* Inform later passes that the old value is dead. */
5117 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
5118
5119 /* Store each element of the constructor into the corresponding
5120 element of TARGET, determined by counting the elements. */
5121 for (elt = CONSTRUCTOR_ELTS (exp), i = 0;
5122 elt;
5123 elt = TREE_CHAIN (elt), i += bitsize / elt_size)
5124 {
5125 tree value = TREE_VALUE (elt);
5126 tree index = TREE_PURPOSE (elt);
5127 HOST_WIDE_INT eltpos;
5128
5129 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
5130 if (cleared && initializer_zerop (value))
5131 continue;
5132
5133 if (index != 0)
5134 eltpos = tree_low_cst (index, 1);
5135 else
5136 eltpos = i;
5137
5138 if (vector)
5139 {
5140 /* Vector CONSTRUCTORs should only be built from smaller
5141 vectors in the case of BLKmode vectors. */
5142 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
5143 RTVEC_ELT (vector, eltpos)
5144 = expand_expr (value, NULL_RTX, VOIDmode, 0);
5145 }
5146 else
5147 {
5148 enum machine_mode value_mode =
5149 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
5150 ? TYPE_MODE (TREE_TYPE (value))
5151 : eltmode;
5152 bitpos = eltpos * elt_size;
5153 store_constructor_field (target, bitsize, bitpos,
5154 value_mode, value, type,
5155 cleared, get_alias_set (elttype));
5156 }
5157 }
5158
5159 if (vector)
5160 emit_insn (GEN_FCN (icode)
5161 (target,
5162 gen_rtx_PARALLEL (GET_MODE (target), vector)));
5163 break;
5164 }
5165
5166 default:
5167 gcc_unreachable ();
5168 }
5169 }
5170
5171 /* Store the value of EXP (an expression tree)
5172 into a subfield of TARGET which has mode MODE and occupies
5173 BITSIZE bits, starting BITPOS bits from the start of TARGET.
5174 If MODE is VOIDmode, it means that we are storing into a bit-field.
5175
5176 Always return const0_rtx unless we have something particular to
5177 return.
5178
5179 TYPE is the type of the underlying object,
5180
5181 ALIAS_SET is the alias set for the destination. This value will
5182 (in general) be different from that for TARGET, since TARGET is a
5183 reference to the containing structure. */
5184
5185 static rtx
5186 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
5187 enum machine_mode mode, tree exp, tree type, int alias_set)
5188 {
5189 HOST_WIDE_INT width_mask = 0;
5190
5191 if (TREE_CODE (exp) == ERROR_MARK)
5192 return const0_rtx;
5193
5194 /* If we have nothing to store, do nothing unless the expression has
5195 side-effects. */
5196 if (bitsize == 0)
5197 return expand_expr (exp, const0_rtx, VOIDmode, 0);
5198 else if (bitsize >= 0 && bitsize < HOST_BITS_PER_WIDE_INT)
5199 width_mask = ((HOST_WIDE_INT) 1 << bitsize) - 1;
5200
5201 /* If we are storing into an unaligned field of an aligned union that is
5202 in a register, we may have the mode of TARGET being an integer mode but
5203 MODE == BLKmode. In that case, get an aligned object whose size and
5204 alignment are the same as TARGET and store TARGET into it (we can avoid
5205 the store if the field being stored is the entire width of TARGET). Then
5206 call ourselves recursively to store the field into a BLKmode version of
5207 that object. Finally, load from the object into TARGET. This is not
5208 very efficient in general, but should only be slightly more expensive
5209 than the otherwise-required unaligned accesses. Perhaps this can be
5210 cleaned up later. It's tempting to make OBJECT readonly, but it's set
5211 twice, once with emit_move_insn and once via store_field. */
5212
5213 if (mode == BLKmode
5214 && (REG_P (target) || GET_CODE (target) == SUBREG))
5215 {
5216 rtx object = assign_temp (type, 0, 1, 1);
5217 rtx blk_object = adjust_address (object, BLKmode, 0);
5218
5219 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
5220 emit_move_insn (object, target);
5221
5222 store_field (blk_object, bitsize, bitpos, mode, exp, type, alias_set);
5223
5224 emit_move_insn (target, object);
5225
5226 /* We want to return the BLKmode version of the data. */
5227 return blk_object;
5228 }
5229
5230 if (GET_CODE (target) == CONCAT)
5231 {
5232 /* We're storing into a struct containing a single __complex. */
5233
5234 gcc_assert (!bitpos);
5235 return store_expr (exp, target, 0);
5236 }
5237
5238 /* If the structure is in a register or if the component
5239 is a bit field, we cannot use addressing to access it.
5240 Use bit-field techniques or SUBREG to store in it. */
5241
5242 if (mode == VOIDmode
5243 || (mode != BLKmode && ! direct_store[(int) mode]
5244 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
5245 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
5246 || REG_P (target)
5247 || GET_CODE (target) == SUBREG
5248 /* If the field isn't aligned enough to store as an ordinary memref,
5249 store it as a bit field. */
5250 || (mode != BLKmode
5251 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
5252 || bitpos % GET_MODE_ALIGNMENT (mode))
5253 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
5254 || (bitpos % BITS_PER_UNIT != 0)))
5255 /* If the RHS and field are a constant size and the size of the
5256 RHS isn't the same size as the bitfield, we must use bitfield
5257 operations. */
5258 || (bitsize >= 0
5259 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
5260 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0))
5261 {
5262 rtx temp;
5263
5264 /* If EXP is a NOP_EXPR of precision less than its mode, then that
5265 implies a mask operation. If the precision is the same size as
5266 the field we're storing into, that mask is redundant. This is
5267 particularly common with bit field assignments generated by the
5268 C front end. */
5269 if (TREE_CODE (exp) == NOP_EXPR)
5270 {
5271 tree type = TREE_TYPE (exp);
5272 if (INTEGRAL_TYPE_P (type)
5273 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
5274 && bitsize == TYPE_PRECISION (type))
5275 {
5276 type = TREE_TYPE (TREE_OPERAND (exp, 0));
5277 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
5278 exp = TREE_OPERAND (exp, 0);
5279 }
5280 }
5281
5282 temp = expand_expr (exp, NULL_RTX, VOIDmode, 0);
5283
5284 /* If BITSIZE is narrower than the size of the type of EXP
5285 we will be narrowing TEMP. Normally, what's wanted are the
5286 low-order bits. However, if EXP's type is a record and this is
5287 big-endian machine, we want the upper BITSIZE bits. */
5288 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
5289 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
5290 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
5291 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
5292 size_int (GET_MODE_BITSIZE (GET_MODE (temp))
5293 - bitsize),
5294 NULL_RTX, 1);
5295
5296 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
5297 MODE. */
5298 if (mode != VOIDmode && mode != BLKmode
5299 && mode != TYPE_MODE (TREE_TYPE (exp)))
5300 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
5301
5302 /* If the modes of TARGET and TEMP are both BLKmode, both
5303 must be in memory and BITPOS must be aligned on a byte
5304 boundary. If so, we simply do a block copy. */
5305 if (GET_MODE (target) == BLKmode && GET_MODE (temp) == BLKmode)
5306 {
5307 gcc_assert (MEM_P (target) && MEM_P (temp)
5308 && !(bitpos % BITS_PER_UNIT));
5309
5310 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
5311 emit_block_move (target, temp,
5312 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
5313 / BITS_PER_UNIT),
5314 BLOCK_OP_NORMAL);
5315
5316 return const0_rtx;
5317 }
5318
5319 /* Store the value in the bitfield. */
5320 store_bit_field (target, bitsize, bitpos, mode, temp);
5321
5322 return const0_rtx;
5323 }
5324 else
5325 {
5326 /* Now build a reference to just the desired component. */
5327 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
5328
5329 if (to_rtx == target)
5330 to_rtx = copy_rtx (to_rtx);
5331
5332 MEM_SET_IN_STRUCT_P (to_rtx, 1);
5333 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
5334 set_mem_alias_set (to_rtx, alias_set);
5335
5336 return store_expr (exp, to_rtx, 0);
5337 }
5338 }
5339 \f
5340 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
5341 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
5342 codes and find the ultimate containing object, which we return.
5343
5344 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
5345 bit position, and *PUNSIGNEDP to the signedness of the field.
5346 If the position of the field is variable, we store a tree
5347 giving the variable offset (in units) in *POFFSET.
5348 This offset is in addition to the bit position.
5349 If the position is not variable, we store 0 in *POFFSET.
5350
5351 If any of the extraction expressions is volatile,
5352 we store 1 in *PVOLATILEP. Otherwise we don't change that.
5353
5354 If the field is a bit-field, *PMODE is set to VOIDmode. Otherwise, it
5355 is a mode that can be used to access the field. In that case, *PBITSIZE
5356 is redundant.
5357
5358 If the field describes a variable-sized object, *PMODE is set to
5359 VOIDmode and *PBITSIZE is set to -1. An access cannot be made in
5360 this case, but the address of the object can be found.
5361
5362 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
5363 look through nodes that serve as markers of a greater alignment than
5364 the one that can be deduced from the expression. These nodes make it
5365 possible for front-ends to prevent temporaries from being created by
5366 the middle-end on alignment considerations. For that purpose, the
5367 normal operating mode at high-level is to always pass FALSE so that
5368 the ultimate containing object is really returned; moreover, the
5369 associated predicate handled_component_p will always return TRUE
5370 on these nodes, thus indicating that they are essentially handled
5371 by get_inner_reference. TRUE should only be passed when the caller
5372 is scanning the expression in order to build another representation
5373 and specifically knows how to handle these nodes; as such, this is
5374 the normal operating mode in the RTL expanders. */
5375
5376 tree
5377 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
5378 HOST_WIDE_INT *pbitpos, tree *poffset,
5379 enum machine_mode *pmode, int *punsignedp,
5380 int *pvolatilep, bool keep_aligning)
5381 {
5382 tree size_tree = 0;
5383 enum machine_mode mode = VOIDmode;
5384 tree offset = size_zero_node;
5385 tree bit_offset = bitsize_zero_node;
5386 tree tem;
5387
5388 /* First get the mode, signedness, and size. We do this from just the
5389 outermost expression. */
5390 if (TREE_CODE (exp) == COMPONENT_REF)
5391 {
5392 size_tree = DECL_SIZE (TREE_OPERAND (exp, 1));
5393 if (! DECL_BIT_FIELD (TREE_OPERAND (exp, 1)))
5394 mode = DECL_MODE (TREE_OPERAND (exp, 1));
5395
5396 *punsignedp = DECL_UNSIGNED (TREE_OPERAND (exp, 1));
5397 }
5398 else if (TREE_CODE (exp) == BIT_FIELD_REF)
5399 {
5400 size_tree = TREE_OPERAND (exp, 1);
5401 *punsignedp = BIT_FIELD_REF_UNSIGNED (exp);
5402 }
5403 else
5404 {
5405 mode = TYPE_MODE (TREE_TYPE (exp));
5406 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5407
5408 if (mode == BLKmode)
5409 size_tree = TYPE_SIZE (TREE_TYPE (exp));
5410 else
5411 *pbitsize = GET_MODE_BITSIZE (mode);
5412 }
5413
5414 if (size_tree != 0)
5415 {
5416 if (! host_integerp (size_tree, 1))
5417 mode = BLKmode, *pbitsize = -1;
5418 else
5419 *pbitsize = tree_low_cst (size_tree, 1);
5420 }
5421
5422 /* Compute cumulative bit-offset for nested component-refs and array-refs,
5423 and find the ultimate containing object. */
5424 while (1)
5425 {
5426 switch (TREE_CODE (exp))
5427 {
5428 case BIT_FIELD_REF:
5429 bit_offset = size_binop (PLUS_EXPR, bit_offset,
5430 TREE_OPERAND (exp, 2));
5431 break;
5432
5433 case COMPONENT_REF:
5434 {
5435 tree field = TREE_OPERAND (exp, 1);
5436 tree this_offset = component_ref_field_offset (exp);
5437
5438 /* If this field hasn't been filled in yet, don't go past it.
5439 This should only happen when folding expressions made during
5440 type construction. */
5441 if (this_offset == 0)
5442 break;
5443
5444 offset = size_binop (PLUS_EXPR, offset, this_offset);
5445 bit_offset = size_binop (PLUS_EXPR, bit_offset,
5446 DECL_FIELD_BIT_OFFSET (field));
5447
5448 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
5449 }
5450 break;
5451
5452 case ARRAY_REF:
5453 case ARRAY_RANGE_REF:
5454 {
5455 tree index = TREE_OPERAND (exp, 1);
5456 tree low_bound = array_ref_low_bound (exp);
5457 tree unit_size = array_ref_element_size (exp);
5458
5459 /* We assume all arrays have sizes that are a multiple of a byte.
5460 First subtract the lower bound, if any, in the type of the
5461 index, then convert to sizetype and multiply by the size of
5462 the array element. */
5463 if (! integer_zerop (low_bound))
5464 index = fold (build2 (MINUS_EXPR, TREE_TYPE (index),
5465 index, low_bound));
5466
5467 offset = size_binop (PLUS_EXPR, offset,
5468 size_binop (MULT_EXPR,
5469 convert (sizetype, index),
5470 unit_size));
5471 }
5472 break;
5473
5474 case REALPART_EXPR:
5475 break;
5476
5477 case IMAGPART_EXPR:
5478 bit_offset = size_binop (PLUS_EXPR, bit_offset,
5479 bitsize_int (*pbitsize));
5480 break;
5481
5482 case VIEW_CONVERT_EXPR:
5483 if (keep_aligning && STRICT_ALIGNMENT
5484 && (TYPE_ALIGN (TREE_TYPE (exp))
5485 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
5486 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
5487 < BIGGEST_ALIGNMENT)
5488 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
5489 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
5490 goto done;
5491 break;
5492
5493 default:
5494 goto done;
5495 }
5496
5497 /* If any reference in the chain is volatile, the effect is volatile. */
5498 if (TREE_THIS_VOLATILE (exp))
5499 *pvolatilep = 1;
5500
5501 exp = TREE_OPERAND (exp, 0);
5502 }
5503 done:
5504
5505 /* If OFFSET is constant, see if we can return the whole thing as a
5506 constant bit position. Otherwise, split it up. */
5507 if (host_integerp (offset, 0)
5508 && 0 != (tem = size_binop (MULT_EXPR, convert (bitsizetype, offset),
5509 bitsize_unit_node))
5510 && 0 != (tem = size_binop (PLUS_EXPR, tem, bit_offset))
5511 && host_integerp (tem, 0))
5512 *pbitpos = tree_low_cst (tem, 0), *poffset = 0;
5513 else
5514 *pbitpos = tree_low_cst (bit_offset, 0), *poffset = offset;
5515
5516 *pmode = mode;
5517 return exp;
5518 }
5519
5520 /* Return a tree of sizetype representing the size, in bytes, of the element
5521 of EXP, an ARRAY_REF. */
5522
5523 tree
5524 array_ref_element_size (tree exp)
5525 {
5526 tree aligned_size = TREE_OPERAND (exp, 3);
5527 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
5528
5529 /* If a size was specified in the ARRAY_REF, it's the size measured
5530 in alignment units of the element type. So multiply by that value. */
5531 if (aligned_size)
5532 {
5533 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
5534 sizetype from another type of the same width and signedness. */
5535 if (TREE_TYPE (aligned_size) != sizetype)
5536 aligned_size = fold_convert (sizetype, aligned_size);
5537 return size_binop (MULT_EXPR, aligned_size,
5538 size_int (TYPE_ALIGN_UNIT (elmt_type)));
5539 }
5540
5541 /* Otherwise, take the size from that of the element type. Substitute
5542 any PLACEHOLDER_EXPR that we have. */
5543 else
5544 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
5545 }
5546
5547 /* Return a tree representing the lower bound of the array mentioned in
5548 EXP, an ARRAY_REF. */
5549
5550 tree
5551 array_ref_low_bound (tree exp)
5552 {
5553 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
5554
5555 /* If a lower bound is specified in EXP, use it. */
5556 if (TREE_OPERAND (exp, 2))
5557 return TREE_OPERAND (exp, 2);
5558
5559 /* Otherwise, if there is a domain type and it has a lower bound, use it,
5560 substituting for a PLACEHOLDER_EXPR as needed. */
5561 if (domain_type && TYPE_MIN_VALUE (domain_type))
5562 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
5563
5564 /* Otherwise, return a zero of the appropriate type. */
5565 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
5566 }
5567
5568 /* Return a tree representing the upper bound of the array mentioned in
5569 EXP, an ARRAY_REF. */
5570
5571 tree
5572 array_ref_up_bound (tree exp)
5573 {
5574 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
5575
5576 /* If there is a domain type and it has an upper bound, use it, substituting
5577 for a PLACEHOLDER_EXPR as needed. */
5578 if (domain_type && TYPE_MAX_VALUE (domain_type))
5579 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
5580
5581 /* Otherwise fail. */
5582 return NULL_TREE;
5583 }
5584
5585 /* Return a tree representing the offset, in bytes, of the field referenced
5586 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
5587
5588 tree
5589 component_ref_field_offset (tree exp)
5590 {
5591 tree aligned_offset = TREE_OPERAND (exp, 2);
5592 tree field = TREE_OPERAND (exp, 1);
5593
5594 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
5595 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
5596 value. */
5597 if (aligned_offset)
5598 {
5599 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
5600 sizetype from another type of the same width and signedness. */
5601 if (TREE_TYPE (aligned_offset) != sizetype)
5602 aligned_offset = fold_convert (sizetype, aligned_offset);
5603 return size_binop (MULT_EXPR, aligned_offset,
5604 size_int (DECL_OFFSET_ALIGN (field) / BITS_PER_UNIT));
5605 }
5606
5607 /* Otherwise, take the offset from that of the field. Substitute
5608 any PLACEHOLDER_EXPR that we have. */
5609 else
5610 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
5611 }
5612
5613 /* Return 1 if T is an expression that get_inner_reference handles. */
5614
5615 int
5616 handled_component_p (tree t)
5617 {
5618 switch (TREE_CODE (t))
5619 {
5620 case BIT_FIELD_REF:
5621 case COMPONENT_REF:
5622 case ARRAY_REF:
5623 case ARRAY_RANGE_REF:
5624 case VIEW_CONVERT_EXPR:
5625 case REALPART_EXPR:
5626 case IMAGPART_EXPR:
5627 return 1;
5628
5629 default:
5630 return 0;
5631 }
5632 }
5633 \f
5634 /* Given an rtx VALUE that may contain additions and multiplications, return
5635 an equivalent value that just refers to a register, memory, or constant.
5636 This is done by generating instructions to perform the arithmetic and
5637 returning a pseudo-register containing the value.
5638
5639 The returned value may be a REG, SUBREG, MEM or constant. */
5640
5641 rtx
5642 force_operand (rtx value, rtx target)
5643 {
5644 rtx op1, op2;
5645 /* Use subtarget as the target for operand 0 of a binary operation. */
5646 rtx subtarget = get_subtarget (target);
5647 enum rtx_code code = GET_CODE (value);
5648
5649 /* Check for subreg applied to an expression produced by loop optimizer. */
5650 if (code == SUBREG
5651 && !REG_P (SUBREG_REG (value))
5652 && !MEM_P (SUBREG_REG (value)))
5653 {
5654 value = simplify_gen_subreg (GET_MODE (value),
5655 force_reg (GET_MODE (SUBREG_REG (value)),
5656 force_operand (SUBREG_REG (value),
5657 NULL_RTX)),
5658 GET_MODE (SUBREG_REG (value)),
5659 SUBREG_BYTE (value));
5660 code = GET_CODE (value);
5661 }
5662
5663 /* Check for a PIC address load. */
5664 if ((code == PLUS || code == MINUS)
5665 && XEXP (value, 0) == pic_offset_table_rtx
5666 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
5667 || GET_CODE (XEXP (value, 1)) == LABEL_REF
5668 || GET_CODE (XEXP (value, 1)) == CONST))
5669 {
5670 if (!subtarget)
5671 subtarget = gen_reg_rtx (GET_MODE (value));
5672 emit_move_insn (subtarget, value);
5673 return subtarget;
5674 }
5675
5676 if (code == ZERO_EXTEND || code == SIGN_EXTEND)
5677 {
5678 if (!target)
5679 target = gen_reg_rtx (GET_MODE (value));
5680 convert_move (target, force_operand (XEXP (value, 0), NULL),
5681 code == ZERO_EXTEND);
5682 return target;
5683 }
5684
5685 if (ARITHMETIC_P (value))
5686 {
5687 op2 = XEXP (value, 1);
5688 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
5689 subtarget = 0;
5690 if (code == MINUS && GET_CODE (op2) == CONST_INT)
5691 {
5692 code = PLUS;
5693 op2 = negate_rtx (GET_MODE (value), op2);
5694 }
5695
5696 /* Check for an addition with OP2 a constant integer and our first
5697 operand a PLUS of a virtual register and something else. In that
5698 case, we want to emit the sum of the virtual register and the
5699 constant first and then add the other value. This allows virtual
5700 register instantiation to simply modify the constant rather than
5701 creating another one around this addition. */
5702 if (code == PLUS && GET_CODE (op2) == CONST_INT
5703 && GET_CODE (XEXP (value, 0)) == PLUS
5704 && REG_P (XEXP (XEXP (value, 0), 0))
5705 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
5706 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
5707 {
5708 rtx temp = expand_simple_binop (GET_MODE (value), code,
5709 XEXP (XEXP (value, 0), 0), op2,
5710 subtarget, 0, OPTAB_LIB_WIDEN);
5711 return expand_simple_binop (GET_MODE (value), code, temp,
5712 force_operand (XEXP (XEXP (value,
5713 0), 1), 0),
5714 target, 0, OPTAB_LIB_WIDEN);
5715 }
5716
5717 op1 = force_operand (XEXP (value, 0), subtarget);
5718 op2 = force_operand (op2, NULL_RTX);
5719 switch (code)
5720 {
5721 case MULT:
5722 return expand_mult (GET_MODE (value), op1, op2, target, 1);
5723 case DIV:
5724 if (!INTEGRAL_MODE_P (GET_MODE (value)))
5725 return expand_simple_binop (GET_MODE (value), code, op1, op2,
5726 target, 1, OPTAB_LIB_WIDEN);
5727 else
5728 return expand_divmod (0,
5729 FLOAT_MODE_P (GET_MODE (value))
5730 ? RDIV_EXPR : TRUNC_DIV_EXPR,
5731 GET_MODE (value), op1, op2, target, 0);
5732 break;
5733 case MOD:
5734 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
5735 target, 0);
5736 break;
5737 case UDIV:
5738 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
5739 target, 1);
5740 break;
5741 case UMOD:
5742 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
5743 target, 1);
5744 break;
5745 case ASHIFTRT:
5746 return expand_simple_binop (GET_MODE (value), code, op1, op2,
5747 target, 0, OPTAB_LIB_WIDEN);
5748 break;
5749 default:
5750 return expand_simple_binop (GET_MODE (value), code, op1, op2,
5751 target, 1, OPTAB_LIB_WIDEN);
5752 }
5753 }
5754 if (UNARY_P (value))
5755 {
5756 op1 = force_operand (XEXP (value, 0), NULL_RTX);
5757 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
5758 }
5759
5760 #ifdef INSN_SCHEDULING
5761 /* On machines that have insn scheduling, we want all memory reference to be
5762 explicit, so we need to deal with such paradoxical SUBREGs. */
5763 if (GET_CODE (value) == SUBREG && MEM_P (SUBREG_REG (value))
5764 && (GET_MODE_SIZE (GET_MODE (value))
5765 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (value)))))
5766 value
5767 = simplify_gen_subreg (GET_MODE (value),
5768 force_reg (GET_MODE (SUBREG_REG (value)),
5769 force_operand (SUBREG_REG (value),
5770 NULL_RTX)),
5771 GET_MODE (SUBREG_REG (value)),
5772 SUBREG_BYTE (value));
5773 #endif
5774
5775 return value;
5776 }
5777 \f
5778 /* Subroutine of expand_expr: return nonzero iff there is no way that
5779 EXP can reference X, which is being modified. TOP_P is nonzero if this
5780 call is going to be used to determine whether we need a temporary
5781 for EXP, as opposed to a recursive call to this function.
5782
5783 It is always safe for this routine to return zero since it merely
5784 searches for optimization opportunities. */
5785
5786 int
5787 safe_from_p (rtx x, tree exp, int top_p)
5788 {
5789 rtx exp_rtl = 0;
5790 int i, nops;
5791
5792 if (x == 0
5793 /* If EXP has varying size, we MUST use a target since we currently
5794 have no way of allocating temporaries of variable size
5795 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
5796 So we assume here that something at a higher level has prevented a
5797 clash. This is somewhat bogus, but the best we can do. Only
5798 do this when X is BLKmode and when we are at the top level. */
5799 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
5800 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
5801 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
5802 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
5803 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
5804 != INTEGER_CST)
5805 && GET_MODE (x) == BLKmode)
5806 /* If X is in the outgoing argument area, it is always safe. */
5807 || (MEM_P (x)
5808 && (XEXP (x, 0) == virtual_outgoing_args_rtx
5809 || (GET_CODE (XEXP (x, 0)) == PLUS
5810 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
5811 return 1;
5812
5813 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
5814 find the underlying pseudo. */
5815 if (GET_CODE (x) == SUBREG)
5816 {
5817 x = SUBREG_REG (x);
5818 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
5819 return 0;
5820 }
5821
5822 /* Now look at our tree code and possibly recurse. */
5823 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
5824 {
5825 case tcc_declaration:
5826 exp_rtl = DECL_RTL_IF_SET (exp);
5827 break;
5828
5829 case tcc_constant:
5830 return 1;
5831
5832 case tcc_exceptional:
5833 if (TREE_CODE (exp) == TREE_LIST)
5834 {
5835 while (1)
5836 {
5837 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
5838 return 0;
5839 exp = TREE_CHAIN (exp);
5840 if (!exp)
5841 return 1;
5842 if (TREE_CODE (exp) != TREE_LIST)
5843 return safe_from_p (x, exp, 0);
5844 }
5845 }
5846 else if (TREE_CODE (exp) == ERROR_MARK)
5847 return 1; /* An already-visited SAVE_EXPR? */
5848 else
5849 return 0;
5850
5851 case tcc_statement:
5852 /* The only case we look at here is the DECL_INITIAL inside a
5853 DECL_EXPR. */
5854 return (TREE_CODE (exp) != DECL_EXPR
5855 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
5856 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
5857 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
5858
5859 case tcc_binary:
5860 case tcc_comparison:
5861 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
5862 return 0;
5863 /* Fall through. */
5864
5865 case tcc_unary:
5866 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
5867
5868 case tcc_expression:
5869 case tcc_reference:
5870 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
5871 the expression. If it is set, we conflict iff we are that rtx or
5872 both are in memory. Otherwise, we check all operands of the
5873 expression recursively. */
5874
5875 switch (TREE_CODE (exp))
5876 {
5877 case ADDR_EXPR:
5878 /* If the operand is static or we are static, we can't conflict.
5879 Likewise if we don't conflict with the operand at all. */
5880 if (staticp (TREE_OPERAND (exp, 0))
5881 || TREE_STATIC (exp)
5882 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
5883 return 1;
5884
5885 /* Otherwise, the only way this can conflict is if we are taking
5886 the address of a DECL a that address if part of X, which is
5887 very rare. */
5888 exp = TREE_OPERAND (exp, 0);
5889 if (DECL_P (exp))
5890 {
5891 if (!DECL_RTL_SET_P (exp)
5892 || !MEM_P (DECL_RTL (exp)))
5893 return 0;
5894 else
5895 exp_rtl = XEXP (DECL_RTL (exp), 0);
5896 }
5897 break;
5898
5899 case MISALIGNED_INDIRECT_REF:
5900 case ALIGN_INDIRECT_REF:
5901 case INDIRECT_REF:
5902 if (MEM_P (x)
5903 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
5904 get_alias_set (exp)))
5905 return 0;
5906 break;
5907
5908 case CALL_EXPR:
5909 /* Assume that the call will clobber all hard registers and
5910 all of memory. */
5911 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
5912 || MEM_P (x))
5913 return 0;
5914 break;
5915
5916 case WITH_CLEANUP_EXPR:
5917 case CLEANUP_POINT_EXPR:
5918 /* Lowered by gimplify.c. */
5919 gcc_unreachable ();
5920
5921 case SAVE_EXPR:
5922 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
5923
5924 default:
5925 break;
5926 }
5927
5928 /* If we have an rtx, we do not need to scan our operands. */
5929 if (exp_rtl)
5930 break;
5931
5932 nops = TREE_CODE_LENGTH (TREE_CODE (exp));
5933 for (i = 0; i < nops; i++)
5934 if (TREE_OPERAND (exp, i) != 0
5935 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
5936 return 0;
5937
5938 /* If this is a language-specific tree code, it may require
5939 special handling. */
5940 if ((unsigned int) TREE_CODE (exp)
5941 >= (unsigned int) LAST_AND_UNUSED_TREE_CODE
5942 && !lang_hooks.safe_from_p (x, exp))
5943 return 0;
5944 break;
5945
5946 case tcc_type:
5947 /* Should never get a type here. */
5948 gcc_unreachable ();
5949 }
5950
5951 /* If we have an rtl, find any enclosed object. Then see if we conflict
5952 with it. */
5953 if (exp_rtl)
5954 {
5955 if (GET_CODE (exp_rtl) == SUBREG)
5956 {
5957 exp_rtl = SUBREG_REG (exp_rtl);
5958 if (REG_P (exp_rtl)
5959 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
5960 return 0;
5961 }
5962
5963 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
5964 are memory and they conflict. */
5965 return ! (rtx_equal_p (x, exp_rtl)
5966 || (MEM_P (x) && MEM_P (exp_rtl)
5967 && true_dependence (exp_rtl, VOIDmode, x,
5968 rtx_addr_varies_p)));
5969 }
5970
5971 /* If we reach here, it is safe. */
5972 return 1;
5973 }
5974
5975 \f
5976 /* Return the highest power of two that EXP is known to be a multiple of.
5977 This is used in updating alignment of MEMs in array references. */
5978
5979 static unsigned HOST_WIDE_INT
5980 highest_pow2_factor (tree exp)
5981 {
5982 unsigned HOST_WIDE_INT c0, c1;
5983
5984 switch (TREE_CODE (exp))
5985 {
5986 case INTEGER_CST:
5987 /* We can find the lowest bit that's a one. If the low
5988 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
5989 We need to handle this case since we can find it in a COND_EXPR,
5990 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
5991 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
5992 later ICE. */
5993 if (TREE_CONSTANT_OVERFLOW (exp))
5994 return BIGGEST_ALIGNMENT;
5995 else
5996 {
5997 /* Note: tree_low_cst is intentionally not used here,
5998 we don't care about the upper bits. */
5999 c0 = TREE_INT_CST_LOW (exp);
6000 c0 &= -c0;
6001 return c0 ? c0 : BIGGEST_ALIGNMENT;
6002 }
6003 break;
6004
6005 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
6006 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6007 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6008 return MIN (c0, c1);
6009
6010 case MULT_EXPR:
6011 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6012 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6013 return c0 * c1;
6014
6015 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
6016 case CEIL_DIV_EXPR:
6017 if (integer_pow2p (TREE_OPERAND (exp, 1))
6018 && host_integerp (TREE_OPERAND (exp, 1), 1))
6019 {
6020 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6021 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
6022 return MAX (1, c0 / c1);
6023 }
6024 break;
6025
6026 case NON_LVALUE_EXPR: case NOP_EXPR: case CONVERT_EXPR:
6027 case SAVE_EXPR:
6028 return highest_pow2_factor (TREE_OPERAND (exp, 0));
6029
6030 case COMPOUND_EXPR:
6031 return highest_pow2_factor (TREE_OPERAND (exp, 1));
6032
6033 case COND_EXPR:
6034 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6035 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
6036 return MIN (c0, c1);
6037
6038 default:
6039 break;
6040 }
6041
6042 return 1;
6043 }
6044
6045 /* Similar, except that the alignment requirements of TARGET are
6046 taken into account. Assume it is at least as aligned as its
6047 type, unless it is a COMPONENT_REF in which case the layout of
6048 the structure gives the alignment. */
6049
6050 static unsigned HOST_WIDE_INT
6051 highest_pow2_factor_for_target (tree target, tree exp)
6052 {
6053 unsigned HOST_WIDE_INT target_align, factor;
6054
6055 factor = highest_pow2_factor (exp);
6056 if (TREE_CODE (target) == COMPONENT_REF)
6057 target_align = DECL_ALIGN_UNIT (TREE_OPERAND (target, 1));
6058 else
6059 target_align = TYPE_ALIGN_UNIT (TREE_TYPE (target));
6060 return MAX (factor, target_align);
6061 }
6062 \f
6063 /* Expands variable VAR. */
6064
6065 void
6066 expand_var (tree var)
6067 {
6068 if (DECL_EXTERNAL (var))
6069 return;
6070
6071 if (TREE_STATIC (var))
6072 /* If this is an inlined copy of a static local variable,
6073 look up the original decl. */
6074 var = DECL_ORIGIN (var);
6075
6076 if (TREE_STATIC (var)
6077 ? !TREE_ASM_WRITTEN (var)
6078 : !DECL_RTL_SET_P (var))
6079 {
6080 if (TREE_CODE (var) == VAR_DECL && DECL_VALUE_EXPR (var))
6081 /* Should be ignored. */;
6082 else if (lang_hooks.expand_decl (var))
6083 /* OK. */;
6084 else if (TREE_CODE (var) == VAR_DECL && !TREE_STATIC (var))
6085 expand_decl (var);
6086 else if (TREE_CODE (var) == VAR_DECL && TREE_STATIC (var))
6087 rest_of_decl_compilation (var, 0, 0);
6088 else
6089 /* No expansion needed. */
6090 gcc_assert (TREE_CODE (var) == TYPE_DECL
6091 || TREE_CODE (var) == CONST_DECL
6092 || TREE_CODE (var) == FUNCTION_DECL
6093 || TREE_CODE (var) == LABEL_DECL);
6094 }
6095 }
6096
6097 /* Subroutine of expand_expr. Expand the two operands of a binary
6098 expression EXP0 and EXP1 placing the results in OP0 and OP1.
6099 The value may be stored in TARGET if TARGET is nonzero. The
6100 MODIFIER argument is as documented by expand_expr. */
6101
6102 static void
6103 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
6104 enum expand_modifier modifier)
6105 {
6106 if (! safe_from_p (target, exp1, 1))
6107 target = 0;
6108 if (operand_equal_p (exp0, exp1, 0))
6109 {
6110 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6111 *op1 = copy_rtx (*op0);
6112 }
6113 else
6114 {
6115 /* If we need to preserve evaluation order, copy exp0 into its own
6116 temporary variable so that it can't be clobbered by exp1. */
6117 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
6118 exp0 = save_expr (exp0);
6119 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6120 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
6121 }
6122 }
6123
6124 \f
6125 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
6126 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
6127
6128 static rtx
6129 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
6130 enum expand_modifier modifier)
6131 {
6132 rtx result, subtarget;
6133 tree inner, offset;
6134 HOST_WIDE_INT bitsize, bitpos;
6135 int volatilep, unsignedp;
6136 enum machine_mode mode1;
6137
6138 /* If we are taking the address of a constant and are at the top level,
6139 we have to use output_constant_def since we can't call force_const_mem
6140 at top level. */
6141 /* ??? This should be considered a front-end bug. We should not be
6142 generating ADDR_EXPR of something that isn't an LVALUE. The only
6143 exception here is STRING_CST. */
6144 if (TREE_CODE (exp) == CONSTRUCTOR
6145 || CONSTANT_CLASS_P (exp))
6146 return XEXP (output_constant_def (exp, 0), 0);
6147
6148 /* Everything must be something allowed by is_gimple_addressable. */
6149 switch (TREE_CODE (exp))
6150 {
6151 case INDIRECT_REF:
6152 /* This case will happen via recursion for &a->b. */
6153 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, EXPAND_NORMAL);
6154
6155 case CONST_DECL:
6156 /* Recurse and make the output_constant_def clause above handle this. */
6157 return expand_expr_addr_expr_1 (DECL_INITIAL (exp), target,
6158 tmode, modifier);
6159
6160 case REALPART_EXPR:
6161 /* The real part of the complex number is always first, therefore
6162 the address is the same as the address of the parent object. */
6163 offset = 0;
6164 bitpos = 0;
6165 inner = TREE_OPERAND (exp, 0);
6166 break;
6167
6168 case IMAGPART_EXPR:
6169 /* The imaginary part of the complex number is always second.
6170 The expression is therefore always offset by the size of the
6171 scalar type. */
6172 offset = 0;
6173 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
6174 inner = TREE_OPERAND (exp, 0);
6175 break;
6176
6177 default:
6178 /* If the object is a DECL, then expand it for its rtl. Don't bypass
6179 expand_expr, as that can have various side effects; LABEL_DECLs for
6180 example, may not have their DECL_RTL set yet. Assume language
6181 specific tree nodes can be expanded in some interesting way. */
6182 if (DECL_P (exp)
6183 || TREE_CODE (exp) >= LAST_AND_UNUSED_TREE_CODE)
6184 {
6185 result = expand_expr (exp, target, tmode,
6186 modifier == EXPAND_INITIALIZER
6187 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
6188
6189 /* If the DECL isn't in memory, then the DECL wasn't properly
6190 marked TREE_ADDRESSABLE, which will be either a front-end
6191 or a tree optimizer bug. */
6192 gcc_assert (GET_CODE (result) == MEM);
6193 result = XEXP (result, 0);
6194
6195 /* ??? Is this needed anymore? */
6196 if (DECL_P (exp) && !TREE_USED (exp) == 0)
6197 {
6198 assemble_external (exp);
6199 TREE_USED (exp) = 1;
6200 }
6201
6202 if (modifier != EXPAND_INITIALIZER
6203 && modifier != EXPAND_CONST_ADDRESS)
6204 result = force_operand (result, target);
6205 return result;
6206 }
6207
6208 /* Pass FALSE as the last argument to get_inner_reference although
6209 we are expanding to RTL. The rationale is that we know how to
6210 handle "aligning nodes" here: we can just bypass them because
6211 they won't change the final object whose address will be returned
6212 (they actually exist only for that purpose). */
6213 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
6214 &mode1, &unsignedp, &volatilep, false);
6215 break;
6216 }
6217
6218 /* We must have made progress. */
6219 gcc_assert (inner != exp);
6220
6221 subtarget = offset || bitpos ? NULL_RTX : target;
6222 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier);
6223
6224 if (offset)
6225 {
6226 rtx tmp;
6227
6228 if (modifier != EXPAND_NORMAL)
6229 result = force_operand (result, NULL);
6230 tmp = expand_expr (offset, NULL, tmode, EXPAND_NORMAL);
6231
6232 result = convert_memory_address (tmode, result);
6233 tmp = convert_memory_address (tmode, tmp);
6234
6235 if (modifier == EXPAND_SUM)
6236 result = gen_rtx_PLUS (tmode, result, tmp);
6237 else
6238 {
6239 subtarget = bitpos ? NULL_RTX : target;
6240 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
6241 1, OPTAB_LIB_WIDEN);
6242 }
6243 }
6244
6245 if (bitpos)
6246 {
6247 /* Someone beforehand should have rejected taking the address
6248 of such an object. */
6249 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
6250
6251 result = plus_constant (result, bitpos / BITS_PER_UNIT);
6252 if (modifier < EXPAND_SUM)
6253 result = force_operand (result, target);
6254 }
6255
6256 return result;
6257 }
6258
6259 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
6260 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
6261
6262 static rtx
6263 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
6264 enum expand_modifier modifier)
6265 {
6266 enum machine_mode rmode;
6267 rtx result;
6268
6269 /* Target mode of VOIDmode says "whatever's natural". */
6270 if (tmode == VOIDmode)
6271 tmode = TYPE_MODE (TREE_TYPE (exp));
6272
6273 /* We can get called with some Weird Things if the user does silliness
6274 like "(short) &a". In that case, convert_memory_address won't do
6275 the right thing, so ignore the given target mode. */
6276 if (tmode != Pmode && tmode != ptr_mode)
6277 tmode = Pmode;
6278
6279 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
6280 tmode, modifier);
6281
6282 /* Despite expand_expr claims concerning ignoring TMODE when not
6283 strictly convenient, stuff breaks if we don't honor it. Note
6284 that combined with the above, we only do this for pointer modes. */
6285 rmode = GET_MODE (result);
6286 if (rmode == VOIDmode)
6287 rmode = tmode;
6288 if (rmode != tmode)
6289 result = convert_memory_address (tmode, result);
6290
6291 return result;
6292 }
6293
6294
6295 /* expand_expr: generate code for computing expression EXP.
6296 An rtx for the computed value is returned. The value is never null.
6297 In the case of a void EXP, const0_rtx is returned.
6298
6299 The value may be stored in TARGET if TARGET is nonzero.
6300 TARGET is just a suggestion; callers must assume that
6301 the rtx returned may not be the same as TARGET.
6302
6303 If TARGET is CONST0_RTX, it means that the value will be ignored.
6304
6305 If TMODE is not VOIDmode, it suggests generating the
6306 result in mode TMODE. But this is done only when convenient.
6307 Otherwise, TMODE is ignored and the value generated in its natural mode.
6308 TMODE is just a suggestion; callers must assume that
6309 the rtx returned may not have mode TMODE.
6310
6311 Note that TARGET may have neither TMODE nor MODE. In that case, it
6312 probably will not be used.
6313
6314 If MODIFIER is EXPAND_SUM then when EXP is an addition
6315 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
6316 or a nest of (PLUS ...) and (MINUS ...) where the terms are
6317 products as above, or REG or MEM, or constant.
6318 Ordinarily in such cases we would output mul or add instructions
6319 and then return a pseudo reg containing the sum.
6320
6321 EXPAND_INITIALIZER is much like EXPAND_SUM except that
6322 it also marks a label as absolutely required (it can't be dead).
6323 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
6324 This is used for outputting expressions used in initializers.
6325
6326 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
6327 with a constant address even if that address is not normally legitimate.
6328 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
6329
6330 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
6331 a call parameter. Such targets require special care as we haven't yet
6332 marked TARGET so that it's safe from being trashed by libcalls. We
6333 don't want to use TARGET for anything but the final result;
6334 Intermediate values must go elsewhere. Additionally, calls to
6335 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
6336
6337 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
6338 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
6339 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
6340 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
6341 recursively. */
6342
6343 static rtx expand_expr_real_1 (tree, rtx, enum machine_mode,
6344 enum expand_modifier, rtx *);
6345
6346 rtx
6347 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
6348 enum expand_modifier modifier, rtx *alt_rtl)
6349 {
6350 int rn = -1;
6351 rtx ret, last = NULL;
6352
6353 /* Handle ERROR_MARK before anybody tries to access its type. */
6354 if (TREE_CODE (exp) == ERROR_MARK
6355 || TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK)
6356 {
6357 ret = CONST0_RTX (tmode);
6358 return ret ? ret : const0_rtx;
6359 }
6360
6361 if (flag_non_call_exceptions)
6362 {
6363 rn = lookup_stmt_eh_region (exp);
6364 /* If rn < 0, then either (1) tree-ssa not used or (2) doesn't throw. */
6365 if (rn >= 0)
6366 last = get_last_insn ();
6367 }
6368
6369 /* If this is an expression of some kind and it has an associated line
6370 number, then emit the line number before expanding the expression.
6371
6372 We need to save and restore the file and line information so that
6373 errors discovered during expansion are emitted with the right
6374 information. It would be better of the diagnostic routines
6375 used the file/line information embedded in the tree nodes rather
6376 than globals. */
6377 if (cfun && EXPR_HAS_LOCATION (exp))
6378 {
6379 location_t saved_location = input_location;
6380 input_location = EXPR_LOCATION (exp);
6381 emit_line_note (input_location);
6382
6383 /* Record where the insns produced belong. */
6384 record_block_change (TREE_BLOCK (exp));
6385
6386 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
6387
6388 input_location = saved_location;
6389 }
6390 else
6391 {
6392 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
6393 }
6394
6395 /* If using non-call exceptions, mark all insns that may trap.
6396 expand_call() will mark CALL_INSNs before we get to this code,
6397 but it doesn't handle libcalls, and these may trap. */
6398 if (rn >= 0)
6399 {
6400 rtx insn;
6401 for (insn = next_real_insn (last); insn;
6402 insn = next_real_insn (insn))
6403 {
6404 if (! find_reg_note (insn, REG_EH_REGION, NULL_RTX)
6405 /* If we want exceptions for non-call insns, any
6406 may_trap_p instruction may throw. */
6407 && GET_CODE (PATTERN (insn)) != CLOBBER
6408 && GET_CODE (PATTERN (insn)) != USE
6409 && (CALL_P (insn) || may_trap_p (PATTERN (insn))))
6410 {
6411 REG_NOTES (insn) = alloc_EXPR_LIST (REG_EH_REGION, GEN_INT (rn),
6412 REG_NOTES (insn));
6413 }
6414 }
6415 }
6416
6417 return ret;
6418 }
6419
6420 static rtx
6421 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
6422 enum expand_modifier modifier, rtx *alt_rtl)
6423 {
6424 rtx op0, op1, temp;
6425 tree type = TREE_TYPE (exp);
6426 int unsignedp;
6427 enum machine_mode mode;
6428 enum tree_code code = TREE_CODE (exp);
6429 optab this_optab;
6430 rtx subtarget, original_target;
6431 int ignore;
6432 tree context;
6433 bool reduce_bit_field = false;
6434 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field && !ignore \
6435 ? reduce_to_bit_field_precision ((expr), \
6436 target, \
6437 type) \
6438 : (expr))
6439
6440 mode = TYPE_MODE (type);
6441 unsignedp = TYPE_UNSIGNED (type);
6442 if (lang_hooks.reduce_bit_field_operations
6443 && TREE_CODE (type) == INTEGER_TYPE
6444 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type))
6445 {
6446 /* An operation in what may be a bit-field type needs the
6447 result to be reduced to the precision of the bit-field type,
6448 which is narrower than that of the type's mode. */
6449 reduce_bit_field = true;
6450 if (modifier == EXPAND_STACK_PARM)
6451 target = 0;
6452 }
6453
6454 /* Use subtarget as the target for operand 0 of a binary operation. */
6455 subtarget = get_subtarget (target);
6456 original_target = target;
6457 ignore = (target == const0_rtx
6458 || ((code == NON_LVALUE_EXPR || code == NOP_EXPR
6459 || code == CONVERT_EXPR || code == COND_EXPR
6460 || code == VIEW_CONVERT_EXPR)
6461 && TREE_CODE (type) == VOID_TYPE));
6462
6463 /* If we are going to ignore this result, we need only do something
6464 if there is a side-effect somewhere in the expression. If there
6465 is, short-circuit the most common cases here. Note that we must
6466 not call expand_expr with anything but const0_rtx in case this
6467 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
6468
6469 if (ignore)
6470 {
6471 if (! TREE_SIDE_EFFECTS (exp))
6472 return const0_rtx;
6473
6474 /* Ensure we reference a volatile object even if value is ignored, but
6475 don't do this if all we are doing is taking its address. */
6476 if (TREE_THIS_VOLATILE (exp)
6477 && TREE_CODE (exp) != FUNCTION_DECL
6478 && mode != VOIDmode && mode != BLKmode
6479 && modifier != EXPAND_CONST_ADDRESS)
6480 {
6481 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
6482 if (MEM_P (temp))
6483 temp = copy_to_reg (temp);
6484 return const0_rtx;
6485 }
6486
6487 if (TREE_CODE_CLASS (code) == tcc_unary
6488 || code == COMPONENT_REF || code == INDIRECT_REF)
6489 return expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
6490 modifier);
6491
6492 else if (TREE_CODE_CLASS (code) == tcc_binary
6493 || TREE_CODE_CLASS (code) == tcc_comparison
6494 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
6495 {
6496 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode, modifier);
6497 expand_expr (TREE_OPERAND (exp, 1), const0_rtx, VOIDmode, modifier);
6498 return const0_rtx;
6499 }
6500 else if (code == BIT_FIELD_REF)
6501 {
6502 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode, modifier);
6503 expand_expr (TREE_OPERAND (exp, 1), const0_rtx, VOIDmode, modifier);
6504 expand_expr (TREE_OPERAND (exp, 2), const0_rtx, VOIDmode, modifier);
6505 return const0_rtx;
6506 }
6507
6508 target = 0;
6509 }
6510
6511 /* If will do cse, generate all results into pseudo registers
6512 since 1) that allows cse to find more things
6513 and 2) otherwise cse could produce an insn the machine
6514 cannot support. An exception is a CONSTRUCTOR into a multi-word
6515 MEM: that's much more likely to be most efficient into the MEM.
6516 Another is a CALL_EXPR which must return in memory. */
6517
6518 if (! cse_not_expected && mode != BLKmode && target
6519 && (!REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER)
6520 && ! (code == CONSTRUCTOR && GET_MODE_SIZE (mode) > UNITS_PER_WORD)
6521 && ! (code == CALL_EXPR && aggregate_value_p (exp, exp)))
6522 target = 0;
6523
6524 switch (code)
6525 {
6526 case LABEL_DECL:
6527 {
6528 tree function = decl_function_context (exp);
6529
6530 temp = label_rtx (exp);
6531 temp = gen_rtx_LABEL_REF (Pmode, temp);
6532
6533 if (function != current_function_decl
6534 && function != 0)
6535 LABEL_REF_NONLOCAL_P (temp) = 1;
6536
6537 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
6538 return temp;
6539 }
6540
6541 case SSA_NAME:
6542 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
6543 NULL);
6544
6545 case PARM_DECL:
6546 case VAR_DECL:
6547 /* If a static var's type was incomplete when the decl was written,
6548 but the type is complete now, lay out the decl now. */
6549 if (DECL_SIZE (exp) == 0
6550 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
6551 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
6552 layout_decl (exp, 0);
6553
6554 /* ... fall through ... */
6555
6556 case FUNCTION_DECL:
6557 case RESULT_DECL:
6558 gcc_assert (DECL_RTL (exp));
6559
6560 /* Ensure variable marked as used even if it doesn't go through
6561 a parser. If it hasn't be used yet, write out an external
6562 definition. */
6563 if (! TREE_USED (exp))
6564 {
6565 assemble_external (exp);
6566 TREE_USED (exp) = 1;
6567 }
6568
6569 /* Show we haven't gotten RTL for this yet. */
6570 temp = 0;
6571
6572 /* Variables inherited from containing functions should have
6573 been lowered by this point. */
6574 context = decl_function_context (exp);
6575 gcc_assert (!context
6576 || context == current_function_decl
6577 || TREE_STATIC (exp)
6578 /* ??? C++ creates functions that are not TREE_STATIC. */
6579 || TREE_CODE (exp) == FUNCTION_DECL);
6580
6581 /* This is the case of an array whose size is to be determined
6582 from its initializer, while the initializer is still being parsed.
6583 See expand_decl. */
6584
6585 if (MEM_P (DECL_RTL (exp))
6586 && REG_P (XEXP (DECL_RTL (exp), 0)))
6587 temp = validize_mem (DECL_RTL (exp));
6588
6589 /* If DECL_RTL is memory, we are in the normal case and either
6590 the address is not valid or it is not a register and -fforce-addr
6591 is specified, get the address into a register. */
6592
6593 else if (MEM_P (DECL_RTL (exp))
6594 && modifier != EXPAND_CONST_ADDRESS
6595 && modifier != EXPAND_SUM
6596 && modifier != EXPAND_INITIALIZER
6597 && (! memory_address_p (DECL_MODE (exp),
6598 XEXP (DECL_RTL (exp), 0))
6599 || (flag_force_addr
6600 && !REG_P (XEXP (DECL_RTL (exp), 0)))))
6601 {
6602 if (alt_rtl)
6603 *alt_rtl = DECL_RTL (exp);
6604 temp = replace_equiv_address (DECL_RTL (exp),
6605 copy_rtx (XEXP (DECL_RTL (exp), 0)));
6606 }
6607
6608 /* If we got something, return it. But first, set the alignment
6609 if the address is a register. */
6610 if (temp != 0)
6611 {
6612 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
6613 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
6614
6615 return temp;
6616 }
6617
6618 /* If the mode of DECL_RTL does not match that of the decl, it
6619 must be a promoted value. We return a SUBREG of the wanted mode,
6620 but mark it so that we know that it was already extended. */
6621
6622 if (REG_P (DECL_RTL (exp))
6623 && GET_MODE (DECL_RTL (exp)) != DECL_MODE (exp))
6624 {
6625 enum machine_mode pmode;
6626
6627 /* Get the signedness used for this variable. Ensure we get the
6628 same mode we got when the variable was declared. */
6629 pmode = promote_mode (type, DECL_MODE (exp), &unsignedp,
6630 (TREE_CODE (exp) == RESULT_DECL ? 1 : 0));
6631 gcc_assert (GET_MODE (DECL_RTL (exp)) == pmode);
6632
6633 temp = gen_lowpart_SUBREG (mode, DECL_RTL (exp));
6634 SUBREG_PROMOTED_VAR_P (temp) = 1;
6635 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
6636 return temp;
6637 }
6638
6639 return DECL_RTL (exp);
6640
6641 case INTEGER_CST:
6642 temp = immed_double_const (TREE_INT_CST_LOW (exp),
6643 TREE_INT_CST_HIGH (exp), mode);
6644
6645 /* ??? If overflow is set, fold will have done an incomplete job,
6646 which can result in (plus xx (const_int 0)), which can get
6647 simplified by validate_replace_rtx during virtual register
6648 instantiation, which can result in unrecognizable insns.
6649 Avoid this by forcing all overflows into registers. */
6650 if (TREE_CONSTANT_OVERFLOW (exp)
6651 && modifier != EXPAND_INITIALIZER)
6652 temp = force_reg (mode, temp);
6653
6654 return temp;
6655
6656 case VECTOR_CST:
6657 if (GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp))) == MODE_VECTOR_INT
6658 || GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp))) == MODE_VECTOR_FLOAT)
6659 return const_vector_from_tree (exp);
6660 else
6661 return expand_expr (build1 (CONSTRUCTOR, TREE_TYPE (exp),
6662 TREE_VECTOR_CST_ELTS (exp)),
6663 ignore ? const0_rtx : target, tmode, modifier);
6664
6665 case CONST_DECL:
6666 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
6667
6668 case REAL_CST:
6669 /* If optimized, generate immediate CONST_DOUBLE
6670 which will be turned into memory by reload if necessary.
6671
6672 We used to force a register so that loop.c could see it. But
6673 this does not allow gen_* patterns to perform optimizations with
6674 the constants. It also produces two insns in cases like "x = 1.0;".
6675 On most machines, floating-point constants are not permitted in
6676 many insns, so we'd end up copying it to a register in any case.
6677
6678 Now, we do the copying in expand_binop, if appropriate. */
6679 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
6680 TYPE_MODE (TREE_TYPE (exp)));
6681
6682 case COMPLEX_CST:
6683 /* Handle evaluating a complex constant in a CONCAT target. */
6684 if (original_target && GET_CODE (original_target) == CONCAT)
6685 {
6686 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
6687 rtx rtarg, itarg;
6688
6689 rtarg = XEXP (original_target, 0);
6690 itarg = XEXP (original_target, 1);
6691
6692 /* Move the real and imaginary parts separately. */
6693 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, 0);
6694 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, 0);
6695
6696 if (op0 != rtarg)
6697 emit_move_insn (rtarg, op0);
6698 if (op1 != itarg)
6699 emit_move_insn (itarg, op1);
6700
6701 return original_target;
6702 }
6703
6704 /* ... fall through ... */
6705
6706 case STRING_CST:
6707 temp = output_constant_def (exp, 1);
6708
6709 /* temp contains a constant address.
6710 On RISC machines where a constant address isn't valid,
6711 make some insns to get that address into a register. */
6712 if (modifier != EXPAND_CONST_ADDRESS
6713 && modifier != EXPAND_INITIALIZER
6714 && modifier != EXPAND_SUM
6715 && (! memory_address_p (mode, XEXP (temp, 0))
6716 || flag_force_addr))
6717 return replace_equiv_address (temp,
6718 copy_rtx (XEXP (temp, 0)));
6719 return temp;
6720
6721 case SAVE_EXPR:
6722 {
6723 tree val = TREE_OPERAND (exp, 0);
6724 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
6725
6726 if (!SAVE_EXPR_RESOLVED_P (exp))
6727 {
6728 /* We can indeed still hit this case, typically via builtin
6729 expanders calling save_expr immediately before expanding
6730 something. Assume this means that we only have to deal
6731 with non-BLKmode values. */
6732 gcc_assert (GET_MODE (ret) != BLKmode);
6733
6734 val = build_decl (VAR_DECL, NULL, TREE_TYPE (exp));
6735 DECL_ARTIFICIAL (val) = 1;
6736 DECL_IGNORED_P (val) = 1;
6737 TREE_OPERAND (exp, 0) = val;
6738 SAVE_EXPR_RESOLVED_P (exp) = 1;
6739
6740 if (!CONSTANT_P (ret))
6741 ret = copy_to_reg (ret);
6742 SET_DECL_RTL (val, ret);
6743 }
6744
6745 return ret;
6746 }
6747
6748 case GOTO_EXPR:
6749 if (TREE_CODE (TREE_OPERAND (exp, 0)) == LABEL_DECL)
6750 expand_goto (TREE_OPERAND (exp, 0));
6751 else
6752 expand_computed_goto (TREE_OPERAND (exp, 0));
6753 return const0_rtx;
6754
6755 case CONSTRUCTOR:
6756 /* If we don't need the result, just ensure we evaluate any
6757 subexpressions. */
6758 if (ignore)
6759 {
6760 tree elt;
6761
6762 for (elt = CONSTRUCTOR_ELTS (exp); elt; elt = TREE_CHAIN (elt))
6763 expand_expr (TREE_VALUE (elt), const0_rtx, VOIDmode, 0);
6764
6765 return const0_rtx;
6766 }
6767
6768 /* All elts simple constants => refer to a constant in memory. But
6769 if this is a non-BLKmode mode, let it store a field at a time
6770 since that should make a CONST_INT or CONST_DOUBLE when we
6771 fold. Likewise, if we have a target we can use, it is best to
6772 store directly into the target unless the type is large enough
6773 that memcpy will be used. If we are making an initializer and
6774 all operands are constant, put it in memory as well.
6775
6776 FIXME: Avoid trying to fill vector constructors piece-meal.
6777 Output them with output_constant_def below unless we're sure
6778 they're zeros. This should go away when vector initializers
6779 are treated like VECTOR_CST instead of arrays.
6780 */
6781 else if ((TREE_STATIC (exp)
6782 && ((mode == BLKmode
6783 && ! (target != 0 && safe_from_p (target, exp, 1)))
6784 || TREE_ADDRESSABLE (exp)
6785 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
6786 && (! MOVE_BY_PIECES_P
6787 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
6788 TYPE_ALIGN (type)))
6789 && ! mostly_zeros_p (exp))))
6790 || ((modifier == EXPAND_INITIALIZER
6791 || modifier == EXPAND_CONST_ADDRESS)
6792 && TREE_CONSTANT (exp)))
6793 {
6794 rtx constructor = output_constant_def (exp, 1);
6795
6796 if (modifier != EXPAND_CONST_ADDRESS
6797 && modifier != EXPAND_INITIALIZER
6798 && modifier != EXPAND_SUM)
6799 constructor = validize_mem (constructor);
6800
6801 return constructor;
6802 }
6803 else
6804 {
6805 /* Handle calls that pass values in multiple non-contiguous
6806 locations. The Irix 6 ABI has examples of this. */
6807 if (target == 0 || ! safe_from_p (target, exp, 1)
6808 || GET_CODE (target) == PARALLEL
6809 || modifier == EXPAND_STACK_PARM)
6810 target
6811 = assign_temp (build_qualified_type (type,
6812 (TYPE_QUALS (type)
6813 | (TREE_READONLY (exp)
6814 * TYPE_QUAL_CONST))),
6815 0, TREE_ADDRESSABLE (exp), 1);
6816
6817 store_constructor (exp, target, 0, int_expr_size (exp));
6818 return target;
6819 }
6820
6821 case MISALIGNED_INDIRECT_REF:
6822 case ALIGN_INDIRECT_REF:
6823 case INDIRECT_REF:
6824 {
6825 tree exp1 = TREE_OPERAND (exp, 0);
6826 tree orig;
6827
6828 if (modifier != EXPAND_WRITE)
6829 {
6830 tree t;
6831
6832 t = fold_read_from_constant_string (exp);
6833 if (t)
6834 return expand_expr (t, target, tmode, modifier);
6835 }
6836
6837 op0 = expand_expr (exp1, NULL_RTX, VOIDmode, EXPAND_SUM);
6838 op0 = memory_address (mode, op0);
6839
6840 if (code == ALIGN_INDIRECT_REF)
6841 {
6842 int align = TYPE_ALIGN_UNIT (type);
6843 op0 = gen_rtx_AND (Pmode, op0, GEN_INT (-align));
6844 op0 = memory_address (mode, op0);
6845 }
6846
6847 temp = gen_rtx_MEM (mode, op0);
6848
6849 orig = REF_ORIGINAL (exp);
6850 if (!orig)
6851 orig = exp;
6852 set_mem_attributes (temp, orig, 0);
6853
6854 /* Resolve the misalignment now, so that we don't have to remember
6855 to resolve it later. Of course, this only works for reads. */
6856 /* ??? When we get around to supporting writes, we'll have to handle
6857 this in store_expr directly. The vectorizer isn't generating
6858 those yet, however. */
6859 if (code == MISALIGNED_INDIRECT_REF)
6860 {
6861 int icode;
6862 rtx reg, insn;
6863
6864 gcc_assert (modifier == EXPAND_NORMAL);
6865
6866 /* The vectorizer should have already checked the mode. */
6867 icode = movmisalign_optab->handlers[mode].insn_code;
6868 gcc_assert (icode != CODE_FOR_nothing);
6869
6870 /* We've already validated the memory, and we're creating a
6871 new pseudo destination. The predicates really can't fail. */
6872 reg = gen_reg_rtx (mode);
6873
6874 /* Nor can the insn generator. */
6875 insn = GEN_FCN (icode) (reg, temp);
6876 emit_insn (insn);
6877
6878 return reg;
6879 }
6880
6881 return temp;
6882 }
6883
6884 case ARRAY_REF:
6885
6886 {
6887 tree array = TREE_OPERAND (exp, 0);
6888 tree index = TREE_OPERAND (exp, 1);
6889
6890 /* Fold an expression like: "foo"[2].
6891 This is not done in fold so it won't happen inside &.
6892 Don't fold if this is for wide characters since it's too
6893 difficult to do correctly and this is a very rare case. */
6894
6895 if (modifier != EXPAND_CONST_ADDRESS
6896 && modifier != EXPAND_INITIALIZER
6897 && modifier != EXPAND_MEMORY)
6898 {
6899 tree t = fold_read_from_constant_string (exp);
6900
6901 if (t)
6902 return expand_expr (t, target, tmode, modifier);
6903 }
6904
6905 /* If this is a constant index into a constant array,
6906 just get the value from the array. Handle both the cases when
6907 we have an explicit constructor and when our operand is a variable
6908 that was declared const. */
6909
6910 if (modifier != EXPAND_CONST_ADDRESS
6911 && modifier != EXPAND_INITIALIZER
6912 && modifier != EXPAND_MEMORY
6913 && TREE_CODE (array) == CONSTRUCTOR
6914 && ! TREE_SIDE_EFFECTS (array)
6915 && TREE_CODE (index) == INTEGER_CST)
6916 {
6917 tree elem;
6918
6919 for (elem = CONSTRUCTOR_ELTS (array);
6920 (elem && !tree_int_cst_equal (TREE_PURPOSE (elem), index));
6921 elem = TREE_CHAIN (elem))
6922 ;
6923
6924 if (elem && !TREE_SIDE_EFFECTS (TREE_VALUE (elem)))
6925 return expand_expr (fold (TREE_VALUE (elem)), target, tmode,
6926 modifier);
6927 }
6928
6929 else if (optimize >= 1
6930 && modifier != EXPAND_CONST_ADDRESS
6931 && modifier != EXPAND_INITIALIZER
6932 && modifier != EXPAND_MEMORY
6933 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
6934 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
6935 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
6936 && targetm.binds_local_p (array))
6937 {
6938 if (TREE_CODE (index) == INTEGER_CST)
6939 {
6940 tree init = DECL_INITIAL (array);
6941
6942 if (TREE_CODE (init) == CONSTRUCTOR)
6943 {
6944 tree elem;
6945
6946 for (elem = CONSTRUCTOR_ELTS (init);
6947 (elem
6948 && !tree_int_cst_equal (TREE_PURPOSE (elem), index));
6949 elem = TREE_CHAIN (elem))
6950 ;
6951
6952 if (elem && !TREE_SIDE_EFFECTS (TREE_VALUE (elem)))
6953 return expand_expr (fold (TREE_VALUE (elem)), target,
6954 tmode, modifier);
6955 }
6956 else if (TREE_CODE (init) == STRING_CST
6957 && 0 > compare_tree_int (index,
6958 TREE_STRING_LENGTH (init)))
6959 {
6960 tree type = TREE_TYPE (TREE_TYPE (init));
6961 enum machine_mode mode = TYPE_MODE (type);
6962
6963 if (GET_MODE_CLASS (mode) == MODE_INT
6964 && GET_MODE_SIZE (mode) == 1)
6965 return gen_int_mode (TREE_STRING_POINTER (init)
6966 [TREE_INT_CST_LOW (index)], mode);
6967 }
6968 }
6969 }
6970 }
6971 goto normal_inner_ref;
6972
6973 case COMPONENT_REF:
6974 /* If the operand is a CONSTRUCTOR, we can just extract the
6975 appropriate field if it is present. */
6976 if (TREE_CODE (TREE_OPERAND (exp, 0)) == CONSTRUCTOR)
6977 {
6978 tree elt;
6979
6980 for (elt = CONSTRUCTOR_ELTS (TREE_OPERAND (exp, 0)); elt;
6981 elt = TREE_CHAIN (elt))
6982 if (TREE_PURPOSE (elt) == TREE_OPERAND (exp, 1)
6983 /* We can normally use the value of the field in the
6984 CONSTRUCTOR. However, if this is a bitfield in
6985 an integral mode that we can fit in a HOST_WIDE_INT,
6986 we must mask only the number of bits in the bitfield,
6987 since this is done implicitly by the constructor. If
6988 the bitfield does not meet either of those conditions,
6989 we can't do this optimization. */
6990 && (! DECL_BIT_FIELD (TREE_PURPOSE (elt))
6991 || ((GET_MODE_CLASS (DECL_MODE (TREE_PURPOSE (elt)))
6992 == MODE_INT)
6993 && (GET_MODE_BITSIZE (DECL_MODE (TREE_PURPOSE (elt)))
6994 <= HOST_BITS_PER_WIDE_INT))))
6995 {
6996 if (DECL_BIT_FIELD (TREE_PURPOSE (elt))
6997 && modifier == EXPAND_STACK_PARM)
6998 target = 0;
6999 op0 = expand_expr (TREE_VALUE (elt), target, tmode, modifier);
7000 if (DECL_BIT_FIELD (TREE_PURPOSE (elt)))
7001 {
7002 HOST_WIDE_INT bitsize
7003 = TREE_INT_CST_LOW (DECL_SIZE (TREE_PURPOSE (elt)));
7004 enum machine_mode imode
7005 = TYPE_MODE (TREE_TYPE (TREE_PURPOSE (elt)));
7006
7007 if (TYPE_UNSIGNED (TREE_TYPE (TREE_PURPOSE (elt))))
7008 {
7009 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
7010 op0 = expand_and (imode, op0, op1, target);
7011 }
7012 else
7013 {
7014 tree count
7015 = build_int_cst (NULL_TREE,
7016 GET_MODE_BITSIZE (imode) - bitsize);
7017
7018 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
7019 target, 0);
7020 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
7021 target, 0);
7022 }
7023 }
7024
7025 return op0;
7026 }
7027 }
7028 goto normal_inner_ref;
7029
7030 case BIT_FIELD_REF:
7031 case ARRAY_RANGE_REF:
7032 normal_inner_ref:
7033 {
7034 enum machine_mode mode1;
7035 HOST_WIDE_INT bitsize, bitpos;
7036 tree offset;
7037 int volatilep = 0;
7038 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7039 &mode1, &unsignedp, &volatilep, true);
7040 rtx orig_op0;
7041
7042 /* If we got back the original object, something is wrong. Perhaps
7043 we are evaluating an expression too early. In any event, don't
7044 infinitely recurse. */
7045 gcc_assert (tem != exp);
7046
7047 /* If TEM's type is a union of variable size, pass TARGET to the inner
7048 computation, since it will need a temporary and TARGET is known
7049 to have to do. This occurs in unchecked conversion in Ada. */
7050
7051 orig_op0 = op0
7052 = expand_expr (tem,
7053 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
7054 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
7055 != INTEGER_CST)
7056 && modifier != EXPAND_STACK_PARM
7057 ? target : NULL_RTX),
7058 VOIDmode,
7059 (modifier == EXPAND_INITIALIZER
7060 || modifier == EXPAND_CONST_ADDRESS
7061 || modifier == EXPAND_STACK_PARM)
7062 ? modifier : EXPAND_NORMAL);
7063
7064 /* If this is a constant, put it into a register if it is a
7065 legitimate constant and OFFSET is 0 and memory if it isn't. */
7066 if (CONSTANT_P (op0))
7067 {
7068 enum machine_mode mode = TYPE_MODE (TREE_TYPE (tem));
7069 if (mode != BLKmode && LEGITIMATE_CONSTANT_P (op0)
7070 && offset == 0)
7071 op0 = force_reg (mode, op0);
7072 else
7073 op0 = validize_mem (force_const_mem (mode, op0));
7074 }
7075
7076 /* Otherwise, if this object not in memory and we either have an
7077 offset or a BLKmode result, put it there. This case can't occur in
7078 C, but can in Ada if we have unchecked conversion of an expression
7079 from a scalar type to an array or record type or for an
7080 ARRAY_RANGE_REF whose type is BLKmode. */
7081 else if (!MEM_P (op0)
7082 && (offset != 0
7083 || (code == ARRAY_RANGE_REF && mode == BLKmode)))
7084 {
7085 tree nt = build_qualified_type (TREE_TYPE (tem),
7086 (TYPE_QUALS (TREE_TYPE (tem))
7087 | TYPE_QUAL_CONST));
7088 rtx memloc = assign_temp (nt, 1, 1, 1);
7089
7090 emit_move_insn (memloc, op0);
7091 op0 = memloc;
7092 }
7093
7094 if (offset != 0)
7095 {
7096 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
7097 EXPAND_SUM);
7098
7099 gcc_assert (MEM_P (op0));
7100
7101 #ifdef POINTERS_EXTEND_UNSIGNED
7102 if (GET_MODE (offset_rtx) != Pmode)
7103 offset_rtx = convert_to_mode (Pmode, offset_rtx, 0);
7104 #else
7105 if (GET_MODE (offset_rtx) != ptr_mode)
7106 offset_rtx = convert_to_mode (ptr_mode, offset_rtx, 0);
7107 #endif
7108
7109 if (GET_MODE (op0) == BLKmode
7110 /* A constant address in OP0 can have VOIDmode, we must
7111 not try to call force_reg in that case. */
7112 && GET_MODE (XEXP (op0, 0)) != VOIDmode
7113 && bitsize != 0
7114 && (bitpos % bitsize) == 0
7115 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
7116 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
7117 {
7118 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
7119 bitpos = 0;
7120 }
7121
7122 op0 = offset_address (op0, offset_rtx,
7123 highest_pow2_factor (offset));
7124 }
7125
7126 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
7127 record its alignment as BIGGEST_ALIGNMENT. */
7128 if (MEM_P (op0) && bitpos == 0 && offset != 0
7129 && is_aligning_offset (offset, tem))
7130 set_mem_align (op0, BIGGEST_ALIGNMENT);
7131
7132 /* Don't forget about volatility even if this is a bitfield. */
7133 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
7134 {
7135 if (op0 == orig_op0)
7136 op0 = copy_rtx (op0);
7137
7138 MEM_VOLATILE_P (op0) = 1;
7139 }
7140
7141 /* The following code doesn't handle CONCAT.
7142 Assume only bitpos == 0 can be used for CONCAT, due to
7143 one element arrays having the same mode as its element. */
7144 if (GET_CODE (op0) == CONCAT)
7145 {
7146 gcc_assert (bitpos == 0
7147 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)));
7148 return op0;
7149 }
7150
7151 /* In cases where an aligned union has an unaligned object
7152 as a field, we might be extracting a BLKmode value from
7153 an integer-mode (e.g., SImode) object. Handle this case
7154 by doing the extract into an object as wide as the field
7155 (which we know to be the width of a basic mode), then
7156 storing into memory, and changing the mode to BLKmode. */
7157 if (mode1 == VOIDmode
7158 || REG_P (op0) || GET_CODE (op0) == SUBREG
7159 || (mode1 != BLKmode && ! direct_load[(int) mode1]
7160 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
7161 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
7162 && modifier != EXPAND_CONST_ADDRESS
7163 && modifier != EXPAND_INITIALIZER)
7164 /* If the field isn't aligned enough to fetch as a memref,
7165 fetch it as a bit field. */
7166 || (mode1 != BLKmode
7167 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
7168 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
7169 || (MEM_P (op0)
7170 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
7171 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
7172 && ((modifier == EXPAND_CONST_ADDRESS
7173 || modifier == EXPAND_INITIALIZER)
7174 ? STRICT_ALIGNMENT
7175 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
7176 || (bitpos % BITS_PER_UNIT != 0)))
7177 /* If the type and the field are a constant size and the
7178 size of the type isn't the same size as the bitfield,
7179 we must use bitfield operations. */
7180 || (bitsize >= 0
7181 && TYPE_SIZE (TREE_TYPE (exp))
7182 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
7183 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
7184 bitsize)))
7185 {
7186 enum machine_mode ext_mode = mode;
7187
7188 if (ext_mode == BLKmode
7189 && ! (target != 0 && MEM_P (op0)
7190 && MEM_P (target)
7191 && bitpos % BITS_PER_UNIT == 0))
7192 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
7193
7194 if (ext_mode == BLKmode)
7195 {
7196 if (target == 0)
7197 target = assign_temp (type, 0, 1, 1);
7198
7199 if (bitsize == 0)
7200 return target;
7201
7202 /* In this case, BITPOS must start at a byte boundary and
7203 TARGET, if specified, must be a MEM. */
7204 gcc_assert (MEM_P (op0)
7205 && (!target || MEM_P (target))
7206 && !(bitpos % BITS_PER_UNIT));
7207
7208 emit_block_move (target,
7209 adjust_address (op0, VOIDmode,
7210 bitpos / BITS_PER_UNIT),
7211 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
7212 / BITS_PER_UNIT),
7213 (modifier == EXPAND_STACK_PARM
7214 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
7215
7216 return target;
7217 }
7218
7219 op0 = validize_mem (op0);
7220
7221 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
7222 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
7223
7224 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
7225 (modifier == EXPAND_STACK_PARM
7226 ? NULL_RTX : target),
7227 ext_mode, ext_mode);
7228
7229 /* If the result is a record type and BITSIZE is narrower than
7230 the mode of OP0, an integral mode, and this is a big endian
7231 machine, we must put the field into the high-order bits. */
7232 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
7233 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
7234 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
7235 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
7236 size_int (GET_MODE_BITSIZE (GET_MODE (op0))
7237 - bitsize),
7238 op0, 1);
7239
7240 /* If the result type is BLKmode, store the data into a temporary
7241 of the appropriate type, but with the mode corresponding to the
7242 mode for the data we have (op0's mode). It's tempting to make
7243 this a constant type, since we know it's only being stored once,
7244 but that can cause problems if we are taking the address of this
7245 COMPONENT_REF because the MEM of any reference via that address
7246 will have flags corresponding to the type, which will not
7247 necessarily be constant. */
7248 if (mode == BLKmode)
7249 {
7250 rtx new
7251 = assign_stack_temp_for_type
7252 (ext_mode, GET_MODE_BITSIZE (ext_mode), 0, type);
7253
7254 emit_move_insn (new, op0);
7255 op0 = copy_rtx (new);
7256 PUT_MODE (op0, BLKmode);
7257 set_mem_attributes (op0, exp, 1);
7258 }
7259
7260 return op0;
7261 }
7262
7263 /* If the result is BLKmode, use that to access the object
7264 now as well. */
7265 if (mode == BLKmode)
7266 mode1 = BLKmode;
7267
7268 /* Get a reference to just this component. */
7269 if (modifier == EXPAND_CONST_ADDRESS
7270 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7271 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
7272 else
7273 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
7274
7275 if (op0 == orig_op0)
7276 op0 = copy_rtx (op0);
7277
7278 set_mem_attributes (op0, exp, 0);
7279 if (REG_P (XEXP (op0, 0)))
7280 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
7281
7282 MEM_VOLATILE_P (op0) |= volatilep;
7283 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
7284 || modifier == EXPAND_CONST_ADDRESS
7285 || modifier == EXPAND_INITIALIZER)
7286 return op0;
7287 else if (target == 0)
7288 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
7289
7290 convert_move (target, op0, unsignedp);
7291 return target;
7292 }
7293
7294 case OBJ_TYPE_REF:
7295 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
7296
7297 case CALL_EXPR:
7298 /* Check for a built-in function. */
7299 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
7300 && (TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
7301 == FUNCTION_DECL)
7302 && DECL_BUILT_IN (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)))
7303 {
7304 if (DECL_BUILT_IN_CLASS (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
7305 == BUILT_IN_FRONTEND)
7306 return lang_hooks.expand_expr (exp, original_target,
7307 tmode, modifier,
7308 alt_rtl);
7309 else
7310 return expand_builtin (exp, target, subtarget, tmode, ignore);
7311 }
7312
7313 return expand_call (exp, target, ignore);
7314
7315 case NON_LVALUE_EXPR:
7316 case NOP_EXPR:
7317 case CONVERT_EXPR:
7318 if (TREE_OPERAND (exp, 0) == error_mark_node)
7319 return const0_rtx;
7320
7321 if (TREE_CODE (type) == UNION_TYPE)
7322 {
7323 tree valtype = TREE_TYPE (TREE_OPERAND (exp, 0));
7324
7325 /* If both input and output are BLKmode, this conversion isn't doing
7326 anything except possibly changing memory attribute. */
7327 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7328 {
7329 rtx result = expand_expr (TREE_OPERAND (exp, 0), target, tmode,
7330 modifier);
7331
7332 result = copy_rtx (result);
7333 set_mem_attributes (result, exp, 0);
7334 return result;
7335 }
7336
7337 if (target == 0)
7338 {
7339 if (TYPE_MODE (type) != BLKmode)
7340 target = gen_reg_rtx (TYPE_MODE (type));
7341 else
7342 target = assign_temp (type, 0, 1, 1);
7343 }
7344
7345 if (MEM_P (target))
7346 /* Store data into beginning of memory target. */
7347 store_expr (TREE_OPERAND (exp, 0),
7348 adjust_address (target, TYPE_MODE (valtype), 0),
7349 modifier == EXPAND_STACK_PARM);
7350
7351 else
7352 {
7353 gcc_assert (REG_P (target));
7354
7355 /* Store this field into a union of the proper type. */
7356 store_field (target,
7357 MIN ((int_size_in_bytes (TREE_TYPE
7358 (TREE_OPERAND (exp, 0)))
7359 * BITS_PER_UNIT),
7360 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7361 0, TYPE_MODE (valtype), TREE_OPERAND (exp, 0),
7362 type, 0);
7363 }
7364
7365 /* Return the entire union. */
7366 return target;
7367 }
7368
7369 if (mode == TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))))
7370 {
7371 op0 = expand_expr (TREE_OPERAND (exp, 0), target, VOIDmode,
7372 modifier);
7373
7374 /* If the signedness of the conversion differs and OP0 is
7375 a promoted SUBREG, clear that indication since we now
7376 have to do the proper extension. */
7377 if (TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))) != unsignedp
7378 && GET_CODE (op0) == SUBREG)
7379 SUBREG_PROMOTED_VAR_P (op0) = 0;
7380
7381 return REDUCE_BIT_FIELD (op0);
7382 }
7383
7384 op0 = expand_expr (TREE_OPERAND (exp, 0), NULL_RTX, mode, modifier);
7385 if (GET_MODE (op0) == mode)
7386 ;
7387
7388 /* If OP0 is a constant, just convert it into the proper mode. */
7389 else if (CONSTANT_P (op0))
7390 {
7391 tree inner_type = TREE_TYPE (TREE_OPERAND (exp, 0));
7392 enum machine_mode inner_mode = TYPE_MODE (inner_type);
7393
7394 if (modifier == EXPAND_INITIALIZER)
7395 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7396 subreg_lowpart_offset (mode,
7397 inner_mode));
7398 else
7399 op0= convert_modes (mode, inner_mode, op0,
7400 TYPE_UNSIGNED (inner_type));
7401 }
7402
7403 else if (modifier == EXPAND_INITIALIZER)
7404 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7405
7406 else if (target == 0)
7407 op0 = convert_to_mode (mode, op0,
7408 TYPE_UNSIGNED (TREE_TYPE
7409 (TREE_OPERAND (exp, 0))));
7410 else
7411 {
7412 convert_move (target, op0,
7413 TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))));
7414 op0 = target;
7415 }
7416
7417 return REDUCE_BIT_FIELD (op0);
7418
7419 case VIEW_CONVERT_EXPR:
7420 op0 = expand_expr (TREE_OPERAND (exp, 0), NULL_RTX, mode, modifier);
7421
7422 /* If the input and output modes are both the same, we are done.
7423 Otherwise, if neither mode is BLKmode and both are integral and within
7424 a word, we can use gen_lowpart. If neither is true, make sure the
7425 operand is in memory and convert the MEM to the new mode. */
7426 if (TYPE_MODE (type) == GET_MODE (op0))
7427 ;
7428 else if (TYPE_MODE (type) != BLKmode && GET_MODE (op0) != BLKmode
7429 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
7430 && GET_MODE_CLASS (TYPE_MODE (type)) == MODE_INT
7431 && GET_MODE_SIZE (TYPE_MODE (type)) <= UNITS_PER_WORD
7432 && GET_MODE_SIZE (GET_MODE (op0)) <= UNITS_PER_WORD)
7433 op0 = gen_lowpart (TYPE_MODE (type), op0);
7434 else if (!MEM_P (op0))
7435 {
7436 /* If the operand is not a MEM, force it into memory. Since we
7437 are going to be be changing the mode of the MEM, don't call
7438 force_const_mem for constants because we don't allow pool
7439 constants to change mode. */
7440 tree inner_type = TREE_TYPE (TREE_OPERAND (exp, 0));
7441
7442 gcc_assert (!TREE_ADDRESSABLE (exp));
7443
7444 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
7445 target
7446 = assign_stack_temp_for_type
7447 (TYPE_MODE (inner_type),
7448 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
7449
7450 emit_move_insn (target, op0);
7451 op0 = target;
7452 }
7453
7454 /* At this point, OP0 is in the correct mode. If the output type is such
7455 that the operand is known to be aligned, indicate that it is.
7456 Otherwise, we need only be concerned about alignment for non-BLKmode
7457 results. */
7458 if (MEM_P (op0))
7459 {
7460 op0 = copy_rtx (op0);
7461
7462 if (TYPE_ALIGN_OK (type))
7463 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
7464 else if (TYPE_MODE (type) != BLKmode && STRICT_ALIGNMENT
7465 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (TYPE_MODE (type)))
7466 {
7467 tree inner_type = TREE_TYPE (TREE_OPERAND (exp, 0));
7468 HOST_WIDE_INT temp_size
7469 = MAX (int_size_in_bytes (inner_type),
7470 (HOST_WIDE_INT) GET_MODE_SIZE (TYPE_MODE (type)));
7471 rtx new = assign_stack_temp_for_type (TYPE_MODE (type),
7472 temp_size, 0, type);
7473 rtx new_with_op0_mode = adjust_address (new, GET_MODE (op0), 0);
7474
7475 gcc_assert (!TREE_ADDRESSABLE (exp));
7476
7477 if (GET_MODE (op0) == BLKmode)
7478 emit_block_move (new_with_op0_mode, op0,
7479 GEN_INT (GET_MODE_SIZE (TYPE_MODE (type))),
7480 (modifier == EXPAND_STACK_PARM
7481 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
7482 else
7483 emit_move_insn (new_with_op0_mode, op0);
7484
7485 op0 = new;
7486 }
7487
7488 op0 = adjust_address (op0, TYPE_MODE (type), 0);
7489 }
7490
7491 return op0;
7492
7493 case PLUS_EXPR:
7494 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7495 something else, make sure we add the register to the constant and
7496 then to the other thing. This case can occur during strength
7497 reduction and doing it this way will produce better code if the
7498 frame pointer or argument pointer is eliminated.
7499
7500 fold-const.c will ensure that the constant is always in the inner
7501 PLUS_EXPR, so the only case we need to do anything about is if
7502 sp, ap, or fp is our second argument, in which case we must swap
7503 the innermost first argument and our second argument. */
7504
7505 if (TREE_CODE (TREE_OPERAND (exp, 0)) == PLUS_EXPR
7506 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 1)) == INTEGER_CST
7507 && TREE_CODE (TREE_OPERAND (exp, 1)) == VAR_DECL
7508 && (DECL_RTL (TREE_OPERAND (exp, 1)) == frame_pointer_rtx
7509 || DECL_RTL (TREE_OPERAND (exp, 1)) == stack_pointer_rtx
7510 || DECL_RTL (TREE_OPERAND (exp, 1)) == arg_pointer_rtx))
7511 {
7512 tree t = TREE_OPERAND (exp, 1);
7513
7514 TREE_OPERAND (exp, 1) = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
7515 TREE_OPERAND (TREE_OPERAND (exp, 0), 0) = t;
7516 }
7517
7518 /* If the result is to be ptr_mode and we are adding an integer to
7519 something, we might be forming a constant. So try to use
7520 plus_constant. If it produces a sum and we can't accept it,
7521 use force_operand. This allows P = &ARR[const] to generate
7522 efficient code on machines where a SYMBOL_REF is not a valid
7523 address.
7524
7525 If this is an EXPAND_SUM call, always return the sum. */
7526 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7527 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
7528 {
7529 if (modifier == EXPAND_STACK_PARM)
7530 target = 0;
7531 if (TREE_CODE (TREE_OPERAND (exp, 0)) == INTEGER_CST
7532 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
7533 && TREE_CONSTANT (TREE_OPERAND (exp, 1)))
7534 {
7535 rtx constant_part;
7536
7537 op1 = expand_expr (TREE_OPERAND (exp, 1), subtarget, VOIDmode,
7538 EXPAND_SUM);
7539 /* Use immed_double_const to ensure that the constant is
7540 truncated according to the mode of OP1, then sign extended
7541 to a HOST_WIDE_INT. Using the constant directly can result
7542 in non-canonical RTL in a 64x32 cross compile. */
7543 constant_part
7544 = immed_double_const (TREE_INT_CST_LOW (TREE_OPERAND (exp, 0)),
7545 (HOST_WIDE_INT) 0,
7546 TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 1))));
7547 op1 = plus_constant (op1, INTVAL (constant_part));
7548 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7549 op1 = force_operand (op1, target);
7550 return REDUCE_BIT_FIELD (op1);
7551 }
7552
7553 else if (TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST
7554 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_INT
7555 && TREE_CONSTANT (TREE_OPERAND (exp, 0)))
7556 {
7557 rtx constant_part;
7558
7559 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode,
7560 (modifier == EXPAND_INITIALIZER
7561 ? EXPAND_INITIALIZER : EXPAND_SUM));
7562 if (! CONSTANT_P (op0))
7563 {
7564 op1 = expand_expr (TREE_OPERAND (exp, 1), NULL_RTX,
7565 VOIDmode, modifier);
7566 /* Return a PLUS if modifier says it's OK. */
7567 if (modifier == EXPAND_SUM
7568 || modifier == EXPAND_INITIALIZER)
7569 return simplify_gen_binary (PLUS, mode, op0, op1);
7570 goto binop2;
7571 }
7572 /* Use immed_double_const to ensure that the constant is
7573 truncated according to the mode of OP1, then sign extended
7574 to a HOST_WIDE_INT. Using the constant directly can result
7575 in non-canonical RTL in a 64x32 cross compile. */
7576 constant_part
7577 = immed_double_const (TREE_INT_CST_LOW (TREE_OPERAND (exp, 1)),
7578 (HOST_WIDE_INT) 0,
7579 TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))));
7580 op0 = plus_constant (op0, INTVAL (constant_part));
7581 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7582 op0 = force_operand (op0, target);
7583 return REDUCE_BIT_FIELD (op0);
7584 }
7585 }
7586
7587 /* No sense saving up arithmetic to be done
7588 if it's all in the wrong mode to form part of an address.
7589 And force_operand won't know whether to sign-extend or
7590 zero-extend. */
7591 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7592 || mode != ptr_mode)
7593 {
7594 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7595 subtarget, &op0, &op1, 0);
7596 if (op0 == const0_rtx)
7597 return op1;
7598 if (op1 == const0_rtx)
7599 return op0;
7600 goto binop2;
7601 }
7602
7603 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7604 subtarget, &op0, &op1, modifier);
7605 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7606
7607 case MINUS_EXPR:
7608 /* For initializers, we are allowed to return a MINUS of two
7609 symbolic constants. Here we handle all cases when both operands
7610 are constant. */
7611 /* Handle difference of two symbolic constants,
7612 for the sake of an initializer. */
7613 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7614 && really_constant_p (TREE_OPERAND (exp, 0))
7615 && really_constant_p (TREE_OPERAND (exp, 1)))
7616 {
7617 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7618 NULL_RTX, &op0, &op1, modifier);
7619
7620 /* If the last operand is a CONST_INT, use plus_constant of
7621 the negated constant. Else make the MINUS. */
7622 if (GET_CODE (op1) == CONST_INT)
7623 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
7624 else
7625 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
7626 }
7627
7628 /* No sense saving up arithmetic to be done
7629 if it's all in the wrong mode to form part of an address.
7630 And force_operand won't know whether to sign-extend or
7631 zero-extend. */
7632 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7633 || mode != ptr_mode)
7634 goto binop;
7635
7636 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7637 subtarget, &op0, &op1, modifier);
7638
7639 /* Convert A - const to A + (-const). */
7640 if (GET_CODE (op1) == CONST_INT)
7641 {
7642 op1 = negate_rtx (mode, op1);
7643 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7644 }
7645
7646 goto binop2;
7647
7648 case MULT_EXPR:
7649 /* If first operand is constant, swap them.
7650 Thus the following special case checks need only
7651 check the second operand. */
7652 if (TREE_CODE (TREE_OPERAND (exp, 0)) == INTEGER_CST)
7653 {
7654 tree t1 = TREE_OPERAND (exp, 0);
7655 TREE_OPERAND (exp, 0) = TREE_OPERAND (exp, 1);
7656 TREE_OPERAND (exp, 1) = t1;
7657 }
7658
7659 /* Attempt to return something suitable for generating an
7660 indexed address, for machines that support that. */
7661
7662 if (modifier == EXPAND_SUM && mode == ptr_mode
7663 && host_integerp (TREE_OPERAND (exp, 1), 0))
7664 {
7665 tree exp1 = TREE_OPERAND (exp, 1);
7666
7667 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode,
7668 EXPAND_SUM);
7669
7670 if (!REG_P (op0))
7671 op0 = force_operand (op0, NULL_RTX);
7672 if (!REG_P (op0))
7673 op0 = copy_to_mode_reg (mode, op0);
7674
7675 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
7676 gen_int_mode (tree_low_cst (exp1, 0),
7677 TYPE_MODE (TREE_TYPE (exp1)))));
7678 }
7679
7680 if (modifier == EXPAND_STACK_PARM)
7681 target = 0;
7682
7683 /* Check for multiplying things that have been extended
7684 from a narrower type. If this machine supports multiplying
7685 in that narrower type with a result in the desired type,
7686 do it that way, and avoid the explicit type-conversion. */
7687 if (TREE_CODE (TREE_OPERAND (exp, 0)) == NOP_EXPR
7688 && TREE_CODE (type) == INTEGER_TYPE
7689 && (TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)))
7690 < TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (exp, 0))))
7691 && ((TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST
7692 && int_fits_type_p (TREE_OPERAND (exp, 1),
7693 TREE_TYPE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)))
7694 /* Don't use a widening multiply if a shift will do. */
7695 && ((GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 1))))
7696 > HOST_BITS_PER_WIDE_INT)
7697 || exact_log2 (TREE_INT_CST_LOW (TREE_OPERAND (exp, 1))) < 0))
7698 ||
7699 (TREE_CODE (TREE_OPERAND (exp, 1)) == NOP_EXPR
7700 && (TYPE_PRECISION (TREE_TYPE
7701 (TREE_OPERAND (TREE_OPERAND (exp, 1), 0)))
7702 == TYPE_PRECISION (TREE_TYPE
7703 (TREE_OPERAND
7704 (TREE_OPERAND (exp, 0), 0))))
7705 /* If both operands are extended, they must either both
7706 be zero-extended or both be sign-extended. */
7707 && (TYPE_UNSIGNED (TREE_TYPE
7708 (TREE_OPERAND (TREE_OPERAND (exp, 1), 0)))
7709 == TYPE_UNSIGNED (TREE_TYPE
7710 (TREE_OPERAND
7711 (TREE_OPERAND (exp, 0), 0)))))))
7712 {
7713 tree op0type = TREE_TYPE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0));
7714 enum machine_mode innermode = TYPE_MODE (op0type);
7715 bool zextend_p = TYPE_UNSIGNED (op0type);
7716 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
7717 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
7718
7719 if (mode == GET_MODE_WIDER_MODE (innermode))
7720 {
7721 if (this_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
7722 {
7723 if (TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST)
7724 expand_operands (TREE_OPERAND (TREE_OPERAND (exp, 0), 0),
7725 TREE_OPERAND (exp, 1),
7726 NULL_RTX, &op0, &op1, 0);
7727 else
7728 expand_operands (TREE_OPERAND (TREE_OPERAND (exp, 0), 0),
7729 TREE_OPERAND (TREE_OPERAND (exp, 1), 0),
7730 NULL_RTX, &op0, &op1, 0);
7731 goto binop3;
7732 }
7733 else if (other_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing
7734 && innermode == word_mode)
7735 {
7736 rtx htem, hipart;
7737 op0 = expand_expr (TREE_OPERAND (TREE_OPERAND (exp, 0), 0),
7738 NULL_RTX, VOIDmode, 0);
7739 if (TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST)
7740 op1 = convert_modes (innermode, mode,
7741 expand_expr (TREE_OPERAND (exp, 1),
7742 NULL_RTX, VOIDmode, 0),
7743 unsignedp);
7744 else
7745 op1 = expand_expr (TREE_OPERAND (TREE_OPERAND (exp, 1), 0),
7746 NULL_RTX, VOIDmode, 0);
7747 temp = expand_binop (mode, other_optab, op0, op1, target,
7748 unsignedp, OPTAB_LIB_WIDEN);
7749 hipart = gen_highpart (innermode, temp);
7750 htem = expand_mult_highpart_adjust (innermode, hipart,
7751 op0, op1, hipart,
7752 zextend_p);
7753 if (htem != hipart)
7754 emit_move_insn (hipart, htem);
7755 return REDUCE_BIT_FIELD (temp);
7756 }
7757 }
7758 }
7759 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7760 subtarget, &op0, &op1, 0);
7761 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
7762
7763 case TRUNC_DIV_EXPR:
7764 case FLOOR_DIV_EXPR:
7765 case CEIL_DIV_EXPR:
7766 case ROUND_DIV_EXPR:
7767 case EXACT_DIV_EXPR:
7768 if (modifier == EXPAND_STACK_PARM)
7769 target = 0;
7770 /* Possible optimization: compute the dividend with EXPAND_SUM
7771 then if the divisor is constant can optimize the case
7772 where some terms of the dividend have coeffs divisible by it. */
7773 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7774 subtarget, &op0, &op1, 0);
7775 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
7776
7777 case RDIV_EXPR:
7778 /* Emit a/b as a*(1/b). Later we may manage CSE the reciprocal saving
7779 expensive divide. If not, combine will rebuild the original
7780 computation. */
7781 if (flag_unsafe_math_optimizations && optimize && !optimize_size
7782 && TREE_CODE (type) == REAL_TYPE
7783 && !real_onep (TREE_OPERAND (exp, 0)))
7784 return expand_expr (build2 (MULT_EXPR, type, TREE_OPERAND (exp, 0),
7785 build2 (RDIV_EXPR, type,
7786 build_real (type, dconst1),
7787 TREE_OPERAND (exp, 1))),
7788 target, tmode, modifier);
7789
7790 goto binop;
7791
7792 case TRUNC_MOD_EXPR:
7793 case FLOOR_MOD_EXPR:
7794 case CEIL_MOD_EXPR:
7795 case ROUND_MOD_EXPR:
7796 if (modifier == EXPAND_STACK_PARM)
7797 target = 0;
7798 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7799 subtarget, &op0, &op1, 0);
7800 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
7801
7802 case FIX_ROUND_EXPR:
7803 case FIX_FLOOR_EXPR:
7804 case FIX_CEIL_EXPR:
7805 gcc_unreachable (); /* Not used for C. */
7806
7807 case FIX_TRUNC_EXPR:
7808 op0 = expand_expr (TREE_OPERAND (exp, 0), NULL_RTX, VOIDmode, 0);
7809 if (target == 0 || modifier == EXPAND_STACK_PARM)
7810 target = gen_reg_rtx (mode);
7811 expand_fix (target, op0, unsignedp);
7812 return target;
7813
7814 case FLOAT_EXPR:
7815 op0 = expand_expr (TREE_OPERAND (exp, 0), NULL_RTX, VOIDmode, 0);
7816 if (target == 0 || modifier == EXPAND_STACK_PARM)
7817 target = gen_reg_rtx (mode);
7818 /* expand_float can't figure out what to do if FROM has VOIDmode.
7819 So give it the correct mode. With -O, cse will optimize this. */
7820 if (GET_MODE (op0) == VOIDmode)
7821 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))),
7822 op0);
7823 expand_float (target, op0,
7824 TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))));
7825 return target;
7826
7827 case NEGATE_EXPR:
7828 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode, 0);
7829 if (modifier == EXPAND_STACK_PARM)
7830 target = 0;
7831 temp = expand_unop (mode,
7832 optab_for_tree_code (NEGATE_EXPR, type),
7833 op0, target, 0);
7834 gcc_assert (temp);
7835 return REDUCE_BIT_FIELD (temp);
7836
7837 case ABS_EXPR:
7838 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode, 0);
7839 if (modifier == EXPAND_STACK_PARM)
7840 target = 0;
7841
7842 /* ABS_EXPR is not valid for complex arguments. */
7843 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
7844 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
7845
7846 /* Unsigned abs is simply the operand. Testing here means we don't
7847 risk generating incorrect code below. */
7848 if (TYPE_UNSIGNED (type))
7849 return op0;
7850
7851 return expand_abs (mode, op0, target, unsignedp,
7852 safe_from_p (target, TREE_OPERAND (exp, 0), 1));
7853
7854 case MAX_EXPR:
7855 case MIN_EXPR:
7856 target = original_target;
7857 if (target == 0
7858 || modifier == EXPAND_STACK_PARM
7859 || (MEM_P (target) && MEM_VOLATILE_P (target))
7860 || GET_MODE (target) != mode
7861 || (REG_P (target)
7862 && REGNO (target) < FIRST_PSEUDO_REGISTER))
7863 target = gen_reg_rtx (mode);
7864 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7865 target, &op0, &op1, 0);
7866
7867 /* First try to do it with a special MIN or MAX instruction.
7868 If that does not win, use a conditional jump to select the proper
7869 value. */
7870 this_optab = optab_for_tree_code (code, type);
7871 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
7872 OPTAB_WIDEN);
7873 if (temp != 0)
7874 return temp;
7875
7876 /* At this point, a MEM target is no longer useful; we will get better
7877 code without it. */
7878
7879 if (! REG_P (target))
7880 target = gen_reg_rtx (mode);
7881
7882 /* If op1 was placed in target, swap op0 and op1. */
7883 if (target != op0 && target == op1)
7884 {
7885 temp = op0;
7886 op0 = op1;
7887 op1 = temp;
7888 }
7889
7890 /* We generate better code and avoid problems with op1 mentioning
7891 target by forcing op1 into a pseudo if it isn't a constant. */
7892 if (! CONSTANT_P (op1))
7893 op1 = force_reg (mode, op1);
7894
7895 #ifdef HAVE_conditional_move
7896 /* Use a conditional move if possible. */
7897 if (can_conditionally_move_p (mode))
7898 {
7899 enum rtx_code comparison_code;
7900 rtx insn;
7901
7902 if (code == MAX_EXPR)
7903 comparison_code = unsignedp ? GEU : GE;
7904 else
7905 comparison_code = unsignedp ? LEU : LE;
7906
7907 /* ??? Same problem as in expmed.c: emit_conditional_move
7908 forces a stack adjustment via compare_from_rtx, and we
7909 lose the stack adjustment if the sequence we are about
7910 to create is discarded. */
7911 do_pending_stack_adjust ();
7912
7913 start_sequence ();
7914
7915 /* Try to emit the conditional move. */
7916 insn = emit_conditional_move (target, comparison_code,
7917 op0, op1, mode,
7918 op0, op1, mode,
7919 unsignedp);
7920
7921 /* If we could do the conditional move, emit the sequence,
7922 and return. */
7923 if (insn)
7924 {
7925 rtx seq = get_insns ();
7926 end_sequence ();
7927 emit_insn (seq);
7928 return target;
7929 }
7930
7931 /* Otherwise discard the sequence and fall back to code with
7932 branches. */
7933 end_sequence ();
7934 }
7935 #endif
7936 if (target != op0)
7937 emit_move_insn (target, op0);
7938
7939 temp = gen_label_rtx ();
7940
7941 /* If this mode is an integer too wide to compare properly,
7942 compare word by word. Rely on cse to optimize constant cases. */
7943 if (GET_MODE_CLASS (mode) == MODE_INT
7944 && ! can_compare_p (GE, mode, ccp_jump))
7945 {
7946 if (code == MAX_EXPR)
7947 do_jump_by_parts_greater_rtx (mode, unsignedp, target, op1,
7948 NULL_RTX, temp);
7949 else
7950 do_jump_by_parts_greater_rtx (mode, unsignedp, op1, target,
7951 NULL_RTX, temp);
7952 }
7953 else
7954 {
7955 do_compare_rtx_and_jump (target, op1, code == MAX_EXPR ? GE : LE,
7956 unsignedp, mode, NULL_RTX, NULL_RTX, temp);
7957 }
7958 emit_move_insn (target, op1);
7959 emit_label (temp);
7960 return target;
7961
7962 case BIT_NOT_EXPR:
7963 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode, 0);
7964 if (modifier == EXPAND_STACK_PARM)
7965 target = 0;
7966 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
7967 gcc_assert (temp);
7968 return temp;
7969
7970 /* ??? Can optimize bitwise operations with one arg constant.
7971 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
7972 and (a bitwise1 b) bitwise2 b (etc)
7973 but that is probably not worth while. */
7974
7975 /* BIT_AND_EXPR is for bitwise anding. TRUTH_AND_EXPR is for anding two
7976 boolean values when we want in all cases to compute both of them. In
7977 general it is fastest to do TRUTH_AND_EXPR by computing both operands
7978 as actual zero-or-1 values and then bitwise anding. In cases where
7979 there cannot be any side effects, better code would be made by
7980 treating TRUTH_AND_EXPR like TRUTH_ANDIF_EXPR; but the question is
7981 how to recognize those cases. */
7982
7983 case TRUTH_AND_EXPR:
7984 code = BIT_AND_EXPR;
7985 case BIT_AND_EXPR:
7986 goto binop;
7987
7988 case TRUTH_OR_EXPR:
7989 code = BIT_IOR_EXPR;
7990 case BIT_IOR_EXPR:
7991 goto binop;
7992
7993 case TRUTH_XOR_EXPR:
7994 code = BIT_XOR_EXPR;
7995 case BIT_XOR_EXPR:
7996 goto binop;
7997
7998 case LSHIFT_EXPR:
7999 case RSHIFT_EXPR:
8000 case LROTATE_EXPR:
8001 case RROTATE_EXPR:
8002 if (! safe_from_p (subtarget, TREE_OPERAND (exp, 1), 1))
8003 subtarget = 0;
8004 if (modifier == EXPAND_STACK_PARM)
8005 target = 0;
8006 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode, 0);
8007 return expand_shift (code, mode, op0, TREE_OPERAND (exp, 1), target,
8008 unsignedp);
8009
8010 /* Could determine the answer when only additive constants differ. Also,
8011 the addition of one can be handled by changing the condition. */
8012 case LT_EXPR:
8013 case LE_EXPR:
8014 case GT_EXPR:
8015 case GE_EXPR:
8016 case EQ_EXPR:
8017 case NE_EXPR:
8018 case UNORDERED_EXPR:
8019 case ORDERED_EXPR:
8020 case UNLT_EXPR:
8021 case UNLE_EXPR:
8022 case UNGT_EXPR:
8023 case UNGE_EXPR:
8024 case UNEQ_EXPR:
8025 case LTGT_EXPR:
8026 temp = do_store_flag (exp,
8027 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8028 tmode != VOIDmode ? tmode : mode, 0);
8029 if (temp != 0)
8030 return temp;
8031
8032 /* For foo != 0, load foo, and if it is nonzero load 1 instead. */
8033 if (code == NE_EXPR && integer_zerop (TREE_OPERAND (exp, 1))
8034 && original_target
8035 && REG_P (original_target)
8036 && (GET_MODE (original_target)
8037 == TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0)))))
8038 {
8039 temp = expand_expr (TREE_OPERAND (exp, 0), original_target,
8040 VOIDmode, 0);
8041
8042 /* If temp is constant, we can just compute the result. */
8043 if (GET_CODE (temp) == CONST_INT)
8044 {
8045 if (INTVAL (temp) != 0)
8046 emit_move_insn (target, const1_rtx);
8047 else
8048 emit_move_insn (target, const0_rtx);
8049
8050 return target;
8051 }
8052
8053 if (temp != original_target)
8054 {
8055 enum machine_mode mode1 = GET_MODE (temp);
8056 if (mode1 == VOIDmode)
8057 mode1 = tmode != VOIDmode ? tmode : mode;
8058
8059 temp = copy_to_mode_reg (mode1, temp);
8060 }
8061
8062 op1 = gen_label_rtx ();
8063 emit_cmp_and_jump_insns (temp, const0_rtx, EQ, NULL_RTX,
8064 GET_MODE (temp), unsignedp, op1);
8065 emit_move_insn (temp, const1_rtx);
8066 emit_label (op1);
8067 return temp;
8068 }
8069
8070 /* If no set-flag instruction, must generate a conditional store
8071 into a temporary variable. Drop through and handle this
8072 like && and ||. */
8073
8074 if (! ignore
8075 && (target == 0
8076 || modifier == EXPAND_STACK_PARM
8077 || ! safe_from_p (target, exp, 1)
8078 /* Make sure we don't have a hard reg (such as function's return
8079 value) live across basic blocks, if not optimizing. */
8080 || (!optimize && REG_P (target)
8081 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8082 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8083
8084 if (target)
8085 emit_move_insn (target, const0_rtx);
8086
8087 op1 = gen_label_rtx ();
8088 jumpifnot (exp, op1);
8089
8090 if (target)
8091 emit_move_insn (target, const1_rtx);
8092
8093 emit_label (op1);
8094 return ignore ? const0_rtx : target;
8095
8096 case TRUTH_NOT_EXPR:
8097 if (modifier == EXPAND_STACK_PARM)
8098 target = 0;
8099 op0 = expand_expr (TREE_OPERAND (exp, 0), target, VOIDmode, 0);
8100 /* The parser is careful to generate TRUTH_NOT_EXPR
8101 only with operands that are always zero or one. */
8102 temp = expand_binop (mode, xor_optab, op0, const1_rtx,
8103 target, 1, OPTAB_LIB_WIDEN);
8104 gcc_assert (temp);
8105 return temp;
8106
8107 case STATEMENT_LIST:
8108 {
8109 tree_stmt_iterator iter;
8110
8111 gcc_assert (ignore);
8112
8113 for (iter = tsi_start (exp); !tsi_end_p (iter); tsi_next (&iter))
8114 expand_expr (tsi_stmt (iter), const0_rtx, VOIDmode, modifier);
8115 }
8116 return const0_rtx;
8117
8118 case COND_EXPR:
8119 /* A COND_EXPR with its type being VOID_TYPE represents a
8120 conditional jump and is handled in
8121 expand_gimple_cond_expr. */
8122 gcc_assert (!VOID_TYPE_P (TREE_TYPE (exp)));
8123
8124 /* Note that COND_EXPRs whose type is a structure or union
8125 are required to be constructed to contain assignments of
8126 a temporary variable, so that we can evaluate them here
8127 for side effect only. If type is void, we must do likewise. */
8128
8129 gcc_assert (!TREE_ADDRESSABLE (type)
8130 && !ignore
8131 && TREE_TYPE (TREE_OPERAND (exp, 1)) != void_type_node
8132 && TREE_TYPE (TREE_OPERAND (exp, 2)) != void_type_node);
8133
8134 /* If we are not to produce a result, we have no target. Otherwise,
8135 if a target was specified use it; it will not be used as an
8136 intermediate target unless it is safe. If no target, use a
8137 temporary. */
8138
8139 if (modifier != EXPAND_STACK_PARM
8140 && original_target
8141 && safe_from_p (original_target, TREE_OPERAND (exp, 0), 1)
8142 && GET_MODE (original_target) == mode
8143 #ifdef HAVE_conditional_move
8144 && (! can_conditionally_move_p (mode)
8145 || REG_P (original_target))
8146 #endif
8147 && !MEM_P (original_target))
8148 temp = original_target;
8149 else
8150 temp = assign_temp (type, 0, 0, 1);
8151
8152 do_pending_stack_adjust ();
8153 NO_DEFER_POP;
8154 op0 = gen_label_rtx ();
8155 op1 = gen_label_rtx ();
8156 jumpifnot (TREE_OPERAND (exp, 0), op0);
8157 store_expr (TREE_OPERAND (exp, 1), temp,
8158 modifier == EXPAND_STACK_PARM);
8159
8160 emit_jump_insn (gen_jump (op1));
8161 emit_barrier ();
8162 emit_label (op0);
8163 store_expr (TREE_OPERAND (exp, 2), temp,
8164 modifier == EXPAND_STACK_PARM);
8165
8166 emit_label (op1);
8167 OK_DEFER_POP;
8168 return temp;
8169
8170 case VEC_COND_EXPR:
8171 target = expand_vec_cond_expr (exp, target);
8172 return target;
8173
8174 case MODIFY_EXPR:
8175 {
8176 tree lhs = TREE_OPERAND (exp, 0);
8177 tree rhs = TREE_OPERAND (exp, 1);
8178
8179 gcc_assert (ignore);
8180
8181 /* Check for |= or &= of a bitfield of size one into another bitfield
8182 of size 1. In this case, (unless we need the result of the
8183 assignment) we can do this more efficiently with a
8184 test followed by an assignment, if necessary.
8185
8186 ??? At this point, we can't get a BIT_FIELD_REF here. But if
8187 things change so we do, this code should be enhanced to
8188 support it. */
8189 if (TREE_CODE (lhs) == COMPONENT_REF
8190 && (TREE_CODE (rhs) == BIT_IOR_EXPR
8191 || TREE_CODE (rhs) == BIT_AND_EXPR)
8192 && TREE_OPERAND (rhs, 0) == lhs
8193 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
8194 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
8195 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
8196 {
8197 rtx label = gen_label_rtx ();
8198
8199 do_jump (TREE_OPERAND (rhs, 1),
8200 TREE_CODE (rhs) == BIT_IOR_EXPR ? label : 0,
8201 TREE_CODE (rhs) == BIT_AND_EXPR ? label : 0);
8202 expand_assignment (lhs, convert (TREE_TYPE (rhs),
8203 (TREE_CODE (rhs) == BIT_IOR_EXPR
8204 ? integer_one_node
8205 : integer_zero_node)));
8206 do_pending_stack_adjust ();
8207 emit_label (label);
8208 return const0_rtx;
8209 }
8210
8211 expand_assignment (lhs, rhs);
8212
8213 return const0_rtx;
8214 }
8215
8216 case RETURN_EXPR:
8217 if (!TREE_OPERAND (exp, 0))
8218 expand_null_return ();
8219 else
8220 expand_return (TREE_OPERAND (exp, 0));
8221 return const0_rtx;
8222
8223 case ADDR_EXPR:
8224 return expand_expr_addr_expr (exp, target, tmode, modifier);
8225
8226 case COMPLEX_EXPR:
8227 /* Get the rtx code of the operands. */
8228 op0 = expand_expr (TREE_OPERAND (exp, 0), 0, VOIDmode, 0);
8229 op1 = expand_expr (TREE_OPERAND (exp, 1), 0, VOIDmode, 0);
8230
8231 if (!target)
8232 target = gen_reg_rtx (TYPE_MODE (TREE_TYPE (exp)));
8233
8234 /* Move the real (op0) and imaginary (op1) parts to their location. */
8235 write_complex_part (target, op0, false);
8236 write_complex_part (target, op1, true);
8237
8238 return target;
8239
8240 case REALPART_EXPR:
8241 op0 = expand_expr (TREE_OPERAND (exp, 0), 0, VOIDmode, 0);
8242 return read_complex_part (op0, false);
8243
8244 case IMAGPART_EXPR:
8245 op0 = expand_expr (TREE_OPERAND (exp, 0), 0, VOIDmode, 0);
8246 return read_complex_part (op0, true);
8247
8248 case RESX_EXPR:
8249 expand_resx_expr (exp);
8250 return const0_rtx;
8251
8252 case TRY_CATCH_EXPR:
8253 case CATCH_EXPR:
8254 case EH_FILTER_EXPR:
8255 case TRY_FINALLY_EXPR:
8256 /* Lowered by tree-eh.c. */
8257 gcc_unreachable ();
8258
8259 case WITH_CLEANUP_EXPR:
8260 case CLEANUP_POINT_EXPR:
8261 case TARGET_EXPR:
8262 case CASE_LABEL_EXPR:
8263 case VA_ARG_EXPR:
8264 case BIND_EXPR:
8265 case INIT_EXPR:
8266 case CONJ_EXPR:
8267 case COMPOUND_EXPR:
8268 case PREINCREMENT_EXPR:
8269 case PREDECREMENT_EXPR:
8270 case POSTINCREMENT_EXPR:
8271 case POSTDECREMENT_EXPR:
8272 case LOOP_EXPR:
8273 case EXIT_EXPR:
8274 case TRUTH_ANDIF_EXPR:
8275 case TRUTH_ORIF_EXPR:
8276 /* Lowered by gimplify.c. */
8277 gcc_unreachable ();
8278
8279 case EXC_PTR_EXPR:
8280 return get_exception_pointer (cfun);
8281
8282 case FILTER_EXPR:
8283 return get_exception_filter (cfun);
8284
8285 case FDESC_EXPR:
8286 /* Function descriptors are not valid except for as
8287 initialization constants, and should not be expanded. */
8288 gcc_unreachable ();
8289
8290 case SWITCH_EXPR:
8291 expand_case (exp);
8292 return const0_rtx;
8293
8294 case LABEL_EXPR:
8295 expand_label (TREE_OPERAND (exp, 0));
8296 return const0_rtx;
8297
8298 case ASM_EXPR:
8299 expand_asm_expr (exp);
8300 return const0_rtx;
8301
8302 case WITH_SIZE_EXPR:
8303 /* WITH_SIZE_EXPR expands to its first argument. The caller should
8304 have pulled out the size to use in whatever context it needed. */
8305 return expand_expr_real (TREE_OPERAND (exp, 0), original_target, tmode,
8306 modifier, alt_rtl);
8307
8308 case REALIGN_LOAD_EXPR:
8309 {
8310 tree oprnd0 = TREE_OPERAND (exp, 0);
8311 tree oprnd1 = TREE_OPERAND (exp, 1);
8312 tree oprnd2 = TREE_OPERAND (exp, 2);
8313 rtx op2;
8314
8315 this_optab = optab_for_tree_code (code, type);
8316 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, 0);
8317 op2 = expand_expr (oprnd2, NULL_RTX, VOIDmode, 0);
8318 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8319 target, unsignedp);
8320 if (temp == 0)
8321 abort ();
8322 return temp;
8323 }
8324
8325
8326 default:
8327 return lang_hooks.expand_expr (exp, original_target, tmode,
8328 modifier, alt_rtl);
8329 }
8330
8331 /* Here to do an ordinary binary operator. */
8332 binop:
8333 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8334 subtarget, &op0, &op1, 0);
8335 binop2:
8336 this_optab = optab_for_tree_code (code, type);
8337 binop3:
8338 if (modifier == EXPAND_STACK_PARM)
8339 target = 0;
8340 temp = expand_binop (mode, this_optab, op0, op1, target,
8341 unsignedp, OPTAB_LIB_WIDEN);
8342 gcc_assert (temp);
8343 return REDUCE_BIT_FIELD (temp);
8344 }
8345 #undef REDUCE_BIT_FIELD
8346 \f
8347 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
8348 signedness of TYPE), possibly returning the result in TARGET. */
8349 static rtx
8350 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
8351 {
8352 HOST_WIDE_INT prec = TYPE_PRECISION (type);
8353 if (target && GET_MODE (target) != GET_MODE (exp))
8354 target = 0;
8355 if (TYPE_UNSIGNED (type))
8356 {
8357 rtx mask;
8358 if (prec < HOST_BITS_PER_WIDE_INT)
8359 mask = immed_double_const (((unsigned HOST_WIDE_INT) 1 << prec) - 1, 0,
8360 GET_MODE (exp));
8361 else
8362 mask = immed_double_const ((unsigned HOST_WIDE_INT) -1,
8363 ((unsigned HOST_WIDE_INT) 1
8364 << (prec - HOST_BITS_PER_WIDE_INT)) - 1,
8365 GET_MODE (exp));
8366 return expand_and (GET_MODE (exp), exp, mask, target);
8367 }
8368 else
8369 {
8370 tree count = build_int_cst (NULL_TREE,
8371 GET_MODE_BITSIZE (GET_MODE (exp)) - prec);
8372 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0);
8373 return expand_shift (RSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0);
8374 }
8375 }
8376 \f
8377 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
8378 when applied to the address of EXP produces an address known to be
8379 aligned more than BIGGEST_ALIGNMENT. */
8380
8381 static int
8382 is_aligning_offset (tree offset, tree exp)
8383 {
8384 /* Strip off any conversions. */
8385 while (TREE_CODE (offset) == NON_LVALUE_EXPR
8386 || TREE_CODE (offset) == NOP_EXPR
8387 || TREE_CODE (offset) == CONVERT_EXPR)
8388 offset = TREE_OPERAND (offset, 0);
8389
8390 /* We must now have a BIT_AND_EXPR with a constant that is one less than
8391 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
8392 if (TREE_CODE (offset) != BIT_AND_EXPR
8393 || !host_integerp (TREE_OPERAND (offset, 1), 1)
8394 || compare_tree_int (TREE_OPERAND (offset, 1),
8395 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
8396 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
8397 return 0;
8398
8399 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
8400 It must be NEGATE_EXPR. Then strip any more conversions. */
8401 offset = TREE_OPERAND (offset, 0);
8402 while (TREE_CODE (offset) == NON_LVALUE_EXPR
8403 || TREE_CODE (offset) == NOP_EXPR
8404 || TREE_CODE (offset) == CONVERT_EXPR)
8405 offset = TREE_OPERAND (offset, 0);
8406
8407 if (TREE_CODE (offset) != NEGATE_EXPR)
8408 return 0;
8409
8410 offset = TREE_OPERAND (offset, 0);
8411 while (TREE_CODE (offset) == NON_LVALUE_EXPR
8412 || TREE_CODE (offset) == NOP_EXPR
8413 || TREE_CODE (offset) == CONVERT_EXPR)
8414 offset = TREE_OPERAND (offset, 0);
8415
8416 /* This must now be the address of EXP. */
8417 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
8418 }
8419 \f
8420 /* Return the tree node if an ARG corresponds to a string constant or zero
8421 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
8422 in bytes within the string that ARG is accessing. The type of the
8423 offset will be `sizetype'. */
8424
8425 tree
8426 string_constant (tree arg, tree *ptr_offset)
8427 {
8428 tree array, offset;
8429 STRIP_NOPS (arg);
8430
8431 if (TREE_CODE (arg) == ADDR_EXPR)
8432 {
8433 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
8434 {
8435 *ptr_offset = size_zero_node;
8436 return TREE_OPERAND (arg, 0);
8437 }
8438 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
8439 {
8440 array = TREE_OPERAND (arg, 0);
8441 offset = size_zero_node;
8442 }
8443 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
8444 {
8445 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
8446 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
8447 if (TREE_CODE (array) != STRING_CST
8448 && TREE_CODE (array) != VAR_DECL)
8449 return 0;
8450 }
8451 else
8452 return 0;
8453 }
8454 else if (TREE_CODE (arg) == PLUS_EXPR)
8455 {
8456 tree arg0 = TREE_OPERAND (arg, 0);
8457 tree arg1 = TREE_OPERAND (arg, 1);
8458
8459 STRIP_NOPS (arg0);
8460 STRIP_NOPS (arg1);
8461
8462 if (TREE_CODE (arg0) == ADDR_EXPR
8463 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
8464 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
8465 {
8466 array = TREE_OPERAND (arg0, 0);
8467 offset = arg1;
8468 }
8469 else if (TREE_CODE (arg1) == ADDR_EXPR
8470 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
8471 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
8472 {
8473 array = TREE_OPERAND (arg1, 0);
8474 offset = arg0;
8475 }
8476 else
8477 return 0;
8478 }
8479 else
8480 return 0;
8481
8482 if (TREE_CODE (array) == STRING_CST)
8483 {
8484 *ptr_offset = convert (sizetype, offset);
8485 return array;
8486 }
8487 else if (TREE_CODE (array) == VAR_DECL)
8488 {
8489 int length;
8490
8491 /* Variables initialized to string literals can be handled too. */
8492 if (DECL_INITIAL (array) == NULL_TREE
8493 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
8494 return 0;
8495
8496 /* If they are read-only, non-volatile and bind locally. */
8497 if (! TREE_READONLY (array)
8498 || TREE_SIDE_EFFECTS (array)
8499 || ! targetm.binds_local_p (array))
8500 return 0;
8501
8502 /* Avoid const char foo[4] = "abcde"; */
8503 if (DECL_SIZE_UNIT (array) == NULL_TREE
8504 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
8505 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
8506 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
8507 return 0;
8508
8509 /* If variable is bigger than the string literal, OFFSET must be constant
8510 and inside of the bounds of the string literal. */
8511 offset = convert (sizetype, offset);
8512 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
8513 && (! host_integerp (offset, 1)
8514 || compare_tree_int (offset, length) >= 0))
8515 return 0;
8516
8517 *ptr_offset = offset;
8518 return DECL_INITIAL (array);
8519 }
8520
8521 return 0;
8522 }
8523 \f
8524 /* Generate code to calculate EXP using a store-flag instruction
8525 and return an rtx for the result. EXP is either a comparison
8526 or a TRUTH_NOT_EXPR whose operand is a comparison.
8527
8528 If TARGET is nonzero, store the result there if convenient.
8529
8530 If ONLY_CHEAP is nonzero, only do this if it is likely to be very
8531 cheap.
8532
8533 Return zero if there is no suitable set-flag instruction
8534 available on this machine.
8535
8536 Once expand_expr has been called on the arguments of the comparison,
8537 we are committed to doing the store flag, since it is not safe to
8538 re-evaluate the expression. We emit the store-flag insn by calling
8539 emit_store_flag, but only expand the arguments if we have a reason
8540 to believe that emit_store_flag will be successful. If we think that
8541 it will, but it isn't, we have to simulate the store-flag with a
8542 set/jump/set sequence. */
8543
8544 static rtx
8545 do_store_flag (tree exp, rtx target, enum machine_mode mode, int only_cheap)
8546 {
8547 enum rtx_code code;
8548 tree arg0, arg1, type;
8549 tree tem;
8550 enum machine_mode operand_mode;
8551 int invert = 0;
8552 int unsignedp;
8553 rtx op0, op1;
8554 enum insn_code icode;
8555 rtx subtarget = target;
8556 rtx result, label;
8557
8558 /* If this is a TRUTH_NOT_EXPR, set a flag indicating we must invert the
8559 result at the end. We can't simply invert the test since it would
8560 have already been inverted if it were valid. This case occurs for
8561 some floating-point comparisons. */
8562
8563 if (TREE_CODE (exp) == TRUTH_NOT_EXPR)
8564 invert = 1, exp = TREE_OPERAND (exp, 0);
8565
8566 arg0 = TREE_OPERAND (exp, 0);
8567 arg1 = TREE_OPERAND (exp, 1);
8568
8569 /* Don't crash if the comparison was erroneous. */
8570 if (arg0 == error_mark_node || arg1 == error_mark_node)
8571 return const0_rtx;
8572
8573 type = TREE_TYPE (arg0);
8574 operand_mode = TYPE_MODE (type);
8575 unsignedp = TYPE_UNSIGNED (type);
8576
8577 /* We won't bother with BLKmode store-flag operations because it would mean
8578 passing a lot of information to emit_store_flag. */
8579 if (operand_mode == BLKmode)
8580 return 0;
8581
8582 /* We won't bother with store-flag operations involving function pointers
8583 when function pointers must be canonicalized before comparisons. */
8584 #ifdef HAVE_canonicalize_funcptr_for_compare
8585 if (HAVE_canonicalize_funcptr_for_compare
8586 && ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == POINTER_TYPE
8587 && (TREE_CODE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))))
8588 == FUNCTION_TYPE))
8589 || (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 1))) == POINTER_TYPE
8590 && (TREE_CODE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1))))
8591 == FUNCTION_TYPE))))
8592 return 0;
8593 #endif
8594
8595 STRIP_NOPS (arg0);
8596 STRIP_NOPS (arg1);
8597
8598 /* Get the rtx comparison code to use. We know that EXP is a comparison
8599 operation of some type. Some comparisons against 1 and -1 can be
8600 converted to comparisons with zero. Do so here so that the tests
8601 below will be aware that we have a comparison with zero. These
8602 tests will not catch constants in the first operand, but constants
8603 are rarely passed as the first operand. */
8604
8605 switch (TREE_CODE (exp))
8606 {
8607 case EQ_EXPR:
8608 code = EQ;
8609 break;
8610 case NE_EXPR:
8611 code = NE;
8612 break;
8613 case LT_EXPR:
8614 if (integer_onep (arg1))
8615 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
8616 else
8617 code = unsignedp ? LTU : LT;
8618 break;
8619 case LE_EXPR:
8620 if (! unsignedp && integer_all_onesp (arg1))
8621 arg1 = integer_zero_node, code = LT;
8622 else
8623 code = unsignedp ? LEU : LE;
8624 break;
8625 case GT_EXPR:
8626 if (! unsignedp && integer_all_onesp (arg1))
8627 arg1 = integer_zero_node, code = GE;
8628 else
8629 code = unsignedp ? GTU : GT;
8630 break;
8631 case GE_EXPR:
8632 if (integer_onep (arg1))
8633 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
8634 else
8635 code = unsignedp ? GEU : GE;
8636 break;
8637
8638 case UNORDERED_EXPR:
8639 code = UNORDERED;
8640 break;
8641 case ORDERED_EXPR:
8642 code = ORDERED;
8643 break;
8644 case UNLT_EXPR:
8645 code = UNLT;
8646 break;
8647 case UNLE_EXPR:
8648 code = UNLE;
8649 break;
8650 case UNGT_EXPR:
8651 code = UNGT;
8652 break;
8653 case UNGE_EXPR:
8654 code = UNGE;
8655 break;
8656 case UNEQ_EXPR:
8657 code = UNEQ;
8658 break;
8659 case LTGT_EXPR:
8660 code = LTGT;
8661 break;
8662
8663 default:
8664 gcc_unreachable ();
8665 }
8666
8667 /* Put a constant second. */
8668 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST)
8669 {
8670 tem = arg0; arg0 = arg1; arg1 = tem;
8671 code = swap_condition (code);
8672 }
8673
8674 /* If this is an equality or inequality test of a single bit, we can
8675 do this by shifting the bit being tested to the low-order bit and
8676 masking the result with the constant 1. If the condition was EQ,
8677 we xor it with 1. This does not require an scc insn and is faster
8678 than an scc insn even if we have it.
8679
8680 The code to make this transformation was moved into fold_single_bit_test,
8681 so we just call into the folder and expand its result. */
8682
8683 if ((code == NE || code == EQ)
8684 && TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1)
8685 && integer_pow2p (TREE_OPERAND (arg0, 1)))
8686 {
8687 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
8688 return expand_expr (fold_single_bit_test (code == NE ? NE_EXPR : EQ_EXPR,
8689 arg0, arg1, type),
8690 target, VOIDmode, EXPAND_NORMAL);
8691 }
8692
8693 /* Now see if we are likely to be able to do this. Return if not. */
8694 if (! can_compare_p (code, operand_mode, ccp_store_flag))
8695 return 0;
8696
8697 icode = setcc_gen_code[(int) code];
8698 if (icode == CODE_FOR_nothing
8699 || (only_cheap && insn_data[(int) icode].operand[0].mode != mode))
8700 {
8701 /* We can only do this if it is one of the special cases that
8702 can be handled without an scc insn. */
8703 if ((code == LT && integer_zerop (arg1))
8704 || (! only_cheap && code == GE && integer_zerop (arg1)))
8705 ;
8706 else if (BRANCH_COST >= 0
8707 && ! only_cheap && (code == NE || code == EQ)
8708 && TREE_CODE (type) != REAL_TYPE
8709 && ((abs_optab->handlers[(int) operand_mode].insn_code
8710 != CODE_FOR_nothing)
8711 || (ffs_optab->handlers[(int) operand_mode].insn_code
8712 != CODE_FOR_nothing)))
8713 ;
8714 else
8715 return 0;
8716 }
8717
8718 if (! get_subtarget (target)
8719 || GET_MODE (subtarget) != operand_mode)
8720 subtarget = 0;
8721
8722 expand_operands (arg0, arg1, subtarget, &op0, &op1, 0);
8723
8724 if (target == 0)
8725 target = gen_reg_rtx (mode);
8726
8727 result = emit_store_flag (target, code, op0, op1,
8728 operand_mode, unsignedp, 1);
8729
8730 if (result)
8731 {
8732 if (invert)
8733 result = expand_binop (mode, xor_optab, result, const1_rtx,
8734 result, 0, OPTAB_LIB_WIDEN);
8735 return result;
8736 }
8737
8738 /* If this failed, we have to do this with set/compare/jump/set code. */
8739 if (!REG_P (target)
8740 || reg_mentioned_p (target, op0) || reg_mentioned_p (target, op1))
8741 target = gen_reg_rtx (GET_MODE (target));
8742
8743 emit_move_insn (target, invert ? const0_rtx : const1_rtx);
8744 result = compare_from_rtx (op0, op1, code, unsignedp,
8745 operand_mode, NULL_RTX);
8746 if (GET_CODE (result) == CONST_INT)
8747 return (((result == const0_rtx && ! invert)
8748 || (result != const0_rtx && invert))
8749 ? const0_rtx : const1_rtx);
8750
8751 /* The code of RESULT may not match CODE if compare_from_rtx
8752 decided to swap its operands and reverse the original code.
8753
8754 We know that compare_from_rtx returns either a CONST_INT or
8755 a new comparison code, so it is safe to just extract the
8756 code from RESULT. */
8757 code = GET_CODE (result);
8758
8759 label = gen_label_rtx ();
8760 gcc_assert (bcc_gen_fctn[(int) code]);
8761
8762 emit_jump_insn ((*bcc_gen_fctn[(int) code]) (label));
8763 emit_move_insn (target, invert ? const1_rtx : const0_rtx);
8764 emit_label (label);
8765
8766 return target;
8767 }
8768 \f
8769
8770 /* Stubs in case we haven't got a casesi insn. */
8771 #ifndef HAVE_casesi
8772 # define HAVE_casesi 0
8773 # define gen_casesi(a, b, c, d, e) (0)
8774 # define CODE_FOR_casesi CODE_FOR_nothing
8775 #endif
8776
8777 /* If the machine does not have a case insn that compares the bounds,
8778 this means extra overhead for dispatch tables, which raises the
8779 threshold for using them. */
8780 #ifndef CASE_VALUES_THRESHOLD
8781 #define CASE_VALUES_THRESHOLD (HAVE_casesi ? 4 : 5)
8782 #endif /* CASE_VALUES_THRESHOLD */
8783
8784 unsigned int
8785 case_values_threshold (void)
8786 {
8787 return CASE_VALUES_THRESHOLD;
8788 }
8789
8790 /* Attempt to generate a casesi instruction. Returns 1 if successful,
8791 0 otherwise (i.e. if there is no casesi instruction). */
8792 int
8793 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
8794 rtx table_label ATTRIBUTE_UNUSED, rtx default_label)
8795 {
8796 enum machine_mode index_mode = SImode;
8797 int index_bits = GET_MODE_BITSIZE (index_mode);
8798 rtx op1, op2, index;
8799 enum machine_mode op_mode;
8800
8801 if (! HAVE_casesi)
8802 return 0;
8803
8804 /* Convert the index to SImode. */
8805 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
8806 {
8807 enum machine_mode omode = TYPE_MODE (index_type);
8808 rtx rangertx = expand_expr (range, NULL_RTX, VOIDmode, 0);
8809
8810 /* We must handle the endpoints in the original mode. */
8811 index_expr = build2 (MINUS_EXPR, index_type,
8812 index_expr, minval);
8813 minval = integer_zero_node;
8814 index = expand_expr (index_expr, NULL_RTX, VOIDmode, 0);
8815 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
8816 omode, 1, default_label);
8817 /* Now we can safely truncate. */
8818 index = convert_to_mode (index_mode, index, 0);
8819 }
8820 else
8821 {
8822 if (TYPE_MODE (index_type) != index_mode)
8823 {
8824 index_expr = convert (lang_hooks.types.type_for_size
8825 (index_bits, 0), index_expr);
8826 index_type = TREE_TYPE (index_expr);
8827 }
8828
8829 index = expand_expr (index_expr, NULL_RTX, VOIDmode, 0);
8830 }
8831
8832 do_pending_stack_adjust ();
8833
8834 op_mode = insn_data[(int) CODE_FOR_casesi].operand[0].mode;
8835 if (! (*insn_data[(int) CODE_FOR_casesi].operand[0].predicate)
8836 (index, op_mode))
8837 index = copy_to_mode_reg (op_mode, index);
8838
8839 op1 = expand_expr (minval, NULL_RTX, VOIDmode, 0);
8840
8841 op_mode = insn_data[(int) CODE_FOR_casesi].operand[1].mode;
8842 op1 = convert_modes (op_mode, TYPE_MODE (TREE_TYPE (minval)),
8843 op1, TYPE_UNSIGNED (TREE_TYPE (minval)));
8844 if (! (*insn_data[(int) CODE_FOR_casesi].operand[1].predicate)
8845 (op1, op_mode))
8846 op1 = copy_to_mode_reg (op_mode, op1);
8847
8848 op2 = expand_expr (range, NULL_RTX, VOIDmode, 0);
8849
8850 op_mode = insn_data[(int) CODE_FOR_casesi].operand[2].mode;
8851 op2 = convert_modes (op_mode, TYPE_MODE (TREE_TYPE (range)),
8852 op2, TYPE_UNSIGNED (TREE_TYPE (range)));
8853 if (! (*insn_data[(int) CODE_FOR_casesi].operand[2].predicate)
8854 (op2, op_mode))
8855 op2 = copy_to_mode_reg (op_mode, op2);
8856
8857 emit_jump_insn (gen_casesi (index, op1, op2,
8858 table_label, default_label));
8859 return 1;
8860 }
8861
8862 /* Attempt to generate a tablejump instruction; same concept. */
8863 #ifndef HAVE_tablejump
8864 #define HAVE_tablejump 0
8865 #define gen_tablejump(x, y) (0)
8866 #endif
8867
8868 /* Subroutine of the next function.
8869
8870 INDEX is the value being switched on, with the lowest value
8871 in the table already subtracted.
8872 MODE is its expected mode (needed if INDEX is constant).
8873 RANGE is the length of the jump table.
8874 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
8875
8876 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
8877 index value is out of range. */
8878
8879 static void
8880 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
8881 rtx default_label)
8882 {
8883 rtx temp, vector;
8884
8885 if (INTVAL (range) > cfun->max_jumptable_ents)
8886 cfun->max_jumptable_ents = INTVAL (range);
8887
8888 /* Do an unsigned comparison (in the proper mode) between the index
8889 expression and the value which represents the length of the range.
8890 Since we just finished subtracting the lower bound of the range
8891 from the index expression, this comparison allows us to simultaneously
8892 check that the original index expression value is both greater than
8893 or equal to the minimum value of the range and less than or equal to
8894 the maximum value of the range. */
8895
8896 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
8897 default_label);
8898
8899 /* If index is in range, it must fit in Pmode.
8900 Convert to Pmode so we can index with it. */
8901 if (mode != Pmode)
8902 index = convert_to_mode (Pmode, index, 1);
8903
8904 /* Don't let a MEM slip through, because then INDEX that comes
8905 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
8906 and break_out_memory_refs will go to work on it and mess it up. */
8907 #ifdef PIC_CASE_VECTOR_ADDRESS
8908 if (flag_pic && !REG_P (index))
8909 index = copy_to_mode_reg (Pmode, index);
8910 #endif
8911
8912 /* If flag_force_addr were to affect this address
8913 it could interfere with the tricky assumptions made
8914 about addresses that contain label-refs,
8915 which may be valid only very near the tablejump itself. */
8916 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
8917 GET_MODE_SIZE, because this indicates how large insns are. The other
8918 uses should all be Pmode, because they are addresses. This code
8919 could fail if addresses and insns are not the same size. */
8920 index = gen_rtx_PLUS (Pmode,
8921 gen_rtx_MULT (Pmode, index,
8922 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
8923 gen_rtx_LABEL_REF (Pmode, table_label));
8924 #ifdef PIC_CASE_VECTOR_ADDRESS
8925 if (flag_pic)
8926 index = PIC_CASE_VECTOR_ADDRESS (index);
8927 else
8928 #endif
8929 index = memory_address_noforce (CASE_VECTOR_MODE, index);
8930 temp = gen_reg_rtx (CASE_VECTOR_MODE);
8931 vector = gen_const_mem (CASE_VECTOR_MODE, index);
8932 convert_move (temp, vector, 0);
8933
8934 emit_jump_insn (gen_tablejump (temp, table_label));
8935
8936 /* If we are generating PIC code or if the table is PC-relative, the
8937 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
8938 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
8939 emit_barrier ();
8940 }
8941
8942 int
8943 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
8944 rtx table_label, rtx default_label)
8945 {
8946 rtx index;
8947
8948 if (! HAVE_tablejump)
8949 return 0;
8950
8951 index_expr = fold (build2 (MINUS_EXPR, index_type,
8952 convert (index_type, index_expr),
8953 convert (index_type, minval)));
8954 index = expand_expr (index_expr, NULL_RTX, VOIDmode, 0);
8955 do_pending_stack_adjust ();
8956
8957 do_tablejump (index, TYPE_MODE (index_type),
8958 convert_modes (TYPE_MODE (index_type),
8959 TYPE_MODE (TREE_TYPE (range)),
8960 expand_expr (range, NULL_RTX,
8961 VOIDmode, 0),
8962 TYPE_UNSIGNED (TREE_TYPE (range))),
8963 table_label, default_label);
8964 return 1;
8965 }
8966
8967 /* Nonzero if the mode is a valid vector mode for this architecture.
8968 This returns nonzero even if there is no hardware support for the
8969 vector mode, but we can emulate with narrower modes. */
8970
8971 int
8972 vector_mode_valid_p (enum machine_mode mode)
8973 {
8974 enum mode_class class = GET_MODE_CLASS (mode);
8975 enum machine_mode innermode;
8976
8977 /* Doh! What's going on? */
8978 if (class != MODE_VECTOR_INT
8979 && class != MODE_VECTOR_FLOAT)
8980 return 0;
8981
8982 /* Hardware support. Woo hoo! */
8983 if (targetm.vector_mode_supported_p (mode))
8984 return 1;
8985
8986 innermode = GET_MODE_INNER (mode);
8987
8988 /* We should probably return 1 if requesting V4DI and we have no DI,
8989 but we have V2DI, but this is probably very unlikely. */
8990
8991 /* If we have support for the inner mode, we can safely emulate it.
8992 We may not have V2DI, but me can emulate with a pair of DIs. */
8993 return targetm.scalar_mode_supported_p (innermode);
8994 }
8995
8996 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
8997 static rtx
8998 const_vector_from_tree (tree exp)
8999 {
9000 rtvec v;
9001 int units, i;
9002 tree link, elt;
9003 enum machine_mode inner, mode;
9004
9005 mode = TYPE_MODE (TREE_TYPE (exp));
9006
9007 if (initializer_zerop (exp))
9008 return CONST0_RTX (mode);
9009
9010 units = GET_MODE_NUNITS (mode);
9011 inner = GET_MODE_INNER (mode);
9012
9013 v = rtvec_alloc (units);
9014
9015 link = TREE_VECTOR_CST_ELTS (exp);
9016 for (i = 0; link; link = TREE_CHAIN (link), ++i)
9017 {
9018 elt = TREE_VALUE (link);
9019
9020 if (TREE_CODE (elt) == REAL_CST)
9021 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
9022 inner);
9023 else
9024 RTVEC_ELT (v, i) = immed_double_const (TREE_INT_CST_LOW (elt),
9025 TREE_INT_CST_HIGH (elt),
9026 inner);
9027 }
9028
9029 /* Initialize remaining elements to 0. */
9030 for (; i < units; ++i)
9031 RTVEC_ELT (v, i) = CONST0_RTX (inner);
9032
9033 return gen_rtx_CONST_VECTOR (mode, v);
9034 }
9035 #include "gt-expr.h"