re PR target/19690 (ICE with -O3 -march=athlon-xp -mfpmath=sse -mno-80387)
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "real.h"
28 #include "rtl.h"
29 #include "tree.h"
30 #include "flags.h"
31 #include "regs.h"
32 #include "hard-reg-set.h"
33 #include "except.h"
34 #include "function.h"
35 #include "insn-config.h"
36 #include "insn-attr.h"
37 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
38 #include "expr.h"
39 #include "optabs.h"
40 #include "libfuncs.h"
41 #include "recog.h"
42 #include "reload.h"
43 #include "output.h"
44 #include "typeclass.h"
45 #include "toplev.h"
46 #include "ggc.h"
47 #include "langhooks.h"
48 #include "intl.h"
49 #include "tm_p.h"
50 #include "tree-iterator.h"
51 #include "tree-pass.h"
52 #include "tree-flow.h"
53 #include "target.h"
54 #include "timevar.h"
55
56 /* Decide whether a function's arguments should be processed
57 from first to last or from last to first.
58
59 They should if the stack and args grow in opposite directions, but
60 only if we have push insns. */
61
62 #ifdef PUSH_ROUNDING
63
64 #ifndef PUSH_ARGS_REVERSED
65 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
66 #define PUSH_ARGS_REVERSED /* If it's last to first. */
67 #endif
68 #endif
69
70 #endif
71
72 #ifndef STACK_PUSH_CODE
73 #ifdef STACK_GROWS_DOWNWARD
74 #define STACK_PUSH_CODE PRE_DEC
75 #else
76 #define STACK_PUSH_CODE PRE_INC
77 #endif
78 #endif
79
80
81 /* If this is nonzero, we do not bother generating VOLATILE
82 around volatile memory references, and we are willing to
83 output indirect addresses. If cse is to follow, we reject
84 indirect addresses so a useful potential cse is generated;
85 if it is used only once, instruction combination will produce
86 the same indirect address eventually. */
87 int cse_not_expected;
88
89 /* This structure is used by move_by_pieces to describe the move to
90 be performed. */
91 struct move_by_pieces
92 {
93 rtx to;
94 rtx to_addr;
95 int autinc_to;
96 int explicit_inc_to;
97 rtx from;
98 rtx from_addr;
99 int autinc_from;
100 int explicit_inc_from;
101 unsigned HOST_WIDE_INT len;
102 HOST_WIDE_INT offset;
103 int reverse;
104 };
105
106 /* This structure is used by store_by_pieces to describe the clear to
107 be performed. */
108
109 struct store_by_pieces
110 {
111 rtx to;
112 rtx to_addr;
113 int autinc_to;
114 int explicit_inc_to;
115 unsigned HOST_WIDE_INT len;
116 HOST_WIDE_INT offset;
117 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
118 void *constfundata;
119 int reverse;
120 };
121
122 static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT,
123 unsigned int,
124 unsigned int);
125 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
126 struct move_by_pieces *);
127 static bool block_move_libcall_safe_for_call_parm (void);
128 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned);
129 static rtx emit_block_move_via_libcall (rtx, rtx, rtx);
130 static tree emit_block_move_libcall_fn (int);
131 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
132 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
133 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
134 static void store_by_pieces_1 (struct store_by_pieces *, unsigned int);
135 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
136 struct store_by_pieces *);
137 static bool clear_storage_via_clrmem (rtx, rtx, unsigned);
138 static rtx clear_storage_via_libcall (rtx, rtx);
139 static tree clear_storage_libcall_fn (int);
140 static rtx compress_float_constant (rtx, rtx);
141 static rtx get_subtarget (rtx);
142 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
143 HOST_WIDE_INT, enum machine_mode,
144 tree, tree, int, int);
145 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
146 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT, enum machine_mode,
147 tree, tree, int);
148
149 static unsigned HOST_WIDE_INT highest_pow2_factor (tree);
150 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (tree, tree);
151
152 static int is_aligning_offset (tree, tree);
153 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
154 enum expand_modifier);
155 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
156 static rtx do_store_flag (tree, rtx, enum machine_mode, int);
157 #ifdef PUSH_ROUNDING
158 static void emit_single_push_insn (enum machine_mode, rtx, tree);
159 #endif
160 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
161 static rtx const_vector_from_tree (tree);
162 static void write_complex_part (rtx, rtx, bool);
163
164 /* Record for each mode whether we can move a register directly to or
165 from an object of that mode in memory. If we can't, we won't try
166 to use that mode directly when accessing a field of that mode. */
167
168 static char direct_load[NUM_MACHINE_MODES];
169 static char direct_store[NUM_MACHINE_MODES];
170
171 /* Record for each mode whether we can float-extend from memory. */
172
173 static bool float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
174
175 /* This macro is used to determine whether move_by_pieces should be called
176 to perform a structure copy. */
177 #ifndef MOVE_BY_PIECES_P
178 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
179 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
180 < (unsigned int) MOVE_RATIO)
181 #endif
182
183 /* This macro is used to determine whether clear_by_pieces should be
184 called to clear storage. */
185 #ifndef CLEAR_BY_PIECES_P
186 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
187 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
188 < (unsigned int) CLEAR_RATIO)
189 #endif
190
191 /* This macro is used to determine whether store_by_pieces should be
192 called to "memset" storage with byte values other than zero, or
193 to "memcpy" storage when the source is a constant string. */
194 #ifndef STORE_BY_PIECES_P
195 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
196 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
197 < (unsigned int) MOVE_RATIO)
198 #endif
199
200 /* This array records the insn_code of insns to perform block moves. */
201 enum insn_code movmem_optab[NUM_MACHINE_MODES];
202
203 /* This array records the insn_code of insns to perform block clears. */
204 enum insn_code clrmem_optab[NUM_MACHINE_MODES];
205
206 /* These arrays record the insn_code of two different kinds of insns
207 to perform block compares. */
208 enum insn_code cmpstr_optab[NUM_MACHINE_MODES];
209 enum insn_code cmpmem_optab[NUM_MACHINE_MODES];
210
211 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
212
213 #ifndef SLOW_UNALIGNED_ACCESS
214 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
215 #endif
216 \f
217 /* This is run once per compilation to set up which modes can be used
218 directly in memory and to initialize the block move optab. */
219
220 void
221 init_expr_once (void)
222 {
223 rtx insn, pat;
224 enum machine_mode mode;
225 int num_clobbers;
226 rtx mem, mem1;
227 rtx reg;
228
229 /* Try indexing by frame ptr and try by stack ptr.
230 It is known that on the Convex the stack ptr isn't a valid index.
231 With luck, one or the other is valid on any machine. */
232 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
233 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
234
235 /* A scratch register we can modify in-place below to avoid
236 useless RTL allocations. */
237 reg = gen_rtx_REG (VOIDmode, -1);
238
239 insn = rtx_alloc (INSN);
240 pat = gen_rtx_SET (0, NULL_RTX, NULL_RTX);
241 PATTERN (insn) = pat;
242
243 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
244 mode = (enum machine_mode) ((int) mode + 1))
245 {
246 int regno;
247
248 direct_load[(int) mode] = direct_store[(int) mode] = 0;
249 PUT_MODE (mem, mode);
250 PUT_MODE (mem1, mode);
251 PUT_MODE (reg, mode);
252
253 /* See if there is some register that can be used in this mode and
254 directly loaded or stored from memory. */
255
256 if (mode != VOIDmode && mode != BLKmode)
257 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
258 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
259 regno++)
260 {
261 if (! HARD_REGNO_MODE_OK (regno, mode))
262 continue;
263
264 REGNO (reg) = regno;
265
266 SET_SRC (pat) = mem;
267 SET_DEST (pat) = reg;
268 if (recog (pat, insn, &num_clobbers) >= 0)
269 direct_load[(int) mode] = 1;
270
271 SET_SRC (pat) = mem1;
272 SET_DEST (pat) = reg;
273 if (recog (pat, insn, &num_clobbers) >= 0)
274 direct_load[(int) mode] = 1;
275
276 SET_SRC (pat) = reg;
277 SET_DEST (pat) = mem;
278 if (recog (pat, insn, &num_clobbers) >= 0)
279 direct_store[(int) mode] = 1;
280
281 SET_SRC (pat) = reg;
282 SET_DEST (pat) = mem1;
283 if (recog (pat, insn, &num_clobbers) >= 0)
284 direct_store[(int) mode] = 1;
285 }
286 }
287
288 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
289
290 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
291 mode = GET_MODE_WIDER_MODE (mode))
292 {
293 enum machine_mode srcmode;
294 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
295 srcmode = GET_MODE_WIDER_MODE (srcmode))
296 {
297 enum insn_code ic;
298
299 ic = can_extend_p (mode, srcmode, 0);
300 if (ic == CODE_FOR_nothing)
301 continue;
302
303 PUT_MODE (mem, srcmode);
304
305 if ((*insn_data[ic].operand[1].predicate) (mem, srcmode))
306 float_extend_from_mem[mode][srcmode] = true;
307 }
308 }
309 }
310
311 /* This is run at the start of compiling a function. */
312
313 void
314 init_expr (void)
315 {
316 cfun->expr = ggc_alloc_cleared (sizeof (struct expr_status));
317 }
318 \f
319 /* Copy data from FROM to TO, where the machine modes are not the same.
320 Both modes may be integer, or both may be floating.
321 UNSIGNEDP should be nonzero if FROM is an unsigned type.
322 This causes zero-extension instead of sign-extension. */
323
324 void
325 convert_move (rtx to, rtx from, int unsignedp)
326 {
327 enum machine_mode to_mode = GET_MODE (to);
328 enum machine_mode from_mode = GET_MODE (from);
329 int to_real = GET_MODE_CLASS (to_mode) == MODE_FLOAT;
330 int from_real = GET_MODE_CLASS (from_mode) == MODE_FLOAT;
331 enum insn_code code;
332 rtx libcall;
333
334 /* rtx code for making an equivalent value. */
335 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
336 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
337
338
339 gcc_assert (to_real == from_real);
340
341 /* If the source and destination are already the same, then there's
342 nothing to do. */
343 if (to == from)
344 return;
345
346 /* If FROM is a SUBREG that indicates that we have already done at least
347 the required extension, strip it. We don't handle such SUBREGs as
348 TO here. */
349
350 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
351 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (from)))
352 >= GET_MODE_SIZE (to_mode))
353 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
354 from = gen_lowpart (to_mode, from), from_mode = to_mode;
355
356 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
357
358 if (to_mode == from_mode
359 || (from_mode == VOIDmode && CONSTANT_P (from)))
360 {
361 emit_move_insn (to, from);
362 return;
363 }
364
365 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
366 {
367 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
368
369 if (VECTOR_MODE_P (to_mode))
370 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
371 else
372 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
373
374 emit_move_insn (to, from);
375 return;
376 }
377
378 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
379 {
380 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
381 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
382 return;
383 }
384
385 if (to_real)
386 {
387 rtx value, insns;
388 convert_optab tab;
389
390 gcc_assert (GET_MODE_PRECISION (from_mode)
391 != GET_MODE_PRECISION (to_mode));
392
393 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
394 tab = sext_optab;
395 else
396 tab = trunc_optab;
397
398 /* Try converting directly if the insn is supported. */
399
400 code = tab->handlers[to_mode][from_mode].insn_code;
401 if (code != CODE_FOR_nothing)
402 {
403 emit_unop_insn (code, to, from,
404 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
405 return;
406 }
407
408 /* Otherwise use a libcall. */
409 libcall = tab->handlers[to_mode][from_mode].libfunc;
410
411 /* Is this conversion implemented yet? */
412 gcc_assert (libcall);
413
414 start_sequence ();
415 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
416 1, from, from_mode);
417 insns = get_insns ();
418 end_sequence ();
419 emit_libcall_block (insns, to, value,
420 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
421 from)
422 : gen_rtx_FLOAT_EXTEND (to_mode, from));
423 return;
424 }
425
426 /* Handle pointer conversion. */ /* SPEE 900220. */
427 /* Targets are expected to provide conversion insns between PxImode and
428 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
429 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
430 {
431 enum machine_mode full_mode
432 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
433
434 gcc_assert (trunc_optab->handlers[to_mode][full_mode].insn_code
435 != CODE_FOR_nothing);
436
437 if (full_mode != from_mode)
438 from = convert_to_mode (full_mode, from, unsignedp);
439 emit_unop_insn (trunc_optab->handlers[to_mode][full_mode].insn_code,
440 to, from, UNKNOWN);
441 return;
442 }
443 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
444 {
445 enum machine_mode full_mode
446 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
447
448 gcc_assert (sext_optab->handlers[full_mode][from_mode].insn_code
449 != CODE_FOR_nothing);
450
451 emit_unop_insn (sext_optab->handlers[full_mode][from_mode].insn_code,
452 to, from, UNKNOWN);
453 if (to_mode == full_mode)
454 return;
455
456 /* else proceed to integer conversions below. */
457 from_mode = full_mode;
458 }
459
460 /* Now both modes are integers. */
461
462 /* Handle expanding beyond a word. */
463 if (GET_MODE_BITSIZE (from_mode) < GET_MODE_BITSIZE (to_mode)
464 && GET_MODE_BITSIZE (to_mode) > BITS_PER_WORD)
465 {
466 rtx insns;
467 rtx lowpart;
468 rtx fill_value;
469 rtx lowfrom;
470 int i;
471 enum machine_mode lowpart_mode;
472 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
473
474 /* Try converting directly if the insn is supported. */
475 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
476 != CODE_FOR_nothing)
477 {
478 /* If FROM is a SUBREG, put it into a register. Do this
479 so that we always generate the same set of insns for
480 better cse'ing; if an intermediate assignment occurred,
481 we won't be doing the operation directly on the SUBREG. */
482 if (optimize > 0 && GET_CODE (from) == SUBREG)
483 from = force_reg (from_mode, from);
484 emit_unop_insn (code, to, from, equiv_code);
485 return;
486 }
487 /* Next, try converting via full word. */
488 else if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD
489 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
490 != CODE_FOR_nothing))
491 {
492 if (REG_P (to))
493 {
494 if (reg_overlap_mentioned_p (to, from))
495 from = force_reg (from_mode, from);
496 emit_insn (gen_rtx_CLOBBER (VOIDmode, to));
497 }
498 convert_move (gen_lowpart (word_mode, to), from, unsignedp);
499 emit_unop_insn (code, to,
500 gen_lowpart (word_mode, to), equiv_code);
501 return;
502 }
503
504 /* No special multiword conversion insn; do it by hand. */
505 start_sequence ();
506
507 /* Since we will turn this into a no conflict block, we must ensure
508 that the source does not overlap the target. */
509
510 if (reg_overlap_mentioned_p (to, from))
511 from = force_reg (from_mode, from);
512
513 /* Get a copy of FROM widened to a word, if necessary. */
514 if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD)
515 lowpart_mode = word_mode;
516 else
517 lowpart_mode = from_mode;
518
519 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
520
521 lowpart = gen_lowpart (lowpart_mode, to);
522 emit_move_insn (lowpart, lowfrom);
523
524 /* Compute the value to put in each remaining word. */
525 if (unsignedp)
526 fill_value = const0_rtx;
527 else
528 {
529 #ifdef HAVE_slt
530 if (HAVE_slt
531 && insn_data[(int) CODE_FOR_slt].operand[0].mode == word_mode
532 && STORE_FLAG_VALUE == -1)
533 {
534 emit_cmp_insn (lowfrom, const0_rtx, NE, NULL_RTX,
535 lowpart_mode, 0);
536 fill_value = gen_reg_rtx (word_mode);
537 emit_insn (gen_slt (fill_value));
538 }
539 else
540 #endif
541 {
542 fill_value
543 = expand_shift (RSHIFT_EXPR, lowpart_mode, lowfrom,
544 size_int (GET_MODE_BITSIZE (lowpart_mode) - 1),
545 NULL_RTX, 0);
546 fill_value = convert_to_mode (word_mode, fill_value, 1);
547 }
548 }
549
550 /* Fill the remaining words. */
551 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
552 {
553 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
554 rtx subword = operand_subword (to, index, 1, to_mode);
555
556 gcc_assert (subword);
557
558 if (fill_value != subword)
559 emit_move_insn (subword, fill_value);
560 }
561
562 insns = get_insns ();
563 end_sequence ();
564
565 emit_no_conflict_block (insns, to, from, NULL_RTX,
566 gen_rtx_fmt_e (equiv_code, to_mode, copy_rtx (from)));
567 return;
568 }
569
570 /* Truncating multi-word to a word or less. */
571 if (GET_MODE_BITSIZE (from_mode) > BITS_PER_WORD
572 && GET_MODE_BITSIZE (to_mode) <= BITS_PER_WORD)
573 {
574 if (!((MEM_P (from)
575 && ! MEM_VOLATILE_P (from)
576 && direct_load[(int) to_mode]
577 && ! mode_dependent_address_p (XEXP (from, 0)))
578 || REG_P (from)
579 || GET_CODE (from) == SUBREG))
580 from = force_reg (from_mode, from);
581 convert_move (to, gen_lowpart (word_mode, from), 0);
582 return;
583 }
584
585 /* Now follow all the conversions between integers
586 no more than a word long. */
587
588 /* For truncation, usually we can just refer to FROM in a narrower mode. */
589 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
590 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode),
591 GET_MODE_BITSIZE (from_mode)))
592 {
593 if (!((MEM_P (from)
594 && ! MEM_VOLATILE_P (from)
595 && direct_load[(int) to_mode]
596 && ! mode_dependent_address_p (XEXP (from, 0)))
597 || REG_P (from)
598 || GET_CODE (from) == SUBREG))
599 from = force_reg (from_mode, from);
600 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
601 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
602 from = copy_to_reg (from);
603 emit_move_insn (to, gen_lowpart (to_mode, from));
604 return;
605 }
606
607 /* Handle extension. */
608 if (GET_MODE_BITSIZE (to_mode) > GET_MODE_BITSIZE (from_mode))
609 {
610 /* Convert directly if that works. */
611 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
612 != CODE_FOR_nothing)
613 {
614 if (flag_force_mem)
615 from = force_not_mem (from);
616
617 emit_unop_insn (code, to, from, equiv_code);
618 return;
619 }
620 else
621 {
622 enum machine_mode intermediate;
623 rtx tmp;
624 tree shift_amount;
625
626 /* Search for a mode to convert via. */
627 for (intermediate = from_mode; intermediate != VOIDmode;
628 intermediate = GET_MODE_WIDER_MODE (intermediate))
629 if (((can_extend_p (to_mode, intermediate, unsignedp)
630 != CODE_FOR_nothing)
631 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
632 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode),
633 GET_MODE_BITSIZE (intermediate))))
634 && (can_extend_p (intermediate, from_mode, unsignedp)
635 != CODE_FOR_nothing))
636 {
637 convert_move (to, convert_to_mode (intermediate, from,
638 unsignedp), unsignedp);
639 return;
640 }
641
642 /* No suitable intermediate mode.
643 Generate what we need with shifts. */
644 shift_amount = build_int_cst (NULL_TREE,
645 GET_MODE_BITSIZE (to_mode)
646 - GET_MODE_BITSIZE (from_mode));
647 from = gen_lowpart (to_mode, force_reg (from_mode, from));
648 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
649 to, unsignedp);
650 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
651 to, unsignedp);
652 if (tmp != to)
653 emit_move_insn (to, tmp);
654 return;
655 }
656 }
657
658 /* Support special truncate insns for certain modes. */
659 if (trunc_optab->handlers[to_mode][from_mode].insn_code != CODE_FOR_nothing)
660 {
661 emit_unop_insn (trunc_optab->handlers[to_mode][from_mode].insn_code,
662 to, from, UNKNOWN);
663 return;
664 }
665
666 /* Handle truncation of volatile memrefs, and so on;
667 the things that couldn't be truncated directly,
668 and for which there was no special instruction.
669
670 ??? Code above formerly short-circuited this, for most integer
671 mode pairs, with a force_reg in from_mode followed by a recursive
672 call to this routine. Appears always to have been wrong. */
673 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode))
674 {
675 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
676 emit_move_insn (to, temp);
677 return;
678 }
679
680 /* Mode combination is not recognized. */
681 gcc_unreachable ();
682 }
683
684 /* Return an rtx for a value that would result
685 from converting X to mode MODE.
686 Both X and MODE may be floating, or both integer.
687 UNSIGNEDP is nonzero if X is an unsigned value.
688 This can be done by referring to a part of X in place
689 or by copying to a new temporary with conversion. */
690
691 rtx
692 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
693 {
694 return convert_modes (mode, VOIDmode, x, unsignedp);
695 }
696
697 /* Return an rtx for a value that would result
698 from converting X from mode OLDMODE to mode MODE.
699 Both modes may be floating, or both integer.
700 UNSIGNEDP is nonzero if X is an unsigned value.
701
702 This can be done by referring to a part of X in place
703 or by copying to a new temporary with conversion.
704
705 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
706
707 rtx
708 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
709 {
710 rtx temp;
711
712 /* If FROM is a SUBREG that indicates that we have already done at least
713 the required extension, strip it. */
714
715 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
716 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
717 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
718 x = gen_lowpart (mode, x);
719
720 if (GET_MODE (x) != VOIDmode)
721 oldmode = GET_MODE (x);
722
723 if (mode == oldmode)
724 return x;
725
726 /* There is one case that we must handle specially: If we are converting
727 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
728 we are to interpret the constant as unsigned, gen_lowpart will do
729 the wrong if the constant appears negative. What we want to do is
730 make the high-order word of the constant zero, not all ones. */
731
732 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
733 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
734 && GET_CODE (x) == CONST_INT && INTVAL (x) < 0)
735 {
736 HOST_WIDE_INT val = INTVAL (x);
737
738 if (oldmode != VOIDmode
739 && HOST_BITS_PER_WIDE_INT > GET_MODE_BITSIZE (oldmode))
740 {
741 int width = GET_MODE_BITSIZE (oldmode);
742
743 /* We need to zero extend VAL. */
744 val &= ((HOST_WIDE_INT) 1 << width) - 1;
745 }
746
747 return immed_double_const (val, (HOST_WIDE_INT) 0, mode);
748 }
749
750 /* We can do this with a gen_lowpart if both desired and current modes
751 are integer, and this is either a constant integer, a register, or a
752 non-volatile MEM. Except for the constant case where MODE is no
753 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
754
755 if ((GET_CODE (x) == CONST_INT
756 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
757 || (GET_MODE_CLASS (mode) == MODE_INT
758 && GET_MODE_CLASS (oldmode) == MODE_INT
759 && (GET_CODE (x) == CONST_DOUBLE
760 || (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (oldmode)
761 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
762 && direct_load[(int) mode])
763 || (REG_P (x)
764 && (! HARD_REGISTER_P (x)
765 || HARD_REGNO_MODE_OK (REGNO (x), mode))
766 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
767 GET_MODE_BITSIZE (GET_MODE (x)))))))))
768 {
769 /* ?? If we don't know OLDMODE, we have to assume here that
770 X does not need sign- or zero-extension. This may not be
771 the case, but it's the best we can do. */
772 if (GET_CODE (x) == CONST_INT && oldmode != VOIDmode
773 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (oldmode))
774 {
775 HOST_WIDE_INT val = INTVAL (x);
776 int width = GET_MODE_BITSIZE (oldmode);
777
778 /* We must sign or zero-extend in this case. Start by
779 zero-extending, then sign extend if we need to. */
780 val &= ((HOST_WIDE_INT) 1 << width) - 1;
781 if (! unsignedp
782 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
783 val |= (HOST_WIDE_INT) (-1) << width;
784
785 return gen_int_mode (val, mode);
786 }
787
788 return gen_lowpart (mode, x);
789 }
790
791 /* Converting from integer constant into mode is always equivalent to an
792 subreg operation. */
793 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
794 {
795 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
796 return simplify_gen_subreg (mode, x, oldmode, 0);
797 }
798
799 temp = gen_reg_rtx (mode);
800 convert_move (temp, x, unsignedp);
801 return temp;
802 }
803 \f
804 /* STORE_MAX_PIECES is the number of bytes at a time that we can
805 store efficiently. Due to internal GCC limitations, this is
806 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
807 for an immediate constant. */
808
809 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
810
811 /* Determine whether the LEN bytes can be moved by using several move
812 instructions. Return nonzero if a call to move_by_pieces should
813 succeed. */
814
815 int
816 can_move_by_pieces (unsigned HOST_WIDE_INT len,
817 unsigned int align ATTRIBUTE_UNUSED)
818 {
819 return MOVE_BY_PIECES_P (len, align);
820 }
821
822 /* Generate several move instructions to copy LEN bytes from block FROM to
823 block TO. (These are MEM rtx's with BLKmode).
824
825 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
826 used to push FROM to the stack.
827
828 ALIGN is maximum stack alignment we can assume.
829
830 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
831 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
832 stpcpy. */
833
834 rtx
835 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
836 unsigned int align, int endp)
837 {
838 struct move_by_pieces data;
839 rtx to_addr, from_addr = XEXP (from, 0);
840 unsigned int max_size = MOVE_MAX_PIECES + 1;
841 enum machine_mode mode = VOIDmode, tmode;
842 enum insn_code icode;
843
844 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
845
846 data.offset = 0;
847 data.from_addr = from_addr;
848 if (to)
849 {
850 to_addr = XEXP (to, 0);
851 data.to = to;
852 data.autinc_to
853 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
854 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
855 data.reverse
856 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
857 }
858 else
859 {
860 to_addr = NULL_RTX;
861 data.to = NULL_RTX;
862 data.autinc_to = 1;
863 #ifdef STACK_GROWS_DOWNWARD
864 data.reverse = 1;
865 #else
866 data.reverse = 0;
867 #endif
868 }
869 data.to_addr = to_addr;
870 data.from = from;
871 data.autinc_from
872 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
873 || GET_CODE (from_addr) == POST_INC
874 || GET_CODE (from_addr) == POST_DEC);
875
876 data.explicit_inc_from = 0;
877 data.explicit_inc_to = 0;
878 if (data.reverse) data.offset = len;
879 data.len = len;
880
881 /* If copying requires more than two move insns,
882 copy addresses to registers (to make displacements shorter)
883 and use post-increment if available. */
884 if (!(data.autinc_from && data.autinc_to)
885 && move_by_pieces_ninsns (len, align, max_size) > 2)
886 {
887 /* Find the mode of the largest move... */
888 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
889 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
890 if (GET_MODE_SIZE (tmode) < max_size)
891 mode = tmode;
892
893 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
894 {
895 data.from_addr = copy_addr_to_reg (plus_constant (from_addr, len));
896 data.autinc_from = 1;
897 data.explicit_inc_from = -1;
898 }
899 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
900 {
901 data.from_addr = copy_addr_to_reg (from_addr);
902 data.autinc_from = 1;
903 data.explicit_inc_from = 1;
904 }
905 if (!data.autinc_from && CONSTANT_P (from_addr))
906 data.from_addr = copy_addr_to_reg (from_addr);
907 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
908 {
909 data.to_addr = copy_addr_to_reg (plus_constant (to_addr, len));
910 data.autinc_to = 1;
911 data.explicit_inc_to = -1;
912 }
913 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
914 {
915 data.to_addr = copy_addr_to_reg (to_addr);
916 data.autinc_to = 1;
917 data.explicit_inc_to = 1;
918 }
919 if (!data.autinc_to && CONSTANT_P (to_addr))
920 data.to_addr = copy_addr_to_reg (to_addr);
921 }
922
923 tmode = mode_for_size (MOVE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
924 if (align >= GET_MODE_ALIGNMENT (tmode))
925 align = GET_MODE_ALIGNMENT (tmode);
926 else
927 {
928 enum machine_mode xmode;
929
930 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
931 tmode != VOIDmode;
932 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
933 if (GET_MODE_SIZE (tmode) > MOVE_MAX_PIECES
934 || SLOW_UNALIGNED_ACCESS (tmode, align))
935 break;
936
937 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
938 }
939
940 /* First move what we can in the largest integer mode, then go to
941 successively smaller modes. */
942
943 while (max_size > 1)
944 {
945 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
946 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
947 if (GET_MODE_SIZE (tmode) < max_size)
948 mode = tmode;
949
950 if (mode == VOIDmode)
951 break;
952
953 icode = mov_optab->handlers[(int) mode].insn_code;
954 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
955 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
956
957 max_size = GET_MODE_SIZE (mode);
958 }
959
960 /* The code above should have handled everything. */
961 gcc_assert (!data.len);
962
963 if (endp)
964 {
965 rtx to1;
966
967 gcc_assert (!data.reverse);
968 if (data.autinc_to)
969 {
970 if (endp == 2)
971 {
972 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
973 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
974 else
975 data.to_addr = copy_addr_to_reg (plus_constant (data.to_addr,
976 -1));
977 }
978 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
979 data.offset);
980 }
981 else
982 {
983 if (endp == 2)
984 --data.offset;
985 to1 = adjust_address (data.to, QImode, data.offset);
986 }
987 return to1;
988 }
989 else
990 return data.to;
991 }
992
993 /* Return number of insns required to move L bytes by pieces.
994 ALIGN (in bits) is maximum alignment we can assume. */
995
996 static unsigned HOST_WIDE_INT
997 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
998 unsigned int max_size)
999 {
1000 unsigned HOST_WIDE_INT n_insns = 0;
1001 enum machine_mode tmode;
1002
1003 tmode = mode_for_size (MOVE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
1004 if (align >= GET_MODE_ALIGNMENT (tmode))
1005 align = GET_MODE_ALIGNMENT (tmode);
1006 else
1007 {
1008 enum machine_mode tmode, xmode;
1009
1010 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
1011 tmode != VOIDmode;
1012 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
1013 if (GET_MODE_SIZE (tmode) > MOVE_MAX_PIECES
1014 || SLOW_UNALIGNED_ACCESS (tmode, align))
1015 break;
1016
1017 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
1018 }
1019
1020 while (max_size > 1)
1021 {
1022 enum machine_mode mode = VOIDmode;
1023 enum insn_code icode;
1024
1025 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
1026 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
1027 if (GET_MODE_SIZE (tmode) < max_size)
1028 mode = tmode;
1029
1030 if (mode == VOIDmode)
1031 break;
1032
1033 icode = mov_optab->handlers[(int) mode].insn_code;
1034 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1035 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1036
1037 max_size = GET_MODE_SIZE (mode);
1038 }
1039
1040 gcc_assert (!l);
1041 return n_insns;
1042 }
1043
1044 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1045 with move instructions for mode MODE. GENFUN is the gen_... function
1046 to make a move insn for that mode. DATA has all the other info. */
1047
1048 static void
1049 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1050 struct move_by_pieces *data)
1051 {
1052 unsigned int size = GET_MODE_SIZE (mode);
1053 rtx to1 = NULL_RTX, from1;
1054
1055 while (data->len >= size)
1056 {
1057 if (data->reverse)
1058 data->offset -= size;
1059
1060 if (data->to)
1061 {
1062 if (data->autinc_to)
1063 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1064 data->offset);
1065 else
1066 to1 = adjust_address (data->to, mode, data->offset);
1067 }
1068
1069 if (data->autinc_from)
1070 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1071 data->offset);
1072 else
1073 from1 = adjust_address (data->from, mode, data->offset);
1074
1075 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1076 emit_insn (gen_add2_insn (data->to_addr,
1077 GEN_INT (-(HOST_WIDE_INT)size)));
1078 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1079 emit_insn (gen_add2_insn (data->from_addr,
1080 GEN_INT (-(HOST_WIDE_INT)size)));
1081
1082 if (data->to)
1083 emit_insn ((*genfun) (to1, from1));
1084 else
1085 {
1086 #ifdef PUSH_ROUNDING
1087 emit_single_push_insn (mode, from1, NULL);
1088 #else
1089 gcc_unreachable ();
1090 #endif
1091 }
1092
1093 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1094 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1095 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1096 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1097
1098 if (! data->reverse)
1099 data->offset += size;
1100
1101 data->len -= size;
1102 }
1103 }
1104 \f
1105 /* Emit code to move a block Y to a block X. This may be done with
1106 string-move instructions, with multiple scalar move instructions,
1107 or with a library call.
1108
1109 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1110 SIZE is an rtx that says how long they are.
1111 ALIGN is the maximum alignment we can assume they have.
1112 METHOD describes what kind of copy this is, and what mechanisms may be used.
1113
1114 Return the address of the new block, if memcpy is called and returns it,
1115 0 otherwise. */
1116
1117 rtx
1118 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1119 {
1120 bool may_use_call;
1121 rtx retval = 0;
1122 unsigned int align;
1123
1124 switch (method)
1125 {
1126 case BLOCK_OP_NORMAL:
1127 may_use_call = true;
1128 break;
1129
1130 case BLOCK_OP_CALL_PARM:
1131 may_use_call = block_move_libcall_safe_for_call_parm ();
1132
1133 /* Make inhibit_defer_pop nonzero around the library call
1134 to force it to pop the arguments right away. */
1135 NO_DEFER_POP;
1136 break;
1137
1138 case BLOCK_OP_NO_LIBCALL:
1139 may_use_call = false;
1140 break;
1141
1142 default:
1143 gcc_unreachable ();
1144 }
1145
1146 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1147
1148 gcc_assert (MEM_P (x));
1149 gcc_assert (MEM_P (y));
1150 gcc_assert (size);
1151
1152 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1153 block copy is more efficient for other large modes, e.g. DCmode. */
1154 x = adjust_address (x, BLKmode, 0);
1155 y = adjust_address (y, BLKmode, 0);
1156
1157 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1158 can be incorrect is coming from __builtin_memcpy. */
1159 if (GET_CODE (size) == CONST_INT)
1160 {
1161 if (INTVAL (size) == 0)
1162 return 0;
1163
1164 x = shallow_copy_rtx (x);
1165 y = shallow_copy_rtx (y);
1166 set_mem_size (x, size);
1167 set_mem_size (y, size);
1168 }
1169
1170 if (GET_CODE (size) == CONST_INT && MOVE_BY_PIECES_P (INTVAL (size), align))
1171 move_by_pieces (x, y, INTVAL (size), align, 0);
1172 else if (emit_block_move_via_movmem (x, y, size, align))
1173 ;
1174 else if (may_use_call)
1175 retval = emit_block_move_via_libcall (x, y, size);
1176 else
1177 emit_block_move_via_loop (x, y, size, align);
1178
1179 if (method == BLOCK_OP_CALL_PARM)
1180 OK_DEFER_POP;
1181
1182 return retval;
1183 }
1184
1185 /* A subroutine of emit_block_move. Returns true if calling the
1186 block move libcall will not clobber any parameters which may have
1187 already been placed on the stack. */
1188
1189 static bool
1190 block_move_libcall_safe_for_call_parm (void)
1191 {
1192 /* If arguments are pushed on the stack, then they're safe. */
1193 if (PUSH_ARGS)
1194 return true;
1195
1196 /* If registers go on the stack anyway, any argument is sure to clobber
1197 an outgoing argument. */
1198 #if defined (REG_PARM_STACK_SPACE) && defined (OUTGOING_REG_PARM_STACK_SPACE)
1199 {
1200 tree fn = emit_block_move_libcall_fn (false);
1201 (void) fn;
1202 if (REG_PARM_STACK_SPACE (fn) != 0)
1203 return false;
1204 }
1205 #endif
1206
1207 /* If any argument goes in memory, then it might clobber an outgoing
1208 argument. */
1209 {
1210 CUMULATIVE_ARGS args_so_far;
1211 tree fn, arg;
1212
1213 fn = emit_block_move_libcall_fn (false);
1214 INIT_CUMULATIVE_ARGS (args_so_far, TREE_TYPE (fn), NULL_RTX, 0, 3);
1215
1216 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1217 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1218 {
1219 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1220 rtx tmp = FUNCTION_ARG (args_so_far, mode, NULL_TREE, 1);
1221 if (!tmp || !REG_P (tmp))
1222 return false;
1223 if (targetm.calls.arg_partial_bytes (&args_so_far, mode, NULL, 1))
1224 return false;
1225 FUNCTION_ARG_ADVANCE (args_so_far, mode, NULL_TREE, 1);
1226 }
1227 }
1228 return true;
1229 }
1230
1231 /* A subroutine of emit_block_move. Expand a movmem pattern;
1232 return true if successful. */
1233
1234 static bool
1235 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align)
1236 {
1237 rtx opalign = GEN_INT (align / BITS_PER_UNIT);
1238 int save_volatile_ok = volatile_ok;
1239 enum machine_mode mode;
1240
1241 /* Since this is a move insn, we don't care about volatility. */
1242 volatile_ok = 1;
1243
1244 /* Try the most limited insn first, because there's no point
1245 including more than one in the machine description unless
1246 the more limited one has some advantage. */
1247
1248 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1249 mode = GET_MODE_WIDER_MODE (mode))
1250 {
1251 enum insn_code code = movmem_optab[(int) mode];
1252 insn_operand_predicate_fn pred;
1253
1254 if (code != CODE_FOR_nothing
1255 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1256 here because if SIZE is less than the mode mask, as it is
1257 returned by the macro, it will definitely be less than the
1258 actual mode mask. */
1259 && ((GET_CODE (size) == CONST_INT
1260 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1261 <= (GET_MODE_MASK (mode) >> 1)))
1262 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD)
1263 && ((pred = insn_data[(int) code].operand[0].predicate) == 0
1264 || (*pred) (x, BLKmode))
1265 && ((pred = insn_data[(int) code].operand[1].predicate) == 0
1266 || (*pred) (y, BLKmode))
1267 && ((pred = insn_data[(int) code].operand[3].predicate) == 0
1268 || (*pred) (opalign, VOIDmode)))
1269 {
1270 rtx op2;
1271 rtx last = get_last_insn ();
1272 rtx pat;
1273
1274 op2 = convert_to_mode (mode, size, 1);
1275 pred = insn_data[(int) code].operand[2].predicate;
1276 if (pred != 0 && ! (*pred) (op2, mode))
1277 op2 = copy_to_mode_reg (mode, op2);
1278
1279 /* ??? When called via emit_block_move_for_call, it'd be
1280 nice if there were some way to inform the backend, so
1281 that it doesn't fail the expansion because it thinks
1282 emitting the libcall would be more efficient. */
1283
1284 pat = GEN_FCN ((int) code) (x, y, op2, opalign);
1285 if (pat)
1286 {
1287 emit_insn (pat);
1288 volatile_ok = save_volatile_ok;
1289 return true;
1290 }
1291 else
1292 delete_insns_since (last);
1293 }
1294 }
1295
1296 volatile_ok = save_volatile_ok;
1297 return false;
1298 }
1299
1300 /* A subroutine of emit_block_move. Expand a call to memcpy.
1301 Return the return value from memcpy, 0 otherwise. */
1302
1303 static rtx
1304 emit_block_move_via_libcall (rtx dst, rtx src, rtx size)
1305 {
1306 rtx dst_addr, src_addr;
1307 tree call_expr, arg_list, fn, src_tree, dst_tree, size_tree;
1308 enum machine_mode size_mode;
1309 rtx retval;
1310
1311 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1312 pseudos. We can then place those new pseudos into a VAR_DECL and
1313 use them later. */
1314
1315 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1316 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1317
1318 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1319 src_addr = convert_memory_address (ptr_mode, src_addr);
1320
1321 dst_tree = make_tree (ptr_type_node, dst_addr);
1322 src_tree = make_tree (ptr_type_node, src_addr);
1323
1324 size_mode = TYPE_MODE (sizetype);
1325
1326 size = convert_to_mode (size_mode, size, 1);
1327 size = copy_to_mode_reg (size_mode, size);
1328
1329 /* It is incorrect to use the libcall calling conventions to call
1330 memcpy in this context. This could be a user call to memcpy and
1331 the user may wish to examine the return value from memcpy. For
1332 targets where libcalls and normal calls have different conventions
1333 for returning pointers, we could end up generating incorrect code. */
1334
1335 size_tree = make_tree (sizetype, size);
1336
1337 fn = emit_block_move_libcall_fn (true);
1338 arg_list = tree_cons (NULL_TREE, size_tree, NULL_TREE);
1339 arg_list = tree_cons (NULL_TREE, src_tree, arg_list);
1340 arg_list = tree_cons (NULL_TREE, dst_tree, arg_list);
1341
1342 /* Now we have to build up the CALL_EXPR itself. */
1343 call_expr = build1 (ADDR_EXPR, build_pointer_type (TREE_TYPE (fn)), fn);
1344 call_expr = build3 (CALL_EXPR, TREE_TYPE (TREE_TYPE (fn)),
1345 call_expr, arg_list, NULL_TREE);
1346
1347 retval = expand_expr (call_expr, NULL_RTX, VOIDmode, 0);
1348
1349 return retval;
1350 }
1351
1352 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1353 for the function we use for block copies. The first time FOR_CALL
1354 is true, we call assemble_external. */
1355
1356 static GTY(()) tree block_move_fn;
1357
1358 void
1359 init_block_move_fn (const char *asmspec)
1360 {
1361 if (!block_move_fn)
1362 {
1363 tree args, fn;
1364
1365 fn = get_identifier ("memcpy");
1366 args = build_function_type_list (ptr_type_node, ptr_type_node,
1367 const_ptr_type_node, sizetype,
1368 NULL_TREE);
1369
1370 fn = build_decl (FUNCTION_DECL, fn, args);
1371 DECL_EXTERNAL (fn) = 1;
1372 TREE_PUBLIC (fn) = 1;
1373 DECL_ARTIFICIAL (fn) = 1;
1374 TREE_NOTHROW (fn) = 1;
1375
1376 block_move_fn = fn;
1377 }
1378
1379 if (asmspec)
1380 set_user_assembler_name (block_move_fn, asmspec);
1381 }
1382
1383 static tree
1384 emit_block_move_libcall_fn (int for_call)
1385 {
1386 static bool emitted_extern;
1387
1388 if (!block_move_fn)
1389 init_block_move_fn (NULL);
1390
1391 if (for_call && !emitted_extern)
1392 {
1393 emitted_extern = true;
1394 make_decl_rtl (block_move_fn);
1395 assemble_external (block_move_fn);
1396 }
1397
1398 return block_move_fn;
1399 }
1400
1401 /* A subroutine of emit_block_move. Copy the data via an explicit
1402 loop. This is used only when libcalls are forbidden. */
1403 /* ??? It'd be nice to copy in hunks larger than QImode. */
1404
1405 static void
1406 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1407 unsigned int align ATTRIBUTE_UNUSED)
1408 {
1409 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1410 enum machine_mode iter_mode;
1411
1412 iter_mode = GET_MODE (size);
1413 if (iter_mode == VOIDmode)
1414 iter_mode = word_mode;
1415
1416 top_label = gen_label_rtx ();
1417 cmp_label = gen_label_rtx ();
1418 iter = gen_reg_rtx (iter_mode);
1419
1420 emit_move_insn (iter, const0_rtx);
1421
1422 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1423 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1424 do_pending_stack_adjust ();
1425
1426 emit_jump (cmp_label);
1427 emit_label (top_label);
1428
1429 tmp = convert_modes (Pmode, iter_mode, iter, true);
1430 x_addr = gen_rtx_PLUS (Pmode, x_addr, tmp);
1431 y_addr = gen_rtx_PLUS (Pmode, y_addr, tmp);
1432 x = change_address (x, QImode, x_addr);
1433 y = change_address (y, QImode, y_addr);
1434
1435 emit_move_insn (x, y);
1436
1437 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1438 true, OPTAB_LIB_WIDEN);
1439 if (tmp != iter)
1440 emit_move_insn (iter, tmp);
1441
1442 emit_label (cmp_label);
1443
1444 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1445 true, top_label);
1446 }
1447 \f
1448 /* Copy all or part of a value X into registers starting at REGNO.
1449 The number of registers to be filled is NREGS. */
1450
1451 void
1452 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1453 {
1454 int i;
1455 #ifdef HAVE_load_multiple
1456 rtx pat;
1457 rtx last;
1458 #endif
1459
1460 if (nregs == 0)
1461 return;
1462
1463 if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
1464 x = validize_mem (force_const_mem (mode, x));
1465
1466 /* See if the machine can do this with a load multiple insn. */
1467 #ifdef HAVE_load_multiple
1468 if (HAVE_load_multiple)
1469 {
1470 last = get_last_insn ();
1471 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1472 GEN_INT (nregs));
1473 if (pat)
1474 {
1475 emit_insn (pat);
1476 return;
1477 }
1478 else
1479 delete_insns_since (last);
1480 }
1481 #endif
1482
1483 for (i = 0; i < nregs; i++)
1484 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1485 operand_subword_force (x, i, mode));
1486 }
1487
1488 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1489 The number of registers to be filled is NREGS. */
1490
1491 void
1492 move_block_from_reg (int regno, rtx x, int nregs)
1493 {
1494 int i;
1495
1496 if (nregs == 0)
1497 return;
1498
1499 /* See if the machine can do this with a store multiple insn. */
1500 #ifdef HAVE_store_multiple
1501 if (HAVE_store_multiple)
1502 {
1503 rtx last = get_last_insn ();
1504 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1505 GEN_INT (nregs));
1506 if (pat)
1507 {
1508 emit_insn (pat);
1509 return;
1510 }
1511 else
1512 delete_insns_since (last);
1513 }
1514 #endif
1515
1516 for (i = 0; i < nregs; i++)
1517 {
1518 rtx tem = operand_subword (x, i, 1, BLKmode);
1519
1520 gcc_assert (tem);
1521
1522 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1523 }
1524 }
1525
1526 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1527 ORIG, where ORIG is a non-consecutive group of registers represented by
1528 a PARALLEL. The clone is identical to the original except in that the
1529 original set of registers is replaced by a new set of pseudo registers.
1530 The new set has the same modes as the original set. */
1531
1532 rtx
1533 gen_group_rtx (rtx orig)
1534 {
1535 int i, length;
1536 rtx *tmps;
1537
1538 gcc_assert (GET_CODE (orig) == PARALLEL);
1539
1540 length = XVECLEN (orig, 0);
1541 tmps = alloca (sizeof (rtx) * length);
1542
1543 /* Skip a NULL entry in first slot. */
1544 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1545
1546 if (i)
1547 tmps[0] = 0;
1548
1549 for (; i < length; i++)
1550 {
1551 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1552 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1553
1554 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1555 }
1556
1557 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1558 }
1559
1560 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1561 except that values are placed in TMPS[i], and must later be moved
1562 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1563
1564 static void
1565 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1566 {
1567 rtx src;
1568 int start, i;
1569 enum machine_mode m = GET_MODE (orig_src);
1570
1571 gcc_assert (GET_CODE (dst) == PARALLEL);
1572
1573 if (m != VOIDmode
1574 && !SCALAR_INT_MODE_P (m)
1575 && !MEM_P (orig_src)
1576 && GET_CODE (orig_src) != CONCAT)
1577 {
1578 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1579 if (imode == BLKmode)
1580 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1581 else
1582 src = gen_reg_rtx (imode);
1583 if (imode != BLKmode)
1584 src = gen_lowpart (GET_MODE (orig_src), src);
1585 emit_move_insn (src, orig_src);
1586 /* ...and back again. */
1587 if (imode != BLKmode)
1588 src = gen_lowpart (imode, src);
1589 emit_group_load_1 (tmps, dst, src, type, ssize);
1590 return;
1591 }
1592
1593 /* Check for a NULL entry, used to indicate that the parameter goes
1594 both on the stack and in registers. */
1595 if (XEXP (XVECEXP (dst, 0, 0), 0))
1596 start = 0;
1597 else
1598 start = 1;
1599
1600 /* Process the pieces. */
1601 for (i = start; i < XVECLEN (dst, 0); i++)
1602 {
1603 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1604 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1605 unsigned int bytelen = GET_MODE_SIZE (mode);
1606 int shift = 0;
1607
1608 /* Handle trailing fragments that run over the size of the struct. */
1609 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1610 {
1611 /* Arrange to shift the fragment to where it belongs.
1612 extract_bit_field loads to the lsb of the reg. */
1613 if (
1614 #ifdef BLOCK_REG_PADDING
1615 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1616 == (BYTES_BIG_ENDIAN ? upward : downward)
1617 #else
1618 BYTES_BIG_ENDIAN
1619 #endif
1620 )
1621 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1622 bytelen = ssize - bytepos;
1623 gcc_assert (bytelen > 0);
1624 }
1625
1626 /* If we won't be loading directly from memory, protect the real source
1627 from strange tricks we might play; but make sure that the source can
1628 be loaded directly into the destination. */
1629 src = orig_src;
1630 if (!MEM_P (orig_src)
1631 && (!CONSTANT_P (orig_src)
1632 || (GET_MODE (orig_src) != mode
1633 && GET_MODE (orig_src) != VOIDmode)))
1634 {
1635 if (GET_MODE (orig_src) == VOIDmode)
1636 src = gen_reg_rtx (mode);
1637 else
1638 src = gen_reg_rtx (GET_MODE (orig_src));
1639
1640 emit_move_insn (src, orig_src);
1641 }
1642
1643 /* Optimize the access just a bit. */
1644 if (MEM_P (src)
1645 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1646 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1647 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1648 && bytelen == GET_MODE_SIZE (mode))
1649 {
1650 tmps[i] = gen_reg_rtx (mode);
1651 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1652 }
1653 else if (COMPLEX_MODE_P (mode)
1654 && GET_MODE (src) == mode
1655 && bytelen == GET_MODE_SIZE (mode))
1656 /* Let emit_move_complex do the bulk of the work. */
1657 tmps[i] = src;
1658 else if (GET_CODE (src) == CONCAT)
1659 {
1660 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1661 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1662
1663 if ((bytepos == 0 && bytelen == slen0)
1664 || (bytepos != 0 && bytepos + bytelen <= slen))
1665 {
1666 /* The following assumes that the concatenated objects all
1667 have the same size. In this case, a simple calculation
1668 can be used to determine the object and the bit field
1669 to be extracted. */
1670 tmps[i] = XEXP (src, bytepos / slen0);
1671 if (! CONSTANT_P (tmps[i])
1672 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1673 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1674 (bytepos % slen0) * BITS_PER_UNIT,
1675 1, NULL_RTX, mode, mode);
1676 }
1677 else
1678 {
1679 rtx mem;
1680
1681 gcc_assert (!bytepos);
1682 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1683 emit_move_insn (mem, src);
1684 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1685 0, 1, NULL_RTX, mode, mode);
1686 }
1687 }
1688 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1689 SIMD register, which is currently broken. While we get GCC
1690 to emit proper RTL for these cases, let's dump to memory. */
1691 else if (VECTOR_MODE_P (GET_MODE (dst))
1692 && REG_P (src))
1693 {
1694 int slen = GET_MODE_SIZE (GET_MODE (src));
1695 rtx mem;
1696
1697 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1698 emit_move_insn (mem, src);
1699 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1700 }
1701 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1702 && XVECLEN (dst, 0) > 1)
1703 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1704 else if (CONSTANT_P (src)
1705 || (REG_P (src) && GET_MODE (src) == mode))
1706 tmps[i] = src;
1707 else
1708 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1709 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
1710 mode, mode);
1711
1712 if (shift)
1713 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1714 build_int_cst (NULL_TREE, shift), tmps[i], 0);
1715 }
1716 }
1717
1718 /* Emit code to move a block SRC of type TYPE to a block DST,
1719 where DST is non-consecutive registers represented by a PARALLEL.
1720 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1721 if not known. */
1722
1723 void
1724 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1725 {
1726 rtx *tmps;
1727 int i;
1728
1729 tmps = alloca (sizeof (rtx) * XVECLEN (dst, 0));
1730 emit_group_load_1 (tmps, dst, src, type, ssize);
1731
1732 /* Copy the extracted pieces into the proper (probable) hard regs. */
1733 for (i = 0; i < XVECLEN (dst, 0); i++)
1734 {
1735 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1736 if (d == NULL)
1737 continue;
1738 emit_move_insn (d, tmps[i]);
1739 }
1740 }
1741
1742 /* Similar, but load SRC into new pseudos in a format that looks like
1743 PARALLEL. This can later be fed to emit_group_move to get things
1744 in the right place. */
1745
1746 rtx
1747 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1748 {
1749 rtvec vec;
1750 int i;
1751
1752 vec = rtvec_alloc (XVECLEN (parallel, 0));
1753 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1754
1755 /* Convert the vector to look just like the original PARALLEL, except
1756 with the computed values. */
1757 for (i = 0; i < XVECLEN (parallel, 0); i++)
1758 {
1759 rtx e = XVECEXP (parallel, 0, i);
1760 rtx d = XEXP (e, 0);
1761
1762 if (d)
1763 {
1764 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1765 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1766 }
1767 RTVEC_ELT (vec, i) = e;
1768 }
1769
1770 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1771 }
1772
1773 /* Emit code to move a block SRC to block DST, where SRC and DST are
1774 non-consecutive groups of registers, each represented by a PARALLEL. */
1775
1776 void
1777 emit_group_move (rtx dst, rtx src)
1778 {
1779 int i;
1780
1781 gcc_assert (GET_CODE (src) == PARALLEL
1782 && GET_CODE (dst) == PARALLEL
1783 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1784
1785 /* Skip first entry if NULL. */
1786 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1787 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1788 XEXP (XVECEXP (src, 0, i), 0));
1789 }
1790
1791 /* Move a group of registers represented by a PARALLEL into pseudos. */
1792
1793 rtx
1794 emit_group_move_into_temps (rtx src)
1795 {
1796 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1797 int i;
1798
1799 for (i = 0; i < XVECLEN (src, 0); i++)
1800 {
1801 rtx e = XVECEXP (src, 0, i);
1802 rtx d = XEXP (e, 0);
1803
1804 if (d)
1805 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1806 RTVEC_ELT (vec, i) = e;
1807 }
1808
1809 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1810 }
1811
1812 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1813 where SRC is non-consecutive registers represented by a PARALLEL.
1814 SSIZE represents the total size of block ORIG_DST, or -1 if not
1815 known. */
1816
1817 void
1818 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1819 {
1820 rtx *tmps, dst;
1821 int start, i;
1822 enum machine_mode m = GET_MODE (orig_dst);
1823
1824 gcc_assert (GET_CODE (src) == PARALLEL);
1825
1826 if (!SCALAR_INT_MODE_P (m)
1827 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1828 {
1829 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1830 if (imode == BLKmode)
1831 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1832 else
1833 dst = gen_reg_rtx (imode);
1834 emit_group_store (dst, src, type, ssize);
1835 if (imode != BLKmode)
1836 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1837 emit_move_insn (orig_dst, dst);
1838 return;
1839 }
1840
1841 /* Check for a NULL entry, used to indicate that the parameter goes
1842 both on the stack and in registers. */
1843 if (XEXP (XVECEXP (src, 0, 0), 0))
1844 start = 0;
1845 else
1846 start = 1;
1847
1848 tmps = alloca (sizeof (rtx) * XVECLEN (src, 0));
1849
1850 /* Copy the (probable) hard regs into pseudos. */
1851 for (i = start; i < XVECLEN (src, 0); i++)
1852 {
1853 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1854 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1855 emit_move_insn (tmps[i], reg);
1856 }
1857
1858 /* If we won't be storing directly into memory, protect the real destination
1859 from strange tricks we might play. */
1860 dst = orig_dst;
1861 if (GET_CODE (dst) == PARALLEL)
1862 {
1863 rtx temp;
1864
1865 /* We can get a PARALLEL dst if there is a conditional expression in
1866 a return statement. In that case, the dst and src are the same,
1867 so no action is necessary. */
1868 if (rtx_equal_p (dst, src))
1869 return;
1870
1871 /* It is unclear if we can ever reach here, but we may as well handle
1872 it. Allocate a temporary, and split this into a store/load to/from
1873 the temporary. */
1874
1875 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1876 emit_group_store (temp, src, type, ssize);
1877 emit_group_load (dst, temp, type, ssize);
1878 return;
1879 }
1880 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1881 {
1882 dst = gen_reg_rtx (GET_MODE (orig_dst));
1883 /* Make life a bit easier for combine. */
1884 emit_move_insn (dst, CONST0_RTX (GET_MODE (orig_dst)));
1885 }
1886
1887 /* Process the pieces. */
1888 for (i = start; i < XVECLEN (src, 0); i++)
1889 {
1890 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
1891 enum machine_mode mode = GET_MODE (tmps[i]);
1892 unsigned int bytelen = GET_MODE_SIZE (mode);
1893 rtx dest = dst;
1894
1895 /* Handle trailing fragments that run over the size of the struct. */
1896 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1897 {
1898 /* store_bit_field always takes its value from the lsb.
1899 Move the fragment to the lsb if it's not already there. */
1900 if (
1901 #ifdef BLOCK_REG_PADDING
1902 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
1903 == (BYTES_BIG_ENDIAN ? upward : downward)
1904 #else
1905 BYTES_BIG_ENDIAN
1906 #endif
1907 )
1908 {
1909 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1910 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
1911 build_int_cst (NULL_TREE, shift),
1912 tmps[i], 0);
1913 }
1914 bytelen = ssize - bytepos;
1915 }
1916
1917 if (GET_CODE (dst) == CONCAT)
1918 {
1919 if (bytepos + bytelen <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
1920 dest = XEXP (dst, 0);
1921 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
1922 {
1923 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
1924 dest = XEXP (dst, 1);
1925 }
1926 else
1927 {
1928 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
1929 dest = assign_stack_temp (GET_MODE (dest),
1930 GET_MODE_SIZE (GET_MODE (dest)), 0);
1931 emit_move_insn (adjust_address (dest, GET_MODE (tmps[i]), bytepos),
1932 tmps[i]);
1933 dst = dest;
1934 break;
1935 }
1936 }
1937
1938 /* Optimize the access just a bit. */
1939 if (MEM_P (dest)
1940 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
1941 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
1942 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1943 && bytelen == GET_MODE_SIZE (mode))
1944 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
1945 else
1946 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
1947 mode, tmps[i]);
1948 }
1949
1950 /* Copy from the pseudo into the (probable) hard reg. */
1951 if (orig_dst != dst)
1952 emit_move_insn (orig_dst, dst);
1953 }
1954
1955 /* Generate code to copy a BLKmode object of TYPE out of a
1956 set of registers starting with SRCREG into TGTBLK. If TGTBLK
1957 is null, a stack temporary is created. TGTBLK is returned.
1958
1959 The purpose of this routine is to handle functions that return
1960 BLKmode structures in registers. Some machines (the PA for example)
1961 want to return all small structures in registers regardless of the
1962 structure's alignment. */
1963
1964 rtx
1965 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
1966 {
1967 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
1968 rtx src = NULL, dst = NULL;
1969 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
1970 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
1971
1972 if (tgtblk == 0)
1973 {
1974 tgtblk = assign_temp (build_qualified_type (type,
1975 (TYPE_QUALS (type)
1976 | TYPE_QUAL_CONST)),
1977 0, 1, 1);
1978 preserve_temp_slots (tgtblk);
1979 }
1980
1981 /* This code assumes srcreg is at least a full word. If it isn't, copy it
1982 into a new pseudo which is a full word. */
1983
1984 if (GET_MODE (srcreg) != BLKmode
1985 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
1986 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
1987
1988 /* If the structure doesn't take up a whole number of words, see whether
1989 SRCREG is padded on the left or on the right. If it's on the left,
1990 set PADDING_CORRECTION to the number of bits to skip.
1991
1992 In most ABIs, the structure will be returned at the least end of
1993 the register, which translates to right padding on little-endian
1994 targets and left padding on big-endian targets. The opposite
1995 holds if the structure is returned at the most significant
1996 end of the register. */
1997 if (bytes % UNITS_PER_WORD != 0
1998 && (targetm.calls.return_in_msb (type)
1999 ? !BYTES_BIG_ENDIAN
2000 : BYTES_BIG_ENDIAN))
2001 padding_correction
2002 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2003
2004 /* Copy the structure BITSIZE bites at a time.
2005
2006 We could probably emit more efficient code for machines which do not use
2007 strict alignment, but it doesn't seem worth the effort at the current
2008 time. */
2009 for (bitpos = 0, xbitpos = padding_correction;
2010 bitpos < bytes * BITS_PER_UNIT;
2011 bitpos += bitsize, xbitpos += bitsize)
2012 {
2013 /* We need a new source operand each time xbitpos is on a
2014 word boundary and when xbitpos == padding_correction
2015 (the first time through). */
2016 if (xbitpos % BITS_PER_WORD == 0
2017 || xbitpos == padding_correction)
2018 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2019 GET_MODE (srcreg));
2020
2021 /* We need a new destination operand each time bitpos is on
2022 a word boundary. */
2023 if (bitpos % BITS_PER_WORD == 0)
2024 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2025
2026 /* Use xbitpos for the source extraction (right justified) and
2027 xbitpos for the destination store (left justified). */
2028 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, word_mode,
2029 extract_bit_field (src, bitsize,
2030 xbitpos % BITS_PER_WORD, 1,
2031 NULL_RTX, word_mode, word_mode));
2032 }
2033
2034 return tgtblk;
2035 }
2036
2037 /* Add a USE expression for REG to the (possibly empty) list pointed
2038 to by CALL_FUSAGE. REG must denote a hard register. */
2039
2040 void
2041 use_reg (rtx *call_fusage, rtx reg)
2042 {
2043 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2044
2045 *call_fusage
2046 = gen_rtx_EXPR_LIST (VOIDmode,
2047 gen_rtx_USE (VOIDmode, reg), *call_fusage);
2048 }
2049
2050 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2051 starting at REGNO. All of these registers must be hard registers. */
2052
2053 void
2054 use_regs (rtx *call_fusage, int regno, int nregs)
2055 {
2056 int i;
2057
2058 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2059
2060 for (i = 0; i < nregs; i++)
2061 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2062 }
2063
2064 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2065 PARALLEL REGS. This is for calls that pass values in multiple
2066 non-contiguous locations. The Irix 6 ABI has examples of this. */
2067
2068 void
2069 use_group_regs (rtx *call_fusage, rtx regs)
2070 {
2071 int i;
2072
2073 for (i = 0; i < XVECLEN (regs, 0); i++)
2074 {
2075 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2076
2077 /* A NULL entry means the parameter goes both on the stack and in
2078 registers. This can also be a MEM for targets that pass values
2079 partially on the stack and partially in registers. */
2080 if (reg != 0 && REG_P (reg))
2081 use_reg (call_fusage, reg);
2082 }
2083 }
2084 \f
2085
2086 /* Determine whether the LEN bytes generated by CONSTFUN can be
2087 stored to memory using several move instructions. CONSTFUNDATA is
2088 a pointer which will be passed as argument in every CONSTFUN call.
2089 ALIGN is maximum alignment we can assume. Return nonzero if a
2090 call to store_by_pieces should succeed. */
2091
2092 int
2093 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2094 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2095 void *constfundata, unsigned int align)
2096 {
2097 unsigned HOST_WIDE_INT l;
2098 unsigned int max_size;
2099 HOST_WIDE_INT offset = 0;
2100 enum machine_mode mode, tmode;
2101 enum insn_code icode;
2102 int reverse;
2103 rtx cst;
2104
2105 if (len == 0)
2106 return 1;
2107
2108 if (! STORE_BY_PIECES_P (len, align))
2109 return 0;
2110
2111 tmode = mode_for_size (STORE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
2112 if (align >= GET_MODE_ALIGNMENT (tmode))
2113 align = GET_MODE_ALIGNMENT (tmode);
2114 else
2115 {
2116 enum machine_mode xmode;
2117
2118 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
2119 tmode != VOIDmode;
2120 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
2121 if (GET_MODE_SIZE (tmode) > STORE_MAX_PIECES
2122 || SLOW_UNALIGNED_ACCESS (tmode, align))
2123 break;
2124
2125 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
2126 }
2127
2128 /* We would first store what we can in the largest integer mode, then go to
2129 successively smaller modes. */
2130
2131 for (reverse = 0;
2132 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2133 reverse++)
2134 {
2135 l = len;
2136 mode = VOIDmode;
2137 max_size = STORE_MAX_PIECES + 1;
2138 while (max_size > 1)
2139 {
2140 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2141 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2142 if (GET_MODE_SIZE (tmode) < max_size)
2143 mode = tmode;
2144
2145 if (mode == VOIDmode)
2146 break;
2147
2148 icode = mov_optab->handlers[(int) mode].insn_code;
2149 if (icode != CODE_FOR_nothing
2150 && align >= GET_MODE_ALIGNMENT (mode))
2151 {
2152 unsigned int size = GET_MODE_SIZE (mode);
2153
2154 while (l >= size)
2155 {
2156 if (reverse)
2157 offset -= size;
2158
2159 cst = (*constfun) (constfundata, offset, mode);
2160 if (!LEGITIMATE_CONSTANT_P (cst))
2161 return 0;
2162
2163 if (!reverse)
2164 offset += size;
2165
2166 l -= size;
2167 }
2168 }
2169
2170 max_size = GET_MODE_SIZE (mode);
2171 }
2172
2173 /* The code above should have handled everything. */
2174 gcc_assert (!l);
2175 }
2176
2177 return 1;
2178 }
2179
2180 /* Generate several move instructions to store LEN bytes generated by
2181 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2182 pointer which will be passed as argument in every CONSTFUN call.
2183 ALIGN is maximum alignment we can assume.
2184 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2185 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2186 stpcpy. */
2187
2188 rtx
2189 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2190 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2191 void *constfundata, unsigned int align, int endp)
2192 {
2193 struct store_by_pieces data;
2194
2195 if (len == 0)
2196 {
2197 gcc_assert (endp != 2);
2198 return to;
2199 }
2200
2201 gcc_assert (STORE_BY_PIECES_P (len, align));
2202 data.constfun = constfun;
2203 data.constfundata = constfundata;
2204 data.len = len;
2205 data.to = to;
2206 store_by_pieces_1 (&data, align);
2207 if (endp)
2208 {
2209 rtx to1;
2210
2211 gcc_assert (!data.reverse);
2212 if (data.autinc_to)
2213 {
2214 if (endp == 2)
2215 {
2216 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2217 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2218 else
2219 data.to_addr = copy_addr_to_reg (plus_constant (data.to_addr,
2220 -1));
2221 }
2222 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2223 data.offset);
2224 }
2225 else
2226 {
2227 if (endp == 2)
2228 --data.offset;
2229 to1 = adjust_address (data.to, QImode, data.offset);
2230 }
2231 return to1;
2232 }
2233 else
2234 return data.to;
2235 }
2236
2237 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2238 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2239
2240 static void
2241 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2242 {
2243 struct store_by_pieces data;
2244
2245 if (len == 0)
2246 return;
2247
2248 data.constfun = clear_by_pieces_1;
2249 data.constfundata = NULL;
2250 data.len = len;
2251 data.to = to;
2252 store_by_pieces_1 (&data, align);
2253 }
2254
2255 /* Callback routine for clear_by_pieces.
2256 Return const0_rtx unconditionally. */
2257
2258 static rtx
2259 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2260 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2261 enum machine_mode mode ATTRIBUTE_UNUSED)
2262 {
2263 return const0_rtx;
2264 }
2265
2266 /* Subroutine of clear_by_pieces and store_by_pieces.
2267 Generate several move instructions to store LEN bytes of block TO. (A MEM
2268 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2269
2270 static void
2271 store_by_pieces_1 (struct store_by_pieces *data ATTRIBUTE_UNUSED,
2272 unsigned int align ATTRIBUTE_UNUSED)
2273 {
2274 rtx to_addr = XEXP (data->to, 0);
2275 unsigned int max_size = STORE_MAX_PIECES + 1;
2276 enum machine_mode mode = VOIDmode, tmode;
2277 enum insn_code icode;
2278
2279 data->offset = 0;
2280 data->to_addr = to_addr;
2281 data->autinc_to
2282 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2283 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2284
2285 data->explicit_inc_to = 0;
2286 data->reverse
2287 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2288 if (data->reverse)
2289 data->offset = data->len;
2290
2291 /* If storing requires more than two move insns,
2292 copy addresses to registers (to make displacements shorter)
2293 and use post-increment if available. */
2294 if (!data->autinc_to
2295 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2296 {
2297 /* Determine the main mode we'll be using. */
2298 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2299 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2300 if (GET_MODE_SIZE (tmode) < max_size)
2301 mode = tmode;
2302
2303 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2304 {
2305 data->to_addr = copy_addr_to_reg (plus_constant (to_addr, data->len));
2306 data->autinc_to = 1;
2307 data->explicit_inc_to = -1;
2308 }
2309
2310 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2311 && ! data->autinc_to)
2312 {
2313 data->to_addr = copy_addr_to_reg (to_addr);
2314 data->autinc_to = 1;
2315 data->explicit_inc_to = 1;
2316 }
2317
2318 if ( !data->autinc_to && CONSTANT_P (to_addr))
2319 data->to_addr = copy_addr_to_reg (to_addr);
2320 }
2321
2322 tmode = mode_for_size (STORE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
2323 if (align >= GET_MODE_ALIGNMENT (tmode))
2324 align = GET_MODE_ALIGNMENT (tmode);
2325 else
2326 {
2327 enum machine_mode xmode;
2328
2329 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
2330 tmode != VOIDmode;
2331 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
2332 if (GET_MODE_SIZE (tmode) > STORE_MAX_PIECES
2333 || SLOW_UNALIGNED_ACCESS (tmode, align))
2334 break;
2335
2336 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
2337 }
2338
2339 /* First store what we can in the largest integer mode, then go to
2340 successively smaller modes. */
2341
2342 while (max_size > 1)
2343 {
2344 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2345 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2346 if (GET_MODE_SIZE (tmode) < max_size)
2347 mode = tmode;
2348
2349 if (mode == VOIDmode)
2350 break;
2351
2352 icode = mov_optab->handlers[(int) mode].insn_code;
2353 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2354 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2355
2356 max_size = GET_MODE_SIZE (mode);
2357 }
2358
2359 /* The code above should have handled everything. */
2360 gcc_assert (!data->len);
2361 }
2362
2363 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2364 with move instructions for mode MODE. GENFUN is the gen_... function
2365 to make a move insn for that mode. DATA has all the other info. */
2366
2367 static void
2368 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2369 struct store_by_pieces *data)
2370 {
2371 unsigned int size = GET_MODE_SIZE (mode);
2372 rtx to1, cst;
2373
2374 while (data->len >= size)
2375 {
2376 if (data->reverse)
2377 data->offset -= size;
2378
2379 if (data->autinc_to)
2380 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2381 data->offset);
2382 else
2383 to1 = adjust_address (data->to, mode, data->offset);
2384
2385 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2386 emit_insn (gen_add2_insn (data->to_addr,
2387 GEN_INT (-(HOST_WIDE_INT) size)));
2388
2389 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2390 emit_insn ((*genfun) (to1, cst));
2391
2392 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2393 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2394
2395 if (! data->reverse)
2396 data->offset += size;
2397
2398 data->len -= size;
2399 }
2400 }
2401 \f
2402 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2403 its length in bytes. */
2404
2405 rtx
2406 clear_storage (rtx object, rtx size)
2407 {
2408 enum machine_mode mode = GET_MODE (object);
2409 unsigned int align;
2410
2411 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2412 just move a zero. Otherwise, do this a piece at a time. */
2413 if (mode != BLKmode
2414 && GET_CODE (size) == CONST_INT
2415 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2416 {
2417 rtx zero = CONST0_RTX (mode);
2418 if (zero != NULL)
2419 {
2420 emit_move_insn (object, zero);
2421 return NULL;
2422 }
2423
2424 if (COMPLEX_MODE_P (mode))
2425 {
2426 zero = CONST0_RTX (GET_MODE_INNER (mode));
2427 if (zero != NULL)
2428 {
2429 write_complex_part (object, zero, 0);
2430 write_complex_part (object, zero, 1);
2431 return NULL;
2432 }
2433 }
2434 }
2435
2436 if (size == const0_rtx)
2437 return NULL;
2438
2439 align = MEM_ALIGN (object);
2440
2441 if (GET_CODE (size) == CONST_INT
2442 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2443 clear_by_pieces (object, INTVAL (size), align);
2444 else if (clear_storage_via_clrmem (object, size, align))
2445 ;
2446 else
2447 return clear_storage_via_libcall (object, size);
2448
2449 return NULL;
2450 }
2451
2452 /* A subroutine of clear_storage. Expand a clrmem pattern;
2453 return true if successful. */
2454
2455 static bool
2456 clear_storage_via_clrmem (rtx object, rtx size, unsigned int align)
2457 {
2458 /* Try the most limited insn first, because there's no point
2459 including more than one in the machine description unless
2460 the more limited one has some advantage. */
2461
2462 rtx opalign = GEN_INT (align / BITS_PER_UNIT);
2463 enum machine_mode mode;
2464
2465 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2466 mode = GET_MODE_WIDER_MODE (mode))
2467 {
2468 enum insn_code code = clrmem_optab[(int) mode];
2469 insn_operand_predicate_fn pred;
2470
2471 if (code != CODE_FOR_nothing
2472 /* We don't need MODE to be narrower than
2473 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2474 the mode mask, as it is returned by the macro, it will
2475 definitely be less than the actual mode mask. */
2476 && ((GET_CODE (size) == CONST_INT
2477 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2478 <= (GET_MODE_MASK (mode) >> 1)))
2479 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD)
2480 && ((pred = insn_data[(int) code].operand[0].predicate) == 0
2481 || (*pred) (object, BLKmode))
2482 && ((pred = insn_data[(int) code].operand[2].predicate) == 0
2483 || (*pred) (opalign, VOIDmode)))
2484 {
2485 rtx op1;
2486 rtx last = get_last_insn ();
2487 rtx pat;
2488
2489 op1 = convert_to_mode (mode, size, 1);
2490 pred = insn_data[(int) code].operand[1].predicate;
2491 if (pred != 0 && ! (*pred) (op1, mode))
2492 op1 = copy_to_mode_reg (mode, op1);
2493
2494 pat = GEN_FCN ((int) code) (object, op1, opalign);
2495 if (pat)
2496 {
2497 emit_insn (pat);
2498 return true;
2499 }
2500 else
2501 delete_insns_since (last);
2502 }
2503 }
2504
2505 return false;
2506 }
2507
2508 /* A subroutine of clear_storage. Expand a call to memset.
2509 Return the return value of memset, 0 otherwise. */
2510
2511 static rtx
2512 clear_storage_via_libcall (rtx object, rtx size)
2513 {
2514 tree call_expr, arg_list, fn, object_tree, size_tree;
2515 enum machine_mode size_mode;
2516 rtx retval;
2517
2518 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2519 place those into new pseudos into a VAR_DECL and use them later. */
2520
2521 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2522
2523 size_mode = TYPE_MODE (sizetype);
2524 size = convert_to_mode (size_mode, size, 1);
2525 size = copy_to_mode_reg (size_mode, size);
2526
2527 /* It is incorrect to use the libcall calling conventions to call
2528 memset in this context. This could be a user call to memset and
2529 the user may wish to examine the return value from memset. For
2530 targets where libcalls and normal calls have different conventions
2531 for returning pointers, we could end up generating incorrect code. */
2532
2533 object_tree = make_tree (ptr_type_node, object);
2534 size_tree = make_tree (sizetype, size);
2535
2536 fn = clear_storage_libcall_fn (true);
2537 arg_list = tree_cons (NULL_TREE, size_tree, NULL_TREE);
2538 arg_list = tree_cons (NULL_TREE, integer_zero_node, arg_list);
2539 arg_list = tree_cons (NULL_TREE, object_tree, arg_list);
2540
2541 /* Now we have to build up the CALL_EXPR itself. */
2542 call_expr = build1 (ADDR_EXPR, build_pointer_type (TREE_TYPE (fn)), fn);
2543 call_expr = build3 (CALL_EXPR, TREE_TYPE (TREE_TYPE (fn)),
2544 call_expr, arg_list, NULL_TREE);
2545
2546 retval = expand_expr (call_expr, NULL_RTX, VOIDmode, 0);
2547
2548 return retval;
2549 }
2550
2551 /* A subroutine of clear_storage_via_libcall. Create the tree node
2552 for the function we use for block clears. The first time FOR_CALL
2553 is true, we call assemble_external. */
2554
2555 static GTY(()) tree block_clear_fn;
2556
2557 void
2558 init_block_clear_fn (const char *asmspec)
2559 {
2560 if (!block_clear_fn)
2561 {
2562 tree fn, args;
2563
2564 fn = get_identifier ("memset");
2565 args = build_function_type_list (ptr_type_node, ptr_type_node,
2566 integer_type_node, sizetype,
2567 NULL_TREE);
2568
2569 fn = build_decl (FUNCTION_DECL, fn, args);
2570 DECL_EXTERNAL (fn) = 1;
2571 TREE_PUBLIC (fn) = 1;
2572 DECL_ARTIFICIAL (fn) = 1;
2573 TREE_NOTHROW (fn) = 1;
2574
2575 block_clear_fn = fn;
2576 }
2577
2578 if (asmspec)
2579 set_user_assembler_name (block_clear_fn, asmspec);
2580 }
2581
2582 static tree
2583 clear_storage_libcall_fn (int for_call)
2584 {
2585 static bool emitted_extern;
2586
2587 if (!block_clear_fn)
2588 init_block_clear_fn (NULL);
2589
2590 if (for_call && !emitted_extern)
2591 {
2592 emitted_extern = true;
2593 make_decl_rtl (block_clear_fn);
2594 assemble_external (block_clear_fn);
2595 }
2596
2597 return block_clear_fn;
2598 }
2599 \f
2600 /* Write to one of the components of the complex value CPLX. Write VAL to
2601 the real part if IMAG_P is false, and the imaginary part if its true. */
2602
2603 static void
2604 write_complex_part (rtx cplx, rtx val, bool imag_p)
2605 {
2606 enum machine_mode cmode;
2607 enum machine_mode imode;
2608 unsigned ibitsize;
2609
2610 if (GET_CODE (cplx) == CONCAT)
2611 {
2612 emit_move_insn (XEXP (cplx, imag_p), val);
2613 return;
2614 }
2615
2616 cmode = GET_MODE (cplx);
2617 imode = GET_MODE_INNER (cmode);
2618 ibitsize = GET_MODE_BITSIZE (imode);
2619
2620 /* If the sub-object is at least word sized, then we know that subregging
2621 will work. This special case is important, since store_bit_field
2622 wants to operate on integer modes, and there's rarely an OImode to
2623 correspond to TCmode. */
2624 if (ibitsize >= BITS_PER_WORD
2625 /* For hard regs we have exact predicates. Assume we can split
2626 the original object if it spans an even number of hard regs.
2627 This special case is important for SCmode on 64-bit platforms
2628 where the natural size of floating-point regs is 32-bit. */
2629 || (GET_CODE (cplx) == REG
2630 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2631 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0)
2632 /* For MEMs we always try to make a "subreg", that is to adjust
2633 the MEM, because store_bit_field may generate overly
2634 convoluted RTL for sub-word fields. */
2635 || MEM_P (cplx))
2636 {
2637 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2638 imag_p ? GET_MODE_SIZE (imode) : 0);
2639 if (part)
2640 {
2641 emit_move_insn (part, val);
2642 return;
2643 }
2644 else
2645 /* simplify_gen_subreg may fail for sub-word MEMs. */
2646 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2647 }
2648
2649 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, imode, val);
2650 }
2651
2652 /* Extract one of the components of the complex value CPLX. Extract the
2653 real part if IMAG_P is false, and the imaginary part if it's true. */
2654
2655 static rtx
2656 read_complex_part (rtx cplx, bool imag_p)
2657 {
2658 enum machine_mode cmode, imode;
2659 unsigned ibitsize;
2660
2661 if (GET_CODE (cplx) == CONCAT)
2662 return XEXP (cplx, imag_p);
2663
2664 cmode = GET_MODE (cplx);
2665 imode = GET_MODE_INNER (cmode);
2666 ibitsize = GET_MODE_BITSIZE (imode);
2667
2668 /* Special case reads from complex constants that got spilled to memory. */
2669 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2670 {
2671 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2672 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2673 {
2674 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2675 if (CONSTANT_CLASS_P (part))
2676 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2677 }
2678 }
2679
2680 /* If the sub-object is at least word sized, then we know that subregging
2681 will work. This special case is important, since extract_bit_field
2682 wants to operate on integer modes, and there's rarely an OImode to
2683 correspond to TCmode. */
2684 if (ibitsize >= BITS_PER_WORD
2685 /* For hard regs we have exact predicates. Assume we can split
2686 the original object if it spans an even number of hard regs.
2687 This special case is important for SCmode on 64-bit platforms
2688 where the natural size of floating-point regs is 32-bit. */
2689 || (GET_CODE (cplx) == REG
2690 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2691 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0)
2692 /* For MEMs we always try to make a "subreg", that is to adjust
2693 the MEM, because extract_bit_field may generate overly
2694 convoluted RTL for sub-word fields. */
2695 || MEM_P (cplx))
2696 {
2697 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2698 imag_p ? GET_MODE_SIZE (imode) : 0);
2699 if (ret)
2700 return ret;
2701 else
2702 /* simplify_gen_subreg may fail for sub-word MEMs. */
2703 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2704 }
2705
2706 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2707 true, NULL_RTX, imode, imode);
2708 }
2709 \f
2710 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2711 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2712 represented in NEW_MODE. If FORCE is true, this will never happen, as
2713 we'll force-create a SUBREG if needed. */
2714
2715 static rtx
2716 emit_move_change_mode (enum machine_mode new_mode,
2717 enum machine_mode old_mode, rtx x, bool force)
2718 {
2719 rtx ret;
2720
2721 if (reload_in_progress && MEM_P (x))
2722 {
2723 /* We can't use gen_lowpart here because it may call change_address
2724 which is not appropriate if we were called when a reload was in
2725 progress. We don't have to worry about changing the address since
2726 the size in bytes is supposed to be the same. Copy the MEM to
2727 change the mode and move any substitutions from the old MEM to
2728 the new one. */
2729
2730 ret = adjust_address_nv (x, new_mode, 0);
2731 copy_replacements (x, ret);
2732 }
2733 else
2734 {
2735 /* Note that we do want simplify_subreg's behavior of validating
2736 that the new mode is ok for a hard register. If we were to use
2737 simplify_gen_subreg, we would create the subreg, but would
2738 probably run into the target not being able to implement it. */
2739 /* Except, of course, when FORCE is true, when this is exactly what
2740 we want. Which is needed for CCmodes on some targets. */
2741 if (force)
2742 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
2743 else
2744 ret = simplify_subreg (new_mode, x, old_mode, 0);
2745 }
2746
2747 return ret;
2748 }
2749
2750 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
2751 an integer mode of the same size as MODE. Returns the instruction
2752 emitted, or NULL if such a move could not be generated. */
2753
2754 static rtx
2755 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y)
2756 {
2757 enum machine_mode imode;
2758 enum insn_code code;
2759
2760 /* There must exist a mode of the exact size we require. */
2761 imode = int_mode_for_mode (mode);
2762 if (imode == BLKmode)
2763 return NULL_RTX;
2764
2765 /* The target must support moves in this mode. */
2766 code = mov_optab->handlers[imode].insn_code;
2767 if (code == CODE_FOR_nothing)
2768 return NULL_RTX;
2769
2770 x = emit_move_change_mode (imode, mode, x, false);
2771 if (x == NULL_RTX)
2772 return NULL_RTX;
2773 y = emit_move_change_mode (imode, mode, y, false);
2774 if (y == NULL_RTX)
2775 return NULL_RTX;
2776 return emit_insn (GEN_FCN (code) (x, y));
2777 }
2778
2779 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
2780 Return an equivalent MEM that does not use an auto-increment. */
2781
2782 static rtx
2783 emit_move_resolve_push (enum machine_mode mode, rtx x)
2784 {
2785 enum rtx_code code = GET_CODE (XEXP (x, 0));
2786 HOST_WIDE_INT adjust;
2787 rtx temp;
2788
2789 adjust = GET_MODE_SIZE (mode);
2790 #ifdef PUSH_ROUNDING
2791 adjust = PUSH_ROUNDING (adjust);
2792 #endif
2793 if (code == PRE_DEC || code == POST_DEC)
2794 adjust = -adjust;
2795
2796 /* Do not use anti_adjust_stack, since we don't want to update
2797 stack_pointer_delta. */
2798 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
2799 GEN_INT (adjust), stack_pointer_rtx,
2800 0, OPTAB_LIB_WIDEN);
2801 if (temp != stack_pointer_rtx)
2802 emit_move_insn (stack_pointer_rtx, temp);
2803
2804 switch (code)
2805 {
2806 case PRE_INC:
2807 case PRE_DEC:
2808 temp = stack_pointer_rtx;
2809 break;
2810 case POST_INC:
2811 temp = plus_constant (stack_pointer_rtx, -GET_MODE_SIZE (mode));
2812 break;
2813 case POST_DEC:
2814 temp = plus_constant (stack_pointer_rtx, GET_MODE_SIZE (mode));
2815 break;
2816 default:
2817 gcc_unreachable ();
2818 }
2819
2820 return replace_equiv_address (x, temp);
2821 }
2822
2823 /* A subroutine of emit_move_complex. Generate a move from Y into X.
2824 X is known to satisfy push_operand, and MODE is known to be complex.
2825 Returns the last instruction emitted. */
2826
2827 static rtx
2828 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
2829 {
2830 enum machine_mode submode = GET_MODE_INNER (mode);
2831 bool imag_first;
2832
2833 #ifdef PUSH_ROUNDING
2834 unsigned int submodesize = GET_MODE_SIZE (submode);
2835
2836 /* In case we output to the stack, but the size is smaller than the
2837 machine can push exactly, we need to use move instructions. */
2838 if (PUSH_ROUNDING (submodesize) != submodesize)
2839 {
2840 x = emit_move_resolve_push (mode, x);
2841 return emit_move_insn (x, y);
2842 }
2843 #endif
2844
2845 /* Note that the real part always precedes the imag part in memory
2846 regardless of machine's endianness. */
2847 switch (GET_CODE (XEXP (x, 0)))
2848 {
2849 case PRE_DEC:
2850 case POST_DEC:
2851 imag_first = true;
2852 break;
2853 case PRE_INC:
2854 case POST_INC:
2855 imag_first = false;
2856 break;
2857 default:
2858 gcc_unreachable ();
2859 }
2860
2861 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
2862 read_complex_part (y, imag_first));
2863 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
2864 read_complex_part (y, !imag_first));
2865 }
2866
2867 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
2868 MODE is known to be complex. Returns the last instruction emitted. */
2869
2870 static rtx
2871 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
2872 {
2873 bool try_int;
2874
2875 /* Need to take special care for pushes, to maintain proper ordering
2876 of the data, and possibly extra padding. */
2877 if (push_operand (x, mode))
2878 return emit_move_complex_push (mode, x, y);
2879
2880 /* For memory to memory moves, optimal behavior can be had with the
2881 existing block move logic. */
2882 if (MEM_P (x) && MEM_P (y))
2883 {
2884 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
2885 BLOCK_OP_NO_LIBCALL);
2886 return get_last_insn ();
2887 }
2888
2889 /* See if we can coerce the target into moving both values at once. */
2890
2891 /* Not possible if the values are inherently not adjacent. */
2892 if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
2893 try_int = false;
2894 /* Is possible if both are registers (or subregs of registers). */
2895 else if (register_operand (x, mode) && register_operand (y, mode))
2896 try_int = true;
2897 /* If one of the operands is a memory, and alignment constraints
2898 are friendly enough, we may be able to do combined memory operations.
2899 We do not attempt this if Y is a constant because that combination is
2900 usually better with the by-parts thing below. */
2901 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
2902 && (!STRICT_ALIGNMENT
2903 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
2904 try_int = true;
2905 else
2906 try_int = false;
2907
2908 if (try_int)
2909 {
2910 rtx ret = emit_move_via_integer (mode, x, y);
2911 if (ret)
2912 return ret;
2913 }
2914
2915 /* Show the output dies here. This is necessary for SUBREGs
2916 of pseudos since we cannot track their lifetimes correctly;
2917 hard regs shouldn't appear here except as return values. */
2918 if (!reload_completed && !reload_in_progress
2919 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
2920 emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
2921
2922 write_complex_part (x, read_complex_part (y, false), false);
2923 write_complex_part (x, read_complex_part (y, true), true);
2924 return get_last_insn ();
2925 }
2926
2927 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
2928 MODE is known to be MODE_CC. Returns the last instruction emitted. */
2929
2930 static rtx
2931 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
2932 {
2933 rtx ret;
2934
2935 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
2936 if (mode != CCmode)
2937 {
2938 enum insn_code code = mov_optab->handlers[CCmode].insn_code;
2939 if (code != CODE_FOR_nothing)
2940 {
2941 x = emit_move_change_mode (CCmode, mode, x, true);
2942 y = emit_move_change_mode (CCmode, mode, y, true);
2943 return emit_insn (GEN_FCN (code) (x, y));
2944 }
2945 }
2946
2947 /* Otherwise, find the MODE_INT mode of the same width. */
2948 ret = emit_move_via_integer (mode, x, y);
2949 gcc_assert (ret != NULL);
2950 return ret;
2951 }
2952
2953 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
2954 MODE is any multi-word or full-word mode that lacks a move_insn
2955 pattern. Note that you will get better code if you define such
2956 patterns, even if they must turn into multiple assembler instructions. */
2957
2958 static rtx
2959 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
2960 {
2961 rtx last_insn = 0;
2962 rtx seq, inner;
2963 bool need_clobber;
2964 int i;
2965
2966 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
2967
2968 /* If X is a push on the stack, do the push now and replace
2969 X with a reference to the stack pointer. */
2970 if (push_operand (x, mode))
2971 x = emit_move_resolve_push (mode, x);
2972
2973 /* If we are in reload, see if either operand is a MEM whose address
2974 is scheduled for replacement. */
2975 if (reload_in_progress && MEM_P (x)
2976 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
2977 x = replace_equiv_address_nv (x, inner);
2978 if (reload_in_progress && MEM_P (y)
2979 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
2980 y = replace_equiv_address_nv (y, inner);
2981
2982 start_sequence ();
2983
2984 need_clobber = false;
2985 for (i = 0;
2986 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
2987 i++)
2988 {
2989 rtx xpart = operand_subword (x, i, 1, mode);
2990 rtx ypart = operand_subword (y, i, 1, mode);
2991
2992 /* If we can't get a part of Y, put Y into memory if it is a
2993 constant. Otherwise, force it into a register. If we still
2994 can't get a part of Y, abort. */
2995 if (ypart == 0 && CONSTANT_P (y))
2996 {
2997 y = force_const_mem (mode, y);
2998 ypart = operand_subword (y, i, 1, mode);
2999 }
3000 else if (ypart == 0)
3001 ypart = operand_subword_force (y, i, mode);
3002
3003 gcc_assert (xpart && ypart);
3004
3005 need_clobber |= (GET_CODE (xpart) == SUBREG);
3006
3007 last_insn = emit_move_insn (xpart, ypart);
3008 }
3009
3010 seq = get_insns ();
3011 end_sequence ();
3012
3013 /* Show the output dies here. This is necessary for SUBREGs
3014 of pseudos since we cannot track their lifetimes correctly;
3015 hard regs shouldn't appear here except as return values.
3016 We never want to emit such a clobber after reload. */
3017 if (x != y
3018 && ! (reload_in_progress || reload_completed)
3019 && need_clobber != 0)
3020 emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
3021
3022 emit_insn (seq);
3023
3024 return last_insn;
3025 }
3026
3027 /* Low level part of emit_move_insn.
3028 Called just like emit_move_insn, but assumes X and Y
3029 are basically valid. */
3030
3031 rtx
3032 emit_move_insn_1 (rtx x, rtx y)
3033 {
3034 enum machine_mode mode = GET_MODE (x);
3035 enum insn_code code;
3036
3037 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3038
3039 code = mov_optab->handlers[mode].insn_code;
3040 if (code != CODE_FOR_nothing)
3041 return emit_insn (GEN_FCN (code) (x, y));
3042
3043 /* Expand complex moves by moving real part and imag part. */
3044 if (COMPLEX_MODE_P (mode))
3045 return emit_move_complex (mode, x, y);
3046
3047 if (GET_MODE_CLASS (mode) == MODE_CC)
3048 return emit_move_ccmode (mode, x, y);
3049
3050 /* Try using a move pattern for the corresponding integer mode. This is
3051 only safe when simplify_subreg can convert MODE constants into integer
3052 constants. At present, it can only do this reliably if the value
3053 fits within a HOST_WIDE_INT. */
3054 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3055 {
3056 rtx ret = emit_move_via_integer (mode, x, y);
3057 if (ret)
3058 return ret;
3059 }
3060
3061 return emit_move_multi_word (mode, x, y);
3062 }
3063
3064 /* Generate code to copy Y into X.
3065 Both Y and X must have the same mode, except that
3066 Y can be a constant with VOIDmode.
3067 This mode cannot be BLKmode; use emit_block_move for that.
3068
3069 Return the last instruction emitted. */
3070
3071 rtx
3072 emit_move_insn (rtx x, rtx y)
3073 {
3074 enum machine_mode mode = GET_MODE (x);
3075 rtx y_cst = NULL_RTX;
3076 rtx last_insn, set;
3077
3078 gcc_assert (mode != BLKmode
3079 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3080
3081 if (CONSTANT_P (y))
3082 {
3083 if (optimize
3084 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3085 && (last_insn = compress_float_constant (x, y)))
3086 return last_insn;
3087
3088 y_cst = y;
3089
3090 if (!LEGITIMATE_CONSTANT_P (y))
3091 {
3092 y = force_const_mem (mode, y);
3093
3094 /* If the target's cannot_force_const_mem prevented the spill,
3095 assume that the target's move expanders will also take care
3096 of the non-legitimate constant. */
3097 if (!y)
3098 y = y_cst;
3099 }
3100 }
3101
3102 /* If X or Y are memory references, verify that their addresses are valid
3103 for the machine. */
3104 if (MEM_P (x)
3105 && ((! memory_address_p (GET_MODE (x), XEXP (x, 0))
3106 && ! push_operand (x, GET_MODE (x)))
3107 || (flag_force_addr
3108 && CONSTANT_ADDRESS_P (XEXP (x, 0)))))
3109 x = validize_mem (x);
3110
3111 if (MEM_P (y)
3112 && (! memory_address_p (GET_MODE (y), XEXP (y, 0))
3113 || (flag_force_addr
3114 && CONSTANT_ADDRESS_P (XEXP (y, 0)))))
3115 y = validize_mem (y);
3116
3117 gcc_assert (mode != BLKmode);
3118
3119 last_insn = emit_move_insn_1 (x, y);
3120
3121 if (y_cst && REG_P (x)
3122 && (set = single_set (last_insn)) != NULL_RTX
3123 && SET_DEST (set) == x
3124 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3125 set_unique_reg_note (last_insn, REG_EQUAL, y_cst);
3126
3127 return last_insn;
3128 }
3129
3130 /* If Y is representable exactly in a narrower mode, and the target can
3131 perform the extension directly from constant or memory, then emit the
3132 move as an extension. */
3133
3134 static rtx
3135 compress_float_constant (rtx x, rtx y)
3136 {
3137 enum machine_mode dstmode = GET_MODE (x);
3138 enum machine_mode orig_srcmode = GET_MODE (y);
3139 enum machine_mode srcmode;
3140 REAL_VALUE_TYPE r;
3141
3142 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3143
3144 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3145 srcmode != orig_srcmode;
3146 srcmode = GET_MODE_WIDER_MODE (srcmode))
3147 {
3148 enum insn_code ic;
3149 rtx trunc_y, last_insn;
3150
3151 /* Skip if the target can't extend this way. */
3152 ic = can_extend_p (dstmode, srcmode, 0);
3153 if (ic == CODE_FOR_nothing)
3154 continue;
3155
3156 /* Skip if the narrowed value isn't exact. */
3157 if (! exact_real_truncate (srcmode, &r))
3158 continue;
3159
3160 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3161
3162 if (LEGITIMATE_CONSTANT_P (trunc_y))
3163 {
3164 /* Skip if the target needs extra instructions to perform
3165 the extension. */
3166 if (! (*insn_data[ic].operand[1].predicate) (trunc_y, srcmode))
3167 continue;
3168 }
3169 else if (float_extend_from_mem[dstmode][srcmode])
3170 trunc_y = validize_mem (force_const_mem (srcmode, trunc_y));
3171 else
3172 continue;
3173
3174 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3175 last_insn = get_last_insn ();
3176
3177 if (REG_P (x))
3178 set_unique_reg_note (last_insn, REG_EQUAL, y);
3179
3180 return last_insn;
3181 }
3182
3183 return NULL_RTX;
3184 }
3185 \f
3186 /* Pushing data onto the stack. */
3187
3188 /* Push a block of length SIZE (perhaps variable)
3189 and return an rtx to address the beginning of the block.
3190 The value may be virtual_outgoing_args_rtx.
3191
3192 EXTRA is the number of bytes of padding to push in addition to SIZE.
3193 BELOW nonzero means this padding comes at low addresses;
3194 otherwise, the padding comes at high addresses. */
3195
3196 rtx
3197 push_block (rtx size, int extra, int below)
3198 {
3199 rtx temp;
3200
3201 size = convert_modes (Pmode, ptr_mode, size, 1);
3202 if (CONSTANT_P (size))
3203 anti_adjust_stack (plus_constant (size, extra));
3204 else if (REG_P (size) && extra == 0)
3205 anti_adjust_stack (size);
3206 else
3207 {
3208 temp = copy_to_mode_reg (Pmode, size);
3209 if (extra != 0)
3210 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3211 temp, 0, OPTAB_LIB_WIDEN);
3212 anti_adjust_stack (temp);
3213 }
3214
3215 #ifndef STACK_GROWS_DOWNWARD
3216 if (0)
3217 #else
3218 if (1)
3219 #endif
3220 {
3221 temp = virtual_outgoing_args_rtx;
3222 if (extra != 0 && below)
3223 temp = plus_constant (temp, extra);
3224 }
3225 else
3226 {
3227 if (GET_CODE (size) == CONST_INT)
3228 temp = plus_constant (virtual_outgoing_args_rtx,
3229 -INTVAL (size) - (below ? 0 : extra));
3230 else if (extra != 0 && !below)
3231 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3232 negate_rtx (Pmode, plus_constant (size, extra)));
3233 else
3234 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3235 negate_rtx (Pmode, size));
3236 }
3237
3238 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3239 }
3240
3241 #ifdef PUSH_ROUNDING
3242
3243 /* Emit single push insn. */
3244
3245 static void
3246 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3247 {
3248 rtx dest_addr;
3249 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3250 rtx dest;
3251 enum insn_code icode;
3252 insn_operand_predicate_fn pred;
3253
3254 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3255 /* If there is push pattern, use it. Otherwise try old way of throwing
3256 MEM representing push operation to move expander. */
3257 icode = push_optab->handlers[(int) mode].insn_code;
3258 if (icode != CODE_FOR_nothing)
3259 {
3260 if (((pred = insn_data[(int) icode].operand[0].predicate)
3261 && !((*pred) (x, mode))))
3262 x = force_reg (mode, x);
3263 emit_insn (GEN_FCN (icode) (x));
3264 return;
3265 }
3266 if (GET_MODE_SIZE (mode) == rounded_size)
3267 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3268 /* If we are to pad downward, adjust the stack pointer first and
3269 then store X into the stack location using an offset. This is
3270 because emit_move_insn does not know how to pad; it does not have
3271 access to type. */
3272 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3273 {
3274 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3275 HOST_WIDE_INT offset;
3276
3277 emit_move_insn (stack_pointer_rtx,
3278 expand_binop (Pmode,
3279 #ifdef STACK_GROWS_DOWNWARD
3280 sub_optab,
3281 #else
3282 add_optab,
3283 #endif
3284 stack_pointer_rtx,
3285 GEN_INT (rounded_size),
3286 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3287
3288 offset = (HOST_WIDE_INT) padding_size;
3289 #ifdef STACK_GROWS_DOWNWARD
3290 if (STACK_PUSH_CODE == POST_DEC)
3291 /* We have already decremented the stack pointer, so get the
3292 previous value. */
3293 offset += (HOST_WIDE_INT) rounded_size;
3294 #else
3295 if (STACK_PUSH_CODE == POST_INC)
3296 /* We have already incremented the stack pointer, so get the
3297 previous value. */
3298 offset -= (HOST_WIDE_INT) rounded_size;
3299 #endif
3300 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3301 }
3302 else
3303 {
3304 #ifdef STACK_GROWS_DOWNWARD
3305 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3306 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3307 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3308 #else
3309 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3310 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3311 GEN_INT (rounded_size));
3312 #endif
3313 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3314 }
3315
3316 dest = gen_rtx_MEM (mode, dest_addr);
3317
3318 if (type != 0)
3319 {
3320 set_mem_attributes (dest, type, 1);
3321
3322 if (flag_optimize_sibling_calls)
3323 /* Function incoming arguments may overlap with sibling call
3324 outgoing arguments and we cannot allow reordering of reads
3325 from function arguments with stores to outgoing arguments
3326 of sibling calls. */
3327 set_mem_alias_set (dest, 0);
3328 }
3329 emit_move_insn (dest, x);
3330 }
3331 #endif
3332
3333 /* Generate code to push X onto the stack, assuming it has mode MODE and
3334 type TYPE.
3335 MODE is redundant except when X is a CONST_INT (since they don't
3336 carry mode info).
3337 SIZE is an rtx for the size of data to be copied (in bytes),
3338 needed only if X is BLKmode.
3339
3340 ALIGN (in bits) is maximum alignment we can assume.
3341
3342 If PARTIAL and REG are both nonzero, then copy that many of the first
3343 bytes of X into registers starting with REG, and push the rest of X.
3344 The amount of space pushed is decreased by PARTIAL bytes.
3345 REG must be a hard register in this case.
3346 If REG is zero but PARTIAL is not, take any all others actions for an
3347 argument partially in registers, but do not actually load any
3348 registers.
3349
3350 EXTRA is the amount in bytes of extra space to leave next to this arg.
3351 This is ignored if an argument block has already been allocated.
3352
3353 On a machine that lacks real push insns, ARGS_ADDR is the address of
3354 the bottom of the argument block for this call. We use indexing off there
3355 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3356 argument block has not been preallocated.
3357
3358 ARGS_SO_FAR is the size of args previously pushed for this call.
3359
3360 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3361 for arguments passed in registers. If nonzero, it will be the number
3362 of bytes required. */
3363
3364 void
3365 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3366 unsigned int align, int partial, rtx reg, int extra,
3367 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3368 rtx alignment_pad)
3369 {
3370 rtx xinner;
3371 enum direction stack_direction
3372 #ifdef STACK_GROWS_DOWNWARD
3373 = downward;
3374 #else
3375 = upward;
3376 #endif
3377
3378 /* Decide where to pad the argument: `downward' for below,
3379 `upward' for above, or `none' for don't pad it.
3380 Default is below for small data on big-endian machines; else above. */
3381 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3382
3383 /* Invert direction if stack is post-decrement.
3384 FIXME: why? */
3385 if (STACK_PUSH_CODE == POST_DEC)
3386 if (where_pad != none)
3387 where_pad = (where_pad == downward ? upward : downward);
3388
3389 xinner = x;
3390
3391 if (mode == BLKmode)
3392 {
3393 /* Copy a block into the stack, entirely or partially. */
3394
3395 rtx temp;
3396 int used;
3397 int offset;
3398 int skip;
3399
3400 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3401 used = partial - offset;
3402
3403 gcc_assert (size);
3404
3405 /* USED is now the # of bytes we need not copy to the stack
3406 because registers will take care of them. */
3407
3408 if (partial != 0)
3409 xinner = adjust_address (xinner, BLKmode, used);
3410
3411 /* If the partial register-part of the arg counts in its stack size,
3412 skip the part of stack space corresponding to the registers.
3413 Otherwise, start copying to the beginning of the stack space,
3414 by setting SKIP to 0. */
3415 skip = (reg_parm_stack_space == 0) ? 0 : used;
3416
3417 #ifdef PUSH_ROUNDING
3418 /* Do it with several push insns if that doesn't take lots of insns
3419 and if there is no difficulty with push insns that skip bytes
3420 on the stack for alignment purposes. */
3421 if (args_addr == 0
3422 && PUSH_ARGS
3423 && GET_CODE (size) == CONST_INT
3424 && skip == 0
3425 && MEM_ALIGN (xinner) >= align
3426 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
3427 /* Here we avoid the case of a structure whose weak alignment
3428 forces many pushes of a small amount of data,
3429 and such small pushes do rounding that causes trouble. */
3430 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
3431 || align >= BIGGEST_ALIGNMENT
3432 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
3433 == (align / BITS_PER_UNIT)))
3434 && PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
3435 {
3436 /* Push padding now if padding above and stack grows down,
3437 or if padding below and stack grows up.
3438 But if space already allocated, this has already been done. */
3439 if (extra && args_addr == 0
3440 && where_pad != none && where_pad != stack_direction)
3441 anti_adjust_stack (GEN_INT (extra));
3442
3443 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
3444 }
3445 else
3446 #endif /* PUSH_ROUNDING */
3447 {
3448 rtx target;
3449
3450 /* Otherwise make space on the stack and copy the data
3451 to the address of that space. */
3452
3453 /* Deduct words put into registers from the size we must copy. */
3454 if (partial != 0)
3455 {
3456 if (GET_CODE (size) == CONST_INT)
3457 size = GEN_INT (INTVAL (size) - used);
3458 else
3459 size = expand_binop (GET_MODE (size), sub_optab, size,
3460 GEN_INT (used), NULL_RTX, 0,
3461 OPTAB_LIB_WIDEN);
3462 }
3463
3464 /* Get the address of the stack space.
3465 In this case, we do not deal with EXTRA separately.
3466 A single stack adjust will do. */
3467 if (! args_addr)
3468 {
3469 temp = push_block (size, extra, where_pad == downward);
3470 extra = 0;
3471 }
3472 else if (GET_CODE (args_so_far) == CONST_INT)
3473 temp = memory_address (BLKmode,
3474 plus_constant (args_addr,
3475 skip + INTVAL (args_so_far)));
3476 else
3477 temp = memory_address (BLKmode,
3478 plus_constant (gen_rtx_PLUS (Pmode,
3479 args_addr,
3480 args_so_far),
3481 skip));
3482
3483 if (!ACCUMULATE_OUTGOING_ARGS)
3484 {
3485 /* If the source is referenced relative to the stack pointer,
3486 copy it to another register to stabilize it. We do not need
3487 to do this if we know that we won't be changing sp. */
3488
3489 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
3490 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
3491 temp = copy_to_reg (temp);
3492 }
3493
3494 target = gen_rtx_MEM (BLKmode, temp);
3495
3496 /* We do *not* set_mem_attributes here, because incoming arguments
3497 may overlap with sibling call outgoing arguments and we cannot
3498 allow reordering of reads from function arguments with stores
3499 to outgoing arguments of sibling calls. We do, however, want
3500 to record the alignment of the stack slot. */
3501 /* ALIGN may well be better aligned than TYPE, e.g. due to
3502 PARM_BOUNDARY. Assume the caller isn't lying. */
3503 set_mem_align (target, align);
3504
3505 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
3506 }
3507 }
3508 else if (partial > 0)
3509 {
3510 /* Scalar partly in registers. */
3511
3512 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
3513 int i;
3514 int not_stack;
3515 /* # bytes of start of argument
3516 that we must make space for but need not store. */
3517 int offset = partial % (PARM_BOUNDARY / BITS_PER_WORD);
3518 int args_offset = INTVAL (args_so_far);
3519 int skip;
3520
3521 /* Push padding now if padding above and stack grows down,
3522 or if padding below and stack grows up.
3523 But if space already allocated, this has already been done. */
3524 if (extra && args_addr == 0
3525 && where_pad != none && where_pad != stack_direction)
3526 anti_adjust_stack (GEN_INT (extra));
3527
3528 /* If we make space by pushing it, we might as well push
3529 the real data. Otherwise, we can leave OFFSET nonzero
3530 and leave the space uninitialized. */
3531 if (args_addr == 0)
3532 offset = 0;
3533
3534 /* Now NOT_STACK gets the number of words that we don't need to
3535 allocate on the stack. */
3536 not_stack = (partial - offset) / UNITS_PER_WORD;
3537
3538 /* If the partial register-part of the arg counts in its stack size,
3539 skip the part of stack space corresponding to the registers.
3540 Otherwise, start copying to the beginning of the stack space,
3541 by setting SKIP to 0. */
3542 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
3543
3544 if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
3545 x = validize_mem (force_const_mem (mode, x));
3546
3547 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
3548 SUBREGs of such registers are not allowed. */
3549 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
3550 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
3551 x = copy_to_reg (x);
3552
3553 /* Loop over all the words allocated on the stack for this arg. */
3554 /* We can do it by words, because any scalar bigger than a word
3555 has a size a multiple of a word. */
3556 #ifndef PUSH_ARGS_REVERSED
3557 for (i = not_stack; i < size; i++)
3558 #else
3559 for (i = size - 1; i >= not_stack; i--)
3560 #endif
3561 if (i >= not_stack + offset)
3562 emit_push_insn (operand_subword_force (x, i, mode),
3563 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
3564 0, args_addr,
3565 GEN_INT (args_offset + ((i - not_stack + skip)
3566 * UNITS_PER_WORD)),
3567 reg_parm_stack_space, alignment_pad);
3568 }
3569 else
3570 {
3571 rtx addr;
3572 rtx dest;
3573
3574 /* Push padding now if padding above and stack grows down,
3575 or if padding below and stack grows up.
3576 But if space already allocated, this has already been done. */
3577 if (extra && args_addr == 0
3578 && where_pad != none && where_pad != stack_direction)
3579 anti_adjust_stack (GEN_INT (extra));
3580
3581 #ifdef PUSH_ROUNDING
3582 if (args_addr == 0 && PUSH_ARGS)
3583 emit_single_push_insn (mode, x, type);
3584 else
3585 #endif
3586 {
3587 if (GET_CODE (args_so_far) == CONST_INT)
3588 addr
3589 = memory_address (mode,
3590 plus_constant (args_addr,
3591 INTVAL (args_so_far)));
3592 else
3593 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
3594 args_so_far));
3595 dest = gen_rtx_MEM (mode, addr);
3596
3597 /* We do *not* set_mem_attributes here, because incoming arguments
3598 may overlap with sibling call outgoing arguments and we cannot
3599 allow reordering of reads from function arguments with stores
3600 to outgoing arguments of sibling calls. We do, however, want
3601 to record the alignment of the stack slot. */
3602 /* ALIGN may well be better aligned than TYPE, e.g. due to
3603 PARM_BOUNDARY. Assume the caller isn't lying. */
3604 set_mem_align (dest, align);
3605
3606 emit_move_insn (dest, x);
3607 }
3608 }
3609
3610 /* If part should go in registers, copy that part
3611 into the appropriate registers. Do this now, at the end,
3612 since mem-to-mem copies above may do function calls. */
3613 if (partial > 0 && reg != 0)
3614 {
3615 /* Handle calls that pass values in multiple non-contiguous locations.
3616 The Irix 6 ABI has examples of this. */
3617 if (GET_CODE (reg) == PARALLEL)
3618 emit_group_load (reg, x, type, -1);
3619 else
3620 {
3621 gcc_assert (partial % UNITS_PER_WORD == 0);
3622 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
3623 }
3624 }
3625
3626 if (extra && args_addr == 0 && where_pad == stack_direction)
3627 anti_adjust_stack (GEN_INT (extra));
3628
3629 if (alignment_pad && args_addr == 0)
3630 anti_adjust_stack (alignment_pad);
3631 }
3632 \f
3633 /* Return X if X can be used as a subtarget in a sequence of arithmetic
3634 operations. */
3635
3636 static rtx
3637 get_subtarget (rtx x)
3638 {
3639 return (optimize
3640 || x == 0
3641 /* Only registers can be subtargets. */
3642 || !REG_P (x)
3643 /* Don't use hard regs to avoid extending their life. */
3644 || REGNO (x) < FIRST_PSEUDO_REGISTER
3645 ? 0 : x);
3646 }
3647
3648 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
3649 FIELD is a bitfield. Returns true if the optimization was successful,
3650 and there's nothing else to do. */
3651
3652 static bool
3653 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
3654 unsigned HOST_WIDE_INT bitpos,
3655 enum machine_mode mode1, rtx str_rtx,
3656 tree to, tree src)
3657 {
3658 enum machine_mode str_mode = GET_MODE (str_rtx);
3659 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
3660 tree op0, op1;
3661 rtx value, result;
3662 optab binop;
3663
3664 if (mode1 != VOIDmode
3665 || bitsize >= BITS_PER_WORD
3666 || str_bitsize > BITS_PER_WORD
3667 || TREE_SIDE_EFFECTS (to)
3668 || TREE_THIS_VOLATILE (to))
3669 return false;
3670
3671 STRIP_NOPS (src);
3672 if (!BINARY_CLASS_P (src)
3673 || TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
3674 return false;
3675
3676 op0 = TREE_OPERAND (src, 0);
3677 op1 = TREE_OPERAND (src, 1);
3678 STRIP_NOPS (op0);
3679
3680 if (!operand_equal_p (to, op0, 0))
3681 return false;
3682
3683 if (MEM_P (str_rtx))
3684 {
3685 unsigned HOST_WIDE_INT offset1;
3686
3687 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
3688 str_mode = word_mode;
3689 str_mode = get_best_mode (bitsize, bitpos,
3690 MEM_ALIGN (str_rtx), str_mode, 0);
3691 if (str_mode == VOIDmode)
3692 return false;
3693 str_bitsize = GET_MODE_BITSIZE (str_mode);
3694
3695 offset1 = bitpos;
3696 bitpos %= str_bitsize;
3697 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
3698 str_rtx = adjust_address (str_rtx, str_mode, offset1);
3699 }
3700 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
3701 return false;
3702
3703 /* If the bit field covers the whole REG/MEM, store_field
3704 will likely generate better code. */
3705 if (bitsize >= str_bitsize)
3706 return false;
3707
3708 /* We can't handle fields split across multiple entities. */
3709 if (bitpos + bitsize > str_bitsize)
3710 return false;
3711
3712 if (BYTES_BIG_ENDIAN)
3713 bitpos = str_bitsize - bitpos - bitsize;
3714
3715 switch (TREE_CODE (src))
3716 {
3717 case PLUS_EXPR:
3718 case MINUS_EXPR:
3719 /* For now, just optimize the case of the topmost bitfield
3720 where we don't need to do any masking and also
3721 1 bit bitfields where xor can be used.
3722 We might win by one instruction for the other bitfields
3723 too if insv/extv instructions aren't used, so that
3724 can be added later. */
3725 if (bitpos + bitsize != str_bitsize
3726 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
3727 break;
3728
3729 value = expand_expr (op1, NULL_RTX, str_mode, 0);
3730 value = convert_modes (str_mode,
3731 TYPE_MODE (TREE_TYPE (op1)), value,
3732 TYPE_UNSIGNED (TREE_TYPE (op1)));
3733
3734 /* We may be accessing data outside the field, which means
3735 we can alias adjacent data. */
3736 if (MEM_P (str_rtx))
3737 {
3738 str_rtx = shallow_copy_rtx (str_rtx);
3739 set_mem_alias_set (str_rtx, 0);
3740 set_mem_expr (str_rtx, 0);
3741 }
3742
3743 binop = TREE_CODE (src) == PLUS_EXPR ? add_optab : sub_optab;
3744 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
3745 {
3746 value = expand_and (str_mode, value, const1_rtx, NULL);
3747 binop = xor_optab;
3748 }
3749 value = expand_shift (LSHIFT_EXPR, str_mode, value,
3750 build_int_cst (NULL_TREE, bitpos),
3751 NULL_RTX, 1);
3752 result = expand_binop (str_mode, binop, str_rtx,
3753 value, str_rtx, 1, OPTAB_WIDEN);
3754 if (result != str_rtx)
3755 emit_move_insn (str_rtx, result);
3756 return true;
3757
3758 default:
3759 break;
3760 }
3761
3762 return false;
3763 }
3764
3765
3766 /* Expand an assignment that stores the value of FROM into TO. */
3767
3768 void
3769 expand_assignment (tree to, tree from)
3770 {
3771 rtx to_rtx = 0;
3772 rtx result;
3773
3774 /* Don't crash if the lhs of the assignment was erroneous. */
3775
3776 if (TREE_CODE (to) == ERROR_MARK)
3777 {
3778 result = expand_expr (from, NULL_RTX, VOIDmode, 0);
3779 return;
3780 }
3781
3782 /* Assignment of a structure component needs special treatment
3783 if the structure component's rtx is not simply a MEM.
3784 Assignment of an array element at a constant index, and assignment of
3785 an array element in an unaligned packed structure field, has the same
3786 problem. */
3787 if (handled_component_p (to)
3788 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
3789 {
3790 enum machine_mode mode1;
3791 HOST_WIDE_INT bitsize, bitpos;
3792 rtx orig_to_rtx;
3793 tree offset;
3794 int unsignedp;
3795 int volatilep = 0;
3796 tree tem;
3797
3798 push_temp_slots ();
3799 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
3800 &unsignedp, &volatilep, true);
3801
3802 /* If we are going to use store_bit_field and extract_bit_field,
3803 make sure to_rtx will be safe for multiple use. */
3804
3805 orig_to_rtx = to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, 0);
3806
3807 if (offset != 0)
3808 {
3809 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
3810
3811 gcc_assert (MEM_P (to_rtx));
3812
3813 #ifdef POINTERS_EXTEND_UNSIGNED
3814 if (GET_MODE (offset_rtx) != Pmode)
3815 offset_rtx = convert_to_mode (Pmode, offset_rtx, 0);
3816 #else
3817 if (GET_MODE (offset_rtx) != ptr_mode)
3818 offset_rtx = convert_to_mode (ptr_mode, offset_rtx, 0);
3819 #endif
3820
3821 /* A constant address in TO_RTX can have VOIDmode, we must not try
3822 to call force_reg for that case. Avoid that case. */
3823 if (MEM_P (to_rtx)
3824 && GET_MODE (to_rtx) == BLKmode
3825 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
3826 && bitsize > 0
3827 && (bitpos % bitsize) == 0
3828 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
3829 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
3830 {
3831 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
3832 bitpos = 0;
3833 }
3834
3835 to_rtx = offset_address (to_rtx, offset_rtx,
3836 highest_pow2_factor_for_target (to,
3837 offset));
3838 }
3839
3840 /* Handle expand_expr of a complex value returning a CONCAT. */
3841 if (GET_CODE (to_rtx) == CONCAT)
3842 {
3843 if (TREE_CODE (TREE_TYPE (from)) == COMPLEX_TYPE)
3844 {
3845 gcc_assert (bitpos == 0);
3846 result = store_expr (from, to_rtx, false);
3847 }
3848 else
3849 {
3850 gcc_assert (bitpos == 0 || bitpos == GET_MODE_BITSIZE (mode1));
3851 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false);
3852 }
3853 }
3854 else
3855 {
3856 if (MEM_P (to_rtx))
3857 {
3858 /* If the field is at offset zero, we could have been given the
3859 DECL_RTX of the parent struct. Don't munge it. */
3860 to_rtx = shallow_copy_rtx (to_rtx);
3861
3862 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
3863
3864 /* Deal with volatile and readonly fields. The former is only
3865 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
3866 if (volatilep)
3867 MEM_VOLATILE_P (to_rtx) = 1;
3868 if (component_uses_parent_alias_set (to))
3869 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
3870 }
3871
3872 if (optimize_bitfield_assignment_op (bitsize, bitpos, mode1,
3873 to_rtx, to, from))
3874 result = NULL;
3875 else
3876 result = store_field (to_rtx, bitsize, bitpos, mode1, from,
3877 TREE_TYPE (tem), get_alias_set (to));
3878 }
3879
3880 if (result)
3881 preserve_temp_slots (result);
3882 free_temp_slots ();
3883 pop_temp_slots ();
3884 return;
3885 }
3886
3887 /* If the rhs is a function call and its value is not an aggregate,
3888 call the function before we start to compute the lhs.
3889 This is needed for correct code for cases such as
3890 val = setjmp (buf) on machines where reference to val
3891 requires loading up part of an address in a separate insn.
3892
3893 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
3894 since it might be a promoted variable where the zero- or sign- extension
3895 needs to be done. Handling this in the normal way is safe because no
3896 computation is done before the call. */
3897 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
3898 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
3899 && ! ((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
3900 && REG_P (DECL_RTL (to))))
3901 {
3902 rtx value;
3903
3904 push_temp_slots ();
3905 value = expand_expr (from, NULL_RTX, VOIDmode, 0);
3906 if (to_rtx == 0)
3907 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
3908
3909 /* Handle calls that return values in multiple non-contiguous locations.
3910 The Irix 6 ABI has examples of this. */
3911 if (GET_CODE (to_rtx) == PARALLEL)
3912 emit_group_load (to_rtx, value, TREE_TYPE (from),
3913 int_size_in_bytes (TREE_TYPE (from)));
3914 else if (GET_MODE (to_rtx) == BLKmode)
3915 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
3916 else
3917 {
3918 if (POINTER_TYPE_P (TREE_TYPE (to)))
3919 value = convert_memory_address (GET_MODE (to_rtx), value);
3920 emit_move_insn (to_rtx, value);
3921 }
3922 preserve_temp_slots (to_rtx);
3923 free_temp_slots ();
3924 pop_temp_slots ();
3925 return;
3926 }
3927
3928 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
3929 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
3930
3931 if (to_rtx == 0)
3932 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
3933
3934 /* Don't move directly into a return register. */
3935 if (TREE_CODE (to) == RESULT_DECL
3936 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
3937 {
3938 rtx temp;
3939
3940 push_temp_slots ();
3941 temp = expand_expr (from, 0, GET_MODE (to_rtx), 0);
3942
3943 if (GET_CODE (to_rtx) == PARALLEL)
3944 emit_group_load (to_rtx, temp, TREE_TYPE (from),
3945 int_size_in_bytes (TREE_TYPE (from)));
3946 else
3947 emit_move_insn (to_rtx, temp);
3948
3949 preserve_temp_slots (to_rtx);
3950 free_temp_slots ();
3951 pop_temp_slots ();
3952 return;
3953 }
3954
3955 /* In case we are returning the contents of an object which overlaps
3956 the place the value is being stored, use a safe function when copying
3957 a value through a pointer into a structure value return block. */
3958 if (TREE_CODE (to) == RESULT_DECL && TREE_CODE (from) == INDIRECT_REF
3959 && current_function_returns_struct
3960 && !current_function_returns_pcc_struct)
3961 {
3962 rtx from_rtx, size;
3963
3964 push_temp_slots ();
3965 size = expr_size (from);
3966 from_rtx = expand_expr (from, NULL_RTX, VOIDmode, 0);
3967
3968 emit_library_call (memmove_libfunc, LCT_NORMAL,
3969 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
3970 XEXP (from_rtx, 0), Pmode,
3971 convert_to_mode (TYPE_MODE (sizetype),
3972 size, TYPE_UNSIGNED (sizetype)),
3973 TYPE_MODE (sizetype));
3974
3975 preserve_temp_slots (to_rtx);
3976 free_temp_slots ();
3977 pop_temp_slots ();
3978 return;
3979 }
3980
3981 /* Compute FROM and store the value in the rtx we got. */
3982
3983 push_temp_slots ();
3984 result = store_expr (from, to_rtx, 0);
3985 preserve_temp_slots (result);
3986 free_temp_slots ();
3987 pop_temp_slots ();
3988 return;
3989 }
3990
3991 /* Generate code for computing expression EXP,
3992 and storing the value into TARGET.
3993
3994 If the mode is BLKmode then we may return TARGET itself.
3995 It turns out that in BLKmode it doesn't cause a problem.
3996 because C has no operators that could combine two different
3997 assignments into the same BLKmode object with different values
3998 with no sequence point. Will other languages need this to
3999 be more thorough?
4000
4001 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4002 stack, and block moves may need to be treated specially. */
4003
4004 rtx
4005 store_expr (tree exp, rtx target, int call_param_p)
4006 {
4007 rtx temp;
4008 rtx alt_rtl = NULL_RTX;
4009 int dont_return_target = 0;
4010
4011 if (VOID_TYPE_P (TREE_TYPE (exp)))
4012 {
4013 /* C++ can generate ?: expressions with a throw expression in one
4014 branch and an rvalue in the other. Here, we resolve attempts to
4015 store the throw expression's nonexistent result. */
4016 gcc_assert (!call_param_p);
4017 expand_expr (exp, const0_rtx, VOIDmode, 0);
4018 return NULL_RTX;
4019 }
4020 if (TREE_CODE (exp) == COMPOUND_EXPR)
4021 {
4022 /* Perform first part of compound expression, then assign from second
4023 part. */
4024 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4025 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4026 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p);
4027 }
4028 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4029 {
4030 /* For conditional expression, get safe form of the target. Then
4031 test the condition, doing the appropriate assignment on either
4032 side. This avoids the creation of unnecessary temporaries.
4033 For non-BLKmode, it is more efficient not to do this. */
4034
4035 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
4036
4037 do_pending_stack_adjust ();
4038 NO_DEFER_POP;
4039 jumpifnot (TREE_OPERAND (exp, 0), lab1);
4040 store_expr (TREE_OPERAND (exp, 1), target, call_param_p);
4041 emit_jump_insn (gen_jump (lab2));
4042 emit_barrier ();
4043 emit_label (lab1);
4044 store_expr (TREE_OPERAND (exp, 2), target, call_param_p);
4045 emit_label (lab2);
4046 OK_DEFER_POP;
4047
4048 return NULL_RTX;
4049 }
4050 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
4051 /* If this is a scalar in a register that is stored in a wider mode
4052 than the declared mode, compute the result into its declared mode
4053 and then convert to the wider mode. Our value is the computed
4054 expression. */
4055 {
4056 rtx inner_target = 0;
4057
4058 /* We can do the conversion inside EXP, which will often result
4059 in some optimizations. Do the conversion in two steps: first
4060 change the signedness, if needed, then the extend. But don't
4061 do this if the type of EXP is a subtype of something else
4062 since then the conversion might involve more than just
4063 converting modes. */
4064 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
4065 && TREE_TYPE (TREE_TYPE (exp)) == 0
4066 && (!lang_hooks.reduce_bit_field_operations
4067 || (GET_MODE_PRECISION (GET_MODE (target))
4068 == TYPE_PRECISION (TREE_TYPE (exp)))))
4069 {
4070 if (TYPE_UNSIGNED (TREE_TYPE (exp))
4071 != SUBREG_PROMOTED_UNSIGNED_P (target))
4072 exp = convert
4073 (lang_hooks.types.signed_or_unsigned_type
4074 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)), exp);
4075
4076 exp = convert (lang_hooks.types.type_for_mode
4077 (GET_MODE (SUBREG_REG (target)),
4078 SUBREG_PROMOTED_UNSIGNED_P (target)),
4079 exp);
4080
4081 inner_target = SUBREG_REG (target);
4082 }
4083
4084 temp = expand_expr (exp, inner_target, VOIDmode,
4085 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4086
4087 /* If TEMP is a VOIDmode constant, use convert_modes to make
4088 sure that we properly convert it. */
4089 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
4090 {
4091 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4092 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
4093 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
4094 GET_MODE (target), temp,
4095 SUBREG_PROMOTED_UNSIGNED_P (target));
4096 }
4097
4098 convert_move (SUBREG_REG (target), temp,
4099 SUBREG_PROMOTED_UNSIGNED_P (target));
4100
4101 return NULL_RTX;
4102 }
4103 else
4104 {
4105 temp = expand_expr_real (exp, target, GET_MODE (target),
4106 (call_param_p
4107 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
4108 &alt_rtl);
4109 /* Return TARGET if it's a specified hardware register.
4110 If TARGET is a volatile mem ref, either return TARGET
4111 or return a reg copied *from* TARGET; ANSI requires this.
4112
4113 Otherwise, if TEMP is not TARGET, return TEMP
4114 if it is constant (for efficiency),
4115 or if we really want the correct value. */
4116 if (!(target && REG_P (target)
4117 && REGNO (target) < FIRST_PSEUDO_REGISTER)
4118 && !(MEM_P (target) && MEM_VOLATILE_P (target))
4119 && ! rtx_equal_p (temp, target)
4120 && CONSTANT_P (temp))
4121 dont_return_target = 1;
4122 }
4123
4124 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
4125 the same as that of TARGET, adjust the constant. This is needed, for
4126 example, in case it is a CONST_DOUBLE and we want only a word-sized
4127 value. */
4128 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
4129 && TREE_CODE (exp) != ERROR_MARK
4130 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
4131 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4132 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
4133
4134 /* If value was not generated in the target, store it there.
4135 Convert the value to TARGET's type first if necessary and emit the
4136 pending incrementations that have been queued when expanding EXP.
4137 Note that we cannot emit the whole queue blindly because this will
4138 effectively disable the POST_INC optimization later.
4139
4140 If TEMP and TARGET compare equal according to rtx_equal_p, but
4141 one or both of them are volatile memory refs, we have to distinguish
4142 two cases:
4143 - expand_expr has used TARGET. In this case, we must not generate
4144 another copy. This can be detected by TARGET being equal according
4145 to == .
4146 - expand_expr has not used TARGET - that means that the source just
4147 happens to have the same RTX form. Since temp will have been created
4148 by expand_expr, it will compare unequal according to == .
4149 We must generate a copy in this case, to reach the correct number
4150 of volatile memory references. */
4151
4152 if ((! rtx_equal_p (temp, target)
4153 || (temp != target && (side_effects_p (temp)
4154 || side_effects_p (target))))
4155 && TREE_CODE (exp) != ERROR_MARK
4156 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
4157 but TARGET is not valid memory reference, TEMP will differ
4158 from TARGET although it is really the same location. */
4159 && !(alt_rtl && rtx_equal_p (alt_rtl, target))
4160 /* If there's nothing to copy, don't bother. Don't call expr_size
4161 unless necessary, because some front-ends (C++) expr_size-hook
4162 aborts on objects that are not supposed to be bit-copied or
4163 bit-initialized. */
4164 && expr_size (exp) != const0_rtx)
4165 {
4166 if (GET_MODE (temp) != GET_MODE (target)
4167 && GET_MODE (temp) != VOIDmode)
4168 {
4169 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
4170 if (dont_return_target)
4171 {
4172 /* In this case, we will return TEMP,
4173 so make sure it has the proper mode.
4174 But don't forget to store the value into TARGET. */
4175 temp = convert_to_mode (GET_MODE (target), temp, unsignedp);
4176 emit_move_insn (target, temp);
4177 }
4178 else
4179 convert_move (target, temp, unsignedp);
4180 }
4181
4182 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
4183 {
4184 /* Handle copying a string constant into an array. The string
4185 constant may be shorter than the array. So copy just the string's
4186 actual length, and clear the rest. First get the size of the data
4187 type of the string, which is actually the size of the target. */
4188 rtx size = expr_size (exp);
4189
4190 if (GET_CODE (size) == CONST_INT
4191 && INTVAL (size) < TREE_STRING_LENGTH (exp))
4192 emit_block_move (target, temp, size,
4193 (call_param_p
4194 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4195 else
4196 {
4197 /* Compute the size of the data to copy from the string. */
4198 tree copy_size
4199 = size_binop (MIN_EXPR,
4200 make_tree (sizetype, size),
4201 size_int (TREE_STRING_LENGTH (exp)));
4202 rtx copy_size_rtx
4203 = expand_expr (copy_size, NULL_RTX, VOIDmode,
4204 (call_param_p
4205 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
4206 rtx label = 0;
4207
4208 /* Copy that much. */
4209 copy_size_rtx = convert_to_mode (ptr_mode, copy_size_rtx,
4210 TYPE_UNSIGNED (sizetype));
4211 emit_block_move (target, temp, copy_size_rtx,
4212 (call_param_p
4213 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4214
4215 /* Figure out how much is left in TARGET that we have to clear.
4216 Do all calculations in ptr_mode. */
4217 if (GET_CODE (copy_size_rtx) == CONST_INT)
4218 {
4219 size = plus_constant (size, -INTVAL (copy_size_rtx));
4220 target = adjust_address (target, BLKmode,
4221 INTVAL (copy_size_rtx));
4222 }
4223 else
4224 {
4225 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
4226 copy_size_rtx, NULL_RTX, 0,
4227 OPTAB_LIB_WIDEN);
4228
4229 #ifdef POINTERS_EXTEND_UNSIGNED
4230 if (GET_MODE (copy_size_rtx) != Pmode)
4231 copy_size_rtx = convert_to_mode (Pmode, copy_size_rtx,
4232 TYPE_UNSIGNED (sizetype));
4233 #endif
4234
4235 target = offset_address (target, copy_size_rtx,
4236 highest_pow2_factor (copy_size));
4237 label = gen_label_rtx ();
4238 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
4239 GET_MODE (size), 0, label);
4240 }
4241
4242 if (size != const0_rtx)
4243 clear_storage (target, size);
4244
4245 if (label)
4246 emit_label (label);
4247 }
4248 }
4249 /* Handle calls that return values in multiple non-contiguous locations.
4250 The Irix 6 ABI has examples of this. */
4251 else if (GET_CODE (target) == PARALLEL)
4252 emit_group_load (target, temp, TREE_TYPE (exp),
4253 int_size_in_bytes (TREE_TYPE (exp)));
4254 else if (GET_MODE (temp) == BLKmode)
4255 emit_block_move (target, temp, expr_size (exp),
4256 (call_param_p
4257 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4258 else
4259 {
4260 temp = force_operand (temp, target);
4261 if (temp != target)
4262 emit_move_insn (target, temp);
4263 }
4264 }
4265
4266 return NULL_RTX;
4267 }
4268 \f
4269 /* Examine CTOR to discover:
4270 * how many scalar fields are set to nonzero values,
4271 and place it in *P_NZ_ELTS;
4272 * how many scalar fields are set to non-constant values,
4273 and place it in *P_NC_ELTS; and
4274 * how many scalar fields in total are in CTOR,
4275 and place it in *P_ELT_COUNT.
4276 * if a type is a union, and the initializer from the constructor
4277 is not the largest element in the union, then set *p_must_clear. */
4278
4279 static void
4280 categorize_ctor_elements_1 (tree ctor, HOST_WIDE_INT *p_nz_elts,
4281 HOST_WIDE_INT *p_nc_elts,
4282 HOST_WIDE_INT *p_elt_count,
4283 bool *p_must_clear)
4284 {
4285 HOST_WIDE_INT nz_elts, nc_elts, elt_count;
4286 tree list;
4287
4288 nz_elts = 0;
4289 nc_elts = 0;
4290 elt_count = 0;
4291
4292 for (list = CONSTRUCTOR_ELTS (ctor); list; list = TREE_CHAIN (list))
4293 {
4294 tree value = TREE_VALUE (list);
4295 tree purpose = TREE_PURPOSE (list);
4296 HOST_WIDE_INT mult;
4297
4298 mult = 1;
4299 if (TREE_CODE (purpose) == RANGE_EXPR)
4300 {
4301 tree lo_index = TREE_OPERAND (purpose, 0);
4302 tree hi_index = TREE_OPERAND (purpose, 1);
4303
4304 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
4305 mult = (tree_low_cst (hi_index, 1)
4306 - tree_low_cst (lo_index, 1) + 1);
4307 }
4308
4309 switch (TREE_CODE (value))
4310 {
4311 case CONSTRUCTOR:
4312 {
4313 HOST_WIDE_INT nz = 0, nc = 0, ic = 0;
4314 categorize_ctor_elements_1 (value, &nz, &nc, &ic, p_must_clear);
4315 nz_elts += mult * nz;
4316 nc_elts += mult * nc;
4317 elt_count += mult * ic;
4318 }
4319 break;
4320
4321 case INTEGER_CST:
4322 case REAL_CST:
4323 if (!initializer_zerop (value))
4324 nz_elts += mult;
4325 elt_count += mult;
4326 break;
4327
4328 case STRING_CST:
4329 nz_elts += mult * TREE_STRING_LENGTH (value);
4330 elt_count += mult * TREE_STRING_LENGTH (value);
4331 break;
4332
4333 case COMPLEX_CST:
4334 if (!initializer_zerop (TREE_REALPART (value)))
4335 nz_elts += mult;
4336 if (!initializer_zerop (TREE_IMAGPART (value)))
4337 nz_elts += mult;
4338 elt_count += mult;
4339 break;
4340
4341 case VECTOR_CST:
4342 {
4343 tree v;
4344 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
4345 {
4346 if (!initializer_zerop (TREE_VALUE (v)))
4347 nz_elts += mult;
4348 elt_count += mult;
4349 }
4350 }
4351 break;
4352
4353 default:
4354 nz_elts += mult;
4355 elt_count += mult;
4356 if (!initializer_constant_valid_p (value, TREE_TYPE (value)))
4357 nc_elts += mult;
4358 break;
4359 }
4360 }
4361
4362 if (!*p_must_clear
4363 && (TREE_CODE (TREE_TYPE (ctor)) == UNION_TYPE
4364 || TREE_CODE (TREE_TYPE (ctor)) == QUAL_UNION_TYPE))
4365 {
4366 tree init_sub_type;
4367 bool clear_this = true;
4368
4369 list = CONSTRUCTOR_ELTS (ctor);
4370 if (list)
4371 {
4372 /* We don't expect more than one element of the union to be
4373 initialized. Not sure what we should do otherwise... */
4374 gcc_assert (TREE_CHAIN (list) == NULL);
4375
4376 init_sub_type = TREE_TYPE (TREE_VALUE (list));
4377
4378 /* ??? We could look at each element of the union, and find the
4379 largest element. Which would avoid comparing the size of the
4380 initialized element against any tail padding in the union.
4381 Doesn't seem worth the effort... */
4382 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (ctor)),
4383 TYPE_SIZE (init_sub_type)) == 1)
4384 {
4385 /* And now we have to find out if the element itself is fully
4386 constructed. E.g. for union { struct { int a, b; } s; } u
4387 = { .s = { .a = 1 } }. */
4388 if (elt_count == count_type_elements (init_sub_type))
4389 clear_this = false;
4390 }
4391 }
4392
4393 *p_must_clear = clear_this;
4394 }
4395
4396 *p_nz_elts += nz_elts;
4397 *p_nc_elts += nc_elts;
4398 *p_elt_count += elt_count;
4399 }
4400
4401 void
4402 categorize_ctor_elements (tree ctor, HOST_WIDE_INT *p_nz_elts,
4403 HOST_WIDE_INT *p_nc_elts,
4404 HOST_WIDE_INT *p_elt_count,
4405 bool *p_must_clear)
4406 {
4407 *p_nz_elts = 0;
4408 *p_nc_elts = 0;
4409 *p_elt_count = 0;
4410 *p_must_clear = false;
4411 categorize_ctor_elements_1 (ctor, p_nz_elts, p_nc_elts, p_elt_count,
4412 p_must_clear);
4413 }
4414
4415 /* Count the number of scalars in TYPE. Return -1 on overflow or
4416 variable-sized. */
4417
4418 HOST_WIDE_INT
4419 count_type_elements (tree type)
4420 {
4421 const HOST_WIDE_INT max = ~((HOST_WIDE_INT)1 << (HOST_BITS_PER_WIDE_INT-1));
4422 switch (TREE_CODE (type))
4423 {
4424 case ARRAY_TYPE:
4425 {
4426 tree telts = array_type_nelts (type);
4427 if (telts && host_integerp (telts, 1))
4428 {
4429 HOST_WIDE_INT n = tree_low_cst (telts, 1) + 1;
4430 HOST_WIDE_INT m = count_type_elements (TREE_TYPE (type));
4431 if (n == 0)
4432 return 0;
4433 else if (max / n > m)
4434 return n * m;
4435 }
4436 return -1;
4437 }
4438
4439 case RECORD_TYPE:
4440 {
4441 HOST_WIDE_INT n = 0, t;
4442 tree f;
4443
4444 for (f = TYPE_FIELDS (type); f ; f = TREE_CHAIN (f))
4445 if (TREE_CODE (f) == FIELD_DECL)
4446 {
4447 t = count_type_elements (TREE_TYPE (f));
4448 if (t < 0)
4449 return -1;
4450 n += t;
4451 }
4452
4453 return n;
4454 }
4455
4456 case UNION_TYPE:
4457 case QUAL_UNION_TYPE:
4458 {
4459 /* Ho hum. How in the world do we guess here? Clearly it isn't
4460 right to count the fields. Guess based on the number of words. */
4461 HOST_WIDE_INT n = int_size_in_bytes (type);
4462 if (n < 0)
4463 return -1;
4464 return n / UNITS_PER_WORD;
4465 }
4466
4467 case COMPLEX_TYPE:
4468 return 2;
4469
4470 case VECTOR_TYPE:
4471 return TYPE_VECTOR_SUBPARTS (type);
4472
4473 case INTEGER_TYPE:
4474 case REAL_TYPE:
4475 case ENUMERAL_TYPE:
4476 case BOOLEAN_TYPE:
4477 case CHAR_TYPE:
4478 case POINTER_TYPE:
4479 case OFFSET_TYPE:
4480 case REFERENCE_TYPE:
4481 return 1;
4482
4483 case VOID_TYPE:
4484 case METHOD_TYPE:
4485 case FILE_TYPE:
4486 case FUNCTION_TYPE:
4487 case LANG_TYPE:
4488 default:
4489 gcc_unreachable ();
4490 }
4491 }
4492
4493 /* Return 1 if EXP contains mostly (3/4) zeros. */
4494
4495 static int
4496 mostly_zeros_p (tree exp)
4497 {
4498 if (TREE_CODE (exp) == CONSTRUCTOR)
4499
4500 {
4501 HOST_WIDE_INT nz_elts, nc_elts, count, elts;
4502 bool must_clear;
4503
4504 categorize_ctor_elements (exp, &nz_elts, &nc_elts, &count, &must_clear);
4505 if (must_clear)
4506 return 1;
4507
4508 elts = count_type_elements (TREE_TYPE (exp));
4509
4510 return nz_elts < elts / 4;
4511 }
4512
4513 return initializer_zerop (exp);
4514 }
4515 \f
4516 /* Helper function for store_constructor.
4517 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
4518 TYPE is the type of the CONSTRUCTOR, not the element type.
4519 CLEARED is as for store_constructor.
4520 ALIAS_SET is the alias set to use for any stores.
4521
4522 This provides a recursive shortcut back to store_constructor when it isn't
4523 necessary to go through store_field. This is so that we can pass through
4524 the cleared field to let store_constructor know that we may not have to
4525 clear a substructure if the outer structure has already been cleared. */
4526
4527 static void
4528 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
4529 HOST_WIDE_INT bitpos, enum machine_mode mode,
4530 tree exp, tree type, int cleared, int alias_set)
4531 {
4532 if (TREE_CODE (exp) == CONSTRUCTOR
4533 /* We can only call store_constructor recursively if the size and
4534 bit position are on a byte boundary. */
4535 && bitpos % BITS_PER_UNIT == 0
4536 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
4537 /* If we have a nonzero bitpos for a register target, then we just
4538 let store_field do the bitfield handling. This is unlikely to
4539 generate unnecessary clear instructions anyways. */
4540 && (bitpos == 0 || MEM_P (target)))
4541 {
4542 if (MEM_P (target))
4543 target
4544 = adjust_address (target,
4545 GET_MODE (target) == BLKmode
4546 || 0 != (bitpos
4547 % GET_MODE_ALIGNMENT (GET_MODE (target)))
4548 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
4549
4550
4551 /* Update the alias set, if required. */
4552 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
4553 && MEM_ALIAS_SET (target) != 0)
4554 {
4555 target = copy_rtx (target);
4556 set_mem_alias_set (target, alias_set);
4557 }
4558
4559 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
4560 }
4561 else
4562 store_field (target, bitsize, bitpos, mode, exp, type, alias_set);
4563 }
4564
4565 /* Store the value of constructor EXP into the rtx TARGET.
4566 TARGET is either a REG or a MEM; we know it cannot conflict, since
4567 safe_from_p has been called.
4568 CLEARED is true if TARGET is known to have been zero'd.
4569 SIZE is the number of bytes of TARGET we are allowed to modify: this
4570 may not be the same as the size of EXP if we are assigning to a field
4571 which has been packed to exclude padding bits. */
4572
4573 static void
4574 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
4575 {
4576 tree type = TREE_TYPE (exp);
4577 #ifdef WORD_REGISTER_OPERATIONS
4578 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
4579 #endif
4580
4581 switch (TREE_CODE (type))
4582 {
4583 case RECORD_TYPE:
4584 case UNION_TYPE:
4585 case QUAL_UNION_TYPE:
4586 {
4587 tree elt;
4588
4589 /* If size is zero or the target is already cleared, do nothing. */
4590 if (size == 0 || cleared)
4591 cleared = 1;
4592 /* We either clear the aggregate or indicate the value is dead. */
4593 else if ((TREE_CODE (type) == UNION_TYPE
4594 || TREE_CODE (type) == QUAL_UNION_TYPE)
4595 && ! CONSTRUCTOR_ELTS (exp))
4596 /* If the constructor is empty, clear the union. */
4597 {
4598 clear_storage (target, expr_size (exp));
4599 cleared = 1;
4600 }
4601
4602 /* If we are building a static constructor into a register,
4603 set the initial value as zero so we can fold the value into
4604 a constant. But if more than one register is involved,
4605 this probably loses. */
4606 else if (REG_P (target) && TREE_STATIC (exp)
4607 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
4608 {
4609 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
4610 cleared = 1;
4611 }
4612
4613 /* If the constructor has fewer fields than the structure or
4614 if we are initializing the structure to mostly zeros, clear
4615 the whole structure first. Don't do this if TARGET is a
4616 register whose mode size isn't equal to SIZE since
4617 clear_storage can't handle this case. */
4618 else if (size > 0
4619 && ((list_length (CONSTRUCTOR_ELTS (exp))
4620 != fields_length (type))
4621 || mostly_zeros_p (exp))
4622 && (!REG_P (target)
4623 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
4624 == size)))
4625 {
4626 clear_storage (target, GEN_INT (size));
4627 cleared = 1;
4628 }
4629
4630 if (! cleared)
4631 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
4632
4633 /* Store each element of the constructor into the
4634 corresponding field of TARGET. */
4635
4636 for (elt = CONSTRUCTOR_ELTS (exp); elt; elt = TREE_CHAIN (elt))
4637 {
4638 tree field = TREE_PURPOSE (elt);
4639 tree value = TREE_VALUE (elt);
4640 enum machine_mode mode;
4641 HOST_WIDE_INT bitsize;
4642 HOST_WIDE_INT bitpos = 0;
4643 tree offset;
4644 rtx to_rtx = target;
4645
4646 /* Just ignore missing fields. We cleared the whole
4647 structure, above, if any fields are missing. */
4648 if (field == 0)
4649 continue;
4650
4651 if (cleared && initializer_zerop (value))
4652 continue;
4653
4654 if (host_integerp (DECL_SIZE (field), 1))
4655 bitsize = tree_low_cst (DECL_SIZE (field), 1);
4656 else
4657 bitsize = -1;
4658
4659 mode = DECL_MODE (field);
4660 if (DECL_BIT_FIELD (field))
4661 mode = VOIDmode;
4662
4663 offset = DECL_FIELD_OFFSET (field);
4664 if (host_integerp (offset, 0)
4665 && host_integerp (bit_position (field), 0))
4666 {
4667 bitpos = int_bit_position (field);
4668 offset = 0;
4669 }
4670 else
4671 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
4672
4673 if (offset)
4674 {
4675 rtx offset_rtx;
4676
4677 offset
4678 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
4679 make_tree (TREE_TYPE (exp),
4680 target));
4681
4682 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, 0);
4683 gcc_assert (MEM_P (to_rtx));
4684
4685 #ifdef POINTERS_EXTEND_UNSIGNED
4686 if (GET_MODE (offset_rtx) != Pmode)
4687 offset_rtx = convert_to_mode (Pmode, offset_rtx, 0);
4688 #else
4689 if (GET_MODE (offset_rtx) != ptr_mode)
4690 offset_rtx = convert_to_mode (ptr_mode, offset_rtx, 0);
4691 #endif
4692
4693 to_rtx = offset_address (to_rtx, offset_rtx,
4694 highest_pow2_factor (offset));
4695 }
4696
4697 #ifdef WORD_REGISTER_OPERATIONS
4698 /* If this initializes a field that is smaller than a
4699 word, at the start of a word, try to widen it to a full
4700 word. This special case allows us to output C++ member
4701 function initializations in a form that the optimizers
4702 can understand. */
4703 if (REG_P (target)
4704 && bitsize < BITS_PER_WORD
4705 && bitpos % BITS_PER_WORD == 0
4706 && GET_MODE_CLASS (mode) == MODE_INT
4707 && TREE_CODE (value) == INTEGER_CST
4708 && exp_size >= 0
4709 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
4710 {
4711 tree type = TREE_TYPE (value);
4712
4713 if (TYPE_PRECISION (type) < BITS_PER_WORD)
4714 {
4715 type = lang_hooks.types.type_for_size
4716 (BITS_PER_WORD, TYPE_UNSIGNED (type));
4717 value = convert (type, value);
4718 }
4719
4720 if (BYTES_BIG_ENDIAN)
4721 value
4722 = fold (build2 (LSHIFT_EXPR, type, value,
4723 build_int_cst (NULL_TREE,
4724 BITS_PER_WORD - bitsize)));
4725 bitsize = BITS_PER_WORD;
4726 mode = word_mode;
4727 }
4728 #endif
4729
4730 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
4731 && DECL_NONADDRESSABLE_P (field))
4732 {
4733 to_rtx = copy_rtx (to_rtx);
4734 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4735 }
4736
4737 store_constructor_field (to_rtx, bitsize, bitpos, mode,
4738 value, type, cleared,
4739 get_alias_set (TREE_TYPE (field)));
4740 }
4741 break;
4742 }
4743 case ARRAY_TYPE:
4744 {
4745 tree elt;
4746 int i;
4747 int need_to_clear;
4748 tree domain;
4749 tree elttype = TREE_TYPE (type);
4750 int const_bounds_p;
4751 HOST_WIDE_INT minelt = 0;
4752 HOST_WIDE_INT maxelt = 0;
4753
4754 domain = TYPE_DOMAIN (type);
4755 const_bounds_p = (TYPE_MIN_VALUE (domain)
4756 && TYPE_MAX_VALUE (domain)
4757 && host_integerp (TYPE_MIN_VALUE (domain), 0)
4758 && host_integerp (TYPE_MAX_VALUE (domain), 0));
4759
4760 /* If we have constant bounds for the range of the type, get them. */
4761 if (const_bounds_p)
4762 {
4763 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
4764 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
4765 }
4766
4767 /* If the constructor has fewer elements than the array, clear
4768 the whole array first. Similarly if this is static
4769 constructor of a non-BLKmode object. */
4770 if (cleared)
4771 need_to_clear = 0;
4772 else if (REG_P (target) && TREE_STATIC (exp))
4773 need_to_clear = 1;
4774 else
4775 {
4776 HOST_WIDE_INT count = 0, zero_count = 0;
4777 need_to_clear = ! const_bounds_p;
4778
4779 /* This loop is a more accurate version of the loop in
4780 mostly_zeros_p (it handles RANGE_EXPR in an index). It
4781 is also needed to check for missing elements. */
4782 for (elt = CONSTRUCTOR_ELTS (exp);
4783 elt != NULL_TREE && ! need_to_clear;
4784 elt = TREE_CHAIN (elt))
4785 {
4786 tree index = TREE_PURPOSE (elt);
4787 HOST_WIDE_INT this_node_count;
4788
4789 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
4790 {
4791 tree lo_index = TREE_OPERAND (index, 0);
4792 tree hi_index = TREE_OPERAND (index, 1);
4793
4794 if (! host_integerp (lo_index, 1)
4795 || ! host_integerp (hi_index, 1))
4796 {
4797 need_to_clear = 1;
4798 break;
4799 }
4800
4801 this_node_count = (tree_low_cst (hi_index, 1)
4802 - tree_low_cst (lo_index, 1) + 1);
4803 }
4804 else
4805 this_node_count = 1;
4806
4807 count += this_node_count;
4808 if (mostly_zeros_p (TREE_VALUE (elt)))
4809 zero_count += this_node_count;
4810 }
4811
4812 /* Clear the entire array first if there are any missing
4813 elements, or if the incidence of zero elements is >=
4814 75%. */
4815 if (! need_to_clear
4816 && (count < maxelt - minelt + 1
4817 || 4 * zero_count >= 3 * count))
4818 need_to_clear = 1;
4819 }
4820
4821 if (need_to_clear && size > 0)
4822 {
4823 if (REG_P (target))
4824 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
4825 else
4826 clear_storage (target, GEN_INT (size));
4827 cleared = 1;
4828 }
4829
4830 if (!cleared && REG_P (target))
4831 /* Inform later passes that the old value is dead. */
4832 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
4833
4834 /* Store each element of the constructor into the
4835 corresponding element of TARGET, determined by counting the
4836 elements. */
4837 for (elt = CONSTRUCTOR_ELTS (exp), i = 0;
4838 elt;
4839 elt = TREE_CHAIN (elt), i++)
4840 {
4841 enum machine_mode mode;
4842 HOST_WIDE_INT bitsize;
4843 HOST_WIDE_INT bitpos;
4844 int unsignedp;
4845 tree value = TREE_VALUE (elt);
4846 tree index = TREE_PURPOSE (elt);
4847 rtx xtarget = target;
4848
4849 if (cleared && initializer_zerop (value))
4850 continue;
4851
4852 unsignedp = TYPE_UNSIGNED (elttype);
4853 mode = TYPE_MODE (elttype);
4854 if (mode == BLKmode)
4855 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
4856 ? tree_low_cst (TYPE_SIZE (elttype), 1)
4857 : -1);
4858 else
4859 bitsize = GET_MODE_BITSIZE (mode);
4860
4861 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
4862 {
4863 tree lo_index = TREE_OPERAND (index, 0);
4864 tree hi_index = TREE_OPERAND (index, 1);
4865 rtx index_r, pos_rtx;
4866 HOST_WIDE_INT lo, hi, count;
4867 tree position;
4868
4869 /* If the range is constant and "small", unroll the loop. */
4870 if (const_bounds_p
4871 && host_integerp (lo_index, 0)
4872 && host_integerp (hi_index, 0)
4873 && (lo = tree_low_cst (lo_index, 0),
4874 hi = tree_low_cst (hi_index, 0),
4875 count = hi - lo + 1,
4876 (!MEM_P (target)
4877 || count <= 2
4878 || (host_integerp (TYPE_SIZE (elttype), 1)
4879 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
4880 <= 40 * 8)))))
4881 {
4882 lo -= minelt; hi -= minelt;
4883 for (; lo <= hi; lo++)
4884 {
4885 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
4886
4887 if (MEM_P (target)
4888 && !MEM_KEEP_ALIAS_SET_P (target)
4889 && TREE_CODE (type) == ARRAY_TYPE
4890 && TYPE_NONALIASED_COMPONENT (type))
4891 {
4892 target = copy_rtx (target);
4893 MEM_KEEP_ALIAS_SET_P (target) = 1;
4894 }
4895
4896 store_constructor_field
4897 (target, bitsize, bitpos, mode, value, type, cleared,
4898 get_alias_set (elttype));
4899 }
4900 }
4901 else
4902 {
4903 rtx loop_start = gen_label_rtx ();
4904 rtx loop_end = gen_label_rtx ();
4905 tree exit_cond;
4906
4907 expand_expr (hi_index, NULL_RTX, VOIDmode, 0);
4908 unsignedp = TYPE_UNSIGNED (domain);
4909
4910 index = build_decl (VAR_DECL, NULL_TREE, domain);
4911
4912 index_r
4913 = gen_reg_rtx (promote_mode (domain, DECL_MODE (index),
4914 &unsignedp, 0));
4915 SET_DECL_RTL (index, index_r);
4916 store_expr (lo_index, index_r, 0);
4917
4918 /* Build the head of the loop. */
4919 do_pending_stack_adjust ();
4920 emit_label (loop_start);
4921
4922 /* Assign value to element index. */
4923 position
4924 = convert (ssizetype,
4925 fold (build2 (MINUS_EXPR, TREE_TYPE (index),
4926 index, TYPE_MIN_VALUE (domain))));
4927 position = size_binop (MULT_EXPR, position,
4928 convert (ssizetype,
4929 TYPE_SIZE_UNIT (elttype)));
4930
4931 pos_rtx = expand_expr (position, 0, VOIDmode, 0);
4932 xtarget = offset_address (target, pos_rtx,
4933 highest_pow2_factor (position));
4934 xtarget = adjust_address (xtarget, mode, 0);
4935 if (TREE_CODE (value) == CONSTRUCTOR)
4936 store_constructor (value, xtarget, cleared,
4937 bitsize / BITS_PER_UNIT);
4938 else
4939 store_expr (value, xtarget, 0);
4940
4941 /* Generate a conditional jump to exit the loop. */
4942 exit_cond = build2 (LT_EXPR, integer_type_node,
4943 index, hi_index);
4944 jumpif (exit_cond, loop_end);
4945
4946 /* Update the loop counter, and jump to the head of
4947 the loop. */
4948 expand_assignment (index,
4949 build2 (PLUS_EXPR, TREE_TYPE (index),
4950 index, integer_one_node));
4951
4952 emit_jump (loop_start);
4953
4954 /* Build the end of the loop. */
4955 emit_label (loop_end);
4956 }
4957 }
4958 else if ((index != 0 && ! host_integerp (index, 0))
4959 || ! host_integerp (TYPE_SIZE (elttype), 1))
4960 {
4961 tree position;
4962
4963 if (index == 0)
4964 index = ssize_int (1);
4965
4966 if (minelt)
4967 index = fold_convert (ssizetype,
4968 fold (build2 (MINUS_EXPR,
4969 TREE_TYPE (index),
4970 index,
4971 TYPE_MIN_VALUE (domain))));
4972
4973 position = size_binop (MULT_EXPR, index,
4974 convert (ssizetype,
4975 TYPE_SIZE_UNIT (elttype)));
4976 xtarget = offset_address (target,
4977 expand_expr (position, 0, VOIDmode, 0),
4978 highest_pow2_factor (position));
4979 xtarget = adjust_address (xtarget, mode, 0);
4980 store_expr (value, xtarget, 0);
4981 }
4982 else
4983 {
4984 if (index != 0)
4985 bitpos = ((tree_low_cst (index, 0) - minelt)
4986 * tree_low_cst (TYPE_SIZE (elttype), 1));
4987 else
4988 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
4989
4990 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
4991 && TREE_CODE (type) == ARRAY_TYPE
4992 && TYPE_NONALIASED_COMPONENT (type))
4993 {
4994 target = copy_rtx (target);
4995 MEM_KEEP_ALIAS_SET_P (target) = 1;
4996 }
4997 store_constructor_field (target, bitsize, bitpos, mode, value,
4998 type, cleared, get_alias_set (elttype));
4999 }
5000 }
5001 break;
5002 }
5003
5004 case VECTOR_TYPE:
5005 {
5006 tree elt;
5007 int i;
5008 int need_to_clear;
5009 int icode = 0;
5010 tree elttype = TREE_TYPE (type);
5011 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
5012 enum machine_mode eltmode = TYPE_MODE (elttype);
5013 HOST_WIDE_INT bitsize;
5014 HOST_WIDE_INT bitpos;
5015 rtvec vector = NULL;
5016 unsigned n_elts;
5017
5018 gcc_assert (eltmode != BLKmode);
5019
5020 n_elts = TYPE_VECTOR_SUBPARTS (type);
5021 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
5022 {
5023 enum machine_mode mode = GET_MODE (target);
5024
5025 icode = (int) vec_init_optab->handlers[mode].insn_code;
5026 if (icode != CODE_FOR_nothing)
5027 {
5028 unsigned int i;
5029
5030 vector = rtvec_alloc (n_elts);
5031 for (i = 0; i < n_elts; i++)
5032 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
5033 }
5034 }
5035
5036 /* If the constructor has fewer elements than the vector,
5037 clear the whole array first. Similarly if this is static
5038 constructor of a non-BLKmode object. */
5039 if (cleared)
5040 need_to_clear = 0;
5041 else if (REG_P (target) && TREE_STATIC (exp))
5042 need_to_clear = 1;
5043 else
5044 {
5045 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
5046
5047 for (elt = CONSTRUCTOR_ELTS (exp);
5048 elt != NULL_TREE;
5049 elt = TREE_CHAIN (elt))
5050 {
5051 int n_elts_here = tree_low_cst
5052 (int_const_binop (TRUNC_DIV_EXPR,
5053 TYPE_SIZE (TREE_TYPE (TREE_VALUE (elt))),
5054 TYPE_SIZE (elttype), 0), 1);
5055
5056 count += n_elts_here;
5057 if (mostly_zeros_p (TREE_VALUE (elt)))
5058 zero_count += n_elts_here;
5059 }
5060
5061 /* Clear the entire vector first if there are any missing elements,
5062 or if the incidence of zero elements is >= 75%. */
5063 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
5064 }
5065
5066 if (need_to_clear && size > 0 && !vector)
5067 {
5068 if (REG_P (target))
5069 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5070 else
5071 clear_storage (target, GEN_INT (size));
5072 cleared = 1;
5073 }
5074
5075 if (!cleared && REG_P (target))
5076 /* Inform later passes that the old value is dead. */
5077 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
5078
5079 /* Store each element of the constructor into the corresponding
5080 element of TARGET, determined by counting the elements. */
5081 for (elt = CONSTRUCTOR_ELTS (exp), i = 0;
5082 elt;
5083 elt = TREE_CHAIN (elt), i += bitsize / elt_size)
5084 {
5085 tree value = TREE_VALUE (elt);
5086 tree index = TREE_PURPOSE (elt);
5087 HOST_WIDE_INT eltpos;
5088
5089 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
5090 if (cleared && initializer_zerop (value))
5091 continue;
5092
5093 if (index != 0)
5094 eltpos = tree_low_cst (index, 1);
5095 else
5096 eltpos = i;
5097
5098 if (vector)
5099 {
5100 /* Vector CONSTRUCTORs should only be built from smaller
5101 vectors in the case of BLKmode vectors. */
5102 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
5103 RTVEC_ELT (vector, eltpos)
5104 = expand_expr (value, NULL_RTX, VOIDmode, 0);
5105 }
5106 else
5107 {
5108 enum machine_mode value_mode =
5109 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
5110 ? TYPE_MODE (TREE_TYPE (value))
5111 : eltmode;
5112 bitpos = eltpos * elt_size;
5113 store_constructor_field (target, bitsize, bitpos,
5114 value_mode, value, type,
5115 cleared, get_alias_set (elttype));
5116 }
5117 }
5118
5119 if (vector)
5120 emit_insn (GEN_FCN (icode)
5121 (target,
5122 gen_rtx_PARALLEL (GET_MODE (target), vector)));
5123 break;
5124 }
5125
5126 default:
5127 gcc_unreachable ();
5128 }
5129 }
5130
5131 /* Store the value of EXP (an expression tree)
5132 into a subfield of TARGET which has mode MODE and occupies
5133 BITSIZE bits, starting BITPOS bits from the start of TARGET.
5134 If MODE is VOIDmode, it means that we are storing into a bit-field.
5135
5136 Always return const0_rtx unless we have something particular to
5137 return.
5138
5139 TYPE is the type of the underlying object,
5140
5141 ALIAS_SET is the alias set for the destination. This value will
5142 (in general) be different from that for TARGET, since TARGET is a
5143 reference to the containing structure. */
5144
5145 static rtx
5146 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
5147 enum machine_mode mode, tree exp, tree type, int alias_set)
5148 {
5149 HOST_WIDE_INT width_mask = 0;
5150
5151 if (TREE_CODE (exp) == ERROR_MARK)
5152 return const0_rtx;
5153
5154 /* If we have nothing to store, do nothing unless the expression has
5155 side-effects. */
5156 if (bitsize == 0)
5157 return expand_expr (exp, const0_rtx, VOIDmode, 0);
5158 else if (bitsize >= 0 && bitsize < HOST_BITS_PER_WIDE_INT)
5159 width_mask = ((HOST_WIDE_INT) 1 << bitsize) - 1;
5160
5161 /* If we are storing into an unaligned field of an aligned union that is
5162 in a register, we may have the mode of TARGET being an integer mode but
5163 MODE == BLKmode. In that case, get an aligned object whose size and
5164 alignment are the same as TARGET and store TARGET into it (we can avoid
5165 the store if the field being stored is the entire width of TARGET). Then
5166 call ourselves recursively to store the field into a BLKmode version of
5167 that object. Finally, load from the object into TARGET. This is not
5168 very efficient in general, but should only be slightly more expensive
5169 than the otherwise-required unaligned accesses. Perhaps this can be
5170 cleaned up later. It's tempting to make OBJECT readonly, but it's set
5171 twice, once with emit_move_insn and once via store_field. */
5172
5173 if (mode == BLKmode
5174 && (REG_P (target) || GET_CODE (target) == SUBREG))
5175 {
5176 rtx object = assign_temp (type, 0, 1, 1);
5177 rtx blk_object = adjust_address (object, BLKmode, 0);
5178
5179 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
5180 emit_move_insn (object, target);
5181
5182 store_field (blk_object, bitsize, bitpos, mode, exp, type, alias_set);
5183
5184 emit_move_insn (target, object);
5185
5186 /* We want to return the BLKmode version of the data. */
5187 return blk_object;
5188 }
5189
5190 if (GET_CODE (target) == CONCAT)
5191 {
5192 /* We're storing into a struct containing a single __complex. */
5193
5194 gcc_assert (!bitpos);
5195 return store_expr (exp, target, 0);
5196 }
5197
5198 /* If the structure is in a register or if the component
5199 is a bit field, we cannot use addressing to access it.
5200 Use bit-field techniques or SUBREG to store in it. */
5201
5202 if (mode == VOIDmode
5203 || (mode != BLKmode && ! direct_store[(int) mode]
5204 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
5205 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
5206 || REG_P (target)
5207 || GET_CODE (target) == SUBREG
5208 /* If the field isn't aligned enough to store as an ordinary memref,
5209 store it as a bit field. */
5210 || (mode != BLKmode
5211 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
5212 || bitpos % GET_MODE_ALIGNMENT (mode))
5213 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
5214 || (bitpos % BITS_PER_UNIT != 0)))
5215 /* If the RHS and field are a constant size and the size of the
5216 RHS isn't the same size as the bitfield, we must use bitfield
5217 operations. */
5218 || (bitsize >= 0
5219 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
5220 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0))
5221 {
5222 rtx temp;
5223
5224 /* If EXP is a NOP_EXPR of precision less than its mode, then that
5225 implies a mask operation. If the precision is the same size as
5226 the field we're storing into, that mask is redundant. This is
5227 particularly common with bit field assignments generated by the
5228 C front end. */
5229 if (TREE_CODE (exp) == NOP_EXPR)
5230 {
5231 tree type = TREE_TYPE (exp);
5232 if (INTEGRAL_TYPE_P (type)
5233 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
5234 && bitsize == TYPE_PRECISION (type))
5235 {
5236 type = TREE_TYPE (TREE_OPERAND (exp, 0));
5237 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
5238 exp = TREE_OPERAND (exp, 0);
5239 }
5240 }
5241
5242 temp = expand_expr (exp, NULL_RTX, VOIDmode, 0);
5243
5244 /* If BITSIZE is narrower than the size of the type of EXP
5245 we will be narrowing TEMP. Normally, what's wanted are the
5246 low-order bits. However, if EXP's type is a record and this is
5247 big-endian machine, we want the upper BITSIZE bits. */
5248 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
5249 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
5250 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
5251 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
5252 size_int (GET_MODE_BITSIZE (GET_MODE (temp))
5253 - bitsize),
5254 NULL_RTX, 1);
5255
5256 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
5257 MODE. */
5258 if (mode != VOIDmode && mode != BLKmode
5259 && mode != TYPE_MODE (TREE_TYPE (exp)))
5260 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
5261
5262 /* If the modes of TARGET and TEMP are both BLKmode, both
5263 must be in memory and BITPOS must be aligned on a byte
5264 boundary. If so, we simply do a block copy. */
5265 if (GET_MODE (target) == BLKmode && GET_MODE (temp) == BLKmode)
5266 {
5267 gcc_assert (MEM_P (target) && MEM_P (temp)
5268 && !(bitpos % BITS_PER_UNIT));
5269
5270 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
5271 emit_block_move (target, temp,
5272 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
5273 / BITS_PER_UNIT),
5274 BLOCK_OP_NORMAL);
5275
5276 return const0_rtx;
5277 }
5278
5279 /* Store the value in the bitfield. */
5280 store_bit_field (target, bitsize, bitpos, mode, temp);
5281
5282 return const0_rtx;
5283 }
5284 else
5285 {
5286 /* Now build a reference to just the desired component. */
5287 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
5288
5289 if (to_rtx == target)
5290 to_rtx = copy_rtx (to_rtx);
5291
5292 MEM_SET_IN_STRUCT_P (to_rtx, 1);
5293 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
5294 set_mem_alias_set (to_rtx, alias_set);
5295
5296 return store_expr (exp, to_rtx, 0);
5297 }
5298 }
5299 \f
5300 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
5301 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
5302 codes and find the ultimate containing object, which we return.
5303
5304 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
5305 bit position, and *PUNSIGNEDP to the signedness of the field.
5306 If the position of the field is variable, we store a tree
5307 giving the variable offset (in units) in *POFFSET.
5308 This offset is in addition to the bit position.
5309 If the position is not variable, we store 0 in *POFFSET.
5310
5311 If any of the extraction expressions is volatile,
5312 we store 1 in *PVOLATILEP. Otherwise we don't change that.
5313
5314 If the field is a bit-field, *PMODE is set to VOIDmode. Otherwise, it
5315 is a mode that can be used to access the field. In that case, *PBITSIZE
5316 is redundant.
5317
5318 If the field describes a variable-sized object, *PMODE is set to
5319 VOIDmode and *PBITSIZE is set to -1. An access cannot be made in
5320 this case, but the address of the object can be found.
5321
5322 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
5323 look through nodes that serve as markers of a greater alignment than
5324 the one that can be deduced from the expression. These nodes make it
5325 possible for front-ends to prevent temporaries from being created by
5326 the middle-end on alignment considerations. For that purpose, the
5327 normal operating mode at high-level is to always pass FALSE so that
5328 the ultimate containing object is really returned; moreover, the
5329 associated predicate handled_component_p will always return TRUE
5330 on these nodes, thus indicating that they are essentially handled
5331 by get_inner_reference. TRUE should only be passed when the caller
5332 is scanning the expression in order to build another representation
5333 and specifically knows how to handle these nodes; as such, this is
5334 the normal operating mode in the RTL expanders. */
5335
5336 tree
5337 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
5338 HOST_WIDE_INT *pbitpos, tree *poffset,
5339 enum machine_mode *pmode, int *punsignedp,
5340 int *pvolatilep, bool keep_aligning)
5341 {
5342 tree size_tree = 0;
5343 enum machine_mode mode = VOIDmode;
5344 tree offset = size_zero_node;
5345 tree bit_offset = bitsize_zero_node;
5346 tree tem;
5347
5348 /* First get the mode, signedness, and size. We do this from just the
5349 outermost expression. */
5350 if (TREE_CODE (exp) == COMPONENT_REF)
5351 {
5352 size_tree = DECL_SIZE (TREE_OPERAND (exp, 1));
5353 if (! DECL_BIT_FIELD (TREE_OPERAND (exp, 1)))
5354 mode = DECL_MODE (TREE_OPERAND (exp, 1));
5355
5356 *punsignedp = DECL_UNSIGNED (TREE_OPERAND (exp, 1));
5357 }
5358 else if (TREE_CODE (exp) == BIT_FIELD_REF)
5359 {
5360 size_tree = TREE_OPERAND (exp, 1);
5361 *punsignedp = BIT_FIELD_REF_UNSIGNED (exp);
5362 }
5363 else
5364 {
5365 mode = TYPE_MODE (TREE_TYPE (exp));
5366 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5367
5368 if (mode == BLKmode)
5369 size_tree = TYPE_SIZE (TREE_TYPE (exp));
5370 else
5371 *pbitsize = GET_MODE_BITSIZE (mode);
5372 }
5373
5374 if (size_tree != 0)
5375 {
5376 if (! host_integerp (size_tree, 1))
5377 mode = BLKmode, *pbitsize = -1;
5378 else
5379 *pbitsize = tree_low_cst (size_tree, 1);
5380 }
5381
5382 /* Compute cumulative bit-offset for nested component-refs and array-refs,
5383 and find the ultimate containing object. */
5384 while (1)
5385 {
5386 switch (TREE_CODE (exp))
5387 {
5388 case BIT_FIELD_REF:
5389 bit_offset = size_binop (PLUS_EXPR, bit_offset,
5390 TREE_OPERAND (exp, 2));
5391 break;
5392
5393 case COMPONENT_REF:
5394 {
5395 tree field = TREE_OPERAND (exp, 1);
5396 tree this_offset = component_ref_field_offset (exp);
5397
5398 /* If this field hasn't been filled in yet, don't go past it.
5399 This should only happen when folding expressions made during
5400 type construction. */
5401 if (this_offset == 0)
5402 break;
5403
5404 offset = size_binop (PLUS_EXPR, offset, this_offset);
5405 bit_offset = size_binop (PLUS_EXPR, bit_offset,
5406 DECL_FIELD_BIT_OFFSET (field));
5407
5408 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
5409 }
5410 break;
5411
5412 case ARRAY_REF:
5413 case ARRAY_RANGE_REF:
5414 {
5415 tree index = TREE_OPERAND (exp, 1);
5416 tree low_bound = array_ref_low_bound (exp);
5417 tree unit_size = array_ref_element_size (exp);
5418
5419 /* We assume all arrays have sizes that are a multiple of a byte.
5420 First subtract the lower bound, if any, in the type of the
5421 index, then convert to sizetype and multiply by the size of
5422 the array element. */
5423 if (! integer_zerop (low_bound))
5424 index = fold (build2 (MINUS_EXPR, TREE_TYPE (index),
5425 index, low_bound));
5426
5427 offset = size_binop (PLUS_EXPR, offset,
5428 size_binop (MULT_EXPR,
5429 convert (sizetype, index),
5430 unit_size));
5431 }
5432 break;
5433
5434 case REALPART_EXPR:
5435 break;
5436
5437 case IMAGPART_EXPR:
5438 bit_offset = size_binop (PLUS_EXPR, bit_offset,
5439 bitsize_int (*pbitsize));
5440 break;
5441
5442 case VIEW_CONVERT_EXPR:
5443 if (keep_aligning && STRICT_ALIGNMENT
5444 && (TYPE_ALIGN (TREE_TYPE (exp))
5445 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
5446 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
5447 < BIGGEST_ALIGNMENT)
5448 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
5449 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
5450 goto done;
5451 break;
5452
5453 default:
5454 goto done;
5455 }
5456
5457 /* If any reference in the chain is volatile, the effect is volatile. */
5458 if (TREE_THIS_VOLATILE (exp))
5459 *pvolatilep = 1;
5460
5461 exp = TREE_OPERAND (exp, 0);
5462 }
5463 done:
5464
5465 /* If OFFSET is constant, see if we can return the whole thing as a
5466 constant bit position. Otherwise, split it up. */
5467 if (host_integerp (offset, 0)
5468 && 0 != (tem = size_binop (MULT_EXPR, convert (bitsizetype, offset),
5469 bitsize_unit_node))
5470 && 0 != (tem = size_binop (PLUS_EXPR, tem, bit_offset))
5471 && host_integerp (tem, 0))
5472 *pbitpos = tree_low_cst (tem, 0), *poffset = 0;
5473 else
5474 *pbitpos = tree_low_cst (bit_offset, 0), *poffset = offset;
5475
5476 *pmode = mode;
5477 return exp;
5478 }
5479
5480 /* Return a tree of sizetype representing the size, in bytes, of the element
5481 of EXP, an ARRAY_REF. */
5482
5483 tree
5484 array_ref_element_size (tree exp)
5485 {
5486 tree aligned_size = TREE_OPERAND (exp, 3);
5487 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
5488
5489 /* If a size was specified in the ARRAY_REF, it's the size measured
5490 in alignment units of the element type. So multiply by that value. */
5491 if (aligned_size)
5492 {
5493 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
5494 sizetype from another type of the same width and signedness. */
5495 if (TREE_TYPE (aligned_size) != sizetype)
5496 aligned_size = fold_convert (sizetype, aligned_size);
5497 return size_binop (MULT_EXPR, aligned_size,
5498 size_int (TYPE_ALIGN_UNIT (elmt_type)));
5499 }
5500
5501 /* Otherwise, take the size from that of the element type. Substitute
5502 any PLACEHOLDER_EXPR that we have. */
5503 else
5504 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
5505 }
5506
5507 /* Return a tree representing the lower bound of the array mentioned in
5508 EXP, an ARRAY_REF. */
5509
5510 tree
5511 array_ref_low_bound (tree exp)
5512 {
5513 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
5514
5515 /* If a lower bound is specified in EXP, use it. */
5516 if (TREE_OPERAND (exp, 2))
5517 return TREE_OPERAND (exp, 2);
5518
5519 /* Otherwise, if there is a domain type and it has a lower bound, use it,
5520 substituting for a PLACEHOLDER_EXPR as needed. */
5521 if (domain_type && TYPE_MIN_VALUE (domain_type))
5522 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
5523
5524 /* Otherwise, return a zero of the appropriate type. */
5525 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
5526 }
5527
5528 /* Return a tree representing the upper bound of the array mentioned in
5529 EXP, an ARRAY_REF. */
5530
5531 tree
5532 array_ref_up_bound (tree exp)
5533 {
5534 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
5535
5536 /* If there is a domain type and it has an upper bound, use it, substituting
5537 for a PLACEHOLDER_EXPR as needed. */
5538 if (domain_type && TYPE_MAX_VALUE (domain_type))
5539 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
5540
5541 /* Otherwise fail. */
5542 return NULL_TREE;
5543 }
5544
5545 /* Return a tree representing the offset, in bytes, of the field referenced
5546 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
5547
5548 tree
5549 component_ref_field_offset (tree exp)
5550 {
5551 tree aligned_offset = TREE_OPERAND (exp, 2);
5552 tree field = TREE_OPERAND (exp, 1);
5553
5554 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
5555 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
5556 value. */
5557 if (aligned_offset)
5558 {
5559 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
5560 sizetype from another type of the same width and signedness. */
5561 if (TREE_TYPE (aligned_offset) != sizetype)
5562 aligned_offset = fold_convert (sizetype, aligned_offset);
5563 return size_binop (MULT_EXPR, aligned_offset,
5564 size_int (DECL_OFFSET_ALIGN (field) / BITS_PER_UNIT));
5565 }
5566
5567 /* Otherwise, take the offset from that of the field. Substitute
5568 any PLACEHOLDER_EXPR that we have. */
5569 else
5570 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
5571 }
5572
5573 /* Return 1 if T is an expression that get_inner_reference handles. */
5574
5575 int
5576 handled_component_p (tree t)
5577 {
5578 switch (TREE_CODE (t))
5579 {
5580 case BIT_FIELD_REF:
5581 case COMPONENT_REF:
5582 case ARRAY_REF:
5583 case ARRAY_RANGE_REF:
5584 case VIEW_CONVERT_EXPR:
5585 case REALPART_EXPR:
5586 case IMAGPART_EXPR:
5587 return 1;
5588
5589 default:
5590 return 0;
5591 }
5592 }
5593 \f
5594 /* Given an rtx VALUE that may contain additions and multiplications, return
5595 an equivalent value that just refers to a register, memory, or constant.
5596 This is done by generating instructions to perform the arithmetic and
5597 returning a pseudo-register containing the value.
5598
5599 The returned value may be a REG, SUBREG, MEM or constant. */
5600
5601 rtx
5602 force_operand (rtx value, rtx target)
5603 {
5604 rtx op1, op2;
5605 /* Use subtarget as the target for operand 0 of a binary operation. */
5606 rtx subtarget = get_subtarget (target);
5607 enum rtx_code code = GET_CODE (value);
5608
5609 /* Check for subreg applied to an expression produced by loop optimizer. */
5610 if (code == SUBREG
5611 && !REG_P (SUBREG_REG (value))
5612 && !MEM_P (SUBREG_REG (value)))
5613 {
5614 value = simplify_gen_subreg (GET_MODE (value),
5615 force_reg (GET_MODE (SUBREG_REG (value)),
5616 force_operand (SUBREG_REG (value),
5617 NULL_RTX)),
5618 GET_MODE (SUBREG_REG (value)),
5619 SUBREG_BYTE (value));
5620 code = GET_CODE (value);
5621 }
5622
5623 /* Check for a PIC address load. */
5624 if ((code == PLUS || code == MINUS)
5625 && XEXP (value, 0) == pic_offset_table_rtx
5626 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
5627 || GET_CODE (XEXP (value, 1)) == LABEL_REF
5628 || GET_CODE (XEXP (value, 1)) == CONST))
5629 {
5630 if (!subtarget)
5631 subtarget = gen_reg_rtx (GET_MODE (value));
5632 emit_move_insn (subtarget, value);
5633 return subtarget;
5634 }
5635
5636 if (code == ZERO_EXTEND || code == SIGN_EXTEND)
5637 {
5638 if (!target)
5639 target = gen_reg_rtx (GET_MODE (value));
5640 convert_move (target, force_operand (XEXP (value, 0), NULL),
5641 code == ZERO_EXTEND);
5642 return target;
5643 }
5644
5645 if (ARITHMETIC_P (value))
5646 {
5647 op2 = XEXP (value, 1);
5648 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
5649 subtarget = 0;
5650 if (code == MINUS && GET_CODE (op2) == CONST_INT)
5651 {
5652 code = PLUS;
5653 op2 = negate_rtx (GET_MODE (value), op2);
5654 }
5655
5656 /* Check for an addition with OP2 a constant integer and our first
5657 operand a PLUS of a virtual register and something else. In that
5658 case, we want to emit the sum of the virtual register and the
5659 constant first and then add the other value. This allows virtual
5660 register instantiation to simply modify the constant rather than
5661 creating another one around this addition. */
5662 if (code == PLUS && GET_CODE (op2) == CONST_INT
5663 && GET_CODE (XEXP (value, 0)) == PLUS
5664 && REG_P (XEXP (XEXP (value, 0), 0))
5665 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
5666 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
5667 {
5668 rtx temp = expand_simple_binop (GET_MODE (value), code,
5669 XEXP (XEXP (value, 0), 0), op2,
5670 subtarget, 0, OPTAB_LIB_WIDEN);
5671 return expand_simple_binop (GET_MODE (value), code, temp,
5672 force_operand (XEXP (XEXP (value,
5673 0), 1), 0),
5674 target, 0, OPTAB_LIB_WIDEN);
5675 }
5676
5677 op1 = force_operand (XEXP (value, 0), subtarget);
5678 op2 = force_operand (op2, NULL_RTX);
5679 switch (code)
5680 {
5681 case MULT:
5682 return expand_mult (GET_MODE (value), op1, op2, target, 1);
5683 case DIV:
5684 if (!INTEGRAL_MODE_P (GET_MODE (value)))
5685 return expand_simple_binop (GET_MODE (value), code, op1, op2,
5686 target, 1, OPTAB_LIB_WIDEN);
5687 else
5688 return expand_divmod (0,
5689 FLOAT_MODE_P (GET_MODE (value))
5690 ? RDIV_EXPR : TRUNC_DIV_EXPR,
5691 GET_MODE (value), op1, op2, target, 0);
5692 break;
5693 case MOD:
5694 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
5695 target, 0);
5696 break;
5697 case UDIV:
5698 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
5699 target, 1);
5700 break;
5701 case UMOD:
5702 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
5703 target, 1);
5704 break;
5705 case ASHIFTRT:
5706 return expand_simple_binop (GET_MODE (value), code, op1, op2,
5707 target, 0, OPTAB_LIB_WIDEN);
5708 break;
5709 default:
5710 return expand_simple_binop (GET_MODE (value), code, op1, op2,
5711 target, 1, OPTAB_LIB_WIDEN);
5712 }
5713 }
5714 if (UNARY_P (value))
5715 {
5716 op1 = force_operand (XEXP (value, 0), NULL_RTX);
5717 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
5718 }
5719
5720 #ifdef INSN_SCHEDULING
5721 /* On machines that have insn scheduling, we want all memory reference to be
5722 explicit, so we need to deal with such paradoxical SUBREGs. */
5723 if (GET_CODE (value) == SUBREG && MEM_P (SUBREG_REG (value))
5724 && (GET_MODE_SIZE (GET_MODE (value))
5725 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (value)))))
5726 value
5727 = simplify_gen_subreg (GET_MODE (value),
5728 force_reg (GET_MODE (SUBREG_REG (value)),
5729 force_operand (SUBREG_REG (value),
5730 NULL_RTX)),
5731 GET_MODE (SUBREG_REG (value)),
5732 SUBREG_BYTE (value));
5733 #endif
5734
5735 return value;
5736 }
5737 \f
5738 /* Subroutine of expand_expr: return nonzero iff there is no way that
5739 EXP can reference X, which is being modified. TOP_P is nonzero if this
5740 call is going to be used to determine whether we need a temporary
5741 for EXP, as opposed to a recursive call to this function.
5742
5743 It is always safe for this routine to return zero since it merely
5744 searches for optimization opportunities. */
5745
5746 int
5747 safe_from_p (rtx x, tree exp, int top_p)
5748 {
5749 rtx exp_rtl = 0;
5750 int i, nops;
5751
5752 if (x == 0
5753 /* If EXP has varying size, we MUST use a target since we currently
5754 have no way of allocating temporaries of variable size
5755 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
5756 So we assume here that something at a higher level has prevented a
5757 clash. This is somewhat bogus, but the best we can do. Only
5758 do this when X is BLKmode and when we are at the top level. */
5759 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
5760 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
5761 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
5762 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
5763 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
5764 != INTEGER_CST)
5765 && GET_MODE (x) == BLKmode)
5766 /* If X is in the outgoing argument area, it is always safe. */
5767 || (MEM_P (x)
5768 && (XEXP (x, 0) == virtual_outgoing_args_rtx
5769 || (GET_CODE (XEXP (x, 0)) == PLUS
5770 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
5771 return 1;
5772
5773 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
5774 find the underlying pseudo. */
5775 if (GET_CODE (x) == SUBREG)
5776 {
5777 x = SUBREG_REG (x);
5778 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
5779 return 0;
5780 }
5781
5782 /* Now look at our tree code and possibly recurse. */
5783 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
5784 {
5785 case tcc_declaration:
5786 exp_rtl = DECL_RTL_IF_SET (exp);
5787 break;
5788
5789 case tcc_constant:
5790 return 1;
5791
5792 case tcc_exceptional:
5793 if (TREE_CODE (exp) == TREE_LIST)
5794 {
5795 while (1)
5796 {
5797 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
5798 return 0;
5799 exp = TREE_CHAIN (exp);
5800 if (!exp)
5801 return 1;
5802 if (TREE_CODE (exp) != TREE_LIST)
5803 return safe_from_p (x, exp, 0);
5804 }
5805 }
5806 else if (TREE_CODE (exp) == ERROR_MARK)
5807 return 1; /* An already-visited SAVE_EXPR? */
5808 else
5809 return 0;
5810
5811 case tcc_statement:
5812 /* The only case we look at here is the DECL_INITIAL inside a
5813 DECL_EXPR. */
5814 return (TREE_CODE (exp) != DECL_EXPR
5815 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
5816 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
5817 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
5818
5819 case tcc_binary:
5820 case tcc_comparison:
5821 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
5822 return 0;
5823 /* Fall through. */
5824
5825 case tcc_unary:
5826 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
5827
5828 case tcc_expression:
5829 case tcc_reference:
5830 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
5831 the expression. If it is set, we conflict iff we are that rtx or
5832 both are in memory. Otherwise, we check all operands of the
5833 expression recursively. */
5834
5835 switch (TREE_CODE (exp))
5836 {
5837 case ADDR_EXPR:
5838 /* If the operand is static or we are static, we can't conflict.
5839 Likewise if we don't conflict with the operand at all. */
5840 if (staticp (TREE_OPERAND (exp, 0))
5841 || TREE_STATIC (exp)
5842 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
5843 return 1;
5844
5845 /* Otherwise, the only way this can conflict is if we are taking
5846 the address of a DECL a that address if part of X, which is
5847 very rare. */
5848 exp = TREE_OPERAND (exp, 0);
5849 if (DECL_P (exp))
5850 {
5851 if (!DECL_RTL_SET_P (exp)
5852 || !MEM_P (DECL_RTL (exp)))
5853 return 0;
5854 else
5855 exp_rtl = XEXP (DECL_RTL (exp), 0);
5856 }
5857 break;
5858
5859 case MISALIGNED_INDIRECT_REF:
5860 case ALIGN_INDIRECT_REF:
5861 case INDIRECT_REF:
5862 if (MEM_P (x)
5863 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
5864 get_alias_set (exp)))
5865 return 0;
5866 break;
5867
5868 case CALL_EXPR:
5869 /* Assume that the call will clobber all hard registers and
5870 all of memory. */
5871 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
5872 || MEM_P (x))
5873 return 0;
5874 break;
5875
5876 case WITH_CLEANUP_EXPR:
5877 case CLEANUP_POINT_EXPR:
5878 /* Lowered by gimplify.c. */
5879 gcc_unreachable ();
5880
5881 case SAVE_EXPR:
5882 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
5883
5884 default:
5885 break;
5886 }
5887
5888 /* If we have an rtx, we do not need to scan our operands. */
5889 if (exp_rtl)
5890 break;
5891
5892 nops = TREE_CODE_LENGTH (TREE_CODE (exp));
5893 for (i = 0; i < nops; i++)
5894 if (TREE_OPERAND (exp, i) != 0
5895 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
5896 return 0;
5897
5898 /* If this is a language-specific tree code, it may require
5899 special handling. */
5900 if ((unsigned int) TREE_CODE (exp)
5901 >= (unsigned int) LAST_AND_UNUSED_TREE_CODE
5902 && !lang_hooks.safe_from_p (x, exp))
5903 return 0;
5904 break;
5905
5906 case tcc_type:
5907 /* Should never get a type here. */
5908 gcc_unreachable ();
5909 }
5910
5911 /* If we have an rtl, find any enclosed object. Then see if we conflict
5912 with it. */
5913 if (exp_rtl)
5914 {
5915 if (GET_CODE (exp_rtl) == SUBREG)
5916 {
5917 exp_rtl = SUBREG_REG (exp_rtl);
5918 if (REG_P (exp_rtl)
5919 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
5920 return 0;
5921 }
5922
5923 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
5924 are memory and they conflict. */
5925 return ! (rtx_equal_p (x, exp_rtl)
5926 || (MEM_P (x) && MEM_P (exp_rtl)
5927 && true_dependence (exp_rtl, VOIDmode, x,
5928 rtx_addr_varies_p)));
5929 }
5930
5931 /* If we reach here, it is safe. */
5932 return 1;
5933 }
5934
5935 \f
5936 /* Return the highest power of two that EXP is known to be a multiple of.
5937 This is used in updating alignment of MEMs in array references. */
5938
5939 static unsigned HOST_WIDE_INT
5940 highest_pow2_factor (tree exp)
5941 {
5942 unsigned HOST_WIDE_INT c0, c1;
5943
5944 switch (TREE_CODE (exp))
5945 {
5946 case INTEGER_CST:
5947 /* We can find the lowest bit that's a one. If the low
5948 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
5949 We need to handle this case since we can find it in a COND_EXPR,
5950 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
5951 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
5952 later ICE. */
5953 if (TREE_CONSTANT_OVERFLOW (exp))
5954 return BIGGEST_ALIGNMENT;
5955 else
5956 {
5957 /* Note: tree_low_cst is intentionally not used here,
5958 we don't care about the upper bits. */
5959 c0 = TREE_INT_CST_LOW (exp);
5960 c0 &= -c0;
5961 return c0 ? c0 : BIGGEST_ALIGNMENT;
5962 }
5963 break;
5964
5965 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
5966 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
5967 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
5968 return MIN (c0, c1);
5969
5970 case MULT_EXPR:
5971 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
5972 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
5973 return c0 * c1;
5974
5975 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
5976 case CEIL_DIV_EXPR:
5977 if (integer_pow2p (TREE_OPERAND (exp, 1))
5978 && host_integerp (TREE_OPERAND (exp, 1), 1))
5979 {
5980 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
5981 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
5982 return MAX (1, c0 / c1);
5983 }
5984 break;
5985
5986 case NON_LVALUE_EXPR: case NOP_EXPR: case CONVERT_EXPR:
5987 case SAVE_EXPR:
5988 return highest_pow2_factor (TREE_OPERAND (exp, 0));
5989
5990 case COMPOUND_EXPR:
5991 return highest_pow2_factor (TREE_OPERAND (exp, 1));
5992
5993 case COND_EXPR:
5994 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
5995 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
5996 return MIN (c0, c1);
5997
5998 default:
5999 break;
6000 }
6001
6002 return 1;
6003 }
6004
6005 /* Similar, except that the alignment requirements of TARGET are
6006 taken into account. Assume it is at least as aligned as its
6007 type, unless it is a COMPONENT_REF in which case the layout of
6008 the structure gives the alignment. */
6009
6010 static unsigned HOST_WIDE_INT
6011 highest_pow2_factor_for_target (tree target, tree exp)
6012 {
6013 unsigned HOST_WIDE_INT target_align, factor;
6014
6015 factor = highest_pow2_factor (exp);
6016 if (TREE_CODE (target) == COMPONENT_REF)
6017 target_align = DECL_ALIGN_UNIT (TREE_OPERAND (target, 1));
6018 else
6019 target_align = TYPE_ALIGN_UNIT (TREE_TYPE (target));
6020 return MAX (factor, target_align);
6021 }
6022 \f
6023 /* Expands variable VAR. */
6024
6025 void
6026 expand_var (tree var)
6027 {
6028 if (DECL_EXTERNAL (var))
6029 return;
6030
6031 if (TREE_STATIC (var))
6032 /* If this is an inlined copy of a static local variable,
6033 look up the original decl. */
6034 var = DECL_ORIGIN (var);
6035
6036 if (TREE_STATIC (var)
6037 ? !TREE_ASM_WRITTEN (var)
6038 : !DECL_RTL_SET_P (var))
6039 {
6040 if (TREE_CODE (var) == VAR_DECL && DECL_VALUE_EXPR (var))
6041 /* Should be ignored. */;
6042 else if (lang_hooks.expand_decl (var))
6043 /* OK. */;
6044 else if (TREE_CODE (var) == VAR_DECL && !TREE_STATIC (var))
6045 expand_decl (var);
6046 else if (TREE_CODE (var) == VAR_DECL && TREE_STATIC (var))
6047 rest_of_decl_compilation (var, 0, 0);
6048 else
6049 /* No expansion needed. */
6050 gcc_assert (TREE_CODE (var) == TYPE_DECL
6051 || TREE_CODE (var) == CONST_DECL
6052 || TREE_CODE (var) == FUNCTION_DECL
6053 || TREE_CODE (var) == LABEL_DECL);
6054 }
6055 }
6056
6057 /* Subroutine of expand_expr. Expand the two operands of a binary
6058 expression EXP0 and EXP1 placing the results in OP0 and OP1.
6059 The value may be stored in TARGET if TARGET is nonzero. The
6060 MODIFIER argument is as documented by expand_expr. */
6061
6062 static void
6063 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
6064 enum expand_modifier modifier)
6065 {
6066 if (! safe_from_p (target, exp1, 1))
6067 target = 0;
6068 if (operand_equal_p (exp0, exp1, 0))
6069 {
6070 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6071 *op1 = copy_rtx (*op0);
6072 }
6073 else
6074 {
6075 /* If we need to preserve evaluation order, copy exp0 into its own
6076 temporary variable so that it can't be clobbered by exp1. */
6077 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
6078 exp0 = save_expr (exp0);
6079 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6080 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
6081 }
6082 }
6083
6084 \f
6085 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
6086 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
6087
6088 static rtx
6089 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
6090 enum expand_modifier modifier)
6091 {
6092 rtx result, subtarget;
6093 tree inner, offset;
6094 HOST_WIDE_INT bitsize, bitpos;
6095 int volatilep, unsignedp;
6096 enum machine_mode mode1;
6097
6098 /* If we are taking the address of a constant and are at the top level,
6099 we have to use output_constant_def since we can't call force_const_mem
6100 at top level. */
6101 /* ??? This should be considered a front-end bug. We should not be
6102 generating ADDR_EXPR of something that isn't an LVALUE. The only
6103 exception here is STRING_CST. */
6104 if (TREE_CODE (exp) == CONSTRUCTOR
6105 || CONSTANT_CLASS_P (exp))
6106 return XEXP (output_constant_def (exp, 0), 0);
6107
6108 /* Everything must be something allowed by is_gimple_addressable. */
6109 switch (TREE_CODE (exp))
6110 {
6111 case INDIRECT_REF:
6112 /* This case will happen via recursion for &a->b. */
6113 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, EXPAND_NORMAL);
6114
6115 case CONST_DECL:
6116 /* Recurse and make the output_constant_def clause above handle this. */
6117 return expand_expr_addr_expr_1 (DECL_INITIAL (exp), target,
6118 tmode, modifier);
6119
6120 case REALPART_EXPR:
6121 /* The real part of the complex number is always first, therefore
6122 the address is the same as the address of the parent object. */
6123 offset = 0;
6124 bitpos = 0;
6125 inner = TREE_OPERAND (exp, 0);
6126 break;
6127
6128 case IMAGPART_EXPR:
6129 /* The imaginary part of the complex number is always second.
6130 The expression is therefore always offset by the size of the
6131 scalar type. */
6132 offset = 0;
6133 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
6134 inner = TREE_OPERAND (exp, 0);
6135 break;
6136
6137 default:
6138 /* If the object is a DECL, then expand it for its rtl. Don't bypass
6139 expand_expr, as that can have various side effects; LABEL_DECLs for
6140 example, may not have their DECL_RTL set yet. Assume language
6141 specific tree nodes can be expanded in some interesting way. */
6142 if (DECL_P (exp)
6143 || TREE_CODE (exp) >= LAST_AND_UNUSED_TREE_CODE)
6144 {
6145 result = expand_expr (exp, target, tmode,
6146 modifier == EXPAND_INITIALIZER
6147 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
6148
6149 /* If the DECL isn't in memory, then the DECL wasn't properly
6150 marked TREE_ADDRESSABLE, which will be either a front-end
6151 or a tree optimizer bug. */
6152 gcc_assert (GET_CODE (result) == MEM);
6153 result = XEXP (result, 0);
6154
6155 /* ??? Is this needed anymore? */
6156 if (DECL_P (exp) && !TREE_USED (exp) == 0)
6157 {
6158 assemble_external (exp);
6159 TREE_USED (exp) = 1;
6160 }
6161
6162 if (modifier != EXPAND_INITIALIZER
6163 && modifier != EXPAND_CONST_ADDRESS)
6164 result = force_operand (result, target);
6165 return result;
6166 }
6167
6168 /* Pass FALSE as the last argument to get_inner_reference although
6169 we are expanding to RTL. The rationale is that we know how to
6170 handle "aligning nodes" here: we can just bypass them because
6171 they won't change the final object whose address will be returned
6172 (they actually exist only for that purpose). */
6173 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
6174 &mode1, &unsignedp, &volatilep, false);
6175 break;
6176 }
6177
6178 /* We must have made progress. */
6179 gcc_assert (inner != exp);
6180
6181 subtarget = offset || bitpos ? NULL_RTX : target;
6182 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier);
6183
6184 if (offset)
6185 {
6186 rtx tmp;
6187
6188 if (modifier != EXPAND_NORMAL)
6189 result = force_operand (result, NULL);
6190 tmp = expand_expr (offset, NULL, tmode, EXPAND_NORMAL);
6191
6192 result = convert_memory_address (tmode, result);
6193 tmp = convert_memory_address (tmode, tmp);
6194
6195 if (modifier == EXPAND_SUM)
6196 result = gen_rtx_PLUS (tmode, result, tmp);
6197 else
6198 {
6199 subtarget = bitpos ? NULL_RTX : target;
6200 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
6201 1, OPTAB_LIB_WIDEN);
6202 }
6203 }
6204
6205 if (bitpos)
6206 {
6207 /* Someone beforehand should have rejected taking the address
6208 of such an object. */
6209 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
6210
6211 result = plus_constant (result, bitpos / BITS_PER_UNIT);
6212 if (modifier < EXPAND_SUM)
6213 result = force_operand (result, target);
6214 }
6215
6216 return result;
6217 }
6218
6219 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
6220 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
6221
6222 static rtx
6223 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
6224 enum expand_modifier modifier)
6225 {
6226 enum machine_mode rmode;
6227 rtx result;
6228
6229 /* Target mode of VOIDmode says "whatever's natural". */
6230 if (tmode == VOIDmode)
6231 tmode = TYPE_MODE (TREE_TYPE (exp));
6232
6233 /* We can get called with some Weird Things if the user does silliness
6234 like "(short) &a". In that case, convert_memory_address won't do
6235 the right thing, so ignore the given target mode. */
6236 if (tmode != Pmode && tmode != ptr_mode)
6237 tmode = Pmode;
6238
6239 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
6240 tmode, modifier);
6241
6242 /* Despite expand_expr claims concerning ignoring TMODE when not
6243 strictly convenient, stuff breaks if we don't honor it. Note
6244 that combined with the above, we only do this for pointer modes. */
6245 rmode = GET_MODE (result);
6246 if (rmode == VOIDmode)
6247 rmode = tmode;
6248 if (rmode != tmode)
6249 result = convert_memory_address (tmode, result);
6250
6251 return result;
6252 }
6253
6254
6255 /* expand_expr: generate code for computing expression EXP.
6256 An rtx for the computed value is returned. The value is never null.
6257 In the case of a void EXP, const0_rtx is returned.
6258
6259 The value may be stored in TARGET if TARGET is nonzero.
6260 TARGET is just a suggestion; callers must assume that
6261 the rtx returned may not be the same as TARGET.
6262
6263 If TARGET is CONST0_RTX, it means that the value will be ignored.
6264
6265 If TMODE is not VOIDmode, it suggests generating the
6266 result in mode TMODE. But this is done only when convenient.
6267 Otherwise, TMODE is ignored and the value generated in its natural mode.
6268 TMODE is just a suggestion; callers must assume that
6269 the rtx returned may not have mode TMODE.
6270
6271 Note that TARGET may have neither TMODE nor MODE. In that case, it
6272 probably will not be used.
6273
6274 If MODIFIER is EXPAND_SUM then when EXP is an addition
6275 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
6276 or a nest of (PLUS ...) and (MINUS ...) where the terms are
6277 products as above, or REG or MEM, or constant.
6278 Ordinarily in such cases we would output mul or add instructions
6279 and then return a pseudo reg containing the sum.
6280
6281 EXPAND_INITIALIZER is much like EXPAND_SUM except that
6282 it also marks a label as absolutely required (it can't be dead).
6283 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
6284 This is used for outputting expressions used in initializers.
6285
6286 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
6287 with a constant address even if that address is not normally legitimate.
6288 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
6289
6290 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
6291 a call parameter. Such targets require special care as we haven't yet
6292 marked TARGET so that it's safe from being trashed by libcalls. We
6293 don't want to use TARGET for anything but the final result;
6294 Intermediate values must go elsewhere. Additionally, calls to
6295 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
6296
6297 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
6298 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
6299 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
6300 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
6301 recursively. */
6302
6303 static rtx expand_expr_real_1 (tree, rtx, enum machine_mode,
6304 enum expand_modifier, rtx *);
6305
6306 rtx
6307 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
6308 enum expand_modifier modifier, rtx *alt_rtl)
6309 {
6310 int rn = -1;
6311 rtx ret, last = NULL;
6312
6313 /* Handle ERROR_MARK before anybody tries to access its type. */
6314 if (TREE_CODE (exp) == ERROR_MARK
6315 || TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK)
6316 {
6317 ret = CONST0_RTX (tmode);
6318 return ret ? ret : const0_rtx;
6319 }
6320
6321 if (flag_non_call_exceptions)
6322 {
6323 rn = lookup_stmt_eh_region (exp);
6324 /* If rn < 0, then either (1) tree-ssa not used or (2) doesn't throw. */
6325 if (rn >= 0)
6326 last = get_last_insn ();
6327 }
6328
6329 /* If this is an expression of some kind and it has an associated line
6330 number, then emit the line number before expanding the expression.
6331
6332 We need to save and restore the file and line information so that
6333 errors discovered during expansion are emitted with the right
6334 information. It would be better of the diagnostic routines
6335 used the file/line information embedded in the tree nodes rather
6336 than globals. */
6337 if (cfun && EXPR_HAS_LOCATION (exp))
6338 {
6339 location_t saved_location = input_location;
6340 input_location = EXPR_LOCATION (exp);
6341 emit_line_note (input_location);
6342
6343 /* Record where the insns produced belong. */
6344 record_block_change (TREE_BLOCK (exp));
6345
6346 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
6347
6348 input_location = saved_location;
6349 }
6350 else
6351 {
6352 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
6353 }
6354
6355 /* If using non-call exceptions, mark all insns that may trap.
6356 expand_call() will mark CALL_INSNs before we get to this code,
6357 but it doesn't handle libcalls, and these may trap. */
6358 if (rn >= 0)
6359 {
6360 rtx insn;
6361 for (insn = next_real_insn (last); insn;
6362 insn = next_real_insn (insn))
6363 {
6364 if (! find_reg_note (insn, REG_EH_REGION, NULL_RTX)
6365 /* If we want exceptions for non-call insns, any
6366 may_trap_p instruction may throw. */
6367 && GET_CODE (PATTERN (insn)) != CLOBBER
6368 && GET_CODE (PATTERN (insn)) != USE
6369 && (CALL_P (insn) || may_trap_p (PATTERN (insn))))
6370 {
6371 REG_NOTES (insn) = alloc_EXPR_LIST (REG_EH_REGION, GEN_INT (rn),
6372 REG_NOTES (insn));
6373 }
6374 }
6375 }
6376
6377 return ret;
6378 }
6379
6380 static rtx
6381 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
6382 enum expand_modifier modifier, rtx *alt_rtl)
6383 {
6384 rtx op0, op1, temp;
6385 tree type = TREE_TYPE (exp);
6386 int unsignedp;
6387 enum machine_mode mode;
6388 enum tree_code code = TREE_CODE (exp);
6389 optab this_optab;
6390 rtx subtarget, original_target;
6391 int ignore;
6392 tree context;
6393 bool reduce_bit_field = false;
6394 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field && !ignore \
6395 ? reduce_to_bit_field_precision ((expr), \
6396 target, \
6397 type) \
6398 : (expr))
6399
6400 mode = TYPE_MODE (type);
6401 unsignedp = TYPE_UNSIGNED (type);
6402 if (lang_hooks.reduce_bit_field_operations
6403 && TREE_CODE (type) == INTEGER_TYPE
6404 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type))
6405 {
6406 /* An operation in what may be a bit-field type needs the
6407 result to be reduced to the precision of the bit-field type,
6408 which is narrower than that of the type's mode. */
6409 reduce_bit_field = true;
6410 if (modifier == EXPAND_STACK_PARM)
6411 target = 0;
6412 }
6413
6414 /* Use subtarget as the target for operand 0 of a binary operation. */
6415 subtarget = get_subtarget (target);
6416 original_target = target;
6417 ignore = (target == const0_rtx
6418 || ((code == NON_LVALUE_EXPR || code == NOP_EXPR
6419 || code == CONVERT_EXPR || code == COND_EXPR
6420 || code == VIEW_CONVERT_EXPR)
6421 && TREE_CODE (type) == VOID_TYPE));
6422
6423 /* If we are going to ignore this result, we need only do something
6424 if there is a side-effect somewhere in the expression. If there
6425 is, short-circuit the most common cases here. Note that we must
6426 not call expand_expr with anything but const0_rtx in case this
6427 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
6428
6429 if (ignore)
6430 {
6431 if (! TREE_SIDE_EFFECTS (exp))
6432 return const0_rtx;
6433
6434 /* Ensure we reference a volatile object even if value is ignored, but
6435 don't do this if all we are doing is taking its address. */
6436 if (TREE_THIS_VOLATILE (exp)
6437 && TREE_CODE (exp) != FUNCTION_DECL
6438 && mode != VOIDmode && mode != BLKmode
6439 && modifier != EXPAND_CONST_ADDRESS)
6440 {
6441 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
6442 if (MEM_P (temp))
6443 temp = copy_to_reg (temp);
6444 return const0_rtx;
6445 }
6446
6447 if (TREE_CODE_CLASS (code) == tcc_unary
6448 || code == COMPONENT_REF || code == INDIRECT_REF)
6449 return expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
6450 modifier);
6451
6452 else if (TREE_CODE_CLASS (code) == tcc_binary
6453 || TREE_CODE_CLASS (code) == tcc_comparison
6454 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
6455 {
6456 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode, modifier);
6457 expand_expr (TREE_OPERAND (exp, 1), const0_rtx, VOIDmode, modifier);
6458 return const0_rtx;
6459 }
6460 else if (code == BIT_FIELD_REF)
6461 {
6462 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode, modifier);
6463 expand_expr (TREE_OPERAND (exp, 1), const0_rtx, VOIDmode, modifier);
6464 expand_expr (TREE_OPERAND (exp, 2), const0_rtx, VOIDmode, modifier);
6465 return const0_rtx;
6466 }
6467
6468 target = 0;
6469 }
6470
6471 /* If will do cse, generate all results into pseudo registers
6472 since 1) that allows cse to find more things
6473 and 2) otherwise cse could produce an insn the machine
6474 cannot support. An exception is a CONSTRUCTOR into a multi-word
6475 MEM: that's much more likely to be most efficient into the MEM.
6476 Another is a CALL_EXPR which must return in memory. */
6477
6478 if (! cse_not_expected && mode != BLKmode && target
6479 && (!REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER)
6480 && ! (code == CONSTRUCTOR && GET_MODE_SIZE (mode) > UNITS_PER_WORD)
6481 && ! (code == CALL_EXPR && aggregate_value_p (exp, exp)))
6482 target = 0;
6483
6484 switch (code)
6485 {
6486 case LABEL_DECL:
6487 {
6488 tree function = decl_function_context (exp);
6489
6490 temp = label_rtx (exp);
6491 temp = gen_rtx_LABEL_REF (Pmode, temp);
6492
6493 if (function != current_function_decl
6494 && function != 0)
6495 LABEL_REF_NONLOCAL_P (temp) = 1;
6496
6497 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
6498 return temp;
6499 }
6500
6501 case SSA_NAME:
6502 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
6503 NULL);
6504
6505 case PARM_DECL:
6506 case VAR_DECL:
6507 /* If a static var's type was incomplete when the decl was written,
6508 but the type is complete now, lay out the decl now. */
6509 if (DECL_SIZE (exp) == 0
6510 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
6511 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
6512 layout_decl (exp, 0);
6513
6514 /* ... fall through ... */
6515
6516 case FUNCTION_DECL:
6517 case RESULT_DECL:
6518 gcc_assert (DECL_RTL (exp));
6519
6520 /* Ensure variable marked as used even if it doesn't go through
6521 a parser. If it hasn't be used yet, write out an external
6522 definition. */
6523 if (! TREE_USED (exp))
6524 {
6525 assemble_external (exp);
6526 TREE_USED (exp) = 1;
6527 }
6528
6529 /* Show we haven't gotten RTL for this yet. */
6530 temp = 0;
6531
6532 /* Variables inherited from containing functions should have
6533 been lowered by this point. */
6534 context = decl_function_context (exp);
6535 gcc_assert (!context
6536 || context == current_function_decl
6537 || TREE_STATIC (exp)
6538 /* ??? C++ creates functions that are not TREE_STATIC. */
6539 || TREE_CODE (exp) == FUNCTION_DECL);
6540
6541 /* This is the case of an array whose size is to be determined
6542 from its initializer, while the initializer is still being parsed.
6543 See expand_decl. */
6544
6545 if (MEM_P (DECL_RTL (exp))
6546 && REG_P (XEXP (DECL_RTL (exp), 0)))
6547 temp = validize_mem (DECL_RTL (exp));
6548
6549 /* If DECL_RTL is memory, we are in the normal case and either
6550 the address is not valid or it is not a register and -fforce-addr
6551 is specified, get the address into a register. */
6552
6553 else if (MEM_P (DECL_RTL (exp))
6554 && modifier != EXPAND_CONST_ADDRESS
6555 && modifier != EXPAND_SUM
6556 && modifier != EXPAND_INITIALIZER
6557 && (! memory_address_p (DECL_MODE (exp),
6558 XEXP (DECL_RTL (exp), 0))
6559 || (flag_force_addr
6560 && !REG_P (XEXP (DECL_RTL (exp), 0)))))
6561 {
6562 if (alt_rtl)
6563 *alt_rtl = DECL_RTL (exp);
6564 temp = replace_equiv_address (DECL_RTL (exp),
6565 copy_rtx (XEXP (DECL_RTL (exp), 0)));
6566 }
6567
6568 /* If we got something, return it. But first, set the alignment
6569 if the address is a register. */
6570 if (temp != 0)
6571 {
6572 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
6573 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
6574
6575 return temp;
6576 }
6577
6578 /* If the mode of DECL_RTL does not match that of the decl, it
6579 must be a promoted value. We return a SUBREG of the wanted mode,
6580 but mark it so that we know that it was already extended. */
6581
6582 if (REG_P (DECL_RTL (exp))
6583 && GET_MODE (DECL_RTL (exp)) != DECL_MODE (exp))
6584 {
6585 enum machine_mode pmode;
6586
6587 /* Get the signedness used for this variable. Ensure we get the
6588 same mode we got when the variable was declared. */
6589 pmode = promote_mode (type, DECL_MODE (exp), &unsignedp,
6590 (TREE_CODE (exp) == RESULT_DECL ? 1 : 0));
6591 gcc_assert (GET_MODE (DECL_RTL (exp)) == pmode);
6592
6593 temp = gen_lowpart_SUBREG (mode, DECL_RTL (exp));
6594 SUBREG_PROMOTED_VAR_P (temp) = 1;
6595 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
6596 return temp;
6597 }
6598
6599 return DECL_RTL (exp);
6600
6601 case INTEGER_CST:
6602 temp = immed_double_const (TREE_INT_CST_LOW (exp),
6603 TREE_INT_CST_HIGH (exp), mode);
6604
6605 /* ??? If overflow is set, fold will have done an incomplete job,
6606 which can result in (plus xx (const_int 0)), which can get
6607 simplified by validate_replace_rtx during virtual register
6608 instantiation, which can result in unrecognizable insns.
6609 Avoid this by forcing all overflows into registers. */
6610 if (TREE_CONSTANT_OVERFLOW (exp)
6611 && modifier != EXPAND_INITIALIZER)
6612 temp = force_reg (mode, temp);
6613
6614 return temp;
6615
6616 case VECTOR_CST:
6617 if (GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp))) == MODE_VECTOR_INT
6618 || GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp))) == MODE_VECTOR_FLOAT)
6619 return const_vector_from_tree (exp);
6620 else
6621 return expand_expr (build1 (CONSTRUCTOR, TREE_TYPE (exp),
6622 TREE_VECTOR_CST_ELTS (exp)),
6623 ignore ? const0_rtx : target, tmode, modifier);
6624
6625 case CONST_DECL:
6626 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
6627
6628 case REAL_CST:
6629 /* If optimized, generate immediate CONST_DOUBLE
6630 which will be turned into memory by reload if necessary.
6631
6632 We used to force a register so that loop.c could see it. But
6633 this does not allow gen_* patterns to perform optimizations with
6634 the constants. It also produces two insns in cases like "x = 1.0;".
6635 On most machines, floating-point constants are not permitted in
6636 many insns, so we'd end up copying it to a register in any case.
6637
6638 Now, we do the copying in expand_binop, if appropriate. */
6639 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
6640 TYPE_MODE (TREE_TYPE (exp)));
6641
6642 case COMPLEX_CST:
6643 /* Handle evaluating a complex constant in a CONCAT target. */
6644 if (original_target && GET_CODE (original_target) == CONCAT)
6645 {
6646 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
6647 rtx rtarg, itarg;
6648
6649 rtarg = XEXP (original_target, 0);
6650 itarg = XEXP (original_target, 1);
6651
6652 /* Move the real and imaginary parts separately. */
6653 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, 0);
6654 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, 0);
6655
6656 if (op0 != rtarg)
6657 emit_move_insn (rtarg, op0);
6658 if (op1 != itarg)
6659 emit_move_insn (itarg, op1);
6660
6661 return original_target;
6662 }
6663
6664 /* ... fall through ... */
6665
6666 case STRING_CST:
6667 temp = output_constant_def (exp, 1);
6668
6669 /* temp contains a constant address.
6670 On RISC machines where a constant address isn't valid,
6671 make some insns to get that address into a register. */
6672 if (modifier != EXPAND_CONST_ADDRESS
6673 && modifier != EXPAND_INITIALIZER
6674 && modifier != EXPAND_SUM
6675 && (! memory_address_p (mode, XEXP (temp, 0))
6676 || flag_force_addr))
6677 return replace_equiv_address (temp,
6678 copy_rtx (XEXP (temp, 0)));
6679 return temp;
6680
6681 case SAVE_EXPR:
6682 {
6683 tree val = TREE_OPERAND (exp, 0);
6684 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
6685
6686 if (!SAVE_EXPR_RESOLVED_P (exp))
6687 {
6688 /* We can indeed still hit this case, typically via builtin
6689 expanders calling save_expr immediately before expanding
6690 something. Assume this means that we only have to deal
6691 with non-BLKmode values. */
6692 gcc_assert (GET_MODE (ret) != BLKmode);
6693
6694 val = build_decl (VAR_DECL, NULL, TREE_TYPE (exp));
6695 DECL_ARTIFICIAL (val) = 1;
6696 DECL_IGNORED_P (val) = 1;
6697 TREE_OPERAND (exp, 0) = val;
6698 SAVE_EXPR_RESOLVED_P (exp) = 1;
6699
6700 if (!CONSTANT_P (ret))
6701 ret = copy_to_reg (ret);
6702 SET_DECL_RTL (val, ret);
6703 }
6704
6705 return ret;
6706 }
6707
6708 case GOTO_EXPR:
6709 if (TREE_CODE (TREE_OPERAND (exp, 0)) == LABEL_DECL)
6710 expand_goto (TREE_OPERAND (exp, 0));
6711 else
6712 expand_computed_goto (TREE_OPERAND (exp, 0));
6713 return const0_rtx;
6714
6715 case CONSTRUCTOR:
6716 /* If we don't need the result, just ensure we evaluate any
6717 subexpressions. */
6718 if (ignore)
6719 {
6720 tree elt;
6721
6722 for (elt = CONSTRUCTOR_ELTS (exp); elt; elt = TREE_CHAIN (elt))
6723 expand_expr (TREE_VALUE (elt), const0_rtx, VOIDmode, 0);
6724
6725 return const0_rtx;
6726 }
6727
6728 /* All elts simple constants => refer to a constant in memory. But
6729 if this is a non-BLKmode mode, let it store a field at a time
6730 since that should make a CONST_INT or CONST_DOUBLE when we
6731 fold. Likewise, if we have a target we can use, it is best to
6732 store directly into the target unless the type is large enough
6733 that memcpy will be used. If we are making an initializer and
6734 all operands are constant, put it in memory as well.
6735
6736 FIXME: Avoid trying to fill vector constructors piece-meal.
6737 Output them with output_constant_def below unless we're sure
6738 they're zeros. This should go away when vector initializers
6739 are treated like VECTOR_CST instead of arrays.
6740 */
6741 else if ((TREE_STATIC (exp)
6742 && ((mode == BLKmode
6743 && ! (target != 0 && safe_from_p (target, exp, 1)))
6744 || TREE_ADDRESSABLE (exp)
6745 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
6746 && (! MOVE_BY_PIECES_P
6747 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
6748 TYPE_ALIGN (type)))
6749 && ! mostly_zeros_p (exp))))
6750 || ((modifier == EXPAND_INITIALIZER
6751 || modifier == EXPAND_CONST_ADDRESS)
6752 && TREE_CONSTANT (exp)))
6753 {
6754 rtx constructor = output_constant_def (exp, 1);
6755
6756 if (modifier != EXPAND_CONST_ADDRESS
6757 && modifier != EXPAND_INITIALIZER
6758 && modifier != EXPAND_SUM)
6759 constructor = validize_mem (constructor);
6760
6761 return constructor;
6762 }
6763 else
6764 {
6765 /* Handle calls that pass values in multiple non-contiguous
6766 locations. The Irix 6 ABI has examples of this. */
6767 if (target == 0 || ! safe_from_p (target, exp, 1)
6768 || GET_CODE (target) == PARALLEL
6769 || modifier == EXPAND_STACK_PARM)
6770 target
6771 = assign_temp (build_qualified_type (type,
6772 (TYPE_QUALS (type)
6773 | (TREE_READONLY (exp)
6774 * TYPE_QUAL_CONST))),
6775 0, TREE_ADDRESSABLE (exp), 1);
6776
6777 store_constructor (exp, target, 0, int_expr_size (exp));
6778 return target;
6779 }
6780
6781 case MISALIGNED_INDIRECT_REF:
6782 case ALIGN_INDIRECT_REF:
6783 case INDIRECT_REF:
6784 {
6785 tree exp1 = TREE_OPERAND (exp, 0);
6786 tree orig;
6787
6788 if (modifier != EXPAND_WRITE)
6789 {
6790 tree t;
6791
6792 t = fold_read_from_constant_string (exp);
6793 if (t)
6794 return expand_expr (t, target, tmode, modifier);
6795 }
6796
6797 op0 = expand_expr (exp1, NULL_RTX, VOIDmode, EXPAND_SUM);
6798 op0 = memory_address (mode, op0);
6799
6800 if (code == ALIGN_INDIRECT_REF)
6801 {
6802 int align = TYPE_ALIGN_UNIT (type);
6803 op0 = gen_rtx_AND (Pmode, op0, GEN_INT (-align));
6804 op0 = memory_address (mode, op0);
6805 }
6806
6807 temp = gen_rtx_MEM (mode, op0);
6808
6809 orig = REF_ORIGINAL (exp);
6810 if (!orig)
6811 orig = exp;
6812 set_mem_attributes (temp, orig, 0);
6813
6814 /* Resolve the misalignment now, so that we don't have to remember
6815 to resolve it later. Of course, this only works for reads. */
6816 /* ??? When we get around to supporting writes, we'll have to handle
6817 this in store_expr directly. The vectorizer isn't generating
6818 those yet, however. */
6819 if (code == MISALIGNED_INDIRECT_REF)
6820 {
6821 int icode;
6822 rtx reg, insn;
6823
6824 gcc_assert (modifier == EXPAND_NORMAL);
6825
6826 /* The vectorizer should have already checked the mode. */
6827 icode = movmisalign_optab->handlers[mode].insn_code;
6828 gcc_assert (icode != CODE_FOR_nothing);
6829
6830 /* We've already validated the memory, and we're creating a
6831 new pseudo destination. The predicates really can't fail. */
6832 reg = gen_reg_rtx (mode);
6833
6834 /* Nor can the insn generator. */
6835 insn = GEN_FCN (icode) (reg, temp);
6836 emit_insn (insn);
6837
6838 return reg;
6839 }
6840
6841 return temp;
6842 }
6843
6844 case ARRAY_REF:
6845
6846 {
6847 tree array = TREE_OPERAND (exp, 0);
6848 tree index = TREE_OPERAND (exp, 1);
6849
6850 /* Fold an expression like: "foo"[2].
6851 This is not done in fold so it won't happen inside &.
6852 Don't fold if this is for wide characters since it's too
6853 difficult to do correctly and this is a very rare case. */
6854
6855 if (modifier != EXPAND_CONST_ADDRESS
6856 && modifier != EXPAND_INITIALIZER
6857 && modifier != EXPAND_MEMORY)
6858 {
6859 tree t = fold_read_from_constant_string (exp);
6860
6861 if (t)
6862 return expand_expr (t, target, tmode, modifier);
6863 }
6864
6865 /* If this is a constant index into a constant array,
6866 just get the value from the array. Handle both the cases when
6867 we have an explicit constructor and when our operand is a variable
6868 that was declared const. */
6869
6870 if (modifier != EXPAND_CONST_ADDRESS
6871 && modifier != EXPAND_INITIALIZER
6872 && modifier != EXPAND_MEMORY
6873 && TREE_CODE (array) == CONSTRUCTOR
6874 && ! TREE_SIDE_EFFECTS (array)
6875 && TREE_CODE (index) == INTEGER_CST)
6876 {
6877 tree elem;
6878
6879 for (elem = CONSTRUCTOR_ELTS (array);
6880 (elem && !tree_int_cst_equal (TREE_PURPOSE (elem), index));
6881 elem = TREE_CHAIN (elem))
6882 ;
6883
6884 if (elem && !TREE_SIDE_EFFECTS (TREE_VALUE (elem)))
6885 return expand_expr (fold (TREE_VALUE (elem)), target, tmode,
6886 modifier);
6887 }
6888
6889 else if (optimize >= 1
6890 && modifier != EXPAND_CONST_ADDRESS
6891 && modifier != EXPAND_INITIALIZER
6892 && modifier != EXPAND_MEMORY
6893 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
6894 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
6895 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
6896 && targetm.binds_local_p (array))
6897 {
6898 if (TREE_CODE (index) == INTEGER_CST)
6899 {
6900 tree init = DECL_INITIAL (array);
6901
6902 if (TREE_CODE (init) == CONSTRUCTOR)
6903 {
6904 tree elem;
6905
6906 for (elem = CONSTRUCTOR_ELTS (init);
6907 (elem
6908 && !tree_int_cst_equal (TREE_PURPOSE (elem), index));
6909 elem = TREE_CHAIN (elem))
6910 ;
6911
6912 if (elem && !TREE_SIDE_EFFECTS (TREE_VALUE (elem)))
6913 return expand_expr (fold (TREE_VALUE (elem)), target,
6914 tmode, modifier);
6915 }
6916 else if (TREE_CODE (init) == STRING_CST
6917 && 0 > compare_tree_int (index,
6918 TREE_STRING_LENGTH (init)))
6919 {
6920 tree type = TREE_TYPE (TREE_TYPE (init));
6921 enum machine_mode mode = TYPE_MODE (type);
6922
6923 if (GET_MODE_CLASS (mode) == MODE_INT
6924 && GET_MODE_SIZE (mode) == 1)
6925 return gen_int_mode (TREE_STRING_POINTER (init)
6926 [TREE_INT_CST_LOW (index)], mode);
6927 }
6928 }
6929 }
6930 }
6931 goto normal_inner_ref;
6932
6933 case COMPONENT_REF:
6934 /* If the operand is a CONSTRUCTOR, we can just extract the
6935 appropriate field if it is present. */
6936 if (TREE_CODE (TREE_OPERAND (exp, 0)) == CONSTRUCTOR)
6937 {
6938 tree elt;
6939
6940 for (elt = CONSTRUCTOR_ELTS (TREE_OPERAND (exp, 0)); elt;
6941 elt = TREE_CHAIN (elt))
6942 if (TREE_PURPOSE (elt) == TREE_OPERAND (exp, 1)
6943 /* We can normally use the value of the field in the
6944 CONSTRUCTOR. However, if this is a bitfield in
6945 an integral mode that we can fit in a HOST_WIDE_INT,
6946 we must mask only the number of bits in the bitfield,
6947 since this is done implicitly by the constructor. If
6948 the bitfield does not meet either of those conditions,
6949 we can't do this optimization. */
6950 && (! DECL_BIT_FIELD (TREE_PURPOSE (elt))
6951 || ((GET_MODE_CLASS (DECL_MODE (TREE_PURPOSE (elt)))
6952 == MODE_INT)
6953 && (GET_MODE_BITSIZE (DECL_MODE (TREE_PURPOSE (elt)))
6954 <= HOST_BITS_PER_WIDE_INT))))
6955 {
6956 if (DECL_BIT_FIELD (TREE_PURPOSE (elt))
6957 && modifier == EXPAND_STACK_PARM)
6958 target = 0;
6959 op0 = expand_expr (TREE_VALUE (elt), target, tmode, modifier);
6960 if (DECL_BIT_FIELD (TREE_PURPOSE (elt)))
6961 {
6962 HOST_WIDE_INT bitsize
6963 = TREE_INT_CST_LOW (DECL_SIZE (TREE_PURPOSE (elt)));
6964 enum machine_mode imode
6965 = TYPE_MODE (TREE_TYPE (TREE_PURPOSE (elt)));
6966
6967 if (TYPE_UNSIGNED (TREE_TYPE (TREE_PURPOSE (elt))))
6968 {
6969 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
6970 op0 = expand_and (imode, op0, op1, target);
6971 }
6972 else
6973 {
6974 tree count
6975 = build_int_cst (NULL_TREE,
6976 GET_MODE_BITSIZE (imode) - bitsize);
6977
6978 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
6979 target, 0);
6980 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
6981 target, 0);
6982 }
6983 }
6984
6985 return op0;
6986 }
6987 }
6988 goto normal_inner_ref;
6989
6990 case BIT_FIELD_REF:
6991 case ARRAY_RANGE_REF:
6992 normal_inner_ref:
6993 {
6994 enum machine_mode mode1;
6995 HOST_WIDE_INT bitsize, bitpos;
6996 tree offset;
6997 int volatilep = 0;
6998 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
6999 &mode1, &unsignedp, &volatilep, true);
7000 rtx orig_op0;
7001
7002 /* If we got back the original object, something is wrong. Perhaps
7003 we are evaluating an expression too early. In any event, don't
7004 infinitely recurse. */
7005 gcc_assert (tem != exp);
7006
7007 /* If TEM's type is a union of variable size, pass TARGET to the inner
7008 computation, since it will need a temporary and TARGET is known
7009 to have to do. This occurs in unchecked conversion in Ada. */
7010
7011 orig_op0 = op0
7012 = expand_expr (tem,
7013 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
7014 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
7015 != INTEGER_CST)
7016 && modifier != EXPAND_STACK_PARM
7017 ? target : NULL_RTX),
7018 VOIDmode,
7019 (modifier == EXPAND_INITIALIZER
7020 || modifier == EXPAND_CONST_ADDRESS
7021 || modifier == EXPAND_STACK_PARM)
7022 ? modifier : EXPAND_NORMAL);
7023
7024 /* If this is a constant, put it into a register if it is a
7025 legitimate constant and OFFSET is 0 and memory if it isn't. */
7026 if (CONSTANT_P (op0))
7027 {
7028 enum machine_mode mode = TYPE_MODE (TREE_TYPE (tem));
7029 if (mode != BLKmode && LEGITIMATE_CONSTANT_P (op0)
7030 && offset == 0)
7031 op0 = force_reg (mode, op0);
7032 else
7033 op0 = validize_mem (force_const_mem (mode, op0));
7034 }
7035
7036 /* Otherwise, if this object not in memory and we either have an
7037 offset or a BLKmode result, put it there. This case can't occur in
7038 C, but can in Ada if we have unchecked conversion of an expression
7039 from a scalar type to an array or record type or for an
7040 ARRAY_RANGE_REF whose type is BLKmode. */
7041 else if (!MEM_P (op0)
7042 && (offset != 0
7043 || (code == ARRAY_RANGE_REF && mode == BLKmode)))
7044 {
7045 tree nt = build_qualified_type (TREE_TYPE (tem),
7046 (TYPE_QUALS (TREE_TYPE (tem))
7047 | TYPE_QUAL_CONST));
7048 rtx memloc = assign_temp (nt, 1, 1, 1);
7049
7050 emit_move_insn (memloc, op0);
7051 op0 = memloc;
7052 }
7053
7054 if (offset != 0)
7055 {
7056 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
7057 EXPAND_SUM);
7058
7059 gcc_assert (MEM_P (op0));
7060
7061 #ifdef POINTERS_EXTEND_UNSIGNED
7062 if (GET_MODE (offset_rtx) != Pmode)
7063 offset_rtx = convert_to_mode (Pmode, offset_rtx, 0);
7064 #else
7065 if (GET_MODE (offset_rtx) != ptr_mode)
7066 offset_rtx = convert_to_mode (ptr_mode, offset_rtx, 0);
7067 #endif
7068
7069 if (GET_MODE (op0) == BLKmode
7070 /* A constant address in OP0 can have VOIDmode, we must
7071 not try to call force_reg in that case. */
7072 && GET_MODE (XEXP (op0, 0)) != VOIDmode
7073 && bitsize != 0
7074 && (bitpos % bitsize) == 0
7075 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
7076 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
7077 {
7078 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
7079 bitpos = 0;
7080 }
7081
7082 op0 = offset_address (op0, offset_rtx,
7083 highest_pow2_factor (offset));
7084 }
7085
7086 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
7087 record its alignment as BIGGEST_ALIGNMENT. */
7088 if (MEM_P (op0) && bitpos == 0 && offset != 0
7089 && is_aligning_offset (offset, tem))
7090 set_mem_align (op0, BIGGEST_ALIGNMENT);
7091
7092 /* Don't forget about volatility even if this is a bitfield. */
7093 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
7094 {
7095 if (op0 == orig_op0)
7096 op0 = copy_rtx (op0);
7097
7098 MEM_VOLATILE_P (op0) = 1;
7099 }
7100
7101 /* The following code doesn't handle CONCAT.
7102 Assume only bitpos == 0 can be used for CONCAT, due to
7103 one element arrays having the same mode as its element. */
7104 if (GET_CODE (op0) == CONCAT)
7105 {
7106 gcc_assert (bitpos == 0
7107 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)));
7108 return op0;
7109 }
7110
7111 /* In cases where an aligned union has an unaligned object
7112 as a field, we might be extracting a BLKmode value from
7113 an integer-mode (e.g., SImode) object. Handle this case
7114 by doing the extract into an object as wide as the field
7115 (which we know to be the width of a basic mode), then
7116 storing into memory, and changing the mode to BLKmode. */
7117 if (mode1 == VOIDmode
7118 || REG_P (op0) || GET_CODE (op0) == SUBREG
7119 || (mode1 != BLKmode && ! direct_load[(int) mode1]
7120 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
7121 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
7122 && modifier != EXPAND_CONST_ADDRESS
7123 && modifier != EXPAND_INITIALIZER)
7124 /* If the field isn't aligned enough to fetch as a memref,
7125 fetch it as a bit field. */
7126 || (mode1 != BLKmode
7127 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
7128 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
7129 || (MEM_P (op0)
7130 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
7131 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
7132 && ((modifier == EXPAND_CONST_ADDRESS
7133 || modifier == EXPAND_INITIALIZER)
7134 ? STRICT_ALIGNMENT
7135 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
7136 || (bitpos % BITS_PER_UNIT != 0)))
7137 /* If the type and the field are a constant size and the
7138 size of the type isn't the same size as the bitfield,
7139 we must use bitfield operations. */
7140 || (bitsize >= 0
7141 && TYPE_SIZE (TREE_TYPE (exp))
7142 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
7143 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
7144 bitsize)))
7145 {
7146 enum machine_mode ext_mode = mode;
7147
7148 if (ext_mode == BLKmode
7149 && ! (target != 0 && MEM_P (op0)
7150 && MEM_P (target)
7151 && bitpos % BITS_PER_UNIT == 0))
7152 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
7153
7154 if (ext_mode == BLKmode)
7155 {
7156 if (target == 0)
7157 target = assign_temp (type, 0, 1, 1);
7158
7159 if (bitsize == 0)
7160 return target;
7161
7162 /* In this case, BITPOS must start at a byte boundary and
7163 TARGET, if specified, must be a MEM. */
7164 gcc_assert (MEM_P (op0)
7165 && (!target || MEM_P (target))
7166 && !(bitpos % BITS_PER_UNIT));
7167
7168 emit_block_move (target,
7169 adjust_address (op0, VOIDmode,
7170 bitpos / BITS_PER_UNIT),
7171 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
7172 / BITS_PER_UNIT),
7173 (modifier == EXPAND_STACK_PARM
7174 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
7175
7176 return target;
7177 }
7178
7179 op0 = validize_mem (op0);
7180
7181 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
7182 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
7183
7184 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
7185 (modifier == EXPAND_STACK_PARM
7186 ? NULL_RTX : target),
7187 ext_mode, ext_mode);
7188
7189 /* If the result is a record type and BITSIZE is narrower than
7190 the mode of OP0, an integral mode, and this is a big endian
7191 machine, we must put the field into the high-order bits. */
7192 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
7193 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
7194 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
7195 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
7196 size_int (GET_MODE_BITSIZE (GET_MODE (op0))
7197 - bitsize),
7198 op0, 1);
7199
7200 /* If the result type is BLKmode, store the data into a temporary
7201 of the appropriate type, but with the mode corresponding to the
7202 mode for the data we have (op0's mode). It's tempting to make
7203 this a constant type, since we know it's only being stored once,
7204 but that can cause problems if we are taking the address of this
7205 COMPONENT_REF because the MEM of any reference via that address
7206 will have flags corresponding to the type, which will not
7207 necessarily be constant. */
7208 if (mode == BLKmode)
7209 {
7210 rtx new
7211 = assign_stack_temp_for_type
7212 (ext_mode, GET_MODE_BITSIZE (ext_mode), 0, type);
7213
7214 emit_move_insn (new, op0);
7215 op0 = copy_rtx (new);
7216 PUT_MODE (op0, BLKmode);
7217 set_mem_attributes (op0, exp, 1);
7218 }
7219
7220 return op0;
7221 }
7222
7223 /* If the result is BLKmode, use that to access the object
7224 now as well. */
7225 if (mode == BLKmode)
7226 mode1 = BLKmode;
7227
7228 /* Get a reference to just this component. */
7229 if (modifier == EXPAND_CONST_ADDRESS
7230 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7231 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
7232 else
7233 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
7234
7235 if (op0 == orig_op0)
7236 op0 = copy_rtx (op0);
7237
7238 set_mem_attributes (op0, exp, 0);
7239 if (REG_P (XEXP (op0, 0)))
7240 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
7241
7242 MEM_VOLATILE_P (op0) |= volatilep;
7243 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
7244 || modifier == EXPAND_CONST_ADDRESS
7245 || modifier == EXPAND_INITIALIZER)
7246 return op0;
7247 else if (target == 0)
7248 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
7249
7250 convert_move (target, op0, unsignedp);
7251 return target;
7252 }
7253
7254 case OBJ_TYPE_REF:
7255 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
7256
7257 case CALL_EXPR:
7258 /* Check for a built-in function. */
7259 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
7260 && (TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
7261 == FUNCTION_DECL)
7262 && DECL_BUILT_IN (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)))
7263 {
7264 if (DECL_BUILT_IN_CLASS (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
7265 == BUILT_IN_FRONTEND)
7266 return lang_hooks.expand_expr (exp, original_target,
7267 tmode, modifier,
7268 alt_rtl);
7269 else
7270 return expand_builtin (exp, target, subtarget, tmode, ignore);
7271 }
7272
7273 return expand_call (exp, target, ignore);
7274
7275 case NON_LVALUE_EXPR:
7276 case NOP_EXPR:
7277 case CONVERT_EXPR:
7278 if (TREE_OPERAND (exp, 0) == error_mark_node)
7279 return const0_rtx;
7280
7281 if (TREE_CODE (type) == UNION_TYPE)
7282 {
7283 tree valtype = TREE_TYPE (TREE_OPERAND (exp, 0));
7284
7285 /* If both input and output are BLKmode, this conversion isn't doing
7286 anything except possibly changing memory attribute. */
7287 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7288 {
7289 rtx result = expand_expr (TREE_OPERAND (exp, 0), target, tmode,
7290 modifier);
7291
7292 result = copy_rtx (result);
7293 set_mem_attributes (result, exp, 0);
7294 return result;
7295 }
7296
7297 if (target == 0)
7298 {
7299 if (TYPE_MODE (type) != BLKmode)
7300 target = gen_reg_rtx (TYPE_MODE (type));
7301 else
7302 target = assign_temp (type, 0, 1, 1);
7303 }
7304
7305 if (MEM_P (target))
7306 /* Store data into beginning of memory target. */
7307 store_expr (TREE_OPERAND (exp, 0),
7308 adjust_address (target, TYPE_MODE (valtype), 0),
7309 modifier == EXPAND_STACK_PARM);
7310
7311 else
7312 {
7313 gcc_assert (REG_P (target));
7314
7315 /* Store this field into a union of the proper type. */
7316 store_field (target,
7317 MIN ((int_size_in_bytes (TREE_TYPE
7318 (TREE_OPERAND (exp, 0)))
7319 * BITS_PER_UNIT),
7320 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7321 0, TYPE_MODE (valtype), TREE_OPERAND (exp, 0),
7322 type, 0);
7323 }
7324
7325 /* Return the entire union. */
7326 return target;
7327 }
7328
7329 if (mode == TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))))
7330 {
7331 op0 = expand_expr (TREE_OPERAND (exp, 0), target, VOIDmode,
7332 modifier);
7333
7334 /* If the signedness of the conversion differs and OP0 is
7335 a promoted SUBREG, clear that indication since we now
7336 have to do the proper extension. */
7337 if (TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))) != unsignedp
7338 && GET_CODE (op0) == SUBREG)
7339 SUBREG_PROMOTED_VAR_P (op0) = 0;
7340
7341 return REDUCE_BIT_FIELD (op0);
7342 }
7343
7344 op0 = expand_expr (TREE_OPERAND (exp, 0), NULL_RTX, mode, modifier);
7345 if (GET_MODE (op0) == mode)
7346 ;
7347
7348 /* If OP0 is a constant, just convert it into the proper mode. */
7349 else if (CONSTANT_P (op0))
7350 {
7351 tree inner_type = TREE_TYPE (TREE_OPERAND (exp, 0));
7352 enum machine_mode inner_mode = TYPE_MODE (inner_type);
7353
7354 if (modifier == EXPAND_INITIALIZER)
7355 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7356 subreg_lowpart_offset (mode,
7357 inner_mode));
7358 else
7359 op0= convert_modes (mode, inner_mode, op0,
7360 TYPE_UNSIGNED (inner_type));
7361 }
7362
7363 else if (modifier == EXPAND_INITIALIZER)
7364 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7365
7366 else if (target == 0)
7367 op0 = convert_to_mode (mode, op0,
7368 TYPE_UNSIGNED (TREE_TYPE
7369 (TREE_OPERAND (exp, 0))));
7370 else
7371 {
7372 convert_move (target, op0,
7373 TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))));
7374 op0 = target;
7375 }
7376
7377 return REDUCE_BIT_FIELD (op0);
7378
7379 case VIEW_CONVERT_EXPR:
7380 op0 = expand_expr (TREE_OPERAND (exp, 0), NULL_RTX, mode, modifier);
7381
7382 /* If the input and output modes are both the same, we are done.
7383 Otherwise, if neither mode is BLKmode and both are integral and within
7384 a word, we can use gen_lowpart. If neither is true, make sure the
7385 operand is in memory and convert the MEM to the new mode. */
7386 if (TYPE_MODE (type) == GET_MODE (op0))
7387 ;
7388 else if (TYPE_MODE (type) != BLKmode && GET_MODE (op0) != BLKmode
7389 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
7390 && GET_MODE_CLASS (TYPE_MODE (type)) == MODE_INT
7391 && GET_MODE_SIZE (TYPE_MODE (type)) <= UNITS_PER_WORD
7392 && GET_MODE_SIZE (GET_MODE (op0)) <= UNITS_PER_WORD)
7393 op0 = gen_lowpart (TYPE_MODE (type), op0);
7394 else if (!MEM_P (op0))
7395 {
7396 /* If the operand is not a MEM, force it into memory. Since we
7397 are going to be be changing the mode of the MEM, don't call
7398 force_const_mem for constants because we don't allow pool
7399 constants to change mode. */
7400 tree inner_type = TREE_TYPE (TREE_OPERAND (exp, 0));
7401
7402 gcc_assert (!TREE_ADDRESSABLE (exp));
7403
7404 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
7405 target
7406 = assign_stack_temp_for_type
7407 (TYPE_MODE (inner_type),
7408 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
7409
7410 emit_move_insn (target, op0);
7411 op0 = target;
7412 }
7413
7414 /* At this point, OP0 is in the correct mode. If the output type is such
7415 that the operand is known to be aligned, indicate that it is.
7416 Otherwise, we need only be concerned about alignment for non-BLKmode
7417 results. */
7418 if (MEM_P (op0))
7419 {
7420 op0 = copy_rtx (op0);
7421
7422 if (TYPE_ALIGN_OK (type))
7423 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
7424 else if (TYPE_MODE (type) != BLKmode && STRICT_ALIGNMENT
7425 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (TYPE_MODE (type)))
7426 {
7427 tree inner_type = TREE_TYPE (TREE_OPERAND (exp, 0));
7428 HOST_WIDE_INT temp_size
7429 = MAX (int_size_in_bytes (inner_type),
7430 (HOST_WIDE_INT) GET_MODE_SIZE (TYPE_MODE (type)));
7431 rtx new = assign_stack_temp_for_type (TYPE_MODE (type),
7432 temp_size, 0, type);
7433 rtx new_with_op0_mode = adjust_address (new, GET_MODE (op0), 0);
7434
7435 gcc_assert (!TREE_ADDRESSABLE (exp));
7436
7437 if (GET_MODE (op0) == BLKmode)
7438 emit_block_move (new_with_op0_mode, op0,
7439 GEN_INT (GET_MODE_SIZE (TYPE_MODE (type))),
7440 (modifier == EXPAND_STACK_PARM
7441 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
7442 else
7443 emit_move_insn (new_with_op0_mode, op0);
7444
7445 op0 = new;
7446 }
7447
7448 op0 = adjust_address (op0, TYPE_MODE (type), 0);
7449 }
7450
7451 return op0;
7452
7453 case PLUS_EXPR:
7454 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7455 something else, make sure we add the register to the constant and
7456 then to the other thing. This case can occur during strength
7457 reduction and doing it this way will produce better code if the
7458 frame pointer or argument pointer is eliminated.
7459
7460 fold-const.c will ensure that the constant is always in the inner
7461 PLUS_EXPR, so the only case we need to do anything about is if
7462 sp, ap, or fp is our second argument, in which case we must swap
7463 the innermost first argument and our second argument. */
7464
7465 if (TREE_CODE (TREE_OPERAND (exp, 0)) == PLUS_EXPR
7466 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 1)) == INTEGER_CST
7467 && TREE_CODE (TREE_OPERAND (exp, 1)) == VAR_DECL
7468 && (DECL_RTL (TREE_OPERAND (exp, 1)) == frame_pointer_rtx
7469 || DECL_RTL (TREE_OPERAND (exp, 1)) == stack_pointer_rtx
7470 || DECL_RTL (TREE_OPERAND (exp, 1)) == arg_pointer_rtx))
7471 {
7472 tree t = TREE_OPERAND (exp, 1);
7473
7474 TREE_OPERAND (exp, 1) = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
7475 TREE_OPERAND (TREE_OPERAND (exp, 0), 0) = t;
7476 }
7477
7478 /* If the result is to be ptr_mode and we are adding an integer to
7479 something, we might be forming a constant. So try to use
7480 plus_constant. If it produces a sum and we can't accept it,
7481 use force_operand. This allows P = &ARR[const] to generate
7482 efficient code on machines where a SYMBOL_REF is not a valid
7483 address.
7484
7485 If this is an EXPAND_SUM call, always return the sum. */
7486 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7487 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
7488 {
7489 if (modifier == EXPAND_STACK_PARM)
7490 target = 0;
7491 if (TREE_CODE (TREE_OPERAND (exp, 0)) == INTEGER_CST
7492 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
7493 && TREE_CONSTANT (TREE_OPERAND (exp, 1)))
7494 {
7495 rtx constant_part;
7496
7497 op1 = expand_expr (TREE_OPERAND (exp, 1), subtarget, VOIDmode,
7498 EXPAND_SUM);
7499 /* Use immed_double_const to ensure that the constant is
7500 truncated according to the mode of OP1, then sign extended
7501 to a HOST_WIDE_INT. Using the constant directly can result
7502 in non-canonical RTL in a 64x32 cross compile. */
7503 constant_part
7504 = immed_double_const (TREE_INT_CST_LOW (TREE_OPERAND (exp, 0)),
7505 (HOST_WIDE_INT) 0,
7506 TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 1))));
7507 op1 = plus_constant (op1, INTVAL (constant_part));
7508 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7509 op1 = force_operand (op1, target);
7510 return REDUCE_BIT_FIELD (op1);
7511 }
7512
7513 else if (TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST
7514 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_INT
7515 && TREE_CONSTANT (TREE_OPERAND (exp, 0)))
7516 {
7517 rtx constant_part;
7518
7519 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode,
7520 (modifier == EXPAND_INITIALIZER
7521 ? EXPAND_INITIALIZER : EXPAND_SUM));
7522 if (! CONSTANT_P (op0))
7523 {
7524 op1 = expand_expr (TREE_OPERAND (exp, 1), NULL_RTX,
7525 VOIDmode, modifier);
7526 /* Return a PLUS if modifier says it's OK. */
7527 if (modifier == EXPAND_SUM
7528 || modifier == EXPAND_INITIALIZER)
7529 return simplify_gen_binary (PLUS, mode, op0, op1);
7530 goto binop2;
7531 }
7532 /* Use immed_double_const to ensure that the constant is
7533 truncated according to the mode of OP1, then sign extended
7534 to a HOST_WIDE_INT. Using the constant directly can result
7535 in non-canonical RTL in a 64x32 cross compile. */
7536 constant_part
7537 = immed_double_const (TREE_INT_CST_LOW (TREE_OPERAND (exp, 1)),
7538 (HOST_WIDE_INT) 0,
7539 TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))));
7540 op0 = plus_constant (op0, INTVAL (constant_part));
7541 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7542 op0 = force_operand (op0, target);
7543 return REDUCE_BIT_FIELD (op0);
7544 }
7545 }
7546
7547 /* No sense saving up arithmetic to be done
7548 if it's all in the wrong mode to form part of an address.
7549 And force_operand won't know whether to sign-extend or
7550 zero-extend. */
7551 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7552 || mode != ptr_mode)
7553 {
7554 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7555 subtarget, &op0, &op1, 0);
7556 if (op0 == const0_rtx)
7557 return op1;
7558 if (op1 == const0_rtx)
7559 return op0;
7560 goto binop2;
7561 }
7562
7563 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7564 subtarget, &op0, &op1, modifier);
7565 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7566
7567 case MINUS_EXPR:
7568 /* For initializers, we are allowed to return a MINUS of two
7569 symbolic constants. Here we handle all cases when both operands
7570 are constant. */
7571 /* Handle difference of two symbolic constants,
7572 for the sake of an initializer. */
7573 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7574 && really_constant_p (TREE_OPERAND (exp, 0))
7575 && really_constant_p (TREE_OPERAND (exp, 1)))
7576 {
7577 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7578 NULL_RTX, &op0, &op1, modifier);
7579
7580 /* If the last operand is a CONST_INT, use plus_constant of
7581 the negated constant. Else make the MINUS. */
7582 if (GET_CODE (op1) == CONST_INT)
7583 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
7584 else
7585 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
7586 }
7587
7588 /* No sense saving up arithmetic to be done
7589 if it's all in the wrong mode to form part of an address.
7590 And force_operand won't know whether to sign-extend or
7591 zero-extend. */
7592 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7593 || mode != ptr_mode)
7594 goto binop;
7595
7596 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7597 subtarget, &op0, &op1, modifier);
7598
7599 /* Convert A - const to A + (-const). */
7600 if (GET_CODE (op1) == CONST_INT)
7601 {
7602 op1 = negate_rtx (mode, op1);
7603 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7604 }
7605
7606 goto binop2;
7607
7608 case MULT_EXPR:
7609 /* If first operand is constant, swap them.
7610 Thus the following special case checks need only
7611 check the second operand. */
7612 if (TREE_CODE (TREE_OPERAND (exp, 0)) == INTEGER_CST)
7613 {
7614 tree t1 = TREE_OPERAND (exp, 0);
7615 TREE_OPERAND (exp, 0) = TREE_OPERAND (exp, 1);
7616 TREE_OPERAND (exp, 1) = t1;
7617 }
7618
7619 /* Attempt to return something suitable for generating an
7620 indexed address, for machines that support that. */
7621
7622 if (modifier == EXPAND_SUM && mode == ptr_mode
7623 && host_integerp (TREE_OPERAND (exp, 1), 0))
7624 {
7625 tree exp1 = TREE_OPERAND (exp, 1);
7626
7627 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode,
7628 EXPAND_SUM);
7629
7630 if (!REG_P (op0))
7631 op0 = force_operand (op0, NULL_RTX);
7632 if (!REG_P (op0))
7633 op0 = copy_to_mode_reg (mode, op0);
7634
7635 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
7636 gen_int_mode (tree_low_cst (exp1, 0),
7637 TYPE_MODE (TREE_TYPE (exp1)))));
7638 }
7639
7640 if (modifier == EXPAND_STACK_PARM)
7641 target = 0;
7642
7643 /* Check for multiplying things that have been extended
7644 from a narrower type. If this machine supports multiplying
7645 in that narrower type with a result in the desired type,
7646 do it that way, and avoid the explicit type-conversion. */
7647 if (TREE_CODE (TREE_OPERAND (exp, 0)) == NOP_EXPR
7648 && TREE_CODE (type) == INTEGER_TYPE
7649 && (TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)))
7650 < TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (exp, 0))))
7651 && ((TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST
7652 && int_fits_type_p (TREE_OPERAND (exp, 1),
7653 TREE_TYPE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)))
7654 /* Don't use a widening multiply if a shift will do. */
7655 && ((GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 1))))
7656 > HOST_BITS_PER_WIDE_INT)
7657 || exact_log2 (TREE_INT_CST_LOW (TREE_OPERAND (exp, 1))) < 0))
7658 ||
7659 (TREE_CODE (TREE_OPERAND (exp, 1)) == NOP_EXPR
7660 && (TYPE_PRECISION (TREE_TYPE
7661 (TREE_OPERAND (TREE_OPERAND (exp, 1), 0)))
7662 == TYPE_PRECISION (TREE_TYPE
7663 (TREE_OPERAND
7664 (TREE_OPERAND (exp, 0), 0))))
7665 /* If both operands are extended, they must either both
7666 be zero-extended or both be sign-extended. */
7667 && (TYPE_UNSIGNED (TREE_TYPE
7668 (TREE_OPERAND (TREE_OPERAND (exp, 1), 0)))
7669 == TYPE_UNSIGNED (TREE_TYPE
7670 (TREE_OPERAND
7671 (TREE_OPERAND (exp, 0), 0)))))))
7672 {
7673 tree op0type = TREE_TYPE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0));
7674 enum machine_mode innermode = TYPE_MODE (op0type);
7675 bool zextend_p = TYPE_UNSIGNED (op0type);
7676 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
7677 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
7678
7679 if (mode == GET_MODE_WIDER_MODE (innermode))
7680 {
7681 if (this_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
7682 {
7683 if (TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST)
7684 expand_operands (TREE_OPERAND (TREE_OPERAND (exp, 0), 0),
7685 TREE_OPERAND (exp, 1),
7686 NULL_RTX, &op0, &op1, 0);
7687 else
7688 expand_operands (TREE_OPERAND (TREE_OPERAND (exp, 0), 0),
7689 TREE_OPERAND (TREE_OPERAND (exp, 1), 0),
7690 NULL_RTX, &op0, &op1, 0);
7691 goto binop3;
7692 }
7693 else if (other_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing
7694 && innermode == word_mode)
7695 {
7696 rtx htem, hipart;
7697 op0 = expand_expr (TREE_OPERAND (TREE_OPERAND (exp, 0), 0),
7698 NULL_RTX, VOIDmode, 0);
7699 if (TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST)
7700 op1 = convert_modes (innermode, mode,
7701 expand_expr (TREE_OPERAND (exp, 1),
7702 NULL_RTX, VOIDmode, 0),
7703 unsignedp);
7704 else
7705 op1 = expand_expr (TREE_OPERAND (TREE_OPERAND (exp, 1), 0),
7706 NULL_RTX, VOIDmode, 0);
7707 temp = expand_binop (mode, other_optab, op0, op1, target,
7708 unsignedp, OPTAB_LIB_WIDEN);
7709 hipart = gen_highpart (innermode, temp);
7710 htem = expand_mult_highpart_adjust (innermode, hipart,
7711 op0, op1, hipart,
7712 zextend_p);
7713 if (htem != hipart)
7714 emit_move_insn (hipart, htem);
7715 return REDUCE_BIT_FIELD (temp);
7716 }
7717 }
7718 }
7719 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7720 subtarget, &op0, &op1, 0);
7721 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
7722
7723 case TRUNC_DIV_EXPR:
7724 case FLOOR_DIV_EXPR:
7725 case CEIL_DIV_EXPR:
7726 case ROUND_DIV_EXPR:
7727 case EXACT_DIV_EXPR:
7728 if (modifier == EXPAND_STACK_PARM)
7729 target = 0;
7730 /* Possible optimization: compute the dividend with EXPAND_SUM
7731 then if the divisor is constant can optimize the case
7732 where some terms of the dividend have coeffs divisible by it. */
7733 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7734 subtarget, &op0, &op1, 0);
7735 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
7736
7737 case RDIV_EXPR:
7738 /* Emit a/b as a*(1/b). Later we may manage CSE the reciprocal saving
7739 expensive divide. If not, combine will rebuild the original
7740 computation. */
7741 if (flag_unsafe_math_optimizations && optimize && !optimize_size
7742 && TREE_CODE (type) == REAL_TYPE
7743 && !real_onep (TREE_OPERAND (exp, 0)))
7744 return expand_expr (build2 (MULT_EXPR, type, TREE_OPERAND (exp, 0),
7745 build2 (RDIV_EXPR, type,
7746 build_real (type, dconst1),
7747 TREE_OPERAND (exp, 1))),
7748 target, tmode, modifier);
7749
7750 goto binop;
7751
7752 case TRUNC_MOD_EXPR:
7753 case FLOOR_MOD_EXPR:
7754 case CEIL_MOD_EXPR:
7755 case ROUND_MOD_EXPR:
7756 if (modifier == EXPAND_STACK_PARM)
7757 target = 0;
7758 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7759 subtarget, &op0, &op1, 0);
7760 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
7761
7762 case FIX_ROUND_EXPR:
7763 case FIX_FLOOR_EXPR:
7764 case FIX_CEIL_EXPR:
7765 gcc_unreachable (); /* Not used for C. */
7766
7767 case FIX_TRUNC_EXPR:
7768 op0 = expand_expr (TREE_OPERAND (exp, 0), NULL_RTX, VOIDmode, 0);
7769 if (target == 0 || modifier == EXPAND_STACK_PARM)
7770 target = gen_reg_rtx (mode);
7771 expand_fix (target, op0, unsignedp);
7772 return target;
7773
7774 case FLOAT_EXPR:
7775 op0 = expand_expr (TREE_OPERAND (exp, 0), NULL_RTX, VOIDmode, 0);
7776 if (target == 0 || modifier == EXPAND_STACK_PARM)
7777 target = gen_reg_rtx (mode);
7778 /* expand_float can't figure out what to do if FROM has VOIDmode.
7779 So give it the correct mode. With -O, cse will optimize this. */
7780 if (GET_MODE (op0) == VOIDmode)
7781 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))),
7782 op0);
7783 expand_float (target, op0,
7784 TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))));
7785 return target;
7786
7787 case NEGATE_EXPR:
7788 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode, 0);
7789 if (modifier == EXPAND_STACK_PARM)
7790 target = 0;
7791 temp = expand_unop (mode,
7792 optab_for_tree_code (NEGATE_EXPR, type),
7793 op0, target, 0);
7794 gcc_assert (temp);
7795 return REDUCE_BIT_FIELD (temp);
7796
7797 case ABS_EXPR:
7798 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode, 0);
7799 if (modifier == EXPAND_STACK_PARM)
7800 target = 0;
7801
7802 /* ABS_EXPR is not valid for complex arguments. */
7803 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
7804 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
7805
7806 /* Unsigned abs is simply the operand. Testing here means we don't
7807 risk generating incorrect code below. */
7808 if (TYPE_UNSIGNED (type))
7809 return op0;
7810
7811 return expand_abs (mode, op0, target, unsignedp,
7812 safe_from_p (target, TREE_OPERAND (exp, 0), 1));
7813
7814 case MAX_EXPR:
7815 case MIN_EXPR:
7816 target = original_target;
7817 if (target == 0
7818 || modifier == EXPAND_STACK_PARM
7819 || (MEM_P (target) && MEM_VOLATILE_P (target))
7820 || GET_MODE (target) != mode
7821 || (REG_P (target)
7822 && REGNO (target) < FIRST_PSEUDO_REGISTER))
7823 target = gen_reg_rtx (mode);
7824 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7825 target, &op0, &op1, 0);
7826
7827 /* First try to do it with a special MIN or MAX instruction.
7828 If that does not win, use a conditional jump to select the proper
7829 value. */
7830 this_optab = optab_for_tree_code (code, type);
7831 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
7832 OPTAB_WIDEN);
7833 if (temp != 0)
7834 return temp;
7835
7836 /* At this point, a MEM target is no longer useful; we will get better
7837 code without it. */
7838
7839 if (! REG_P (target))
7840 target = gen_reg_rtx (mode);
7841
7842 /* If op1 was placed in target, swap op0 and op1. */
7843 if (target != op0 && target == op1)
7844 {
7845 rtx tem = op0;
7846 op0 = op1;
7847 op1 = tem;
7848 }
7849
7850 /* We generate better code and avoid problems with op1 mentioning
7851 target by forcing op1 into a pseudo if it isn't a constant. */
7852 if (! CONSTANT_P (op1))
7853 op1 = force_reg (mode, op1);
7854
7855 if (target != op0)
7856 emit_move_insn (target, op0);
7857
7858 op0 = gen_label_rtx ();
7859
7860 /* If this mode is an integer too wide to compare properly,
7861 compare word by word. Rely on cse to optimize constant cases. */
7862 if (GET_MODE_CLASS (mode) == MODE_INT
7863 && ! can_compare_p (GE, mode, ccp_jump))
7864 {
7865 if (code == MAX_EXPR)
7866 do_jump_by_parts_greater_rtx (mode, unsignedp, target, op1,
7867 NULL_RTX, op0);
7868 else
7869 do_jump_by_parts_greater_rtx (mode, unsignedp, op1, target,
7870 NULL_RTX, op0);
7871 }
7872 else
7873 {
7874 do_compare_rtx_and_jump (target, op1, code == MAX_EXPR ? GE : LE,
7875 unsignedp, mode, NULL_RTX, NULL_RTX, op0);
7876 }
7877 emit_move_insn (target, op1);
7878 emit_label (op0);
7879 return target;
7880
7881 case BIT_NOT_EXPR:
7882 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode, 0);
7883 if (modifier == EXPAND_STACK_PARM)
7884 target = 0;
7885 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
7886 gcc_assert (temp);
7887 return temp;
7888
7889 /* ??? Can optimize bitwise operations with one arg constant.
7890 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
7891 and (a bitwise1 b) bitwise2 b (etc)
7892 but that is probably not worth while. */
7893
7894 /* BIT_AND_EXPR is for bitwise anding. TRUTH_AND_EXPR is for anding two
7895 boolean values when we want in all cases to compute both of them. In
7896 general it is fastest to do TRUTH_AND_EXPR by computing both operands
7897 as actual zero-or-1 values and then bitwise anding. In cases where
7898 there cannot be any side effects, better code would be made by
7899 treating TRUTH_AND_EXPR like TRUTH_ANDIF_EXPR; but the question is
7900 how to recognize those cases. */
7901
7902 case TRUTH_AND_EXPR:
7903 code = BIT_AND_EXPR;
7904 case BIT_AND_EXPR:
7905 goto binop;
7906
7907 case TRUTH_OR_EXPR:
7908 code = BIT_IOR_EXPR;
7909 case BIT_IOR_EXPR:
7910 goto binop;
7911
7912 case TRUTH_XOR_EXPR:
7913 code = BIT_XOR_EXPR;
7914 case BIT_XOR_EXPR:
7915 goto binop;
7916
7917 case LSHIFT_EXPR:
7918 case RSHIFT_EXPR:
7919 case LROTATE_EXPR:
7920 case RROTATE_EXPR:
7921 if (! safe_from_p (subtarget, TREE_OPERAND (exp, 1), 1))
7922 subtarget = 0;
7923 if (modifier == EXPAND_STACK_PARM)
7924 target = 0;
7925 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode, 0);
7926 return expand_shift (code, mode, op0, TREE_OPERAND (exp, 1), target,
7927 unsignedp);
7928
7929 /* Could determine the answer when only additive constants differ. Also,
7930 the addition of one can be handled by changing the condition. */
7931 case LT_EXPR:
7932 case LE_EXPR:
7933 case GT_EXPR:
7934 case GE_EXPR:
7935 case EQ_EXPR:
7936 case NE_EXPR:
7937 case UNORDERED_EXPR:
7938 case ORDERED_EXPR:
7939 case UNLT_EXPR:
7940 case UNLE_EXPR:
7941 case UNGT_EXPR:
7942 case UNGE_EXPR:
7943 case UNEQ_EXPR:
7944 case LTGT_EXPR:
7945 temp = do_store_flag (exp,
7946 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
7947 tmode != VOIDmode ? tmode : mode, 0);
7948 if (temp != 0)
7949 return temp;
7950
7951 /* For foo != 0, load foo, and if it is nonzero load 1 instead. */
7952 if (code == NE_EXPR && integer_zerop (TREE_OPERAND (exp, 1))
7953 && original_target
7954 && REG_P (original_target)
7955 && (GET_MODE (original_target)
7956 == TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0)))))
7957 {
7958 temp = expand_expr (TREE_OPERAND (exp, 0), original_target,
7959 VOIDmode, 0);
7960
7961 /* If temp is constant, we can just compute the result. */
7962 if (GET_CODE (temp) == CONST_INT)
7963 {
7964 if (INTVAL (temp) != 0)
7965 emit_move_insn (target, const1_rtx);
7966 else
7967 emit_move_insn (target, const0_rtx);
7968
7969 return target;
7970 }
7971
7972 if (temp != original_target)
7973 {
7974 enum machine_mode mode1 = GET_MODE (temp);
7975 if (mode1 == VOIDmode)
7976 mode1 = tmode != VOIDmode ? tmode : mode;
7977
7978 temp = copy_to_mode_reg (mode1, temp);
7979 }
7980
7981 op1 = gen_label_rtx ();
7982 emit_cmp_and_jump_insns (temp, const0_rtx, EQ, NULL_RTX,
7983 GET_MODE (temp), unsignedp, op1);
7984 emit_move_insn (temp, const1_rtx);
7985 emit_label (op1);
7986 return temp;
7987 }
7988
7989 /* If no set-flag instruction, must generate a conditional store
7990 into a temporary variable. Drop through and handle this
7991 like && and ||. */
7992
7993 if (! ignore
7994 && (target == 0
7995 || modifier == EXPAND_STACK_PARM
7996 || ! safe_from_p (target, exp, 1)
7997 /* Make sure we don't have a hard reg (such as function's return
7998 value) live across basic blocks, if not optimizing. */
7999 || (!optimize && REG_P (target)
8000 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8001 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8002
8003 if (target)
8004 emit_move_insn (target, const0_rtx);
8005
8006 op1 = gen_label_rtx ();
8007 jumpifnot (exp, op1);
8008
8009 if (target)
8010 emit_move_insn (target, const1_rtx);
8011
8012 emit_label (op1);
8013 return ignore ? const0_rtx : target;
8014
8015 case TRUTH_NOT_EXPR:
8016 if (modifier == EXPAND_STACK_PARM)
8017 target = 0;
8018 op0 = expand_expr (TREE_OPERAND (exp, 0), target, VOIDmode, 0);
8019 /* The parser is careful to generate TRUTH_NOT_EXPR
8020 only with operands that are always zero or one. */
8021 temp = expand_binop (mode, xor_optab, op0, const1_rtx,
8022 target, 1, OPTAB_LIB_WIDEN);
8023 gcc_assert (temp);
8024 return temp;
8025
8026 case STATEMENT_LIST:
8027 {
8028 tree_stmt_iterator iter;
8029
8030 gcc_assert (ignore);
8031
8032 for (iter = tsi_start (exp); !tsi_end_p (iter); tsi_next (&iter))
8033 expand_expr (tsi_stmt (iter), const0_rtx, VOIDmode, modifier);
8034 }
8035 return const0_rtx;
8036
8037 case COND_EXPR:
8038 /* A COND_EXPR with its type being VOID_TYPE represents a
8039 conditional jump and is handled in
8040 expand_gimple_cond_expr. */
8041 gcc_assert (!VOID_TYPE_P (TREE_TYPE (exp)));
8042
8043 /* Note that COND_EXPRs whose type is a structure or union
8044 are required to be constructed to contain assignments of
8045 a temporary variable, so that we can evaluate them here
8046 for side effect only. If type is void, we must do likewise. */
8047
8048 gcc_assert (!TREE_ADDRESSABLE (type)
8049 && !ignore
8050 && TREE_TYPE (TREE_OPERAND (exp, 1)) != void_type_node
8051 && TREE_TYPE (TREE_OPERAND (exp, 2)) != void_type_node);
8052
8053 /* If we are not to produce a result, we have no target. Otherwise,
8054 if a target was specified use it; it will not be used as an
8055 intermediate target unless it is safe. If no target, use a
8056 temporary. */
8057
8058 if (modifier != EXPAND_STACK_PARM
8059 && original_target
8060 && safe_from_p (original_target, TREE_OPERAND (exp, 0), 1)
8061 && GET_MODE (original_target) == mode
8062 #ifdef HAVE_conditional_move
8063 && (! can_conditionally_move_p (mode)
8064 || REG_P (original_target))
8065 #endif
8066 && !MEM_P (original_target))
8067 temp = original_target;
8068 else
8069 temp = assign_temp (type, 0, 0, 1);
8070
8071 do_pending_stack_adjust ();
8072 NO_DEFER_POP;
8073 op0 = gen_label_rtx ();
8074 op1 = gen_label_rtx ();
8075 jumpifnot (TREE_OPERAND (exp, 0), op0);
8076 store_expr (TREE_OPERAND (exp, 1), temp,
8077 modifier == EXPAND_STACK_PARM);
8078
8079 emit_jump_insn (gen_jump (op1));
8080 emit_barrier ();
8081 emit_label (op0);
8082 store_expr (TREE_OPERAND (exp, 2), temp,
8083 modifier == EXPAND_STACK_PARM);
8084
8085 emit_label (op1);
8086 OK_DEFER_POP;
8087 return temp;
8088
8089 case VEC_COND_EXPR:
8090 target = expand_vec_cond_expr (exp, target);
8091 return target;
8092
8093 case MODIFY_EXPR:
8094 {
8095 tree lhs = TREE_OPERAND (exp, 0);
8096 tree rhs = TREE_OPERAND (exp, 1);
8097
8098 gcc_assert (ignore);
8099
8100 /* Check for |= or &= of a bitfield of size one into another bitfield
8101 of size 1. In this case, (unless we need the result of the
8102 assignment) we can do this more efficiently with a
8103 test followed by an assignment, if necessary.
8104
8105 ??? At this point, we can't get a BIT_FIELD_REF here. But if
8106 things change so we do, this code should be enhanced to
8107 support it. */
8108 if (TREE_CODE (lhs) == COMPONENT_REF
8109 && (TREE_CODE (rhs) == BIT_IOR_EXPR
8110 || TREE_CODE (rhs) == BIT_AND_EXPR)
8111 && TREE_OPERAND (rhs, 0) == lhs
8112 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
8113 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
8114 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
8115 {
8116 rtx label = gen_label_rtx ();
8117
8118 do_jump (TREE_OPERAND (rhs, 1),
8119 TREE_CODE (rhs) == BIT_IOR_EXPR ? label : 0,
8120 TREE_CODE (rhs) == BIT_AND_EXPR ? label : 0);
8121 expand_assignment (lhs, convert (TREE_TYPE (rhs),
8122 (TREE_CODE (rhs) == BIT_IOR_EXPR
8123 ? integer_one_node
8124 : integer_zero_node)));
8125 do_pending_stack_adjust ();
8126 emit_label (label);
8127 return const0_rtx;
8128 }
8129
8130 expand_assignment (lhs, rhs);
8131
8132 return const0_rtx;
8133 }
8134
8135 case RETURN_EXPR:
8136 if (!TREE_OPERAND (exp, 0))
8137 expand_null_return ();
8138 else
8139 expand_return (TREE_OPERAND (exp, 0));
8140 return const0_rtx;
8141
8142 case ADDR_EXPR:
8143 return expand_expr_addr_expr (exp, target, tmode, modifier);
8144
8145 case COMPLEX_EXPR:
8146 /* Get the rtx code of the operands. */
8147 op0 = expand_expr (TREE_OPERAND (exp, 0), 0, VOIDmode, 0);
8148 op1 = expand_expr (TREE_OPERAND (exp, 1), 0, VOIDmode, 0);
8149
8150 if (!target)
8151 target = gen_reg_rtx (TYPE_MODE (TREE_TYPE (exp)));
8152
8153 /* Move the real (op0) and imaginary (op1) parts to their location. */
8154 write_complex_part (target, op0, false);
8155 write_complex_part (target, op1, true);
8156
8157 return target;
8158
8159 case REALPART_EXPR:
8160 op0 = expand_expr (TREE_OPERAND (exp, 0), 0, VOIDmode, 0);
8161 return read_complex_part (op0, false);
8162
8163 case IMAGPART_EXPR:
8164 op0 = expand_expr (TREE_OPERAND (exp, 0), 0, VOIDmode, 0);
8165 return read_complex_part (op0, true);
8166
8167 case RESX_EXPR:
8168 expand_resx_expr (exp);
8169 return const0_rtx;
8170
8171 case TRY_CATCH_EXPR:
8172 case CATCH_EXPR:
8173 case EH_FILTER_EXPR:
8174 case TRY_FINALLY_EXPR:
8175 /* Lowered by tree-eh.c. */
8176 gcc_unreachable ();
8177
8178 case WITH_CLEANUP_EXPR:
8179 case CLEANUP_POINT_EXPR:
8180 case TARGET_EXPR:
8181 case CASE_LABEL_EXPR:
8182 case VA_ARG_EXPR:
8183 case BIND_EXPR:
8184 case INIT_EXPR:
8185 case CONJ_EXPR:
8186 case COMPOUND_EXPR:
8187 case PREINCREMENT_EXPR:
8188 case PREDECREMENT_EXPR:
8189 case POSTINCREMENT_EXPR:
8190 case POSTDECREMENT_EXPR:
8191 case LOOP_EXPR:
8192 case EXIT_EXPR:
8193 case TRUTH_ANDIF_EXPR:
8194 case TRUTH_ORIF_EXPR:
8195 /* Lowered by gimplify.c. */
8196 gcc_unreachable ();
8197
8198 case EXC_PTR_EXPR:
8199 return get_exception_pointer (cfun);
8200
8201 case FILTER_EXPR:
8202 return get_exception_filter (cfun);
8203
8204 case FDESC_EXPR:
8205 /* Function descriptors are not valid except for as
8206 initialization constants, and should not be expanded. */
8207 gcc_unreachable ();
8208
8209 case SWITCH_EXPR:
8210 expand_case (exp);
8211 return const0_rtx;
8212
8213 case LABEL_EXPR:
8214 expand_label (TREE_OPERAND (exp, 0));
8215 return const0_rtx;
8216
8217 case ASM_EXPR:
8218 expand_asm_expr (exp);
8219 return const0_rtx;
8220
8221 case WITH_SIZE_EXPR:
8222 /* WITH_SIZE_EXPR expands to its first argument. The caller should
8223 have pulled out the size to use in whatever context it needed. */
8224 return expand_expr_real (TREE_OPERAND (exp, 0), original_target, tmode,
8225 modifier, alt_rtl);
8226
8227 case REALIGN_LOAD_EXPR:
8228 {
8229 tree oprnd0 = TREE_OPERAND (exp, 0);
8230 tree oprnd1 = TREE_OPERAND (exp, 1);
8231 tree oprnd2 = TREE_OPERAND (exp, 2);
8232 rtx op2;
8233
8234 this_optab = optab_for_tree_code (code, type);
8235 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, 0);
8236 op2 = expand_expr (oprnd2, NULL_RTX, VOIDmode, 0);
8237 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8238 target, unsignedp);
8239 if (temp == 0)
8240 abort ();
8241 return temp;
8242 }
8243
8244
8245 default:
8246 return lang_hooks.expand_expr (exp, original_target, tmode,
8247 modifier, alt_rtl);
8248 }
8249
8250 /* Here to do an ordinary binary operator. */
8251 binop:
8252 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8253 subtarget, &op0, &op1, 0);
8254 binop2:
8255 this_optab = optab_for_tree_code (code, type);
8256 binop3:
8257 if (modifier == EXPAND_STACK_PARM)
8258 target = 0;
8259 temp = expand_binop (mode, this_optab, op0, op1, target,
8260 unsignedp, OPTAB_LIB_WIDEN);
8261 gcc_assert (temp);
8262 return REDUCE_BIT_FIELD (temp);
8263 }
8264 #undef REDUCE_BIT_FIELD
8265 \f
8266 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
8267 signedness of TYPE), possibly returning the result in TARGET. */
8268 static rtx
8269 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
8270 {
8271 HOST_WIDE_INT prec = TYPE_PRECISION (type);
8272 if (target && GET_MODE (target) != GET_MODE (exp))
8273 target = 0;
8274 if (TYPE_UNSIGNED (type))
8275 {
8276 rtx mask;
8277 if (prec < HOST_BITS_PER_WIDE_INT)
8278 mask = immed_double_const (((unsigned HOST_WIDE_INT) 1 << prec) - 1, 0,
8279 GET_MODE (exp));
8280 else
8281 mask = immed_double_const ((unsigned HOST_WIDE_INT) -1,
8282 ((unsigned HOST_WIDE_INT) 1
8283 << (prec - HOST_BITS_PER_WIDE_INT)) - 1,
8284 GET_MODE (exp));
8285 return expand_and (GET_MODE (exp), exp, mask, target);
8286 }
8287 else
8288 {
8289 tree count = build_int_cst (NULL_TREE,
8290 GET_MODE_BITSIZE (GET_MODE (exp)) - prec);
8291 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0);
8292 return expand_shift (RSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0);
8293 }
8294 }
8295 \f
8296 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
8297 when applied to the address of EXP produces an address known to be
8298 aligned more than BIGGEST_ALIGNMENT. */
8299
8300 static int
8301 is_aligning_offset (tree offset, tree exp)
8302 {
8303 /* Strip off any conversions. */
8304 while (TREE_CODE (offset) == NON_LVALUE_EXPR
8305 || TREE_CODE (offset) == NOP_EXPR
8306 || TREE_CODE (offset) == CONVERT_EXPR)
8307 offset = TREE_OPERAND (offset, 0);
8308
8309 /* We must now have a BIT_AND_EXPR with a constant that is one less than
8310 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
8311 if (TREE_CODE (offset) != BIT_AND_EXPR
8312 || !host_integerp (TREE_OPERAND (offset, 1), 1)
8313 || compare_tree_int (TREE_OPERAND (offset, 1),
8314 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
8315 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
8316 return 0;
8317
8318 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
8319 It must be NEGATE_EXPR. Then strip any more conversions. */
8320 offset = TREE_OPERAND (offset, 0);
8321 while (TREE_CODE (offset) == NON_LVALUE_EXPR
8322 || TREE_CODE (offset) == NOP_EXPR
8323 || TREE_CODE (offset) == CONVERT_EXPR)
8324 offset = TREE_OPERAND (offset, 0);
8325
8326 if (TREE_CODE (offset) != NEGATE_EXPR)
8327 return 0;
8328
8329 offset = TREE_OPERAND (offset, 0);
8330 while (TREE_CODE (offset) == NON_LVALUE_EXPR
8331 || TREE_CODE (offset) == NOP_EXPR
8332 || TREE_CODE (offset) == CONVERT_EXPR)
8333 offset = TREE_OPERAND (offset, 0);
8334
8335 /* This must now be the address of EXP. */
8336 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
8337 }
8338 \f
8339 /* Return the tree node if an ARG corresponds to a string constant or zero
8340 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
8341 in bytes within the string that ARG is accessing. The type of the
8342 offset will be `sizetype'. */
8343
8344 tree
8345 string_constant (tree arg, tree *ptr_offset)
8346 {
8347 tree array, offset;
8348 STRIP_NOPS (arg);
8349
8350 if (TREE_CODE (arg) == ADDR_EXPR)
8351 {
8352 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
8353 {
8354 *ptr_offset = size_zero_node;
8355 return TREE_OPERAND (arg, 0);
8356 }
8357 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
8358 {
8359 array = TREE_OPERAND (arg, 0);
8360 offset = size_zero_node;
8361 }
8362 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
8363 {
8364 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
8365 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
8366 if (TREE_CODE (array) != STRING_CST
8367 && TREE_CODE (array) != VAR_DECL)
8368 return 0;
8369 }
8370 else
8371 return 0;
8372 }
8373 else if (TREE_CODE (arg) == PLUS_EXPR)
8374 {
8375 tree arg0 = TREE_OPERAND (arg, 0);
8376 tree arg1 = TREE_OPERAND (arg, 1);
8377
8378 STRIP_NOPS (arg0);
8379 STRIP_NOPS (arg1);
8380
8381 if (TREE_CODE (arg0) == ADDR_EXPR
8382 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
8383 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
8384 {
8385 array = TREE_OPERAND (arg0, 0);
8386 offset = arg1;
8387 }
8388 else if (TREE_CODE (arg1) == ADDR_EXPR
8389 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
8390 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
8391 {
8392 array = TREE_OPERAND (arg1, 0);
8393 offset = arg0;
8394 }
8395 else
8396 return 0;
8397 }
8398 else
8399 return 0;
8400
8401 if (TREE_CODE (array) == STRING_CST)
8402 {
8403 *ptr_offset = convert (sizetype, offset);
8404 return array;
8405 }
8406 else if (TREE_CODE (array) == VAR_DECL)
8407 {
8408 int length;
8409
8410 /* Variables initialized to string literals can be handled too. */
8411 if (DECL_INITIAL (array) == NULL_TREE
8412 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
8413 return 0;
8414
8415 /* If they are read-only, non-volatile and bind locally. */
8416 if (! TREE_READONLY (array)
8417 || TREE_SIDE_EFFECTS (array)
8418 || ! targetm.binds_local_p (array))
8419 return 0;
8420
8421 /* Avoid const char foo[4] = "abcde"; */
8422 if (DECL_SIZE_UNIT (array) == NULL_TREE
8423 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
8424 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
8425 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
8426 return 0;
8427
8428 /* If variable is bigger than the string literal, OFFSET must be constant
8429 and inside of the bounds of the string literal. */
8430 offset = convert (sizetype, offset);
8431 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
8432 && (! host_integerp (offset, 1)
8433 || compare_tree_int (offset, length) >= 0))
8434 return 0;
8435
8436 *ptr_offset = offset;
8437 return DECL_INITIAL (array);
8438 }
8439
8440 return 0;
8441 }
8442 \f
8443 /* Generate code to calculate EXP using a store-flag instruction
8444 and return an rtx for the result. EXP is either a comparison
8445 or a TRUTH_NOT_EXPR whose operand is a comparison.
8446
8447 If TARGET is nonzero, store the result there if convenient.
8448
8449 If ONLY_CHEAP is nonzero, only do this if it is likely to be very
8450 cheap.
8451
8452 Return zero if there is no suitable set-flag instruction
8453 available on this machine.
8454
8455 Once expand_expr has been called on the arguments of the comparison,
8456 we are committed to doing the store flag, since it is not safe to
8457 re-evaluate the expression. We emit the store-flag insn by calling
8458 emit_store_flag, but only expand the arguments if we have a reason
8459 to believe that emit_store_flag will be successful. If we think that
8460 it will, but it isn't, we have to simulate the store-flag with a
8461 set/jump/set sequence. */
8462
8463 static rtx
8464 do_store_flag (tree exp, rtx target, enum machine_mode mode, int only_cheap)
8465 {
8466 enum rtx_code code;
8467 tree arg0, arg1, type;
8468 tree tem;
8469 enum machine_mode operand_mode;
8470 int invert = 0;
8471 int unsignedp;
8472 rtx op0, op1;
8473 enum insn_code icode;
8474 rtx subtarget = target;
8475 rtx result, label;
8476
8477 /* If this is a TRUTH_NOT_EXPR, set a flag indicating we must invert the
8478 result at the end. We can't simply invert the test since it would
8479 have already been inverted if it were valid. This case occurs for
8480 some floating-point comparisons. */
8481
8482 if (TREE_CODE (exp) == TRUTH_NOT_EXPR)
8483 invert = 1, exp = TREE_OPERAND (exp, 0);
8484
8485 arg0 = TREE_OPERAND (exp, 0);
8486 arg1 = TREE_OPERAND (exp, 1);
8487
8488 /* Don't crash if the comparison was erroneous. */
8489 if (arg0 == error_mark_node || arg1 == error_mark_node)
8490 return const0_rtx;
8491
8492 type = TREE_TYPE (arg0);
8493 operand_mode = TYPE_MODE (type);
8494 unsignedp = TYPE_UNSIGNED (type);
8495
8496 /* We won't bother with BLKmode store-flag operations because it would mean
8497 passing a lot of information to emit_store_flag. */
8498 if (operand_mode == BLKmode)
8499 return 0;
8500
8501 /* We won't bother with store-flag operations involving function pointers
8502 when function pointers must be canonicalized before comparisons. */
8503 #ifdef HAVE_canonicalize_funcptr_for_compare
8504 if (HAVE_canonicalize_funcptr_for_compare
8505 && ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == POINTER_TYPE
8506 && (TREE_CODE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))))
8507 == FUNCTION_TYPE))
8508 || (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 1))) == POINTER_TYPE
8509 && (TREE_CODE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1))))
8510 == FUNCTION_TYPE))))
8511 return 0;
8512 #endif
8513
8514 STRIP_NOPS (arg0);
8515 STRIP_NOPS (arg1);
8516
8517 /* Get the rtx comparison code to use. We know that EXP is a comparison
8518 operation of some type. Some comparisons against 1 and -1 can be
8519 converted to comparisons with zero. Do so here so that the tests
8520 below will be aware that we have a comparison with zero. These
8521 tests will not catch constants in the first operand, but constants
8522 are rarely passed as the first operand. */
8523
8524 switch (TREE_CODE (exp))
8525 {
8526 case EQ_EXPR:
8527 code = EQ;
8528 break;
8529 case NE_EXPR:
8530 code = NE;
8531 break;
8532 case LT_EXPR:
8533 if (integer_onep (arg1))
8534 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
8535 else
8536 code = unsignedp ? LTU : LT;
8537 break;
8538 case LE_EXPR:
8539 if (! unsignedp && integer_all_onesp (arg1))
8540 arg1 = integer_zero_node, code = LT;
8541 else
8542 code = unsignedp ? LEU : LE;
8543 break;
8544 case GT_EXPR:
8545 if (! unsignedp && integer_all_onesp (arg1))
8546 arg1 = integer_zero_node, code = GE;
8547 else
8548 code = unsignedp ? GTU : GT;
8549 break;
8550 case GE_EXPR:
8551 if (integer_onep (arg1))
8552 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
8553 else
8554 code = unsignedp ? GEU : GE;
8555 break;
8556
8557 case UNORDERED_EXPR:
8558 code = UNORDERED;
8559 break;
8560 case ORDERED_EXPR:
8561 code = ORDERED;
8562 break;
8563 case UNLT_EXPR:
8564 code = UNLT;
8565 break;
8566 case UNLE_EXPR:
8567 code = UNLE;
8568 break;
8569 case UNGT_EXPR:
8570 code = UNGT;
8571 break;
8572 case UNGE_EXPR:
8573 code = UNGE;
8574 break;
8575 case UNEQ_EXPR:
8576 code = UNEQ;
8577 break;
8578 case LTGT_EXPR:
8579 code = LTGT;
8580 break;
8581
8582 default:
8583 gcc_unreachable ();
8584 }
8585
8586 /* Put a constant second. */
8587 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST)
8588 {
8589 tem = arg0; arg0 = arg1; arg1 = tem;
8590 code = swap_condition (code);
8591 }
8592
8593 /* If this is an equality or inequality test of a single bit, we can
8594 do this by shifting the bit being tested to the low-order bit and
8595 masking the result with the constant 1. If the condition was EQ,
8596 we xor it with 1. This does not require an scc insn and is faster
8597 than an scc insn even if we have it.
8598
8599 The code to make this transformation was moved into fold_single_bit_test,
8600 so we just call into the folder and expand its result. */
8601
8602 if ((code == NE || code == EQ)
8603 && TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1)
8604 && integer_pow2p (TREE_OPERAND (arg0, 1)))
8605 {
8606 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
8607 return expand_expr (fold_single_bit_test (code == NE ? NE_EXPR : EQ_EXPR,
8608 arg0, arg1, type),
8609 target, VOIDmode, EXPAND_NORMAL);
8610 }
8611
8612 /* Now see if we are likely to be able to do this. Return if not. */
8613 if (! can_compare_p (code, operand_mode, ccp_store_flag))
8614 return 0;
8615
8616 icode = setcc_gen_code[(int) code];
8617 if (icode == CODE_FOR_nothing
8618 || (only_cheap && insn_data[(int) icode].operand[0].mode != mode))
8619 {
8620 /* We can only do this if it is one of the special cases that
8621 can be handled without an scc insn. */
8622 if ((code == LT && integer_zerop (arg1))
8623 || (! only_cheap && code == GE && integer_zerop (arg1)))
8624 ;
8625 else if (BRANCH_COST >= 0
8626 && ! only_cheap && (code == NE || code == EQ)
8627 && TREE_CODE (type) != REAL_TYPE
8628 && ((abs_optab->handlers[(int) operand_mode].insn_code
8629 != CODE_FOR_nothing)
8630 || (ffs_optab->handlers[(int) operand_mode].insn_code
8631 != CODE_FOR_nothing)))
8632 ;
8633 else
8634 return 0;
8635 }
8636
8637 if (! get_subtarget (target)
8638 || GET_MODE (subtarget) != operand_mode)
8639 subtarget = 0;
8640
8641 expand_operands (arg0, arg1, subtarget, &op0, &op1, 0);
8642
8643 if (target == 0)
8644 target = gen_reg_rtx (mode);
8645
8646 result = emit_store_flag (target, code, op0, op1,
8647 operand_mode, unsignedp, 1);
8648
8649 if (result)
8650 {
8651 if (invert)
8652 result = expand_binop (mode, xor_optab, result, const1_rtx,
8653 result, 0, OPTAB_LIB_WIDEN);
8654 return result;
8655 }
8656
8657 /* If this failed, we have to do this with set/compare/jump/set code. */
8658 if (!REG_P (target)
8659 || reg_mentioned_p (target, op0) || reg_mentioned_p (target, op1))
8660 target = gen_reg_rtx (GET_MODE (target));
8661
8662 emit_move_insn (target, invert ? const0_rtx : const1_rtx);
8663 result = compare_from_rtx (op0, op1, code, unsignedp,
8664 operand_mode, NULL_RTX);
8665 if (GET_CODE (result) == CONST_INT)
8666 return (((result == const0_rtx && ! invert)
8667 || (result != const0_rtx && invert))
8668 ? const0_rtx : const1_rtx);
8669
8670 /* The code of RESULT may not match CODE if compare_from_rtx
8671 decided to swap its operands and reverse the original code.
8672
8673 We know that compare_from_rtx returns either a CONST_INT or
8674 a new comparison code, so it is safe to just extract the
8675 code from RESULT. */
8676 code = GET_CODE (result);
8677
8678 label = gen_label_rtx ();
8679 gcc_assert (bcc_gen_fctn[(int) code]);
8680
8681 emit_jump_insn ((*bcc_gen_fctn[(int) code]) (label));
8682 emit_move_insn (target, invert ? const1_rtx : const0_rtx);
8683 emit_label (label);
8684
8685 return target;
8686 }
8687 \f
8688
8689 /* Stubs in case we haven't got a casesi insn. */
8690 #ifndef HAVE_casesi
8691 # define HAVE_casesi 0
8692 # define gen_casesi(a, b, c, d, e) (0)
8693 # define CODE_FOR_casesi CODE_FOR_nothing
8694 #endif
8695
8696 /* If the machine does not have a case insn that compares the bounds,
8697 this means extra overhead for dispatch tables, which raises the
8698 threshold for using them. */
8699 #ifndef CASE_VALUES_THRESHOLD
8700 #define CASE_VALUES_THRESHOLD (HAVE_casesi ? 4 : 5)
8701 #endif /* CASE_VALUES_THRESHOLD */
8702
8703 unsigned int
8704 case_values_threshold (void)
8705 {
8706 return CASE_VALUES_THRESHOLD;
8707 }
8708
8709 /* Attempt to generate a casesi instruction. Returns 1 if successful,
8710 0 otherwise (i.e. if there is no casesi instruction). */
8711 int
8712 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
8713 rtx table_label ATTRIBUTE_UNUSED, rtx default_label)
8714 {
8715 enum machine_mode index_mode = SImode;
8716 int index_bits = GET_MODE_BITSIZE (index_mode);
8717 rtx op1, op2, index;
8718 enum machine_mode op_mode;
8719
8720 if (! HAVE_casesi)
8721 return 0;
8722
8723 /* Convert the index to SImode. */
8724 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
8725 {
8726 enum machine_mode omode = TYPE_MODE (index_type);
8727 rtx rangertx = expand_expr (range, NULL_RTX, VOIDmode, 0);
8728
8729 /* We must handle the endpoints in the original mode. */
8730 index_expr = build2 (MINUS_EXPR, index_type,
8731 index_expr, minval);
8732 minval = integer_zero_node;
8733 index = expand_expr (index_expr, NULL_RTX, VOIDmode, 0);
8734 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
8735 omode, 1, default_label);
8736 /* Now we can safely truncate. */
8737 index = convert_to_mode (index_mode, index, 0);
8738 }
8739 else
8740 {
8741 if (TYPE_MODE (index_type) != index_mode)
8742 {
8743 index_expr = convert (lang_hooks.types.type_for_size
8744 (index_bits, 0), index_expr);
8745 index_type = TREE_TYPE (index_expr);
8746 }
8747
8748 index = expand_expr (index_expr, NULL_RTX, VOIDmode, 0);
8749 }
8750
8751 do_pending_stack_adjust ();
8752
8753 op_mode = insn_data[(int) CODE_FOR_casesi].operand[0].mode;
8754 if (! (*insn_data[(int) CODE_FOR_casesi].operand[0].predicate)
8755 (index, op_mode))
8756 index = copy_to_mode_reg (op_mode, index);
8757
8758 op1 = expand_expr (minval, NULL_RTX, VOIDmode, 0);
8759
8760 op_mode = insn_data[(int) CODE_FOR_casesi].operand[1].mode;
8761 op1 = convert_modes (op_mode, TYPE_MODE (TREE_TYPE (minval)),
8762 op1, TYPE_UNSIGNED (TREE_TYPE (minval)));
8763 if (! (*insn_data[(int) CODE_FOR_casesi].operand[1].predicate)
8764 (op1, op_mode))
8765 op1 = copy_to_mode_reg (op_mode, op1);
8766
8767 op2 = expand_expr (range, NULL_RTX, VOIDmode, 0);
8768
8769 op_mode = insn_data[(int) CODE_FOR_casesi].operand[2].mode;
8770 op2 = convert_modes (op_mode, TYPE_MODE (TREE_TYPE (range)),
8771 op2, TYPE_UNSIGNED (TREE_TYPE (range)));
8772 if (! (*insn_data[(int) CODE_FOR_casesi].operand[2].predicate)
8773 (op2, op_mode))
8774 op2 = copy_to_mode_reg (op_mode, op2);
8775
8776 emit_jump_insn (gen_casesi (index, op1, op2,
8777 table_label, default_label));
8778 return 1;
8779 }
8780
8781 /* Attempt to generate a tablejump instruction; same concept. */
8782 #ifndef HAVE_tablejump
8783 #define HAVE_tablejump 0
8784 #define gen_tablejump(x, y) (0)
8785 #endif
8786
8787 /* Subroutine of the next function.
8788
8789 INDEX is the value being switched on, with the lowest value
8790 in the table already subtracted.
8791 MODE is its expected mode (needed if INDEX is constant).
8792 RANGE is the length of the jump table.
8793 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
8794
8795 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
8796 index value is out of range. */
8797
8798 static void
8799 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
8800 rtx default_label)
8801 {
8802 rtx temp, vector;
8803
8804 if (INTVAL (range) > cfun->max_jumptable_ents)
8805 cfun->max_jumptable_ents = INTVAL (range);
8806
8807 /* Do an unsigned comparison (in the proper mode) between the index
8808 expression and the value which represents the length of the range.
8809 Since we just finished subtracting the lower bound of the range
8810 from the index expression, this comparison allows us to simultaneously
8811 check that the original index expression value is both greater than
8812 or equal to the minimum value of the range and less than or equal to
8813 the maximum value of the range. */
8814
8815 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
8816 default_label);
8817
8818 /* If index is in range, it must fit in Pmode.
8819 Convert to Pmode so we can index with it. */
8820 if (mode != Pmode)
8821 index = convert_to_mode (Pmode, index, 1);
8822
8823 /* Don't let a MEM slip through, because then INDEX that comes
8824 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
8825 and break_out_memory_refs will go to work on it and mess it up. */
8826 #ifdef PIC_CASE_VECTOR_ADDRESS
8827 if (flag_pic && !REG_P (index))
8828 index = copy_to_mode_reg (Pmode, index);
8829 #endif
8830
8831 /* If flag_force_addr were to affect this address
8832 it could interfere with the tricky assumptions made
8833 about addresses that contain label-refs,
8834 which may be valid only very near the tablejump itself. */
8835 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
8836 GET_MODE_SIZE, because this indicates how large insns are. The other
8837 uses should all be Pmode, because they are addresses. This code
8838 could fail if addresses and insns are not the same size. */
8839 index = gen_rtx_PLUS (Pmode,
8840 gen_rtx_MULT (Pmode, index,
8841 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
8842 gen_rtx_LABEL_REF (Pmode, table_label));
8843 #ifdef PIC_CASE_VECTOR_ADDRESS
8844 if (flag_pic)
8845 index = PIC_CASE_VECTOR_ADDRESS (index);
8846 else
8847 #endif
8848 index = memory_address_noforce (CASE_VECTOR_MODE, index);
8849 temp = gen_reg_rtx (CASE_VECTOR_MODE);
8850 vector = gen_const_mem (CASE_VECTOR_MODE, index);
8851 convert_move (temp, vector, 0);
8852
8853 emit_jump_insn (gen_tablejump (temp, table_label));
8854
8855 /* If we are generating PIC code or if the table is PC-relative, the
8856 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
8857 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
8858 emit_barrier ();
8859 }
8860
8861 int
8862 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
8863 rtx table_label, rtx default_label)
8864 {
8865 rtx index;
8866
8867 if (! HAVE_tablejump)
8868 return 0;
8869
8870 index_expr = fold (build2 (MINUS_EXPR, index_type,
8871 convert (index_type, index_expr),
8872 convert (index_type, minval)));
8873 index = expand_expr (index_expr, NULL_RTX, VOIDmode, 0);
8874 do_pending_stack_adjust ();
8875
8876 do_tablejump (index, TYPE_MODE (index_type),
8877 convert_modes (TYPE_MODE (index_type),
8878 TYPE_MODE (TREE_TYPE (range)),
8879 expand_expr (range, NULL_RTX,
8880 VOIDmode, 0),
8881 TYPE_UNSIGNED (TREE_TYPE (range))),
8882 table_label, default_label);
8883 return 1;
8884 }
8885
8886 /* Nonzero if the mode is a valid vector mode for this architecture.
8887 This returns nonzero even if there is no hardware support for the
8888 vector mode, but we can emulate with narrower modes. */
8889
8890 int
8891 vector_mode_valid_p (enum machine_mode mode)
8892 {
8893 enum mode_class class = GET_MODE_CLASS (mode);
8894 enum machine_mode innermode;
8895
8896 /* Doh! What's going on? */
8897 if (class != MODE_VECTOR_INT
8898 && class != MODE_VECTOR_FLOAT)
8899 return 0;
8900
8901 /* Hardware support. Woo hoo! */
8902 if (targetm.vector_mode_supported_p (mode))
8903 return 1;
8904
8905 innermode = GET_MODE_INNER (mode);
8906
8907 /* We should probably return 1 if requesting V4DI and we have no DI,
8908 but we have V2DI, but this is probably very unlikely. */
8909
8910 /* If we have support for the inner mode, we can safely emulate it.
8911 We may not have V2DI, but me can emulate with a pair of DIs. */
8912 return targetm.scalar_mode_supported_p (innermode);
8913 }
8914
8915 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
8916 static rtx
8917 const_vector_from_tree (tree exp)
8918 {
8919 rtvec v;
8920 int units, i;
8921 tree link, elt;
8922 enum machine_mode inner, mode;
8923
8924 mode = TYPE_MODE (TREE_TYPE (exp));
8925
8926 if (initializer_zerop (exp))
8927 return CONST0_RTX (mode);
8928
8929 units = GET_MODE_NUNITS (mode);
8930 inner = GET_MODE_INNER (mode);
8931
8932 v = rtvec_alloc (units);
8933
8934 link = TREE_VECTOR_CST_ELTS (exp);
8935 for (i = 0; link; link = TREE_CHAIN (link), ++i)
8936 {
8937 elt = TREE_VALUE (link);
8938
8939 if (TREE_CODE (elt) == REAL_CST)
8940 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
8941 inner);
8942 else
8943 RTVEC_ELT (v, i) = immed_double_const (TREE_INT_CST_LOW (elt),
8944 TREE_INT_CST_HIGH (elt),
8945 inner);
8946 }
8947
8948 /* Initialize remaining elements to 0. */
8949 for (; i < units; ++i)
8950 RTVEC_ELT (v, i) = CONST0_RTX (inner);
8951
8952 return gen_rtx_CONST_VECTOR (mode, v);
8953 }
8954 #include "gt-expr.h"