bind_c_array_params_2.f90: Add "-mno-explicit-relocs" for alpha*-*-* targets.
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
4 2012 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "typeclass.h"
43 #include "toplev.h"
44 #include "langhooks.h"
45 #include "intl.h"
46 #include "tm_p.h"
47 #include "tree-iterator.h"
48 #include "tree-flow.h"
49 #include "target.h"
50 #include "common/common-target.h"
51 #include "timevar.h"
52 #include "df.h"
53 #include "diagnostic.h"
54 #include "ssaexpand.h"
55 #include "target-globals.h"
56 #include "params.h"
57
58 /* Decide whether a function's arguments should be processed
59 from first to last or from last to first.
60
61 They should if the stack and args grow in opposite directions, but
62 only if we have push insns. */
63
64 #ifdef PUSH_ROUNDING
65
66 #ifndef PUSH_ARGS_REVERSED
67 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
68 #define PUSH_ARGS_REVERSED /* If it's last to first. */
69 #endif
70 #endif
71
72 #endif
73
74 #ifndef STACK_PUSH_CODE
75 #ifdef STACK_GROWS_DOWNWARD
76 #define STACK_PUSH_CODE PRE_DEC
77 #else
78 #define STACK_PUSH_CODE PRE_INC
79 #endif
80 #endif
81
82
83 /* If this is nonzero, we do not bother generating VOLATILE
84 around volatile memory references, and we are willing to
85 output indirect addresses. If cse is to follow, we reject
86 indirect addresses so a useful potential cse is generated;
87 if it is used only once, instruction combination will produce
88 the same indirect address eventually. */
89 int cse_not_expected;
90
91 /* This structure is used by move_by_pieces to describe the move to
92 be performed. */
93 struct move_by_pieces_d
94 {
95 rtx to;
96 rtx to_addr;
97 int autinc_to;
98 int explicit_inc_to;
99 rtx from;
100 rtx from_addr;
101 int autinc_from;
102 int explicit_inc_from;
103 unsigned HOST_WIDE_INT len;
104 HOST_WIDE_INT offset;
105 int reverse;
106 };
107
108 /* This structure is used by store_by_pieces to describe the clear to
109 be performed. */
110
111 struct store_by_pieces_d
112 {
113 rtx to;
114 rtx to_addr;
115 int autinc_to;
116 int explicit_inc_to;
117 unsigned HOST_WIDE_INT len;
118 HOST_WIDE_INT offset;
119 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
120 void *constfundata;
121 int reverse;
122 };
123
124 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
125 struct move_by_pieces_d *);
126 static bool block_move_libcall_safe_for_call_parm (void);
127 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
128 static tree emit_block_move_libcall_fn (int);
129 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
130 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
131 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
132 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
133 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
134 struct store_by_pieces_d *);
135 static tree clear_storage_libcall_fn (int);
136 static rtx compress_float_constant (rtx, rtx);
137 static rtx get_subtarget (rtx);
138 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
139 HOST_WIDE_INT, enum machine_mode,
140 tree, tree, int, alias_set_type);
141 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
142 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
143 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
144 enum machine_mode,
145 tree, tree, alias_set_type, bool);
146
147 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
148
149 static int is_aligning_offset (const_tree, const_tree);
150 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
151 enum expand_modifier);
152 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
153 static rtx do_store_flag (sepops, rtx, enum machine_mode);
154 #ifdef PUSH_ROUNDING
155 static void emit_single_push_insn (enum machine_mode, rtx, tree);
156 #endif
157 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
158 static rtx const_vector_from_tree (tree);
159 static void write_complex_part (rtx, rtx, bool);
160
161 /* This macro is used to determine whether move_by_pieces should be called
162 to perform a structure copy. */
163 #ifndef MOVE_BY_PIECES_P
164 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
165 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
166 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
167 #endif
168
169 /* This macro is used to determine whether clear_by_pieces should be
170 called to clear storage. */
171 #ifndef CLEAR_BY_PIECES_P
172 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
173 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
174 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
175 #endif
176
177 /* This macro is used to determine whether store_by_pieces should be
178 called to "memset" storage with byte values other than zero. */
179 #ifndef SET_BY_PIECES_P
180 #define SET_BY_PIECES_P(SIZE, ALIGN) \
181 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
182 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
183 #endif
184
185 /* This macro is used to determine whether store_by_pieces should be
186 called to "memcpy" storage when the source is a constant string. */
187 #ifndef STORE_BY_PIECES_P
188 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
189 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
190 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
191 #endif
192
193 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
194
195 #ifndef SLOW_UNALIGNED_ACCESS
196 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
197 #endif
198 \f
199 /* This is run to set up which modes can be used
200 directly in memory and to initialize the block move optab. It is run
201 at the beginning of compilation and when the target is reinitialized. */
202
203 void
204 init_expr_target (void)
205 {
206 rtx insn, pat;
207 enum machine_mode mode;
208 int num_clobbers;
209 rtx mem, mem1;
210 rtx reg;
211
212 /* Try indexing by frame ptr and try by stack ptr.
213 It is known that on the Convex the stack ptr isn't a valid index.
214 With luck, one or the other is valid on any machine. */
215 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
216 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
217
218 /* A scratch register we can modify in-place below to avoid
219 useless RTL allocations. */
220 reg = gen_rtx_REG (VOIDmode, -1);
221
222 insn = rtx_alloc (INSN);
223 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
224 PATTERN (insn) = pat;
225
226 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
227 mode = (enum machine_mode) ((int) mode + 1))
228 {
229 int regno;
230
231 direct_load[(int) mode] = direct_store[(int) mode] = 0;
232 PUT_MODE (mem, mode);
233 PUT_MODE (mem1, mode);
234 PUT_MODE (reg, mode);
235
236 /* See if there is some register that can be used in this mode and
237 directly loaded or stored from memory. */
238
239 if (mode != VOIDmode && mode != BLKmode)
240 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
241 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
242 regno++)
243 {
244 if (! HARD_REGNO_MODE_OK (regno, mode))
245 continue;
246
247 SET_REGNO (reg, regno);
248
249 SET_SRC (pat) = mem;
250 SET_DEST (pat) = reg;
251 if (recog (pat, insn, &num_clobbers) >= 0)
252 direct_load[(int) mode] = 1;
253
254 SET_SRC (pat) = mem1;
255 SET_DEST (pat) = reg;
256 if (recog (pat, insn, &num_clobbers) >= 0)
257 direct_load[(int) mode] = 1;
258
259 SET_SRC (pat) = reg;
260 SET_DEST (pat) = mem;
261 if (recog (pat, insn, &num_clobbers) >= 0)
262 direct_store[(int) mode] = 1;
263
264 SET_SRC (pat) = reg;
265 SET_DEST (pat) = mem1;
266 if (recog (pat, insn, &num_clobbers) >= 0)
267 direct_store[(int) mode] = 1;
268 }
269 }
270
271 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
272
273 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
274 mode = GET_MODE_WIDER_MODE (mode))
275 {
276 enum machine_mode srcmode;
277 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
278 srcmode = GET_MODE_WIDER_MODE (srcmode))
279 {
280 enum insn_code ic;
281
282 ic = can_extend_p (mode, srcmode, 0);
283 if (ic == CODE_FOR_nothing)
284 continue;
285
286 PUT_MODE (mem, srcmode);
287
288 if (insn_operand_matches (ic, 1, mem))
289 float_extend_from_mem[mode][srcmode] = true;
290 }
291 }
292 }
293
294 /* This is run at the start of compiling a function. */
295
296 void
297 init_expr (void)
298 {
299 memset (&crtl->expr, 0, sizeof (crtl->expr));
300 }
301 \f
302 /* Copy data from FROM to TO, where the machine modes are not the same.
303 Both modes may be integer, or both may be floating, or both may be
304 fixed-point.
305 UNSIGNEDP should be nonzero if FROM is an unsigned type.
306 This causes zero-extension instead of sign-extension. */
307
308 void
309 convert_move (rtx to, rtx from, int unsignedp)
310 {
311 enum machine_mode to_mode = GET_MODE (to);
312 enum machine_mode from_mode = GET_MODE (from);
313 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
314 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
315 enum insn_code code;
316 rtx libcall;
317
318 /* rtx code for making an equivalent value. */
319 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
320 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
321
322
323 gcc_assert (to_real == from_real);
324 gcc_assert (to_mode != BLKmode);
325 gcc_assert (from_mode != BLKmode);
326
327 /* If the source and destination are already the same, then there's
328 nothing to do. */
329 if (to == from)
330 return;
331
332 /* If FROM is a SUBREG that indicates that we have already done at least
333 the required extension, strip it. We don't handle such SUBREGs as
334 TO here. */
335
336 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
337 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
338 >= GET_MODE_PRECISION (to_mode))
339 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
340 from = gen_lowpart (to_mode, from), from_mode = to_mode;
341
342 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
343
344 if (to_mode == from_mode
345 || (from_mode == VOIDmode && CONSTANT_P (from)))
346 {
347 emit_move_insn (to, from);
348 return;
349 }
350
351 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
352 {
353 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
354
355 if (VECTOR_MODE_P (to_mode))
356 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
357 else
358 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
359
360 emit_move_insn (to, from);
361 return;
362 }
363
364 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
365 {
366 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
367 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
368 return;
369 }
370
371 if (to_real)
372 {
373 rtx value, insns;
374 convert_optab tab;
375
376 gcc_assert ((GET_MODE_PRECISION (from_mode)
377 != GET_MODE_PRECISION (to_mode))
378 || (DECIMAL_FLOAT_MODE_P (from_mode)
379 != DECIMAL_FLOAT_MODE_P (to_mode)));
380
381 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
382 /* Conversion between decimal float and binary float, same size. */
383 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
384 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
385 tab = sext_optab;
386 else
387 tab = trunc_optab;
388
389 /* Try converting directly if the insn is supported. */
390
391 code = convert_optab_handler (tab, to_mode, from_mode);
392 if (code != CODE_FOR_nothing)
393 {
394 emit_unop_insn (code, to, from,
395 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
396 return;
397 }
398
399 /* Otherwise use a libcall. */
400 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
401
402 /* Is this conversion implemented yet? */
403 gcc_assert (libcall);
404
405 start_sequence ();
406 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
407 1, from, from_mode);
408 insns = get_insns ();
409 end_sequence ();
410 emit_libcall_block (insns, to, value,
411 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
412 from)
413 : gen_rtx_FLOAT_EXTEND (to_mode, from));
414 return;
415 }
416
417 /* Handle pointer conversion. */ /* SPEE 900220. */
418 /* Targets are expected to provide conversion insns between PxImode and
419 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
420 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
421 {
422 enum machine_mode full_mode
423 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
424
425 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
426 != CODE_FOR_nothing);
427
428 if (full_mode != from_mode)
429 from = convert_to_mode (full_mode, from, unsignedp);
430 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
431 to, from, UNKNOWN);
432 return;
433 }
434 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
435 {
436 rtx new_from;
437 enum machine_mode full_mode
438 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
439 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
440 enum insn_code icode;
441
442 icode = convert_optab_handler (ctab, full_mode, from_mode);
443 gcc_assert (icode != CODE_FOR_nothing);
444
445 if (to_mode == full_mode)
446 {
447 emit_unop_insn (icode, to, from, UNKNOWN);
448 return;
449 }
450
451 new_from = gen_reg_rtx (full_mode);
452 emit_unop_insn (icode, new_from, from, UNKNOWN);
453
454 /* else proceed to integer conversions below. */
455 from_mode = full_mode;
456 from = new_from;
457 }
458
459 /* Make sure both are fixed-point modes or both are not. */
460 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
461 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
462 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
463 {
464 /* If we widen from_mode to to_mode and they are in the same class,
465 we won't saturate the result.
466 Otherwise, always saturate the result to play safe. */
467 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
468 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
469 expand_fixed_convert (to, from, 0, 0);
470 else
471 expand_fixed_convert (to, from, 0, 1);
472 return;
473 }
474
475 /* Now both modes are integers. */
476
477 /* Handle expanding beyond a word. */
478 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
479 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
480 {
481 rtx insns;
482 rtx lowpart;
483 rtx fill_value;
484 rtx lowfrom;
485 int i;
486 enum machine_mode lowpart_mode;
487 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
488
489 /* Try converting directly if the insn is supported. */
490 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
491 != CODE_FOR_nothing)
492 {
493 /* If FROM is a SUBREG, put it into a register. Do this
494 so that we always generate the same set of insns for
495 better cse'ing; if an intermediate assignment occurred,
496 we won't be doing the operation directly on the SUBREG. */
497 if (optimize > 0 && GET_CODE (from) == SUBREG)
498 from = force_reg (from_mode, from);
499 emit_unop_insn (code, to, from, equiv_code);
500 return;
501 }
502 /* Next, try converting via full word. */
503 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
504 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
505 != CODE_FOR_nothing))
506 {
507 rtx word_to = gen_reg_rtx (word_mode);
508 if (REG_P (to))
509 {
510 if (reg_overlap_mentioned_p (to, from))
511 from = force_reg (from_mode, from);
512 emit_clobber (to);
513 }
514 convert_move (word_to, from, unsignedp);
515 emit_unop_insn (code, to, word_to, equiv_code);
516 return;
517 }
518
519 /* No special multiword conversion insn; do it by hand. */
520 start_sequence ();
521
522 /* Since we will turn this into a no conflict block, we must ensure the
523 the source does not overlap the target so force it into an isolated
524 register when maybe so. Likewise for any MEM input, since the
525 conversion sequence might require several references to it and we
526 must ensure we're getting the same value every time. */
527
528 if (MEM_P (from) || reg_overlap_mentioned_p (to, from))
529 from = force_reg (from_mode, from);
530
531 /* Get a copy of FROM widened to a word, if necessary. */
532 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
533 lowpart_mode = word_mode;
534 else
535 lowpart_mode = from_mode;
536
537 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
538
539 lowpart = gen_lowpart (lowpart_mode, to);
540 emit_move_insn (lowpart, lowfrom);
541
542 /* Compute the value to put in each remaining word. */
543 if (unsignedp)
544 fill_value = const0_rtx;
545 else
546 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
547 LT, lowfrom, const0_rtx,
548 VOIDmode, 0, -1);
549
550 /* Fill the remaining words. */
551 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
552 {
553 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
554 rtx subword = operand_subword (to, index, 1, to_mode);
555
556 gcc_assert (subword);
557
558 if (fill_value != subword)
559 emit_move_insn (subword, fill_value);
560 }
561
562 insns = get_insns ();
563 end_sequence ();
564
565 emit_insn (insns);
566 return;
567 }
568
569 /* Truncating multi-word to a word or less. */
570 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
571 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
572 {
573 if (!((MEM_P (from)
574 && ! MEM_VOLATILE_P (from)
575 && direct_load[(int) to_mode]
576 && ! mode_dependent_address_p (XEXP (from, 0)))
577 || REG_P (from)
578 || GET_CODE (from) == SUBREG))
579 from = force_reg (from_mode, from);
580 convert_move (to, gen_lowpart (word_mode, from), 0);
581 return;
582 }
583
584 /* Now follow all the conversions between integers
585 no more than a word long. */
586
587 /* For truncation, usually we can just refer to FROM in a narrower mode. */
588 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
589 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
590 {
591 if (!((MEM_P (from)
592 && ! MEM_VOLATILE_P (from)
593 && direct_load[(int) to_mode]
594 && ! mode_dependent_address_p (XEXP (from, 0)))
595 || REG_P (from)
596 || GET_CODE (from) == SUBREG))
597 from = force_reg (from_mode, from);
598 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
599 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
600 from = copy_to_reg (from);
601 emit_move_insn (to, gen_lowpart (to_mode, from));
602 return;
603 }
604
605 /* Handle extension. */
606 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
607 {
608 /* Convert directly if that works. */
609 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
610 != CODE_FOR_nothing)
611 {
612 emit_unop_insn (code, to, from, equiv_code);
613 return;
614 }
615 else
616 {
617 enum machine_mode intermediate;
618 rtx tmp;
619 int shift_amount;
620
621 /* Search for a mode to convert via. */
622 for (intermediate = from_mode; intermediate != VOIDmode;
623 intermediate = GET_MODE_WIDER_MODE (intermediate))
624 if (((can_extend_p (to_mode, intermediate, unsignedp)
625 != CODE_FOR_nothing)
626 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
627 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
628 && (can_extend_p (intermediate, from_mode, unsignedp)
629 != CODE_FOR_nothing))
630 {
631 convert_move (to, convert_to_mode (intermediate, from,
632 unsignedp), unsignedp);
633 return;
634 }
635
636 /* No suitable intermediate mode.
637 Generate what we need with shifts. */
638 shift_amount = (GET_MODE_PRECISION (to_mode)
639 - GET_MODE_PRECISION (from_mode));
640 from = gen_lowpart (to_mode, force_reg (from_mode, from));
641 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
642 to, unsignedp);
643 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
644 to, unsignedp);
645 if (tmp != to)
646 emit_move_insn (to, tmp);
647 return;
648 }
649 }
650
651 /* Support special truncate insns for certain modes. */
652 if (convert_optab_handler (trunc_optab, to_mode,
653 from_mode) != CODE_FOR_nothing)
654 {
655 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
656 to, from, UNKNOWN);
657 return;
658 }
659
660 /* Handle truncation of volatile memrefs, and so on;
661 the things that couldn't be truncated directly,
662 and for which there was no special instruction.
663
664 ??? Code above formerly short-circuited this, for most integer
665 mode pairs, with a force_reg in from_mode followed by a recursive
666 call to this routine. Appears always to have been wrong. */
667 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
668 {
669 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
670 emit_move_insn (to, temp);
671 return;
672 }
673
674 /* Mode combination is not recognized. */
675 gcc_unreachable ();
676 }
677
678 /* Return an rtx for a value that would result
679 from converting X to mode MODE.
680 Both X and MODE may be floating, or both integer.
681 UNSIGNEDP is nonzero if X is an unsigned value.
682 This can be done by referring to a part of X in place
683 or by copying to a new temporary with conversion. */
684
685 rtx
686 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
687 {
688 return convert_modes (mode, VOIDmode, x, unsignedp);
689 }
690
691 /* Return an rtx for a value that would result
692 from converting X from mode OLDMODE to mode MODE.
693 Both modes may be floating, or both integer.
694 UNSIGNEDP is nonzero if X is an unsigned value.
695
696 This can be done by referring to a part of X in place
697 or by copying to a new temporary with conversion.
698
699 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
700
701 rtx
702 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
703 {
704 rtx temp;
705
706 /* If FROM is a SUBREG that indicates that we have already done at least
707 the required extension, strip it. */
708
709 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
710 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
711 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
712 x = gen_lowpart (mode, x);
713
714 if (GET_MODE (x) != VOIDmode)
715 oldmode = GET_MODE (x);
716
717 if (mode == oldmode)
718 return x;
719
720 /* There is one case that we must handle specially: If we are converting
721 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
722 we are to interpret the constant as unsigned, gen_lowpart will do
723 the wrong if the constant appears negative. What we want to do is
724 make the high-order word of the constant zero, not all ones. */
725
726 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
727 && GET_MODE_BITSIZE (mode) == HOST_BITS_PER_DOUBLE_INT
728 && CONST_INT_P (x) && INTVAL (x) < 0)
729 {
730 double_int val = uhwi_to_double_int (INTVAL (x));
731
732 /* We need to zero extend VAL. */
733 if (oldmode != VOIDmode)
734 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
735
736 return immed_double_int_const (val, mode);
737 }
738
739 /* We can do this with a gen_lowpart if both desired and current modes
740 are integer, and this is either a constant integer, a register, or a
741 non-volatile MEM. Except for the constant case where MODE is no
742 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
743
744 if ((CONST_INT_P (x)
745 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
746 || (GET_MODE_CLASS (mode) == MODE_INT
747 && GET_MODE_CLASS (oldmode) == MODE_INT
748 && (GET_CODE (x) == CONST_DOUBLE
749 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
750 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
751 && direct_load[(int) mode])
752 || (REG_P (x)
753 && (! HARD_REGISTER_P (x)
754 || HARD_REGNO_MODE_OK (REGNO (x), mode))
755 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
756 GET_MODE (x))))))))
757 {
758 /* ?? If we don't know OLDMODE, we have to assume here that
759 X does not need sign- or zero-extension. This may not be
760 the case, but it's the best we can do. */
761 if (CONST_INT_P (x) && oldmode != VOIDmode
762 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
763 {
764 HOST_WIDE_INT val = INTVAL (x);
765
766 /* We must sign or zero-extend in this case. Start by
767 zero-extending, then sign extend if we need to. */
768 val &= GET_MODE_MASK (oldmode);
769 if (! unsignedp
770 && val_signbit_known_set_p (oldmode, val))
771 val |= ~GET_MODE_MASK (oldmode);
772
773 return gen_int_mode (val, mode);
774 }
775
776 return gen_lowpart (mode, x);
777 }
778
779 /* Converting from integer constant into mode is always equivalent to an
780 subreg operation. */
781 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
782 {
783 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
784 return simplify_gen_subreg (mode, x, oldmode, 0);
785 }
786
787 temp = gen_reg_rtx (mode);
788 convert_move (temp, x, unsignedp);
789 return temp;
790 }
791 \f
792 /* Return the largest alignment we can use for doing a move (or store)
793 of MAX_PIECES. ALIGN is the largest alignment we could use. */
794
795 static unsigned int
796 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
797 {
798 enum machine_mode tmode;
799
800 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
801 if (align >= GET_MODE_ALIGNMENT (tmode))
802 align = GET_MODE_ALIGNMENT (tmode);
803 else
804 {
805 enum machine_mode tmode, xmode;
806
807 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
808 tmode != VOIDmode;
809 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
810 if (GET_MODE_SIZE (tmode) > max_pieces
811 || SLOW_UNALIGNED_ACCESS (tmode, align))
812 break;
813
814 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
815 }
816
817 return align;
818 }
819
820 /* Return the widest integer mode no wider than SIZE. If no such mode
821 can be found, return VOIDmode. */
822
823 static enum machine_mode
824 widest_int_mode_for_size (unsigned int size)
825 {
826 enum machine_mode tmode, mode = VOIDmode;
827
828 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
829 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
830 if (GET_MODE_SIZE (tmode) < size)
831 mode = tmode;
832
833 return mode;
834 }
835
836 /* STORE_MAX_PIECES is the number of bytes at a time that we can
837 store efficiently. Due to internal GCC limitations, this is
838 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
839 for an immediate constant. */
840
841 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
842
843 /* Determine whether the LEN bytes can be moved by using several move
844 instructions. Return nonzero if a call to move_by_pieces should
845 succeed. */
846
847 int
848 can_move_by_pieces (unsigned HOST_WIDE_INT len,
849 unsigned int align ATTRIBUTE_UNUSED)
850 {
851 return MOVE_BY_PIECES_P (len, align);
852 }
853
854 /* Generate several move instructions to copy LEN bytes from block FROM to
855 block TO. (These are MEM rtx's with BLKmode).
856
857 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
858 used to push FROM to the stack.
859
860 ALIGN is maximum stack alignment we can assume.
861
862 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
863 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
864 stpcpy. */
865
866 rtx
867 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
868 unsigned int align, int endp)
869 {
870 struct move_by_pieces_d data;
871 enum machine_mode to_addr_mode;
872 enum machine_mode from_addr_mode = get_address_mode (from);
873 rtx to_addr, from_addr = XEXP (from, 0);
874 unsigned int max_size = MOVE_MAX_PIECES + 1;
875 enum insn_code icode;
876
877 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
878
879 data.offset = 0;
880 data.from_addr = from_addr;
881 if (to)
882 {
883 to_addr_mode = get_address_mode (to);
884 to_addr = XEXP (to, 0);
885 data.to = to;
886 data.autinc_to
887 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
888 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
889 data.reverse
890 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
891 }
892 else
893 {
894 to_addr_mode = VOIDmode;
895 to_addr = NULL_RTX;
896 data.to = NULL_RTX;
897 data.autinc_to = 1;
898 #ifdef STACK_GROWS_DOWNWARD
899 data.reverse = 1;
900 #else
901 data.reverse = 0;
902 #endif
903 }
904 data.to_addr = to_addr;
905 data.from = from;
906 data.autinc_from
907 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
908 || GET_CODE (from_addr) == POST_INC
909 || GET_CODE (from_addr) == POST_DEC);
910
911 data.explicit_inc_from = 0;
912 data.explicit_inc_to = 0;
913 if (data.reverse) data.offset = len;
914 data.len = len;
915
916 /* If copying requires more than two move insns,
917 copy addresses to registers (to make displacements shorter)
918 and use post-increment if available. */
919 if (!(data.autinc_from && data.autinc_to)
920 && move_by_pieces_ninsns (len, align, max_size) > 2)
921 {
922 /* Find the mode of the largest move...
923 MODE might not be used depending on the definitions of the
924 USE_* macros below. */
925 enum machine_mode mode ATTRIBUTE_UNUSED
926 = widest_int_mode_for_size (max_size);
927
928 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
929 {
930 data.from_addr = copy_to_mode_reg (from_addr_mode,
931 plus_constant (from_addr_mode,
932 from_addr, len));
933 data.autinc_from = 1;
934 data.explicit_inc_from = -1;
935 }
936 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
937 {
938 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
939 data.autinc_from = 1;
940 data.explicit_inc_from = 1;
941 }
942 if (!data.autinc_from && CONSTANT_P (from_addr))
943 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
944 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
945 {
946 data.to_addr = copy_to_mode_reg (to_addr_mode,
947 plus_constant (to_addr_mode,
948 to_addr, len));
949 data.autinc_to = 1;
950 data.explicit_inc_to = -1;
951 }
952 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
953 {
954 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
955 data.autinc_to = 1;
956 data.explicit_inc_to = 1;
957 }
958 if (!data.autinc_to && CONSTANT_P (to_addr))
959 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
960 }
961
962 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
963
964 /* First move what we can in the largest integer mode, then go to
965 successively smaller modes. */
966
967 while (max_size > 1)
968 {
969 enum machine_mode mode = widest_int_mode_for_size (max_size);
970
971 if (mode == VOIDmode)
972 break;
973
974 icode = optab_handler (mov_optab, mode);
975 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
976 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
977
978 max_size = GET_MODE_SIZE (mode);
979 }
980
981 /* The code above should have handled everything. */
982 gcc_assert (!data.len);
983
984 if (endp)
985 {
986 rtx to1;
987
988 gcc_assert (!data.reverse);
989 if (data.autinc_to)
990 {
991 if (endp == 2)
992 {
993 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
994 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
995 else
996 data.to_addr = copy_to_mode_reg (to_addr_mode,
997 plus_constant (to_addr_mode,
998 data.to_addr,
999 -1));
1000 }
1001 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
1002 data.offset);
1003 }
1004 else
1005 {
1006 if (endp == 2)
1007 --data.offset;
1008 to1 = adjust_address (data.to, QImode, data.offset);
1009 }
1010 return to1;
1011 }
1012 else
1013 return data.to;
1014 }
1015
1016 /* Return number of insns required to move L bytes by pieces.
1017 ALIGN (in bits) is maximum alignment we can assume. */
1018
1019 unsigned HOST_WIDE_INT
1020 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1021 unsigned int max_size)
1022 {
1023 unsigned HOST_WIDE_INT n_insns = 0;
1024
1025 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1026
1027 while (max_size > 1)
1028 {
1029 enum machine_mode mode;
1030 enum insn_code icode;
1031
1032 mode = widest_int_mode_for_size (max_size);
1033
1034 if (mode == VOIDmode)
1035 break;
1036
1037 icode = optab_handler (mov_optab, mode);
1038 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1039 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1040
1041 max_size = GET_MODE_SIZE (mode);
1042 }
1043
1044 gcc_assert (!l);
1045 return n_insns;
1046 }
1047
1048 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1049 with move instructions for mode MODE. GENFUN is the gen_... function
1050 to make a move insn for that mode. DATA has all the other info. */
1051
1052 static void
1053 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1054 struct move_by_pieces_d *data)
1055 {
1056 unsigned int size = GET_MODE_SIZE (mode);
1057 rtx to1 = NULL_RTX, from1;
1058
1059 while (data->len >= size)
1060 {
1061 if (data->reverse)
1062 data->offset -= size;
1063
1064 if (data->to)
1065 {
1066 if (data->autinc_to)
1067 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1068 data->offset);
1069 else
1070 to1 = adjust_address (data->to, mode, data->offset);
1071 }
1072
1073 if (data->autinc_from)
1074 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1075 data->offset);
1076 else
1077 from1 = adjust_address (data->from, mode, data->offset);
1078
1079 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1080 emit_insn (gen_add2_insn (data->to_addr,
1081 GEN_INT (-(HOST_WIDE_INT)size)));
1082 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1083 emit_insn (gen_add2_insn (data->from_addr,
1084 GEN_INT (-(HOST_WIDE_INT)size)));
1085
1086 if (data->to)
1087 emit_insn ((*genfun) (to1, from1));
1088 else
1089 {
1090 #ifdef PUSH_ROUNDING
1091 emit_single_push_insn (mode, from1, NULL);
1092 #else
1093 gcc_unreachable ();
1094 #endif
1095 }
1096
1097 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1098 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1099 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1100 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1101
1102 if (! data->reverse)
1103 data->offset += size;
1104
1105 data->len -= size;
1106 }
1107 }
1108 \f
1109 /* Emit code to move a block Y to a block X. This may be done with
1110 string-move instructions, with multiple scalar move instructions,
1111 or with a library call.
1112
1113 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1114 SIZE is an rtx that says how long they are.
1115 ALIGN is the maximum alignment we can assume they have.
1116 METHOD describes what kind of copy this is, and what mechanisms may be used.
1117
1118 Return the address of the new block, if memcpy is called and returns it,
1119 0 otherwise. */
1120
1121 rtx
1122 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1123 unsigned int expected_align, HOST_WIDE_INT expected_size)
1124 {
1125 bool may_use_call;
1126 rtx retval = 0;
1127 unsigned int align;
1128
1129 gcc_assert (size);
1130 if (CONST_INT_P (size)
1131 && INTVAL (size) == 0)
1132 return 0;
1133
1134 switch (method)
1135 {
1136 case BLOCK_OP_NORMAL:
1137 case BLOCK_OP_TAILCALL:
1138 may_use_call = true;
1139 break;
1140
1141 case BLOCK_OP_CALL_PARM:
1142 may_use_call = block_move_libcall_safe_for_call_parm ();
1143
1144 /* Make inhibit_defer_pop nonzero around the library call
1145 to force it to pop the arguments right away. */
1146 NO_DEFER_POP;
1147 break;
1148
1149 case BLOCK_OP_NO_LIBCALL:
1150 may_use_call = false;
1151 break;
1152
1153 default:
1154 gcc_unreachable ();
1155 }
1156
1157 gcc_assert (MEM_P (x) && MEM_P (y));
1158 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1159 gcc_assert (align >= BITS_PER_UNIT);
1160
1161 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1162 block copy is more efficient for other large modes, e.g. DCmode. */
1163 x = adjust_address (x, BLKmode, 0);
1164 y = adjust_address (y, BLKmode, 0);
1165
1166 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1167 can be incorrect is coming from __builtin_memcpy. */
1168 if (CONST_INT_P (size))
1169 {
1170 x = shallow_copy_rtx (x);
1171 y = shallow_copy_rtx (y);
1172 set_mem_size (x, INTVAL (size));
1173 set_mem_size (y, INTVAL (size));
1174 }
1175
1176 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1177 move_by_pieces (x, y, INTVAL (size), align, 0);
1178 else if (emit_block_move_via_movmem (x, y, size, align,
1179 expected_align, expected_size))
1180 ;
1181 else if (may_use_call
1182 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1183 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1184 {
1185 /* Since x and y are passed to a libcall, mark the corresponding
1186 tree EXPR as addressable. */
1187 tree y_expr = MEM_EXPR (y);
1188 tree x_expr = MEM_EXPR (x);
1189 if (y_expr)
1190 mark_addressable (y_expr);
1191 if (x_expr)
1192 mark_addressable (x_expr);
1193 retval = emit_block_move_via_libcall (x, y, size,
1194 method == BLOCK_OP_TAILCALL);
1195 }
1196
1197 else
1198 emit_block_move_via_loop (x, y, size, align);
1199
1200 if (method == BLOCK_OP_CALL_PARM)
1201 OK_DEFER_POP;
1202
1203 return retval;
1204 }
1205
1206 rtx
1207 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1208 {
1209 return emit_block_move_hints (x, y, size, method, 0, -1);
1210 }
1211
1212 /* A subroutine of emit_block_move. Returns true if calling the
1213 block move libcall will not clobber any parameters which may have
1214 already been placed on the stack. */
1215
1216 static bool
1217 block_move_libcall_safe_for_call_parm (void)
1218 {
1219 #if defined (REG_PARM_STACK_SPACE)
1220 tree fn;
1221 #endif
1222
1223 /* If arguments are pushed on the stack, then they're safe. */
1224 if (PUSH_ARGS)
1225 return true;
1226
1227 /* If registers go on the stack anyway, any argument is sure to clobber
1228 an outgoing argument. */
1229 #if defined (REG_PARM_STACK_SPACE)
1230 fn = emit_block_move_libcall_fn (false);
1231 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1232 depend on its argument. */
1233 (void) fn;
1234 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1235 && REG_PARM_STACK_SPACE (fn) != 0)
1236 return false;
1237 #endif
1238
1239 /* If any argument goes in memory, then it might clobber an outgoing
1240 argument. */
1241 {
1242 CUMULATIVE_ARGS args_so_far_v;
1243 cumulative_args_t args_so_far;
1244 tree fn, arg;
1245
1246 fn = emit_block_move_libcall_fn (false);
1247 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1248 args_so_far = pack_cumulative_args (&args_so_far_v);
1249
1250 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1251 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1252 {
1253 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1254 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1255 NULL_TREE, true);
1256 if (!tmp || !REG_P (tmp))
1257 return false;
1258 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1259 return false;
1260 targetm.calls.function_arg_advance (args_so_far, mode,
1261 NULL_TREE, true);
1262 }
1263 }
1264 return true;
1265 }
1266
1267 /* A subroutine of emit_block_move. Expand a movmem pattern;
1268 return true if successful. */
1269
1270 static bool
1271 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1272 unsigned int expected_align, HOST_WIDE_INT expected_size)
1273 {
1274 int save_volatile_ok = volatile_ok;
1275 enum machine_mode mode;
1276
1277 if (expected_align < align)
1278 expected_align = align;
1279
1280 /* Since this is a move insn, we don't care about volatility. */
1281 volatile_ok = 1;
1282
1283 /* Try the most limited insn first, because there's no point
1284 including more than one in the machine description unless
1285 the more limited one has some advantage. */
1286
1287 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1288 mode = GET_MODE_WIDER_MODE (mode))
1289 {
1290 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1291
1292 if (code != CODE_FOR_nothing
1293 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1294 here because if SIZE is less than the mode mask, as it is
1295 returned by the macro, it will definitely be less than the
1296 actual mode mask. */
1297 && ((CONST_INT_P (size)
1298 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1299 <= (GET_MODE_MASK (mode) >> 1)))
1300 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1301 {
1302 struct expand_operand ops[6];
1303 unsigned int nops;
1304
1305 /* ??? When called via emit_block_move_for_call, it'd be
1306 nice if there were some way to inform the backend, so
1307 that it doesn't fail the expansion because it thinks
1308 emitting the libcall would be more efficient. */
1309 nops = insn_data[(int) code].n_generator_args;
1310 gcc_assert (nops == 4 || nops == 6);
1311
1312 create_fixed_operand (&ops[0], x);
1313 create_fixed_operand (&ops[1], y);
1314 /* The check above guarantees that this size conversion is valid. */
1315 create_convert_operand_to (&ops[2], size, mode, true);
1316 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1317 if (nops == 6)
1318 {
1319 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1320 create_integer_operand (&ops[5], expected_size);
1321 }
1322 if (maybe_expand_insn (code, nops, ops))
1323 {
1324 volatile_ok = save_volatile_ok;
1325 return true;
1326 }
1327 }
1328 }
1329
1330 volatile_ok = save_volatile_ok;
1331 return false;
1332 }
1333
1334 /* A subroutine of emit_block_move. Expand a call to memcpy.
1335 Return the return value from memcpy, 0 otherwise. */
1336
1337 rtx
1338 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1339 {
1340 rtx dst_addr, src_addr;
1341 tree call_expr, fn, src_tree, dst_tree, size_tree;
1342 enum machine_mode size_mode;
1343 rtx retval;
1344
1345 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1346 pseudos. We can then place those new pseudos into a VAR_DECL and
1347 use them later. */
1348
1349 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1350 src_addr = copy_addr_to_reg (XEXP (src, 0));
1351
1352 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1353 src_addr = convert_memory_address (ptr_mode, src_addr);
1354
1355 dst_tree = make_tree (ptr_type_node, dst_addr);
1356 src_tree = make_tree (ptr_type_node, src_addr);
1357
1358 size_mode = TYPE_MODE (sizetype);
1359
1360 size = convert_to_mode (size_mode, size, 1);
1361 size = copy_to_mode_reg (size_mode, size);
1362
1363 /* It is incorrect to use the libcall calling conventions to call
1364 memcpy in this context. This could be a user call to memcpy and
1365 the user may wish to examine the return value from memcpy. For
1366 targets where libcalls and normal calls have different conventions
1367 for returning pointers, we could end up generating incorrect code. */
1368
1369 size_tree = make_tree (sizetype, size);
1370
1371 fn = emit_block_move_libcall_fn (true);
1372 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1373 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1374
1375 retval = expand_normal (call_expr);
1376
1377 return retval;
1378 }
1379
1380 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1381 for the function we use for block copies. */
1382
1383 static GTY(()) tree block_move_fn;
1384
1385 void
1386 init_block_move_fn (const char *asmspec)
1387 {
1388 if (!block_move_fn)
1389 {
1390 tree args, fn, attrs, attr_args;
1391
1392 fn = get_identifier ("memcpy");
1393 args = build_function_type_list (ptr_type_node, ptr_type_node,
1394 const_ptr_type_node, sizetype,
1395 NULL_TREE);
1396
1397 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1398 DECL_EXTERNAL (fn) = 1;
1399 TREE_PUBLIC (fn) = 1;
1400 DECL_ARTIFICIAL (fn) = 1;
1401 TREE_NOTHROW (fn) = 1;
1402 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1403 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1404
1405 attr_args = build_tree_list (NULL_TREE, build_string (1, "1"));
1406 attrs = tree_cons (get_identifier ("fn spec"), attr_args, NULL);
1407
1408 decl_attributes (&fn, attrs, ATTR_FLAG_BUILT_IN);
1409
1410 block_move_fn = fn;
1411 }
1412
1413 if (asmspec)
1414 set_user_assembler_name (block_move_fn, asmspec);
1415 }
1416
1417 static tree
1418 emit_block_move_libcall_fn (int for_call)
1419 {
1420 static bool emitted_extern;
1421
1422 if (!block_move_fn)
1423 init_block_move_fn (NULL);
1424
1425 if (for_call && !emitted_extern)
1426 {
1427 emitted_extern = true;
1428 make_decl_rtl (block_move_fn);
1429 }
1430
1431 return block_move_fn;
1432 }
1433
1434 /* A subroutine of emit_block_move. Copy the data via an explicit
1435 loop. This is used only when libcalls are forbidden. */
1436 /* ??? It'd be nice to copy in hunks larger than QImode. */
1437
1438 static void
1439 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1440 unsigned int align ATTRIBUTE_UNUSED)
1441 {
1442 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1443 enum machine_mode x_addr_mode = get_address_mode (x);
1444 enum machine_mode y_addr_mode = get_address_mode (y);
1445 enum machine_mode iter_mode;
1446
1447 iter_mode = GET_MODE (size);
1448 if (iter_mode == VOIDmode)
1449 iter_mode = word_mode;
1450
1451 top_label = gen_label_rtx ();
1452 cmp_label = gen_label_rtx ();
1453 iter = gen_reg_rtx (iter_mode);
1454
1455 emit_move_insn (iter, const0_rtx);
1456
1457 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1458 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1459 do_pending_stack_adjust ();
1460
1461 emit_jump (cmp_label);
1462 emit_label (top_label);
1463
1464 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1465 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1466
1467 if (x_addr_mode != y_addr_mode)
1468 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1469 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1470
1471 x = change_address (x, QImode, x_addr);
1472 y = change_address (y, QImode, y_addr);
1473
1474 emit_move_insn (x, y);
1475
1476 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1477 true, OPTAB_LIB_WIDEN);
1478 if (tmp != iter)
1479 emit_move_insn (iter, tmp);
1480
1481 emit_label (cmp_label);
1482
1483 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1484 true, top_label);
1485 }
1486 \f
1487 /* Copy all or part of a value X into registers starting at REGNO.
1488 The number of registers to be filled is NREGS. */
1489
1490 void
1491 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1492 {
1493 int i;
1494 #ifdef HAVE_load_multiple
1495 rtx pat;
1496 rtx last;
1497 #endif
1498
1499 if (nregs == 0)
1500 return;
1501
1502 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1503 x = validize_mem (force_const_mem (mode, x));
1504
1505 /* See if the machine can do this with a load multiple insn. */
1506 #ifdef HAVE_load_multiple
1507 if (HAVE_load_multiple)
1508 {
1509 last = get_last_insn ();
1510 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1511 GEN_INT (nregs));
1512 if (pat)
1513 {
1514 emit_insn (pat);
1515 return;
1516 }
1517 else
1518 delete_insns_since (last);
1519 }
1520 #endif
1521
1522 for (i = 0; i < nregs; i++)
1523 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1524 operand_subword_force (x, i, mode));
1525 }
1526
1527 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1528 The number of registers to be filled is NREGS. */
1529
1530 void
1531 move_block_from_reg (int regno, rtx x, int nregs)
1532 {
1533 int i;
1534
1535 if (nregs == 0)
1536 return;
1537
1538 /* See if the machine can do this with a store multiple insn. */
1539 #ifdef HAVE_store_multiple
1540 if (HAVE_store_multiple)
1541 {
1542 rtx last = get_last_insn ();
1543 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1544 GEN_INT (nregs));
1545 if (pat)
1546 {
1547 emit_insn (pat);
1548 return;
1549 }
1550 else
1551 delete_insns_since (last);
1552 }
1553 #endif
1554
1555 for (i = 0; i < nregs; i++)
1556 {
1557 rtx tem = operand_subword (x, i, 1, BLKmode);
1558
1559 gcc_assert (tem);
1560
1561 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1562 }
1563 }
1564
1565 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1566 ORIG, where ORIG is a non-consecutive group of registers represented by
1567 a PARALLEL. The clone is identical to the original except in that the
1568 original set of registers is replaced by a new set of pseudo registers.
1569 The new set has the same modes as the original set. */
1570
1571 rtx
1572 gen_group_rtx (rtx orig)
1573 {
1574 int i, length;
1575 rtx *tmps;
1576
1577 gcc_assert (GET_CODE (orig) == PARALLEL);
1578
1579 length = XVECLEN (orig, 0);
1580 tmps = XALLOCAVEC (rtx, length);
1581
1582 /* Skip a NULL entry in first slot. */
1583 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1584
1585 if (i)
1586 tmps[0] = 0;
1587
1588 for (; i < length; i++)
1589 {
1590 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1591 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1592
1593 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1594 }
1595
1596 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1597 }
1598
1599 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1600 except that values are placed in TMPS[i], and must later be moved
1601 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1602
1603 static void
1604 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1605 {
1606 rtx src;
1607 int start, i;
1608 enum machine_mode m = GET_MODE (orig_src);
1609
1610 gcc_assert (GET_CODE (dst) == PARALLEL);
1611
1612 if (m != VOIDmode
1613 && !SCALAR_INT_MODE_P (m)
1614 && !MEM_P (orig_src)
1615 && GET_CODE (orig_src) != CONCAT)
1616 {
1617 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1618 if (imode == BLKmode)
1619 src = assign_stack_temp (GET_MODE (orig_src), ssize);
1620 else
1621 src = gen_reg_rtx (imode);
1622 if (imode != BLKmode)
1623 src = gen_lowpart (GET_MODE (orig_src), src);
1624 emit_move_insn (src, orig_src);
1625 /* ...and back again. */
1626 if (imode != BLKmode)
1627 src = gen_lowpart (imode, src);
1628 emit_group_load_1 (tmps, dst, src, type, ssize);
1629 return;
1630 }
1631
1632 /* Check for a NULL entry, used to indicate that the parameter goes
1633 both on the stack and in registers. */
1634 if (XEXP (XVECEXP (dst, 0, 0), 0))
1635 start = 0;
1636 else
1637 start = 1;
1638
1639 /* Process the pieces. */
1640 for (i = start; i < XVECLEN (dst, 0); i++)
1641 {
1642 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1643 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1644 unsigned int bytelen = GET_MODE_SIZE (mode);
1645 int shift = 0;
1646
1647 /* Handle trailing fragments that run over the size of the struct. */
1648 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1649 {
1650 /* Arrange to shift the fragment to where it belongs.
1651 extract_bit_field loads to the lsb of the reg. */
1652 if (
1653 #ifdef BLOCK_REG_PADDING
1654 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1655 == (BYTES_BIG_ENDIAN ? upward : downward)
1656 #else
1657 BYTES_BIG_ENDIAN
1658 #endif
1659 )
1660 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1661 bytelen = ssize - bytepos;
1662 gcc_assert (bytelen > 0);
1663 }
1664
1665 /* If we won't be loading directly from memory, protect the real source
1666 from strange tricks we might play; but make sure that the source can
1667 be loaded directly into the destination. */
1668 src = orig_src;
1669 if (!MEM_P (orig_src)
1670 && (!CONSTANT_P (orig_src)
1671 || (GET_MODE (orig_src) != mode
1672 && GET_MODE (orig_src) != VOIDmode)))
1673 {
1674 if (GET_MODE (orig_src) == VOIDmode)
1675 src = gen_reg_rtx (mode);
1676 else
1677 src = gen_reg_rtx (GET_MODE (orig_src));
1678
1679 emit_move_insn (src, orig_src);
1680 }
1681
1682 /* Optimize the access just a bit. */
1683 if (MEM_P (src)
1684 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1685 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1686 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1687 && bytelen == GET_MODE_SIZE (mode))
1688 {
1689 tmps[i] = gen_reg_rtx (mode);
1690 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1691 }
1692 else if (COMPLEX_MODE_P (mode)
1693 && GET_MODE (src) == mode
1694 && bytelen == GET_MODE_SIZE (mode))
1695 /* Let emit_move_complex do the bulk of the work. */
1696 tmps[i] = src;
1697 else if (GET_CODE (src) == CONCAT)
1698 {
1699 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1700 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1701
1702 if ((bytepos == 0 && bytelen == slen0)
1703 || (bytepos != 0 && bytepos + bytelen <= slen))
1704 {
1705 /* The following assumes that the concatenated objects all
1706 have the same size. In this case, a simple calculation
1707 can be used to determine the object and the bit field
1708 to be extracted. */
1709 tmps[i] = XEXP (src, bytepos / slen0);
1710 if (! CONSTANT_P (tmps[i])
1711 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1712 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1713 (bytepos % slen0) * BITS_PER_UNIT,
1714 1, false, NULL_RTX, mode, mode);
1715 }
1716 else
1717 {
1718 rtx mem;
1719
1720 gcc_assert (!bytepos);
1721 mem = assign_stack_temp (GET_MODE (src), slen);
1722 emit_move_insn (mem, src);
1723 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1724 0, 1, false, NULL_RTX, mode, mode);
1725 }
1726 }
1727 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1728 SIMD register, which is currently broken. While we get GCC
1729 to emit proper RTL for these cases, let's dump to memory. */
1730 else if (VECTOR_MODE_P (GET_MODE (dst))
1731 && REG_P (src))
1732 {
1733 int slen = GET_MODE_SIZE (GET_MODE (src));
1734 rtx mem;
1735
1736 mem = assign_stack_temp (GET_MODE (src), slen);
1737 emit_move_insn (mem, src);
1738 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1739 }
1740 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1741 && XVECLEN (dst, 0) > 1)
1742 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1743 else if (CONSTANT_P (src))
1744 {
1745 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1746
1747 if (len == ssize)
1748 tmps[i] = src;
1749 else
1750 {
1751 rtx first, second;
1752
1753 gcc_assert (2 * len == ssize);
1754 split_double (src, &first, &second);
1755 if (i)
1756 tmps[i] = second;
1757 else
1758 tmps[i] = first;
1759 }
1760 }
1761 else if (REG_P (src) && GET_MODE (src) == mode)
1762 tmps[i] = src;
1763 else
1764 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1765 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1766 mode, mode);
1767
1768 if (shift)
1769 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1770 shift, tmps[i], 0);
1771 }
1772 }
1773
1774 /* Emit code to move a block SRC of type TYPE to a block DST,
1775 where DST is non-consecutive registers represented by a PARALLEL.
1776 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1777 if not known. */
1778
1779 void
1780 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1781 {
1782 rtx *tmps;
1783 int i;
1784
1785 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1786 emit_group_load_1 (tmps, dst, src, type, ssize);
1787
1788 /* Copy the extracted pieces into the proper (probable) hard regs. */
1789 for (i = 0; i < XVECLEN (dst, 0); i++)
1790 {
1791 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1792 if (d == NULL)
1793 continue;
1794 emit_move_insn (d, tmps[i]);
1795 }
1796 }
1797
1798 /* Similar, but load SRC into new pseudos in a format that looks like
1799 PARALLEL. This can later be fed to emit_group_move to get things
1800 in the right place. */
1801
1802 rtx
1803 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1804 {
1805 rtvec vec;
1806 int i;
1807
1808 vec = rtvec_alloc (XVECLEN (parallel, 0));
1809 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1810
1811 /* Convert the vector to look just like the original PARALLEL, except
1812 with the computed values. */
1813 for (i = 0; i < XVECLEN (parallel, 0); i++)
1814 {
1815 rtx e = XVECEXP (parallel, 0, i);
1816 rtx d = XEXP (e, 0);
1817
1818 if (d)
1819 {
1820 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1821 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1822 }
1823 RTVEC_ELT (vec, i) = e;
1824 }
1825
1826 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1827 }
1828
1829 /* Emit code to move a block SRC to block DST, where SRC and DST are
1830 non-consecutive groups of registers, each represented by a PARALLEL. */
1831
1832 void
1833 emit_group_move (rtx dst, rtx src)
1834 {
1835 int i;
1836
1837 gcc_assert (GET_CODE (src) == PARALLEL
1838 && GET_CODE (dst) == PARALLEL
1839 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1840
1841 /* Skip first entry if NULL. */
1842 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1843 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1844 XEXP (XVECEXP (src, 0, i), 0));
1845 }
1846
1847 /* Move a group of registers represented by a PARALLEL into pseudos. */
1848
1849 rtx
1850 emit_group_move_into_temps (rtx src)
1851 {
1852 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1853 int i;
1854
1855 for (i = 0; i < XVECLEN (src, 0); i++)
1856 {
1857 rtx e = XVECEXP (src, 0, i);
1858 rtx d = XEXP (e, 0);
1859
1860 if (d)
1861 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1862 RTVEC_ELT (vec, i) = e;
1863 }
1864
1865 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1866 }
1867
1868 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1869 where SRC is non-consecutive registers represented by a PARALLEL.
1870 SSIZE represents the total size of block ORIG_DST, or -1 if not
1871 known. */
1872
1873 void
1874 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1875 {
1876 rtx *tmps, dst;
1877 int start, finish, i;
1878 enum machine_mode m = GET_MODE (orig_dst);
1879
1880 gcc_assert (GET_CODE (src) == PARALLEL);
1881
1882 if (!SCALAR_INT_MODE_P (m)
1883 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1884 {
1885 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1886 if (imode == BLKmode)
1887 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
1888 else
1889 dst = gen_reg_rtx (imode);
1890 emit_group_store (dst, src, type, ssize);
1891 if (imode != BLKmode)
1892 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1893 emit_move_insn (orig_dst, dst);
1894 return;
1895 }
1896
1897 /* Check for a NULL entry, used to indicate that the parameter goes
1898 both on the stack and in registers. */
1899 if (XEXP (XVECEXP (src, 0, 0), 0))
1900 start = 0;
1901 else
1902 start = 1;
1903 finish = XVECLEN (src, 0);
1904
1905 tmps = XALLOCAVEC (rtx, finish);
1906
1907 /* Copy the (probable) hard regs into pseudos. */
1908 for (i = start; i < finish; i++)
1909 {
1910 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1911 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1912 {
1913 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1914 emit_move_insn (tmps[i], reg);
1915 }
1916 else
1917 tmps[i] = reg;
1918 }
1919
1920 /* If we won't be storing directly into memory, protect the real destination
1921 from strange tricks we might play. */
1922 dst = orig_dst;
1923 if (GET_CODE (dst) == PARALLEL)
1924 {
1925 rtx temp;
1926
1927 /* We can get a PARALLEL dst if there is a conditional expression in
1928 a return statement. In that case, the dst and src are the same,
1929 so no action is necessary. */
1930 if (rtx_equal_p (dst, src))
1931 return;
1932
1933 /* It is unclear if we can ever reach here, but we may as well handle
1934 it. Allocate a temporary, and split this into a store/load to/from
1935 the temporary. */
1936
1937 temp = assign_stack_temp (GET_MODE (dst), ssize);
1938 emit_group_store (temp, src, type, ssize);
1939 emit_group_load (dst, temp, type, ssize);
1940 return;
1941 }
1942 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1943 {
1944 enum machine_mode outer = GET_MODE (dst);
1945 enum machine_mode inner;
1946 HOST_WIDE_INT bytepos;
1947 bool done = false;
1948 rtx temp;
1949
1950 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1951 dst = gen_reg_rtx (outer);
1952
1953 /* Make life a bit easier for combine. */
1954 /* If the first element of the vector is the low part
1955 of the destination mode, use a paradoxical subreg to
1956 initialize the destination. */
1957 if (start < finish)
1958 {
1959 inner = GET_MODE (tmps[start]);
1960 bytepos = subreg_lowpart_offset (inner, outer);
1961 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1962 {
1963 temp = simplify_gen_subreg (outer, tmps[start],
1964 inner, 0);
1965 if (temp)
1966 {
1967 emit_move_insn (dst, temp);
1968 done = true;
1969 start++;
1970 }
1971 }
1972 }
1973
1974 /* If the first element wasn't the low part, try the last. */
1975 if (!done
1976 && start < finish - 1)
1977 {
1978 inner = GET_MODE (tmps[finish - 1]);
1979 bytepos = subreg_lowpart_offset (inner, outer);
1980 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1981 {
1982 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1983 inner, 0);
1984 if (temp)
1985 {
1986 emit_move_insn (dst, temp);
1987 done = true;
1988 finish--;
1989 }
1990 }
1991 }
1992
1993 /* Otherwise, simply initialize the result to zero. */
1994 if (!done)
1995 emit_move_insn (dst, CONST0_RTX (outer));
1996 }
1997
1998 /* Process the pieces. */
1999 for (i = start; i < finish; i++)
2000 {
2001 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2002 enum machine_mode mode = GET_MODE (tmps[i]);
2003 unsigned int bytelen = GET_MODE_SIZE (mode);
2004 unsigned int adj_bytelen = bytelen;
2005 rtx dest = dst;
2006
2007 /* Handle trailing fragments that run over the size of the struct. */
2008 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2009 adj_bytelen = ssize - bytepos;
2010
2011 if (GET_CODE (dst) == CONCAT)
2012 {
2013 if (bytepos + adj_bytelen
2014 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2015 dest = XEXP (dst, 0);
2016 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2017 {
2018 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2019 dest = XEXP (dst, 1);
2020 }
2021 else
2022 {
2023 enum machine_mode dest_mode = GET_MODE (dest);
2024 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2025
2026 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2027
2028 if (GET_MODE_ALIGNMENT (dest_mode)
2029 >= GET_MODE_ALIGNMENT (tmp_mode))
2030 {
2031 dest = assign_stack_temp (dest_mode,
2032 GET_MODE_SIZE (dest_mode));
2033 emit_move_insn (adjust_address (dest,
2034 tmp_mode,
2035 bytepos),
2036 tmps[i]);
2037 dst = dest;
2038 }
2039 else
2040 {
2041 dest = assign_stack_temp (tmp_mode,
2042 GET_MODE_SIZE (tmp_mode));
2043 emit_move_insn (dest, tmps[i]);
2044 dst = adjust_address (dest, dest_mode, bytepos);
2045 }
2046 break;
2047 }
2048 }
2049
2050 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2051 {
2052 /* store_bit_field always takes its value from the lsb.
2053 Move the fragment to the lsb if it's not already there. */
2054 if (
2055 #ifdef BLOCK_REG_PADDING
2056 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2057 == (BYTES_BIG_ENDIAN ? upward : downward)
2058 #else
2059 BYTES_BIG_ENDIAN
2060 #endif
2061 )
2062 {
2063 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2064 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2065 shift, tmps[i], 0);
2066 }
2067 bytelen = adj_bytelen;
2068 }
2069
2070 /* Optimize the access just a bit. */
2071 if (MEM_P (dest)
2072 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2073 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2074 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2075 && bytelen == GET_MODE_SIZE (mode))
2076 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2077 else
2078 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2079 0, 0, mode, tmps[i]);
2080 }
2081
2082 /* Copy from the pseudo into the (probable) hard reg. */
2083 if (orig_dst != dst)
2084 emit_move_insn (orig_dst, dst);
2085 }
2086
2087 /* Generate code to copy a BLKmode object of TYPE out of a
2088 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2089 is null, a stack temporary is created. TGTBLK is returned.
2090
2091 The purpose of this routine is to handle functions that return
2092 BLKmode structures in registers. Some machines (the PA for example)
2093 want to return all small structures in registers regardless of the
2094 structure's alignment. */
2095
2096 rtx
2097 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2098 {
2099 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2100 rtx src = NULL, dst = NULL;
2101 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2102 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2103 enum machine_mode copy_mode;
2104
2105 if (tgtblk == 0)
2106 {
2107 tgtblk = assign_temp (build_qualified_type (type,
2108 (TYPE_QUALS (type)
2109 | TYPE_QUAL_CONST)),
2110 1, 1);
2111 preserve_temp_slots (tgtblk);
2112 }
2113
2114 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2115 into a new pseudo which is a full word. */
2116
2117 if (GET_MODE (srcreg) != BLKmode
2118 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2119 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2120
2121 /* If the structure doesn't take up a whole number of words, see whether
2122 SRCREG is padded on the left or on the right. If it's on the left,
2123 set PADDING_CORRECTION to the number of bits to skip.
2124
2125 In most ABIs, the structure will be returned at the least end of
2126 the register, which translates to right padding on little-endian
2127 targets and left padding on big-endian targets. The opposite
2128 holds if the structure is returned at the most significant
2129 end of the register. */
2130 if (bytes % UNITS_PER_WORD != 0
2131 && (targetm.calls.return_in_msb (type)
2132 ? !BYTES_BIG_ENDIAN
2133 : BYTES_BIG_ENDIAN))
2134 padding_correction
2135 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2136
2137 /* Copy the structure BITSIZE bits at a time. If the target lives in
2138 memory, take care of not reading/writing past its end by selecting
2139 a copy mode suited to BITSIZE. This should always be possible given
2140 how it is computed.
2141
2142 We could probably emit more efficient code for machines which do not use
2143 strict alignment, but it doesn't seem worth the effort at the current
2144 time. */
2145
2146 copy_mode = word_mode;
2147 if (MEM_P (tgtblk))
2148 {
2149 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2150 if (mem_mode != BLKmode)
2151 copy_mode = mem_mode;
2152 }
2153
2154 for (bitpos = 0, xbitpos = padding_correction;
2155 bitpos < bytes * BITS_PER_UNIT;
2156 bitpos += bitsize, xbitpos += bitsize)
2157 {
2158 /* We need a new source operand each time xbitpos is on a
2159 word boundary and when xbitpos == padding_correction
2160 (the first time through). */
2161 if (xbitpos % BITS_PER_WORD == 0
2162 || xbitpos == padding_correction)
2163 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2164 GET_MODE (srcreg));
2165
2166 /* We need a new destination operand each time bitpos is on
2167 a word boundary. */
2168 if (bitpos % BITS_PER_WORD == 0)
2169 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2170
2171 /* Use xbitpos for the source extraction (right justified) and
2172 bitpos for the destination store (left justified). */
2173 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2174 extract_bit_field (src, bitsize,
2175 xbitpos % BITS_PER_WORD, 1, false,
2176 NULL_RTX, copy_mode, copy_mode));
2177 }
2178
2179 return tgtblk;
2180 }
2181
2182 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2183 register if it contains any data, otherwise return null.
2184
2185 This is used on targets that return BLKmode values in registers. */
2186
2187 rtx
2188 copy_blkmode_to_reg (enum machine_mode mode, tree src)
2189 {
2190 int i, n_regs;
2191 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2192 unsigned int bitsize;
2193 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2194 enum machine_mode dst_mode;
2195
2196 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2197
2198 x = expand_normal (src);
2199
2200 bytes = int_size_in_bytes (TREE_TYPE (src));
2201 if (bytes == 0)
2202 return NULL_RTX;
2203
2204 /* If the structure doesn't take up a whole number of words, see
2205 whether the register value should be padded on the left or on
2206 the right. Set PADDING_CORRECTION to the number of padding
2207 bits needed on the left side.
2208
2209 In most ABIs, the structure will be returned at the least end of
2210 the register, which translates to right padding on little-endian
2211 targets and left padding on big-endian targets. The opposite
2212 holds if the structure is returned at the most significant
2213 end of the register. */
2214 if (bytes % UNITS_PER_WORD != 0
2215 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2216 ? !BYTES_BIG_ENDIAN
2217 : BYTES_BIG_ENDIAN))
2218 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2219 * BITS_PER_UNIT));
2220
2221 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2222 dst_words = XALLOCAVEC (rtx, n_regs);
2223 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2224
2225 /* Copy the structure BITSIZE bits at a time. */
2226 for (bitpos = 0, xbitpos = padding_correction;
2227 bitpos < bytes * BITS_PER_UNIT;
2228 bitpos += bitsize, xbitpos += bitsize)
2229 {
2230 /* We need a new destination pseudo each time xbitpos is
2231 on a word boundary and when xbitpos == padding_correction
2232 (the first time through). */
2233 if (xbitpos % BITS_PER_WORD == 0
2234 || xbitpos == padding_correction)
2235 {
2236 /* Generate an appropriate register. */
2237 dst_word = gen_reg_rtx (word_mode);
2238 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2239
2240 /* Clear the destination before we move anything into it. */
2241 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2242 }
2243
2244 /* We need a new source operand each time bitpos is on a word
2245 boundary. */
2246 if (bitpos % BITS_PER_WORD == 0)
2247 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2248
2249 /* Use bitpos for the source extraction (left justified) and
2250 xbitpos for the destination store (right justified). */
2251 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2252 0, 0, word_mode,
2253 extract_bit_field (src_word, bitsize,
2254 bitpos % BITS_PER_WORD, 1, false,
2255 NULL_RTX, word_mode, word_mode));
2256 }
2257
2258 if (mode == BLKmode)
2259 {
2260 /* Find the smallest integer mode large enough to hold the
2261 entire structure. */
2262 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2263 mode != VOIDmode;
2264 mode = GET_MODE_WIDER_MODE (mode))
2265 /* Have we found a large enough mode? */
2266 if (GET_MODE_SIZE (mode) >= bytes)
2267 break;
2268
2269 /* A suitable mode should have been found. */
2270 gcc_assert (mode != VOIDmode);
2271 }
2272
2273 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2274 dst_mode = word_mode;
2275 else
2276 dst_mode = mode;
2277 dst = gen_reg_rtx (dst_mode);
2278
2279 for (i = 0; i < n_regs; i++)
2280 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2281
2282 if (mode != dst_mode)
2283 dst = gen_lowpart (mode, dst);
2284
2285 return dst;
2286 }
2287
2288 /* Add a USE expression for REG to the (possibly empty) list pointed
2289 to by CALL_FUSAGE. REG must denote a hard register. */
2290
2291 void
2292 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2293 {
2294 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2295
2296 *call_fusage
2297 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2298 }
2299
2300 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2301 starting at REGNO. All of these registers must be hard registers. */
2302
2303 void
2304 use_regs (rtx *call_fusage, int regno, int nregs)
2305 {
2306 int i;
2307
2308 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2309
2310 for (i = 0; i < nregs; i++)
2311 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2312 }
2313
2314 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2315 PARALLEL REGS. This is for calls that pass values in multiple
2316 non-contiguous locations. The Irix 6 ABI has examples of this. */
2317
2318 void
2319 use_group_regs (rtx *call_fusage, rtx regs)
2320 {
2321 int i;
2322
2323 for (i = 0; i < XVECLEN (regs, 0); i++)
2324 {
2325 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2326
2327 /* A NULL entry means the parameter goes both on the stack and in
2328 registers. This can also be a MEM for targets that pass values
2329 partially on the stack and partially in registers. */
2330 if (reg != 0 && REG_P (reg))
2331 use_reg (call_fusage, reg);
2332 }
2333 }
2334
2335 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2336 assigment and the code of the expresion on the RHS is CODE. Return
2337 NULL otherwise. */
2338
2339 static gimple
2340 get_def_for_expr (tree name, enum tree_code code)
2341 {
2342 gimple def_stmt;
2343
2344 if (TREE_CODE (name) != SSA_NAME)
2345 return NULL;
2346
2347 def_stmt = get_gimple_for_ssa_name (name);
2348 if (!def_stmt
2349 || gimple_assign_rhs_code (def_stmt) != code)
2350 return NULL;
2351
2352 return def_stmt;
2353 }
2354
2355 #ifdef HAVE_conditional_move
2356 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2357 assigment and the class of the expresion on the RHS is CLASS. Return
2358 NULL otherwise. */
2359
2360 static gimple
2361 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2362 {
2363 gimple def_stmt;
2364
2365 if (TREE_CODE (name) != SSA_NAME)
2366 return NULL;
2367
2368 def_stmt = get_gimple_for_ssa_name (name);
2369 if (!def_stmt
2370 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2371 return NULL;
2372
2373 return def_stmt;
2374 }
2375 #endif
2376 \f
2377
2378 /* Determine whether the LEN bytes generated by CONSTFUN can be
2379 stored to memory using several move instructions. CONSTFUNDATA is
2380 a pointer which will be passed as argument in every CONSTFUN call.
2381 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2382 a memset operation and false if it's a copy of a constant string.
2383 Return nonzero if a call to store_by_pieces should succeed. */
2384
2385 int
2386 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2387 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2388 void *constfundata, unsigned int align, bool memsetp)
2389 {
2390 unsigned HOST_WIDE_INT l;
2391 unsigned int max_size;
2392 HOST_WIDE_INT offset = 0;
2393 enum machine_mode mode;
2394 enum insn_code icode;
2395 int reverse;
2396 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2397 rtx cst ATTRIBUTE_UNUSED;
2398
2399 if (len == 0)
2400 return 1;
2401
2402 if (! (memsetp
2403 ? SET_BY_PIECES_P (len, align)
2404 : STORE_BY_PIECES_P (len, align)))
2405 return 0;
2406
2407 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2408
2409 /* We would first store what we can in the largest integer mode, then go to
2410 successively smaller modes. */
2411
2412 for (reverse = 0;
2413 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2414 reverse++)
2415 {
2416 l = len;
2417 max_size = STORE_MAX_PIECES + 1;
2418 while (max_size > 1)
2419 {
2420 mode = widest_int_mode_for_size (max_size);
2421
2422 if (mode == VOIDmode)
2423 break;
2424
2425 icode = optab_handler (mov_optab, mode);
2426 if (icode != CODE_FOR_nothing
2427 && align >= GET_MODE_ALIGNMENT (mode))
2428 {
2429 unsigned int size = GET_MODE_SIZE (mode);
2430
2431 while (l >= size)
2432 {
2433 if (reverse)
2434 offset -= size;
2435
2436 cst = (*constfun) (constfundata, offset, mode);
2437 if (!targetm.legitimate_constant_p (mode, cst))
2438 return 0;
2439
2440 if (!reverse)
2441 offset += size;
2442
2443 l -= size;
2444 }
2445 }
2446
2447 max_size = GET_MODE_SIZE (mode);
2448 }
2449
2450 /* The code above should have handled everything. */
2451 gcc_assert (!l);
2452 }
2453
2454 return 1;
2455 }
2456
2457 /* Generate several move instructions to store LEN bytes generated by
2458 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2459 pointer which will be passed as argument in every CONSTFUN call.
2460 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2461 a memset operation and false if it's a copy of a constant string.
2462 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2463 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2464 stpcpy. */
2465
2466 rtx
2467 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2468 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2469 void *constfundata, unsigned int align, bool memsetp, int endp)
2470 {
2471 enum machine_mode to_addr_mode = get_address_mode (to);
2472 struct store_by_pieces_d data;
2473
2474 if (len == 0)
2475 {
2476 gcc_assert (endp != 2);
2477 return to;
2478 }
2479
2480 gcc_assert (memsetp
2481 ? SET_BY_PIECES_P (len, align)
2482 : STORE_BY_PIECES_P (len, align));
2483 data.constfun = constfun;
2484 data.constfundata = constfundata;
2485 data.len = len;
2486 data.to = to;
2487 store_by_pieces_1 (&data, align);
2488 if (endp)
2489 {
2490 rtx to1;
2491
2492 gcc_assert (!data.reverse);
2493 if (data.autinc_to)
2494 {
2495 if (endp == 2)
2496 {
2497 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2498 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2499 else
2500 data.to_addr = copy_to_mode_reg (to_addr_mode,
2501 plus_constant (to_addr_mode,
2502 data.to_addr,
2503 -1));
2504 }
2505 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2506 data.offset);
2507 }
2508 else
2509 {
2510 if (endp == 2)
2511 --data.offset;
2512 to1 = adjust_address (data.to, QImode, data.offset);
2513 }
2514 return to1;
2515 }
2516 else
2517 return data.to;
2518 }
2519
2520 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2521 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2522
2523 static void
2524 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2525 {
2526 struct store_by_pieces_d data;
2527
2528 if (len == 0)
2529 return;
2530
2531 data.constfun = clear_by_pieces_1;
2532 data.constfundata = NULL;
2533 data.len = len;
2534 data.to = to;
2535 store_by_pieces_1 (&data, align);
2536 }
2537
2538 /* Callback routine for clear_by_pieces.
2539 Return const0_rtx unconditionally. */
2540
2541 static rtx
2542 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2543 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2544 enum machine_mode mode ATTRIBUTE_UNUSED)
2545 {
2546 return const0_rtx;
2547 }
2548
2549 /* Subroutine of clear_by_pieces and store_by_pieces.
2550 Generate several move instructions to store LEN bytes of block TO. (A MEM
2551 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2552
2553 static void
2554 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2555 unsigned int align ATTRIBUTE_UNUSED)
2556 {
2557 enum machine_mode to_addr_mode = get_address_mode (data->to);
2558 rtx to_addr = XEXP (data->to, 0);
2559 unsigned int max_size = STORE_MAX_PIECES + 1;
2560 enum insn_code icode;
2561
2562 data->offset = 0;
2563 data->to_addr = to_addr;
2564 data->autinc_to
2565 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2566 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2567
2568 data->explicit_inc_to = 0;
2569 data->reverse
2570 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2571 if (data->reverse)
2572 data->offset = data->len;
2573
2574 /* If storing requires more than two move insns,
2575 copy addresses to registers (to make displacements shorter)
2576 and use post-increment if available. */
2577 if (!data->autinc_to
2578 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2579 {
2580 /* Determine the main mode we'll be using.
2581 MODE might not be used depending on the definitions of the
2582 USE_* macros below. */
2583 enum machine_mode mode ATTRIBUTE_UNUSED
2584 = widest_int_mode_for_size (max_size);
2585
2586 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2587 {
2588 data->to_addr = copy_to_mode_reg (to_addr_mode,
2589 plus_constant (to_addr_mode,
2590 to_addr,
2591 data->len));
2592 data->autinc_to = 1;
2593 data->explicit_inc_to = -1;
2594 }
2595
2596 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2597 && ! data->autinc_to)
2598 {
2599 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2600 data->autinc_to = 1;
2601 data->explicit_inc_to = 1;
2602 }
2603
2604 if ( !data->autinc_to && CONSTANT_P (to_addr))
2605 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2606 }
2607
2608 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2609
2610 /* First store what we can in the largest integer mode, then go to
2611 successively smaller modes. */
2612
2613 while (max_size > 1)
2614 {
2615 enum machine_mode mode = widest_int_mode_for_size (max_size);
2616
2617 if (mode == VOIDmode)
2618 break;
2619
2620 icode = optab_handler (mov_optab, mode);
2621 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2622 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2623
2624 max_size = GET_MODE_SIZE (mode);
2625 }
2626
2627 /* The code above should have handled everything. */
2628 gcc_assert (!data->len);
2629 }
2630
2631 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2632 with move instructions for mode MODE. GENFUN is the gen_... function
2633 to make a move insn for that mode. DATA has all the other info. */
2634
2635 static void
2636 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2637 struct store_by_pieces_d *data)
2638 {
2639 unsigned int size = GET_MODE_SIZE (mode);
2640 rtx to1, cst;
2641
2642 while (data->len >= size)
2643 {
2644 if (data->reverse)
2645 data->offset -= size;
2646
2647 if (data->autinc_to)
2648 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2649 data->offset);
2650 else
2651 to1 = adjust_address (data->to, mode, data->offset);
2652
2653 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2654 emit_insn (gen_add2_insn (data->to_addr,
2655 GEN_INT (-(HOST_WIDE_INT) size)));
2656
2657 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2658 emit_insn ((*genfun) (to1, cst));
2659
2660 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2661 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2662
2663 if (! data->reverse)
2664 data->offset += size;
2665
2666 data->len -= size;
2667 }
2668 }
2669 \f
2670 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2671 its length in bytes. */
2672
2673 rtx
2674 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2675 unsigned int expected_align, HOST_WIDE_INT expected_size)
2676 {
2677 enum machine_mode mode = GET_MODE (object);
2678 unsigned int align;
2679
2680 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2681
2682 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2683 just move a zero. Otherwise, do this a piece at a time. */
2684 if (mode != BLKmode
2685 && CONST_INT_P (size)
2686 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2687 {
2688 rtx zero = CONST0_RTX (mode);
2689 if (zero != NULL)
2690 {
2691 emit_move_insn (object, zero);
2692 return NULL;
2693 }
2694
2695 if (COMPLEX_MODE_P (mode))
2696 {
2697 zero = CONST0_RTX (GET_MODE_INNER (mode));
2698 if (zero != NULL)
2699 {
2700 write_complex_part (object, zero, 0);
2701 write_complex_part (object, zero, 1);
2702 return NULL;
2703 }
2704 }
2705 }
2706
2707 if (size == const0_rtx)
2708 return NULL;
2709
2710 align = MEM_ALIGN (object);
2711
2712 if (CONST_INT_P (size)
2713 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2714 clear_by_pieces (object, INTVAL (size), align);
2715 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2716 expected_align, expected_size))
2717 ;
2718 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2719 return set_storage_via_libcall (object, size, const0_rtx,
2720 method == BLOCK_OP_TAILCALL);
2721 else
2722 gcc_unreachable ();
2723
2724 return NULL;
2725 }
2726
2727 rtx
2728 clear_storage (rtx object, rtx size, enum block_op_methods method)
2729 {
2730 return clear_storage_hints (object, size, method, 0, -1);
2731 }
2732
2733
2734 /* A subroutine of clear_storage. Expand a call to memset.
2735 Return the return value of memset, 0 otherwise. */
2736
2737 rtx
2738 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2739 {
2740 tree call_expr, fn, object_tree, size_tree, val_tree;
2741 enum machine_mode size_mode;
2742 rtx retval;
2743
2744 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2745 place those into new pseudos into a VAR_DECL and use them later. */
2746
2747 object = copy_addr_to_reg (XEXP (object, 0));
2748
2749 size_mode = TYPE_MODE (sizetype);
2750 size = convert_to_mode (size_mode, size, 1);
2751 size = copy_to_mode_reg (size_mode, size);
2752
2753 /* It is incorrect to use the libcall calling conventions to call
2754 memset in this context. This could be a user call to memset and
2755 the user may wish to examine the return value from memset. For
2756 targets where libcalls and normal calls have different conventions
2757 for returning pointers, we could end up generating incorrect code. */
2758
2759 object_tree = make_tree (ptr_type_node, object);
2760 if (!CONST_INT_P (val))
2761 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2762 size_tree = make_tree (sizetype, size);
2763 val_tree = make_tree (integer_type_node, val);
2764
2765 fn = clear_storage_libcall_fn (true);
2766 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2767 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2768
2769 retval = expand_normal (call_expr);
2770
2771 return retval;
2772 }
2773
2774 /* A subroutine of set_storage_via_libcall. Create the tree node
2775 for the function we use for block clears. */
2776
2777 tree block_clear_fn;
2778
2779 void
2780 init_block_clear_fn (const char *asmspec)
2781 {
2782 if (!block_clear_fn)
2783 {
2784 tree fn, args;
2785
2786 fn = get_identifier ("memset");
2787 args = build_function_type_list (ptr_type_node, ptr_type_node,
2788 integer_type_node, sizetype,
2789 NULL_TREE);
2790
2791 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2792 DECL_EXTERNAL (fn) = 1;
2793 TREE_PUBLIC (fn) = 1;
2794 DECL_ARTIFICIAL (fn) = 1;
2795 TREE_NOTHROW (fn) = 1;
2796 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2797 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2798
2799 block_clear_fn = fn;
2800 }
2801
2802 if (asmspec)
2803 set_user_assembler_name (block_clear_fn, asmspec);
2804 }
2805
2806 static tree
2807 clear_storage_libcall_fn (int for_call)
2808 {
2809 static bool emitted_extern;
2810
2811 if (!block_clear_fn)
2812 init_block_clear_fn (NULL);
2813
2814 if (for_call && !emitted_extern)
2815 {
2816 emitted_extern = true;
2817 make_decl_rtl (block_clear_fn);
2818 }
2819
2820 return block_clear_fn;
2821 }
2822 \f
2823 /* Expand a setmem pattern; return true if successful. */
2824
2825 bool
2826 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2827 unsigned int expected_align, HOST_WIDE_INT expected_size)
2828 {
2829 /* Try the most limited insn first, because there's no point
2830 including more than one in the machine description unless
2831 the more limited one has some advantage. */
2832
2833 enum machine_mode mode;
2834
2835 if (expected_align < align)
2836 expected_align = align;
2837
2838 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2839 mode = GET_MODE_WIDER_MODE (mode))
2840 {
2841 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2842
2843 if (code != CODE_FOR_nothing
2844 /* We don't need MODE to be narrower than
2845 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2846 the mode mask, as it is returned by the macro, it will
2847 definitely be less than the actual mode mask. */
2848 && ((CONST_INT_P (size)
2849 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2850 <= (GET_MODE_MASK (mode) >> 1)))
2851 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2852 {
2853 struct expand_operand ops[6];
2854 unsigned int nops;
2855
2856 nops = insn_data[(int) code].n_generator_args;
2857 gcc_assert (nops == 4 || nops == 6);
2858
2859 create_fixed_operand (&ops[0], object);
2860 /* The check above guarantees that this size conversion is valid. */
2861 create_convert_operand_to (&ops[1], size, mode, true);
2862 create_convert_operand_from (&ops[2], val, byte_mode, true);
2863 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2864 if (nops == 6)
2865 {
2866 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2867 create_integer_operand (&ops[5], expected_size);
2868 }
2869 if (maybe_expand_insn (code, nops, ops))
2870 return true;
2871 }
2872 }
2873
2874 return false;
2875 }
2876
2877 \f
2878 /* Write to one of the components of the complex value CPLX. Write VAL to
2879 the real part if IMAG_P is false, and the imaginary part if its true. */
2880
2881 static void
2882 write_complex_part (rtx cplx, rtx val, bool imag_p)
2883 {
2884 enum machine_mode cmode;
2885 enum machine_mode imode;
2886 unsigned ibitsize;
2887
2888 if (GET_CODE (cplx) == CONCAT)
2889 {
2890 emit_move_insn (XEXP (cplx, imag_p), val);
2891 return;
2892 }
2893
2894 cmode = GET_MODE (cplx);
2895 imode = GET_MODE_INNER (cmode);
2896 ibitsize = GET_MODE_BITSIZE (imode);
2897
2898 /* For MEMs simplify_gen_subreg may generate an invalid new address
2899 because, e.g., the original address is considered mode-dependent
2900 by the target, which restricts simplify_subreg from invoking
2901 adjust_address_nv. Instead of preparing fallback support for an
2902 invalid address, we call adjust_address_nv directly. */
2903 if (MEM_P (cplx))
2904 {
2905 emit_move_insn (adjust_address_nv (cplx, imode,
2906 imag_p ? GET_MODE_SIZE (imode) : 0),
2907 val);
2908 return;
2909 }
2910
2911 /* If the sub-object is at least word sized, then we know that subregging
2912 will work. This special case is important, since store_bit_field
2913 wants to operate on integer modes, and there's rarely an OImode to
2914 correspond to TCmode. */
2915 if (ibitsize >= BITS_PER_WORD
2916 /* For hard regs we have exact predicates. Assume we can split
2917 the original object if it spans an even number of hard regs.
2918 This special case is important for SCmode on 64-bit platforms
2919 where the natural size of floating-point regs is 32-bit. */
2920 || (REG_P (cplx)
2921 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2922 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2923 {
2924 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2925 imag_p ? GET_MODE_SIZE (imode) : 0);
2926 if (part)
2927 {
2928 emit_move_insn (part, val);
2929 return;
2930 }
2931 else
2932 /* simplify_gen_subreg may fail for sub-word MEMs. */
2933 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2934 }
2935
2936 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2937 }
2938
2939 /* Extract one of the components of the complex value CPLX. Extract the
2940 real part if IMAG_P is false, and the imaginary part if it's true. */
2941
2942 static rtx
2943 read_complex_part (rtx cplx, bool imag_p)
2944 {
2945 enum machine_mode cmode, imode;
2946 unsigned ibitsize;
2947
2948 if (GET_CODE (cplx) == CONCAT)
2949 return XEXP (cplx, imag_p);
2950
2951 cmode = GET_MODE (cplx);
2952 imode = GET_MODE_INNER (cmode);
2953 ibitsize = GET_MODE_BITSIZE (imode);
2954
2955 /* Special case reads from complex constants that got spilled to memory. */
2956 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2957 {
2958 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2959 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2960 {
2961 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2962 if (CONSTANT_CLASS_P (part))
2963 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2964 }
2965 }
2966
2967 /* For MEMs simplify_gen_subreg may generate an invalid new address
2968 because, e.g., the original address is considered mode-dependent
2969 by the target, which restricts simplify_subreg from invoking
2970 adjust_address_nv. Instead of preparing fallback support for an
2971 invalid address, we call adjust_address_nv directly. */
2972 if (MEM_P (cplx))
2973 return adjust_address_nv (cplx, imode,
2974 imag_p ? GET_MODE_SIZE (imode) : 0);
2975
2976 /* If the sub-object is at least word sized, then we know that subregging
2977 will work. This special case is important, since extract_bit_field
2978 wants to operate on integer modes, and there's rarely an OImode to
2979 correspond to TCmode. */
2980 if (ibitsize >= BITS_PER_WORD
2981 /* For hard regs we have exact predicates. Assume we can split
2982 the original object if it spans an even number of hard regs.
2983 This special case is important for SCmode on 64-bit platforms
2984 where the natural size of floating-point regs is 32-bit. */
2985 || (REG_P (cplx)
2986 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2987 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2988 {
2989 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2990 imag_p ? GET_MODE_SIZE (imode) : 0);
2991 if (ret)
2992 return ret;
2993 else
2994 /* simplify_gen_subreg may fail for sub-word MEMs. */
2995 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2996 }
2997
2998 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2999 true, false, NULL_RTX, imode, imode);
3000 }
3001 \f
3002 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3003 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3004 represented in NEW_MODE. If FORCE is true, this will never happen, as
3005 we'll force-create a SUBREG if needed. */
3006
3007 static rtx
3008 emit_move_change_mode (enum machine_mode new_mode,
3009 enum machine_mode old_mode, rtx x, bool force)
3010 {
3011 rtx ret;
3012
3013 if (push_operand (x, GET_MODE (x)))
3014 {
3015 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3016 MEM_COPY_ATTRIBUTES (ret, x);
3017 }
3018 else if (MEM_P (x))
3019 {
3020 /* We don't have to worry about changing the address since the
3021 size in bytes is supposed to be the same. */
3022 if (reload_in_progress)
3023 {
3024 /* Copy the MEM to change the mode and move any
3025 substitutions from the old MEM to the new one. */
3026 ret = adjust_address_nv (x, new_mode, 0);
3027 copy_replacements (x, ret);
3028 }
3029 else
3030 ret = adjust_address (x, new_mode, 0);
3031 }
3032 else
3033 {
3034 /* Note that we do want simplify_subreg's behavior of validating
3035 that the new mode is ok for a hard register. If we were to use
3036 simplify_gen_subreg, we would create the subreg, but would
3037 probably run into the target not being able to implement it. */
3038 /* Except, of course, when FORCE is true, when this is exactly what
3039 we want. Which is needed for CCmodes on some targets. */
3040 if (force)
3041 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3042 else
3043 ret = simplify_subreg (new_mode, x, old_mode, 0);
3044 }
3045
3046 return ret;
3047 }
3048
3049 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3050 an integer mode of the same size as MODE. Returns the instruction
3051 emitted, or NULL if such a move could not be generated. */
3052
3053 static rtx
3054 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3055 {
3056 enum machine_mode imode;
3057 enum insn_code code;
3058
3059 /* There must exist a mode of the exact size we require. */
3060 imode = int_mode_for_mode (mode);
3061 if (imode == BLKmode)
3062 return NULL_RTX;
3063
3064 /* The target must support moves in this mode. */
3065 code = optab_handler (mov_optab, imode);
3066 if (code == CODE_FOR_nothing)
3067 return NULL_RTX;
3068
3069 x = emit_move_change_mode (imode, mode, x, force);
3070 if (x == NULL_RTX)
3071 return NULL_RTX;
3072 y = emit_move_change_mode (imode, mode, y, force);
3073 if (y == NULL_RTX)
3074 return NULL_RTX;
3075 return emit_insn (GEN_FCN (code) (x, y));
3076 }
3077
3078 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3079 Return an equivalent MEM that does not use an auto-increment. */
3080
3081 static rtx
3082 emit_move_resolve_push (enum machine_mode mode, rtx x)
3083 {
3084 enum rtx_code code = GET_CODE (XEXP (x, 0));
3085 HOST_WIDE_INT adjust;
3086 rtx temp;
3087
3088 adjust = GET_MODE_SIZE (mode);
3089 #ifdef PUSH_ROUNDING
3090 adjust = PUSH_ROUNDING (adjust);
3091 #endif
3092 if (code == PRE_DEC || code == POST_DEC)
3093 adjust = -adjust;
3094 else if (code == PRE_MODIFY || code == POST_MODIFY)
3095 {
3096 rtx expr = XEXP (XEXP (x, 0), 1);
3097 HOST_WIDE_INT val;
3098
3099 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3100 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3101 val = INTVAL (XEXP (expr, 1));
3102 if (GET_CODE (expr) == MINUS)
3103 val = -val;
3104 gcc_assert (adjust == val || adjust == -val);
3105 adjust = val;
3106 }
3107
3108 /* Do not use anti_adjust_stack, since we don't want to update
3109 stack_pointer_delta. */
3110 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3111 GEN_INT (adjust), stack_pointer_rtx,
3112 0, OPTAB_LIB_WIDEN);
3113 if (temp != stack_pointer_rtx)
3114 emit_move_insn (stack_pointer_rtx, temp);
3115
3116 switch (code)
3117 {
3118 case PRE_INC:
3119 case PRE_DEC:
3120 case PRE_MODIFY:
3121 temp = stack_pointer_rtx;
3122 break;
3123 case POST_INC:
3124 case POST_DEC:
3125 case POST_MODIFY:
3126 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3127 break;
3128 default:
3129 gcc_unreachable ();
3130 }
3131
3132 return replace_equiv_address (x, temp);
3133 }
3134
3135 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3136 X is known to satisfy push_operand, and MODE is known to be complex.
3137 Returns the last instruction emitted. */
3138
3139 rtx
3140 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3141 {
3142 enum machine_mode submode = GET_MODE_INNER (mode);
3143 bool imag_first;
3144
3145 #ifdef PUSH_ROUNDING
3146 unsigned int submodesize = GET_MODE_SIZE (submode);
3147
3148 /* In case we output to the stack, but the size is smaller than the
3149 machine can push exactly, we need to use move instructions. */
3150 if (PUSH_ROUNDING (submodesize) != submodesize)
3151 {
3152 x = emit_move_resolve_push (mode, x);
3153 return emit_move_insn (x, y);
3154 }
3155 #endif
3156
3157 /* Note that the real part always precedes the imag part in memory
3158 regardless of machine's endianness. */
3159 switch (GET_CODE (XEXP (x, 0)))
3160 {
3161 case PRE_DEC:
3162 case POST_DEC:
3163 imag_first = true;
3164 break;
3165 case PRE_INC:
3166 case POST_INC:
3167 imag_first = false;
3168 break;
3169 default:
3170 gcc_unreachable ();
3171 }
3172
3173 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3174 read_complex_part (y, imag_first));
3175 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3176 read_complex_part (y, !imag_first));
3177 }
3178
3179 /* A subroutine of emit_move_complex. Perform the move from Y to X
3180 via two moves of the parts. Returns the last instruction emitted. */
3181
3182 rtx
3183 emit_move_complex_parts (rtx x, rtx y)
3184 {
3185 /* Show the output dies here. This is necessary for SUBREGs
3186 of pseudos since we cannot track their lifetimes correctly;
3187 hard regs shouldn't appear here except as return values. */
3188 if (!reload_completed && !reload_in_progress
3189 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3190 emit_clobber (x);
3191
3192 write_complex_part (x, read_complex_part (y, false), false);
3193 write_complex_part (x, read_complex_part (y, true), true);
3194
3195 return get_last_insn ();
3196 }
3197
3198 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3199 MODE is known to be complex. Returns the last instruction emitted. */
3200
3201 static rtx
3202 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3203 {
3204 bool try_int;
3205
3206 /* Need to take special care for pushes, to maintain proper ordering
3207 of the data, and possibly extra padding. */
3208 if (push_operand (x, mode))
3209 return emit_move_complex_push (mode, x, y);
3210
3211 /* See if we can coerce the target into moving both values at once. */
3212
3213 /* Move floating point as parts. */
3214 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3215 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3216 try_int = false;
3217 /* Not possible if the values are inherently not adjacent. */
3218 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3219 try_int = false;
3220 /* Is possible if both are registers (or subregs of registers). */
3221 else if (register_operand (x, mode) && register_operand (y, mode))
3222 try_int = true;
3223 /* If one of the operands is a memory, and alignment constraints
3224 are friendly enough, we may be able to do combined memory operations.
3225 We do not attempt this if Y is a constant because that combination is
3226 usually better with the by-parts thing below. */
3227 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3228 && (!STRICT_ALIGNMENT
3229 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3230 try_int = true;
3231 else
3232 try_int = false;
3233
3234 if (try_int)
3235 {
3236 rtx ret;
3237
3238 /* For memory to memory moves, optimal behavior can be had with the
3239 existing block move logic. */
3240 if (MEM_P (x) && MEM_P (y))
3241 {
3242 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3243 BLOCK_OP_NO_LIBCALL);
3244 return get_last_insn ();
3245 }
3246
3247 ret = emit_move_via_integer (mode, x, y, true);
3248 if (ret)
3249 return ret;
3250 }
3251
3252 return emit_move_complex_parts (x, y);
3253 }
3254
3255 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3256 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3257
3258 static rtx
3259 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3260 {
3261 rtx ret;
3262
3263 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3264 if (mode != CCmode)
3265 {
3266 enum insn_code code = optab_handler (mov_optab, CCmode);
3267 if (code != CODE_FOR_nothing)
3268 {
3269 x = emit_move_change_mode (CCmode, mode, x, true);
3270 y = emit_move_change_mode (CCmode, mode, y, true);
3271 return emit_insn (GEN_FCN (code) (x, y));
3272 }
3273 }
3274
3275 /* Otherwise, find the MODE_INT mode of the same width. */
3276 ret = emit_move_via_integer (mode, x, y, false);
3277 gcc_assert (ret != NULL);
3278 return ret;
3279 }
3280
3281 /* Return true if word I of OP lies entirely in the
3282 undefined bits of a paradoxical subreg. */
3283
3284 static bool
3285 undefined_operand_subword_p (const_rtx op, int i)
3286 {
3287 enum machine_mode innermode, innermostmode;
3288 int offset;
3289 if (GET_CODE (op) != SUBREG)
3290 return false;
3291 innermode = GET_MODE (op);
3292 innermostmode = GET_MODE (SUBREG_REG (op));
3293 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3294 /* The SUBREG_BYTE represents offset, as if the value were stored in
3295 memory, except for a paradoxical subreg where we define
3296 SUBREG_BYTE to be 0; undo this exception as in
3297 simplify_subreg. */
3298 if (SUBREG_BYTE (op) == 0
3299 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3300 {
3301 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3302 if (WORDS_BIG_ENDIAN)
3303 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3304 if (BYTES_BIG_ENDIAN)
3305 offset += difference % UNITS_PER_WORD;
3306 }
3307 if (offset >= GET_MODE_SIZE (innermostmode)
3308 || offset <= -GET_MODE_SIZE (word_mode))
3309 return true;
3310 return false;
3311 }
3312
3313 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3314 MODE is any multi-word or full-word mode that lacks a move_insn
3315 pattern. Note that you will get better code if you define such
3316 patterns, even if they must turn into multiple assembler instructions. */
3317
3318 static rtx
3319 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3320 {
3321 rtx last_insn = 0;
3322 rtx seq, inner;
3323 bool need_clobber;
3324 int i;
3325
3326 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3327
3328 /* If X is a push on the stack, do the push now and replace
3329 X with a reference to the stack pointer. */
3330 if (push_operand (x, mode))
3331 x = emit_move_resolve_push (mode, x);
3332
3333 /* If we are in reload, see if either operand is a MEM whose address
3334 is scheduled for replacement. */
3335 if (reload_in_progress && MEM_P (x)
3336 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3337 x = replace_equiv_address_nv (x, inner);
3338 if (reload_in_progress && MEM_P (y)
3339 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3340 y = replace_equiv_address_nv (y, inner);
3341
3342 start_sequence ();
3343
3344 need_clobber = false;
3345 for (i = 0;
3346 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3347 i++)
3348 {
3349 rtx xpart = operand_subword (x, i, 1, mode);
3350 rtx ypart;
3351
3352 /* Do not generate code for a move if it would come entirely
3353 from the undefined bits of a paradoxical subreg. */
3354 if (undefined_operand_subword_p (y, i))
3355 continue;
3356
3357 ypart = operand_subword (y, i, 1, mode);
3358
3359 /* If we can't get a part of Y, put Y into memory if it is a
3360 constant. Otherwise, force it into a register. Then we must
3361 be able to get a part of Y. */
3362 if (ypart == 0 && CONSTANT_P (y))
3363 {
3364 y = use_anchored_address (force_const_mem (mode, y));
3365 ypart = operand_subword (y, i, 1, mode);
3366 }
3367 else if (ypart == 0)
3368 ypart = operand_subword_force (y, i, mode);
3369
3370 gcc_assert (xpart && ypart);
3371
3372 need_clobber |= (GET_CODE (xpart) == SUBREG);
3373
3374 last_insn = emit_move_insn (xpart, ypart);
3375 }
3376
3377 seq = get_insns ();
3378 end_sequence ();
3379
3380 /* Show the output dies here. This is necessary for SUBREGs
3381 of pseudos since we cannot track their lifetimes correctly;
3382 hard regs shouldn't appear here except as return values.
3383 We never want to emit such a clobber after reload. */
3384 if (x != y
3385 && ! (reload_in_progress || reload_completed)
3386 && need_clobber != 0)
3387 emit_clobber (x);
3388
3389 emit_insn (seq);
3390
3391 return last_insn;
3392 }
3393
3394 /* Low level part of emit_move_insn.
3395 Called just like emit_move_insn, but assumes X and Y
3396 are basically valid. */
3397
3398 rtx
3399 emit_move_insn_1 (rtx x, rtx y)
3400 {
3401 enum machine_mode mode = GET_MODE (x);
3402 enum insn_code code;
3403
3404 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3405
3406 code = optab_handler (mov_optab, mode);
3407 if (code != CODE_FOR_nothing)
3408 return emit_insn (GEN_FCN (code) (x, y));
3409
3410 /* Expand complex moves by moving real part and imag part. */
3411 if (COMPLEX_MODE_P (mode))
3412 return emit_move_complex (mode, x, y);
3413
3414 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3415 || ALL_FIXED_POINT_MODE_P (mode))
3416 {
3417 rtx result = emit_move_via_integer (mode, x, y, true);
3418
3419 /* If we can't find an integer mode, use multi words. */
3420 if (result)
3421 return result;
3422 else
3423 return emit_move_multi_word (mode, x, y);
3424 }
3425
3426 if (GET_MODE_CLASS (mode) == MODE_CC)
3427 return emit_move_ccmode (mode, x, y);
3428
3429 /* Try using a move pattern for the corresponding integer mode. This is
3430 only safe when simplify_subreg can convert MODE constants into integer
3431 constants. At present, it can only do this reliably if the value
3432 fits within a HOST_WIDE_INT. */
3433 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3434 {
3435 rtx ret = emit_move_via_integer (mode, x, y, false);
3436 if (ret)
3437 return ret;
3438 }
3439
3440 return emit_move_multi_word (mode, x, y);
3441 }
3442
3443 /* Generate code to copy Y into X.
3444 Both Y and X must have the same mode, except that
3445 Y can be a constant with VOIDmode.
3446 This mode cannot be BLKmode; use emit_block_move for that.
3447
3448 Return the last instruction emitted. */
3449
3450 rtx
3451 emit_move_insn (rtx x, rtx y)
3452 {
3453 enum machine_mode mode = GET_MODE (x);
3454 rtx y_cst = NULL_RTX;
3455 rtx last_insn, set;
3456
3457 gcc_assert (mode != BLKmode
3458 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3459
3460 if (CONSTANT_P (y))
3461 {
3462 if (optimize
3463 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3464 && (last_insn = compress_float_constant (x, y)))
3465 return last_insn;
3466
3467 y_cst = y;
3468
3469 if (!targetm.legitimate_constant_p (mode, y))
3470 {
3471 y = force_const_mem (mode, y);
3472
3473 /* If the target's cannot_force_const_mem prevented the spill,
3474 assume that the target's move expanders will also take care
3475 of the non-legitimate constant. */
3476 if (!y)
3477 y = y_cst;
3478 else
3479 y = use_anchored_address (y);
3480 }
3481 }
3482
3483 /* If X or Y are memory references, verify that their addresses are valid
3484 for the machine. */
3485 if (MEM_P (x)
3486 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3487 MEM_ADDR_SPACE (x))
3488 && ! push_operand (x, GET_MODE (x))))
3489 x = validize_mem (x);
3490
3491 if (MEM_P (y)
3492 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3493 MEM_ADDR_SPACE (y)))
3494 y = validize_mem (y);
3495
3496 gcc_assert (mode != BLKmode);
3497
3498 last_insn = emit_move_insn_1 (x, y);
3499
3500 if (y_cst && REG_P (x)
3501 && (set = single_set (last_insn)) != NULL_RTX
3502 && SET_DEST (set) == x
3503 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3504 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3505
3506 return last_insn;
3507 }
3508
3509 /* If Y is representable exactly in a narrower mode, and the target can
3510 perform the extension directly from constant or memory, then emit the
3511 move as an extension. */
3512
3513 static rtx
3514 compress_float_constant (rtx x, rtx y)
3515 {
3516 enum machine_mode dstmode = GET_MODE (x);
3517 enum machine_mode orig_srcmode = GET_MODE (y);
3518 enum machine_mode srcmode;
3519 REAL_VALUE_TYPE r;
3520 int oldcost, newcost;
3521 bool speed = optimize_insn_for_speed_p ();
3522
3523 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3524
3525 if (targetm.legitimate_constant_p (dstmode, y))
3526 oldcost = set_src_cost (y, speed);
3527 else
3528 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3529
3530 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3531 srcmode != orig_srcmode;
3532 srcmode = GET_MODE_WIDER_MODE (srcmode))
3533 {
3534 enum insn_code ic;
3535 rtx trunc_y, last_insn;
3536
3537 /* Skip if the target can't extend this way. */
3538 ic = can_extend_p (dstmode, srcmode, 0);
3539 if (ic == CODE_FOR_nothing)
3540 continue;
3541
3542 /* Skip if the narrowed value isn't exact. */
3543 if (! exact_real_truncate (srcmode, &r))
3544 continue;
3545
3546 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3547
3548 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3549 {
3550 /* Skip if the target needs extra instructions to perform
3551 the extension. */
3552 if (!insn_operand_matches (ic, 1, trunc_y))
3553 continue;
3554 /* This is valid, but may not be cheaper than the original. */
3555 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3556 speed);
3557 if (oldcost < newcost)
3558 continue;
3559 }
3560 else if (float_extend_from_mem[dstmode][srcmode])
3561 {
3562 trunc_y = force_const_mem (srcmode, trunc_y);
3563 /* This is valid, but may not be cheaper than the original. */
3564 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3565 speed);
3566 if (oldcost < newcost)
3567 continue;
3568 trunc_y = validize_mem (trunc_y);
3569 }
3570 else
3571 continue;
3572
3573 /* For CSE's benefit, force the compressed constant pool entry
3574 into a new pseudo. This constant may be used in different modes,
3575 and if not, combine will put things back together for us. */
3576 trunc_y = force_reg (srcmode, trunc_y);
3577 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3578 last_insn = get_last_insn ();
3579
3580 if (REG_P (x))
3581 set_unique_reg_note (last_insn, REG_EQUAL, y);
3582
3583 return last_insn;
3584 }
3585
3586 return NULL_RTX;
3587 }
3588 \f
3589 /* Pushing data onto the stack. */
3590
3591 /* Push a block of length SIZE (perhaps variable)
3592 and return an rtx to address the beginning of the block.
3593 The value may be virtual_outgoing_args_rtx.
3594
3595 EXTRA is the number of bytes of padding to push in addition to SIZE.
3596 BELOW nonzero means this padding comes at low addresses;
3597 otherwise, the padding comes at high addresses. */
3598
3599 rtx
3600 push_block (rtx size, int extra, int below)
3601 {
3602 rtx temp;
3603
3604 size = convert_modes (Pmode, ptr_mode, size, 1);
3605 if (CONSTANT_P (size))
3606 anti_adjust_stack (plus_constant (Pmode, size, extra));
3607 else if (REG_P (size) && extra == 0)
3608 anti_adjust_stack (size);
3609 else
3610 {
3611 temp = copy_to_mode_reg (Pmode, size);
3612 if (extra != 0)
3613 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3614 temp, 0, OPTAB_LIB_WIDEN);
3615 anti_adjust_stack (temp);
3616 }
3617
3618 #ifndef STACK_GROWS_DOWNWARD
3619 if (0)
3620 #else
3621 if (1)
3622 #endif
3623 {
3624 temp = virtual_outgoing_args_rtx;
3625 if (extra != 0 && below)
3626 temp = plus_constant (Pmode, temp, extra);
3627 }
3628 else
3629 {
3630 if (CONST_INT_P (size))
3631 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
3632 -INTVAL (size) - (below ? 0 : extra));
3633 else if (extra != 0 && !below)
3634 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3635 negate_rtx (Pmode, plus_constant (Pmode, size,
3636 extra)));
3637 else
3638 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3639 negate_rtx (Pmode, size));
3640 }
3641
3642 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3643 }
3644
3645 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3646
3647 static rtx
3648 mem_autoinc_base (rtx mem)
3649 {
3650 if (MEM_P (mem))
3651 {
3652 rtx addr = XEXP (mem, 0);
3653 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3654 return XEXP (addr, 0);
3655 }
3656 return NULL;
3657 }
3658
3659 /* A utility routine used here, in reload, and in try_split. The insns
3660 after PREV up to and including LAST are known to adjust the stack,
3661 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3662 placing notes as appropriate. PREV may be NULL, indicating the
3663 entire insn sequence prior to LAST should be scanned.
3664
3665 The set of allowed stack pointer modifications is small:
3666 (1) One or more auto-inc style memory references (aka pushes),
3667 (2) One or more addition/subtraction with the SP as destination,
3668 (3) A single move insn with the SP as destination,
3669 (4) A call_pop insn,
3670 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3671
3672 Insns in the sequence that do not modify the SP are ignored,
3673 except for noreturn calls.
3674
3675 The return value is the amount of adjustment that can be trivially
3676 verified, via immediate operand or auto-inc. If the adjustment
3677 cannot be trivially extracted, the return value is INT_MIN. */
3678
3679 HOST_WIDE_INT
3680 find_args_size_adjust (rtx insn)
3681 {
3682 rtx dest, set, pat;
3683 int i;
3684
3685 pat = PATTERN (insn);
3686 set = NULL;
3687
3688 /* Look for a call_pop pattern. */
3689 if (CALL_P (insn))
3690 {
3691 /* We have to allow non-call_pop patterns for the case
3692 of emit_single_push_insn of a TLS address. */
3693 if (GET_CODE (pat) != PARALLEL)
3694 return 0;
3695
3696 /* All call_pop have a stack pointer adjust in the parallel.
3697 The call itself is always first, and the stack adjust is
3698 usually last, so search from the end. */
3699 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3700 {
3701 set = XVECEXP (pat, 0, i);
3702 if (GET_CODE (set) != SET)
3703 continue;
3704 dest = SET_DEST (set);
3705 if (dest == stack_pointer_rtx)
3706 break;
3707 }
3708 /* We'd better have found the stack pointer adjust. */
3709 if (i == 0)
3710 return 0;
3711 /* Fall through to process the extracted SET and DEST
3712 as if it was a standalone insn. */
3713 }
3714 else if (GET_CODE (pat) == SET)
3715 set = pat;
3716 else if ((set = single_set (insn)) != NULL)
3717 ;
3718 else if (GET_CODE (pat) == PARALLEL)
3719 {
3720 /* ??? Some older ports use a parallel with a stack adjust
3721 and a store for a PUSH_ROUNDING pattern, rather than a
3722 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3723 /* ??? See h8300 and m68k, pushqi1. */
3724 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3725 {
3726 set = XVECEXP (pat, 0, i);
3727 if (GET_CODE (set) != SET)
3728 continue;
3729 dest = SET_DEST (set);
3730 if (dest == stack_pointer_rtx)
3731 break;
3732
3733 /* We do not expect an auto-inc of the sp in the parallel. */
3734 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3735 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3736 != stack_pointer_rtx);
3737 }
3738 if (i < 0)
3739 return 0;
3740 }
3741 else
3742 return 0;
3743
3744 dest = SET_DEST (set);
3745
3746 /* Look for direct modifications of the stack pointer. */
3747 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3748 {
3749 /* Look for a trivial adjustment, otherwise assume nothing. */
3750 /* Note that the SPU restore_stack_block pattern refers to
3751 the stack pointer in V4SImode. Consider that non-trivial. */
3752 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3753 && GET_CODE (SET_SRC (set)) == PLUS
3754 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3755 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3756 return INTVAL (XEXP (SET_SRC (set), 1));
3757 /* ??? Reload can generate no-op moves, which will be cleaned
3758 up later. Recognize it and continue searching. */
3759 else if (rtx_equal_p (dest, SET_SRC (set)))
3760 return 0;
3761 else
3762 return HOST_WIDE_INT_MIN;
3763 }
3764 else
3765 {
3766 rtx mem, addr;
3767
3768 /* Otherwise only think about autoinc patterns. */
3769 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3770 {
3771 mem = dest;
3772 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3773 != stack_pointer_rtx);
3774 }
3775 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3776 mem = SET_SRC (set);
3777 else
3778 return 0;
3779
3780 addr = XEXP (mem, 0);
3781 switch (GET_CODE (addr))
3782 {
3783 case PRE_INC:
3784 case POST_INC:
3785 return GET_MODE_SIZE (GET_MODE (mem));
3786 case PRE_DEC:
3787 case POST_DEC:
3788 return -GET_MODE_SIZE (GET_MODE (mem));
3789 case PRE_MODIFY:
3790 case POST_MODIFY:
3791 addr = XEXP (addr, 1);
3792 gcc_assert (GET_CODE (addr) == PLUS);
3793 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3794 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3795 return INTVAL (XEXP (addr, 1));
3796 default:
3797 gcc_unreachable ();
3798 }
3799 }
3800 }
3801
3802 int
3803 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3804 {
3805 int args_size = end_args_size;
3806 bool saw_unknown = false;
3807 rtx insn;
3808
3809 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3810 {
3811 HOST_WIDE_INT this_delta;
3812
3813 if (!NONDEBUG_INSN_P (insn))
3814 continue;
3815
3816 this_delta = find_args_size_adjust (insn);
3817 if (this_delta == 0)
3818 {
3819 if (!CALL_P (insn)
3820 || ACCUMULATE_OUTGOING_ARGS
3821 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3822 continue;
3823 }
3824
3825 gcc_assert (!saw_unknown);
3826 if (this_delta == HOST_WIDE_INT_MIN)
3827 saw_unknown = true;
3828
3829 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3830 #ifdef STACK_GROWS_DOWNWARD
3831 this_delta = -this_delta;
3832 #endif
3833 args_size -= this_delta;
3834 }
3835
3836 return saw_unknown ? INT_MIN : args_size;
3837 }
3838
3839 #ifdef PUSH_ROUNDING
3840 /* Emit single push insn. */
3841
3842 static void
3843 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3844 {
3845 rtx dest_addr;
3846 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3847 rtx dest;
3848 enum insn_code icode;
3849
3850 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3851 /* If there is push pattern, use it. Otherwise try old way of throwing
3852 MEM representing push operation to move expander. */
3853 icode = optab_handler (push_optab, mode);
3854 if (icode != CODE_FOR_nothing)
3855 {
3856 struct expand_operand ops[1];
3857
3858 create_input_operand (&ops[0], x, mode);
3859 if (maybe_expand_insn (icode, 1, ops))
3860 return;
3861 }
3862 if (GET_MODE_SIZE (mode) == rounded_size)
3863 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3864 /* If we are to pad downward, adjust the stack pointer first and
3865 then store X into the stack location using an offset. This is
3866 because emit_move_insn does not know how to pad; it does not have
3867 access to type. */
3868 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3869 {
3870 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3871 HOST_WIDE_INT offset;
3872
3873 emit_move_insn (stack_pointer_rtx,
3874 expand_binop (Pmode,
3875 #ifdef STACK_GROWS_DOWNWARD
3876 sub_optab,
3877 #else
3878 add_optab,
3879 #endif
3880 stack_pointer_rtx,
3881 GEN_INT (rounded_size),
3882 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3883
3884 offset = (HOST_WIDE_INT) padding_size;
3885 #ifdef STACK_GROWS_DOWNWARD
3886 if (STACK_PUSH_CODE == POST_DEC)
3887 /* We have already decremented the stack pointer, so get the
3888 previous value. */
3889 offset += (HOST_WIDE_INT) rounded_size;
3890 #else
3891 if (STACK_PUSH_CODE == POST_INC)
3892 /* We have already incremented the stack pointer, so get the
3893 previous value. */
3894 offset -= (HOST_WIDE_INT) rounded_size;
3895 #endif
3896 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3897 }
3898 else
3899 {
3900 #ifdef STACK_GROWS_DOWNWARD
3901 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3902 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3903 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3904 #else
3905 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3906 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3907 GEN_INT (rounded_size));
3908 #endif
3909 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3910 }
3911
3912 dest = gen_rtx_MEM (mode, dest_addr);
3913
3914 if (type != 0)
3915 {
3916 set_mem_attributes (dest, type, 1);
3917
3918 if (flag_optimize_sibling_calls)
3919 /* Function incoming arguments may overlap with sibling call
3920 outgoing arguments and we cannot allow reordering of reads
3921 from function arguments with stores to outgoing arguments
3922 of sibling calls. */
3923 set_mem_alias_set (dest, 0);
3924 }
3925 emit_move_insn (dest, x);
3926 }
3927
3928 /* Emit and annotate a single push insn. */
3929
3930 static void
3931 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3932 {
3933 int delta, old_delta = stack_pointer_delta;
3934 rtx prev = get_last_insn ();
3935 rtx last;
3936
3937 emit_single_push_insn_1 (mode, x, type);
3938
3939 last = get_last_insn ();
3940
3941 /* Notice the common case where we emitted exactly one insn. */
3942 if (PREV_INSN (last) == prev)
3943 {
3944 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3945 return;
3946 }
3947
3948 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3949 gcc_assert (delta == INT_MIN || delta == old_delta);
3950 }
3951 #endif
3952
3953 /* Generate code to push X onto the stack, assuming it has mode MODE and
3954 type TYPE.
3955 MODE is redundant except when X is a CONST_INT (since they don't
3956 carry mode info).
3957 SIZE is an rtx for the size of data to be copied (in bytes),
3958 needed only if X is BLKmode.
3959
3960 ALIGN (in bits) is maximum alignment we can assume.
3961
3962 If PARTIAL and REG are both nonzero, then copy that many of the first
3963 bytes of X into registers starting with REG, and push the rest of X.
3964 The amount of space pushed is decreased by PARTIAL bytes.
3965 REG must be a hard register in this case.
3966 If REG is zero but PARTIAL is not, take any all others actions for an
3967 argument partially in registers, but do not actually load any
3968 registers.
3969
3970 EXTRA is the amount in bytes of extra space to leave next to this arg.
3971 This is ignored if an argument block has already been allocated.
3972
3973 On a machine that lacks real push insns, ARGS_ADDR is the address of
3974 the bottom of the argument block for this call. We use indexing off there
3975 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3976 argument block has not been preallocated.
3977
3978 ARGS_SO_FAR is the size of args previously pushed for this call.
3979
3980 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3981 for arguments passed in registers. If nonzero, it will be the number
3982 of bytes required. */
3983
3984 void
3985 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3986 unsigned int align, int partial, rtx reg, int extra,
3987 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3988 rtx alignment_pad)
3989 {
3990 rtx xinner;
3991 enum direction stack_direction
3992 #ifdef STACK_GROWS_DOWNWARD
3993 = downward;
3994 #else
3995 = upward;
3996 #endif
3997
3998 /* Decide where to pad the argument: `downward' for below,
3999 `upward' for above, or `none' for don't pad it.
4000 Default is below for small data on big-endian machines; else above. */
4001 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
4002
4003 /* Invert direction if stack is post-decrement.
4004 FIXME: why? */
4005 if (STACK_PUSH_CODE == POST_DEC)
4006 if (where_pad != none)
4007 where_pad = (where_pad == downward ? upward : downward);
4008
4009 xinner = x;
4010
4011 if (mode == BLKmode
4012 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4013 {
4014 /* Copy a block into the stack, entirely or partially. */
4015
4016 rtx temp;
4017 int used;
4018 int offset;
4019 int skip;
4020
4021 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4022 used = partial - offset;
4023
4024 if (mode != BLKmode)
4025 {
4026 /* A value is to be stored in an insufficiently aligned
4027 stack slot; copy via a suitably aligned slot if
4028 necessary. */
4029 size = GEN_INT (GET_MODE_SIZE (mode));
4030 if (!MEM_P (xinner))
4031 {
4032 temp = assign_temp (type, 1, 1);
4033 emit_move_insn (temp, xinner);
4034 xinner = temp;
4035 }
4036 }
4037
4038 gcc_assert (size);
4039
4040 /* USED is now the # of bytes we need not copy to the stack
4041 because registers will take care of them. */
4042
4043 if (partial != 0)
4044 xinner = adjust_address (xinner, BLKmode, used);
4045
4046 /* If the partial register-part of the arg counts in its stack size,
4047 skip the part of stack space corresponding to the registers.
4048 Otherwise, start copying to the beginning of the stack space,
4049 by setting SKIP to 0. */
4050 skip = (reg_parm_stack_space == 0) ? 0 : used;
4051
4052 #ifdef PUSH_ROUNDING
4053 /* Do it with several push insns if that doesn't take lots of insns
4054 and if there is no difficulty with push insns that skip bytes
4055 on the stack for alignment purposes. */
4056 if (args_addr == 0
4057 && PUSH_ARGS
4058 && CONST_INT_P (size)
4059 && skip == 0
4060 && MEM_ALIGN (xinner) >= align
4061 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
4062 /* Here we avoid the case of a structure whose weak alignment
4063 forces many pushes of a small amount of data,
4064 and such small pushes do rounding that causes trouble. */
4065 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4066 || align >= BIGGEST_ALIGNMENT
4067 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4068 == (align / BITS_PER_UNIT)))
4069 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4070 {
4071 /* Push padding now if padding above and stack grows down,
4072 or if padding below and stack grows up.
4073 But if space already allocated, this has already been done. */
4074 if (extra && args_addr == 0
4075 && where_pad != none && where_pad != stack_direction)
4076 anti_adjust_stack (GEN_INT (extra));
4077
4078 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4079 }
4080 else
4081 #endif /* PUSH_ROUNDING */
4082 {
4083 rtx target;
4084
4085 /* Otherwise make space on the stack and copy the data
4086 to the address of that space. */
4087
4088 /* Deduct words put into registers from the size we must copy. */
4089 if (partial != 0)
4090 {
4091 if (CONST_INT_P (size))
4092 size = GEN_INT (INTVAL (size) - used);
4093 else
4094 size = expand_binop (GET_MODE (size), sub_optab, size,
4095 GEN_INT (used), NULL_RTX, 0,
4096 OPTAB_LIB_WIDEN);
4097 }
4098
4099 /* Get the address of the stack space.
4100 In this case, we do not deal with EXTRA separately.
4101 A single stack adjust will do. */
4102 if (! args_addr)
4103 {
4104 temp = push_block (size, extra, where_pad == downward);
4105 extra = 0;
4106 }
4107 else if (CONST_INT_P (args_so_far))
4108 temp = memory_address (BLKmode,
4109 plus_constant (Pmode, args_addr,
4110 skip + INTVAL (args_so_far)));
4111 else
4112 temp = memory_address (BLKmode,
4113 plus_constant (Pmode,
4114 gen_rtx_PLUS (Pmode,
4115 args_addr,
4116 args_so_far),
4117 skip));
4118
4119 if (!ACCUMULATE_OUTGOING_ARGS)
4120 {
4121 /* If the source is referenced relative to the stack pointer,
4122 copy it to another register to stabilize it. We do not need
4123 to do this if we know that we won't be changing sp. */
4124
4125 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4126 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4127 temp = copy_to_reg (temp);
4128 }
4129
4130 target = gen_rtx_MEM (BLKmode, temp);
4131
4132 /* We do *not* set_mem_attributes here, because incoming arguments
4133 may overlap with sibling call outgoing arguments and we cannot
4134 allow reordering of reads from function arguments with stores
4135 to outgoing arguments of sibling calls. We do, however, want
4136 to record the alignment of the stack slot. */
4137 /* ALIGN may well be better aligned than TYPE, e.g. due to
4138 PARM_BOUNDARY. Assume the caller isn't lying. */
4139 set_mem_align (target, align);
4140
4141 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4142 }
4143 }
4144 else if (partial > 0)
4145 {
4146 /* Scalar partly in registers. */
4147
4148 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4149 int i;
4150 int not_stack;
4151 /* # bytes of start of argument
4152 that we must make space for but need not store. */
4153 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4154 int args_offset = INTVAL (args_so_far);
4155 int skip;
4156
4157 /* Push padding now if padding above and stack grows down,
4158 or if padding below and stack grows up.
4159 But if space already allocated, this has already been done. */
4160 if (extra && args_addr == 0
4161 && where_pad != none && where_pad != stack_direction)
4162 anti_adjust_stack (GEN_INT (extra));
4163
4164 /* If we make space by pushing it, we might as well push
4165 the real data. Otherwise, we can leave OFFSET nonzero
4166 and leave the space uninitialized. */
4167 if (args_addr == 0)
4168 offset = 0;
4169
4170 /* Now NOT_STACK gets the number of words that we don't need to
4171 allocate on the stack. Convert OFFSET to words too. */
4172 not_stack = (partial - offset) / UNITS_PER_WORD;
4173 offset /= UNITS_PER_WORD;
4174
4175 /* If the partial register-part of the arg counts in its stack size,
4176 skip the part of stack space corresponding to the registers.
4177 Otherwise, start copying to the beginning of the stack space,
4178 by setting SKIP to 0. */
4179 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4180
4181 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4182 x = validize_mem (force_const_mem (mode, x));
4183
4184 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4185 SUBREGs of such registers are not allowed. */
4186 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4187 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4188 x = copy_to_reg (x);
4189
4190 /* Loop over all the words allocated on the stack for this arg. */
4191 /* We can do it by words, because any scalar bigger than a word
4192 has a size a multiple of a word. */
4193 #ifndef PUSH_ARGS_REVERSED
4194 for (i = not_stack; i < size; i++)
4195 #else
4196 for (i = size - 1; i >= not_stack; i--)
4197 #endif
4198 if (i >= not_stack + offset)
4199 emit_push_insn (operand_subword_force (x, i, mode),
4200 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4201 0, args_addr,
4202 GEN_INT (args_offset + ((i - not_stack + skip)
4203 * UNITS_PER_WORD)),
4204 reg_parm_stack_space, alignment_pad);
4205 }
4206 else
4207 {
4208 rtx addr;
4209 rtx dest;
4210
4211 /* Push padding now if padding above and stack grows down,
4212 or if padding below and stack grows up.
4213 But if space already allocated, this has already been done. */
4214 if (extra && args_addr == 0
4215 && where_pad != none && where_pad != stack_direction)
4216 anti_adjust_stack (GEN_INT (extra));
4217
4218 #ifdef PUSH_ROUNDING
4219 if (args_addr == 0 && PUSH_ARGS)
4220 emit_single_push_insn (mode, x, type);
4221 else
4222 #endif
4223 {
4224 if (CONST_INT_P (args_so_far))
4225 addr
4226 = memory_address (mode,
4227 plus_constant (Pmode, args_addr,
4228 INTVAL (args_so_far)));
4229 else
4230 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4231 args_so_far));
4232 dest = gen_rtx_MEM (mode, addr);
4233
4234 /* We do *not* set_mem_attributes here, because incoming arguments
4235 may overlap with sibling call outgoing arguments and we cannot
4236 allow reordering of reads from function arguments with stores
4237 to outgoing arguments of sibling calls. We do, however, want
4238 to record the alignment of the stack slot. */
4239 /* ALIGN may well be better aligned than TYPE, e.g. due to
4240 PARM_BOUNDARY. Assume the caller isn't lying. */
4241 set_mem_align (dest, align);
4242
4243 emit_move_insn (dest, x);
4244 }
4245 }
4246
4247 /* If part should go in registers, copy that part
4248 into the appropriate registers. Do this now, at the end,
4249 since mem-to-mem copies above may do function calls. */
4250 if (partial > 0 && reg != 0)
4251 {
4252 /* Handle calls that pass values in multiple non-contiguous locations.
4253 The Irix 6 ABI has examples of this. */
4254 if (GET_CODE (reg) == PARALLEL)
4255 emit_group_load (reg, x, type, -1);
4256 else
4257 {
4258 gcc_assert (partial % UNITS_PER_WORD == 0);
4259 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4260 }
4261 }
4262
4263 if (extra && args_addr == 0 && where_pad == stack_direction)
4264 anti_adjust_stack (GEN_INT (extra));
4265
4266 if (alignment_pad && args_addr == 0)
4267 anti_adjust_stack (alignment_pad);
4268 }
4269 \f
4270 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4271 operations. */
4272
4273 static rtx
4274 get_subtarget (rtx x)
4275 {
4276 return (optimize
4277 || x == 0
4278 /* Only registers can be subtargets. */
4279 || !REG_P (x)
4280 /* Don't use hard regs to avoid extending their life. */
4281 || REGNO (x) < FIRST_PSEUDO_REGISTER
4282 ? 0 : x);
4283 }
4284
4285 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4286 FIELD is a bitfield. Returns true if the optimization was successful,
4287 and there's nothing else to do. */
4288
4289 static bool
4290 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4291 unsigned HOST_WIDE_INT bitpos,
4292 unsigned HOST_WIDE_INT bitregion_start,
4293 unsigned HOST_WIDE_INT bitregion_end,
4294 enum machine_mode mode1, rtx str_rtx,
4295 tree to, tree src)
4296 {
4297 enum machine_mode str_mode = GET_MODE (str_rtx);
4298 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4299 tree op0, op1;
4300 rtx value, result;
4301 optab binop;
4302 gimple srcstmt;
4303 enum tree_code code;
4304
4305 if (mode1 != VOIDmode
4306 || bitsize >= BITS_PER_WORD
4307 || str_bitsize > BITS_PER_WORD
4308 || TREE_SIDE_EFFECTS (to)
4309 || TREE_THIS_VOLATILE (to))
4310 return false;
4311
4312 STRIP_NOPS (src);
4313 if (TREE_CODE (src) != SSA_NAME)
4314 return false;
4315 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4316 return false;
4317
4318 srcstmt = get_gimple_for_ssa_name (src);
4319 if (!srcstmt
4320 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4321 return false;
4322
4323 code = gimple_assign_rhs_code (srcstmt);
4324
4325 op0 = gimple_assign_rhs1 (srcstmt);
4326
4327 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4328 to find its initialization. Hopefully the initialization will
4329 be from a bitfield load. */
4330 if (TREE_CODE (op0) == SSA_NAME)
4331 {
4332 gimple op0stmt = get_gimple_for_ssa_name (op0);
4333
4334 /* We want to eventually have OP0 be the same as TO, which
4335 should be a bitfield. */
4336 if (!op0stmt
4337 || !is_gimple_assign (op0stmt)
4338 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4339 return false;
4340 op0 = gimple_assign_rhs1 (op0stmt);
4341 }
4342
4343 op1 = gimple_assign_rhs2 (srcstmt);
4344
4345 if (!operand_equal_p (to, op0, 0))
4346 return false;
4347
4348 if (MEM_P (str_rtx))
4349 {
4350 unsigned HOST_WIDE_INT offset1;
4351
4352 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4353 str_mode = word_mode;
4354 str_mode = get_best_mode (bitsize, bitpos,
4355 bitregion_start, bitregion_end,
4356 MEM_ALIGN (str_rtx), str_mode, 0);
4357 if (str_mode == VOIDmode)
4358 return false;
4359 str_bitsize = GET_MODE_BITSIZE (str_mode);
4360
4361 offset1 = bitpos;
4362 bitpos %= str_bitsize;
4363 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4364 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4365 }
4366 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4367 return false;
4368
4369 /* If the bit field covers the whole REG/MEM, store_field
4370 will likely generate better code. */
4371 if (bitsize >= str_bitsize)
4372 return false;
4373
4374 /* We can't handle fields split across multiple entities. */
4375 if (bitpos + bitsize > str_bitsize)
4376 return false;
4377
4378 if (BYTES_BIG_ENDIAN)
4379 bitpos = str_bitsize - bitpos - bitsize;
4380
4381 switch (code)
4382 {
4383 case PLUS_EXPR:
4384 case MINUS_EXPR:
4385 /* For now, just optimize the case of the topmost bitfield
4386 where we don't need to do any masking and also
4387 1 bit bitfields where xor can be used.
4388 We might win by one instruction for the other bitfields
4389 too if insv/extv instructions aren't used, so that
4390 can be added later. */
4391 if (bitpos + bitsize != str_bitsize
4392 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4393 break;
4394
4395 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4396 value = convert_modes (str_mode,
4397 TYPE_MODE (TREE_TYPE (op1)), value,
4398 TYPE_UNSIGNED (TREE_TYPE (op1)));
4399
4400 /* We may be accessing data outside the field, which means
4401 we can alias adjacent data. */
4402 if (MEM_P (str_rtx))
4403 {
4404 str_rtx = shallow_copy_rtx (str_rtx);
4405 set_mem_alias_set (str_rtx, 0);
4406 set_mem_expr (str_rtx, 0);
4407 }
4408
4409 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4410 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4411 {
4412 value = expand_and (str_mode, value, const1_rtx, NULL);
4413 binop = xor_optab;
4414 }
4415 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4416 result = expand_binop (str_mode, binop, str_rtx,
4417 value, str_rtx, 1, OPTAB_WIDEN);
4418 if (result != str_rtx)
4419 emit_move_insn (str_rtx, result);
4420 return true;
4421
4422 case BIT_IOR_EXPR:
4423 case BIT_XOR_EXPR:
4424 if (TREE_CODE (op1) != INTEGER_CST)
4425 break;
4426 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4427 value = convert_modes (str_mode,
4428 TYPE_MODE (TREE_TYPE (op1)), value,
4429 TYPE_UNSIGNED (TREE_TYPE (op1)));
4430
4431 /* We may be accessing data outside the field, which means
4432 we can alias adjacent data. */
4433 if (MEM_P (str_rtx))
4434 {
4435 str_rtx = shallow_copy_rtx (str_rtx);
4436 set_mem_alias_set (str_rtx, 0);
4437 set_mem_expr (str_rtx, 0);
4438 }
4439
4440 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4441 if (bitpos + bitsize != str_bitsize)
4442 {
4443 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1);
4444 value = expand_and (str_mode, value, mask, NULL_RTX);
4445 }
4446 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4447 result = expand_binop (str_mode, binop, str_rtx,
4448 value, str_rtx, 1, OPTAB_WIDEN);
4449 if (result != str_rtx)
4450 emit_move_insn (str_rtx, result);
4451 return true;
4452
4453 default:
4454 break;
4455 }
4456
4457 return false;
4458 }
4459
4460 /* In the C++ memory model, consecutive bit fields in a structure are
4461 considered one memory location.
4462
4463 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4464 returns the bit range of consecutive bits in which this COMPONENT_REF
4465 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4466 and *OFFSET may be adjusted in the process.
4467
4468 If the access does not need to be restricted, 0 is returned in both
4469 *BITSTART and *BITEND. */
4470
4471 static void
4472 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4473 unsigned HOST_WIDE_INT *bitend,
4474 tree exp,
4475 HOST_WIDE_INT *bitpos,
4476 tree *offset)
4477 {
4478 HOST_WIDE_INT bitoffset;
4479 tree field, repr;
4480
4481 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4482
4483 field = TREE_OPERAND (exp, 1);
4484 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4485 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4486 need to limit the range we can access. */
4487 if (!repr)
4488 {
4489 *bitstart = *bitend = 0;
4490 return;
4491 }
4492
4493 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4494 part of a larger bit field, then the representative does not serve any
4495 useful purpose. This can occur in Ada. */
4496 if (handled_component_p (TREE_OPERAND (exp, 0)))
4497 {
4498 enum machine_mode rmode;
4499 HOST_WIDE_INT rbitsize, rbitpos;
4500 tree roffset;
4501 int unsignedp;
4502 int volatilep = 0;
4503 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4504 &roffset, &rmode, &unsignedp, &volatilep, false);
4505 if ((rbitpos % BITS_PER_UNIT) != 0)
4506 {
4507 *bitstart = *bitend = 0;
4508 return;
4509 }
4510 }
4511
4512 /* Compute the adjustment to bitpos from the offset of the field
4513 relative to the representative. DECL_FIELD_OFFSET of field and
4514 repr are the same by construction if they are not constants,
4515 see finish_bitfield_layout. */
4516 if (host_integerp (DECL_FIELD_OFFSET (field), 1)
4517 && host_integerp (DECL_FIELD_OFFSET (repr), 1))
4518 bitoffset = (tree_low_cst (DECL_FIELD_OFFSET (field), 1)
4519 - tree_low_cst (DECL_FIELD_OFFSET (repr), 1)) * BITS_PER_UNIT;
4520 else
4521 bitoffset = 0;
4522 bitoffset += (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
4523 - tree_low_cst (DECL_FIELD_BIT_OFFSET (repr), 1));
4524
4525 /* If the adjustment is larger than bitpos, we would have a negative bit
4526 position for the lower bound and this may wreak havoc later. This can
4527 occur only if we have a non-null offset, so adjust offset and bitpos
4528 to make the lower bound non-negative. */
4529 if (bitoffset > *bitpos)
4530 {
4531 HOST_WIDE_INT adjust = bitoffset - *bitpos;
4532
4533 gcc_assert ((adjust % BITS_PER_UNIT) == 0);
4534 gcc_assert (*offset != NULL_TREE);
4535
4536 *bitpos += adjust;
4537 *offset
4538 = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));
4539 *bitstart = 0;
4540 }
4541 else
4542 *bitstart = *bitpos - bitoffset;
4543
4544 *bitend = *bitstart + tree_low_cst (DECL_SIZE (repr), 1) - 1;
4545 }
4546
4547 /* Returns true if the MEM_REF REF refers to an object that does not
4548 reside in memory and has non-BLKmode. */
4549
4550 static bool
4551 mem_ref_refers_to_non_mem_p (tree ref)
4552 {
4553 tree base = TREE_OPERAND (ref, 0);
4554 if (TREE_CODE (base) != ADDR_EXPR)
4555 return false;
4556 base = TREE_OPERAND (base, 0);
4557 return (DECL_P (base)
4558 && !TREE_ADDRESSABLE (base)
4559 && DECL_MODE (base) != BLKmode
4560 && DECL_RTL_SET_P (base)
4561 && !MEM_P (DECL_RTL (base)));
4562 }
4563
4564 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4565 is true, try generating a nontemporal store. */
4566
4567 void
4568 expand_assignment (tree to, tree from, bool nontemporal)
4569 {
4570 rtx to_rtx = 0;
4571 rtx result;
4572 enum machine_mode mode;
4573 unsigned int align;
4574 enum insn_code icode;
4575
4576 /* Don't crash if the lhs of the assignment was erroneous. */
4577 if (TREE_CODE (to) == ERROR_MARK)
4578 {
4579 expand_normal (from);
4580 return;
4581 }
4582
4583 /* Optimize away no-op moves without side-effects. */
4584 if (operand_equal_p (to, from, 0))
4585 return;
4586
4587 /* Handle misaligned stores. */
4588 mode = TYPE_MODE (TREE_TYPE (to));
4589 if ((TREE_CODE (to) == MEM_REF
4590 || TREE_CODE (to) == TARGET_MEM_REF)
4591 && mode != BLKmode
4592 && !mem_ref_refers_to_non_mem_p (to)
4593 && ((align = get_object_alignment (to))
4594 < GET_MODE_ALIGNMENT (mode))
4595 && (((icode = optab_handler (movmisalign_optab, mode))
4596 != CODE_FOR_nothing)
4597 || SLOW_UNALIGNED_ACCESS (mode, align)))
4598 {
4599 rtx reg, mem;
4600
4601 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4602 reg = force_not_mem (reg);
4603 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4604
4605 if (icode != CODE_FOR_nothing)
4606 {
4607 struct expand_operand ops[2];
4608
4609 create_fixed_operand (&ops[0], mem);
4610 create_input_operand (&ops[1], reg, mode);
4611 /* The movmisalign<mode> pattern cannot fail, else the assignment
4612 would silently be omitted. */
4613 expand_insn (icode, 2, ops);
4614 }
4615 else
4616 store_bit_field (mem, GET_MODE_BITSIZE (mode),
4617 0, 0, 0, mode, reg);
4618 return;
4619 }
4620
4621 /* Assignment of a structure component needs special treatment
4622 if the structure component's rtx is not simply a MEM.
4623 Assignment of an array element at a constant index, and assignment of
4624 an array element in an unaligned packed structure field, has the same
4625 problem. Same for (partially) storing into a non-memory object. */
4626 if (handled_component_p (to)
4627 || (TREE_CODE (to) == MEM_REF
4628 && mem_ref_refers_to_non_mem_p (to))
4629 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4630 {
4631 enum machine_mode mode1;
4632 HOST_WIDE_INT bitsize, bitpos;
4633 unsigned HOST_WIDE_INT bitregion_start = 0;
4634 unsigned HOST_WIDE_INT bitregion_end = 0;
4635 tree offset;
4636 int unsignedp;
4637 int volatilep = 0;
4638 tree tem;
4639 bool misalignp;
4640 rtx mem = NULL_RTX;
4641
4642 push_temp_slots ();
4643 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4644 &unsignedp, &volatilep, true);
4645
4646 if (TREE_CODE (to) == COMPONENT_REF
4647 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4648 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
4649
4650 /* If we are going to use store_bit_field and extract_bit_field,
4651 make sure to_rtx will be safe for multiple use. */
4652 mode = TYPE_MODE (TREE_TYPE (tem));
4653 if (TREE_CODE (tem) == MEM_REF
4654 && mode != BLKmode
4655 && ((align = get_object_alignment (tem))
4656 < GET_MODE_ALIGNMENT (mode))
4657 && ((icode = optab_handler (movmisalign_optab, mode))
4658 != CODE_FOR_nothing))
4659 {
4660 struct expand_operand ops[2];
4661
4662 misalignp = true;
4663 to_rtx = gen_reg_rtx (mode);
4664 mem = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4665
4666 /* If the misaligned store doesn't overwrite all bits, perform
4667 rmw cycle on MEM. */
4668 if (bitsize != GET_MODE_BITSIZE (mode))
4669 {
4670 create_input_operand (&ops[0], to_rtx, mode);
4671 create_fixed_operand (&ops[1], mem);
4672 /* The movmisalign<mode> pattern cannot fail, else the assignment
4673 would silently be omitted. */
4674 expand_insn (icode, 2, ops);
4675
4676 mem = copy_rtx (mem);
4677 }
4678 }
4679 else
4680 {
4681 misalignp = false;
4682 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4683 }
4684
4685 /* If the bitfield is volatile, we want to access it in the
4686 field's mode, not the computed mode.
4687 If a MEM has VOIDmode (external with incomplete type),
4688 use BLKmode for it instead. */
4689 if (MEM_P (to_rtx))
4690 {
4691 if (volatilep && flag_strict_volatile_bitfields > 0)
4692 to_rtx = adjust_address (to_rtx, mode1, 0);
4693 else if (GET_MODE (to_rtx) == VOIDmode)
4694 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4695 }
4696
4697 if (offset != 0)
4698 {
4699 enum machine_mode address_mode;
4700 rtx offset_rtx;
4701
4702 if (!MEM_P (to_rtx))
4703 {
4704 /* We can get constant negative offsets into arrays with broken
4705 user code. Translate this to a trap instead of ICEing. */
4706 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4707 expand_builtin_trap ();
4708 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4709 }
4710
4711 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4712 address_mode = get_address_mode (to_rtx);
4713 if (GET_MODE (offset_rtx) != address_mode)
4714 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4715
4716 /* A constant address in TO_RTX can have VOIDmode, we must not try
4717 to call force_reg for that case. Avoid that case. */
4718 if (MEM_P (to_rtx)
4719 && GET_MODE (to_rtx) == BLKmode
4720 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4721 && bitsize > 0
4722 && (bitpos % bitsize) == 0
4723 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4724 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4725 {
4726 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4727 bitpos = 0;
4728 }
4729
4730 to_rtx = offset_address (to_rtx, offset_rtx,
4731 highest_pow2_factor_for_target (to,
4732 offset));
4733 }
4734
4735 /* No action is needed if the target is not a memory and the field
4736 lies completely outside that target. This can occur if the source
4737 code contains an out-of-bounds access to a small array. */
4738 if (!MEM_P (to_rtx)
4739 && GET_MODE (to_rtx) != BLKmode
4740 && (unsigned HOST_WIDE_INT) bitpos
4741 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4742 {
4743 expand_normal (from);
4744 result = NULL;
4745 }
4746 /* Handle expand_expr of a complex value returning a CONCAT. */
4747 else if (GET_CODE (to_rtx) == CONCAT)
4748 {
4749 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4750 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4751 && bitpos == 0
4752 && bitsize == mode_bitsize)
4753 result = store_expr (from, to_rtx, false, nontemporal);
4754 else if (bitsize == mode_bitsize / 2
4755 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4756 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4757 nontemporal);
4758 else if (bitpos + bitsize <= mode_bitsize / 2)
4759 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4760 bitregion_start, bitregion_end,
4761 mode1, from, TREE_TYPE (tem),
4762 get_alias_set (to), nontemporal);
4763 else if (bitpos >= mode_bitsize / 2)
4764 result = store_field (XEXP (to_rtx, 1), bitsize,
4765 bitpos - mode_bitsize / 2,
4766 bitregion_start, bitregion_end,
4767 mode1, from,
4768 TREE_TYPE (tem), get_alias_set (to),
4769 nontemporal);
4770 else if (bitpos == 0 && bitsize == mode_bitsize)
4771 {
4772 rtx from_rtx;
4773 result = expand_normal (from);
4774 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4775 TYPE_MODE (TREE_TYPE (from)), 0);
4776 emit_move_insn (XEXP (to_rtx, 0),
4777 read_complex_part (from_rtx, false));
4778 emit_move_insn (XEXP (to_rtx, 1),
4779 read_complex_part (from_rtx, true));
4780 }
4781 else
4782 {
4783 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4784 GET_MODE_SIZE (GET_MODE (to_rtx)));
4785 write_complex_part (temp, XEXP (to_rtx, 0), false);
4786 write_complex_part (temp, XEXP (to_rtx, 1), true);
4787 result = store_field (temp, bitsize, bitpos,
4788 bitregion_start, bitregion_end,
4789 mode1, from,
4790 TREE_TYPE (tem), get_alias_set (to),
4791 nontemporal);
4792 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4793 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4794 }
4795 }
4796 else
4797 {
4798 if (MEM_P (to_rtx))
4799 {
4800 /* If the field is at offset zero, we could have been given the
4801 DECL_RTX of the parent struct. Don't munge it. */
4802 to_rtx = shallow_copy_rtx (to_rtx);
4803
4804 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4805
4806 /* Deal with volatile and readonly fields. The former is only
4807 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4808 if (volatilep)
4809 MEM_VOLATILE_P (to_rtx) = 1;
4810 if (component_uses_parent_alias_set (to))
4811 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4812 }
4813
4814 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4815 bitregion_start, bitregion_end,
4816 mode1,
4817 to_rtx, to, from))
4818 result = NULL;
4819 else
4820 result = store_field (to_rtx, bitsize, bitpos,
4821 bitregion_start, bitregion_end,
4822 mode1, from,
4823 TREE_TYPE (tem), get_alias_set (to),
4824 nontemporal);
4825 }
4826
4827 if (misalignp)
4828 {
4829 struct expand_operand ops[2];
4830
4831 create_fixed_operand (&ops[0], mem);
4832 create_input_operand (&ops[1], to_rtx, mode);
4833 /* The movmisalign<mode> pattern cannot fail, else the assignment
4834 would silently be omitted. */
4835 expand_insn (icode, 2, ops);
4836 }
4837
4838 if (result)
4839 preserve_temp_slots (result);
4840 pop_temp_slots ();
4841 return;
4842 }
4843
4844 /* If the rhs is a function call and its value is not an aggregate,
4845 call the function before we start to compute the lhs.
4846 This is needed for correct code for cases such as
4847 val = setjmp (buf) on machines where reference to val
4848 requires loading up part of an address in a separate insn.
4849
4850 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4851 since it might be a promoted variable where the zero- or sign- extension
4852 needs to be done. Handling this in the normal way is safe because no
4853 computation is done before the call. The same is true for SSA names. */
4854 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4855 && COMPLETE_TYPE_P (TREE_TYPE (from))
4856 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4857 && ! (((TREE_CODE (to) == VAR_DECL
4858 || TREE_CODE (to) == PARM_DECL
4859 || TREE_CODE (to) == RESULT_DECL)
4860 && REG_P (DECL_RTL (to)))
4861 || TREE_CODE (to) == SSA_NAME))
4862 {
4863 rtx value;
4864
4865 push_temp_slots ();
4866 value = expand_normal (from);
4867 if (to_rtx == 0)
4868 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4869
4870 /* Handle calls that return values in multiple non-contiguous locations.
4871 The Irix 6 ABI has examples of this. */
4872 if (GET_CODE (to_rtx) == PARALLEL)
4873 emit_group_load (to_rtx, value, TREE_TYPE (from),
4874 int_size_in_bytes (TREE_TYPE (from)));
4875 else if (GET_MODE (to_rtx) == BLKmode)
4876 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4877 else
4878 {
4879 if (POINTER_TYPE_P (TREE_TYPE (to)))
4880 value = convert_memory_address_addr_space
4881 (GET_MODE (to_rtx), value,
4882 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4883
4884 emit_move_insn (to_rtx, value);
4885 }
4886 preserve_temp_slots (to_rtx);
4887 pop_temp_slots ();
4888 return;
4889 }
4890
4891 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
4892 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4893
4894 /* Don't move directly into a return register. */
4895 if (TREE_CODE (to) == RESULT_DECL
4896 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4897 {
4898 rtx temp;
4899
4900 push_temp_slots ();
4901 if (REG_P (to_rtx) && TYPE_MODE (TREE_TYPE (from)) == BLKmode)
4902 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
4903 else
4904 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4905
4906 if (GET_CODE (to_rtx) == PARALLEL)
4907 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4908 int_size_in_bytes (TREE_TYPE (from)));
4909 else if (temp)
4910 emit_move_insn (to_rtx, temp);
4911
4912 preserve_temp_slots (to_rtx);
4913 pop_temp_slots ();
4914 return;
4915 }
4916
4917 /* In case we are returning the contents of an object which overlaps
4918 the place the value is being stored, use a safe function when copying
4919 a value through a pointer into a structure value return block. */
4920 if (TREE_CODE (to) == RESULT_DECL
4921 && TREE_CODE (from) == INDIRECT_REF
4922 && ADDR_SPACE_GENERIC_P
4923 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4924 && refs_may_alias_p (to, from)
4925 && cfun->returns_struct
4926 && !cfun->returns_pcc_struct)
4927 {
4928 rtx from_rtx, size;
4929
4930 push_temp_slots ();
4931 size = expr_size (from);
4932 from_rtx = expand_normal (from);
4933
4934 emit_library_call (memmove_libfunc, LCT_NORMAL,
4935 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4936 XEXP (from_rtx, 0), Pmode,
4937 convert_to_mode (TYPE_MODE (sizetype),
4938 size, TYPE_UNSIGNED (sizetype)),
4939 TYPE_MODE (sizetype));
4940
4941 preserve_temp_slots (to_rtx);
4942 pop_temp_slots ();
4943 return;
4944 }
4945
4946 /* Compute FROM and store the value in the rtx we got. */
4947
4948 push_temp_slots ();
4949 result = store_expr (from, to_rtx, 0, nontemporal);
4950 preserve_temp_slots (result);
4951 pop_temp_slots ();
4952 return;
4953 }
4954
4955 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4956 succeeded, false otherwise. */
4957
4958 bool
4959 emit_storent_insn (rtx to, rtx from)
4960 {
4961 struct expand_operand ops[2];
4962 enum machine_mode mode = GET_MODE (to);
4963 enum insn_code code = optab_handler (storent_optab, mode);
4964
4965 if (code == CODE_FOR_nothing)
4966 return false;
4967
4968 create_fixed_operand (&ops[0], to);
4969 create_input_operand (&ops[1], from, mode);
4970 return maybe_expand_insn (code, 2, ops);
4971 }
4972
4973 /* Generate code for computing expression EXP,
4974 and storing the value into TARGET.
4975
4976 If the mode is BLKmode then we may return TARGET itself.
4977 It turns out that in BLKmode it doesn't cause a problem.
4978 because C has no operators that could combine two different
4979 assignments into the same BLKmode object with different values
4980 with no sequence point. Will other languages need this to
4981 be more thorough?
4982
4983 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4984 stack, and block moves may need to be treated specially.
4985
4986 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4987
4988 rtx
4989 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4990 {
4991 rtx temp;
4992 rtx alt_rtl = NULL_RTX;
4993 location_t loc = EXPR_LOCATION (exp);
4994
4995 if (VOID_TYPE_P (TREE_TYPE (exp)))
4996 {
4997 /* C++ can generate ?: expressions with a throw expression in one
4998 branch and an rvalue in the other. Here, we resolve attempts to
4999 store the throw expression's nonexistent result. */
5000 gcc_assert (!call_param_p);
5001 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5002 return NULL_RTX;
5003 }
5004 if (TREE_CODE (exp) == COMPOUND_EXPR)
5005 {
5006 /* Perform first part of compound expression, then assign from second
5007 part. */
5008 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5009 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5010 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5011 nontemporal);
5012 }
5013 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5014 {
5015 /* For conditional expression, get safe form of the target. Then
5016 test the condition, doing the appropriate assignment on either
5017 side. This avoids the creation of unnecessary temporaries.
5018 For non-BLKmode, it is more efficient not to do this. */
5019
5020 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
5021
5022 do_pending_stack_adjust ();
5023 NO_DEFER_POP;
5024 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5025 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5026 nontemporal);
5027 emit_jump_insn (gen_jump (lab2));
5028 emit_barrier ();
5029 emit_label (lab1);
5030 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5031 nontemporal);
5032 emit_label (lab2);
5033 OK_DEFER_POP;
5034
5035 return NULL_RTX;
5036 }
5037 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5038 /* If this is a scalar in a register that is stored in a wider mode
5039 than the declared mode, compute the result into its declared mode
5040 and then convert to the wider mode. Our value is the computed
5041 expression. */
5042 {
5043 rtx inner_target = 0;
5044
5045 /* We can do the conversion inside EXP, which will often result
5046 in some optimizations. Do the conversion in two steps: first
5047 change the signedness, if needed, then the extend. But don't
5048 do this if the type of EXP is a subtype of something else
5049 since then the conversion might involve more than just
5050 converting modes. */
5051 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5052 && TREE_TYPE (TREE_TYPE (exp)) == 0
5053 && GET_MODE_PRECISION (GET_MODE (target))
5054 == TYPE_PRECISION (TREE_TYPE (exp)))
5055 {
5056 if (TYPE_UNSIGNED (TREE_TYPE (exp))
5057 != SUBREG_PROMOTED_UNSIGNED_P (target))
5058 {
5059 /* Some types, e.g. Fortran's logical*4, won't have a signed
5060 version, so use the mode instead. */
5061 tree ntype
5062 = (signed_or_unsigned_type_for
5063 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
5064 if (ntype == NULL)
5065 ntype = lang_hooks.types.type_for_mode
5066 (TYPE_MODE (TREE_TYPE (exp)),
5067 SUBREG_PROMOTED_UNSIGNED_P (target));
5068
5069 exp = fold_convert_loc (loc, ntype, exp);
5070 }
5071
5072 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5073 (GET_MODE (SUBREG_REG (target)),
5074 SUBREG_PROMOTED_UNSIGNED_P (target)),
5075 exp);
5076
5077 inner_target = SUBREG_REG (target);
5078 }
5079
5080 temp = expand_expr (exp, inner_target, VOIDmode,
5081 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5082
5083 /* If TEMP is a VOIDmode constant, use convert_modes to make
5084 sure that we properly convert it. */
5085 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5086 {
5087 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5088 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
5089 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5090 GET_MODE (target), temp,
5091 SUBREG_PROMOTED_UNSIGNED_P (target));
5092 }
5093
5094 convert_move (SUBREG_REG (target), temp,
5095 SUBREG_PROMOTED_UNSIGNED_P (target));
5096
5097 return NULL_RTX;
5098 }
5099 else if ((TREE_CODE (exp) == STRING_CST
5100 || (TREE_CODE (exp) == MEM_REF
5101 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5102 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5103 == STRING_CST
5104 && integer_zerop (TREE_OPERAND (exp, 1))))
5105 && !nontemporal && !call_param_p
5106 && MEM_P (target))
5107 {
5108 /* Optimize initialization of an array with a STRING_CST. */
5109 HOST_WIDE_INT exp_len, str_copy_len;
5110 rtx dest_mem;
5111 tree str = TREE_CODE (exp) == STRING_CST
5112 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5113
5114 exp_len = int_expr_size (exp);
5115 if (exp_len <= 0)
5116 goto normal_expr;
5117
5118 if (TREE_STRING_LENGTH (str) <= 0)
5119 goto normal_expr;
5120
5121 str_copy_len = strlen (TREE_STRING_POINTER (str));
5122 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5123 goto normal_expr;
5124
5125 str_copy_len = TREE_STRING_LENGTH (str);
5126 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5127 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5128 {
5129 str_copy_len += STORE_MAX_PIECES - 1;
5130 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5131 }
5132 str_copy_len = MIN (str_copy_len, exp_len);
5133 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5134 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5135 MEM_ALIGN (target), false))
5136 goto normal_expr;
5137
5138 dest_mem = target;
5139
5140 dest_mem = store_by_pieces (dest_mem,
5141 str_copy_len, builtin_strncpy_read_str,
5142 CONST_CAST (char *,
5143 TREE_STRING_POINTER (str)),
5144 MEM_ALIGN (target), false,
5145 exp_len > str_copy_len ? 1 : 0);
5146 if (exp_len > str_copy_len)
5147 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5148 GEN_INT (exp_len - str_copy_len),
5149 BLOCK_OP_NORMAL);
5150 return NULL_RTX;
5151 }
5152 else
5153 {
5154 rtx tmp_target;
5155
5156 normal_expr:
5157 /* If we want to use a nontemporal store, force the value to
5158 register first. */
5159 tmp_target = nontemporal ? NULL_RTX : target;
5160 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5161 (call_param_p
5162 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5163 &alt_rtl);
5164 }
5165
5166 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5167 the same as that of TARGET, adjust the constant. This is needed, for
5168 example, in case it is a CONST_DOUBLE and we want only a word-sized
5169 value. */
5170 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5171 && TREE_CODE (exp) != ERROR_MARK
5172 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5173 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5174 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5175
5176 /* If value was not generated in the target, store it there.
5177 Convert the value to TARGET's type first if necessary and emit the
5178 pending incrementations that have been queued when expanding EXP.
5179 Note that we cannot emit the whole queue blindly because this will
5180 effectively disable the POST_INC optimization later.
5181
5182 If TEMP and TARGET compare equal according to rtx_equal_p, but
5183 one or both of them are volatile memory refs, we have to distinguish
5184 two cases:
5185 - expand_expr has used TARGET. In this case, we must not generate
5186 another copy. This can be detected by TARGET being equal according
5187 to == .
5188 - expand_expr has not used TARGET - that means that the source just
5189 happens to have the same RTX form. Since temp will have been created
5190 by expand_expr, it will compare unequal according to == .
5191 We must generate a copy in this case, to reach the correct number
5192 of volatile memory references. */
5193
5194 if ((! rtx_equal_p (temp, target)
5195 || (temp != target && (side_effects_p (temp)
5196 || side_effects_p (target))))
5197 && TREE_CODE (exp) != ERROR_MARK
5198 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5199 but TARGET is not valid memory reference, TEMP will differ
5200 from TARGET although it is really the same location. */
5201 && !(alt_rtl
5202 && rtx_equal_p (alt_rtl, target)
5203 && !side_effects_p (alt_rtl)
5204 && !side_effects_p (target))
5205 /* If there's nothing to copy, don't bother. Don't call
5206 expr_size unless necessary, because some front-ends (C++)
5207 expr_size-hook must not be given objects that are not
5208 supposed to be bit-copied or bit-initialized. */
5209 && expr_size (exp) != const0_rtx)
5210 {
5211 if (GET_MODE (temp) != GET_MODE (target)
5212 && GET_MODE (temp) != VOIDmode)
5213 {
5214 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5215 if (GET_MODE (target) == BLKmode
5216 && GET_MODE (temp) == BLKmode)
5217 emit_block_move (target, temp, expr_size (exp),
5218 (call_param_p
5219 ? BLOCK_OP_CALL_PARM
5220 : BLOCK_OP_NORMAL));
5221 else if (GET_MODE (target) == BLKmode)
5222 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5223 0, 0, 0, GET_MODE (temp), temp);
5224 else
5225 convert_move (target, temp, unsignedp);
5226 }
5227
5228 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5229 {
5230 /* Handle copying a string constant into an array. The string
5231 constant may be shorter than the array. So copy just the string's
5232 actual length, and clear the rest. First get the size of the data
5233 type of the string, which is actually the size of the target. */
5234 rtx size = expr_size (exp);
5235
5236 if (CONST_INT_P (size)
5237 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5238 emit_block_move (target, temp, size,
5239 (call_param_p
5240 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5241 else
5242 {
5243 enum machine_mode pointer_mode
5244 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5245 enum machine_mode address_mode = get_address_mode (target);
5246
5247 /* Compute the size of the data to copy from the string. */
5248 tree copy_size
5249 = size_binop_loc (loc, MIN_EXPR,
5250 make_tree (sizetype, size),
5251 size_int (TREE_STRING_LENGTH (exp)));
5252 rtx copy_size_rtx
5253 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5254 (call_param_p
5255 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5256 rtx label = 0;
5257
5258 /* Copy that much. */
5259 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5260 TYPE_UNSIGNED (sizetype));
5261 emit_block_move (target, temp, copy_size_rtx,
5262 (call_param_p
5263 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5264
5265 /* Figure out how much is left in TARGET that we have to clear.
5266 Do all calculations in pointer_mode. */
5267 if (CONST_INT_P (copy_size_rtx))
5268 {
5269 size = plus_constant (address_mode, size,
5270 -INTVAL (copy_size_rtx));
5271 target = adjust_address (target, BLKmode,
5272 INTVAL (copy_size_rtx));
5273 }
5274 else
5275 {
5276 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5277 copy_size_rtx, NULL_RTX, 0,
5278 OPTAB_LIB_WIDEN);
5279
5280 if (GET_MODE (copy_size_rtx) != address_mode)
5281 copy_size_rtx = convert_to_mode (address_mode,
5282 copy_size_rtx,
5283 TYPE_UNSIGNED (sizetype));
5284
5285 target = offset_address (target, copy_size_rtx,
5286 highest_pow2_factor (copy_size));
5287 label = gen_label_rtx ();
5288 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5289 GET_MODE (size), 0, label);
5290 }
5291
5292 if (size != const0_rtx)
5293 clear_storage (target, size, BLOCK_OP_NORMAL);
5294
5295 if (label)
5296 emit_label (label);
5297 }
5298 }
5299 /* Handle calls that return values in multiple non-contiguous locations.
5300 The Irix 6 ABI has examples of this. */
5301 else if (GET_CODE (target) == PARALLEL)
5302 emit_group_load (target, temp, TREE_TYPE (exp),
5303 int_size_in_bytes (TREE_TYPE (exp)));
5304 else if (GET_MODE (temp) == BLKmode)
5305 emit_block_move (target, temp, expr_size (exp),
5306 (call_param_p
5307 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5308 else if (nontemporal
5309 && emit_storent_insn (target, temp))
5310 /* If we managed to emit a nontemporal store, there is nothing else to
5311 do. */
5312 ;
5313 else
5314 {
5315 temp = force_operand (temp, target);
5316 if (temp != target)
5317 emit_move_insn (target, temp);
5318 }
5319 }
5320
5321 return NULL_RTX;
5322 }
5323 \f
5324 /* Return true if field F of structure TYPE is a flexible array. */
5325
5326 static bool
5327 flexible_array_member_p (const_tree f, const_tree type)
5328 {
5329 const_tree tf;
5330
5331 tf = TREE_TYPE (f);
5332 return (DECL_CHAIN (f) == NULL
5333 && TREE_CODE (tf) == ARRAY_TYPE
5334 && TYPE_DOMAIN (tf)
5335 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5336 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5337 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5338 && int_size_in_bytes (type) >= 0);
5339 }
5340
5341 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5342 must have in order for it to completely initialize a value of type TYPE.
5343 Return -1 if the number isn't known.
5344
5345 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5346
5347 static HOST_WIDE_INT
5348 count_type_elements (const_tree type, bool for_ctor_p)
5349 {
5350 switch (TREE_CODE (type))
5351 {
5352 case ARRAY_TYPE:
5353 {
5354 tree nelts;
5355
5356 nelts = array_type_nelts (type);
5357 if (nelts && host_integerp (nelts, 1))
5358 {
5359 unsigned HOST_WIDE_INT n;
5360
5361 n = tree_low_cst (nelts, 1) + 1;
5362 if (n == 0 || for_ctor_p)
5363 return n;
5364 else
5365 return n * count_type_elements (TREE_TYPE (type), false);
5366 }
5367 return for_ctor_p ? -1 : 1;
5368 }
5369
5370 case RECORD_TYPE:
5371 {
5372 unsigned HOST_WIDE_INT n;
5373 tree f;
5374
5375 n = 0;
5376 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5377 if (TREE_CODE (f) == FIELD_DECL)
5378 {
5379 if (!for_ctor_p)
5380 n += count_type_elements (TREE_TYPE (f), false);
5381 else if (!flexible_array_member_p (f, type))
5382 /* Don't count flexible arrays, which are not supposed
5383 to be initialized. */
5384 n += 1;
5385 }
5386
5387 return n;
5388 }
5389
5390 case UNION_TYPE:
5391 case QUAL_UNION_TYPE:
5392 {
5393 tree f;
5394 HOST_WIDE_INT n, m;
5395
5396 gcc_assert (!for_ctor_p);
5397 /* Estimate the number of scalars in each field and pick the
5398 maximum. Other estimates would do instead; the idea is simply
5399 to make sure that the estimate is not sensitive to the ordering
5400 of the fields. */
5401 n = 1;
5402 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5403 if (TREE_CODE (f) == FIELD_DECL)
5404 {
5405 m = count_type_elements (TREE_TYPE (f), false);
5406 /* If the field doesn't span the whole union, add an extra
5407 scalar for the rest. */
5408 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5409 TYPE_SIZE (type)) != 1)
5410 m++;
5411 if (n < m)
5412 n = m;
5413 }
5414 return n;
5415 }
5416
5417 case COMPLEX_TYPE:
5418 return 2;
5419
5420 case VECTOR_TYPE:
5421 return TYPE_VECTOR_SUBPARTS (type);
5422
5423 case INTEGER_TYPE:
5424 case REAL_TYPE:
5425 case FIXED_POINT_TYPE:
5426 case ENUMERAL_TYPE:
5427 case BOOLEAN_TYPE:
5428 case POINTER_TYPE:
5429 case OFFSET_TYPE:
5430 case REFERENCE_TYPE:
5431 case NULLPTR_TYPE:
5432 return 1;
5433
5434 case ERROR_MARK:
5435 return 0;
5436
5437 case VOID_TYPE:
5438 case METHOD_TYPE:
5439 case FUNCTION_TYPE:
5440 case LANG_TYPE:
5441 default:
5442 gcc_unreachable ();
5443 }
5444 }
5445
5446 /* Helper for categorize_ctor_elements. Identical interface. */
5447
5448 static bool
5449 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5450 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5451 {
5452 unsigned HOST_WIDE_INT idx;
5453 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5454 tree value, purpose, elt_type;
5455
5456 /* Whether CTOR is a valid constant initializer, in accordance with what
5457 initializer_constant_valid_p does. If inferred from the constructor
5458 elements, true until proven otherwise. */
5459 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5460 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5461
5462 nz_elts = 0;
5463 init_elts = 0;
5464 num_fields = 0;
5465 elt_type = NULL_TREE;
5466
5467 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5468 {
5469 HOST_WIDE_INT mult = 1;
5470
5471 if (TREE_CODE (purpose) == RANGE_EXPR)
5472 {
5473 tree lo_index = TREE_OPERAND (purpose, 0);
5474 tree hi_index = TREE_OPERAND (purpose, 1);
5475
5476 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5477 mult = (tree_low_cst (hi_index, 1)
5478 - tree_low_cst (lo_index, 1) + 1);
5479 }
5480 num_fields += mult;
5481 elt_type = TREE_TYPE (value);
5482
5483 switch (TREE_CODE (value))
5484 {
5485 case CONSTRUCTOR:
5486 {
5487 HOST_WIDE_INT nz = 0, ic = 0;
5488
5489 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5490 p_complete);
5491
5492 nz_elts += mult * nz;
5493 init_elts += mult * ic;
5494
5495 if (const_from_elts_p && const_p)
5496 const_p = const_elt_p;
5497 }
5498 break;
5499
5500 case INTEGER_CST:
5501 case REAL_CST:
5502 case FIXED_CST:
5503 if (!initializer_zerop (value))
5504 nz_elts += mult;
5505 init_elts += mult;
5506 break;
5507
5508 case STRING_CST:
5509 nz_elts += mult * TREE_STRING_LENGTH (value);
5510 init_elts += mult * TREE_STRING_LENGTH (value);
5511 break;
5512
5513 case COMPLEX_CST:
5514 if (!initializer_zerop (TREE_REALPART (value)))
5515 nz_elts += mult;
5516 if (!initializer_zerop (TREE_IMAGPART (value)))
5517 nz_elts += mult;
5518 init_elts += mult;
5519 break;
5520
5521 case VECTOR_CST:
5522 {
5523 unsigned i;
5524 for (i = 0; i < VECTOR_CST_NELTS (value); ++i)
5525 {
5526 tree v = VECTOR_CST_ELT (value, i);
5527 if (!initializer_zerop (v))
5528 nz_elts += mult;
5529 init_elts += mult;
5530 }
5531 }
5532 break;
5533
5534 default:
5535 {
5536 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5537 nz_elts += mult * tc;
5538 init_elts += mult * tc;
5539
5540 if (const_from_elts_p && const_p)
5541 const_p = initializer_constant_valid_p (value, elt_type)
5542 != NULL_TREE;
5543 }
5544 break;
5545 }
5546 }
5547
5548 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5549 num_fields, elt_type))
5550 *p_complete = false;
5551
5552 *p_nz_elts += nz_elts;
5553 *p_init_elts += init_elts;
5554
5555 return const_p;
5556 }
5557
5558 /* Examine CTOR to discover:
5559 * how many scalar fields are set to nonzero values,
5560 and place it in *P_NZ_ELTS;
5561 * how many scalar fields in total are in CTOR,
5562 and place it in *P_ELT_COUNT.
5563 * whether the constructor is complete -- in the sense that every
5564 meaningful byte is explicitly given a value --
5565 and place it in *P_COMPLETE.
5566
5567 Return whether or not CTOR is a valid static constant initializer, the same
5568 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5569
5570 bool
5571 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5572 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5573 {
5574 *p_nz_elts = 0;
5575 *p_init_elts = 0;
5576 *p_complete = true;
5577
5578 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5579 }
5580
5581 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5582 of which had type LAST_TYPE. Each element was itself a complete
5583 initializer, in the sense that every meaningful byte was explicitly
5584 given a value. Return true if the same is true for the constructor
5585 as a whole. */
5586
5587 bool
5588 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5589 const_tree last_type)
5590 {
5591 if (TREE_CODE (type) == UNION_TYPE
5592 || TREE_CODE (type) == QUAL_UNION_TYPE)
5593 {
5594 if (num_elts == 0)
5595 return false;
5596
5597 gcc_assert (num_elts == 1 && last_type);
5598
5599 /* ??? We could look at each element of the union, and find the
5600 largest element. Which would avoid comparing the size of the
5601 initialized element against any tail padding in the union.
5602 Doesn't seem worth the effort... */
5603 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5604 }
5605
5606 return count_type_elements (type, true) == num_elts;
5607 }
5608
5609 /* Return 1 if EXP contains mostly (3/4) zeros. */
5610
5611 static int
5612 mostly_zeros_p (const_tree exp)
5613 {
5614 if (TREE_CODE (exp) == CONSTRUCTOR)
5615 {
5616 HOST_WIDE_INT nz_elts, init_elts;
5617 bool complete_p;
5618
5619 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5620 return !complete_p || nz_elts < init_elts / 4;
5621 }
5622
5623 return initializer_zerop (exp);
5624 }
5625
5626 /* Return 1 if EXP contains all zeros. */
5627
5628 static int
5629 all_zeros_p (const_tree exp)
5630 {
5631 if (TREE_CODE (exp) == CONSTRUCTOR)
5632 {
5633 HOST_WIDE_INT nz_elts, init_elts;
5634 bool complete_p;
5635
5636 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5637 return nz_elts == 0;
5638 }
5639
5640 return initializer_zerop (exp);
5641 }
5642 \f
5643 /* Helper function for store_constructor.
5644 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5645 TYPE is the type of the CONSTRUCTOR, not the element type.
5646 CLEARED is as for store_constructor.
5647 ALIAS_SET is the alias set to use for any stores.
5648
5649 This provides a recursive shortcut back to store_constructor when it isn't
5650 necessary to go through store_field. This is so that we can pass through
5651 the cleared field to let store_constructor know that we may not have to
5652 clear a substructure if the outer structure has already been cleared. */
5653
5654 static void
5655 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5656 HOST_WIDE_INT bitpos, enum machine_mode mode,
5657 tree exp, tree type, int cleared,
5658 alias_set_type alias_set)
5659 {
5660 if (TREE_CODE (exp) == CONSTRUCTOR
5661 /* We can only call store_constructor recursively if the size and
5662 bit position are on a byte boundary. */
5663 && bitpos % BITS_PER_UNIT == 0
5664 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5665 /* If we have a nonzero bitpos for a register target, then we just
5666 let store_field do the bitfield handling. This is unlikely to
5667 generate unnecessary clear instructions anyways. */
5668 && (bitpos == 0 || MEM_P (target)))
5669 {
5670 if (MEM_P (target))
5671 target
5672 = adjust_address (target,
5673 GET_MODE (target) == BLKmode
5674 || 0 != (bitpos
5675 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5676 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5677
5678
5679 /* Update the alias set, if required. */
5680 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5681 && MEM_ALIAS_SET (target) != 0)
5682 {
5683 target = copy_rtx (target);
5684 set_mem_alias_set (target, alias_set);
5685 }
5686
5687 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5688 }
5689 else
5690 store_field (target, bitsize, bitpos, 0, 0, mode, exp, type, alias_set,
5691 false);
5692 }
5693
5694 /* Store the value of constructor EXP into the rtx TARGET.
5695 TARGET is either a REG or a MEM; we know it cannot conflict, since
5696 safe_from_p has been called.
5697 CLEARED is true if TARGET is known to have been zero'd.
5698 SIZE is the number of bytes of TARGET we are allowed to modify: this
5699 may not be the same as the size of EXP if we are assigning to a field
5700 which has been packed to exclude padding bits. */
5701
5702 static void
5703 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5704 {
5705 tree type = TREE_TYPE (exp);
5706 #ifdef WORD_REGISTER_OPERATIONS
5707 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5708 #endif
5709
5710 switch (TREE_CODE (type))
5711 {
5712 case RECORD_TYPE:
5713 case UNION_TYPE:
5714 case QUAL_UNION_TYPE:
5715 {
5716 unsigned HOST_WIDE_INT idx;
5717 tree field, value;
5718
5719 /* If size is zero or the target is already cleared, do nothing. */
5720 if (size == 0 || cleared)
5721 cleared = 1;
5722 /* We either clear the aggregate or indicate the value is dead. */
5723 else if ((TREE_CODE (type) == UNION_TYPE
5724 || TREE_CODE (type) == QUAL_UNION_TYPE)
5725 && ! CONSTRUCTOR_ELTS (exp))
5726 /* If the constructor is empty, clear the union. */
5727 {
5728 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5729 cleared = 1;
5730 }
5731
5732 /* If we are building a static constructor into a register,
5733 set the initial value as zero so we can fold the value into
5734 a constant. But if more than one register is involved,
5735 this probably loses. */
5736 else if (REG_P (target) && TREE_STATIC (exp)
5737 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5738 {
5739 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5740 cleared = 1;
5741 }
5742
5743 /* If the constructor has fewer fields than the structure or
5744 if we are initializing the structure to mostly zeros, clear
5745 the whole structure first. Don't do this if TARGET is a
5746 register whose mode size isn't equal to SIZE since
5747 clear_storage can't handle this case. */
5748 else if (size > 0
5749 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5750 != fields_length (type))
5751 || mostly_zeros_p (exp))
5752 && (!REG_P (target)
5753 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5754 == size)))
5755 {
5756 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5757 cleared = 1;
5758 }
5759
5760 if (REG_P (target) && !cleared)
5761 emit_clobber (target);
5762
5763 /* Store each element of the constructor into the
5764 corresponding field of TARGET. */
5765 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5766 {
5767 enum machine_mode mode;
5768 HOST_WIDE_INT bitsize;
5769 HOST_WIDE_INT bitpos = 0;
5770 tree offset;
5771 rtx to_rtx = target;
5772
5773 /* Just ignore missing fields. We cleared the whole
5774 structure, above, if any fields are missing. */
5775 if (field == 0)
5776 continue;
5777
5778 if (cleared && initializer_zerop (value))
5779 continue;
5780
5781 if (host_integerp (DECL_SIZE (field), 1))
5782 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5783 else
5784 bitsize = -1;
5785
5786 mode = DECL_MODE (field);
5787 if (DECL_BIT_FIELD (field))
5788 mode = VOIDmode;
5789
5790 offset = DECL_FIELD_OFFSET (field);
5791 if (host_integerp (offset, 0)
5792 && host_integerp (bit_position (field), 0))
5793 {
5794 bitpos = int_bit_position (field);
5795 offset = 0;
5796 }
5797 else
5798 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5799
5800 if (offset)
5801 {
5802 enum machine_mode address_mode;
5803 rtx offset_rtx;
5804
5805 offset
5806 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5807 make_tree (TREE_TYPE (exp),
5808 target));
5809
5810 offset_rtx = expand_normal (offset);
5811 gcc_assert (MEM_P (to_rtx));
5812
5813 address_mode = get_address_mode (to_rtx);
5814 if (GET_MODE (offset_rtx) != address_mode)
5815 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5816
5817 to_rtx = offset_address (to_rtx, offset_rtx,
5818 highest_pow2_factor (offset));
5819 }
5820
5821 #ifdef WORD_REGISTER_OPERATIONS
5822 /* If this initializes a field that is smaller than a
5823 word, at the start of a word, try to widen it to a full
5824 word. This special case allows us to output C++ member
5825 function initializations in a form that the optimizers
5826 can understand. */
5827 if (REG_P (target)
5828 && bitsize < BITS_PER_WORD
5829 && bitpos % BITS_PER_WORD == 0
5830 && GET_MODE_CLASS (mode) == MODE_INT
5831 && TREE_CODE (value) == INTEGER_CST
5832 && exp_size >= 0
5833 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5834 {
5835 tree type = TREE_TYPE (value);
5836
5837 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5838 {
5839 type = lang_hooks.types.type_for_mode
5840 (word_mode, TYPE_UNSIGNED (type));
5841 value = fold_convert (type, value);
5842 }
5843
5844 if (BYTES_BIG_ENDIAN)
5845 value
5846 = fold_build2 (LSHIFT_EXPR, type, value,
5847 build_int_cst (type,
5848 BITS_PER_WORD - bitsize));
5849 bitsize = BITS_PER_WORD;
5850 mode = word_mode;
5851 }
5852 #endif
5853
5854 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5855 && DECL_NONADDRESSABLE_P (field))
5856 {
5857 to_rtx = copy_rtx (to_rtx);
5858 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5859 }
5860
5861 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5862 value, type, cleared,
5863 get_alias_set (TREE_TYPE (field)));
5864 }
5865 break;
5866 }
5867 case ARRAY_TYPE:
5868 {
5869 tree value, index;
5870 unsigned HOST_WIDE_INT i;
5871 int need_to_clear;
5872 tree domain;
5873 tree elttype = TREE_TYPE (type);
5874 int const_bounds_p;
5875 HOST_WIDE_INT minelt = 0;
5876 HOST_WIDE_INT maxelt = 0;
5877
5878 domain = TYPE_DOMAIN (type);
5879 const_bounds_p = (TYPE_MIN_VALUE (domain)
5880 && TYPE_MAX_VALUE (domain)
5881 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5882 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5883
5884 /* If we have constant bounds for the range of the type, get them. */
5885 if (const_bounds_p)
5886 {
5887 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5888 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5889 }
5890
5891 /* If the constructor has fewer elements than the array, clear
5892 the whole array first. Similarly if this is static
5893 constructor of a non-BLKmode object. */
5894 if (cleared)
5895 need_to_clear = 0;
5896 else if (REG_P (target) && TREE_STATIC (exp))
5897 need_to_clear = 1;
5898 else
5899 {
5900 unsigned HOST_WIDE_INT idx;
5901 tree index, value;
5902 HOST_WIDE_INT count = 0, zero_count = 0;
5903 need_to_clear = ! const_bounds_p;
5904
5905 /* This loop is a more accurate version of the loop in
5906 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5907 is also needed to check for missing elements. */
5908 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5909 {
5910 HOST_WIDE_INT this_node_count;
5911
5912 if (need_to_clear)
5913 break;
5914
5915 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5916 {
5917 tree lo_index = TREE_OPERAND (index, 0);
5918 tree hi_index = TREE_OPERAND (index, 1);
5919
5920 if (! host_integerp (lo_index, 1)
5921 || ! host_integerp (hi_index, 1))
5922 {
5923 need_to_clear = 1;
5924 break;
5925 }
5926
5927 this_node_count = (tree_low_cst (hi_index, 1)
5928 - tree_low_cst (lo_index, 1) + 1);
5929 }
5930 else
5931 this_node_count = 1;
5932
5933 count += this_node_count;
5934 if (mostly_zeros_p (value))
5935 zero_count += this_node_count;
5936 }
5937
5938 /* Clear the entire array first if there are any missing
5939 elements, or if the incidence of zero elements is >=
5940 75%. */
5941 if (! need_to_clear
5942 && (count < maxelt - minelt + 1
5943 || 4 * zero_count >= 3 * count))
5944 need_to_clear = 1;
5945 }
5946
5947 if (need_to_clear && size > 0)
5948 {
5949 if (REG_P (target))
5950 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5951 else
5952 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5953 cleared = 1;
5954 }
5955
5956 if (!cleared && REG_P (target))
5957 /* Inform later passes that the old value is dead. */
5958 emit_clobber (target);
5959
5960 /* Store each element of the constructor into the
5961 corresponding element of TARGET, determined by counting the
5962 elements. */
5963 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5964 {
5965 enum machine_mode mode;
5966 HOST_WIDE_INT bitsize;
5967 HOST_WIDE_INT bitpos;
5968 rtx xtarget = target;
5969
5970 if (cleared && initializer_zerop (value))
5971 continue;
5972
5973 mode = TYPE_MODE (elttype);
5974 if (mode == BLKmode)
5975 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5976 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5977 : -1);
5978 else
5979 bitsize = GET_MODE_BITSIZE (mode);
5980
5981 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5982 {
5983 tree lo_index = TREE_OPERAND (index, 0);
5984 tree hi_index = TREE_OPERAND (index, 1);
5985 rtx index_r, pos_rtx;
5986 HOST_WIDE_INT lo, hi, count;
5987 tree position;
5988
5989 /* If the range is constant and "small", unroll the loop. */
5990 if (const_bounds_p
5991 && host_integerp (lo_index, 0)
5992 && host_integerp (hi_index, 0)
5993 && (lo = tree_low_cst (lo_index, 0),
5994 hi = tree_low_cst (hi_index, 0),
5995 count = hi - lo + 1,
5996 (!MEM_P (target)
5997 || count <= 2
5998 || (host_integerp (TYPE_SIZE (elttype), 1)
5999 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
6000 <= 40 * 8)))))
6001 {
6002 lo -= minelt; hi -= minelt;
6003 for (; lo <= hi; lo++)
6004 {
6005 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
6006
6007 if (MEM_P (target)
6008 && !MEM_KEEP_ALIAS_SET_P (target)
6009 && TREE_CODE (type) == ARRAY_TYPE
6010 && TYPE_NONALIASED_COMPONENT (type))
6011 {
6012 target = copy_rtx (target);
6013 MEM_KEEP_ALIAS_SET_P (target) = 1;
6014 }
6015
6016 store_constructor_field
6017 (target, bitsize, bitpos, mode, value, type, cleared,
6018 get_alias_set (elttype));
6019 }
6020 }
6021 else
6022 {
6023 rtx loop_start = gen_label_rtx ();
6024 rtx loop_end = gen_label_rtx ();
6025 tree exit_cond;
6026
6027 expand_normal (hi_index);
6028
6029 index = build_decl (EXPR_LOCATION (exp),
6030 VAR_DECL, NULL_TREE, domain);
6031 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6032 SET_DECL_RTL (index, index_r);
6033 store_expr (lo_index, index_r, 0, false);
6034
6035 /* Build the head of the loop. */
6036 do_pending_stack_adjust ();
6037 emit_label (loop_start);
6038
6039 /* Assign value to element index. */
6040 position =
6041 fold_convert (ssizetype,
6042 fold_build2 (MINUS_EXPR,
6043 TREE_TYPE (index),
6044 index,
6045 TYPE_MIN_VALUE (domain)));
6046
6047 position =
6048 size_binop (MULT_EXPR, position,
6049 fold_convert (ssizetype,
6050 TYPE_SIZE_UNIT (elttype)));
6051
6052 pos_rtx = expand_normal (position);
6053 xtarget = offset_address (target, pos_rtx,
6054 highest_pow2_factor (position));
6055 xtarget = adjust_address (xtarget, mode, 0);
6056 if (TREE_CODE (value) == CONSTRUCTOR)
6057 store_constructor (value, xtarget, cleared,
6058 bitsize / BITS_PER_UNIT);
6059 else
6060 store_expr (value, xtarget, 0, false);
6061
6062 /* Generate a conditional jump to exit the loop. */
6063 exit_cond = build2 (LT_EXPR, integer_type_node,
6064 index, hi_index);
6065 jumpif (exit_cond, loop_end, -1);
6066
6067 /* Update the loop counter, and jump to the head of
6068 the loop. */
6069 expand_assignment (index,
6070 build2 (PLUS_EXPR, TREE_TYPE (index),
6071 index, integer_one_node),
6072 false);
6073
6074 emit_jump (loop_start);
6075
6076 /* Build the end of the loop. */
6077 emit_label (loop_end);
6078 }
6079 }
6080 else if ((index != 0 && ! host_integerp (index, 0))
6081 || ! host_integerp (TYPE_SIZE (elttype), 1))
6082 {
6083 tree position;
6084
6085 if (index == 0)
6086 index = ssize_int (1);
6087
6088 if (minelt)
6089 index = fold_convert (ssizetype,
6090 fold_build2 (MINUS_EXPR,
6091 TREE_TYPE (index),
6092 index,
6093 TYPE_MIN_VALUE (domain)));
6094
6095 position =
6096 size_binop (MULT_EXPR, index,
6097 fold_convert (ssizetype,
6098 TYPE_SIZE_UNIT (elttype)));
6099 xtarget = offset_address (target,
6100 expand_normal (position),
6101 highest_pow2_factor (position));
6102 xtarget = adjust_address (xtarget, mode, 0);
6103 store_expr (value, xtarget, 0, false);
6104 }
6105 else
6106 {
6107 if (index != 0)
6108 bitpos = ((tree_low_cst (index, 0) - minelt)
6109 * tree_low_cst (TYPE_SIZE (elttype), 1));
6110 else
6111 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
6112
6113 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6114 && TREE_CODE (type) == ARRAY_TYPE
6115 && TYPE_NONALIASED_COMPONENT (type))
6116 {
6117 target = copy_rtx (target);
6118 MEM_KEEP_ALIAS_SET_P (target) = 1;
6119 }
6120 store_constructor_field (target, bitsize, bitpos, mode, value,
6121 type, cleared, get_alias_set (elttype));
6122 }
6123 }
6124 break;
6125 }
6126
6127 case VECTOR_TYPE:
6128 {
6129 unsigned HOST_WIDE_INT idx;
6130 constructor_elt *ce;
6131 int i;
6132 int need_to_clear;
6133 int icode = CODE_FOR_nothing;
6134 tree elttype = TREE_TYPE (type);
6135 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
6136 enum machine_mode eltmode = TYPE_MODE (elttype);
6137 HOST_WIDE_INT bitsize;
6138 HOST_WIDE_INT bitpos;
6139 rtvec vector = NULL;
6140 unsigned n_elts;
6141 alias_set_type alias;
6142
6143 gcc_assert (eltmode != BLKmode);
6144
6145 n_elts = TYPE_VECTOR_SUBPARTS (type);
6146 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6147 {
6148 enum machine_mode mode = GET_MODE (target);
6149
6150 icode = (int) optab_handler (vec_init_optab, mode);
6151 if (icode != CODE_FOR_nothing)
6152 {
6153 unsigned int i;
6154
6155 vector = rtvec_alloc (n_elts);
6156 for (i = 0; i < n_elts; i++)
6157 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6158 }
6159 }
6160
6161 /* If the constructor has fewer elements than the vector,
6162 clear the whole array first. Similarly if this is static
6163 constructor of a non-BLKmode object. */
6164 if (cleared)
6165 need_to_clear = 0;
6166 else if (REG_P (target) && TREE_STATIC (exp))
6167 need_to_clear = 1;
6168 else
6169 {
6170 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6171 tree value;
6172
6173 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6174 {
6175 int n_elts_here = tree_low_cst
6176 (int_const_binop (TRUNC_DIV_EXPR,
6177 TYPE_SIZE (TREE_TYPE (value)),
6178 TYPE_SIZE (elttype)), 1);
6179
6180 count += n_elts_here;
6181 if (mostly_zeros_p (value))
6182 zero_count += n_elts_here;
6183 }
6184
6185 /* Clear the entire vector first if there are any missing elements,
6186 or if the incidence of zero elements is >= 75%. */
6187 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6188 }
6189
6190 if (need_to_clear && size > 0 && !vector)
6191 {
6192 if (REG_P (target))
6193 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6194 else
6195 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6196 cleared = 1;
6197 }
6198
6199 /* Inform later passes that the old value is dead. */
6200 if (!cleared && !vector && REG_P (target))
6201 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6202
6203 if (MEM_P (target))
6204 alias = MEM_ALIAS_SET (target);
6205 else
6206 alias = get_alias_set (elttype);
6207
6208 /* Store each element of the constructor into the corresponding
6209 element of TARGET, determined by counting the elements. */
6210 for (idx = 0, i = 0;
6211 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6212 idx++, i += bitsize / elt_size)
6213 {
6214 HOST_WIDE_INT eltpos;
6215 tree value = ce->value;
6216
6217 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6218 if (cleared && initializer_zerop (value))
6219 continue;
6220
6221 if (ce->index)
6222 eltpos = tree_low_cst (ce->index, 1);
6223 else
6224 eltpos = i;
6225
6226 if (vector)
6227 {
6228 /* Vector CONSTRUCTORs should only be built from smaller
6229 vectors in the case of BLKmode vectors. */
6230 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6231 RTVEC_ELT (vector, eltpos)
6232 = expand_normal (value);
6233 }
6234 else
6235 {
6236 enum machine_mode value_mode =
6237 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6238 ? TYPE_MODE (TREE_TYPE (value))
6239 : eltmode;
6240 bitpos = eltpos * elt_size;
6241 store_constructor_field (target, bitsize, bitpos,
6242 value_mode, value, type,
6243 cleared, alias);
6244 }
6245 }
6246
6247 if (vector)
6248 emit_insn (GEN_FCN (icode)
6249 (target,
6250 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6251 break;
6252 }
6253
6254 default:
6255 gcc_unreachable ();
6256 }
6257 }
6258
6259 /* Store the value of EXP (an expression tree)
6260 into a subfield of TARGET which has mode MODE and occupies
6261 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6262 If MODE is VOIDmode, it means that we are storing into a bit-field.
6263
6264 BITREGION_START is bitpos of the first bitfield in this region.
6265 BITREGION_END is the bitpos of the ending bitfield in this region.
6266 These two fields are 0, if the C++ memory model does not apply,
6267 or we are not interested in keeping track of bitfield regions.
6268
6269 Always return const0_rtx unless we have something particular to
6270 return.
6271
6272 TYPE is the type of the underlying object,
6273
6274 ALIAS_SET is the alias set for the destination. This value will
6275 (in general) be different from that for TARGET, since TARGET is a
6276 reference to the containing structure.
6277
6278 If NONTEMPORAL is true, try generating a nontemporal store. */
6279
6280 static rtx
6281 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6282 unsigned HOST_WIDE_INT bitregion_start,
6283 unsigned HOST_WIDE_INT bitregion_end,
6284 enum machine_mode mode, tree exp, tree type,
6285 alias_set_type alias_set, bool nontemporal)
6286 {
6287 if (TREE_CODE (exp) == ERROR_MARK)
6288 return const0_rtx;
6289
6290 /* If we have nothing to store, do nothing unless the expression has
6291 side-effects. */
6292 if (bitsize == 0)
6293 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6294
6295 /* If we are storing into an unaligned field of an aligned union that is
6296 in a register, we may have the mode of TARGET being an integer mode but
6297 MODE == BLKmode. In that case, get an aligned object whose size and
6298 alignment are the same as TARGET and store TARGET into it (we can avoid
6299 the store if the field being stored is the entire width of TARGET). Then
6300 call ourselves recursively to store the field into a BLKmode version of
6301 that object. Finally, load from the object into TARGET. This is not
6302 very efficient in general, but should only be slightly more expensive
6303 than the otherwise-required unaligned accesses. Perhaps this can be
6304 cleaned up later. It's tempting to make OBJECT readonly, but it's set
6305 twice, once with emit_move_insn and once via store_field. */
6306
6307 if (mode == BLKmode
6308 && (REG_P (target) || GET_CODE (target) == SUBREG))
6309 {
6310 rtx object = assign_temp (type, 1, 1);
6311 rtx blk_object = adjust_address (object, BLKmode, 0);
6312
6313 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
6314 emit_move_insn (object, target);
6315
6316 store_field (blk_object, bitsize, bitpos,
6317 bitregion_start, bitregion_end,
6318 mode, exp, type, MEM_ALIAS_SET (blk_object), nontemporal);
6319
6320 emit_move_insn (target, object);
6321
6322 /* We want to return the BLKmode version of the data. */
6323 return blk_object;
6324 }
6325
6326 if (GET_CODE (target) == CONCAT)
6327 {
6328 /* We're storing into a struct containing a single __complex. */
6329
6330 gcc_assert (!bitpos);
6331 return store_expr (exp, target, 0, nontemporal);
6332 }
6333
6334 /* If the structure is in a register or if the component
6335 is a bit field, we cannot use addressing to access it.
6336 Use bit-field techniques or SUBREG to store in it. */
6337
6338 if (mode == VOIDmode
6339 || (mode != BLKmode && ! direct_store[(int) mode]
6340 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6341 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6342 || REG_P (target)
6343 || GET_CODE (target) == SUBREG
6344 /* If the field isn't aligned enough to store as an ordinary memref,
6345 store it as a bit field. */
6346 || (mode != BLKmode
6347 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6348 || bitpos % GET_MODE_ALIGNMENT (mode))
6349 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6350 || (bitpos % BITS_PER_UNIT != 0)))
6351 || (bitsize >= 0 && mode != BLKmode
6352 && GET_MODE_BITSIZE (mode) > bitsize)
6353 /* If the RHS and field are a constant size and the size of the
6354 RHS isn't the same size as the bitfield, we must use bitfield
6355 operations. */
6356 || (bitsize >= 0
6357 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6358 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6359 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6360 decl we must use bitfield operations. */
6361 || (bitsize >= 0
6362 && TREE_CODE (exp) == MEM_REF
6363 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6364 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6365 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6366 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6367 {
6368 rtx temp;
6369 gimple nop_def;
6370
6371 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6372 implies a mask operation. If the precision is the same size as
6373 the field we're storing into, that mask is redundant. This is
6374 particularly common with bit field assignments generated by the
6375 C front end. */
6376 nop_def = get_def_for_expr (exp, NOP_EXPR);
6377 if (nop_def)
6378 {
6379 tree type = TREE_TYPE (exp);
6380 if (INTEGRAL_TYPE_P (type)
6381 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6382 && bitsize == TYPE_PRECISION (type))
6383 {
6384 tree op = gimple_assign_rhs1 (nop_def);
6385 type = TREE_TYPE (op);
6386 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6387 exp = op;
6388 }
6389 }
6390
6391 temp = expand_normal (exp);
6392
6393 /* If BITSIZE is narrower than the size of the type of EXP
6394 we will be narrowing TEMP. Normally, what's wanted are the
6395 low-order bits. However, if EXP's type is a record and this is
6396 big-endian machine, we want the upper BITSIZE bits. */
6397 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6398 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6399 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6400 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6401 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6402 NULL_RTX, 1);
6403
6404 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6405 if (mode != VOIDmode && mode != BLKmode
6406 && mode != TYPE_MODE (TREE_TYPE (exp)))
6407 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6408
6409 /* If the modes of TEMP and TARGET are both BLKmode, both
6410 must be in memory and BITPOS must be aligned on a byte
6411 boundary. If so, we simply do a block copy. Likewise
6412 for a BLKmode-like TARGET. */
6413 if (GET_MODE (temp) == BLKmode
6414 && (GET_MODE (target) == BLKmode
6415 || (MEM_P (target)
6416 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6417 && (bitpos % BITS_PER_UNIT) == 0
6418 && (bitsize % BITS_PER_UNIT) == 0)))
6419 {
6420 gcc_assert (MEM_P (target) && MEM_P (temp)
6421 && (bitpos % BITS_PER_UNIT) == 0);
6422
6423 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6424 emit_block_move (target, temp,
6425 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6426 / BITS_PER_UNIT),
6427 BLOCK_OP_NORMAL);
6428
6429 return const0_rtx;
6430 }
6431
6432 /* Store the value in the bitfield. */
6433 store_bit_field (target, bitsize, bitpos,
6434 bitregion_start, bitregion_end,
6435 mode, temp);
6436
6437 return const0_rtx;
6438 }
6439 else
6440 {
6441 /* Now build a reference to just the desired component. */
6442 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6443
6444 if (to_rtx == target)
6445 to_rtx = copy_rtx (to_rtx);
6446
6447 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6448 set_mem_alias_set (to_rtx, alias_set);
6449
6450 return store_expr (exp, to_rtx, 0, nontemporal);
6451 }
6452 }
6453 \f
6454 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6455 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6456 codes and find the ultimate containing object, which we return.
6457
6458 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6459 bit position, and *PUNSIGNEDP to the signedness of the field.
6460 If the position of the field is variable, we store a tree
6461 giving the variable offset (in units) in *POFFSET.
6462 This offset is in addition to the bit position.
6463 If the position is not variable, we store 0 in *POFFSET.
6464
6465 If any of the extraction expressions is volatile,
6466 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6467
6468 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6469 Otherwise, it is a mode that can be used to access the field.
6470
6471 If the field describes a variable-sized object, *PMODE is set to
6472 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6473 this case, but the address of the object can be found.
6474
6475 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6476 look through nodes that serve as markers of a greater alignment than
6477 the one that can be deduced from the expression. These nodes make it
6478 possible for front-ends to prevent temporaries from being created by
6479 the middle-end on alignment considerations. For that purpose, the
6480 normal operating mode at high-level is to always pass FALSE so that
6481 the ultimate containing object is really returned; moreover, the
6482 associated predicate handled_component_p will always return TRUE
6483 on these nodes, thus indicating that they are essentially handled
6484 by get_inner_reference. TRUE should only be passed when the caller
6485 is scanning the expression in order to build another representation
6486 and specifically knows how to handle these nodes; as such, this is
6487 the normal operating mode in the RTL expanders. */
6488
6489 tree
6490 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6491 HOST_WIDE_INT *pbitpos, tree *poffset,
6492 enum machine_mode *pmode, int *punsignedp,
6493 int *pvolatilep, bool keep_aligning)
6494 {
6495 tree size_tree = 0;
6496 enum machine_mode mode = VOIDmode;
6497 bool blkmode_bitfield = false;
6498 tree offset = size_zero_node;
6499 double_int bit_offset = double_int_zero;
6500
6501 /* First get the mode, signedness, and size. We do this from just the
6502 outermost expression. */
6503 *pbitsize = -1;
6504 if (TREE_CODE (exp) == COMPONENT_REF)
6505 {
6506 tree field = TREE_OPERAND (exp, 1);
6507 size_tree = DECL_SIZE (field);
6508 if (!DECL_BIT_FIELD (field))
6509 mode = DECL_MODE (field);
6510 else if (DECL_MODE (field) == BLKmode)
6511 blkmode_bitfield = true;
6512 else if (TREE_THIS_VOLATILE (exp)
6513 && flag_strict_volatile_bitfields > 0)
6514 /* Volatile bitfields should be accessed in the mode of the
6515 field's type, not the mode computed based on the bit
6516 size. */
6517 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6518
6519 *punsignedp = DECL_UNSIGNED (field);
6520 }
6521 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6522 {
6523 size_tree = TREE_OPERAND (exp, 1);
6524 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6525 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6526
6527 /* For vector types, with the correct size of access, use the mode of
6528 inner type. */
6529 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6530 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6531 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6532 mode = TYPE_MODE (TREE_TYPE (exp));
6533 }
6534 else
6535 {
6536 mode = TYPE_MODE (TREE_TYPE (exp));
6537 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6538
6539 if (mode == BLKmode)
6540 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6541 else
6542 *pbitsize = GET_MODE_BITSIZE (mode);
6543 }
6544
6545 if (size_tree != 0)
6546 {
6547 if (! host_integerp (size_tree, 1))
6548 mode = BLKmode, *pbitsize = -1;
6549 else
6550 *pbitsize = tree_low_cst (size_tree, 1);
6551 }
6552
6553 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6554 and find the ultimate containing object. */
6555 while (1)
6556 {
6557 switch (TREE_CODE (exp))
6558 {
6559 case BIT_FIELD_REF:
6560 bit_offset
6561 = double_int_add (bit_offset,
6562 tree_to_double_int (TREE_OPERAND (exp, 2)));
6563 break;
6564
6565 case COMPONENT_REF:
6566 {
6567 tree field = TREE_OPERAND (exp, 1);
6568 tree this_offset = component_ref_field_offset (exp);
6569
6570 /* If this field hasn't been filled in yet, don't go past it.
6571 This should only happen when folding expressions made during
6572 type construction. */
6573 if (this_offset == 0)
6574 break;
6575
6576 offset = size_binop (PLUS_EXPR, offset, this_offset);
6577 bit_offset = double_int_add (bit_offset,
6578 tree_to_double_int
6579 (DECL_FIELD_BIT_OFFSET (field)));
6580
6581 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6582 }
6583 break;
6584
6585 case ARRAY_REF:
6586 case ARRAY_RANGE_REF:
6587 {
6588 tree index = TREE_OPERAND (exp, 1);
6589 tree low_bound = array_ref_low_bound (exp);
6590 tree unit_size = array_ref_element_size (exp);
6591
6592 /* We assume all arrays have sizes that are a multiple of a byte.
6593 First subtract the lower bound, if any, in the type of the
6594 index, then convert to sizetype and multiply by the size of
6595 the array element. */
6596 if (! integer_zerop (low_bound))
6597 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6598 index, low_bound);
6599
6600 offset = size_binop (PLUS_EXPR, offset,
6601 size_binop (MULT_EXPR,
6602 fold_convert (sizetype, index),
6603 unit_size));
6604 }
6605 break;
6606
6607 case REALPART_EXPR:
6608 break;
6609
6610 case IMAGPART_EXPR:
6611 bit_offset = double_int_add (bit_offset,
6612 uhwi_to_double_int (*pbitsize));
6613 break;
6614
6615 case VIEW_CONVERT_EXPR:
6616 if (keep_aligning && STRICT_ALIGNMENT
6617 && (TYPE_ALIGN (TREE_TYPE (exp))
6618 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6619 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6620 < BIGGEST_ALIGNMENT)
6621 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6622 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6623 goto done;
6624 break;
6625
6626 case MEM_REF:
6627 /* Hand back the decl for MEM[&decl, off]. */
6628 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6629 {
6630 tree off = TREE_OPERAND (exp, 1);
6631 if (!integer_zerop (off))
6632 {
6633 double_int boff, coff = mem_ref_offset (exp);
6634 boff = double_int_lshift (coff,
6635 BITS_PER_UNIT == 8
6636 ? 3 : exact_log2 (BITS_PER_UNIT),
6637 HOST_BITS_PER_DOUBLE_INT, true);
6638 bit_offset = double_int_add (bit_offset, boff);
6639 }
6640 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6641 }
6642 goto done;
6643
6644 default:
6645 goto done;
6646 }
6647
6648 /* If any reference in the chain is volatile, the effect is volatile. */
6649 if (TREE_THIS_VOLATILE (exp))
6650 *pvolatilep = 1;
6651
6652 exp = TREE_OPERAND (exp, 0);
6653 }
6654 done:
6655
6656 /* If OFFSET is constant, see if we can return the whole thing as a
6657 constant bit position. Make sure to handle overflow during
6658 this conversion. */
6659 if (TREE_CODE (offset) == INTEGER_CST)
6660 {
6661 double_int tem = tree_to_double_int (offset);
6662 tem = double_int_sext (tem, TYPE_PRECISION (sizetype));
6663 tem = double_int_lshift (tem,
6664 BITS_PER_UNIT == 8
6665 ? 3 : exact_log2 (BITS_PER_UNIT),
6666 HOST_BITS_PER_DOUBLE_INT, true);
6667 tem = double_int_add (tem, bit_offset);
6668 if (double_int_fits_in_shwi_p (tem))
6669 {
6670 *pbitpos = double_int_to_shwi (tem);
6671 *poffset = offset = NULL_TREE;
6672 }
6673 }
6674
6675 /* Otherwise, split it up. */
6676 if (offset)
6677 {
6678 /* Avoid returning a negative bitpos as this may wreak havoc later. */
6679 if (double_int_negative_p (bit_offset))
6680 {
6681 double_int mask
6682 = double_int_mask (BITS_PER_UNIT == 8
6683 ? 3 : exact_log2 (BITS_PER_UNIT));
6684 double_int tem = double_int_and_not (bit_offset, mask);
6685 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
6686 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
6687 bit_offset = double_int_sub (bit_offset, tem);
6688 tem = double_int_rshift (tem,
6689 BITS_PER_UNIT == 8
6690 ? 3 : exact_log2 (BITS_PER_UNIT),
6691 HOST_BITS_PER_DOUBLE_INT, true);
6692 offset = size_binop (PLUS_EXPR, offset,
6693 double_int_to_tree (sizetype, tem));
6694 }
6695
6696 *pbitpos = double_int_to_shwi (bit_offset);
6697 *poffset = offset;
6698 }
6699
6700 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6701 if (mode == VOIDmode
6702 && blkmode_bitfield
6703 && (*pbitpos % BITS_PER_UNIT) == 0
6704 && (*pbitsize % BITS_PER_UNIT) == 0)
6705 *pmode = BLKmode;
6706 else
6707 *pmode = mode;
6708
6709 return exp;
6710 }
6711
6712 /* Return a tree of sizetype representing the size, in bytes, of the element
6713 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6714
6715 tree
6716 array_ref_element_size (tree exp)
6717 {
6718 tree aligned_size = TREE_OPERAND (exp, 3);
6719 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6720 location_t loc = EXPR_LOCATION (exp);
6721
6722 /* If a size was specified in the ARRAY_REF, it's the size measured
6723 in alignment units of the element type. So multiply by that value. */
6724 if (aligned_size)
6725 {
6726 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6727 sizetype from another type of the same width and signedness. */
6728 if (TREE_TYPE (aligned_size) != sizetype)
6729 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6730 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6731 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6732 }
6733
6734 /* Otherwise, take the size from that of the element type. Substitute
6735 any PLACEHOLDER_EXPR that we have. */
6736 else
6737 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6738 }
6739
6740 /* Return a tree representing the lower bound of the array mentioned in
6741 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6742
6743 tree
6744 array_ref_low_bound (tree exp)
6745 {
6746 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6747
6748 /* If a lower bound is specified in EXP, use it. */
6749 if (TREE_OPERAND (exp, 2))
6750 return TREE_OPERAND (exp, 2);
6751
6752 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6753 substituting for a PLACEHOLDER_EXPR as needed. */
6754 if (domain_type && TYPE_MIN_VALUE (domain_type))
6755 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6756
6757 /* Otherwise, return a zero of the appropriate type. */
6758 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6759 }
6760
6761 /* Returns true if REF is an array reference to an array at the end of
6762 a structure. If this is the case, the array may be allocated larger
6763 than its upper bound implies. */
6764
6765 bool
6766 array_at_struct_end_p (tree ref)
6767 {
6768 if (TREE_CODE (ref) != ARRAY_REF
6769 && TREE_CODE (ref) != ARRAY_RANGE_REF)
6770 return false;
6771
6772 while (handled_component_p (ref))
6773 {
6774 /* If the reference chain contains a component reference to a
6775 non-union type and there follows another field the reference
6776 is not at the end of a structure. */
6777 if (TREE_CODE (ref) == COMPONENT_REF
6778 && TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == RECORD_TYPE)
6779 {
6780 tree nextf = DECL_CHAIN (TREE_OPERAND (ref, 1));
6781 while (nextf && TREE_CODE (nextf) != FIELD_DECL)
6782 nextf = DECL_CHAIN (nextf);
6783 if (nextf)
6784 return false;
6785 }
6786
6787 ref = TREE_OPERAND (ref, 0);
6788 }
6789
6790 /* If the reference is based on a declared entity, the size of the array
6791 is constrained by its given domain. */
6792 if (DECL_P (ref))
6793 return false;
6794
6795 return true;
6796 }
6797
6798 /* Return a tree representing the upper bound of the array mentioned in
6799 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6800
6801 tree
6802 array_ref_up_bound (tree exp)
6803 {
6804 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6805
6806 /* If there is a domain type and it has an upper bound, use it, substituting
6807 for a PLACEHOLDER_EXPR as needed. */
6808 if (domain_type && TYPE_MAX_VALUE (domain_type))
6809 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6810
6811 /* Otherwise fail. */
6812 return NULL_TREE;
6813 }
6814
6815 /* Return a tree representing the offset, in bytes, of the field referenced
6816 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6817
6818 tree
6819 component_ref_field_offset (tree exp)
6820 {
6821 tree aligned_offset = TREE_OPERAND (exp, 2);
6822 tree field = TREE_OPERAND (exp, 1);
6823 location_t loc = EXPR_LOCATION (exp);
6824
6825 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6826 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6827 value. */
6828 if (aligned_offset)
6829 {
6830 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6831 sizetype from another type of the same width and signedness. */
6832 if (TREE_TYPE (aligned_offset) != sizetype)
6833 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6834 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6835 size_int (DECL_OFFSET_ALIGN (field)
6836 / BITS_PER_UNIT));
6837 }
6838
6839 /* Otherwise, take the offset from that of the field. Substitute
6840 any PLACEHOLDER_EXPR that we have. */
6841 else
6842 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6843 }
6844
6845 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6846
6847 static unsigned HOST_WIDE_INT
6848 target_align (const_tree target)
6849 {
6850 /* We might have a chain of nested references with intermediate misaligning
6851 bitfields components, so need to recurse to find out. */
6852
6853 unsigned HOST_WIDE_INT this_align, outer_align;
6854
6855 switch (TREE_CODE (target))
6856 {
6857 case BIT_FIELD_REF:
6858 return 1;
6859
6860 case COMPONENT_REF:
6861 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6862 outer_align = target_align (TREE_OPERAND (target, 0));
6863 return MIN (this_align, outer_align);
6864
6865 case ARRAY_REF:
6866 case ARRAY_RANGE_REF:
6867 this_align = TYPE_ALIGN (TREE_TYPE (target));
6868 outer_align = target_align (TREE_OPERAND (target, 0));
6869 return MIN (this_align, outer_align);
6870
6871 CASE_CONVERT:
6872 case NON_LVALUE_EXPR:
6873 case VIEW_CONVERT_EXPR:
6874 this_align = TYPE_ALIGN (TREE_TYPE (target));
6875 outer_align = target_align (TREE_OPERAND (target, 0));
6876 return MAX (this_align, outer_align);
6877
6878 default:
6879 return TYPE_ALIGN (TREE_TYPE (target));
6880 }
6881 }
6882
6883 \f
6884 /* Given an rtx VALUE that may contain additions and multiplications, return
6885 an equivalent value that just refers to a register, memory, or constant.
6886 This is done by generating instructions to perform the arithmetic and
6887 returning a pseudo-register containing the value.
6888
6889 The returned value may be a REG, SUBREG, MEM or constant. */
6890
6891 rtx
6892 force_operand (rtx value, rtx target)
6893 {
6894 rtx op1, op2;
6895 /* Use subtarget as the target for operand 0 of a binary operation. */
6896 rtx subtarget = get_subtarget (target);
6897 enum rtx_code code = GET_CODE (value);
6898
6899 /* Check for subreg applied to an expression produced by loop optimizer. */
6900 if (code == SUBREG
6901 && !REG_P (SUBREG_REG (value))
6902 && !MEM_P (SUBREG_REG (value)))
6903 {
6904 value
6905 = simplify_gen_subreg (GET_MODE (value),
6906 force_reg (GET_MODE (SUBREG_REG (value)),
6907 force_operand (SUBREG_REG (value),
6908 NULL_RTX)),
6909 GET_MODE (SUBREG_REG (value)),
6910 SUBREG_BYTE (value));
6911 code = GET_CODE (value);
6912 }
6913
6914 /* Check for a PIC address load. */
6915 if ((code == PLUS || code == MINUS)
6916 && XEXP (value, 0) == pic_offset_table_rtx
6917 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6918 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6919 || GET_CODE (XEXP (value, 1)) == CONST))
6920 {
6921 if (!subtarget)
6922 subtarget = gen_reg_rtx (GET_MODE (value));
6923 emit_move_insn (subtarget, value);
6924 return subtarget;
6925 }
6926
6927 if (ARITHMETIC_P (value))
6928 {
6929 op2 = XEXP (value, 1);
6930 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6931 subtarget = 0;
6932 if (code == MINUS && CONST_INT_P (op2))
6933 {
6934 code = PLUS;
6935 op2 = negate_rtx (GET_MODE (value), op2);
6936 }
6937
6938 /* Check for an addition with OP2 a constant integer and our first
6939 operand a PLUS of a virtual register and something else. In that
6940 case, we want to emit the sum of the virtual register and the
6941 constant first and then add the other value. This allows virtual
6942 register instantiation to simply modify the constant rather than
6943 creating another one around this addition. */
6944 if (code == PLUS && CONST_INT_P (op2)
6945 && GET_CODE (XEXP (value, 0)) == PLUS
6946 && REG_P (XEXP (XEXP (value, 0), 0))
6947 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6948 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6949 {
6950 rtx temp = expand_simple_binop (GET_MODE (value), code,
6951 XEXP (XEXP (value, 0), 0), op2,
6952 subtarget, 0, OPTAB_LIB_WIDEN);
6953 return expand_simple_binop (GET_MODE (value), code, temp,
6954 force_operand (XEXP (XEXP (value,
6955 0), 1), 0),
6956 target, 0, OPTAB_LIB_WIDEN);
6957 }
6958
6959 op1 = force_operand (XEXP (value, 0), subtarget);
6960 op2 = force_operand (op2, NULL_RTX);
6961 switch (code)
6962 {
6963 case MULT:
6964 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6965 case DIV:
6966 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6967 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6968 target, 1, OPTAB_LIB_WIDEN);
6969 else
6970 return expand_divmod (0,
6971 FLOAT_MODE_P (GET_MODE (value))
6972 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6973 GET_MODE (value), op1, op2, target, 0);
6974 case MOD:
6975 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6976 target, 0);
6977 case UDIV:
6978 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6979 target, 1);
6980 case UMOD:
6981 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6982 target, 1);
6983 case ASHIFTRT:
6984 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6985 target, 0, OPTAB_LIB_WIDEN);
6986 default:
6987 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6988 target, 1, OPTAB_LIB_WIDEN);
6989 }
6990 }
6991 if (UNARY_P (value))
6992 {
6993 if (!target)
6994 target = gen_reg_rtx (GET_MODE (value));
6995 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6996 switch (code)
6997 {
6998 case ZERO_EXTEND:
6999 case SIGN_EXTEND:
7000 case TRUNCATE:
7001 case FLOAT_EXTEND:
7002 case FLOAT_TRUNCATE:
7003 convert_move (target, op1, code == ZERO_EXTEND);
7004 return target;
7005
7006 case FIX:
7007 case UNSIGNED_FIX:
7008 expand_fix (target, op1, code == UNSIGNED_FIX);
7009 return target;
7010
7011 case FLOAT:
7012 case UNSIGNED_FLOAT:
7013 expand_float (target, op1, code == UNSIGNED_FLOAT);
7014 return target;
7015
7016 default:
7017 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7018 }
7019 }
7020
7021 #ifdef INSN_SCHEDULING
7022 /* On machines that have insn scheduling, we want all memory reference to be
7023 explicit, so we need to deal with such paradoxical SUBREGs. */
7024 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7025 value
7026 = simplify_gen_subreg (GET_MODE (value),
7027 force_reg (GET_MODE (SUBREG_REG (value)),
7028 force_operand (SUBREG_REG (value),
7029 NULL_RTX)),
7030 GET_MODE (SUBREG_REG (value)),
7031 SUBREG_BYTE (value));
7032 #endif
7033
7034 return value;
7035 }
7036 \f
7037 /* Subroutine of expand_expr: return nonzero iff there is no way that
7038 EXP can reference X, which is being modified. TOP_P is nonzero if this
7039 call is going to be used to determine whether we need a temporary
7040 for EXP, as opposed to a recursive call to this function.
7041
7042 It is always safe for this routine to return zero since it merely
7043 searches for optimization opportunities. */
7044
7045 int
7046 safe_from_p (const_rtx x, tree exp, int top_p)
7047 {
7048 rtx exp_rtl = 0;
7049 int i, nops;
7050
7051 if (x == 0
7052 /* If EXP has varying size, we MUST use a target since we currently
7053 have no way of allocating temporaries of variable size
7054 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7055 So we assume here that something at a higher level has prevented a
7056 clash. This is somewhat bogus, but the best we can do. Only
7057 do this when X is BLKmode and when we are at the top level. */
7058 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7059 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7060 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7061 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7062 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7063 != INTEGER_CST)
7064 && GET_MODE (x) == BLKmode)
7065 /* If X is in the outgoing argument area, it is always safe. */
7066 || (MEM_P (x)
7067 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7068 || (GET_CODE (XEXP (x, 0)) == PLUS
7069 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7070 return 1;
7071
7072 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7073 find the underlying pseudo. */
7074 if (GET_CODE (x) == SUBREG)
7075 {
7076 x = SUBREG_REG (x);
7077 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7078 return 0;
7079 }
7080
7081 /* Now look at our tree code and possibly recurse. */
7082 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7083 {
7084 case tcc_declaration:
7085 exp_rtl = DECL_RTL_IF_SET (exp);
7086 break;
7087
7088 case tcc_constant:
7089 return 1;
7090
7091 case tcc_exceptional:
7092 if (TREE_CODE (exp) == TREE_LIST)
7093 {
7094 while (1)
7095 {
7096 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7097 return 0;
7098 exp = TREE_CHAIN (exp);
7099 if (!exp)
7100 return 1;
7101 if (TREE_CODE (exp) != TREE_LIST)
7102 return safe_from_p (x, exp, 0);
7103 }
7104 }
7105 else if (TREE_CODE (exp) == CONSTRUCTOR)
7106 {
7107 constructor_elt *ce;
7108 unsigned HOST_WIDE_INT idx;
7109
7110 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
7111 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7112 || !safe_from_p (x, ce->value, 0))
7113 return 0;
7114 return 1;
7115 }
7116 else if (TREE_CODE (exp) == ERROR_MARK)
7117 return 1; /* An already-visited SAVE_EXPR? */
7118 else
7119 return 0;
7120
7121 case tcc_statement:
7122 /* The only case we look at here is the DECL_INITIAL inside a
7123 DECL_EXPR. */
7124 return (TREE_CODE (exp) != DECL_EXPR
7125 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7126 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7127 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7128
7129 case tcc_binary:
7130 case tcc_comparison:
7131 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7132 return 0;
7133 /* Fall through. */
7134
7135 case tcc_unary:
7136 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7137
7138 case tcc_expression:
7139 case tcc_reference:
7140 case tcc_vl_exp:
7141 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7142 the expression. If it is set, we conflict iff we are that rtx or
7143 both are in memory. Otherwise, we check all operands of the
7144 expression recursively. */
7145
7146 switch (TREE_CODE (exp))
7147 {
7148 case ADDR_EXPR:
7149 /* If the operand is static or we are static, we can't conflict.
7150 Likewise if we don't conflict with the operand at all. */
7151 if (staticp (TREE_OPERAND (exp, 0))
7152 || TREE_STATIC (exp)
7153 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7154 return 1;
7155
7156 /* Otherwise, the only way this can conflict is if we are taking
7157 the address of a DECL a that address if part of X, which is
7158 very rare. */
7159 exp = TREE_OPERAND (exp, 0);
7160 if (DECL_P (exp))
7161 {
7162 if (!DECL_RTL_SET_P (exp)
7163 || !MEM_P (DECL_RTL (exp)))
7164 return 0;
7165 else
7166 exp_rtl = XEXP (DECL_RTL (exp), 0);
7167 }
7168 break;
7169
7170 case MEM_REF:
7171 if (MEM_P (x)
7172 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7173 get_alias_set (exp)))
7174 return 0;
7175 break;
7176
7177 case CALL_EXPR:
7178 /* Assume that the call will clobber all hard registers and
7179 all of memory. */
7180 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7181 || MEM_P (x))
7182 return 0;
7183 break;
7184
7185 case WITH_CLEANUP_EXPR:
7186 case CLEANUP_POINT_EXPR:
7187 /* Lowered by gimplify.c. */
7188 gcc_unreachable ();
7189
7190 case SAVE_EXPR:
7191 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7192
7193 default:
7194 break;
7195 }
7196
7197 /* If we have an rtx, we do not need to scan our operands. */
7198 if (exp_rtl)
7199 break;
7200
7201 nops = TREE_OPERAND_LENGTH (exp);
7202 for (i = 0; i < nops; i++)
7203 if (TREE_OPERAND (exp, i) != 0
7204 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7205 return 0;
7206
7207 break;
7208
7209 case tcc_type:
7210 /* Should never get a type here. */
7211 gcc_unreachable ();
7212 }
7213
7214 /* If we have an rtl, find any enclosed object. Then see if we conflict
7215 with it. */
7216 if (exp_rtl)
7217 {
7218 if (GET_CODE (exp_rtl) == SUBREG)
7219 {
7220 exp_rtl = SUBREG_REG (exp_rtl);
7221 if (REG_P (exp_rtl)
7222 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7223 return 0;
7224 }
7225
7226 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7227 are memory and they conflict. */
7228 return ! (rtx_equal_p (x, exp_rtl)
7229 || (MEM_P (x) && MEM_P (exp_rtl)
7230 && true_dependence (exp_rtl, VOIDmode, x)));
7231 }
7232
7233 /* If we reach here, it is safe. */
7234 return 1;
7235 }
7236
7237 \f
7238 /* Return the highest power of two that EXP is known to be a multiple of.
7239 This is used in updating alignment of MEMs in array references. */
7240
7241 unsigned HOST_WIDE_INT
7242 highest_pow2_factor (const_tree exp)
7243 {
7244 unsigned HOST_WIDE_INT c0, c1;
7245
7246 switch (TREE_CODE (exp))
7247 {
7248 case INTEGER_CST:
7249 /* We can find the lowest bit that's a one. If the low
7250 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7251 We need to handle this case since we can find it in a COND_EXPR,
7252 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7253 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7254 later ICE. */
7255 if (TREE_OVERFLOW (exp))
7256 return BIGGEST_ALIGNMENT;
7257 else
7258 {
7259 /* Note: tree_low_cst is intentionally not used here,
7260 we don't care about the upper bits. */
7261 c0 = TREE_INT_CST_LOW (exp);
7262 c0 &= -c0;
7263 return c0 ? c0 : BIGGEST_ALIGNMENT;
7264 }
7265 break;
7266
7267 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7268 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7269 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7270 return MIN (c0, c1);
7271
7272 case MULT_EXPR:
7273 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7274 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7275 return c0 * c1;
7276
7277 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7278 case CEIL_DIV_EXPR:
7279 if (integer_pow2p (TREE_OPERAND (exp, 1))
7280 && host_integerp (TREE_OPERAND (exp, 1), 1))
7281 {
7282 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7283 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7284 return MAX (1, c0 / c1);
7285 }
7286 break;
7287
7288 case BIT_AND_EXPR:
7289 /* The highest power of two of a bit-and expression is the maximum of
7290 that of its operands. We typically get here for a complex LHS and
7291 a constant negative power of two on the RHS to force an explicit
7292 alignment, so don't bother looking at the LHS. */
7293 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7294
7295 CASE_CONVERT:
7296 case SAVE_EXPR:
7297 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7298
7299 case COMPOUND_EXPR:
7300 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7301
7302 case COND_EXPR:
7303 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7304 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7305 return MIN (c0, c1);
7306
7307 default:
7308 break;
7309 }
7310
7311 return 1;
7312 }
7313
7314 /* Similar, except that the alignment requirements of TARGET are
7315 taken into account. Assume it is at least as aligned as its
7316 type, unless it is a COMPONENT_REF in which case the layout of
7317 the structure gives the alignment. */
7318
7319 static unsigned HOST_WIDE_INT
7320 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7321 {
7322 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7323 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7324
7325 return MAX (factor, talign);
7326 }
7327 \f
7328 #ifdef HAVE_conditional_move
7329 /* Convert the tree comparison code TCODE to the rtl one where the
7330 signedness is UNSIGNEDP. */
7331
7332 static enum rtx_code
7333 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7334 {
7335 enum rtx_code code;
7336 switch (tcode)
7337 {
7338 case EQ_EXPR:
7339 code = EQ;
7340 break;
7341 case NE_EXPR:
7342 code = NE;
7343 break;
7344 case LT_EXPR:
7345 code = unsignedp ? LTU : LT;
7346 break;
7347 case LE_EXPR:
7348 code = unsignedp ? LEU : LE;
7349 break;
7350 case GT_EXPR:
7351 code = unsignedp ? GTU : GT;
7352 break;
7353 case GE_EXPR:
7354 code = unsignedp ? GEU : GE;
7355 break;
7356 case UNORDERED_EXPR:
7357 code = UNORDERED;
7358 break;
7359 case ORDERED_EXPR:
7360 code = ORDERED;
7361 break;
7362 case UNLT_EXPR:
7363 code = UNLT;
7364 break;
7365 case UNLE_EXPR:
7366 code = UNLE;
7367 break;
7368 case UNGT_EXPR:
7369 code = UNGT;
7370 break;
7371 case UNGE_EXPR:
7372 code = UNGE;
7373 break;
7374 case UNEQ_EXPR:
7375 code = UNEQ;
7376 break;
7377 case LTGT_EXPR:
7378 code = LTGT;
7379 break;
7380
7381 default:
7382 gcc_unreachable ();
7383 }
7384 return code;
7385 }
7386 #endif
7387
7388 /* Subroutine of expand_expr. Expand the two operands of a binary
7389 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7390 The value may be stored in TARGET if TARGET is nonzero. The
7391 MODIFIER argument is as documented by expand_expr. */
7392
7393 static void
7394 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7395 enum expand_modifier modifier)
7396 {
7397 if (! safe_from_p (target, exp1, 1))
7398 target = 0;
7399 if (operand_equal_p (exp0, exp1, 0))
7400 {
7401 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7402 *op1 = copy_rtx (*op0);
7403 }
7404 else
7405 {
7406 /* If we need to preserve evaluation order, copy exp0 into its own
7407 temporary variable so that it can't be clobbered by exp1. */
7408 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7409 exp0 = save_expr (exp0);
7410 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7411 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7412 }
7413 }
7414
7415 \f
7416 /* Return a MEM that contains constant EXP. DEFER is as for
7417 output_constant_def and MODIFIER is as for expand_expr. */
7418
7419 static rtx
7420 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7421 {
7422 rtx mem;
7423
7424 mem = output_constant_def (exp, defer);
7425 if (modifier != EXPAND_INITIALIZER)
7426 mem = use_anchored_address (mem);
7427 return mem;
7428 }
7429
7430 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7431 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7432
7433 static rtx
7434 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7435 enum expand_modifier modifier, addr_space_t as)
7436 {
7437 rtx result, subtarget;
7438 tree inner, offset;
7439 HOST_WIDE_INT bitsize, bitpos;
7440 int volatilep, unsignedp;
7441 enum machine_mode mode1;
7442
7443 /* If we are taking the address of a constant and are at the top level,
7444 we have to use output_constant_def since we can't call force_const_mem
7445 at top level. */
7446 /* ??? This should be considered a front-end bug. We should not be
7447 generating ADDR_EXPR of something that isn't an LVALUE. The only
7448 exception here is STRING_CST. */
7449 if (CONSTANT_CLASS_P (exp))
7450 {
7451 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7452 if (modifier < EXPAND_SUM)
7453 result = force_operand (result, target);
7454 return result;
7455 }
7456
7457 /* Everything must be something allowed by is_gimple_addressable. */
7458 switch (TREE_CODE (exp))
7459 {
7460 case INDIRECT_REF:
7461 /* This case will happen via recursion for &a->b. */
7462 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7463
7464 case MEM_REF:
7465 {
7466 tree tem = TREE_OPERAND (exp, 0);
7467 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7468 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7469 return expand_expr (tem, target, tmode, modifier);
7470 }
7471
7472 case CONST_DECL:
7473 /* Expand the initializer like constants above. */
7474 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7475 0, modifier), 0);
7476 if (modifier < EXPAND_SUM)
7477 result = force_operand (result, target);
7478 return result;
7479
7480 case REALPART_EXPR:
7481 /* The real part of the complex number is always first, therefore
7482 the address is the same as the address of the parent object. */
7483 offset = 0;
7484 bitpos = 0;
7485 inner = TREE_OPERAND (exp, 0);
7486 break;
7487
7488 case IMAGPART_EXPR:
7489 /* The imaginary part of the complex number is always second.
7490 The expression is therefore always offset by the size of the
7491 scalar type. */
7492 offset = 0;
7493 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7494 inner = TREE_OPERAND (exp, 0);
7495 break;
7496
7497 default:
7498 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7499 expand_expr, as that can have various side effects; LABEL_DECLs for
7500 example, may not have their DECL_RTL set yet. Expand the rtl of
7501 CONSTRUCTORs too, which should yield a memory reference for the
7502 constructor's contents. Assume language specific tree nodes can
7503 be expanded in some interesting way. */
7504 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7505 if (DECL_P (exp)
7506 || TREE_CODE (exp) == CONSTRUCTOR
7507 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7508 {
7509 result = expand_expr (exp, target, tmode,
7510 modifier == EXPAND_INITIALIZER
7511 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7512
7513 /* If the DECL isn't in memory, then the DECL wasn't properly
7514 marked TREE_ADDRESSABLE, which will be either a front-end
7515 or a tree optimizer bug. */
7516
7517 if (TREE_ADDRESSABLE (exp)
7518 && ! MEM_P (result)
7519 && ! targetm.calls.allocate_stack_slots_for_args())
7520 {
7521 error ("local frame unavailable (naked function?)");
7522 return result;
7523 }
7524 else
7525 gcc_assert (MEM_P (result));
7526 result = XEXP (result, 0);
7527
7528 /* ??? Is this needed anymore? */
7529 if (DECL_P (exp))
7530 TREE_USED (exp) = 1;
7531
7532 if (modifier != EXPAND_INITIALIZER
7533 && modifier != EXPAND_CONST_ADDRESS
7534 && modifier != EXPAND_SUM)
7535 result = force_operand (result, target);
7536 return result;
7537 }
7538
7539 /* Pass FALSE as the last argument to get_inner_reference although
7540 we are expanding to RTL. The rationale is that we know how to
7541 handle "aligning nodes" here: we can just bypass them because
7542 they won't change the final object whose address will be returned
7543 (they actually exist only for that purpose). */
7544 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7545 &mode1, &unsignedp, &volatilep, false);
7546 break;
7547 }
7548
7549 /* We must have made progress. */
7550 gcc_assert (inner != exp);
7551
7552 subtarget = offset || bitpos ? NULL_RTX : target;
7553 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7554 inner alignment, force the inner to be sufficiently aligned. */
7555 if (CONSTANT_CLASS_P (inner)
7556 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7557 {
7558 inner = copy_node (inner);
7559 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7560 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7561 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7562 }
7563 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7564
7565 if (offset)
7566 {
7567 rtx tmp;
7568
7569 if (modifier != EXPAND_NORMAL)
7570 result = force_operand (result, NULL);
7571 tmp = expand_expr (offset, NULL_RTX, tmode,
7572 modifier == EXPAND_INITIALIZER
7573 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7574
7575 result = convert_memory_address_addr_space (tmode, result, as);
7576 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7577
7578 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7579 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7580 else
7581 {
7582 subtarget = bitpos ? NULL_RTX : target;
7583 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7584 1, OPTAB_LIB_WIDEN);
7585 }
7586 }
7587
7588 if (bitpos)
7589 {
7590 /* Someone beforehand should have rejected taking the address
7591 of such an object. */
7592 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7593
7594 result = convert_memory_address_addr_space (tmode, result, as);
7595 result = plus_constant (tmode, result, bitpos / BITS_PER_UNIT);
7596 if (modifier < EXPAND_SUM)
7597 result = force_operand (result, target);
7598 }
7599
7600 return result;
7601 }
7602
7603 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7604 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7605
7606 static rtx
7607 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7608 enum expand_modifier modifier)
7609 {
7610 addr_space_t as = ADDR_SPACE_GENERIC;
7611 enum machine_mode address_mode = Pmode;
7612 enum machine_mode pointer_mode = ptr_mode;
7613 enum machine_mode rmode;
7614 rtx result;
7615
7616 /* Target mode of VOIDmode says "whatever's natural". */
7617 if (tmode == VOIDmode)
7618 tmode = TYPE_MODE (TREE_TYPE (exp));
7619
7620 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7621 {
7622 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7623 address_mode = targetm.addr_space.address_mode (as);
7624 pointer_mode = targetm.addr_space.pointer_mode (as);
7625 }
7626
7627 /* We can get called with some Weird Things if the user does silliness
7628 like "(short) &a". In that case, convert_memory_address won't do
7629 the right thing, so ignore the given target mode. */
7630 if (tmode != address_mode && tmode != pointer_mode)
7631 tmode = address_mode;
7632
7633 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7634 tmode, modifier, as);
7635
7636 /* Despite expand_expr claims concerning ignoring TMODE when not
7637 strictly convenient, stuff breaks if we don't honor it. Note
7638 that combined with the above, we only do this for pointer modes. */
7639 rmode = GET_MODE (result);
7640 if (rmode == VOIDmode)
7641 rmode = tmode;
7642 if (rmode != tmode)
7643 result = convert_memory_address_addr_space (tmode, result, as);
7644
7645 return result;
7646 }
7647
7648 /* Generate code for computing CONSTRUCTOR EXP.
7649 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7650 is TRUE, instead of creating a temporary variable in memory
7651 NULL is returned and the caller needs to handle it differently. */
7652
7653 static rtx
7654 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7655 bool avoid_temp_mem)
7656 {
7657 tree type = TREE_TYPE (exp);
7658 enum machine_mode mode = TYPE_MODE (type);
7659
7660 /* Try to avoid creating a temporary at all. This is possible
7661 if all of the initializer is zero.
7662 FIXME: try to handle all [0..255] initializers we can handle
7663 with memset. */
7664 if (TREE_STATIC (exp)
7665 && !TREE_ADDRESSABLE (exp)
7666 && target != 0 && mode == BLKmode
7667 && all_zeros_p (exp))
7668 {
7669 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7670 return target;
7671 }
7672
7673 /* All elts simple constants => refer to a constant in memory. But
7674 if this is a non-BLKmode mode, let it store a field at a time
7675 since that should make a CONST_INT or CONST_DOUBLE when we
7676 fold. Likewise, if we have a target we can use, it is best to
7677 store directly into the target unless the type is large enough
7678 that memcpy will be used. If we are making an initializer and
7679 all operands are constant, put it in memory as well.
7680
7681 FIXME: Avoid trying to fill vector constructors piece-meal.
7682 Output them with output_constant_def below unless we're sure
7683 they're zeros. This should go away when vector initializers
7684 are treated like VECTOR_CST instead of arrays. */
7685 if ((TREE_STATIC (exp)
7686 && ((mode == BLKmode
7687 && ! (target != 0 && safe_from_p (target, exp, 1)))
7688 || TREE_ADDRESSABLE (exp)
7689 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7690 && (! MOVE_BY_PIECES_P
7691 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7692 TYPE_ALIGN (type)))
7693 && ! mostly_zeros_p (exp))))
7694 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7695 && TREE_CONSTANT (exp)))
7696 {
7697 rtx constructor;
7698
7699 if (avoid_temp_mem)
7700 return NULL_RTX;
7701
7702 constructor = expand_expr_constant (exp, 1, modifier);
7703
7704 if (modifier != EXPAND_CONST_ADDRESS
7705 && modifier != EXPAND_INITIALIZER
7706 && modifier != EXPAND_SUM)
7707 constructor = validize_mem (constructor);
7708
7709 return constructor;
7710 }
7711
7712 /* Handle calls that pass values in multiple non-contiguous
7713 locations. The Irix 6 ABI has examples of this. */
7714 if (target == 0 || ! safe_from_p (target, exp, 1)
7715 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7716 {
7717 if (avoid_temp_mem)
7718 return NULL_RTX;
7719
7720 target
7721 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7722 | (TREE_READONLY (exp)
7723 * TYPE_QUAL_CONST))),
7724 TREE_ADDRESSABLE (exp), 1);
7725 }
7726
7727 store_constructor (exp, target, 0, int_expr_size (exp));
7728 return target;
7729 }
7730
7731
7732 /* expand_expr: generate code for computing expression EXP.
7733 An rtx for the computed value is returned. The value is never null.
7734 In the case of a void EXP, const0_rtx is returned.
7735
7736 The value may be stored in TARGET if TARGET is nonzero.
7737 TARGET is just a suggestion; callers must assume that
7738 the rtx returned may not be the same as TARGET.
7739
7740 If TARGET is CONST0_RTX, it means that the value will be ignored.
7741
7742 If TMODE is not VOIDmode, it suggests generating the
7743 result in mode TMODE. But this is done only when convenient.
7744 Otherwise, TMODE is ignored and the value generated in its natural mode.
7745 TMODE is just a suggestion; callers must assume that
7746 the rtx returned may not have mode TMODE.
7747
7748 Note that TARGET may have neither TMODE nor MODE. In that case, it
7749 probably will not be used.
7750
7751 If MODIFIER is EXPAND_SUM then when EXP is an addition
7752 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7753 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7754 products as above, or REG or MEM, or constant.
7755 Ordinarily in such cases we would output mul or add instructions
7756 and then return a pseudo reg containing the sum.
7757
7758 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7759 it also marks a label as absolutely required (it can't be dead).
7760 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7761 This is used for outputting expressions used in initializers.
7762
7763 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7764 with a constant address even if that address is not normally legitimate.
7765 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7766
7767 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7768 a call parameter. Such targets require special care as we haven't yet
7769 marked TARGET so that it's safe from being trashed by libcalls. We
7770 don't want to use TARGET for anything but the final result;
7771 Intermediate values must go elsewhere. Additionally, calls to
7772 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7773
7774 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7775 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7776 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7777 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7778 recursively. */
7779
7780 rtx
7781 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7782 enum expand_modifier modifier, rtx *alt_rtl)
7783 {
7784 rtx ret;
7785
7786 /* Handle ERROR_MARK before anybody tries to access its type. */
7787 if (TREE_CODE (exp) == ERROR_MARK
7788 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7789 {
7790 ret = CONST0_RTX (tmode);
7791 return ret ? ret : const0_rtx;
7792 }
7793
7794 /* If this is an expression of some kind and it has an associated line
7795 number, then emit the line number before expanding the expression.
7796
7797 We need to save and restore the file and line information so that
7798 errors discovered during expansion are emitted with the right
7799 information. It would be better of the diagnostic routines
7800 used the file/line information embedded in the tree nodes rather
7801 than globals. */
7802 if (cfun && EXPR_HAS_LOCATION (exp))
7803 {
7804 location_t saved_location = input_location;
7805 location_t saved_curr_loc = get_curr_insn_source_location ();
7806 tree saved_block = get_curr_insn_block ();
7807 input_location = EXPR_LOCATION (exp);
7808 set_curr_insn_source_location (input_location);
7809
7810 /* Record where the insns produced belong. */
7811 set_curr_insn_block (TREE_BLOCK (exp));
7812
7813 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7814
7815 input_location = saved_location;
7816 set_curr_insn_block (saved_block);
7817 set_curr_insn_source_location (saved_curr_loc);
7818 }
7819 else
7820 {
7821 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7822 }
7823
7824 return ret;
7825 }
7826
7827 /* Try to expand the conditional expression which is represented by
7828 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If succeseds
7829 return the rtl reg which repsents the result. Otherwise return
7830 NULL_RTL. */
7831
7832 static rtx
7833 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
7834 tree treeop1 ATTRIBUTE_UNUSED,
7835 tree treeop2 ATTRIBUTE_UNUSED)
7836 {
7837 #ifdef HAVE_conditional_move
7838 rtx insn;
7839 rtx op00, op01, op1, op2;
7840 enum rtx_code comparison_code;
7841 enum machine_mode comparison_mode;
7842 gimple srcstmt;
7843 rtx temp;
7844 tree type = TREE_TYPE (treeop1);
7845 int unsignedp = TYPE_UNSIGNED (type);
7846 enum machine_mode mode = TYPE_MODE (type);
7847
7848 temp = assign_temp (type, 0, 1);
7849
7850 /* If we cannot do a conditional move on the mode, try doing it
7851 with the promoted mode. */
7852 if (!can_conditionally_move_p (mode))
7853 mode = promote_mode (type, mode, &unsignedp);
7854
7855 if (!can_conditionally_move_p (mode))
7856 return NULL_RTX;
7857
7858 start_sequence ();
7859 expand_operands (treeop1, treeop2,
7860 temp, &op1, &op2, EXPAND_NORMAL);
7861
7862 if (TREE_CODE (treeop0) == SSA_NAME
7863 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
7864 {
7865 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
7866 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
7867 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
7868 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
7869 comparison_mode = TYPE_MODE (type);
7870 unsignedp = TYPE_UNSIGNED (type);
7871 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7872 }
7873 else if (TREE_CODE_CLASS (TREE_CODE (treeop0)) == tcc_comparison)
7874 {
7875 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
7876 enum tree_code cmpcode = TREE_CODE (treeop0);
7877 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
7878 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
7879 unsignedp = TYPE_UNSIGNED (type);
7880 comparison_mode = TYPE_MODE (type);
7881 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7882 }
7883 else
7884 {
7885 op00 = expand_normal (treeop0);
7886 op01 = const0_rtx;
7887 comparison_code = NE;
7888 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
7889 }
7890
7891 if (GET_MODE (op1) != mode)
7892 op1 = gen_lowpart (mode, op1);
7893
7894 if (GET_MODE (op2) != mode)
7895 op2 = gen_lowpart (mode, op2);
7896
7897 /* Try to emit the conditional move. */
7898 insn = emit_conditional_move (temp, comparison_code,
7899 op00, op01, comparison_mode,
7900 op1, op2, mode,
7901 unsignedp);
7902
7903 /* If we could do the conditional move, emit the sequence,
7904 and return. */
7905 if (insn)
7906 {
7907 rtx seq = get_insns ();
7908 end_sequence ();
7909 emit_insn (seq);
7910 return temp;
7911 }
7912
7913 /* Otherwise discard the sequence and fall back to code with
7914 branches. */
7915 end_sequence ();
7916 #endif
7917 return NULL_RTX;
7918 }
7919
7920 rtx
7921 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7922 enum expand_modifier modifier)
7923 {
7924 rtx op0, op1, op2, temp;
7925 tree type;
7926 int unsignedp;
7927 enum machine_mode mode;
7928 enum tree_code code = ops->code;
7929 optab this_optab;
7930 rtx subtarget, original_target;
7931 int ignore;
7932 bool reduce_bit_field;
7933 location_t loc = ops->location;
7934 tree treeop0, treeop1, treeop2;
7935 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7936 ? reduce_to_bit_field_precision ((expr), \
7937 target, \
7938 type) \
7939 : (expr))
7940
7941 type = ops->type;
7942 mode = TYPE_MODE (type);
7943 unsignedp = TYPE_UNSIGNED (type);
7944
7945 treeop0 = ops->op0;
7946 treeop1 = ops->op1;
7947 treeop2 = ops->op2;
7948
7949 /* We should be called only on simple (binary or unary) expressions,
7950 exactly those that are valid in gimple expressions that aren't
7951 GIMPLE_SINGLE_RHS (or invalid). */
7952 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7953 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7954 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7955
7956 ignore = (target == const0_rtx
7957 || ((CONVERT_EXPR_CODE_P (code)
7958 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7959 && TREE_CODE (type) == VOID_TYPE));
7960
7961 /* We should be called only if we need the result. */
7962 gcc_assert (!ignore);
7963
7964 /* An operation in what may be a bit-field type needs the
7965 result to be reduced to the precision of the bit-field type,
7966 which is narrower than that of the type's mode. */
7967 reduce_bit_field = (INTEGRAL_TYPE_P (type)
7968 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7969
7970 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7971 target = 0;
7972
7973 /* Use subtarget as the target for operand 0 of a binary operation. */
7974 subtarget = get_subtarget (target);
7975 original_target = target;
7976
7977 switch (code)
7978 {
7979 case NON_LVALUE_EXPR:
7980 case PAREN_EXPR:
7981 CASE_CONVERT:
7982 if (treeop0 == error_mark_node)
7983 return const0_rtx;
7984
7985 if (TREE_CODE (type) == UNION_TYPE)
7986 {
7987 tree valtype = TREE_TYPE (treeop0);
7988
7989 /* If both input and output are BLKmode, this conversion isn't doing
7990 anything except possibly changing memory attribute. */
7991 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7992 {
7993 rtx result = expand_expr (treeop0, target, tmode,
7994 modifier);
7995
7996 result = copy_rtx (result);
7997 set_mem_attributes (result, type, 0);
7998 return result;
7999 }
8000
8001 if (target == 0)
8002 {
8003 if (TYPE_MODE (type) != BLKmode)
8004 target = gen_reg_rtx (TYPE_MODE (type));
8005 else
8006 target = assign_temp (type, 1, 1);
8007 }
8008
8009 if (MEM_P (target))
8010 /* Store data into beginning of memory target. */
8011 store_expr (treeop0,
8012 adjust_address (target, TYPE_MODE (valtype), 0),
8013 modifier == EXPAND_STACK_PARM,
8014 false);
8015
8016 else
8017 {
8018 gcc_assert (REG_P (target));
8019
8020 /* Store this field into a union of the proper type. */
8021 store_field (target,
8022 MIN ((int_size_in_bytes (TREE_TYPE
8023 (treeop0))
8024 * BITS_PER_UNIT),
8025 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
8026 0, 0, 0, TYPE_MODE (valtype), treeop0,
8027 type, 0, false);
8028 }
8029
8030 /* Return the entire union. */
8031 return target;
8032 }
8033
8034 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8035 {
8036 op0 = expand_expr (treeop0, target, VOIDmode,
8037 modifier);
8038
8039 /* If the signedness of the conversion differs and OP0 is
8040 a promoted SUBREG, clear that indication since we now
8041 have to do the proper extension. */
8042 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8043 && GET_CODE (op0) == SUBREG)
8044 SUBREG_PROMOTED_VAR_P (op0) = 0;
8045
8046 return REDUCE_BIT_FIELD (op0);
8047 }
8048
8049 op0 = expand_expr (treeop0, NULL_RTX, mode,
8050 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8051 if (GET_MODE (op0) == mode)
8052 ;
8053
8054 /* If OP0 is a constant, just convert it into the proper mode. */
8055 else if (CONSTANT_P (op0))
8056 {
8057 tree inner_type = TREE_TYPE (treeop0);
8058 enum machine_mode inner_mode = GET_MODE (op0);
8059
8060 if (inner_mode == VOIDmode)
8061 inner_mode = TYPE_MODE (inner_type);
8062
8063 if (modifier == EXPAND_INITIALIZER)
8064 op0 = simplify_gen_subreg (mode, op0, inner_mode,
8065 subreg_lowpart_offset (mode,
8066 inner_mode));
8067 else
8068 op0= convert_modes (mode, inner_mode, op0,
8069 TYPE_UNSIGNED (inner_type));
8070 }
8071
8072 else if (modifier == EXPAND_INITIALIZER)
8073 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8074
8075 else if (target == 0)
8076 op0 = convert_to_mode (mode, op0,
8077 TYPE_UNSIGNED (TREE_TYPE
8078 (treeop0)));
8079 else
8080 {
8081 convert_move (target, op0,
8082 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8083 op0 = target;
8084 }
8085
8086 return REDUCE_BIT_FIELD (op0);
8087
8088 case ADDR_SPACE_CONVERT_EXPR:
8089 {
8090 tree treeop0_type = TREE_TYPE (treeop0);
8091 addr_space_t as_to;
8092 addr_space_t as_from;
8093
8094 gcc_assert (POINTER_TYPE_P (type));
8095 gcc_assert (POINTER_TYPE_P (treeop0_type));
8096
8097 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8098 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8099
8100 /* Conversions between pointers to the same address space should
8101 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8102 gcc_assert (as_to != as_from);
8103
8104 /* Ask target code to handle conversion between pointers
8105 to overlapping address spaces. */
8106 if (targetm.addr_space.subset_p (as_to, as_from)
8107 || targetm.addr_space.subset_p (as_from, as_to))
8108 {
8109 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8110 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8111 gcc_assert (op0);
8112 return op0;
8113 }
8114
8115 /* For disjoint address spaces, converting anything but
8116 a null pointer invokes undefined behaviour. We simply
8117 always return a null pointer here. */
8118 return CONST0_RTX (mode);
8119 }
8120
8121 case POINTER_PLUS_EXPR:
8122 /* Even though the sizetype mode and the pointer's mode can be different
8123 expand is able to handle this correctly and get the correct result out
8124 of the PLUS_EXPR code. */
8125 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8126 if sizetype precision is smaller than pointer precision. */
8127 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8128 treeop1 = fold_convert_loc (loc, type,
8129 fold_convert_loc (loc, ssizetype,
8130 treeop1));
8131 /* If sizetype precision is larger than pointer precision, truncate the
8132 offset to have matching modes. */
8133 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8134 treeop1 = fold_convert_loc (loc, type, treeop1);
8135
8136 case PLUS_EXPR:
8137 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8138 something else, make sure we add the register to the constant and
8139 then to the other thing. This case can occur during strength
8140 reduction and doing it this way will produce better code if the
8141 frame pointer or argument pointer is eliminated.
8142
8143 fold-const.c will ensure that the constant is always in the inner
8144 PLUS_EXPR, so the only case we need to do anything about is if
8145 sp, ap, or fp is our second argument, in which case we must swap
8146 the innermost first argument and our second argument. */
8147
8148 if (TREE_CODE (treeop0) == PLUS_EXPR
8149 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8150 && TREE_CODE (treeop1) == VAR_DECL
8151 && (DECL_RTL (treeop1) == frame_pointer_rtx
8152 || DECL_RTL (treeop1) == stack_pointer_rtx
8153 || DECL_RTL (treeop1) == arg_pointer_rtx))
8154 {
8155 gcc_unreachable ();
8156 }
8157
8158 /* If the result is to be ptr_mode and we are adding an integer to
8159 something, we might be forming a constant. So try to use
8160 plus_constant. If it produces a sum and we can't accept it,
8161 use force_operand. This allows P = &ARR[const] to generate
8162 efficient code on machines where a SYMBOL_REF is not a valid
8163 address.
8164
8165 If this is an EXPAND_SUM call, always return the sum. */
8166 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8167 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8168 {
8169 if (modifier == EXPAND_STACK_PARM)
8170 target = 0;
8171 if (TREE_CODE (treeop0) == INTEGER_CST
8172 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8173 && TREE_CONSTANT (treeop1))
8174 {
8175 rtx constant_part;
8176
8177 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8178 EXPAND_SUM);
8179 /* Use immed_double_const to ensure that the constant is
8180 truncated according to the mode of OP1, then sign extended
8181 to a HOST_WIDE_INT. Using the constant directly can result
8182 in non-canonical RTL in a 64x32 cross compile. */
8183 constant_part
8184 = immed_double_const (TREE_INT_CST_LOW (treeop0),
8185 (HOST_WIDE_INT) 0,
8186 TYPE_MODE (TREE_TYPE (treeop1)));
8187 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8188 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8189 op1 = force_operand (op1, target);
8190 return REDUCE_BIT_FIELD (op1);
8191 }
8192
8193 else if (TREE_CODE (treeop1) == INTEGER_CST
8194 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8195 && TREE_CONSTANT (treeop0))
8196 {
8197 rtx constant_part;
8198
8199 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8200 (modifier == EXPAND_INITIALIZER
8201 ? EXPAND_INITIALIZER : EXPAND_SUM));
8202 if (! CONSTANT_P (op0))
8203 {
8204 op1 = expand_expr (treeop1, NULL_RTX,
8205 VOIDmode, modifier);
8206 /* Return a PLUS if modifier says it's OK. */
8207 if (modifier == EXPAND_SUM
8208 || modifier == EXPAND_INITIALIZER)
8209 return simplify_gen_binary (PLUS, mode, op0, op1);
8210 goto binop2;
8211 }
8212 /* Use immed_double_const to ensure that the constant is
8213 truncated according to the mode of OP1, then sign extended
8214 to a HOST_WIDE_INT. Using the constant directly can result
8215 in non-canonical RTL in a 64x32 cross compile. */
8216 constant_part
8217 = immed_double_const (TREE_INT_CST_LOW (treeop1),
8218 (HOST_WIDE_INT) 0,
8219 TYPE_MODE (TREE_TYPE (treeop0)));
8220 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8221 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8222 op0 = force_operand (op0, target);
8223 return REDUCE_BIT_FIELD (op0);
8224 }
8225 }
8226
8227 /* Use TER to expand pointer addition of a negated value
8228 as pointer subtraction. */
8229 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8230 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8231 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8232 && TREE_CODE (treeop1) == SSA_NAME
8233 && TYPE_MODE (TREE_TYPE (treeop0))
8234 == TYPE_MODE (TREE_TYPE (treeop1)))
8235 {
8236 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8237 if (def)
8238 {
8239 treeop1 = gimple_assign_rhs1 (def);
8240 code = MINUS_EXPR;
8241 goto do_minus;
8242 }
8243 }
8244
8245 /* No sense saving up arithmetic to be done
8246 if it's all in the wrong mode to form part of an address.
8247 And force_operand won't know whether to sign-extend or
8248 zero-extend. */
8249 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8250 || mode != ptr_mode)
8251 {
8252 expand_operands (treeop0, treeop1,
8253 subtarget, &op0, &op1, EXPAND_NORMAL);
8254 if (op0 == const0_rtx)
8255 return op1;
8256 if (op1 == const0_rtx)
8257 return op0;
8258 goto binop2;
8259 }
8260
8261 expand_operands (treeop0, treeop1,
8262 subtarget, &op0, &op1, modifier);
8263 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8264
8265 case MINUS_EXPR:
8266 do_minus:
8267 /* For initializers, we are allowed to return a MINUS of two
8268 symbolic constants. Here we handle all cases when both operands
8269 are constant. */
8270 /* Handle difference of two symbolic constants,
8271 for the sake of an initializer. */
8272 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8273 && really_constant_p (treeop0)
8274 && really_constant_p (treeop1))
8275 {
8276 expand_operands (treeop0, treeop1,
8277 NULL_RTX, &op0, &op1, modifier);
8278
8279 /* If the last operand is a CONST_INT, use plus_constant of
8280 the negated constant. Else make the MINUS. */
8281 if (CONST_INT_P (op1))
8282 return REDUCE_BIT_FIELD (plus_constant (mode, op0,
8283 -INTVAL (op1)));
8284 else
8285 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8286 }
8287
8288 /* No sense saving up arithmetic to be done
8289 if it's all in the wrong mode to form part of an address.
8290 And force_operand won't know whether to sign-extend or
8291 zero-extend. */
8292 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8293 || mode != ptr_mode)
8294 goto binop;
8295
8296 expand_operands (treeop0, treeop1,
8297 subtarget, &op0, &op1, modifier);
8298
8299 /* Convert A - const to A + (-const). */
8300 if (CONST_INT_P (op1))
8301 {
8302 op1 = negate_rtx (mode, op1);
8303 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8304 }
8305
8306 goto binop2;
8307
8308 case WIDEN_MULT_PLUS_EXPR:
8309 case WIDEN_MULT_MINUS_EXPR:
8310 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8311 op2 = expand_normal (treeop2);
8312 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8313 target, unsignedp);
8314 return target;
8315
8316 case WIDEN_MULT_EXPR:
8317 /* If first operand is constant, swap them.
8318 Thus the following special case checks need only
8319 check the second operand. */
8320 if (TREE_CODE (treeop0) == INTEGER_CST)
8321 {
8322 tree t1 = treeop0;
8323 treeop0 = treeop1;
8324 treeop1 = t1;
8325 }
8326
8327 /* First, check if we have a multiplication of one signed and one
8328 unsigned operand. */
8329 if (TREE_CODE (treeop1) != INTEGER_CST
8330 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8331 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8332 {
8333 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8334 this_optab = usmul_widen_optab;
8335 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8336 != CODE_FOR_nothing)
8337 {
8338 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8339 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8340 EXPAND_NORMAL);
8341 else
8342 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8343 EXPAND_NORMAL);
8344 goto binop3;
8345 }
8346 }
8347 /* Check for a multiplication with matching signedness. */
8348 else if ((TREE_CODE (treeop1) == INTEGER_CST
8349 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8350 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8351 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8352 {
8353 tree op0type = TREE_TYPE (treeop0);
8354 enum machine_mode innermode = TYPE_MODE (op0type);
8355 bool zextend_p = TYPE_UNSIGNED (op0type);
8356 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8357 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8358
8359 if (TREE_CODE (treeop0) != INTEGER_CST)
8360 {
8361 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8362 != CODE_FOR_nothing)
8363 {
8364 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8365 EXPAND_NORMAL);
8366 temp = expand_widening_mult (mode, op0, op1, target,
8367 unsignedp, this_optab);
8368 return REDUCE_BIT_FIELD (temp);
8369 }
8370 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8371 != CODE_FOR_nothing
8372 && innermode == word_mode)
8373 {
8374 rtx htem, hipart;
8375 op0 = expand_normal (treeop0);
8376 if (TREE_CODE (treeop1) == INTEGER_CST)
8377 op1 = convert_modes (innermode, mode,
8378 expand_normal (treeop1), unsignedp);
8379 else
8380 op1 = expand_normal (treeop1);
8381 temp = expand_binop (mode, other_optab, op0, op1, target,
8382 unsignedp, OPTAB_LIB_WIDEN);
8383 hipart = gen_highpart (innermode, temp);
8384 htem = expand_mult_highpart_adjust (innermode, hipart,
8385 op0, op1, hipart,
8386 zextend_p);
8387 if (htem != hipart)
8388 emit_move_insn (hipart, htem);
8389 return REDUCE_BIT_FIELD (temp);
8390 }
8391 }
8392 }
8393 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8394 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8395 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8396 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8397
8398 case FMA_EXPR:
8399 {
8400 optab opt = fma_optab;
8401 gimple def0, def2;
8402
8403 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8404 call. */
8405 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8406 {
8407 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8408 tree call_expr;
8409
8410 gcc_assert (fn != NULL_TREE);
8411 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8412 return expand_builtin (call_expr, target, subtarget, mode, false);
8413 }
8414
8415 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8416 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8417
8418 op0 = op2 = NULL;
8419
8420 if (def0 && def2
8421 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8422 {
8423 opt = fnms_optab;
8424 op0 = expand_normal (gimple_assign_rhs1 (def0));
8425 op2 = expand_normal (gimple_assign_rhs1 (def2));
8426 }
8427 else if (def0
8428 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8429 {
8430 opt = fnma_optab;
8431 op0 = expand_normal (gimple_assign_rhs1 (def0));
8432 }
8433 else if (def2
8434 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8435 {
8436 opt = fms_optab;
8437 op2 = expand_normal (gimple_assign_rhs1 (def2));
8438 }
8439
8440 if (op0 == NULL)
8441 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8442 if (op2 == NULL)
8443 op2 = expand_normal (treeop2);
8444 op1 = expand_normal (treeop1);
8445
8446 return expand_ternary_op (TYPE_MODE (type), opt,
8447 op0, op1, op2, target, 0);
8448 }
8449
8450 case MULT_EXPR:
8451 /* If this is a fixed-point operation, then we cannot use the code
8452 below because "expand_mult" doesn't support sat/no-sat fixed-point
8453 multiplications. */
8454 if (ALL_FIXED_POINT_MODE_P (mode))
8455 goto binop;
8456
8457 /* If first operand is constant, swap them.
8458 Thus the following special case checks need only
8459 check the second operand. */
8460 if (TREE_CODE (treeop0) == INTEGER_CST)
8461 {
8462 tree t1 = treeop0;
8463 treeop0 = treeop1;
8464 treeop1 = t1;
8465 }
8466
8467 /* Attempt to return something suitable for generating an
8468 indexed address, for machines that support that. */
8469
8470 if (modifier == EXPAND_SUM && mode == ptr_mode
8471 && host_integerp (treeop1, 0))
8472 {
8473 tree exp1 = treeop1;
8474
8475 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8476 EXPAND_SUM);
8477
8478 if (!REG_P (op0))
8479 op0 = force_operand (op0, NULL_RTX);
8480 if (!REG_P (op0))
8481 op0 = copy_to_mode_reg (mode, op0);
8482
8483 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8484 gen_int_mode (tree_low_cst (exp1, 0),
8485 TYPE_MODE (TREE_TYPE (exp1)))));
8486 }
8487
8488 if (modifier == EXPAND_STACK_PARM)
8489 target = 0;
8490
8491 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8492 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8493
8494 case TRUNC_DIV_EXPR:
8495 case FLOOR_DIV_EXPR:
8496 case CEIL_DIV_EXPR:
8497 case ROUND_DIV_EXPR:
8498 case EXACT_DIV_EXPR:
8499 /* If this is a fixed-point operation, then we cannot use the code
8500 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8501 divisions. */
8502 if (ALL_FIXED_POINT_MODE_P (mode))
8503 goto binop;
8504
8505 if (modifier == EXPAND_STACK_PARM)
8506 target = 0;
8507 /* Possible optimization: compute the dividend with EXPAND_SUM
8508 then if the divisor is constant can optimize the case
8509 where some terms of the dividend have coeffs divisible by it. */
8510 expand_operands (treeop0, treeop1,
8511 subtarget, &op0, &op1, EXPAND_NORMAL);
8512 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8513
8514 case RDIV_EXPR:
8515 goto binop;
8516
8517 case MULT_HIGHPART_EXPR:
8518 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8519 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp);
8520 gcc_assert (temp);
8521 return temp;
8522
8523 case TRUNC_MOD_EXPR:
8524 case FLOOR_MOD_EXPR:
8525 case CEIL_MOD_EXPR:
8526 case ROUND_MOD_EXPR:
8527 if (modifier == EXPAND_STACK_PARM)
8528 target = 0;
8529 expand_operands (treeop0, treeop1,
8530 subtarget, &op0, &op1, EXPAND_NORMAL);
8531 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8532
8533 case FIXED_CONVERT_EXPR:
8534 op0 = expand_normal (treeop0);
8535 if (target == 0 || modifier == EXPAND_STACK_PARM)
8536 target = gen_reg_rtx (mode);
8537
8538 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8539 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8540 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8541 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8542 else
8543 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8544 return target;
8545
8546 case FIX_TRUNC_EXPR:
8547 op0 = expand_normal (treeop0);
8548 if (target == 0 || modifier == EXPAND_STACK_PARM)
8549 target = gen_reg_rtx (mode);
8550 expand_fix (target, op0, unsignedp);
8551 return target;
8552
8553 case FLOAT_EXPR:
8554 op0 = expand_normal (treeop0);
8555 if (target == 0 || modifier == EXPAND_STACK_PARM)
8556 target = gen_reg_rtx (mode);
8557 /* expand_float can't figure out what to do if FROM has VOIDmode.
8558 So give it the correct mode. With -O, cse will optimize this. */
8559 if (GET_MODE (op0) == VOIDmode)
8560 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8561 op0);
8562 expand_float (target, op0,
8563 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8564 return target;
8565
8566 case NEGATE_EXPR:
8567 op0 = expand_expr (treeop0, subtarget,
8568 VOIDmode, EXPAND_NORMAL);
8569 if (modifier == EXPAND_STACK_PARM)
8570 target = 0;
8571 temp = expand_unop (mode,
8572 optab_for_tree_code (NEGATE_EXPR, type,
8573 optab_default),
8574 op0, target, 0);
8575 gcc_assert (temp);
8576 return REDUCE_BIT_FIELD (temp);
8577
8578 case ABS_EXPR:
8579 op0 = expand_expr (treeop0, subtarget,
8580 VOIDmode, EXPAND_NORMAL);
8581 if (modifier == EXPAND_STACK_PARM)
8582 target = 0;
8583
8584 /* ABS_EXPR is not valid for complex arguments. */
8585 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8586 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8587
8588 /* Unsigned abs is simply the operand. Testing here means we don't
8589 risk generating incorrect code below. */
8590 if (TYPE_UNSIGNED (type))
8591 return op0;
8592
8593 return expand_abs (mode, op0, target, unsignedp,
8594 safe_from_p (target, treeop0, 1));
8595
8596 case MAX_EXPR:
8597 case MIN_EXPR:
8598 target = original_target;
8599 if (target == 0
8600 || modifier == EXPAND_STACK_PARM
8601 || (MEM_P (target) && MEM_VOLATILE_P (target))
8602 || GET_MODE (target) != mode
8603 || (REG_P (target)
8604 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8605 target = gen_reg_rtx (mode);
8606 expand_operands (treeop0, treeop1,
8607 target, &op0, &op1, EXPAND_NORMAL);
8608
8609 /* First try to do it with a special MIN or MAX instruction.
8610 If that does not win, use a conditional jump to select the proper
8611 value. */
8612 this_optab = optab_for_tree_code (code, type, optab_default);
8613 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8614 OPTAB_WIDEN);
8615 if (temp != 0)
8616 return temp;
8617
8618 /* At this point, a MEM target is no longer useful; we will get better
8619 code without it. */
8620
8621 if (! REG_P (target))
8622 target = gen_reg_rtx (mode);
8623
8624 /* If op1 was placed in target, swap op0 and op1. */
8625 if (target != op0 && target == op1)
8626 {
8627 temp = op0;
8628 op0 = op1;
8629 op1 = temp;
8630 }
8631
8632 /* We generate better code and avoid problems with op1 mentioning
8633 target by forcing op1 into a pseudo if it isn't a constant. */
8634 if (! CONSTANT_P (op1))
8635 op1 = force_reg (mode, op1);
8636
8637 {
8638 enum rtx_code comparison_code;
8639 rtx cmpop1 = op1;
8640
8641 if (code == MAX_EXPR)
8642 comparison_code = unsignedp ? GEU : GE;
8643 else
8644 comparison_code = unsignedp ? LEU : LE;
8645
8646 /* Canonicalize to comparisons against 0. */
8647 if (op1 == const1_rtx)
8648 {
8649 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8650 or (a != 0 ? a : 1) for unsigned.
8651 For MIN we are safe converting (a <= 1 ? a : 1)
8652 into (a <= 0 ? a : 1) */
8653 cmpop1 = const0_rtx;
8654 if (code == MAX_EXPR)
8655 comparison_code = unsignedp ? NE : GT;
8656 }
8657 if (op1 == constm1_rtx && !unsignedp)
8658 {
8659 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8660 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8661 cmpop1 = const0_rtx;
8662 if (code == MIN_EXPR)
8663 comparison_code = LT;
8664 }
8665 #ifdef HAVE_conditional_move
8666 /* Use a conditional move if possible. */
8667 if (can_conditionally_move_p (mode))
8668 {
8669 rtx insn;
8670
8671 /* ??? Same problem as in expmed.c: emit_conditional_move
8672 forces a stack adjustment via compare_from_rtx, and we
8673 lose the stack adjustment if the sequence we are about
8674 to create is discarded. */
8675 do_pending_stack_adjust ();
8676
8677 start_sequence ();
8678
8679 /* Try to emit the conditional move. */
8680 insn = emit_conditional_move (target, comparison_code,
8681 op0, cmpop1, mode,
8682 op0, op1, mode,
8683 unsignedp);
8684
8685 /* If we could do the conditional move, emit the sequence,
8686 and return. */
8687 if (insn)
8688 {
8689 rtx seq = get_insns ();
8690 end_sequence ();
8691 emit_insn (seq);
8692 return target;
8693 }
8694
8695 /* Otherwise discard the sequence and fall back to code with
8696 branches. */
8697 end_sequence ();
8698 }
8699 #endif
8700 if (target != op0)
8701 emit_move_insn (target, op0);
8702
8703 temp = gen_label_rtx ();
8704 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8705 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8706 -1);
8707 }
8708 emit_move_insn (target, op1);
8709 emit_label (temp);
8710 return target;
8711
8712 case BIT_NOT_EXPR:
8713 op0 = expand_expr (treeop0, subtarget,
8714 VOIDmode, EXPAND_NORMAL);
8715 if (modifier == EXPAND_STACK_PARM)
8716 target = 0;
8717 /* In case we have to reduce the result to bitfield precision
8718 for unsigned bitfield expand this as XOR with a proper constant
8719 instead. */
8720 if (reduce_bit_field && TYPE_UNSIGNED (type))
8721 temp = expand_binop (mode, xor_optab, op0,
8722 immed_double_int_const
8723 (double_int_mask (TYPE_PRECISION (type)), mode),
8724 target, 1, OPTAB_LIB_WIDEN);
8725 else
8726 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8727 gcc_assert (temp);
8728 return temp;
8729
8730 /* ??? Can optimize bitwise operations with one arg constant.
8731 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8732 and (a bitwise1 b) bitwise2 b (etc)
8733 but that is probably not worth while. */
8734
8735 case BIT_AND_EXPR:
8736 case BIT_IOR_EXPR:
8737 case BIT_XOR_EXPR:
8738 goto binop;
8739
8740 case LROTATE_EXPR:
8741 case RROTATE_EXPR:
8742 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8743 || (GET_MODE_PRECISION (TYPE_MODE (type))
8744 == TYPE_PRECISION (type)));
8745 /* fall through */
8746
8747 case LSHIFT_EXPR:
8748 case RSHIFT_EXPR:
8749 /* If this is a fixed-point operation, then we cannot use the code
8750 below because "expand_shift" doesn't support sat/no-sat fixed-point
8751 shifts. */
8752 if (ALL_FIXED_POINT_MODE_P (mode))
8753 goto binop;
8754
8755 if (! safe_from_p (subtarget, treeop1, 1))
8756 subtarget = 0;
8757 if (modifier == EXPAND_STACK_PARM)
8758 target = 0;
8759 op0 = expand_expr (treeop0, subtarget,
8760 VOIDmode, EXPAND_NORMAL);
8761 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8762 unsignedp);
8763 if (code == LSHIFT_EXPR)
8764 temp = REDUCE_BIT_FIELD (temp);
8765 return temp;
8766
8767 /* Could determine the answer when only additive constants differ. Also,
8768 the addition of one can be handled by changing the condition. */
8769 case LT_EXPR:
8770 case LE_EXPR:
8771 case GT_EXPR:
8772 case GE_EXPR:
8773 case EQ_EXPR:
8774 case NE_EXPR:
8775 case UNORDERED_EXPR:
8776 case ORDERED_EXPR:
8777 case UNLT_EXPR:
8778 case UNLE_EXPR:
8779 case UNGT_EXPR:
8780 case UNGE_EXPR:
8781 case UNEQ_EXPR:
8782 case LTGT_EXPR:
8783 temp = do_store_flag (ops,
8784 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8785 tmode != VOIDmode ? tmode : mode);
8786 if (temp)
8787 return temp;
8788
8789 /* Use a compare and a jump for BLKmode comparisons, or for function
8790 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8791
8792 if ((target == 0
8793 || modifier == EXPAND_STACK_PARM
8794 || ! safe_from_p (target, treeop0, 1)
8795 || ! safe_from_p (target, treeop1, 1)
8796 /* Make sure we don't have a hard reg (such as function's return
8797 value) live across basic blocks, if not optimizing. */
8798 || (!optimize && REG_P (target)
8799 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8800 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8801
8802 emit_move_insn (target, const0_rtx);
8803
8804 op1 = gen_label_rtx ();
8805 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8806
8807 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8808 emit_move_insn (target, constm1_rtx);
8809 else
8810 emit_move_insn (target, const1_rtx);
8811
8812 emit_label (op1);
8813 return target;
8814
8815 case COMPLEX_EXPR:
8816 /* Get the rtx code of the operands. */
8817 op0 = expand_normal (treeop0);
8818 op1 = expand_normal (treeop1);
8819
8820 if (!target)
8821 target = gen_reg_rtx (TYPE_MODE (type));
8822
8823 /* Move the real (op0) and imaginary (op1) parts to their location. */
8824 write_complex_part (target, op0, false);
8825 write_complex_part (target, op1, true);
8826
8827 return target;
8828
8829 case WIDEN_SUM_EXPR:
8830 {
8831 tree oprnd0 = treeop0;
8832 tree oprnd1 = treeop1;
8833
8834 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8835 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8836 target, unsignedp);
8837 return target;
8838 }
8839
8840 case REDUC_MAX_EXPR:
8841 case REDUC_MIN_EXPR:
8842 case REDUC_PLUS_EXPR:
8843 {
8844 op0 = expand_normal (treeop0);
8845 this_optab = optab_for_tree_code (code, type, optab_default);
8846 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8847 gcc_assert (temp);
8848 return temp;
8849 }
8850
8851 case VEC_LSHIFT_EXPR:
8852 case VEC_RSHIFT_EXPR:
8853 {
8854 target = expand_vec_shift_expr (ops, target);
8855 return target;
8856 }
8857
8858 case VEC_UNPACK_HI_EXPR:
8859 case VEC_UNPACK_LO_EXPR:
8860 {
8861 op0 = expand_normal (treeop0);
8862 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8863 target, unsignedp);
8864 gcc_assert (temp);
8865 return temp;
8866 }
8867
8868 case VEC_UNPACK_FLOAT_HI_EXPR:
8869 case VEC_UNPACK_FLOAT_LO_EXPR:
8870 {
8871 op0 = expand_normal (treeop0);
8872 /* The signedness is determined from input operand. */
8873 temp = expand_widen_pattern_expr
8874 (ops, op0, NULL_RTX, NULL_RTX,
8875 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8876
8877 gcc_assert (temp);
8878 return temp;
8879 }
8880
8881 case VEC_WIDEN_MULT_HI_EXPR:
8882 case VEC_WIDEN_MULT_LO_EXPR:
8883 case VEC_WIDEN_MULT_EVEN_EXPR:
8884 case VEC_WIDEN_MULT_ODD_EXPR:
8885 case VEC_WIDEN_LSHIFT_HI_EXPR:
8886 case VEC_WIDEN_LSHIFT_LO_EXPR:
8887 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8888 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8889 target, unsignedp);
8890 gcc_assert (target);
8891 return target;
8892
8893 case VEC_PACK_TRUNC_EXPR:
8894 case VEC_PACK_SAT_EXPR:
8895 case VEC_PACK_FIX_TRUNC_EXPR:
8896 mode = TYPE_MODE (TREE_TYPE (treeop0));
8897 goto binop;
8898
8899 case VEC_PERM_EXPR:
8900 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
8901 op2 = expand_normal (treeop2);
8902
8903 /* Careful here: if the target doesn't support integral vector modes,
8904 a constant selection vector could wind up smooshed into a normal
8905 integral constant. */
8906 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
8907 {
8908 tree sel_type = TREE_TYPE (treeop2);
8909 enum machine_mode vmode
8910 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
8911 TYPE_VECTOR_SUBPARTS (sel_type));
8912 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
8913 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
8914 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
8915 }
8916 else
8917 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
8918
8919 temp = expand_vec_perm (mode, op0, op1, op2, target);
8920 gcc_assert (temp);
8921 return temp;
8922
8923 case DOT_PROD_EXPR:
8924 {
8925 tree oprnd0 = treeop0;
8926 tree oprnd1 = treeop1;
8927 tree oprnd2 = treeop2;
8928 rtx op2;
8929
8930 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8931 op2 = expand_normal (oprnd2);
8932 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8933 target, unsignedp);
8934 return target;
8935 }
8936
8937 case REALIGN_LOAD_EXPR:
8938 {
8939 tree oprnd0 = treeop0;
8940 tree oprnd1 = treeop1;
8941 tree oprnd2 = treeop2;
8942 rtx op2;
8943
8944 this_optab = optab_for_tree_code (code, type, optab_default);
8945 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8946 op2 = expand_normal (oprnd2);
8947 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8948 target, unsignedp);
8949 gcc_assert (temp);
8950 return temp;
8951 }
8952
8953 case COND_EXPR:
8954 /* A COND_EXPR with its type being VOID_TYPE represents a
8955 conditional jump and is handled in
8956 expand_gimple_cond_expr. */
8957 gcc_assert (!VOID_TYPE_P (type));
8958
8959 /* Note that COND_EXPRs whose type is a structure or union
8960 are required to be constructed to contain assignments of
8961 a temporary variable, so that we can evaluate them here
8962 for side effect only. If type is void, we must do likewise. */
8963
8964 gcc_assert (!TREE_ADDRESSABLE (type)
8965 && !ignore
8966 && TREE_TYPE (treeop1) != void_type_node
8967 && TREE_TYPE (treeop2) != void_type_node);
8968
8969 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
8970 if (temp)
8971 return temp;
8972
8973 /* If we are not to produce a result, we have no target. Otherwise,
8974 if a target was specified use it; it will not be used as an
8975 intermediate target unless it is safe. If no target, use a
8976 temporary. */
8977
8978 if (modifier != EXPAND_STACK_PARM
8979 && original_target
8980 && safe_from_p (original_target, treeop0, 1)
8981 && GET_MODE (original_target) == mode
8982 && !MEM_P (original_target))
8983 temp = original_target;
8984 else
8985 temp = assign_temp (type, 0, 1);
8986
8987 do_pending_stack_adjust ();
8988 NO_DEFER_POP;
8989 op0 = gen_label_rtx ();
8990 op1 = gen_label_rtx ();
8991 jumpifnot (treeop0, op0, -1);
8992 store_expr (treeop1, temp,
8993 modifier == EXPAND_STACK_PARM,
8994 false);
8995
8996 emit_jump_insn (gen_jump (op1));
8997 emit_barrier ();
8998 emit_label (op0);
8999 store_expr (treeop2, temp,
9000 modifier == EXPAND_STACK_PARM,
9001 false);
9002
9003 emit_label (op1);
9004 OK_DEFER_POP;
9005 return temp;
9006
9007 case VEC_COND_EXPR:
9008 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9009 return target;
9010
9011 default:
9012 gcc_unreachable ();
9013 }
9014
9015 /* Here to do an ordinary binary operator. */
9016 binop:
9017 expand_operands (treeop0, treeop1,
9018 subtarget, &op0, &op1, EXPAND_NORMAL);
9019 binop2:
9020 this_optab = optab_for_tree_code (code, type, optab_default);
9021 binop3:
9022 if (modifier == EXPAND_STACK_PARM)
9023 target = 0;
9024 temp = expand_binop (mode, this_optab, op0, op1, target,
9025 unsignedp, OPTAB_LIB_WIDEN);
9026 gcc_assert (temp);
9027 /* Bitwise operations do not need bitfield reduction as we expect their
9028 operands being properly truncated. */
9029 if (code == BIT_XOR_EXPR
9030 || code == BIT_AND_EXPR
9031 || code == BIT_IOR_EXPR)
9032 return temp;
9033 return REDUCE_BIT_FIELD (temp);
9034 }
9035 #undef REDUCE_BIT_FIELD
9036
9037 rtx
9038 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
9039 enum expand_modifier modifier, rtx *alt_rtl)
9040 {
9041 rtx op0, op1, temp, decl_rtl;
9042 tree type;
9043 int unsignedp;
9044 enum machine_mode mode;
9045 enum tree_code code = TREE_CODE (exp);
9046 rtx subtarget, original_target;
9047 int ignore;
9048 tree context;
9049 bool reduce_bit_field;
9050 location_t loc = EXPR_LOCATION (exp);
9051 struct separate_ops ops;
9052 tree treeop0, treeop1, treeop2;
9053 tree ssa_name = NULL_TREE;
9054 gimple g;
9055
9056 type = TREE_TYPE (exp);
9057 mode = TYPE_MODE (type);
9058 unsignedp = TYPE_UNSIGNED (type);
9059
9060 treeop0 = treeop1 = treeop2 = NULL_TREE;
9061 if (!VL_EXP_CLASS_P (exp))
9062 switch (TREE_CODE_LENGTH (code))
9063 {
9064 default:
9065 case 3: treeop2 = TREE_OPERAND (exp, 2);
9066 case 2: treeop1 = TREE_OPERAND (exp, 1);
9067 case 1: treeop0 = TREE_OPERAND (exp, 0);
9068 case 0: break;
9069 }
9070 ops.code = code;
9071 ops.type = type;
9072 ops.op0 = treeop0;
9073 ops.op1 = treeop1;
9074 ops.op2 = treeop2;
9075 ops.location = loc;
9076
9077 ignore = (target == const0_rtx
9078 || ((CONVERT_EXPR_CODE_P (code)
9079 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9080 && TREE_CODE (type) == VOID_TYPE));
9081
9082 /* An operation in what may be a bit-field type needs the
9083 result to be reduced to the precision of the bit-field type,
9084 which is narrower than that of the type's mode. */
9085 reduce_bit_field = (!ignore
9086 && INTEGRAL_TYPE_P (type)
9087 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
9088
9089 /* If we are going to ignore this result, we need only do something
9090 if there is a side-effect somewhere in the expression. If there
9091 is, short-circuit the most common cases here. Note that we must
9092 not call expand_expr with anything but const0_rtx in case this
9093 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9094
9095 if (ignore)
9096 {
9097 if (! TREE_SIDE_EFFECTS (exp))
9098 return const0_rtx;
9099
9100 /* Ensure we reference a volatile object even if value is ignored, but
9101 don't do this if all we are doing is taking its address. */
9102 if (TREE_THIS_VOLATILE (exp)
9103 && TREE_CODE (exp) != FUNCTION_DECL
9104 && mode != VOIDmode && mode != BLKmode
9105 && modifier != EXPAND_CONST_ADDRESS)
9106 {
9107 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9108 if (MEM_P (temp))
9109 copy_to_reg (temp);
9110 return const0_rtx;
9111 }
9112
9113 if (TREE_CODE_CLASS (code) == tcc_unary
9114 || code == BIT_FIELD_REF
9115 || code == COMPONENT_REF
9116 || code == INDIRECT_REF)
9117 return expand_expr (treeop0, const0_rtx, VOIDmode,
9118 modifier);
9119
9120 else if (TREE_CODE_CLASS (code) == tcc_binary
9121 || TREE_CODE_CLASS (code) == tcc_comparison
9122 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9123 {
9124 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9125 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9126 return const0_rtx;
9127 }
9128
9129 target = 0;
9130 }
9131
9132 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9133 target = 0;
9134
9135 /* Use subtarget as the target for operand 0 of a binary operation. */
9136 subtarget = get_subtarget (target);
9137 original_target = target;
9138
9139 switch (code)
9140 {
9141 case LABEL_DECL:
9142 {
9143 tree function = decl_function_context (exp);
9144
9145 temp = label_rtx (exp);
9146 temp = gen_rtx_LABEL_REF (Pmode, temp);
9147
9148 if (function != current_function_decl
9149 && function != 0)
9150 LABEL_REF_NONLOCAL_P (temp) = 1;
9151
9152 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9153 return temp;
9154 }
9155
9156 case SSA_NAME:
9157 /* ??? ivopts calls expander, without any preparation from
9158 out-of-ssa. So fake instructions as if this was an access to the
9159 base variable. This unnecessarily allocates a pseudo, see how we can
9160 reuse it, if partition base vars have it set already. */
9161 if (!currently_expanding_to_rtl)
9162 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
9163 NULL);
9164
9165 g = get_gimple_for_ssa_name (exp);
9166 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9167 if (g == NULL
9168 && modifier == EXPAND_INITIALIZER
9169 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9170 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9171 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9172 g = SSA_NAME_DEF_STMT (exp);
9173 if (g)
9174 {
9175 rtx r = expand_expr_real (gimple_assign_rhs_to_tree (g), target,
9176 tmode, modifier, NULL);
9177 if (REG_P (r) && !REG_EXPR (r))
9178 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9179 return r;
9180 }
9181
9182 ssa_name = exp;
9183 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9184 exp = SSA_NAME_VAR (ssa_name);
9185 goto expand_decl_rtl;
9186
9187 case PARM_DECL:
9188 case VAR_DECL:
9189 /* If a static var's type was incomplete when the decl was written,
9190 but the type is complete now, lay out the decl now. */
9191 if (DECL_SIZE (exp) == 0
9192 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9193 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9194 layout_decl (exp, 0);
9195
9196 /* ... fall through ... */
9197
9198 case FUNCTION_DECL:
9199 case RESULT_DECL:
9200 decl_rtl = DECL_RTL (exp);
9201 expand_decl_rtl:
9202 gcc_assert (decl_rtl);
9203 decl_rtl = copy_rtx (decl_rtl);
9204 /* Record writes to register variables. */
9205 if (modifier == EXPAND_WRITE
9206 && REG_P (decl_rtl)
9207 && HARD_REGISTER_P (decl_rtl))
9208 add_to_hard_reg_set (&crtl->asm_clobbers,
9209 GET_MODE (decl_rtl), REGNO (decl_rtl));
9210
9211 /* Ensure variable marked as used even if it doesn't go through
9212 a parser. If it hasn't be used yet, write out an external
9213 definition. */
9214 TREE_USED (exp) = 1;
9215
9216 /* Show we haven't gotten RTL for this yet. */
9217 temp = 0;
9218
9219 /* Variables inherited from containing functions should have
9220 been lowered by this point. */
9221 context = decl_function_context (exp);
9222 gcc_assert (!context
9223 || context == current_function_decl
9224 || TREE_STATIC (exp)
9225 || DECL_EXTERNAL (exp)
9226 /* ??? C++ creates functions that are not TREE_STATIC. */
9227 || TREE_CODE (exp) == FUNCTION_DECL);
9228
9229 /* This is the case of an array whose size is to be determined
9230 from its initializer, while the initializer is still being parsed.
9231 ??? We aren't parsing while expanding anymore. */
9232
9233 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9234 temp = validize_mem (decl_rtl);
9235
9236 /* If DECL_RTL is memory, we are in the normal case and the
9237 address is not valid, get the address into a register. */
9238
9239 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9240 {
9241 if (alt_rtl)
9242 *alt_rtl = decl_rtl;
9243 decl_rtl = use_anchored_address (decl_rtl);
9244 if (modifier != EXPAND_CONST_ADDRESS
9245 && modifier != EXPAND_SUM
9246 && !memory_address_addr_space_p (DECL_MODE (exp),
9247 XEXP (decl_rtl, 0),
9248 MEM_ADDR_SPACE (decl_rtl)))
9249 temp = replace_equiv_address (decl_rtl,
9250 copy_rtx (XEXP (decl_rtl, 0)));
9251 }
9252
9253 /* If we got something, return it. But first, set the alignment
9254 if the address is a register. */
9255 if (temp != 0)
9256 {
9257 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9258 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9259
9260 return temp;
9261 }
9262
9263 /* If the mode of DECL_RTL does not match that of the decl,
9264 there are two cases: we are dealing with a BLKmode value
9265 that is returned in a register, or we are dealing with
9266 a promoted value. In the latter case, return a SUBREG
9267 of the wanted mode, but mark it so that we know that it
9268 was already extended. */
9269 if (REG_P (decl_rtl)
9270 && DECL_MODE (exp) != BLKmode
9271 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9272 {
9273 enum machine_mode pmode;
9274
9275 /* Get the signedness to be used for this variable. Ensure we get
9276 the same mode we got when the variable was declared. */
9277 if (code == SSA_NAME
9278 && (g = SSA_NAME_DEF_STMT (ssa_name))
9279 && gimple_code (g) == GIMPLE_CALL)
9280 {
9281 gcc_assert (!gimple_call_internal_p (g));
9282 pmode = promote_function_mode (type, mode, &unsignedp,
9283 gimple_call_fntype (g),
9284 2);
9285 }
9286 else
9287 pmode = promote_decl_mode (exp, &unsignedp);
9288 gcc_assert (GET_MODE (decl_rtl) == pmode);
9289
9290 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9291 SUBREG_PROMOTED_VAR_P (temp) = 1;
9292 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
9293 return temp;
9294 }
9295
9296 return decl_rtl;
9297
9298 case INTEGER_CST:
9299 temp = immed_double_const (TREE_INT_CST_LOW (exp),
9300 TREE_INT_CST_HIGH (exp), mode);
9301
9302 return temp;
9303
9304 case VECTOR_CST:
9305 {
9306 tree tmp = NULL_TREE;
9307 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9308 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9309 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9310 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9311 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9312 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9313 return const_vector_from_tree (exp);
9314 if (GET_MODE_CLASS (mode) == MODE_INT)
9315 {
9316 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9317 if (type_for_mode)
9318 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9319 }
9320 if (!tmp)
9321 {
9322 VEC(constructor_elt,gc) *v;
9323 unsigned i;
9324 v = VEC_alloc (constructor_elt, gc, VECTOR_CST_NELTS (exp));
9325 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
9326 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
9327 tmp = build_constructor (type, v);
9328 }
9329 return expand_expr (tmp, ignore ? const0_rtx : target,
9330 tmode, modifier);
9331 }
9332
9333 case CONST_DECL:
9334 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9335
9336 case REAL_CST:
9337 /* If optimized, generate immediate CONST_DOUBLE
9338 which will be turned into memory by reload if necessary.
9339
9340 We used to force a register so that loop.c could see it. But
9341 this does not allow gen_* patterns to perform optimizations with
9342 the constants. It also produces two insns in cases like "x = 1.0;".
9343 On most machines, floating-point constants are not permitted in
9344 many insns, so we'd end up copying it to a register in any case.
9345
9346 Now, we do the copying in expand_binop, if appropriate. */
9347 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9348 TYPE_MODE (TREE_TYPE (exp)));
9349
9350 case FIXED_CST:
9351 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9352 TYPE_MODE (TREE_TYPE (exp)));
9353
9354 case COMPLEX_CST:
9355 /* Handle evaluating a complex constant in a CONCAT target. */
9356 if (original_target && GET_CODE (original_target) == CONCAT)
9357 {
9358 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9359 rtx rtarg, itarg;
9360
9361 rtarg = XEXP (original_target, 0);
9362 itarg = XEXP (original_target, 1);
9363
9364 /* Move the real and imaginary parts separately. */
9365 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9366 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9367
9368 if (op0 != rtarg)
9369 emit_move_insn (rtarg, op0);
9370 if (op1 != itarg)
9371 emit_move_insn (itarg, op1);
9372
9373 return original_target;
9374 }
9375
9376 /* ... fall through ... */
9377
9378 case STRING_CST:
9379 temp = expand_expr_constant (exp, 1, modifier);
9380
9381 /* temp contains a constant address.
9382 On RISC machines where a constant address isn't valid,
9383 make some insns to get that address into a register. */
9384 if (modifier != EXPAND_CONST_ADDRESS
9385 && modifier != EXPAND_INITIALIZER
9386 && modifier != EXPAND_SUM
9387 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9388 MEM_ADDR_SPACE (temp)))
9389 return replace_equiv_address (temp,
9390 copy_rtx (XEXP (temp, 0)));
9391 return temp;
9392
9393 case SAVE_EXPR:
9394 {
9395 tree val = treeop0;
9396 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
9397
9398 if (!SAVE_EXPR_RESOLVED_P (exp))
9399 {
9400 /* We can indeed still hit this case, typically via builtin
9401 expanders calling save_expr immediately before expanding
9402 something. Assume this means that we only have to deal
9403 with non-BLKmode values. */
9404 gcc_assert (GET_MODE (ret) != BLKmode);
9405
9406 val = build_decl (EXPR_LOCATION (exp),
9407 VAR_DECL, NULL, TREE_TYPE (exp));
9408 DECL_ARTIFICIAL (val) = 1;
9409 DECL_IGNORED_P (val) = 1;
9410 treeop0 = val;
9411 TREE_OPERAND (exp, 0) = treeop0;
9412 SAVE_EXPR_RESOLVED_P (exp) = 1;
9413
9414 if (!CONSTANT_P (ret))
9415 ret = copy_to_reg (ret);
9416 SET_DECL_RTL (val, ret);
9417 }
9418
9419 return ret;
9420 }
9421
9422
9423 case CONSTRUCTOR:
9424 /* If we don't need the result, just ensure we evaluate any
9425 subexpressions. */
9426 if (ignore)
9427 {
9428 unsigned HOST_WIDE_INT idx;
9429 tree value;
9430
9431 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9432 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9433
9434 return const0_rtx;
9435 }
9436
9437 return expand_constructor (exp, target, modifier, false);
9438
9439 case TARGET_MEM_REF:
9440 {
9441 addr_space_t as
9442 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9443 struct mem_address addr;
9444 enum insn_code icode;
9445 unsigned int align;
9446
9447 get_address_description (exp, &addr);
9448 op0 = addr_for_mem_ref (&addr, as, true);
9449 op0 = memory_address_addr_space (mode, op0, as);
9450 temp = gen_rtx_MEM (mode, op0);
9451 set_mem_attributes (temp, exp, 0);
9452 set_mem_addr_space (temp, as);
9453 align = get_object_alignment (exp);
9454 if (modifier != EXPAND_WRITE
9455 && mode != BLKmode
9456 && align < GET_MODE_ALIGNMENT (mode)
9457 /* If the target does not have special handling for unaligned
9458 loads of mode then it can use regular moves for them. */
9459 && ((icode = optab_handler (movmisalign_optab, mode))
9460 != CODE_FOR_nothing))
9461 {
9462 struct expand_operand ops[2];
9463
9464 /* We've already validated the memory, and we're creating a
9465 new pseudo destination. The predicates really can't fail,
9466 nor can the generator. */
9467 create_output_operand (&ops[0], NULL_RTX, mode);
9468 create_fixed_operand (&ops[1], temp);
9469 expand_insn (icode, 2, ops);
9470 return ops[0].value;
9471 }
9472 return temp;
9473 }
9474
9475 case MEM_REF:
9476 {
9477 addr_space_t as
9478 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9479 enum machine_mode address_mode;
9480 tree base = TREE_OPERAND (exp, 0);
9481 gimple def_stmt;
9482 enum insn_code icode;
9483 unsigned align;
9484 /* Handle expansion of non-aliased memory with non-BLKmode. That
9485 might end up in a register. */
9486 if (mem_ref_refers_to_non_mem_p (exp))
9487 {
9488 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9489 tree bit_offset;
9490 tree bftype;
9491 base = TREE_OPERAND (base, 0);
9492 if (offset == 0
9493 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9494 && (GET_MODE_BITSIZE (DECL_MODE (base))
9495 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9496 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9497 TREE_TYPE (exp), base),
9498 target, tmode, modifier);
9499 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9500 bftype = TREE_TYPE (base);
9501 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9502 bftype = TREE_TYPE (exp);
9503 else
9504 {
9505 temp = assign_stack_temp (DECL_MODE (base),
9506 GET_MODE_SIZE (DECL_MODE (base)));
9507 store_expr (base, temp, 0, false);
9508 temp = adjust_address (temp, BLKmode, offset);
9509 set_mem_size (temp, int_size_in_bytes (TREE_TYPE (exp)));
9510 return temp;
9511 }
9512 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9513 base,
9514 TYPE_SIZE (TREE_TYPE (exp)),
9515 bit_offset),
9516 target, tmode, modifier);
9517 }
9518 address_mode = targetm.addr_space.address_mode (as);
9519 base = TREE_OPERAND (exp, 0);
9520 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9521 {
9522 tree mask = gimple_assign_rhs2 (def_stmt);
9523 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9524 gimple_assign_rhs1 (def_stmt), mask);
9525 TREE_OPERAND (exp, 0) = base;
9526 }
9527 align = get_object_alignment (exp);
9528 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9529 op0 = memory_address_addr_space (address_mode, op0, as);
9530 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9531 {
9532 rtx off
9533 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9534 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9535 }
9536 op0 = memory_address_addr_space (mode, op0, as);
9537 temp = gen_rtx_MEM (mode, op0);
9538 set_mem_attributes (temp, exp, 0);
9539 set_mem_addr_space (temp, as);
9540 if (TREE_THIS_VOLATILE (exp))
9541 MEM_VOLATILE_P (temp) = 1;
9542 if (modifier != EXPAND_WRITE
9543 && mode != BLKmode
9544 && align < GET_MODE_ALIGNMENT (mode))
9545 {
9546 if ((icode = optab_handler (movmisalign_optab, mode))
9547 != CODE_FOR_nothing)
9548 {
9549 struct expand_operand ops[2];
9550
9551 /* We've already validated the memory, and we're creating a
9552 new pseudo destination. The predicates really can't fail,
9553 nor can the generator. */
9554 create_output_operand (&ops[0], NULL_RTX, mode);
9555 create_fixed_operand (&ops[1], temp);
9556 expand_insn (icode, 2, ops);
9557 return ops[0].value;
9558 }
9559 else if (SLOW_UNALIGNED_ACCESS (mode, align))
9560 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
9561 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
9562 true, (modifier == EXPAND_STACK_PARM
9563 ? NULL_RTX : target),
9564 mode, mode);
9565 }
9566 return temp;
9567 }
9568
9569 case ARRAY_REF:
9570
9571 {
9572 tree array = treeop0;
9573 tree index = treeop1;
9574
9575 /* Fold an expression like: "foo"[2].
9576 This is not done in fold so it won't happen inside &.
9577 Don't fold if this is for wide characters since it's too
9578 difficult to do correctly and this is a very rare case. */
9579
9580 if (modifier != EXPAND_CONST_ADDRESS
9581 && modifier != EXPAND_INITIALIZER
9582 && modifier != EXPAND_MEMORY)
9583 {
9584 tree t = fold_read_from_constant_string (exp);
9585
9586 if (t)
9587 return expand_expr (t, target, tmode, modifier);
9588 }
9589
9590 /* If this is a constant index into a constant array,
9591 just get the value from the array. Handle both the cases when
9592 we have an explicit constructor and when our operand is a variable
9593 that was declared const. */
9594
9595 if (modifier != EXPAND_CONST_ADDRESS
9596 && modifier != EXPAND_INITIALIZER
9597 && modifier != EXPAND_MEMORY
9598 && TREE_CODE (array) == CONSTRUCTOR
9599 && ! TREE_SIDE_EFFECTS (array)
9600 && TREE_CODE (index) == INTEGER_CST)
9601 {
9602 unsigned HOST_WIDE_INT ix;
9603 tree field, value;
9604
9605 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9606 field, value)
9607 if (tree_int_cst_equal (field, index))
9608 {
9609 if (!TREE_SIDE_EFFECTS (value))
9610 return expand_expr (fold (value), target, tmode, modifier);
9611 break;
9612 }
9613 }
9614
9615 else if (optimize >= 1
9616 && modifier != EXPAND_CONST_ADDRESS
9617 && modifier != EXPAND_INITIALIZER
9618 && modifier != EXPAND_MEMORY
9619 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9620 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9621 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9622 && const_value_known_p (array))
9623 {
9624 if (TREE_CODE (index) == INTEGER_CST)
9625 {
9626 tree init = DECL_INITIAL (array);
9627
9628 if (TREE_CODE (init) == CONSTRUCTOR)
9629 {
9630 unsigned HOST_WIDE_INT ix;
9631 tree field, value;
9632
9633 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9634 field, value)
9635 if (tree_int_cst_equal (field, index))
9636 {
9637 if (TREE_SIDE_EFFECTS (value))
9638 break;
9639
9640 if (TREE_CODE (value) == CONSTRUCTOR)
9641 {
9642 /* If VALUE is a CONSTRUCTOR, this
9643 optimization is only useful if
9644 this doesn't store the CONSTRUCTOR
9645 into memory. If it does, it is more
9646 efficient to just load the data from
9647 the array directly. */
9648 rtx ret = expand_constructor (value, target,
9649 modifier, true);
9650 if (ret == NULL_RTX)
9651 break;
9652 }
9653
9654 return expand_expr (fold (value), target, tmode,
9655 modifier);
9656 }
9657 }
9658 else if(TREE_CODE (init) == STRING_CST)
9659 {
9660 tree index1 = index;
9661 tree low_bound = array_ref_low_bound (exp);
9662 index1 = fold_convert_loc (loc, sizetype,
9663 treeop1);
9664
9665 /* Optimize the special-case of a zero lower bound.
9666
9667 We convert the low_bound to sizetype to avoid some problems
9668 with constant folding. (E.g. suppose the lower bound is 1,
9669 and its mode is QI. Without the conversion,l (ARRAY
9670 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9671 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9672
9673 if (! integer_zerop (low_bound))
9674 index1 = size_diffop_loc (loc, index1,
9675 fold_convert_loc (loc, sizetype,
9676 low_bound));
9677
9678 if (0 > compare_tree_int (index1,
9679 TREE_STRING_LENGTH (init)))
9680 {
9681 tree type = TREE_TYPE (TREE_TYPE (init));
9682 enum machine_mode mode = TYPE_MODE (type);
9683
9684 if (GET_MODE_CLASS (mode) == MODE_INT
9685 && GET_MODE_SIZE (mode) == 1)
9686 return gen_int_mode (TREE_STRING_POINTER (init)
9687 [TREE_INT_CST_LOW (index1)],
9688 mode);
9689 }
9690 }
9691 }
9692 }
9693 }
9694 goto normal_inner_ref;
9695
9696 case COMPONENT_REF:
9697 /* If the operand is a CONSTRUCTOR, we can just extract the
9698 appropriate field if it is present. */
9699 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9700 {
9701 unsigned HOST_WIDE_INT idx;
9702 tree field, value;
9703
9704 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9705 idx, field, value)
9706 if (field == treeop1
9707 /* We can normally use the value of the field in the
9708 CONSTRUCTOR. However, if this is a bitfield in
9709 an integral mode that we can fit in a HOST_WIDE_INT,
9710 we must mask only the number of bits in the bitfield,
9711 since this is done implicitly by the constructor. If
9712 the bitfield does not meet either of those conditions,
9713 we can't do this optimization. */
9714 && (! DECL_BIT_FIELD (field)
9715 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9716 && (GET_MODE_PRECISION (DECL_MODE (field))
9717 <= HOST_BITS_PER_WIDE_INT))))
9718 {
9719 if (DECL_BIT_FIELD (field)
9720 && modifier == EXPAND_STACK_PARM)
9721 target = 0;
9722 op0 = expand_expr (value, target, tmode, modifier);
9723 if (DECL_BIT_FIELD (field))
9724 {
9725 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9726 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9727
9728 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9729 {
9730 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9731 op0 = expand_and (imode, op0, op1, target);
9732 }
9733 else
9734 {
9735 int count = GET_MODE_PRECISION (imode) - bitsize;
9736
9737 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9738 target, 0);
9739 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9740 target, 0);
9741 }
9742 }
9743
9744 return op0;
9745 }
9746 }
9747 goto normal_inner_ref;
9748
9749 case BIT_FIELD_REF:
9750 case ARRAY_RANGE_REF:
9751 normal_inner_ref:
9752 {
9753 enum machine_mode mode1, mode2;
9754 HOST_WIDE_INT bitsize, bitpos;
9755 tree offset;
9756 int volatilep = 0, must_force_mem;
9757 bool packedp = false;
9758 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9759 &mode1, &unsignedp, &volatilep, true);
9760 rtx orig_op0, memloc;
9761 bool mem_attrs_from_type = false;
9762
9763 /* If we got back the original object, something is wrong. Perhaps
9764 we are evaluating an expression too early. In any event, don't
9765 infinitely recurse. */
9766 gcc_assert (tem != exp);
9767
9768 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9769 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9770 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9771 packedp = true;
9772
9773 /* If TEM's type is a union of variable size, pass TARGET to the inner
9774 computation, since it will need a temporary and TARGET is known
9775 to have to do. This occurs in unchecked conversion in Ada. */
9776 orig_op0 = op0
9777 = expand_expr (tem,
9778 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9779 && COMPLETE_TYPE_P (TREE_TYPE (tem))
9780 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9781 != INTEGER_CST)
9782 && modifier != EXPAND_STACK_PARM
9783 ? target : NULL_RTX),
9784 VOIDmode,
9785 (modifier == EXPAND_INITIALIZER
9786 || modifier == EXPAND_CONST_ADDRESS
9787 || modifier == EXPAND_STACK_PARM)
9788 ? modifier : EXPAND_NORMAL);
9789
9790
9791 /* If the bitfield is volatile, we want to access it in the
9792 field's mode, not the computed mode.
9793 If a MEM has VOIDmode (external with incomplete type),
9794 use BLKmode for it instead. */
9795 if (MEM_P (op0))
9796 {
9797 if (volatilep && flag_strict_volatile_bitfields > 0)
9798 op0 = adjust_address (op0, mode1, 0);
9799 else if (GET_MODE (op0) == VOIDmode)
9800 op0 = adjust_address (op0, BLKmode, 0);
9801 }
9802
9803 mode2
9804 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9805
9806 /* If we have either an offset, a BLKmode result, or a reference
9807 outside the underlying object, we must force it to memory.
9808 Such a case can occur in Ada if we have unchecked conversion
9809 of an expression from a scalar type to an aggregate type or
9810 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9811 passed a partially uninitialized object or a view-conversion
9812 to a larger size. */
9813 must_force_mem = (offset
9814 || mode1 == BLKmode
9815 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9816
9817 /* Handle CONCAT first. */
9818 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9819 {
9820 if (bitpos == 0
9821 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9822 return op0;
9823 if (bitpos == 0
9824 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9825 && bitsize)
9826 {
9827 op0 = XEXP (op0, 0);
9828 mode2 = GET_MODE (op0);
9829 }
9830 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9831 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9832 && bitpos
9833 && bitsize)
9834 {
9835 op0 = XEXP (op0, 1);
9836 bitpos = 0;
9837 mode2 = GET_MODE (op0);
9838 }
9839 else
9840 /* Otherwise force into memory. */
9841 must_force_mem = 1;
9842 }
9843
9844 /* If this is a constant, put it in a register if it is a legitimate
9845 constant and we don't need a memory reference. */
9846 if (CONSTANT_P (op0)
9847 && mode2 != BLKmode
9848 && targetm.legitimate_constant_p (mode2, op0)
9849 && !must_force_mem)
9850 op0 = force_reg (mode2, op0);
9851
9852 /* Otherwise, if this is a constant, try to force it to the constant
9853 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9854 is a legitimate constant. */
9855 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9856 op0 = validize_mem (memloc);
9857
9858 /* Otherwise, if this is a constant or the object is not in memory
9859 and need be, put it there. */
9860 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9861 {
9862 tree nt = build_qualified_type (TREE_TYPE (tem),
9863 (TYPE_QUALS (TREE_TYPE (tem))
9864 | TYPE_QUAL_CONST));
9865 memloc = assign_temp (nt, 1, 1);
9866 emit_move_insn (memloc, op0);
9867 op0 = memloc;
9868 mem_attrs_from_type = true;
9869 }
9870
9871 if (offset)
9872 {
9873 enum machine_mode address_mode;
9874 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9875 EXPAND_SUM);
9876
9877 gcc_assert (MEM_P (op0));
9878
9879 address_mode = get_address_mode (op0);
9880 if (GET_MODE (offset_rtx) != address_mode)
9881 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9882
9883 if (GET_MODE (op0) == BLKmode
9884 /* A constant address in OP0 can have VOIDmode, we must
9885 not try to call force_reg in that case. */
9886 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9887 && bitsize != 0
9888 && (bitpos % bitsize) == 0
9889 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9890 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9891 {
9892 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9893 bitpos = 0;
9894 }
9895
9896 op0 = offset_address (op0, offset_rtx,
9897 highest_pow2_factor (offset));
9898 }
9899
9900 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9901 record its alignment as BIGGEST_ALIGNMENT. */
9902 if (MEM_P (op0) && bitpos == 0 && offset != 0
9903 && is_aligning_offset (offset, tem))
9904 set_mem_align (op0, BIGGEST_ALIGNMENT);
9905
9906 /* Don't forget about volatility even if this is a bitfield. */
9907 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9908 {
9909 if (op0 == orig_op0)
9910 op0 = copy_rtx (op0);
9911
9912 MEM_VOLATILE_P (op0) = 1;
9913 }
9914
9915 /* In cases where an aligned union has an unaligned object
9916 as a field, we might be extracting a BLKmode value from
9917 an integer-mode (e.g., SImode) object. Handle this case
9918 by doing the extract into an object as wide as the field
9919 (which we know to be the width of a basic mode), then
9920 storing into memory, and changing the mode to BLKmode. */
9921 if (mode1 == VOIDmode
9922 || REG_P (op0) || GET_CODE (op0) == SUBREG
9923 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9924 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9925 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9926 && modifier != EXPAND_CONST_ADDRESS
9927 && modifier != EXPAND_INITIALIZER)
9928 /* If the field is volatile, we always want an aligned
9929 access. Do this in following two situations:
9930 1. the access is not already naturally
9931 aligned, otherwise "normal" (non-bitfield) volatile fields
9932 become non-addressable.
9933 2. the bitsize is narrower than the access size. Need
9934 to extract bitfields from the access. */
9935 || (volatilep && flag_strict_volatile_bitfields > 0
9936 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0
9937 || (mode1 != BLKmode
9938 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)))
9939 /* If the field isn't aligned enough to fetch as a memref,
9940 fetch it as a bit field. */
9941 || (mode1 != BLKmode
9942 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9943 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9944 || (MEM_P (op0)
9945 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9946 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9947 && ((modifier == EXPAND_CONST_ADDRESS
9948 || modifier == EXPAND_INITIALIZER)
9949 ? STRICT_ALIGNMENT
9950 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9951 || (bitpos % BITS_PER_UNIT != 0)))
9952 /* If the type and the field are a constant size and the
9953 size of the type isn't the same size as the bitfield,
9954 we must use bitfield operations. */
9955 || (bitsize >= 0
9956 && TYPE_SIZE (TREE_TYPE (exp))
9957 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9958 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9959 bitsize)))
9960 {
9961 enum machine_mode ext_mode = mode;
9962
9963 if (ext_mode == BLKmode
9964 && ! (target != 0 && MEM_P (op0)
9965 && MEM_P (target)
9966 && bitpos % BITS_PER_UNIT == 0))
9967 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9968
9969 if (ext_mode == BLKmode)
9970 {
9971 if (target == 0)
9972 target = assign_temp (type, 1, 1);
9973
9974 if (bitsize == 0)
9975 return target;
9976
9977 /* In this case, BITPOS must start at a byte boundary and
9978 TARGET, if specified, must be a MEM. */
9979 gcc_assert (MEM_P (op0)
9980 && (!target || MEM_P (target))
9981 && !(bitpos % BITS_PER_UNIT));
9982
9983 emit_block_move (target,
9984 adjust_address (op0, VOIDmode,
9985 bitpos / BITS_PER_UNIT),
9986 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9987 / BITS_PER_UNIT),
9988 (modifier == EXPAND_STACK_PARM
9989 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9990
9991 return target;
9992 }
9993
9994 op0 = validize_mem (op0);
9995
9996 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9997 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9998
9999 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
10000 (modifier == EXPAND_STACK_PARM
10001 ? NULL_RTX : target),
10002 ext_mode, ext_mode);
10003
10004 /* If the result is a record type and BITSIZE is narrower than
10005 the mode of OP0, an integral mode, and this is a big endian
10006 machine, we must put the field into the high-order bits. */
10007 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
10008 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
10009 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
10010 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
10011 GET_MODE_BITSIZE (GET_MODE (op0))
10012 - bitsize, op0, 1);
10013
10014 /* If the result type is BLKmode, store the data into a temporary
10015 of the appropriate type, but with the mode corresponding to the
10016 mode for the data we have (op0's mode). It's tempting to make
10017 this a constant type, since we know it's only being stored once,
10018 but that can cause problems if we are taking the address of this
10019 COMPONENT_REF because the MEM of any reference via that address
10020 will have flags corresponding to the type, which will not
10021 necessarily be constant. */
10022 if (mode == BLKmode)
10023 {
10024 rtx new_rtx;
10025
10026 new_rtx = assign_stack_temp_for_type (ext_mode,
10027 GET_MODE_BITSIZE (ext_mode),
10028 type);
10029 emit_move_insn (new_rtx, op0);
10030 op0 = copy_rtx (new_rtx);
10031 PUT_MODE (op0, BLKmode);
10032 }
10033
10034 return op0;
10035 }
10036
10037 /* If the result is BLKmode, use that to access the object
10038 now as well. */
10039 if (mode == BLKmode)
10040 mode1 = BLKmode;
10041
10042 /* Get a reference to just this component. */
10043 if (modifier == EXPAND_CONST_ADDRESS
10044 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10045 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
10046 else
10047 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10048
10049 if (op0 == orig_op0)
10050 op0 = copy_rtx (op0);
10051
10052 /* If op0 is a temporary because of forcing to memory, pass only the
10053 type to set_mem_attributes so that the original expression is never
10054 marked as ADDRESSABLE through MEM_EXPR of the temporary. */
10055 if (mem_attrs_from_type)
10056 set_mem_attributes (op0, type, 0);
10057 else
10058 set_mem_attributes (op0, exp, 0);
10059
10060 if (REG_P (XEXP (op0, 0)))
10061 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10062
10063 MEM_VOLATILE_P (op0) |= volatilep;
10064 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
10065 || modifier == EXPAND_CONST_ADDRESS
10066 || modifier == EXPAND_INITIALIZER)
10067 return op0;
10068 else if (target == 0)
10069 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
10070
10071 convert_move (target, op0, unsignedp);
10072 return target;
10073 }
10074
10075 case OBJ_TYPE_REF:
10076 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
10077
10078 case CALL_EXPR:
10079 /* All valid uses of __builtin_va_arg_pack () are removed during
10080 inlining. */
10081 if (CALL_EXPR_VA_ARG_PACK (exp))
10082 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
10083 {
10084 tree fndecl = get_callee_fndecl (exp), attr;
10085
10086 if (fndecl
10087 && (attr = lookup_attribute ("error",
10088 DECL_ATTRIBUTES (fndecl))) != NULL)
10089 error ("%Kcall to %qs declared with attribute error: %s",
10090 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10091 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10092 if (fndecl
10093 && (attr = lookup_attribute ("warning",
10094 DECL_ATTRIBUTES (fndecl))) != NULL)
10095 warning_at (tree_nonartificial_location (exp),
10096 0, "%Kcall to %qs declared with attribute warning: %s",
10097 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10098 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10099
10100 /* Check for a built-in function. */
10101 if (fndecl && DECL_BUILT_IN (fndecl))
10102 {
10103 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
10104 return expand_builtin (exp, target, subtarget, tmode, ignore);
10105 }
10106 }
10107 return expand_call (exp, target, ignore);
10108
10109 case VIEW_CONVERT_EXPR:
10110 op0 = NULL_RTX;
10111
10112 /* If we are converting to BLKmode, try to avoid an intermediate
10113 temporary by fetching an inner memory reference. */
10114 if (mode == BLKmode
10115 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10116 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10117 && handled_component_p (treeop0))
10118 {
10119 enum machine_mode mode1;
10120 HOST_WIDE_INT bitsize, bitpos;
10121 tree offset;
10122 int unsignedp;
10123 int volatilep = 0;
10124 tree tem
10125 = get_inner_reference (treeop0, &bitsize, &bitpos,
10126 &offset, &mode1, &unsignedp, &volatilep,
10127 true);
10128 rtx orig_op0;
10129
10130 /* ??? We should work harder and deal with non-zero offsets. */
10131 if (!offset
10132 && (bitpos % BITS_PER_UNIT) == 0
10133 && bitsize >= 0
10134 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
10135 {
10136 /* See the normal_inner_ref case for the rationale. */
10137 orig_op0
10138 = expand_expr (tem,
10139 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10140 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10141 != INTEGER_CST)
10142 && modifier != EXPAND_STACK_PARM
10143 ? target : NULL_RTX),
10144 VOIDmode,
10145 (modifier == EXPAND_INITIALIZER
10146 || modifier == EXPAND_CONST_ADDRESS
10147 || modifier == EXPAND_STACK_PARM)
10148 ? modifier : EXPAND_NORMAL);
10149
10150 if (MEM_P (orig_op0))
10151 {
10152 op0 = orig_op0;
10153
10154 /* Get a reference to just this component. */
10155 if (modifier == EXPAND_CONST_ADDRESS
10156 || modifier == EXPAND_SUM
10157 || modifier == EXPAND_INITIALIZER)
10158 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
10159 else
10160 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10161
10162 if (op0 == orig_op0)
10163 op0 = copy_rtx (op0);
10164
10165 set_mem_attributes (op0, treeop0, 0);
10166 if (REG_P (XEXP (op0, 0)))
10167 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10168
10169 MEM_VOLATILE_P (op0) |= volatilep;
10170 }
10171 }
10172 }
10173
10174 if (!op0)
10175 op0 = expand_expr (treeop0,
10176 NULL_RTX, VOIDmode, modifier);
10177
10178 /* If the input and output modes are both the same, we are done. */
10179 if (mode == GET_MODE (op0))
10180 ;
10181 /* If neither mode is BLKmode, and both modes are the same size
10182 then we can use gen_lowpart. */
10183 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10184 && (GET_MODE_PRECISION (mode)
10185 == GET_MODE_PRECISION (GET_MODE (op0)))
10186 && !COMPLEX_MODE_P (GET_MODE (op0)))
10187 {
10188 if (GET_CODE (op0) == SUBREG)
10189 op0 = force_reg (GET_MODE (op0), op0);
10190 temp = gen_lowpart_common (mode, op0);
10191 if (temp)
10192 op0 = temp;
10193 else
10194 {
10195 if (!REG_P (op0) && !MEM_P (op0))
10196 op0 = force_reg (GET_MODE (op0), op0);
10197 op0 = gen_lowpart (mode, op0);
10198 }
10199 }
10200 /* If both types are integral, convert from one mode to the other. */
10201 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10202 op0 = convert_modes (mode, GET_MODE (op0), op0,
10203 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10204 /* As a last resort, spill op0 to memory, and reload it in a
10205 different mode. */
10206 else if (!MEM_P (op0))
10207 {
10208 /* If the operand is not a MEM, force it into memory. Since we
10209 are going to be changing the mode of the MEM, don't call
10210 force_const_mem for constants because we don't allow pool
10211 constants to change mode. */
10212 tree inner_type = TREE_TYPE (treeop0);
10213
10214 gcc_assert (!TREE_ADDRESSABLE (exp));
10215
10216 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10217 target
10218 = assign_stack_temp_for_type
10219 (TYPE_MODE (inner_type),
10220 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
10221
10222 emit_move_insn (target, op0);
10223 op0 = target;
10224 }
10225
10226 /* At this point, OP0 is in the correct mode. If the output type is
10227 such that the operand is known to be aligned, indicate that it is.
10228 Otherwise, we need only be concerned about alignment for non-BLKmode
10229 results. */
10230 if (MEM_P (op0))
10231 {
10232 enum insn_code icode;
10233
10234 op0 = copy_rtx (op0);
10235
10236 if (TYPE_ALIGN_OK (type))
10237 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10238 else if (mode != BLKmode
10239 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)
10240 /* If the target does have special handling for unaligned
10241 loads of mode then use them. */
10242 && ((icode = optab_handler (movmisalign_optab, mode))
10243 != CODE_FOR_nothing))
10244 {
10245 rtx reg, insn;
10246
10247 op0 = adjust_address (op0, mode, 0);
10248 /* We've already validated the memory, and we're creating a
10249 new pseudo destination. The predicates really can't
10250 fail. */
10251 reg = gen_reg_rtx (mode);
10252
10253 /* Nor can the insn generator. */
10254 insn = GEN_FCN (icode) (reg, op0);
10255 emit_insn (insn);
10256 return reg;
10257 }
10258 else if (STRICT_ALIGNMENT
10259 && mode != BLKmode
10260 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10261 {
10262 tree inner_type = TREE_TYPE (treeop0);
10263 HOST_WIDE_INT temp_size
10264 = MAX (int_size_in_bytes (inner_type),
10265 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10266 rtx new_rtx
10267 = assign_stack_temp_for_type (mode, temp_size, type);
10268 rtx new_with_op0_mode
10269 = adjust_address (new_rtx, GET_MODE (op0), 0);
10270
10271 gcc_assert (!TREE_ADDRESSABLE (exp));
10272
10273 if (GET_MODE (op0) == BLKmode)
10274 emit_block_move (new_with_op0_mode, op0,
10275 GEN_INT (GET_MODE_SIZE (mode)),
10276 (modifier == EXPAND_STACK_PARM
10277 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10278 else
10279 emit_move_insn (new_with_op0_mode, op0);
10280
10281 op0 = new_rtx;
10282 }
10283
10284 op0 = adjust_address (op0, mode, 0);
10285 }
10286
10287 return op0;
10288
10289 case MODIFY_EXPR:
10290 {
10291 tree lhs = treeop0;
10292 tree rhs = treeop1;
10293 gcc_assert (ignore);
10294
10295 /* Check for |= or &= of a bitfield of size one into another bitfield
10296 of size 1. In this case, (unless we need the result of the
10297 assignment) we can do this more efficiently with a
10298 test followed by an assignment, if necessary.
10299
10300 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10301 things change so we do, this code should be enhanced to
10302 support it. */
10303 if (TREE_CODE (lhs) == COMPONENT_REF
10304 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10305 || TREE_CODE (rhs) == BIT_AND_EXPR)
10306 && TREE_OPERAND (rhs, 0) == lhs
10307 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10308 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10309 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10310 {
10311 rtx label = gen_label_rtx ();
10312 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10313 do_jump (TREE_OPERAND (rhs, 1),
10314 value ? label : 0,
10315 value ? 0 : label, -1);
10316 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10317 MOVE_NONTEMPORAL (exp));
10318 do_pending_stack_adjust ();
10319 emit_label (label);
10320 return const0_rtx;
10321 }
10322
10323 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
10324 return const0_rtx;
10325 }
10326
10327 case ADDR_EXPR:
10328 return expand_expr_addr_expr (exp, target, tmode, modifier);
10329
10330 case REALPART_EXPR:
10331 op0 = expand_normal (treeop0);
10332 return read_complex_part (op0, false);
10333
10334 case IMAGPART_EXPR:
10335 op0 = expand_normal (treeop0);
10336 return read_complex_part (op0, true);
10337
10338 case RETURN_EXPR:
10339 case LABEL_EXPR:
10340 case GOTO_EXPR:
10341 case SWITCH_EXPR:
10342 case ASM_EXPR:
10343 /* Expanded in cfgexpand.c. */
10344 gcc_unreachable ();
10345
10346 case TRY_CATCH_EXPR:
10347 case CATCH_EXPR:
10348 case EH_FILTER_EXPR:
10349 case TRY_FINALLY_EXPR:
10350 /* Lowered by tree-eh.c. */
10351 gcc_unreachable ();
10352
10353 case WITH_CLEANUP_EXPR:
10354 case CLEANUP_POINT_EXPR:
10355 case TARGET_EXPR:
10356 case CASE_LABEL_EXPR:
10357 case VA_ARG_EXPR:
10358 case BIND_EXPR:
10359 case INIT_EXPR:
10360 case CONJ_EXPR:
10361 case COMPOUND_EXPR:
10362 case PREINCREMENT_EXPR:
10363 case PREDECREMENT_EXPR:
10364 case POSTINCREMENT_EXPR:
10365 case POSTDECREMENT_EXPR:
10366 case LOOP_EXPR:
10367 case EXIT_EXPR:
10368 case COMPOUND_LITERAL_EXPR:
10369 /* Lowered by gimplify.c. */
10370 gcc_unreachable ();
10371
10372 case FDESC_EXPR:
10373 /* Function descriptors are not valid except for as
10374 initialization constants, and should not be expanded. */
10375 gcc_unreachable ();
10376
10377 case WITH_SIZE_EXPR:
10378 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10379 have pulled out the size to use in whatever context it needed. */
10380 return expand_expr_real (treeop0, original_target, tmode,
10381 modifier, alt_rtl);
10382
10383 default:
10384 return expand_expr_real_2 (&ops, target, tmode, modifier);
10385 }
10386 }
10387 \f
10388 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10389 signedness of TYPE), possibly returning the result in TARGET. */
10390 static rtx
10391 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10392 {
10393 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10394 if (target && GET_MODE (target) != GET_MODE (exp))
10395 target = 0;
10396 /* For constant values, reduce using build_int_cst_type. */
10397 if (CONST_INT_P (exp))
10398 {
10399 HOST_WIDE_INT value = INTVAL (exp);
10400 tree t = build_int_cst_type (type, value);
10401 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10402 }
10403 else if (TYPE_UNSIGNED (type))
10404 {
10405 rtx mask = immed_double_int_const (double_int_mask (prec),
10406 GET_MODE (exp));
10407 return expand_and (GET_MODE (exp), exp, mask, target);
10408 }
10409 else
10410 {
10411 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10412 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10413 exp, count, target, 0);
10414 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10415 exp, count, target, 0);
10416 }
10417 }
10418 \f
10419 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10420 when applied to the address of EXP produces an address known to be
10421 aligned more than BIGGEST_ALIGNMENT. */
10422
10423 static int
10424 is_aligning_offset (const_tree offset, const_tree exp)
10425 {
10426 /* Strip off any conversions. */
10427 while (CONVERT_EXPR_P (offset))
10428 offset = TREE_OPERAND (offset, 0);
10429
10430 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10431 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10432 if (TREE_CODE (offset) != BIT_AND_EXPR
10433 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10434 || compare_tree_int (TREE_OPERAND (offset, 1),
10435 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10436 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10437 return 0;
10438
10439 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10440 It must be NEGATE_EXPR. Then strip any more conversions. */
10441 offset = TREE_OPERAND (offset, 0);
10442 while (CONVERT_EXPR_P (offset))
10443 offset = TREE_OPERAND (offset, 0);
10444
10445 if (TREE_CODE (offset) != NEGATE_EXPR)
10446 return 0;
10447
10448 offset = TREE_OPERAND (offset, 0);
10449 while (CONVERT_EXPR_P (offset))
10450 offset = TREE_OPERAND (offset, 0);
10451
10452 /* This must now be the address of EXP. */
10453 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10454 }
10455 \f
10456 /* Return the tree node if an ARG corresponds to a string constant or zero
10457 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10458 in bytes within the string that ARG is accessing. The type of the
10459 offset will be `sizetype'. */
10460
10461 tree
10462 string_constant (tree arg, tree *ptr_offset)
10463 {
10464 tree array, offset, lower_bound;
10465 STRIP_NOPS (arg);
10466
10467 if (TREE_CODE (arg) == ADDR_EXPR)
10468 {
10469 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10470 {
10471 *ptr_offset = size_zero_node;
10472 return TREE_OPERAND (arg, 0);
10473 }
10474 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10475 {
10476 array = TREE_OPERAND (arg, 0);
10477 offset = size_zero_node;
10478 }
10479 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10480 {
10481 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10482 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10483 if (TREE_CODE (array) != STRING_CST
10484 && TREE_CODE (array) != VAR_DECL)
10485 return 0;
10486
10487 /* Check if the array has a nonzero lower bound. */
10488 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10489 if (!integer_zerop (lower_bound))
10490 {
10491 /* If the offset and base aren't both constants, return 0. */
10492 if (TREE_CODE (lower_bound) != INTEGER_CST)
10493 return 0;
10494 if (TREE_CODE (offset) != INTEGER_CST)
10495 return 0;
10496 /* Adjust offset by the lower bound. */
10497 offset = size_diffop (fold_convert (sizetype, offset),
10498 fold_convert (sizetype, lower_bound));
10499 }
10500 }
10501 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10502 {
10503 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10504 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10505 if (TREE_CODE (array) != ADDR_EXPR)
10506 return 0;
10507 array = TREE_OPERAND (array, 0);
10508 if (TREE_CODE (array) != STRING_CST
10509 && TREE_CODE (array) != VAR_DECL)
10510 return 0;
10511 }
10512 else
10513 return 0;
10514 }
10515 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10516 {
10517 tree arg0 = TREE_OPERAND (arg, 0);
10518 tree arg1 = TREE_OPERAND (arg, 1);
10519
10520 STRIP_NOPS (arg0);
10521 STRIP_NOPS (arg1);
10522
10523 if (TREE_CODE (arg0) == ADDR_EXPR
10524 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10525 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10526 {
10527 array = TREE_OPERAND (arg0, 0);
10528 offset = arg1;
10529 }
10530 else if (TREE_CODE (arg1) == ADDR_EXPR
10531 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10532 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10533 {
10534 array = TREE_OPERAND (arg1, 0);
10535 offset = arg0;
10536 }
10537 else
10538 return 0;
10539 }
10540 else
10541 return 0;
10542
10543 if (TREE_CODE (array) == STRING_CST)
10544 {
10545 *ptr_offset = fold_convert (sizetype, offset);
10546 return array;
10547 }
10548 else if (TREE_CODE (array) == VAR_DECL
10549 || TREE_CODE (array) == CONST_DECL)
10550 {
10551 int length;
10552
10553 /* Variables initialized to string literals can be handled too. */
10554 if (!const_value_known_p (array)
10555 || !DECL_INITIAL (array)
10556 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10557 return 0;
10558
10559 /* Avoid const char foo[4] = "abcde"; */
10560 if (DECL_SIZE_UNIT (array) == NULL_TREE
10561 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10562 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10563 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10564 return 0;
10565
10566 /* If variable is bigger than the string literal, OFFSET must be constant
10567 and inside of the bounds of the string literal. */
10568 offset = fold_convert (sizetype, offset);
10569 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10570 && (! host_integerp (offset, 1)
10571 || compare_tree_int (offset, length) >= 0))
10572 return 0;
10573
10574 *ptr_offset = offset;
10575 return DECL_INITIAL (array);
10576 }
10577
10578 return 0;
10579 }
10580 \f
10581 /* Generate code to calculate OPS, and exploded expression
10582 using a store-flag instruction and return an rtx for the result.
10583 OPS reflects a comparison.
10584
10585 If TARGET is nonzero, store the result there if convenient.
10586
10587 Return zero if there is no suitable set-flag instruction
10588 available on this machine.
10589
10590 Once expand_expr has been called on the arguments of the comparison,
10591 we are committed to doing the store flag, since it is not safe to
10592 re-evaluate the expression. We emit the store-flag insn by calling
10593 emit_store_flag, but only expand the arguments if we have a reason
10594 to believe that emit_store_flag will be successful. If we think that
10595 it will, but it isn't, we have to simulate the store-flag with a
10596 set/jump/set sequence. */
10597
10598 static rtx
10599 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10600 {
10601 enum rtx_code code;
10602 tree arg0, arg1, type;
10603 tree tem;
10604 enum machine_mode operand_mode;
10605 int unsignedp;
10606 rtx op0, op1;
10607 rtx subtarget = target;
10608 location_t loc = ops->location;
10609
10610 arg0 = ops->op0;
10611 arg1 = ops->op1;
10612
10613 /* Don't crash if the comparison was erroneous. */
10614 if (arg0 == error_mark_node || arg1 == error_mark_node)
10615 return const0_rtx;
10616
10617 type = TREE_TYPE (arg0);
10618 operand_mode = TYPE_MODE (type);
10619 unsignedp = TYPE_UNSIGNED (type);
10620
10621 /* We won't bother with BLKmode store-flag operations because it would mean
10622 passing a lot of information to emit_store_flag. */
10623 if (operand_mode == BLKmode)
10624 return 0;
10625
10626 /* We won't bother with store-flag operations involving function pointers
10627 when function pointers must be canonicalized before comparisons. */
10628 #ifdef HAVE_canonicalize_funcptr_for_compare
10629 if (HAVE_canonicalize_funcptr_for_compare
10630 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10631 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10632 == FUNCTION_TYPE))
10633 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10634 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10635 == FUNCTION_TYPE))))
10636 return 0;
10637 #endif
10638
10639 STRIP_NOPS (arg0);
10640 STRIP_NOPS (arg1);
10641
10642 /* For vector typed comparisons emit code to generate the desired
10643 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10644 expander for this. */
10645 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10646 {
10647 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10648 tree if_true = constant_boolean_node (true, ops->type);
10649 tree if_false = constant_boolean_node (false, ops->type);
10650 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10651 }
10652
10653 /* For vector typed comparisons emit code to generate the desired
10654 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10655 expander for this. */
10656 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10657 {
10658 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10659 tree if_true = constant_boolean_node (true, ops->type);
10660 tree if_false = constant_boolean_node (false, ops->type);
10661 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10662 }
10663
10664 /* Get the rtx comparison code to use. We know that EXP is a comparison
10665 operation of some type. Some comparisons against 1 and -1 can be
10666 converted to comparisons with zero. Do so here so that the tests
10667 below will be aware that we have a comparison with zero. These
10668 tests will not catch constants in the first operand, but constants
10669 are rarely passed as the first operand. */
10670
10671 switch (ops->code)
10672 {
10673 case EQ_EXPR:
10674 code = EQ;
10675 break;
10676 case NE_EXPR:
10677 code = NE;
10678 break;
10679 case LT_EXPR:
10680 if (integer_onep (arg1))
10681 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10682 else
10683 code = unsignedp ? LTU : LT;
10684 break;
10685 case LE_EXPR:
10686 if (! unsignedp && integer_all_onesp (arg1))
10687 arg1 = integer_zero_node, code = LT;
10688 else
10689 code = unsignedp ? LEU : LE;
10690 break;
10691 case GT_EXPR:
10692 if (! unsignedp && integer_all_onesp (arg1))
10693 arg1 = integer_zero_node, code = GE;
10694 else
10695 code = unsignedp ? GTU : GT;
10696 break;
10697 case GE_EXPR:
10698 if (integer_onep (arg1))
10699 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10700 else
10701 code = unsignedp ? GEU : GE;
10702 break;
10703
10704 case UNORDERED_EXPR:
10705 code = UNORDERED;
10706 break;
10707 case ORDERED_EXPR:
10708 code = ORDERED;
10709 break;
10710 case UNLT_EXPR:
10711 code = UNLT;
10712 break;
10713 case UNLE_EXPR:
10714 code = UNLE;
10715 break;
10716 case UNGT_EXPR:
10717 code = UNGT;
10718 break;
10719 case UNGE_EXPR:
10720 code = UNGE;
10721 break;
10722 case UNEQ_EXPR:
10723 code = UNEQ;
10724 break;
10725 case LTGT_EXPR:
10726 code = LTGT;
10727 break;
10728
10729 default:
10730 gcc_unreachable ();
10731 }
10732
10733 /* Put a constant second. */
10734 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10735 || TREE_CODE (arg0) == FIXED_CST)
10736 {
10737 tem = arg0; arg0 = arg1; arg1 = tem;
10738 code = swap_condition (code);
10739 }
10740
10741 /* If this is an equality or inequality test of a single bit, we can
10742 do this by shifting the bit being tested to the low-order bit and
10743 masking the result with the constant 1. If the condition was EQ,
10744 we xor it with 1. This does not require an scc insn and is faster
10745 than an scc insn even if we have it.
10746
10747 The code to make this transformation was moved into fold_single_bit_test,
10748 so we just call into the folder and expand its result. */
10749
10750 if ((code == NE || code == EQ)
10751 && integer_zerop (arg1)
10752 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10753 {
10754 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
10755 if (srcstmt
10756 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
10757 {
10758 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
10759 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10760 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
10761 gimple_assign_rhs1 (srcstmt),
10762 gimple_assign_rhs2 (srcstmt));
10763 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
10764 if (temp)
10765 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
10766 }
10767 }
10768
10769 if (! get_subtarget (target)
10770 || GET_MODE (subtarget) != operand_mode)
10771 subtarget = 0;
10772
10773 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10774
10775 if (target == 0)
10776 target = gen_reg_rtx (mode);
10777
10778 /* Try a cstore if possible. */
10779 return emit_store_flag_force (target, code, op0, op1,
10780 operand_mode, unsignedp,
10781 (TYPE_PRECISION (ops->type) == 1
10782 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10783 }
10784 \f
10785
10786 /* Stubs in case we haven't got a casesi insn. */
10787 #ifndef HAVE_casesi
10788 # define HAVE_casesi 0
10789 # define gen_casesi(a, b, c, d, e) (0)
10790 # define CODE_FOR_casesi CODE_FOR_nothing
10791 #endif
10792
10793 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10794 0 otherwise (i.e. if there is no casesi instruction). */
10795 int
10796 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10797 rtx table_label, rtx default_label, rtx fallback_label)
10798 {
10799 struct expand_operand ops[5];
10800 enum machine_mode index_mode = SImode;
10801 rtx op1, op2, index;
10802
10803 if (! HAVE_casesi)
10804 return 0;
10805
10806 /* Convert the index to SImode. */
10807 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10808 {
10809 enum machine_mode omode = TYPE_MODE (index_type);
10810 rtx rangertx = expand_normal (range);
10811
10812 /* We must handle the endpoints in the original mode. */
10813 index_expr = build2 (MINUS_EXPR, index_type,
10814 index_expr, minval);
10815 minval = integer_zero_node;
10816 index = expand_normal (index_expr);
10817 if (default_label)
10818 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10819 omode, 1, default_label);
10820 /* Now we can safely truncate. */
10821 index = convert_to_mode (index_mode, index, 0);
10822 }
10823 else
10824 {
10825 if (TYPE_MODE (index_type) != index_mode)
10826 {
10827 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
10828 index_expr = fold_convert (index_type, index_expr);
10829 }
10830
10831 index = expand_normal (index_expr);
10832 }
10833
10834 do_pending_stack_adjust ();
10835
10836 op1 = expand_normal (minval);
10837 op2 = expand_normal (range);
10838
10839 create_input_operand (&ops[0], index, index_mode);
10840 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10841 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10842 create_fixed_operand (&ops[3], table_label);
10843 create_fixed_operand (&ops[4], (default_label
10844 ? default_label
10845 : fallback_label));
10846 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10847 return 1;
10848 }
10849
10850 /* Attempt to generate a tablejump instruction; same concept. */
10851 #ifndef HAVE_tablejump
10852 #define HAVE_tablejump 0
10853 #define gen_tablejump(x, y) (0)
10854 #endif
10855
10856 /* Subroutine of the next function.
10857
10858 INDEX is the value being switched on, with the lowest value
10859 in the table already subtracted.
10860 MODE is its expected mode (needed if INDEX is constant).
10861 RANGE is the length of the jump table.
10862 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10863
10864 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10865 index value is out of range. */
10866
10867 static void
10868 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10869 rtx default_label)
10870 {
10871 rtx temp, vector;
10872
10873 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10874 cfun->cfg->max_jumptable_ents = INTVAL (range);
10875
10876 /* Do an unsigned comparison (in the proper mode) between the index
10877 expression and the value which represents the length of the range.
10878 Since we just finished subtracting the lower bound of the range
10879 from the index expression, this comparison allows us to simultaneously
10880 check that the original index expression value is both greater than
10881 or equal to the minimum value of the range and less than or equal to
10882 the maximum value of the range. */
10883
10884 if (default_label)
10885 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10886 default_label);
10887
10888 /* If index is in range, it must fit in Pmode.
10889 Convert to Pmode so we can index with it. */
10890 if (mode != Pmode)
10891 index = convert_to_mode (Pmode, index, 1);
10892
10893 /* Don't let a MEM slip through, because then INDEX that comes
10894 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10895 and break_out_memory_refs will go to work on it and mess it up. */
10896 #ifdef PIC_CASE_VECTOR_ADDRESS
10897 if (flag_pic && !REG_P (index))
10898 index = copy_to_mode_reg (Pmode, index);
10899 #endif
10900
10901 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10902 GET_MODE_SIZE, because this indicates how large insns are. The other
10903 uses should all be Pmode, because they are addresses. This code
10904 could fail if addresses and insns are not the same size. */
10905 index = gen_rtx_PLUS (Pmode,
10906 gen_rtx_MULT (Pmode, index,
10907 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10908 gen_rtx_LABEL_REF (Pmode, table_label));
10909 #ifdef PIC_CASE_VECTOR_ADDRESS
10910 if (flag_pic)
10911 index = PIC_CASE_VECTOR_ADDRESS (index);
10912 else
10913 #endif
10914 index = memory_address (CASE_VECTOR_MODE, index);
10915 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10916 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10917 convert_move (temp, vector, 0);
10918
10919 emit_jump_insn (gen_tablejump (temp, table_label));
10920
10921 /* If we are generating PIC code or if the table is PC-relative, the
10922 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10923 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10924 emit_barrier ();
10925 }
10926
10927 int
10928 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10929 rtx table_label, rtx default_label)
10930 {
10931 rtx index;
10932
10933 if (! HAVE_tablejump)
10934 return 0;
10935
10936 index_expr = fold_build2 (MINUS_EXPR, index_type,
10937 fold_convert (index_type, index_expr),
10938 fold_convert (index_type, minval));
10939 index = expand_normal (index_expr);
10940 do_pending_stack_adjust ();
10941
10942 do_tablejump (index, TYPE_MODE (index_type),
10943 convert_modes (TYPE_MODE (index_type),
10944 TYPE_MODE (TREE_TYPE (range)),
10945 expand_normal (range),
10946 TYPE_UNSIGNED (TREE_TYPE (range))),
10947 table_label, default_label);
10948 return 1;
10949 }
10950
10951 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10952 static rtx
10953 const_vector_from_tree (tree exp)
10954 {
10955 rtvec v;
10956 unsigned i;
10957 int units;
10958 tree elt;
10959 enum machine_mode inner, mode;
10960
10961 mode = TYPE_MODE (TREE_TYPE (exp));
10962
10963 if (initializer_zerop (exp))
10964 return CONST0_RTX (mode);
10965
10966 units = GET_MODE_NUNITS (mode);
10967 inner = GET_MODE_INNER (mode);
10968
10969 v = rtvec_alloc (units);
10970
10971 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
10972 {
10973 elt = VECTOR_CST_ELT (exp, i);
10974
10975 if (TREE_CODE (elt) == REAL_CST)
10976 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10977 inner);
10978 else if (TREE_CODE (elt) == FIXED_CST)
10979 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10980 inner);
10981 else
10982 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10983 inner);
10984 }
10985
10986 return gen_rtx_CONST_VECTOR (mode, v);
10987 }
10988
10989 /* Build a decl for a personality function given a language prefix. */
10990
10991 tree
10992 build_personality_function (const char *lang)
10993 {
10994 const char *unwind_and_version;
10995 tree decl, type;
10996 char *name;
10997
10998 switch (targetm_common.except_unwind_info (&global_options))
10999 {
11000 case UI_NONE:
11001 return NULL;
11002 case UI_SJLJ:
11003 unwind_and_version = "_sj0";
11004 break;
11005 case UI_DWARF2:
11006 case UI_TARGET:
11007 unwind_and_version = "_v0";
11008 break;
11009 case UI_SEH:
11010 unwind_and_version = "_seh0";
11011 break;
11012 default:
11013 gcc_unreachable ();
11014 }
11015
11016 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
11017
11018 type = build_function_type_list (integer_type_node, integer_type_node,
11019 long_long_unsigned_type_node,
11020 ptr_type_node, ptr_type_node, NULL_TREE);
11021 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
11022 get_identifier (name), type);
11023 DECL_ARTIFICIAL (decl) = 1;
11024 DECL_EXTERNAL (decl) = 1;
11025 TREE_PUBLIC (decl) = 1;
11026
11027 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11028 are the flags assigned by targetm.encode_section_info. */
11029 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
11030
11031 return decl;
11032 }
11033
11034 /* Extracts the personality function of DECL and returns the corresponding
11035 libfunc. */
11036
11037 rtx
11038 get_personality_function (tree decl)
11039 {
11040 tree personality = DECL_FUNCTION_PERSONALITY (decl);
11041 enum eh_personality_kind pk;
11042
11043 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
11044 if (pk == eh_personality_none)
11045 return NULL;
11046
11047 if (!personality
11048 && pk == eh_personality_any)
11049 personality = lang_hooks.eh_personality ();
11050
11051 if (pk == eh_personality_lang)
11052 gcc_assert (personality != NULL_TREE);
11053
11054 return XEXP (DECL_RTL (personality), 0);
11055 }
11056
11057 #include "gt-expr.h"