re PR middle-end/50141 (ICE: tree check: expected var_decl, have parm_decl in get_bit...
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "common/common-target.h"
53 #include "timevar.h"
54 #include "df.h"
55 #include "diagnostic.h"
56 #include "ssaexpand.h"
57 #include "target-globals.h"
58 #include "params.h"
59
60 /* Decide whether a function's arguments should be processed
61 from first to last or from last to first.
62
63 They should if the stack and args grow in opposite directions, but
64 only if we have push insns. */
65
66 #ifdef PUSH_ROUNDING
67
68 #ifndef PUSH_ARGS_REVERSED
69 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
70 #define PUSH_ARGS_REVERSED /* If it's last to first. */
71 #endif
72 #endif
73
74 #endif
75
76 #ifndef STACK_PUSH_CODE
77 #ifdef STACK_GROWS_DOWNWARD
78 #define STACK_PUSH_CODE PRE_DEC
79 #else
80 #define STACK_PUSH_CODE PRE_INC
81 #endif
82 #endif
83
84
85 /* If this is nonzero, we do not bother generating VOLATILE
86 around volatile memory references, and we are willing to
87 output indirect addresses. If cse is to follow, we reject
88 indirect addresses so a useful potential cse is generated;
89 if it is used only once, instruction combination will produce
90 the same indirect address eventually. */
91 int cse_not_expected;
92
93 /* This structure is used by move_by_pieces to describe the move to
94 be performed. */
95 struct move_by_pieces_d
96 {
97 rtx to;
98 rtx to_addr;
99 int autinc_to;
100 int explicit_inc_to;
101 rtx from;
102 rtx from_addr;
103 int autinc_from;
104 int explicit_inc_from;
105 unsigned HOST_WIDE_INT len;
106 HOST_WIDE_INT offset;
107 int reverse;
108 };
109
110 /* This structure is used by store_by_pieces to describe the clear to
111 be performed. */
112
113 struct store_by_pieces_d
114 {
115 rtx to;
116 rtx to_addr;
117 int autinc_to;
118 int explicit_inc_to;
119 unsigned HOST_WIDE_INT len;
120 HOST_WIDE_INT offset;
121 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
122 void *constfundata;
123 int reverse;
124 };
125
126 static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT,
127 unsigned int,
128 unsigned int);
129 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
130 struct move_by_pieces_d *);
131 static bool block_move_libcall_safe_for_call_parm (void);
132 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
133 static tree emit_block_move_libcall_fn (int);
134 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
135 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
136 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
137 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
138 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
139 struct store_by_pieces_d *);
140 static tree clear_storage_libcall_fn (int);
141 static rtx compress_float_constant (rtx, rtx);
142 static rtx get_subtarget (rtx);
143 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
144 HOST_WIDE_INT, enum machine_mode,
145 tree, tree, int, alias_set_type);
146 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
147 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
148 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
149 enum machine_mode,
150 tree, tree, alias_set_type, bool);
151
152 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
153
154 static int is_aligning_offset (const_tree, const_tree);
155 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
156 enum expand_modifier);
157 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
158 static rtx do_store_flag (sepops, rtx, enum machine_mode);
159 #ifdef PUSH_ROUNDING
160 static void emit_single_push_insn (enum machine_mode, rtx, tree);
161 #endif
162 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
163 static rtx const_vector_from_tree (tree);
164 static void write_complex_part (rtx, rtx, bool);
165
166 /* This macro is used to determine whether move_by_pieces should be called
167 to perform a structure copy. */
168 #ifndef MOVE_BY_PIECES_P
169 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
170 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
171 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
172 #endif
173
174 /* This macro is used to determine whether clear_by_pieces should be
175 called to clear storage. */
176 #ifndef CLEAR_BY_PIECES_P
177 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
178 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
179 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
180 #endif
181
182 /* This macro is used to determine whether store_by_pieces should be
183 called to "memset" storage with byte values other than zero. */
184 #ifndef SET_BY_PIECES_P
185 #define SET_BY_PIECES_P(SIZE, ALIGN) \
186 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
187 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
188 #endif
189
190 /* This macro is used to determine whether store_by_pieces should be
191 called to "memcpy" storage when the source is a constant string. */
192 #ifndef STORE_BY_PIECES_P
193 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
194 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
195 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
196 #endif
197
198 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
199
200 #ifndef SLOW_UNALIGNED_ACCESS
201 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
202 #endif
203 \f
204 /* This is run to set up which modes can be used
205 directly in memory and to initialize the block move optab. It is run
206 at the beginning of compilation and when the target is reinitialized. */
207
208 void
209 init_expr_target (void)
210 {
211 rtx insn, pat;
212 enum machine_mode mode;
213 int num_clobbers;
214 rtx mem, mem1;
215 rtx reg;
216
217 /* Try indexing by frame ptr and try by stack ptr.
218 It is known that on the Convex the stack ptr isn't a valid index.
219 With luck, one or the other is valid on any machine. */
220 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
221 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
222
223 /* A scratch register we can modify in-place below to avoid
224 useless RTL allocations. */
225 reg = gen_rtx_REG (VOIDmode, -1);
226
227 insn = rtx_alloc (INSN);
228 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
229 PATTERN (insn) = pat;
230
231 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
232 mode = (enum machine_mode) ((int) mode + 1))
233 {
234 int regno;
235
236 direct_load[(int) mode] = direct_store[(int) mode] = 0;
237 PUT_MODE (mem, mode);
238 PUT_MODE (mem1, mode);
239 PUT_MODE (reg, mode);
240
241 /* See if there is some register that can be used in this mode and
242 directly loaded or stored from memory. */
243
244 if (mode != VOIDmode && mode != BLKmode)
245 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
246 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
247 regno++)
248 {
249 if (! HARD_REGNO_MODE_OK (regno, mode))
250 continue;
251
252 SET_REGNO (reg, regno);
253
254 SET_SRC (pat) = mem;
255 SET_DEST (pat) = reg;
256 if (recog (pat, insn, &num_clobbers) >= 0)
257 direct_load[(int) mode] = 1;
258
259 SET_SRC (pat) = mem1;
260 SET_DEST (pat) = reg;
261 if (recog (pat, insn, &num_clobbers) >= 0)
262 direct_load[(int) mode] = 1;
263
264 SET_SRC (pat) = reg;
265 SET_DEST (pat) = mem;
266 if (recog (pat, insn, &num_clobbers) >= 0)
267 direct_store[(int) mode] = 1;
268
269 SET_SRC (pat) = reg;
270 SET_DEST (pat) = mem1;
271 if (recog (pat, insn, &num_clobbers) >= 0)
272 direct_store[(int) mode] = 1;
273 }
274 }
275
276 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
277
278 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
279 mode = GET_MODE_WIDER_MODE (mode))
280 {
281 enum machine_mode srcmode;
282 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
283 srcmode = GET_MODE_WIDER_MODE (srcmode))
284 {
285 enum insn_code ic;
286
287 ic = can_extend_p (mode, srcmode, 0);
288 if (ic == CODE_FOR_nothing)
289 continue;
290
291 PUT_MODE (mem, srcmode);
292
293 if (insn_operand_matches (ic, 1, mem))
294 float_extend_from_mem[mode][srcmode] = true;
295 }
296 }
297 }
298
299 /* This is run at the start of compiling a function. */
300
301 void
302 init_expr (void)
303 {
304 memset (&crtl->expr, 0, sizeof (crtl->expr));
305 }
306 \f
307 /* Copy data from FROM to TO, where the machine modes are not the same.
308 Both modes may be integer, or both may be floating, or both may be
309 fixed-point.
310 UNSIGNEDP should be nonzero if FROM is an unsigned type.
311 This causes zero-extension instead of sign-extension. */
312
313 void
314 convert_move (rtx to, rtx from, int unsignedp)
315 {
316 enum machine_mode to_mode = GET_MODE (to);
317 enum machine_mode from_mode = GET_MODE (from);
318 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
319 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
320 enum insn_code code;
321 rtx libcall;
322
323 /* rtx code for making an equivalent value. */
324 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
325 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
326
327
328 gcc_assert (to_real == from_real);
329 gcc_assert (to_mode != BLKmode);
330 gcc_assert (from_mode != BLKmode);
331
332 /* If the source and destination are already the same, then there's
333 nothing to do. */
334 if (to == from)
335 return;
336
337 /* If FROM is a SUBREG that indicates that we have already done at least
338 the required extension, strip it. We don't handle such SUBREGs as
339 TO here. */
340
341 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
342 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
343 >= GET_MODE_PRECISION (to_mode))
344 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
345 from = gen_lowpart (to_mode, from), from_mode = to_mode;
346
347 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
348
349 if (to_mode == from_mode
350 || (from_mode == VOIDmode && CONSTANT_P (from)))
351 {
352 emit_move_insn (to, from);
353 return;
354 }
355
356 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
357 {
358 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
359
360 if (VECTOR_MODE_P (to_mode))
361 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
362 else
363 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
364
365 emit_move_insn (to, from);
366 return;
367 }
368
369 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
370 {
371 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
372 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
373 return;
374 }
375
376 if (to_real)
377 {
378 rtx value, insns;
379 convert_optab tab;
380
381 gcc_assert ((GET_MODE_PRECISION (from_mode)
382 != GET_MODE_PRECISION (to_mode))
383 || (DECIMAL_FLOAT_MODE_P (from_mode)
384 != DECIMAL_FLOAT_MODE_P (to_mode)));
385
386 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
387 /* Conversion between decimal float and binary float, same size. */
388 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
389 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
390 tab = sext_optab;
391 else
392 tab = trunc_optab;
393
394 /* Try converting directly if the insn is supported. */
395
396 code = convert_optab_handler (tab, to_mode, from_mode);
397 if (code != CODE_FOR_nothing)
398 {
399 emit_unop_insn (code, to, from,
400 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
401 return;
402 }
403
404 /* Otherwise use a libcall. */
405 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
406
407 /* Is this conversion implemented yet? */
408 gcc_assert (libcall);
409
410 start_sequence ();
411 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
412 1, from, from_mode);
413 insns = get_insns ();
414 end_sequence ();
415 emit_libcall_block (insns, to, value,
416 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
417 from)
418 : gen_rtx_FLOAT_EXTEND (to_mode, from));
419 return;
420 }
421
422 /* Handle pointer conversion. */ /* SPEE 900220. */
423 /* Targets are expected to provide conversion insns between PxImode and
424 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
425 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
426 {
427 enum machine_mode full_mode
428 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
429
430 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
431 != CODE_FOR_nothing);
432
433 if (full_mode != from_mode)
434 from = convert_to_mode (full_mode, from, unsignedp);
435 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
436 to, from, UNKNOWN);
437 return;
438 }
439 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
440 {
441 rtx new_from;
442 enum machine_mode full_mode
443 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
444
445 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)
446 != CODE_FOR_nothing);
447
448 if (to_mode == full_mode)
449 {
450 emit_unop_insn (convert_optab_handler (sext_optab, full_mode,
451 from_mode),
452 to, from, UNKNOWN);
453 return;
454 }
455
456 new_from = gen_reg_rtx (full_mode);
457 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode),
458 new_from, from, UNKNOWN);
459
460 /* else proceed to integer conversions below. */
461 from_mode = full_mode;
462 from = new_from;
463 }
464
465 /* Make sure both are fixed-point modes or both are not. */
466 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
467 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
468 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
469 {
470 /* If we widen from_mode to to_mode and they are in the same class,
471 we won't saturate the result.
472 Otherwise, always saturate the result to play safe. */
473 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
474 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
475 expand_fixed_convert (to, from, 0, 0);
476 else
477 expand_fixed_convert (to, from, 0, 1);
478 return;
479 }
480
481 /* Now both modes are integers. */
482
483 /* Handle expanding beyond a word. */
484 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
485 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
486 {
487 rtx insns;
488 rtx lowpart;
489 rtx fill_value;
490 rtx lowfrom;
491 int i;
492 enum machine_mode lowpart_mode;
493 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
494
495 /* Try converting directly if the insn is supported. */
496 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
497 != CODE_FOR_nothing)
498 {
499 /* If FROM is a SUBREG, put it into a register. Do this
500 so that we always generate the same set of insns for
501 better cse'ing; if an intermediate assignment occurred,
502 we won't be doing the operation directly on the SUBREG. */
503 if (optimize > 0 && GET_CODE (from) == SUBREG)
504 from = force_reg (from_mode, from);
505 emit_unop_insn (code, to, from, equiv_code);
506 return;
507 }
508 /* Next, try converting via full word. */
509 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
510 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
511 != CODE_FOR_nothing))
512 {
513 rtx word_to = gen_reg_rtx (word_mode);
514 if (REG_P (to))
515 {
516 if (reg_overlap_mentioned_p (to, from))
517 from = force_reg (from_mode, from);
518 emit_clobber (to);
519 }
520 convert_move (word_to, from, unsignedp);
521 emit_unop_insn (code, to, word_to, equiv_code);
522 return;
523 }
524
525 /* No special multiword conversion insn; do it by hand. */
526 start_sequence ();
527
528 /* Since we will turn this into a no conflict block, we must ensure
529 that the source does not overlap the target. */
530
531 if (reg_overlap_mentioned_p (to, from))
532 from = force_reg (from_mode, from);
533
534 /* Get a copy of FROM widened to a word, if necessary. */
535 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
536 lowpart_mode = word_mode;
537 else
538 lowpart_mode = from_mode;
539
540 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
541
542 lowpart = gen_lowpart (lowpart_mode, to);
543 emit_move_insn (lowpart, lowfrom);
544
545 /* Compute the value to put in each remaining word. */
546 if (unsignedp)
547 fill_value = const0_rtx;
548 else
549 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
550 LT, lowfrom, const0_rtx,
551 VOIDmode, 0, -1);
552
553 /* Fill the remaining words. */
554 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
555 {
556 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
557 rtx subword = operand_subword (to, index, 1, to_mode);
558
559 gcc_assert (subword);
560
561 if (fill_value != subword)
562 emit_move_insn (subword, fill_value);
563 }
564
565 insns = get_insns ();
566 end_sequence ();
567
568 emit_insn (insns);
569 return;
570 }
571
572 /* Truncating multi-word to a word or less. */
573 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
574 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
575 {
576 if (!((MEM_P (from)
577 && ! MEM_VOLATILE_P (from)
578 && direct_load[(int) to_mode]
579 && ! mode_dependent_address_p (XEXP (from, 0)))
580 || REG_P (from)
581 || GET_CODE (from) == SUBREG))
582 from = force_reg (from_mode, from);
583 convert_move (to, gen_lowpart (word_mode, from), 0);
584 return;
585 }
586
587 /* Now follow all the conversions between integers
588 no more than a word long. */
589
590 /* For truncation, usually we can just refer to FROM in a narrower mode. */
591 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
592 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
593 {
594 if (!((MEM_P (from)
595 && ! MEM_VOLATILE_P (from)
596 && direct_load[(int) to_mode]
597 && ! mode_dependent_address_p (XEXP (from, 0)))
598 || REG_P (from)
599 || GET_CODE (from) == SUBREG))
600 from = force_reg (from_mode, from);
601 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
602 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
603 from = copy_to_reg (from);
604 emit_move_insn (to, gen_lowpart (to_mode, from));
605 return;
606 }
607
608 /* Handle extension. */
609 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
610 {
611 /* Convert directly if that works. */
612 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
613 != CODE_FOR_nothing)
614 {
615 emit_unop_insn (code, to, from, equiv_code);
616 return;
617 }
618 else
619 {
620 enum machine_mode intermediate;
621 rtx tmp;
622 int shift_amount;
623
624 /* Search for a mode to convert via. */
625 for (intermediate = from_mode; intermediate != VOIDmode;
626 intermediate = GET_MODE_WIDER_MODE (intermediate))
627 if (((can_extend_p (to_mode, intermediate, unsignedp)
628 != CODE_FOR_nothing)
629 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
630 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
631 && (can_extend_p (intermediate, from_mode, unsignedp)
632 != CODE_FOR_nothing))
633 {
634 convert_move (to, convert_to_mode (intermediate, from,
635 unsignedp), unsignedp);
636 return;
637 }
638
639 /* No suitable intermediate mode.
640 Generate what we need with shifts. */
641 shift_amount = (GET_MODE_PRECISION (to_mode)
642 - GET_MODE_PRECISION (from_mode));
643 from = gen_lowpart (to_mode, force_reg (from_mode, from));
644 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
645 to, unsignedp);
646 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
647 to, unsignedp);
648 if (tmp != to)
649 emit_move_insn (to, tmp);
650 return;
651 }
652 }
653
654 /* Support special truncate insns for certain modes. */
655 if (convert_optab_handler (trunc_optab, to_mode,
656 from_mode) != CODE_FOR_nothing)
657 {
658 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
659 to, from, UNKNOWN);
660 return;
661 }
662
663 /* Handle truncation of volatile memrefs, and so on;
664 the things that couldn't be truncated directly,
665 and for which there was no special instruction.
666
667 ??? Code above formerly short-circuited this, for most integer
668 mode pairs, with a force_reg in from_mode followed by a recursive
669 call to this routine. Appears always to have been wrong. */
670 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
671 {
672 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
673 emit_move_insn (to, temp);
674 return;
675 }
676
677 /* Mode combination is not recognized. */
678 gcc_unreachable ();
679 }
680
681 /* Return an rtx for a value that would result
682 from converting X to mode MODE.
683 Both X and MODE may be floating, or both integer.
684 UNSIGNEDP is nonzero if X is an unsigned value.
685 This can be done by referring to a part of X in place
686 or by copying to a new temporary with conversion. */
687
688 rtx
689 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
690 {
691 return convert_modes (mode, VOIDmode, x, unsignedp);
692 }
693
694 /* Return an rtx for a value that would result
695 from converting X from mode OLDMODE to mode MODE.
696 Both modes may be floating, or both integer.
697 UNSIGNEDP is nonzero if X is an unsigned value.
698
699 This can be done by referring to a part of X in place
700 or by copying to a new temporary with conversion.
701
702 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
703
704 rtx
705 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
706 {
707 rtx temp;
708
709 /* If FROM is a SUBREG that indicates that we have already done at least
710 the required extension, strip it. */
711
712 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
713 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
714 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
715 x = gen_lowpart (mode, x);
716
717 if (GET_MODE (x) != VOIDmode)
718 oldmode = GET_MODE (x);
719
720 if (mode == oldmode)
721 return x;
722
723 /* There is one case that we must handle specially: If we are converting
724 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
725 we are to interpret the constant as unsigned, gen_lowpart will do
726 the wrong if the constant appears negative. What we want to do is
727 make the high-order word of the constant zero, not all ones. */
728
729 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
730 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
731 && CONST_INT_P (x) && INTVAL (x) < 0)
732 {
733 double_int val = uhwi_to_double_int (INTVAL (x));
734
735 /* We need to zero extend VAL. */
736 if (oldmode != VOIDmode)
737 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
738
739 return immed_double_int_const (val, mode);
740 }
741
742 /* We can do this with a gen_lowpart if both desired and current modes
743 are integer, and this is either a constant integer, a register, or a
744 non-volatile MEM. Except for the constant case where MODE is no
745 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
746
747 if ((CONST_INT_P (x)
748 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
749 || (GET_MODE_CLASS (mode) == MODE_INT
750 && GET_MODE_CLASS (oldmode) == MODE_INT
751 && (GET_CODE (x) == CONST_DOUBLE
752 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
753 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
754 && direct_load[(int) mode])
755 || (REG_P (x)
756 && (! HARD_REGISTER_P (x)
757 || HARD_REGNO_MODE_OK (REGNO (x), mode))
758 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
759 GET_MODE (x))))))))
760 {
761 /* ?? If we don't know OLDMODE, we have to assume here that
762 X does not need sign- or zero-extension. This may not be
763 the case, but it's the best we can do. */
764 if (CONST_INT_P (x) && oldmode != VOIDmode
765 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
766 {
767 HOST_WIDE_INT val = INTVAL (x);
768
769 /* We must sign or zero-extend in this case. Start by
770 zero-extending, then sign extend if we need to. */
771 val &= GET_MODE_MASK (oldmode);
772 if (! unsignedp
773 && val_signbit_known_set_p (oldmode, val))
774 val |= ~GET_MODE_MASK (oldmode);
775
776 return gen_int_mode (val, mode);
777 }
778
779 return gen_lowpart (mode, x);
780 }
781
782 /* Converting from integer constant into mode is always equivalent to an
783 subreg operation. */
784 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
785 {
786 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
787 return simplify_gen_subreg (mode, x, oldmode, 0);
788 }
789
790 temp = gen_reg_rtx (mode);
791 convert_move (temp, x, unsignedp);
792 return temp;
793 }
794 \f
795 /* Return the largest alignment we can use for doing a move (or store)
796 of MAX_PIECES. ALIGN is the largest alignment we could use. */
797
798 static unsigned int
799 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
800 {
801 enum machine_mode tmode;
802
803 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
804 if (align >= GET_MODE_ALIGNMENT (tmode))
805 align = GET_MODE_ALIGNMENT (tmode);
806 else
807 {
808 enum machine_mode tmode, xmode;
809
810 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
811 tmode != VOIDmode;
812 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
813 if (GET_MODE_SIZE (tmode) > max_pieces
814 || SLOW_UNALIGNED_ACCESS (tmode, align))
815 break;
816
817 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
818 }
819
820 return align;
821 }
822
823 /* Return the widest integer mode no wider than SIZE. If no such mode
824 can be found, return VOIDmode. */
825
826 static enum machine_mode
827 widest_int_mode_for_size (unsigned int size)
828 {
829 enum machine_mode tmode, mode = VOIDmode;
830
831 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
832 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
833 if (GET_MODE_SIZE (tmode) < size)
834 mode = tmode;
835
836 return mode;
837 }
838
839 /* STORE_MAX_PIECES is the number of bytes at a time that we can
840 store efficiently. Due to internal GCC limitations, this is
841 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
842 for an immediate constant. */
843
844 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
845
846 /* Determine whether the LEN bytes can be moved by using several move
847 instructions. Return nonzero if a call to move_by_pieces should
848 succeed. */
849
850 int
851 can_move_by_pieces (unsigned HOST_WIDE_INT len,
852 unsigned int align ATTRIBUTE_UNUSED)
853 {
854 return MOVE_BY_PIECES_P (len, align);
855 }
856
857 /* Generate several move instructions to copy LEN bytes from block FROM to
858 block TO. (These are MEM rtx's with BLKmode).
859
860 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
861 used to push FROM to the stack.
862
863 ALIGN is maximum stack alignment we can assume.
864
865 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
866 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
867 stpcpy. */
868
869 rtx
870 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
871 unsigned int align, int endp)
872 {
873 struct move_by_pieces_d data;
874 enum machine_mode to_addr_mode, from_addr_mode
875 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
876 rtx to_addr, from_addr = XEXP (from, 0);
877 unsigned int max_size = MOVE_MAX_PIECES + 1;
878 enum insn_code icode;
879
880 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
881
882 data.offset = 0;
883 data.from_addr = from_addr;
884 if (to)
885 {
886 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
887 to_addr = XEXP (to, 0);
888 data.to = to;
889 data.autinc_to
890 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
891 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
892 data.reverse
893 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
894 }
895 else
896 {
897 to_addr_mode = VOIDmode;
898 to_addr = NULL_RTX;
899 data.to = NULL_RTX;
900 data.autinc_to = 1;
901 #ifdef STACK_GROWS_DOWNWARD
902 data.reverse = 1;
903 #else
904 data.reverse = 0;
905 #endif
906 }
907 data.to_addr = to_addr;
908 data.from = from;
909 data.autinc_from
910 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
911 || GET_CODE (from_addr) == POST_INC
912 || GET_CODE (from_addr) == POST_DEC);
913
914 data.explicit_inc_from = 0;
915 data.explicit_inc_to = 0;
916 if (data.reverse) data.offset = len;
917 data.len = len;
918
919 /* If copying requires more than two move insns,
920 copy addresses to registers (to make displacements shorter)
921 and use post-increment if available. */
922 if (!(data.autinc_from && data.autinc_to)
923 && move_by_pieces_ninsns (len, align, max_size) > 2)
924 {
925 /* Find the mode of the largest move...
926 MODE might not be used depending on the definitions of the
927 USE_* macros below. */
928 enum machine_mode mode ATTRIBUTE_UNUSED
929 = widest_int_mode_for_size (max_size);
930
931 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
932 {
933 data.from_addr = copy_to_mode_reg (from_addr_mode,
934 plus_constant (from_addr, len));
935 data.autinc_from = 1;
936 data.explicit_inc_from = -1;
937 }
938 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
939 {
940 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
941 data.autinc_from = 1;
942 data.explicit_inc_from = 1;
943 }
944 if (!data.autinc_from && CONSTANT_P (from_addr))
945 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
946 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
947 {
948 data.to_addr = copy_to_mode_reg (to_addr_mode,
949 plus_constant (to_addr, len));
950 data.autinc_to = 1;
951 data.explicit_inc_to = -1;
952 }
953 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
954 {
955 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
956 data.autinc_to = 1;
957 data.explicit_inc_to = 1;
958 }
959 if (!data.autinc_to && CONSTANT_P (to_addr))
960 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
961 }
962
963 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
964
965 /* First move what we can in the largest integer mode, then go to
966 successively smaller modes. */
967
968 while (max_size > 1)
969 {
970 enum machine_mode mode = widest_int_mode_for_size (max_size);
971
972 if (mode == VOIDmode)
973 break;
974
975 icode = optab_handler (mov_optab, mode);
976 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
977 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
978
979 max_size = GET_MODE_SIZE (mode);
980 }
981
982 /* The code above should have handled everything. */
983 gcc_assert (!data.len);
984
985 if (endp)
986 {
987 rtx to1;
988
989 gcc_assert (!data.reverse);
990 if (data.autinc_to)
991 {
992 if (endp == 2)
993 {
994 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
995 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
996 else
997 data.to_addr = copy_to_mode_reg (to_addr_mode,
998 plus_constant (data.to_addr,
999 -1));
1000 }
1001 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
1002 data.offset);
1003 }
1004 else
1005 {
1006 if (endp == 2)
1007 --data.offset;
1008 to1 = adjust_address (data.to, QImode, data.offset);
1009 }
1010 return to1;
1011 }
1012 else
1013 return data.to;
1014 }
1015
1016 /* Return number of insns required to move L bytes by pieces.
1017 ALIGN (in bits) is maximum alignment we can assume. */
1018
1019 static unsigned HOST_WIDE_INT
1020 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1021 unsigned int max_size)
1022 {
1023 unsigned HOST_WIDE_INT n_insns = 0;
1024
1025 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1026
1027 while (max_size > 1)
1028 {
1029 enum machine_mode mode;
1030 enum insn_code icode;
1031
1032 mode = widest_int_mode_for_size (max_size);
1033
1034 if (mode == VOIDmode)
1035 break;
1036
1037 icode = optab_handler (mov_optab, mode);
1038 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1039 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1040
1041 max_size = GET_MODE_SIZE (mode);
1042 }
1043
1044 gcc_assert (!l);
1045 return n_insns;
1046 }
1047
1048 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1049 with move instructions for mode MODE. GENFUN is the gen_... function
1050 to make a move insn for that mode. DATA has all the other info. */
1051
1052 static void
1053 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1054 struct move_by_pieces_d *data)
1055 {
1056 unsigned int size = GET_MODE_SIZE (mode);
1057 rtx to1 = NULL_RTX, from1;
1058
1059 while (data->len >= size)
1060 {
1061 if (data->reverse)
1062 data->offset -= size;
1063
1064 if (data->to)
1065 {
1066 if (data->autinc_to)
1067 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1068 data->offset);
1069 else
1070 to1 = adjust_address (data->to, mode, data->offset);
1071 }
1072
1073 if (data->autinc_from)
1074 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1075 data->offset);
1076 else
1077 from1 = adjust_address (data->from, mode, data->offset);
1078
1079 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1080 emit_insn (gen_add2_insn (data->to_addr,
1081 GEN_INT (-(HOST_WIDE_INT)size)));
1082 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1083 emit_insn (gen_add2_insn (data->from_addr,
1084 GEN_INT (-(HOST_WIDE_INT)size)));
1085
1086 if (data->to)
1087 emit_insn ((*genfun) (to1, from1));
1088 else
1089 {
1090 #ifdef PUSH_ROUNDING
1091 emit_single_push_insn (mode, from1, NULL);
1092 #else
1093 gcc_unreachable ();
1094 #endif
1095 }
1096
1097 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1098 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1099 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1100 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1101
1102 if (! data->reverse)
1103 data->offset += size;
1104
1105 data->len -= size;
1106 }
1107 }
1108 \f
1109 /* Emit code to move a block Y to a block X. This may be done with
1110 string-move instructions, with multiple scalar move instructions,
1111 or with a library call.
1112
1113 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1114 SIZE is an rtx that says how long they are.
1115 ALIGN is the maximum alignment we can assume they have.
1116 METHOD describes what kind of copy this is, and what mechanisms may be used.
1117
1118 Return the address of the new block, if memcpy is called and returns it,
1119 0 otherwise. */
1120
1121 rtx
1122 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1123 unsigned int expected_align, HOST_WIDE_INT expected_size)
1124 {
1125 bool may_use_call;
1126 rtx retval = 0;
1127 unsigned int align;
1128
1129 gcc_assert (size);
1130 if (CONST_INT_P (size)
1131 && INTVAL (size) == 0)
1132 return 0;
1133
1134 switch (method)
1135 {
1136 case BLOCK_OP_NORMAL:
1137 case BLOCK_OP_TAILCALL:
1138 may_use_call = true;
1139 break;
1140
1141 case BLOCK_OP_CALL_PARM:
1142 may_use_call = block_move_libcall_safe_for_call_parm ();
1143
1144 /* Make inhibit_defer_pop nonzero around the library call
1145 to force it to pop the arguments right away. */
1146 NO_DEFER_POP;
1147 break;
1148
1149 case BLOCK_OP_NO_LIBCALL:
1150 may_use_call = false;
1151 break;
1152
1153 default:
1154 gcc_unreachable ();
1155 }
1156
1157 gcc_assert (MEM_P (x) && MEM_P (y));
1158 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1159 gcc_assert (align >= BITS_PER_UNIT);
1160
1161 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1162 block copy is more efficient for other large modes, e.g. DCmode. */
1163 x = adjust_address (x, BLKmode, 0);
1164 y = adjust_address (y, BLKmode, 0);
1165
1166 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1167 can be incorrect is coming from __builtin_memcpy. */
1168 if (CONST_INT_P (size))
1169 {
1170 x = shallow_copy_rtx (x);
1171 y = shallow_copy_rtx (y);
1172 set_mem_size (x, INTVAL (size));
1173 set_mem_size (y, INTVAL (size));
1174 }
1175
1176 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1177 move_by_pieces (x, y, INTVAL (size), align, 0);
1178 else if (emit_block_move_via_movmem (x, y, size, align,
1179 expected_align, expected_size))
1180 ;
1181 else if (may_use_call
1182 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1183 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1184 {
1185 /* Since x and y are passed to a libcall, mark the corresponding
1186 tree EXPR as addressable. */
1187 tree y_expr = MEM_EXPR (y);
1188 tree x_expr = MEM_EXPR (x);
1189 if (y_expr)
1190 mark_addressable (y_expr);
1191 if (x_expr)
1192 mark_addressable (x_expr);
1193 retval = emit_block_move_via_libcall (x, y, size,
1194 method == BLOCK_OP_TAILCALL);
1195 }
1196
1197 else
1198 emit_block_move_via_loop (x, y, size, align);
1199
1200 if (method == BLOCK_OP_CALL_PARM)
1201 OK_DEFER_POP;
1202
1203 return retval;
1204 }
1205
1206 rtx
1207 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1208 {
1209 return emit_block_move_hints (x, y, size, method, 0, -1);
1210 }
1211
1212 /* A subroutine of emit_block_move. Returns true if calling the
1213 block move libcall will not clobber any parameters which may have
1214 already been placed on the stack. */
1215
1216 static bool
1217 block_move_libcall_safe_for_call_parm (void)
1218 {
1219 #if defined (REG_PARM_STACK_SPACE)
1220 tree fn;
1221 #endif
1222
1223 /* If arguments are pushed on the stack, then they're safe. */
1224 if (PUSH_ARGS)
1225 return true;
1226
1227 /* If registers go on the stack anyway, any argument is sure to clobber
1228 an outgoing argument. */
1229 #if defined (REG_PARM_STACK_SPACE)
1230 fn = emit_block_move_libcall_fn (false);
1231 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1232 depend on its argument. */
1233 (void) fn;
1234 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1235 && REG_PARM_STACK_SPACE (fn) != 0)
1236 return false;
1237 #endif
1238
1239 /* If any argument goes in memory, then it might clobber an outgoing
1240 argument. */
1241 {
1242 CUMULATIVE_ARGS args_so_far_v;
1243 cumulative_args_t args_so_far;
1244 tree fn, arg;
1245
1246 fn = emit_block_move_libcall_fn (false);
1247 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1248 args_so_far = pack_cumulative_args (&args_so_far_v);
1249
1250 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1251 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1252 {
1253 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1254 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1255 NULL_TREE, true);
1256 if (!tmp || !REG_P (tmp))
1257 return false;
1258 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1259 return false;
1260 targetm.calls.function_arg_advance (args_so_far, mode,
1261 NULL_TREE, true);
1262 }
1263 }
1264 return true;
1265 }
1266
1267 /* A subroutine of emit_block_move. Expand a movmem pattern;
1268 return true if successful. */
1269
1270 static bool
1271 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1272 unsigned int expected_align, HOST_WIDE_INT expected_size)
1273 {
1274 int save_volatile_ok = volatile_ok;
1275 enum machine_mode mode;
1276
1277 if (expected_align < align)
1278 expected_align = align;
1279
1280 /* Since this is a move insn, we don't care about volatility. */
1281 volatile_ok = 1;
1282
1283 /* Try the most limited insn first, because there's no point
1284 including more than one in the machine description unless
1285 the more limited one has some advantage. */
1286
1287 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1288 mode = GET_MODE_WIDER_MODE (mode))
1289 {
1290 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1291
1292 if (code != CODE_FOR_nothing
1293 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1294 here because if SIZE is less than the mode mask, as it is
1295 returned by the macro, it will definitely be less than the
1296 actual mode mask. */
1297 && ((CONST_INT_P (size)
1298 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1299 <= (GET_MODE_MASK (mode) >> 1)))
1300 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1301 {
1302 struct expand_operand ops[6];
1303 unsigned int nops;
1304
1305 /* ??? When called via emit_block_move_for_call, it'd be
1306 nice if there were some way to inform the backend, so
1307 that it doesn't fail the expansion because it thinks
1308 emitting the libcall would be more efficient. */
1309 nops = insn_data[(int) code].n_generator_args;
1310 gcc_assert (nops == 4 || nops == 6);
1311
1312 create_fixed_operand (&ops[0], x);
1313 create_fixed_operand (&ops[1], y);
1314 /* The check above guarantees that this size conversion is valid. */
1315 create_convert_operand_to (&ops[2], size, mode, true);
1316 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1317 if (nops == 6)
1318 {
1319 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1320 create_integer_operand (&ops[5], expected_size);
1321 }
1322 if (maybe_expand_insn (code, nops, ops))
1323 {
1324 volatile_ok = save_volatile_ok;
1325 return true;
1326 }
1327 }
1328 }
1329
1330 volatile_ok = save_volatile_ok;
1331 return false;
1332 }
1333
1334 /* A subroutine of emit_block_move. Expand a call to memcpy.
1335 Return the return value from memcpy, 0 otherwise. */
1336
1337 rtx
1338 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1339 {
1340 rtx dst_addr, src_addr;
1341 tree call_expr, fn, src_tree, dst_tree, size_tree;
1342 enum machine_mode size_mode;
1343 rtx retval;
1344
1345 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1346 pseudos. We can then place those new pseudos into a VAR_DECL and
1347 use them later. */
1348
1349 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1350 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1351
1352 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1353 src_addr = convert_memory_address (ptr_mode, src_addr);
1354
1355 dst_tree = make_tree (ptr_type_node, dst_addr);
1356 src_tree = make_tree (ptr_type_node, src_addr);
1357
1358 size_mode = TYPE_MODE (sizetype);
1359
1360 size = convert_to_mode (size_mode, size, 1);
1361 size = copy_to_mode_reg (size_mode, size);
1362
1363 /* It is incorrect to use the libcall calling conventions to call
1364 memcpy in this context. This could be a user call to memcpy and
1365 the user may wish to examine the return value from memcpy. For
1366 targets where libcalls and normal calls have different conventions
1367 for returning pointers, we could end up generating incorrect code. */
1368
1369 size_tree = make_tree (sizetype, size);
1370
1371 fn = emit_block_move_libcall_fn (true);
1372 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1373 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1374
1375 retval = expand_normal (call_expr);
1376
1377 return retval;
1378 }
1379
1380 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1381 for the function we use for block copies. The first time FOR_CALL
1382 is true, we call assemble_external. */
1383
1384 static GTY(()) tree block_move_fn;
1385
1386 void
1387 init_block_move_fn (const char *asmspec)
1388 {
1389 if (!block_move_fn)
1390 {
1391 tree args, fn;
1392
1393 fn = get_identifier ("memcpy");
1394 args = build_function_type_list (ptr_type_node, ptr_type_node,
1395 const_ptr_type_node, sizetype,
1396 NULL_TREE);
1397
1398 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1399 DECL_EXTERNAL (fn) = 1;
1400 TREE_PUBLIC (fn) = 1;
1401 DECL_ARTIFICIAL (fn) = 1;
1402 TREE_NOTHROW (fn) = 1;
1403 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1404 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1405
1406 block_move_fn = fn;
1407 }
1408
1409 if (asmspec)
1410 set_user_assembler_name (block_move_fn, asmspec);
1411 }
1412
1413 static tree
1414 emit_block_move_libcall_fn (int for_call)
1415 {
1416 static bool emitted_extern;
1417
1418 if (!block_move_fn)
1419 init_block_move_fn (NULL);
1420
1421 if (for_call && !emitted_extern)
1422 {
1423 emitted_extern = true;
1424 make_decl_rtl (block_move_fn);
1425 assemble_external (block_move_fn);
1426 }
1427
1428 return block_move_fn;
1429 }
1430
1431 /* A subroutine of emit_block_move. Copy the data via an explicit
1432 loop. This is used only when libcalls are forbidden. */
1433 /* ??? It'd be nice to copy in hunks larger than QImode. */
1434
1435 static void
1436 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1437 unsigned int align ATTRIBUTE_UNUSED)
1438 {
1439 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1440 enum machine_mode x_addr_mode
1441 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1442 enum machine_mode y_addr_mode
1443 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1444 enum machine_mode iter_mode;
1445
1446 iter_mode = GET_MODE (size);
1447 if (iter_mode == VOIDmode)
1448 iter_mode = word_mode;
1449
1450 top_label = gen_label_rtx ();
1451 cmp_label = gen_label_rtx ();
1452 iter = gen_reg_rtx (iter_mode);
1453
1454 emit_move_insn (iter, const0_rtx);
1455
1456 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1457 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1458 do_pending_stack_adjust ();
1459
1460 emit_jump (cmp_label);
1461 emit_label (top_label);
1462
1463 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1464 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1465
1466 if (x_addr_mode != y_addr_mode)
1467 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1468 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1469
1470 x = change_address (x, QImode, x_addr);
1471 y = change_address (y, QImode, y_addr);
1472
1473 emit_move_insn (x, y);
1474
1475 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1476 true, OPTAB_LIB_WIDEN);
1477 if (tmp != iter)
1478 emit_move_insn (iter, tmp);
1479
1480 emit_label (cmp_label);
1481
1482 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1483 true, top_label);
1484 }
1485 \f
1486 /* Copy all or part of a value X into registers starting at REGNO.
1487 The number of registers to be filled is NREGS. */
1488
1489 void
1490 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1491 {
1492 int i;
1493 #ifdef HAVE_load_multiple
1494 rtx pat;
1495 rtx last;
1496 #endif
1497
1498 if (nregs == 0)
1499 return;
1500
1501 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1502 x = validize_mem (force_const_mem (mode, x));
1503
1504 /* See if the machine can do this with a load multiple insn. */
1505 #ifdef HAVE_load_multiple
1506 if (HAVE_load_multiple)
1507 {
1508 last = get_last_insn ();
1509 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1510 GEN_INT (nregs));
1511 if (pat)
1512 {
1513 emit_insn (pat);
1514 return;
1515 }
1516 else
1517 delete_insns_since (last);
1518 }
1519 #endif
1520
1521 for (i = 0; i < nregs; i++)
1522 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1523 operand_subword_force (x, i, mode));
1524 }
1525
1526 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1527 The number of registers to be filled is NREGS. */
1528
1529 void
1530 move_block_from_reg (int regno, rtx x, int nregs)
1531 {
1532 int i;
1533
1534 if (nregs == 0)
1535 return;
1536
1537 /* See if the machine can do this with a store multiple insn. */
1538 #ifdef HAVE_store_multiple
1539 if (HAVE_store_multiple)
1540 {
1541 rtx last = get_last_insn ();
1542 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1543 GEN_INT (nregs));
1544 if (pat)
1545 {
1546 emit_insn (pat);
1547 return;
1548 }
1549 else
1550 delete_insns_since (last);
1551 }
1552 #endif
1553
1554 for (i = 0; i < nregs; i++)
1555 {
1556 rtx tem = operand_subword (x, i, 1, BLKmode);
1557
1558 gcc_assert (tem);
1559
1560 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1561 }
1562 }
1563
1564 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1565 ORIG, where ORIG is a non-consecutive group of registers represented by
1566 a PARALLEL. The clone is identical to the original except in that the
1567 original set of registers is replaced by a new set of pseudo registers.
1568 The new set has the same modes as the original set. */
1569
1570 rtx
1571 gen_group_rtx (rtx orig)
1572 {
1573 int i, length;
1574 rtx *tmps;
1575
1576 gcc_assert (GET_CODE (orig) == PARALLEL);
1577
1578 length = XVECLEN (orig, 0);
1579 tmps = XALLOCAVEC (rtx, length);
1580
1581 /* Skip a NULL entry in first slot. */
1582 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1583
1584 if (i)
1585 tmps[0] = 0;
1586
1587 for (; i < length; i++)
1588 {
1589 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1590 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1591
1592 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1593 }
1594
1595 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1596 }
1597
1598 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1599 except that values are placed in TMPS[i], and must later be moved
1600 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1601
1602 static void
1603 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1604 {
1605 rtx src;
1606 int start, i;
1607 enum machine_mode m = GET_MODE (orig_src);
1608
1609 gcc_assert (GET_CODE (dst) == PARALLEL);
1610
1611 if (m != VOIDmode
1612 && !SCALAR_INT_MODE_P (m)
1613 && !MEM_P (orig_src)
1614 && GET_CODE (orig_src) != CONCAT)
1615 {
1616 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1617 if (imode == BLKmode)
1618 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1619 else
1620 src = gen_reg_rtx (imode);
1621 if (imode != BLKmode)
1622 src = gen_lowpart (GET_MODE (orig_src), src);
1623 emit_move_insn (src, orig_src);
1624 /* ...and back again. */
1625 if (imode != BLKmode)
1626 src = gen_lowpart (imode, src);
1627 emit_group_load_1 (tmps, dst, src, type, ssize);
1628 return;
1629 }
1630
1631 /* Check for a NULL entry, used to indicate that the parameter goes
1632 both on the stack and in registers. */
1633 if (XEXP (XVECEXP (dst, 0, 0), 0))
1634 start = 0;
1635 else
1636 start = 1;
1637
1638 /* Process the pieces. */
1639 for (i = start; i < XVECLEN (dst, 0); i++)
1640 {
1641 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1642 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1643 unsigned int bytelen = GET_MODE_SIZE (mode);
1644 int shift = 0;
1645
1646 /* Handle trailing fragments that run over the size of the struct. */
1647 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1648 {
1649 /* Arrange to shift the fragment to where it belongs.
1650 extract_bit_field loads to the lsb of the reg. */
1651 if (
1652 #ifdef BLOCK_REG_PADDING
1653 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1654 == (BYTES_BIG_ENDIAN ? upward : downward)
1655 #else
1656 BYTES_BIG_ENDIAN
1657 #endif
1658 )
1659 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1660 bytelen = ssize - bytepos;
1661 gcc_assert (bytelen > 0);
1662 }
1663
1664 /* If we won't be loading directly from memory, protect the real source
1665 from strange tricks we might play; but make sure that the source can
1666 be loaded directly into the destination. */
1667 src = orig_src;
1668 if (!MEM_P (orig_src)
1669 && (!CONSTANT_P (orig_src)
1670 || (GET_MODE (orig_src) != mode
1671 && GET_MODE (orig_src) != VOIDmode)))
1672 {
1673 if (GET_MODE (orig_src) == VOIDmode)
1674 src = gen_reg_rtx (mode);
1675 else
1676 src = gen_reg_rtx (GET_MODE (orig_src));
1677
1678 emit_move_insn (src, orig_src);
1679 }
1680
1681 /* Optimize the access just a bit. */
1682 if (MEM_P (src)
1683 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1684 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1685 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1686 && bytelen == GET_MODE_SIZE (mode))
1687 {
1688 tmps[i] = gen_reg_rtx (mode);
1689 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1690 }
1691 else if (COMPLEX_MODE_P (mode)
1692 && GET_MODE (src) == mode
1693 && bytelen == GET_MODE_SIZE (mode))
1694 /* Let emit_move_complex do the bulk of the work. */
1695 tmps[i] = src;
1696 else if (GET_CODE (src) == CONCAT)
1697 {
1698 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1699 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1700
1701 if ((bytepos == 0 && bytelen == slen0)
1702 || (bytepos != 0 && bytepos + bytelen <= slen))
1703 {
1704 /* The following assumes that the concatenated objects all
1705 have the same size. In this case, a simple calculation
1706 can be used to determine the object and the bit field
1707 to be extracted. */
1708 tmps[i] = XEXP (src, bytepos / slen0);
1709 if (! CONSTANT_P (tmps[i])
1710 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1711 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1712 (bytepos % slen0) * BITS_PER_UNIT,
1713 1, false, NULL_RTX, mode, mode);
1714 }
1715 else
1716 {
1717 rtx mem;
1718
1719 gcc_assert (!bytepos);
1720 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1721 emit_move_insn (mem, src);
1722 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1723 0, 1, false, NULL_RTX, mode, mode);
1724 }
1725 }
1726 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1727 SIMD register, which is currently broken. While we get GCC
1728 to emit proper RTL for these cases, let's dump to memory. */
1729 else if (VECTOR_MODE_P (GET_MODE (dst))
1730 && REG_P (src))
1731 {
1732 int slen = GET_MODE_SIZE (GET_MODE (src));
1733 rtx mem;
1734
1735 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1736 emit_move_insn (mem, src);
1737 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1738 }
1739 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1740 && XVECLEN (dst, 0) > 1)
1741 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1742 else if (CONSTANT_P (src))
1743 {
1744 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1745
1746 if (len == ssize)
1747 tmps[i] = src;
1748 else
1749 {
1750 rtx first, second;
1751
1752 gcc_assert (2 * len == ssize);
1753 split_double (src, &first, &second);
1754 if (i)
1755 tmps[i] = second;
1756 else
1757 tmps[i] = first;
1758 }
1759 }
1760 else if (REG_P (src) && GET_MODE (src) == mode)
1761 tmps[i] = src;
1762 else
1763 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1764 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1765 mode, mode);
1766
1767 if (shift)
1768 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1769 shift, tmps[i], 0);
1770 }
1771 }
1772
1773 /* Emit code to move a block SRC of type TYPE to a block DST,
1774 where DST is non-consecutive registers represented by a PARALLEL.
1775 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1776 if not known. */
1777
1778 void
1779 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1780 {
1781 rtx *tmps;
1782 int i;
1783
1784 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1785 emit_group_load_1 (tmps, dst, src, type, ssize);
1786
1787 /* Copy the extracted pieces into the proper (probable) hard regs. */
1788 for (i = 0; i < XVECLEN (dst, 0); i++)
1789 {
1790 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1791 if (d == NULL)
1792 continue;
1793 emit_move_insn (d, tmps[i]);
1794 }
1795 }
1796
1797 /* Similar, but load SRC into new pseudos in a format that looks like
1798 PARALLEL. This can later be fed to emit_group_move to get things
1799 in the right place. */
1800
1801 rtx
1802 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1803 {
1804 rtvec vec;
1805 int i;
1806
1807 vec = rtvec_alloc (XVECLEN (parallel, 0));
1808 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1809
1810 /* Convert the vector to look just like the original PARALLEL, except
1811 with the computed values. */
1812 for (i = 0; i < XVECLEN (parallel, 0); i++)
1813 {
1814 rtx e = XVECEXP (parallel, 0, i);
1815 rtx d = XEXP (e, 0);
1816
1817 if (d)
1818 {
1819 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1820 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1821 }
1822 RTVEC_ELT (vec, i) = e;
1823 }
1824
1825 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1826 }
1827
1828 /* Emit code to move a block SRC to block DST, where SRC and DST are
1829 non-consecutive groups of registers, each represented by a PARALLEL. */
1830
1831 void
1832 emit_group_move (rtx dst, rtx src)
1833 {
1834 int i;
1835
1836 gcc_assert (GET_CODE (src) == PARALLEL
1837 && GET_CODE (dst) == PARALLEL
1838 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1839
1840 /* Skip first entry if NULL. */
1841 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1842 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1843 XEXP (XVECEXP (src, 0, i), 0));
1844 }
1845
1846 /* Move a group of registers represented by a PARALLEL into pseudos. */
1847
1848 rtx
1849 emit_group_move_into_temps (rtx src)
1850 {
1851 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1852 int i;
1853
1854 for (i = 0; i < XVECLEN (src, 0); i++)
1855 {
1856 rtx e = XVECEXP (src, 0, i);
1857 rtx d = XEXP (e, 0);
1858
1859 if (d)
1860 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1861 RTVEC_ELT (vec, i) = e;
1862 }
1863
1864 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1865 }
1866
1867 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1868 where SRC is non-consecutive registers represented by a PARALLEL.
1869 SSIZE represents the total size of block ORIG_DST, or -1 if not
1870 known. */
1871
1872 void
1873 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1874 {
1875 rtx *tmps, dst;
1876 int start, finish, i;
1877 enum machine_mode m = GET_MODE (orig_dst);
1878
1879 gcc_assert (GET_CODE (src) == PARALLEL);
1880
1881 if (!SCALAR_INT_MODE_P (m)
1882 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1883 {
1884 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1885 if (imode == BLKmode)
1886 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1887 else
1888 dst = gen_reg_rtx (imode);
1889 emit_group_store (dst, src, type, ssize);
1890 if (imode != BLKmode)
1891 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1892 emit_move_insn (orig_dst, dst);
1893 return;
1894 }
1895
1896 /* Check for a NULL entry, used to indicate that the parameter goes
1897 both on the stack and in registers. */
1898 if (XEXP (XVECEXP (src, 0, 0), 0))
1899 start = 0;
1900 else
1901 start = 1;
1902 finish = XVECLEN (src, 0);
1903
1904 tmps = XALLOCAVEC (rtx, finish);
1905
1906 /* Copy the (probable) hard regs into pseudos. */
1907 for (i = start; i < finish; i++)
1908 {
1909 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1910 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1911 {
1912 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1913 emit_move_insn (tmps[i], reg);
1914 }
1915 else
1916 tmps[i] = reg;
1917 }
1918
1919 /* If we won't be storing directly into memory, protect the real destination
1920 from strange tricks we might play. */
1921 dst = orig_dst;
1922 if (GET_CODE (dst) == PARALLEL)
1923 {
1924 rtx temp;
1925
1926 /* We can get a PARALLEL dst if there is a conditional expression in
1927 a return statement. In that case, the dst and src are the same,
1928 so no action is necessary. */
1929 if (rtx_equal_p (dst, src))
1930 return;
1931
1932 /* It is unclear if we can ever reach here, but we may as well handle
1933 it. Allocate a temporary, and split this into a store/load to/from
1934 the temporary. */
1935
1936 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1937 emit_group_store (temp, src, type, ssize);
1938 emit_group_load (dst, temp, type, ssize);
1939 return;
1940 }
1941 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1942 {
1943 enum machine_mode outer = GET_MODE (dst);
1944 enum machine_mode inner;
1945 HOST_WIDE_INT bytepos;
1946 bool done = false;
1947 rtx temp;
1948
1949 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1950 dst = gen_reg_rtx (outer);
1951
1952 /* Make life a bit easier for combine. */
1953 /* If the first element of the vector is the low part
1954 of the destination mode, use a paradoxical subreg to
1955 initialize the destination. */
1956 if (start < finish)
1957 {
1958 inner = GET_MODE (tmps[start]);
1959 bytepos = subreg_lowpart_offset (inner, outer);
1960 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1961 {
1962 temp = simplify_gen_subreg (outer, tmps[start],
1963 inner, 0);
1964 if (temp)
1965 {
1966 emit_move_insn (dst, temp);
1967 done = true;
1968 start++;
1969 }
1970 }
1971 }
1972
1973 /* If the first element wasn't the low part, try the last. */
1974 if (!done
1975 && start < finish - 1)
1976 {
1977 inner = GET_MODE (tmps[finish - 1]);
1978 bytepos = subreg_lowpart_offset (inner, outer);
1979 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1980 {
1981 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1982 inner, 0);
1983 if (temp)
1984 {
1985 emit_move_insn (dst, temp);
1986 done = true;
1987 finish--;
1988 }
1989 }
1990 }
1991
1992 /* Otherwise, simply initialize the result to zero. */
1993 if (!done)
1994 emit_move_insn (dst, CONST0_RTX (outer));
1995 }
1996
1997 /* Process the pieces. */
1998 for (i = start; i < finish; i++)
1999 {
2000 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2001 enum machine_mode mode = GET_MODE (tmps[i]);
2002 unsigned int bytelen = GET_MODE_SIZE (mode);
2003 unsigned int adj_bytelen = bytelen;
2004 rtx dest = dst;
2005
2006 /* Handle trailing fragments that run over the size of the struct. */
2007 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2008 adj_bytelen = ssize - bytepos;
2009
2010 if (GET_CODE (dst) == CONCAT)
2011 {
2012 if (bytepos + adj_bytelen
2013 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2014 dest = XEXP (dst, 0);
2015 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2016 {
2017 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2018 dest = XEXP (dst, 1);
2019 }
2020 else
2021 {
2022 enum machine_mode dest_mode = GET_MODE (dest);
2023 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2024
2025 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2026
2027 if (GET_MODE_ALIGNMENT (dest_mode)
2028 >= GET_MODE_ALIGNMENT (tmp_mode))
2029 {
2030 dest = assign_stack_temp (dest_mode,
2031 GET_MODE_SIZE (dest_mode),
2032 0);
2033 emit_move_insn (adjust_address (dest,
2034 tmp_mode,
2035 bytepos),
2036 tmps[i]);
2037 dst = dest;
2038 }
2039 else
2040 {
2041 dest = assign_stack_temp (tmp_mode,
2042 GET_MODE_SIZE (tmp_mode),
2043 0);
2044 emit_move_insn (dest, tmps[i]);
2045 dst = adjust_address (dest, dest_mode, bytepos);
2046 }
2047 break;
2048 }
2049 }
2050
2051 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2052 {
2053 /* store_bit_field always takes its value from the lsb.
2054 Move the fragment to the lsb if it's not already there. */
2055 if (
2056 #ifdef BLOCK_REG_PADDING
2057 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2058 == (BYTES_BIG_ENDIAN ? upward : downward)
2059 #else
2060 BYTES_BIG_ENDIAN
2061 #endif
2062 )
2063 {
2064 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2065 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2066 shift, tmps[i], 0);
2067 }
2068 bytelen = adj_bytelen;
2069 }
2070
2071 /* Optimize the access just a bit. */
2072 if (MEM_P (dest)
2073 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2074 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2075 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2076 && bytelen == GET_MODE_SIZE (mode))
2077 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2078 else
2079 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2080 0, 0, mode, tmps[i]);
2081 }
2082
2083 /* Copy from the pseudo into the (probable) hard reg. */
2084 if (orig_dst != dst)
2085 emit_move_insn (orig_dst, dst);
2086 }
2087
2088 /* Generate code to copy a BLKmode object of TYPE out of a
2089 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2090 is null, a stack temporary is created. TGTBLK is returned.
2091
2092 The purpose of this routine is to handle functions that return
2093 BLKmode structures in registers. Some machines (the PA for example)
2094 want to return all small structures in registers regardless of the
2095 structure's alignment. */
2096
2097 rtx
2098 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2099 {
2100 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2101 rtx src = NULL, dst = NULL;
2102 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2103 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2104 enum machine_mode copy_mode;
2105
2106 if (tgtblk == 0)
2107 {
2108 tgtblk = assign_temp (build_qualified_type (type,
2109 (TYPE_QUALS (type)
2110 | TYPE_QUAL_CONST)),
2111 0, 1, 1);
2112 preserve_temp_slots (tgtblk);
2113 }
2114
2115 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2116 into a new pseudo which is a full word. */
2117
2118 if (GET_MODE (srcreg) != BLKmode
2119 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2120 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2121
2122 /* If the structure doesn't take up a whole number of words, see whether
2123 SRCREG is padded on the left or on the right. If it's on the left,
2124 set PADDING_CORRECTION to the number of bits to skip.
2125
2126 In most ABIs, the structure will be returned at the least end of
2127 the register, which translates to right padding on little-endian
2128 targets and left padding on big-endian targets. The opposite
2129 holds if the structure is returned at the most significant
2130 end of the register. */
2131 if (bytes % UNITS_PER_WORD != 0
2132 && (targetm.calls.return_in_msb (type)
2133 ? !BYTES_BIG_ENDIAN
2134 : BYTES_BIG_ENDIAN))
2135 padding_correction
2136 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2137
2138 /* Copy the structure BITSIZE bits at a time. If the target lives in
2139 memory, take care of not reading/writing past its end by selecting
2140 a copy mode suited to BITSIZE. This should always be possible given
2141 how it is computed.
2142
2143 We could probably emit more efficient code for machines which do not use
2144 strict alignment, but it doesn't seem worth the effort at the current
2145 time. */
2146
2147 copy_mode = word_mode;
2148 if (MEM_P (tgtblk))
2149 {
2150 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2151 if (mem_mode != BLKmode)
2152 copy_mode = mem_mode;
2153 }
2154
2155 for (bitpos = 0, xbitpos = padding_correction;
2156 bitpos < bytes * BITS_PER_UNIT;
2157 bitpos += bitsize, xbitpos += bitsize)
2158 {
2159 /* We need a new source operand each time xbitpos is on a
2160 word boundary and when xbitpos == padding_correction
2161 (the first time through). */
2162 if (xbitpos % BITS_PER_WORD == 0
2163 || xbitpos == padding_correction)
2164 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2165 GET_MODE (srcreg));
2166
2167 /* We need a new destination operand each time bitpos is on
2168 a word boundary. */
2169 if (bitpos % BITS_PER_WORD == 0)
2170 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2171
2172 /* Use xbitpos for the source extraction (right justified) and
2173 bitpos for the destination store (left justified). */
2174 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2175 extract_bit_field (src, bitsize,
2176 xbitpos % BITS_PER_WORD, 1, false,
2177 NULL_RTX, copy_mode, copy_mode));
2178 }
2179
2180 return tgtblk;
2181 }
2182
2183 /* Add a USE expression for REG to the (possibly empty) list pointed
2184 to by CALL_FUSAGE. REG must denote a hard register. */
2185
2186 void
2187 use_reg (rtx *call_fusage, rtx reg)
2188 {
2189 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2190
2191 *call_fusage
2192 = gen_rtx_EXPR_LIST (VOIDmode,
2193 gen_rtx_USE (VOIDmode, reg), *call_fusage);
2194 }
2195
2196 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2197 starting at REGNO. All of these registers must be hard registers. */
2198
2199 void
2200 use_regs (rtx *call_fusage, int regno, int nregs)
2201 {
2202 int i;
2203
2204 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2205
2206 for (i = 0; i < nregs; i++)
2207 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2208 }
2209
2210 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2211 PARALLEL REGS. This is for calls that pass values in multiple
2212 non-contiguous locations. The Irix 6 ABI has examples of this. */
2213
2214 void
2215 use_group_regs (rtx *call_fusage, rtx regs)
2216 {
2217 int i;
2218
2219 for (i = 0; i < XVECLEN (regs, 0); i++)
2220 {
2221 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2222
2223 /* A NULL entry means the parameter goes both on the stack and in
2224 registers. This can also be a MEM for targets that pass values
2225 partially on the stack and partially in registers. */
2226 if (reg != 0 && REG_P (reg))
2227 use_reg (call_fusage, reg);
2228 }
2229 }
2230
2231 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2232 assigment and the code of the expresion on the RHS is CODE. Return
2233 NULL otherwise. */
2234
2235 static gimple
2236 get_def_for_expr (tree name, enum tree_code code)
2237 {
2238 gimple def_stmt;
2239
2240 if (TREE_CODE (name) != SSA_NAME)
2241 return NULL;
2242
2243 def_stmt = get_gimple_for_ssa_name (name);
2244 if (!def_stmt
2245 || gimple_assign_rhs_code (def_stmt) != code)
2246 return NULL;
2247
2248 return def_stmt;
2249 }
2250 \f
2251
2252 /* Determine whether the LEN bytes generated by CONSTFUN can be
2253 stored to memory using several move instructions. CONSTFUNDATA is
2254 a pointer which will be passed as argument in every CONSTFUN call.
2255 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2256 a memset operation and false if it's a copy of a constant string.
2257 Return nonzero if a call to store_by_pieces should succeed. */
2258
2259 int
2260 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2261 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2262 void *constfundata, unsigned int align, bool memsetp)
2263 {
2264 unsigned HOST_WIDE_INT l;
2265 unsigned int max_size;
2266 HOST_WIDE_INT offset = 0;
2267 enum machine_mode mode;
2268 enum insn_code icode;
2269 int reverse;
2270 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2271 rtx cst ATTRIBUTE_UNUSED;
2272
2273 if (len == 0)
2274 return 1;
2275
2276 if (! (memsetp
2277 ? SET_BY_PIECES_P (len, align)
2278 : STORE_BY_PIECES_P (len, align)))
2279 return 0;
2280
2281 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2282
2283 /* We would first store what we can in the largest integer mode, then go to
2284 successively smaller modes. */
2285
2286 for (reverse = 0;
2287 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2288 reverse++)
2289 {
2290 l = len;
2291 max_size = STORE_MAX_PIECES + 1;
2292 while (max_size > 1)
2293 {
2294 mode = widest_int_mode_for_size (max_size);
2295
2296 if (mode == VOIDmode)
2297 break;
2298
2299 icode = optab_handler (mov_optab, mode);
2300 if (icode != CODE_FOR_nothing
2301 && align >= GET_MODE_ALIGNMENT (mode))
2302 {
2303 unsigned int size = GET_MODE_SIZE (mode);
2304
2305 while (l >= size)
2306 {
2307 if (reverse)
2308 offset -= size;
2309
2310 cst = (*constfun) (constfundata, offset, mode);
2311 if (!targetm.legitimate_constant_p (mode, cst))
2312 return 0;
2313
2314 if (!reverse)
2315 offset += size;
2316
2317 l -= size;
2318 }
2319 }
2320
2321 max_size = GET_MODE_SIZE (mode);
2322 }
2323
2324 /* The code above should have handled everything. */
2325 gcc_assert (!l);
2326 }
2327
2328 return 1;
2329 }
2330
2331 /* Generate several move instructions to store LEN bytes generated by
2332 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2333 pointer which will be passed as argument in every CONSTFUN call.
2334 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2335 a memset operation and false if it's a copy of a constant string.
2336 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2337 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2338 stpcpy. */
2339
2340 rtx
2341 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2342 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2343 void *constfundata, unsigned int align, bool memsetp, int endp)
2344 {
2345 enum machine_mode to_addr_mode
2346 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2347 struct store_by_pieces_d data;
2348
2349 if (len == 0)
2350 {
2351 gcc_assert (endp != 2);
2352 return to;
2353 }
2354
2355 gcc_assert (memsetp
2356 ? SET_BY_PIECES_P (len, align)
2357 : STORE_BY_PIECES_P (len, align));
2358 data.constfun = constfun;
2359 data.constfundata = constfundata;
2360 data.len = len;
2361 data.to = to;
2362 store_by_pieces_1 (&data, align);
2363 if (endp)
2364 {
2365 rtx to1;
2366
2367 gcc_assert (!data.reverse);
2368 if (data.autinc_to)
2369 {
2370 if (endp == 2)
2371 {
2372 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2373 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2374 else
2375 data.to_addr = copy_to_mode_reg (to_addr_mode,
2376 plus_constant (data.to_addr,
2377 -1));
2378 }
2379 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2380 data.offset);
2381 }
2382 else
2383 {
2384 if (endp == 2)
2385 --data.offset;
2386 to1 = adjust_address (data.to, QImode, data.offset);
2387 }
2388 return to1;
2389 }
2390 else
2391 return data.to;
2392 }
2393
2394 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2395 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2396
2397 static void
2398 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2399 {
2400 struct store_by_pieces_d data;
2401
2402 if (len == 0)
2403 return;
2404
2405 data.constfun = clear_by_pieces_1;
2406 data.constfundata = NULL;
2407 data.len = len;
2408 data.to = to;
2409 store_by_pieces_1 (&data, align);
2410 }
2411
2412 /* Callback routine for clear_by_pieces.
2413 Return const0_rtx unconditionally. */
2414
2415 static rtx
2416 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2417 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2418 enum machine_mode mode ATTRIBUTE_UNUSED)
2419 {
2420 return const0_rtx;
2421 }
2422
2423 /* Subroutine of clear_by_pieces and store_by_pieces.
2424 Generate several move instructions to store LEN bytes of block TO. (A MEM
2425 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2426
2427 static void
2428 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2429 unsigned int align ATTRIBUTE_UNUSED)
2430 {
2431 enum machine_mode to_addr_mode
2432 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2433 rtx to_addr = XEXP (data->to, 0);
2434 unsigned int max_size = STORE_MAX_PIECES + 1;
2435 enum insn_code icode;
2436
2437 data->offset = 0;
2438 data->to_addr = to_addr;
2439 data->autinc_to
2440 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2441 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2442
2443 data->explicit_inc_to = 0;
2444 data->reverse
2445 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2446 if (data->reverse)
2447 data->offset = data->len;
2448
2449 /* If storing requires more than two move insns,
2450 copy addresses to registers (to make displacements shorter)
2451 and use post-increment if available. */
2452 if (!data->autinc_to
2453 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2454 {
2455 /* Determine the main mode we'll be using.
2456 MODE might not be used depending on the definitions of the
2457 USE_* macros below. */
2458 enum machine_mode mode ATTRIBUTE_UNUSED
2459 = widest_int_mode_for_size (max_size);
2460
2461 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2462 {
2463 data->to_addr = copy_to_mode_reg (to_addr_mode,
2464 plus_constant (to_addr, data->len));
2465 data->autinc_to = 1;
2466 data->explicit_inc_to = -1;
2467 }
2468
2469 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2470 && ! data->autinc_to)
2471 {
2472 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2473 data->autinc_to = 1;
2474 data->explicit_inc_to = 1;
2475 }
2476
2477 if ( !data->autinc_to && CONSTANT_P (to_addr))
2478 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2479 }
2480
2481 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2482
2483 /* First store what we can in the largest integer mode, then go to
2484 successively smaller modes. */
2485
2486 while (max_size > 1)
2487 {
2488 enum machine_mode mode = widest_int_mode_for_size (max_size);
2489
2490 if (mode == VOIDmode)
2491 break;
2492
2493 icode = optab_handler (mov_optab, mode);
2494 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2495 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2496
2497 max_size = GET_MODE_SIZE (mode);
2498 }
2499
2500 /* The code above should have handled everything. */
2501 gcc_assert (!data->len);
2502 }
2503
2504 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2505 with move instructions for mode MODE. GENFUN is the gen_... function
2506 to make a move insn for that mode. DATA has all the other info. */
2507
2508 static void
2509 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2510 struct store_by_pieces_d *data)
2511 {
2512 unsigned int size = GET_MODE_SIZE (mode);
2513 rtx to1, cst;
2514
2515 while (data->len >= size)
2516 {
2517 if (data->reverse)
2518 data->offset -= size;
2519
2520 if (data->autinc_to)
2521 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2522 data->offset);
2523 else
2524 to1 = adjust_address (data->to, mode, data->offset);
2525
2526 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2527 emit_insn (gen_add2_insn (data->to_addr,
2528 GEN_INT (-(HOST_WIDE_INT) size)));
2529
2530 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2531 emit_insn ((*genfun) (to1, cst));
2532
2533 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2534 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2535
2536 if (! data->reverse)
2537 data->offset += size;
2538
2539 data->len -= size;
2540 }
2541 }
2542 \f
2543 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2544 its length in bytes. */
2545
2546 rtx
2547 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2548 unsigned int expected_align, HOST_WIDE_INT expected_size)
2549 {
2550 enum machine_mode mode = GET_MODE (object);
2551 unsigned int align;
2552
2553 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2554
2555 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2556 just move a zero. Otherwise, do this a piece at a time. */
2557 if (mode != BLKmode
2558 && CONST_INT_P (size)
2559 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2560 {
2561 rtx zero = CONST0_RTX (mode);
2562 if (zero != NULL)
2563 {
2564 emit_move_insn (object, zero);
2565 return NULL;
2566 }
2567
2568 if (COMPLEX_MODE_P (mode))
2569 {
2570 zero = CONST0_RTX (GET_MODE_INNER (mode));
2571 if (zero != NULL)
2572 {
2573 write_complex_part (object, zero, 0);
2574 write_complex_part (object, zero, 1);
2575 return NULL;
2576 }
2577 }
2578 }
2579
2580 if (size == const0_rtx)
2581 return NULL;
2582
2583 align = MEM_ALIGN (object);
2584
2585 if (CONST_INT_P (size)
2586 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2587 clear_by_pieces (object, INTVAL (size), align);
2588 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2589 expected_align, expected_size))
2590 ;
2591 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2592 return set_storage_via_libcall (object, size, const0_rtx,
2593 method == BLOCK_OP_TAILCALL);
2594 else
2595 gcc_unreachable ();
2596
2597 return NULL;
2598 }
2599
2600 rtx
2601 clear_storage (rtx object, rtx size, enum block_op_methods method)
2602 {
2603 return clear_storage_hints (object, size, method, 0, -1);
2604 }
2605
2606
2607 /* A subroutine of clear_storage. Expand a call to memset.
2608 Return the return value of memset, 0 otherwise. */
2609
2610 rtx
2611 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2612 {
2613 tree call_expr, fn, object_tree, size_tree, val_tree;
2614 enum machine_mode size_mode;
2615 rtx retval;
2616
2617 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2618 place those into new pseudos into a VAR_DECL and use them later. */
2619
2620 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2621
2622 size_mode = TYPE_MODE (sizetype);
2623 size = convert_to_mode (size_mode, size, 1);
2624 size = copy_to_mode_reg (size_mode, size);
2625
2626 /* It is incorrect to use the libcall calling conventions to call
2627 memset in this context. This could be a user call to memset and
2628 the user may wish to examine the return value from memset. For
2629 targets where libcalls and normal calls have different conventions
2630 for returning pointers, we could end up generating incorrect code. */
2631
2632 object_tree = make_tree (ptr_type_node, object);
2633 if (!CONST_INT_P (val))
2634 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2635 size_tree = make_tree (sizetype, size);
2636 val_tree = make_tree (integer_type_node, val);
2637
2638 fn = clear_storage_libcall_fn (true);
2639 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2640 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2641
2642 retval = expand_normal (call_expr);
2643
2644 return retval;
2645 }
2646
2647 /* A subroutine of set_storage_via_libcall. Create the tree node
2648 for the function we use for block clears. The first time FOR_CALL
2649 is true, we call assemble_external. */
2650
2651 tree block_clear_fn;
2652
2653 void
2654 init_block_clear_fn (const char *asmspec)
2655 {
2656 if (!block_clear_fn)
2657 {
2658 tree fn, args;
2659
2660 fn = get_identifier ("memset");
2661 args = build_function_type_list (ptr_type_node, ptr_type_node,
2662 integer_type_node, sizetype,
2663 NULL_TREE);
2664
2665 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2666 DECL_EXTERNAL (fn) = 1;
2667 TREE_PUBLIC (fn) = 1;
2668 DECL_ARTIFICIAL (fn) = 1;
2669 TREE_NOTHROW (fn) = 1;
2670 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2671 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2672
2673 block_clear_fn = fn;
2674 }
2675
2676 if (asmspec)
2677 set_user_assembler_name (block_clear_fn, asmspec);
2678 }
2679
2680 static tree
2681 clear_storage_libcall_fn (int for_call)
2682 {
2683 static bool emitted_extern;
2684
2685 if (!block_clear_fn)
2686 init_block_clear_fn (NULL);
2687
2688 if (for_call && !emitted_extern)
2689 {
2690 emitted_extern = true;
2691 make_decl_rtl (block_clear_fn);
2692 assemble_external (block_clear_fn);
2693 }
2694
2695 return block_clear_fn;
2696 }
2697 \f
2698 /* Expand a setmem pattern; return true if successful. */
2699
2700 bool
2701 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2702 unsigned int expected_align, HOST_WIDE_INT expected_size)
2703 {
2704 /* Try the most limited insn first, because there's no point
2705 including more than one in the machine description unless
2706 the more limited one has some advantage. */
2707
2708 enum machine_mode mode;
2709
2710 if (expected_align < align)
2711 expected_align = align;
2712
2713 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2714 mode = GET_MODE_WIDER_MODE (mode))
2715 {
2716 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2717
2718 if (code != CODE_FOR_nothing
2719 /* We don't need MODE to be narrower than
2720 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2721 the mode mask, as it is returned by the macro, it will
2722 definitely be less than the actual mode mask. */
2723 && ((CONST_INT_P (size)
2724 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2725 <= (GET_MODE_MASK (mode) >> 1)))
2726 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2727 {
2728 struct expand_operand ops[6];
2729 unsigned int nops;
2730
2731 nops = insn_data[(int) code].n_generator_args;
2732 gcc_assert (nops == 4 || nops == 6);
2733
2734 create_fixed_operand (&ops[0], object);
2735 /* The check above guarantees that this size conversion is valid. */
2736 create_convert_operand_to (&ops[1], size, mode, true);
2737 create_convert_operand_from (&ops[2], val, byte_mode, true);
2738 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2739 if (nops == 6)
2740 {
2741 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2742 create_integer_operand (&ops[5], expected_size);
2743 }
2744 if (maybe_expand_insn (code, nops, ops))
2745 return true;
2746 }
2747 }
2748
2749 return false;
2750 }
2751
2752 \f
2753 /* Write to one of the components of the complex value CPLX. Write VAL to
2754 the real part if IMAG_P is false, and the imaginary part if its true. */
2755
2756 static void
2757 write_complex_part (rtx cplx, rtx val, bool imag_p)
2758 {
2759 enum machine_mode cmode;
2760 enum machine_mode imode;
2761 unsigned ibitsize;
2762
2763 if (GET_CODE (cplx) == CONCAT)
2764 {
2765 emit_move_insn (XEXP (cplx, imag_p), val);
2766 return;
2767 }
2768
2769 cmode = GET_MODE (cplx);
2770 imode = GET_MODE_INNER (cmode);
2771 ibitsize = GET_MODE_BITSIZE (imode);
2772
2773 /* For MEMs simplify_gen_subreg may generate an invalid new address
2774 because, e.g., the original address is considered mode-dependent
2775 by the target, which restricts simplify_subreg from invoking
2776 adjust_address_nv. Instead of preparing fallback support for an
2777 invalid address, we call adjust_address_nv directly. */
2778 if (MEM_P (cplx))
2779 {
2780 emit_move_insn (adjust_address_nv (cplx, imode,
2781 imag_p ? GET_MODE_SIZE (imode) : 0),
2782 val);
2783 return;
2784 }
2785
2786 /* If the sub-object is at least word sized, then we know that subregging
2787 will work. This special case is important, since store_bit_field
2788 wants to operate on integer modes, and there's rarely an OImode to
2789 correspond to TCmode. */
2790 if (ibitsize >= BITS_PER_WORD
2791 /* For hard regs we have exact predicates. Assume we can split
2792 the original object if it spans an even number of hard regs.
2793 This special case is important for SCmode on 64-bit platforms
2794 where the natural size of floating-point regs is 32-bit. */
2795 || (REG_P (cplx)
2796 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2797 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2798 {
2799 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2800 imag_p ? GET_MODE_SIZE (imode) : 0);
2801 if (part)
2802 {
2803 emit_move_insn (part, val);
2804 return;
2805 }
2806 else
2807 /* simplify_gen_subreg may fail for sub-word MEMs. */
2808 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2809 }
2810
2811 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2812 }
2813
2814 /* Extract one of the components of the complex value CPLX. Extract the
2815 real part if IMAG_P is false, and the imaginary part if it's true. */
2816
2817 static rtx
2818 read_complex_part (rtx cplx, bool imag_p)
2819 {
2820 enum machine_mode cmode, imode;
2821 unsigned ibitsize;
2822
2823 if (GET_CODE (cplx) == CONCAT)
2824 return XEXP (cplx, imag_p);
2825
2826 cmode = GET_MODE (cplx);
2827 imode = GET_MODE_INNER (cmode);
2828 ibitsize = GET_MODE_BITSIZE (imode);
2829
2830 /* Special case reads from complex constants that got spilled to memory. */
2831 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2832 {
2833 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2834 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2835 {
2836 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2837 if (CONSTANT_CLASS_P (part))
2838 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2839 }
2840 }
2841
2842 /* For MEMs simplify_gen_subreg may generate an invalid new address
2843 because, e.g., the original address is considered mode-dependent
2844 by the target, which restricts simplify_subreg from invoking
2845 adjust_address_nv. Instead of preparing fallback support for an
2846 invalid address, we call adjust_address_nv directly. */
2847 if (MEM_P (cplx))
2848 return adjust_address_nv (cplx, imode,
2849 imag_p ? GET_MODE_SIZE (imode) : 0);
2850
2851 /* If the sub-object is at least word sized, then we know that subregging
2852 will work. This special case is important, since extract_bit_field
2853 wants to operate on integer modes, and there's rarely an OImode to
2854 correspond to TCmode. */
2855 if (ibitsize >= BITS_PER_WORD
2856 /* For hard regs we have exact predicates. Assume we can split
2857 the original object if it spans an even number of hard regs.
2858 This special case is important for SCmode on 64-bit platforms
2859 where the natural size of floating-point regs is 32-bit. */
2860 || (REG_P (cplx)
2861 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2862 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2863 {
2864 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2865 imag_p ? GET_MODE_SIZE (imode) : 0);
2866 if (ret)
2867 return ret;
2868 else
2869 /* simplify_gen_subreg may fail for sub-word MEMs. */
2870 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2871 }
2872
2873 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2874 true, false, NULL_RTX, imode, imode);
2875 }
2876 \f
2877 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2878 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2879 represented in NEW_MODE. If FORCE is true, this will never happen, as
2880 we'll force-create a SUBREG if needed. */
2881
2882 static rtx
2883 emit_move_change_mode (enum machine_mode new_mode,
2884 enum machine_mode old_mode, rtx x, bool force)
2885 {
2886 rtx ret;
2887
2888 if (push_operand (x, GET_MODE (x)))
2889 {
2890 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2891 MEM_COPY_ATTRIBUTES (ret, x);
2892 }
2893 else if (MEM_P (x))
2894 {
2895 /* We don't have to worry about changing the address since the
2896 size in bytes is supposed to be the same. */
2897 if (reload_in_progress)
2898 {
2899 /* Copy the MEM to change the mode and move any
2900 substitutions from the old MEM to the new one. */
2901 ret = adjust_address_nv (x, new_mode, 0);
2902 copy_replacements (x, ret);
2903 }
2904 else
2905 ret = adjust_address (x, new_mode, 0);
2906 }
2907 else
2908 {
2909 /* Note that we do want simplify_subreg's behavior of validating
2910 that the new mode is ok for a hard register. If we were to use
2911 simplify_gen_subreg, we would create the subreg, but would
2912 probably run into the target not being able to implement it. */
2913 /* Except, of course, when FORCE is true, when this is exactly what
2914 we want. Which is needed for CCmodes on some targets. */
2915 if (force)
2916 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
2917 else
2918 ret = simplify_subreg (new_mode, x, old_mode, 0);
2919 }
2920
2921 return ret;
2922 }
2923
2924 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
2925 an integer mode of the same size as MODE. Returns the instruction
2926 emitted, or NULL if such a move could not be generated. */
2927
2928 static rtx
2929 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
2930 {
2931 enum machine_mode imode;
2932 enum insn_code code;
2933
2934 /* There must exist a mode of the exact size we require. */
2935 imode = int_mode_for_mode (mode);
2936 if (imode == BLKmode)
2937 return NULL_RTX;
2938
2939 /* The target must support moves in this mode. */
2940 code = optab_handler (mov_optab, imode);
2941 if (code == CODE_FOR_nothing)
2942 return NULL_RTX;
2943
2944 x = emit_move_change_mode (imode, mode, x, force);
2945 if (x == NULL_RTX)
2946 return NULL_RTX;
2947 y = emit_move_change_mode (imode, mode, y, force);
2948 if (y == NULL_RTX)
2949 return NULL_RTX;
2950 return emit_insn (GEN_FCN (code) (x, y));
2951 }
2952
2953 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
2954 Return an equivalent MEM that does not use an auto-increment. */
2955
2956 static rtx
2957 emit_move_resolve_push (enum machine_mode mode, rtx x)
2958 {
2959 enum rtx_code code = GET_CODE (XEXP (x, 0));
2960 HOST_WIDE_INT adjust;
2961 rtx temp;
2962
2963 adjust = GET_MODE_SIZE (mode);
2964 #ifdef PUSH_ROUNDING
2965 adjust = PUSH_ROUNDING (adjust);
2966 #endif
2967 if (code == PRE_DEC || code == POST_DEC)
2968 adjust = -adjust;
2969 else if (code == PRE_MODIFY || code == POST_MODIFY)
2970 {
2971 rtx expr = XEXP (XEXP (x, 0), 1);
2972 HOST_WIDE_INT val;
2973
2974 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
2975 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
2976 val = INTVAL (XEXP (expr, 1));
2977 if (GET_CODE (expr) == MINUS)
2978 val = -val;
2979 gcc_assert (adjust == val || adjust == -val);
2980 adjust = val;
2981 }
2982
2983 /* Do not use anti_adjust_stack, since we don't want to update
2984 stack_pointer_delta. */
2985 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
2986 GEN_INT (adjust), stack_pointer_rtx,
2987 0, OPTAB_LIB_WIDEN);
2988 if (temp != stack_pointer_rtx)
2989 emit_move_insn (stack_pointer_rtx, temp);
2990
2991 switch (code)
2992 {
2993 case PRE_INC:
2994 case PRE_DEC:
2995 case PRE_MODIFY:
2996 temp = stack_pointer_rtx;
2997 break;
2998 case POST_INC:
2999 case POST_DEC:
3000 case POST_MODIFY:
3001 temp = plus_constant (stack_pointer_rtx, -adjust);
3002 break;
3003 default:
3004 gcc_unreachable ();
3005 }
3006
3007 return replace_equiv_address (x, temp);
3008 }
3009
3010 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3011 X is known to satisfy push_operand, and MODE is known to be complex.
3012 Returns the last instruction emitted. */
3013
3014 rtx
3015 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3016 {
3017 enum machine_mode submode = GET_MODE_INNER (mode);
3018 bool imag_first;
3019
3020 #ifdef PUSH_ROUNDING
3021 unsigned int submodesize = GET_MODE_SIZE (submode);
3022
3023 /* In case we output to the stack, but the size is smaller than the
3024 machine can push exactly, we need to use move instructions. */
3025 if (PUSH_ROUNDING (submodesize) != submodesize)
3026 {
3027 x = emit_move_resolve_push (mode, x);
3028 return emit_move_insn (x, y);
3029 }
3030 #endif
3031
3032 /* Note that the real part always precedes the imag part in memory
3033 regardless of machine's endianness. */
3034 switch (GET_CODE (XEXP (x, 0)))
3035 {
3036 case PRE_DEC:
3037 case POST_DEC:
3038 imag_first = true;
3039 break;
3040 case PRE_INC:
3041 case POST_INC:
3042 imag_first = false;
3043 break;
3044 default:
3045 gcc_unreachable ();
3046 }
3047
3048 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3049 read_complex_part (y, imag_first));
3050 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3051 read_complex_part (y, !imag_first));
3052 }
3053
3054 /* A subroutine of emit_move_complex. Perform the move from Y to X
3055 via two moves of the parts. Returns the last instruction emitted. */
3056
3057 rtx
3058 emit_move_complex_parts (rtx x, rtx y)
3059 {
3060 /* Show the output dies here. This is necessary for SUBREGs
3061 of pseudos since we cannot track their lifetimes correctly;
3062 hard regs shouldn't appear here except as return values. */
3063 if (!reload_completed && !reload_in_progress
3064 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3065 emit_clobber (x);
3066
3067 write_complex_part (x, read_complex_part (y, false), false);
3068 write_complex_part (x, read_complex_part (y, true), true);
3069
3070 return get_last_insn ();
3071 }
3072
3073 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3074 MODE is known to be complex. Returns the last instruction emitted. */
3075
3076 static rtx
3077 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3078 {
3079 bool try_int;
3080
3081 /* Need to take special care for pushes, to maintain proper ordering
3082 of the data, and possibly extra padding. */
3083 if (push_operand (x, mode))
3084 return emit_move_complex_push (mode, x, y);
3085
3086 /* See if we can coerce the target into moving both values at once. */
3087
3088 /* Move floating point as parts. */
3089 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3090 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3091 try_int = false;
3092 /* Not possible if the values are inherently not adjacent. */
3093 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3094 try_int = false;
3095 /* Is possible if both are registers (or subregs of registers). */
3096 else if (register_operand (x, mode) && register_operand (y, mode))
3097 try_int = true;
3098 /* If one of the operands is a memory, and alignment constraints
3099 are friendly enough, we may be able to do combined memory operations.
3100 We do not attempt this if Y is a constant because that combination is
3101 usually better with the by-parts thing below. */
3102 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3103 && (!STRICT_ALIGNMENT
3104 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3105 try_int = true;
3106 else
3107 try_int = false;
3108
3109 if (try_int)
3110 {
3111 rtx ret;
3112
3113 /* For memory to memory moves, optimal behavior can be had with the
3114 existing block move logic. */
3115 if (MEM_P (x) && MEM_P (y))
3116 {
3117 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3118 BLOCK_OP_NO_LIBCALL);
3119 return get_last_insn ();
3120 }
3121
3122 ret = emit_move_via_integer (mode, x, y, true);
3123 if (ret)
3124 return ret;
3125 }
3126
3127 return emit_move_complex_parts (x, y);
3128 }
3129
3130 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3131 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3132
3133 static rtx
3134 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3135 {
3136 rtx ret;
3137
3138 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3139 if (mode != CCmode)
3140 {
3141 enum insn_code code = optab_handler (mov_optab, CCmode);
3142 if (code != CODE_FOR_nothing)
3143 {
3144 x = emit_move_change_mode (CCmode, mode, x, true);
3145 y = emit_move_change_mode (CCmode, mode, y, true);
3146 return emit_insn (GEN_FCN (code) (x, y));
3147 }
3148 }
3149
3150 /* Otherwise, find the MODE_INT mode of the same width. */
3151 ret = emit_move_via_integer (mode, x, y, false);
3152 gcc_assert (ret != NULL);
3153 return ret;
3154 }
3155
3156 /* Return true if word I of OP lies entirely in the
3157 undefined bits of a paradoxical subreg. */
3158
3159 static bool
3160 undefined_operand_subword_p (const_rtx op, int i)
3161 {
3162 enum machine_mode innermode, innermostmode;
3163 int offset;
3164 if (GET_CODE (op) != SUBREG)
3165 return false;
3166 innermode = GET_MODE (op);
3167 innermostmode = GET_MODE (SUBREG_REG (op));
3168 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3169 /* The SUBREG_BYTE represents offset, as if the value were stored in
3170 memory, except for a paradoxical subreg where we define
3171 SUBREG_BYTE to be 0; undo this exception as in
3172 simplify_subreg. */
3173 if (SUBREG_BYTE (op) == 0
3174 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3175 {
3176 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3177 if (WORDS_BIG_ENDIAN)
3178 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3179 if (BYTES_BIG_ENDIAN)
3180 offset += difference % UNITS_PER_WORD;
3181 }
3182 if (offset >= GET_MODE_SIZE (innermostmode)
3183 || offset <= -GET_MODE_SIZE (word_mode))
3184 return true;
3185 return false;
3186 }
3187
3188 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3189 MODE is any multi-word or full-word mode that lacks a move_insn
3190 pattern. Note that you will get better code if you define such
3191 patterns, even if they must turn into multiple assembler instructions. */
3192
3193 static rtx
3194 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3195 {
3196 rtx last_insn = 0;
3197 rtx seq, inner;
3198 bool need_clobber;
3199 int i;
3200
3201 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3202
3203 /* If X is a push on the stack, do the push now and replace
3204 X with a reference to the stack pointer. */
3205 if (push_operand (x, mode))
3206 x = emit_move_resolve_push (mode, x);
3207
3208 /* If we are in reload, see if either operand is a MEM whose address
3209 is scheduled for replacement. */
3210 if (reload_in_progress && MEM_P (x)
3211 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3212 x = replace_equiv_address_nv (x, inner);
3213 if (reload_in_progress && MEM_P (y)
3214 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3215 y = replace_equiv_address_nv (y, inner);
3216
3217 start_sequence ();
3218
3219 need_clobber = false;
3220 for (i = 0;
3221 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3222 i++)
3223 {
3224 rtx xpart = operand_subword (x, i, 1, mode);
3225 rtx ypart;
3226
3227 /* Do not generate code for a move if it would come entirely
3228 from the undefined bits of a paradoxical subreg. */
3229 if (undefined_operand_subword_p (y, i))
3230 continue;
3231
3232 ypart = operand_subword (y, i, 1, mode);
3233
3234 /* If we can't get a part of Y, put Y into memory if it is a
3235 constant. Otherwise, force it into a register. Then we must
3236 be able to get a part of Y. */
3237 if (ypart == 0 && CONSTANT_P (y))
3238 {
3239 y = use_anchored_address (force_const_mem (mode, y));
3240 ypart = operand_subword (y, i, 1, mode);
3241 }
3242 else if (ypart == 0)
3243 ypart = operand_subword_force (y, i, mode);
3244
3245 gcc_assert (xpart && ypart);
3246
3247 need_clobber |= (GET_CODE (xpart) == SUBREG);
3248
3249 last_insn = emit_move_insn (xpart, ypart);
3250 }
3251
3252 seq = get_insns ();
3253 end_sequence ();
3254
3255 /* Show the output dies here. This is necessary for SUBREGs
3256 of pseudos since we cannot track their lifetimes correctly;
3257 hard regs shouldn't appear here except as return values.
3258 We never want to emit such a clobber after reload. */
3259 if (x != y
3260 && ! (reload_in_progress || reload_completed)
3261 && need_clobber != 0)
3262 emit_clobber (x);
3263
3264 emit_insn (seq);
3265
3266 return last_insn;
3267 }
3268
3269 /* Low level part of emit_move_insn.
3270 Called just like emit_move_insn, but assumes X and Y
3271 are basically valid. */
3272
3273 rtx
3274 emit_move_insn_1 (rtx x, rtx y)
3275 {
3276 enum machine_mode mode = GET_MODE (x);
3277 enum insn_code code;
3278
3279 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3280
3281 code = optab_handler (mov_optab, mode);
3282 if (code != CODE_FOR_nothing)
3283 return emit_insn (GEN_FCN (code) (x, y));
3284
3285 /* Expand complex moves by moving real part and imag part. */
3286 if (COMPLEX_MODE_P (mode))
3287 return emit_move_complex (mode, x, y);
3288
3289 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3290 || ALL_FIXED_POINT_MODE_P (mode))
3291 {
3292 rtx result = emit_move_via_integer (mode, x, y, true);
3293
3294 /* If we can't find an integer mode, use multi words. */
3295 if (result)
3296 return result;
3297 else
3298 return emit_move_multi_word (mode, x, y);
3299 }
3300
3301 if (GET_MODE_CLASS (mode) == MODE_CC)
3302 return emit_move_ccmode (mode, x, y);
3303
3304 /* Try using a move pattern for the corresponding integer mode. This is
3305 only safe when simplify_subreg can convert MODE constants into integer
3306 constants. At present, it can only do this reliably if the value
3307 fits within a HOST_WIDE_INT. */
3308 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3309 {
3310 rtx ret = emit_move_via_integer (mode, x, y, false);
3311 if (ret)
3312 return ret;
3313 }
3314
3315 return emit_move_multi_word (mode, x, y);
3316 }
3317
3318 /* Generate code to copy Y into X.
3319 Both Y and X must have the same mode, except that
3320 Y can be a constant with VOIDmode.
3321 This mode cannot be BLKmode; use emit_block_move for that.
3322
3323 Return the last instruction emitted. */
3324
3325 rtx
3326 emit_move_insn (rtx x, rtx y)
3327 {
3328 enum machine_mode mode = GET_MODE (x);
3329 rtx y_cst = NULL_RTX;
3330 rtx last_insn, set;
3331
3332 gcc_assert (mode != BLKmode
3333 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3334
3335 if (CONSTANT_P (y))
3336 {
3337 if (optimize
3338 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3339 && (last_insn = compress_float_constant (x, y)))
3340 return last_insn;
3341
3342 y_cst = y;
3343
3344 if (!targetm.legitimate_constant_p (mode, y))
3345 {
3346 y = force_const_mem (mode, y);
3347
3348 /* If the target's cannot_force_const_mem prevented the spill,
3349 assume that the target's move expanders will also take care
3350 of the non-legitimate constant. */
3351 if (!y)
3352 y = y_cst;
3353 else
3354 y = use_anchored_address (y);
3355 }
3356 }
3357
3358 /* If X or Y are memory references, verify that their addresses are valid
3359 for the machine. */
3360 if (MEM_P (x)
3361 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3362 MEM_ADDR_SPACE (x))
3363 && ! push_operand (x, GET_MODE (x))))
3364 x = validize_mem (x);
3365
3366 if (MEM_P (y)
3367 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3368 MEM_ADDR_SPACE (y)))
3369 y = validize_mem (y);
3370
3371 gcc_assert (mode != BLKmode);
3372
3373 last_insn = emit_move_insn_1 (x, y);
3374
3375 if (y_cst && REG_P (x)
3376 && (set = single_set (last_insn)) != NULL_RTX
3377 && SET_DEST (set) == x
3378 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3379 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3380
3381 return last_insn;
3382 }
3383
3384 /* If Y is representable exactly in a narrower mode, and the target can
3385 perform the extension directly from constant or memory, then emit the
3386 move as an extension. */
3387
3388 static rtx
3389 compress_float_constant (rtx x, rtx y)
3390 {
3391 enum machine_mode dstmode = GET_MODE (x);
3392 enum machine_mode orig_srcmode = GET_MODE (y);
3393 enum machine_mode srcmode;
3394 REAL_VALUE_TYPE r;
3395 int oldcost, newcost;
3396 bool speed = optimize_insn_for_speed_p ();
3397
3398 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3399
3400 if (targetm.legitimate_constant_p (dstmode, y))
3401 oldcost = set_src_cost (y, speed);
3402 else
3403 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3404
3405 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3406 srcmode != orig_srcmode;
3407 srcmode = GET_MODE_WIDER_MODE (srcmode))
3408 {
3409 enum insn_code ic;
3410 rtx trunc_y, last_insn;
3411
3412 /* Skip if the target can't extend this way. */
3413 ic = can_extend_p (dstmode, srcmode, 0);
3414 if (ic == CODE_FOR_nothing)
3415 continue;
3416
3417 /* Skip if the narrowed value isn't exact. */
3418 if (! exact_real_truncate (srcmode, &r))
3419 continue;
3420
3421 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3422
3423 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3424 {
3425 /* Skip if the target needs extra instructions to perform
3426 the extension. */
3427 if (!insn_operand_matches (ic, 1, trunc_y))
3428 continue;
3429 /* This is valid, but may not be cheaper than the original. */
3430 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3431 speed);
3432 if (oldcost < newcost)
3433 continue;
3434 }
3435 else if (float_extend_from_mem[dstmode][srcmode])
3436 {
3437 trunc_y = force_const_mem (srcmode, trunc_y);
3438 /* This is valid, but may not be cheaper than the original. */
3439 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3440 speed);
3441 if (oldcost < newcost)
3442 continue;
3443 trunc_y = validize_mem (trunc_y);
3444 }
3445 else
3446 continue;
3447
3448 /* For CSE's benefit, force the compressed constant pool entry
3449 into a new pseudo. This constant may be used in different modes,
3450 and if not, combine will put things back together for us. */
3451 trunc_y = force_reg (srcmode, trunc_y);
3452 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3453 last_insn = get_last_insn ();
3454
3455 if (REG_P (x))
3456 set_unique_reg_note (last_insn, REG_EQUAL, y);
3457
3458 return last_insn;
3459 }
3460
3461 return NULL_RTX;
3462 }
3463 \f
3464 /* Pushing data onto the stack. */
3465
3466 /* Push a block of length SIZE (perhaps variable)
3467 and return an rtx to address the beginning of the block.
3468 The value may be virtual_outgoing_args_rtx.
3469
3470 EXTRA is the number of bytes of padding to push in addition to SIZE.
3471 BELOW nonzero means this padding comes at low addresses;
3472 otherwise, the padding comes at high addresses. */
3473
3474 rtx
3475 push_block (rtx size, int extra, int below)
3476 {
3477 rtx temp;
3478
3479 size = convert_modes (Pmode, ptr_mode, size, 1);
3480 if (CONSTANT_P (size))
3481 anti_adjust_stack (plus_constant (size, extra));
3482 else if (REG_P (size) && extra == 0)
3483 anti_adjust_stack (size);
3484 else
3485 {
3486 temp = copy_to_mode_reg (Pmode, size);
3487 if (extra != 0)
3488 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3489 temp, 0, OPTAB_LIB_WIDEN);
3490 anti_adjust_stack (temp);
3491 }
3492
3493 #ifndef STACK_GROWS_DOWNWARD
3494 if (0)
3495 #else
3496 if (1)
3497 #endif
3498 {
3499 temp = virtual_outgoing_args_rtx;
3500 if (extra != 0 && below)
3501 temp = plus_constant (temp, extra);
3502 }
3503 else
3504 {
3505 if (CONST_INT_P (size))
3506 temp = plus_constant (virtual_outgoing_args_rtx,
3507 -INTVAL (size) - (below ? 0 : extra));
3508 else if (extra != 0 && !below)
3509 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3510 negate_rtx (Pmode, plus_constant (size, extra)));
3511 else
3512 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3513 negate_rtx (Pmode, size));
3514 }
3515
3516 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3517 }
3518
3519 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3520
3521 static rtx
3522 mem_autoinc_base (rtx mem)
3523 {
3524 if (MEM_P (mem))
3525 {
3526 rtx addr = XEXP (mem, 0);
3527 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3528 return XEXP (addr, 0);
3529 }
3530 return NULL;
3531 }
3532
3533 /* A utility routine used here, in reload, and in try_split. The insns
3534 after PREV up to and including LAST are known to adjust the stack,
3535 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3536 placing notes as appropriate. PREV may be NULL, indicating the
3537 entire insn sequence prior to LAST should be scanned.
3538
3539 The set of allowed stack pointer modifications is small:
3540 (1) One or more auto-inc style memory references (aka pushes),
3541 (2) One or more addition/subtraction with the SP as destination,
3542 (3) A single move insn with the SP as destination,
3543 (4) A call_pop insn.
3544
3545 Insns in the sequence that do not modify the SP are ignored.
3546
3547 The return value is the amount of adjustment that can be trivially
3548 verified, via immediate operand or auto-inc. If the adjustment
3549 cannot be trivially extracted, the return value is INT_MIN. */
3550
3551 int
3552 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3553 {
3554 int args_size = end_args_size;
3555 bool saw_unknown = false;
3556 rtx insn;
3557
3558 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3559 {
3560 rtx dest, set, pat;
3561 HOST_WIDE_INT this_delta = 0;
3562 int i;
3563
3564 if (!NONDEBUG_INSN_P (insn))
3565 continue;
3566 pat = PATTERN (insn);
3567 set = NULL;
3568
3569 /* Look for a call_pop pattern. */
3570 if (CALL_P (insn))
3571 {
3572 /* We have to allow non-call_pop patterns for the case
3573 of emit_single_push_insn of a TLS address. */
3574 if (GET_CODE (pat) != PARALLEL)
3575 continue;
3576
3577 /* All call_pop have a stack pointer adjust in the parallel.
3578 The call itself is always first, and the stack adjust is
3579 usually last, so search from the end. */
3580 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3581 {
3582 set = XVECEXP (pat, 0, i);
3583 if (GET_CODE (set) != SET)
3584 continue;
3585 dest = SET_DEST (set);
3586 if (dest == stack_pointer_rtx)
3587 break;
3588 }
3589 /* We'd better have found the stack pointer adjust. */
3590 if (i == 0)
3591 continue;
3592 /* Fall through to process the extracted SET and DEST
3593 as if it was a standalone insn. */
3594 }
3595 else if (GET_CODE (pat) == SET)
3596 set = pat;
3597 else if ((set = single_set (insn)) != NULL)
3598 ;
3599 else if (GET_CODE (pat) == PARALLEL)
3600 {
3601 /* ??? Some older ports use a parallel with a stack adjust
3602 and a store for a PUSH_ROUNDING pattern, rather than a
3603 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3604 /* ??? See h8300 and m68k, pushqi1. */
3605 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3606 {
3607 set = XVECEXP (pat, 0, i);
3608 if (GET_CODE (set) != SET)
3609 continue;
3610 dest = SET_DEST (set);
3611 if (dest == stack_pointer_rtx)
3612 break;
3613
3614 /* We do not expect an auto-inc of the sp in the parallel. */
3615 gcc_checking_assert (mem_autoinc_base (dest)
3616 != stack_pointer_rtx);
3617 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3618 != stack_pointer_rtx);
3619 }
3620 if (i < 0)
3621 continue;
3622 }
3623 else
3624 continue;
3625 dest = SET_DEST (set);
3626
3627 /* Look for direct modifications of the stack pointer. */
3628 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3629 {
3630 gcc_assert (!saw_unknown);
3631 /* Look for a trivial adjustment, otherwise assume nothing. */
3632 /* Note that the SPU restore_stack_block pattern refers to
3633 the stack pointer in V4SImode. Consider that non-trivial. */
3634 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3635 && GET_CODE (SET_SRC (set)) == PLUS
3636 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3637 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3638 this_delta = INTVAL (XEXP (SET_SRC (set), 1));
3639 /* ??? Reload can generate no-op moves, which will be cleaned
3640 up later. Recognize it and continue searching. */
3641 else if (rtx_equal_p (dest, SET_SRC (set)))
3642 this_delta = 0;
3643 else
3644 saw_unknown = true;
3645 }
3646 /* Otherwise only think about autoinc patterns. */
3647 else if (mem_autoinc_base (dest) == stack_pointer_rtx)
3648 {
3649 rtx addr = XEXP (dest, 0);
3650 gcc_assert (!saw_unknown);
3651 switch (GET_CODE (addr))
3652 {
3653 case PRE_INC:
3654 case POST_INC:
3655 this_delta = GET_MODE_SIZE (GET_MODE (dest));
3656 break;
3657 case PRE_DEC:
3658 case POST_DEC:
3659 this_delta = -GET_MODE_SIZE (GET_MODE (dest));
3660 break;
3661 case PRE_MODIFY:
3662 case POST_MODIFY:
3663 addr = XEXP (addr, 1);
3664 gcc_assert (GET_CODE (addr) == PLUS);
3665 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3666 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3667 this_delta = INTVAL (XEXP (addr, 1));
3668 break;
3669 default:
3670 gcc_unreachable ();
3671 }
3672 }
3673 else
3674 continue;
3675
3676 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3677 #ifdef STACK_GROWS_DOWNWARD
3678 this_delta = -this_delta;
3679 #endif
3680 args_size -= this_delta;
3681 }
3682
3683 return saw_unknown ? INT_MIN : args_size;
3684 }
3685
3686 #ifdef PUSH_ROUNDING
3687 /* Emit single push insn. */
3688
3689 static void
3690 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3691 {
3692 rtx dest_addr;
3693 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3694 rtx dest;
3695 enum insn_code icode;
3696
3697 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3698 /* If there is push pattern, use it. Otherwise try old way of throwing
3699 MEM representing push operation to move expander. */
3700 icode = optab_handler (push_optab, mode);
3701 if (icode != CODE_FOR_nothing)
3702 {
3703 struct expand_operand ops[1];
3704
3705 create_input_operand (&ops[0], x, mode);
3706 if (maybe_expand_insn (icode, 1, ops))
3707 return;
3708 }
3709 if (GET_MODE_SIZE (mode) == rounded_size)
3710 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3711 /* If we are to pad downward, adjust the stack pointer first and
3712 then store X into the stack location using an offset. This is
3713 because emit_move_insn does not know how to pad; it does not have
3714 access to type. */
3715 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3716 {
3717 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3718 HOST_WIDE_INT offset;
3719
3720 emit_move_insn (stack_pointer_rtx,
3721 expand_binop (Pmode,
3722 #ifdef STACK_GROWS_DOWNWARD
3723 sub_optab,
3724 #else
3725 add_optab,
3726 #endif
3727 stack_pointer_rtx,
3728 GEN_INT (rounded_size),
3729 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3730
3731 offset = (HOST_WIDE_INT) padding_size;
3732 #ifdef STACK_GROWS_DOWNWARD
3733 if (STACK_PUSH_CODE == POST_DEC)
3734 /* We have already decremented the stack pointer, so get the
3735 previous value. */
3736 offset += (HOST_WIDE_INT) rounded_size;
3737 #else
3738 if (STACK_PUSH_CODE == POST_INC)
3739 /* We have already incremented the stack pointer, so get the
3740 previous value. */
3741 offset -= (HOST_WIDE_INT) rounded_size;
3742 #endif
3743 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3744 }
3745 else
3746 {
3747 #ifdef STACK_GROWS_DOWNWARD
3748 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3749 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3750 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3751 #else
3752 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3753 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3754 GEN_INT (rounded_size));
3755 #endif
3756 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3757 }
3758
3759 dest = gen_rtx_MEM (mode, dest_addr);
3760
3761 if (type != 0)
3762 {
3763 set_mem_attributes (dest, type, 1);
3764
3765 if (flag_optimize_sibling_calls)
3766 /* Function incoming arguments may overlap with sibling call
3767 outgoing arguments and we cannot allow reordering of reads
3768 from function arguments with stores to outgoing arguments
3769 of sibling calls. */
3770 set_mem_alias_set (dest, 0);
3771 }
3772 emit_move_insn (dest, x);
3773 }
3774
3775 /* Emit and annotate a single push insn. */
3776
3777 static void
3778 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3779 {
3780 int delta, old_delta = stack_pointer_delta;
3781 rtx prev = get_last_insn ();
3782 rtx last;
3783
3784 emit_single_push_insn_1 (mode, x, type);
3785
3786 last = get_last_insn ();
3787
3788 /* Notice the common case where we emitted exactly one insn. */
3789 if (PREV_INSN (last) == prev)
3790 {
3791 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3792 return;
3793 }
3794
3795 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3796 gcc_assert (delta == INT_MIN || delta == old_delta);
3797 }
3798 #endif
3799
3800 /* Generate code to push X onto the stack, assuming it has mode MODE and
3801 type TYPE.
3802 MODE is redundant except when X is a CONST_INT (since they don't
3803 carry mode info).
3804 SIZE is an rtx for the size of data to be copied (in bytes),
3805 needed only if X is BLKmode.
3806
3807 ALIGN (in bits) is maximum alignment we can assume.
3808
3809 If PARTIAL and REG are both nonzero, then copy that many of the first
3810 bytes of X into registers starting with REG, and push the rest of X.
3811 The amount of space pushed is decreased by PARTIAL bytes.
3812 REG must be a hard register in this case.
3813 If REG is zero but PARTIAL is not, take any all others actions for an
3814 argument partially in registers, but do not actually load any
3815 registers.
3816
3817 EXTRA is the amount in bytes of extra space to leave next to this arg.
3818 This is ignored if an argument block has already been allocated.
3819
3820 On a machine that lacks real push insns, ARGS_ADDR is the address of
3821 the bottom of the argument block for this call. We use indexing off there
3822 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3823 argument block has not been preallocated.
3824
3825 ARGS_SO_FAR is the size of args previously pushed for this call.
3826
3827 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3828 for arguments passed in registers. If nonzero, it will be the number
3829 of bytes required. */
3830
3831 void
3832 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3833 unsigned int align, int partial, rtx reg, int extra,
3834 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3835 rtx alignment_pad)
3836 {
3837 rtx xinner;
3838 enum direction stack_direction
3839 #ifdef STACK_GROWS_DOWNWARD
3840 = downward;
3841 #else
3842 = upward;
3843 #endif
3844
3845 /* Decide where to pad the argument: `downward' for below,
3846 `upward' for above, or `none' for don't pad it.
3847 Default is below for small data on big-endian machines; else above. */
3848 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3849
3850 /* Invert direction if stack is post-decrement.
3851 FIXME: why? */
3852 if (STACK_PUSH_CODE == POST_DEC)
3853 if (where_pad != none)
3854 where_pad = (where_pad == downward ? upward : downward);
3855
3856 xinner = x;
3857
3858 if (mode == BLKmode
3859 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3860 {
3861 /* Copy a block into the stack, entirely or partially. */
3862
3863 rtx temp;
3864 int used;
3865 int offset;
3866 int skip;
3867
3868 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3869 used = partial - offset;
3870
3871 if (mode != BLKmode)
3872 {
3873 /* A value is to be stored in an insufficiently aligned
3874 stack slot; copy via a suitably aligned slot if
3875 necessary. */
3876 size = GEN_INT (GET_MODE_SIZE (mode));
3877 if (!MEM_P (xinner))
3878 {
3879 temp = assign_temp (type, 0, 1, 1);
3880 emit_move_insn (temp, xinner);
3881 xinner = temp;
3882 }
3883 }
3884
3885 gcc_assert (size);
3886
3887 /* USED is now the # of bytes we need not copy to the stack
3888 because registers will take care of them. */
3889
3890 if (partial != 0)
3891 xinner = adjust_address (xinner, BLKmode, used);
3892
3893 /* If the partial register-part of the arg counts in its stack size,
3894 skip the part of stack space corresponding to the registers.
3895 Otherwise, start copying to the beginning of the stack space,
3896 by setting SKIP to 0. */
3897 skip = (reg_parm_stack_space == 0) ? 0 : used;
3898
3899 #ifdef PUSH_ROUNDING
3900 /* Do it with several push insns if that doesn't take lots of insns
3901 and if there is no difficulty with push insns that skip bytes
3902 on the stack for alignment purposes. */
3903 if (args_addr == 0
3904 && PUSH_ARGS
3905 && CONST_INT_P (size)
3906 && skip == 0
3907 && MEM_ALIGN (xinner) >= align
3908 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
3909 /* Here we avoid the case of a structure whose weak alignment
3910 forces many pushes of a small amount of data,
3911 and such small pushes do rounding that causes trouble. */
3912 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
3913 || align >= BIGGEST_ALIGNMENT
3914 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
3915 == (align / BITS_PER_UNIT)))
3916 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
3917 {
3918 /* Push padding now if padding above and stack grows down,
3919 or if padding below and stack grows up.
3920 But if space already allocated, this has already been done. */
3921 if (extra && args_addr == 0
3922 && where_pad != none && where_pad != stack_direction)
3923 anti_adjust_stack (GEN_INT (extra));
3924
3925 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
3926 }
3927 else
3928 #endif /* PUSH_ROUNDING */
3929 {
3930 rtx target;
3931
3932 /* Otherwise make space on the stack and copy the data
3933 to the address of that space. */
3934
3935 /* Deduct words put into registers from the size we must copy. */
3936 if (partial != 0)
3937 {
3938 if (CONST_INT_P (size))
3939 size = GEN_INT (INTVAL (size) - used);
3940 else
3941 size = expand_binop (GET_MODE (size), sub_optab, size,
3942 GEN_INT (used), NULL_RTX, 0,
3943 OPTAB_LIB_WIDEN);
3944 }
3945
3946 /* Get the address of the stack space.
3947 In this case, we do not deal with EXTRA separately.
3948 A single stack adjust will do. */
3949 if (! args_addr)
3950 {
3951 temp = push_block (size, extra, where_pad == downward);
3952 extra = 0;
3953 }
3954 else if (CONST_INT_P (args_so_far))
3955 temp = memory_address (BLKmode,
3956 plus_constant (args_addr,
3957 skip + INTVAL (args_so_far)));
3958 else
3959 temp = memory_address (BLKmode,
3960 plus_constant (gen_rtx_PLUS (Pmode,
3961 args_addr,
3962 args_so_far),
3963 skip));
3964
3965 if (!ACCUMULATE_OUTGOING_ARGS)
3966 {
3967 /* If the source is referenced relative to the stack pointer,
3968 copy it to another register to stabilize it. We do not need
3969 to do this if we know that we won't be changing sp. */
3970
3971 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
3972 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
3973 temp = copy_to_reg (temp);
3974 }
3975
3976 target = gen_rtx_MEM (BLKmode, temp);
3977
3978 /* We do *not* set_mem_attributes here, because incoming arguments
3979 may overlap with sibling call outgoing arguments and we cannot
3980 allow reordering of reads from function arguments with stores
3981 to outgoing arguments of sibling calls. We do, however, want
3982 to record the alignment of the stack slot. */
3983 /* ALIGN may well be better aligned than TYPE, e.g. due to
3984 PARM_BOUNDARY. Assume the caller isn't lying. */
3985 set_mem_align (target, align);
3986
3987 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
3988 }
3989 }
3990 else if (partial > 0)
3991 {
3992 /* Scalar partly in registers. */
3993
3994 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
3995 int i;
3996 int not_stack;
3997 /* # bytes of start of argument
3998 that we must make space for but need not store. */
3999 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4000 int args_offset = INTVAL (args_so_far);
4001 int skip;
4002
4003 /* Push padding now if padding above and stack grows down,
4004 or if padding below and stack grows up.
4005 But if space already allocated, this has already been done. */
4006 if (extra && args_addr == 0
4007 && where_pad != none && where_pad != stack_direction)
4008 anti_adjust_stack (GEN_INT (extra));
4009
4010 /* If we make space by pushing it, we might as well push
4011 the real data. Otherwise, we can leave OFFSET nonzero
4012 and leave the space uninitialized. */
4013 if (args_addr == 0)
4014 offset = 0;
4015
4016 /* Now NOT_STACK gets the number of words that we don't need to
4017 allocate on the stack. Convert OFFSET to words too. */
4018 not_stack = (partial - offset) / UNITS_PER_WORD;
4019 offset /= UNITS_PER_WORD;
4020
4021 /* If the partial register-part of the arg counts in its stack size,
4022 skip the part of stack space corresponding to the registers.
4023 Otherwise, start copying to the beginning of the stack space,
4024 by setting SKIP to 0. */
4025 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4026
4027 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4028 x = validize_mem (force_const_mem (mode, x));
4029
4030 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4031 SUBREGs of such registers are not allowed. */
4032 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4033 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4034 x = copy_to_reg (x);
4035
4036 /* Loop over all the words allocated on the stack for this arg. */
4037 /* We can do it by words, because any scalar bigger than a word
4038 has a size a multiple of a word. */
4039 #ifndef PUSH_ARGS_REVERSED
4040 for (i = not_stack; i < size; i++)
4041 #else
4042 for (i = size - 1; i >= not_stack; i--)
4043 #endif
4044 if (i >= not_stack + offset)
4045 emit_push_insn (operand_subword_force (x, i, mode),
4046 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4047 0, args_addr,
4048 GEN_INT (args_offset + ((i - not_stack + skip)
4049 * UNITS_PER_WORD)),
4050 reg_parm_stack_space, alignment_pad);
4051 }
4052 else
4053 {
4054 rtx addr;
4055 rtx dest;
4056
4057 /* Push padding now if padding above and stack grows down,
4058 or if padding below and stack grows up.
4059 But if space already allocated, this has already been done. */
4060 if (extra && args_addr == 0
4061 && where_pad != none && where_pad != stack_direction)
4062 anti_adjust_stack (GEN_INT (extra));
4063
4064 #ifdef PUSH_ROUNDING
4065 if (args_addr == 0 && PUSH_ARGS)
4066 emit_single_push_insn (mode, x, type);
4067 else
4068 #endif
4069 {
4070 if (CONST_INT_P (args_so_far))
4071 addr
4072 = memory_address (mode,
4073 plus_constant (args_addr,
4074 INTVAL (args_so_far)));
4075 else
4076 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4077 args_so_far));
4078 dest = gen_rtx_MEM (mode, addr);
4079
4080 /* We do *not* set_mem_attributes here, because incoming arguments
4081 may overlap with sibling call outgoing arguments and we cannot
4082 allow reordering of reads from function arguments with stores
4083 to outgoing arguments of sibling calls. We do, however, want
4084 to record the alignment of the stack slot. */
4085 /* ALIGN may well be better aligned than TYPE, e.g. due to
4086 PARM_BOUNDARY. Assume the caller isn't lying. */
4087 set_mem_align (dest, align);
4088
4089 emit_move_insn (dest, x);
4090 }
4091 }
4092
4093 /* If part should go in registers, copy that part
4094 into the appropriate registers. Do this now, at the end,
4095 since mem-to-mem copies above may do function calls. */
4096 if (partial > 0 && reg != 0)
4097 {
4098 /* Handle calls that pass values in multiple non-contiguous locations.
4099 The Irix 6 ABI has examples of this. */
4100 if (GET_CODE (reg) == PARALLEL)
4101 emit_group_load (reg, x, type, -1);
4102 else
4103 {
4104 gcc_assert (partial % UNITS_PER_WORD == 0);
4105 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4106 }
4107 }
4108
4109 if (extra && args_addr == 0 && where_pad == stack_direction)
4110 anti_adjust_stack (GEN_INT (extra));
4111
4112 if (alignment_pad && args_addr == 0)
4113 anti_adjust_stack (alignment_pad);
4114 }
4115 \f
4116 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4117 operations. */
4118
4119 static rtx
4120 get_subtarget (rtx x)
4121 {
4122 return (optimize
4123 || x == 0
4124 /* Only registers can be subtargets. */
4125 || !REG_P (x)
4126 /* Don't use hard regs to avoid extending their life. */
4127 || REGNO (x) < FIRST_PSEUDO_REGISTER
4128 ? 0 : x);
4129 }
4130
4131 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4132 FIELD is a bitfield. Returns true if the optimization was successful,
4133 and there's nothing else to do. */
4134
4135 static bool
4136 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4137 unsigned HOST_WIDE_INT bitpos,
4138 unsigned HOST_WIDE_INT bitregion_start,
4139 unsigned HOST_WIDE_INT bitregion_end,
4140 enum machine_mode mode1, rtx str_rtx,
4141 tree to, tree src)
4142 {
4143 enum machine_mode str_mode = GET_MODE (str_rtx);
4144 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4145 tree op0, op1;
4146 rtx value, result;
4147 optab binop;
4148 gimple srcstmt;
4149 enum tree_code code;
4150
4151 if (mode1 != VOIDmode
4152 || bitsize >= BITS_PER_WORD
4153 || str_bitsize > BITS_PER_WORD
4154 || TREE_SIDE_EFFECTS (to)
4155 || TREE_THIS_VOLATILE (to))
4156 return false;
4157
4158 STRIP_NOPS (src);
4159 if (TREE_CODE (src) != SSA_NAME)
4160 return false;
4161 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4162 return false;
4163
4164 srcstmt = get_gimple_for_ssa_name (src);
4165 if (!srcstmt
4166 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4167 return false;
4168
4169 code = gimple_assign_rhs_code (srcstmt);
4170
4171 op0 = gimple_assign_rhs1 (srcstmt);
4172
4173 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4174 to find its initialization. Hopefully the initialization will
4175 be from a bitfield load. */
4176 if (TREE_CODE (op0) == SSA_NAME)
4177 {
4178 gimple op0stmt = get_gimple_for_ssa_name (op0);
4179
4180 /* We want to eventually have OP0 be the same as TO, which
4181 should be a bitfield. */
4182 if (!op0stmt
4183 || !is_gimple_assign (op0stmt)
4184 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4185 return false;
4186 op0 = gimple_assign_rhs1 (op0stmt);
4187 }
4188
4189 op1 = gimple_assign_rhs2 (srcstmt);
4190
4191 if (!operand_equal_p (to, op0, 0))
4192 return false;
4193
4194 if (MEM_P (str_rtx))
4195 {
4196 unsigned HOST_WIDE_INT offset1;
4197
4198 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4199 str_mode = word_mode;
4200 str_mode = get_best_mode (bitsize, bitpos,
4201 bitregion_start, bitregion_end,
4202 MEM_ALIGN (str_rtx), str_mode, 0);
4203 if (str_mode == VOIDmode)
4204 return false;
4205 str_bitsize = GET_MODE_BITSIZE (str_mode);
4206
4207 offset1 = bitpos;
4208 bitpos %= str_bitsize;
4209 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4210 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4211 }
4212 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4213 return false;
4214
4215 /* If the bit field covers the whole REG/MEM, store_field
4216 will likely generate better code. */
4217 if (bitsize >= str_bitsize)
4218 return false;
4219
4220 /* We can't handle fields split across multiple entities. */
4221 if (bitpos + bitsize > str_bitsize)
4222 return false;
4223
4224 if (BYTES_BIG_ENDIAN)
4225 bitpos = str_bitsize - bitpos - bitsize;
4226
4227 switch (code)
4228 {
4229 case PLUS_EXPR:
4230 case MINUS_EXPR:
4231 /* For now, just optimize the case of the topmost bitfield
4232 where we don't need to do any masking and also
4233 1 bit bitfields where xor can be used.
4234 We might win by one instruction for the other bitfields
4235 too if insv/extv instructions aren't used, so that
4236 can be added later. */
4237 if (bitpos + bitsize != str_bitsize
4238 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4239 break;
4240
4241 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4242 value = convert_modes (str_mode,
4243 TYPE_MODE (TREE_TYPE (op1)), value,
4244 TYPE_UNSIGNED (TREE_TYPE (op1)));
4245
4246 /* We may be accessing data outside the field, which means
4247 we can alias adjacent data. */
4248 if (MEM_P (str_rtx))
4249 {
4250 str_rtx = shallow_copy_rtx (str_rtx);
4251 set_mem_alias_set (str_rtx, 0);
4252 set_mem_expr (str_rtx, 0);
4253 }
4254
4255 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4256 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4257 {
4258 value = expand_and (str_mode, value, const1_rtx, NULL);
4259 binop = xor_optab;
4260 }
4261 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4262 bitpos, NULL_RTX, 1);
4263 result = expand_binop (str_mode, binop, str_rtx,
4264 value, str_rtx, 1, OPTAB_WIDEN);
4265 if (result != str_rtx)
4266 emit_move_insn (str_rtx, result);
4267 return true;
4268
4269 case BIT_IOR_EXPR:
4270 case BIT_XOR_EXPR:
4271 if (TREE_CODE (op1) != INTEGER_CST)
4272 break;
4273 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4274 value = convert_modes (GET_MODE (str_rtx),
4275 TYPE_MODE (TREE_TYPE (op1)), value,
4276 TYPE_UNSIGNED (TREE_TYPE (op1)));
4277
4278 /* We may be accessing data outside the field, which means
4279 we can alias adjacent data. */
4280 if (MEM_P (str_rtx))
4281 {
4282 str_rtx = shallow_copy_rtx (str_rtx);
4283 set_mem_alias_set (str_rtx, 0);
4284 set_mem_expr (str_rtx, 0);
4285 }
4286
4287 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4288 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4289 {
4290 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4291 - 1);
4292 value = expand_and (GET_MODE (str_rtx), value, mask,
4293 NULL_RTX);
4294 }
4295 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4296 bitpos, NULL_RTX, 1);
4297 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4298 value, str_rtx, 1, OPTAB_WIDEN);
4299 if (result != str_rtx)
4300 emit_move_insn (str_rtx, result);
4301 return true;
4302
4303 default:
4304 break;
4305 }
4306
4307 return false;
4308 }
4309
4310 /* In the C++ memory model, consecutive bit fields in a structure are
4311 considered one memory location.
4312
4313 Given a COMPONENT_REF, this function returns the bit range of
4314 consecutive bits in which this COMPONENT_REF belongs in. The
4315 values are returned in *BITSTART and *BITEND. If either the C++
4316 memory model is not activated, or this memory access is not thread
4317 visible, 0 is returned in *BITSTART and *BITEND.
4318
4319 EXP is the COMPONENT_REF.
4320 INNERDECL is the actual object being referenced.
4321 BITPOS is the position in bits where the bit starts within the structure.
4322 BITSIZE is size in bits of the field being referenced in EXP.
4323
4324 For example, while storing into FOO.A here...
4325
4326 struct {
4327 BIT 0:
4328 unsigned int a : 4;
4329 unsigned int b : 1;
4330 BIT 8:
4331 unsigned char c;
4332 unsigned int d : 6;
4333 } foo;
4334
4335 ...we are not allowed to store past <b>, so for the layout above, a
4336 range of 0..7 (because no one cares if we store into the
4337 padding). */
4338
4339 static void
4340 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4341 unsigned HOST_WIDE_INT *bitend,
4342 tree exp, tree innerdecl,
4343 HOST_WIDE_INT bitpos, HOST_WIDE_INT bitsize)
4344 {
4345 tree field, record_type, fld;
4346 bool found_field = false;
4347 bool prev_field_is_bitfield;
4348
4349 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4350
4351 /* If other threads can't see this value, no need to restrict stores. */
4352 if (ALLOW_STORE_DATA_RACES
4353 || ((TREE_CODE (innerdecl) == MEM_REF
4354 || TREE_CODE (innerdecl) == TARGET_MEM_REF)
4355 && !ptr_deref_may_alias_global_p (TREE_OPERAND (innerdecl, 0)))
4356 || (DECL_P (innerdecl)
4357 && ((TREE_CODE (innerdecl) == VAR_DECL
4358 && DECL_THREAD_LOCAL_P (innerdecl))
4359 || !TREE_STATIC (innerdecl))))
4360 {
4361 *bitstart = *bitend = 0;
4362 return;
4363 }
4364
4365 /* Bit field we're storing into. */
4366 field = TREE_OPERAND (exp, 1);
4367 record_type = DECL_FIELD_CONTEXT (field);
4368
4369 /* Count the contiguous bitfields for the memory location that
4370 contains FIELD. */
4371 *bitstart = 0;
4372 prev_field_is_bitfield = true;
4373 for (fld = TYPE_FIELDS (record_type); fld; fld = DECL_CHAIN (fld))
4374 {
4375 tree t, offset;
4376 enum machine_mode mode;
4377 int unsignedp, volatilep;
4378
4379 if (TREE_CODE (fld) != FIELD_DECL)
4380 continue;
4381
4382 t = build3 (COMPONENT_REF, TREE_TYPE (exp),
4383 unshare_expr (TREE_OPERAND (exp, 0)),
4384 fld, NULL_TREE);
4385 get_inner_reference (t, &bitsize, &bitpos, &offset,
4386 &mode, &unsignedp, &volatilep, true);
4387
4388 if (field == fld)
4389 found_field = true;
4390
4391 if (DECL_BIT_FIELD_TYPE (fld) && bitsize > 0)
4392 {
4393 if (prev_field_is_bitfield == false)
4394 {
4395 *bitstart = bitpos;
4396 prev_field_is_bitfield = true;
4397 }
4398 }
4399 else
4400 {
4401 prev_field_is_bitfield = false;
4402 if (found_field)
4403 break;
4404 }
4405 }
4406 gcc_assert (found_field);
4407
4408 if (fld)
4409 {
4410 /* We found the end of the bit field sequence. Include the
4411 padding up to the next field and be done. */
4412 *bitend = bitpos - 1;
4413 }
4414 else
4415 {
4416 /* If this is the last element in the structure, include the padding
4417 at the end of structure. */
4418 *bitend = TREE_INT_CST_LOW (TYPE_SIZE (record_type)) - 1;
4419 }
4420 }
4421
4422 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4423 is true, try generating a nontemporal store. */
4424
4425 void
4426 expand_assignment (tree to, tree from, bool nontemporal)
4427 {
4428 rtx to_rtx = 0;
4429 rtx result;
4430 enum machine_mode mode;
4431 int align;
4432 enum insn_code icode;
4433
4434 /* Don't crash if the lhs of the assignment was erroneous. */
4435 if (TREE_CODE (to) == ERROR_MARK)
4436 {
4437 expand_normal (from);
4438 return;
4439 }
4440
4441 /* Optimize away no-op moves without side-effects. */
4442 if (operand_equal_p (to, from, 0))
4443 return;
4444
4445 mode = TYPE_MODE (TREE_TYPE (to));
4446 if ((TREE_CODE (to) == MEM_REF
4447 || TREE_CODE (to) == TARGET_MEM_REF)
4448 && mode != BLKmode
4449 && ((align = MAX (TYPE_ALIGN (TREE_TYPE (to)), get_object_alignment (to)))
4450 < (signed) GET_MODE_ALIGNMENT (mode))
4451 && ((icode = optab_handler (movmisalign_optab, mode))
4452 != CODE_FOR_nothing))
4453 {
4454 struct expand_operand ops[2];
4455 enum machine_mode address_mode;
4456 rtx reg, op0, mem;
4457
4458 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4459 reg = force_not_mem (reg);
4460
4461 if (TREE_CODE (to) == MEM_REF)
4462 {
4463 addr_space_t as
4464 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (to, 1))));
4465 tree base = TREE_OPERAND (to, 0);
4466 address_mode = targetm.addr_space.address_mode (as);
4467 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4468 op0 = convert_memory_address_addr_space (address_mode, op0, as);
4469 if (!integer_zerop (TREE_OPERAND (to, 1)))
4470 {
4471 rtx off
4472 = immed_double_int_const (mem_ref_offset (to), address_mode);
4473 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
4474 }
4475 op0 = memory_address_addr_space (mode, op0, as);
4476 mem = gen_rtx_MEM (mode, op0);
4477 set_mem_attributes (mem, to, 0);
4478 set_mem_addr_space (mem, as);
4479 }
4480 else if (TREE_CODE (to) == TARGET_MEM_REF)
4481 {
4482 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (to));
4483 struct mem_address addr;
4484
4485 get_address_description (to, &addr);
4486 op0 = addr_for_mem_ref (&addr, as, true);
4487 op0 = memory_address_addr_space (mode, op0, as);
4488 mem = gen_rtx_MEM (mode, op0);
4489 set_mem_attributes (mem, to, 0);
4490 set_mem_addr_space (mem, as);
4491 }
4492 else
4493 gcc_unreachable ();
4494 if (TREE_THIS_VOLATILE (to))
4495 MEM_VOLATILE_P (mem) = 1;
4496
4497 create_fixed_operand (&ops[0], mem);
4498 create_input_operand (&ops[1], reg, mode);
4499 /* The movmisalign<mode> pattern cannot fail, else the assignment would
4500 silently be omitted. */
4501 expand_insn (icode, 2, ops);
4502 return;
4503 }
4504
4505 /* Assignment of a structure component needs special treatment
4506 if the structure component's rtx is not simply a MEM.
4507 Assignment of an array element at a constant index, and assignment of
4508 an array element in an unaligned packed structure field, has the same
4509 problem. */
4510 if (handled_component_p (to)
4511 /* ??? We only need to handle MEM_REF here if the access is not
4512 a full access of the base object. */
4513 || (TREE_CODE (to) == MEM_REF
4514 && TREE_CODE (TREE_OPERAND (to, 0)) == ADDR_EXPR)
4515 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4516 {
4517 enum machine_mode mode1;
4518 HOST_WIDE_INT bitsize, bitpos;
4519 unsigned HOST_WIDE_INT bitregion_start = 0;
4520 unsigned HOST_WIDE_INT bitregion_end = 0;
4521 tree offset;
4522 int unsignedp;
4523 int volatilep = 0;
4524 tree tem;
4525
4526 push_temp_slots ();
4527 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4528 &unsignedp, &volatilep, true);
4529
4530 if (TREE_CODE (to) == COMPONENT_REF
4531 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4532 get_bit_range (&bitregion_start, &bitregion_end,
4533 to, tem, bitpos, bitsize);
4534
4535 /* If we are going to use store_bit_field and extract_bit_field,
4536 make sure to_rtx will be safe for multiple use. */
4537
4538 to_rtx = expand_normal (tem);
4539
4540 /* If the bitfield is volatile, we want to access it in the
4541 field's mode, not the computed mode.
4542 If a MEM has VOIDmode (external with incomplete type),
4543 use BLKmode for it instead. */
4544 if (MEM_P (to_rtx))
4545 {
4546 if (volatilep && flag_strict_volatile_bitfields > 0)
4547 to_rtx = adjust_address (to_rtx, mode1, 0);
4548 else if (GET_MODE (to_rtx) == VOIDmode)
4549 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4550 }
4551
4552 if (offset != 0)
4553 {
4554 enum machine_mode address_mode;
4555 rtx offset_rtx;
4556
4557 if (!MEM_P (to_rtx))
4558 {
4559 /* We can get constant negative offsets into arrays with broken
4560 user code. Translate this to a trap instead of ICEing. */
4561 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4562 expand_builtin_trap ();
4563 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4564 }
4565
4566 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4567 address_mode
4568 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4569 if (GET_MODE (offset_rtx) != address_mode)
4570 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4571
4572 /* A constant address in TO_RTX can have VOIDmode, we must not try
4573 to call force_reg for that case. Avoid that case. */
4574 if (MEM_P (to_rtx)
4575 && GET_MODE (to_rtx) == BLKmode
4576 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4577 && bitsize > 0
4578 && (bitpos % bitsize) == 0
4579 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4580 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4581 {
4582 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4583 bitpos = 0;
4584 }
4585
4586 to_rtx = offset_address (to_rtx, offset_rtx,
4587 highest_pow2_factor_for_target (to,
4588 offset));
4589 }
4590
4591 /* No action is needed if the target is not a memory and the field
4592 lies completely outside that target. This can occur if the source
4593 code contains an out-of-bounds access to a small array. */
4594 if (!MEM_P (to_rtx)
4595 && GET_MODE (to_rtx) != BLKmode
4596 && (unsigned HOST_WIDE_INT) bitpos
4597 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4598 {
4599 expand_normal (from);
4600 result = NULL;
4601 }
4602 /* Handle expand_expr of a complex value returning a CONCAT. */
4603 else if (GET_CODE (to_rtx) == CONCAT)
4604 {
4605 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4606 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4607 && bitpos == 0
4608 && bitsize == mode_bitsize)
4609 result = store_expr (from, to_rtx, false, nontemporal);
4610 else if (bitsize == mode_bitsize / 2
4611 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4612 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4613 nontemporal);
4614 else if (bitpos + bitsize <= mode_bitsize / 2)
4615 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4616 bitregion_start, bitregion_end,
4617 mode1, from, TREE_TYPE (tem),
4618 get_alias_set (to), nontemporal);
4619 else if (bitpos >= mode_bitsize / 2)
4620 result = store_field (XEXP (to_rtx, 1), bitsize,
4621 bitpos - mode_bitsize / 2,
4622 bitregion_start, bitregion_end,
4623 mode1, from,
4624 TREE_TYPE (tem), get_alias_set (to),
4625 nontemporal);
4626 else if (bitpos == 0 && bitsize == mode_bitsize)
4627 {
4628 rtx from_rtx;
4629 result = expand_normal (from);
4630 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4631 TYPE_MODE (TREE_TYPE (from)), 0);
4632 emit_move_insn (XEXP (to_rtx, 0),
4633 read_complex_part (from_rtx, false));
4634 emit_move_insn (XEXP (to_rtx, 1),
4635 read_complex_part (from_rtx, true));
4636 }
4637 else
4638 {
4639 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4640 GET_MODE_SIZE (GET_MODE (to_rtx)),
4641 0);
4642 write_complex_part (temp, XEXP (to_rtx, 0), false);
4643 write_complex_part (temp, XEXP (to_rtx, 1), true);
4644 result = store_field (temp, bitsize, bitpos,
4645 bitregion_start, bitregion_end,
4646 mode1, from,
4647 TREE_TYPE (tem), get_alias_set (to),
4648 nontemporal);
4649 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4650 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4651 }
4652 }
4653 else
4654 {
4655 if (MEM_P (to_rtx))
4656 {
4657 /* If the field is at offset zero, we could have been given the
4658 DECL_RTX of the parent struct. Don't munge it. */
4659 to_rtx = shallow_copy_rtx (to_rtx);
4660
4661 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4662
4663 /* Deal with volatile and readonly fields. The former is only
4664 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4665 if (volatilep)
4666 MEM_VOLATILE_P (to_rtx) = 1;
4667 if (component_uses_parent_alias_set (to))
4668 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4669 }
4670
4671 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4672 bitregion_start, bitregion_end,
4673 mode1,
4674 to_rtx, to, from))
4675 result = NULL;
4676 else
4677 result = store_field (to_rtx, bitsize, bitpos,
4678 bitregion_start, bitregion_end,
4679 mode1, from,
4680 TREE_TYPE (tem), get_alias_set (to),
4681 nontemporal);
4682 }
4683
4684 if (result)
4685 preserve_temp_slots (result);
4686 free_temp_slots ();
4687 pop_temp_slots ();
4688 return;
4689 }
4690
4691 /* If the rhs is a function call and its value is not an aggregate,
4692 call the function before we start to compute the lhs.
4693 This is needed for correct code for cases such as
4694 val = setjmp (buf) on machines where reference to val
4695 requires loading up part of an address in a separate insn.
4696
4697 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4698 since it might be a promoted variable where the zero- or sign- extension
4699 needs to be done. Handling this in the normal way is safe because no
4700 computation is done before the call. The same is true for SSA names. */
4701 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4702 && COMPLETE_TYPE_P (TREE_TYPE (from))
4703 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4704 && ! (((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
4705 && REG_P (DECL_RTL (to)))
4706 || TREE_CODE (to) == SSA_NAME))
4707 {
4708 rtx value;
4709
4710 push_temp_slots ();
4711 value = expand_normal (from);
4712 if (to_rtx == 0)
4713 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4714
4715 /* Handle calls that return values in multiple non-contiguous locations.
4716 The Irix 6 ABI has examples of this. */
4717 if (GET_CODE (to_rtx) == PARALLEL)
4718 emit_group_load (to_rtx, value, TREE_TYPE (from),
4719 int_size_in_bytes (TREE_TYPE (from)));
4720 else if (GET_MODE (to_rtx) == BLKmode)
4721 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4722 else
4723 {
4724 if (POINTER_TYPE_P (TREE_TYPE (to)))
4725 value = convert_memory_address_addr_space
4726 (GET_MODE (to_rtx), value,
4727 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4728
4729 emit_move_insn (to_rtx, value);
4730 }
4731 preserve_temp_slots (to_rtx);
4732 free_temp_slots ();
4733 pop_temp_slots ();
4734 return;
4735 }
4736
4737 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
4738 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
4739
4740 if (to_rtx == 0)
4741 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4742
4743 /* Don't move directly into a return register. */
4744 if (TREE_CODE (to) == RESULT_DECL
4745 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4746 {
4747 rtx temp;
4748
4749 push_temp_slots ();
4750 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4751
4752 if (GET_CODE (to_rtx) == PARALLEL)
4753 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4754 int_size_in_bytes (TREE_TYPE (from)));
4755 else
4756 emit_move_insn (to_rtx, temp);
4757
4758 preserve_temp_slots (to_rtx);
4759 free_temp_slots ();
4760 pop_temp_slots ();
4761 return;
4762 }
4763
4764 /* In case we are returning the contents of an object which overlaps
4765 the place the value is being stored, use a safe function when copying
4766 a value through a pointer into a structure value return block. */
4767 if (TREE_CODE (to) == RESULT_DECL
4768 && TREE_CODE (from) == INDIRECT_REF
4769 && ADDR_SPACE_GENERIC_P
4770 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4771 && refs_may_alias_p (to, from)
4772 && cfun->returns_struct
4773 && !cfun->returns_pcc_struct)
4774 {
4775 rtx from_rtx, size;
4776
4777 push_temp_slots ();
4778 size = expr_size (from);
4779 from_rtx = expand_normal (from);
4780
4781 emit_library_call (memmove_libfunc, LCT_NORMAL,
4782 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4783 XEXP (from_rtx, 0), Pmode,
4784 convert_to_mode (TYPE_MODE (sizetype),
4785 size, TYPE_UNSIGNED (sizetype)),
4786 TYPE_MODE (sizetype));
4787
4788 preserve_temp_slots (to_rtx);
4789 free_temp_slots ();
4790 pop_temp_slots ();
4791 return;
4792 }
4793
4794 /* Compute FROM and store the value in the rtx we got. */
4795
4796 push_temp_slots ();
4797 result = store_expr (from, to_rtx, 0, nontemporal);
4798 preserve_temp_slots (result);
4799 free_temp_slots ();
4800 pop_temp_slots ();
4801 return;
4802 }
4803
4804 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4805 succeeded, false otherwise. */
4806
4807 bool
4808 emit_storent_insn (rtx to, rtx from)
4809 {
4810 struct expand_operand ops[2];
4811 enum machine_mode mode = GET_MODE (to);
4812 enum insn_code code = optab_handler (storent_optab, mode);
4813
4814 if (code == CODE_FOR_nothing)
4815 return false;
4816
4817 create_fixed_operand (&ops[0], to);
4818 create_input_operand (&ops[1], from, mode);
4819 return maybe_expand_insn (code, 2, ops);
4820 }
4821
4822 /* Generate code for computing expression EXP,
4823 and storing the value into TARGET.
4824
4825 If the mode is BLKmode then we may return TARGET itself.
4826 It turns out that in BLKmode it doesn't cause a problem.
4827 because C has no operators that could combine two different
4828 assignments into the same BLKmode object with different values
4829 with no sequence point. Will other languages need this to
4830 be more thorough?
4831
4832 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4833 stack, and block moves may need to be treated specially.
4834
4835 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4836
4837 rtx
4838 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4839 {
4840 rtx temp;
4841 rtx alt_rtl = NULL_RTX;
4842 location_t loc = EXPR_LOCATION (exp);
4843
4844 if (VOID_TYPE_P (TREE_TYPE (exp)))
4845 {
4846 /* C++ can generate ?: expressions with a throw expression in one
4847 branch and an rvalue in the other. Here, we resolve attempts to
4848 store the throw expression's nonexistent result. */
4849 gcc_assert (!call_param_p);
4850 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4851 return NULL_RTX;
4852 }
4853 if (TREE_CODE (exp) == COMPOUND_EXPR)
4854 {
4855 /* Perform first part of compound expression, then assign from second
4856 part. */
4857 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4858 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4859 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4860 nontemporal);
4861 }
4862 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4863 {
4864 /* For conditional expression, get safe form of the target. Then
4865 test the condition, doing the appropriate assignment on either
4866 side. This avoids the creation of unnecessary temporaries.
4867 For non-BLKmode, it is more efficient not to do this. */
4868
4869 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
4870
4871 do_pending_stack_adjust ();
4872 NO_DEFER_POP;
4873 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
4874 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4875 nontemporal);
4876 emit_jump_insn (gen_jump (lab2));
4877 emit_barrier ();
4878 emit_label (lab1);
4879 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
4880 nontemporal);
4881 emit_label (lab2);
4882 OK_DEFER_POP;
4883
4884 return NULL_RTX;
4885 }
4886 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
4887 /* If this is a scalar in a register that is stored in a wider mode
4888 than the declared mode, compute the result into its declared mode
4889 and then convert to the wider mode. Our value is the computed
4890 expression. */
4891 {
4892 rtx inner_target = 0;
4893
4894 /* We can do the conversion inside EXP, which will often result
4895 in some optimizations. Do the conversion in two steps: first
4896 change the signedness, if needed, then the extend. But don't
4897 do this if the type of EXP is a subtype of something else
4898 since then the conversion might involve more than just
4899 converting modes. */
4900 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
4901 && TREE_TYPE (TREE_TYPE (exp)) == 0
4902 && GET_MODE_PRECISION (GET_MODE (target))
4903 == TYPE_PRECISION (TREE_TYPE (exp)))
4904 {
4905 if (TYPE_UNSIGNED (TREE_TYPE (exp))
4906 != SUBREG_PROMOTED_UNSIGNED_P (target))
4907 {
4908 /* Some types, e.g. Fortran's logical*4, won't have a signed
4909 version, so use the mode instead. */
4910 tree ntype
4911 = (signed_or_unsigned_type_for
4912 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
4913 if (ntype == NULL)
4914 ntype = lang_hooks.types.type_for_mode
4915 (TYPE_MODE (TREE_TYPE (exp)),
4916 SUBREG_PROMOTED_UNSIGNED_P (target));
4917
4918 exp = fold_convert_loc (loc, ntype, exp);
4919 }
4920
4921 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
4922 (GET_MODE (SUBREG_REG (target)),
4923 SUBREG_PROMOTED_UNSIGNED_P (target)),
4924 exp);
4925
4926 inner_target = SUBREG_REG (target);
4927 }
4928
4929 temp = expand_expr (exp, inner_target, VOIDmode,
4930 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4931
4932 /* If TEMP is a VOIDmode constant, use convert_modes to make
4933 sure that we properly convert it. */
4934 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
4935 {
4936 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4937 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
4938 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
4939 GET_MODE (target), temp,
4940 SUBREG_PROMOTED_UNSIGNED_P (target));
4941 }
4942
4943 convert_move (SUBREG_REG (target), temp,
4944 SUBREG_PROMOTED_UNSIGNED_P (target));
4945
4946 return NULL_RTX;
4947 }
4948 else if ((TREE_CODE (exp) == STRING_CST
4949 || (TREE_CODE (exp) == MEM_REF
4950 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
4951 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
4952 == STRING_CST
4953 && integer_zerop (TREE_OPERAND (exp, 1))))
4954 && !nontemporal && !call_param_p
4955 && MEM_P (target))
4956 {
4957 /* Optimize initialization of an array with a STRING_CST. */
4958 HOST_WIDE_INT exp_len, str_copy_len;
4959 rtx dest_mem;
4960 tree str = TREE_CODE (exp) == STRING_CST
4961 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
4962
4963 exp_len = int_expr_size (exp);
4964 if (exp_len <= 0)
4965 goto normal_expr;
4966
4967 if (TREE_STRING_LENGTH (str) <= 0)
4968 goto normal_expr;
4969
4970 str_copy_len = strlen (TREE_STRING_POINTER (str));
4971 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
4972 goto normal_expr;
4973
4974 str_copy_len = TREE_STRING_LENGTH (str);
4975 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
4976 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
4977 {
4978 str_copy_len += STORE_MAX_PIECES - 1;
4979 str_copy_len &= ~(STORE_MAX_PIECES - 1);
4980 }
4981 str_copy_len = MIN (str_copy_len, exp_len);
4982 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
4983 CONST_CAST (char *, TREE_STRING_POINTER (str)),
4984 MEM_ALIGN (target), false))
4985 goto normal_expr;
4986
4987 dest_mem = target;
4988
4989 dest_mem = store_by_pieces (dest_mem,
4990 str_copy_len, builtin_strncpy_read_str,
4991 CONST_CAST (char *,
4992 TREE_STRING_POINTER (str)),
4993 MEM_ALIGN (target), false,
4994 exp_len > str_copy_len ? 1 : 0);
4995 if (exp_len > str_copy_len)
4996 clear_storage (adjust_address (dest_mem, BLKmode, 0),
4997 GEN_INT (exp_len - str_copy_len),
4998 BLOCK_OP_NORMAL);
4999 return NULL_RTX;
5000 }
5001 else
5002 {
5003 rtx tmp_target;
5004
5005 normal_expr:
5006 /* If we want to use a nontemporal store, force the value to
5007 register first. */
5008 tmp_target = nontemporal ? NULL_RTX : target;
5009 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5010 (call_param_p
5011 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5012 &alt_rtl);
5013 }
5014
5015 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5016 the same as that of TARGET, adjust the constant. This is needed, for
5017 example, in case it is a CONST_DOUBLE and we want only a word-sized
5018 value. */
5019 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5020 && TREE_CODE (exp) != ERROR_MARK
5021 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5022 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5023 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5024
5025 /* If value was not generated in the target, store it there.
5026 Convert the value to TARGET's type first if necessary and emit the
5027 pending incrementations that have been queued when expanding EXP.
5028 Note that we cannot emit the whole queue blindly because this will
5029 effectively disable the POST_INC optimization later.
5030
5031 If TEMP and TARGET compare equal according to rtx_equal_p, but
5032 one or both of them are volatile memory refs, we have to distinguish
5033 two cases:
5034 - expand_expr has used TARGET. In this case, we must not generate
5035 another copy. This can be detected by TARGET being equal according
5036 to == .
5037 - expand_expr has not used TARGET - that means that the source just
5038 happens to have the same RTX form. Since temp will have been created
5039 by expand_expr, it will compare unequal according to == .
5040 We must generate a copy in this case, to reach the correct number
5041 of volatile memory references. */
5042
5043 if ((! rtx_equal_p (temp, target)
5044 || (temp != target && (side_effects_p (temp)
5045 || side_effects_p (target))))
5046 && TREE_CODE (exp) != ERROR_MARK
5047 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5048 but TARGET is not valid memory reference, TEMP will differ
5049 from TARGET although it is really the same location. */
5050 && !(alt_rtl
5051 && rtx_equal_p (alt_rtl, target)
5052 && !side_effects_p (alt_rtl)
5053 && !side_effects_p (target))
5054 /* If there's nothing to copy, don't bother. Don't call
5055 expr_size unless necessary, because some front-ends (C++)
5056 expr_size-hook must not be given objects that are not
5057 supposed to be bit-copied or bit-initialized. */
5058 && expr_size (exp) != const0_rtx)
5059 {
5060 if (GET_MODE (temp) != GET_MODE (target)
5061 && GET_MODE (temp) != VOIDmode)
5062 {
5063 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5064 if (GET_MODE (target) == BLKmode
5065 && GET_MODE (temp) == BLKmode)
5066 emit_block_move (target, temp, expr_size (exp),
5067 (call_param_p
5068 ? BLOCK_OP_CALL_PARM
5069 : BLOCK_OP_NORMAL));
5070 else if (GET_MODE (target) == BLKmode)
5071 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5072 0, 0, 0, GET_MODE (temp), temp);
5073 else
5074 convert_move (target, temp, unsignedp);
5075 }
5076
5077 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5078 {
5079 /* Handle copying a string constant into an array. The string
5080 constant may be shorter than the array. So copy just the string's
5081 actual length, and clear the rest. First get the size of the data
5082 type of the string, which is actually the size of the target. */
5083 rtx size = expr_size (exp);
5084
5085 if (CONST_INT_P (size)
5086 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5087 emit_block_move (target, temp, size,
5088 (call_param_p
5089 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5090 else
5091 {
5092 enum machine_mode pointer_mode
5093 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5094 enum machine_mode address_mode
5095 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
5096
5097 /* Compute the size of the data to copy from the string. */
5098 tree copy_size
5099 = size_binop_loc (loc, MIN_EXPR,
5100 make_tree (sizetype, size),
5101 size_int (TREE_STRING_LENGTH (exp)));
5102 rtx copy_size_rtx
5103 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5104 (call_param_p
5105 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5106 rtx label = 0;
5107
5108 /* Copy that much. */
5109 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5110 TYPE_UNSIGNED (sizetype));
5111 emit_block_move (target, temp, copy_size_rtx,
5112 (call_param_p
5113 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5114
5115 /* Figure out how much is left in TARGET that we have to clear.
5116 Do all calculations in pointer_mode. */
5117 if (CONST_INT_P (copy_size_rtx))
5118 {
5119 size = plus_constant (size, -INTVAL (copy_size_rtx));
5120 target = adjust_address (target, BLKmode,
5121 INTVAL (copy_size_rtx));
5122 }
5123 else
5124 {
5125 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5126 copy_size_rtx, NULL_RTX, 0,
5127 OPTAB_LIB_WIDEN);
5128
5129 if (GET_MODE (copy_size_rtx) != address_mode)
5130 copy_size_rtx = convert_to_mode (address_mode,
5131 copy_size_rtx,
5132 TYPE_UNSIGNED (sizetype));
5133
5134 target = offset_address (target, copy_size_rtx,
5135 highest_pow2_factor (copy_size));
5136 label = gen_label_rtx ();
5137 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5138 GET_MODE (size), 0, label);
5139 }
5140
5141 if (size != const0_rtx)
5142 clear_storage (target, size, BLOCK_OP_NORMAL);
5143
5144 if (label)
5145 emit_label (label);
5146 }
5147 }
5148 /* Handle calls that return values in multiple non-contiguous locations.
5149 The Irix 6 ABI has examples of this. */
5150 else if (GET_CODE (target) == PARALLEL)
5151 emit_group_load (target, temp, TREE_TYPE (exp),
5152 int_size_in_bytes (TREE_TYPE (exp)));
5153 else if (GET_MODE (temp) == BLKmode)
5154 emit_block_move (target, temp, expr_size (exp),
5155 (call_param_p
5156 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5157 else if (nontemporal
5158 && emit_storent_insn (target, temp))
5159 /* If we managed to emit a nontemporal store, there is nothing else to
5160 do. */
5161 ;
5162 else
5163 {
5164 temp = force_operand (temp, target);
5165 if (temp != target)
5166 emit_move_insn (target, temp);
5167 }
5168 }
5169
5170 return NULL_RTX;
5171 }
5172 \f
5173 /* Return true if field F of structure TYPE is a flexible array. */
5174
5175 static bool
5176 flexible_array_member_p (const_tree f, const_tree type)
5177 {
5178 const_tree tf;
5179
5180 tf = TREE_TYPE (f);
5181 return (DECL_CHAIN (f) == NULL
5182 && TREE_CODE (tf) == ARRAY_TYPE
5183 && TYPE_DOMAIN (tf)
5184 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5185 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5186 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5187 && int_size_in_bytes (type) >= 0);
5188 }
5189
5190 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5191 must have in order for it to completely initialize a value of type TYPE.
5192 Return -1 if the number isn't known.
5193
5194 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5195
5196 static HOST_WIDE_INT
5197 count_type_elements (const_tree type, bool for_ctor_p)
5198 {
5199 switch (TREE_CODE (type))
5200 {
5201 case ARRAY_TYPE:
5202 {
5203 tree nelts;
5204
5205 nelts = array_type_nelts (type);
5206 if (nelts && host_integerp (nelts, 1))
5207 {
5208 unsigned HOST_WIDE_INT n;
5209
5210 n = tree_low_cst (nelts, 1) + 1;
5211 if (n == 0 || for_ctor_p)
5212 return n;
5213 else
5214 return n * count_type_elements (TREE_TYPE (type), false);
5215 }
5216 return for_ctor_p ? -1 : 1;
5217 }
5218
5219 case RECORD_TYPE:
5220 {
5221 unsigned HOST_WIDE_INT n;
5222 tree f;
5223
5224 n = 0;
5225 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5226 if (TREE_CODE (f) == FIELD_DECL)
5227 {
5228 if (!for_ctor_p)
5229 n += count_type_elements (TREE_TYPE (f), false);
5230 else if (!flexible_array_member_p (f, type))
5231 /* Don't count flexible arrays, which are not supposed
5232 to be initialized. */
5233 n += 1;
5234 }
5235
5236 return n;
5237 }
5238
5239 case UNION_TYPE:
5240 case QUAL_UNION_TYPE:
5241 {
5242 tree f;
5243 HOST_WIDE_INT n, m;
5244
5245 gcc_assert (!for_ctor_p);
5246 /* Estimate the number of scalars in each field and pick the
5247 maximum. Other estimates would do instead; the idea is simply
5248 to make sure that the estimate is not sensitive to the ordering
5249 of the fields. */
5250 n = 1;
5251 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5252 if (TREE_CODE (f) == FIELD_DECL)
5253 {
5254 m = count_type_elements (TREE_TYPE (f), false);
5255 /* If the field doesn't span the whole union, add an extra
5256 scalar for the rest. */
5257 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5258 TYPE_SIZE (type)) != 1)
5259 m++;
5260 if (n < m)
5261 n = m;
5262 }
5263 return n;
5264 }
5265
5266 case COMPLEX_TYPE:
5267 return 2;
5268
5269 case VECTOR_TYPE:
5270 return TYPE_VECTOR_SUBPARTS (type);
5271
5272 case INTEGER_TYPE:
5273 case REAL_TYPE:
5274 case FIXED_POINT_TYPE:
5275 case ENUMERAL_TYPE:
5276 case BOOLEAN_TYPE:
5277 case POINTER_TYPE:
5278 case OFFSET_TYPE:
5279 case REFERENCE_TYPE:
5280 return 1;
5281
5282 case ERROR_MARK:
5283 return 0;
5284
5285 case VOID_TYPE:
5286 case METHOD_TYPE:
5287 case FUNCTION_TYPE:
5288 case LANG_TYPE:
5289 default:
5290 gcc_unreachable ();
5291 }
5292 }
5293
5294 /* Helper for categorize_ctor_elements. Identical interface. */
5295
5296 static bool
5297 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5298 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5299 {
5300 unsigned HOST_WIDE_INT idx;
5301 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5302 tree value, purpose, elt_type;
5303
5304 /* Whether CTOR is a valid constant initializer, in accordance with what
5305 initializer_constant_valid_p does. If inferred from the constructor
5306 elements, true until proven otherwise. */
5307 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5308 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5309
5310 nz_elts = 0;
5311 init_elts = 0;
5312 num_fields = 0;
5313 elt_type = NULL_TREE;
5314
5315 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5316 {
5317 HOST_WIDE_INT mult = 1;
5318
5319 if (TREE_CODE (purpose) == RANGE_EXPR)
5320 {
5321 tree lo_index = TREE_OPERAND (purpose, 0);
5322 tree hi_index = TREE_OPERAND (purpose, 1);
5323
5324 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5325 mult = (tree_low_cst (hi_index, 1)
5326 - tree_low_cst (lo_index, 1) + 1);
5327 }
5328 num_fields += mult;
5329 elt_type = TREE_TYPE (value);
5330
5331 switch (TREE_CODE (value))
5332 {
5333 case CONSTRUCTOR:
5334 {
5335 HOST_WIDE_INT nz = 0, ic = 0;
5336
5337 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5338 p_complete);
5339
5340 nz_elts += mult * nz;
5341 init_elts += mult * ic;
5342
5343 if (const_from_elts_p && const_p)
5344 const_p = const_elt_p;
5345 }
5346 break;
5347
5348 case INTEGER_CST:
5349 case REAL_CST:
5350 case FIXED_CST:
5351 if (!initializer_zerop (value))
5352 nz_elts += mult;
5353 init_elts += mult;
5354 break;
5355
5356 case STRING_CST:
5357 nz_elts += mult * TREE_STRING_LENGTH (value);
5358 init_elts += mult * TREE_STRING_LENGTH (value);
5359 break;
5360
5361 case COMPLEX_CST:
5362 if (!initializer_zerop (TREE_REALPART (value)))
5363 nz_elts += mult;
5364 if (!initializer_zerop (TREE_IMAGPART (value)))
5365 nz_elts += mult;
5366 init_elts += mult;
5367 break;
5368
5369 case VECTOR_CST:
5370 {
5371 tree v;
5372 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
5373 {
5374 if (!initializer_zerop (TREE_VALUE (v)))
5375 nz_elts += mult;
5376 init_elts += mult;
5377 }
5378 }
5379 break;
5380
5381 default:
5382 {
5383 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5384 nz_elts += mult * tc;
5385 init_elts += mult * tc;
5386
5387 if (const_from_elts_p && const_p)
5388 const_p = initializer_constant_valid_p (value, elt_type)
5389 != NULL_TREE;
5390 }
5391 break;
5392 }
5393 }
5394
5395 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5396 num_fields, elt_type))
5397 *p_complete = false;
5398
5399 *p_nz_elts += nz_elts;
5400 *p_init_elts += init_elts;
5401
5402 return const_p;
5403 }
5404
5405 /* Examine CTOR to discover:
5406 * how many scalar fields are set to nonzero values,
5407 and place it in *P_NZ_ELTS;
5408 * how many scalar fields in total are in CTOR,
5409 and place it in *P_ELT_COUNT.
5410 * whether the constructor is complete -- in the sense that every
5411 meaningful byte is explicitly given a value --
5412 and place it in *P_COMPLETE.
5413
5414 Return whether or not CTOR is a valid static constant initializer, the same
5415 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5416
5417 bool
5418 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5419 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5420 {
5421 *p_nz_elts = 0;
5422 *p_init_elts = 0;
5423 *p_complete = true;
5424
5425 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5426 }
5427
5428 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5429 of which had type LAST_TYPE. Each element was itself a complete
5430 initializer, in the sense that every meaningful byte was explicitly
5431 given a value. Return true if the same is true for the constructor
5432 as a whole. */
5433
5434 bool
5435 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5436 const_tree last_type)
5437 {
5438 if (TREE_CODE (type) == UNION_TYPE
5439 || TREE_CODE (type) == QUAL_UNION_TYPE)
5440 {
5441 if (num_elts == 0)
5442 return false;
5443
5444 gcc_assert (num_elts == 1 && last_type);
5445
5446 /* ??? We could look at each element of the union, and find the
5447 largest element. Which would avoid comparing the size of the
5448 initialized element against any tail padding in the union.
5449 Doesn't seem worth the effort... */
5450 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5451 }
5452
5453 return count_type_elements (type, true) == num_elts;
5454 }
5455
5456 /* Return 1 if EXP contains mostly (3/4) zeros. */
5457
5458 static int
5459 mostly_zeros_p (const_tree exp)
5460 {
5461 if (TREE_CODE (exp) == CONSTRUCTOR)
5462 {
5463 HOST_WIDE_INT nz_elts, init_elts;
5464 bool complete_p;
5465
5466 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5467 return !complete_p || nz_elts < init_elts / 4;
5468 }
5469
5470 return initializer_zerop (exp);
5471 }
5472
5473 /* Return 1 if EXP contains all zeros. */
5474
5475 static int
5476 all_zeros_p (const_tree exp)
5477 {
5478 if (TREE_CODE (exp) == CONSTRUCTOR)
5479 {
5480 HOST_WIDE_INT nz_elts, init_elts;
5481 bool complete_p;
5482
5483 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5484 return nz_elts == 0;
5485 }
5486
5487 return initializer_zerop (exp);
5488 }
5489 \f
5490 /* Helper function for store_constructor.
5491 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5492 TYPE is the type of the CONSTRUCTOR, not the element type.
5493 CLEARED is as for store_constructor.
5494 ALIAS_SET is the alias set to use for any stores.
5495
5496 This provides a recursive shortcut back to store_constructor when it isn't
5497 necessary to go through store_field. This is so that we can pass through
5498 the cleared field to let store_constructor know that we may not have to
5499 clear a substructure if the outer structure has already been cleared. */
5500
5501 static void
5502 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5503 HOST_WIDE_INT bitpos, enum machine_mode mode,
5504 tree exp, tree type, int cleared,
5505 alias_set_type alias_set)
5506 {
5507 if (TREE_CODE (exp) == CONSTRUCTOR
5508 /* We can only call store_constructor recursively if the size and
5509 bit position are on a byte boundary. */
5510 && bitpos % BITS_PER_UNIT == 0
5511 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5512 /* If we have a nonzero bitpos for a register target, then we just
5513 let store_field do the bitfield handling. This is unlikely to
5514 generate unnecessary clear instructions anyways. */
5515 && (bitpos == 0 || MEM_P (target)))
5516 {
5517 if (MEM_P (target))
5518 target
5519 = adjust_address (target,
5520 GET_MODE (target) == BLKmode
5521 || 0 != (bitpos
5522 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5523 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5524
5525
5526 /* Update the alias set, if required. */
5527 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5528 && MEM_ALIAS_SET (target) != 0)
5529 {
5530 target = copy_rtx (target);
5531 set_mem_alias_set (target, alias_set);
5532 }
5533
5534 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5535 }
5536 else
5537 store_field (target, bitsize, bitpos, 0, 0, mode, exp, type, alias_set,
5538 false);
5539 }
5540
5541 /* Store the value of constructor EXP into the rtx TARGET.
5542 TARGET is either a REG or a MEM; we know it cannot conflict, since
5543 safe_from_p has been called.
5544 CLEARED is true if TARGET is known to have been zero'd.
5545 SIZE is the number of bytes of TARGET we are allowed to modify: this
5546 may not be the same as the size of EXP if we are assigning to a field
5547 which has been packed to exclude padding bits. */
5548
5549 static void
5550 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5551 {
5552 tree type = TREE_TYPE (exp);
5553 #ifdef WORD_REGISTER_OPERATIONS
5554 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5555 #endif
5556
5557 switch (TREE_CODE (type))
5558 {
5559 case RECORD_TYPE:
5560 case UNION_TYPE:
5561 case QUAL_UNION_TYPE:
5562 {
5563 unsigned HOST_WIDE_INT idx;
5564 tree field, value;
5565
5566 /* If size is zero or the target is already cleared, do nothing. */
5567 if (size == 0 || cleared)
5568 cleared = 1;
5569 /* We either clear the aggregate or indicate the value is dead. */
5570 else if ((TREE_CODE (type) == UNION_TYPE
5571 || TREE_CODE (type) == QUAL_UNION_TYPE)
5572 && ! CONSTRUCTOR_ELTS (exp))
5573 /* If the constructor is empty, clear the union. */
5574 {
5575 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5576 cleared = 1;
5577 }
5578
5579 /* If we are building a static constructor into a register,
5580 set the initial value as zero so we can fold the value into
5581 a constant. But if more than one register is involved,
5582 this probably loses. */
5583 else if (REG_P (target) && TREE_STATIC (exp)
5584 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5585 {
5586 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5587 cleared = 1;
5588 }
5589
5590 /* If the constructor has fewer fields than the structure or
5591 if we are initializing the structure to mostly zeros, clear
5592 the whole structure first. Don't do this if TARGET is a
5593 register whose mode size isn't equal to SIZE since
5594 clear_storage can't handle this case. */
5595 else if (size > 0
5596 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5597 != fields_length (type))
5598 || mostly_zeros_p (exp))
5599 && (!REG_P (target)
5600 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5601 == size)))
5602 {
5603 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5604 cleared = 1;
5605 }
5606
5607 if (REG_P (target) && !cleared)
5608 emit_clobber (target);
5609
5610 /* Store each element of the constructor into the
5611 corresponding field of TARGET. */
5612 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5613 {
5614 enum machine_mode mode;
5615 HOST_WIDE_INT bitsize;
5616 HOST_WIDE_INT bitpos = 0;
5617 tree offset;
5618 rtx to_rtx = target;
5619
5620 /* Just ignore missing fields. We cleared the whole
5621 structure, above, if any fields are missing. */
5622 if (field == 0)
5623 continue;
5624
5625 if (cleared && initializer_zerop (value))
5626 continue;
5627
5628 if (host_integerp (DECL_SIZE (field), 1))
5629 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5630 else
5631 bitsize = -1;
5632
5633 mode = DECL_MODE (field);
5634 if (DECL_BIT_FIELD (field))
5635 mode = VOIDmode;
5636
5637 offset = DECL_FIELD_OFFSET (field);
5638 if (host_integerp (offset, 0)
5639 && host_integerp (bit_position (field), 0))
5640 {
5641 bitpos = int_bit_position (field);
5642 offset = 0;
5643 }
5644 else
5645 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5646
5647 if (offset)
5648 {
5649 enum machine_mode address_mode;
5650 rtx offset_rtx;
5651
5652 offset
5653 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5654 make_tree (TREE_TYPE (exp),
5655 target));
5656
5657 offset_rtx = expand_normal (offset);
5658 gcc_assert (MEM_P (to_rtx));
5659
5660 address_mode
5661 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5662 if (GET_MODE (offset_rtx) != address_mode)
5663 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5664
5665 to_rtx = offset_address (to_rtx, offset_rtx,
5666 highest_pow2_factor (offset));
5667 }
5668
5669 #ifdef WORD_REGISTER_OPERATIONS
5670 /* If this initializes a field that is smaller than a
5671 word, at the start of a word, try to widen it to a full
5672 word. This special case allows us to output C++ member
5673 function initializations in a form that the optimizers
5674 can understand. */
5675 if (REG_P (target)
5676 && bitsize < BITS_PER_WORD
5677 && bitpos % BITS_PER_WORD == 0
5678 && GET_MODE_CLASS (mode) == MODE_INT
5679 && TREE_CODE (value) == INTEGER_CST
5680 && exp_size >= 0
5681 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5682 {
5683 tree type = TREE_TYPE (value);
5684
5685 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5686 {
5687 type = lang_hooks.types.type_for_size
5688 (BITS_PER_WORD, TYPE_UNSIGNED (type));
5689 value = fold_convert (type, value);
5690 }
5691
5692 if (BYTES_BIG_ENDIAN)
5693 value
5694 = fold_build2 (LSHIFT_EXPR, type, value,
5695 build_int_cst (type,
5696 BITS_PER_WORD - bitsize));
5697 bitsize = BITS_PER_WORD;
5698 mode = word_mode;
5699 }
5700 #endif
5701
5702 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5703 && DECL_NONADDRESSABLE_P (field))
5704 {
5705 to_rtx = copy_rtx (to_rtx);
5706 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5707 }
5708
5709 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5710 value, type, cleared,
5711 get_alias_set (TREE_TYPE (field)));
5712 }
5713 break;
5714 }
5715 case ARRAY_TYPE:
5716 {
5717 tree value, index;
5718 unsigned HOST_WIDE_INT i;
5719 int need_to_clear;
5720 tree domain;
5721 tree elttype = TREE_TYPE (type);
5722 int const_bounds_p;
5723 HOST_WIDE_INT minelt = 0;
5724 HOST_WIDE_INT maxelt = 0;
5725
5726 domain = TYPE_DOMAIN (type);
5727 const_bounds_p = (TYPE_MIN_VALUE (domain)
5728 && TYPE_MAX_VALUE (domain)
5729 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5730 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5731
5732 /* If we have constant bounds for the range of the type, get them. */
5733 if (const_bounds_p)
5734 {
5735 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5736 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5737 }
5738
5739 /* If the constructor has fewer elements than the array, clear
5740 the whole array first. Similarly if this is static
5741 constructor of a non-BLKmode object. */
5742 if (cleared)
5743 need_to_clear = 0;
5744 else if (REG_P (target) && TREE_STATIC (exp))
5745 need_to_clear = 1;
5746 else
5747 {
5748 unsigned HOST_WIDE_INT idx;
5749 tree index, value;
5750 HOST_WIDE_INT count = 0, zero_count = 0;
5751 need_to_clear = ! const_bounds_p;
5752
5753 /* This loop is a more accurate version of the loop in
5754 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5755 is also needed to check for missing elements. */
5756 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5757 {
5758 HOST_WIDE_INT this_node_count;
5759
5760 if (need_to_clear)
5761 break;
5762
5763 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5764 {
5765 tree lo_index = TREE_OPERAND (index, 0);
5766 tree hi_index = TREE_OPERAND (index, 1);
5767
5768 if (! host_integerp (lo_index, 1)
5769 || ! host_integerp (hi_index, 1))
5770 {
5771 need_to_clear = 1;
5772 break;
5773 }
5774
5775 this_node_count = (tree_low_cst (hi_index, 1)
5776 - tree_low_cst (lo_index, 1) + 1);
5777 }
5778 else
5779 this_node_count = 1;
5780
5781 count += this_node_count;
5782 if (mostly_zeros_p (value))
5783 zero_count += this_node_count;
5784 }
5785
5786 /* Clear the entire array first if there are any missing
5787 elements, or if the incidence of zero elements is >=
5788 75%. */
5789 if (! need_to_clear
5790 && (count < maxelt - minelt + 1
5791 || 4 * zero_count >= 3 * count))
5792 need_to_clear = 1;
5793 }
5794
5795 if (need_to_clear && size > 0)
5796 {
5797 if (REG_P (target))
5798 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5799 else
5800 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5801 cleared = 1;
5802 }
5803
5804 if (!cleared && REG_P (target))
5805 /* Inform later passes that the old value is dead. */
5806 emit_clobber (target);
5807
5808 /* Store each element of the constructor into the
5809 corresponding element of TARGET, determined by counting the
5810 elements. */
5811 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5812 {
5813 enum machine_mode mode;
5814 HOST_WIDE_INT bitsize;
5815 HOST_WIDE_INT bitpos;
5816 rtx xtarget = target;
5817
5818 if (cleared && initializer_zerop (value))
5819 continue;
5820
5821 mode = TYPE_MODE (elttype);
5822 if (mode == BLKmode)
5823 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5824 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5825 : -1);
5826 else
5827 bitsize = GET_MODE_BITSIZE (mode);
5828
5829 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5830 {
5831 tree lo_index = TREE_OPERAND (index, 0);
5832 tree hi_index = TREE_OPERAND (index, 1);
5833 rtx index_r, pos_rtx;
5834 HOST_WIDE_INT lo, hi, count;
5835 tree position;
5836
5837 /* If the range is constant and "small", unroll the loop. */
5838 if (const_bounds_p
5839 && host_integerp (lo_index, 0)
5840 && host_integerp (hi_index, 0)
5841 && (lo = tree_low_cst (lo_index, 0),
5842 hi = tree_low_cst (hi_index, 0),
5843 count = hi - lo + 1,
5844 (!MEM_P (target)
5845 || count <= 2
5846 || (host_integerp (TYPE_SIZE (elttype), 1)
5847 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5848 <= 40 * 8)))))
5849 {
5850 lo -= minelt; hi -= minelt;
5851 for (; lo <= hi; lo++)
5852 {
5853 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
5854
5855 if (MEM_P (target)
5856 && !MEM_KEEP_ALIAS_SET_P (target)
5857 && TREE_CODE (type) == ARRAY_TYPE
5858 && TYPE_NONALIASED_COMPONENT (type))
5859 {
5860 target = copy_rtx (target);
5861 MEM_KEEP_ALIAS_SET_P (target) = 1;
5862 }
5863
5864 store_constructor_field
5865 (target, bitsize, bitpos, mode, value, type, cleared,
5866 get_alias_set (elttype));
5867 }
5868 }
5869 else
5870 {
5871 rtx loop_start = gen_label_rtx ();
5872 rtx loop_end = gen_label_rtx ();
5873 tree exit_cond;
5874
5875 expand_normal (hi_index);
5876
5877 index = build_decl (EXPR_LOCATION (exp),
5878 VAR_DECL, NULL_TREE, domain);
5879 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
5880 SET_DECL_RTL (index, index_r);
5881 store_expr (lo_index, index_r, 0, false);
5882
5883 /* Build the head of the loop. */
5884 do_pending_stack_adjust ();
5885 emit_label (loop_start);
5886
5887 /* Assign value to element index. */
5888 position =
5889 fold_convert (ssizetype,
5890 fold_build2 (MINUS_EXPR,
5891 TREE_TYPE (index),
5892 index,
5893 TYPE_MIN_VALUE (domain)));
5894
5895 position =
5896 size_binop (MULT_EXPR, position,
5897 fold_convert (ssizetype,
5898 TYPE_SIZE_UNIT (elttype)));
5899
5900 pos_rtx = expand_normal (position);
5901 xtarget = offset_address (target, pos_rtx,
5902 highest_pow2_factor (position));
5903 xtarget = adjust_address (xtarget, mode, 0);
5904 if (TREE_CODE (value) == CONSTRUCTOR)
5905 store_constructor (value, xtarget, cleared,
5906 bitsize / BITS_PER_UNIT);
5907 else
5908 store_expr (value, xtarget, 0, false);
5909
5910 /* Generate a conditional jump to exit the loop. */
5911 exit_cond = build2 (LT_EXPR, integer_type_node,
5912 index, hi_index);
5913 jumpif (exit_cond, loop_end, -1);
5914
5915 /* Update the loop counter, and jump to the head of
5916 the loop. */
5917 expand_assignment (index,
5918 build2 (PLUS_EXPR, TREE_TYPE (index),
5919 index, integer_one_node),
5920 false);
5921
5922 emit_jump (loop_start);
5923
5924 /* Build the end of the loop. */
5925 emit_label (loop_end);
5926 }
5927 }
5928 else if ((index != 0 && ! host_integerp (index, 0))
5929 || ! host_integerp (TYPE_SIZE (elttype), 1))
5930 {
5931 tree position;
5932
5933 if (index == 0)
5934 index = ssize_int (1);
5935
5936 if (minelt)
5937 index = fold_convert (ssizetype,
5938 fold_build2 (MINUS_EXPR,
5939 TREE_TYPE (index),
5940 index,
5941 TYPE_MIN_VALUE (domain)));
5942
5943 position =
5944 size_binop (MULT_EXPR, index,
5945 fold_convert (ssizetype,
5946 TYPE_SIZE_UNIT (elttype)));
5947 xtarget = offset_address (target,
5948 expand_normal (position),
5949 highest_pow2_factor (position));
5950 xtarget = adjust_address (xtarget, mode, 0);
5951 store_expr (value, xtarget, 0, false);
5952 }
5953 else
5954 {
5955 if (index != 0)
5956 bitpos = ((tree_low_cst (index, 0) - minelt)
5957 * tree_low_cst (TYPE_SIZE (elttype), 1));
5958 else
5959 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
5960
5961 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
5962 && TREE_CODE (type) == ARRAY_TYPE
5963 && TYPE_NONALIASED_COMPONENT (type))
5964 {
5965 target = copy_rtx (target);
5966 MEM_KEEP_ALIAS_SET_P (target) = 1;
5967 }
5968 store_constructor_field (target, bitsize, bitpos, mode, value,
5969 type, cleared, get_alias_set (elttype));
5970 }
5971 }
5972 break;
5973 }
5974
5975 case VECTOR_TYPE:
5976 {
5977 unsigned HOST_WIDE_INT idx;
5978 constructor_elt *ce;
5979 int i;
5980 int need_to_clear;
5981 int icode = 0;
5982 tree elttype = TREE_TYPE (type);
5983 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
5984 enum machine_mode eltmode = TYPE_MODE (elttype);
5985 HOST_WIDE_INT bitsize;
5986 HOST_WIDE_INT bitpos;
5987 rtvec vector = NULL;
5988 unsigned n_elts;
5989 alias_set_type alias;
5990
5991 gcc_assert (eltmode != BLKmode);
5992
5993 n_elts = TYPE_VECTOR_SUBPARTS (type);
5994 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
5995 {
5996 enum machine_mode mode = GET_MODE (target);
5997
5998 icode = (int) optab_handler (vec_init_optab, mode);
5999 if (icode != CODE_FOR_nothing)
6000 {
6001 unsigned int i;
6002
6003 vector = rtvec_alloc (n_elts);
6004 for (i = 0; i < n_elts; i++)
6005 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6006 }
6007 }
6008
6009 /* If the constructor has fewer elements than the vector,
6010 clear the whole array first. Similarly if this is static
6011 constructor of a non-BLKmode object. */
6012 if (cleared)
6013 need_to_clear = 0;
6014 else if (REG_P (target) && TREE_STATIC (exp))
6015 need_to_clear = 1;
6016 else
6017 {
6018 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6019 tree value;
6020
6021 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6022 {
6023 int n_elts_here = tree_low_cst
6024 (int_const_binop (TRUNC_DIV_EXPR,
6025 TYPE_SIZE (TREE_TYPE (value)),
6026 TYPE_SIZE (elttype)), 1);
6027
6028 count += n_elts_here;
6029 if (mostly_zeros_p (value))
6030 zero_count += n_elts_here;
6031 }
6032
6033 /* Clear the entire vector first if there are any missing elements,
6034 or if the incidence of zero elements is >= 75%. */
6035 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6036 }
6037
6038 if (need_to_clear && size > 0 && !vector)
6039 {
6040 if (REG_P (target))
6041 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6042 else
6043 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6044 cleared = 1;
6045 }
6046
6047 /* Inform later passes that the old value is dead. */
6048 if (!cleared && !vector && REG_P (target))
6049 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6050
6051 if (MEM_P (target))
6052 alias = MEM_ALIAS_SET (target);
6053 else
6054 alias = get_alias_set (elttype);
6055
6056 /* Store each element of the constructor into the corresponding
6057 element of TARGET, determined by counting the elements. */
6058 for (idx = 0, i = 0;
6059 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6060 idx++, i += bitsize / elt_size)
6061 {
6062 HOST_WIDE_INT eltpos;
6063 tree value = ce->value;
6064
6065 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6066 if (cleared && initializer_zerop (value))
6067 continue;
6068
6069 if (ce->index)
6070 eltpos = tree_low_cst (ce->index, 1);
6071 else
6072 eltpos = i;
6073
6074 if (vector)
6075 {
6076 /* Vector CONSTRUCTORs should only be built from smaller
6077 vectors in the case of BLKmode vectors. */
6078 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6079 RTVEC_ELT (vector, eltpos)
6080 = expand_normal (value);
6081 }
6082 else
6083 {
6084 enum machine_mode value_mode =
6085 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6086 ? TYPE_MODE (TREE_TYPE (value))
6087 : eltmode;
6088 bitpos = eltpos * elt_size;
6089 store_constructor_field (target, bitsize, bitpos,
6090 value_mode, value, type,
6091 cleared, alias);
6092 }
6093 }
6094
6095 if (vector)
6096 emit_insn (GEN_FCN (icode)
6097 (target,
6098 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6099 break;
6100 }
6101
6102 default:
6103 gcc_unreachable ();
6104 }
6105 }
6106
6107 /* Store the value of EXP (an expression tree)
6108 into a subfield of TARGET which has mode MODE and occupies
6109 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6110 If MODE is VOIDmode, it means that we are storing into a bit-field.
6111
6112 BITREGION_START is bitpos of the first bitfield in this region.
6113 BITREGION_END is the bitpos of the ending bitfield in this region.
6114 These two fields are 0, if the C++ memory model does not apply,
6115 or we are not interested in keeping track of bitfield regions.
6116
6117 Always return const0_rtx unless we have something particular to
6118 return.
6119
6120 TYPE is the type of the underlying object,
6121
6122 ALIAS_SET is the alias set for the destination. This value will
6123 (in general) be different from that for TARGET, since TARGET is a
6124 reference to the containing structure.
6125
6126 If NONTEMPORAL is true, try generating a nontemporal store. */
6127
6128 static rtx
6129 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6130 unsigned HOST_WIDE_INT bitregion_start,
6131 unsigned HOST_WIDE_INT bitregion_end,
6132 enum machine_mode mode, tree exp, tree type,
6133 alias_set_type alias_set, bool nontemporal)
6134 {
6135 if (TREE_CODE (exp) == ERROR_MARK)
6136 return const0_rtx;
6137
6138 /* If we have nothing to store, do nothing unless the expression has
6139 side-effects. */
6140 if (bitsize == 0)
6141 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6142
6143 /* If we are storing into an unaligned field of an aligned union that is
6144 in a register, we may have the mode of TARGET being an integer mode but
6145 MODE == BLKmode. In that case, get an aligned object whose size and
6146 alignment are the same as TARGET and store TARGET into it (we can avoid
6147 the store if the field being stored is the entire width of TARGET). Then
6148 call ourselves recursively to store the field into a BLKmode version of
6149 that object. Finally, load from the object into TARGET. This is not
6150 very efficient in general, but should only be slightly more expensive
6151 than the otherwise-required unaligned accesses. Perhaps this can be
6152 cleaned up later. It's tempting to make OBJECT readonly, but it's set
6153 twice, once with emit_move_insn and once via store_field. */
6154
6155 if (mode == BLKmode
6156 && (REG_P (target) || GET_CODE (target) == SUBREG))
6157 {
6158 rtx object = assign_temp (type, 0, 1, 1);
6159 rtx blk_object = adjust_address (object, BLKmode, 0);
6160
6161 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
6162 emit_move_insn (object, target);
6163
6164 store_field (blk_object, bitsize, bitpos,
6165 bitregion_start, bitregion_end,
6166 mode, exp, type, alias_set, nontemporal);
6167
6168 emit_move_insn (target, object);
6169
6170 /* We want to return the BLKmode version of the data. */
6171 return blk_object;
6172 }
6173
6174 if (GET_CODE (target) == CONCAT)
6175 {
6176 /* We're storing into a struct containing a single __complex. */
6177
6178 gcc_assert (!bitpos);
6179 return store_expr (exp, target, 0, nontemporal);
6180 }
6181
6182 /* If the structure is in a register or if the component
6183 is a bit field, we cannot use addressing to access it.
6184 Use bit-field techniques or SUBREG to store in it. */
6185
6186 if (mode == VOIDmode
6187 || (mode != BLKmode && ! direct_store[(int) mode]
6188 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6189 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6190 || REG_P (target)
6191 || GET_CODE (target) == SUBREG
6192 /* If the field isn't aligned enough to store as an ordinary memref,
6193 store it as a bit field. */
6194 || (mode != BLKmode
6195 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6196 || bitpos % GET_MODE_ALIGNMENT (mode))
6197 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6198 || (bitpos % BITS_PER_UNIT != 0)))
6199 /* If the RHS and field are a constant size and the size of the
6200 RHS isn't the same size as the bitfield, we must use bitfield
6201 operations. */
6202 || (bitsize >= 0
6203 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6204 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6205 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6206 decl we must use bitfield operations. */
6207 || (bitsize >= 0
6208 && TREE_CODE (exp) == MEM_REF
6209 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6210 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6211 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6212 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6213 {
6214 rtx temp;
6215 gimple nop_def;
6216
6217 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6218 implies a mask operation. If the precision is the same size as
6219 the field we're storing into, that mask is redundant. This is
6220 particularly common with bit field assignments generated by the
6221 C front end. */
6222 nop_def = get_def_for_expr (exp, NOP_EXPR);
6223 if (nop_def)
6224 {
6225 tree type = TREE_TYPE (exp);
6226 if (INTEGRAL_TYPE_P (type)
6227 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6228 && bitsize == TYPE_PRECISION (type))
6229 {
6230 tree op = gimple_assign_rhs1 (nop_def);
6231 type = TREE_TYPE (op);
6232 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6233 exp = op;
6234 }
6235 }
6236
6237 temp = expand_normal (exp);
6238
6239 /* If BITSIZE is narrower than the size of the type of EXP
6240 we will be narrowing TEMP. Normally, what's wanted are the
6241 low-order bits. However, if EXP's type is a record and this is
6242 big-endian machine, we want the upper BITSIZE bits. */
6243 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6244 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6245 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6246 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6247 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6248 NULL_RTX, 1);
6249
6250 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
6251 MODE. */
6252 if (mode != VOIDmode && mode != BLKmode
6253 && mode != TYPE_MODE (TREE_TYPE (exp)))
6254 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6255
6256 /* If the modes of TEMP and TARGET are both BLKmode, both
6257 must be in memory and BITPOS must be aligned on a byte
6258 boundary. If so, we simply do a block copy. Likewise
6259 for a BLKmode-like TARGET. */
6260 if (GET_MODE (temp) == BLKmode
6261 && (GET_MODE (target) == BLKmode
6262 || (MEM_P (target)
6263 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6264 && (bitpos % BITS_PER_UNIT) == 0
6265 && (bitsize % BITS_PER_UNIT) == 0)))
6266 {
6267 gcc_assert (MEM_P (target) && MEM_P (temp)
6268 && (bitpos % BITS_PER_UNIT) == 0);
6269
6270 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6271 emit_block_move (target, temp,
6272 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6273 / BITS_PER_UNIT),
6274 BLOCK_OP_NORMAL);
6275
6276 return const0_rtx;
6277 }
6278
6279 /* Store the value in the bitfield. */
6280 store_bit_field (target, bitsize, bitpos,
6281 bitregion_start, bitregion_end,
6282 mode, temp);
6283
6284 return const0_rtx;
6285 }
6286 else
6287 {
6288 /* Now build a reference to just the desired component. */
6289 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6290
6291 if (to_rtx == target)
6292 to_rtx = copy_rtx (to_rtx);
6293
6294 if (!MEM_SCALAR_P (to_rtx))
6295 MEM_IN_STRUCT_P (to_rtx) = 1;
6296 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6297 set_mem_alias_set (to_rtx, alias_set);
6298
6299 return store_expr (exp, to_rtx, 0, nontemporal);
6300 }
6301 }
6302 \f
6303 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6304 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6305 codes and find the ultimate containing object, which we return.
6306
6307 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6308 bit position, and *PUNSIGNEDP to the signedness of the field.
6309 If the position of the field is variable, we store a tree
6310 giving the variable offset (in units) in *POFFSET.
6311 This offset is in addition to the bit position.
6312 If the position is not variable, we store 0 in *POFFSET.
6313
6314 If any of the extraction expressions is volatile,
6315 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6316
6317 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6318 Otherwise, it is a mode that can be used to access the field.
6319
6320 If the field describes a variable-sized object, *PMODE is set to
6321 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6322 this case, but the address of the object can be found.
6323
6324 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6325 look through nodes that serve as markers of a greater alignment than
6326 the one that can be deduced from the expression. These nodes make it
6327 possible for front-ends to prevent temporaries from being created by
6328 the middle-end on alignment considerations. For that purpose, the
6329 normal operating mode at high-level is to always pass FALSE so that
6330 the ultimate containing object is really returned; moreover, the
6331 associated predicate handled_component_p will always return TRUE
6332 on these nodes, thus indicating that they are essentially handled
6333 by get_inner_reference. TRUE should only be passed when the caller
6334 is scanning the expression in order to build another representation
6335 and specifically knows how to handle these nodes; as such, this is
6336 the normal operating mode in the RTL expanders. */
6337
6338 tree
6339 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6340 HOST_WIDE_INT *pbitpos, tree *poffset,
6341 enum machine_mode *pmode, int *punsignedp,
6342 int *pvolatilep, bool keep_aligning)
6343 {
6344 tree size_tree = 0;
6345 enum machine_mode mode = VOIDmode;
6346 bool blkmode_bitfield = false;
6347 tree offset = size_zero_node;
6348 double_int bit_offset = double_int_zero;
6349
6350 /* First get the mode, signedness, and size. We do this from just the
6351 outermost expression. */
6352 *pbitsize = -1;
6353 if (TREE_CODE (exp) == COMPONENT_REF)
6354 {
6355 tree field = TREE_OPERAND (exp, 1);
6356 size_tree = DECL_SIZE (field);
6357 if (!DECL_BIT_FIELD (field))
6358 mode = DECL_MODE (field);
6359 else if (DECL_MODE (field) == BLKmode)
6360 blkmode_bitfield = true;
6361 else if (TREE_THIS_VOLATILE (exp)
6362 && flag_strict_volatile_bitfields > 0)
6363 /* Volatile bitfields should be accessed in the mode of the
6364 field's type, not the mode computed based on the bit
6365 size. */
6366 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6367
6368 *punsignedp = DECL_UNSIGNED (field);
6369 }
6370 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6371 {
6372 size_tree = TREE_OPERAND (exp, 1);
6373 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6374 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6375
6376 /* For vector types, with the correct size of access, use the mode of
6377 inner type. */
6378 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6379 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6380 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6381 mode = TYPE_MODE (TREE_TYPE (exp));
6382 }
6383 else
6384 {
6385 mode = TYPE_MODE (TREE_TYPE (exp));
6386 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6387
6388 if (mode == BLKmode)
6389 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6390 else
6391 *pbitsize = GET_MODE_BITSIZE (mode);
6392 }
6393
6394 if (size_tree != 0)
6395 {
6396 if (! host_integerp (size_tree, 1))
6397 mode = BLKmode, *pbitsize = -1;
6398 else
6399 *pbitsize = tree_low_cst (size_tree, 1);
6400 }
6401
6402 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6403 and find the ultimate containing object. */
6404 while (1)
6405 {
6406 switch (TREE_CODE (exp))
6407 {
6408 case BIT_FIELD_REF:
6409 bit_offset
6410 = double_int_add (bit_offset,
6411 tree_to_double_int (TREE_OPERAND (exp, 2)));
6412 break;
6413
6414 case COMPONENT_REF:
6415 {
6416 tree field = TREE_OPERAND (exp, 1);
6417 tree this_offset = component_ref_field_offset (exp);
6418
6419 /* If this field hasn't been filled in yet, don't go past it.
6420 This should only happen when folding expressions made during
6421 type construction. */
6422 if (this_offset == 0)
6423 break;
6424
6425 offset = size_binop (PLUS_EXPR, offset, this_offset);
6426 bit_offset = double_int_add (bit_offset,
6427 tree_to_double_int
6428 (DECL_FIELD_BIT_OFFSET (field)));
6429
6430 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6431 }
6432 break;
6433
6434 case ARRAY_REF:
6435 case ARRAY_RANGE_REF:
6436 {
6437 tree index = TREE_OPERAND (exp, 1);
6438 tree low_bound = array_ref_low_bound (exp);
6439 tree unit_size = array_ref_element_size (exp);
6440
6441 /* We assume all arrays have sizes that are a multiple of a byte.
6442 First subtract the lower bound, if any, in the type of the
6443 index, then convert to sizetype and multiply by the size of
6444 the array element. */
6445 if (! integer_zerop (low_bound))
6446 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6447 index, low_bound);
6448
6449 offset = size_binop (PLUS_EXPR, offset,
6450 size_binop (MULT_EXPR,
6451 fold_convert (sizetype, index),
6452 unit_size));
6453 }
6454 break;
6455
6456 case REALPART_EXPR:
6457 break;
6458
6459 case IMAGPART_EXPR:
6460 bit_offset = double_int_add (bit_offset,
6461 uhwi_to_double_int (*pbitsize));
6462 break;
6463
6464 case VIEW_CONVERT_EXPR:
6465 if (keep_aligning && STRICT_ALIGNMENT
6466 && (TYPE_ALIGN (TREE_TYPE (exp))
6467 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6468 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6469 < BIGGEST_ALIGNMENT)
6470 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6471 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6472 goto done;
6473 break;
6474
6475 case MEM_REF:
6476 /* Hand back the decl for MEM[&decl, off]. */
6477 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6478 {
6479 tree off = TREE_OPERAND (exp, 1);
6480 if (!integer_zerop (off))
6481 {
6482 double_int boff, coff = mem_ref_offset (exp);
6483 boff = double_int_lshift (coff,
6484 BITS_PER_UNIT == 8
6485 ? 3 : exact_log2 (BITS_PER_UNIT),
6486 HOST_BITS_PER_DOUBLE_INT, true);
6487 bit_offset = double_int_add (bit_offset, boff);
6488 }
6489 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6490 }
6491 goto done;
6492
6493 default:
6494 goto done;
6495 }
6496
6497 /* If any reference in the chain is volatile, the effect is volatile. */
6498 if (TREE_THIS_VOLATILE (exp))
6499 *pvolatilep = 1;
6500
6501 exp = TREE_OPERAND (exp, 0);
6502 }
6503 done:
6504
6505 /* If OFFSET is constant, see if we can return the whole thing as a
6506 constant bit position. Make sure to handle overflow during
6507 this conversion. */
6508 if (TREE_CODE (offset) == INTEGER_CST)
6509 {
6510 double_int tem = tree_to_double_int (offset);
6511 tem = double_int_sext (tem, TYPE_PRECISION (sizetype));
6512 tem = double_int_lshift (tem,
6513 BITS_PER_UNIT == 8
6514 ? 3 : exact_log2 (BITS_PER_UNIT),
6515 HOST_BITS_PER_DOUBLE_INT, true);
6516 tem = double_int_add (tem, bit_offset);
6517 if (double_int_fits_in_shwi_p (tem))
6518 {
6519 *pbitpos = double_int_to_shwi (tem);
6520 *poffset = offset = NULL_TREE;
6521 }
6522 }
6523
6524 /* Otherwise, split it up. */
6525 if (offset)
6526 {
6527 *pbitpos = double_int_to_shwi (bit_offset);
6528 *poffset = offset;
6529 }
6530
6531 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6532 if (mode == VOIDmode
6533 && blkmode_bitfield
6534 && (*pbitpos % BITS_PER_UNIT) == 0
6535 && (*pbitsize % BITS_PER_UNIT) == 0)
6536 *pmode = BLKmode;
6537 else
6538 *pmode = mode;
6539
6540 return exp;
6541 }
6542
6543 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6544 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6545 EXP is marked as PACKED. */
6546
6547 bool
6548 contains_packed_reference (const_tree exp)
6549 {
6550 bool packed_p = false;
6551
6552 while (1)
6553 {
6554 switch (TREE_CODE (exp))
6555 {
6556 case COMPONENT_REF:
6557 {
6558 tree field = TREE_OPERAND (exp, 1);
6559 packed_p = DECL_PACKED (field)
6560 || TYPE_PACKED (TREE_TYPE (field))
6561 || TYPE_PACKED (TREE_TYPE (exp));
6562 if (packed_p)
6563 goto done;
6564 }
6565 break;
6566
6567 case BIT_FIELD_REF:
6568 case ARRAY_REF:
6569 case ARRAY_RANGE_REF:
6570 case REALPART_EXPR:
6571 case IMAGPART_EXPR:
6572 case VIEW_CONVERT_EXPR:
6573 break;
6574
6575 default:
6576 goto done;
6577 }
6578 exp = TREE_OPERAND (exp, 0);
6579 }
6580 done:
6581 return packed_p;
6582 }
6583
6584 /* Return a tree of sizetype representing the size, in bytes, of the element
6585 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6586
6587 tree
6588 array_ref_element_size (tree exp)
6589 {
6590 tree aligned_size = TREE_OPERAND (exp, 3);
6591 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6592 location_t loc = EXPR_LOCATION (exp);
6593
6594 /* If a size was specified in the ARRAY_REF, it's the size measured
6595 in alignment units of the element type. So multiply by that value. */
6596 if (aligned_size)
6597 {
6598 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6599 sizetype from another type of the same width and signedness. */
6600 if (TREE_TYPE (aligned_size) != sizetype)
6601 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6602 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6603 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6604 }
6605
6606 /* Otherwise, take the size from that of the element type. Substitute
6607 any PLACEHOLDER_EXPR that we have. */
6608 else
6609 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6610 }
6611
6612 /* Return a tree representing the lower bound of the array mentioned in
6613 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6614
6615 tree
6616 array_ref_low_bound (tree exp)
6617 {
6618 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6619
6620 /* If a lower bound is specified in EXP, use it. */
6621 if (TREE_OPERAND (exp, 2))
6622 return TREE_OPERAND (exp, 2);
6623
6624 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6625 substituting for a PLACEHOLDER_EXPR as needed. */
6626 if (domain_type && TYPE_MIN_VALUE (domain_type))
6627 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6628
6629 /* Otherwise, return a zero of the appropriate type. */
6630 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6631 }
6632
6633 /* Return a tree representing the upper bound of the array mentioned in
6634 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6635
6636 tree
6637 array_ref_up_bound (tree exp)
6638 {
6639 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6640
6641 /* If there is a domain type and it has an upper bound, use it, substituting
6642 for a PLACEHOLDER_EXPR as needed. */
6643 if (domain_type && TYPE_MAX_VALUE (domain_type))
6644 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6645
6646 /* Otherwise fail. */
6647 return NULL_TREE;
6648 }
6649
6650 /* Return a tree representing the offset, in bytes, of the field referenced
6651 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6652
6653 tree
6654 component_ref_field_offset (tree exp)
6655 {
6656 tree aligned_offset = TREE_OPERAND (exp, 2);
6657 tree field = TREE_OPERAND (exp, 1);
6658 location_t loc = EXPR_LOCATION (exp);
6659
6660 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6661 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6662 value. */
6663 if (aligned_offset)
6664 {
6665 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6666 sizetype from another type of the same width and signedness. */
6667 if (TREE_TYPE (aligned_offset) != sizetype)
6668 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6669 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6670 size_int (DECL_OFFSET_ALIGN (field)
6671 / BITS_PER_UNIT));
6672 }
6673
6674 /* Otherwise, take the offset from that of the field. Substitute
6675 any PLACEHOLDER_EXPR that we have. */
6676 else
6677 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6678 }
6679
6680 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6681
6682 static unsigned HOST_WIDE_INT
6683 target_align (const_tree target)
6684 {
6685 /* We might have a chain of nested references with intermediate misaligning
6686 bitfields components, so need to recurse to find out. */
6687
6688 unsigned HOST_WIDE_INT this_align, outer_align;
6689
6690 switch (TREE_CODE (target))
6691 {
6692 case BIT_FIELD_REF:
6693 return 1;
6694
6695 case COMPONENT_REF:
6696 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6697 outer_align = target_align (TREE_OPERAND (target, 0));
6698 return MIN (this_align, outer_align);
6699
6700 case ARRAY_REF:
6701 case ARRAY_RANGE_REF:
6702 this_align = TYPE_ALIGN (TREE_TYPE (target));
6703 outer_align = target_align (TREE_OPERAND (target, 0));
6704 return MIN (this_align, outer_align);
6705
6706 CASE_CONVERT:
6707 case NON_LVALUE_EXPR:
6708 case VIEW_CONVERT_EXPR:
6709 this_align = TYPE_ALIGN (TREE_TYPE (target));
6710 outer_align = target_align (TREE_OPERAND (target, 0));
6711 return MAX (this_align, outer_align);
6712
6713 default:
6714 return TYPE_ALIGN (TREE_TYPE (target));
6715 }
6716 }
6717
6718 \f
6719 /* Given an rtx VALUE that may contain additions and multiplications, return
6720 an equivalent value that just refers to a register, memory, or constant.
6721 This is done by generating instructions to perform the arithmetic and
6722 returning a pseudo-register containing the value.
6723
6724 The returned value may be a REG, SUBREG, MEM or constant. */
6725
6726 rtx
6727 force_operand (rtx value, rtx target)
6728 {
6729 rtx op1, op2;
6730 /* Use subtarget as the target for operand 0 of a binary operation. */
6731 rtx subtarget = get_subtarget (target);
6732 enum rtx_code code = GET_CODE (value);
6733
6734 /* Check for subreg applied to an expression produced by loop optimizer. */
6735 if (code == SUBREG
6736 && !REG_P (SUBREG_REG (value))
6737 && !MEM_P (SUBREG_REG (value)))
6738 {
6739 value
6740 = simplify_gen_subreg (GET_MODE (value),
6741 force_reg (GET_MODE (SUBREG_REG (value)),
6742 force_operand (SUBREG_REG (value),
6743 NULL_RTX)),
6744 GET_MODE (SUBREG_REG (value)),
6745 SUBREG_BYTE (value));
6746 code = GET_CODE (value);
6747 }
6748
6749 /* Check for a PIC address load. */
6750 if ((code == PLUS || code == MINUS)
6751 && XEXP (value, 0) == pic_offset_table_rtx
6752 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6753 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6754 || GET_CODE (XEXP (value, 1)) == CONST))
6755 {
6756 if (!subtarget)
6757 subtarget = gen_reg_rtx (GET_MODE (value));
6758 emit_move_insn (subtarget, value);
6759 return subtarget;
6760 }
6761
6762 if (ARITHMETIC_P (value))
6763 {
6764 op2 = XEXP (value, 1);
6765 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6766 subtarget = 0;
6767 if (code == MINUS && CONST_INT_P (op2))
6768 {
6769 code = PLUS;
6770 op2 = negate_rtx (GET_MODE (value), op2);
6771 }
6772
6773 /* Check for an addition with OP2 a constant integer and our first
6774 operand a PLUS of a virtual register and something else. In that
6775 case, we want to emit the sum of the virtual register and the
6776 constant first and then add the other value. This allows virtual
6777 register instantiation to simply modify the constant rather than
6778 creating another one around this addition. */
6779 if (code == PLUS && CONST_INT_P (op2)
6780 && GET_CODE (XEXP (value, 0)) == PLUS
6781 && REG_P (XEXP (XEXP (value, 0), 0))
6782 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6783 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6784 {
6785 rtx temp = expand_simple_binop (GET_MODE (value), code,
6786 XEXP (XEXP (value, 0), 0), op2,
6787 subtarget, 0, OPTAB_LIB_WIDEN);
6788 return expand_simple_binop (GET_MODE (value), code, temp,
6789 force_operand (XEXP (XEXP (value,
6790 0), 1), 0),
6791 target, 0, OPTAB_LIB_WIDEN);
6792 }
6793
6794 op1 = force_operand (XEXP (value, 0), subtarget);
6795 op2 = force_operand (op2, NULL_RTX);
6796 switch (code)
6797 {
6798 case MULT:
6799 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6800 case DIV:
6801 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6802 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6803 target, 1, OPTAB_LIB_WIDEN);
6804 else
6805 return expand_divmod (0,
6806 FLOAT_MODE_P (GET_MODE (value))
6807 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6808 GET_MODE (value), op1, op2, target, 0);
6809 case MOD:
6810 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6811 target, 0);
6812 case UDIV:
6813 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6814 target, 1);
6815 case UMOD:
6816 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6817 target, 1);
6818 case ASHIFTRT:
6819 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6820 target, 0, OPTAB_LIB_WIDEN);
6821 default:
6822 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6823 target, 1, OPTAB_LIB_WIDEN);
6824 }
6825 }
6826 if (UNARY_P (value))
6827 {
6828 if (!target)
6829 target = gen_reg_rtx (GET_MODE (value));
6830 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6831 switch (code)
6832 {
6833 case ZERO_EXTEND:
6834 case SIGN_EXTEND:
6835 case TRUNCATE:
6836 case FLOAT_EXTEND:
6837 case FLOAT_TRUNCATE:
6838 convert_move (target, op1, code == ZERO_EXTEND);
6839 return target;
6840
6841 case FIX:
6842 case UNSIGNED_FIX:
6843 expand_fix (target, op1, code == UNSIGNED_FIX);
6844 return target;
6845
6846 case FLOAT:
6847 case UNSIGNED_FLOAT:
6848 expand_float (target, op1, code == UNSIGNED_FLOAT);
6849 return target;
6850
6851 default:
6852 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
6853 }
6854 }
6855
6856 #ifdef INSN_SCHEDULING
6857 /* On machines that have insn scheduling, we want all memory reference to be
6858 explicit, so we need to deal with such paradoxical SUBREGs. */
6859 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
6860 value
6861 = simplify_gen_subreg (GET_MODE (value),
6862 force_reg (GET_MODE (SUBREG_REG (value)),
6863 force_operand (SUBREG_REG (value),
6864 NULL_RTX)),
6865 GET_MODE (SUBREG_REG (value)),
6866 SUBREG_BYTE (value));
6867 #endif
6868
6869 return value;
6870 }
6871 \f
6872 /* Subroutine of expand_expr: return nonzero iff there is no way that
6873 EXP can reference X, which is being modified. TOP_P is nonzero if this
6874 call is going to be used to determine whether we need a temporary
6875 for EXP, as opposed to a recursive call to this function.
6876
6877 It is always safe for this routine to return zero since it merely
6878 searches for optimization opportunities. */
6879
6880 int
6881 safe_from_p (const_rtx x, tree exp, int top_p)
6882 {
6883 rtx exp_rtl = 0;
6884 int i, nops;
6885
6886 if (x == 0
6887 /* If EXP has varying size, we MUST use a target since we currently
6888 have no way of allocating temporaries of variable size
6889 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
6890 So we assume here that something at a higher level has prevented a
6891 clash. This is somewhat bogus, but the best we can do. Only
6892 do this when X is BLKmode and when we are at the top level. */
6893 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
6894 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
6895 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
6896 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
6897 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
6898 != INTEGER_CST)
6899 && GET_MODE (x) == BLKmode)
6900 /* If X is in the outgoing argument area, it is always safe. */
6901 || (MEM_P (x)
6902 && (XEXP (x, 0) == virtual_outgoing_args_rtx
6903 || (GET_CODE (XEXP (x, 0)) == PLUS
6904 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
6905 return 1;
6906
6907 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
6908 find the underlying pseudo. */
6909 if (GET_CODE (x) == SUBREG)
6910 {
6911 x = SUBREG_REG (x);
6912 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6913 return 0;
6914 }
6915
6916 /* Now look at our tree code and possibly recurse. */
6917 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
6918 {
6919 case tcc_declaration:
6920 exp_rtl = DECL_RTL_IF_SET (exp);
6921 break;
6922
6923 case tcc_constant:
6924 return 1;
6925
6926 case tcc_exceptional:
6927 if (TREE_CODE (exp) == TREE_LIST)
6928 {
6929 while (1)
6930 {
6931 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
6932 return 0;
6933 exp = TREE_CHAIN (exp);
6934 if (!exp)
6935 return 1;
6936 if (TREE_CODE (exp) != TREE_LIST)
6937 return safe_from_p (x, exp, 0);
6938 }
6939 }
6940 else if (TREE_CODE (exp) == CONSTRUCTOR)
6941 {
6942 constructor_elt *ce;
6943 unsigned HOST_WIDE_INT idx;
6944
6945 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
6946 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
6947 || !safe_from_p (x, ce->value, 0))
6948 return 0;
6949 return 1;
6950 }
6951 else if (TREE_CODE (exp) == ERROR_MARK)
6952 return 1; /* An already-visited SAVE_EXPR? */
6953 else
6954 return 0;
6955
6956 case tcc_statement:
6957 /* The only case we look at here is the DECL_INITIAL inside a
6958 DECL_EXPR. */
6959 return (TREE_CODE (exp) != DECL_EXPR
6960 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
6961 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
6962 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
6963
6964 case tcc_binary:
6965 case tcc_comparison:
6966 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
6967 return 0;
6968 /* Fall through. */
6969
6970 case tcc_unary:
6971 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6972
6973 case tcc_expression:
6974 case tcc_reference:
6975 case tcc_vl_exp:
6976 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
6977 the expression. If it is set, we conflict iff we are that rtx or
6978 both are in memory. Otherwise, we check all operands of the
6979 expression recursively. */
6980
6981 switch (TREE_CODE (exp))
6982 {
6983 case ADDR_EXPR:
6984 /* If the operand is static or we are static, we can't conflict.
6985 Likewise if we don't conflict with the operand at all. */
6986 if (staticp (TREE_OPERAND (exp, 0))
6987 || TREE_STATIC (exp)
6988 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
6989 return 1;
6990
6991 /* Otherwise, the only way this can conflict is if we are taking
6992 the address of a DECL a that address if part of X, which is
6993 very rare. */
6994 exp = TREE_OPERAND (exp, 0);
6995 if (DECL_P (exp))
6996 {
6997 if (!DECL_RTL_SET_P (exp)
6998 || !MEM_P (DECL_RTL (exp)))
6999 return 0;
7000 else
7001 exp_rtl = XEXP (DECL_RTL (exp), 0);
7002 }
7003 break;
7004
7005 case MEM_REF:
7006 if (MEM_P (x)
7007 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7008 get_alias_set (exp)))
7009 return 0;
7010 break;
7011
7012 case CALL_EXPR:
7013 /* Assume that the call will clobber all hard registers and
7014 all of memory. */
7015 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7016 || MEM_P (x))
7017 return 0;
7018 break;
7019
7020 case WITH_CLEANUP_EXPR:
7021 case CLEANUP_POINT_EXPR:
7022 /* Lowered by gimplify.c. */
7023 gcc_unreachable ();
7024
7025 case SAVE_EXPR:
7026 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7027
7028 default:
7029 break;
7030 }
7031
7032 /* If we have an rtx, we do not need to scan our operands. */
7033 if (exp_rtl)
7034 break;
7035
7036 nops = TREE_OPERAND_LENGTH (exp);
7037 for (i = 0; i < nops; i++)
7038 if (TREE_OPERAND (exp, i) != 0
7039 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7040 return 0;
7041
7042 break;
7043
7044 case tcc_type:
7045 /* Should never get a type here. */
7046 gcc_unreachable ();
7047 }
7048
7049 /* If we have an rtl, find any enclosed object. Then see if we conflict
7050 with it. */
7051 if (exp_rtl)
7052 {
7053 if (GET_CODE (exp_rtl) == SUBREG)
7054 {
7055 exp_rtl = SUBREG_REG (exp_rtl);
7056 if (REG_P (exp_rtl)
7057 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7058 return 0;
7059 }
7060
7061 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7062 are memory and they conflict. */
7063 return ! (rtx_equal_p (x, exp_rtl)
7064 || (MEM_P (x) && MEM_P (exp_rtl)
7065 && true_dependence (exp_rtl, VOIDmode, x,
7066 rtx_addr_varies_p)));
7067 }
7068
7069 /* If we reach here, it is safe. */
7070 return 1;
7071 }
7072
7073 \f
7074 /* Return the highest power of two that EXP is known to be a multiple of.
7075 This is used in updating alignment of MEMs in array references. */
7076
7077 unsigned HOST_WIDE_INT
7078 highest_pow2_factor (const_tree exp)
7079 {
7080 unsigned HOST_WIDE_INT c0, c1;
7081
7082 switch (TREE_CODE (exp))
7083 {
7084 case INTEGER_CST:
7085 /* We can find the lowest bit that's a one. If the low
7086 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7087 We need to handle this case since we can find it in a COND_EXPR,
7088 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7089 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7090 later ICE. */
7091 if (TREE_OVERFLOW (exp))
7092 return BIGGEST_ALIGNMENT;
7093 else
7094 {
7095 /* Note: tree_low_cst is intentionally not used here,
7096 we don't care about the upper bits. */
7097 c0 = TREE_INT_CST_LOW (exp);
7098 c0 &= -c0;
7099 return c0 ? c0 : BIGGEST_ALIGNMENT;
7100 }
7101 break;
7102
7103 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7104 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7105 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7106 return MIN (c0, c1);
7107
7108 case MULT_EXPR:
7109 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7110 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7111 return c0 * c1;
7112
7113 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7114 case CEIL_DIV_EXPR:
7115 if (integer_pow2p (TREE_OPERAND (exp, 1))
7116 && host_integerp (TREE_OPERAND (exp, 1), 1))
7117 {
7118 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7119 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7120 return MAX (1, c0 / c1);
7121 }
7122 break;
7123
7124 case BIT_AND_EXPR:
7125 /* The highest power of two of a bit-and expression is the maximum of
7126 that of its operands. We typically get here for a complex LHS and
7127 a constant negative power of two on the RHS to force an explicit
7128 alignment, so don't bother looking at the LHS. */
7129 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7130
7131 CASE_CONVERT:
7132 case SAVE_EXPR:
7133 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7134
7135 case COMPOUND_EXPR:
7136 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7137
7138 case COND_EXPR:
7139 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7140 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7141 return MIN (c0, c1);
7142
7143 default:
7144 break;
7145 }
7146
7147 return 1;
7148 }
7149
7150 /* Similar, except that the alignment requirements of TARGET are
7151 taken into account. Assume it is at least as aligned as its
7152 type, unless it is a COMPONENT_REF in which case the layout of
7153 the structure gives the alignment. */
7154
7155 static unsigned HOST_WIDE_INT
7156 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7157 {
7158 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7159 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7160
7161 return MAX (factor, talign);
7162 }
7163 \f
7164 /* Subroutine of expand_expr. Expand the two operands of a binary
7165 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7166 The value may be stored in TARGET if TARGET is nonzero. The
7167 MODIFIER argument is as documented by expand_expr. */
7168
7169 static void
7170 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7171 enum expand_modifier modifier)
7172 {
7173 if (! safe_from_p (target, exp1, 1))
7174 target = 0;
7175 if (operand_equal_p (exp0, exp1, 0))
7176 {
7177 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7178 *op1 = copy_rtx (*op0);
7179 }
7180 else
7181 {
7182 /* If we need to preserve evaluation order, copy exp0 into its own
7183 temporary variable so that it can't be clobbered by exp1. */
7184 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7185 exp0 = save_expr (exp0);
7186 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7187 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7188 }
7189 }
7190
7191 \f
7192 /* Return a MEM that contains constant EXP. DEFER is as for
7193 output_constant_def and MODIFIER is as for expand_expr. */
7194
7195 static rtx
7196 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7197 {
7198 rtx mem;
7199
7200 mem = output_constant_def (exp, defer);
7201 if (modifier != EXPAND_INITIALIZER)
7202 mem = use_anchored_address (mem);
7203 return mem;
7204 }
7205
7206 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7207 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7208
7209 static rtx
7210 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7211 enum expand_modifier modifier, addr_space_t as)
7212 {
7213 rtx result, subtarget;
7214 tree inner, offset;
7215 HOST_WIDE_INT bitsize, bitpos;
7216 int volatilep, unsignedp;
7217 enum machine_mode mode1;
7218
7219 /* If we are taking the address of a constant and are at the top level,
7220 we have to use output_constant_def since we can't call force_const_mem
7221 at top level. */
7222 /* ??? This should be considered a front-end bug. We should not be
7223 generating ADDR_EXPR of something that isn't an LVALUE. The only
7224 exception here is STRING_CST. */
7225 if (CONSTANT_CLASS_P (exp))
7226 return XEXP (expand_expr_constant (exp, 0, modifier), 0);
7227
7228 /* Everything must be something allowed by is_gimple_addressable. */
7229 switch (TREE_CODE (exp))
7230 {
7231 case INDIRECT_REF:
7232 /* This case will happen via recursion for &a->b. */
7233 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7234
7235 case MEM_REF:
7236 {
7237 tree tem = TREE_OPERAND (exp, 0);
7238 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7239 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7240 return expand_expr (tem, target, tmode, modifier);
7241 }
7242
7243 case CONST_DECL:
7244 /* Expand the initializer like constants above. */
7245 return XEXP (expand_expr_constant (DECL_INITIAL (exp), 0, modifier), 0);
7246
7247 case REALPART_EXPR:
7248 /* The real part of the complex number is always first, therefore
7249 the address is the same as the address of the parent object. */
7250 offset = 0;
7251 bitpos = 0;
7252 inner = TREE_OPERAND (exp, 0);
7253 break;
7254
7255 case IMAGPART_EXPR:
7256 /* The imaginary part of the complex number is always second.
7257 The expression is therefore always offset by the size of the
7258 scalar type. */
7259 offset = 0;
7260 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7261 inner = TREE_OPERAND (exp, 0);
7262 break;
7263
7264 default:
7265 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7266 expand_expr, as that can have various side effects; LABEL_DECLs for
7267 example, may not have their DECL_RTL set yet. Expand the rtl of
7268 CONSTRUCTORs too, which should yield a memory reference for the
7269 constructor's contents. Assume language specific tree nodes can
7270 be expanded in some interesting way. */
7271 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7272 if (DECL_P (exp)
7273 || TREE_CODE (exp) == CONSTRUCTOR
7274 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7275 {
7276 result = expand_expr (exp, target, tmode,
7277 modifier == EXPAND_INITIALIZER
7278 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7279
7280 /* If the DECL isn't in memory, then the DECL wasn't properly
7281 marked TREE_ADDRESSABLE, which will be either a front-end
7282 or a tree optimizer bug. */
7283
7284 if (TREE_ADDRESSABLE (exp)
7285 && ! MEM_P (result)
7286 && ! targetm.calls.allocate_stack_slots_for_args())
7287 {
7288 error ("local frame unavailable (naked function?)");
7289 return result;
7290 }
7291 else
7292 gcc_assert (MEM_P (result));
7293 result = XEXP (result, 0);
7294
7295 /* ??? Is this needed anymore? */
7296 if (DECL_P (exp) && !TREE_USED (exp) == 0)
7297 {
7298 assemble_external (exp);
7299 TREE_USED (exp) = 1;
7300 }
7301
7302 if (modifier != EXPAND_INITIALIZER
7303 && modifier != EXPAND_CONST_ADDRESS)
7304 result = force_operand (result, target);
7305 return result;
7306 }
7307
7308 /* Pass FALSE as the last argument to get_inner_reference although
7309 we are expanding to RTL. The rationale is that we know how to
7310 handle "aligning nodes" here: we can just bypass them because
7311 they won't change the final object whose address will be returned
7312 (they actually exist only for that purpose). */
7313 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7314 &mode1, &unsignedp, &volatilep, false);
7315 break;
7316 }
7317
7318 /* We must have made progress. */
7319 gcc_assert (inner != exp);
7320
7321 subtarget = offset || bitpos ? NULL_RTX : target;
7322 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7323 inner alignment, force the inner to be sufficiently aligned. */
7324 if (CONSTANT_CLASS_P (inner)
7325 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7326 {
7327 inner = copy_node (inner);
7328 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7329 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7330 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7331 }
7332 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7333
7334 if (offset)
7335 {
7336 rtx tmp;
7337
7338 if (modifier != EXPAND_NORMAL)
7339 result = force_operand (result, NULL);
7340 tmp = expand_expr (offset, NULL_RTX, tmode,
7341 modifier == EXPAND_INITIALIZER
7342 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7343
7344 result = convert_memory_address_addr_space (tmode, result, as);
7345 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7346
7347 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7348 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7349 else
7350 {
7351 subtarget = bitpos ? NULL_RTX : target;
7352 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7353 1, OPTAB_LIB_WIDEN);
7354 }
7355 }
7356
7357 if (bitpos)
7358 {
7359 /* Someone beforehand should have rejected taking the address
7360 of such an object. */
7361 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7362
7363 result = plus_constant (result, bitpos / BITS_PER_UNIT);
7364 if (modifier < EXPAND_SUM)
7365 result = force_operand (result, target);
7366 }
7367
7368 return result;
7369 }
7370
7371 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7372 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7373
7374 static rtx
7375 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7376 enum expand_modifier modifier)
7377 {
7378 addr_space_t as = ADDR_SPACE_GENERIC;
7379 enum machine_mode address_mode = Pmode;
7380 enum machine_mode pointer_mode = ptr_mode;
7381 enum machine_mode rmode;
7382 rtx result;
7383
7384 /* Target mode of VOIDmode says "whatever's natural". */
7385 if (tmode == VOIDmode)
7386 tmode = TYPE_MODE (TREE_TYPE (exp));
7387
7388 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7389 {
7390 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7391 address_mode = targetm.addr_space.address_mode (as);
7392 pointer_mode = targetm.addr_space.pointer_mode (as);
7393 }
7394
7395 /* We can get called with some Weird Things if the user does silliness
7396 like "(short) &a". In that case, convert_memory_address won't do
7397 the right thing, so ignore the given target mode. */
7398 if (tmode != address_mode && tmode != pointer_mode)
7399 tmode = address_mode;
7400
7401 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7402 tmode, modifier, as);
7403
7404 /* Despite expand_expr claims concerning ignoring TMODE when not
7405 strictly convenient, stuff breaks if we don't honor it. Note
7406 that combined with the above, we only do this for pointer modes. */
7407 rmode = GET_MODE (result);
7408 if (rmode == VOIDmode)
7409 rmode = tmode;
7410 if (rmode != tmode)
7411 result = convert_memory_address_addr_space (tmode, result, as);
7412
7413 return result;
7414 }
7415
7416 /* Generate code for computing CONSTRUCTOR EXP.
7417 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7418 is TRUE, instead of creating a temporary variable in memory
7419 NULL is returned and the caller needs to handle it differently. */
7420
7421 static rtx
7422 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7423 bool avoid_temp_mem)
7424 {
7425 tree type = TREE_TYPE (exp);
7426 enum machine_mode mode = TYPE_MODE (type);
7427
7428 /* Try to avoid creating a temporary at all. This is possible
7429 if all of the initializer is zero.
7430 FIXME: try to handle all [0..255] initializers we can handle
7431 with memset. */
7432 if (TREE_STATIC (exp)
7433 && !TREE_ADDRESSABLE (exp)
7434 && target != 0 && mode == BLKmode
7435 && all_zeros_p (exp))
7436 {
7437 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7438 return target;
7439 }
7440
7441 /* All elts simple constants => refer to a constant in memory. But
7442 if this is a non-BLKmode mode, let it store a field at a time
7443 since that should make a CONST_INT or CONST_DOUBLE when we
7444 fold. Likewise, if we have a target we can use, it is best to
7445 store directly into the target unless the type is large enough
7446 that memcpy will be used. If we are making an initializer and
7447 all operands are constant, put it in memory as well.
7448
7449 FIXME: Avoid trying to fill vector constructors piece-meal.
7450 Output them with output_constant_def below unless we're sure
7451 they're zeros. This should go away when vector initializers
7452 are treated like VECTOR_CST instead of arrays. */
7453 if ((TREE_STATIC (exp)
7454 && ((mode == BLKmode
7455 && ! (target != 0 && safe_from_p (target, exp, 1)))
7456 || TREE_ADDRESSABLE (exp)
7457 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7458 && (! MOVE_BY_PIECES_P
7459 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7460 TYPE_ALIGN (type)))
7461 && ! mostly_zeros_p (exp))))
7462 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7463 && TREE_CONSTANT (exp)))
7464 {
7465 rtx constructor;
7466
7467 if (avoid_temp_mem)
7468 return NULL_RTX;
7469
7470 constructor = expand_expr_constant (exp, 1, modifier);
7471
7472 if (modifier != EXPAND_CONST_ADDRESS
7473 && modifier != EXPAND_INITIALIZER
7474 && modifier != EXPAND_SUM)
7475 constructor = validize_mem (constructor);
7476
7477 return constructor;
7478 }
7479
7480 /* Handle calls that pass values in multiple non-contiguous
7481 locations. The Irix 6 ABI has examples of this. */
7482 if (target == 0 || ! safe_from_p (target, exp, 1)
7483 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7484 {
7485 if (avoid_temp_mem)
7486 return NULL_RTX;
7487
7488 target
7489 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7490 | (TREE_READONLY (exp)
7491 * TYPE_QUAL_CONST))),
7492 0, TREE_ADDRESSABLE (exp), 1);
7493 }
7494
7495 store_constructor (exp, target, 0, int_expr_size (exp));
7496 return target;
7497 }
7498
7499
7500 /* expand_expr: generate code for computing expression EXP.
7501 An rtx for the computed value is returned. The value is never null.
7502 In the case of a void EXP, const0_rtx is returned.
7503
7504 The value may be stored in TARGET if TARGET is nonzero.
7505 TARGET is just a suggestion; callers must assume that
7506 the rtx returned may not be the same as TARGET.
7507
7508 If TARGET is CONST0_RTX, it means that the value will be ignored.
7509
7510 If TMODE is not VOIDmode, it suggests generating the
7511 result in mode TMODE. But this is done only when convenient.
7512 Otherwise, TMODE is ignored and the value generated in its natural mode.
7513 TMODE is just a suggestion; callers must assume that
7514 the rtx returned may not have mode TMODE.
7515
7516 Note that TARGET may have neither TMODE nor MODE. In that case, it
7517 probably will not be used.
7518
7519 If MODIFIER is EXPAND_SUM then when EXP is an addition
7520 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7521 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7522 products as above, or REG or MEM, or constant.
7523 Ordinarily in such cases we would output mul or add instructions
7524 and then return a pseudo reg containing the sum.
7525
7526 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7527 it also marks a label as absolutely required (it can't be dead).
7528 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7529 This is used for outputting expressions used in initializers.
7530
7531 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7532 with a constant address even if that address is not normally legitimate.
7533 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7534
7535 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7536 a call parameter. Such targets require special care as we haven't yet
7537 marked TARGET so that it's safe from being trashed by libcalls. We
7538 don't want to use TARGET for anything but the final result;
7539 Intermediate values must go elsewhere. Additionally, calls to
7540 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7541
7542 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7543 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7544 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7545 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7546 recursively. */
7547
7548 rtx
7549 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7550 enum expand_modifier modifier, rtx *alt_rtl)
7551 {
7552 rtx ret;
7553
7554 /* Handle ERROR_MARK before anybody tries to access its type. */
7555 if (TREE_CODE (exp) == ERROR_MARK
7556 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7557 {
7558 ret = CONST0_RTX (tmode);
7559 return ret ? ret : const0_rtx;
7560 }
7561
7562 /* If this is an expression of some kind and it has an associated line
7563 number, then emit the line number before expanding the expression.
7564
7565 We need to save and restore the file and line information so that
7566 errors discovered during expansion are emitted with the right
7567 information. It would be better of the diagnostic routines
7568 used the file/line information embedded in the tree nodes rather
7569 than globals. */
7570 if (cfun && EXPR_HAS_LOCATION (exp))
7571 {
7572 location_t saved_location = input_location;
7573 location_t saved_curr_loc = get_curr_insn_source_location ();
7574 tree saved_block = get_curr_insn_block ();
7575 input_location = EXPR_LOCATION (exp);
7576 set_curr_insn_source_location (input_location);
7577
7578 /* Record where the insns produced belong. */
7579 set_curr_insn_block (TREE_BLOCK (exp));
7580
7581 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7582
7583 input_location = saved_location;
7584 set_curr_insn_block (saved_block);
7585 set_curr_insn_source_location (saved_curr_loc);
7586 }
7587 else
7588 {
7589 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7590 }
7591
7592 return ret;
7593 }
7594
7595 rtx
7596 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7597 enum expand_modifier modifier)
7598 {
7599 rtx op0, op1, op2, temp;
7600 tree type;
7601 int unsignedp;
7602 enum machine_mode mode;
7603 enum tree_code code = ops->code;
7604 optab this_optab;
7605 rtx subtarget, original_target;
7606 int ignore;
7607 bool reduce_bit_field;
7608 location_t loc = ops->location;
7609 tree treeop0, treeop1, treeop2;
7610 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7611 ? reduce_to_bit_field_precision ((expr), \
7612 target, \
7613 type) \
7614 : (expr))
7615
7616 type = ops->type;
7617 mode = TYPE_MODE (type);
7618 unsignedp = TYPE_UNSIGNED (type);
7619
7620 treeop0 = ops->op0;
7621 treeop1 = ops->op1;
7622 treeop2 = ops->op2;
7623
7624 /* We should be called only on simple (binary or unary) expressions,
7625 exactly those that are valid in gimple expressions that aren't
7626 GIMPLE_SINGLE_RHS (or invalid). */
7627 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7628 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7629 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7630
7631 ignore = (target == const0_rtx
7632 || ((CONVERT_EXPR_CODE_P (code)
7633 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7634 && TREE_CODE (type) == VOID_TYPE));
7635
7636 /* We should be called only if we need the result. */
7637 gcc_assert (!ignore);
7638
7639 /* An operation in what may be a bit-field type needs the
7640 result to be reduced to the precision of the bit-field type,
7641 which is narrower than that of the type's mode. */
7642 reduce_bit_field = (INTEGRAL_TYPE_P (type)
7643 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7644
7645 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7646 target = 0;
7647
7648 /* Use subtarget as the target for operand 0 of a binary operation. */
7649 subtarget = get_subtarget (target);
7650 original_target = target;
7651
7652 switch (code)
7653 {
7654 case NON_LVALUE_EXPR:
7655 case PAREN_EXPR:
7656 CASE_CONVERT:
7657 if (treeop0 == error_mark_node)
7658 return const0_rtx;
7659
7660 if (TREE_CODE (type) == UNION_TYPE)
7661 {
7662 tree valtype = TREE_TYPE (treeop0);
7663
7664 /* If both input and output are BLKmode, this conversion isn't doing
7665 anything except possibly changing memory attribute. */
7666 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7667 {
7668 rtx result = expand_expr (treeop0, target, tmode,
7669 modifier);
7670
7671 result = copy_rtx (result);
7672 set_mem_attributes (result, type, 0);
7673 return result;
7674 }
7675
7676 if (target == 0)
7677 {
7678 if (TYPE_MODE (type) != BLKmode)
7679 target = gen_reg_rtx (TYPE_MODE (type));
7680 else
7681 target = assign_temp (type, 0, 1, 1);
7682 }
7683
7684 if (MEM_P (target))
7685 /* Store data into beginning of memory target. */
7686 store_expr (treeop0,
7687 adjust_address (target, TYPE_MODE (valtype), 0),
7688 modifier == EXPAND_STACK_PARM,
7689 false);
7690
7691 else
7692 {
7693 gcc_assert (REG_P (target));
7694
7695 /* Store this field into a union of the proper type. */
7696 store_field (target,
7697 MIN ((int_size_in_bytes (TREE_TYPE
7698 (treeop0))
7699 * BITS_PER_UNIT),
7700 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7701 0, 0, 0, TYPE_MODE (valtype), treeop0,
7702 type, 0, false);
7703 }
7704
7705 /* Return the entire union. */
7706 return target;
7707 }
7708
7709 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
7710 {
7711 op0 = expand_expr (treeop0, target, VOIDmode,
7712 modifier);
7713
7714 /* If the signedness of the conversion differs and OP0 is
7715 a promoted SUBREG, clear that indication since we now
7716 have to do the proper extension. */
7717 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
7718 && GET_CODE (op0) == SUBREG)
7719 SUBREG_PROMOTED_VAR_P (op0) = 0;
7720
7721 return REDUCE_BIT_FIELD (op0);
7722 }
7723
7724 op0 = expand_expr (treeop0, NULL_RTX, mode,
7725 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
7726 if (GET_MODE (op0) == mode)
7727 ;
7728
7729 /* If OP0 is a constant, just convert it into the proper mode. */
7730 else if (CONSTANT_P (op0))
7731 {
7732 tree inner_type = TREE_TYPE (treeop0);
7733 enum machine_mode inner_mode = GET_MODE (op0);
7734
7735 if (inner_mode == VOIDmode)
7736 inner_mode = TYPE_MODE (inner_type);
7737
7738 if (modifier == EXPAND_INITIALIZER)
7739 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7740 subreg_lowpart_offset (mode,
7741 inner_mode));
7742 else
7743 op0= convert_modes (mode, inner_mode, op0,
7744 TYPE_UNSIGNED (inner_type));
7745 }
7746
7747 else if (modifier == EXPAND_INITIALIZER)
7748 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7749
7750 else if (target == 0)
7751 op0 = convert_to_mode (mode, op0,
7752 TYPE_UNSIGNED (TREE_TYPE
7753 (treeop0)));
7754 else
7755 {
7756 convert_move (target, op0,
7757 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7758 op0 = target;
7759 }
7760
7761 return REDUCE_BIT_FIELD (op0);
7762
7763 case ADDR_SPACE_CONVERT_EXPR:
7764 {
7765 tree treeop0_type = TREE_TYPE (treeop0);
7766 addr_space_t as_to;
7767 addr_space_t as_from;
7768
7769 gcc_assert (POINTER_TYPE_P (type));
7770 gcc_assert (POINTER_TYPE_P (treeop0_type));
7771
7772 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
7773 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
7774
7775 /* Conversions between pointers to the same address space should
7776 have been implemented via CONVERT_EXPR / NOP_EXPR. */
7777 gcc_assert (as_to != as_from);
7778
7779 /* Ask target code to handle conversion between pointers
7780 to overlapping address spaces. */
7781 if (targetm.addr_space.subset_p (as_to, as_from)
7782 || targetm.addr_space.subset_p (as_from, as_to))
7783 {
7784 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
7785 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
7786 gcc_assert (op0);
7787 return op0;
7788 }
7789
7790 /* For disjoint address spaces, converting anything but
7791 a null pointer invokes undefined behaviour. We simply
7792 always return a null pointer here. */
7793 return CONST0_RTX (mode);
7794 }
7795
7796 case POINTER_PLUS_EXPR:
7797 /* Even though the sizetype mode and the pointer's mode can be different
7798 expand is able to handle this correctly and get the correct result out
7799 of the PLUS_EXPR code. */
7800 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
7801 if sizetype precision is smaller than pointer precision. */
7802 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
7803 treeop1 = fold_convert_loc (loc, type,
7804 fold_convert_loc (loc, ssizetype,
7805 treeop1));
7806 case PLUS_EXPR:
7807 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7808 something else, make sure we add the register to the constant and
7809 then to the other thing. This case can occur during strength
7810 reduction and doing it this way will produce better code if the
7811 frame pointer or argument pointer is eliminated.
7812
7813 fold-const.c will ensure that the constant is always in the inner
7814 PLUS_EXPR, so the only case we need to do anything about is if
7815 sp, ap, or fp is our second argument, in which case we must swap
7816 the innermost first argument and our second argument. */
7817
7818 if (TREE_CODE (treeop0) == PLUS_EXPR
7819 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
7820 && TREE_CODE (treeop1) == VAR_DECL
7821 && (DECL_RTL (treeop1) == frame_pointer_rtx
7822 || DECL_RTL (treeop1) == stack_pointer_rtx
7823 || DECL_RTL (treeop1) == arg_pointer_rtx))
7824 {
7825 tree t = treeop1;
7826
7827 treeop1 = TREE_OPERAND (treeop0, 0);
7828 TREE_OPERAND (treeop0, 0) = t;
7829 }
7830
7831 /* If the result is to be ptr_mode and we are adding an integer to
7832 something, we might be forming a constant. So try to use
7833 plus_constant. If it produces a sum and we can't accept it,
7834 use force_operand. This allows P = &ARR[const] to generate
7835 efficient code on machines where a SYMBOL_REF is not a valid
7836 address.
7837
7838 If this is an EXPAND_SUM call, always return the sum. */
7839 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7840 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
7841 {
7842 if (modifier == EXPAND_STACK_PARM)
7843 target = 0;
7844 if (TREE_CODE (treeop0) == INTEGER_CST
7845 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7846 && TREE_CONSTANT (treeop1))
7847 {
7848 rtx constant_part;
7849
7850 op1 = expand_expr (treeop1, subtarget, VOIDmode,
7851 EXPAND_SUM);
7852 /* Use immed_double_const to ensure that the constant is
7853 truncated according to the mode of OP1, then sign extended
7854 to a HOST_WIDE_INT. Using the constant directly can result
7855 in non-canonical RTL in a 64x32 cross compile. */
7856 constant_part
7857 = immed_double_const (TREE_INT_CST_LOW (treeop0),
7858 (HOST_WIDE_INT) 0,
7859 TYPE_MODE (TREE_TYPE (treeop1)));
7860 op1 = plus_constant (op1, INTVAL (constant_part));
7861 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7862 op1 = force_operand (op1, target);
7863 return REDUCE_BIT_FIELD (op1);
7864 }
7865
7866 else if (TREE_CODE (treeop1) == INTEGER_CST
7867 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7868 && TREE_CONSTANT (treeop0))
7869 {
7870 rtx constant_part;
7871
7872 op0 = expand_expr (treeop0, subtarget, VOIDmode,
7873 (modifier == EXPAND_INITIALIZER
7874 ? EXPAND_INITIALIZER : EXPAND_SUM));
7875 if (! CONSTANT_P (op0))
7876 {
7877 op1 = expand_expr (treeop1, NULL_RTX,
7878 VOIDmode, modifier);
7879 /* Return a PLUS if modifier says it's OK. */
7880 if (modifier == EXPAND_SUM
7881 || modifier == EXPAND_INITIALIZER)
7882 return simplify_gen_binary (PLUS, mode, op0, op1);
7883 goto binop2;
7884 }
7885 /* Use immed_double_const to ensure that the constant is
7886 truncated according to the mode of OP1, then sign extended
7887 to a HOST_WIDE_INT. Using the constant directly can result
7888 in non-canonical RTL in a 64x32 cross compile. */
7889 constant_part
7890 = immed_double_const (TREE_INT_CST_LOW (treeop1),
7891 (HOST_WIDE_INT) 0,
7892 TYPE_MODE (TREE_TYPE (treeop0)));
7893 op0 = plus_constant (op0, INTVAL (constant_part));
7894 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7895 op0 = force_operand (op0, target);
7896 return REDUCE_BIT_FIELD (op0);
7897 }
7898 }
7899
7900 /* Use TER to expand pointer addition of a negated value
7901 as pointer subtraction. */
7902 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
7903 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
7904 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
7905 && TREE_CODE (treeop1) == SSA_NAME
7906 && TYPE_MODE (TREE_TYPE (treeop0))
7907 == TYPE_MODE (TREE_TYPE (treeop1)))
7908 {
7909 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
7910 if (def)
7911 {
7912 treeop1 = gimple_assign_rhs1 (def);
7913 code = MINUS_EXPR;
7914 goto do_minus;
7915 }
7916 }
7917
7918 /* No sense saving up arithmetic to be done
7919 if it's all in the wrong mode to form part of an address.
7920 And force_operand won't know whether to sign-extend or
7921 zero-extend. */
7922 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7923 || mode != ptr_mode)
7924 {
7925 expand_operands (treeop0, treeop1,
7926 subtarget, &op0, &op1, EXPAND_NORMAL);
7927 if (op0 == const0_rtx)
7928 return op1;
7929 if (op1 == const0_rtx)
7930 return op0;
7931 goto binop2;
7932 }
7933
7934 expand_operands (treeop0, treeop1,
7935 subtarget, &op0, &op1, modifier);
7936 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7937
7938 case MINUS_EXPR:
7939 do_minus:
7940 /* For initializers, we are allowed to return a MINUS of two
7941 symbolic constants. Here we handle all cases when both operands
7942 are constant. */
7943 /* Handle difference of two symbolic constants,
7944 for the sake of an initializer. */
7945 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7946 && really_constant_p (treeop0)
7947 && really_constant_p (treeop1))
7948 {
7949 expand_operands (treeop0, treeop1,
7950 NULL_RTX, &op0, &op1, modifier);
7951
7952 /* If the last operand is a CONST_INT, use plus_constant of
7953 the negated constant. Else make the MINUS. */
7954 if (CONST_INT_P (op1))
7955 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
7956 else
7957 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
7958 }
7959
7960 /* No sense saving up arithmetic to be done
7961 if it's all in the wrong mode to form part of an address.
7962 And force_operand won't know whether to sign-extend or
7963 zero-extend. */
7964 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7965 || mode != ptr_mode)
7966 goto binop;
7967
7968 expand_operands (treeop0, treeop1,
7969 subtarget, &op0, &op1, modifier);
7970
7971 /* Convert A - const to A + (-const). */
7972 if (CONST_INT_P (op1))
7973 {
7974 op1 = negate_rtx (mode, op1);
7975 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7976 }
7977
7978 goto binop2;
7979
7980 case WIDEN_MULT_PLUS_EXPR:
7981 case WIDEN_MULT_MINUS_EXPR:
7982 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
7983 op2 = expand_normal (treeop2);
7984 target = expand_widen_pattern_expr (ops, op0, op1, op2,
7985 target, unsignedp);
7986 return target;
7987
7988 case WIDEN_MULT_EXPR:
7989 /* If first operand is constant, swap them.
7990 Thus the following special case checks need only
7991 check the second operand. */
7992 if (TREE_CODE (treeop0) == INTEGER_CST)
7993 {
7994 tree t1 = treeop0;
7995 treeop0 = treeop1;
7996 treeop1 = t1;
7997 }
7998
7999 /* First, check if we have a multiplication of one signed and one
8000 unsigned operand. */
8001 if (TREE_CODE (treeop1) != INTEGER_CST
8002 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8003 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8004 {
8005 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8006 this_optab = usmul_widen_optab;
8007 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8008 != CODE_FOR_nothing)
8009 {
8010 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8011 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8012 EXPAND_NORMAL);
8013 else
8014 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8015 EXPAND_NORMAL);
8016 goto binop3;
8017 }
8018 }
8019 /* Check for a multiplication with matching signedness. */
8020 else if ((TREE_CODE (treeop1) == INTEGER_CST
8021 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8022 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8023 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8024 {
8025 tree op0type = TREE_TYPE (treeop0);
8026 enum machine_mode innermode = TYPE_MODE (op0type);
8027 bool zextend_p = TYPE_UNSIGNED (op0type);
8028 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8029 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8030
8031 if (TREE_CODE (treeop0) != INTEGER_CST)
8032 {
8033 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8034 != CODE_FOR_nothing)
8035 {
8036 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8037 EXPAND_NORMAL);
8038 temp = expand_widening_mult (mode, op0, op1, target,
8039 unsignedp, this_optab);
8040 return REDUCE_BIT_FIELD (temp);
8041 }
8042 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8043 != CODE_FOR_nothing
8044 && innermode == word_mode)
8045 {
8046 rtx htem, hipart;
8047 op0 = expand_normal (treeop0);
8048 if (TREE_CODE (treeop1) == INTEGER_CST)
8049 op1 = convert_modes (innermode, mode,
8050 expand_normal (treeop1), unsignedp);
8051 else
8052 op1 = expand_normal (treeop1);
8053 temp = expand_binop (mode, other_optab, op0, op1, target,
8054 unsignedp, OPTAB_LIB_WIDEN);
8055 hipart = gen_highpart (innermode, temp);
8056 htem = expand_mult_highpart_adjust (innermode, hipart,
8057 op0, op1, hipart,
8058 zextend_p);
8059 if (htem != hipart)
8060 emit_move_insn (hipart, htem);
8061 return REDUCE_BIT_FIELD (temp);
8062 }
8063 }
8064 }
8065 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8066 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8067 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8068 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8069
8070 case FMA_EXPR:
8071 {
8072 optab opt = fma_optab;
8073 gimple def0, def2;
8074
8075 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8076 call. */
8077 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8078 {
8079 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8080 tree call_expr;
8081
8082 gcc_assert (fn != NULL_TREE);
8083 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8084 return expand_builtin (call_expr, target, subtarget, mode, false);
8085 }
8086
8087 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8088 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8089
8090 op0 = op2 = NULL;
8091
8092 if (def0 && def2
8093 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8094 {
8095 opt = fnms_optab;
8096 op0 = expand_normal (gimple_assign_rhs1 (def0));
8097 op2 = expand_normal (gimple_assign_rhs1 (def2));
8098 }
8099 else if (def0
8100 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8101 {
8102 opt = fnma_optab;
8103 op0 = expand_normal (gimple_assign_rhs1 (def0));
8104 }
8105 else if (def2
8106 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8107 {
8108 opt = fms_optab;
8109 op2 = expand_normal (gimple_assign_rhs1 (def2));
8110 }
8111
8112 if (op0 == NULL)
8113 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8114 if (op2 == NULL)
8115 op2 = expand_normal (treeop2);
8116 op1 = expand_normal (treeop1);
8117
8118 return expand_ternary_op (TYPE_MODE (type), opt,
8119 op0, op1, op2, target, 0);
8120 }
8121
8122 case MULT_EXPR:
8123 /* If this is a fixed-point operation, then we cannot use the code
8124 below because "expand_mult" doesn't support sat/no-sat fixed-point
8125 multiplications. */
8126 if (ALL_FIXED_POINT_MODE_P (mode))
8127 goto binop;
8128
8129 /* If first operand is constant, swap them.
8130 Thus the following special case checks need only
8131 check the second operand. */
8132 if (TREE_CODE (treeop0) == INTEGER_CST)
8133 {
8134 tree t1 = treeop0;
8135 treeop0 = treeop1;
8136 treeop1 = t1;
8137 }
8138
8139 /* Attempt to return something suitable for generating an
8140 indexed address, for machines that support that. */
8141
8142 if (modifier == EXPAND_SUM && mode == ptr_mode
8143 && host_integerp (treeop1, 0))
8144 {
8145 tree exp1 = treeop1;
8146
8147 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8148 EXPAND_SUM);
8149
8150 if (!REG_P (op0))
8151 op0 = force_operand (op0, NULL_RTX);
8152 if (!REG_P (op0))
8153 op0 = copy_to_mode_reg (mode, op0);
8154
8155 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8156 gen_int_mode (tree_low_cst (exp1, 0),
8157 TYPE_MODE (TREE_TYPE (exp1)))));
8158 }
8159
8160 if (modifier == EXPAND_STACK_PARM)
8161 target = 0;
8162
8163 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8164 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8165
8166 case TRUNC_DIV_EXPR:
8167 case FLOOR_DIV_EXPR:
8168 case CEIL_DIV_EXPR:
8169 case ROUND_DIV_EXPR:
8170 case EXACT_DIV_EXPR:
8171 /* If this is a fixed-point operation, then we cannot use the code
8172 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8173 divisions. */
8174 if (ALL_FIXED_POINT_MODE_P (mode))
8175 goto binop;
8176
8177 if (modifier == EXPAND_STACK_PARM)
8178 target = 0;
8179 /* Possible optimization: compute the dividend with EXPAND_SUM
8180 then if the divisor is constant can optimize the case
8181 where some terms of the dividend have coeffs divisible by it. */
8182 expand_operands (treeop0, treeop1,
8183 subtarget, &op0, &op1, EXPAND_NORMAL);
8184 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8185
8186 case RDIV_EXPR:
8187 goto binop;
8188
8189 case TRUNC_MOD_EXPR:
8190 case FLOOR_MOD_EXPR:
8191 case CEIL_MOD_EXPR:
8192 case ROUND_MOD_EXPR:
8193 if (modifier == EXPAND_STACK_PARM)
8194 target = 0;
8195 expand_operands (treeop0, treeop1,
8196 subtarget, &op0, &op1, EXPAND_NORMAL);
8197 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8198
8199 case FIXED_CONVERT_EXPR:
8200 op0 = expand_normal (treeop0);
8201 if (target == 0 || modifier == EXPAND_STACK_PARM)
8202 target = gen_reg_rtx (mode);
8203
8204 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8205 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8206 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8207 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8208 else
8209 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8210 return target;
8211
8212 case FIX_TRUNC_EXPR:
8213 op0 = expand_normal (treeop0);
8214 if (target == 0 || modifier == EXPAND_STACK_PARM)
8215 target = gen_reg_rtx (mode);
8216 expand_fix (target, op0, unsignedp);
8217 return target;
8218
8219 case FLOAT_EXPR:
8220 op0 = expand_normal (treeop0);
8221 if (target == 0 || modifier == EXPAND_STACK_PARM)
8222 target = gen_reg_rtx (mode);
8223 /* expand_float can't figure out what to do if FROM has VOIDmode.
8224 So give it the correct mode. With -O, cse will optimize this. */
8225 if (GET_MODE (op0) == VOIDmode)
8226 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8227 op0);
8228 expand_float (target, op0,
8229 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8230 return target;
8231
8232 case NEGATE_EXPR:
8233 op0 = expand_expr (treeop0, subtarget,
8234 VOIDmode, EXPAND_NORMAL);
8235 if (modifier == EXPAND_STACK_PARM)
8236 target = 0;
8237 temp = expand_unop (mode,
8238 optab_for_tree_code (NEGATE_EXPR, type,
8239 optab_default),
8240 op0, target, 0);
8241 gcc_assert (temp);
8242 return REDUCE_BIT_FIELD (temp);
8243
8244 case ABS_EXPR:
8245 op0 = expand_expr (treeop0, subtarget,
8246 VOIDmode, EXPAND_NORMAL);
8247 if (modifier == EXPAND_STACK_PARM)
8248 target = 0;
8249
8250 /* ABS_EXPR is not valid for complex arguments. */
8251 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8252 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8253
8254 /* Unsigned abs is simply the operand. Testing here means we don't
8255 risk generating incorrect code below. */
8256 if (TYPE_UNSIGNED (type))
8257 return op0;
8258
8259 return expand_abs (mode, op0, target, unsignedp,
8260 safe_from_p (target, treeop0, 1));
8261
8262 case MAX_EXPR:
8263 case MIN_EXPR:
8264 target = original_target;
8265 if (target == 0
8266 || modifier == EXPAND_STACK_PARM
8267 || (MEM_P (target) && MEM_VOLATILE_P (target))
8268 || GET_MODE (target) != mode
8269 || (REG_P (target)
8270 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8271 target = gen_reg_rtx (mode);
8272 expand_operands (treeop0, treeop1,
8273 target, &op0, &op1, EXPAND_NORMAL);
8274
8275 /* First try to do it with a special MIN or MAX instruction.
8276 If that does not win, use a conditional jump to select the proper
8277 value. */
8278 this_optab = optab_for_tree_code (code, type, optab_default);
8279 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8280 OPTAB_WIDEN);
8281 if (temp != 0)
8282 return temp;
8283
8284 /* At this point, a MEM target is no longer useful; we will get better
8285 code without it. */
8286
8287 if (! REG_P (target))
8288 target = gen_reg_rtx (mode);
8289
8290 /* If op1 was placed in target, swap op0 and op1. */
8291 if (target != op0 && target == op1)
8292 {
8293 temp = op0;
8294 op0 = op1;
8295 op1 = temp;
8296 }
8297
8298 /* We generate better code and avoid problems with op1 mentioning
8299 target by forcing op1 into a pseudo if it isn't a constant. */
8300 if (! CONSTANT_P (op1))
8301 op1 = force_reg (mode, op1);
8302
8303 {
8304 enum rtx_code comparison_code;
8305 rtx cmpop1 = op1;
8306
8307 if (code == MAX_EXPR)
8308 comparison_code = unsignedp ? GEU : GE;
8309 else
8310 comparison_code = unsignedp ? LEU : LE;
8311
8312 /* Canonicalize to comparisons against 0. */
8313 if (op1 == const1_rtx)
8314 {
8315 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8316 or (a != 0 ? a : 1) for unsigned.
8317 For MIN we are safe converting (a <= 1 ? a : 1)
8318 into (a <= 0 ? a : 1) */
8319 cmpop1 = const0_rtx;
8320 if (code == MAX_EXPR)
8321 comparison_code = unsignedp ? NE : GT;
8322 }
8323 if (op1 == constm1_rtx && !unsignedp)
8324 {
8325 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8326 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8327 cmpop1 = const0_rtx;
8328 if (code == MIN_EXPR)
8329 comparison_code = LT;
8330 }
8331 #ifdef HAVE_conditional_move
8332 /* Use a conditional move if possible. */
8333 if (can_conditionally_move_p (mode))
8334 {
8335 rtx insn;
8336
8337 /* ??? Same problem as in expmed.c: emit_conditional_move
8338 forces a stack adjustment via compare_from_rtx, and we
8339 lose the stack adjustment if the sequence we are about
8340 to create is discarded. */
8341 do_pending_stack_adjust ();
8342
8343 start_sequence ();
8344
8345 /* Try to emit the conditional move. */
8346 insn = emit_conditional_move (target, comparison_code,
8347 op0, cmpop1, mode,
8348 op0, op1, mode,
8349 unsignedp);
8350
8351 /* If we could do the conditional move, emit the sequence,
8352 and return. */
8353 if (insn)
8354 {
8355 rtx seq = get_insns ();
8356 end_sequence ();
8357 emit_insn (seq);
8358 return target;
8359 }
8360
8361 /* Otherwise discard the sequence and fall back to code with
8362 branches. */
8363 end_sequence ();
8364 }
8365 #endif
8366 if (target != op0)
8367 emit_move_insn (target, op0);
8368
8369 temp = gen_label_rtx ();
8370 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8371 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8372 -1);
8373 }
8374 emit_move_insn (target, op1);
8375 emit_label (temp);
8376 return target;
8377
8378 case BIT_NOT_EXPR:
8379 op0 = expand_expr (treeop0, subtarget,
8380 VOIDmode, EXPAND_NORMAL);
8381 if (modifier == EXPAND_STACK_PARM)
8382 target = 0;
8383 /* In case we have to reduce the result to bitfield precision
8384 expand this as XOR with a proper constant instead. */
8385 if (reduce_bit_field)
8386 temp = expand_binop (mode, xor_optab, op0,
8387 immed_double_int_const
8388 (double_int_mask (TYPE_PRECISION (type)), mode),
8389 target, 1, OPTAB_LIB_WIDEN);
8390 else
8391 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8392 gcc_assert (temp);
8393 return temp;
8394
8395 /* ??? Can optimize bitwise operations with one arg constant.
8396 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8397 and (a bitwise1 b) bitwise2 b (etc)
8398 but that is probably not worth while. */
8399
8400 case BIT_AND_EXPR:
8401 case BIT_IOR_EXPR:
8402 case BIT_XOR_EXPR:
8403 goto binop;
8404
8405 case LROTATE_EXPR:
8406 case RROTATE_EXPR:
8407 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8408 || (GET_MODE_PRECISION (TYPE_MODE (type))
8409 == TYPE_PRECISION (type)));
8410 /* fall through */
8411
8412 case LSHIFT_EXPR:
8413 case RSHIFT_EXPR:
8414 /* If this is a fixed-point operation, then we cannot use the code
8415 below because "expand_shift" doesn't support sat/no-sat fixed-point
8416 shifts. */
8417 if (ALL_FIXED_POINT_MODE_P (mode))
8418 goto binop;
8419
8420 if (! safe_from_p (subtarget, treeop1, 1))
8421 subtarget = 0;
8422 if (modifier == EXPAND_STACK_PARM)
8423 target = 0;
8424 op0 = expand_expr (treeop0, subtarget,
8425 VOIDmode, EXPAND_NORMAL);
8426 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8427 unsignedp);
8428 if (code == LSHIFT_EXPR)
8429 temp = REDUCE_BIT_FIELD (temp);
8430 return temp;
8431
8432 /* Could determine the answer when only additive constants differ. Also,
8433 the addition of one can be handled by changing the condition. */
8434 case LT_EXPR:
8435 case LE_EXPR:
8436 case GT_EXPR:
8437 case GE_EXPR:
8438 case EQ_EXPR:
8439 case NE_EXPR:
8440 case UNORDERED_EXPR:
8441 case ORDERED_EXPR:
8442 case UNLT_EXPR:
8443 case UNLE_EXPR:
8444 case UNGT_EXPR:
8445 case UNGE_EXPR:
8446 case UNEQ_EXPR:
8447 case LTGT_EXPR:
8448 temp = do_store_flag (ops,
8449 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8450 tmode != VOIDmode ? tmode : mode);
8451 if (temp)
8452 return temp;
8453
8454 /* Use a compare and a jump for BLKmode comparisons, or for function
8455 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8456
8457 if ((target == 0
8458 || modifier == EXPAND_STACK_PARM
8459 || ! safe_from_p (target, treeop0, 1)
8460 || ! safe_from_p (target, treeop1, 1)
8461 /* Make sure we don't have a hard reg (such as function's return
8462 value) live across basic blocks, if not optimizing. */
8463 || (!optimize && REG_P (target)
8464 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8465 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8466
8467 emit_move_insn (target, const0_rtx);
8468
8469 op1 = gen_label_rtx ();
8470 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8471
8472 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8473 emit_move_insn (target, constm1_rtx);
8474 else
8475 emit_move_insn (target, const1_rtx);
8476
8477 emit_label (op1);
8478 return target;
8479
8480 case COMPLEX_EXPR:
8481 /* Get the rtx code of the operands. */
8482 op0 = expand_normal (treeop0);
8483 op1 = expand_normal (treeop1);
8484
8485 if (!target)
8486 target = gen_reg_rtx (TYPE_MODE (type));
8487
8488 /* Move the real (op0) and imaginary (op1) parts to their location. */
8489 write_complex_part (target, op0, false);
8490 write_complex_part (target, op1, true);
8491
8492 return target;
8493
8494 case WIDEN_SUM_EXPR:
8495 {
8496 tree oprnd0 = treeop0;
8497 tree oprnd1 = treeop1;
8498
8499 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8500 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8501 target, unsignedp);
8502 return target;
8503 }
8504
8505 case REDUC_MAX_EXPR:
8506 case REDUC_MIN_EXPR:
8507 case REDUC_PLUS_EXPR:
8508 {
8509 op0 = expand_normal (treeop0);
8510 this_optab = optab_for_tree_code (code, type, optab_default);
8511 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8512 gcc_assert (temp);
8513 return temp;
8514 }
8515
8516 case VEC_EXTRACT_EVEN_EXPR:
8517 case VEC_EXTRACT_ODD_EXPR:
8518 {
8519 expand_operands (treeop0, treeop1,
8520 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8521 this_optab = optab_for_tree_code (code, type, optab_default);
8522 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8523 OPTAB_WIDEN);
8524 gcc_assert (temp);
8525 return temp;
8526 }
8527
8528 case VEC_INTERLEAVE_HIGH_EXPR:
8529 case VEC_INTERLEAVE_LOW_EXPR:
8530 {
8531 expand_operands (treeop0, treeop1,
8532 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8533 this_optab = optab_for_tree_code (code, type, optab_default);
8534 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8535 OPTAB_WIDEN);
8536 gcc_assert (temp);
8537 return temp;
8538 }
8539
8540 case VEC_LSHIFT_EXPR:
8541 case VEC_RSHIFT_EXPR:
8542 {
8543 target = expand_vec_shift_expr (ops, target);
8544 return target;
8545 }
8546
8547 case VEC_UNPACK_HI_EXPR:
8548 case VEC_UNPACK_LO_EXPR:
8549 {
8550 op0 = expand_normal (treeop0);
8551 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8552 target, unsignedp);
8553 gcc_assert (temp);
8554 return temp;
8555 }
8556
8557 case VEC_UNPACK_FLOAT_HI_EXPR:
8558 case VEC_UNPACK_FLOAT_LO_EXPR:
8559 {
8560 op0 = expand_normal (treeop0);
8561 /* The signedness is determined from input operand. */
8562 temp = expand_widen_pattern_expr
8563 (ops, op0, NULL_RTX, NULL_RTX,
8564 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8565
8566 gcc_assert (temp);
8567 return temp;
8568 }
8569
8570 case VEC_WIDEN_MULT_HI_EXPR:
8571 case VEC_WIDEN_MULT_LO_EXPR:
8572 {
8573 tree oprnd0 = treeop0;
8574 tree oprnd1 = treeop1;
8575
8576 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8577 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8578 target, unsignedp);
8579 gcc_assert (target);
8580 return target;
8581 }
8582
8583 case VEC_PACK_TRUNC_EXPR:
8584 case VEC_PACK_SAT_EXPR:
8585 case VEC_PACK_FIX_TRUNC_EXPR:
8586 mode = TYPE_MODE (TREE_TYPE (treeop0));
8587 goto binop;
8588
8589 case DOT_PROD_EXPR:
8590 {
8591 tree oprnd0 = treeop0;
8592 tree oprnd1 = treeop1;
8593 tree oprnd2 = treeop2;
8594 rtx op2;
8595
8596 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8597 op2 = expand_normal (oprnd2);
8598 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8599 target, unsignedp);
8600 return target;
8601 }
8602
8603 case REALIGN_LOAD_EXPR:
8604 {
8605 tree oprnd0 = treeop0;
8606 tree oprnd1 = treeop1;
8607 tree oprnd2 = treeop2;
8608 rtx op2;
8609
8610 this_optab = optab_for_tree_code (code, type, optab_default);
8611 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8612 op2 = expand_normal (oprnd2);
8613 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8614 target, unsignedp);
8615 gcc_assert (temp);
8616 return temp;
8617 }
8618
8619 default:
8620 gcc_unreachable ();
8621 }
8622
8623 /* Here to do an ordinary binary operator. */
8624 binop:
8625 expand_operands (treeop0, treeop1,
8626 subtarget, &op0, &op1, EXPAND_NORMAL);
8627 binop2:
8628 this_optab = optab_for_tree_code (code, type, optab_default);
8629 binop3:
8630 if (modifier == EXPAND_STACK_PARM)
8631 target = 0;
8632 temp = expand_binop (mode, this_optab, op0, op1, target,
8633 unsignedp, OPTAB_LIB_WIDEN);
8634 gcc_assert (temp);
8635 /* Bitwise operations do not need bitfield reduction as we expect their
8636 operands being properly truncated. */
8637 if (code == BIT_XOR_EXPR
8638 || code == BIT_AND_EXPR
8639 || code == BIT_IOR_EXPR)
8640 return temp;
8641 return REDUCE_BIT_FIELD (temp);
8642 }
8643 #undef REDUCE_BIT_FIELD
8644
8645 rtx
8646 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
8647 enum expand_modifier modifier, rtx *alt_rtl)
8648 {
8649 rtx op0, op1, temp, decl_rtl;
8650 tree type;
8651 int unsignedp;
8652 enum machine_mode mode;
8653 enum tree_code code = TREE_CODE (exp);
8654 rtx subtarget, original_target;
8655 int ignore;
8656 tree context;
8657 bool reduce_bit_field;
8658 location_t loc = EXPR_LOCATION (exp);
8659 struct separate_ops ops;
8660 tree treeop0, treeop1, treeop2;
8661 tree ssa_name = NULL_TREE;
8662 gimple g;
8663
8664 type = TREE_TYPE (exp);
8665 mode = TYPE_MODE (type);
8666 unsignedp = TYPE_UNSIGNED (type);
8667
8668 treeop0 = treeop1 = treeop2 = NULL_TREE;
8669 if (!VL_EXP_CLASS_P (exp))
8670 switch (TREE_CODE_LENGTH (code))
8671 {
8672 default:
8673 case 3: treeop2 = TREE_OPERAND (exp, 2);
8674 case 2: treeop1 = TREE_OPERAND (exp, 1);
8675 case 1: treeop0 = TREE_OPERAND (exp, 0);
8676 case 0: break;
8677 }
8678 ops.code = code;
8679 ops.type = type;
8680 ops.op0 = treeop0;
8681 ops.op1 = treeop1;
8682 ops.op2 = treeop2;
8683 ops.location = loc;
8684
8685 ignore = (target == const0_rtx
8686 || ((CONVERT_EXPR_CODE_P (code)
8687 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8688 && TREE_CODE (type) == VOID_TYPE));
8689
8690 /* An operation in what may be a bit-field type needs the
8691 result to be reduced to the precision of the bit-field type,
8692 which is narrower than that of the type's mode. */
8693 reduce_bit_field = (!ignore
8694 && INTEGRAL_TYPE_P (type)
8695 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8696
8697 /* If we are going to ignore this result, we need only do something
8698 if there is a side-effect somewhere in the expression. If there
8699 is, short-circuit the most common cases here. Note that we must
8700 not call expand_expr with anything but const0_rtx in case this
8701 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
8702
8703 if (ignore)
8704 {
8705 if (! TREE_SIDE_EFFECTS (exp))
8706 return const0_rtx;
8707
8708 /* Ensure we reference a volatile object even if value is ignored, but
8709 don't do this if all we are doing is taking its address. */
8710 if (TREE_THIS_VOLATILE (exp)
8711 && TREE_CODE (exp) != FUNCTION_DECL
8712 && mode != VOIDmode && mode != BLKmode
8713 && modifier != EXPAND_CONST_ADDRESS)
8714 {
8715 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
8716 if (MEM_P (temp))
8717 copy_to_reg (temp);
8718 return const0_rtx;
8719 }
8720
8721 if (TREE_CODE_CLASS (code) == tcc_unary
8722 || code == COMPONENT_REF || code == INDIRECT_REF)
8723 return expand_expr (treeop0, const0_rtx, VOIDmode,
8724 modifier);
8725
8726 else if (TREE_CODE_CLASS (code) == tcc_binary
8727 || TREE_CODE_CLASS (code) == tcc_comparison
8728 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
8729 {
8730 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8731 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8732 return const0_rtx;
8733 }
8734 else if (code == BIT_FIELD_REF)
8735 {
8736 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8737 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8738 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
8739 return const0_rtx;
8740 }
8741
8742 target = 0;
8743 }
8744
8745 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8746 target = 0;
8747
8748 /* Use subtarget as the target for operand 0 of a binary operation. */
8749 subtarget = get_subtarget (target);
8750 original_target = target;
8751
8752 switch (code)
8753 {
8754 case LABEL_DECL:
8755 {
8756 tree function = decl_function_context (exp);
8757
8758 temp = label_rtx (exp);
8759 temp = gen_rtx_LABEL_REF (Pmode, temp);
8760
8761 if (function != current_function_decl
8762 && function != 0)
8763 LABEL_REF_NONLOCAL_P (temp) = 1;
8764
8765 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
8766 return temp;
8767 }
8768
8769 case SSA_NAME:
8770 /* ??? ivopts calls expander, without any preparation from
8771 out-of-ssa. So fake instructions as if this was an access to the
8772 base variable. This unnecessarily allocates a pseudo, see how we can
8773 reuse it, if partition base vars have it set already. */
8774 if (!currently_expanding_to_rtl)
8775 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
8776 NULL);
8777
8778 g = get_gimple_for_ssa_name (exp);
8779 /* For EXPAND_INITIALIZER try harder to get something simpler. */
8780 if (g == NULL
8781 && modifier == EXPAND_INITIALIZER
8782 && !SSA_NAME_IS_DEFAULT_DEF (exp)
8783 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
8784 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
8785 g = SSA_NAME_DEF_STMT (exp);
8786 if (g)
8787 return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
8788 modifier, NULL);
8789
8790 ssa_name = exp;
8791 decl_rtl = get_rtx_for_ssa_name (ssa_name);
8792 exp = SSA_NAME_VAR (ssa_name);
8793 goto expand_decl_rtl;
8794
8795 case PARM_DECL:
8796 case VAR_DECL:
8797 /* If a static var's type was incomplete when the decl was written,
8798 but the type is complete now, lay out the decl now. */
8799 if (DECL_SIZE (exp) == 0
8800 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
8801 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
8802 layout_decl (exp, 0);
8803
8804 /* ... fall through ... */
8805
8806 case FUNCTION_DECL:
8807 case RESULT_DECL:
8808 decl_rtl = DECL_RTL (exp);
8809 expand_decl_rtl:
8810 gcc_assert (decl_rtl);
8811 decl_rtl = copy_rtx (decl_rtl);
8812 /* Record writes to register variables. */
8813 if (modifier == EXPAND_WRITE
8814 && REG_P (decl_rtl)
8815 && HARD_REGISTER_P (decl_rtl))
8816 add_to_hard_reg_set (&crtl->asm_clobbers,
8817 GET_MODE (decl_rtl), REGNO (decl_rtl));
8818
8819 /* Ensure variable marked as used even if it doesn't go through
8820 a parser. If it hasn't be used yet, write out an external
8821 definition. */
8822 if (! TREE_USED (exp))
8823 {
8824 assemble_external (exp);
8825 TREE_USED (exp) = 1;
8826 }
8827
8828 /* Show we haven't gotten RTL for this yet. */
8829 temp = 0;
8830
8831 /* Variables inherited from containing functions should have
8832 been lowered by this point. */
8833 context = decl_function_context (exp);
8834 gcc_assert (!context
8835 || context == current_function_decl
8836 || TREE_STATIC (exp)
8837 || DECL_EXTERNAL (exp)
8838 /* ??? C++ creates functions that are not TREE_STATIC. */
8839 || TREE_CODE (exp) == FUNCTION_DECL);
8840
8841 /* This is the case of an array whose size is to be determined
8842 from its initializer, while the initializer is still being parsed.
8843 See expand_decl. */
8844
8845 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
8846 temp = validize_mem (decl_rtl);
8847
8848 /* If DECL_RTL is memory, we are in the normal case and the
8849 address is not valid, get the address into a register. */
8850
8851 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
8852 {
8853 if (alt_rtl)
8854 *alt_rtl = decl_rtl;
8855 decl_rtl = use_anchored_address (decl_rtl);
8856 if (modifier != EXPAND_CONST_ADDRESS
8857 && modifier != EXPAND_SUM
8858 && !memory_address_addr_space_p (DECL_MODE (exp),
8859 XEXP (decl_rtl, 0),
8860 MEM_ADDR_SPACE (decl_rtl)))
8861 temp = replace_equiv_address (decl_rtl,
8862 copy_rtx (XEXP (decl_rtl, 0)));
8863 }
8864
8865 /* If we got something, return it. But first, set the alignment
8866 if the address is a register. */
8867 if (temp != 0)
8868 {
8869 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
8870 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
8871
8872 return temp;
8873 }
8874
8875 /* If the mode of DECL_RTL does not match that of the decl, it
8876 must be a promoted value. We return a SUBREG of the wanted mode,
8877 but mark it so that we know that it was already extended. */
8878 if (REG_P (decl_rtl) && GET_MODE (decl_rtl) != DECL_MODE (exp))
8879 {
8880 enum machine_mode pmode;
8881
8882 /* Get the signedness to be used for this variable. Ensure we get
8883 the same mode we got when the variable was declared. */
8884 if (code == SSA_NAME
8885 && (g = SSA_NAME_DEF_STMT (ssa_name))
8886 && gimple_code (g) == GIMPLE_CALL)
8887 {
8888 gcc_assert (!gimple_call_internal_p (g));
8889 pmode = promote_function_mode (type, mode, &unsignedp,
8890 gimple_call_fntype (g),
8891 2);
8892 }
8893 else
8894 pmode = promote_decl_mode (exp, &unsignedp);
8895 gcc_assert (GET_MODE (decl_rtl) == pmode);
8896
8897 temp = gen_lowpart_SUBREG (mode, decl_rtl);
8898 SUBREG_PROMOTED_VAR_P (temp) = 1;
8899 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
8900 return temp;
8901 }
8902
8903 return decl_rtl;
8904
8905 case INTEGER_CST:
8906 temp = immed_double_const (TREE_INT_CST_LOW (exp),
8907 TREE_INT_CST_HIGH (exp), mode);
8908
8909 return temp;
8910
8911 case VECTOR_CST:
8912 {
8913 tree tmp = NULL_TREE;
8914 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
8915 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
8916 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
8917 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
8918 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
8919 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
8920 return const_vector_from_tree (exp);
8921 if (GET_MODE_CLASS (mode) == MODE_INT)
8922 {
8923 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
8924 if (type_for_mode)
8925 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
8926 }
8927 if (!tmp)
8928 tmp = build_constructor_from_list (type,
8929 TREE_VECTOR_CST_ELTS (exp));
8930 return expand_expr (tmp, ignore ? const0_rtx : target,
8931 tmode, modifier);
8932 }
8933
8934 case CONST_DECL:
8935 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
8936
8937 case REAL_CST:
8938 /* If optimized, generate immediate CONST_DOUBLE
8939 which will be turned into memory by reload if necessary.
8940
8941 We used to force a register so that loop.c could see it. But
8942 this does not allow gen_* patterns to perform optimizations with
8943 the constants. It also produces two insns in cases like "x = 1.0;".
8944 On most machines, floating-point constants are not permitted in
8945 many insns, so we'd end up copying it to a register in any case.
8946
8947 Now, we do the copying in expand_binop, if appropriate. */
8948 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
8949 TYPE_MODE (TREE_TYPE (exp)));
8950
8951 case FIXED_CST:
8952 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
8953 TYPE_MODE (TREE_TYPE (exp)));
8954
8955 case COMPLEX_CST:
8956 /* Handle evaluating a complex constant in a CONCAT target. */
8957 if (original_target && GET_CODE (original_target) == CONCAT)
8958 {
8959 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
8960 rtx rtarg, itarg;
8961
8962 rtarg = XEXP (original_target, 0);
8963 itarg = XEXP (original_target, 1);
8964
8965 /* Move the real and imaginary parts separately. */
8966 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
8967 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
8968
8969 if (op0 != rtarg)
8970 emit_move_insn (rtarg, op0);
8971 if (op1 != itarg)
8972 emit_move_insn (itarg, op1);
8973
8974 return original_target;
8975 }
8976
8977 /* ... fall through ... */
8978
8979 case STRING_CST:
8980 temp = expand_expr_constant (exp, 1, modifier);
8981
8982 /* temp contains a constant address.
8983 On RISC machines where a constant address isn't valid,
8984 make some insns to get that address into a register. */
8985 if (modifier != EXPAND_CONST_ADDRESS
8986 && modifier != EXPAND_INITIALIZER
8987 && modifier != EXPAND_SUM
8988 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
8989 MEM_ADDR_SPACE (temp)))
8990 return replace_equiv_address (temp,
8991 copy_rtx (XEXP (temp, 0)));
8992 return temp;
8993
8994 case SAVE_EXPR:
8995 {
8996 tree val = treeop0;
8997 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
8998
8999 if (!SAVE_EXPR_RESOLVED_P (exp))
9000 {
9001 /* We can indeed still hit this case, typically via builtin
9002 expanders calling save_expr immediately before expanding
9003 something. Assume this means that we only have to deal
9004 with non-BLKmode values. */
9005 gcc_assert (GET_MODE (ret) != BLKmode);
9006
9007 val = build_decl (EXPR_LOCATION (exp),
9008 VAR_DECL, NULL, TREE_TYPE (exp));
9009 DECL_ARTIFICIAL (val) = 1;
9010 DECL_IGNORED_P (val) = 1;
9011 treeop0 = val;
9012 TREE_OPERAND (exp, 0) = treeop0;
9013 SAVE_EXPR_RESOLVED_P (exp) = 1;
9014
9015 if (!CONSTANT_P (ret))
9016 ret = copy_to_reg (ret);
9017 SET_DECL_RTL (val, ret);
9018 }
9019
9020 return ret;
9021 }
9022
9023
9024 case CONSTRUCTOR:
9025 /* If we don't need the result, just ensure we evaluate any
9026 subexpressions. */
9027 if (ignore)
9028 {
9029 unsigned HOST_WIDE_INT idx;
9030 tree value;
9031
9032 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9033 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9034
9035 return const0_rtx;
9036 }
9037
9038 return expand_constructor (exp, target, modifier, false);
9039
9040 case TARGET_MEM_REF:
9041 {
9042 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
9043 struct mem_address addr;
9044 enum insn_code icode;
9045 int align;
9046
9047 get_address_description (exp, &addr);
9048 op0 = addr_for_mem_ref (&addr, as, true);
9049 op0 = memory_address_addr_space (mode, op0, as);
9050 temp = gen_rtx_MEM (mode, op0);
9051 set_mem_attributes (temp, exp, 0);
9052 set_mem_addr_space (temp, as);
9053 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)), get_object_alignment (exp));
9054 if (mode != BLKmode
9055 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
9056 /* If the target does not have special handling for unaligned
9057 loads of mode then it can use regular moves for them. */
9058 && ((icode = optab_handler (movmisalign_optab, mode))
9059 != CODE_FOR_nothing))
9060 {
9061 struct expand_operand ops[2];
9062
9063 /* We've already validated the memory, and we're creating a
9064 new pseudo destination. The predicates really can't fail,
9065 nor can the generator. */
9066 create_output_operand (&ops[0], NULL_RTX, mode);
9067 create_fixed_operand (&ops[1], temp);
9068 expand_insn (icode, 2, ops);
9069 return ops[0].value;
9070 }
9071 return temp;
9072 }
9073
9074 case MEM_REF:
9075 {
9076 addr_space_t as
9077 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1))));
9078 enum machine_mode address_mode;
9079 tree base = TREE_OPERAND (exp, 0);
9080 gimple def_stmt;
9081 enum insn_code icode;
9082 int align;
9083 /* Handle expansion of non-aliased memory with non-BLKmode. That
9084 might end up in a register. */
9085 if (TREE_CODE (base) == ADDR_EXPR)
9086 {
9087 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9088 tree bit_offset;
9089 base = TREE_OPERAND (base, 0);
9090 if (!DECL_P (base))
9091 {
9092 HOST_WIDE_INT off;
9093 base = get_addr_base_and_unit_offset (base, &off);
9094 gcc_assert (base);
9095 offset += off;
9096 }
9097 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
9098 decl we must use bitfield operations. */
9099 if (DECL_P (base)
9100 && !TREE_ADDRESSABLE (base)
9101 && DECL_MODE (base) != BLKmode
9102 && DECL_RTL_SET_P (base)
9103 && !MEM_P (DECL_RTL (base)))
9104 {
9105 tree bftype;
9106 if (offset == 0
9107 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9108 && (GET_MODE_BITSIZE (DECL_MODE (base))
9109 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9110 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9111 TREE_TYPE (exp), base),
9112 target, tmode, modifier);
9113 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9114 bftype = TREE_TYPE (base);
9115 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9116 bftype = TREE_TYPE (exp);
9117 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9118 base,
9119 TYPE_SIZE (TREE_TYPE (exp)),
9120 bit_offset),
9121 target, tmode, modifier);
9122 }
9123 }
9124 address_mode = targetm.addr_space.address_mode (as);
9125 base = TREE_OPERAND (exp, 0);
9126 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9127 {
9128 tree mask = gimple_assign_rhs2 (def_stmt);
9129 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9130 gimple_assign_rhs1 (def_stmt), mask);
9131 TREE_OPERAND (exp, 0) = base;
9132 }
9133 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)), get_object_alignment (exp));
9134 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9135 op0 = memory_address_addr_space (address_mode, op0, as);
9136 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9137 {
9138 rtx off
9139 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9140 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9141 }
9142 op0 = memory_address_addr_space (mode, op0, as);
9143 temp = gen_rtx_MEM (mode, op0);
9144 set_mem_attributes (temp, exp, 0);
9145 set_mem_addr_space (temp, as);
9146 if (TREE_THIS_VOLATILE (exp))
9147 MEM_VOLATILE_P (temp) = 1;
9148 if (mode != BLKmode
9149 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
9150 /* If the target does not have special handling for unaligned
9151 loads of mode then it can use regular moves for them. */
9152 && ((icode = optab_handler (movmisalign_optab, mode))
9153 != CODE_FOR_nothing))
9154 {
9155 struct expand_operand ops[2];
9156
9157 /* We've already validated the memory, and we're creating a
9158 new pseudo destination. The predicates really can't fail,
9159 nor can the generator. */
9160 create_output_operand (&ops[0], NULL_RTX, mode);
9161 create_fixed_operand (&ops[1], temp);
9162 expand_insn (icode, 2, ops);
9163 return ops[0].value;
9164 }
9165 return temp;
9166 }
9167
9168 case ARRAY_REF:
9169
9170 {
9171 tree array = treeop0;
9172 tree index = treeop1;
9173
9174 /* Fold an expression like: "foo"[2].
9175 This is not done in fold so it won't happen inside &.
9176 Don't fold if this is for wide characters since it's too
9177 difficult to do correctly and this is a very rare case. */
9178
9179 if (modifier != EXPAND_CONST_ADDRESS
9180 && modifier != EXPAND_INITIALIZER
9181 && modifier != EXPAND_MEMORY)
9182 {
9183 tree t = fold_read_from_constant_string (exp);
9184
9185 if (t)
9186 return expand_expr (t, target, tmode, modifier);
9187 }
9188
9189 /* If this is a constant index into a constant array,
9190 just get the value from the array. Handle both the cases when
9191 we have an explicit constructor and when our operand is a variable
9192 that was declared const. */
9193
9194 if (modifier != EXPAND_CONST_ADDRESS
9195 && modifier != EXPAND_INITIALIZER
9196 && modifier != EXPAND_MEMORY
9197 && TREE_CODE (array) == CONSTRUCTOR
9198 && ! TREE_SIDE_EFFECTS (array)
9199 && TREE_CODE (index) == INTEGER_CST)
9200 {
9201 unsigned HOST_WIDE_INT ix;
9202 tree field, value;
9203
9204 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9205 field, value)
9206 if (tree_int_cst_equal (field, index))
9207 {
9208 if (!TREE_SIDE_EFFECTS (value))
9209 return expand_expr (fold (value), target, tmode, modifier);
9210 break;
9211 }
9212 }
9213
9214 else if (optimize >= 1
9215 && modifier != EXPAND_CONST_ADDRESS
9216 && modifier != EXPAND_INITIALIZER
9217 && modifier != EXPAND_MEMORY
9218 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9219 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9220 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9221 && const_value_known_p (array))
9222 {
9223 if (TREE_CODE (index) == INTEGER_CST)
9224 {
9225 tree init = DECL_INITIAL (array);
9226
9227 if (TREE_CODE (init) == CONSTRUCTOR)
9228 {
9229 unsigned HOST_WIDE_INT ix;
9230 tree field, value;
9231
9232 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9233 field, value)
9234 if (tree_int_cst_equal (field, index))
9235 {
9236 if (TREE_SIDE_EFFECTS (value))
9237 break;
9238
9239 if (TREE_CODE (value) == CONSTRUCTOR)
9240 {
9241 /* If VALUE is a CONSTRUCTOR, this
9242 optimization is only useful if
9243 this doesn't store the CONSTRUCTOR
9244 into memory. If it does, it is more
9245 efficient to just load the data from
9246 the array directly. */
9247 rtx ret = expand_constructor (value, target,
9248 modifier, true);
9249 if (ret == NULL_RTX)
9250 break;
9251 }
9252
9253 return expand_expr (fold (value), target, tmode,
9254 modifier);
9255 }
9256 }
9257 else if(TREE_CODE (init) == STRING_CST)
9258 {
9259 tree index1 = index;
9260 tree low_bound = array_ref_low_bound (exp);
9261 index1 = fold_convert_loc (loc, sizetype,
9262 treeop1);
9263
9264 /* Optimize the special-case of a zero lower bound.
9265
9266 We convert the low_bound to sizetype to avoid some problems
9267 with constant folding. (E.g. suppose the lower bound is 1,
9268 and its mode is QI. Without the conversion,l (ARRAY
9269 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9270 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9271
9272 if (! integer_zerop (low_bound))
9273 index1 = size_diffop_loc (loc, index1,
9274 fold_convert_loc (loc, sizetype,
9275 low_bound));
9276
9277 if (0 > compare_tree_int (index1,
9278 TREE_STRING_LENGTH (init)))
9279 {
9280 tree type = TREE_TYPE (TREE_TYPE (init));
9281 enum machine_mode mode = TYPE_MODE (type);
9282
9283 if (GET_MODE_CLASS (mode) == MODE_INT
9284 && GET_MODE_SIZE (mode) == 1)
9285 return gen_int_mode (TREE_STRING_POINTER (init)
9286 [TREE_INT_CST_LOW (index1)],
9287 mode);
9288 }
9289 }
9290 }
9291 }
9292 }
9293 goto normal_inner_ref;
9294
9295 case COMPONENT_REF:
9296 /* If the operand is a CONSTRUCTOR, we can just extract the
9297 appropriate field if it is present. */
9298 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9299 {
9300 unsigned HOST_WIDE_INT idx;
9301 tree field, value;
9302
9303 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9304 idx, field, value)
9305 if (field == treeop1
9306 /* We can normally use the value of the field in the
9307 CONSTRUCTOR. However, if this is a bitfield in
9308 an integral mode that we can fit in a HOST_WIDE_INT,
9309 we must mask only the number of bits in the bitfield,
9310 since this is done implicitly by the constructor. If
9311 the bitfield does not meet either of those conditions,
9312 we can't do this optimization. */
9313 && (! DECL_BIT_FIELD (field)
9314 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9315 && (GET_MODE_PRECISION (DECL_MODE (field))
9316 <= HOST_BITS_PER_WIDE_INT))))
9317 {
9318 if (DECL_BIT_FIELD (field)
9319 && modifier == EXPAND_STACK_PARM)
9320 target = 0;
9321 op0 = expand_expr (value, target, tmode, modifier);
9322 if (DECL_BIT_FIELD (field))
9323 {
9324 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9325 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9326
9327 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9328 {
9329 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9330 op0 = expand_and (imode, op0, op1, target);
9331 }
9332 else
9333 {
9334 int count = GET_MODE_PRECISION (imode) - bitsize;
9335
9336 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9337 target, 0);
9338 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9339 target, 0);
9340 }
9341 }
9342
9343 return op0;
9344 }
9345 }
9346 goto normal_inner_ref;
9347
9348 case BIT_FIELD_REF:
9349 case ARRAY_RANGE_REF:
9350 normal_inner_ref:
9351 {
9352 enum machine_mode mode1, mode2;
9353 HOST_WIDE_INT bitsize, bitpos;
9354 tree offset;
9355 int volatilep = 0, must_force_mem;
9356 bool packedp = false;
9357 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9358 &mode1, &unsignedp, &volatilep, true);
9359 rtx orig_op0, memloc;
9360
9361 /* If we got back the original object, something is wrong. Perhaps
9362 we are evaluating an expression too early. In any event, don't
9363 infinitely recurse. */
9364 gcc_assert (tem != exp);
9365
9366 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9367 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9368 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9369 packedp = true;
9370
9371 /* If TEM's type is a union of variable size, pass TARGET to the inner
9372 computation, since it will need a temporary and TARGET is known
9373 to have to do. This occurs in unchecked conversion in Ada. */
9374 orig_op0 = op0
9375 = expand_expr (tem,
9376 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9377 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9378 != INTEGER_CST)
9379 && modifier != EXPAND_STACK_PARM
9380 ? target : NULL_RTX),
9381 VOIDmode,
9382 (modifier == EXPAND_INITIALIZER
9383 || modifier == EXPAND_CONST_ADDRESS
9384 || modifier == EXPAND_STACK_PARM)
9385 ? modifier : EXPAND_NORMAL);
9386
9387
9388 /* If the bitfield is volatile, we want to access it in the
9389 field's mode, not the computed mode.
9390 If a MEM has VOIDmode (external with incomplete type),
9391 use BLKmode for it instead. */
9392 if (MEM_P (op0))
9393 {
9394 if (volatilep && flag_strict_volatile_bitfields > 0)
9395 op0 = adjust_address (op0, mode1, 0);
9396 else if (GET_MODE (op0) == VOIDmode)
9397 op0 = adjust_address (op0, BLKmode, 0);
9398 }
9399
9400 mode2
9401 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9402
9403 /* If we have either an offset, a BLKmode result, or a reference
9404 outside the underlying object, we must force it to memory.
9405 Such a case can occur in Ada if we have unchecked conversion
9406 of an expression from a scalar type to an aggregate type or
9407 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9408 passed a partially uninitialized object or a view-conversion
9409 to a larger size. */
9410 must_force_mem = (offset
9411 || mode1 == BLKmode
9412 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9413
9414 /* Handle CONCAT first. */
9415 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9416 {
9417 if (bitpos == 0
9418 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9419 return op0;
9420 if (bitpos == 0
9421 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9422 && bitsize)
9423 {
9424 op0 = XEXP (op0, 0);
9425 mode2 = GET_MODE (op0);
9426 }
9427 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9428 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9429 && bitpos
9430 && bitsize)
9431 {
9432 op0 = XEXP (op0, 1);
9433 bitpos = 0;
9434 mode2 = GET_MODE (op0);
9435 }
9436 else
9437 /* Otherwise force into memory. */
9438 must_force_mem = 1;
9439 }
9440
9441 /* If this is a constant, put it in a register if it is a legitimate
9442 constant and we don't need a memory reference. */
9443 if (CONSTANT_P (op0)
9444 && mode2 != BLKmode
9445 && targetm.legitimate_constant_p (mode2, op0)
9446 && !must_force_mem)
9447 op0 = force_reg (mode2, op0);
9448
9449 /* Otherwise, if this is a constant, try to force it to the constant
9450 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9451 is a legitimate constant. */
9452 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9453 op0 = validize_mem (memloc);
9454
9455 /* Otherwise, if this is a constant or the object is not in memory
9456 and need be, put it there. */
9457 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9458 {
9459 tree nt = build_qualified_type (TREE_TYPE (tem),
9460 (TYPE_QUALS (TREE_TYPE (tem))
9461 | TYPE_QUAL_CONST));
9462 memloc = assign_temp (nt, 1, 1, 1);
9463 emit_move_insn (memloc, op0);
9464 op0 = memloc;
9465 }
9466
9467 if (offset)
9468 {
9469 enum machine_mode address_mode;
9470 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9471 EXPAND_SUM);
9472
9473 gcc_assert (MEM_P (op0));
9474
9475 address_mode
9476 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9477 if (GET_MODE (offset_rtx) != address_mode)
9478 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9479
9480 if (GET_MODE (op0) == BLKmode
9481 /* A constant address in OP0 can have VOIDmode, we must
9482 not try to call force_reg in that case. */
9483 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9484 && bitsize != 0
9485 && (bitpos % bitsize) == 0
9486 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9487 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9488 {
9489 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9490 bitpos = 0;
9491 }
9492
9493 op0 = offset_address (op0, offset_rtx,
9494 highest_pow2_factor (offset));
9495 }
9496
9497 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9498 record its alignment as BIGGEST_ALIGNMENT. */
9499 if (MEM_P (op0) && bitpos == 0 && offset != 0
9500 && is_aligning_offset (offset, tem))
9501 set_mem_align (op0, BIGGEST_ALIGNMENT);
9502
9503 /* Don't forget about volatility even if this is a bitfield. */
9504 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9505 {
9506 if (op0 == orig_op0)
9507 op0 = copy_rtx (op0);
9508
9509 MEM_VOLATILE_P (op0) = 1;
9510 }
9511
9512 /* In cases where an aligned union has an unaligned object
9513 as a field, we might be extracting a BLKmode value from
9514 an integer-mode (e.g., SImode) object. Handle this case
9515 by doing the extract into an object as wide as the field
9516 (which we know to be the width of a basic mode), then
9517 storing into memory, and changing the mode to BLKmode. */
9518 if (mode1 == VOIDmode
9519 || REG_P (op0) || GET_CODE (op0) == SUBREG
9520 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9521 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9522 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9523 && modifier != EXPAND_CONST_ADDRESS
9524 && modifier != EXPAND_INITIALIZER)
9525 /* If the field is volatile, we always want an aligned
9526 access. Only do this if the access is not already naturally
9527 aligned, otherwise "normal" (non-bitfield) volatile fields
9528 become non-addressable. */
9529 || (volatilep && flag_strict_volatile_bitfields > 0
9530 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0))
9531 /* If the field isn't aligned enough to fetch as a memref,
9532 fetch it as a bit field. */
9533 || (mode1 != BLKmode
9534 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9535 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9536 || (MEM_P (op0)
9537 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9538 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9539 && ((modifier == EXPAND_CONST_ADDRESS
9540 || modifier == EXPAND_INITIALIZER)
9541 ? STRICT_ALIGNMENT
9542 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9543 || (bitpos % BITS_PER_UNIT != 0)))
9544 /* If the type and the field are a constant size and the
9545 size of the type isn't the same size as the bitfield,
9546 we must use bitfield operations. */
9547 || (bitsize >= 0
9548 && TYPE_SIZE (TREE_TYPE (exp))
9549 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9550 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9551 bitsize)))
9552 {
9553 enum machine_mode ext_mode = mode;
9554
9555 if (ext_mode == BLKmode
9556 && ! (target != 0 && MEM_P (op0)
9557 && MEM_P (target)
9558 && bitpos % BITS_PER_UNIT == 0))
9559 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9560
9561 if (ext_mode == BLKmode)
9562 {
9563 if (target == 0)
9564 target = assign_temp (type, 0, 1, 1);
9565
9566 if (bitsize == 0)
9567 return target;
9568
9569 /* In this case, BITPOS must start at a byte boundary and
9570 TARGET, if specified, must be a MEM. */
9571 gcc_assert (MEM_P (op0)
9572 && (!target || MEM_P (target))
9573 && !(bitpos % BITS_PER_UNIT));
9574
9575 emit_block_move (target,
9576 adjust_address (op0, VOIDmode,
9577 bitpos / BITS_PER_UNIT),
9578 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9579 / BITS_PER_UNIT),
9580 (modifier == EXPAND_STACK_PARM
9581 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9582
9583 return target;
9584 }
9585
9586 op0 = validize_mem (op0);
9587
9588 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9589 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9590
9591 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
9592 (modifier == EXPAND_STACK_PARM
9593 ? NULL_RTX : target),
9594 ext_mode, ext_mode);
9595
9596 /* If the result is a record type and BITSIZE is narrower than
9597 the mode of OP0, an integral mode, and this is a big endian
9598 machine, we must put the field into the high-order bits. */
9599 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
9600 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
9601 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
9602 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
9603 GET_MODE_BITSIZE (GET_MODE (op0))
9604 - bitsize, op0, 1);
9605
9606 /* If the result type is BLKmode, store the data into a temporary
9607 of the appropriate type, but with the mode corresponding to the
9608 mode for the data we have (op0's mode). It's tempting to make
9609 this a constant type, since we know it's only being stored once,
9610 but that can cause problems if we are taking the address of this
9611 COMPONENT_REF because the MEM of any reference via that address
9612 will have flags corresponding to the type, which will not
9613 necessarily be constant. */
9614 if (mode == BLKmode)
9615 {
9616 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
9617 rtx new_rtx;
9618
9619 /* If the reference doesn't use the alias set of its type,
9620 we cannot create the temporary using that type. */
9621 if (component_uses_parent_alias_set (exp))
9622 {
9623 new_rtx = assign_stack_local (ext_mode, size, 0);
9624 set_mem_alias_set (new_rtx, get_alias_set (exp));
9625 }
9626 else
9627 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
9628
9629 emit_move_insn (new_rtx, op0);
9630 op0 = copy_rtx (new_rtx);
9631 PUT_MODE (op0, BLKmode);
9632 set_mem_attributes (op0, exp, 1);
9633 }
9634
9635 return op0;
9636 }
9637
9638 /* If the result is BLKmode, use that to access the object
9639 now as well. */
9640 if (mode == BLKmode)
9641 mode1 = BLKmode;
9642
9643 /* Get a reference to just this component. */
9644 if (modifier == EXPAND_CONST_ADDRESS
9645 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
9646 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
9647 else
9648 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9649
9650 if (op0 == orig_op0)
9651 op0 = copy_rtx (op0);
9652
9653 set_mem_attributes (op0, exp, 0);
9654 if (REG_P (XEXP (op0, 0)))
9655 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9656
9657 MEM_VOLATILE_P (op0) |= volatilep;
9658 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
9659 || modifier == EXPAND_CONST_ADDRESS
9660 || modifier == EXPAND_INITIALIZER)
9661 return op0;
9662 else if (target == 0)
9663 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9664
9665 convert_move (target, op0, unsignedp);
9666 return target;
9667 }
9668
9669 case OBJ_TYPE_REF:
9670 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
9671
9672 case CALL_EXPR:
9673 /* All valid uses of __builtin_va_arg_pack () are removed during
9674 inlining. */
9675 if (CALL_EXPR_VA_ARG_PACK (exp))
9676 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
9677 {
9678 tree fndecl = get_callee_fndecl (exp), attr;
9679
9680 if (fndecl
9681 && (attr = lookup_attribute ("error",
9682 DECL_ATTRIBUTES (fndecl))) != NULL)
9683 error ("%Kcall to %qs declared with attribute error: %s",
9684 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9685 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9686 if (fndecl
9687 && (attr = lookup_attribute ("warning",
9688 DECL_ATTRIBUTES (fndecl))) != NULL)
9689 warning_at (tree_nonartificial_location (exp),
9690 0, "%Kcall to %qs declared with attribute warning: %s",
9691 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9692 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9693
9694 /* Check for a built-in function. */
9695 if (fndecl && DECL_BUILT_IN (fndecl))
9696 {
9697 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
9698 return expand_builtin (exp, target, subtarget, tmode, ignore);
9699 }
9700 }
9701 return expand_call (exp, target, ignore);
9702
9703 case VIEW_CONVERT_EXPR:
9704 op0 = NULL_RTX;
9705
9706 /* If we are converting to BLKmode, try to avoid an intermediate
9707 temporary by fetching an inner memory reference. */
9708 if (mode == BLKmode
9709 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9710 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
9711 && handled_component_p (treeop0))
9712 {
9713 enum machine_mode mode1;
9714 HOST_WIDE_INT bitsize, bitpos;
9715 tree offset;
9716 int unsignedp;
9717 int volatilep = 0;
9718 tree tem
9719 = get_inner_reference (treeop0, &bitsize, &bitpos,
9720 &offset, &mode1, &unsignedp, &volatilep,
9721 true);
9722 rtx orig_op0;
9723
9724 /* ??? We should work harder and deal with non-zero offsets. */
9725 if (!offset
9726 && (bitpos % BITS_PER_UNIT) == 0
9727 && bitsize >= 0
9728 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
9729 {
9730 /* See the normal_inner_ref case for the rationale. */
9731 orig_op0
9732 = expand_expr (tem,
9733 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9734 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9735 != INTEGER_CST)
9736 && modifier != EXPAND_STACK_PARM
9737 ? target : NULL_RTX),
9738 VOIDmode,
9739 (modifier == EXPAND_INITIALIZER
9740 || modifier == EXPAND_CONST_ADDRESS
9741 || modifier == EXPAND_STACK_PARM)
9742 ? modifier : EXPAND_NORMAL);
9743
9744 if (MEM_P (orig_op0))
9745 {
9746 op0 = orig_op0;
9747
9748 /* Get a reference to just this component. */
9749 if (modifier == EXPAND_CONST_ADDRESS
9750 || modifier == EXPAND_SUM
9751 || modifier == EXPAND_INITIALIZER)
9752 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
9753 else
9754 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
9755
9756 if (op0 == orig_op0)
9757 op0 = copy_rtx (op0);
9758
9759 set_mem_attributes (op0, treeop0, 0);
9760 if (REG_P (XEXP (op0, 0)))
9761 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9762
9763 MEM_VOLATILE_P (op0) |= volatilep;
9764 }
9765 }
9766 }
9767
9768 if (!op0)
9769 op0 = expand_expr (treeop0,
9770 NULL_RTX, VOIDmode, modifier);
9771
9772 /* If the input and output modes are both the same, we are done. */
9773 if (mode == GET_MODE (op0))
9774 ;
9775 /* If neither mode is BLKmode, and both modes are the same size
9776 then we can use gen_lowpart. */
9777 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
9778 && (GET_MODE_PRECISION (mode)
9779 == GET_MODE_PRECISION (GET_MODE (op0)))
9780 && !COMPLEX_MODE_P (GET_MODE (op0)))
9781 {
9782 if (GET_CODE (op0) == SUBREG)
9783 op0 = force_reg (GET_MODE (op0), op0);
9784 temp = gen_lowpart_common (mode, op0);
9785 if (temp)
9786 op0 = temp;
9787 else
9788 {
9789 if (!REG_P (op0) && !MEM_P (op0))
9790 op0 = force_reg (GET_MODE (op0), op0);
9791 op0 = gen_lowpart (mode, op0);
9792 }
9793 }
9794 /* If both types are integral, convert from one mode to the other. */
9795 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
9796 op0 = convert_modes (mode, GET_MODE (op0), op0,
9797 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9798 /* As a last resort, spill op0 to memory, and reload it in a
9799 different mode. */
9800 else if (!MEM_P (op0))
9801 {
9802 /* If the operand is not a MEM, force it into memory. Since we
9803 are going to be changing the mode of the MEM, don't call
9804 force_const_mem for constants because we don't allow pool
9805 constants to change mode. */
9806 tree inner_type = TREE_TYPE (treeop0);
9807
9808 gcc_assert (!TREE_ADDRESSABLE (exp));
9809
9810 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
9811 target
9812 = assign_stack_temp_for_type
9813 (TYPE_MODE (inner_type),
9814 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
9815
9816 emit_move_insn (target, op0);
9817 op0 = target;
9818 }
9819
9820 /* At this point, OP0 is in the correct mode. If the output type is
9821 such that the operand is known to be aligned, indicate that it is.
9822 Otherwise, we need only be concerned about alignment for non-BLKmode
9823 results. */
9824 if (MEM_P (op0))
9825 {
9826 op0 = copy_rtx (op0);
9827
9828 if (TYPE_ALIGN_OK (type))
9829 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
9830 else if (STRICT_ALIGNMENT
9831 && mode != BLKmode
9832 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
9833 {
9834 tree inner_type = TREE_TYPE (treeop0);
9835 HOST_WIDE_INT temp_size
9836 = MAX (int_size_in_bytes (inner_type),
9837 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
9838 rtx new_rtx
9839 = assign_stack_temp_for_type (mode, temp_size, 0, type);
9840 rtx new_with_op0_mode
9841 = adjust_address (new_rtx, GET_MODE (op0), 0);
9842
9843 gcc_assert (!TREE_ADDRESSABLE (exp));
9844
9845 if (GET_MODE (op0) == BLKmode)
9846 emit_block_move (new_with_op0_mode, op0,
9847 GEN_INT (GET_MODE_SIZE (mode)),
9848 (modifier == EXPAND_STACK_PARM
9849 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9850 else
9851 emit_move_insn (new_with_op0_mode, op0);
9852
9853 op0 = new_rtx;
9854 }
9855
9856 op0 = adjust_address (op0, mode, 0);
9857 }
9858
9859 return op0;
9860
9861 case COND_EXPR:
9862 /* A COND_EXPR with its type being VOID_TYPE represents a
9863 conditional jump and is handled in
9864 expand_gimple_cond_expr. */
9865 gcc_assert (!VOID_TYPE_P (type));
9866
9867 /* Note that COND_EXPRs whose type is a structure or union
9868 are required to be constructed to contain assignments of
9869 a temporary variable, so that we can evaluate them here
9870 for side effect only. If type is void, we must do likewise. */
9871
9872 gcc_assert (!TREE_ADDRESSABLE (type)
9873 && !ignore
9874 && TREE_TYPE (treeop1) != void_type_node
9875 && TREE_TYPE (treeop2) != void_type_node);
9876
9877 /* If we are not to produce a result, we have no target. Otherwise,
9878 if a target was specified use it; it will not be used as an
9879 intermediate target unless it is safe. If no target, use a
9880 temporary. */
9881
9882 if (modifier != EXPAND_STACK_PARM
9883 && original_target
9884 && safe_from_p (original_target, treeop0, 1)
9885 && GET_MODE (original_target) == mode
9886 #ifdef HAVE_conditional_move
9887 && (! can_conditionally_move_p (mode)
9888 || REG_P (original_target))
9889 #endif
9890 && !MEM_P (original_target))
9891 temp = original_target;
9892 else
9893 temp = assign_temp (type, 0, 0, 1);
9894
9895 do_pending_stack_adjust ();
9896 NO_DEFER_POP;
9897 op0 = gen_label_rtx ();
9898 op1 = gen_label_rtx ();
9899 jumpifnot (treeop0, op0, -1);
9900 store_expr (treeop1, temp,
9901 modifier == EXPAND_STACK_PARM,
9902 false);
9903
9904 emit_jump_insn (gen_jump (op1));
9905 emit_barrier ();
9906 emit_label (op0);
9907 store_expr (treeop2, temp,
9908 modifier == EXPAND_STACK_PARM,
9909 false);
9910
9911 emit_label (op1);
9912 OK_DEFER_POP;
9913 return temp;
9914
9915 case VEC_COND_EXPR:
9916 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9917 return target;
9918
9919 case MODIFY_EXPR:
9920 {
9921 tree lhs = treeop0;
9922 tree rhs = treeop1;
9923 gcc_assert (ignore);
9924
9925 /* Check for |= or &= of a bitfield of size one into another bitfield
9926 of size 1. In this case, (unless we need the result of the
9927 assignment) we can do this more efficiently with a
9928 test followed by an assignment, if necessary.
9929
9930 ??? At this point, we can't get a BIT_FIELD_REF here. But if
9931 things change so we do, this code should be enhanced to
9932 support it. */
9933 if (TREE_CODE (lhs) == COMPONENT_REF
9934 && (TREE_CODE (rhs) == BIT_IOR_EXPR
9935 || TREE_CODE (rhs) == BIT_AND_EXPR)
9936 && TREE_OPERAND (rhs, 0) == lhs
9937 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
9938 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
9939 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
9940 {
9941 rtx label = gen_label_rtx ();
9942 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
9943 do_jump (TREE_OPERAND (rhs, 1),
9944 value ? label : 0,
9945 value ? 0 : label, -1);
9946 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
9947 MOVE_NONTEMPORAL (exp));
9948 do_pending_stack_adjust ();
9949 emit_label (label);
9950 return const0_rtx;
9951 }
9952
9953 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
9954 return const0_rtx;
9955 }
9956
9957 case ADDR_EXPR:
9958 return expand_expr_addr_expr (exp, target, tmode, modifier);
9959
9960 case REALPART_EXPR:
9961 op0 = expand_normal (treeop0);
9962 return read_complex_part (op0, false);
9963
9964 case IMAGPART_EXPR:
9965 op0 = expand_normal (treeop0);
9966 return read_complex_part (op0, true);
9967
9968 case RETURN_EXPR:
9969 case LABEL_EXPR:
9970 case GOTO_EXPR:
9971 case SWITCH_EXPR:
9972 case ASM_EXPR:
9973 /* Expanded in cfgexpand.c. */
9974 gcc_unreachable ();
9975
9976 case TRY_CATCH_EXPR:
9977 case CATCH_EXPR:
9978 case EH_FILTER_EXPR:
9979 case TRY_FINALLY_EXPR:
9980 /* Lowered by tree-eh.c. */
9981 gcc_unreachable ();
9982
9983 case WITH_CLEANUP_EXPR:
9984 case CLEANUP_POINT_EXPR:
9985 case TARGET_EXPR:
9986 case CASE_LABEL_EXPR:
9987 case VA_ARG_EXPR:
9988 case BIND_EXPR:
9989 case INIT_EXPR:
9990 case CONJ_EXPR:
9991 case COMPOUND_EXPR:
9992 case PREINCREMENT_EXPR:
9993 case PREDECREMENT_EXPR:
9994 case POSTINCREMENT_EXPR:
9995 case POSTDECREMENT_EXPR:
9996 case LOOP_EXPR:
9997 case EXIT_EXPR:
9998 /* Lowered by gimplify.c. */
9999 gcc_unreachable ();
10000
10001 case FDESC_EXPR:
10002 /* Function descriptors are not valid except for as
10003 initialization constants, and should not be expanded. */
10004 gcc_unreachable ();
10005
10006 case WITH_SIZE_EXPR:
10007 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10008 have pulled out the size to use in whatever context it needed. */
10009 return expand_expr_real (treeop0, original_target, tmode,
10010 modifier, alt_rtl);
10011
10012 case COMPOUND_LITERAL_EXPR:
10013 {
10014 /* Initialize the anonymous variable declared in the compound
10015 literal, then return the variable. */
10016 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
10017
10018 /* Create RTL for this variable. */
10019 if (!DECL_RTL_SET_P (decl))
10020 {
10021 if (DECL_HARD_REGISTER (decl))
10022 /* The user specified an assembler name for this variable.
10023 Set that up now. */
10024 rest_of_decl_compilation (decl, 0, 0);
10025 else
10026 expand_decl (decl);
10027 }
10028
10029 return expand_expr_real (decl, original_target, tmode,
10030 modifier, alt_rtl);
10031 }
10032
10033 default:
10034 return expand_expr_real_2 (&ops, target, tmode, modifier);
10035 }
10036 }
10037 \f
10038 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10039 signedness of TYPE), possibly returning the result in TARGET. */
10040 static rtx
10041 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10042 {
10043 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10044 if (target && GET_MODE (target) != GET_MODE (exp))
10045 target = 0;
10046 /* For constant values, reduce using build_int_cst_type. */
10047 if (CONST_INT_P (exp))
10048 {
10049 HOST_WIDE_INT value = INTVAL (exp);
10050 tree t = build_int_cst_type (type, value);
10051 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10052 }
10053 else if (TYPE_UNSIGNED (type))
10054 {
10055 rtx mask = immed_double_int_const (double_int_mask (prec),
10056 GET_MODE (exp));
10057 return expand_and (GET_MODE (exp), exp, mask, target);
10058 }
10059 else
10060 {
10061 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10062 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10063 exp, count, target, 0);
10064 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10065 exp, count, target, 0);
10066 }
10067 }
10068 \f
10069 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10070 when applied to the address of EXP produces an address known to be
10071 aligned more than BIGGEST_ALIGNMENT. */
10072
10073 static int
10074 is_aligning_offset (const_tree offset, const_tree exp)
10075 {
10076 /* Strip off any conversions. */
10077 while (CONVERT_EXPR_P (offset))
10078 offset = TREE_OPERAND (offset, 0);
10079
10080 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10081 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10082 if (TREE_CODE (offset) != BIT_AND_EXPR
10083 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10084 || compare_tree_int (TREE_OPERAND (offset, 1),
10085 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10086 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10087 return 0;
10088
10089 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10090 It must be NEGATE_EXPR. Then strip any more conversions. */
10091 offset = TREE_OPERAND (offset, 0);
10092 while (CONVERT_EXPR_P (offset))
10093 offset = TREE_OPERAND (offset, 0);
10094
10095 if (TREE_CODE (offset) != NEGATE_EXPR)
10096 return 0;
10097
10098 offset = TREE_OPERAND (offset, 0);
10099 while (CONVERT_EXPR_P (offset))
10100 offset = TREE_OPERAND (offset, 0);
10101
10102 /* This must now be the address of EXP. */
10103 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10104 }
10105 \f
10106 /* Return the tree node if an ARG corresponds to a string constant or zero
10107 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10108 in bytes within the string that ARG is accessing. The type of the
10109 offset will be `sizetype'. */
10110
10111 tree
10112 string_constant (tree arg, tree *ptr_offset)
10113 {
10114 tree array, offset, lower_bound;
10115 STRIP_NOPS (arg);
10116
10117 if (TREE_CODE (arg) == ADDR_EXPR)
10118 {
10119 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10120 {
10121 *ptr_offset = size_zero_node;
10122 return TREE_OPERAND (arg, 0);
10123 }
10124 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10125 {
10126 array = TREE_OPERAND (arg, 0);
10127 offset = size_zero_node;
10128 }
10129 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10130 {
10131 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10132 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10133 if (TREE_CODE (array) != STRING_CST
10134 && TREE_CODE (array) != VAR_DECL)
10135 return 0;
10136
10137 /* Check if the array has a nonzero lower bound. */
10138 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10139 if (!integer_zerop (lower_bound))
10140 {
10141 /* If the offset and base aren't both constants, return 0. */
10142 if (TREE_CODE (lower_bound) != INTEGER_CST)
10143 return 0;
10144 if (TREE_CODE (offset) != INTEGER_CST)
10145 return 0;
10146 /* Adjust offset by the lower bound. */
10147 offset = size_diffop (fold_convert (sizetype, offset),
10148 fold_convert (sizetype, lower_bound));
10149 }
10150 }
10151 else
10152 return 0;
10153 }
10154 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10155 {
10156 tree arg0 = TREE_OPERAND (arg, 0);
10157 tree arg1 = TREE_OPERAND (arg, 1);
10158
10159 STRIP_NOPS (arg0);
10160 STRIP_NOPS (arg1);
10161
10162 if (TREE_CODE (arg0) == ADDR_EXPR
10163 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10164 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10165 {
10166 array = TREE_OPERAND (arg0, 0);
10167 offset = arg1;
10168 }
10169 else if (TREE_CODE (arg1) == ADDR_EXPR
10170 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10171 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10172 {
10173 array = TREE_OPERAND (arg1, 0);
10174 offset = arg0;
10175 }
10176 else
10177 return 0;
10178 }
10179 else
10180 return 0;
10181
10182 if (TREE_CODE (array) == STRING_CST)
10183 {
10184 *ptr_offset = fold_convert (sizetype, offset);
10185 return array;
10186 }
10187 else if (TREE_CODE (array) == VAR_DECL
10188 || TREE_CODE (array) == CONST_DECL)
10189 {
10190 int length;
10191
10192 /* Variables initialized to string literals can be handled too. */
10193 if (!const_value_known_p (array)
10194 || !DECL_INITIAL (array)
10195 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10196 return 0;
10197
10198 /* Avoid const char foo[4] = "abcde"; */
10199 if (DECL_SIZE_UNIT (array) == NULL_TREE
10200 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10201 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10202 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10203 return 0;
10204
10205 /* If variable is bigger than the string literal, OFFSET must be constant
10206 and inside of the bounds of the string literal. */
10207 offset = fold_convert (sizetype, offset);
10208 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10209 && (! host_integerp (offset, 1)
10210 || compare_tree_int (offset, length) >= 0))
10211 return 0;
10212
10213 *ptr_offset = offset;
10214 return DECL_INITIAL (array);
10215 }
10216
10217 return 0;
10218 }
10219 \f
10220 /* Generate code to calculate OPS, and exploded expression
10221 using a store-flag instruction and return an rtx for the result.
10222 OPS reflects a comparison.
10223
10224 If TARGET is nonzero, store the result there if convenient.
10225
10226 Return zero if there is no suitable set-flag instruction
10227 available on this machine.
10228
10229 Once expand_expr has been called on the arguments of the comparison,
10230 we are committed to doing the store flag, since it is not safe to
10231 re-evaluate the expression. We emit the store-flag insn by calling
10232 emit_store_flag, but only expand the arguments if we have a reason
10233 to believe that emit_store_flag will be successful. If we think that
10234 it will, but it isn't, we have to simulate the store-flag with a
10235 set/jump/set sequence. */
10236
10237 static rtx
10238 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10239 {
10240 enum rtx_code code;
10241 tree arg0, arg1, type;
10242 tree tem;
10243 enum machine_mode operand_mode;
10244 int unsignedp;
10245 rtx op0, op1;
10246 rtx subtarget = target;
10247 location_t loc = ops->location;
10248
10249 arg0 = ops->op0;
10250 arg1 = ops->op1;
10251
10252 /* Don't crash if the comparison was erroneous. */
10253 if (arg0 == error_mark_node || arg1 == error_mark_node)
10254 return const0_rtx;
10255
10256 type = TREE_TYPE (arg0);
10257 operand_mode = TYPE_MODE (type);
10258 unsignedp = TYPE_UNSIGNED (type);
10259
10260 /* We won't bother with BLKmode store-flag operations because it would mean
10261 passing a lot of information to emit_store_flag. */
10262 if (operand_mode == BLKmode)
10263 return 0;
10264
10265 /* We won't bother with store-flag operations involving function pointers
10266 when function pointers must be canonicalized before comparisons. */
10267 #ifdef HAVE_canonicalize_funcptr_for_compare
10268 if (HAVE_canonicalize_funcptr_for_compare
10269 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10270 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10271 == FUNCTION_TYPE))
10272 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10273 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10274 == FUNCTION_TYPE))))
10275 return 0;
10276 #endif
10277
10278 STRIP_NOPS (arg0);
10279 STRIP_NOPS (arg1);
10280
10281 /* Get the rtx comparison code to use. We know that EXP is a comparison
10282 operation of some type. Some comparisons against 1 and -1 can be
10283 converted to comparisons with zero. Do so here so that the tests
10284 below will be aware that we have a comparison with zero. These
10285 tests will not catch constants in the first operand, but constants
10286 are rarely passed as the first operand. */
10287
10288 switch (ops->code)
10289 {
10290 case EQ_EXPR:
10291 code = EQ;
10292 break;
10293 case NE_EXPR:
10294 code = NE;
10295 break;
10296 case LT_EXPR:
10297 if (integer_onep (arg1))
10298 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10299 else
10300 code = unsignedp ? LTU : LT;
10301 break;
10302 case LE_EXPR:
10303 if (! unsignedp && integer_all_onesp (arg1))
10304 arg1 = integer_zero_node, code = LT;
10305 else
10306 code = unsignedp ? LEU : LE;
10307 break;
10308 case GT_EXPR:
10309 if (! unsignedp && integer_all_onesp (arg1))
10310 arg1 = integer_zero_node, code = GE;
10311 else
10312 code = unsignedp ? GTU : GT;
10313 break;
10314 case GE_EXPR:
10315 if (integer_onep (arg1))
10316 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10317 else
10318 code = unsignedp ? GEU : GE;
10319 break;
10320
10321 case UNORDERED_EXPR:
10322 code = UNORDERED;
10323 break;
10324 case ORDERED_EXPR:
10325 code = ORDERED;
10326 break;
10327 case UNLT_EXPR:
10328 code = UNLT;
10329 break;
10330 case UNLE_EXPR:
10331 code = UNLE;
10332 break;
10333 case UNGT_EXPR:
10334 code = UNGT;
10335 break;
10336 case UNGE_EXPR:
10337 code = UNGE;
10338 break;
10339 case UNEQ_EXPR:
10340 code = UNEQ;
10341 break;
10342 case LTGT_EXPR:
10343 code = LTGT;
10344 break;
10345
10346 default:
10347 gcc_unreachable ();
10348 }
10349
10350 /* Put a constant second. */
10351 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10352 || TREE_CODE (arg0) == FIXED_CST)
10353 {
10354 tem = arg0; arg0 = arg1; arg1 = tem;
10355 code = swap_condition (code);
10356 }
10357
10358 /* If this is an equality or inequality test of a single bit, we can
10359 do this by shifting the bit being tested to the low-order bit and
10360 masking the result with the constant 1. If the condition was EQ,
10361 we xor it with 1. This does not require an scc insn and is faster
10362 than an scc insn even if we have it.
10363
10364 The code to make this transformation was moved into fold_single_bit_test,
10365 so we just call into the folder and expand its result. */
10366
10367 if ((code == NE || code == EQ)
10368 && TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1)
10369 && integer_pow2p (TREE_OPERAND (arg0, 1))
10370 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10371 {
10372 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10373 return expand_expr (fold_single_bit_test (loc,
10374 code == NE ? NE_EXPR : EQ_EXPR,
10375 arg0, arg1, type),
10376 target, VOIDmode, EXPAND_NORMAL);
10377 }
10378
10379 if (! get_subtarget (target)
10380 || GET_MODE (subtarget) != operand_mode)
10381 subtarget = 0;
10382
10383 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10384
10385 if (target == 0)
10386 target = gen_reg_rtx (mode);
10387
10388 /* Try a cstore if possible. */
10389 return emit_store_flag_force (target, code, op0, op1,
10390 operand_mode, unsignedp,
10391 (TYPE_PRECISION (ops->type) == 1
10392 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10393 }
10394 \f
10395
10396 /* Stubs in case we haven't got a casesi insn. */
10397 #ifndef HAVE_casesi
10398 # define HAVE_casesi 0
10399 # define gen_casesi(a, b, c, d, e) (0)
10400 # define CODE_FOR_casesi CODE_FOR_nothing
10401 #endif
10402
10403 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10404 0 otherwise (i.e. if there is no casesi instruction). */
10405 int
10406 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10407 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10408 rtx fallback_label ATTRIBUTE_UNUSED)
10409 {
10410 struct expand_operand ops[5];
10411 enum machine_mode index_mode = SImode;
10412 int index_bits = GET_MODE_BITSIZE (index_mode);
10413 rtx op1, op2, index;
10414
10415 if (! HAVE_casesi)
10416 return 0;
10417
10418 /* Convert the index to SImode. */
10419 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10420 {
10421 enum machine_mode omode = TYPE_MODE (index_type);
10422 rtx rangertx = expand_normal (range);
10423
10424 /* We must handle the endpoints in the original mode. */
10425 index_expr = build2 (MINUS_EXPR, index_type,
10426 index_expr, minval);
10427 minval = integer_zero_node;
10428 index = expand_normal (index_expr);
10429 if (default_label)
10430 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10431 omode, 1, default_label);
10432 /* Now we can safely truncate. */
10433 index = convert_to_mode (index_mode, index, 0);
10434 }
10435 else
10436 {
10437 if (TYPE_MODE (index_type) != index_mode)
10438 {
10439 index_type = lang_hooks.types.type_for_size (index_bits, 0);
10440 index_expr = fold_convert (index_type, index_expr);
10441 }
10442
10443 index = expand_normal (index_expr);
10444 }
10445
10446 do_pending_stack_adjust ();
10447
10448 op1 = expand_normal (minval);
10449 op2 = expand_normal (range);
10450
10451 create_input_operand (&ops[0], index, index_mode);
10452 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10453 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10454 create_fixed_operand (&ops[3], table_label);
10455 create_fixed_operand (&ops[4], (default_label
10456 ? default_label
10457 : fallback_label));
10458 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10459 return 1;
10460 }
10461
10462 /* Attempt to generate a tablejump instruction; same concept. */
10463 #ifndef HAVE_tablejump
10464 #define HAVE_tablejump 0
10465 #define gen_tablejump(x, y) (0)
10466 #endif
10467
10468 /* Subroutine of the next function.
10469
10470 INDEX is the value being switched on, with the lowest value
10471 in the table already subtracted.
10472 MODE is its expected mode (needed if INDEX is constant).
10473 RANGE is the length of the jump table.
10474 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10475
10476 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10477 index value is out of range. */
10478
10479 static void
10480 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10481 rtx default_label)
10482 {
10483 rtx temp, vector;
10484
10485 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10486 cfun->cfg->max_jumptable_ents = INTVAL (range);
10487
10488 /* Do an unsigned comparison (in the proper mode) between the index
10489 expression and the value which represents the length of the range.
10490 Since we just finished subtracting the lower bound of the range
10491 from the index expression, this comparison allows us to simultaneously
10492 check that the original index expression value is both greater than
10493 or equal to the minimum value of the range and less than or equal to
10494 the maximum value of the range. */
10495
10496 if (default_label)
10497 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10498 default_label);
10499
10500 /* If index is in range, it must fit in Pmode.
10501 Convert to Pmode so we can index with it. */
10502 if (mode != Pmode)
10503 index = convert_to_mode (Pmode, index, 1);
10504
10505 /* Don't let a MEM slip through, because then INDEX that comes
10506 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10507 and break_out_memory_refs will go to work on it and mess it up. */
10508 #ifdef PIC_CASE_VECTOR_ADDRESS
10509 if (flag_pic && !REG_P (index))
10510 index = copy_to_mode_reg (Pmode, index);
10511 #endif
10512
10513 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10514 GET_MODE_SIZE, because this indicates how large insns are. The other
10515 uses should all be Pmode, because they are addresses. This code
10516 could fail if addresses and insns are not the same size. */
10517 index = gen_rtx_PLUS (Pmode,
10518 gen_rtx_MULT (Pmode, index,
10519 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10520 gen_rtx_LABEL_REF (Pmode, table_label));
10521 #ifdef PIC_CASE_VECTOR_ADDRESS
10522 if (flag_pic)
10523 index = PIC_CASE_VECTOR_ADDRESS (index);
10524 else
10525 #endif
10526 index = memory_address (CASE_VECTOR_MODE, index);
10527 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10528 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10529 convert_move (temp, vector, 0);
10530
10531 emit_jump_insn (gen_tablejump (temp, table_label));
10532
10533 /* If we are generating PIC code or if the table is PC-relative, the
10534 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10535 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10536 emit_barrier ();
10537 }
10538
10539 int
10540 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10541 rtx table_label, rtx default_label)
10542 {
10543 rtx index;
10544
10545 if (! HAVE_tablejump)
10546 return 0;
10547
10548 index_expr = fold_build2 (MINUS_EXPR, index_type,
10549 fold_convert (index_type, index_expr),
10550 fold_convert (index_type, minval));
10551 index = expand_normal (index_expr);
10552 do_pending_stack_adjust ();
10553
10554 do_tablejump (index, TYPE_MODE (index_type),
10555 convert_modes (TYPE_MODE (index_type),
10556 TYPE_MODE (TREE_TYPE (range)),
10557 expand_normal (range),
10558 TYPE_UNSIGNED (TREE_TYPE (range))),
10559 table_label, default_label);
10560 return 1;
10561 }
10562
10563 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10564 static rtx
10565 const_vector_from_tree (tree exp)
10566 {
10567 rtvec v;
10568 int units, i;
10569 tree link, elt;
10570 enum machine_mode inner, mode;
10571
10572 mode = TYPE_MODE (TREE_TYPE (exp));
10573
10574 if (initializer_zerop (exp))
10575 return CONST0_RTX (mode);
10576
10577 units = GET_MODE_NUNITS (mode);
10578 inner = GET_MODE_INNER (mode);
10579
10580 v = rtvec_alloc (units);
10581
10582 link = TREE_VECTOR_CST_ELTS (exp);
10583 for (i = 0; link; link = TREE_CHAIN (link), ++i)
10584 {
10585 elt = TREE_VALUE (link);
10586
10587 if (TREE_CODE (elt) == REAL_CST)
10588 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10589 inner);
10590 else if (TREE_CODE (elt) == FIXED_CST)
10591 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10592 inner);
10593 else
10594 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10595 inner);
10596 }
10597
10598 /* Initialize remaining elements to 0. */
10599 for (; i < units; ++i)
10600 RTVEC_ELT (v, i) = CONST0_RTX (inner);
10601
10602 return gen_rtx_CONST_VECTOR (mode, v);
10603 }
10604
10605 /* Build a decl for a personality function given a language prefix. */
10606
10607 tree
10608 build_personality_function (const char *lang)
10609 {
10610 const char *unwind_and_version;
10611 tree decl, type;
10612 char *name;
10613
10614 switch (targetm_common.except_unwind_info (&global_options))
10615 {
10616 case UI_NONE:
10617 return NULL;
10618 case UI_SJLJ:
10619 unwind_and_version = "_sj0";
10620 break;
10621 case UI_DWARF2:
10622 case UI_TARGET:
10623 unwind_and_version = "_v0";
10624 break;
10625 default:
10626 gcc_unreachable ();
10627 }
10628
10629 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
10630
10631 type = build_function_type_list (integer_type_node, integer_type_node,
10632 long_long_unsigned_type_node,
10633 ptr_type_node, ptr_type_node, NULL_TREE);
10634 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
10635 get_identifier (name), type);
10636 DECL_ARTIFICIAL (decl) = 1;
10637 DECL_EXTERNAL (decl) = 1;
10638 TREE_PUBLIC (decl) = 1;
10639
10640 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
10641 are the flags assigned by targetm.encode_section_info. */
10642 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
10643
10644 return decl;
10645 }
10646
10647 /* Extracts the personality function of DECL and returns the corresponding
10648 libfunc. */
10649
10650 rtx
10651 get_personality_function (tree decl)
10652 {
10653 tree personality = DECL_FUNCTION_PERSONALITY (decl);
10654 enum eh_personality_kind pk;
10655
10656 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
10657 if (pk == eh_personality_none)
10658 return NULL;
10659
10660 if (!personality
10661 && pk == eh_personality_any)
10662 personality = lang_hooks.eh_personality ();
10663
10664 if (pk == eh_personality_lang)
10665 gcc_assert (personality != NULL_TREE);
10666
10667 return XEXP (DECL_RTL (personality), 0);
10668 }
10669
10670 #include "gt-expr.h"