expr.c (expand_expr_real_1): handle misaligned scalar reads from memory through MEM_R...
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
4 2012 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "common/common-target.h"
53 #include "timevar.h"
54 #include "df.h"
55 #include "diagnostic.h"
56 #include "ssaexpand.h"
57 #include "target-globals.h"
58 #include "params.h"
59
60 /* Decide whether a function's arguments should be processed
61 from first to last or from last to first.
62
63 They should if the stack and args grow in opposite directions, but
64 only if we have push insns. */
65
66 #ifdef PUSH_ROUNDING
67
68 #ifndef PUSH_ARGS_REVERSED
69 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
70 #define PUSH_ARGS_REVERSED /* If it's last to first. */
71 #endif
72 #endif
73
74 #endif
75
76 #ifndef STACK_PUSH_CODE
77 #ifdef STACK_GROWS_DOWNWARD
78 #define STACK_PUSH_CODE PRE_DEC
79 #else
80 #define STACK_PUSH_CODE PRE_INC
81 #endif
82 #endif
83
84
85 /* If this is nonzero, we do not bother generating VOLATILE
86 around volatile memory references, and we are willing to
87 output indirect addresses. If cse is to follow, we reject
88 indirect addresses so a useful potential cse is generated;
89 if it is used only once, instruction combination will produce
90 the same indirect address eventually. */
91 int cse_not_expected;
92
93 /* This structure is used by move_by_pieces to describe the move to
94 be performed. */
95 struct move_by_pieces_d
96 {
97 rtx to;
98 rtx to_addr;
99 int autinc_to;
100 int explicit_inc_to;
101 rtx from;
102 rtx from_addr;
103 int autinc_from;
104 int explicit_inc_from;
105 unsigned HOST_WIDE_INT len;
106 HOST_WIDE_INT offset;
107 int reverse;
108 };
109
110 /* This structure is used by store_by_pieces to describe the clear to
111 be performed. */
112
113 struct store_by_pieces_d
114 {
115 rtx to;
116 rtx to_addr;
117 int autinc_to;
118 int explicit_inc_to;
119 unsigned HOST_WIDE_INT len;
120 HOST_WIDE_INT offset;
121 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
122 void *constfundata;
123 int reverse;
124 };
125
126 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
127 struct move_by_pieces_d *);
128 static bool block_move_libcall_safe_for_call_parm (void);
129 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
130 static tree emit_block_move_libcall_fn (int);
131 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
132 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
133 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
134 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
135 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
136 struct store_by_pieces_d *);
137 static tree clear_storage_libcall_fn (int);
138 static rtx compress_float_constant (rtx, rtx);
139 static rtx get_subtarget (rtx);
140 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
141 HOST_WIDE_INT, enum machine_mode,
142 tree, tree, int, alias_set_type);
143 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
144 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
145 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
146 enum machine_mode,
147 tree, tree, alias_set_type, bool);
148
149 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
150
151 static int is_aligning_offset (const_tree, const_tree);
152 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
153 enum expand_modifier);
154 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
155 static rtx do_store_flag (sepops, rtx, enum machine_mode);
156 #ifdef PUSH_ROUNDING
157 static void emit_single_push_insn (enum machine_mode, rtx, tree);
158 #endif
159 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
160 static rtx const_vector_from_tree (tree);
161 static void write_complex_part (rtx, rtx, bool);
162
163 /* This macro is used to determine whether move_by_pieces should be called
164 to perform a structure copy. */
165 #ifndef MOVE_BY_PIECES_P
166 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
167 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
168 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
169 #endif
170
171 /* This macro is used to determine whether clear_by_pieces should be
172 called to clear storage. */
173 #ifndef CLEAR_BY_PIECES_P
174 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
175 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
176 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
177 #endif
178
179 /* This macro is used to determine whether store_by_pieces should be
180 called to "memset" storage with byte values other than zero. */
181 #ifndef SET_BY_PIECES_P
182 #define SET_BY_PIECES_P(SIZE, ALIGN) \
183 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
184 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
185 #endif
186
187 /* This macro is used to determine whether store_by_pieces should be
188 called to "memcpy" storage when the source is a constant string. */
189 #ifndef STORE_BY_PIECES_P
190 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
191 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
192 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
193 #endif
194
195 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
196
197 #ifndef SLOW_UNALIGNED_ACCESS
198 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
199 #endif
200 \f
201 /* This is run to set up which modes can be used
202 directly in memory and to initialize the block move optab. It is run
203 at the beginning of compilation and when the target is reinitialized. */
204
205 void
206 init_expr_target (void)
207 {
208 rtx insn, pat;
209 enum machine_mode mode;
210 int num_clobbers;
211 rtx mem, mem1;
212 rtx reg;
213
214 /* Try indexing by frame ptr and try by stack ptr.
215 It is known that on the Convex the stack ptr isn't a valid index.
216 With luck, one or the other is valid on any machine. */
217 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
218 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
219
220 /* A scratch register we can modify in-place below to avoid
221 useless RTL allocations. */
222 reg = gen_rtx_REG (VOIDmode, -1);
223
224 insn = rtx_alloc (INSN);
225 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
226 PATTERN (insn) = pat;
227
228 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
229 mode = (enum machine_mode) ((int) mode + 1))
230 {
231 int regno;
232
233 direct_load[(int) mode] = direct_store[(int) mode] = 0;
234 PUT_MODE (mem, mode);
235 PUT_MODE (mem1, mode);
236 PUT_MODE (reg, mode);
237
238 /* See if there is some register that can be used in this mode and
239 directly loaded or stored from memory. */
240
241 if (mode != VOIDmode && mode != BLKmode)
242 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
243 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
244 regno++)
245 {
246 if (! HARD_REGNO_MODE_OK (regno, mode))
247 continue;
248
249 SET_REGNO (reg, regno);
250
251 SET_SRC (pat) = mem;
252 SET_DEST (pat) = reg;
253 if (recog (pat, insn, &num_clobbers) >= 0)
254 direct_load[(int) mode] = 1;
255
256 SET_SRC (pat) = mem1;
257 SET_DEST (pat) = reg;
258 if (recog (pat, insn, &num_clobbers) >= 0)
259 direct_load[(int) mode] = 1;
260
261 SET_SRC (pat) = reg;
262 SET_DEST (pat) = mem;
263 if (recog (pat, insn, &num_clobbers) >= 0)
264 direct_store[(int) mode] = 1;
265
266 SET_SRC (pat) = reg;
267 SET_DEST (pat) = mem1;
268 if (recog (pat, insn, &num_clobbers) >= 0)
269 direct_store[(int) mode] = 1;
270 }
271 }
272
273 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
274
275 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
276 mode = GET_MODE_WIDER_MODE (mode))
277 {
278 enum machine_mode srcmode;
279 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
280 srcmode = GET_MODE_WIDER_MODE (srcmode))
281 {
282 enum insn_code ic;
283
284 ic = can_extend_p (mode, srcmode, 0);
285 if (ic == CODE_FOR_nothing)
286 continue;
287
288 PUT_MODE (mem, srcmode);
289
290 if (insn_operand_matches (ic, 1, mem))
291 float_extend_from_mem[mode][srcmode] = true;
292 }
293 }
294 }
295
296 /* This is run at the start of compiling a function. */
297
298 void
299 init_expr (void)
300 {
301 memset (&crtl->expr, 0, sizeof (crtl->expr));
302 }
303 \f
304 /* Copy data from FROM to TO, where the machine modes are not the same.
305 Both modes may be integer, or both may be floating, or both may be
306 fixed-point.
307 UNSIGNEDP should be nonzero if FROM is an unsigned type.
308 This causes zero-extension instead of sign-extension. */
309
310 void
311 convert_move (rtx to, rtx from, int unsignedp)
312 {
313 enum machine_mode to_mode = GET_MODE (to);
314 enum machine_mode from_mode = GET_MODE (from);
315 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
316 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
317 enum insn_code code;
318 rtx libcall;
319
320 /* rtx code for making an equivalent value. */
321 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
322 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
323
324
325 gcc_assert (to_real == from_real);
326 gcc_assert (to_mode != BLKmode);
327 gcc_assert (from_mode != BLKmode);
328
329 /* If the source and destination are already the same, then there's
330 nothing to do. */
331 if (to == from)
332 return;
333
334 /* If FROM is a SUBREG that indicates that we have already done at least
335 the required extension, strip it. We don't handle such SUBREGs as
336 TO here. */
337
338 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
339 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
340 >= GET_MODE_PRECISION (to_mode))
341 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
342 from = gen_lowpart (to_mode, from), from_mode = to_mode;
343
344 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
345
346 if (to_mode == from_mode
347 || (from_mode == VOIDmode && CONSTANT_P (from)))
348 {
349 emit_move_insn (to, from);
350 return;
351 }
352
353 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
354 {
355 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
356
357 if (VECTOR_MODE_P (to_mode))
358 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
359 else
360 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
361
362 emit_move_insn (to, from);
363 return;
364 }
365
366 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
367 {
368 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
369 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
370 return;
371 }
372
373 if (to_real)
374 {
375 rtx value, insns;
376 convert_optab tab;
377
378 gcc_assert ((GET_MODE_PRECISION (from_mode)
379 != GET_MODE_PRECISION (to_mode))
380 || (DECIMAL_FLOAT_MODE_P (from_mode)
381 != DECIMAL_FLOAT_MODE_P (to_mode)));
382
383 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
384 /* Conversion between decimal float and binary float, same size. */
385 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
386 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
387 tab = sext_optab;
388 else
389 tab = trunc_optab;
390
391 /* Try converting directly if the insn is supported. */
392
393 code = convert_optab_handler (tab, to_mode, from_mode);
394 if (code != CODE_FOR_nothing)
395 {
396 emit_unop_insn (code, to, from,
397 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
398 return;
399 }
400
401 /* Otherwise use a libcall. */
402 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
403
404 /* Is this conversion implemented yet? */
405 gcc_assert (libcall);
406
407 start_sequence ();
408 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
409 1, from, from_mode);
410 insns = get_insns ();
411 end_sequence ();
412 emit_libcall_block (insns, to, value,
413 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
414 from)
415 : gen_rtx_FLOAT_EXTEND (to_mode, from));
416 return;
417 }
418
419 /* Handle pointer conversion. */ /* SPEE 900220. */
420 /* Targets are expected to provide conversion insns between PxImode and
421 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
422 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
423 {
424 enum machine_mode full_mode
425 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
426
427 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
428 != CODE_FOR_nothing);
429
430 if (full_mode != from_mode)
431 from = convert_to_mode (full_mode, from, unsignedp);
432 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
433 to, from, UNKNOWN);
434 return;
435 }
436 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
437 {
438 rtx new_from;
439 enum machine_mode full_mode
440 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
441
442 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)
443 != CODE_FOR_nothing);
444
445 if (to_mode == full_mode)
446 {
447 emit_unop_insn (convert_optab_handler (sext_optab, full_mode,
448 from_mode),
449 to, from, UNKNOWN);
450 return;
451 }
452
453 new_from = gen_reg_rtx (full_mode);
454 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode),
455 new_from, from, UNKNOWN);
456
457 /* else proceed to integer conversions below. */
458 from_mode = full_mode;
459 from = new_from;
460 }
461
462 /* Make sure both are fixed-point modes or both are not. */
463 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
464 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
465 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
466 {
467 /* If we widen from_mode to to_mode and they are in the same class,
468 we won't saturate the result.
469 Otherwise, always saturate the result to play safe. */
470 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
471 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
472 expand_fixed_convert (to, from, 0, 0);
473 else
474 expand_fixed_convert (to, from, 0, 1);
475 return;
476 }
477
478 /* Now both modes are integers. */
479
480 /* Handle expanding beyond a word. */
481 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
482 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
483 {
484 rtx insns;
485 rtx lowpart;
486 rtx fill_value;
487 rtx lowfrom;
488 int i;
489 enum machine_mode lowpart_mode;
490 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
491
492 /* Try converting directly if the insn is supported. */
493 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
494 != CODE_FOR_nothing)
495 {
496 /* If FROM is a SUBREG, put it into a register. Do this
497 so that we always generate the same set of insns for
498 better cse'ing; if an intermediate assignment occurred,
499 we won't be doing the operation directly on the SUBREG. */
500 if (optimize > 0 && GET_CODE (from) == SUBREG)
501 from = force_reg (from_mode, from);
502 emit_unop_insn (code, to, from, equiv_code);
503 return;
504 }
505 /* Next, try converting via full word. */
506 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
507 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
508 != CODE_FOR_nothing))
509 {
510 rtx word_to = gen_reg_rtx (word_mode);
511 if (REG_P (to))
512 {
513 if (reg_overlap_mentioned_p (to, from))
514 from = force_reg (from_mode, from);
515 emit_clobber (to);
516 }
517 convert_move (word_to, from, unsignedp);
518 emit_unop_insn (code, to, word_to, equiv_code);
519 return;
520 }
521
522 /* No special multiword conversion insn; do it by hand. */
523 start_sequence ();
524
525 /* Since we will turn this into a no conflict block, we must ensure
526 that the source does not overlap the target. */
527
528 if (reg_overlap_mentioned_p (to, from))
529 from = force_reg (from_mode, from);
530
531 /* Get a copy of FROM widened to a word, if necessary. */
532 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
533 lowpart_mode = word_mode;
534 else
535 lowpart_mode = from_mode;
536
537 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
538
539 lowpart = gen_lowpart (lowpart_mode, to);
540 emit_move_insn (lowpart, lowfrom);
541
542 /* Compute the value to put in each remaining word. */
543 if (unsignedp)
544 fill_value = const0_rtx;
545 else
546 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
547 LT, lowfrom, const0_rtx,
548 VOIDmode, 0, -1);
549
550 /* Fill the remaining words. */
551 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
552 {
553 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
554 rtx subword = operand_subword (to, index, 1, to_mode);
555
556 gcc_assert (subword);
557
558 if (fill_value != subword)
559 emit_move_insn (subword, fill_value);
560 }
561
562 insns = get_insns ();
563 end_sequence ();
564
565 emit_insn (insns);
566 return;
567 }
568
569 /* Truncating multi-word to a word or less. */
570 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
571 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
572 {
573 if (!((MEM_P (from)
574 && ! MEM_VOLATILE_P (from)
575 && direct_load[(int) to_mode]
576 && ! mode_dependent_address_p (XEXP (from, 0)))
577 || REG_P (from)
578 || GET_CODE (from) == SUBREG))
579 from = force_reg (from_mode, from);
580 convert_move (to, gen_lowpart (word_mode, from), 0);
581 return;
582 }
583
584 /* Now follow all the conversions between integers
585 no more than a word long. */
586
587 /* For truncation, usually we can just refer to FROM in a narrower mode. */
588 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
589 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
590 {
591 if (!((MEM_P (from)
592 && ! MEM_VOLATILE_P (from)
593 && direct_load[(int) to_mode]
594 && ! mode_dependent_address_p (XEXP (from, 0)))
595 || REG_P (from)
596 || GET_CODE (from) == SUBREG))
597 from = force_reg (from_mode, from);
598 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
599 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
600 from = copy_to_reg (from);
601 emit_move_insn (to, gen_lowpart (to_mode, from));
602 return;
603 }
604
605 /* Handle extension. */
606 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
607 {
608 /* Convert directly if that works. */
609 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
610 != CODE_FOR_nothing)
611 {
612 emit_unop_insn (code, to, from, equiv_code);
613 return;
614 }
615 else
616 {
617 enum machine_mode intermediate;
618 rtx tmp;
619 int shift_amount;
620
621 /* Search for a mode to convert via. */
622 for (intermediate = from_mode; intermediate != VOIDmode;
623 intermediate = GET_MODE_WIDER_MODE (intermediate))
624 if (((can_extend_p (to_mode, intermediate, unsignedp)
625 != CODE_FOR_nothing)
626 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
627 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
628 && (can_extend_p (intermediate, from_mode, unsignedp)
629 != CODE_FOR_nothing))
630 {
631 convert_move (to, convert_to_mode (intermediate, from,
632 unsignedp), unsignedp);
633 return;
634 }
635
636 /* No suitable intermediate mode.
637 Generate what we need with shifts. */
638 shift_amount = (GET_MODE_PRECISION (to_mode)
639 - GET_MODE_PRECISION (from_mode));
640 from = gen_lowpart (to_mode, force_reg (from_mode, from));
641 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
642 to, unsignedp);
643 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
644 to, unsignedp);
645 if (tmp != to)
646 emit_move_insn (to, tmp);
647 return;
648 }
649 }
650
651 /* Support special truncate insns for certain modes. */
652 if (convert_optab_handler (trunc_optab, to_mode,
653 from_mode) != CODE_FOR_nothing)
654 {
655 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
656 to, from, UNKNOWN);
657 return;
658 }
659
660 /* Handle truncation of volatile memrefs, and so on;
661 the things that couldn't be truncated directly,
662 and for which there was no special instruction.
663
664 ??? Code above formerly short-circuited this, for most integer
665 mode pairs, with a force_reg in from_mode followed by a recursive
666 call to this routine. Appears always to have been wrong. */
667 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
668 {
669 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
670 emit_move_insn (to, temp);
671 return;
672 }
673
674 /* Mode combination is not recognized. */
675 gcc_unreachable ();
676 }
677
678 /* Return an rtx for a value that would result
679 from converting X to mode MODE.
680 Both X and MODE may be floating, or both integer.
681 UNSIGNEDP is nonzero if X is an unsigned value.
682 This can be done by referring to a part of X in place
683 or by copying to a new temporary with conversion. */
684
685 rtx
686 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
687 {
688 return convert_modes (mode, VOIDmode, x, unsignedp);
689 }
690
691 /* Return an rtx for a value that would result
692 from converting X from mode OLDMODE to mode MODE.
693 Both modes may be floating, or both integer.
694 UNSIGNEDP is nonzero if X is an unsigned value.
695
696 This can be done by referring to a part of X in place
697 or by copying to a new temporary with conversion.
698
699 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
700
701 rtx
702 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
703 {
704 rtx temp;
705
706 /* If FROM is a SUBREG that indicates that we have already done at least
707 the required extension, strip it. */
708
709 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
710 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
711 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
712 x = gen_lowpart (mode, x);
713
714 if (GET_MODE (x) != VOIDmode)
715 oldmode = GET_MODE (x);
716
717 if (mode == oldmode)
718 return x;
719
720 /* There is one case that we must handle specially: If we are converting
721 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
722 we are to interpret the constant as unsigned, gen_lowpart will do
723 the wrong if the constant appears negative. What we want to do is
724 make the high-order word of the constant zero, not all ones. */
725
726 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
727 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
728 && CONST_INT_P (x) && INTVAL (x) < 0)
729 {
730 double_int val = uhwi_to_double_int (INTVAL (x));
731
732 /* We need to zero extend VAL. */
733 if (oldmode != VOIDmode)
734 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
735
736 return immed_double_int_const (val, mode);
737 }
738
739 /* We can do this with a gen_lowpart if both desired and current modes
740 are integer, and this is either a constant integer, a register, or a
741 non-volatile MEM. Except for the constant case where MODE is no
742 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
743
744 if ((CONST_INT_P (x)
745 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
746 || (GET_MODE_CLASS (mode) == MODE_INT
747 && GET_MODE_CLASS (oldmode) == MODE_INT
748 && (GET_CODE (x) == CONST_DOUBLE
749 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
750 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
751 && direct_load[(int) mode])
752 || (REG_P (x)
753 && (! HARD_REGISTER_P (x)
754 || HARD_REGNO_MODE_OK (REGNO (x), mode))
755 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
756 GET_MODE (x))))))))
757 {
758 /* ?? If we don't know OLDMODE, we have to assume here that
759 X does not need sign- or zero-extension. This may not be
760 the case, but it's the best we can do. */
761 if (CONST_INT_P (x) && oldmode != VOIDmode
762 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
763 {
764 HOST_WIDE_INT val = INTVAL (x);
765
766 /* We must sign or zero-extend in this case. Start by
767 zero-extending, then sign extend if we need to. */
768 val &= GET_MODE_MASK (oldmode);
769 if (! unsignedp
770 && val_signbit_known_set_p (oldmode, val))
771 val |= ~GET_MODE_MASK (oldmode);
772
773 return gen_int_mode (val, mode);
774 }
775
776 return gen_lowpart (mode, x);
777 }
778
779 /* Converting from integer constant into mode is always equivalent to an
780 subreg operation. */
781 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
782 {
783 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
784 return simplify_gen_subreg (mode, x, oldmode, 0);
785 }
786
787 temp = gen_reg_rtx (mode);
788 convert_move (temp, x, unsignedp);
789 return temp;
790 }
791 \f
792 /* Return the largest alignment we can use for doing a move (or store)
793 of MAX_PIECES. ALIGN is the largest alignment we could use. */
794
795 static unsigned int
796 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
797 {
798 enum machine_mode tmode;
799
800 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
801 if (align >= GET_MODE_ALIGNMENT (tmode))
802 align = GET_MODE_ALIGNMENT (tmode);
803 else
804 {
805 enum machine_mode tmode, xmode;
806
807 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
808 tmode != VOIDmode;
809 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
810 if (GET_MODE_SIZE (tmode) > max_pieces
811 || SLOW_UNALIGNED_ACCESS (tmode, align))
812 break;
813
814 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
815 }
816
817 return align;
818 }
819
820 /* Return the widest integer mode no wider than SIZE. If no such mode
821 can be found, return VOIDmode. */
822
823 static enum machine_mode
824 widest_int_mode_for_size (unsigned int size)
825 {
826 enum machine_mode tmode, mode = VOIDmode;
827
828 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
829 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
830 if (GET_MODE_SIZE (tmode) < size)
831 mode = tmode;
832
833 return mode;
834 }
835
836 /* STORE_MAX_PIECES is the number of bytes at a time that we can
837 store efficiently. Due to internal GCC limitations, this is
838 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
839 for an immediate constant. */
840
841 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
842
843 /* Determine whether the LEN bytes can be moved by using several move
844 instructions. Return nonzero if a call to move_by_pieces should
845 succeed. */
846
847 int
848 can_move_by_pieces (unsigned HOST_WIDE_INT len,
849 unsigned int align ATTRIBUTE_UNUSED)
850 {
851 return MOVE_BY_PIECES_P (len, align);
852 }
853
854 /* Generate several move instructions to copy LEN bytes from block FROM to
855 block TO. (These are MEM rtx's with BLKmode).
856
857 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
858 used to push FROM to the stack.
859
860 ALIGN is maximum stack alignment we can assume.
861
862 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
863 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
864 stpcpy. */
865
866 rtx
867 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
868 unsigned int align, int endp)
869 {
870 struct move_by_pieces_d data;
871 enum machine_mode to_addr_mode, from_addr_mode
872 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
873 rtx to_addr, from_addr = XEXP (from, 0);
874 unsigned int max_size = MOVE_MAX_PIECES + 1;
875 enum insn_code icode;
876
877 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
878
879 data.offset = 0;
880 data.from_addr = from_addr;
881 if (to)
882 {
883 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
884 to_addr = XEXP (to, 0);
885 data.to = to;
886 data.autinc_to
887 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
888 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
889 data.reverse
890 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
891 }
892 else
893 {
894 to_addr_mode = VOIDmode;
895 to_addr = NULL_RTX;
896 data.to = NULL_RTX;
897 data.autinc_to = 1;
898 #ifdef STACK_GROWS_DOWNWARD
899 data.reverse = 1;
900 #else
901 data.reverse = 0;
902 #endif
903 }
904 data.to_addr = to_addr;
905 data.from = from;
906 data.autinc_from
907 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
908 || GET_CODE (from_addr) == POST_INC
909 || GET_CODE (from_addr) == POST_DEC);
910
911 data.explicit_inc_from = 0;
912 data.explicit_inc_to = 0;
913 if (data.reverse) data.offset = len;
914 data.len = len;
915
916 /* If copying requires more than two move insns,
917 copy addresses to registers (to make displacements shorter)
918 and use post-increment if available. */
919 if (!(data.autinc_from && data.autinc_to)
920 && move_by_pieces_ninsns (len, align, max_size) > 2)
921 {
922 /* Find the mode of the largest move...
923 MODE might not be used depending on the definitions of the
924 USE_* macros below. */
925 enum machine_mode mode ATTRIBUTE_UNUSED
926 = widest_int_mode_for_size (max_size);
927
928 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
929 {
930 data.from_addr = copy_to_mode_reg (from_addr_mode,
931 plus_constant (from_addr, len));
932 data.autinc_from = 1;
933 data.explicit_inc_from = -1;
934 }
935 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
936 {
937 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
938 data.autinc_from = 1;
939 data.explicit_inc_from = 1;
940 }
941 if (!data.autinc_from && CONSTANT_P (from_addr))
942 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
943 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
944 {
945 data.to_addr = copy_to_mode_reg (to_addr_mode,
946 plus_constant (to_addr, len));
947 data.autinc_to = 1;
948 data.explicit_inc_to = -1;
949 }
950 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
951 {
952 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
953 data.autinc_to = 1;
954 data.explicit_inc_to = 1;
955 }
956 if (!data.autinc_to && CONSTANT_P (to_addr))
957 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
958 }
959
960 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
961
962 /* First move what we can in the largest integer mode, then go to
963 successively smaller modes. */
964
965 while (max_size > 1)
966 {
967 enum machine_mode mode = widest_int_mode_for_size (max_size);
968
969 if (mode == VOIDmode)
970 break;
971
972 icode = optab_handler (mov_optab, mode);
973 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
974 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
975
976 max_size = GET_MODE_SIZE (mode);
977 }
978
979 /* The code above should have handled everything. */
980 gcc_assert (!data.len);
981
982 if (endp)
983 {
984 rtx to1;
985
986 gcc_assert (!data.reverse);
987 if (data.autinc_to)
988 {
989 if (endp == 2)
990 {
991 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
992 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
993 else
994 data.to_addr = copy_to_mode_reg (to_addr_mode,
995 plus_constant (data.to_addr,
996 -1));
997 }
998 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
999 data.offset);
1000 }
1001 else
1002 {
1003 if (endp == 2)
1004 --data.offset;
1005 to1 = adjust_address (data.to, QImode, data.offset);
1006 }
1007 return to1;
1008 }
1009 else
1010 return data.to;
1011 }
1012
1013 /* Return number of insns required to move L bytes by pieces.
1014 ALIGN (in bits) is maximum alignment we can assume. */
1015
1016 unsigned HOST_WIDE_INT
1017 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1018 unsigned int max_size)
1019 {
1020 unsigned HOST_WIDE_INT n_insns = 0;
1021
1022 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1023
1024 while (max_size > 1)
1025 {
1026 enum machine_mode mode;
1027 enum insn_code icode;
1028
1029 mode = widest_int_mode_for_size (max_size);
1030
1031 if (mode == VOIDmode)
1032 break;
1033
1034 icode = optab_handler (mov_optab, mode);
1035 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1036 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1037
1038 max_size = GET_MODE_SIZE (mode);
1039 }
1040
1041 gcc_assert (!l);
1042 return n_insns;
1043 }
1044
1045 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1046 with move instructions for mode MODE. GENFUN is the gen_... function
1047 to make a move insn for that mode. DATA has all the other info. */
1048
1049 static void
1050 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1051 struct move_by_pieces_d *data)
1052 {
1053 unsigned int size = GET_MODE_SIZE (mode);
1054 rtx to1 = NULL_RTX, from1;
1055
1056 while (data->len >= size)
1057 {
1058 if (data->reverse)
1059 data->offset -= size;
1060
1061 if (data->to)
1062 {
1063 if (data->autinc_to)
1064 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1065 data->offset);
1066 else
1067 to1 = adjust_address (data->to, mode, data->offset);
1068 }
1069
1070 if (data->autinc_from)
1071 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1072 data->offset);
1073 else
1074 from1 = adjust_address (data->from, mode, data->offset);
1075
1076 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1077 emit_insn (gen_add2_insn (data->to_addr,
1078 GEN_INT (-(HOST_WIDE_INT)size)));
1079 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1080 emit_insn (gen_add2_insn (data->from_addr,
1081 GEN_INT (-(HOST_WIDE_INT)size)));
1082
1083 if (data->to)
1084 emit_insn ((*genfun) (to1, from1));
1085 else
1086 {
1087 #ifdef PUSH_ROUNDING
1088 emit_single_push_insn (mode, from1, NULL);
1089 #else
1090 gcc_unreachable ();
1091 #endif
1092 }
1093
1094 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1095 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1096 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1097 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1098
1099 if (! data->reverse)
1100 data->offset += size;
1101
1102 data->len -= size;
1103 }
1104 }
1105 \f
1106 /* Emit code to move a block Y to a block X. This may be done with
1107 string-move instructions, with multiple scalar move instructions,
1108 or with a library call.
1109
1110 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1111 SIZE is an rtx that says how long they are.
1112 ALIGN is the maximum alignment we can assume they have.
1113 METHOD describes what kind of copy this is, and what mechanisms may be used.
1114
1115 Return the address of the new block, if memcpy is called and returns it,
1116 0 otherwise. */
1117
1118 rtx
1119 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1120 unsigned int expected_align, HOST_WIDE_INT expected_size)
1121 {
1122 bool may_use_call;
1123 rtx retval = 0;
1124 unsigned int align;
1125
1126 gcc_assert (size);
1127 if (CONST_INT_P (size)
1128 && INTVAL (size) == 0)
1129 return 0;
1130
1131 switch (method)
1132 {
1133 case BLOCK_OP_NORMAL:
1134 case BLOCK_OP_TAILCALL:
1135 may_use_call = true;
1136 break;
1137
1138 case BLOCK_OP_CALL_PARM:
1139 may_use_call = block_move_libcall_safe_for_call_parm ();
1140
1141 /* Make inhibit_defer_pop nonzero around the library call
1142 to force it to pop the arguments right away. */
1143 NO_DEFER_POP;
1144 break;
1145
1146 case BLOCK_OP_NO_LIBCALL:
1147 may_use_call = false;
1148 break;
1149
1150 default:
1151 gcc_unreachable ();
1152 }
1153
1154 gcc_assert (MEM_P (x) && MEM_P (y));
1155 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1156 gcc_assert (align >= BITS_PER_UNIT);
1157
1158 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1159 block copy is more efficient for other large modes, e.g. DCmode. */
1160 x = adjust_address (x, BLKmode, 0);
1161 y = adjust_address (y, BLKmode, 0);
1162
1163 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1164 can be incorrect is coming from __builtin_memcpy. */
1165 if (CONST_INT_P (size))
1166 {
1167 x = shallow_copy_rtx (x);
1168 y = shallow_copy_rtx (y);
1169 set_mem_size (x, INTVAL (size));
1170 set_mem_size (y, INTVAL (size));
1171 }
1172
1173 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1174 move_by_pieces (x, y, INTVAL (size), align, 0);
1175 else if (emit_block_move_via_movmem (x, y, size, align,
1176 expected_align, expected_size))
1177 ;
1178 else if (may_use_call
1179 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1180 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1181 {
1182 /* Since x and y are passed to a libcall, mark the corresponding
1183 tree EXPR as addressable. */
1184 tree y_expr = MEM_EXPR (y);
1185 tree x_expr = MEM_EXPR (x);
1186 if (y_expr)
1187 mark_addressable (y_expr);
1188 if (x_expr)
1189 mark_addressable (x_expr);
1190 retval = emit_block_move_via_libcall (x, y, size,
1191 method == BLOCK_OP_TAILCALL);
1192 }
1193
1194 else
1195 emit_block_move_via_loop (x, y, size, align);
1196
1197 if (method == BLOCK_OP_CALL_PARM)
1198 OK_DEFER_POP;
1199
1200 return retval;
1201 }
1202
1203 rtx
1204 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1205 {
1206 return emit_block_move_hints (x, y, size, method, 0, -1);
1207 }
1208
1209 /* A subroutine of emit_block_move. Returns true if calling the
1210 block move libcall will not clobber any parameters which may have
1211 already been placed on the stack. */
1212
1213 static bool
1214 block_move_libcall_safe_for_call_parm (void)
1215 {
1216 #if defined (REG_PARM_STACK_SPACE)
1217 tree fn;
1218 #endif
1219
1220 /* If arguments are pushed on the stack, then they're safe. */
1221 if (PUSH_ARGS)
1222 return true;
1223
1224 /* If registers go on the stack anyway, any argument is sure to clobber
1225 an outgoing argument. */
1226 #if defined (REG_PARM_STACK_SPACE)
1227 fn = emit_block_move_libcall_fn (false);
1228 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1229 depend on its argument. */
1230 (void) fn;
1231 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1232 && REG_PARM_STACK_SPACE (fn) != 0)
1233 return false;
1234 #endif
1235
1236 /* If any argument goes in memory, then it might clobber an outgoing
1237 argument. */
1238 {
1239 CUMULATIVE_ARGS args_so_far_v;
1240 cumulative_args_t args_so_far;
1241 tree fn, arg;
1242
1243 fn = emit_block_move_libcall_fn (false);
1244 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1245 args_so_far = pack_cumulative_args (&args_so_far_v);
1246
1247 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1248 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1249 {
1250 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1251 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1252 NULL_TREE, true);
1253 if (!tmp || !REG_P (tmp))
1254 return false;
1255 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1256 return false;
1257 targetm.calls.function_arg_advance (args_so_far, mode,
1258 NULL_TREE, true);
1259 }
1260 }
1261 return true;
1262 }
1263
1264 /* A subroutine of emit_block_move. Expand a movmem pattern;
1265 return true if successful. */
1266
1267 static bool
1268 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1269 unsigned int expected_align, HOST_WIDE_INT expected_size)
1270 {
1271 int save_volatile_ok = volatile_ok;
1272 enum machine_mode mode;
1273
1274 if (expected_align < align)
1275 expected_align = align;
1276
1277 /* Since this is a move insn, we don't care about volatility. */
1278 volatile_ok = 1;
1279
1280 /* Try the most limited insn first, because there's no point
1281 including more than one in the machine description unless
1282 the more limited one has some advantage. */
1283
1284 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1285 mode = GET_MODE_WIDER_MODE (mode))
1286 {
1287 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1288
1289 if (code != CODE_FOR_nothing
1290 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1291 here because if SIZE is less than the mode mask, as it is
1292 returned by the macro, it will definitely be less than the
1293 actual mode mask. */
1294 && ((CONST_INT_P (size)
1295 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1296 <= (GET_MODE_MASK (mode) >> 1)))
1297 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1298 {
1299 struct expand_operand ops[6];
1300 unsigned int nops;
1301
1302 /* ??? When called via emit_block_move_for_call, it'd be
1303 nice if there were some way to inform the backend, so
1304 that it doesn't fail the expansion because it thinks
1305 emitting the libcall would be more efficient. */
1306 nops = insn_data[(int) code].n_generator_args;
1307 gcc_assert (nops == 4 || nops == 6);
1308
1309 create_fixed_operand (&ops[0], x);
1310 create_fixed_operand (&ops[1], y);
1311 /* The check above guarantees that this size conversion is valid. */
1312 create_convert_operand_to (&ops[2], size, mode, true);
1313 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1314 if (nops == 6)
1315 {
1316 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1317 create_integer_operand (&ops[5], expected_size);
1318 }
1319 if (maybe_expand_insn (code, nops, ops))
1320 {
1321 volatile_ok = save_volatile_ok;
1322 return true;
1323 }
1324 }
1325 }
1326
1327 volatile_ok = save_volatile_ok;
1328 return false;
1329 }
1330
1331 /* A subroutine of emit_block_move. Expand a call to memcpy.
1332 Return the return value from memcpy, 0 otherwise. */
1333
1334 rtx
1335 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1336 {
1337 rtx dst_addr, src_addr;
1338 tree call_expr, fn, src_tree, dst_tree, size_tree;
1339 enum machine_mode size_mode;
1340 rtx retval;
1341
1342 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1343 pseudos. We can then place those new pseudos into a VAR_DECL and
1344 use them later. */
1345
1346 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1347 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1348
1349 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1350 src_addr = convert_memory_address (ptr_mode, src_addr);
1351
1352 dst_tree = make_tree (ptr_type_node, dst_addr);
1353 src_tree = make_tree (ptr_type_node, src_addr);
1354
1355 size_mode = TYPE_MODE (sizetype);
1356
1357 size = convert_to_mode (size_mode, size, 1);
1358 size = copy_to_mode_reg (size_mode, size);
1359
1360 /* It is incorrect to use the libcall calling conventions to call
1361 memcpy in this context. This could be a user call to memcpy and
1362 the user may wish to examine the return value from memcpy. For
1363 targets where libcalls and normal calls have different conventions
1364 for returning pointers, we could end up generating incorrect code. */
1365
1366 size_tree = make_tree (sizetype, size);
1367
1368 fn = emit_block_move_libcall_fn (true);
1369 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1370 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1371
1372 retval = expand_normal (call_expr);
1373
1374 return retval;
1375 }
1376
1377 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1378 for the function we use for block copies. The first time FOR_CALL
1379 is true, we call assemble_external. */
1380
1381 static GTY(()) tree block_move_fn;
1382
1383 void
1384 init_block_move_fn (const char *asmspec)
1385 {
1386 if (!block_move_fn)
1387 {
1388 tree args, fn;
1389
1390 fn = get_identifier ("memcpy");
1391 args = build_function_type_list (ptr_type_node, ptr_type_node,
1392 const_ptr_type_node, sizetype,
1393 NULL_TREE);
1394
1395 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1396 DECL_EXTERNAL (fn) = 1;
1397 TREE_PUBLIC (fn) = 1;
1398 DECL_ARTIFICIAL (fn) = 1;
1399 TREE_NOTHROW (fn) = 1;
1400 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1401 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1402
1403 block_move_fn = fn;
1404 }
1405
1406 if (asmspec)
1407 set_user_assembler_name (block_move_fn, asmspec);
1408 }
1409
1410 static tree
1411 emit_block_move_libcall_fn (int for_call)
1412 {
1413 static bool emitted_extern;
1414
1415 if (!block_move_fn)
1416 init_block_move_fn (NULL);
1417
1418 if (for_call && !emitted_extern)
1419 {
1420 emitted_extern = true;
1421 make_decl_rtl (block_move_fn);
1422 assemble_external (block_move_fn);
1423 }
1424
1425 return block_move_fn;
1426 }
1427
1428 /* A subroutine of emit_block_move. Copy the data via an explicit
1429 loop. This is used only when libcalls are forbidden. */
1430 /* ??? It'd be nice to copy in hunks larger than QImode. */
1431
1432 static void
1433 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1434 unsigned int align ATTRIBUTE_UNUSED)
1435 {
1436 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1437 enum machine_mode x_addr_mode
1438 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1439 enum machine_mode y_addr_mode
1440 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1441 enum machine_mode iter_mode;
1442
1443 iter_mode = GET_MODE (size);
1444 if (iter_mode == VOIDmode)
1445 iter_mode = word_mode;
1446
1447 top_label = gen_label_rtx ();
1448 cmp_label = gen_label_rtx ();
1449 iter = gen_reg_rtx (iter_mode);
1450
1451 emit_move_insn (iter, const0_rtx);
1452
1453 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1454 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1455 do_pending_stack_adjust ();
1456
1457 emit_jump (cmp_label);
1458 emit_label (top_label);
1459
1460 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1461 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1462
1463 if (x_addr_mode != y_addr_mode)
1464 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1465 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1466
1467 x = change_address (x, QImode, x_addr);
1468 y = change_address (y, QImode, y_addr);
1469
1470 emit_move_insn (x, y);
1471
1472 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1473 true, OPTAB_LIB_WIDEN);
1474 if (tmp != iter)
1475 emit_move_insn (iter, tmp);
1476
1477 emit_label (cmp_label);
1478
1479 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1480 true, top_label);
1481 }
1482 \f
1483 /* Copy all or part of a value X into registers starting at REGNO.
1484 The number of registers to be filled is NREGS. */
1485
1486 void
1487 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1488 {
1489 int i;
1490 #ifdef HAVE_load_multiple
1491 rtx pat;
1492 rtx last;
1493 #endif
1494
1495 if (nregs == 0)
1496 return;
1497
1498 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1499 x = validize_mem (force_const_mem (mode, x));
1500
1501 /* See if the machine can do this with a load multiple insn. */
1502 #ifdef HAVE_load_multiple
1503 if (HAVE_load_multiple)
1504 {
1505 last = get_last_insn ();
1506 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1507 GEN_INT (nregs));
1508 if (pat)
1509 {
1510 emit_insn (pat);
1511 return;
1512 }
1513 else
1514 delete_insns_since (last);
1515 }
1516 #endif
1517
1518 for (i = 0; i < nregs; i++)
1519 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1520 operand_subword_force (x, i, mode));
1521 }
1522
1523 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1524 The number of registers to be filled is NREGS. */
1525
1526 void
1527 move_block_from_reg (int regno, rtx x, int nregs)
1528 {
1529 int i;
1530
1531 if (nregs == 0)
1532 return;
1533
1534 /* See if the machine can do this with a store multiple insn. */
1535 #ifdef HAVE_store_multiple
1536 if (HAVE_store_multiple)
1537 {
1538 rtx last = get_last_insn ();
1539 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1540 GEN_INT (nregs));
1541 if (pat)
1542 {
1543 emit_insn (pat);
1544 return;
1545 }
1546 else
1547 delete_insns_since (last);
1548 }
1549 #endif
1550
1551 for (i = 0; i < nregs; i++)
1552 {
1553 rtx tem = operand_subword (x, i, 1, BLKmode);
1554
1555 gcc_assert (tem);
1556
1557 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1558 }
1559 }
1560
1561 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1562 ORIG, where ORIG is a non-consecutive group of registers represented by
1563 a PARALLEL. The clone is identical to the original except in that the
1564 original set of registers is replaced by a new set of pseudo registers.
1565 The new set has the same modes as the original set. */
1566
1567 rtx
1568 gen_group_rtx (rtx orig)
1569 {
1570 int i, length;
1571 rtx *tmps;
1572
1573 gcc_assert (GET_CODE (orig) == PARALLEL);
1574
1575 length = XVECLEN (orig, 0);
1576 tmps = XALLOCAVEC (rtx, length);
1577
1578 /* Skip a NULL entry in first slot. */
1579 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1580
1581 if (i)
1582 tmps[0] = 0;
1583
1584 for (; i < length; i++)
1585 {
1586 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1587 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1588
1589 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1590 }
1591
1592 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1593 }
1594
1595 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1596 except that values are placed in TMPS[i], and must later be moved
1597 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1598
1599 static void
1600 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1601 {
1602 rtx src;
1603 int start, i;
1604 enum machine_mode m = GET_MODE (orig_src);
1605
1606 gcc_assert (GET_CODE (dst) == PARALLEL);
1607
1608 if (m != VOIDmode
1609 && !SCALAR_INT_MODE_P (m)
1610 && !MEM_P (orig_src)
1611 && GET_CODE (orig_src) != CONCAT)
1612 {
1613 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1614 if (imode == BLKmode)
1615 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1616 else
1617 src = gen_reg_rtx (imode);
1618 if (imode != BLKmode)
1619 src = gen_lowpart (GET_MODE (orig_src), src);
1620 emit_move_insn (src, orig_src);
1621 /* ...and back again. */
1622 if (imode != BLKmode)
1623 src = gen_lowpart (imode, src);
1624 emit_group_load_1 (tmps, dst, src, type, ssize);
1625 return;
1626 }
1627
1628 /* Check for a NULL entry, used to indicate that the parameter goes
1629 both on the stack and in registers. */
1630 if (XEXP (XVECEXP (dst, 0, 0), 0))
1631 start = 0;
1632 else
1633 start = 1;
1634
1635 /* Process the pieces. */
1636 for (i = start; i < XVECLEN (dst, 0); i++)
1637 {
1638 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1639 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1640 unsigned int bytelen = GET_MODE_SIZE (mode);
1641 int shift = 0;
1642
1643 /* Handle trailing fragments that run over the size of the struct. */
1644 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1645 {
1646 /* Arrange to shift the fragment to where it belongs.
1647 extract_bit_field loads to the lsb of the reg. */
1648 if (
1649 #ifdef BLOCK_REG_PADDING
1650 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1651 == (BYTES_BIG_ENDIAN ? upward : downward)
1652 #else
1653 BYTES_BIG_ENDIAN
1654 #endif
1655 )
1656 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1657 bytelen = ssize - bytepos;
1658 gcc_assert (bytelen > 0);
1659 }
1660
1661 /* If we won't be loading directly from memory, protect the real source
1662 from strange tricks we might play; but make sure that the source can
1663 be loaded directly into the destination. */
1664 src = orig_src;
1665 if (!MEM_P (orig_src)
1666 && (!CONSTANT_P (orig_src)
1667 || (GET_MODE (orig_src) != mode
1668 && GET_MODE (orig_src) != VOIDmode)))
1669 {
1670 if (GET_MODE (orig_src) == VOIDmode)
1671 src = gen_reg_rtx (mode);
1672 else
1673 src = gen_reg_rtx (GET_MODE (orig_src));
1674
1675 emit_move_insn (src, orig_src);
1676 }
1677
1678 /* Optimize the access just a bit. */
1679 if (MEM_P (src)
1680 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1681 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1682 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1683 && bytelen == GET_MODE_SIZE (mode))
1684 {
1685 tmps[i] = gen_reg_rtx (mode);
1686 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1687 }
1688 else if (COMPLEX_MODE_P (mode)
1689 && GET_MODE (src) == mode
1690 && bytelen == GET_MODE_SIZE (mode))
1691 /* Let emit_move_complex do the bulk of the work. */
1692 tmps[i] = src;
1693 else if (GET_CODE (src) == CONCAT)
1694 {
1695 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1696 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1697
1698 if ((bytepos == 0 && bytelen == slen0)
1699 || (bytepos != 0 && bytepos + bytelen <= slen))
1700 {
1701 /* The following assumes that the concatenated objects all
1702 have the same size. In this case, a simple calculation
1703 can be used to determine the object and the bit field
1704 to be extracted. */
1705 tmps[i] = XEXP (src, bytepos / slen0);
1706 if (! CONSTANT_P (tmps[i])
1707 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1708 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1709 (bytepos % slen0) * BITS_PER_UNIT,
1710 1, false, NULL_RTX, mode, mode);
1711 }
1712 else
1713 {
1714 rtx mem;
1715
1716 gcc_assert (!bytepos);
1717 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1718 emit_move_insn (mem, src);
1719 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1720 0, 1, false, NULL_RTX, mode, mode);
1721 }
1722 }
1723 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1724 SIMD register, which is currently broken. While we get GCC
1725 to emit proper RTL for these cases, let's dump to memory. */
1726 else if (VECTOR_MODE_P (GET_MODE (dst))
1727 && REG_P (src))
1728 {
1729 int slen = GET_MODE_SIZE (GET_MODE (src));
1730 rtx mem;
1731
1732 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1733 emit_move_insn (mem, src);
1734 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1735 }
1736 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1737 && XVECLEN (dst, 0) > 1)
1738 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1739 else if (CONSTANT_P (src))
1740 {
1741 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1742
1743 if (len == ssize)
1744 tmps[i] = src;
1745 else
1746 {
1747 rtx first, second;
1748
1749 gcc_assert (2 * len == ssize);
1750 split_double (src, &first, &second);
1751 if (i)
1752 tmps[i] = second;
1753 else
1754 tmps[i] = first;
1755 }
1756 }
1757 else if (REG_P (src) && GET_MODE (src) == mode)
1758 tmps[i] = src;
1759 else
1760 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1761 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1762 mode, mode);
1763
1764 if (shift)
1765 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1766 shift, tmps[i], 0);
1767 }
1768 }
1769
1770 /* Emit code to move a block SRC of type TYPE to a block DST,
1771 where DST is non-consecutive registers represented by a PARALLEL.
1772 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1773 if not known. */
1774
1775 void
1776 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1777 {
1778 rtx *tmps;
1779 int i;
1780
1781 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1782 emit_group_load_1 (tmps, dst, src, type, ssize);
1783
1784 /* Copy the extracted pieces into the proper (probable) hard regs. */
1785 for (i = 0; i < XVECLEN (dst, 0); i++)
1786 {
1787 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1788 if (d == NULL)
1789 continue;
1790 emit_move_insn (d, tmps[i]);
1791 }
1792 }
1793
1794 /* Similar, but load SRC into new pseudos in a format that looks like
1795 PARALLEL. This can later be fed to emit_group_move to get things
1796 in the right place. */
1797
1798 rtx
1799 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1800 {
1801 rtvec vec;
1802 int i;
1803
1804 vec = rtvec_alloc (XVECLEN (parallel, 0));
1805 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1806
1807 /* Convert the vector to look just like the original PARALLEL, except
1808 with the computed values. */
1809 for (i = 0; i < XVECLEN (parallel, 0); i++)
1810 {
1811 rtx e = XVECEXP (parallel, 0, i);
1812 rtx d = XEXP (e, 0);
1813
1814 if (d)
1815 {
1816 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1817 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1818 }
1819 RTVEC_ELT (vec, i) = e;
1820 }
1821
1822 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1823 }
1824
1825 /* Emit code to move a block SRC to block DST, where SRC and DST are
1826 non-consecutive groups of registers, each represented by a PARALLEL. */
1827
1828 void
1829 emit_group_move (rtx dst, rtx src)
1830 {
1831 int i;
1832
1833 gcc_assert (GET_CODE (src) == PARALLEL
1834 && GET_CODE (dst) == PARALLEL
1835 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1836
1837 /* Skip first entry if NULL. */
1838 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1839 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1840 XEXP (XVECEXP (src, 0, i), 0));
1841 }
1842
1843 /* Move a group of registers represented by a PARALLEL into pseudos. */
1844
1845 rtx
1846 emit_group_move_into_temps (rtx src)
1847 {
1848 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1849 int i;
1850
1851 for (i = 0; i < XVECLEN (src, 0); i++)
1852 {
1853 rtx e = XVECEXP (src, 0, i);
1854 rtx d = XEXP (e, 0);
1855
1856 if (d)
1857 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1858 RTVEC_ELT (vec, i) = e;
1859 }
1860
1861 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1862 }
1863
1864 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1865 where SRC is non-consecutive registers represented by a PARALLEL.
1866 SSIZE represents the total size of block ORIG_DST, or -1 if not
1867 known. */
1868
1869 void
1870 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1871 {
1872 rtx *tmps, dst;
1873 int start, finish, i;
1874 enum machine_mode m = GET_MODE (orig_dst);
1875
1876 gcc_assert (GET_CODE (src) == PARALLEL);
1877
1878 if (!SCALAR_INT_MODE_P (m)
1879 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1880 {
1881 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1882 if (imode == BLKmode)
1883 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1884 else
1885 dst = gen_reg_rtx (imode);
1886 emit_group_store (dst, src, type, ssize);
1887 if (imode != BLKmode)
1888 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1889 emit_move_insn (orig_dst, dst);
1890 return;
1891 }
1892
1893 /* Check for a NULL entry, used to indicate that the parameter goes
1894 both on the stack and in registers. */
1895 if (XEXP (XVECEXP (src, 0, 0), 0))
1896 start = 0;
1897 else
1898 start = 1;
1899 finish = XVECLEN (src, 0);
1900
1901 tmps = XALLOCAVEC (rtx, finish);
1902
1903 /* Copy the (probable) hard regs into pseudos. */
1904 for (i = start; i < finish; i++)
1905 {
1906 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1907 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1908 {
1909 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1910 emit_move_insn (tmps[i], reg);
1911 }
1912 else
1913 tmps[i] = reg;
1914 }
1915
1916 /* If we won't be storing directly into memory, protect the real destination
1917 from strange tricks we might play. */
1918 dst = orig_dst;
1919 if (GET_CODE (dst) == PARALLEL)
1920 {
1921 rtx temp;
1922
1923 /* We can get a PARALLEL dst if there is a conditional expression in
1924 a return statement. In that case, the dst and src are the same,
1925 so no action is necessary. */
1926 if (rtx_equal_p (dst, src))
1927 return;
1928
1929 /* It is unclear if we can ever reach here, but we may as well handle
1930 it. Allocate a temporary, and split this into a store/load to/from
1931 the temporary. */
1932
1933 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1934 emit_group_store (temp, src, type, ssize);
1935 emit_group_load (dst, temp, type, ssize);
1936 return;
1937 }
1938 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1939 {
1940 enum machine_mode outer = GET_MODE (dst);
1941 enum machine_mode inner;
1942 HOST_WIDE_INT bytepos;
1943 bool done = false;
1944 rtx temp;
1945
1946 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1947 dst = gen_reg_rtx (outer);
1948
1949 /* Make life a bit easier for combine. */
1950 /* If the first element of the vector is the low part
1951 of the destination mode, use a paradoxical subreg to
1952 initialize the destination. */
1953 if (start < finish)
1954 {
1955 inner = GET_MODE (tmps[start]);
1956 bytepos = subreg_lowpart_offset (inner, outer);
1957 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1958 {
1959 temp = simplify_gen_subreg (outer, tmps[start],
1960 inner, 0);
1961 if (temp)
1962 {
1963 emit_move_insn (dst, temp);
1964 done = true;
1965 start++;
1966 }
1967 }
1968 }
1969
1970 /* If the first element wasn't the low part, try the last. */
1971 if (!done
1972 && start < finish - 1)
1973 {
1974 inner = GET_MODE (tmps[finish - 1]);
1975 bytepos = subreg_lowpart_offset (inner, outer);
1976 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1977 {
1978 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1979 inner, 0);
1980 if (temp)
1981 {
1982 emit_move_insn (dst, temp);
1983 done = true;
1984 finish--;
1985 }
1986 }
1987 }
1988
1989 /* Otherwise, simply initialize the result to zero. */
1990 if (!done)
1991 emit_move_insn (dst, CONST0_RTX (outer));
1992 }
1993
1994 /* Process the pieces. */
1995 for (i = start; i < finish; i++)
1996 {
1997 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
1998 enum machine_mode mode = GET_MODE (tmps[i]);
1999 unsigned int bytelen = GET_MODE_SIZE (mode);
2000 unsigned int adj_bytelen = bytelen;
2001 rtx dest = dst;
2002
2003 /* Handle trailing fragments that run over the size of the struct. */
2004 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2005 adj_bytelen = ssize - bytepos;
2006
2007 if (GET_CODE (dst) == CONCAT)
2008 {
2009 if (bytepos + adj_bytelen
2010 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2011 dest = XEXP (dst, 0);
2012 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2013 {
2014 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2015 dest = XEXP (dst, 1);
2016 }
2017 else
2018 {
2019 enum machine_mode dest_mode = GET_MODE (dest);
2020 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2021
2022 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2023
2024 if (GET_MODE_ALIGNMENT (dest_mode)
2025 >= GET_MODE_ALIGNMENT (tmp_mode))
2026 {
2027 dest = assign_stack_temp (dest_mode,
2028 GET_MODE_SIZE (dest_mode),
2029 0);
2030 emit_move_insn (adjust_address (dest,
2031 tmp_mode,
2032 bytepos),
2033 tmps[i]);
2034 dst = dest;
2035 }
2036 else
2037 {
2038 dest = assign_stack_temp (tmp_mode,
2039 GET_MODE_SIZE (tmp_mode),
2040 0);
2041 emit_move_insn (dest, tmps[i]);
2042 dst = adjust_address (dest, dest_mode, bytepos);
2043 }
2044 break;
2045 }
2046 }
2047
2048 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2049 {
2050 /* store_bit_field always takes its value from the lsb.
2051 Move the fragment to the lsb if it's not already there. */
2052 if (
2053 #ifdef BLOCK_REG_PADDING
2054 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2055 == (BYTES_BIG_ENDIAN ? upward : downward)
2056 #else
2057 BYTES_BIG_ENDIAN
2058 #endif
2059 )
2060 {
2061 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2062 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2063 shift, tmps[i], 0);
2064 }
2065 bytelen = adj_bytelen;
2066 }
2067
2068 /* Optimize the access just a bit. */
2069 if (MEM_P (dest)
2070 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2071 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2072 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2073 && bytelen == GET_MODE_SIZE (mode))
2074 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2075 else
2076 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2077 0, 0, mode, tmps[i]);
2078 }
2079
2080 /* Copy from the pseudo into the (probable) hard reg. */
2081 if (orig_dst != dst)
2082 emit_move_insn (orig_dst, dst);
2083 }
2084
2085 /* Generate code to copy a BLKmode object of TYPE out of a
2086 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2087 is null, a stack temporary is created. TGTBLK is returned.
2088
2089 The purpose of this routine is to handle functions that return
2090 BLKmode structures in registers. Some machines (the PA for example)
2091 want to return all small structures in registers regardless of the
2092 structure's alignment. */
2093
2094 rtx
2095 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2096 {
2097 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2098 rtx src = NULL, dst = NULL;
2099 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2100 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2101 enum machine_mode copy_mode;
2102
2103 if (tgtblk == 0)
2104 {
2105 tgtblk = assign_temp (build_qualified_type (type,
2106 (TYPE_QUALS (type)
2107 | TYPE_QUAL_CONST)),
2108 0, 1, 1);
2109 preserve_temp_slots (tgtblk);
2110 }
2111
2112 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2113 into a new pseudo which is a full word. */
2114
2115 if (GET_MODE (srcreg) != BLKmode
2116 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2117 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2118
2119 /* If the structure doesn't take up a whole number of words, see whether
2120 SRCREG is padded on the left or on the right. If it's on the left,
2121 set PADDING_CORRECTION to the number of bits to skip.
2122
2123 In most ABIs, the structure will be returned at the least end of
2124 the register, which translates to right padding on little-endian
2125 targets and left padding on big-endian targets. The opposite
2126 holds if the structure is returned at the most significant
2127 end of the register. */
2128 if (bytes % UNITS_PER_WORD != 0
2129 && (targetm.calls.return_in_msb (type)
2130 ? !BYTES_BIG_ENDIAN
2131 : BYTES_BIG_ENDIAN))
2132 padding_correction
2133 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2134
2135 /* Copy the structure BITSIZE bits at a time. If the target lives in
2136 memory, take care of not reading/writing past its end by selecting
2137 a copy mode suited to BITSIZE. This should always be possible given
2138 how it is computed.
2139
2140 We could probably emit more efficient code for machines which do not use
2141 strict alignment, but it doesn't seem worth the effort at the current
2142 time. */
2143
2144 copy_mode = word_mode;
2145 if (MEM_P (tgtblk))
2146 {
2147 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2148 if (mem_mode != BLKmode)
2149 copy_mode = mem_mode;
2150 }
2151
2152 for (bitpos = 0, xbitpos = padding_correction;
2153 bitpos < bytes * BITS_PER_UNIT;
2154 bitpos += bitsize, xbitpos += bitsize)
2155 {
2156 /* We need a new source operand each time xbitpos is on a
2157 word boundary and when xbitpos == padding_correction
2158 (the first time through). */
2159 if (xbitpos % BITS_PER_WORD == 0
2160 || xbitpos == padding_correction)
2161 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2162 GET_MODE (srcreg));
2163
2164 /* We need a new destination operand each time bitpos is on
2165 a word boundary. */
2166 if (bitpos % BITS_PER_WORD == 0)
2167 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2168
2169 /* Use xbitpos for the source extraction (right justified) and
2170 bitpos for the destination store (left justified). */
2171 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2172 extract_bit_field (src, bitsize,
2173 xbitpos % BITS_PER_WORD, 1, false,
2174 NULL_RTX, copy_mode, copy_mode));
2175 }
2176
2177 return tgtblk;
2178 }
2179
2180 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2181 register if it contains any data, otherwise return null.
2182
2183 This is used on targets that return BLKmode values in registers. */
2184
2185 rtx
2186 copy_blkmode_to_reg (enum machine_mode mode, tree src)
2187 {
2188 int i, n_regs;
2189 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2190 unsigned int bitsize;
2191 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2192 enum machine_mode dst_mode;
2193
2194 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2195
2196 x = expand_normal (src);
2197
2198 bytes = int_size_in_bytes (TREE_TYPE (src));
2199 if (bytes == 0)
2200 return NULL_RTX;
2201
2202 /* If the structure doesn't take up a whole number of words, see
2203 whether the register value should be padded on the left or on
2204 the right. Set PADDING_CORRECTION to the number of padding
2205 bits needed on the left side.
2206
2207 In most ABIs, the structure will be returned at the least end of
2208 the register, which translates to right padding on little-endian
2209 targets and left padding on big-endian targets. The opposite
2210 holds if the structure is returned at the most significant
2211 end of the register. */
2212 if (bytes % UNITS_PER_WORD != 0
2213 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2214 ? !BYTES_BIG_ENDIAN
2215 : BYTES_BIG_ENDIAN))
2216 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2217 * BITS_PER_UNIT));
2218
2219 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2220 dst_words = XALLOCAVEC (rtx, n_regs);
2221 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2222
2223 /* Copy the structure BITSIZE bits at a time. */
2224 for (bitpos = 0, xbitpos = padding_correction;
2225 bitpos < bytes * BITS_PER_UNIT;
2226 bitpos += bitsize, xbitpos += bitsize)
2227 {
2228 /* We need a new destination pseudo each time xbitpos is
2229 on a word boundary and when xbitpos == padding_correction
2230 (the first time through). */
2231 if (xbitpos % BITS_PER_WORD == 0
2232 || xbitpos == padding_correction)
2233 {
2234 /* Generate an appropriate register. */
2235 dst_word = gen_reg_rtx (word_mode);
2236 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2237
2238 /* Clear the destination before we move anything into it. */
2239 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2240 }
2241
2242 /* We need a new source operand each time bitpos is on a word
2243 boundary. */
2244 if (bitpos % BITS_PER_WORD == 0)
2245 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2246
2247 /* Use bitpos for the source extraction (left justified) and
2248 xbitpos for the destination store (right justified). */
2249 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2250 0, 0, word_mode,
2251 extract_bit_field (src_word, bitsize,
2252 bitpos % BITS_PER_WORD, 1, false,
2253 NULL_RTX, word_mode, word_mode));
2254 }
2255
2256 if (mode == BLKmode)
2257 {
2258 /* Find the smallest integer mode large enough to hold the
2259 entire structure. */
2260 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2261 mode != VOIDmode;
2262 mode = GET_MODE_WIDER_MODE (mode))
2263 /* Have we found a large enough mode? */
2264 if (GET_MODE_SIZE (mode) >= bytes)
2265 break;
2266
2267 /* A suitable mode should have been found. */
2268 gcc_assert (mode != VOIDmode);
2269 }
2270
2271 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2272 dst_mode = word_mode;
2273 else
2274 dst_mode = mode;
2275 dst = gen_reg_rtx (dst_mode);
2276
2277 for (i = 0; i < n_regs; i++)
2278 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2279
2280 if (mode != dst_mode)
2281 dst = gen_lowpart (mode, dst);
2282
2283 return dst;
2284 }
2285
2286 /* Add a USE expression for REG to the (possibly empty) list pointed
2287 to by CALL_FUSAGE. REG must denote a hard register. */
2288
2289 void
2290 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2291 {
2292 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2293
2294 *call_fusage
2295 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2296 }
2297
2298 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2299 starting at REGNO. All of these registers must be hard registers. */
2300
2301 void
2302 use_regs (rtx *call_fusage, int regno, int nregs)
2303 {
2304 int i;
2305
2306 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2307
2308 for (i = 0; i < nregs; i++)
2309 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2310 }
2311
2312 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2313 PARALLEL REGS. This is for calls that pass values in multiple
2314 non-contiguous locations. The Irix 6 ABI has examples of this. */
2315
2316 void
2317 use_group_regs (rtx *call_fusage, rtx regs)
2318 {
2319 int i;
2320
2321 for (i = 0; i < XVECLEN (regs, 0); i++)
2322 {
2323 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2324
2325 /* A NULL entry means the parameter goes both on the stack and in
2326 registers. This can also be a MEM for targets that pass values
2327 partially on the stack and partially in registers. */
2328 if (reg != 0 && REG_P (reg))
2329 use_reg (call_fusage, reg);
2330 }
2331 }
2332
2333 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2334 assigment and the code of the expresion on the RHS is CODE. Return
2335 NULL otherwise. */
2336
2337 static gimple
2338 get_def_for_expr (tree name, enum tree_code code)
2339 {
2340 gimple def_stmt;
2341
2342 if (TREE_CODE (name) != SSA_NAME)
2343 return NULL;
2344
2345 def_stmt = get_gimple_for_ssa_name (name);
2346 if (!def_stmt
2347 || gimple_assign_rhs_code (def_stmt) != code)
2348 return NULL;
2349
2350 return def_stmt;
2351 }
2352 \f
2353
2354 /* Determine whether the LEN bytes generated by CONSTFUN can be
2355 stored to memory using several move instructions. CONSTFUNDATA is
2356 a pointer which will be passed as argument in every CONSTFUN call.
2357 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2358 a memset operation and false if it's a copy of a constant string.
2359 Return nonzero if a call to store_by_pieces should succeed. */
2360
2361 int
2362 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2363 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2364 void *constfundata, unsigned int align, bool memsetp)
2365 {
2366 unsigned HOST_WIDE_INT l;
2367 unsigned int max_size;
2368 HOST_WIDE_INT offset = 0;
2369 enum machine_mode mode;
2370 enum insn_code icode;
2371 int reverse;
2372 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2373 rtx cst ATTRIBUTE_UNUSED;
2374
2375 if (len == 0)
2376 return 1;
2377
2378 if (! (memsetp
2379 ? SET_BY_PIECES_P (len, align)
2380 : STORE_BY_PIECES_P (len, align)))
2381 return 0;
2382
2383 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2384
2385 /* We would first store what we can in the largest integer mode, then go to
2386 successively smaller modes. */
2387
2388 for (reverse = 0;
2389 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2390 reverse++)
2391 {
2392 l = len;
2393 max_size = STORE_MAX_PIECES + 1;
2394 while (max_size > 1)
2395 {
2396 mode = widest_int_mode_for_size (max_size);
2397
2398 if (mode == VOIDmode)
2399 break;
2400
2401 icode = optab_handler (mov_optab, mode);
2402 if (icode != CODE_FOR_nothing
2403 && align >= GET_MODE_ALIGNMENT (mode))
2404 {
2405 unsigned int size = GET_MODE_SIZE (mode);
2406
2407 while (l >= size)
2408 {
2409 if (reverse)
2410 offset -= size;
2411
2412 cst = (*constfun) (constfundata, offset, mode);
2413 if (!targetm.legitimate_constant_p (mode, cst))
2414 return 0;
2415
2416 if (!reverse)
2417 offset += size;
2418
2419 l -= size;
2420 }
2421 }
2422
2423 max_size = GET_MODE_SIZE (mode);
2424 }
2425
2426 /* The code above should have handled everything. */
2427 gcc_assert (!l);
2428 }
2429
2430 return 1;
2431 }
2432
2433 /* Generate several move instructions to store LEN bytes generated by
2434 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2435 pointer which will be passed as argument in every CONSTFUN call.
2436 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2437 a memset operation and false if it's a copy of a constant string.
2438 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2439 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2440 stpcpy. */
2441
2442 rtx
2443 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2444 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2445 void *constfundata, unsigned int align, bool memsetp, int endp)
2446 {
2447 enum machine_mode to_addr_mode
2448 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2449 struct store_by_pieces_d data;
2450
2451 if (len == 0)
2452 {
2453 gcc_assert (endp != 2);
2454 return to;
2455 }
2456
2457 gcc_assert (memsetp
2458 ? SET_BY_PIECES_P (len, align)
2459 : STORE_BY_PIECES_P (len, align));
2460 data.constfun = constfun;
2461 data.constfundata = constfundata;
2462 data.len = len;
2463 data.to = to;
2464 store_by_pieces_1 (&data, align);
2465 if (endp)
2466 {
2467 rtx to1;
2468
2469 gcc_assert (!data.reverse);
2470 if (data.autinc_to)
2471 {
2472 if (endp == 2)
2473 {
2474 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2475 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2476 else
2477 data.to_addr = copy_to_mode_reg (to_addr_mode,
2478 plus_constant (data.to_addr,
2479 -1));
2480 }
2481 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2482 data.offset);
2483 }
2484 else
2485 {
2486 if (endp == 2)
2487 --data.offset;
2488 to1 = adjust_address (data.to, QImode, data.offset);
2489 }
2490 return to1;
2491 }
2492 else
2493 return data.to;
2494 }
2495
2496 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2497 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2498
2499 static void
2500 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2501 {
2502 struct store_by_pieces_d data;
2503
2504 if (len == 0)
2505 return;
2506
2507 data.constfun = clear_by_pieces_1;
2508 data.constfundata = NULL;
2509 data.len = len;
2510 data.to = to;
2511 store_by_pieces_1 (&data, align);
2512 }
2513
2514 /* Callback routine for clear_by_pieces.
2515 Return const0_rtx unconditionally. */
2516
2517 static rtx
2518 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2519 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2520 enum machine_mode mode ATTRIBUTE_UNUSED)
2521 {
2522 return const0_rtx;
2523 }
2524
2525 /* Subroutine of clear_by_pieces and store_by_pieces.
2526 Generate several move instructions to store LEN bytes of block TO. (A MEM
2527 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2528
2529 static void
2530 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2531 unsigned int align ATTRIBUTE_UNUSED)
2532 {
2533 enum machine_mode to_addr_mode
2534 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2535 rtx to_addr = XEXP (data->to, 0);
2536 unsigned int max_size = STORE_MAX_PIECES + 1;
2537 enum insn_code icode;
2538
2539 data->offset = 0;
2540 data->to_addr = to_addr;
2541 data->autinc_to
2542 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2543 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2544
2545 data->explicit_inc_to = 0;
2546 data->reverse
2547 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2548 if (data->reverse)
2549 data->offset = data->len;
2550
2551 /* If storing requires more than two move insns,
2552 copy addresses to registers (to make displacements shorter)
2553 and use post-increment if available. */
2554 if (!data->autinc_to
2555 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2556 {
2557 /* Determine the main mode we'll be using.
2558 MODE might not be used depending on the definitions of the
2559 USE_* macros below. */
2560 enum machine_mode mode ATTRIBUTE_UNUSED
2561 = widest_int_mode_for_size (max_size);
2562
2563 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2564 {
2565 data->to_addr = copy_to_mode_reg (to_addr_mode,
2566 plus_constant (to_addr, data->len));
2567 data->autinc_to = 1;
2568 data->explicit_inc_to = -1;
2569 }
2570
2571 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2572 && ! data->autinc_to)
2573 {
2574 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2575 data->autinc_to = 1;
2576 data->explicit_inc_to = 1;
2577 }
2578
2579 if ( !data->autinc_to && CONSTANT_P (to_addr))
2580 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2581 }
2582
2583 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2584
2585 /* First store what we can in the largest integer mode, then go to
2586 successively smaller modes. */
2587
2588 while (max_size > 1)
2589 {
2590 enum machine_mode mode = widest_int_mode_for_size (max_size);
2591
2592 if (mode == VOIDmode)
2593 break;
2594
2595 icode = optab_handler (mov_optab, mode);
2596 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2597 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2598
2599 max_size = GET_MODE_SIZE (mode);
2600 }
2601
2602 /* The code above should have handled everything. */
2603 gcc_assert (!data->len);
2604 }
2605
2606 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2607 with move instructions for mode MODE. GENFUN is the gen_... function
2608 to make a move insn for that mode. DATA has all the other info. */
2609
2610 static void
2611 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2612 struct store_by_pieces_d *data)
2613 {
2614 unsigned int size = GET_MODE_SIZE (mode);
2615 rtx to1, cst;
2616
2617 while (data->len >= size)
2618 {
2619 if (data->reverse)
2620 data->offset -= size;
2621
2622 if (data->autinc_to)
2623 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2624 data->offset);
2625 else
2626 to1 = adjust_address (data->to, mode, data->offset);
2627
2628 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2629 emit_insn (gen_add2_insn (data->to_addr,
2630 GEN_INT (-(HOST_WIDE_INT) size)));
2631
2632 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2633 emit_insn ((*genfun) (to1, cst));
2634
2635 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2636 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2637
2638 if (! data->reverse)
2639 data->offset += size;
2640
2641 data->len -= size;
2642 }
2643 }
2644 \f
2645 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2646 its length in bytes. */
2647
2648 rtx
2649 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2650 unsigned int expected_align, HOST_WIDE_INT expected_size)
2651 {
2652 enum machine_mode mode = GET_MODE (object);
2653 unsigned int align;
2654
2655 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2656
2657 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2658 just move a zero. Otherwise, do this a piece at a time. */
2659 if (mode != BLKmode
2660 && CONST_INT_P (size)
2661 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2662 {
2663 rtx zero = CONST0_RTX (mode);
2664 if (zero != NULL)
2665 {
2666 emit_move_insn (object, zero);
2667 return NULL;
2668 }
2669
2670 if (COMPLEX_MODE_P (mode))
2671 {
2672 zero = CONST0_RTX (GET_MODE_INNER (mode));
2673 if (zero != NULL)
2674 {
2675 write_complex_part (object, zero, 0);
2676 write_complex_part (object, zero, 1);
2677 return NULL;
2678 }
2679 }
2680 }
2681
2682 if (size == const0_rtx)
2683 return NULL;
2684
2685 align = MEM_ALIGN (object);
2686
2687 if (CONST_INT_P (size)
2688 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2689 clear_by_pieces (object, INTVAL (size), align);
2690 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2691 expected_align, expected_size))
2692 ;
2693 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2694 return set_storage_via_libcall (object, size, const0_rtx,
2695 method == BLOCK_OP_TAILCALL);
2696 else
2697 gcc_unreachable ();
2698
2699 return NULL;
2700 }
2701
2702 rtx
2703 clear_storage (rtx object, rtx size, enum block_op_methods method)
2704 {
2705 return clear_storage_hints (object, size, method, 0, -1);
2706 }
2707
2708
2709 /* A subroutine of clear_storage. Expand a call to memset.
2710 Return the return value of memset, 0 otherwise. */
2711
2712 rtx
2713 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2714 {
2715 tree call_expr, fn, object_tree, size_tree, val_tree;
2716 enum machine_mode size_mode;
2717 rtx retval;
2718
2719 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2720 place those into new pseudos into a VAR_DECL and use them later. */
2721
2722 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2723
2724 size_mode = TYPE_MODE (sizetype);
2725 size = convert_to_mode (size_mode, size, 1);
2726 size = copy_to_mode_reg (size_mode, size);
2727
2728 /* It is incorrect to use the libcall calling conventions to call
2729 memset in this context. This could be a user call to memset and
2730 the user may wish to examine the return value from memset. For
2731 targets where libcalls and normal calls have different conventions
2732 for returning pointers, we could end up generating incorrect code. */
2733
2734 object_tree = make_tree (ptr_type_node, object);
2735 if (!CONST_INT_P (val))
2736 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2737 size_tree = make_tree (sizetype, size);
2738 val_tree = make_tree (integer_type_node, val);
2739
2740 fn = clear_storage_libcall_fn (true);
2741 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2742 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2743
2744 retval = expand_normal (call_expr);
2745
2746 return retval;
2747 }
2748
2749 /* A subroutine of set_storage_via_libcall. Create the tree node
2750 for the function we use for block clears. The first time FOR_CALL
2751 is true, we call assemble_external. */
2752
2753 tree block_clear_fn;
2754
2755 void
2756 init_block_clear_fn (const char *asmspec)
2757 {
2758 if (!block_clear_fn)
2759 {
2760 tree fn, args;
2761
2762 fn = get_identifier ("memset");
2763 args = build_function_type_list (ptr_type_node, ptr_type_node,
2764 integer_type_node, sizetype,
2765 NULL_TREE);
2766
2767 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2768 DECL_EXTERNAL (fn) = 1;
2769 TREE_PUBLIC (fn) = 1;
2770 DECL_ARTIFICIAL (fn) = 1;
2771 TREE_NOTHROW (fn) = 1;
2772 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2773 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2774
2775 block_clear_fn = fn;
2776 }
2777
2778 if (asmspec)
2779 set_user_assembler_name (block_clear_fn, asmspec);
2780 }
2781
2782 static tree
2783 clear_storage_libcall_fn (int for_call)
2784 {
2785 static bool emitted_extern;
2786
2787 if (!block_clear_fn)
2788 init_block_clear_fn (NULL);
2789
2790 if (for_call && !emitted_extern)
2791 {
2792 emitted_extern = true;
2793 make_decl_rtl (block_clear_fn);
2794 assemble_external (block_clear_fn);
2795 }
2796
2797 return block_clear_fn;
2798 }
2799 \f
2800 /* Expand a setmem pattern; return true if successful. */
2801
2802 bool
2803 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2804 unsigned int expected_align, HOST_WIDE_INT expected_size)
2805 {
2806 /* Try the most limited insn first, because there's no point
2807 including more than one in the machine description unless
2808 the more limited one has some advantage. */
2809
2810 enum machine_mode mode;
2811
2812 if (expected_align < align)
2813 expected_align = align;
2814
2815 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2816 mode = GET_MODE_WIDER_MODE (mode))
2817 {
2818 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2819
2820 if (code != CODE_FOR_nothing
2821 /* We don't need MODE to be narrower than
2822 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2823 the mode mask, as it is returned by the macro, it will
2824 definitely be less than the actual mode mask. */
2825 && ((CONST_INT_P (size)
2826 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2827 <= (GET_MODE_MASK (mode) >> 1)))
2828 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2829 {
2830 struct expand_operand ops[6];
2831 unsigned int nops;
2832
2833 nops = insn_data[(int) code].n_generator_args;
2834 gcc_assert (nops == 4 || nops == 6);
2835
2836 create_fixed_operand (&ops[0], object);
2837 /* The check above guarantees that this size conversion is valid. */
2838 create_convert_operand_to (&ops[1], size, mode, true);
2839 create_convert_operand_from (&ops[2], val, byte_mode, true);
2840 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2841 if (nops == 6)
2842 {
2843 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2844 create_integer_operand (&ops[5], expected_size);
2845 }
2846 if (maybe_expand_insn (code, nops, ops))
2847 return true;
2848 }
2849 }
2850
2851 return false;
2852 }
2853
2854 \f
2855 /* Write to one of the components of the complex value CPLX. Write VAL to
2856 the real part if IMAG_P is false, and the imaginary part if its true. */
2857
2858 static void
2859 write_complex_part (rtx cplx, rtx val, bool imag_p)
2860 {
2861 enum machine_mode cmode;
2862 enum machine_mode imode;
2863 unsigned ibitsize;
2864
2865 if (GET_CODE (cplx) == CONCAT)
2866 {
2867 emit_move_insn (XEXP (cplx, imag_p), val);
2868 return;
2869 }
2870
2871 cmode = GET_MODE (cplx);
2872 imode = GET_MODE_INNER (cmode);
2873 ibitsize = GET_MODE_BITSIZE (imode);
2874
2875 /* For MEMs simplify_gen_subreg may generate an invalid new address
2876 because, e.g., the original address is considered mode-dependent
2877 by the target, which restricts simplify_subreg from invoking
2878 adjust_address_nv. Instead of preparing fallback support for an
2879 invalid address, we call adjust_address_nv directly. */
2880 if (MEM_P (cplx))
2881 {
2882 emit_move_insn (adjust_address_nv (cplx, imode,
2883 imag_p ? GET_MODE_SIZE (imode) : 0),
2884 val);
2885 return;
2886 }
2887
2888 /* If the sub-object is at least word sized, then we know that subregging
2889 will work. This special case is important, since store_bit_field
2890 wants to operate on integer modes, and there's rarely an OImode to
2891 correspond to TCmode. */
2892 if (ibitsize >= BITS_PER_WORD
2893 /* For hard regs we have exact predicates. Assume we can split
2894 the original object if it spans an even number of hard regs.
2895 This special case is important for SCmode on 64-bit platforms
2896 where the natural size of floating-point regs is 32-bit. */
2897 || (REG_P (cplx)
2898 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2899 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2900 {
2901 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2902 imag_p ? GET_MODE_SIZE (imode) : 0);
2903 if (part)
2904 {
2905 emit_move_insn (part, val);
2906 return;
2907 }
2908 else
2909 /* simplify_gen_subreg may fail for sub-word MEMs. */
2910 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2911 }
2912
2913 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2914 }
2915
2916 /* Extract one of the components of the complex value CPLX. Extract the
2917 real part if IMAG_P is false, and the imaginary part if it's true. */
2918
2919 static rtx
2920 read_complex_part (rtx cplx, bool imag_p)
2921 {
2922 enum machine_mode cmode, imode;
2923 unsigned ibitsize;
2924
2925 if (GET_CODE (cplx) == CONCAT)
2926 return XEXP (cplx, imag_p);
2927
2928 cmode = GET_MODE (cplx);
2929 imode = GET_MODE_INNER (cmode);
2930 ibitsize = GET_MODE_BITSIZE (imode);
2931
2932 /* Special case reads from complex constants that got spilled to memory. */
2933 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2934 {
2935 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2936 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2937 {
2938 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2939 if (CONSTANT_CLASS_P (part))
2940 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2941 }
2942 }
2943
2944 /* For MEMs simplify_gen_subreg may generate an invalid new address
2945 because, e.g., the original address is considered mode-dependent
2946 by the target, which restricts simplify_subreg from invoking
2947 adjust_address_nv. Instead of preparing fallback support for an
2948 invalid address, we call adjust_address_nv directly. */
2949 if (MEM_P (cplx))
2950 return adjust_address_nv (cplx, imode,
2951 imag_p ? GET_MODE_SIZE (imode) : 0);
2952
2953 /* If the sub-object is at least word sized, then we know that subregging
2954 will work. This special case is important, since extract_bit_field
2955 wants to operate on integer modes, and there's rarely an OImode to
2956 correspond to TCmode. */
2957 if (ibitsize >= BITS_PER_WORD
2958 /* For hard regs we have exact predicates. Assume we can split
2959 the original object if it spans an even number of hard regs.
2960 This special case is important for SCmode on 64-bit platforms
2961 where the natural size of floating-point regs is 32-bit. */
2962 || (REG_P (cplx)
2963 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2964 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2965 {
2966 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2967 imag_p ? GET_MODE_SIZE (imode) : 0);
2968 if (ret)
2969 return ret;
2970 else
2971 /* simplify_gen_subreg may fail for sub-word MEMs. */
2972 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2973 }
2974
2975 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2976 true, false, NULL_RTX, imode, imode);
2977 }
2978 \f
2979 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2980 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2981 represented in NEW_MODE. If FORCE is true, this will never happen, as
2982 we'll force-create a SUBREG if needed. */
2983
2984 static rtx
2985 emit_move_change_mode (enum machine_mode new_mode,
2986 enum machine_mode old_mode, rtx x, bool force)
2987 {
2988 rtx ret;
2989
2990 if (push_operand (x, GET_MODE (x)))
2991 {
2992 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2993 MEM_COPY_ATTRIBUTES (ret, x);
2994 }
2995 else if (MEM_P (x))
2996 {
2997 /* We don't have to worry about changing the address since the
2998 size in bytes is supposed to be the same. */
2999 if (reload_in_progress)
3000 {
3001 /* Copy the MEM to change the mode and move any
3002 substitutions from the old MEM to the new one. */
3003 ret = adjust_address_nv (x, new_mode, 0);
3004 copy_replacements (x, ret);
3005 }
3006 else
3007 ret = adjust_address (x, new_mode, 0);
3008 }
3009 else
3010 {
3011 /* Note that we do want simplify_subreg's behavior of validating
3012 that the new mode is ok for a hard register. If we were to use
3013 simplify_gen_subreg, we would create the subreg, but would
3014 probably run into the target not being able to implement it. */
3015 /* Except, of course, when FORCE is true, when this is exactly what
3016 we want. Which is needed for CCmodes on some targets. */
3017 if (force)
3018 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3019 else
3020 ret = simplify_subreg (new_mode, x, old_mode, 0);
3021 }
3022
3023 return ret;
3024 }
3025
3026 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3027 an integer mode of the same size as MODE. Returns the instruction
3028 emitted, or NULL if such a move could not be generated. */
3029
3030 static rtx
3031 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3032 {
3033 enum machine_mode imode;
3034 enum insn_code code;
3035
3036 /* There must exist a mode of the exact size we require. */
3037 imode = int_mode_for_mode (mode);
3038 if (imode == BLKmode)
3039 return NULL_RTX;
3040
3041 /* The target must support moves in this mode. */
3042 code = optab_handler (mov_optab, imode);
3043 if (code == CODE_FOR_nothing)
3044 return NULL_RTX;
3045
3046 x = emit_move_change_mode (imode, mode, x, force);
3047 if (x == NULL_RTX)
3048 return NULL_RTX;
3049 y = emit_move_change_mode (imode, mode, y, force);
3050 if (y == NULL_RTX)
3051 return NULL_RTX;
3052 return emit_insn (GEN_FCN (code) (x, y));
3053 }
3054
3055 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3056 Return an equivalent MEM that does not use an auto-increment. */
3057
3058 static rtx
3059 emit_move_resolve_push (enum machine_mode mode, rtx x)
3060 {
3061 enum rtx_code code = GET_CODE (XEXP (x, 0));
3062 HOST_WIDE_INT adjust;
3063 rtx temp;
3064
3065 adjust = GET_MODE_SIZE (mode);
3066 #ifdef PUSH_ROUNDING
3067 adjust = PUSH_ROUNDING (adjust);
3068 #endif
3069 if (code == PRE_DEC || code == POST_DEC)
3070 adjust = -adjust;
3071 else if (code == PRE_MODIFY || code == POST_MODIFY)
3072 {
3073 rtx expr = XEXP (XEXP (x, 0), 1);
3074 HOST_WIDE_INT val;
3075
3076 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3077 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3078 val = INTVAL (XEXP (expr, 1));
3079 if (GET_CODE (expr) == MINUS)
3080 val = -val;
3081 gcc_assert (adjust == val || adjust == -val);
3082 adjust = val;
3083 }
3084
3085 /* Do not use anti_adjust_stack, since we don't want to update
3086 stack_pointer_delta. */
3087 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3088 GEN_INT (adjust), stack_pointer_rtx,
3089 0, OPTAB_LIB_WIDEN);
3090 if (temp != stack_pointer_rtx)
3091 emit_move_insn (stack_pointer_rtx, temp);
3092
3093 switch (code)
3094 {
3095 case PRE_INC:
3096 case PRE_DEC:
3097 case PRE_MODIFY:
3098 temp = stack_pointer_rtx;
3099 break;
3100 case POST_INC:
3101 case POST_DEC:
3102 case POST_MODIFY:
3103 temp = plus_constant (stack_pointer_rtx, -adjust);
3104 break;
3105 default:
3106 gcc_unreachable ();
3107 }
3108
3109 return replace_equiv_address (x, temp);
3110 }
3111
3112 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3113 X is known to satisfy push_operand, and MODE is known to be complex.
3114 Returns the last instruction emitted. */
3115
3116 rtx
3117 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3118 {
3119 enum machine_mode submode = GET_MODE_INNER (mode);
3120 bool imag_first;
3121
3122 #ifdef PUSH_ROUNDING
3123 unsigned int submodesize = GET_MODE_SIZE (submode);
3124
3125 /* In case we output to the stack, but the size is smaller than the
3126 machine can push exactly, we need to use move instructions. */
3127 if (PUSH_ROUNDING (submodesize) != submodesize)
3128 {
3129 x = emit_move_resolve_push (mode, x);
3130 return emit_move_insn (x, y);
3131 }
3132 #endif
3133
3134 /* Note that the real part always precedes the imag part in memory
3135 regardless of machine's endianness. */
3136 switch (GET_CODE (XEXP (x, 0)))
3137 {
3138 case PRE_DEC:
3139 case POST_DEC:
3140 imag_first = true;
3141 break;
3142 case PRE_INC:
3143 case POST_INC:
3144 imag_first = false;
3145 break;
3146 default:
3147 gcc_unreachable ();
3148 }
3149
3150 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3151 read_complex_part (y, imag_first));
3152 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3153 read_complex_part (y, !imag_first));
3154 }
3155
3156 /* A subroutine of emit_move_complex. Perform the move from Y to X
3157 via two moves of the parts. Returns the last instruction emitted. */
3158
3159 rtx
3160 emit_move_complex_parts (rtx x, rtx y)
3161 {
3162 /* Show the output dies here. This is necessary for SUBREGs
3163 of pseudos since we cannot track their lifetimes correctly;
3164 hard regs shouldn't appear here except as return values. */
3165 if (!reload_completed && !reload_in_progress
3166 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3167 emit_clobber (x);
3168
3169 write_complex_part (x, read_complex_part (y, false), false);
3170 write_complex_part (x, read_complex_part (y, true), true);
3171
3172 return get_last_insn ();
3173 }
3174
3175 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3176 MODE is known to be complex. Returns the last instruction emitted. */
3177
3178 static rtx
3179 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3180 {
3181 bool try_int;
3182
3183 /* Need to take special care for pushes, to maintain proper ordering
3184 of the data, and possibly extra padding. */
3185 if (push_operand (x, mode))
3186 return emit_move_complex_push (mode, x, y);
3187
3188 /* See if we can coerce the target into moving both values at once. */
3189
3190 /* Move floating point as parts. */
3191 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3192 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3193 try_int = false;
3194 /* Not possible if the values are inherently not adjacent. */
3195 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3196 try_int = false;
3197 /* Is possible if both are registers (or subregs of registers). */
3198 else if (register_operand (x, mode) && register_operand (y, mode))
3199 try_int = true;
3200 /* If one of the operands is a memory, and alignment constraints
3201 are friendly enough, we may be able to do combined memory operations.
3202 We do not attempt this if Y is a constant because that combination is
3203 usually better with the by-parts thing below. */
3204 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3205 && (!STRICT_ALIGNMENT
3206 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3207 try_int = true;
3208 else
3209 try_int = false;
3210
3211 if (try_int)
3212 {
3213 rtx ret;
3214
3215 /* For memory to memory moves, optimal behavior can be had with the
3216 existing block move logic. */
3217 if (MEM_P (x) && MEM_P (y))
3218 {
3219 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3220 BLOCK_OP_NO_LIBCALL);
3221 return get_last_insn ();
3222 }
3223
3224 ret = emit_move_via_integer (mode, x, y, true);
3225 if (ret)
3226 return ret;
3227 }
3228
3229 return emit_move_complex_parts (x, y);
3230 }
3231
3232 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3233 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3234
3235 static rtx
3236 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3237 {
3238 rtx ret;
3239
3240 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3241 if (mode != CCmode)
3242 {
3243 enum insn_code code = optab_handler (mov_optab, CCmode);
3244 if (code != CODE_FOR_nothing)
3245 {
3246 x = emit_move_change_mode (CCmode, mode, x, true);
3247 y = emit_move_change_mode (CCmode, mode, y, true);
3248 return emit_insn (GEN_FCN (code) (x, y));
3249 }
3250 }
3251
3252 /* Otherwise, find the MODE_INT mode of the same width. */
3253 ret = emit_move_via_integer (mode, x, y, false);
3254 gcc_assert (ret != NULL);
3255 return ret;
3256 }
3257
3258 /* Return true if word I of OP lies entirely in the
3259 undefined bits of a paradoxical subreg. */
3260
3261 static bool
3262 undefined_operand_subword_p (const_rtx op, int i)
3263 {
3264 enum machine_mode innermode, innermostmode;
3265 int offset;
3266 if (GET_CODE (op) != SUBREG)
3267 return false;
3268 innermode = GET_MODE (op);
3269 innermostmode = GET_MODE (SUBREG_REG (op));
3270 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3271 /* The SUBREG_BYTE represents offset, as if the value were stored in
3272 memory, except for a paradoxical subreg where we define
3273 SUBREG_BYTE to be 0; undo this exception as in
3274 simplify_subreg. */
3275 if (SUBREG_BYTE (op) == 0
3276 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3277 {
3278 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3279 if (WORDS_BIG_ENDIAN)
3280 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3281 if (BYTES_BIG_ENDIAN)
3282 offset += difference % UNITS_PER_WORD;
3283 }
3284 if (offset >= GET_MODE_SIZE (innermostmode)
3285 || offset <= -GET_MODE_SIZE (word_mode))
3286 return true;
3287 return false;
3288 }
3289
3290 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3291 MODE is any multi-word or full-word mode that lacks a move_insn
3292 pattern. Note that you will get better code if you define such
3293 patterns, even if they must turn into multiple assembler instructions. */
3294
3295 static rtx
3296 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3297 {
3298 rtx last_insn = 0;
3299 rtx seq, inner;
3300 bool need_clobber;
3301 int i;
3302
3303 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3304
3305 /* If X is a push on the stack, do the push now and replace
3306 X with a reference to the stack pointer. */
3307 if (push_operand (x, mode))
3308 x = emit_move_resolve_push (mode, x);
3309
3310 /* If we are in reload, see if either operand is a MEM whose address
3311 is scheduled for replacement. */
3312 if (reload_in_progress && MEM_P (x)
3313 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3314 x = replace_equiv_address_nv (x, inner);
3315 if (reload_in_progress && MEM_P (y)
3316 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3317 y = replace_equiv_address_nv (y, inner);
3318
3319 start_sequence ();
3320
3321 need_clobber = false;
3322 for (i = 0;
3323 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3324 i++)
3325 {
3326 rtx xpart = operand_subword (x, i, 1, mode);
3327 rtx ypart;
3328
3329 /* Do not generate code for a move if it would come entirely
3330 from the undefined bits of a paradoxical subreg. */
3331 if (undefined_operand_subword_p (y, i))
3332 continue;
3333
3334 ypart = operand_subword (y, i, 1, mode);
3335
3336 /* If we can't get a part of Y, put Y into memory if it is a
3337 constant. Otherwise, force it into a register. Then we must
3338 be able to get a part of Y. */
3339 if (ypart == 0 && CONSTANT_P (y))
3340 {
3341 y = use_anchored_address (force_const_mem (mode, y));
3342 ypart = operand_subword (y, i, 1, mode);
3343 }
3344 else if (ypart == 0)
3345 ypart = operand_subword_force (y, i, mode);
3346
3347 gcc_assert (xpart && ypart);
3348
3349 need_clobber |= (GET_CODE (xpart) == SUBREG);
3350
3351 last_insn = emit_move_insn (xpart, ypart);
3352 }
3353
3354 seq = get_insns ();
3355 end_sequence ();
3356
3357 /* Show the output dies here. This is necessary for SUBREGs
3358 of pseudos since we cannot track their lifetimes correctly;
3359 hard regs shouldn't appear here except as return values.
3360 We never want to emit such a clobber after reload. */
3361 if (x != y
3362 && ! (reload_in_progress || reload_completed)
3363 && need_clobber != 0)
3364 emit_clobber (x);
3365
3366 emit_insn (seq);
3367
3368 return last_insn;
3369 }
3370
3371 /* Low level part of emit_move_insn.
3372 Called just like emit_move_insn, but assumes X and Y
3373 are basically valid. */
3374
3375 rtx
3376 emit_move_insn_1 (rtx x, rtx y)
3377 {
3378 enum machine_mode mode = GET_MODE (x);
3379 enum insn_code code;
3380
3381 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3382
3383 code = optab_handler (mov_optab, mode);
3384 if (code != CODE_FOR_nothing)
3385 return emit_insn (GEN_FCN (code) (x, y));
3386
3387 /* Expand complex moves by moving real part and imag part. */
3388 if (COMPLEX_MODE_P (mode))
3389 return emit_move_complex (mode, x, y);
3390
3391 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3392 || ALL_FIXED_POINT_MODE_P (mode))
3393 {
3394 rtx result = emit_move_via_integer (mode, x, y, true);
3395
3396 /* If we can't find an integer mode, use multi words. */
3397 if (result)
3398 return result;
3399 else
3400 return emit_move_multi_word (mode, x, y);
3401 }
3402
3403 if (GET_MODE_CLASS (mode) == MODE_CC)
3404 return emit_move_ccmode (mode, x, y);
3405
3406 /* Try using a move pattern for the corresponding integer mode. This is
3407 only safe when simplify_subreg can convert MODE constants into integer
3408 constants. At present, it can only do this reliably if the value
3409 fits within a HOST_WIDE_INT. */
3410 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3411 {
3412 rtx ret = emit_move_via_integer (mode, x, y, false);
3413 if (ret)
3414 return ret;
3415 }
3416
3417 return emit_move_multi_word (mode, x, y);
3418 }
3419
3420 /* Generate code to copy Y into X.
3421 Both Y and X must have the same mode, except that
3422 Y can be a constant with VOIDmode.
3423 This mode cannot be BLKmode; use emit_block_move for that.
3424
3425 Return the last instruction emitted. */
3426
3427 rtx
3428 emit_move_insn (rtx x, rtx y)
3429 {
3430 enum machine_mode mode = GET_MODE (x);
3431 rtx y_cst = NULL_RTX;
3432 rtx last_insn, set;
3433
3434 gcc_assert (mode != BLKmode
3435 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3436
3437 if (CONSTANT_P (y))
3438 {
3439 if (optimize
3440 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3441 && (last_insn = compress_float_constant (x, y)))
3442 return last_insn;
3443
3444 y_cst = y;
3445
3446 if (!targetm.legitimate_constant_p (mode, y))
3447 {
3448 y = force_const_mem (mode, y);
3449
3450 /* If the target's cannot_force_const_mem prevented the spill,
3451 assume that the target's move expanders will also take care
3452 of the non-legitimate constant. */
3453 if (!y)
3454 y = y_cst;
3455 else
3456 y = use_anchored_address (y);
3457 }
3458 }
3459
3460 /* If X or Y are memory references, verify that their addresses are valid
3461 for the machine. */
3462 if (MEM_P (x)
3463 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3464 MEM_ADDR_SPACE (x))
3465 && ! push_operand (x, GET_MODE (x))))
3466 x = validize_mem (x);
3467
3468 if (MEM_P (y)
3469 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3470 MEM_ADDR_SPACE (y)))
3471 y = validize_mem (y);
3472
3473 gcc_assert (mode != BLKmode);
3474
3475 last_insn = emit_move_insn_1 (x, y);
3476
3477 if (y_cst && REG_P (x)
3478 && (set = single_set (last_insn)) != NULL_RTX
3479 && SET_DEST (set) == x
3480 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3481 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3482
3483 return last_insn;
3484 }
3485
3486 /* If Y is representable exactly in a narrower mode, and the target can
3487 perform the extension directly from constant or memory, then emit the
3488 move as an extension. */
3489
3490 static rtx
3491 compress_float_constant (rtx x, rtx y)
3492 {
3493 enum machine_mode dstmode = GET_MODE (x);
3494 enum machine_mode orig_srcmode = GET_MODE (y);
3495 enum machine_mode srcmode;
3496 REAL_VALUE_TYPE r;
3497 int oldcost, newcost;
3498 bool speed = optimize_insn_for_speed_p ();
3499
3500 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3501
3502 if (targetm.legitimate_constant_p (dstmode, y))
3503 oldcost = set_src_cost (y, speed);
3504 else
3505 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3506
3507 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3508 srcmode != orig_srcmode;
3509 srcmode = GET_MODE_WIDER_MODE (srcmode))
3510 {
3511 enum insn_code ic;
3512 rtx trunc_y, last_insn;
3513
3514 /* Skip if the target can't extend this way. */
3515 ic = can_extend_p (dstmode, srcmode, 0);
3516 if (ic == CODE_FOR_nothing)
3517 continue;
3518
3519 /* Skip if the narrowed value isn't exact. */
3520 if (! exact_real_truncate (srcmode, &r))
3521 continue;
3522
3523 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3524
3525 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3526 {
3527 /* Skip if the target needs extra instructions to perform
3528 the extension. */
3529 if (!insn_operand_matches (ic, 1, trunc_y))
3530 continue;
3531 /* This is valid, but may not be cheaper than the original. */
3532 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3533 speed);
3534 if (oldcost < newcost)
3535 continue;
3536 }
3537 else if (float_extend_from_mem[dstmode][srcmode])
3538 {
3539 trunc_y = force_const_mem (srcmode, trunc_y);
3540 /* This is valid, but may not be cheaper than the original. */
3541 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3542 speed);
3543 if (oldcost < newcost)
3544 continue;
3545 trunc_y = validize_mem (trunc_y);
3546 }
3547 else
3548 continue;
3549
3550 /* For CSE's benefit, force the compressed constant pool entry
3551 into a new pseudo. This constant may be used in different modes,
3552 and if not, combine will put things back together for us. */
3553 trunc_y = force_reg (srcmode, trunc_y);
3554 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3555 last_insn = get_last_insn ();
3556
3557 if (REG_P (x))
3558 set_unique_reg_note (last_insn, REG_EQUAL, y);
3559
3560 return last_insn;
3561 }
3562
3563 return NULL_RTX;
3564 }
3565 \f
3566 /* Pushing data onto the stack. */
3567
3568 /* Push a block of length SIZE (perhaps variable)
3569 and return an rtx to address the beginning of the block.
3570 The value may be virtual_outgoing_args_rtx.
3571
3572 EXTRA is the number of bytes of padding to push in addition to SIZE.
3573 BELOW nonzero means this padding comes at low addresses;
3574 otherwise, the padding comes at high addresses. */
3575
3576 rtx
3577 push_block (rtx size, int extra, int below)
3578 {
3579 rtx temp;
3580
3581 size = convert_modes (Pmode, ptr_mode, size, 1);
3582 if (CONSTANT_P (size))
3583 anti_adjust_stack (plus_constant (size, extra));
3584 else if (REG_P (size) && extra == 0)
3585 anti_adjust_stack (size);
3586 else
3587 {
3588 temp = copy_to_mode_reg (Pmode, size);
3589 if (extra != 0)
3590 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3591 temp, 0, OPTAB_LIB_WIDEN);
3592 anti_adjust_stack (temp);
3593 }
3594
3595 #ifndef STACK_GROWS_DOWNWARD
3596 if (0)
3597 #else
3598 if (1)
3599 #endif
3600 {
3601 temp = virtual_outgoing_args_rtx;
3602 if (extra != 0 && below)
3603 temp = plus_constant (temp, extra);
3604 }
3605 else
3606 {
3607 if (CONST_INT_P (size))
3608 temp = plus_constant (virtual_outgoing_args_rtx,
3609 -INTVAL (size) - (below ? 0 : extra));
3610 else if (extra != 0 && !below)
3611 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3612 negate_rtx (Pmode, plus_constant (size, extra)));
3613 else
3614 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3615 negate_rtx (Pmode, size));
3616 }
3617
3618 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3619 }
3620
3621 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3622
3623 static rtx
3624 mem_autoinc_base (rtx mem)
3625 {
3626 if (MEM_P (mem))
3627 {
3628 rtx addr = XEXP (mem, 0);
3629 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3630 return XEXP (addr, 0);
3631 }
3632 return NULL;
3633 }
3634
3635 /* A utility routine used here, in reload, and in try_split. The insns
3636 after PREV up to and including LAST are known to adjust the stack,
3637 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3638 placing notes as appropriate. PREV may be NULL, indicating the
3639 entire insn sequence prior to LAST should be scanned.
3640
3641 The set of allowed stack pointer modifications is small:
3642 (1) One or more auto-inc style memory references (aka pushes),
3643 (2) One or more addition/subtraction with the SP as destination,
3644 (3) A single move insn with the SP as destination,
3645 (4) A call_pop insn,
3646 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3647
3648 Insns in the sequence that do not modify the SP are ignored,
3649 except for noreturn calls.
3650
3651 The return value is the amount of adjustment that can be trivially
3652 verified, via immediate operand or auto-inc. If the adjustment
3653 cannot be trivially extracted, the return value is INT_MIN. */
3654
3655 HOST_WIDE_INT
3656 find_args_size_adjust (rtx insn)
3657 {
3658 rtx dest, set, pat;
3659 int i;
3660
3661 pat = PATTERN (insn);
3662 set = NULL;
3663
3664 /* Look for a call_pop pattern. */
3665 if (CALL_P (insn))
3666 {
3667 /* We have to allow non-call_pop patterns for the case
3668 of emit_single_push_insn of a TLS address. */
3669 if (GET_CODE (pat) != PARALLEL)
3670 return 0;
3671
3672 /* All call_pop have a stack pointer adjust in the parallel.
3673 The call itself is always first, and the stack adjust is
3674 usually last, so search from the end. */
3675 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3676 {
3677 set = XVECEXP (pat, 0, i);
3678 if (GET_CODE (set) != SET)
3679 continue;
3680 dest = SET_DEST (set);
3681 if (dest == stack_pointer_rtx)
3682 break;
3683 }
3684 /* We'd better have found the stack pointer adjust. */
3685 if (i == 0)
3686 return 0;
3687 /* Fall through to process the extracted SET and DEST
3688 as if it was a standalone insn. */
3689 }
3690 else if (GET_CODE (pat) == SET)
3691 set = pat;
3692 else if ((set = single_set (insn)) != NULL)
3693 ;
3694 else if (GET_CODE (pat) == PARALLEL)
3695 {
3696 /* ??? Some older ports use a parallel with a stack adjust
3697 and a store for a PUSH_ROUNDING pattern, rather than a
3698 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3699 /* ??? See h8300 and m68k, pushqi1. */
3700 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3701 {
3702 set = XVECEXP (pat, 0, i);
3703 if (GET_CODE (set) != SET)
3704 continue;
3705 dest = SET_DEST (set);
3706 if (dest == stack_pointer_rtx)
3707 break;
3708
3709 /* We do not expect an auto-inc of the sp in the parallel. */
3710 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3711 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3712 != stack_pointer_rtx);
3713 }
3714 if (i < 0)
3715 return 0;
3716 }
3717 else
3718 return 0;
3719
3720 dest = SET_DEST (set);
3721
3722 /* Look for direct modifications of the stack pointer. */
3723 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3724 {
3725 /* Look for a trivial adjustment, otherwise assume nothing. */
3726 /* Note that the SPU restore_stack_block pattern refers to
3727 the stack pointer in V4SImode. Consider that non-trivial. */
3728 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3729 && GET_CODE (SET_SRC (set)) == PLUS
3730 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3731 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3732 return INTVAL (XEXP (SET_SRC (set), 1));
3733 /* ??? Reload can generate no-op moves, which will be cleaned
3734 up later. Recognize it and continue searching. */
3735 else if (rtx_equal_p (dest, SET_SRC (set)))
3736 return 0;
3737 else
3738 return HOST_WIDE_INT_MIN;
3739 }
3740 else
3741 {
3742 rtx mem, addr;
3743
3744 /* Otherwise only think about autoinc patterns. */
3745 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3746 {
3747 mem = dest;
3748 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3749 != stack_pointer_rtx);
3750 }
3751 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3752 mem = SET_SRC (set);
3753 else
3754 return 0;
3755
3756 addr = XEXP (mem, 0);
3757 switch (GET_CODE (addr))
3758 {
3759 case PRE_INC:
3760 case POST_INC:
3761 return GET_MODE_SIZE (GET_MODE (mem));
3762 case PRE_DEC:
3763 case POST_DEC:
3764 return -GET_MODE_SIZE (GET_MODE (mem));
3765 case PRE_MODIFY:
3766 case POST_MODIFY:
3767 addr = XEXP (addr, 1);
3768 gcc_assert (GET_CODE (addr) == PLUS);
3769 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3770 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3771 return INTVAL (XEXP (addr, 1));
3772 default:
3773 gcc_unreachable ();
3774 }
3775 }
3776 }
3777
3778 int
3779 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3780 {
3781 int args_size = end_args_size;
3782 bool saw_unknown = false;
3783 rtx insn;
3784
3785 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3786 {
3787 HOST_WIDE_INT this_delta;
3788
3789 if (!NONDEBUG_INSN_P (insn))
3790 continue;
3791
3792 this_delta = find_args_size_adjust (insn);
3793 if (this_delta == 0)
3794 {
3795 if (!CALL_P (insn)
3796 || ACCUMULATE_OUTGOING_ARGS
3797 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3798 continue;
3799 }
3800
3801 gcc_assert (!saw_unknown);
3802 if (this_delta == HOST_WIDE_INT_MIN)
3803 saw_unknown = true;
3804
3805 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3806 #ifdef STACK_GROWS_DOWNWARD
3807 this_delta = -this_delta;
3808 #endif
3809 args_size -= this_delta;
3810 }
3811
3812 return saw_unknown ? INT_MIN : args_size;
3813 }
3814
3815 #ifdef PUSH_ROUNDING
3816 /* Emit single push insn. */
3817
3818 static void
3819 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3820 {
3821 rtx dest_addr;
3822 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3823 rtx dest;
3824 enum insn_code icode;
3825
3826 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3827 /* If there is push pattern, use it. Otherwise try old way of throwing
3828 MEM representing push operation to move expander. */
3829 icode = optab_handler (push_optab, mode);
3830 if (icode != CODE_FOR_nothing)
3831 {
3832 struct expand_operand ops[1];
3833
3834 create_input_operand (&ops[0], x, mode);
3835 if (maybe_expand_insn (icode, 1, ops))
3836 return;
3837 }
3838 if (GET_MODE_SIZE (mode) == rounded_size)
3839 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3840 /* If we are to pad downward, adjust the stack pointer first and
3841 then store X into the stack location using an offset. This is
3842 because emit_move_insn does not know how to pad; it does not have
3843 access to type. */
3844 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3845 {
3846 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3847 HOST_WIDE_INT offset;
3848
3849 emit_move_insn (stack_pointer_rtx,
3850 expand_binop (Pmode,
3851 #ifdef STACK_GROWS_DOWNWARD
3852 sub_optab,
3853 #else
3854 add_optab,
3855 #endif
3856 stack_pointer_rtx,
3857 GEN_INT (rounded_size),
3858 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3859
3860 offset = (HOST_WIDE_INT) padding_size;
3861 #ifdef STACK_GROWS_DOWNWARD
3862 if (STACK_PUSH_CODE == POST_DEC)
3863 /* We have already decremented the stack pointer, so get the
3864 previous value. */
3865 offset += (HOST_WIDE_INT) rounded_size;
3866 #else
3867 if (STACK_PUSH_CODE == POST_INC)
3868 /* We have already incremented the stack pointer, so get the
3869 previous value. */
3870 offset -= (HOST_WIDE_INT) rounded_size;
3871 #endif
3872 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3873 }
3874 else
3875 {
3876 #ifdef STACK_GROWS_DOWNWARD
3877 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3878 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3879 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3880 #else
3881 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3882 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3883 GEN_INT (rounded_size));
3884 #endif
3885 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3886 }
3887
3888 dest = gen_rtx_MEM (mode, dest_addr);
3889
3890 if (type != 0)
3891 {
3892 set_mem_attributes (dest, type, 1);
3893
3894 if (flag_optimize_sibling_calls)
3895 /* Function incoming arguments may overlap with sibling call
3896 outgoing arguments and we cannot allow reordering of reads
3897 from function arguments with stores to outgoing arguments
3898 of sibling calls. */
3899 set_mem_alias_set (dest, 0);
3900 }
3901 emit_move_insn (dest, x);
3902 }
3903
3904 /* Emit and annotate a single push insn. */
3905
3906 static void
3907 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3908 {
3909 int delta, old_delta = stack_pointer_delta;
3910 rtx prev = get_last_insn ();
3911 rtx last;
3912
3913 emit_single_push_insn_1 (mode, x, type);
3914
3915 last = get_last_insn ();
3916
3917 /* Notice the common case where we emitted exactly one insn. */
3918 if (PREV_INSN (last) == prev)
3919 {
3920 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3921 return;
3922 }
3923
3924 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3925 gcc_assert (delta == INT_MIN || delta == old_delta);
3926 }
3927 #endif
3928
3929 /* Generate code to push X onto the stack, assuming it has mode MODE and
3930 type TYPE.
3931 MODE is redundant except when X is a CONST_INT (since they don't
3932 carry mode info).
3933 SIZE is an rtx for the size of data to be copied (in bytes),
3934 needed only if X is BLKmode.
3935
3936 ALIGN (in bits) is maximum alignment we can assume.
3937
3938 If PARTIAL and REG are both nonzero, then copy that many of the first
3939 bytes of X into registers starting with REG, and push the rest of X.
3940 The amount of space pushed is decreased by PARTIAL bytes.
3941 REG must be a hard register in this case.
3942 If REG is zero but PARTIAL is not, take any all others actions for an
3943 argument partially in registers, but do not actually load any
3944 registers.
3945
3946 EXTRA is the amount in bytes of extra space to leave next to this arg.
3947 This is ignored if an argument block has already been allocated.
3948
3949 On a machine that lacks real push insns, ARGS_ADDR is the address of
3950 the bottom of the argument block for this call. We use indexing off there
3951 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3952 argument block has not been preallocated.
3953
3954 ARGS_SO_FAR is the size of args previously pushed for this call.
3955
3956 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3957 for arguments passed in registers. If nonzero, it will be the number
3958 of bytes required. */
3959
3960 void
3961 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3962 unsigned int align, int partial, rtx reg, int extra,
3963 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3964 rtx alignment_pad)
3965 {
3966 rtx xinner;
3967 enum direction stack_direction
3968 #ifdef STACK_GROWS_DOWNWARD
3969 = downward;
3970 #else
3971 = upward;
3972 #endif
3973
3974 /* Decide where to pad the argument: `downward' for below,
3975 `upward' for above, or `none' for don't pad it.
3976 Default is below for small data on big-endian machines; else above. */
3977 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3978
3979 /* Invert direction if stack is post-decrement.
3980 FIXME: why? */
3981 if (STACK_PUSH_CODE == POST_DEC)
3982 if (where_pad != none)
3983 where_pad = (where_pad == downward ? upward : downward);
3984
3985 xinner = x;
3986
3987 if (mode == BLKmode
3988 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3989 {
3990 /* Copy a block into the stack, entirely or partially. */
3991
3992 rtx temp;
3993 int used;
3994 int offset;
3995 int skip;
3996
3997 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3998 used = partial - offset;
3999
4000 if (mode != BLKmode)
4001 {
4002 /* A value is to be stored in an insufficiently aligned
4003 stack slot; copy via a suitably aligned slot if
4004 necessary. */
4005 size = GEN_INT (GET_MODE_SIZE (mode));
4006 if (!MEM_P (xinner))
4007 {
4008 temp = assign_temp (type, 0, 1, 1);
4009 emit_move_insn (temp, xinner);
4010 xinner = temp;
4011 }
4012 }
4013
4014 gcc_assert (size);
4015
4016 /* USED is now the # of bytes we need not copy to the stack
4017 because registers will take care of them. */
4018
4019 if (partial != 0)
4020 xinner = adjust_address (xinner, BLKmode, used);
4021
4022 /* If the partial register-part of the arg counts in its stack size,
4023 skip the part of stack space corresponding to the registers.
4024 Otherwise, start copying to the beginning of the stack space,
4025 by setting SKIP to 0. */
4026 skip = (reg_parm_stack_space == 0) ? 0 : used;
4027
4028 #ifdef PUSH_ROUNDING
4029 /* Do it with several push insns if that doesn't take lots of insns
4030 and if there is no difficulty with push insns that skip bytes
4031 on the stack for alignment purposes. */
4032 if (args_addr == 0
4033 && PUSH_ARGS
4034 && CONST_INT_P (size)
4035 && skip == 0
4036 && MEM_ALIGN (xinner) >= align
4037 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
4038 /* Here we avoid the case of a structure whose weak alignment
4039 forces many pushes of a small amount of data,
4040 and such small pushes do rounding that causes trouble. */
4041 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4042 || align >= BIGGEST_ALIGNMENT
4043 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4044 == (align / BITS_PER_UNIT)))
4045 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4046 {
4047 /* Push padding now if padding above and stack grows down,
4048 or if padding below and stack grows up.
4049 But if space already allocated, this has already been done. */
4050 if (extra && args_addr == 0
4051 && where_pad != none && where_pad != stack_direction)
4052 anti_adjust_stack (GEN_INT (extra));
4053
4054 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4055 }
4056 else
4057 #endif /* PUSH_ROUNDING */
4058 {
4059 rtx target;
4060
4061 /* Otherwise make space on the stack and copy the data
4062 to the address of that space. */
4063
4064 /* Deduct words put into registers from the size we must copy. */
4065 if (partial != 0)
4066 {
4067 if (CONST_INT_P (size))
4068 size = GEN_INT (INTVAL (size) - used);
4069 else
4070 size = expand_binop (GET_MODE (size), sub_optab, size,
4071 GEN_INT (used), NULL_RTX, 0,
4072 OPTAB_LIB_WIDEN);
4073 }
4074
4075 /* Get the address of the stack space.
4076 In this case, we do not deal with EXTRA separately.
4077 A single stack adjust will do. */
4078 if (! args_addr)
4079 {
4080 temp = push_block (size, extra, where_pad == downward);
4081 extra = 0;
4082 }
4083 else if (CONST_INT_P (args_so_far))
4084 temp = memory_address (BLKmode,
4085 plus_constant (args_addr,
4086 skip + INTVAL (args_so_far)));
4087 else
4088 temp = memory_address (BLKmode,
4089 plus_constant (gen_rtx_PLUS (Pmode,
4090 args_addr,
4091 args_so_far),
4092 skip));
4093
4094 if (!ACCUMULATE_OUTGOING_ARGS)
4095 {
4096 /* If the source is referenced relative to the stack pointer,
4097 copy it to another register to stabilize it. We do not need
4098 to do this if we know that we won't be changing sp. */
4099
4100 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4101 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4102 temp = copy_to_reg (temp);
4103 }
4104
4105 target = gen_rtx_MEM (BLKmode, temp);
4106
4107 /* We do *not* set_mem_attributes here, because incoming arguments
4108 may overlap with sibling call outgoing arguments and we cannot
4109 allow reordering of reads from function arguments with stores
4110 to outgoing arguments of sibling calls. We do, however, want
4111 to record the alignment of the stack slot. */
4112 /* ALIGN may well be better aligned than TYPE, e.g. due to
4113 PARM_BOUNDARY. Assume the caller isn't lying. */
4114 set_mem_align (target, align);
4115
4116 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4117 }
4118 }
4119 else if (partial > 0)
4120 {
4121 /* Scalar partly in registers. */
4122
4123 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4124 int i;
4125 int not_stack;
4126 /* # bytes of start of argument
4127 that we must make space for but need not store. */
4128 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4129 int args_offset = INTVAL (args_so_far);
4130 int skip;
4131
4132 /* Push padding now if padding above and stack grows down,
4133 or if padding below and stack grows up.
4134 But if space already allocated, this has already been done. */
4135 if (extra && args_addr == 0
4136 && where_pad != none && where_pad != stack_direction)
4137 anti_adjust_stack (GEN_INT (extra));
4138
4139 /* If we make space by pushing it, we might as well push
4140 the real data. Otherwise, we can leave OFFSET nonzero
4141 and leave the space uninitialized. */
4142 if (args_addr == 0)
4143 offset = 0;
4144
4145 /* Now NOT_STACK gets the number of words that we don't need to
4146 allocate on the stack. Convert OFFSET to words too. */
4147 not_stack = (partial - offset) / UNITS_PER_WORD;
4148 offset /= UNITS_PER_WORD;
4149
4150 /* If the partial register-part of the arg counts in its stack size,
4151 skip the part of stack space corresponding to the registers.
4152 Otherwise, start copying to the beginning of the stack space,
4153 by setting SKIP to 0. */
4154 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4155
4156 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4157 x = validize_mem (force_const_mem (mode, x));
4158
4159 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4160 SUBREGs of such registers are not allowed. */
4161 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4162 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4163 x = copy_to_reg (x);
4164
4165 /* Loop over all the words allocated on the stack for this arg. */
4166 /* We can do it by words, because any scalar bigger than a word
4167 has a size a multiple of a word. */
4168 #ifndef PUSH_ARGS_REVERSED
4169 for (i = not_stack; i < size; i++)
4170 #else
4171 for (i = size - 1; i >= not_stack; i--)
4172 #endif
4173 if (i >= not_stack + offset)
4174 emit_push_insn (operand_subword_force (x, i, mode),
4175 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4176 0, args_addr,
4177 GEN_INT (args_offset + ((i - not_stack + skip)
4178 * UNITS_PER_WORD)),
4179 reg_parm_stack_space, alignment_pad);
4180 }
4181 else
4182 {
4183 rtx addr;
4184 rtx dest;
4185
4186 /* Push padding now if padding above and stack grows down,
4187 or if padding below and stack grows up.
4188 But if space already allocated, this has already been done. */
4189 if (extra && args_addr == 0
4190 && where_pad != none && where_pad != stack_direction)
4191 anti_adjust_stack (GEN_INT (extra));
4192
4193 #ifdef PUSH_ROUNDING
4194 if (args_addr == 0 && PUSH_ARGS)
4195 emit_single_push_insn (mode, x, type);
4196 else
4197 #endif
4198 {
4199 if (CONST_INT_P (args_so_far))
4200 addr
4201 = memory_address (mode,
4202 plus_constant (args_addr,
4203 INTVAL (args_so_far)));
4204 else
4205 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4206 args_so_far));
4207 dest = gen_rtx_MEM (mode, addr);
4208
4209 /* We do *not* set_mem_attributes here, because incoming arguments
4210 may overlap with sibling call outgoing arguments and we cannot
4211 allow reordering of reads from function arguments with stores
4212 to outgoing arguments of sibling calls. We do, however, want
4213 to record the alignment of the stack slot. */
4214 /* ALIGN may well be better aligned than TYPE, e.g. due to
4215 PARM_BOUNDARY. Assume the caller isn't lying. */
4216 set_mem_align (dest, align);
4217
4218 emit_move_insn (dest, x);
4219 }
4220 }
4221
4222 /* If part should go in registers, copy that part
4223 into the appropriate registers. Do this now, at the end,
4224 since mem-to-mem copies above may do function calls. */
4225 if (partial > 0 && reg != 0)
4226 {
4227 /* Handle calls that pass values in multiple non-contiguous locations.
4228 The Irix 6 ABI has examples of this. */
4229 if (GET_CODE (reg) == PARALLEL)
4230 emit_group_load (reg, x, type, -1);
4231 else
4232 {
4233 gcc_assert (partial % UNITS_PER_WORD == 0);
4234 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4235 }
4236 }
4237
4238 if (extra && args_addr == 0 && where_pad == stack_direction)
4239 anti_adjust_stack (GEN_INT (extra));
4240
4241 if (alignment_pad && args_addr == 0)
4242 anti_adjust_stack (alignment_pad);
4243 }
4244 \f
4245 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4246 operations. */
4247
4248 static rtx
4249 get_subtarget (rtx x)
4250 {
4251 return (optimize
4252 || x == 0
4253 /* Only registers can be subtargets. */
4254 || !REG_P (x)
4255 /* Don't use hard regs to avoid extending their life. */
4256 || REGNO (x) < FIRST_PSEUDO_REGISTER
4257 ? 0 : x);
4258 }
4259
4260 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4261 FIELD is a bitfield. Returns true if the optimization was successful,
4262 and there's nothing else to do. */
4263
4264 static bool
4265 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4266 unsigned HOST_WIDE_INT bitpos,
4267 unsigned HOST_WIDE_INT bitregion_start,
4268 unsigned HOST_WIDE_INT bitregion_end,
4269 enum machine_mode mode1, rtx str_rtx,
4270 tree to, tree src)
4271 {
4272 enum machine_mode str_mode = GET_MODE (str_rtx);
4273 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4274 tree op0, op1;
4275 rtx value, result;
4276 optab binop;
4277 gimple srcstmt;
4278 enum tree_code code;
4279
4280 if (mode1 != VOIDmode
4281 || bitsize >= BITS_PER_WORD
4282 || str_bitsize > BITS_PER_WORD
4283 || TREE_SIDE_EFFECTS (to)
4284 || TREE_THIS_VOLATILE (to))
4285 return false;
4286
4287 STRIP_NOPS (src);
4288 if (TREE_CODE (src) != SSA_NAME)
4289 return false;
4290 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4291 return false;
4292
4293 srcstmt = get_gimple_for_ssa_name (src);
4294 if (!srcstmt
4295 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4296 return false;
4297
4298 code = gimple_assign_rhs_code (srcstmt);
4299
4300 op0 = gimple_assign_rhs1 (srcstmt);
4301
4302 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4303 to find its initialization. Hopefully the initialization will
4304 be from a bitfield load. */
4305 if (TREE_CODE (op0) == SSA_NAME)
4306 {
4307 gimple op0stmt = get_gimple_for_ssa_name (op0);
4308
4309 /* We want to eventually have OP0 be the same as TO, which
4310 should be a bitfield. */
4311 if (!op0stmt
4312 || !is_gimple_assign (op0stmt)
4313 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4314 return false;
4315 op0 = gimple_assign_rhs1 (op0stmt);
4316 }
4317
4318 op1 = gimple_assign_rhs2 (srcstmt);
4319
4320 if (!operand_equal_p (to, op0, 0))
4321 return false;
4322
4323 if (MEM_P (str_rtx))
4324 {
4325 unsigned HOST_WIDE_INT offset1;
4326
4327 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4328 str_mode = word_mode;
4329 str_mode = get_best_mode (bitsize, bitpos,
4330 bitregion_start, bitregion_end,
4331 MEM_ALIGN (str_rtx), str_mode, 0);
4332 if (str_mode == VOIDmode)
4333 return false;
4334 str_bitsize = GET_MODE_BITSIZE (str_mode);
4335
4336 offset1 = bitpos;
4337 bitpos %= str_bitsize;
4338 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4339 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4340 }
4341 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4342 return false;
4343
4344 /* If the bit field covers the whole REG/MEM, store_field
4345 will likely generate better code. */
4346 if (bitsize >= str_bitsize)
4347 return false;
4348
4349 /* We can't handle fields split across multiple entities. */
4350 if (bitpos + bitsize > str_bitsize)
4351 return false;
4352
4353 if (BYTES_BIG_ENDIAN)
4354 bitpos = str_bitsize - bitpos - bitsize;
4355
4356 switch (code)
4357 {
4358 case PLUS_EXPR:
4359 case MINUS_EXPR:
4360 /* For now, just optimize the case of the topmost bitfield
4361 where we don't need to do any masking and also
4362 1 bit bitfields where xor can be used.
4363 We might win by one instruction for the other bitfields
4364 too if insv/extv instructions aren't used, so that
4365 can be added later. */
4366 if (bitpos + bitsize != str_bitsize
4367 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4368 break;
4369
4370 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4371 value = convert_modes (str_mode,
4372 TYPE_MODE (TREE_TYPE (op1)), value,
4373 TYPE_UNSIGNED (TREE_TYPE (op1)));
4374
4375 /* We may be accessing data outside the field, which means
4376 we can alias adjacent data. */
4377 if (MEM_P (str_rtx))
4378 {
4379 str_rtx = shallow_copy_rtx (str_rtx);
4380 set_mem_alias_set (str_rtx, 0);
4381 set_mem_expr (str_rtx, 0);
4382 }
4383
4384 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4385 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4386 {
4387 value = expand_and (str_mode, value, const1_rtx, NULL);
4388 binop = xor_optab;
4389 }
4390 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4391 bitpos, NULL_RTX, 1);
4392 result = expand_binop (str_mode, binop, str_rtx,
4393 value, str_rtx, 1, OPTAB_WIDEN);
4394 if (result != str_rtx)
4395 emit_move_insn (str_rtx, result);
4396 return true;
4397
4398 case BIT_IOR_EXPR:
4399 case BIT_XOR_EXPR:
4400 if (TREE_CODE (op1) != INTEGER_CST)
4401 break;
4402 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4403 value = convert_modes (GET_MODE (str_rtx),
4404 TYPE_MODE (TREE_TYPE (op1)), value,
4405 TYPE_UNSIGNED (TREE_TYPE (op1)));
4406
4407 /* We may be accessing data outside the field, which means
4408 we can alias adjacent data. */
4409 if (MEM_P (str_rtx))
4410 {
4411 str_rtx = shallow_copy_rtx (str_rtx);
4412 set_mem_alias_set (str_rtx, 0);
4413 set_mem_expr (str_rtx, 0);
4414 }
4415
4416 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4417 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4418 {
4419 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4420 - 1);
4421 value = expand_and (GET_MODE (str_rtx), value, mask,
4422 NULL_RTX);
4423 }
4424 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4425 bitpos, NULL_RTX, 1);
4426 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4427 value, str_rtx, 1, OPTAB_WIDEN);
4428 if (result != str_rtx)
4429 emit_move_insn (str_rtx, result);
4430 return true;
4431
4432 default:
4433 break;
4434 }
4435
4436 return false;
4437 }
4438
4439 /* In the C++ memory model, consecutive bit fields in a structure are
4440 considered one memory location.
4441
4442 Given a COMPONENT_REF EXP at bit position BITPOS, this function
4443 returns the bit range of consecutive bits in which this COMPONENT_REF
4444 belongs in. The values are returned in *BITSTART and *BITEND.
4445 If the access does not need to be restricted 0 is returned in
4446 *BITSTART and *BITEND. */
4447
4448 static void
4449 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4450 unsigned HOST_WIDE_INT *bitend,
4451 tree exp,
4452 HOST_WIDE_INT bitpos)
4453 {
4454 unsigned HOST_WIDE_INT bitoffset;
4455 tree field, repr, offset;
4456
4457 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4458
4459 field = TREE_OPERAND (exp, 1);
4460 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4461 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4462 need to limit the range we can access. */
4463 if (!repr)
4464 {
4465 *bitstart = *bitend = 0;
4466 return;
4467 }
4468
4469 /* Compute the adjustment to bitpos from the offset of the field
4470 relative to the representative. */
4471 offset = size_diffop (DECL_FIELD_OFFSET (field),
4472 DECL_FIELD_OFFSET (repr));
4473 bitoffset = (tree_low_cst (offset, 1) * BITS_PER_UNIT
4474 + tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
4475 - tree_low_cst (DECL_FIELD_BIT_OFFSET (repr), 1));
4476
4477 *bitstart = bitpos - bitoffset;
4478 *bitend = *bitstart + tree_low_cst (DECL_SIZE (repr), 1) - 1;
4479 }
4480
4481 /* Returns true if the MEM_REF REF refers to an object that does not
4482 reside in memory and has non-BLKmode. */
4483
4484 static bool
4485 mem_ref_refers_to_non_mem_p (tree ref)
4486 {
4487 tree base = TREE_OPERAND (ref, 0);
4488 if (TREE_CODE (base) != ADDR_EXPR)
4489 return false;
4490 base = TREE_OPERAND (base, 0);
4491 return (DECL_P (base)
4492 && !TREE_ADDRESSABLE (base)
4493 && DECL_MODE (base) != BLKmode
4494 && DECL_RTL_SET_P (base)
4495 && !MEM_P (DECL_RTL (base)));
4496 }
4497
4498 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4499 is true, try generating a nontemporal store. */
4500
4501 void
4502 expand_assignment (tree to, tree from, bool nontemporal)
4503 {
4504 rtx to_rtx = 0;
4505 rtx result;
4506 enum machine_mode mode;
4507 unsigned int align;
4508 enum insn_code icode;
4509
4510 /* Don't crash if the lhs of the assignment was erroneous. */
4511 if (TREE_CODE (to) == ERROR_MARK)
4512 {
4513 expand_normal (from);
4514 return;
4515 }
4516
4517 /* Optimize away no-op moves without side-effects. */
4518 if (operand_equal_p (to, from, 0))
4519 return;
4520
4521 /* Handle misaligned stores. */
4522 mode = TYPE_MODE (TREE_TYPE (to));
4523 if ((TREE_CODE (to) == MEM_REF
4524 || TREE_CODE (to) == TARGET_MEM_REF)
4525 && mode != BLKmode
4526 && !mem_ref_refers_to_non_mem_p (to)
4527 && ((align = get_object_or_type_alignment (to))
4528 < GET_MODE_ALIGNMENT (mode))
4529 && (((icode = optab_handler (movmisalign_optab, mode))
4530 != CODE_FOR_nothing)
4531 || SLOW_UNALIGNED_ACCESS (mode, align)))
4532 {
4533 rtx reg, mem;
4534
4535 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4536 reg = force_not_mem (reg);
4537 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4538
4539 if (icode != CODE_FOR_nothing)
4540 {
4541 struct expand_operand ops[2];
4542
4543 create_fixed_operand (&ops[0], mem);
4544 create_input_operand (&ops[1], reg, mode);
4545 /* The movmisalign<mode> pattern cannot fail, else the assignment
4546 would silently be omitted. */
4547 expand_insn (icode, 2, ops);
4548 }
4549 else
4550 store_bit_field (mem, GET_MODE_BITSIZE (mode),
4551 0, 0, 0, mode, reg);
4552 return;
4553 }
4554
4555 /* Assignment of a structure component needs special treatment
4556 if the structure component's rtx is not simply a MEM.
4557 Assignment of an array element at a constant index, and assignment of
4558 an array element in an unaligned packed structure field, has the same
4559 problem. Same for (partially) storing into a non-memory object. */
4560 if (handled_component_p (to)
4561 || (TREE_CODE (to) == MEM_REF
4562 && mem_ref_refers_to_non_mem_p (to))
4563 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4564 {
4565 enum machine_mode mode1;
4566 HOST_WIDE_INT bitsize, bitpos;
4567 unsigned HOST_WIDE_INT bitregion_start = 0;
4568 unsigned HOST_WIDE_INT bitregion_end = 0;
4569 tree offset;
4570 int unsignedp;
4571 int volatilep = 0;
4572 tree tem;
4573 bool misalignp;
4574 rtx mem = NULL_RTX;
4575
4576 push_temp_slots ();
4577 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4578 &unsignedp, &volatilep, true);
4579
4580 if (TREE_CODE (to) == COMPONENT_REF
4581 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4582 get_bit_range (&bitregion_start, &bitregion_end, to, bitpos);
4583
4584 /* If we are going to use store_bit_field and extract_bit_field,
4585 make sure to_rtx will be safe for multiple use. */
4586 mode = TYPE_MODE (TREE_TYPE (tem));
4587 if (TREE_CODE (tem) == MEM_REF
4588 && mode != BLKmode
4589 && ((align = get_object_or_type_alignment (tem))
4590 < GET_MODE_ALIGNMENT (mode))
4591 && ((icode = optab_handler (movmisalign_optab, mode))
4592 != CODE_FOR_nothing))
4593 {
4594 struct expand_operand ops[2];
4595
4596 misalignp = true;
4597 to_rtx = gen_reg_rtx (mode);
4598 mem = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4599
4600 /* If the misaligned store doesn't overwrite all bits, perform
4601 rmw cycle on MEM. */
4602 if (bitsize != GET_MODE_BITSIZE (mode))
4603 {
4604 create_input_operand (&ops[0], to_rtx, mode);
4605 create_fixed_operand (&ops[1], mem);
4606 /* The movmisalign<mode> pattern cannot fail, else the assignment
4607 would silently be omitted. */
4608 expand_insn (icode, 2, ops);
4609
4610 mem = copy_rtx (mem);
4611 }
4612 }
4613 else
4614 {
4615 misalignp = false;
4616 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4617 }
4618
4619 /* If the bitfield is volatile, we want to access it in the
4620 field's mode, not the computed mode.
4621 If a MEM has VOIDmode (external with incomplete type),
4622 use BLKmode for it instead. */
4623 if (MEM_P (to_rtx))
4624 {
4625 if (volatilep && flag_strict_volatile_bitfields > 0)
4626 to_rtx = adjust_address (to_rtx, mode1, 0);
4627 else if (GET_MODE (to_rtx) == VOIDmode)
4628 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4629 }
4630
4631 if (offset != 0)
4632 {
4633 enum machine_mode address_mode;
4634 rtx offset_rtx;
4635
4636 if (!MEM_P (to_rtx))
4637 {
4638 /* We can get constant negative offsets into arrays with broken
4639 user code. Translate this to a trap instead of ICEing. */
4640 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4641 expand_builtin_trap ();
4642 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4643 }
4644
4645 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4646 address_mode
4647 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4648 if (GET_MODE (offset_rtx) != address_mode)
4649 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4650
4651 /* A constant address in TO_RTX can have VOIDmode, we must not try
4652 to call force_reg for that case. Avoid that case. */
4653 if (MEM_P (to_rtx)
4654 && GET_MODE (to_rtx) == BLKmode
4655 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4656 && bitsize > 0
4657 && (bitpos % bitsize) == 0
4658 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4659 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4660 {
4661 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4662 bitpos = 0;
4663 }
4664
4665 to_rtx = offset_address (to_rtx, offset_rtx,
4666 highest_pow2_factor_for_target (to,
4667 offset));
4668 }
4669
4670 /* No action is needed if the target is not a memory and the field
4671 lies completely outside that target. This can occur if the source
4672 code contains an out-of-bounds access to a small array. */
4673 if (!MEM_P (to_rtx)
4674 && GET_MODE (to_rtx) != BLKmode
4675 && (unsigned HOST_WIDE_INT) bitpos
4676 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4677 {
4678 expand_normal (from);
4679 result = NULL;
4680 }
4681 /* Handle expand_expr of a complex value returning a CONCAT. */
4682 else if (GET_CODE (to_rtx) == CONCAT)
4683 {
4684 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4685 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4686 && bitpos == 0
4687 && bitsize == mode_bitsize)
4688 result = store_expr (from, to_rtx, false, nontemporal);
4689 else if (bitsize == mode_bitsize / 2
4690 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4691 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4692 nontemporal);
4693 else if (bitpos + bitsize <= mode_bitsize / 2)
4694 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4695 bitregion_start, bitregion_end,
4696 mode1, from, TREE_TYPE (tem),
4697 get_alias_set (to), nontemporal);
4698 else if (bitpos >= mode_bitsize / 2)
4699 result = store_field (XEXP (to_rtx, 1), bitsize,
4700 bitpos - mode_bitsize / 2,
4701 bitregion_start, bitregion_end,
4702 mode1, from,
4703 TREE_TYPE (tem), get_alias_set (to),
4704 nontemporal);
4705 else if (bitpos == 0 && bitsize == mode_bitsize)
4706 {
4707 rtx from_rtx;
4708 result = expand_normal (from);
4709 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4710 TYPE_MODE (TREE_TYPE (from)), 0);
4711 emit_move_insn (XEXP (to_rtx, 0),
4712 read_complex_part (from_rtx, false));
4713 emit_move_insn (XEXP (to_rtx, 1),
4714 read_complex_part (from_rtx, true));
4715 }
4716 else
4717 {
4718 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4719 GET_MODE_SIZE (GET_MODE (to_rtx)),
4720 0);
4721 write_complex_part (temp, XEXP (to_rtx, 0), false);
4722 write_complex_part (temp, XEXP (to_rtx, 1), true);
4723 result = store_field (temp, bitsize, bitpos,
4724 bitregion_start, bitregion_end,
4725 mode1, from,
4726 TREE_TYPE (tem), get_alias_set (to),
4727 nontemporal);
4728 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4729 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4730 }
4731 }
4732 else
4733 {
4734 if (MEM_P (to_rtx))
4735 {
4736 /* If the field is at offset zero, we could have been given the
4737 DECL_RTX of the parent struct. Don't munge it. */
4738 to_rtx = shallow_copy_rtx (to_rtx);
4739
4740 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4741
4742 /* Deal with volatile and readonly fields. The former is only
4743 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4744 if (volatilep)
4745 MEM_VOLATILE_P (to_rtx) = 1;
4746 if (component_uses_parent_alias_set (to))
4747 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4748 }
4749
4750 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4751 bitregion_start, bitregion_end,
4752 mode1,
4753 to_rtx, to, from))
4754 result = NULL;
4755 else
4756 result = store_field (to_rtx, bitsize, bitpos,
4757 bitregion_start, bitregion_end,
4758 mode1, from,
4759 TREE_TYPE (tem), get_alias_set (to),
4760 nontemporal);
4761 }
4762
4763 if (misalignp)
4764 {
4765 struct expand_operand ops[2];
4766
4767 create_fixed_operand (&ops[0], mem);
4768 create_input_operand (&ops[1], to_rtx, mode);
4769 /* The movmisalign<mode> pattern cannot fail, else the assignment
4770 would silently be omitted. */
4771 expand_insn (icode, 2, ops);
4772 }
4773
4774 if (result)
4775 preserve_temp_slots (result);
4776 free_temp_slots ();
4777 pop_temp_slots ();
4778 return;
4779 }
4780
4781 /* If the rhs is a function call and its value is not an aggregate,
4782 call the function before we start to compute the lhs.
4783 This is needed for correct code for cases such as
4784 val = setjmp (buf) on machines where reference to val
4785 requires loading up part of an address in a separate insn.
4786
4787 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4788 since it might be a promoted variable where the zero- or sign- extension
4789 needs to be done. Handling this in the normal way is safe because no
4790 computation is done before the call. The same is true for SSA names. */
4791 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4792 && COMPLETE_TYPE_P (TREE_TYPE (from))
4793 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4794 && ! (((TREE_CODE (to) == VAR_DECL
4795 || TREE_CODE (to) == PARM_DECL
4796 || TREE_CODE (to) == RESULT_DECL)
4797 && REG_P (DECL_RTL (to)))
4798 || TREE_CODE (to) == SSA_NAME))
4799 {
4800 rtx value;
4801
4802 push_temp_slots ();
4803 value = expand_normal (from);
4804 if (to_rtx == 0)
4805 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4806
4807 /* Handle calls that return values in multiple non-contiguous locations.
4808 The Irix 6 ABI has examples of this. */
4809 if (GET_CODE (to_rtx) == PARALLEL)
4810 emit_group_load (to_rtx, value, TREE_TYPE (from),
4811 int_size_in_bytes (TREE_TYPE (from)));
4812 else if (GET_MODE (to_rtx) == BLKmode)
4813 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4814 else
4815 {
4816 if (POINTER_TYPE_P (TREE_TYPE (to)))
4817 value = convert_memory_address_addr_space
4818 (GET_MODE (to_rtx), value,
4819 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4820
4821 emit_move_insn (to_rtx, value);
4822 }
4823 preserve_temp_slots (to_rtx);
4824 free_temp_slots ();
4825 pop_temp_slots ();
4826 return;
4827 }
4828
4829 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
4830 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4831
4832 /* Don't move directly into a return register. */
4833 if (TREE_CODE (to) == RESULT_DECL
4834 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4835 {
4836 rtx temp;
4837
4838 push_temp_slots ();
4839 if (REG_P (to_rtx) && TYPE_MODE (TREE_TYPE (from)) == BLKmode)
4840 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
4841 else
4842 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4843
4844 if (GET_CODE (to_rtx) == PARALLEL)
4845 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4846 int_size_in_bytes (TREE_TYPE (from)));
4847 else if (temp)
4848 emit_move_insn (to_rtx, temp);
4849
4850 preserve_temp_slots (to_rtx);
4851 free_temp_slots ();
4852 pop_temp_slots ();
4853 return;
4854 }
4855
4856 /* In case we are returning the contents of an object which overlaps
4857 the place the value is being stored, use a safe function when copying
4858 a value through a pointer into a structure value return block. */
4859 if (TREE_CODE (to) == RESULT_DECL
4860 && TREE_CODE (from) == INDIRECT_REF
4861 && ADDR_SPACE_GENERIC_P
4862 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4863 && refs_may_alias_p (to, from)
4864 && cfun->returns_struct
4865 && !cfun->returns_pcc_struct)
4866 {
4867 rtx from_rtx, size;
4868
4869 push_temp_slots ();
4870 size = expr_size (from);
4871 from_rtx = expand_normal (from);
4872
4873 emit_library_call (memmove_libfunc, LCT_NORMAL,
4874 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4875 XEXP (from_rtx, 0), Pmode,
4876 convert_to_mode (TYPE_MODE (sizetype),
4877 size, TYPE_UNSIGNED (sizetype)),
4878 TYPE_MODE (sizetype));
4879
4880 preserve_temp_slots (to_rtx);
4881 free_temp_slots ();
4882 pop_temp_slots ();
4883 return;
4884 }
4885
4886 /* Compute FROM and store the value in the rtx we got. */
4887
4888 push_temp_slots ();
4889 result = store_expr (from, to_rtx, 0, nontemporal);
4890 preserve_temp_slots (result);
4891 free_temp_slots ();
4892 pop_temp_slots ();
4893 return;
4894 }
4895
4896 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4897 succeeded, false otherwise. */
4898
4899 bool
4900 emit_storent_insn (rtx to, rtx from)
4901 {
4902 struct expand_operand ops[2];
4903 enum machine_mode mode = GET_MODE (to);
4904 enum insn_code code = optab_handler (storent_optab, mode);
4905
4906 if (code == CODE_FOR_nothing)
4907 return false;
4908
4909 create_fixed_operand (&ops[0], to);
4910 create_input_operand (&ops[1], from, mode);
4911 return maybe_expand_insn (code, 2, ops);
4912 }
4913
4914 /* Generate code for computing expression EXP,
4915 and storing the value into TARGET.
4916
4917 If the mode is BLKmode then we may return TARGET itself.
4918 It turns out that in BLKmode it doesn't cause a problem.
4919 because C has no operators that could combine two different
4920 assignments into the same BLKmode object with different values
4921 with no sequence point. Will other languages need this to
4922 be more thorough?
4923
4924 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4925 stack, and block moves may need to be treated specially.
4926
4927 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4928
4929 rtx
4930 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4931 {
4932 rtx temp;
4933 rtx alt_rtl = NULL_RTX;
4934 location_t loc = EXPR_LOCATION (exp);
4935
4936 if (VOID_TYPE_P (TREE_TYPE (exp)))
4937 {
4938 /* C++ can generate ?: expressions with a throw expression in one
4939 branch and an rvalue in the other. Here, we resolve attempts to
4940 store the throw expression's nonexistent result. */
4941 gcc_assert (!call_param_p);
4942 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4943 return NULL_RTX;
4944 }
4945 if (TREE_CODE (exp) == COMPOUND_EXPR)
4946 {
4947 /* Perform first part of compound expression, then assign from second
4948 part. */
4949 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4950 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4951 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4952 nontemporal);
4953 }
4954 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4955 {
4956 /* For conditional expression, get safe form of the target. Then
4957 test the condition, doing the appropriate assignment on either
4958 side. This avoids the creation of unnecessary temporaries.
4959 For non-BLKmode, it is more efficient not to do this. */
4960
4961 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
4962
4963 do_pending_stack_adjust ();
4964 NO_DEFER_POP;
4965 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
4966 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4967 nontemporal);
4968 emit_jump_insn (gen_jump (lab2));
4969 emit_barrier ();
4970 emit_label (lab1);
4971 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
4972 nontemporal);
4973 emit_label (lab2);
4974 OK_DEFER_POP;
4975
4976 return NULL_RTX;
4977 }
4978 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
4979 /* If this is a scalar in a register that is stored in a wider mode
4980 than the declared mode, compute the result into its declared mode
4981 and then convert to the wider mode. Our value is the computed
4982 expression. */
4983 {
4984 rtx inner_target = 0;
4985
4986 /* We can do the conversion inside EXP, which will often result
4987 in some optimizations. Do the conversion in two steps: first
4988 change the signedness, if needed, then the extend. But don't
4989 do this if the type of EXP is a subtype of something else
4990 since then the conversion might involve more than just
4991 converting modes. */
4992 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
4993 && TREE_TYPE (TREE_TYPE (exp)) == 0
4994 && GET_MODE_PRECISION (GET_MODE (target))
4995 == TYPE_PRECISION (TREE_TYPE (exp)))
4996 {
4997 if (TYPE_UNSIGNED (TREE_TYPE (exp))
4998 != SUBREG_PROMOTED_UNSIGNED_P (target))
4999 {
5000 /* Some types, e.g. Fortran's logical*4, won't have a signed
5001 version, so use the mode instead. */
5002 tree ntype
5003 = (signed_or_unsigned_type_for
5004 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
5005 if (ntype == NULL)
5006 ntype = lang_hooks.types.type_for_mode
5007 (TYPE_MODE (TREE_TYPE (exp)),
5008 SUBREG_PROMOTED_UNSIGNED_P (target));
5009
5010 exp = fold_convert_loc (loc, ntype, exp);
5011 }
5012
5013 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5014 (GET_MODE (SUBREG_REG (target)),
5015 SUBREG_PROMOTED_UNSIGNED_P (target)),
5016 exp);
5017
5018 inner_target = SUBREG_REG (target);
5019 }
5020
5021 temp = expand_expr (exp, inner_target, VOIDmode,
5022 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5023
5024 /* If TEMP is a VOIDmode constant, use convert_modes to make
5025 sure that we properly convert it. */
5026 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5027 {
5028 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5029 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
5030 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5031 GET_MODE (target), temp,
5032 SUBREG_PROMOTED_UNSIGNED_P (target));
5033 }
5034
5035 convert_move (SUBREG_REG (target), temp,
5036 SUBREG_PROMOTED_UNSIGNED_P (target));
5037
5038 return NULL_RTX;
5039 }
5040 else if ((TREE_CODE (exp) == STRING_CST
5041 || (TREE_CODE (exp) == MEM_REF
5042 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5043 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5044 == STRING_CST
5045 && integer_zerop (TREE_OPERAND (exp, 1))))
5046 && !nontemporal && !call_param_p
5047 && MEM_P (target))
5048 {
5049 /* Optimize initialization of an array with a STRING_CST. */
5050 HOST_WIDE_INT exp_len, str_copy_len;
5051 rtx dest_mem;
5052 tree str = TREE_CODE (exp) == STRING_CST
5053 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5054
5055 exp_len = int_expr_size (exp);
5056 if (exp_len <= 0)
5057 goto normal_expr;
5058
5059 if (TREE_STRING_LENGTH (str) <= 0)
5060 goto normal_expr;
5061
5062 str_copy_len = strlen (TREE_STRING_POINTER (str));
5063 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5064 goto normal_expr;
5065
5066 str_copy_len = TREE_STRING_LENGTH (str);
5067 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5068 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5069 {
5070 str_copy_len += STORE_MAX_PIECES - 1;
5071 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5072 }
5073 str_copy_len = MIN (str_copy_len, exp_len);
5074 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5075 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5076 MEM_ALIGN (target), false))
5077 goto normal_expr;
5078
5079 dest_mem = target;
5080
5081 dest_mem = store_by_pieces (dest_mem,
5082 str_copy_len, builtin_strncpy_read_str,
5083 CONST_CAST (char *,
5084 TREE_STRING_POINTER (str)),
5085 MEM_ALIGN (target), false,
5086 exp_len > str_copy_len ? 1 : 0);
5087 if (exp_len > str_copy_len)
5088 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5089 GEN_INT (exp_len - str_copy_len),
5090 BLOCK_OP_NORMAL);
5091 return NULL_RTX;
5092 }
5093 else
5094 {
5095 rtx tmp_target;
5096
5097 normal_expr:
5098 /* If we want to use a nontemporal store, force the value to
5099 register first. */
5100 tmp_target = nontemporal ? NULL_RTX : target;
5101 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5102 (call_param_p
5103 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5104 &alt_rtl);
5105 }
5106
5107 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5108 the same as that of TARGET, adjust the constant. This is needed, for
5109 example, in case it is a CONST_DOUBLE and we want only a word-sized
5110 value. */
5111 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5112 && TREE_CODE (exp) != ERROR_MARK
5113 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5114 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5115 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5116
5117 /* If value was not generated in the target, store it there.
5118 Convert the value to TARGET's type first if necessary and emit the
5119 pending incrementations that have been queued when expanding EXP.
5120 Note that we cannot emit the whole queue blindly because this will
5121 effectively disable the POST_INC optimization later.
5122
5123 If TEMP and TARGET compare equal according to rtx_equal_p, but
5124 one or both of them are volatile memory refs, we have to distinguish
5125 two cases:
5126 - expand_expr has used TARGET. In this case, we must not generate
5127 another copy. This can be detected by TARGET being equal according
5128 to == .
5129 - expand_expr has not used TARGET - that means that the source just
5130 happens to have the same RTX form. Since temp will have been created
5131 by expand_expr, it will compare unequal according to == .
5132 We must generate a copy in this case, to reach the correct number
5133 of volatile memory references. */
5134
5135 if ((! rtx_equal_p (temp, target)
5136 || (temp != target && (side_effects_p (temp)
5137 || side_effects_p (target))))
5138 && TREE_CODE (exp) != ERROR_MARK
5139 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5140 but TARGET is not valid memory reference, TEMP will differ
5141 from TARGET although it is really the same location. */
5142 && !(alt_rtl
5143 && rtx_equal_p (alt_rtl, target)
5144 && !side_effects_p (alt_rtl)
5145 && !side_effects_p (target))
5146 /* If there's nothing to copy, don't bother. Don't call
5147 expr_size unless necessary, because some front-ends (C++)
5148 expr_size-hook must not be given objects that are not
5149 supposed to be bit-copied or bit-initialized. */
5150 && expr_size (exp) != const0_rtx)
5151 {
5152 if (GET_MODE (temp) != GET_MODE (target)
5153 && GET_MODE (temp) != VOIDmode)
5154 {
5155 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5156 if (GET_MODE (target) == BLKmode
5157 && GET_MODE (temp) == BLKmode)
5158 emit_block_move (target, temp, expr_size (exp),
5159 (call_param_p
5160 ? BLOCK_OP_CALL_PARM
5161 : BLOCK_OP_NORMAL));
5162 else if (GET_MODE (target) == BLKmode)
5163 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5164 0, 0, 0, GET_MODE (temp), temp);
5165 else
5166 convert_move (target, temp, unsignedp);
5167 }
5168
5169 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5170 {
5171 /* Handle copying a string constant into an array. The string
5172 constant may be shorter than the array. So copy just the string's
5173 actual length, and clear the rest. First get the size of the data
5174 type of the string, which is actually the size of the target. */
5175 rtx size = expr_size (exp);
5176
5177 if (CONST_INT_P (size)
5178 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5179 emit_block_move (target, temp, size,
5180 (call_param_p
5181 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5182 else
5183 {
5184 enum machine_mode pointer_mode
5185 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5186 enum machine_mode address_mode
5187 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
5188
5189 /* Compute the size of the data to copy from the string. */
5190 tree copy_size
5191 = size_binop_loc (loc, MIN_EXPR,
5192 make_tree (sizetype, size),
5193 size_int (TREE_STRING_LENGTH (exp)));
5194 rtx copy_size_rtx
5195 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5196 (call_param_p
5197 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5198 rtx label = 0;
5199
5200 /* Copy that much. */
5201 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5202 TYPE_UNSIGNED (sizetype));
5203 emit_block_move (target, temp, copy_size_rtx,
5204 (call_param_p
5205 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5206
5207 /* Figure out how much is left in TARGET that we have to clear.
5208 Do all calculations in pointer_mode. */
5209 if (CONST_INT_P (copy_size_rtx))
5210 {
5211 size = plus_constant (size, -INTVAL (copy_size_rtx));
5212 target = adjust_address (target, BLKmode,
5213 INTVAL (copy_size_rtx));
5214 }
5215 else
5216 {
5217 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5218 copy_size_rtx, NULL_RTX, 0,
5219 OPTAB_LIB_WIDEN);
5220
5221 if (GET_MODE (copy_size_rtx) != address_mode)
5222 copy_size_rtx = convert_to_mode (address_mode,
5223 copy_size_rtx,
5224 TYPE_UNSIGNED (sizetype));
5225
5226 target = offset_address (target, copy_size_rtx,
5227 highest_pow2_factor (copy_size));
5228 label = gen_label_rtx ();
5229 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5230 GET_MODE (size), 0, label);
5231 }
5232
5233 if (size != const0_rtx)
5234 clear_storage (target, size, BLOCK_OP_NORMAL);
5235
5236 if (label)
5237 emit_label (label);
5238 }
5239 }
5240 /* Handle calls that return values in multiple non-contiguous locations.
5241 The Irix 6 ABI has examples of this. */
5242 else if (GET_CODE (target) == PARALLEL)
5243 emit_group_load (target, temp, TREE_TYPE (exp),
5244 int_size_in_bytes (TREE_TYPE (exp)));
5245 else if (GET_MODE (temp) == BLKmode)
5246 emit_block_move (target, temp, expr_size (exp),
5247 (call_param_p
5248 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5249 else if (nontemporal
5250 && emit_storent_insn (target, temp))
5251 /* If we managed to emit a nontemporal store, there is nothing else to
5252 do. */
5253 ;
5254 else
5255 {
5256 temp = force_operand (temp, target);
5257 if (temp != target)
5258 emit_move_insn (target, temp);
5259 }
5260 }
5261
5262 return NULL_RTX;
5263 }
5264 \f
5265 /* Return true if field F of structure TYPE is a flexible array. */
5266
5267 static bool
5268 flexible_array_member_p (const_tree f, const_tree type)
5269 {
5270 const_tree tf;
5271
5272 tf = TREE_TYPE (f);
5273 return (DECL_CHAIN (f) == NULL
5274 && TREE_CODE (tf) == ARRAY_TYPE
5275 && TYPE_DOMAIN (tf)
5276 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5277 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5278 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5279 && int_size_in_bytes (type) >= 0);
5280 }
5281
5282 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5283 must have in order for it to completely initialize a value of type TYPE.
5284 Return -1 if the number isn't known.
5285
5286 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5287
5288 static HOST_WIDE_INT
5289 count_type_elements (const_tree type, bool for_ctor_p)
5290 {
5291 switch (TREE_CODE (type))
5292 {
5293 case ARRAY_TYPE:
5294 {
5295 tree nelts;
5296
5297 nelts = array_type_nelts (type);
5298 if (nelts && host_integerp (nelts, 1))
5299 {
5300 unsigned HOST_WIDE_INT n;
5301
5302 n = tree_low_cst (nelts, 1) + 1;
5303 if (n == 0 || for_ctor_p)
5304 return n;
5305 else
5306 return n * count_type_elements (TREE_TYPE (type), false);
5307 }
5308 return for_ctor_p ? -1 : 1;
5309 }
5310
5311 case RECORD_TYPE:
5312 {
5313 unsigned HOST_WIDE_INT n;
5314 tree f;
5315
5316 n = 0;
5317 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5318 if (TREE_CODE (f) == FIELD_DECL)
5319 {
5320 if (!for_ctor_p)
5321 n += count_type_elements (TREE_TYPE (f), false);
5322 else if (!flexible_array_member_p (f, type))
5323 /* Don't count flexible arrays, which are not supposed
5324 to be initialized. */
5325 n += 1;
5326 }
5327
5328 return n;
5329 }
5330
5331 case UNION_TYPE:
5332 case QUAL_UNION_TYPE:
5333 {
5334 tree f;
5335 HOST_WIDE_INT n, m;
5336
5337 gcc_assert (!for_ctor_p);
5338 /* Estimate the number of scalars in each field and pick the
5339 maximum. Other estimates would do instead; the idea is simply
5340 to make sure that the estimate is not sensitive to the ordering
5341 of the fields. */
5342 n = 1;
5343 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5344 if (TREE_CODE (f) == FIELD_DECL)
5345 {
5346 m = count_type_elements (TREE_TYPE (f), false);
5347 /* If the field doesn't span the whole union, add an extra
5348 scalar for the rest. */
5349 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5350 TYPE_SIZE (type)) != 1)
5351 m++;
5352 if (n < m)
5353 n = m;
5354 }
5355 return n;
5356 }
5357
5358 case COMPLEX_TYPE:
5359 return 2;
5360
5361 case VECTOR_TYPE:
5362 return TYPE_VECTOR_SUBPARTS (type);
5363
5364 case INTEGER_TYPE:
5365 case REAL_TYPE:
5366 case FIXED_POINT_TYPE:
5367 case ENUMERAL_TYPE:
5368 case BOOLEAN_TYPE:
5369 case POINTER_TYPE:
5370 case OFFSET_TYPE:
5371 case REFERENCE_TYPE:
5372 case NULLPTR_TYPE:
5373 return 1;
5374
5375 case ERROR_MARK:
5376 return 0;
5377
5378 case VOID_TYPE:
5379 case METHOD_TYPE:
5380 case FUNCTION_TYPE:
5381 case LANG_TYPE:
5382 default:
5383 gcc_unreachable ();
5384 }
5385 }
5386
5387 /* Helper for categorize_ctor_elements. Identical interface. */
5388
5389 static bool
5390 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5391 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5392 {
5393 unsigned HOST_WIDE_INT idx;
5394 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5395 tree value, purpose, elt_type;
5396
5397 /* Whether CTOR is a valid constant initializer, in accordance with what
5398 initializer_constant_valid_p does. If inferred from the constructor
5399 elements, true until proven otherwise. */
5400 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5401 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5402
5403 nz_elts = 0;
5404 init_elts = 0;
5405 num_fields = 0;
5406 elt_type = NULL_TREE;
5407
5408 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5409 {
5410 HOST_WIDE_INT mult = 1;
5411
5412 if (TREE_CODE (purpose) == RANGE_EXPR)
5413 {
5414 tree lo_index = TREE_OPERAND (purpose, 0);
5415 tree hi_index = TREE_OPERAND (purpose, 1);
5416
5417 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5418 mult = (tree_low_cst (hi_index, 1)
5419 - tree_low_cst (lo_index, 1) + 1);
5420 }
5421 num_fields += mult;
5422 elt_type = TREE_TYPE (value);
5423
5424 switch (TREE_CODE (value))
5425 {
5426 case CONSTRUCTOR:
5427 {
5428 HOST_WIDE_INT nz = 0, ic = 0;
5429
5430 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5431 p_complete);
5432
5433 nz_elts += mult * nz;
5434 init_elts += mult * ic;
5435
5436 if (const_from_elts_p && const_p)
5437 const_p = const_elt_p;
5438 }
5439 break;
5440
5441 case INTEGER_CST:
5442 case REAL_CST:
5443 case FIXED_CST:
5444 if (!initializer_zerop (value))
5445 nz_elts += mult;
5446 init_elts += mult;
5447 break;
5448
5449 case STRING_CST:
5450 nz_elts += mult * TREE_STRING_LENGTH (value);
5451 init_elts += mult * TREE_STRING_LENGTH (value);
5452 break;
5453
5454 case COMPLEX_CST:
5455 if (!initializer_zerop (TREE_REALPART (value)))
5456 nz_elts += mult;
5457 if (!initializer_zerop (TREE_IMAGPART (value)))
5458 nz_elts += mult;
5459 init_elts += mult;
5460 break;
5461
5462 case VECTOR_CST:
5463 {
5464 unsigned i;
5465 for (i = 0; i < VECTOR_CST_NELTS (value); ++i)
5466 {
5467 tree v = VECTOR_CST_ELT (value, i);
5468 if (!initializer_zerop (v))
5469 nz_elts += mult;
5470 init_elts += mult;
5471 }
5472 }
5473 break;
5474
5475 default:
5476 {
5477 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5478 nz_elts += mult * tc;
5479 init_elts += mult * tc;
5480
5481 if (const_from_elts_p && const_p)
5482 const_p = initializer_constant_valid_p (value, elt_type)
5483 != NULL_TREE;
5484 }
5485 break;
5486 }
5487 }
5488
5489 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5490 num_fields, elt_type))
5491 *p_complete = false;
5492
5493 *p_nz_elts += nz_elts;
5494 *p_init_elts += init_elts;
5495
5496 return const_p;
5497 }
5498
5499 /* Examine CTOR to discover:
5500 * how many scalar fields are set to nonzero values,
5501 and place it in *P_NZ_ELTS;
5502 * how many scalar fields in total are in CTOR,
5503 and place it in *P_ELT_COUNT.
5504 * whether the constructor is complete -- in the sense that every
5505 meaningful byte is explicitly given a value --
5506 and place it in *P_COMPLETE.
5507
5508 Return whether or not CTOR is a valid static constant initializer, the same
5509 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5510
5511 bool
5512 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5513 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5514 {
5515 *p_nz_elts = 0;
5516 *p_init_elts = 0;
5517 *p_complete = true;
5518
5519 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5520 }
5521
5522 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5523 of which had type LAST_TYPE. Each element was itself a complete
5524 initializer, in the sense that every meaningful byte was explicitly
5525 given a value. Return true if the same is true for the constructor
5526 as a whole. */
5527
5528 bool
5529 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5530 const_tree last_type)
5531 {
5532 if (TREE_CODE (type) == UNION_TYPE
5533 || TREE_CODE (type) == QUAL_UNION_TYPE)
5534 {
5535 if (num_elts == 0)
5536 return false;
5537
5538 gcc_assert (num_elts == 1 && last_type);
5539
5540 /* ??? We could look at each element of the union, and find the
5541 largest element. Which would avoid comparing the size of the
5542 initialized element against any tail padding in the union.
5543 Doesn't seem worth the effort... */
5544 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5545 }
5546
5547 return count_type_elements (type, true) == num_elts;
5548 }
5549
5550 /* Return 1 if EXP contains mostly (3/4) zeros. */
5551
5552 static int
5553 mostly_zeros_p (const_tree exp)
5554 {
5555 if (TREE_CODE (exp) == CONSTRUCTOR)
5556 {
5557 HOST_WIDE_INT nz_elts, init_elts;
5558 bool complete_p;
5559
5560 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5561 return !complete_p || nz_elts < init_elts / 4;
5562 }
5563
5564 return initializer_zerop (exp);
5565 }
5566
5567 /* Return 1 if EXP contains all zeros. */
5568
5569 static int
5570 all_zeros_p (const_tree exp)
5571 {
5572 if (TREE_CODE (exp) == CONSTRUCTOR)
5573 {
5574 HOST_WIDE_INT nz_elts, init_elts;
5575 bool complete_p;
5576
5577 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5578 return nz_elts == 0;
5579 }
5580
5581 return initializer_zerop (exp);
5582 }
5583 \f
5584 /* Helper function for store_constructor.
5585 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5586 TYPE is the type of the CONSTRUCTOR, not the element type.
5587 CLEARED is as for store_constructor.
5588 ALIAS_SET is the alias set to use for any stores.
5589
5590 This provides a recursive shortcut back to store_constructor when it isn't
5591 necessary to go through store_field. This is so that we can pass through
5592 the cleared field to let store_constructor know that we may not have to
5593 clear a substructure if the outer structure has already been cleared. */
5594
5595 static void
5596 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5597 HOST_WIDE_INT bitpos, enum machine_mode mode,
5598 tree exp, tree type, int cleared,
5599 alias_set_type alias_set)
5600 {
5601 if (TREE_CODE (exp) == CONSTRUCTOR
5602 /* We can only call store_constructor recursively if the size and
5603 bit position are on a byte boundary. */
5604 && bitpos % BITS_PER_UNIT == 0
5605 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5606 /* If we have a nonzero bitpos for a register target, then we just
5607 let store_field do the bitfield handling. This is unlikely to
5608 generate unnecessary clear instructions anyways. */
5609 && (bitpos == 0 || MEM_P (target)))
5610 {
5611 if (MEM_P (target))
5612 target
5613 = adjust_address (target,
5614 GET_MODE (target) == BLKmode
5615 || 0 != (bitpos
5616 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5617 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5618
5619
5620 /* Update the alias set, if required. */
5621 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5622 && MEM_ALIAS_SET (target) != 0)
5623 {
5624 target = copy_rtx (target);
5625 set_mem_alias_set (target, alias_set);
5626 }
5627
5628 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5629 }
5630 else
5631 store_field (target, bitsize, bitpos, 0, 0, mode, exp, type, alias_set,
5632 false);
5633 }
5634
5635 /* Store the value of constructor EXP into the rtx TARGET.
5636 TARGET is either a REG or a MEM; we know it cannot conflict, since
5637 safe_from_p has been called.
5638 CLEARED is true if TARGET is known to have been zero'd.
5639 SIZE is the number of bytes of TARGET we are allowed to modify: this
5640 may not be the same as the size of EXP if we are assigning to a field
5641 which has been packed to exclude padding bits. */
5642
5643 static void
5644 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5645 {
5646 tree type = TREE_TYPE (exp);
5647 #ifdef WORD_REGISTER_OPERATIONS
5648 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5649 #endif
5650
5651 switch (TREE_CODE (type))
5652 {
5653 case RECORD_TYPE:
5654 case UNION_TYPE:
5655 case QUAL_UNION_TYPE:
5656 {
5657 unsigned HOST_WIDE_INT idx;
5658 tree field, value;
5659
5660 /* If size is zero or the target is already cleared, do nothing. */
5661 if (size == 0 || cleared)
5662 cleared = 1;
5663 /* We either clear the aggregate or indicate the value is dead. */
5664 else if ((TREE_CODE (type) == UNION_TYPE
5665 || TREE_CODE (type) == QUAL_UNION_TYPE)
5666 && ! CONSTRUCTOR_ELTS (exp))
5667 /* If the constructor is empty, clear the union. */
5668 {
5669 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5670 cleared = 1;
5671 }
5672
5673 /* If we are building a static constructor into a register,
5674 set the initial value as zero so we can fold the value into
5675 a constant. But if more than one register is involved,
5676 this probably loses. */
5677 else if (REG_P (target) && TREE_STATIC (exp)
5678 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5679 {
5680 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5681 cleared = 1;
5682 }
5683
5684 /* If the constructor has fewer fields than the structure or
5685 if we are initializing the structure to mostly zeros, clear
5686 the whole structure first. Don't do this if TARGET is a
5687 register whose mode size isn't equal to SIZE since
5688 clear_storage can't handle this case. */
5689 else if (size > 0
5690 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5691 != fields_length (type))
5692 || mostly_zeros_p (exp))
5693 && (!REG_P (target)
5694 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5695 == size)))
5696 {
5697 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5698 cleared = 1;
5699 }
5700
5701 if (REG_P (target) && !cleared)
5702 emit_clobber (target);
5703
5704 /* Store each element of the constructor into the
5705 corresponding field of TARGET. */
5706 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5707 {
5708 enum machine_mode mode;
5709 HOST_WIDE_INT bitsize;
5710 HOST_WIDE_INT bitpos = 0;
5711 tree offset;
5712 rtx to_rtx = target;
5713
5714 /* Just ignore missing fields. We cleared the whole
5715 structure, above, if any fields are missing. */
5716 if (field == 0)
5717 continue;
5718
5719 if (cleared && initializer_zerop (value))
5720 continue;
5721
5722 if (host_integerp (DECL_SIZE (field), 1))
5723 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5724 else
5725 bitsize = -1;
5726
5727 mode = DECL_MODE (field);
5728 if (DECL_BIT_FIELD (field))
5729 mode = VOIDmode;
5730
5731 offset = DECL_FIELD_OFFSET (field);
5732 if (host_integerp (offset, 0)
5733 && host_integerp (bit_position (field), 0))
5734 {
5735 bitpos = int_bit_position (field);
5736 offset = 0;
5737 }
5738 else
5739 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5740
5741 if (offset)
5742 {
5743 enum machine_mode address_mode;
5744 rtx offset_rtx;
5745
5746 offset
5747 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5748 make_tree (TREE_TYPE (exp),
5749 target));
5750
5751 offset_rtx = expand_normal (offset);
5752 gcc_assert (MEM_P (to_rtx));
5753
5754 address_mode
5755 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5756 if (GET_MODE (offset_rtx) != address_mode)
5757 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5758
5759 to_rtx = offset_address (to_rtx, offset_rtx,
5760 highest_pow2_factor (offset));
5761 }
5762
5763 #ifdef WORD_REGISTER_OPERATIONS
5764 /* If this initializes a field that is smaller than a
5765 word, at the start of a word, try to widen it to a full
5766 word. This special case allows us to output C++ member
5767 function initializations in a form that the optimizers
5768 can understand. */
5769 if (REG_P (target)
5770 && bitsize < BITS_PER_WORD
5771 && bitpos % BITS_PER_WORD == 0
5772 && GET_MODE_CLASS (mode) == MODE_INT
5773 && TREE_CODE (value) == INTEGER_CST
5774 && exp_size >= 0
5775 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5776 {
5777 tree type = TREE_TYPE (value);
5778
5779 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5780 {
5781 type = lang_hooks.types.type_for_mode
5782 (word_mode, TYPE_UNSIGNED (type));
5783 value = fold_convert (type, value);
5784 }
5785
5786 if (BYTES_BIG_ENDIAN)
5787 value
5788 = fold_build2 (LSHIFT_EXPR, type, value,
5789 build_int_cst (type,
5790 BITS_PER_WORD - bitsize));
5791 bitsize = BITS_PER_WORD;
5792 mode = word_mode;
5793 }
5794 #endif
5795
5796 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5797 && DECL_NONADDRESSABLE_P (field))
5798 {
5799 to_rtx = copy_rtx (to_rtx);
5800 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5801 }
5802
5803 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5804 value, type, cleared,
5805 get_alias_set (TREE_TYPE (field)));
5806 }
5807 break;
5808 }
5809 case ARRAY_TYPE:
5810 {
5811 tree value, index;
5812 unsigned HOST_WIDE_INT i;
5813 int need_to_clear;
5814 tree domain;
5815 tree elttype = TREE_TYPE (type);
5816 int const_bounds_p;
5817 HOST_WIDE_INT minelt = 0;
5818 HOST_WIDE_INT maxelt = 0;
5819
5820 domain = TYPE_DOMAIN (type);
5821 const_bounds_p = (TYPE_MIN_VALUE (domain)
5822 && TYPE_MAX_VALUE (domain)
5823 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5824 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5825
5826 /* If we have constant bounds for the range of the type, get them. */
5827 if (const_bounds_p)
5828 {
5829 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5830 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5831 }
5832
5833 /* If the constructor has fewer elements than the array, clear
5834 the whole array first. Similarly if this is static
5835 constructor of a non-BLKmode object. */
5836 if (cleared)
5837 need_to_clear = 0;
5838 else if (REG_P (target) && TREE_STATIC (exp))
5839 need_to_clear = 1;
5840 else
5841 {
5842 unsigned HOST_WIDE_INT idx;
5843 tree index, value;
5844 HOST_WIDE_INT count = 0, zero_count = 0;
5845 need_to_clear = ! const_bounds_p;
5846
5847 /* This loop is a more accurate version of the loop in
5848 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5849 is also needed to check for missing elements. */
5850 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5851 {
5852 HOST_WIDE_INT this_node_count;
5853
5854 if (need_to_clear)
5855 break;
5856
5857 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5858 {
5859 tree lo_index = TREE_OPERAND (index, 0);
5860 tree hi_index = TREE_OPERAND (index, 1);
5861
5862 if (! host_integerp (lo_index, 1)
5863 || ! host_integerp (hi_index, 1))
5864 {
5865 need_to_clear = 1;
5866 break;
5867 }
5868
5869 this_node_count = (tree_low_cst (hi_index, 1)
5870 - tree_low_cst (lo_index, 1) + 1);
5871 }
5872 else
5873 this_node_count = 1;
5874
5875 count += this_node_count;
5876 if (mostly_zeros_p (value))
5877 zero_count += this_node_count;
5878 }
5879
5880 /* Clear the entire array first if there are any missing
5881 elements, or if the incidence of zero elements is >=
5882 75%. */
5883 if (! need_to_clear
5884 && (count < maxelt - minelt + 1
5885 || 4 * zero_count >= 3 * count))
5886 need_to_clear = 1;
5887 }
5888
5889 if (need_to_clear && size > 0)
5890 {
5891 if (REG_P (target))
5892 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5893 else
5894 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5895 cleared = 1;
5896 }
5897
5898 if (!cleared && REG_P (target))
5899 /* Inform later passes that the old value is dead. */
5900 emit_clobber (target);
5901
5902 /* Store each element of the constructor into the
5903 corresponding element of TARGET, determined by counting the
5904 elements. */
5905 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5906 {
5907 enum machine_mode mode;
5908 HOST_WIDE_INT bitsize;
5909 HOST_WIDE_INT bitpos;
5910 rtx xtarget = target;
5911
5912 if (cleared && initializer_zerop (value))
5913 continue;
5914
5915 mode = TYPE_MODE (elttype);
5916 if (mode == BLKmode)
5917 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5918 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5919 : -1);
5920 else
5921 bitsize = GET_MODE_BITSIZE (mode);
5922
5923 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5924 {
5925 tree lo_index = TREE_OPERAND (index, 0);
5926 tree hi_index = TREE_OPERAND (index, 1);
5927 rtx index_r, pos_rtx;
5928 HOST_WIDE_INT lo, hi, count;
5929 tree position;
5930
5931 /* If the range is constant and "small", unroll the loop. */
5932 if (const_bounds_p
5933 && host_integerp (lo_index, 0)
5934 && host_integerp (hi_index, 0)
5935 && (lo = tree_low_cst (lo_index, 0),
5936 hi = tree_low_cst (hi_index, 0),
5937 count = hi - lo + 1,
5938 (!MEM_P (target)
5939 || count <= 2
5940 || (host_integerp (TYPE_SIZE (elttype), 1)
5941 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5942 <= 40 * 8)))))
5943 {
5944 lo -= minelt; hi -= minelt;
5945 for (; lo <= hi; lo++)
5946 {
5947 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
5948
5949 if (MEM_P (target)
5950 && !MEM_KEEP_ALIAS_SET_P (target)
5951 && TREE_CODE (type) == ARRAY_TYPE
5952 && TYPE_NONALIASED_COMPONENT (type))
5953 {
5954 target = copy_rtx (target);
5955 MEM_KEEP_ALIAS_SET_P (target) = 1;
5956 }
5957
5958 store_constructor_field
5959 (target, bitsize, bitpos, mode, value, type, cleared,
5960 get_alias_set (elttype));
5961 }
5962 }
5963 else
5964 {
5965 rtx loop_start = gen_label_rtx ();
5966 rtx loop_end = gen_label_rtx ();
5967 tree exit_cond;
5968
5969 expand_normal (hi_index);
5970
5971 index = build_decl (EXPR_LOCATION (exp),
5972 VAR_DECL, NULL_TREE, domain);
5973 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
5974 SET_DECL_RTL (index, index_r);
5975 store_expr (lo_index, index_r, 0, false);
5976
5977 /* Build the head of the loop. */
5978 do_pending_stack_adjust ();
5979 emit_label (loop_start);
5980
5981 /* Assign value to element index. */
5982 position =
5983 fold_convert (ssizetype,
5984 fold_build2 (MINUS_EXPR,
5985 TREE_TYPE (index),
5986 index,
5987 TYPE_MIN_VALUE (domain)));
5988
5989 position =
5990 size_binop (MULT_EXPR, position,
5991 fold_convert (ssizetype,
5992 TYPE_SIZE_UNIT (elttype)));
5993
5994 pos_rtx = expand_normal (position);
5995 xtarget = offset_address (target, pos_rtx,
5996 highest_pow2_factor (position));
5997 xtarget = adjust_address (xtarget, mode, 0);
5998 if (TREE_CODE (value) == CONSTRUCTOR)
5999 store_constructor (value, xtarget, cleared,
6000 bitsize / BITS_PER_UNIT);
6001 else
6002 store_expr (value, xtarget, 0, false);
6003
6004 /* Generate a conditional jump to exit the loop. */
6005 exit_cond = build2 (LT_EXPR, integer_type_node,
6006 index, hi_index);
6007 jumpif (exit_cond, loop_end, -1);
6008
6009 /* Update the loop counter, and jump to the head of
6010 the loop. */
6011 expand_assignment (index,
6012 build2 (PLUS_EXPR, TREE_TYPE (index),
6013 index, integer_one_node),
6014 false);
6015
6016 emit_jump (loop_start);
6017
6018 /* Build the end of the loop. */
6019 emit_label (loop_end);
6020 }
6021 }
6022 else if ((index != 0 && ! host_integerp (index, 0))
6023 || ! host_integerp (TYPE_SIZE (elttype), 1))
6024 {
6025 tree position;
6026
6027 if (index == 0)
6028 index = ssize_int (1);
6029
6030 if (minelt)
6031 index = fold_convert (ssizetype,
6032 fold_build2 (MINUS_EXPR,
6033 TREE_TYPE (index),
6034 index,
6035 TYPE_MIN_VALUE (domain)));
6036
6037 position =
6038 size_binop (MULT_EXPR, index,
6039 fold_convert (ssizetype,
6040 TYPE_SIZE_UNIT (elttype)));
6041 xtarget = offset_address (target,
6042 expand_normal (position),
6043 highest_pow2_factor (position));
6044 xtarget = adjust_address (xtarget, mode, 0);
6045 store_expr (value, xtarget, 0, false);
6046 }
6047 else
6048 {
6049 if (index != 0)
6050 bitpos = ((tree_low_cst (index, 0) - minelt)
6051 * tree_low_cst (TYPE_SIZE (elttype), 1));
6052 else
6053 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
6054
6055 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6056 && TREE_CODE (type) == ARRAY_TYPE
6057 && TYPE_NONALIASED_COMPONENT (type))
6058 {
6059 target = copy_rtx (target);
6060 MEM_KEEP_ALIAS_SET_P (target) = 1;
6061 }
6062 store_constructor_field (target, bitsize, bitpos, mode, value,
6063 type, cleared, get_alias_set (elttype));
6064 }
6065 }
6066 break;
6067 }
6068
6069 case VECTOR_TYPE:
6070 {
6071 unsigned HOST_WIDE_INT idx;
6072 constructor_elt *ce;
6073 int i;
6074 int need_to_clear;
6075 int icode = 0;
6076 tree elttype = TREE_TYPE (type);
6077 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
6078 enum machine_mode eltmode = TYPE_MODE (elttype);
6079 HOST_WIDE_INT bitsize;
6080 HOST_WIDE_INT bitpos;
6081 rtvec vector = NULL;
6082 unsigned n_elts;
6083 alias_set_type alias;
6084
6085 gcc_assert (eltmode != BLKmode);
6086
6087 n_elts = TYPE_VECTOR_SUBPARTS (type);
6088 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6089 {
6090 enum machine_mode mode = GET_MODE (target);
6091
6092 icode = (int) optab_handler (vec_init_optab, mode);
6093 if (icode != CODE_FOR_nothing)
6094 {
6095 unsigned int i;
6096
6097 vector = rtvec_alloc (n_elts);
6098 for (i = 0; i < n_elts; i++)
6099 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6100 }
6101 }
6102
6103 /* If the constructor has fewer elements than the vector,
6104 clear the whole array first. Similarly if this is static
6105 constructor of a non-BLKmode object. */
6106 if (cleared)
6107 need_to_clear = 0;
6108 else if (REG_P (target) && TREE_STATIC (exp))
6109 need_to_clear = 1;
6110 else
6111 {
6112 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6113 tree value;
6114
6115 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6116 {
6117 int n_elts_here = tree_low_cst
6118 (int_const_binop (TRUNC_DIV_EXPR,
6119 TYPE_SIZE (TREE_TYPE (value)),
6120 TYPE_SIZE (elttype)), 1);
6121
6122 count += n_elts_here;
6123 if (mostly_zeros_p (value))
6124 zero_count += n_elts_here;
6125 }
6126
6127 /* Clear the entire vector first if there are any missing elements,
6128 or if the incidence of zero elements is >= 75%. */
6129 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6130 }
6131
6132 if (need_to_clear && size > 0 && !vector)
6133 {
6134 if (REG_P (target))
6135 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6136 else
6137 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6138 cleared = 1;
6139 }
6140
6141 /* Inform later passes that the old value is dead. */
6142 if (!cleared && !vector && REG_P (target))
6143 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6144
6145 if (MEM_P (target))
6146 alias = MEM_ALIAS_SET (target);
6147 else
6148 alias = get_alias_set (elttype);
6149
6150 /* Store each element of the constructor into the corresponding
6151 element of TARGET, determined by counting the elements. */
6152 for (idx = 0, i = 0;
6153 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6154 idx++, i += bitsize / elt_size)
6155 {
6156 HOST_WIDE_INT eltpos;
6157 tree value = ce->value;
6158
6159 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6160 if (cleared && initializer_zerop (value))
6161 continue;
6162
6163 if (ce->index)
6164 eltpos = tree_low_cst (ce->index, 1);
6165 else
6166 eltpos = i;
6167
6168 if (vector)
6169 {
6170 /* Vector CONSTRUCTORs should only be built from smaller
6171 vectors in the case of BLKmode vectors. */
6172 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6173 RTVEC_ELT (vector, eltpos)
6174 = expand_normal (value);
6175 }
6176 else
6177 {
6178 enum machine_mode value_mode =
6179 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6180 ? TYPE_MODE (TREE_TYPE (value))
6181 : eltmode;
6182 bitpos = eltpos * elt_size;
6183 store_constructor_field (target, bitsize, bitpos,
6184 value_mode, value, type,
6185 cleared, alias);
6186 }
6187 }
6188
6189 if (vector)
6190 emit_insn (GEN_FCN (icode)
6191 (target,
6192 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6193 break;
6194 }
6195
6196 default:
6197 gcc_unreachable ();
6198 }
6199 }
6200
6201 /* Store the value of EXP (an expression tree)
6202 into a subfield of TARGET which has mode MODE and occupies
6203 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6204 If MODE is VOIDmode, it means that we are storing into a bit-field.
6205
6206 BITREGION_START is bitpos of the first bitfield in this region.
6207 BITREGION_END is the bitpos of the ending bitfield in this region.
6208 These two fields are 0, if the C++ memory model does not apply,
6209 or we are not interested in keeping track of bitfield regions.
6210
6211 Always return const0_rtx unless we have something particular to
6212 return.
6213
6214 TYPE is the type of the underlying object,
6215
6216 ALIAS_SET is the alias set for the destination. This value will
6217 (in general) be different from that for TARGET, since TARGET is a
6218 reference to the containing structure.
6219
6220 If NONTEMPORAL is true, try generating a nontemporal store. */
6221
6222 static rtx
6223 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6224 unsigned HOST_WIDE_INT bitregion_start,
6225 unsigned HOST_WIDE_INT bitregion_end,
6226 enum machine_mode mode, tree exp, tree type,
6227 alias_set_type alias_set, bool nontemporal)
6228 {
6229 if (TREE_CODE (exp) == ERROR_MARK)
6230 return const0_rtx;
6231
6232 /* If we have nothing to store, do nothing unless the expression has
6233 side-effects. */
6234 if (bitsize == 0)
6235 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6236
6237 /* If we are storing into an unaligned field of an aligned union that is
6238 in a register, we may have the mode of TARGET being an integer mode but
6239 MODE == BLKmode. In that case, get an aligned object whose size and
6240 alignment are the same as TARGET and store TARGET into it (we can avoid
6241 the store if the field being stored is the entire width of TARGET). Then
6242 call ourselves recursively to store the field into a BLKmode version of
6243 that object. Finally, load from the object into TARGET. This is not
6244 very efficient in general, but should only be slightly more expensive
6245 than the otherwise-required unaligned accesses. Perhaps this can be
6246 cleaned up later. It's tempting to make OBJECT readonly, but it's set
6247 twice, once with emit_move_insn and once via store_field. */
6248
6249 if (mode == BLKmode
6250 && (REG_P (target) || GET_CODE (target) == SUBREG))
6251 {
6252 rtx object = assign_temp (type, 0, 1, 1);
6253 rtx blk_object = adjust_address (object, BLKmode, 0);
6254
6255 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
6256 emit_move_insn (object, target);
6257
6258 store_field (blk_object, bitsize, bitpos,
6259 bitregion_start, bitregion_end,
6260 mode, exp, type, MEM_ALIAS_SET (blk_object), nontemporal);
6261
6262 emit_move_insn (target, object);
6263
6264 /* We want to return the BLKmode version of the data. */
6265 return blk_object;
6266 }
6267
6268 if (GET_CODE (target) == CONCAT)
6269 {
6270 /* We're storing into a struct containing a single __complex. */
6271
6272 gcc_assert (!bitpos);
6273 return store_expr (exp, target, 0, nontemporal);
6274 }
6275
6276 /* If the structure is in a register or if the component
6277 is a bit field, we cannot use addressing to access it.
6278 Use bit-field techniques or SUBREG to store in it. */
6279
6280 if (mode == VOIDmode
6281 || (mode != BLKmode && ! direct_store[(int) mode]
6282 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6283 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6284 || REG_P (target)
6285 || GET_CODE (target) == SUBREG
6286 /* If the field isn't aligned enough to store as an ordinary memref,
6287 store it as a bit field. */
6288 || (mode != BLKmode
6289 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6290 || bitpos % GET_MODE_ALIGNMENT (mode))
6291 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6292 || (bitpos % BITS_PER_UNIT != 0)))
6293 || (bitsize >= 0 && mode != BLKmode
6294 && GET_MODE_BITSIZE (mode) > bitsize)
6295 /* If the RHS and field are a constant size and the size of the
6296 RHS isn't the same size as the bitfield, we must use bitfield
6297 operations. */
6298 || (bitsize >= 0
6299 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6300 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6301 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6302 decl we must use bitfield operations. */
6303 || (bitsize >= 0
6304 && TREE_CODE (exp) == MEM_REF
6305 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6306 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6307 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6308 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6309 {
6310 rtx temp;
6311 gimple nop_def;
6312
6313 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6314 implies a mask operation. If the precision is the same size as
6315 the field we're storing into, that mask is redundant. This is
6316 particularly common with bit field assignments generated by the
6317 C front end. */
6318 nop_def = get_def_for_expr (exp, NOP_EXPR);
6319 if (nop_def)
6320 {
6321 tree type = TREE_TYPE (exp);
6322 if (INTEGRAL_TYPE_P (type)
6323 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6324 && bitsize == TYPE_PRECISION (type))
6325 {
6326 tree op = gimple_assign_rhs1 (nop_def);
6327 type = TREE_TYPE (op);
6328 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6329 exp = op;
6330 }
6331 }
6332
6333 temp = expand_normal (exp);
6334
6335 /* If BITSIZE is narrower than the size of the type of EXP
6336 we will be narrowing TEMP. Normally, what's wanted are the
6337 low-order bits. However, if EXP's type is a record and this is
6338 big-endian machine, we want the upper BITSIZE bits. */
6339 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6340 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6341 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6342 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6343 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6344 NULL_RTX, 1);
6345
6346 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
6347 MODE. */
6348 if (mode != VOIDmode && mode != BLKmode
6349 && mode != TYPE_MODE (TREE_TYPE (exp)))
6350 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6351
6352 /* If the modes of TEMP and TARGET are both BLKmode, both
6353 must be in memory and BITPOS must be aligned on a byte
6354 boundary. If so, we simply do a block copy. Likewise
6355 for a BLKmode-like TARGET. */
6356 if (GET_MODE (temp) == BLKmode
6357 && (GET_MODE (target) == BLKmode
6358 || (MEM_P (target)
6359 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6360 && (bitpos % BITS_PER_UNIT) == 0
6361 && (bitsize % BITS_PER_UNIT) == 0)))
6362 {
6363 gcc_assert (MEM_P (target) && MEM_P (temp)
6364 && (bitpos % BITS_PER_UNIT) == 0);
6365
6366 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6367 emit_block_move (target, temp,
6368 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6369 / BITS_PER_UNIT),
6370 BLOCK_OP_NORMAL);
6371
6372 return const0_rtx;
6373 }
6374
6375 /* Store the value in the bitfield. */
6376 store_bit_field (target, bitsize, bitpos,
6377 bitregion_start, bitregion_end,
6378 mode, temp);
6379
6380 return const0_rtx;
6381 }
6382 else
6383 {
6384 /* Now build a reference to just the desired component. */
6385 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6386
6387 if (to_rtx == target)
6388 to_rtx = copy_rtx (to_rtx);
6389
6390 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6391 set_mem_alias_set (to_rtx, alias_set);
6392
6393 return store_expr (exp, to_rtx, 0, nontemporal);
6394 }
6395 }
6396 \f
6397 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6398 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6399 codes and find the ultimate containing object, which we return.
6400
6401 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6402 bit position, and *PUNSIGNEDP to the signedness of the field.
6403 If the position of the field is variable, we store a tree
6404 giving the variable offset (in units) in *POFFSET.
6405 This offset is in addition to the bit position.
6406 If the position is not variable, we store 0 in *POFFSET.
6407
6408 If any of the extraction expressions is volatile,
6409 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6410
6411 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6412 Otherwise, it is a mode that can be used to access the field.
6413
6414 If the field describes a variable-sized object, *PMODE is set to
6415 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6416 this case, but the address of the object can be found.
6417
6418 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6419 look through nodes that serve as markers of a greater alignment than
6420 the one that can be deduced from the expression. These nodes make it
6421 possible for front-ends to prevent temporaries from being created by
6422 the middle-end on alignment considerations. For that purpose, the
6423 normal operating mode at high-level is to always pass FALSE so that
6424 the ultimate containing object is really returned; moreover, the
6425 associated predicate handled_component_p will always return TRUE
6426 on these nodes, thus indicating that they are essentially handled
6427 by get_inner_reference. TRUE should only be passed when the caller
6428 is scanning the expression in order to build another representation
6429 and specifically knows how to handle these nodes; as such, this is
6430 the normal operating mode in the RTL expanders. */
6431
6432 tree
6433 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6434 HOST_WIDE_INT *pbitpos, tree *poffset,
6435 enum machine_mode *pmode, int *punsignedp,
6436 int *pvolatilep, bool keep_aligning)
6437 {
6438 tree size_tree = 0;
6439 enum machine_mode mode = VOIDmode;
6440 bool blkmode_bitfield = false;
6441 tree offset = size_zero_node;
6442 double_int bit_offset = double_int_zero;
6443
6444 /* First get the mode, signedness, and size. We do this from just the
6445 outermost expression. */
6446 *pbitsize = -1;
6447 if (TREE_CODE (exp) == COMPONENT_REF)
6448 {
6449 tree field = TREE_OPERAND (exp, 1);
6450 size_tree = DECL_SIZE (field);
6451 if (!DECL_BIT_FIELD (field))
6452 mode = DECL_MODE (field);
6453 else if (DECL_MODE (field) == BLKmode)
6454 blkmode_bitfield = true;
6455 else if (TREE_THIS_VOLATILE (exp)
6456 && flag_strict_volatile_bitfields > 0)
6457 /* Volatile bitfields should be accessed in the mode of the
6458 field's type, not the mode computed based on the bit
6459 size. */
6460 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6461
6462 *punsignedp = DECL_UNSIGNED (field);
6463 }
6464 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6465 {
6466 size_tree = TREE_OPERAND (exp, 1);
6467 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6468 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6469
6470 /* For vector types, with the correct size of access, use the mode of
6471 inner type. */
6472 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6473 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6474 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6475 mode = TYPE_MODE (TREE_TYPE (exp));
6476 }
6477 else
6478 {
6479 mode = TYPE_MODE (TREE_TYPE (exp));
6480 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6481
6482 if (mode == BLKmode)
6483 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6484 else
6485 *pbitsize = GET_MODE_BITSIZE (mode);
6486 }
6487
6488 if (size_tree != 0)
6489 {
6490 if (! host_integerp (size_tree, 1))
6491 mode = BLKmode, *pbitsize = -1;
6492 else
6493 *pbitsize = tree_low_cst (size_tree, 1);
6494 }
6495
6496 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6497 and find the ultimate containing object. */
6498 while (1)
6499 {
6500 switch (TREE_CODE (exp))
6501 {
6502 case BIT_FIELD_REF:
6503 bit_offset
6504 = double_int_add (bit_offset,
6505 tree_to_double_int (TREE_OPERAND (exp, 2)));
6506 break;
6507
6508 case COMPONENT_REF:
6509 {
6510 tree field = TREE_OPERAND (exp, 1);
6511 tree this_offset = component_ref_field_offset (exp);
6512
6513 /* If this field hasn't been filled in yet, don't go past it.
6514 This should only happen when folding expressions made during
6515 type construction. */
6516 if (this_offset == 0)
6517 break;
6518
6519 offset = size_binop (PLUS_EXPR, offset, this_offset);
6520 bit_offset = double_int_add (bit_offset,
6521 tree_to_double_int
6522 (DECL_FIELD_BIT_OFFSET (field)));
6523
6524 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6525 }
6526 break;
6527
6528 case ARRAY_REF:
6529 case ARRAY_RANGE_REF:
6530 {
6531 tree index = TREE_OPERAND (exp, 1);
6532 tree low_bound = array_ref_low_bound (exp);
6533 tree unit_size = array_ref_element_size (exp);
6534
6535 /* We assume all arrays have sizes that are a multiple of a byte.
6536 First subtract the lower bound, if any, in the type of the
6537 index, then convert to sizetype and multiply by the size of
6538 the array element. */
6539 if (! integer_zerop (low_bound))
6540 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6541 index, low_bound);
6542
6543 offset = size_binop (PLUS_EXPR, offset,
6544 size_binop (MULT_EXPR,
6545 fold_convert (sizetype, index),
6546 unit_size));
6547 }
6548 break;
6549
6550 case REALPART_EXPR:
6551 break;
6552
6553 case IMAGPART_EXPR:
6554 bit_offset = double_int_add (bit_offset,
6555 uhwi_to_double_int (*pbitsize));
6556 break;
6557
6558 case VIEW_CONVERT_EXPR:
6559 if (keep_aligning && STRICT_ALIGNMENT
6560 && (TYPE_ALIGN (TREE_TYPE (exp))
6561 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6562 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6563 < BIGGEST_ALIGNMENT)
6564 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6565 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6566 goto done;
6567 break;
6568
6569 case MEM_REF:
6570 /* Hand back the decl for MEM[&decl, off]. */
6571 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6572 {
6573 tree off = TREE_OPERAND (exp, 1);
6574 if (!integer_zerop (off))
6575 {
6576 double_int boff, coff = mem_ref_offset (exp);
6577 boff = double_int_lshift (coff,
6578 BITS_PER_UNIT == 8
6579 ? 3 : exact_log2 (BITS_PER_UNIT),
6580 HOST_BITS_PER_DOUBLE_INT, true);
6581 bit_offset = double_int_add (bit_offset, boff);
6582 }
6583 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6584 }
6585 goto done;
6586
6587 default:
6588 goto done;
6589 }
6590
6591 /* If any reference in the chain is volatile, the effect is volatile. */
6592 if (TREE_THIS_VOLATILE (exp))
6593 *pvolatilep = 1;
6594
6595 exp = TREE_OPERAND (exp, 0);
6596 }
6597 done:
6598
6599 /* If OFFSET is constant, see if we can return the whole thing as a
6600 constant bit position. Make sure to handle overflow during
6601 this conversion. */
6602 if (TREE_CODE (offset) == INTEGER_CST)
6603 {
6604 double_int tem = tree_to_double_int (offset);
6605 tem = double_int_sext (tem, TYPE_PRECISION (sizetype));
6606 tem = double_int_lshift (tem,
6607 BITS_PER_UNIT == 8
6608 ? 3 : exact_log2 (BITS_PER_UNIT),
6609 HOST_BITS_PER_DOUBLE_INT, true);
6610 tem = double_int_add (tem, bit_offset);
6611 if (double_int_fits_in_shwi_p (tem))
6612 {
6613 *pbitpos = double_int_to_shwi (tem);
6614 *poffset = offset = NULL_TREE;
6615 }
6616 }
6617
6618 /* Otherwise, split it up. */
6619 if (offset)
6620 {
6621 /* Avoid returning a negative bitpos as this may wreak havoc later. */
6622 if (double_int_negative_p (bit_offset))
6623 {
6624 double_int mask
6625 = double_int_mask (BITS_PER_UNIT == 8
6626 ? 3 : exact_log2 (BITS_PER_UNIT));
6627 double_int tem = double_int_and_not (bit_offset, mask);
6628 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
6629 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
6630 bit_offset = double_int_sub (bit_offset, tem);
6631 tem = double_int_rshift (tem,
6632 BITS_PER_UNIT == 8
6633 ? 3 : exact_log2 (BITS_PER_UNIT),
6634 HOST_BITS_PER_DOUBLE_INT, true);
6635 offset = size_binop (PLUS_EXPR, offset,
6636 double_int_to_tree (sizetype, tem));
6637 }
6638
6639 *pbitpos = double_int_to_shwi (bit_offset);
6640 *poffset = offset;
6641 }
6642
6643 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6644 if (mode == VOIDmode
6645 && blkmode_bitfield
6646 && (*pbitpos % BITS_PER_UNIT) == 0
6647 && (*pbitsize % BITS_PER_UNIT) == 0)
6648 *pmode = BLKmode;
6649 else
6650 *pmode = mode;
6651
6652 return exp;
6653 }
6654
6655 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6656 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6657 EXP is marked as PACKED. */
6658
6659 bool
6660 contains_packed_reference (const_tree exp)
6661 {
6662 bool packed_p = false;
6663
6664 while (1)
6665 {
6666 switch (TREE_CODE (exp))
6667 {
6668 case COMPONENT_REF:
6669 {
6670 tree field = TREE_OPERAND (exp, 1);
6671 packed_p = DECL_PACKED (field)
6672 || TYPE_PACKED (TREE_TYPE (field))
6673 || TYPE_PACKED (TREE_TYPE (exp));
6674 if (packed_p)
6675 goto done;
6676 }
6677 break;
6678
6679 case BIT_FIELD_REF:
6680 case ARRAY_REF:
6681 case ARRAY_RANGE_REF:
6682 case REALPART_EXPR:
6683 case IMAGPART_EXPR:
6684 case VIEW_CONVERT_EXPR:
6685 break;
6686
6687 default:
6688 goto done;
6689 }
6690 exp = TREE_OPERAND (exp, 0);
6691 }
6692 done:
6693 return packed_p;
6694 }
6695
6696 /* Return a tree of sizetype representing the size, in bytes, of the element
6697 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6698
6699 tree
6700 array_ref_element_size (tree exp)
6701 {
6702 tree aligned_size = TREE_OPERAND (exp, 3);
6703 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6704 location_t loc = EXPR_LOCATION (exp);
6705
6706 /* If a size was specified in the ARRAY_REF, it's the size measured
6707 in alignment units of the element type. So multiply by that value. */
6708 if (aligned_size)
6709 {
6710 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6711 sizetype from another type of the same width and signedness. */
6712 if (TREE_TYPE (aligned_size) != sizetype)
6713 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6714 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6715 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6716 }
6717
6718 /* Otherwise, take the size from that of the element type. Substitute
6719 any PLACEHOLDER_EXPR that we have. */
6720 else
6721 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6722 }
6723
6724 /* Return a tree representing the lower bound of the array mentioned in
6725 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6726
6727 tree
6728 array_ref_low_bound (tree exp)
6729 {
6730 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6731
6732 /* If a lower bound is specified in EXP, use it. */
6733 if (TREE_OPERAND (exp, 2))
6734 return TREE_OPERAND (exp, 2);
6735
6736 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6737 substituting for a PLACEHOLDER_EXPR as needed. */
6738 if (domain_type && TYPE_MIN_VALUE (domain_type))
6739 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6740
6741 /* Otherwise, return a zero of the appropriate type. */
6742 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6743 }
6744
6745 /* Return a tree representing the upper bound of the array mentioned in
6746 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6747
6748 tree
6749 array_ref_up_bound (tree exp)
6750 {
6751 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6752
6753 /* If there is a domain type and it has an upper bound, use it, substituting
6754 for a PLACEHOLDER_EXPR as needed. */
6755 if (domain_type && TYPE_MAX_VALUE (domain_type))
6756 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6757
6758 /* Otherwise fail. */
6759 return NULL_TREE;
6760 }
6761
6762 /* Return a tree representing the offset, in bytes, of the field referenced
6763 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6764
6765 tree
6766 component_ref_field_offset (tree exp)
6767 {
6768 tree aligned_offset = TREE_OPERAND (exp, 2);
6769 tree field = TREE_OPERAND (exp, 1);
6770 location_t loc = EXPR_LOCATION (exp);
6771
6772 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6773 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6774 value. */
6775 if (aligned_offset)
6776 {
6777 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6778 sizetype from another type of the same width and signedness. */
6779 if (TREE_TYPE (aligned_offset) != sizetype)
6780 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6781 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6782 size_int (DECL_OFFSET_ALIGN (field)
6783 / BITS_PER_UNIT));
6784 }
6785
6786 /* Otherwise, take the offset from that of the field. Substitute
6787 any PLACEHOLDER_EXPR that we have. */
6788 else
6789 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6790 }
6791
6792 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6793
6794 static unsigned HOST_WIDE_INT
6795 target_align (const_tree target)
6796 {
6797 /* We might have a chain of nested references with intermediate misaligning
6798 bitfields components, so need to recurse to find out. */
6799
6800 unsigned HOST_WIDE_INT this_align, outer_align;
6801
6802 switch (TREE_CODE (target))
6803 {
6804 case BIT_FIELD_REF:
6805 return 1;
6806
6807 case COMPONENT_REF:
6808 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6809 outer_align = target_align (TREE_OPERAND (target, 0));
6810 return MIN (this_align, outer_align);
6811
6812 case ARRAY_REF:
6813 case ARRAY_RANGE_REF:
6814 this_align = TYPE_ALIGN (TREE_TYPE (target));
6815 outer_align = target_align (TREE_OPERAND (target, 0));
6816 return MIN (this_align, outer_align);
6817
6818 CASE_CONVERT:
6819 case NON_LVALUE_EXPR:
6820 case VIEW_CONVERT_EXPR:
6821 this_align = TYPE_ALIGN (TREE_TYPE (target));
6822 outer_align = target_align (TREE_OPERAND (target, 0));
6823 return MAX (this_align, outer_align);
6824
6825 default:
6826 return TYPE_ALIGN (TREE_TYPE (target));
6827 }
6828 }
6829
6830 \f
6831 /* Given an rtx VALUE that may contain additions and multiplications, return
6832 an equivalent value that just refers to a register, memory, or constant.
6833 This is done by generating instructions to perform the arithmetic and
6834 returning a pseudo-register containing the value.
6835
6836 The returned value may be a REG, SUBREG, MEM or constant. */
6837
6838 rtx
6839 force_operand (rtx value, rtx target)
6840 {
6841 rtx op1, op2;
6842 /* Use subtarget as the target for operand 0 of a binary operation. */
6843 rtx subtarget = get_subtarget (target);
6844 enum rtx_code code = GET_CODE (value);
6845
6846 /* Check for subreg applied to an expression produced by loop optimizer. */
6847 if (code == SUBREG
6848 && !REG_P (SUBREG_REG (value))
6849 && !MEM_P (SUBREG_REG (value)))
6850 {
6851 value
6852 = simplify_gen_subreg (GET_MODE (value),
6853 force_reg (GET_MODE (SUBREG_REG (value)),
6854 force_operand (SUBREG_REG (value),
6855 NULL_RTX)),
6856 GET_MODE (SUBREG_REG (value)),
6857 SUBREG_BYTE (value));
6858 code = GET_CODE (value);
6859 }
6860
6861 /* Check for a PIC address load. */
6862 if ((code == PLUS || code == MINUS)
6863 && XEXP (value, 0) == pic_offset_table_rtx
6864 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6865 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6866 || GET_CODE (XEXP (value, 1)) == CONST))
6867 {
6868 if (!subtarget)
6869 subtarget = gen_reg_rtx (GET_MODE (value));
6870 emit_move_insn (subtarget, value);
6871 return subtarget;
6872 }
6873
6874 if (ARITHMETIC_P (value))
6875 {
6876 op2 = XEXP (value, 1);
6877 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6878 subtarget = 0;
6879 if (code == MINUS && CONST_INT_P (op2))
6880 {
6881 code = PLUS;
6882 op2 = negate_rtx (GET_MODE (value), op2);
6883 }
6884
6885 /* Check for an addition with OP2 a constant integer and our first
6886 operand a PLUS of a virtual register and something else. In that
6887 case, we want to emit the sum of the virtual register and the
6888 constant first and then add the other value. This allows virtual
6889 register instantiation to simply modify the constant rather than
6890 creating another one around this addition. */
6891 if (code == PLUS && CONST_INT_P (op2)
6892 && GET_CODE (XEXP (value, 0)) == PLUS
6893 && REG_P (XEXP (XEXP (value, 0), 0))
6894 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6895 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6896 {
6897 rtx temp = expand_simple_binop (GET_MODE (value), code,
6898 XEXP (XEXP (value, 0), 0), op2,
6899 subtarget, 0, OPTAB_LIB_WIDEN);
6900 return expand_simple_binop (GET_MODE (value), code, temp,
6901 force_operand (XEXP (XEXP (value,
6902 0), 1), 0),
6903 target, 0, OPTAB_LIB_WIDEN);
6904 }
6905
6906 op1 = force_operand (XEXP (value, 0), subtarget);
6907 op2 = force_operand (op2, NULL_RTX);
6908 switch (code)
6909 {
6910 case MULT:
6911 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6912 case DIV:
6913 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6914 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6915 target, 1, OPTAB_LIB_WIDEN);
6916 else
6917 return expand_divmod (0,
6918 FLOAT_MODE_P (GET_MODE (value))
6919 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6920 GET_MODE (value), op1, op2, target, 0);
6921 case MOD:
6922 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6923 target, 0);
6924 case UDIV:
6925 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6926 target, 1);
6927 case UMOD:
6928 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6929 target, 1);
6930 case ASHIFTRT:
6931 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6932 target, 0, OPTAB_LIB_WIDEN);
6933 default:
6934 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6935 target, 1, OPTAB_LIB_WIDEN);
6936 }
6937 }
6938 if (UNARY_P (value))
6939 {
6940 if (!target)
6941 target = gen_reg_rtx (GET_MODE (value));
6942 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6943 switch (code)
6944 {
6945 case ZERO_EXTEND:
6946 case SIGN_EXTEND:
6947 case TRUNCATE:
6948 case FLOAT_EXTEND:
6949 case FLOAT_TRUNCATE:
6950 convert_move (target, op1, code == ZERO_EXTEND);
6951 return target;
6952
6953 case FIX:
6954 case UNSIGNED_FIX:
6955 expand_fix (target, op1, code == UNSIGNED_FIX);
6956 return target;
6957
6958 case FLOAT:
6959 case UNSIGNED_FLOAT:
6960 expand_float (target, op1, code == UNSIGNED_FLOAT);
6961 return target;
6962
6963 default:
6964 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
6965 }
6966 }
6967
6968 #ifdef INSN_SCHEDULING
6969 /* On machines that have insn scheduling, we want all memory reference to be
6970 explicit, so we need to deal with such paradoxical SUBREGs. */
6971 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
6972 value
6973 = simplify_gen_subreg (GET_MODE (value),
6974 force_reg (GET_MODE (SUBREG_REG (value)),
6975 force_operand (SUBREG_REG (value),
6976 NULL_RTX)),
6977 GET_MODE (SUBREG_REG (value)),
6978 SUBREG_BYTE (value));
6979 #endif
6980
6981 return value;
6982 }
6983 \f
6984 /* Subroutine of expand_expr: return nonzero iff there is no way that
6985 EXP can reference X, which is being modified. TOP_P is nonzero if this
6986 call is going to be used to determine whether we need a temporary
6987 for EXP, as opposed to a recursive call to this function.
6988
6989 It is always safe for this routine to return zero since it merely
6990 searches for optimization opportunities. */
6991
6992 int
6993 safe_from_p (const_rtx x, tree exp, int top_p)
6994 {
6995 rtx exp_rtl = 0;
6996 int i, nops;
6997
6998 if (x == 0
6999 /* If EXP has varying size, we MUST use a target since we currently
7000 have no way of allocating temporaries of variable size
7001 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7002 So we assume here that something at a higher level has prevented a
7003 clash. This is somewhat bogus, but the best we can do. Only
7004 do this when X is BLKmode and when we are at the top level. */
7005 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7006 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7007 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7008 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7009 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7010 != INTEGER_CST)
7011 && GET_MODE (x) == BLKmode)
7012 /* If X is in the outgoing argument area, it is always safe. */
7013 || (MEM_P (x)
7014 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7015 || (GET_CODE (XEXP (x, 0)) == PLUS
7016 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7017 return 1;
7018
7019 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7020 find the underlying pseudo. */
7021 if (GET_CODE (x) == SUBREG)
7022 {
7023 x = SUBREG_REG (x);
7024 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7025 return 0;
7026 }
7027
7028 /* Now look at our tree code and possibly recurse. */
7029 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7030 {
7031 case tcc_declaration:
7032 exp_rtl = DECL_RTL_IF_SET (exp);
7033 break;
7034
7035 case tcc_constant:
7036 return 1;
7037
7038 case tcc_exceptional:
7039 if (TREE_CODE (exp) == TREE_LIST)
7040 {
7041 while (1)
7042 {
7043 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7044 return 0;
7045 exp = TREE_CHAIN (exp);
7046 if (!exp)
7047 return 1;
7048 if (TREE_CODE (exp) != TREE_LIST)
7049 return safe_from_p (x, exp, 0);
7050 }
7051 }
7052 else if (TREE_CODE (exp) == CONSTRUCTOR)
7053 {
7054 constructor_elt *ce;
7055 unsigned HOST_WIDE_INT idx;
7056
7057 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
7058 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7059 || !safe_from_p (x, ce->value, 0))
7060 return 0;
7061 return 1;
7062 }
7063 else if (TREE_CODE (exp) == ERROR_MARK)
7064 return 1; /* An already-visited SAVE_EXPR? */
7065 else
7066 return 0;
7067
7068 case tcc_statement:
7069 /* The only case we look at here is the DECL_INITIAL inside a
7070 DECL_EXPR. */
7071 return (TREE_CODE (exp) != DECL_EXPR
7072 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7073 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7074 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7075
7076 case tcc_binary:
7077 case tcc_comparison:
7078 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7079 return 0;
7080 /* Fall through. */
7081
7082 case tcc_unary:
7083 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7084
7085 case tcc_expression:
7086 case tcc_reference:
7087 case tcc_vl_exp:
7088 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7089 the expression. If it is set, we conflict iff we are that rtx or
7090 both are in memory. Otherwise, we check all operands of the
7091 expression recursively. */
7092
7093 switch (TREE_CODE (exp))
7094 {
7095 case ADDR_EXPR:
7096 /* If the operand is static or we are static, we can't conflict.
7097 Likewise if we don't conflict with the operand at all. */
7098 if (staticp (TREE_OPERAND (exp, 0))
7099 || TREE_STATIC (exp)
7100 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7101 return 1;
7102
7103 /* Otherwise, the only way this can conflict is if we are taking
7104 the address of a DECL a that address if part of X, which is
7105 very rare. */
7106 exp = TREE_OPERAND (exp, 0);
7107 if (DECL_P (exp))
7108 {
7109 if (!DECL_RTL_SET_P (exp)
7110 || !MEM_P (DECL_RTL (exp)))
7111 return 0;
7112 else
7113 exp_rtl = XEXP (DECL_RTL (exp), 0);
7114 }
7115 break;
7116
7117 case MEM_REF:
7118 if (MEM_P (x)
7119 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7120 get_alias_set (exp)))
7121 return 0;
7122 break;
7123
7124 case CALL_EXPR:
7125 /* Assume that the call will clobber all hard registers and
7126 all of memory. */
7127 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7128 || MEM_P (x))
7129 return 0;
7130 break;
7131
7132 case WITH_CLEANUP_EXPR:
7133 case CLEANUP_POINT_EXPR:
7134 /* Lowered by gimplify.c. */
7135 gcc_unreachable ();
7136
7137 case SAVE_EXPR:
7138 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7139
7140 default:
7141 break;
7142 }
7143
7144 /* If we have an rtx, we do not need to scan our operands. */
7145 if (exp_rtl)
7146 break;
7147
7148 nops = TREE_OPERAND_LENGTH (exp);
7149 for (i = 0; i < nops; i++)
7150 if (TREE_OPERAND (exp, i) != 0
7151 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7152 return 0;
7153
7154 break;
7155
7156 case tcc_type:
7157 /* Should never get a type here. */
7158 gcc_unreachable ();
7159 }
7160
7161 /* If we have an rtl, find any enclosed object. Then see if we conflict
7162 with it. */
7163 if (exp_rtl)
7164 {
7165 if (GET_CODE (exp_rtl) == SUBREG)
7166 {
7167 exp_rtl = SUBREG_REG (exp_rtl);
7168 if (REG_P (exp_rtl)
7169 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7170 return 0;
7171 }
7172
7173 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7174 are memory and they conflict. */
7175 return ! (rtx_equal_p (x, exp_rtl)
7176 || (MEM_P (x) && MEM_P (exp_rtl)
7177 && true_dependence (exp_rtl, VOIDmode, x)));
7178 }
7179
7180 /* If we reach here, it is safe. */
7181 return 1;
7182 }
7183
7184 \f
7185 /* Return the highest power of two that EXP is known to be a multiple of.
7186 This is used in updating alignment of MEMs in array references. */
7187
7188 unsigned HOST_WIDE_INT
7189 highest_pow2_factor (const_tree exp)
7190 {
7191 unsigned HOST_WIDE_INT c0, c1;
7192
7193 switch (TREE_CODE (exp))
7194 {
7195 case INTEGER_CST:
7196 /* We can find the lowest bit that's a one. If the low
7197 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7198 We need to handle this case since we can find it in a COND_EXPR,
7199 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7200 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7201 later ICE. */
7202 if (TREE_OVERFLOW (exp))
7203 return BIGGEST_ALIGNMENT;
7204 else
7205 {
7206 /* Note: tree_low_cst is intentionally not used here,
7207 we don't care about the upper bits. */
7208 c0 = TREE_INT_CST_LOW (exp);
7209 c0 &= -c0;
7210 return c0 ? c0 : BIGGEST_ALIGNMENT;
7211 }
7212 break;
7213
7214 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7215 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7216 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7217 return MIN (c0, c1);
7218
7219 case MULT_EXPR:
7220 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7221 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7222 return c0 * c1;
7223
7224 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7225 case CEIL_DIV_EXPR:
7226 if (integer_pow2p (TREE_OPERAND (exp, 1))
7227 && host_integerp (TREE_OPERAND (exp, 1), 1))
7228 {
7229 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7230 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7231 return MAX (1, c0 / c1);
7232 }
7233 break;
7234
7235 case BIT_AND_EXPR:
7236 /* The highest power of two of a bit-and expression is the maximum of
7237 that of its operands. We typically get here for a complex LHS and
7238 a constant negative power of two on the RHS to force an explicit
7239 alignment, so don't bother looking at the LHS. */
7240 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7241
7242 CASE_CONVERT:
7243 case SAVE_EXPR:
7244 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7245
7246 case COMPOUND_EXPR:
7247 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7248
7249 case COND_EXPR:
7250 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7251 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7252 return MIN (c0, c1);
7253
7254 default:
7255 break;
7256 }
7257
7258 return 1;
7259 }
7260
7261 /* Similar, except that the alignment requirements of TARGET are
7262 taken into account. Assume it is at least as aligned as its
7263 type, unless it is a COMPONENT_REF in which case the layout of
7264 the structure gives the alignment. */
7265
7266 static unsigned HOST_WIDE_INT
7267 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7268 {
7269 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7270 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7271
7272 return MAX (factor, talign);
7273 }
7274 \f
7275 /* Subroutine of expand_expr. Expand the two operands of a binary
7276 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7277 The value may be stored in TARGET if TARGET is nonzero. The
7278 MODIFIER argument is as documented by expand_expr. */
7279
7280 static void
7281 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7282 enum expand_modifier modifier)
7283 {
7284 if (! safe_from_p (target, exp1, 1))
7285 target = 0;
7286 if (operand_equal_p (exp0, exp1, 0))
7287 {
7288 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7289 *op1 = copy_rtx (*op0);
7290 }
7291 else
7292 {
7293 /* If we need to preserve evaluation order, copy exp0 into its own
7294 temporary variable so that it can't be clobbered by exp1. */
7295 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7296 exp0 = save_expr (exp0);
7297 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7298 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7299 }
7300 }
7301
7302 \f
7303 /* Return a MEM that contains constant EXP. DEFER is as for
7304 output_constant_def and MODIFIER is as for expand_expr. */
7305
7306 static rtx
7307 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7308 {
7309 rtx mem;
7310
7311 mem = output_constant_def (exp, defer);
7312 if (modifier != EXPAND_INITIALIZER)
7313 mem = use_anchored_address (mem);
7314 return mem;
7315 }
7316
7317 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7318 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7319
7320 static rtx
7321 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7322 enum expand_modifier modifier, addr_space_t as)
7323 {
7324 rtx result, subtarget;
7325 tree inner, offset;
7326 HOST_WIDE_INT bitsize, bitpos;
7327 int volatilep, unsignedp;
7328 enum machine_mode mode1;
7329
7330 /* If we are taking the address of a constant and are at the top level,
7331 we have to use output_constant_def since we can't call force_const_mem
7332 at top level. */
7333 /* ??? This should be considered a front-end bug. We should not be
7334 generating ADDR_EXPR of something that isn't an LVALUE. The only
7335 exception here is STRING_CST. */
7336 if (CONSTANT_CLASS_P (exp))
7337 {
7338 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7339 if (modifier < EXPAND_SUM)
7340 result = force_operand (result, target);
7341 return result;
7342 }
7343
7344 /* Everything must be something allowed by is_gimple_addressable. */
7345 switch (TREE_CODE (exp))
7346 {
7347 case INDIRECT_REF:
7348 /* This case will happen via recursion for &a->b. */
7349 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7350
7351 case MEM_REF:
7352 {
7353 tree tem = TREE_OPERAND (exp, 0);
7354 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7355 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7356 return expand_expr (tem, target, tmode, modifier);
7357 }
7358
7359 case CONST_DECL:
7360 /* Expand the initializer like constants above. */
7361 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7362 0, modifier), 0);
7363 if (modifier < EXPAND_SUM)
7364 result = force_operand (result, target);
7365 return result;
7366
7367 case REALPART_EXPR:
7368 /* The real part of the complex number is always first, therefore
7369 the address is the same as the address of the parent object. */
7370 offset = 0;
7371 bitpos = 0;
7372 inner = TREE_OPERAND (exp, 0);
7373 break;
7374
7375 case IMAGPART_EXPR:
7376 /* The imaginary part of the complex number is always second.
7377 The expression is therefore always offset by the size of the
7378 scalar type. */
7379 offset = 0;
7380 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7381 inner = TREE_OPERAND (exp, 0);
7382 break;
7383
7384 default:
7385 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7386 expand_expr, as that can have various side effects; LABEL_DECLs for
7387 example, may not have their DECL_RTL set yet. Expand the rtl of
7388 CONSTRUCTORs too, which should yield a memory reference for the
7389 constructor's contents. Assume language specific tree nodes can
7390 be expanded in some interesting way. */
7391 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7392 if (DECL_P (exp)
7393 || TREE_CODE (exp) == CONSTRUCTOR
7394 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7395 {
7396 result = expand_expr (exp, target, tmode,
7397 modifier == EXPAND_INITIALIZER
7398 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7399
7400 /* If the DECL isn't in memory, then the DECL wasn't properly
7401 marked TREE_ADDRESSABLE, which will be either a front-end
7402 or a tree optimizer bug. */
7403
7404 if (TREE_ADDRESSABLE (exp)
7405 && ! MEM_P (result)
7406 && ! targetm.calls.allocate_stack_slots_for_args())
7407 {
7408 error ("local frame unavailable (naked function?)");
7409 return result;
7410 }
7411 else
7412 gcc_assert (MEM_P (result));
7413 result = XEXP (result, 0);
7414
7415 /* ??? Is this needed anymore? */
7416 if (DECL_P (exp) && !TREE_USED (exp) == 0)
7417 {
7418 assemble_external (exp);
7419 TREE_USED (exp) = 1;
7420 }
7421
7422 if (modifier != EXPAND_INITIALIZER
7423 && modifier != EXPAND_CONST_ADDRESS
7424 && modifier != EXPAND_SUM)
7425 result = force_operand (result, target);
7426 return result;
7427 }
7428
7429 /* Pass FALSE as the last argument to get_inner_reference although
7430 we are expanding to RTL. The rationale is that we know how to
7431 handle "aligning nodes" here: we can just bypass them because
7432 they won't change the final object whose address will be returned
7433 (they actually exist only for that purpose). */
7434 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7435 &mode1, &unsignedp, &volatilep, false);
7436 break;
7437 }
7438
7439 /* We must have made progress. */
7440 gcc_assert (inner != exp);
7441
7442 subtarget = offset || bitpos ? NULL_RTX : target;
7443 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7444 inner alignment, force the inner to be sufficiently aligned. */
7445 if (CONSTANT_CLASS_P (inner)
7446 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7447 {
7448 inner = copy_node (inner);
7449 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7450 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7451 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7452 }
7453 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7454
7455 if (offset)
7456 {
7457 rtx tmp;
7458
7459 if (modifier != EXPAND_NORMAL)
7460 result = force_operand (result, NULL);
7461 tmp = expand_expr (offset, NULL_RTX, tmode,
7462 modifier == EXPAND_INITIALIZER
7463 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7464
7465 result = convert_memory_address_addr_space (tmode, result, as);
7466 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7467
7468 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7469 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7470 else
7471 {
7472 subtarget = bitpos ? NULL_RTX : target;
7473 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7474 1, OPTAB_LIB_WIDEN);
7475 }
7476 }
7477
7478 if (bitpos)
7479 {
7480 /* Someone beforehand should have rejected taking the address
7481 of such an object. */
7482 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7483
7484 result = plus_constant (result, bitpos / BITS_PER_UNIT);
7485 if (modifier < EXPAND_SUM)
7486 result = force_operand (result, target);
7487 }
7488
7489 return result;
7490 }
7491
7492 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7493 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7494
7495 static rtx
7496 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7497 enum expand_modifier modifier)
7498 {
7499 addr_space_t as = ADDR_SPACE_GENERIC;
7500 enum machine_mode address_mode = Pmode;
7501 enum machine_mode pointer_mode = ptr_mode;
7502 enum machine_mode rmode;
7503 rtx result;
7504
7505 /* Target mode of VOIDmode says "whatever's natural". */
7506 if (tmode == VOIDmode)
7507 tmode = TYPE_MODE (TREE_TYPE (exp));
7508
7509 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7510 {
7511 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7512 address_mode = targetm.addr_space.address_mode (as);
7513 pointer_mode = targetm.addr_space.pointer_mode (as);
7514 }
7515
7516 /* We can get called with some Weird Things if the user does silliness
7517 like "(short) &a". In that case, convert_memory_address won't do
7518 the right thing, so ignore the given target mode. */
7519 if (tmode != address_mode && tmode != pointer_mode)
7520 tmode = address_mode;
7521
7522 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7523 tmode, modifier, as);
7524
7525 /* Despite expand_expr claims concerning ignoring TMODE when not
7526 strictly convenient, stuff breaks if we don't honor it. Note
7527 that combined with the above, we only do this for pointer modes. */
7528 rmode = GET_MODE (result);
7529 if (rmode == VOIDmode)
7530 rmode = tmode;
7531 if (rmode != tmode)
7532 result = convert_memory_address_addr_space (tmode, result, as);
7533
7534 return result;
7535 }
7536
7537 /* Generate code for computing CONSTRUCTOR EXP.
7538 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7539 is TRUE, instead of creating a temporary variable in memory
7540 NULL is returned and the caller needs to handle it differently. */
7541
7542 static rtx
7543 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7544 bool avoid_temp_mem)
7545 {
7546 tree type = TREE_TYPE (exp);
7547 enum machine_mode mode = TYPE_MODE (type);
7548
7549 /* Try to avoid creating a temporary at all. This is possible
7550 if all of the initializer is zero.
7551 FIXME: try to handle all [0..255] initializers we can handle
7552 with memset. */
7553 if (TREE_STATIC (exp)
7554 && !TREE_ADDRESSABLE (exp)
7555 && target != 0 && mode == BLKmode
7556 && all_zeros_p (exp))
7557 {
7558 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7559 return target;
7560 }
7561
7562 /* All elts simple constants => refer to a constant in memory. But
7563 if this is a non-BLKmode mode, let it store a field at a time
7564 since that should make a CONST_INT or CONST_DOUBLE when we
7565 fold. Likewise, if we have a target we can use, it is best to
7566 store directly into the target unless the type is large enough
7567 that memcpy will be used. If we are making an initializer and
7568 all operands are constant, put it in memory as well.
7569
7570 FIXME: Avoid trying to fill vector constructors piece-meal.
7571 Output them with output_constant_def below unless we're sure
7572 they're zeros. This should go away when vector initializers
7573 are treated like VECTOR_CST instead of arrays. */
7574 if ((TREE_STATIC (exp)
7575 && ((mode == BLKmode
7576 && ! (target != 0 && safe_from_p (target, exp, 1)))
7577 || TREE_ADDRESSABLE (exp)
7578 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7579 && (! MOVE_BY_PIECES_P
7580 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7581 TYPE_ALIGN (type)))
7582 && ! mostly_zeros_p (exp))))
7583 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7584 && TREE_CONSTANT (exp)))
7585 {
7586 rtx constructor;
7587
7588 if (avoid_temp_mem)
7589 return NULL_RTX;
7590
7591 constructor = expand_expr_constant (exp, 1, modifier);
7592
7593 if (modifier != EXPAND_CONST_ADDRESS
7594 && modifier != EXPAND_INITIALIZER
7595 && modifier != EXPAND_SUM)
7596 constructor = validize_mem (constructor);
7597
7598 return constructor;
7599 }
7600
7601 /* Handle calls that pass values in multiple non-contiguous
7602 locations. The Irix 6 ABI has examples of this. */
7603 if (target == 0 || ! safe_from_p (target, exp, 1)
7604 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7605 {
7606 if (avoid_temp_mem)
7607 return NULL_RTX;
7608
7609 target
7610 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7611 | (TREE_READONLY (exp)
7612 * TYPE_QUAL_CONST))),
7613 0, TREE_ADDRESSABLE (exp), 1);
7614 }
7615
7616 store_constructor (exp, target, 0, int_expr_size (exp));
7617 return target;
7618 }
7619
7620
7621 /* expand_expr: generate code for computing expression EXP.
7622 An rtx for the computed value is returned. The value is never null.
7623 In the case of a void EXP, const0_rtx is returned.
7624
7625 The value may be stored in TARGET if TARGET is nonzero.
7626 TARGET is just a suggestion; callers must assume that
7627 the rtx returned may not be the same as TARGET.
7628
7629 If TARGET is CONST0_RTX, it means that the value will be ignored.
7630
7631 If TMODE is not VOIDmode, it suggests generating the
7632 result in mode TMODE. But this is done only when convenient.
7633 Otherwise, TMODE is ignored and the value generated in its natural mode.
7634 TMODE is just a suggestion; callers must assume that
7635 the rtx returned may not have mode TMODE.
7636
7637 Note that TARGET may have neither TMODE nor MODE. In that case, it
7638 probably will not be used.
7639
7640 If MODIFIER is EXPAND_SUM then when EXP is an addition
7641 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7642 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7643 products as above, or REG or MEM, or constant.
7644 Ordinarily in such cases we would output mul or add instructions
7645 and then return a pseudo reg containing the sum.
7646
7647 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7648 it also marks a label as absolutely required (it can't be dead).
7649 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7650 This is used for outputting expressions used in initializers.
7651
7652 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7653 with a constant address even if that address is not normally legitimate.
7654 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7655
7656 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7657 a call parameter. Such targets require special care as we haven't yet
7658 marked TARGET so that it's safe from being trashed by libcalls. We
7659 don't want to use TARGET for anything but the final result;
7660 Intermediate values must go elsewhere. Additionally, calls to
7661 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7662
7663 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7664 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7665 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7666 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7667 recursively. */
7668
7669 rtx
7670 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7671 enum expand_modifier modifier, rtx *alt_rtl)
7672 {
7673 rtx ret;
7674
7675 /* Handle ERROR_MARK before anybody tries to access its type. */
7676 if (TREE_CODE (exp) == ERROR_MARK
7677 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7678 {
7679 ret = CONST0_RTX (tmode);
7680 return ret ? ret : const0_rtx;
7681 }
7682
7683 /* If this is an expression of some kind and it has an associated line
7684 number, then emit the line number before expanding the expression.
7685
7686 We need to save and restore the file and line information so that
7687 errors discovered during expansion are emitted with the right
7688 information. It would be better of the diagnostic routines
7689 used the file/line information embedded in the tree nodes rather
7690 than globals. */
7691 if (cfun && EXPR_HAS_LOCATION (exp))
7692 {
7693 location_t saved_location = input_location;
7694 location_t saved_curr_loc = get_curr_insn_source_location ();
7695 tree saved_block = get_curr_insn_block ();
7696 input_location = EXPR_LOCATION (exp);
7697 set_curr_insn_source_location (input_location);
7698
7699 /* Record where the insns produced belong. */
7700 set_curr_insn_block (TREE_BLOCK (exp));
7701
7702 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7703
7704 input_location = saved_location;
7705 set_curr_insn_block (saved_block);
7706 set_curr_insn_source_location (saved_curr_loc);
7707 }
7708 else
7709 {
7710 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7711 }
7712
7713 return ret;
7714 }
7715
7716 rtx
7717 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7718 enum expand_modifier modifier)
7719 {
7720 rtx op0, op1, op2, temp;
7721 tree type;
7722 int unsignedp;
7723 enum machine_mode mode;
7724 enum tree_code code = ops->code;
7725 optab this_optab;
7726 rtx subtarget, original_target;
7727 int ignore;
7728 bool reduce_bit_field;
7729 location_t loc = ops->location;
7730 tree treeop0, treeop1, treeop2;
7731 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7732 ? reduce_to_bit_field_precision ((expr), \
7733 target, \
7734 type) \
7735 : (expr))
7736
7737 type = ops->type;
7738 mode = TYPE_MODE (type);
7739 unsignedp = TYPE_UNSIGNED (type);
7740
7741 treeop0 = ops->op0;
7742 treeop1 = ops->op1;
7743 treeop2 = ops->op2;
7744
7745 /* We should be called only on simple (binary or unary) expressions,
7746 exactly those that are valid in gimple expressions that aren't
7747 GIMPLE_SINGLE_RHS (or invalid). */
7748 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7749 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7750 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7751
7752 ignore = (target == const0_rtx
7753 || ((CONVERT_EXPR_CODE_P (code)
7754 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7755 && TREE_CODE (type) == VOID_TYPE));
7756
7757 /* We should be called only if we need the result. */
7758 gcc_assert (!ignore);
7759
7760 /* An operation in what may be a bit-field type needs the
7761 result to be reduced to the precision of the bit-field type,
7762 which is narrower than that of the type's mode. */
7763 reduce_bit_field = (INTEGRAL_TYPE_P (type)
7764 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7765
7766 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7767 target = 0;
7768
7769 /* Use subtarget as the target for operand 0 of a binary operation. */
7770 subtarget = get_subtarget (target);
7771 original_target = target;
7772
7773 switch (code)
7774 {
7775 case NON_LVALUE_EXPR:
7776 case PAREN_EXPR:
7777 CASE_CONVERT:
7778 if (treeop0 == error_mark_node)
7779 return const0_rtx;
7780
7781 if (TREE_CODE (type) == UNION_TYPE)
7782 {
7783 tree valtype = TREE_TYPE (treeop0);
7784
7785 /* If both input and output are BLKmode, this conversion isn't doing
7786 anything except possibly changing memory attribute. */
7787 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7788 {
7789 rtx result = expand_expr (treeop0, target, tmode,
7790 modifier);
7791
7792 result = copy_rtx (result);
7793 set_mem_attributes (result, type, 0);
7794 return result;
7795 }
7796
7797 if (target == 0)
7798 {
7799 if (TYPE_MODE (type) != BLKmode)
7800 target = gen_reg_rtx (TYPE_MODE (type));
7801 else
7802 target = assign_temp (type, 0, 1, 1);
7803 }
7804
7805 if (MEM_P (target))
7806 /* Store data into beginning of memory target. */
7807 store_expr (treeop0,
7808 adjust_address (target, TYPE_MODE (valtype), 0),
7809 modifier == EXPAND_STACK_PARM,
7810 false);
7811
7812 else
7813 {
7814 gcc_assert (REG_P (target));
7815
7816 /* Store this field into a union of the proper type. */
7817 store_field (target,
7818 MIN ((int_size_in_bytes (TREE_TYPE
7819 (treeop0))
7820 * BITS_PER_UNIT),
7821 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7822 0, 0, 0, TYPE_MODE (valtype), treeop0,
7823 type, 0, false);
7824 }
7825
7826 /* Return the entire union. */
7827 return target;
7828 }
7829
7830 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
7831 {
7832 op0 = expand_expr (treeop0, target, VOIDmode,
7833 modifier);
7834
7835 /* If the signedness of the conversion differs and OP0 is
7836 a promoted SUBREG, clear that indication since we now
7837 have to do the proper extension. */
7838 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
7839 && GET_CODE (op0) == SUBREG)
7840 SUBREG_PROMOTED_VAR_P (op0) = 0;
7841
7842 return REDUCE_BIT_FIELD (op0);
7843 }
7844
7845 op0 = expand_expr (treeop0, NULL_RTX, mode,
7846 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
7847 if (GET_MODE (op0) == mode)
7848 ;
7849
7850 /* If OP0 is a constant, just convert it into the proper mode. */
7851 else if (CONSTANT_P (op0))
7852 {
7853 tree inner_type = TREE_TYPE (treeop0);
7854 enum machine_mode inner_mode = GET_MODE (op0);
7855
7856 if (inner_mode == VOIDmode)
7857 inner_mode = TYPE_MODE (inner_type);
7858
7859 if (modifier == EXPAND_INITIALIZER)
7860 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7861 subreg_lowpart_offset (mode,
7862 inner_mode));
7863 else
7864 op0= convert_modes (mode, inner_mode, op0,
7865 TYPE_UNSIGNED (inner_type));
7866 }
7867
7868 else if (modifier == EXPAND_INITIALIZER)
7869 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7870
7871 else if (target == 0)
7872 op0 = convert_to_mode (mode, op0,
7873 TYPE_UNSIGNED (TREE_TYPE
7874 (treeop0)));
7875 else
7876 {
7877 convert_move (target, op0,
7878 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7879 op0 = target;
7880 }
7881
7882 return REDUCE_BIT_FIELD (op0);
7883
7884 case ADDR_SPACE_CONVERT_EXPR:
7885 {
7886 tree treeop0_type = TREE_TYPE (treeop0);
7887 addr_space_t as_to;
7888 addr_space_t as_from;
7889
7890 gcc_assert (POINTER_TYPE_P (type));
7891 gcc_assert (POINTER_TYPE_P (treeop0_type));
7892
7893 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
7894 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
7895
7896 /* Conversions between pointers to the same address space should
7897 have been implemented via CONVERT_EXPR / NOP_EXPR. */
7898 gcc_assert (as_to != as_from);
7899
7900 /* Ask target code to handle conversion between pointers
7901 to overlapping address spaces. */
7902 if (targetm.addr_space.subset_p (as_to, as_from)
7903 || targetm.addr_space.subset_p (as_from, as_to))
7904 {
7905 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
7906 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
7907 gcc_assert (op0);
7908 return op0;
7909 }
7910
7911 /* For disjoint address spaces, converting anything but
7912 a null pointer invokes undefined behaviour. We simply
7913 always return a null pointer here. */
7914 return CONST0_RTX (mode);
7915 }
7916
7917 case POINTER_PLUS_EXPR:
7918 /* Even though the sizetype mode and the pointer's mode can be different
7919 expand is able to handle this correctly and get the correct result out
7920 of the PLUS_EXPR code. */
7921 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
7922 if sizetype precision is smaller than pointer precision. */
7923 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
7924 treeop1 = fold_convert_loc (loc, type,
7925 fold_convert_loc (loc, ssizetype,
7926 treeop1));
7927 case PLUS_EXPR:
7928 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7929 something else, make sure we add the register to the constant and
7930 then to the other thing. This case can occur during strength
7931 reduction and doing it this way will produce better code if the
7932 frame pointer or argument pointer is eliminated.
7933
7934 fold-const.c will ensure that the constant is always in the inner
7935 PLUS_EXPR, so the only case we need to do anything about is if
7936 sp, ap, or fp is our second argument, in which case we must swap
7937 the innermost first argument and our second argument. */
7938
7939 if (TREE_CODE (treeop0) == PLUS_EXPR
7940 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
7941 && TREE_CODE (treeop1) == VAR_DECL
7942 && (DECL_RTL (treeop1) == frame_pointer_rtx
7943 || DECL_RTL (treeop1) == stack_pointer_rtx
7944 || DECL_RTL (treeop1) == arg_pointer_rtx))
7945 {
7946 tree t = treeop1;
7947
7948 treeop1 = TREE_OPERAND (treeop0, 0);
7949 TREE_OPERAND (treeop0, 0) = t;
7950 }
7951
7952 /* If the result is to be ptr_mode and we are adding an integer to
7953 something, we might be forming a constant. So try to use
7954 plus_constant. If it produces a sum and we can't accept it,
7955 use force_operand. This allows P = &ARR[const] to generate
7956 efficient code on machines where a SYMBOL_REF is not a valid
7957 address.
7958
7959 If this is an EXPAND_SUM call, always return the sum. */
7960 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7961 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
7962 {
7963 if (modifier == EXPAND_STACK_PARM)
7964 target = 0;
7965 if (TREE_CODE (treeop0) == INTEGER_CST
7966 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7967 && TREE_CONSTANT (treeop1))
7968 {
7969 rtx constant_part;
7970
7971 op1 = expand_expr (treeop1, subtarget, VOIDmode,
7972 EXPAND_SUM);
7973 /* Use immed_double_const to ensure that the constant is
7974 truncated according to the mode of OP1, then sign extended
7975 to a HOST_WIDE_INT. Using the constant directly can result
7976 in non-canonical RTL in a 64x32 cross compile. */
7977 constant_part
7978 = immed_double_const (TREE_INT_CST_LOW (treeop0),
7979 (HOST_WIDE_INT) 0,
7980 TYPE_MODE (TREE_TYPE (treeop1)));
7981 op1 = plus_constant (op1, INTVAL (constant_part));
7982 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7983 op1 = force_operand (op1, target);
7984 return REDUCE_BIT_FIELD (op1);
7985 }
7986
7987 else if (TREE_CODE (treeop1) == INTEGER_CST
7988 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7989 && TREE_CONSTANT (treeop0))
7990 {
7991 rtx constant_part;
7992
7993 op0 = expand_expr (treeop0, subtarget, VOIDmode,
7994 (modifier == EXPAND_INITIALIZER
7995 ? EXPAND_INITIALIZER : EXPAND_SUM));
7996 if (! CONSTANT_P (op0))
7997 {
7998 op1 = expand_expr (treeop1, NULL_RTX,
7999 VOIDmode, modifier);
8000 /* Return a PLUS if modifier says it's OK. */
8001 if (modifier == EXPAND_SUM
8002 || modifier == EXPAND_INITIALIZER)
8003 return simplify_gen_binary (PLUS, mode, op0, op1);
8004 goto binop2;
8005 }
8006 /* Use immed_double_const to ensure that the constant is
8007 truncated according to the mode of OP1, then sign extended
8008 to a HOST_WIDE_INT. Using the constant directly can result
8009 in non-canonical RTL in a 64x32 cross compile. */
8010 constant_part
8011 = immed_double_const (TREE_INT_CST_LOW (treeop1),
8012 (HOST_WIDE_INT) 0,
8013 TYPE_MODE (TREE_TYPE (treeop0)));
8014 op0 = plus_constant (op0, INTVAL (constant_part));
8015 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8016 op0 = force_operand (op0, target);
8017 return REDUCE_BIT_FIELD (op0);
8018 }
8019 }
8020
8021 /* Use TER to expand pointer addition of a negated value
8022 as pointer subtraction. */
8023 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8024 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8025 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8026 && TREE_CODE (treeop1) == SSA_NAME
8027 && TYPE_MODE (TREE_TYPE (treeop0))
8028 == TYPE_MODE (TREE_TYPE (treeop1)))
8029 {
8030 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8031 if (def)
8032 {
8033 treeop1 = gimple_assign_rhs1 (def);
8034 code = MINUS_EXPR;
8035 goto do_minus;
8036 }
8037 }
8038
8039 /* No sense saving up arithmetic to be done
8040 if it's all in the wrong mode to form part of an address.
8041 And force_operand won't know whether to sign-extend or
8042 zero-extend. */
8043 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8044 || mode != ptr_mode)
8045 {
8046 expand_operands (treeop0, treeop1,
8047 subtarget, &op0, &op1, EXPAND_NORMAL);
8048 if (op0 == const0_rtx)
8049 return op1;
8050 if (op1 == const0_rtx)
8051 return op0;
8052 goto binop2;
8053 }
8054
8055 expand_operands (treeop0, treeop1,
8056 subtarget, &op0, &op1, modifier);
8057 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8058
8059 case MINUS_EXPR:
8060 do_minus:
8061 /* For initializers, we are allowed to return a MINUS of two
8062 symbolic constants. Here we handle all cases when both operands
8063 are constant. */
8064 /* Handle difference of two symbolic constants,
8065 for the sake of an initializer. */
8066 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8067 && really_constant_p (treeop0)
8068 && really_constant_p (treeop1))
8069 {
8070 expand_operands (treeop0, treeop1,
8071 NULL_RTX, &op0, &op1, modifier);
8072
8073 /* If the last operand is a CONST_INT, use plus_constant of
8074 the negated constant. Else make the MINUS. */
8075 if (CONST_INT_P (op1))
8076 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
8077 else
8078 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8079 }
8080
8081 /* No sense saving up arithmetic to be done
8082 if it's all in the wrong mode to form part of an address.
8083 And force_operand won't know whether to sign-extend or
8084 zero-extend. */
8085 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8086 || mode != ptr_mode)
8087 goto binop;
8088
8089 expand_operands (treeop0, treeop1,
8090 subtarget, &op0, &op1, modifier);
8091
8092 /* Convert A - const to A + (-const). */
8093 if (CONST_INT_P (op1))
8094 {
8095 op1 = negate_rtx (mode, op1);
8096 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8097 }
8098
8099 goto binop2;
8100
8101 case WIDEN_MULT_PLUS_EXPR:
8102 case WIDEN_MULT_MINUS_EXPR:
8103 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8104 op2 = expand_normal (treeop2);
8105 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8106 target, unsignedp);
8107 return target;
8108
8109 case WIDEN_MULT_EXPR:
8110 /* If first operand is constant, swap them.
8111 Thus the following special case checks need only
8112 check the second operand. */
8113 if (TREE_CODE (treeop0) == INTEGER_CST)
8114 {
8115 tree t1 = treeop0;
8116 treeop0 = treeop1;
8117 treeop1 = t1;
8118 }
8119
8120 /* First, check if we have a multiplication of one signed and one
8121 unsigned operand. */
8122 if (TREE_CODE (treeop1) != INTEGER_CST
8123 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8124 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8125 {
8126 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8127 this_optab = usmul_widen_optab;
8128 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8129 != CODE_FOR_nothing)
8130 {
8131 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8132 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8133 EXPAND_NORMAL);
8134 else
8135 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8136 EXPAND_NORMAL);
8137 goto binop3;
8138 }
8139 }
8140 /* Check for a multiplication with matching signedness. */
8141 else if ((TREE_CODE (treeop1) == INTEGER_CST
8142 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8143 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8144 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8145 {
8146 tree op0type = TREE_TYPE (treeop0);
8147 enum machine_mode innermode = TYPE_MODE (op0type);
8148 bool zextend_p = TYPE_UNSIGNED (op0type);
8149 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8150 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8151
8152 if (TREE_CODE (treeop0) != INTEGER_CST)
8153 {
8154 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8155 != CODE_FOR_nothing)
8156 {
8157 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8158 EXPAND_NORMAL);
8159 temp = expand_widening_mult (mode, op0, op1, target,
8160 unsignedp, this_optab);
8161 return REDUCE_BIT_FIELD (temp);
8162 }
8163 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8164 != CODE_FOR_nothing
8165 && innermode == word_mode)
8166 {
8167 rtx htem, hipart;
8168 op0 = expand_normal (treeop0);
8169 if (TREE_CODE (treeop1) == INTEGER_CST)
8170 op1 = convert_modes (innermode, mode,
8171 expand_normal (treeop1), unsignedp);
8172 else
8173 op1 = expand_normal (treeop1);
8174 temp = expand_binop (mode, other_optab, op0, op1, target,
8175 unsignedp, OPTAB_LIB_WIDEN);
8176 hipart = gen_highpart (innermode, temp);
8177 htem = expand_mult_highpart_adjust (innermode, hipart,
8178 op0, op1, hipart,
8179 zextend_p);
8180 if (htem != hipart)
8181 emit_move_insn (hipart, htem);
8182 return REDUCE_BIT_FIELD (temp);
8183 }
8184 }
8185 }
8186 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8187 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8188 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8189 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8190
8191 case FMA_EXPR:
8192 {
8193 optab opt = fma_optab;
8194 gimple def0, def2;
8195
8196 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8197 call. */
8198 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8199 {
8200 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8201 tree call_expr;
8202
8203 gcc_assert (fn != NULL_TREE);
8204 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8205 return expand_builtin (call_expr, target, subtarget, mode, false);
8206 }
8207
8208 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8209 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8210
8211 op0 = op2 = NULL;
8212
8213 if (def0 && def2
8214 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8215 {
8216 opt = fnms_optab;
8217 op0 = expand_normal (gimple_assign_rhs1 (def0));
8218 op2 = expand_normal (gimple_assign_rhs1 (def2));
8219 }
8220 else if (def0
8221 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8222 {
8223 opt = fnma_optab;
8224 op0 = expand_normal (gimple_assign_rhs1 (def0));
8225 }
8226 else if (def2
8227 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8228 {
8229 opt = fms_optab;
8230 op2 = expand_normal (gimple_assign_rhs1 (def2));
8231 }
8232
8233 if (op0 == NULL)
8234 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8235 if (op2 == NULL)
8236 op2 = expand_normal (treeop2);
8237 op1 = expand_normal (treeop1);
8238
8239 return expand_ternary_op (TYPE_MODE (type), opt,
8240 op0, op1, op2, target, 0);
8241 }
8242
8243 case MULT_EXPR:
8244 /* If this is a fixed-point operation, then we cannot use the code
8245 below because "expand_mult" doesn't support sat/no-sat fixed-point
8246 multiplications. */
8247 if (ALL_FIXED_POINT_MODE_P (mode))
8248 goto binop;
8249
8250 /* If first operand is constant, swap them.
8251 Thus the following special case checks need only
8252 check the second operand. */
8253 if (TREE_CODE (treeop0) == INTEGER_CST)
8254 {
8255 tree t1 = treeop0;
8256 treeop0 = treeop1;
8257 treeop1 = t1;
8258 }
8259
8260 /* Attempt to return something suitable for generating an
8261 indexed address, for machines that support that. */
8262
8263 if (modifier == EXPAND_SUM && mode == ptr_mode
8264 && host_integerp (treeop1, 0))
8265 {
8266 tree exp1 = treeop1;
8267
8268 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8269 EXPAND_SUM);
8270
8271 if (!REG_P (op0))
8272 op0 = force_operand (op0, NULL_RTX);
8273 if (!REG_P (op0))
8274 op0 = copy_to_mode_reg (mode, op0);
8275
8276 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8277 gen_int_mode (tree_low_cst (exp1, 0),
8278 TYPE_MODE (TREE_TYPE (exp1)))));
8279 }
8280
8281 if (modifier == EXPAND_STACK_PARM)
8282 target = 0;
8283
8284 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8285 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8286
8287 case TRUNC_DIV_EXPR:
8288 case FLOOR_DIV_EXPR:
8289 case CEIL_DIV_EXPR:
8290 case ROUND_DIV_EXPR:
8291 case EXACT_DIV_EXPR:
8292 /* If this is a fixed-point operation, then we cannot use the code
8293 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8294 divisions. */
8295 if (ALL_FIXED_POINT_MODE_P (mode))
8296 goto binop;
8297
8298 if (modifier == EXPAND_STACK_PARM)
8299 target = 0;
8300 /* Possible optimization: compute the dividend with EXPAND_SUM
8301 then if the divisor is constant can optimize the case
8302 where some terms of the dividend have coeffs divisible by it. */
8303 expand_operands (treeop0, treeop1,
8304 subtarget, &op0, &op1, EXPAND_NORMAL);
8305 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8306
8307 case RDIV_EXPR:
8308 goto binop;
8309
8310 case TRUNC_MOD_EXPR:
8311 case FLOOR_MOD_EXPR:
8312 case CEIL_MOD_EXPR:
8313 case ROUND_MOD_EXPR:
8314 if (modifier == EXPAND_STACK_PARM)
8315 target = 0;
8316 expand_operands (treeop0, treeop1,
8317 subtarget, &op0, &op1, EXPAND_NORMAL);
8318 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8319
8320 case FIXED_CONVERT_EXPR:
8321 op0 = expand_normal (treeop0);
8322 if (target == 0 || modifier == EXPAND_STACK_PARM)
8323 target = gen_reg_rtx (mode);
8324
8325 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8326 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8327 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8328 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8329 else
8330 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8331 return target;
8332
8333 case FIX_TRUNC_EXPR:
8334 op0 = expand_normal (treeop0);
8335 if (target == 0 || modifier == EXPAND_STACK_PARM)
8336 target = gen_reg_rtx (mode);
8337 expand_fix (target, op0, unsignedp);
8338 return target;
8339
8340 case FLOAT_EXPR:
8341 op0 = expand_normal (treeop0);
8342 if (target == 0 || modifier == EXPAND_STACK_PARM)
8343 target = gen_reg_rtx (mode);
8344 /* expand_float can't figure out what to do if FROM has VOIDmode.
8345 So give it the correct mode. With -O, cse will optimize this. */
8346 if (GET_MODE (op0) == VOIDmode)
8347 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8348 op0);
8349 expand_float (target, op0,
8350 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8351 return target;
8352
8353 case NEGATE_EXPR:
8354 op0 = expand_expr (treeop0, subtarget,
8355 VOIDmode, EXPAND_NORMAL);
8356 if (modifier == EXPAND_STACK_PARM)
8357 target = 0;
8358 temp = expand_unop (mode,
8359 optab_for_tree_code (NEGATE_EXPR, type,
8360 optab_default),
8361 op0, target, 0);
8362 gcc_assert (temp);
8363 return REDUCE_BIT_FIELD (temp);
8364
8365 case ABS_EXPR:
8366 op0 = expand_expr (treeop0, subtarget,
8367 VOIDmode, EXPAND_NORMAL);
8368 if (modifier == EXPAND_STACK_PARM)
8369 target = 0;
8370
8371 /* ABS_EXPR is not valid for complex arguments. */
8372 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8373 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8374
8375 /* Unsigned abs is simply the operand. Testing here means we don't
8376 risk generating incorrect code below. */
8377 if (TYPE_UNSIGNED (type))
8378 return op0;
8379
8380 return expand_abs (mode, op0, target, unsignedp,
8381 safe_from_p (target, treeop0, 1));
8382
8383 case MAX_EXPR:
8384 case MIN_EXPR:
8385 target = original_target;
8386 if (target == 0
8387 || modifier == EXPAND_STACK_PARM
8388 || (MEM_P (target) && MEM_VOLATILE_P (target))
8389 || GET_MODE (target) != mode
8390 || (REG_P (target)
8391 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8392 target = gen_reg_rtx (mode);
8393 expand_operands (treeop0, treeop1,
8394 target, &op0, &op1, EXPAND_NORMAL);
8395
8396 /* First try to do it with a special MIN or MAX instruction.
8397 If that does not win, use a conditional jump to select the proper
8398 value. */
8399 this_optab = optab_for_tree_code (code, type, optab_default);
8400 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8401 OPTAB_WIDEN);
8402 if (temp != 0)
8403 return temp;
8404
8405 /* At this point, a MEM target is no longer useful; we will get better
8406 code without it. */
8407
8408 if (! REG_P (target))
8409 target = gen_reg_rtx (mode);
8410
8411 /* If op1 was placed in target, swap op0 and op1. */
8412 if (target != op0 && target == op1)
8413 {
8414 temp = op0;
8415 op0 = op1;
8416 op1 = temp;
8417 }
8418
8419 /* We generate better code and avoid problems with op1 mentioning
8420 target by forcing op1 into a pseudo if it isn't a constant. */
8421 if (! CONSTANT_P (op1))
8422 op1 = force_reg (mode, op1);
8423
8424 {
8425 enum rtx_code comparison_code;
8426 rtx cmpop1 = op1;
8427
8428 if (code == MAX_EXPR)
8429 comparison_code = unsignedp ? GEU : GE;
8430 else
8431 comparison_code = unsignedp ? LEU : LE;
8432
8433 /* Canonicalize to comparisons against 0. */
8434 if (op1 == const1_rtx)
8435 {
8436 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8437 or (a != 0 ? a : 1) for unsigned.
8438 For MIN we are safe converting (a <= 1 ? a : 1)
8439 into (a <= 0 ? a : 1) */
8440 cmpop1 = const0_rtx;
8441 if (code == MAX_EXPR)
8442 comparison_code = unsignedp ? NE : GT;
8443 }
8444 if (op1 == constm1_rtx && !unsignedp)
8445 {
8446 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8447 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8448 cmpop1 = const0_rtx;
8449 if (code == MIN_EXPR)
8450 comparison_code = LT;
8451 }
8452 #ifdef HAVE_conditional_move
8453 /* Use a conditional move if possible. */
8454 if (can_conditionally_move_p (mode))
8455 {
8456 rtx insn;
8457
8458 /* ??? Same problem as in expmed.c: emit_conditional_move
8459 forces a stack adjustment via compare_from_rtx, and we
8460 lose the stack adjustment if the sequence we are about
8461 to create is discarded. */
8462 do_pending_stack_adjust ();
8463
8464 start_sequence ();
8465
8466 /* Try to emit the conditional move. */
8467 insn = emit_conditional_move (target, comparison_code,
8468 op0, cmpop1, mode,
8469 op0, op1, mode,
8470 unsignedp);
8471
8472 /* If we could do the conditional move, emit the sequence,
8473 and return. */
8474 if (insn)
8475 {
8476 rtx seq = get_insns ();
8477 end_sequence ();
8478 emit_insn (seq);
8479 return target;
8480 }
8481
8482 /* Otherwise discard the sequence and fall back to code with
8483 branches. */
8484 end_sequence ();
8485 }
8486 #endif
8487 if (target != op0)
8488 emit_move_insn (target, op0);
8489
8490 temp = gen_label_rtx ();
8491 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8492 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8493 -1);
8494 }
8495 emit_move_insn (target, op1);
8496 emit_label (temp);
8497 return target;
8498
8499 case BIT_NOT_EXPR:
8500 op0 = expand_expr (treeop0, subtarget,
8501 VOIDmode, EXPAND_NORMAL);
8502 if (modifier == EXPAND_STACK_PARM)
8503 target = 0;
8504 /* In case we have to reduce the result to bitfield precision
8505 for unsigned bitfield expand this as XOR with a proper constant
8506 instead. */
8507 if (reduce_bit_field && TYPE_UNSIGNED (type))
8508 temp = expand_binop (mode, xor_optab, op0,
8509 immed_double_int_const
8510 (double_int_mask (TYPE_PRECISION (type)), mode),
8511 target, 1, OPTAB_LIB_WIDEN);
8512 else
8513 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8514 gcc_assert (temp);
8515 return temp;
8516
8517 /* ??? Can optimize bitwise operations with one arg constant.
8518 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8519 and (a bitwise1 b) bitwise2 b (etc)
8520 but that is probably not worth while. */
8521
8522 case BIT_AND_EXPR:
8523 case BIT_IOR_EXPR:
8524 case BIT_XOR_EXPR:
8525 goto binop;
8526
8527 case LROTATE_EXPR:
8528 case RROTATE_EXPR:
8529 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8530 || (GET_MODE_PRECISION (TYPE_MODE (type))
8531 == TYPE_PRECISION (type)));
8532 /* fall through */
8533
8534 case LSHIFT_EXPR:
8535 case RSHIFT_EXPR:
8536 /* If this is a fixed-point operation, then we cannot use the code
8537 below because "expand_shift" doesn't support sat/no-sat fixed-point
8538 shifts. */
8539 if (ALL_FIXED_POINT_MODE_P (mode))
8540 goto binop;
8541
8542 if (! safe_from_p (subtarget, treeop1, 1))
8543 subtarget = 0;
8544 if (modifier == EXPAND_STACK_PARM)
8545 target = 0;
8546 op0 = expand_expr (treeop0, subtarget,
8547 VOIDmode, EXPAND_NORMAL);
8548 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8549 unsignedp);
8550 if (code == LSHIFT_EXPR)
8551 temp = REDUCE_BIT_FIELD (temp);
8552 return temp;
8553
8554 /* Could determine the answer when only additive constants differ. Also,
8555 the addition of one can be handled by changing the condition. */
8556 case LT_EXPR:
8557 case LE_EXPR:
8558 case GT_EXPR:
8559 case GE_EXPR:
8560 case EQ_EXPR:
8561 case NE_EXPR:
8562 case UNORDERED_EXPR:
8563 case ORDERED_EXPR:
8564 case UNLT_EXPR:
8565 case UNLE_EXPR:
8566 case UNGT_EXPR:
8567 case UNGE_EXPR:
8568 case UNEQ_EXPR:
8569 case LTGT_EXPR:
8570 temp = do_store_flag (ops,
8571 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8572 tmode != VOIDmode ? tmode : mode);
8573 if (temp)
8574 return temp;
8575
8576 /* Use a compare and a jump for BLKmode comparisons, or for function
8577 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8578
8579 if ((target == 0
8580 || modifier == EXPAND_STACK_PARM
8581 || ! safe_from_p (target, treeop0, 1)
8582 || ! safe_from_p (target, treeop1, 1)
8583 /* Make sure we don't have a hard reg (such as function's return
8584 value) live across basic blocks, if not optimizing. */
8585 || (!optimize && REG_P (target)
8586 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8587 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8588
8589 emit_move_insn (target, const0_rtx);
8590
8591 op1 = gen_label_rtx ();
8592 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8593
8594 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8595 emit_move_insn (target, constm1_rtx);
8596 else
8597 emit_move_insn (target, const1_rtx);
8598
8599 emit_label (op1);
8600 return target;
8601
8602 case COMPLEX_EXPR:
8603 /* Get the rtx code of the operands. */
8604 op0 = expand_normal (treeop0);
8605 op1 = expand_normal (treeop1);
8606
8607 if (!target)
8608 target = gen_reg_rtx (TYPE_MODE (type));
8609
8610 /* Move the real (op0) and imaginary (op1) parts to their location. */
8611 write_complex_part (target, op0, false);
8612 write_complex_part (target, op1, true);
8613
8614 return target;
8615
8616 case WIDEN_SUM_EXPR:
8617 {
8618 tree oprnd0 = treeop0;
8619 tree oprnd1 = treeop1;
8620
8621 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8622 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8623 target, unsignedp);
8624 return target;
8625 }
8626
8627 case REDUC_MAX_EXPR:
8628 case REDUC_MIN_EXPR:
8629 case REDUC_PLUS_EXPR:
8630 {
8631 op0 = expand_normal (treeop0);
8632 this_optab = optab_for_tree_code (code, type, optab_default);
8633 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8634 gcc_assert (temp);
8635 return temp;
8636 }
8637
8638 case VEC_LSHIFT_EXPR:
8639 case VEC_RSHIFT_EXPR:
8640 {
8641 target = expand_vec_shift_expr (ops, target);
8642 return target;
8643 }
8644
8645 case VEC_UNPACK_HI_EXPR:
8646 case VEC_UNPACK_LO_EXPR:
8647 {
8648 op0 = expand_normal (treeop0);
8649 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8650 target, unsignedp);
8651 gcc_assert (temp);
8652 return temp;
8653 }
8654
8655 case VEC_UNPACK_FLOAT_HI_EXPR:
8656 case VEC_UNPACK_FLOAT_LO_EXPR:
8657 {
8658 op0 = expand_normal (treeop0);
8659 /* The signedness is determined from input operand. */
8660 temp = expand_widen_pattern_expr
8661 (ops, op0, NULL_RTX, NULL_RTX,
8662 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8663
8664 gcc_assert (temp);
8665 return temp;
8666 }
8667
8668 case VEC_WIDEN_MULT_HI_EXPR:
8669 case VEC_WIDEN_MULT_LO_EXPR:
8670 {
8671 tree oprnd0 = treeop0;
8672 tree oprnd1 = treeop1;
8673
8674 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8675 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8676 target, unsignedp);
8677 gcc_assert (target);
8678 return target;
8679 }
8680
8681 case VEC_WIDEN_LSHIFT_HI_EXPR:
8682 case VEC_WIDEN_LSHIFT_LO_EXPR:
8683 {
8684 tree oprnd0 = treeop0;
8685 tree oprnd1 = treeop1;
8686
8687 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8688 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8689 target, unsignedp);
8690 gcc_assert (target);
8691 return target;
8692 }
8693
8694 case VEC_PACK_TRUNC_EXPR:
8695 case VEC_PACK_SAT_EXPR:
8696 case VEC_PACK_FIX_TRUNC_EXPR:
8697 mode = TYPE_MODE (TREE_TYPE (treeop0));
8698 goto binop;
8699
8700 case VEC_PERM_EXPR:
8701 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
8702 op2 = expand_normal (treeop2);
8703
8704 /* Careful here: if the target doesn't support integral vector modes,
8705 a constant selection vector could wind up smooshed into a normal
8706 integral constant. */
8707 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
8708 {
8709 tree sel_type = TREE_TYPE (treeop2);
8710 enum machine_mode vmode
8711 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
8712 TYPE_VECTOR_SUBPARTS (sel_type));
8713 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
8714 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
8715 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
8716 }
8717 else
8718 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
8719
8720 temp = expand_vec_perm (mode, op0, op1, op2, target);
8721 gcc_assert (temp);
8722 return temp;
8723
8724 case DOT_PROD_EXPR:
8725 {
8726 tree oprnd0 = treeop0;
8727 tree oprnd1 = treeop1;
8728 tree oprnd2 = treeop2;
8729 rtx op2;
8730
8731 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8732 op2 = expand_normal (oprnd2);
8733 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8734 target, unsignedp);
8735 return target;
8736 }
8737
8738 case REALIGN_LOAD_EXPR:
8739 {
8740 tree oprnd0 = treeop0;
8741 tree oprnd1 = treeop1;
8742 tree oprnd2 = treeop2;
8743 rtx op2;
8744
8745 this_optab = optab_for_tree_code (code, type, optab_default);
8746 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8747 op2 = expand_normal (oprnd2);
8748 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8749 target, unsignedp);
8750 gcc_assert (temp);
8751 return temp;
8752 }
8753
8754 case COND_EXPR:
8755 /* A COND_EXPR with its type being VOID_TYPE represents a
8756 conditional jump and is handled in
8757 expand_gimple_cond_expr. */
8758 gcc_assert (!VOID_TYPE_P (type));
8759
8760 /* Note that COND_EXPRs whose type is a structure or union
8761 are required to be constructed to contain assignments of
8762 a temporary variable, so that we can evaluate them here
8763 for side effect only. If type is void, we must do likewise. */
8764
8765 gcc_assert (!TREE_ADDRESSABLE (type)
8766 && !ignore
8767 && TREE_TYPE (treeop1) != void_type_node
8768 && TREE_TYPE (treeop2) != void_type_node);
8769
8770 /* If we are not to produce a result, we have no target. Otherwise,
8771 if a target was specified use it; it will not be used as an
8772 intermediate target unless it is safe. If no target, use a
8773 temporary. */
8774
8775 if (modifier != EXPAND_STACK_PARM
8776 && original_target
8777 && safe_from_p (original_target, treeop0, 1)
8778 && GET_MODE (original_target) == mode
8779 #ifdef HAVE_conditional_move
8780 && (! can_conditionally_move_p (mode)
8781 || REG_P (original_target))
8782 #endif
8783 && !MEM_P (original_target))
8784 temp = original_target;
8785 else
8786 temp = assign_temp (type, 0, 0, 1);
8787
8788 do_pending_stack_adjust ();
8789 NO_DEFER_POP;
8790 op0 = gen_label_rtx ();
8791 op1 = gen_label_rtx ();
8792 jumpifnot (treeop0, op0, -1);
8793 store_expr (treeop1, temp,
8794 modifier == EXPAND_STACK_PARM,
8795 false);
8796
8797 emit_jump_insn (gen_jump (op1));
8798 emit_barrier ();
8799 emit_label (op0);
8800 store_expr (treeop2, temp,
8801 modifier == EXPAND_STACK_PARM,
8802 false);
8803
8804 emit_label (op1);
8805 OK_DEFER_POP;
8806 return temp;
8807
8808 case VEC_COND_EXPR:
8809 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
8810 return target;
8811
8812 default:
8813 gcc_unreachable ();
8814 }
8815
8816 /* Here to do an ordinary binary operator. */
8817 binop:
8818 expand_operands (treeop0, treeop1,
8819 subtarget, &op0, &op1, EXPAND_NORMAL);
8820 binop2:
8821 this_optab = optab_for_tree_code (code, type, optab_default);
8822 binop3:
8823 if (modifier == EXPAND_STACK_PARM)
8824 target = 0;
8825 temp = expand_binop (mode, this_optab, op0, op1, target,
8826 unsignedp, OPTAB_LIB_WIDEN);
8827 gcc_assert (temp);
8828 /* Bitwise operations do not need bitfield reduction as we expect their
8829 operands being properly truncated. */
8830 if (code == BIT_XOR_EXPR
8831 || code == BIT_AND_EXPR
8832 || code == BIT_IOR_EXPR)
8833 return temp;
8834 return REDUCE_BIT_FIELD (temp);
8835 }
8836 #undef REDUCE_BIT_FIELD
8837
8838 rtx
8839 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
8840 enum expand_modifier modifier, rtx *alt_rtl)
8841 {
8842 rtx op0, op1, temp, decl_rtl;
8843 tree type;
8844 int unsignedp;
8845 enum machine_mode mode;
8846 enum tree_code code = TREE_CODE (exp);
8847 rtx subtarget, original_target;
8848 int ignore;
8849 tree context;
8850 bool reduce_bit_field;
8851 location_t loc = EXPR_LOCATION (exp);
8852 struct separate_ops ops;
8853 tree treeop0, treeop1, treeop2;
8854 tree ssa_name = NULL_TREE;
8855 gimple g;
8856
8857 type = TREE_TYPE (exp);
8858 mode = TYPE_MODE (type);
8859 unsignedp = TYPE_UNSIGNED (type);
8860
8861 treeop0 = treeop1 = treeop2 = NULL_TREE;
8862 if (!VL_EXP_CLASS_P (exp))
8863 switch (TREE_CODE_LENGTH (code))
8864 {
8865 default:
8866 case 3: treeop2 = TREE_OPERAND (exp, 2);
8867 case 2: treeop1 = TREE_OPERAND (exp, 1);
8868 case 1: treeop0 = TREE_OPERAND (exp, 0);
8869 case 0: break;
8870 }
8871 ops.code = code;
8872 ops.type = type;
8873 ops.op0 = treeop0;
8874 ops.op1 = treeop1;
8875 ops.op2 = treeop2;
8876 ops.location = loc;
8877
8878 ignore = (target == const0_rtx
8879 || ((CONVERT_EXPR_CODE_P (code)
8880 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8881 && TREE_CODE (type) == VOID_TYPE));
8882
8883 /* An operation in what may be a bit-field type needs the
8884 result to be reduced to the precision of the bit-field type,
8885 which is narrower than that of the type's mode. */
8886 reduce_bit_field = (!ignore
8887 && INTEGRAL_TYPE_P (type)
8888 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8889
8890 /* If we are going to ignore this result, we need only do something
8891 if there is a side-effect somewhere in the expression. If there
8892 is, short-circuit the most common cases here. Note that we must
8893 not call expand_expr with anything but const0_rtx in case this
8894 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
8895
8896 if (ignore)
8897 {
8898 if (! TREE_SIDE_EFFECTS (exp))
8899 return const0_rtx;
8900
8901 /* Ensure we reference a volatile object even if value is ignored, but
8902 don't do this if all we are doing is taking its address. */
8903 if (TREE_THIS_VOLATILE (exp)
8904 && TREE_CODE (exp) != FUNCTION_DECL
8905 && mode != VOIDmode && mode != BLKmode
8906 && modifier != EXPAND_CONST_ADDRESS)
8907 {
8908 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
8909 if (MEM_P (temp))
8910 copy_to_reg (temp);
8911 return const0_rtx;
8912 }
8913
8914 if (TREE_CODE_CLASS (code) == tcc_unary
8915 || code == COMPONENT_REF || code == INDIRECT_REF)
8916 return expand_expr (treeop0, const0_rtx, VOIDmode,
8917 modifier);
8918
8919 else if (TREE_CODE_CLASS (code) == tcc_binary
8920 || TREE_CODE_CLASS (code) == tcc_comparison
8921 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
8922 {
8923 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8924 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8925 return const0_rtx;
8926 }
8927 else if (code == BIT_FIELD_REF)
8928 {
8929 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8930 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8931 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
8932 return const0_rtx;
8933 }
8934
8935 target = 0;
8936 }
8937
8938 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8939 target = 0;
8940
8941 /* Use subtarget as the target for operand 0 of a binary operation. */
8942 subtarget = get_subtarget (target);
8943 original_target = target;
8944
8945 switch (code)
8946 {
8947 case LABEL_DECL:
8948 {
8949 tree function = decl_function_context (exp);
8950
8951 temp = label_rtx (exp);
8952 temp = gen_rtx_LABEL_REF (Pmode, temp);
8953
8954 if (function != current_function_decl
8955 && function != 0)
8956 LABEL_REF_NONLOCAL_P (temp) = 1;
8957
8958 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
8959 return temp;
8960 }
8961
8962 case SSA_NAME:
8963 /* ??? ivopts calls expander, without any preparation from
8964 out-of-ssa. So fake instructions as if this was an access to the
8965 base variable. This unnecessarily allocates a pseudo, see how we can
8966 reuse it, if partition base vars have it set already. */
8967 if (!currently_expanding_to_rtl)
8968 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
8969 NULL);
8970
8971 g = get_gimple_for_ssa_name (exp);
8972 /* For EXPAND_INITIALIZER try harder to get something simpler. */
8973 if (g == NULL
8974 && modifier == EXPAND_INITIALIZER
8975 && !SSA_NAME_IS_DEFAULT_DEF (exp)
8976 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
8977 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
8978 g = SSA_NAME_DEF_STMT (exp);
8979 if (g)
8980 return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
8981 modifier, NULL);
8982
8983 ssa_name = exp;
8984 decl_rtl = get_rtx_for_ssa_name (ssa_name);
8985 exp = SSA_NAME_VAR (ssa_name);
8986 goto expand_decl_rtl;
8987
8988 case PARM_DECL:
8989 case VAR_DECL:
8990 /* If a static var's type was incomplete when the decl was written,
8991 but the type is complete now, lay out the decl now. */
8992 if (DECL_SIZE (exp) == 0
8993 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
8994 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
8995 layout_decl (exp, 0);
8996
8997 /* ... fall through ... */
8998
8999 case FUNCTION_DECL:
9000 case RESULT_DECL:
9001 decl_rtl = DECL_RTL (exp);
9002 expand_decl_rtl:
9003 gcc_assert (decl_rtl);
9004 decl_rtl = copy_rtx (decl_rtl);
9005 /* Record writes to register variables. */
9006 if (modifier == EXPAND_WRITE
9007 && REG_P (decl_rtl)
9008 && HARD_REGISTER_P (decl_rtl))
9009 add_to_hard_reg_set (&crtl->asm_clobbers,
9010 GET_MODE (decl_rtl), REGNO (decl_rtl));
9011
9012 /* Ensure variable marked as used even if it doesn't go through
9013 a parser. If it hasn't be used yet, write out an external
9014 definition. */
9015 if (! TREE_USED (exp))
9016 {
9017 assemble_external (exp);
9018 TREE_USED (exp) = 1;
9019 }
9020
9021 /* Show we haven't gotten RTL for this yet. */
9022 temp = 0;
9023
9024 /* Variables inherited from containing functions should have
9025 been lowered by this point. */
9026 context = decl_function_context (exp);
9027 gcc_assert (!context
9028 || context == current_function_decl
9029 || TREE_STATIC (exp)
9030 || DECL_EXTERNAL (exp)
9031 /* ??? C++ creates functions that are not TREE_STATIC. */
9032 || TREE_CODE (exp) == FUNCTION_DECL);
9033
9034 /* This is the case of an array whose size is to be determined
9035 from its initializer, while the initializer is still being parsed.
9036 See expand_decl. */
9037
9038 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9039 temp = validize_mem (decl_rtl);
9040
9041 /* If DECL_RTL is memory, we are in the normal case and the
9042 address is not valid, get the address into a register. */
9043
9044 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9045 {
9046 if (alt_rtl)
9047 *alt_rtl = decl_rtl;
9048 decl_rtl = use_anchored_address (decl_rtl);
9049 if (modifier != EXPAND_CONST_ADDRESS
9050 && modifier != EXPAND_SUM
9051 && !memory_address_addr_space_p (DECL_MODE (exp),
9052 XEXP (decl_rtl, 0),
9053 MEM_ADDR_SPACE (decl_rtl)))
9054 temp = replace_equiv_address (decl_rtl,
9055 copy_rtx (XEXP (decl_rtl, 0)));
9056 }
9057
9058 /* If we got something, return it. But first, set the alignment
9059 if the address is a register. */
9060 if (temp != 0)
9061 {
9062 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9063 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9064
9065 return temp;
9066 }
9067
9068 /* If the mode of DECL_RTL does not match that of the decl,
9069 there are two cases: we are dealing with a BLKmode value
9070 that is returned in a register, or we are dealing with
9071 a promoted value. In the latter case, return a SUBREG
9072 of the wanted mode, but mark it so that we know that it
9073 was already extended. */
9074 if (REG_P (decl_rtl)
9075 && DECL_MODE (exp) != BLKmode
9076 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9077 {
9078 enum machine_mode pmode;
9079
9080 /* Get the signedness to be used for this variable. Ensure we get
9081 the same mode we got when the variable was declared. */
9082 if (code == SSA_NAME
9083 && (g = SSA_NAME_DEF_STMT (ssa_name))
9084 && gimple_code (g) == GIMPLE_CALL)
9085 {
9086 gcc_assert (!gimple_call_internal_p (g));
9087 pmode = promote_function_mode (type, mode, &unsignedp,
9088 gimple_call_fntype (g),
9089 2);
9090 }
9091 else
9092 pmode = promote_decl_mode (exp, &unsignedp);
9093 gcc_assert (GET_MODE (decl_rtl) == pmode);
9094
9095 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9096 SUBREG_PROMOTED_VAR_P (temp) = 1;
9097 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
9098 return temp;
9099 }
9100
9101 return decl_rtl;
9102
9103 case INTEGER_CST:
9104 temp = immed_double_const (TREE_INT_CST_LOW (exp),
9105 TREE_INT_CST_HIGH (exp), mode);
9106
9107 return temp;
9108
9109 case VECTOR_CST:
9110 {
9111 tree tmp = NULL_TREE;
9112 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9113 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9114 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9115 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9116 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9117 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9118 return const_vector_from_tree (exp);
9119 if (GET_MODE_CLASS (mode) == MODE_INT)
9120 {
9121 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9122 if (type_for_mode)
9123 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9124 }
9125 if (!tmp)
9126 {
9127 VEC(constructor_elt,gc) *v;
9128 unsigned i;
9129 v = VEC_alloc (constructor_elt, gc, VECTOR_CST_NELTS (exp));
9130 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
9131 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
9132 tmp = build_constructor (type, v);
9133 }
9134 return expand_expr (tmp, ignore ? const0_rtx : target,
9135 tmode, modifier);
9136 }
9137
9138 case CONST_DECL:
9139 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9140
9141 case REAL_CST:
9142 /* If optimized, generate immediate CONST_DOUBLE
9143 which will be turned into memory by reload if necessary.
9144
9145 We used to force a register so that loop.c could see it. But
9146 this does not allow gen_* patterns to perform optimizations with
9147 the constants. It also produces two insns in cases like "x = 1.0;".
9148 On most machines, floating-point constants are not permitted in
9149 many insns, so we'd end up copying it to a register in any case.
9150
9151 Now, we do the copying in expand_binop, if appropriate. */
9152 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9153 TYPE_MODE (TREE_TYPE (exp)));
9154
9155 case FIXED_CST:
9156 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9157 TYPE_MODE (TREE_TYPE (exp)));
9158
9159 case COMPLEX_CST:
9160 /* Handle evaluating a complex constant in a CONCAT target. */
9161 if (original_target && GET_CODE (original_target) == CONCAT)
9162 {
9163 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9164 rtx rtarg, itarg;
9165
9166 rtarg = XEXP (original_target, 0);
9167 itarg = XEXP (original_target, 1);
9168
9169 /* Move the real and imaginary parts separately. */
9170 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9171 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9172
9173 if (op0 != rtarg)
9174 emit_move_insn (rtarg, op0);
9175 if (op1 != itarg)
9176 emit_move_insn (itarg, op1);
9177
9178 return original_target;
9179 }
9180
9181 /* ... fall through ... */
9182
9183 case STRING_CST:
9184 temp = expand_expr_constant (exp, 1, modifier);
9185
9186 /* temp contains a constant address.
9187 On RISC machines where a constant address isn't valid,
9188 make some insns to get that address into a register. */
9189 if (modifier != EXPAND_CONST_ADDRESS
9190 && modifier != EXPAND_INITIALIZER
9191 && modifier != EXPAND_SUM
9192 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9193 MEM_ADDR_SPACE (temp)))
9194 return replace_equiv_address (temp,
9195 copy_rtx (XEXP (temp, 0)));
9196 return temp;
9197
9198 case SAVE_EXPR:
9199 {
9200 tree val = treeop0;
9201 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
9202
9203 if (!SAVE_EXPR_RESOLVED_P (exp))
9204 {
9205 /* We can indeed still hit this case, typically via builtin
9206 expanders calling save_expr immediately before expanding
9207 something. Assume this means that we only have to deal
9208 with non-BLKmode values. */
9209 gcc_assert (GET_MODE (ret) != BLKmode);
9210
9211 val = build_decl (EXPR_LOCATION (exp),
9212 VAR_DECL, NULL, TREE_TYPE (exp));
9213 DECL_ARTIFICIAL (val) = 1;
9214 DECL_IGNORED_P (val) = 1;
9215 treeop0 = val;
9216 TREE_OPERAND (exp, 0) = treeop0;
9217 SAVE_EXPR_RESOLVED_P (exp) = 1;
9218
9219 if (!CONSTANT_P (ret))
9220 ret = copy_to_reg (ret);
9221 SET_DECL_RTL (val, ret);
9222 }
9223
9224 return ret;
9225 }
9226
9227
9228 case CONSTRUCTOR:
9229 /* If we don't need the result, just ensure we evaluate any
9230 subexpressions. */
9231 if (ignore)
9232 {
9233 unsigned HOST_WIDE_INT idx;
9234 tree value;
9235
9236 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9237 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9238
9239 return const0_rtx;
9240 }
9241
9242 return expand_constructor (exp, target, modifier, false);
9243
9244 case TARGET_MEM_REF:
9245 {
9246 addr_space_t as
9247 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9248 struct mem_address addr;
9249 enum insn_code icode;
9250 unsigned int align;
9251
9252 get_address_description (exp, &addr);
9253 op0 = addr_for_mem_ref (&addr, as, true);
9254 op0 = memory_address_addr_space (mode, op0, as);
9255 temp = gen_rtx_MEM (mode, op0);
9256 set_mem_attributes (temp, exp, 0);
9257 set_mem_addr_space (temp, as);
9258 align = get_object_or_type_alignment (exp);
9259 if (modifier != EXPAND_WRITE
9260 && mode != BLKmode
9261 && align < GET_MODE_ALIGNMENT (mode)
9262 /* If the target does not have special handling for unaligned
9263 loads of mode then it can use regular moves for them. */
9264 && ((icode = optab_handler (movmisalign_optab, mode))
9265 != CODE_FOR_nothing))
9266 {
9267 struct expand_operand ops[2];
9268
9269 /* We've already validated the memory, and we're creating a
9270 new pseudo destination. The predicates really can't fail,
9271 nor can the generator. */
9272 create_output_operand (&ops[0], NULL_RTX, mode);
9273 create_fixed_operand (&ops[1], temp);
9274 expand_insn (icode, 2, ops);
9275 return ops[0].value;
9276 }
9277 return temp;
9278 }
9279
9280 case MEM_REF:
9281 {
9282 addr_space_t as
9283 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9284 enum machine_mode address_mode;
9285 tree base = TREE_OPERAND (exp, 0);
9286 gimple def_stmt;
9287 enum insn_code icode;
9288 unsigned align;
9289 /* Handle expansion of non-aliased memory with non-BLKmode. That
9290 might end up in a register. */
9291 if (mem_ref_refers_to_non_mem_p (exp))
9292 {
9293 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9294 tree bit_offset;
9295 tree bftype;
9296 base = TREE_OPERAND (base, 0);
9297 if (offset == 0
9298 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9299 && (GET_MODE_BITSIZE (DECL_MODE (base))
9300 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9301 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9302 TREE_TYPE (exp), base),
9303 target, tmode, modifier);
9304 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9305 bftype = TREE_TYPE (base);
9306 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9307 bftype = TREE_TYPE (exp);
9308 else
9309 {
9310 temp = assign_stack_temp (DECL_MODE (base),
9311 GET_MODE_SIZE (DECL_MODE (base)),
9312 0);
9313 store_expr (base, temp, 0, false);
9314 temp = adjust_address (temp, BLKmode, offset);
9315 set_mem_size (temp, int_size_in_bytes (TREE_TYPE (exp)));
9316 return temp;
9317 }
9318 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9319 base,
9320 TYPE_SIZE (TREE_TYPE (exp)),
9321 bit_offset),
9322 target, tmode, modifier);
9323 }
9324 address_mode = targetm.addr_space.address_mode (as);
9325 base = TREE_OPERAND (exp, 0);
9326 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9327 {
9328 tree mask = gimple_assign_rhs2 (def_stmt);
9329 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9330 gimple_assign_rhs1 (def_stmt), mask);
9331 TREE_OPERAND (exp, 0) = base;
9332 }
9333 align = get_object_or_type_alignment (exp);
9334 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9335 op0 = memory_address_addr_space (address_mode, op0, as);
9336 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9337 {
9338 rtx off
9339 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9340 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9341 }
9342 op0 = memory_address_addr_space (mode, op0, as);
9343 temp = gen_rtx_MEM (mode, op0);
9344 set_mem_attributes (temp, exp, 0);
9345 set_mem_addr_space (temp, as);
9346 if (TREE_THIS_VOLATILE (exp))
9347 MEM_VOLATILE_P (temp) = 1;
9348 if (modifier != EXPAND_WRITE
9349 && mode != BLKmode
9350 && align < GET_MODE_ALIGNMENT (mode))
9351 {
9352 if ((icode = optab_handler (movmisalign_optab, mode))
9353 != CODE_FOR_nothing)
9354 {
9355 struct expand_operand ops[2];
9356
9357 /* We've already validated the memory, and we're creating a
9358 new pseudo destination. The predicates really can't fail,
9359 nor can the generator. */
9360 create_output_operand (&ops[0], NULL_RTX, mode);
9361 create_fixed_operand (&ops[1], temp);
9362 expand_insn (icode, 2, ops);
9363 return ops[0].value;
9364 }
9365 else if (SLOW_UNALIGNED_ACCESS (mode, align))
9366 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
9367 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
9368 true, (modifier == EXPAND_STACK_PARM
9369 ? NULL_RTX : target),
9370 mode, mode);
9371 }
9372 return temp;
9373 }
9374
9375 case ARRAY_REF:
9376
9377 {
9378 tree array = treeop0;
9379 tree index = treeop1;
9380
9381 /* Fold an expression like: "foo"[2].
9382 This is not done in fold so it won't happen inside &.
9383 Don't fold if this is for wide characters since it's too
9384 difficult to do correctly and this is a very rare case. */
9385
9386 if (modifier != EXPAND_CONST_ADDRESS
9387 && modifier != EXPAND_INITIALIZER
9388 && modifier != EXPAND_MEMORY)
9389 {
9390 tree t = fold_read_from_constant_string (exp);
9391
9392 if (t)
9393 return expand_expr (t, target, tmode, modifier);
9394 }
9395
9396 /* If this is a constant index into a constant array,
9397 just get the value from the array. Handle both the cases when
9398 we have an explicit constructor and when our operand is a variable
9399 that was declared const. */
9400
9401 if (modifier != EXPAND_CONST_ADDRESS
9402 && modifier != EXPAND_INITIALIZER
9403 && modifier != EXPAND_MEMORY
9404 && TREE_CODE (array) == CONSTRUCTOR
9405 && ! TREE_SIDE_EFFECTS (array)
9406 && TREE_CODE (index) == INTEGER_CST)
9407 {
9408 unsigned HOST_WIDE_INT ix;
9409 tree field, value;
9410
9411 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9412 field, value)
9413 if (tree_int_cst_equal (field, index))
9414 {
9415 if (!TREE_SIDE_EFFECTS (value))
9416 return expand_expr (fold (value), target, tmode, modifier);
9417 break;
9418 }
9419 }
9420
9421 else if (optimize >= 1
9422 && modifier != EXPAND_CONST_ADDRESS
9423 && modifier != EXPAND_INITIALIZER
9424 && modifier != EXPAND_MEMORY
9425 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9426 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9427 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9428 && const_value_known_p (array))
9429 {
9430 if (TREE_CODE (index) == INTEGER_CST)
9431 {
9432 tree init = DECL_INITIAL (array);
9433
9434 if (TREE_CODE (init) == CONSTRUCTOR)
9435 {
9436 unsigned HOST_WIDE_INT ix;
9437 tree field, value;
9438
9439 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9440 field, value)
9441 if (tree_int_cst_equal (field, index))
9442 {
9443 if (TREE_SIDE_EFFECTS (value))
9444 break;
9445
9446 if (TREE_CODE (value) == CONSTRUCTOR)
9447 {
9448 /* If VALUE is a CONSTRUCTOR, this
9449 optimization is only useful if
9450 this doesn't store the CONSTRUCTOR
9451 into memory. If it does, it is more
9452 efficient to just load the data from
9453 the array directly. */
9454 rtx ret = expand_constructor (value, target,
9455 modifier, true);
9456 if (ret == NULL_RTX)
9457 break;
9458 }
9459
9460 return expand_expr (fold (value), target, tmode,
9461 modifier);
9462 }
9463 }
9464 else if(TREE_CODE (init) == STRING_CST)
9465 {
9466 tree index1 = index;
9467 tree low_bound = array_ref_low_bound (exp);
9468 index1 = fold_convert_loc (loc, sizetype,
9469 treeop1);
9470
9471 /* Optimize the special-case of a zero lower bound.
9472
9473 We convert the low_bound to sizetype to avoid some problems
9474 with constant folding. (E.g. suppose the lower bound is 1,
9475 and its mode is QI. Without the conversion,l (ARRAY
9476 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9477 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9478
9479 if (! integer_zerop (low_bound))
9480 index1 = size_diffop_loc (loc, index1,
9481 fold_convert_loc (loc, sizetype,
9482 low_bound));
9483
9484 if (0 > compare_tree_int (index1,
9485 TREE_STRING_LENGTH (init)))
9486 {
9487 tree type = TREE_TYPE (TREE_TYPE (init));
9488 enum machine_mode mode = TYPE_MODE (type);
9489
9490 if (GET_MODE_CLASS (mode) == MODE_INT
9491 && GET_MODE_SIZE (mode) == 1)
9492 return gen_int_mode (TREE_STRING_POINTER (init)
9493 [TREE_INT_CST_LOW (index1)],
9494 mode);
9495 }
9496 }
9497 }
9498 }
9499 }
9500 goto normal_inner_ref;
9501
9502 case COMPONENT_REF:
9503 /* If the operand is a CONSTRUCTOR, we can just extract the
9504 appropriate field if it is present. */
9505 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9506 {
9507 unsigned HOST_WIDE_INT idx;
9508 tree field, value;
9509
9510 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9511 idx, field, value)
9512 if (field == treeop1
9513 /* We can normally use the value of the field in the
9514 CONSTRUCTOR. However, if this is a bitfield in
9515 an integral mode that we can fit in a HOST_WIDE_INT,
9516 we must mask only the number of bits in the bitfield,
9517 since this is done implicitly by the constructor. If
9518 the bitfield does not meet either of those conditions,
9519 we can't do this optimization. */
9520 && (! DECL_BIT_FIELD (field)
9521 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9522 && (GET_MODE_PRECISION (DECL_MODE (field))
9523 <= HOST_BITS_PER_WIDE_INT))))
9524 {
9525 if (DECL_BIT_FIELD (field)
9526 && modifier == EXPAND_STACK_PARM)
9527 target = 0;
9528 op0 = expand_expr (value, target, tmode, modifier);
9529 if (DECL_BIT_FIELD (field))
9530 {
9531 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9532 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9533
9534 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9535 {
9536 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9537 op0 = expand_and (imode, op0, op1, target);
9538 }
9539 else
9540 {
9541 int count = GET_MODE_PRECISION (imode) - bitsize;
9542
9543 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9544 target, 0);
9545 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9546 target, 0);
9547 }
9548 }
9549
9550 return op0;
9551 }
9552 }
9553 goto normal_inner_ref;
9554
9555 case BIT_FIELD_REF:
9556 case ARRAY_RANGE_REF:
9557 normal_inner_ref:
9558 {
9559 enum machine_mode mode1, mode2;
9560 HOST_WIDE_INT bitsize, bitpos;
9561 tree offset;
9562 int volatilep = 0, must_force_mem;
9563 bool packedp = false;
9564 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9565 &mode1, &unsignedp, &volatilep, true);
9566 rtx orig_op0, memloc;
9567
9568 /* If we got back the original object, something is wrong. Perhaps
9569 we are evaluating an expression too early. In any event, don't
9570 infinitely recurse. */
9571 gcc_assert (tem != exp);
9572
9573 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9574 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9575 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9576 packedp = true;
9577
9578 /* If TEM's type is a union of variable size, pass TARGET to the inner
9579 computation, since it will need a temporary and TARGET is known
9580 to have to do. This occurs in unchecked conversion in Ada. */
9581 orig_op0 = op0
9582 = expand_expr (tem,
9583 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9584 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9585 != INTEGER_CST)
9586 && modifier != EXPAND_STACK_PARM
9587 ? target : NULL_RTX),
9588 VOIDmode,
9589 (modifier == EXPAND_INITIALIZER
9590 || modifier == EXPAND_CONST_ADDRESS
9591 || modifier == EXPAND_STACK_PARM)
9592 ? modifier : EXPAND_NORMAL);
9593
9594
9595 /* If the bitfield is volatile, we want to access it in the
9596 field's mode, not the computed mode.
9597 If a MEM has VOIDmode (external with incomplete type),
9598 use BLKmode for it instead. */
9599 if (MEM_P (op0))
9600 {
9601 if (volatilep && flag_strict_volatile_bitfields > 0)
9602 op0 = adjust_address (op0, mode1, 0);
9603 else if (GET_MODE (op0) == VOIDmode)
9604 op0 = adjust_address (op0, BLKmode, 0);
9605 }
9606
9607 mode2
9608 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9609
9610 /* If we have either an offset, a BLKmode result, or a reference
9611 outside the underlying object, we must force it to memory.
9612 Such a case can occur in Ada if we have unchecked conversion
9613 of an expression from a scalar type to an aggregate type or
9614 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9615 passed a partially uninitialized object or a view-conversion
9616 to a larger size. */
9617 must_force_mem = (offset
9618 || mode1 == BLKmode
9619 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9620
9621 /* Handle CONCAT first. */
9622 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9623 {
9624 if (bitpos == 0
9625 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9626 return op0;
9627 if (bitpos == 0
9628 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9629 && bitsize)
9630 {
9631 op0 = XEXP (op0, 0);
9632 mode2 = GET_MODE (op0);
9633 }
9634 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9635 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9636 && bitpos
9637 && bitsize)
9638 {
9639 op0 = XEXP (op0, 1);
9640 bitpos = 0;
9641 mode2 = GET_MODE (op0);
9642 }
9643 else
9644 /* Otherwise force into memory. */
9645 must_force_mem = 1;
9646 }
9647
9648 /* If this is a constant, put it in a register if it is a legitimate
9649 constant and we don't need a memory reference. */
9650 if (CONSTANT_P (op0)
9651 && mode2 != BLKmode
9652 && targetm.legitimate_constant_p (mode2, op0)
9653 && !must_force_mem)
9654 op0 = force_reg (mode2, op0);
9655
9656 /* Otherwise, if this is a constant, try to force it to the constant
9657 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9658 is a legitimate constant. */
9659 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9660 op0 = validize_mem (memloc);
9661
9662 /* Otherwise, if this is a constant or the object is not in memory
9663 and need be, put it there. */
9664 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9665 {
9666 tree nt = build_qualified_type (TREE_TYPE (tem),
9667 (TYPE_QUALS (TREE_TYPE (tem))
9668 | TYPE_QUAL_CONST));
9669 memloc = assign_temp (nt, 1, 1, 1);
9670 emit_move_insn (memloc, op0);
9671 op0 = memloc;
9672 }
9673
9674 if (offset)
9675 {
9676 enum machine_mode address_mode;
9677 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9678 EXPAND_SUM);
9679
9680 gcc_assert (MEM_P (op0));
9681
9682 address_mode
9683 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9684 if (GET_MODE (offset_rtx) != address_mode)
9685 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9686
9687 if (GET_MODE (op0) == BLKmode
9688 /* A constant address in OP0 can have VOIDmode, we must
9689 not try to call force_reg in that case. */
9690 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9691 && bitsize != 0
9692 && (bitpos % bitsize) == 0
9693 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9694 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9695 {
9696 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9697 bitpos = 0;
9698 }
9699
9700 op0 = offset_address (op0, offset_rtx,
9701 highest_pow2_factor (offset));
9702 }
9703
9704 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9705 record its alignment as BIGGEST_ALIGNMENT. */
9706 if (MEM_P (op0) && bitpos == 0 && offset != 0
9707 && is_aligning_offset (offset, tem))
9708 set_mem_align (op0, BIGGEST_ALIGNMENT);
9709
9710 /* Don't forget about volatility even if this is a bitfield. */
9711 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9712 {
9713 if (op0 == orig_op0)
9714 op0 = copy_rtx (op0);
9715
9716 MEM_VOLATILE_P (op0) = 1;
9717 }
9718
9719 /* In cases where an aligned union has an unaligned object
9720 as a field, we might be extracting a BLKmode value from
9721 an integer-mode (e.g., SImode) object. Handle this case
9722 by doing the extract into an object as wide as the field
9723 (which we know to be the width of a basic mode), then
9724 storing into memory, and changing the mode to BLKmode. */
9725 if (mode1 == VOIDmode
9726 || REG_P (op0) || GET_CODE (op0) == SUBREG
9727 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9728 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9729 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9730 && modifier != EXPAND_CONST_ADDRESS
9731 && modifier != EXPAND_INITIALIZER)
9732 /* If the field is volatile, we always want an aligned
9733 access. Do this in following two situations:
9734 1. the access is not already naturally
9735 aligned, otherwise "normal" (non-bitfield) volatile fields
9736 become non-addressable.
9737 2. the bitsize is narrower than the access size. Need
9738 to extract bitfields from the access. */
9739 || (volatilep && flag_strict_volatile_bitfields > 0
9740 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0
9741 || (mode1 != BLKmode
9742 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)))
9743 /* If the field isn't aligned enough to fetch as a memref,
9744 fetch it as a bit field. */
9745 || (mode1 != BLKmode
9746 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9747 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9748 || (MEM_P (op0)
9749 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9750 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9751 && ((modifier == EXPAND_CONST_ADDRESS
9752 || modifier == EXPAND_INITIALIZER)
9753 ? STRICT_ALIGNMENT
9754 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9755 || (bitpos % BITS_PER_UNIT != 0)))
9756 /* If the type and the field are a constant size and the
9757 size of the type isn't the same size as the bitfield,
9758 we must use bitfield operations. */
9759 || (bitsize >= 0
9760 && TYPE_SIZE (TREE_TYPE (exp))
9761 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9762 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9763 bitsize)))
9764 {
9765 enum machine_mode ext_mode = mode;
9766
9767 if (ext_mode == BLKmode
9768 && ! (target != 0 && MEM_P (op0)
9769 && MEM_P (target)
9770 && bitpos % BITS_PER_UNIT == 0))
9771 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9772
9773 if (ext_mode == BLKmode)
9774 {
9775 if (target == 0)
9776 target = assign_temp (type, 0, 1, 1);
9777
9778 if (bitsize == 0)
9779 return target;
9780
9781 /* In this case, BITPOS must start at a byte boundary and
9782 TARGET, if specified, must be a MEM. */
9783 gcc_assert (MEM_P (op0)
9784 && (!target || MEM_P (target))
9785 && !(bitpos % BITS_PER_UNIT));
9786
9787 emit_block_move (target,
9788 adjust_address (op0, VOIDmode,
9789 bitpos / BITS_PER_UNIT),
9790 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9791 / BITS_PER_UNIT),
9792 (modifier == EXPAND_STACK_PARM
9793 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9794
9795 return target;
9796 }
9797
9798 op0 = validize_mem (op0);
9799
9800 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9801 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9802
9803 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
9804 (modifier == EXPAND_STACK_PARM
9805 ? NULL_RTX : target),
9806 ext_mode, ext_mode);
9807
9808 /* If the result is a record type and BITSIZE is narrower than
9809 the mode of OP0, an integral mode, and this is a big endian
9810 machine, we must put the field into the high-order bits. */
9811 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
9812 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
9813 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
9814 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
9815 GET_MODE_BITSIZE (GET_MODE (op0))
9816 - bitsize, op0, 1);
9817
9818 /* If the result type is BLKmode, store the data into a temporary
9819 of the appropriate type, but with the mode corresponding to the
9820 mode for the data we have (op0's mode). It's tempting to make
9821 this a constant type, since we know it's only being stored once,
9822 but that can cause problems if we are taking the address of this
9823 COMPONENT_REF because the MEM of any reference via that address
9824 will have flags corresponding to the type, which will not
9825 necessarily be constant. */
9826 if (mode == BLKmode)
9827 {
9828 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
9829 rtx new_rtx;
9830
9831 /* If the reference doesn't use the alias set of its type,
9832 we cannot create the temporary using that type. */
9833 if (component_uses_parent_alias_set (exp))
9834 {
9835 new_rtx = assign_stack_local (ext_mode, size, 0);
9836 set_mem_alias_set (new_rtx, get_alias_set (exp));
9837 }
9838 else
9839 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
9840
9841 emit_move_insn (new_rtx, op0);
9842 op0 = copy_rtx (new_rtx);
9843 PUT_MODE (op0, BLKmode);
9844 set_mem_attributes (op0, exp, 1);
9845 }
9846
9847 return op0;
9848 }
9849
9850 /* If the result is BLKmode, use that to access the object
9851 now as well. */
9852 if (mode == BLKmode)
9853 mode1 = BLKmode;
9854
9855 /* Get a reference to just this component. */
9856 if (modifier == EXPAND_CONST_ADDRESS
9857 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
9858 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
9859 else
9860 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9861
9862 if (op0 == orig_op0)
9863 op0 = copy_rtx (op0);
9864
9865 set_mem_attributes (op0, exp, 0);
9866 if (REG_P (XEXP (op0, 0)))
9867 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9868
9869 MEM_VOLATILE_P (op0) |= volatilep;
9870 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
9871 || modifier == EXPAND_CONST_ADDRESS
9872 || modifier == EXPAND_INITIALIZER)
9873 return op0;
9874 else if (target == 0)
9875 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9876
9877 convert_move (target, op0, unsignedp);
9878 return target;
9879 }
9880
9881 case OBJ_TYPE_REF:
9882 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
9883
9884 case CALL_EXPR:
9885 /* All valid uses of __builtin_va_arg_pack () are removed during
9886 inlining. */
9887 if (CALL_EXPR_VA_ARG_PACK (exp))
9888 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
9889 {
9890 tree fndecl = get_callee_fndecl (exp), attr;
9891
9892 if (fndecl
9893 && (attr = lookup_attribute ("error",
9894 DECL_ATTRIBUTES (fndecl))) != NULL)
9895 error ("%Kcall to %qs declared with attribute error: %s",
9896 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9897 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9898 if (fndecl
9899 && (attr = lookup_attribute ("warning",
9900 DECL_ATTRIBUTES (fndecl))) != NULL)
9901 warning_at (tree_nonartificial_location (exp),
9902 0, "%Kcall to %qs declared with attribute warning: %s",
9903 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9904 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9905
9906 /* Check for a built-in function. */
9907 if (fndecl && DECL_BUILT_IN (fndecl))
9908 {
9909 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
9910 return expand_builtin (exp, target, subtarget, tmode, ignore);
9911 }
9912 }
9913 return expand_call (exp, target, ignore);
9914
9915 case VIEW_CONVERT_EXPR:
9916 op0 = NULL_RTX;
9917
9918 /* If we are converting to BLKmode, try to avoid an intermediate
9919 temporary by fetching an inner memory reference. */
9920 if (mode == BLKmode
9921 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9922 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
9923 && handled_component_p (treeop0))
9924 {
9925 enum machine_mode mode1;
9926 HOST_WIDE_INT bitsize, bitpos;
9927 tree offset;
9928 int unsignedp;
9929 int volatilep = 0;
9930 tree tem
9931 = get_inner_reference (treeop0, &bitsize, &bitpos,
9932 &offset, &mode1, &unsignedp, &volatilep,
9933 true);
9934 rtx orig_op0;
9935
9936 /* ??? We should work harder and deal with non-zero offsets. */
9937 if (!offset
9938 && (bitpos % BITS_PER_UNIT) == 0
9939 && bitsize >= 0
9940 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
9941 {
9942 /* See the normal_inner_ref case for the rationale. */
9943 orig_op0
9944 = expand_expr (tem,
9945 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9946 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9947 != INTEGER_CST)
9948 && modifier != EXPAND_STACK_PARM
9949 ? target : NULL_RTX),
9950 VOIDmode,
9951 (modifier == EXPAND_INITIALIZER
9952 || modifier == EXPAND_CONST_ADDRESS
9953 || modifier == EXPAND_STACK_PARM)
9954 ? modifier : EXPAND_NORMAL);
9955
9956 if (MEM_P (orig_op0))
9957 {
9958 op0 = orig_op0;
9959
9960 /* Get a reference to just this component. */
9961 if (modifier == EXPAND_CONST_ADDRESS
9962 || modifier == EXPAND_SUM
9963 || modifier == EXPAND_INITIALIZER)
9964 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
9965 else
9966 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
9967
9968 if (op0 == orig_op0)
9969 op0 = copy_rtx (op0);
9970
9971 set_mem_attributes (op0, treeop0, 0);
9972 if (REG_P (XEXP (op0, 0)))
9973 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9974
9975 MEM_VOLATILE_P (op0) |= volatilep;
9976 }
9977 }
9978 }
9979
9980 if (!op0)
9981 op0 = expand_expr (treeop0,
9982 NULL_RTX, VOIDmode, modifier);
9983
9984 /* If the input and output modes are both the same, we are done. */
9985 if (mode == GET_MODE (op0))
9986 ;
9987 /* If neither mode is BLKmode, and both modes are the same size
9988 then we can use gen_lowpart. */
9989 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
9990 && (GET_MODE_PRECISION (mode)
9991 == GET_MODE_PRECISION (GET_MODE (op0)))
9992 && !COMPLEX_MODE_P (GET_MODE (op0)))
9993 {
9994 if (GET_CODE (op0) == SUBREG)
9995 op0 = force_reg (GET_MODE (op0), op0);
9996 temp = gen_lowpart_common (mode, op0);
9997 if (temp)
9998 op0 = temp;
9999 else
10000 {
10001 if (!REG_P (op0) && !MEM_P (op0))
10002 op0 = force_reg (GET_MODE (op0), op0);
10003 op0 = gen_lowpart (mode, op0);
10004 }
10005 }
10006 /* If both types are integral, convert from one mode to the other. */
10007 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10008 op0 = convert_modes (mode, GET_MODE (op0), op0,
10009 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10010 /* As a last resort, spill op0 to memory, and reload it in a
10011 different mode. */
10012 else if (!MEM_P (op0))
10013 {
10014 /* If the operand is not a MEM, force it into memory. Since we
10015 are going to be changing the mode of the MEM, don't call
10016 force_const_mem for constants because we don't allow pool
10017 constants to change mode. */
10018 tree inner_type = TREE_TYPE (treeop0);
10019
10020 gcc_assert (!TREE_ADDRESSABLE (exp));
10021
10022 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10023 target
10024 = assign_stack_temp_for_type
10025 (TYPE_MODE (inner_type),
10026 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
10027
10028 emit_move_insn (target, op0);
10029 op0 = target;
10030 }
10031
10032 /* At this point, OP0 is in the correct mode. If the output type is
10033 such that the operand is known to be aligned, indicate that it is.
10034 Otherwise, we need only be concerned about alignment for non-BLKmode
10035 results. */
10036 if (MEM_P (op0))
10037 {
10038 enum insn_code icode;
10039
10040 op0 = copy_rtx (op0);
10041
10042 if (TYPE_ALIGN_OK (type))
10043 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10044 else if (mode != BLKmode
10045 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)
10046 /* If the target does have special handling for unaligned
10047 loads of mode then use them. */
10048 && ((icode = optab_handler (movmisalign_optab, mode))
10049 != CODE_FOR_nothing))
10050 {
10051 rtx reg, insn;
10052
10053 op0 = adjust_address (op0, mode, 0);
10054 /* We've already validated the memory, and we're creating a
10055 new pseudo destination. The predicates really can't
10056 fail. */
10057 reg = gen_reg_rtx (mode);
10058
10059 /* Nor can the insn generator. */
10060 insn = GEN_FCN (icode) (reg, op0);
10061 emit_insn (insn);
10062 return reg;
10063 }
10064 else if (STRICT_ALIGNMENT
10065 && mode != BLKmode
10066 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10067 {
10068 tree inner_type = TREE_TYPE (treeop0);
10069 HOST_WIDE_INT temp_size
10070 = MAX (int_size_in_bytes (inner_type),
10071 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10072 rtx new_rtx
10073 = assign_stack_temp_for_type (mode, temp_size, 0, type);
10074 rtx new_with_op0_mode
10075 = adjust_address (new_rtx, GET_MODE (op0), 0);
10076
10077 gcc_assert (!TREE_ADDRESSABLE (exp));
10078
10079 if (GET_MODE (op0) == BLKmode)
10080 emit_block_move (new_with_op0_mode, op0,
10081 GEN_INT (GET_MODE_SIZE (mode)),
10082 (modifier == EXPAND_STACK_PARM
10083 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10084 else
10085 emit_move_insn (new_with_op0_mode, op0);
10086
10087 op0 = new_rtx;
10088 }
10089
10090 op0 = adjust_address (op0, mode, 0);
10091 }
10092
10093 return op0;
10094
10095 case MODIFY_EXPR:
10096 {
10097 tree lhs = treeop0;
10098 tree rhs = treeop1;
10099 gcc_assert (ignore);
10100
10101 /* Check for |= or &= of a bitfield of size one into another bitfield
10102 of size 1. In this case, (unless we need the result of the
10103 assignment) we can do this more efficiently with a
10104 test followed by an assignment, if necessary.
10105
10106 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10107 things change so we do, this code should be enhanced to
10108 support it. */
10109 if (TREE_CODE (lhs) == COMPONENT_REF
10110 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10111 || TREE_CODE (rhs) == BIT_AND_EXPR)
10112 && TREE_OPERAND (rhs, 0) == lhs
10113 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10114 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10115 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10116 {
10117 rtx label = gen_label_rtx ();
10118 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10119 do_jump (TREE_OPERAND (rhs, 1),
10120 value ? label : 0,
10121 value ? 0 : label, -1);
10122 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10123 MOVE_NONTEMPORAL (exp));
10124 do_pending_stack_adjust ();
10125 emit_label (label);
10126 return const0_rtx;
10127 }
10128
10129 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
10130 return const0_rtx;
10131 }
10132
10133 case ADDR_EXPR:
10134 return expand_expr_addr_expr (exp, target, tmode, modifier);
10135
10136 case REALPART_EXPR:
10137 op0 = expand_normal (treeop0);
10138 return read_complex_part (op0, false);
10139
10140 case IMAGPART_EXPR:
10141 op0 = expand_normal (treeop0);
10142 return read_complex_part (op0, true);
10143
10144 case RETURN_EXPR:
10145 case LABEL_EXPR:
10146 case GOTO_EXPR:
10147 case SWITCH_EXPR:
10148 case ASM_EXPR:
10149 /* Expanded in cfgexpand.c. */
10150 gcc_unreachable ();
10151
10152 case TRY_CATCH_EXPR:
10153 case CATCH_EXPR:
10154 case EH_FILTER_EXPR:
10155 case TRY_FINALLY_EXPR:
10156 /* Lowered by tree-eh.c. */
10157 gcc_unreachable ();
10158
10159 case WITH_CLEANUP_EXPR:
10160 case CLEANUP_POINT_EXPR:
10161 case TARGET_EXPR:
10162 case CASE_LABEL_EXPR:
10163 case VA_ARG_EXPR:
10164 case BIND_EXPR:
10165 case INIT_EXPR:
10166 case CONJ_EXPR:
10167 case COMPOUND_EXPR:
10168 case PREINCREMENT_EXPR:
10169 case PREDECREMENT_EXPR:
10170 case POSTINCREMENT_EXPR:
10171 case POSTDECREMENT_EXPR:
10172 case LOOP_EXPR:
10173 case EXIT_EXPR:
10174 /* Lowered by gimplify.c. */
10175 gcc_unreachable ();
10176
10177 case FDESC_EXPR:
10178 /* Function descriptors are not valid except for as
10179 initialization constants, and should not be expanded. */
10180 gcc_unreachable ();
10181
10182 case WITH_SIZE_EXPR:
10183 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10184 have pulled out the size to use in whatever context it needed. */
10185 return expand_expr_real (treeop0, original_target, tmode,
10186 modifier, alt_rtl);
10187
10188 case COMPOUND_LITERAL_EXPR:
10189 {
10190 /* Initialize the anonymous variable declared in the compound
10191 literal, then return the variable. */
10192 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
10193
10194 /* Create RTL for this variable. */
10195 if (!DECL_RTL_SET_P (decl))
10196 {
10197 if (DECL_HARD_REGISTER (decl))
10198 /* The user specified an assembler name for this variable.
10199 Set that up now. */
10200 rest_of_decl_compilation (decl, 0, 0);
10201 else
10202 expand_decl (decl);
10203 }
10204
10205 return expand_expr_real (decl, original_target, tmode,
10206 modifier, alt_rtl);
10207 }
10208
10209 default:
10210 return expand_expr_real_2 (&ops, target, tmode, modifier);
10211 }
10212 }
10213 \f
10214 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10215 signedness of TYPE), possibly returning the result in TARGET. */
10216 static rtx
10217 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10218 {
10219 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10220 if (target && GET_MODE (target) != GET_MODE (exp))
10221 target = 0;
10222 /* For constant values, reduce using build_int_cst_type. */
10223 if (CONST_INT_P (exp))
10224 {
10225 HOST_WIDE_INT value = INTVAL (exp);
10226 tree t = build_int_cst_type (type, value);
10227 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10228 }
10229 else if (TYPE_UNSIGNED (type))
10230 {
10231 rtx mask = immed_double_int_const (double_int_mask (prec),
10232 GET_MODE (exp));
10233 return expand_and (GET_MODE (exp), exp, mask, target);
10234 }
10235 else
10236 {
10237 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10238 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10239 exp, count, target, 0);
10240 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10241 exp, count, target, 0);
10242 }
10243 }
10244 \f
10245 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10246 when applied to the address of EXP produces an address known to be
10247 aligned more than BIGGEST_ALIGNMENT. */
10248
10249 static int
10250 is_aligning_offset (const_tree offset, const_tree exp)
10251 {
10252 /* Strip off any conversions. */
10253 while (CONVERT_EXPR_P (offset))
10254 offset = TREE_OPERAND (offset, 0);
10255
10256 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10257 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10258 if (TREE_CODE (offset) != BIT_AND_EXPR
10259 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10260 || compare_tree_int (TREE_OPERAND (offset, 1),
10261 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10262 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10263 return 0;
10264
10265 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10266 It must be NEGATE_EXPR. Then strip any more conversions. */
10267 offset = TREE_OPERAND (offset, 0);
10268 while (CONVERT_EXPR_P (offset))
10269 offset = TREE_OPERAND (offset, 0);
10270
10271 if (TREE_CODE (offset) != NEGATE_EXPR)
10272 return 0;
10273
10274 offset = TREE_OPERAND (offset, 0);
10275 while (CONVERT_EXPR_P (offset))
10276 offset = TREE_OPERAND (offset, 0);
10277
10278 /* This must now be the address of EXP. */
10279 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10280 }
10281 \f
10282 /* Return the tree node if an ARG corresponds to a string constant or zero
10283 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10284 in bytes within the string that ARG is accessing. The type of the
10285 offset will be `sizetype'. */
10286
10287 tree
10288 string_constant (tree arg, tree *ptr_offset)
10289 {
10290 tree array, offset, lower_bound;
10291 STRIP_NOPS (arg);
10292
10293 if (TREE_CODE (arg) == ADDR_EXPR)
10294 {
10295 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10296 {
10297 *ptr_offset = size_zero_node;
10298 return TREE_OPERAND (arg, 0);
10299 }
10300 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10301 {
10302 array = TREE_OPERAND (arg, 0);
10303 offset = size_zero_node;
10304 }
10305 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10306 {
10307 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10308 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10309 if (TREE_CODE (array) != STRING_CST
10310 && TREE_CODE (array) != VAR_DECL)
10311 return 0;
10312
10313 /* Check if the array has a nonzero lower bound. */
10314 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10315 if (!integer_zerop (lower_bound))
10316 {
10317 /* If the offset and base aren't both constants, return 0. */
10318 if (TREE_CODE (lower_bound) != INTEGER_CST)
10319 return 0;
10320 if (TREE_CODE (offset) != INTEGER_CST)
10321 return 0;
10322 /* Adjust offset by the lower bound. */
10323 offset = size_diffop (fold_convert (sizetype, offset),
10324 fold_convert (sizetype, lower_bound));
10325 }
10326 }
10327 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10328 {
10329 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10330 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10331 if (TREE_CODE (array) != ADDR_EXPR)
10332 return 0;
10333 array = TREE_OPERAND (array, 0);
10334 if (TREE_CODE (array) != STRING_CST
10335 && TREE_CODE (array) != VAR_DECL)
10336 return 0;
10337 }
10338 else
10339 return 0;
10340 }
10341 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10342 {
10343 tree arg0 = TREE_OPERAND (arg, 0);
10344 tree arg1 = TREE_OPERAND (arg, 1);
10345
10346 STRIP_NOPS (arg0);
10347 STRIP_NOPS (arg1);
10348
10349 if (TREE_CODE (arg0) == ADDR_EXPR
10350 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10351 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10352 {
10353 array = TREE_OPERAND (arg0, 0);
10354 offset = arg1;
10355 }
10356 else if (TREE_CODE (arg1) == ADDR_EXPR
10357 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10358 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10359 {
10360 array = TREE_OPERAND (arg1, 0);
10361 offset = arg0;
10362 }
10363 else
10364 return 0;
10365 }
10366 else
10367 return 0;
10368
10369 if (TREE_CODE (array) == STRING_CST)
10370 {
10371 *ptr_offset = fold_convert (sizetype, offset);
10372 return array;
10373 }
10374 else if (TREE_CODE (array) == VAR_DECL
10375 || TREE_CODE (array) == CONST_DECL)
10376 {
10377 int length;
10378
10379 /* Variables initialized to string literals can be handled too. */
10380 if (!const_value_known_p (array)
10381 || !DECL_INITIAL (array)
10382 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10383 return 0;
10384
10385 /* Avoid const char foo[4] = "abcde"; */
10386 if (DECL_SIZE_UNIT (array) == NULL_TREE
10387 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10388 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10389 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10390 return 0;
10391
10392 /* If variable is bigger than the string literal, OFFSET must be constant
10393 and inside of the bounds of the string literal. */
10394 offset = fold_convert (sizetype, offset);
10395 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10396 && (! host_integerp (offset, 1)
10397 || compare_tree_int (offset, length) >= 0))
10398 return 0;
10399
10400 *ptr_offset = offset;
10401 return DECL_INITIAL (array);
10402 }
10403
10404 return 0;
10405 }
10406 \f
10407 /* Generate code to calculate OPS, and exploded expression
10408 using a store-flag instruction and return an rtx for the result.
10409 OPS reflects a comparison.
10410
10411 If TARGET is nonzero, store the result there if convenient.
10412
10413 Return zero if there is no suitable set-flag instruction
10414 available on this machine.
10415
10416 Once expand_expr has been called on the arguments of the comparison,
10417 we are committed to doing the store flag, since it is not safe to
10418 re-evaluate the expression. We emit the store-flag insn by calling
10419 emit_store_flag, but only expand the arguments if we have a reason
10420 to believe that emit_store_flag will be successful. If we think that
10421 it will, but it isn't, we have to simulate the store-flag with a
10422 set/jump/set sequence. */
10423
10424 static rtx
10425 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10426 {
10427 enum rtx_code code;
10428 tree arg0, arg1, type;
10429 tree tem;
10430 enum machine_mode operand_mode;
10431 int unsignedp;
10432 rtx op0, op1;
10433 rtx subtarget = target;
10434 location_t loc = ops->location;
10435
10436 arg0 = ops->op0;
10437 arg1 = ops->op1;
10438
10439 /* Don't crash if the comparison was erroneous. */
10440 if (arg0 == error_mark_node || arg1 == error_mark_node)
10441 return const0_rtx;
10442
10443 type = TREE_TYPE (arg0);
10444 operand_mode = TYPE_MODE (type);
10445 unsignedp = TYPE_UNSIGNED (type);
10446
10447 /* We won't bother with BLKmode store-flag operations because it would mean
10448 passing a lot of information to emit_store_flag. */
10449 if (operand_mode == BLKmode)
10450 return 0;
10451
10452 /* We won't bother with store-flag operations involving function pointers
10453 when function pointers must be canonicalized before comparisons. */
10454 #ifdef HAVE_canonicalize_funcptr_for_compare
10455 if (HAVE_canonicalize_funcptr_for_compare
10456 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10457 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10458 == FUNCTION_TYPE))
10459 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10460 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10461 == FUNCTION_TYPE))))
10462 return 0;
10463 #endif
10464
10465 STRIP_NOPS (arg0);
10466 STRIP_NOPS (arg1);
10467
10468 /* For vector typed comparisons emit code to generate the desired
10469 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10470 expander for this. */
10471 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10472 {
10473 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10474 tree if_true = constant_boolean_node (true, ops->type);
10475 tree if_false = constant_boolean_node (false, ops->type);
10476 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10477 }
10478
10479 /* For vector typed comparisons emit code to generate the desired
10480 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10481 expander for this. */
10482 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10483 {
10484 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10485 tree if_true = constant_boolean_node (true, ops->type);
10486 tree if_false = constant_boolean_node (false, ops->type);
10487 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10488 }
10489
10490 /* Get the rtx comparison code to use. We know that EXP is a comparison
10491 operation of some type. Some comparisons against 1 and -1 can be
10492 converted to comparisons with zero. Do so here so that the tests
10493 below will be aware that we have a comparison with zero. These
10494 tests will not catch constants in the first operand, but constants
10495 are rarely passed as the first operand. */
10496
10497 switch (ops->code)
10498 {
10499 case EQ_EXPR:
10500 code = EQ;
10501 break;
10502 case NE_EXPR:
10503 code = NE;
10504 break;
10505 case LT_EXPR:
10506 if (integer_onep (arg1))
10507 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10508 else
10509 code = unsignedp ? LTU : LT;
10510 break;
10511 case LE_EXPR:
10512 if (! unsignedp && integer_all_onesp (arg1))
10513 arg1 = integer_zero_node, code = LT;
10514 else
10515 code = unsignedp ? LEU : LE;
10516 break;
10517 case GT_EXPR:
10518 if (! unsignedp && integer_all_onesp (arg1))
10519 arg1 = integer_zero_node, code = GE;
10520 else
10521 code = unsignedp ? GTU : GT;
10522 break;
10523 case GE_EXPR:
10524 if (integer_onep (arg1))
10525 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10526 else
10527 code = unsignedp ? GEU : GE;
10528 break;
10529
10530 case UNORDERED_EXPR:
10531 code = UNORDERED;
10532 break;
10533 case ORDERED_EXPR:
10534 code = ORDERED;
10535 break;
10536 case UNLT_EXPR:
10537 code = UNLT;
10538 break;
10539 case UNLE_EXPR:
10540 code = UNLE;
10541 break;
10542 case UNGT_EXPR:
10543 code = UNGT;
10544 break;
10545 case UNGE_EXPR:
10546 code = UNGE;
10547 break;
10548 case UNEQ_EXPR:
10549 code = UNEQ;
10550 break;
10551 case LTGT_EXPR:
10552 code = LTGT;
10553 break;
10554
10555 default:
10556 gcc_unreachable ();
10557 }
10558
10559 /* Put a constant second. */
10560 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10561 || TREE_CODE (arg0) == FIXED_CST)
10562 {
10563 tem = arg0; arg0 = arg1; arg1 = tem;
10564 code = swap_condition (code);
10565 }
10566
10567 /* If this is an equality or inequality test of a single bit, we can
10568 do this by shifting the bit being tested to the low-order bit and
10569 masking the result with the constant 1. If the condition was EQ,
10570 we xor it with 1. This does not require an scc insn and is faster
10571 than an scc insn even if we have it.
10572
10573 The code to make this transformation was moved into fold_single_bit_test,
10574 so we just call into the folder and expand its result. */
10575
10576 if ((code == NE || code == EQ)
10577 && integer_zerop (arg1)
10578 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10579 {
10580 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
10581 if (srcstmt
10582 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
10583 {
10584 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
10585 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10586 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
10587 gimple_assign_rhs1 (srcstmt),
10588 gimple_assign_rhs2 (srcstmt));
10589 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
10590 if (temp)
10591 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
10592 }
10593 }
10594
10595 if (! get_subtarget (target)
10596 || GET_MODE (subtarget) != operand_mode)
10597 subtarget = 0;
10598
10599 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10600
10601 if (target == 0)
10602 target = gen_reg_rtx (mode);
10603
10604 /* Try a cstore if possible. */
10605 return emit_store_flag_force (target, code, op0, op1,
10606 operand_mode, unsignedp,
10607 (TYPE_PRECISION (ops->type) == 1
10608 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10609 }
10610 \f
10611
10612 /* Stubs in case we haven't got a casesi insn. */
10613 #ifndef HAVE_casesi
10614 # define HAVE_casesi 0
10615 # define gen_casesi(a, b, c, d, e) (0)
10616 # define CODE_FOR_casesi CODE_FOR_nothing
10617 #endif
10618
10619 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10620 0 otherwise (i.e. if there is no casesi instruction). */
10621 int
10622 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10623 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10624 rtx fallback_label ATTRIBUTE_UNUSED)
10625 {
10626 struct expand_operand ops[5];
10627 enum machine_mode index_mode = SImode;
10628 rtx op1, op2, index;
10629
10630 if (! HAVE_casesi)
10631 return 0;
10632
10633 /* Convert the index to SImode. */
10634 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10635 {
10636 enum machine_mode omode = TYPE_MODE (index_type);
10637 rtx rangertx = expand_normal (range);
10638
10639 /* We must handle the endpoints in the original mode. */
10640 index_expr = build2 (MINUS_EXPR, index_type,
10641 index_expr, minval);
10642 minval = integer_zero_node;
10643 index = expand_normal (index_expr);
10644 if (default_label)
10645 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10646 omode, 1, default_label);
10647 /* Now we can safely truncate. */
10648 index = convert_to_mode (index_mode, index, 0);
10649 }
10650 else
10651 {
10652 if (TYPE_MODE (index_type) != index_mode)
10653 {
10654 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
10655 index_expr = fold_convert (index_type, index_expr);
10656 }
10657
10658 index = expand_normal (index_expr);
10659 }
10660
10661 do_pending_stack_adjust ();
10662
10663 op1 = expand_normal (minval);
10664 op2 = expand_normal (range);
10665
10666 create_input_operand (&ops[0], index, index_mode);
10667 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10668 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10669 create_fixed_operand (&ops[3], table_label);
10670 create_fixed_operand (&ops[4], (default_label
10671 ? default_label
10672 : fallback_label));
10673 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10674 return 1;
10675 }
10676
10677 /* Attempt to generate a tablejump instruction; same concept. */
10678 #ifndef HAVE_tablejump
10679 #define HAVE_tablejump 0
10680 #define gen_tablejump(x, y) (0)
10681 #endif
10682
10683 /* Subroutine of the next function.
10684
10685 INDEX is the value being switched on, with the lowest value
10686 in the table already subtracted.
10687 MODE is its expected mode (needed if INDEX is constant).
10688 RANGE is the length of the jump table.
10689 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10690
10691 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10692 index value is out of range. */
10693
10694 static void
10695 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10696 rtx default_label)
10697 {
10698 rtx temp, vector;
10699
10700 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10701 cfun->cfg->max_jumptable_ents = INTVAL (range);
10702
10703 /* Do an unsigned comparison (in the proper mode) between the index
10704 expression and the value which represents the length of the range.
10705 Since we just finished subtracting the lower bound of the range
10706 from the index expression, this comparison allows us to simultaneously
10707 check that the original index expression value is both greater than
10708 or equal to the minimum value of the range and less than or equal to
10709 the maximum value of the range. */
10710
10711 if (default_label)
10712 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10713 default_label);
10714
10715 /* If index is in range, it must fit in Pmode.
10716 Convert to Pmode so we can index with it. */
10717 if (mode != Pmode)
10718 index = convert_to_mode (Pmode, index, 1);
10719
10720 /* Don't let a MEM slip through, because then INDEX that comes
10721 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10722 and break_out_memory_refs will go to work on it and mess it up. */
10723 #ifdef PIC_CASE_VECTOR_ADDRESS
10724 if (flag_pic && !REG_P (index))
10725 index = copy_to_mode_reg (Pmode, index);
10726 #endif
10727
10728 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10729 GET_MODE_SIZE, because this indicates how large insns are. The other
10730 uses should all be Pmode, because they are addresses. This code
10731 could fail if addresses and insns are not the same size. */
10732 index = gen_rtx_PLUS (Pmode,
10733 gen_rtx_MULT (Pmode, index,
10734 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10735 gen_rtx_LABEL_REF (Pmode, table_label));
10736 #ifdef PIC_CASE_VECTOR_ADDRESS
10737 if (flag_pic)
10738 index = PIC_CASE_VECTOR_ADDRESS (index);
10739 else
10740 #endif
10741 index = memory_address (CASE_VECTOR_MODE, index);
10742 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10743 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10744 convert_move (temp, vector, 0);
10745
10746 emit_jump_insn (gen_tablejump (temp, table_label));
10747
10748 /* If we are generating PIC code or if the table is PC-relative, the
10749 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10750 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10751 emit_barrier ();
10752 }
10753
10754 int
10755 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10756 rtx table_label, rtx default_label)
10757 {
10758 rtx index;
10759
10760 if (! HAVE_tablejump)
10761 return 0;
10762
10763 index_expr = fold_build2 (MINUS_EXPR, index_type,
10764 fold_convert (index_type, index_expr),
10765 fold_convert (index_type, minval));
10766 index = expand_normal (index_expr);
10767 do_pending_stack_adjust ();
10768
10769 do_tablejump (index, TYPE_MODE (index_type),
10770 convert_modes (TYPE_MODE (index_type),
10771 TYPE_MODE (TREE_TYPE (range)),
10772 expand_normal (range),
10773 TYPE_UNSIGNED (TREE_TYPE (range))),
10774 table_label, default_label);
10775 return 1;
10776 }
10777
10778 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10779 static rtx
10780 const_vector_from_tree (tree exp)
10781 {
10782 rtvec v;
10783 unsigned i;
10784 int units;
10785 tree elt;
10786 enum machine_mode inner, mode;
10787
10788 mode = TYPE_MODE (TREE_TYPE (exp));
10789
10790 if (initializer_zerop (exp))
10791 return CONST0_RTX (mode);
10792
10793 units = GET_MODE_NUNITS (mode);
10794 inner = GET_MODE_INNER (mode);
10795
10796 v = rtvec_alloc (units);
10797
10798 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
10799 {
10800 elt = VECTOR_CST_ELT (exp, i);
10801
10802 if (TREE_CODE (elt) == REAL_CST)
10803 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10804 inner);
10805 else if (TREE_CODE (elt) == FIXED_CST)
10806 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10807 inner);
10808 else
10809 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10810 inner);
10811 }
10812
10813 return gen_rtx_CONST_VECTOR (mode, v);
10814 }
10815
10816 /* Build a decl for a personality function given a language prefix. */
10817
10818 tree
10819 build_personality_function (const char *lang)
10820 {
10821 const char *unwind_and_version;
10822 tree decl, type;
10823 char *name;
10824
10825 switch (targetm_common.except_unwind_info (&global_options))
10826 {
10827 case UI_NONE:
10828 return NULL;
10829 case UI_SJLJ:
10830 unwind_and_version = "_sj0";
10831 break;
10832 case UI_DWARF2:
10833 case UI_TARGET:
10834 unwind_and_version = "_v0";
10835 break;
10836 default:
10837 gcc_unreachable ();
10838 }
10839
10840 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
10841
10842 type = build_function_type_list (integer_type_node, integer_type_node,
10843 long_long_unsigned_type_node,
10844 ptr_type_node, ptr_type_node, NULL_TREE);
10845 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
10846 get_identifier (name), type);
10847 DECL_ARTIFICIAL (decl) = 1;
10848 DECL_EXTERNAL (decl) = 1;
10849 TREE_PUBLIC (decl) = 1;
10850
10851 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
10852 are the flags assigned by targetm.encode_section_info. */
10853 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
10854
10855 return decl;
10856 }
10857
10858 /* Extracts the personality function of DECL and returns the corresponding
10859 libfunc. */
10860
10861 rtx
10862 get_personality_function (tree decl)
10863 {
10864 tree personality = DECL_FUNCTION_PERSONALITY (decl);
10865 enum eh_personality_kind pk;
10866
10867 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
10868 if (pk == eh_personality_none)
10869 return NULL;
10870
10871 if (!personality
10872 && pk == eh_personality_any)
10873 personality = lang_hooks.eh_personality ();
10874
10875 if (pk == eh_personality_lang)
10876 gcc_assert (personality != NULL_TREE);
10877
10878 return XEXP (DECL_RTL (personality), 0);
10879 }
10880
10881 #include "gt-expr.h"