tree.h (convert_to_ptrofftype_loc): New function.
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "common/common-target.h"
53 #include "timevar.h"
54 #include "df.h"
55 #include "diagnostic.h"
56 #include "ssaexpand.h"
57 #include "target-globals.h"
58 #include "params.h"
59
60 /* Decide whether a function's arguments should be processed
61 from first to last or from last to first.
62
63 They should if the stack and args grow in opposite directions, but
64 only if we have push insns. */
65
66 #ifdef PUSH_ROUNDING
67
68 #ifndef PUSH_ARGS_REVERSED
69 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
70 #define PUSH_ARGS_REVERSED /* If it's last to first. */
71 #endif
72 #endif
73
74 #endif
75
76 #ifndef STACK_PUSH_CODE
77 #ifdef STACK_GROWS_DOWNWARD
78 #define STACK_PUSH_CODE PRE_DEC
79 #else
80 #define STACK_PUSH_CODE PRE_INC
81 #endif
82 #endif
83
84
85 /* If this is nonzero, we do not bother generating VOLATILE
86 around volatile memory references, and we are willing to
87 output indirect addresses. If cse is to follow, we reject
88 indirect addresses so a useful potential cse is generated;
89 if it is used only once, instruction combination will produce
90 the same indirect address eventually. */
91 int cse_not_expected;
92
93 /* This structure is used by move_by_pieces to describe the move to
94 be performed. */
95 struct move_by_pieces_d
96 {
97 rtx to;
98 rtx to_addr;
99 int autinc_to;
100 int explicit_inc_to;
101 rtx from;
102 rtx from_addr;
103 int autinc_from;
104 int explicit_inc_from;
105 unsigned HOST_WIDE_INT len;
106 HOST_WIDE_INT offset;
107 int reverse;
108 };
109
110 /* This structure is used by store_by_pieces to describe the clear to
111 be performed. */
112
113 struct store_by_pieces_d
114 {
115 rtx to;
116 rtx to_addr;
117 int autinc_to;
118 int explicit_inc_to;
119 unsigned HOST_WIDE_INT len;
120 HOST_WIDE_INT offset;
121 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
122 void *constfundata;
123 int reverse;
124 };
125
126 static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT,
127 unsigned int,
128 unsigned int);
129 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
130 struct move_by_pieces_d *);
131 static bool block_move_libcall_safe_for_call_parm (void);
132 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
133 static tree emit_block_move_libcall_fn (int);
134 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
135 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
136 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
137 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
138 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
139 struct store_by_pieces_d *);
140 static tree clear_storage_libcall_fn (int);
141 static rtx compress_float_constant (rtx, rtx);
142 static rtx get_subtarget (rtx);
143 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
144 HOST_WIDE_INT, enum machine_mode,
145 tree, tree, int, alias_set_type);
146 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
147 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
148 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
149 enum machine_mode,
150 tree, tree, alias_set_type, bool);
151
152 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
153
154 static int is_aligning_offset (const_tree, const_tree);
155 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
156 enum expand_modifier);
157 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
158 static rtx do_store_flag (sepops, rtx, enum machine_mode);
159 #ifdef PUSH_ROUNDING
160 static void emit_single_push_insn (enum machine_mode, rtx, tree);
161 #endif
162 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
163 static rtx const_vector_from_tree (tree);
164 static void write_complex_part (rtx, rtx, bool);
165
166 /* This macro is used to determine whether move_by_pieces should be called
167 to perform a structure copy. */
168 #ifndef MOVE_BY_PIECES_P
169 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
170 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
171 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
172 #endif
173
174 /* This macro is used to determine whether clear_by_pieces should be
175 called to clear storage. */
176 #ifndef CLEAR_BY_PIECES_P
177 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
178 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
179 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
180 #endif
181
182 /* This macro is used to determine whether store_by_pieces should be
183 called to "memset" storage with byte values other than zero. */
184 #ifndef SET_BY_PIECES_P
185 #define SET_BY_PIECES_P(SIZE, ALIGN) \
186 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
187 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
188 #endif
189
190 /* This macro is used to determine whether store_by_pieces should be
191 called to "memcpy" storage when the source is a constant string. */
192 #ifndef STORE_BY_PIECES_P
193 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
194 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
195 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
196 #endif
197
198 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
199
200 #ifndef SLOW_UNALIGNED_ACCESS
201 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
202 #endif
203 \f
204 /* This is run to set up which modes can be used
205 directly in memory and to initialize the block move optab. It is run
206 at the beginning of compilation and when the target is reinitialized. */
207
208 void
209 init_expr_target (void)
210 {
211 rtx insn, pat;
212 enum machine_mode mode;
213 int num_clobbers;
214 rtx mem, mem1;
215 rtx reg;
216
217 /* Try indexing by frame ptr and try by stack ptr.
218 It is known that on the Convex the stack ptr isn't a valid index.
219 With luck, one or the other is valid on any machine. */
220 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
221 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
222
223 /* A scratch register we can modify in-place below to avoid
224 useless RTL allocations. */
225 reg = gen_rtx_REG (VOIDmode, -1);
226
227 insn = rtx_alloc (INSN);
228 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
229 PATTERN (insn) = pat;
230
231 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
232 mode = (enum machine_mode) ((int) mode + 1))
233 {
234 int regno;
235
236 direct_load[(int) mode] = direct_store[(int) mode] = 0;
237 PUT_MODE (mem, mode);
238 PUT_MODE (mem1, mode);
239 PUT_MODE (reg, mode);
240
241 /* See if there is some register that can be used in this mode and
242 directly loaded or stored from memory. */
243
244 if (mode != VOIDmode && mode != BLKmode)
245 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
246 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
247 regno++)
248 {
249 if (! HARD_REGNO_MODE_OK (regno, mode))
250 continue;
251
252 SET_REGNO (reg, regno);
253
254 SET_SRC (pat) = mem;
255 SET_DEST (pat) = reg;
256 if (recog (pat, insn, &num_clobbers) >= 0)
257 direct_load[(int) mode] = 1;
258
259 SET_SRC (pat) = mem1;
260 SET_DEST (pat) = reg;
261 if (recog (pat, insn, &num_clobbers) >= 0)
262 direct_load[(int) mode] = 1;
263
264 SET_SRC (pat) = reg;
265 SET_DEST (pat) = mem;
266 if (recog (pat, insn, &num_clobbers) >= 0)
267 direct_store[(int) mode] = 1;
268
269 SET_SRC (pat) = reg;
270 SET_DEST (pat) = mem1;
271 if (recog (pat, insn, &num_clobbers) >= 0)
272 direct_store[(int) mode] = 1;
273 }
274 }
275
276 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
277
278 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
279 mode = GET_MODE_WIDER_MODE (mode))
280 {
281 enum machine_mode srcmode;
282 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
283 srcmode = GET_MODE_WIDER_MODE (srcmode))
284 {
285 enum insn_code ic;
286
287 ic = can_extend_p (mode, srcmode, 0);
288 if (ic == CODE_FOR_nothing)
289 continue;
290
291 PUT_MODE (mem, srcmode);
292
293 if (insn_operand_matches (ic, 1, mem))
294 float_extend_from_mem[mode][srcmode] = true;
295 }
296 }
297 }
298
299 /* This is run at the start of compiling a function. */
300
301 void
302 init_expr (void)
303 {
304 memset (&crtl->expr, 0, sizeof (crtl->expr));
305 }
306 \f
307 /* Copy data from FROM to TO, where the machine modes are not the same.
308 Both modes may be integer, or both may be floating, or both may be
309 fixed-point.
310 UNSIGNEDP should be nonzero if FROM is an unsigned type.
311 This causes zero-extension instead of sign-extension. */
312
313 void
314 convert_move (rtx to, rtx from, int unsignedp)
315 {
316 enum machine_mode to_mode = GET_MODE (to);
317 enum machine_mode from_mode = GET_MODE (from);
318 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
319 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
320 enum insn_code code;
321 rtx libcall;
322
323 /* rtx code for making an equivalent value. */
324 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
325 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
326
327
328 gcc_assert (to_real == from_real);
329 gcc_assert (to_mode != BLKmode);
330 gcc_assert (from_mode != BLKmode);
331
332 /* If the source and destination are already the same, then there's
333 nothing to do. */
334 if (to == from)
335 return;
336
337 /* If FROM is a SUBREG that indicates that we have already done at least
338 the required extension, strip it. We don't handle such SUBREGs as
339 TO here. */
340
341 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
342 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
343 >= GET_MODE_PRECISION (to_mode))
344 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
345 from = gen_lowpart (to_mode, from), from_mode = to_mode;
346
347 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
348
349 if (to_mode == from_mode
350 || (from_mode == VOIDmode && CONSTANT_P (from)))
351 {
352 emit_move_insn (to, from);
353 return;
354 }
355
356 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
357 {
358 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
359
360 if (VECTOR_MODE_P (to_mode))
361 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
362 else
363 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
364
365 emit_move_insn (to, from);
366 return;
367 }
368
369 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
370 {
371 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
372 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
373 return;
374 }
375
376 if (to_real)
377 {
378 rtx value, insns;
379 convert_optab tab;
380
381 gcc_assert ((GET_MODE_PRECISION (from_mode)
382 != GET_MODE_PRECISION (to_mode))
383 || (DECIMAL_FLOAT_MODE_P (from_mode)
384 != DECIMAL_FLOAT_MODE_P (to_mode)));
385
386 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
387 /* Conversion between decimal float and binary float, same size. */
388 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
389 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
390 tab = sext_optab;
391 else
392 tab = trunc_optab;
393
394 /* Try converting directly if the insn is supported. */
395
396 code = convert_optab_handler (tab, to_mode, from_mode);
397 if (code != CODE_FOR_nothing)
398 {
399 emit_unop_insn (code, to, from,
400 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
401 return;
402 }
403
404 /* Otherwise use a libcall. */
405 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
406
407 /* Is this conversion implemented yet? */
408 gcc_assert (libcall);
409
410 start_sequence ();
411 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
412 1, from, from_mode);
413 insns = get_insns ();
414 end_sequence ();
415 emit_libcall_block (insns, to, value,
416 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
417 from)
418 : gen_rtx_FLOAT_EXTEND (to_mode, from));
419 return;
420 }
421
422 /* Handle pointer conversion. */ /* SPEE 900220. */
423 /* Targets are expected to provide conversion insns between PxImode and
424 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
425 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
426 {
427 enum machine_mode full_mode
428 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
429
430 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
431 != CODE_FOR_nothing);
432
433 if (full_mode != from_mode)
434 from = convert_to_mode (full_mode, from, unsignedp);
435 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
436 to, from, UNKNOWN);
437 return;
438 }
439 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
440 {
441 rtx new_from;
442 enum machine_mode full_mode
443 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
444
445 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)
446 != CODE_FOR_nothing);
447
448 if (to_mode == full_mode)
449 {
450 emit_unop_insn (convert_optab_handler (sext_optab, full_mode,
451 from_mode),
452 to, from, UNKNOWN);
453 return;
454 }
455
456 new_from = gen_reg_rtx (full_mode);
457 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode),
458 new_from, from, UNKNOWN);
459
460 /* else proceed to integer conversions below. */
461 from_mode = full_mode;
462 from = new_from;
463 }
464
465 /* Make sure both are fixed-point modes or both are not. */
466 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
467 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
468 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
469 {
470 /* If we widen from_mode to to_mode and they are in the same class,
471 we won't saturate the result.
472 Otherwise, always saturate the result to play safe. */
473 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
474 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
475 expand_fixed_convert (to, from, 0, 0);
476 else
477 expand_fixed_convert (to, from, 0, 1);
478 return;
479 }
480
481 /* Now both modes are integers. */
482
483 /* Handle expanding beyond a word. */
484 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
485 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
486 {
487 rtx insns;
488 rtx lowpart;
489 rtx fill_value;
490 rtx lowfrom;
491 int i;
492 enum machine_mode lowpart_mode;
493 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
494
495 /* Try converting directly if the insn is supported. */
496 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
497 != CODE_FOR_nothing)
498 {
499 /* If FROM is a SUBREG, put it into a register. Do this
500 so that we always generate the same set of insns for
501 better cse'ing; if an intermediate assignment occurred,
502 we won't be doing the operation directly on the SUBREG. */
503 if (optimize > 0 && GET_CODE (from) == SUBREG)
504 from = force_reg (from_mode, from);
505 emit_unop_insn (code, to, from, equiv_code);
506 return;
507 }
508 /* Next, try converting via full word. */
509 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
510 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
511 != CODE_FOR_nothing))
512 {
513 rtx word_to = gen_reg_rtx (word_mode);
514 if (REG_P (to))
515 {
516 if (reg_overlap_mentioned_p (to, from))
517 from = force_reg (from_mode, from);
518 emit_clobber (to);
519 }
520 convert_move (word_to, from, unsignedp);
521 emit_unop_insn (code, to, word_to, equiv_code);
522 return;
523 }
524
525 /* No special multiword conversion insn; do it by hand. */
526 start_sequence ();
527
528 /* Since we will turn this into a no conflict block, we must ensure
529 that the source does not overlap the target. */
530
531 if (reg_overlap_mentioned_p (to, from))
532 from = force_reg (from_mode, from);
533
534 /* Get a copy of FROM widened to a word, if necessary. */
535 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
536 lowpart_mode = word_mode;
537 else
538 lowpart_mode = from_mode;
539
540 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
541
542 lowpart = gen_lowpart (lowpart_mode, to);
543 emit_move_insn (lowpart, lowfrom);
544
545 /* Compute the value to put in each remaining word. */
546 if (unsignedp)
547 fill_value = const0_rtx;
548 else
549 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
550 LT, lowfrom, const0_rtx,
551 VOIDmode, 0, -1);
552
553 /* Fill the remaining words. */
554 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
555 {
556 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
557 rtx subword = operand_subword (to, index, 1, to_mode);
558
559 gcc_assert (subword);
560
561 if (fill_value != subword)
562 emit_move_insn (subword, fill_value);
563 }
564
565 insns = get_insns ();
566 end_sequence ();
567
568 emit_insn (insns);
569 return;
570 }
571
572 /* Truncating multi-word to a word or less. */
573 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
574 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
575 {
576 if (!((MEM_P (from)
577 && ! MEM_VOLATILE_P (from)
578 && direct_load[(int) to_mode]
579 && ! mode_dependent_address_p (XEXP (from, 0)))
580 || REG_P (from)
581 || GET_CODE (from) == SUBREG))
582 from = force_reg (from_mode, from);
583 convert_move (to, gen_lowpart (word_mode, from), 0);
584 return;
585 }
586
587 /* Now follow all the conversions between integers
588 no more than a word long. */
589
590 /* For truncation, usually we can just refer to FROM in a narrower mode. */
591 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
592 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
593 {
594 if (!((MEM_P (from)
595 && ! MEM_VOLATILE_P (from)
596 && direct_load[(int) to_mode]
597 && ! mode_dependent_address_p (XEXP (from, 0)))
598 || REG_P (from)
599 || GET_CODE (from) == SUBREG))
600 from = force_reg (from_mode, from);
601 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
602 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
603 from = copy_to_reg (from);
604 emit_move_insn (to, gen_lowpart (to_mode, from));
605 return;
606 }
607
608 /* Handle extension. */
609 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
610 {
611 /* Convert directly if that works. */
612 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
613 != CODE_FOR_nothing)
614 {
615 emit_unop_insn (code, to, from, equiv_code);
616 return;
617 }
618 else
619 {
620 enum machine_mode intermediate;
621 rtx tmp;
622 int shift_amount;
623
624 /* Search for a mode to convert via. */
625 for (intermediate = from_mode; intermediate != VOIDmode;
626 intermediate = GET_MODE_WIDER_MODE (intermediate))
627 if (((can_extend_p (to_mode, intermediate, unsignedp)
628 != CODE_FOR_nothing)
629 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
630 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
631 && (can_extend_p (intermediate, from_mode, unsignedp)
632 != CODE_FOR_nothing))
633 {
634 convert_move (to, convert_to_mode (intermediate, from,
635 unsignedp), unsignedp);
636 return;
637 }
638
639 /* No suitable intermediate mode.
640 Generate what we need with shifts. */
641 shift_amount = (GET_MODE_PRECISION (to_mode)
642 - GET_MODE_PRECISION (from_mode));
643 from = gen_lowpart (to_mode, force_reg (from_mode, from));
644 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
645 to, unsignedp);
646 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
647 to, unsignedp);
648 if (tmp != to)
649 emit_move_insn (to, tmp);
650 return;
651 }
652 }
653
654 /* Support special truncate insns for certain modes. */
655 if (convert_optab_handler (trunc_optab, to_mode,
656 from_mode) != CODE_FOR_nothing)
657 {
658 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
659 to, from, UNKNOWN);
660 return;
661 }
662
663 /* Handle truncation of volatile memrefs, and so on;
664 the things that couldn't be truncated directly,
665 and for which there was no special instruction.
666
667 ??? Code above formerly short-circuited this, for most integer
668 mode pairs, with a force_reg in from_mode followed by a recursive
669 call to this routine. Appears always to have been wrong. */
670 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
671 {
672 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
673 emit_move_insn (to, temp);
674 return;
675 }
676
677 /* Mode combination is not recognized. */
678 gcc_unreachable ();
679 }
680
681 /* Return an rtx for a value that would result
682 from converting X to mode MODE.
683 Both X and MODE may be floating, or both integer.
684 UNSIGNEDP is nonzero if X is an unsigned value.
685 This can be done by referring to a part of X in place
686 or by copying to a new temporary with conversion. */
687
688 rtx
689 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
690 {
691 return convert_modes (mode, VOIDmode, x, unsignedp);
692 }
693
694 /* Return an rtx for a value that would result
695 from converting X from mode OLDMODE to mode MODE.
696 Both modes may be floating, or both integer.
697 UNSIGNEDP is nonzero if X is an unsigned value.
698
699 This can be done by referring to a part of X in place
700 or by copying to a new temporary with conversion.
701
702 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
703
704 rtx
705 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
706 {
707 rtx temp;
708
709 /* If FROM is a SUBREG that indicates that we have already done at least
710 the required extension, strip it. */
711
712 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
713 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
714 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
715 x = gen_lowpart (mode, x);
716
717 if (GET_MODE (x) != VOIDmode)
718 oldmode = GET_MODE (x);
719
720 if (mode == oldmode)
721 return x;
722
723 /* There is one case that we must handle specially: If we are converting
724 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
725 we are to interpret the constant as unsigned, gen_lowpart will do
726 the wrong if the constant appears negative. What we want to do is
727 make the high-order word of the constant zero, not all ones. */
728
729 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
730 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
731 && CONST_INT_P (x) && INTVAL (x) < 0)
732 {
733 double_int val = uhwi_to_double_int (INTVAL (x));
734
735 /* We need to zero extend VAL. */
736 if (oldmode != VOIDmode)
737 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
738
739 return immed_double_int_const (val, mode);
740 }
741
742 /* We can do this with a gen_lowpart if both desired and current modes
743 are integer, and this is either a constant integer, a register, or a
744 non-volatile MEM. Except for the constant case where MODE is no
745 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
746
747 if ((CONST_INT_P (x)
748 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
749 || (GET_MODE_CLASS (mode) == MODE_INT
750 && GET_MODE_CLASS (oldmode) == MODE_INT
751 && (GET_CODE (x) == CONST_DOUBLE
752 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
753 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
754 && direct_load[(int) mode])
755 || (REG_P (x)
756 && (! HARD_REGISTER_P (x)
757 || HARD_REGNO_MODE_OK (REGNO (x), mode))
758 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
759 GET_MODE (x))))))))
760 {
761 /* ?? If we don't know OLDMODE, we have to assume here that
762 X does not need sign- or zero-extension. This may not be
763 the case, but it's the best we can do. */
764 if (CONST_INT_P (x) && oldmode != VOIDmode
765 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
766 {
767 HOST_WIDE_INT val = INTVAL (x);
768
769 /* We must sign or zero-extend in this case. Start by
770 zero-extending, then sign extend if we need to. */
771 val &= GET_MODE_MASK (oldmode);
772 if (! unsignedp
773 && val_signbit_known_set_p (oldmode, val))
774 val |= ~GET_MODE_MASK (oldmode);
775
776 return gen_int_mode (val, mode);
777 }
778
779 return gen_lowpart (mode, x);
780 }
781
782 /* Converting from integer constant into mode is always equivalent to an
783 subreg operation. */
784 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
785 {
786 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
787 return simplify_gen_subreg (mode, x, oldmode, 0);
788 }
789
790 temp = gen_reg_rtx (mode);
791 convert_move (temp, x, unsignedp);
792 return temp;
793 }
794 \f
795 /* Return the largest alignment we can use for doing a move (or store)
796 of MAX_PIECES. ALIGN is the largest alignment we could use. */
797
798 static unsigned int
799 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
800 {
801 enum machine_mode tmode;
802
803 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
804 if (align >= GET_MODE_ALIGNMENT (tmode))
805 align = GET_MODE_ALIGNMENT (tmode);
806 else
807 {
808 enum machine_mode tmode, xmode;
809
810 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
811 tmode != VOIDmode;
812 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
813 if (GET_MODE_SIZE (tmode) > max_pieces
814 || SLOW_UNALIGNED_ACCESS (tmode, align))
815 break;
816
817 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
818 }
819
820 return align;
821 }
822
823 /* Return the widest integer mode no wider than SIZE. If no such mode
824 can be found, return VOIDmode. */
825
826 static enum machine_mode
827 widest_int_mode_for_size (unsigned int size)
828 {
829 enum machine_mode tmode, mode = VOIDmode;
830
831 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
832 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
833 if (GET_MODE_SIZE (tmode) < size)
834 mode = tmode;
835
836 return mode;
837 }
838
839 /* STORE_MAX_PIECES is the number of bytes at a time that we can
840 store efficiently. Due to internal GCC limitations, this is
841 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
842 for an immediate constant. */
843
844 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
845
846 /* Determine whether the LEN bytes can be moved by using several move
847 instructions. Return nonzero if a call to move_by_pieces should
848 succeed. */
849
850 int
851 can_move_by_pieces (unsigned HOST_WIDE_INT len,
852 unsigned int align ATTRIBUTE_UNUSED)
853 {
854 return MOVE_BY_PIECES_P (len, align);
855 }
856
857 /* Generate several move instructions to copy LEN bytes from block FROM to
858 block TO. (These are MEM rtx's with BLKmode).
859
860 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
861 used to push FROM to the stack.
862
863 ALIGN is maximum stack alignment we can assume.
864
865 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
866 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
867 stpcpy. */
868
869 rtx
870 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
871 unsigned int align, int endp)
872 {
873 struct move_by_pieces_d data;
874 enum machine_mode to_addr_mode, from_addr_mode
875 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
876 rtx to_addr, from_addr = XEXP (from, 0);
877 unsigned int max_size = MOVE_MAX_PIECES + 1;
878 enum insn_code icode;
879
880 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
881
882 data.offset = 0;
883 data.from_addr = from_addr;
884 if (to)
885 {
886 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
887 to_addr = XEXP (to, 0);
888 data.to = to;
889 data.autinc_to
890 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
891 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
892 data.reverse
893 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
894 }
895 else
896 {
897 to_addr_mode = VOIDmode;
898 to_addr = NULL_RTX;
899 data.to = NULL_RTX;
900 data.autinc_to = 1;
901 #ifdef STACK_GROWS_DOWNWARD
902 data.reverse = 1;
903 #else
904 data.reverse = 0;
905 #endif
906 }
907 data.to_addr = to_addr;
908 data.from = from;
909 data.autinc_from
910 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
911 || GET_CODE (from_addr) == POST_INC
912 || GET_CODE (from_addr) == POST_DEC);
913
914 data.explicit_inc_from = 0;
915 data.explicit_inc_to = 0;
916 if (data.reverse) data.offset = len;
917 data.len = len;
918
919 /* If copying requires more than two move insns,
920 copy addresses to registers (to make displacements shorter)
921 and use post-increment if available. */
922 if (!(data.autinc_from && data.autinc_to)
923 && move_by_pieces_ninsns (len, align, max_size) > 2)
924 {
925 /* Find the mode of the largest move...
926 MODE might not be used depending on the definitions of the
927 USE_* macros below. */
928 enum machine_mode mode ATTRIBUTE_UNUSED
929 = widest_int_mode_for_size (max_size);
930
931 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
932 {
933 data.from_addr = copy_to_mode_reg (from_addr_mode,
934 plus_constant (from_addr, len));
935 data.autinc_from = 1;
936 data.explicit_inc_from = -1;
937 }
938 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
939 {
940 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
941 data.autinc_from = 1;
942 data.explicit_inc_from = 1;
943 }
944 if (!data.autinc_from && CONSTANT_P (from_addr))
945 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
946 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
947 {
948 data.to_addr = copy_to_mode_reg (to_addr_mode,
949 plus_constant (to_addr, len));
950 data.autinc_to = 1;
951 data.explicit_inc_to = -1;
952 }
953 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
954 {
955 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
956 data.autinc_to = 1;
957 data.explicit_inc_to = 1;
958 }
959 if (!data.autinc_to && CONSTANT_P (to_addr))
960 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
961 }
962
963 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
964
965 /* First move what we can in the largest integer mode, then go to
966 successively smaller modes. */
967
968 while (max_size > 1)
969 {
970 enum machine_mode mode = widest_int_mode_for_size (max_size);
971
972 if (mode == VOIDmode)
973 break;
974
975 icode = optab_handler (mov_optab, mode);
976 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
977 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
978
979 max_size = GET_MODE_SIZE (mode);
980 }
981
982 /* The code above should have handled everything. */
983 gcc_assert (!data.len);
984
985 if (endp)
986 {
987 rtx to1;
988
989 gcc_assert (!data.reverse);
990 if (data.autinc_to)
991 {
992 if (endp == 2)
993 {
994 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
995 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
996 else
997 data.to_addr = copy_to_mode_reg (to_addr_mode,
998 plus_constant (data.to_addr,
999 -1));
1000 }
1001 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
1002 data.offset);
1003 }
1004 else
1005 {
1006 if (endp == 2)
1007 --data.offset;
1008 to1 = adjust_address (data.to, QImode, data.offset);
1009 }
1010 return to1;
1011 }
1012 else
1013 return data.to;
1014 }
1015
1016 /* Return number of insns required to move L bytes by pieces.
1017 ALIGN (in bits) is maximum alignment we can assume. */
1018
1019 static unsigned HOST_WIDE_INT
1020 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1021 unsigned int max_size)
1022 {
1023 unsigned HOST_WIDE_INT n_insns = 0;
1024
1025 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1026
1027 while (max_size > 1)
1028 {
1029 enum machine_mode mode;
1030 enum insn_code icode;
1031
1032 mode = widest_int_mode_for_size (max_size);
1033
1034 if (mode == VOIDmode)
1035 break;
1036
1037 icode = optab_handler (mov_optab, mode);
1038 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1039 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1040
1041 max_size = GET_MODE_SIZE (mode);
1042 }
1043
1044 gcc_assert (!l);
1045 return n_insns;
1046 }
1047
1048 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1049 with move instructions for mode MODE. GENFUN is the gen_... function
1050 to make a move insn for that mode. DATA has all the other info. */
1051
1052 static void
1053 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1054 struct move_by_pieces_d *data)
1055 {
1056 unsigned int size = GET_MODE_SIZE (mode);
1057 rtx to1 = NULL_RTX, from1;
1058
1059 while (data->len >= size)
1060 {
1061 if (data->reverse)
1062 data->offset -= size;
1063
1064 if (data->to)
1065 {
1066 if (data->autinc_to)
1067 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1068 data->offset);
1069 else
1070 to1 = adjust_address (data->to, mode, data->offset);
1071 }
1072
1073 if (data->autinc_from)
1074 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1075 data->offset);
1076 else
1077 from1 = adjust_address (data->from, mode, data->offset);
1078
1079 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1080 emit_insn (gen_add2_insn (data->to_addr,
1081 GEN_INT (-(HOST_WIDE_INT)size)));
1082 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1083 emit_insn (gen_add2_insn (data->from_addr,
1084 GEN_INT (-(HOST_WIDE_INT)size)));
1085
1086 if (data->to)
1087 emit_insn ((*genfun) (to1, from1));
1088 else
1089 {
1090 #ifdef PUSH_ROUNDING
1091 emit_single_push_insn (mode, from1, NULL);
1092 #else
1093 gcc_unreachable ();
1094 #endif
1095 }
1096
1097 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1098 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1099 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1100 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1101
1102 if (! data->reverse)
1103 data->offset += size;
1104
1105 data->len -= size;
1106 }
1107 }
1108 \f
1109 /* Emit code to move a block Y to a block X. This may be done with
1110 string-move instructions, with multiple scalar move instructions,
1111 or with a library call.
1112
1113 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1114 SIZE is an rtx that says how long they are.
1115 ALIGN is the maximum alignment we can assume they have.
1116 METHOD describes what kind of copy this is, and what mechanisms may be used.
1117
1118 Return the address of the new block, if memcpy is called and returns it,
1119 0 otherwise. */
1120
1121 rtx
1122 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1123 unsigned int expected_align, HOST_WIDE_INT expected_size)
1124 {
1125 bool may_use_call;
1126 rtx retval = 0;
1127 unsigned int align;
1128
1129 gcc_assert (size);
1130 if (CONST_INT_P (size)
1131 && INTVAL (size) == 0)
1132 return 0;
1133
1134 switch (method)
1135 {
1136 case BLOCK_OP_NORMAL:
1137 case BLOCK_OP_TAILCALL:
1138 may_use_call = true;
1139 break;
1140
1141 case BLOCK_OP_CALL_PARM:
1142 may_use_call = block_move_libcall_safe_for_call_parm ();
1143
1144 /* Make inhibit_defer_pop nonzero around the library call
1145 to force it to pop the arguments right away. */
1146 NO_DEFER_POP;
1147 break;
1148
1149 case BLOCK_OP_NO_LIBCALL:
1150 may_use_call = false;
1151 break;
1152
1153 default:
1154 gcc_unreachable ();
1155 }
1156
1157 gcc_assert (MEM_P (x) && MEM_P (y));
1158 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1159 gcc_assert (align >= BITS_PER_UNIT);
1160
1161 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1162 block copy is more efficient for other large modes, e.g. DCmode. */
1163 x = adjust_address (x, BLKmode, 0);
1164 y = adjust_address (y, BLKmode, 0);
1165
1166 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1167 can be incorrect is coming from __builtin_memcpy. */
1168 if (CONST_INT_P (size))
1169 {
1170 x = shallow_copy_rtx (x);
1171 y = shallow_copy_rtx (y);
1172 set_mem_size (x, INTVAL (size));
1173 set_mem_size (y, INTVAL (size));
1174 }
1175
1176 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1177 move_by_pieces (x, y, INTVAL (size), align, 0);
1178 else if (emit_block_move_via_movmem (x, y, size, align,
1179 expected_align, expected_size))
1180 ;
1181 else if (may_use_call
1182 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1183 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1184 {
1185 /* Since x and y are passed to a libcall, mark the corresponding
1186 tree EXPR as addressable. */
1187 tree y_expr = MEM_EXPR (y);
1188 tree x_expr = MEM_EXPR (x);
1189 if (y_expr)
1190 mark_addressable (y_expr);
1191 if (x_expr)
1192 mark_addressable (x_expr);
1193 retval = emit_block_move_via_libcall (x, y, size,
1194 method == BLOCK_OP_TAILCALL);
1195 }
1196
1197 else
1198 emit_block_move_via_loop (x, y, size, align);
1199
1200 if (method == BLOCK_OP_CALL_PARM)
1201 OK_DEFER_POP;
1202
1203 return retval;
1204 }
1205
1206 rtx
1207 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1208 {
1209 return emit_block_move_hints (x, y, size, method, 0, -1);
1210 }
1211
1212 /* A subroutine of emit_block_move. Returns true if calling the
1213 block move libcall will not clobber any parameters which may have
1214 already been placed on the stack. */
1215
1216 static bool
1217 block_move_libcall_safe_for_call_parm (void)
1218 {
1219 #if defined (REG_PARM_STACK_SPACE)
1220 tree fn;
1221 #endif
1222
1223 /* If arguments are pushed on the stack, then they're safe. */
1224 if (PUSH_ARGS)
1225 return true;
1226
1227 /* If registers go on the stack anyway, any argument is sure to clobber
1228 an outgoing argument. */
1229 #if defined (REG_PARM_STACK_SPACE)
1230 fn = emit_block_move_libcall_fn (false);
1231 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1232 depend on its argument. */
1233 (void) fn;
1234 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1235 && REG_PARM_STACK_SPACE (fn) != 0)
1236 return false;
1237 #endif
1238
1239 /* If any argument goes in memory, then it might clobber an outgoing
1240 argument. */
1241 {
1242 CUMULATIVE_ARGS args_so_far_v;
1243 cumulative_args_t args_so_far;
1244 tree fn, arg;
1245
1246 fn = emit_block_move_libcall_fn (false);
1247 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1248 args_so_far = pack_cumulative_args (&args_so_far_v);
1249
1250 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1251 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1252 {
1253 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1254 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1255 NULL_TREE, true);
1256 if (!tmp || !REG_P (tmp))
1257 return false;
1258 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1259 return false;
1260 targetm.calls.function_arg_advance (args_so_far, mode,
1261 NULL_TREE, true);
1262 }
1263 }
1264 return true;
1265 }
1266
1267 /* A subroutine of emit_block_move. Expand a movmem pattern;
1268 return true if successful. */
1269
1270 static bool
1271 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1272 unsigned int expected_align, HOST_WIDE_INT expected_size)
1273 {
1274 int save_volatile_ok = volatile_ok;
1275 enum machine_mode mode;
1276
1277 if (expected_align < align)
1278 expected_align = align;
1279
1280 /* Since this is a move insn, we don't care about volatility. */
1281 volatile_ok = 1;
1282
1283 /* Try the most limited insn first, because there's no point
1284 including more than one in the machine description unless
1285 the more limited one has some advantage. */
1286
1287 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1288 mode = GET_MODE_WIDER_MODE (mode))
1289 {
1290 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1291
1292 if (code != CODE_FOR_nothing
1293 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1294 here because if SIZE is less than the mode mask, as it is
1295 returned by the macro, it will definitely be less than the
1296 actual mode mask. */
1297 && ((CONST_INT_P (size)
1298 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1299 <= (GET_MODE_MASK (mode) >> 1)))
1300 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1301 {
1302 struct expand_operand ops[6];
1303 unsigned int nops;
1304
1305 /* ??? When called via emit_block_move_for_call, it'd be
1306 nice if there were some way to inform the backend, so
1307 that it doesn't fail the expansion because it thinks
1308 emitting the libcall would be more efficient. */
1309 nops = insn_data[(int) code].n_generator_args;
1310 gcc_assert (nops == 4 || nops == 6);
1311
1312 create_fixed_operand (&ops[0], x);
1313 create_fixed_operand (&ops[1], y);
1314 /* The check above guarantees that this size conversion is valid. */
1315 create_convert_operand_to (&ops[2], size, mode, true);
1316 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1317 if (nops == 6)
1318 {
1319 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1320 create_integer_operand (&ops[5], expected_size);
1321 }
1322 if (maybe_expand_insn (code, nops, ops))
1323 {
1324 volatile_ok = save_volatile_ok;
1325 return true;
1326 }
1327 }
1328 }
1329
1330 volatile_ok = save_volatile_ok;
1331 return false;
1332 }
1333
1334 /* A subroutine of emit_block_move. Expand a call to memcpy.
1335 Return the return value from memcpy, 0 otherwise. */
1336
1337 rtx
1338 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1339 {
1340 rtx dst_addr, src_addr;
1341 tree call_expr, fn, src_tree, dst_tree, size_tree;
1342 enum machine_mode size_mode;
1343 rtx retval;
1344
1345 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1346 pseudos. We can then place those new pseudos into a VAR_DECL and
1347 use them later. */
1348
1349 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1350 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1351
1352 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1353 src_addr = convert_memory_address (ptr_mode, src_addr);
1354
1355 dst_tree = make_tree (ptr_type_node, dst_addr);
1356 src_tree = make_tree (ptr_type_node, src_addr);
1357
1358 size_mode = TYPE_MODE (sizetype);
1359
1360 size = convert_to_mode (size_mode, size, 1);
1361 size = copy_to_mode_reg (size_mode, size);
1362
1363 /* It is incorrect to use the libcall calling conventions to call
1364 memcpy in this context. This could be a user call to memcpy and
1365 the user may wish to examine the return value from memcpy. For
1366 targets where libcalls and normal calls have different conventions
1367 for returning pointers, we could end up generating incorrect code. */
1368
1369 size_tree = make_tree (sizetype, size);
1370
1371 fn = emit_block_move_libcall_fn (true);
1372 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1373 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1374
1375 retval = expand_normal (call_expr);
1376
1377 return retval;
1378 }
1379
1380 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1381 for the function we use for block copies. The first time FOR_CALL
1382 is true, we call assemble_external. */
1383
1384 static GTY(()) tree block_move_fn;
1385
1386 void
1387 init_block_move_fn (const char *asmspec)
1388 {
1389 if (!block_move_fn)
1390 {
1391 tree args, fn;
1392
1393 fn = get_identifier ("memcpy");
1394 args = build_function_type_list (ptr_type_node, ptr_type_node,
1395 const_ptr_type_node, sizetype,
1396 NULL_TREE);
1397
1398 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1399 DECL_EXTERNAL (fn) = 1;
1400 TREE_PUBLIC (fn) = 1;
1401 DECL_ARTIFICIAL (fn) = 1;
1402 TREE_NOTHROW (fn) = 1;
1403 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1404 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1405
1406 block_move_fn = fn;
1407 }
1408
1409 if (asmspec)
1410 set_user_assembler_name (block_move_fn, asmspec);
1411 }
1412
1413 static tree
1414 emit_block_move_libcall_fn (int for_call)
1415 {
1416 static bool emitted_extern;
1417
1418 if (!block_move_fn)
1419 init_block_move_fn (NULL);
1420
1421 if (for_call && !emitted_extern)
1422 {
1423 emitted_extern = true;
1424 make_decl_rtl (block_move_fn);
1425 assemble_external (block_move_fn);
1426 }
1427
1428 return block_move_fn;
1429 }
1430
1431 /* A subroutine of emit_block_move. Copy the data via an explicit
1432 loop. This is used only when libcalls are forbidden. */
1433 /* ??? It'd be nice to copy in hunks larger than QImode. */
1434
1435 static void
1436 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1437 unsigned int align ATTRIBUTE_UNUSED)
1438 {
1439 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1440 enum machine_mode x_addr_mode
1441 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1442 enum machine_mode y_addr_mode
1443 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1444 enum machine_mode iter_mode;
1445
1446 iter_mode = GET_MODE (size);
1447 if (iter_mode == VOIDmode)
1448 iter_mode = word_mode;
1449
1450 top_label = gen_label_rtx ();
1451 cmp_label = gen_label_rtx ();
1452 iter = gen_reg_rtx (iter_mode);
1453
1454 emit_move_insn (iter, const0_rtx);
1455
1456 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1457 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1458 do_pending_stack_adjust ();
1459
1460 emit_jump (cmp_label);
1461 emit_label (top_label);
1462
1463 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1464 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1465
1466 if (x_addr_mode != y_addr_mode)
1467 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1468 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1469
1470 x = change_address (x, QImode, x_addr);
1471 y = change_address (y, QImode, y_addr);
1472
1473 emit_move_insn (x, y);
1474
1475 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1476 true, OPTAB_LIB_WIDEN);
1477 if (tmp != iter)
1478 emit_move_insn (iter, tmp);
1479
1480 emit_label (cmp_label);
1481
1482 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1483 true, top_label);
1484 }
1485 \f
1486 /* Copy all or part of a value X into registers starting at REGNO.
1487 The number of registers to be filled is NREGS. */
1488
1489 void
1490 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1491 {
1492 int i;
1493 #ifdef HAVE_load_multiple
1494 rtx pat;
1495 rtx last;
1496 #endif
1497
1498 if (nregs == 0)
1499 return;
1500
1501 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1502 x = validize_mem (force_const_mem (mode, x));
1503
1504 /* See if the machine can do this with a load multiple insn. */
1505 #ifdef HAVE_load_multiple
1506 if (HAVE_load_multiple)
1507 {
1508 last = get_last_insn ();
1509 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1510 GEN_INT (nregs));
1511 if (pat)
1512 {
1513 emit_insn (pat);
1514 return;
1515 }
1516 else
1517 delete_insns_since (last);
1518 }
1519 #endif
1520
1521 for (i = 0; i < nregs; i++)
1522 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1523 operand_subword_force (x, i, mode));
1524 }
1525
1526 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1527 The number of registers to be filled is NREGS. */
1528
1529 void
1530 move_block_from_reg (int regno, rtx x, int nregs)
1531 {
1532 int i;
1533
1534 if (nregs == 0)
1535 return;
1536
1537 /* See if the machine can do this with a store multiple insn. */
1538 #ifdef HAVE_store_multiple
1539 if (HAVE_store_multiple)
1540 {
1541 rtx last = get_last_insn ();
1542 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1543 GEN_INT (nregs));
1544 if (pat)
1545 {
1546 emit_insn (pat);
1547 return;
1548 }
1549 else
1550 delete_insns_since (last);
1551 }
1552 #endif
1553
1554 for (i = 0; i < nregs; i++)
1555 {
1556 rtx tem = operand_subword (x, i, 1, BLKmode);
1557
1558 gcc_assert (tem);
1559
1560 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1561 }
1562 }
1563
1564 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1565 ORIG, where ORIG is a non-consecutive group of registers represented by
1566 a PARALLEL. The clone is identical to the original except in that the
1567 original set of registers is replaced by a new set of pseudo registers.
1568 The new set has the same modes as the original set. */
1569
1570 rtx
1571 gen_group_rtx (rtx orig)
1572 {
1573 int i, length;
1574 rtx *tmps;
1575
1576 gcc_assert (GET_CODE (orig) == PARALLEL);
1577
1578 length = XVECLEN (orig, 0);
1579 tmps = XALLOCAVEC (rtx, length);
1580
1581 /* Skip a NULL entry in first slot. */
1582 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1583
1584 if (i)
1585 tmps[0] = 0;
1586
1587 for (; i < length; i++)
1588 {
1589 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1590 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1591
1592 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1593 }
1594
1595 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1596 }
1597
1598 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1599 except that values are placed in TMPS[i], and must later be moved
1600 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1601
1602 static void
1603 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1604 {
1605 rtx src;
1606 int start, i;
1607 enum machine_mode m = GET_MODE (orig_src);
1608
1609 gcc_assert (GET_CODE (dst) == PARALLEL);
1610
1611 if (m != VOIDmode
1612 && !SCALAR_INT_MODE_P (m)
1613 && !MEM_P (orig_src)
1614 && GET_CODE (orig_src) != CONCAT)
1615 {
1616 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1617 if (imode == BLKmode)
1618 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1619 else
1620 src = gen_reg_rtx (imode);
1621 if (imode != BLKmode)
1622 src = gen_lowpart (GET_MODE (orig_src), src);
1623 emit_move_insn (src, orig_src);
1624 /* ...and back again. */
1625 if (imode != BLKmode)
1626 src = gen_lowpart (imode, src);
1627 emit_group_load_1 (tmps, dst, src, type, ssize);
1628 return;
1629 }
1630
1631 /* Check for a NULL entry, used to indicate that the parameter goes
1632 both on the stack and in registers. */
1633 if (XEXP (XVECEXP (dst, 0, 0), 0))
1634 start = 0;
1635 else
1636 start = 1;
1637
1638 /* Process the pieces. */
1639 for (i = start; i < XVECLEN (dst, 0); i++)
1640 {
1641 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1642 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1643 unsigned int bytelen = GET_MODE_SIZE (mode);
1644 int shift = 0;
1645
1646 /* Handle trailing fragments that run over the size of the struct. */
1647 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1648 {
1649 /* Arrange to shift the fragment to where it belongs.
1650 extract_bit_field loads to the lsb of the reg. */
1651 if (
1652 #ifdef BLOCK_REG_PADDING
1653 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1654 == (BYTES_BIG_ENDIAN ? upward : downward)
1655 #else
1656 BYTES_BIG_ENDIAN
1657 #endif
1658 )
1659 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1660 bytelen = ssize - bytepos;
1661 gcc_assert (bytelen > 0);
1662 }
1663
1664 /* If we won't be loading directly from memory, protect the real source
1665 from strange tricks we might play; but make sure that the source can
1666 be loaded directly into the destination. */
1667 src = orig_src;
1668 if (!MEM_P (orig_src)
1669 && (!CONSTANT_P (orig_src)
1670 || (GET_MODE (orig_src) != mode
1671 && GET_MODE (orig_src) != VOIDmode)))
1672 {
1673 if (GET_MODE (orig_src) == VOIDmode)
1674 src = gen_reg_rtx (mode);
1675 else
1676 src = gen_reg_rtx (GET_MODE (orig_src));
1677
1678 emit_move_insn (src, orig_src);
1679 }
1680
1681 /* Optimize the access just a bit. */
1682 if (MEM_P (src)
1683 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1684 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1685 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1686 && bytelen == GET_MODE_SIZE (mode))
1687 {
1688 tmps[i] = gen_reg_rtx (mode);
1689 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1690 }
1691 else if (COMPLEX_MODE_P (mode)
1692 && GET_MODE (src) == mode
1693 && bytelen == GET_MODE_SIZE (mode))
1694 /* Let emit_move_complex do the bulk of the work. */
1695 tmps[i] = src;
1696 else if (GET_CODE (src) == CONCAT)
1697 {
1698 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1699 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1700
1701 if ((bytepos == 0 && bytelen == slen0)
1702 || (bytepos != 0 && bytepos + bytelen <= slen))
1703 {
1704 /* The following assumes that the concatenated objects all
1705 have the same size. In this case, a simple calculation
1706 can be used to determine the object and the bit field
1707 to be extracted. */
1708 tmps[i] = XEXP (src, bytepos / slen0);
1709 if (! CONSTANT_P (tmps[i])
1710 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1711 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1712 (bytepos % slen0) * BITS_PER_UNIT,
1713 1, false, NULL_RTX, mode, mode);
1714 }
1715 else
1716 {
1717 rtx mem;
1718
1719 gcc_assert (!bytepos);
1720 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1721 emit_move_insn (mem, src);
1722 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1723 0, 1, false, NULL_RTX, mode, mode);
1724 }
1725 }
1726 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1727 SIMD register, which is currently broken. While we get GCC
1728 to emit proper RTL for these cases, let's dump to memory. */
1729 else if (VECTOR_MODE_P (GET_MODE (dst))
1730 && REG_P (src))
1731 {
1732 int slen = GET_MODE_SIZE (GET_MODE (src));
1733 rtx mem;
1734
1735 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1736 emit_move_insn (mem, src);
1737 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1738 }
1739 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1740 && XVECLEN (dst, 0) > 1)
1741 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1742 else if (CONSTANT_P (src))
1743 {
1744 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1745
1746 if (len == ssize)
1747 tmps[i] = src;
1748 else
1749 {
1750 rtx first, second;
1751
1752 gcc_assert (2 * len == ssize);
1753 split_double (src, &first, &second);
1754 if (i)
1755 tmps[i] = second;
1756 else
1757 tmps[i] = first;
1758 }
1759 }
1760 else if (REG_P (src) && GET_MODE (src) == mode)
1761 tmps[i] = src;
1762 else
1763 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1764 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1765 mode, mode);
1766
1767 if (shift)
1768 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1769 shift, tmps[i], 0);
1770 }
1771 }
1772
1773 /* Emit code to move a block SRC of type TYPE to a block DST,
1774 where DST is non-consecutive registers represented by a PARALLEL.
1775 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1776 if not known. */
1777
1778 void
1779 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1780 {
1781 rtx *tmps;
1782 int i;
1783
1784 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1785 emit_group_load_1 (tmps, dst, src, type, ssize);
1786
1787 /* Copy the extracted pieces into the proper (probable) hard regs. */
1788 for (i = 0; i < XVECLEN (dst, 0); i++)
1789 {
1790 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1791 if (d == NULL)
1792 continue;
1793 emit_move_insn (d, tmps[i]);
1794 }
1795 }
1796
1797 /* Similar, but load SRC into new pseudos in a format that looks like
1798 PARALLEL. This can later be fed to emit_group_move to get things
1799 in the right place. */
1800
1801 rtx
1802 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1803 {
1804 rtvec vec;
1805 int i;
1806
1807 vec = rtvec_alloc (XVECLEN (parallel, 0));
1808 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1809
1810 /* Convert the vector to look just like the original PARALLEL, except
1811 with the computed values. */
1812 for (i = 0; i < XVECLEN (parallel, 0); i++)
1813 {
1814 rtx e = XVECEXP (parallel, 0, i);
1815 rtx d = XEXP (e, 0);
1816
1817 if (d)
1818 {
1819 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1820 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1821 }
1822 RTVEC_ELT (vec, i) = e;
1823 }
1824
1825 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1826 }
1827
1828 /* Emit code to move a block SRC to block DST, where SRC and DST are
1829 non-consecutive groups of registers, each represented by a PARALLEL. */
1830
1831 void
1832 emit_group_move (rtx dst, rtx src)
1833 {
1834 int i;
1835
1836 gcc_assert (GET_CODE (src) == PARALLEL
1837 && GET_CODE (dst) == PARALLEL
1838 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1839
1840 /* Skip first entry if NULL. */
1841 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1842 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1843 XEXP (XVECEXP (src, 0, i), 0));
1844 }
1845
1846 /* Move a group of registers represented by a PARALLEL into pseudos. */
1847
1848 rtx
1849 emit_group_move_into_temps (rtx src)
1850 {
1851 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1852 int i;
1853
1854 for (i = 0; i < XVECLEN (src, 0); i++)
1855 {
1856 rtx e = XVECEXP (src, 0, i);
1857 rtx d = XEXP (e, 0);
1858
1859 if (d)
1860 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1861 RTVEC_ELT (vec, i) = e;
1862 }
1863
1864 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1865 }
1866
1867 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1868 where SRC is non-consecutive registers represented by a PARALLEL.
1869 SSIZE represents the total size of block ORIG_DST, or -1 if not
1870 known. */
1871
1872 void
1873 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1874 {
1875 rtx *tmps, dst;
1876 int start, finish, i;
1877 enum machine_mode m = GET_MODE (orig_dst);
1878
1879 gcc_assert (GET_CODE (src) == PARALLEL);
1880
1881 if (!SCALAR_INT_MODE_P (m)
1882 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1883 {
1884 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1885 if (imode == BLKmode)
1886 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1887 else
1888 dst = gen_reg_rtx (imode);
1889 emit_group_store (dst, src, type, ssize);
1890 if (imode != BLKmode)
1891 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1892 emit_move_insn (orig_dst, dst);
1893 return;
1894 }
1895
1896 /* Check for a NULL entry, used to indicate that the parameter goes
1897 both on the stack and in registers. */
1898 if (XEXP (XVECEXP (src, 0, 0), 0))
1899 start = 0;
1900 else
1901 start = 1;
1902 finish = XVECLEN (src, 0);
1903
1904 tmps = XALLOCAVEC (rtx, finish);
1905
1906 /* Copy the (probable) hard regs into pseudos. */
1907 for (i = start; i < finish; i++)
1908 {
1909 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1910 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1911 {
1912 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1913 emit_move_insn (tmps[i], reg);
1914 }
1915 else
1916 tmps[i] = reg;
1917 }
1918
1919 /* If we won't be storing directly into memory, protect the real destination
1920 from strange tricks we might play. */
1921 dst = orig_dst;
1922 if (GET_CODE (dst) == PARALLEL)
1923 {
1924 rtx temp;
1925
1926 /* We can get a PARALLEL dst if there is a conditional expression in
1927 a return statement. In that case, the dst and src are the same,
1928 so no action is necessary. */
1929 if (rtx_equal_p (dst, src))
1930 return;
1931
1932 /* It is unclear if we can ever reach here, but we may as well handle
1933 it. Allocate a temporary, and split this into a store/load to/from
1934 the temporary. */
1935
1936 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1937 emit_group_store (temp, src, type, ssize);
1938 emit_group_load (dst, temp, type, ssize);
1939 return;
1940 }
1941 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1942 {
1943 enum machine_mode outer = GET_MODE (dst);
1944 enum machine_mode inner;
1945 HOST_WIDE_INT bytepos;
1946 bool done = false;
1947 rtx temp;
1948
1949 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1950 dst = gen_reg_rtx (outer);
1951
1952 /* Make life a bit easier for combine. */
1953 /* If the first element of the vector is the low part
1954 of the destination mode, use a paradoxical subreg to
1955 initialize the destination. */
1956 if (start < finish)
1957 {
1958 inner = GET_MODE (tmps[start]);
1959 bytepos = subreg_lowpart_offset (inner, outer);
1960 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1961 {
1962 temp = simplify_gen_subreg (outer, tmps[start],
1963 inner, 0);
1964 if (temp)
1965 {
1966 emit_move_insn (dst, temp);
1967 done = true;
1968 start++;
1969 }
1970 }
1971 }
1972
1973 /* If the first element wasn't the low part, try the last. */
1974 if (!done
1975 && start < finish - 1)
1976 {
1977 inner = GET_MODE (tmps[finish - 1]);
1978 bytepos = subreg_lowpart_offset (inner, outer);
1979 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1980 {
1981 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1982 inner, 0);
1983 if (temp)
1984 {
1985 emit_move_insn (dst, temp);
1986 done = true;
1987 finish--;
1988 }
1989 }
1990 }
1991
1992 /* Otherwise, simply initialize the result to zero. */
1993 if (!done)
1994 emit_move_insn (dst, CONST0_RTX (outer));
1995 }
1996
1997 /* Process the pieces. */
1998 for (i = start; i < finish; i++)
1999 {
2000 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2001 enum machine_mode mode = GET_MODE (tmps[i]);
2002 unsigned int bytelen = GET_MODE_SIZE (mode);
2003 unsigned int adj_bytelen = bytelen;
2004 rtx dest = dst;
2005
2006 /* Handle trailing fragments that run over the size of the struct. */
2007 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2008 adj_bytelen = ssize - bytepos;
2009
2010 if (GET_CODE (dst) == CONCAT)
2011 {
2012 if (bytepos + adj_bytelen
2013 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2014 dest = XEXP (dst, 0);
2015 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2016 {
2017 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2018 dest = XEXP (dst, 1);
2019 }
2020 else
2021 {
2022 enum machine_mode dest_mode = GET_MODE (dest);
2023 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2024
2025 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2026
2027 if (GET_MODE_ALIGNMENT (dest_mode)
2028 >= GET_MODE_ALIGNMENT (tmp_mode))
2029 {
2030 dest = assign_stack_temp (dest_mode,
2031 GET_MODE_SIZE (dest_mode),
2032 0);
2033 emit_move_insn (adjust_address (dest,
2034 tmp_mode,
2035 bytepos),
2036 tmps[i]);
2037 dst = dest;
2038 }
2039 else
2040 {
2041 dest = assign_stack_temp (tmp_mode,
2042 GET_MODE_SIZE (tmp_mode),
2043 0);
2044 emit_move_insn (dest, tmps[i]);
2045 dst = adjust_address (dest, dest_mode, bytepos);
2046 }
2047 break;
2048 }
2049 }
2050
2051 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2052 {
2053 /* store_bit_field always takes its value from the lsb.
2054 Move the fragment to the lsb if it's not already there. */
2055 if (
2056 #ifdef BLOCK_REG_PADDING
2057 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2058 == (BYTES_BIG_ENDIAN ? upward : downward)
2059 #else
2060 BYTES_BIG_ENDIAN
2061 #endif
2062 )
2063 {
2064 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2065 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2066 shift, tmps[i], 0);
2067 }
2068 bytelen = adj_bytelen;
2069 }
2070
2071 /* Optimize the access just a bit. */
2072 if (MEM_P (dest)
2073 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2074 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2075 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2076 && bytelen == GET_MODE_SIZE (mode))
2077 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2078 else
2079 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2080 0, 0, mode, tmps[i]);
2081 }
2082
2083 /* Copy from the pseudo into the (probable) hard reg. */
2084 if (orig_dst != dst)
2085 emit_move_insn (orig_dst, dst);
2086 }
2087
2088 /* Generate code to copy a BLKmode object of TYPE out of a
2089 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2090 is null, a stack temporary is created. TGTBLK is returned.
2091
2092 The purpose of this routine is to handle functions that return
2093 BLKmode structures in registers. Some machines (the PA for example)
2094 want to return all small structures in registers regardless of the
2095 structure's alignment. */
2096
2097 rtx
2098 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2099 {
2100 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2101 rtx src = NULL, dst = NULL;
2102 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2103 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2104 enum machine_mode copy_mode;
2105
2106 if (tgtblk == 0)
2107 {
2108 tgtblk = assign_temp (build_qualified_type (type,
2109 (TYPE_QUALS (type)
2110 | TYPE_QUAL_CONST)),
2111 0, 1, 1);
2112 preserve_temp_slots (tgtblk);
2113 }
2114
2115 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2116 into a new pseudo which is a full word. */
2117
2118 if (GET_MODE (srcreg) != BLKmode
2119 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2120 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2121
2122 /* If the structure doesn't take up a whole number of words, see whether
2123 SRCREG is padded on the left or on the right. If it's on the left,
2124 set PADDING_CORRECTION to the number of bits to skip.
2125
2126 In most ABIs, the structure will be returned at the least end of
2127 the register, which translates to right padding on little-endian
2128 targets and left padding on big-endian targets. The opposite
2129 holds if the structure is returned at the most significant
2130 end of the register. */
2131 if (bytes % UNITS_PER_WORD != 0
2132 && (targetm.calls.return_in_msb (type)
2133 ? !BYTES_BIG_ENDIAN
2134 : BYTES_BIG_ENDIAN))
2135 padding_correction
2136 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2137
2138 /* Copy the structure BITSIZE bits at a time. If the target lives in
2139 memory, take care of not reading/writing past its end by selecting
2140 a copy mode suited to BITSIZE. This should always be possible given
2141 how it is computed.
2142
2143 We could probably emit more efficient code for machines which do not use
2144 strict alignment, but it doesn't seem worth the effort at the current
2145 time. */
2146
2147 copy_mode = word_mode;
2148 if (MEM_P (tgtblk))
2149 {
2150 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2151 if (mem_mode != BLKmode)
2152 copy_mode = mem_mode;
2153 }
2154
2155 for (bitpos = 0, xbitpos = padding_correction;
2156 bitpos < bytes * BITS_PER_UNIT;
2157 bitpos += bitsize, xbitpos += bitsize)
2158 {
2159 /* We need a new source operand each time xbitpos is on a
2160 word boundary and when xbitpos == padding_correction
2161 (the first time through). */
2162 if (xbitpos % BITS_PER_WORD == 0
2163 || xbitpos == padding_correction)
2164 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2165 GET_MODE (srcreg));
2166
2167 /* We need a new destination operand each time bitpos is on
2168 a word boundary. */
2169 if (bitpos % BITS_PER_WORD == 0)
2170 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2171
2172 /* Use xbitpos for the source extraction (right justified) and
2173 bitpos for the destination store (left justified). */
2174 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2175 extract_bit_field (src, bitsize,
2176 xbitpos % BITS_PER_WORD, 1, false,
2177 NULL_RTX, copy_mode, copy_mode));
2178 }
2179
2180 return tgtblk;
2181 }
2182
2183 /* Add a USE expression for REG to the (possibly empty) list pointed
2184 to by CALL_FUSAGE. REG must denote a hard register. */
2185
2186 void
2187 use_reg (rtx *call_fusage, rtx reg)
2188 {
2189 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2190
2191 *call_fusage
2192 = gen_rtx_EXPR_LIST (VOIDmode,
2193 gen_rtx_USE (VOIDmode, reg), *call_fusage);
2194 }
2195
2196 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2197 starting at REGNO. All of these registers must be hard registers. */
2198
2199 void
2200 use_regs (rtx *call_fusage, int regno, int nregs)
2201 {
2202 int i;
2203
2204 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2205
2206 for (i = 0; i < nregs; i++)
2207 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2208 }
2209
2210 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2211 PARALLEL REGS. This is for calls that pass values in multiple
2212 non-contiguous locations. The Irix 6 ABI has examples of this. */
2213
2214 void
2215 use_group_regs (rtx *call_fusage, rtx regs)
2216 {
2217 int i;
2218
2219 for (i = 0; i < XVECLEN (regs, 0); i++)
2220 {
2221 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2222
2223 /* A NULL entry means the parameter goes both on the stack and in
2224 registers. This can also be a MEM for targets that pass values
2225 partially on the stack and partially in registers. */
2226 if (reg != 0 && REG_P (reg))
2227 use_reg (call_fusage, reg);
2228 }
2229 }
2230
2231 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2232 assigment and the code of the expresion on the RHS is CODE. Return
2233 NULL otherwise. */
2234
2235 static gimple
2236 get_def_for_expr (tree name, enum tree_code code)
2237 {
2238 gimple def_stmt;
2239
2240 if (TREE_CODE (name) != SSA_NAME)
2241 return NULL;
2242
2243 def_stmt = get_gimple_for_ssa_name (name);
2244 if (!def_stmt
2245 || gimple_assign_rhs_code (def_stmt) != code)
2246 return NULL;
2247
2248 return def_stmt;
2249 }
2250 \f
2251
2252 /* Determine whether the LEN bytes generated by CONSTFUN can be
2253 stored to memory using several move instructions. CONSTFUNDATA is
2254 a pointer which will be passed as argument in every CONSTFUN call.
2255 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2256 a memset operation and false if it's a copy of a constant string.
2257 Return nonzero if a call to store_by_pieces should succeed. */
2258
2259 int
2260 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2261 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2262 void *constfundata, unsigned int align, bool memsetp)
2263 {
2264 unsigned HOST_WIDE_INT l;
2265 unsigned int max_size;
2266 HOST_WIDE_INT offset = 0;
2267 enum machine_mode mode;
2268 enum insn_code icode;
2269 int reverse;
2270 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2271 rtx cst ATTRIBUTE_UNUSED;
2272
2273 if (len == 0)
2274 return 1;
2275
2276 if (! (memsetp
2277 ? SET_BY_PIECES_P (len, align)
2278 : STORE_BY_PIECES_P (len, align)))
2279 return 0;
2280
2281 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2282
2283 /* We would first store what we can in the largest integer mode, then go to
2284 successively smaller modes. */
2285
2286 for (reverse = 0;
2287 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2288 reverse++)
2289 {
2290 l = len;
2291 max_size = STORE_MAX_PIECES + 1;
2292 while (max_size > 1)
2293 {
2294 mode = widest_int_mode_for_size (max_size);
2295
2296 if (mode == VOIDmode)
2297 break;
2298
2299 icode = optab_handler (mov_optab, mode);
2300 if (icode != CODE_FOR_nothing
2301 && align >= GET_MODE_ALIGNMENT (mode))
2302 {
2303 unsigned int size = GET_MODE_SIZE (mode);
2304
2305 while (l >= size)
2306 {
2307 if (reverse)
2308 offset -= size;
2309
2310 cst = (*constfun) (constfundata, offset, mode);
2311 if (!targetm.legitimate_constant_p (mode, cst))
2312 return 0;
2313
2314 if (!reverse)
2315 offset += size;
2316
2317 l -= size;
2318 }
2319 }
2320
2321 max_size = GET_MODE_SIZE (mode);
2322 }
2323
2324 /* The code above should have handled everything. */
2325 gcc_assert (!l);
2326 }
2327
2328 return 1;
2329 }
2330
2331 /* Generate several move instructions to store LEN bytes generated by
2332 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2333 pointer which will be passed as argument in every CONSTFUN call.
2334 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2335 a memset operation and false if it's a copy of a constant string.
2336 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2337 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2338 stpcpy. */
2339
2340 rtx
2341 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2342 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2343 void *constfundata, unsigned int align, bool memsetp, int endp)
2344 {
2345 enum machine_mode to_addr_mode
2346 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2347 struct store_by_pieces_d data;
2348
2349 if (len == 0)
2350 {
2351 gcc_assert (endp != 2);
2352 return to;
2353 }
2354
2355 gcc_assert (memsetp
2356 ? SET_BY_PIECES_P (len, align)
2357 : STORE_BY_PIECES_P (len, align));
2358 data.constfun = constfun;
2359 data.constfundata = constfundata;
2360 data.len = len;
2361 data.to = to;
2362 store_by_pieces_1 (&data, align);
2363 if (endp)
2364 {
2365 rtx to1;
2366
2367 gcc_assert (!data.reverse);
2368 if (data.autinc_to)
2369 {
2370 if (endp == 2)
2371 {
2372 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2373 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2374 else
2375 data.to_addr = copy_to_mode_reg (to_addr_mode,
2376 plus_constant (data.to_addr,
2377 -1));
2378 }
2379 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2380 data.offset);
2381 }
2382 else
2383 {
2384 if (endp == 2)
2385 --data.offset;
2386 to1 = adjust_address (data.to, QImode, data.offset);
2387 }
2388 return to1;
2389 }
2390 else
2391 return data.to;
2392 }
2393
2394 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2395 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2396
2397 static void
2398 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2399 {
2400 struct store_by_pieces_d data;
2401
2402 if (len == 0)
2403 return;
2404
2405 data.constfun = clear_by_pieces_1;
2406 data.constfundata = NULL;
2407 data.len = len;
2408 data.to = to;
2409 store_by_pieces_1 (&data, align);
2410 }
2411
2412 /* Callback routine for clear_by_pieces.
2413 Return const0_rtx unconditionally. */
2414
2415 static rtx
2416 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2417 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2418 enum machine_mode mode ATTRIBUTE_UNUSED)
2419 {
2420 return const0_rtx;
2421 }
2422
2423 /* Subroutine of clear_by_pieces and store_by_pieces.
2424 Generate several move instructions to store LEN bytes of block TO. (A MEM
2425 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2426
2427 static void
2428 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2429 unsigned int align ATTRIBUTE_UNUSED)
2430 {
2431 enum machine_mode to_addr_mode
2432 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2433 rtx to_addr = XEXP (data->to, 0);
2434 unsigned int max_size = STORE_MAX_PIECES + 1;
2435 enum insn_code icode;
2436
2437 data->offset = 0;
2438 data->to_addr = to_addr;
2439 data->autinc_to
2440 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2441 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2442
2443 data->explicit_inc_to = 0;
2444 data->reverse
2445 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2446 if (data->reverse)
2447 data->offset = data->len;
2448
2449 /* If storing requires more than two move insns,
2450 copy addresses to registers (to make displacements shorter)
2451 and use post-increment if available. */
2452 if (!data->autinc_to
2453 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2454 {
2455 /* Determine the main mode we'll be using.
2456 MODE might not be used depending on the definitions of the
2457 USE_* macros below. */
2458 enum machine_mode mode ATTRIBUTE_UNUSED
2459 = widest_int_mode_for_size (max_size);
2460
2461 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2462 {
2463 data->to_addr = copy_to_mode_reg (to_addr_mode,
2464 plus_constant (to_addr, data->len));
2465 data->autinc_to = 1;
2466 data->explicit_inc_to = -1;
2467 }
2468
2469 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2470 && ! data->autinc_to)
2471 {
2472 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2473 data->autinc_to = 1;
2474 data->explicit_inc_to = 1;
2475 }
2476
2477 if ( !data->autinc_to && CONSTANT_P (to_addr))
2478 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2479 }
2480
2481 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2482
2483 /* First store what we can in the largest integer mode, then go to
2484 successively smaller modes. */
2485
2486 while (max_size > 1)
2487 {
2488 enum machine_mode mode = widest_int_mode_for_size (max_size);
2489
2490 if (mode == VOIDmode)
2491 break;
2492
2493 icode = optab_handler (mov_optab, mode);
2494 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2495 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2496
2497 max_size = GET_MODE_SIZE (mode);
2498 }
2499
2500 /* The code above should have handled everything. */
2501 gcc_assert (!data->len);
2502 }
2503
2504 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2505 with move instructions for mode MODE. GENFUN is the gen_... function
2506 to make a move insn for that mode. DATA has all the other info. */
2507
2508 static void
2509 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2510 struct store_by_pieces_d *data)
2511 {
2512 unsigned int size = GET_MODE_SIZE (mode);
2513 rtx to1, cst;
2514
2515 while (data->len >= size)
2516 {
2517 if (data->reverse)
2518 data->offset -= size;
2519
2520 if (data->autinc_to)
2521 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2522 data->offset);
2523 else
2524 to1 = adjust_address (data->to, mode, data->offset);
2525
2526 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2527 emit_insn (gen_add2_insn (data->to_addr,
2528 GEN_INT (-(HOST_WIDE_INT) size)));
2529
2530 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2531 emit_insn ((*genfun) (to1, cst));
2532
2533 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2534 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2535
2536 if (! data->reverse)
2537 data->offset += size;
2538
2539 data->len -= size;
2540 }
2541 }
2542 \f
2543 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2544 its length in bytes. */
2545
2546 rtx
2547 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2548 unsigned int expected_align, HOST_WIDE_INT expected_size)
2549 {
2550 enum machine_mode mode = GET_MODE (object);
2551 unsigned int align;
2552
2553 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2554
2555 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2556 just move a zero. Otherwise, do this a piece at a time. */
2557 if (mode != BLKmode
2558 && CONST_INT_P (size)
2559 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2560 {
2561 rtx zero = CONST0_RTX (mode);
2562 if (zero != NULL)
2563 {
2564 emit_move_insn (object, zero);
2565 return NULL;
2566 }
2567
2568 if (COMPLEX_MODE_P (mode))
2569 {
2570 zero = CONST0_RTX (GET_MODE_INNER (mode));
2571 if (zero != NULL)
2572 {
2573 write_complex_part (object, zero, 0);
2574 write_complex_part (object, zero, 1);
2575 return NULL;
2576 }
2577 }
2578 }
2579
2580 if (size == const0_rtx)
2581 return NULL;
2582
2583 align = MEM_ALIGN (object);
2584
2585 if (CONST_INT_P (size)
2586 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2587 clear_by_pieces (object, INTVAL (size), align);
2588 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2589 expected_align, expected_size))
2590 ;
2591 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2592 return set_storage_via_libcall (object, size, const0_rtx,
2593 method == BLOCK_OP_TAILCALL);
2594 else
2595 gcc_unreachable ();
2596
2597 return NULL;
2598 }
2599
2600 rtx
2601 clear_storage (rtx object, rtx size, enum block_op_methods method)
2602 {
2603 return clear_storage_hints (object, size, method, 0, -1);
2604 }
2605
2606
2607 /* A subroutine of clear_storage. Expand a call to memset.
2608 Return the return value of memset, 0 otherwise. */
2609
2610 rtx
2611 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2612 {
2613 tree call_expr, fn, object_tree, size_tree, val_tree;
2614 enum machine_mode size_mode;
2615 rtx retval;
2616
2617 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2618 place those into new pseudos into a VAR_DECL and use them later. */
2619
2620 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2621
2622 size_mode = TYPE_MODE (sizetype);
2623 size = convert_to_mode (size_mode, size, 1);
2624 size = copy_to_mode_reg (size_mode, size);
2625
2626 /* It is incorrect to use the libcall calling conventions to call
2627 memset in this context. This could be a user call to memset and
2628 the user may wish to examine the return value from memset. For
2629 targets where libcalls and normal calls have different conventions
2630 for returning pointers, we could end up generating incorrect code. */
2631
2632 object_tree = make_tree (ptr_type_node, object);
2633 if (!CONST_INT_P (val))
2634 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2635 size_tree = make_tree (sizetype, size);
2636 val_tree = make_tree (integer_type_node, val);
2637
2638 fn = clear_storage_libcall_fn (true);
2639 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2640 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2641
2642 retval = expand_normal (call_expr);
2643
2644 return retval;
2645 }
2646
2647 /* A subroutine of set_storage_via_libcall. Create the tree node
2648 for the function we use for block clears. The first time FOR_CALL
2649 is true, we call assemble_external. */
2650
2651 tree block_clear_fn;
2652
2653 void
2654 init_block_clear_fn (const char *asmspec)
2655 {
2656 if (!block_clear_fn)
2657 {
2658 tree fn, args;
2659
2660 fn = get_identifier ("memset");
2661 args = build_function_type_list (ptr_type_node, ptr_type_node,
2662 integer_type_node, sizetype,
2663 NULL_TREE);
2664
2665 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2666 DECL_EXTERNAL (fn) = 1;
2667 TREE_PUBLIC (fn) = 1;
2668 DECL_ARTIFICIAL (fn) = 1;
2669 TREE_NOTHROW (fn) = 1;
2670 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2671 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2672
2673 block_clear_fn = fn;
2674 }
2675
2676 if (asmspec)
2677 set_user_assembler_name (block_clear_fn, asmspec);
2678 }
2679
2680 static tree
2681 clear_storage_libcall_fn (int for_call)
2682 {
2683 static bool emitted_extern;
2684
2685 if (!block_clear_fn)
2686 init_block_clear_fn (NULL);
2687
2688 if (for_call && !emitted_extern)
2689 {
2690 emitted_extern = true;
2691 make_decl_rtl (block_clear_fn);
2692 assemble_external (block_clear_fn);
2693 }
2694
2695 return block_clear_fn;
2696 }
2697 \f
2698 /* Expand a setmem pattern; return true if successful. */
2699
2700 bool
2701 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2702 unsigned int expected_align, HOST_WIDE_INT expected_size)
2703 {
2704 /* Try the most limited insn first, because there's no point
2705 including more than one in the machine description unless
2706 the more limited one has some advantage. */
2707
2708 enum machine_mode mode;
2709
2710 if (expected_align < align)
2711 expected_align = align;
2712
2713 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2714 mode = GET_MODE_WIDER_MODE (mode))
2715 {
2716 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2717
2718 if (code != CODE_FOR_nothing
2719 /* We don't need MODE to be narrower than
2720 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2721 the mode mask, as it is returned by the macro, it will
2722 definitely be less than the actual mode mask. */
2723 && ((CONST_INT_P (size)
2724 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2725 <= (GET_MODE_MASK (mode) >> 1)))
2726 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2727 {
2728 struct expand_operand ops[6];
2729 unsigned int nops;
2730
2731 nops = insn_data[(int) code].n_generator_args;
2732 gcc_assert (nops == 4 || nops == 6);
2733
2734 create_fixed_operand (&ops[0], object);
2735 /* The check above guarantees that this size conversion is valid. */
2736 create_convert_operand_to (&ops[1], size, mode, true);
2737 create_convert_operand_from (&ops[2], val, byte_mode, true);
2738 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2739 if (nops == 6)
2740 {
2741 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2742 create_integer_operand (&ops[5], expected_size);
2743 }
2744 if (maybe_expand_insn (code, nops, ops))
2745 return true;
2746 }
2747 }
2748
2749 return false;
2750 }
2751
2752 \f
2753 /* Write to one of the components of the complex value CPLX. Write VAL to
2754 the real part if IMAG_P is false, and the imaginary part if its true. */
2755
2756 static void
2757 write_complex_part (rtx cplx, rtx val, bool imag_p)
2758 {
2759 enum machine_mode cmode;
2760 enum machine_mode imode;
2761 unsigned ibitsize;
2762
2763 if (GET_CODE (cplx) == CONCAT)
2764 {
2765 emit_move_insn (XEXP (cplx, imag_p), val);
2766 return;
2767 }
2768
2769 cmode = GET_MODE (cplx);
2770 imode = GET_MODE_INNER (cmode);
2771 ibitsize = GET_MODE_BITSIZE (imode);
2772
2773 /* For MEMs simplify_gen_subreg may generate an invalid new address
2774 because, e.g., the original address is considered mode-dependent
2775 by the target, which restricts simplify_subreg from invoking
2776 adjust_address_nv. Instead of preparing fallback support for an
2777 invalid address, we call adjust_address_nv directly. */
2778 if (MEM_P (cplx))
2779 {
2780 emit_move_insn (adjust_address_nv (cplx, imode,
2781 imag_p ? GET_MODE_SIZE (imode) : 0),
2782 val);
2783 return;
2784 }
2785
2786 /* If the sub-object is at least word sized, then we know that subregging
2787 will work. This special case is important, since store_bit_field
2788 wants to operate on integer modes, and there's rarely an OImode to
2789 correspond to TCmode. */
2790 if (ibitsize >= BITS_PER_WORD
2791 /* For hard regs we have exact predicates. Assume we can split
2792 the original object if it spans an even number of hard regs.
2793 This special case is important for SCmode on 64-bit platforms
2794 where the natural size of floating-point regs is 32-bit. */
2795 || (REG_P (cplx)
2796 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2797 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2798 {
2799 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2800 imag_p ? GET_MODE_SIZE (imode) : 0);
2801 if (part)
2802 {
2803 emit_move_insn (part, val);
2804 return;
2805 }
2806 else
2807 /* simplify_gen_subreg may fail for sub-word MEMs. */
2808 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2809 }
2810
2811 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2812 }
2813
2814 /* Extract one of the components of the complex value CPLX. Extract the
2815 real part if IMAG_P is false, and the imaginary part if it's true. */
2816
2817 static rtx
2818 read_complex_part (rtx cplx, bool imag_p)
2819 {
2820 enum machine_mode cmode, imode;
2821 unsigned ibitsize;
2822
2823 if (GET_CODE (cplx) == CONCAT)
2824 return XEXP (cplx, imag_p);
2825
2826 cmode = GET_MODE (cplx);
2827 imode = GET_MODE_INNER (cmode);
2828 ibitsize = GET_MODE_BITSIZE (imode);
2829
2830 /* Special case reads from complex constants that got spilled to memory. */
2831 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2832 {
2833 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2834 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2835 {
2836 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2837 if (CONSTANT_CLASS_P (part))
2838 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2839 }
2840 }
2841
2842 /* For MEMs simplify_gen_subreg may generate an invalid new address
2843 because, e.g., the original address is considered mode-dependent
2844 by the target, which restricts simplify_subreg from invoking
2845 adjust_address_nv. Instead of preparing fallback support for an
2846 invalid address, we call adjust_address_nv directly. */
2847 if (MEM_P (cplx))
2848 return adjust_address_nv (cplx, imode,
2849 imag_p ? GET_MODE_SIZE (imode) : 0);
2850
2851 /* If the sub-object is at least word sized, then we know that subregging
2852 will work. This special case is important, since extract_bit_field
2853 wants to operate on integer modes, and there's rarely an OImode to
2854 correspond to TCmode. */
2855 if (ibitsize >= BITS_PER_WORD
2856 /* For hard regs we have exact predicates. Assume we can split
2857 the original object if it spans an even number of hard regs.
2858 This special case is important for SCmode on 64-bit platforms
2859 where the natural size of floating-point regs is 32-bit. */
2860 || (REG_P (cplx)
2861 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2862 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2863 {
2864 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2865 imag_p ? GET_MODE_SIZE (imode) : 0);
2866 if (ret)
2867 return ret;
2868 else
2869 /* simplify_gen_subreg may fail for sub-word MEMs. */
2870 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2871 }
2872
2873 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2874 true, false, NULL_RTX, imode, imode);
2875 }
2876 \f
2877 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2878 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2879 represented in NEW_MODE. If FORCE is true, this will never happen, as
2880 we'll force-create a SUBREG if needed. */
2881
2882 static rtx
2883 emit_move_change_mode (enum machine_mode new_mode,
2884 enum machine_mode old_mode, rtx x, bool force)
2885 {
2886 rtx ret;
2887
2888 if (push_operand (x, GET_MODE (x)))
2889 {
2890 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2891 MEM_COPY_ATTRIBUTES (ret, x);
2892 }
2893 else if (MEM_P (x))
2894 {
2895 /* We don't have to worry about changing the address since the
2896 size in bytes is supposed to be the same. */
2897 if (reload_in_progress)
2898 {
2899 /* Copy the MEM to change the mode and move any
2900 substitutions from the old MEM to the new one. */
2901 ret = adjust_address_nv (x, new_mode, 0);
2902 copy_replacements (x, ret);
2903 }
2904 else
2905 ret = adjust_address (x, new_mode, 0);
2906 }
2907 else
2908 {
2909 /* Note that we do want simplify_subreg's behavior of validating
2910 that the new mode is ok for a hard register. If we were to use
2911 simplify_gen_subreg, we would create the subreg, but would
2912 probably run into the target not being able to implement it. */
2913 /* Except, of course, when FORCE is true, when this is exactly what
2914 we want. Which is needed for CCmodes on some targets. */
2915 if (force)
2916 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
2917 else
2918 ret = simplify_subreg (new_mode, x, old_mode, 0);
2919 }
2920
2921 return ret;
2922 }
2923
2924 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
2925 an integer mode of the same size as MODE. Returns the instruction
2926 emitted, or NULL if such a move could not be generated. */
2927
2928 static rtx
2929 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
2930 {
2931 enum machine_mode imode;
2932 enum insn_code code;
2933
2934 /* There must exist a mode of the exact size we require. */
2935 imode = int_mode_for_mode (mode);
2936 if (imode == BLKmode)
2937 return NULL_RTX;
2938
2939 /* The target must support moves in this mode. */
2940 code = optab_handler (mov_optab, imode);
2941 if (code == CODE_FOR_nothing)
2942 return NULL_RTX;
2943
2944 x = emit_move_change_mode (imode, mode, x, force);
2945 if (x == NULL_RTX)
2946 return NULL_RTX;
2947 y = emit_move_change_mode (imode, mode, y, force);
2948 if (y == NULL_RTX)
2949 return NULL_RTX;
2950 return emit_insn (GEN_FCN (code) (x, y));
2951 }
2952
2953 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
2954 Return an equivalent MEM that does not use an auto-increment. */
2955
2956 static rtx
2957 emit_move_resolve_push (enum machine_mode mode, rtx x)
2958 {
2959 enum rtx_code code = GET_CODE (XEXP (x, 0));
2960 HOST_WIDE_INT adjust;
2961 rtx temp;
2962
2963 adjust = GET_MODE_SIZE (mode);
2964 #ifdef PUSH_ROUNDING
2965 adjust = PUSH_ROUNDING (adjust);
2966 #endif
2967 if (code == PRE_DEC || code == POST_DEC)
2968 adjust = -adjust;
2969 else if (code == PRE_MODIFY || code == POST_MODIFY)
2970 {
2971 rtx expr = XEXP (XEXP (x, 0), 1);
2972 HOST_WIDE_INT val;
2973
2974 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
2975 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
2976 val = INTVAL (XEXP (expr, 1));
2977 if (GET_CODE (expr) == MINUS)
2978 val = -val;
2979 gcc_assert (adjust == val || adjust == -val);
2980 adjust = val;
2981 }
2982
2983 /* Do not use anti_adjust_stack, since we don't want to update
2984 stack_pointer_delta. */
2985 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
2986 GEN_INT (adjust), stack_pointer_rtx,
2987 0, OPTAB_LIB_WIDEN);
2988 if (temp != stack_pointer_rtx)
2989 emit_move_insn (stack_pointer_rtx, temp);
2990
2991 switch (code)
2992 {
2993 case PRE_INC:
2994 case PRE_DEC:
2995 case PRE_MODIFY:
2996 temp = stack_pointer_rtx;
2997 break;
2998 case POST_INC:
2999 case POST_DEC:
3000 case POST_MODIFY:
3001 temp = plus_constant (stack_pointer_rtx, -adjust);
3002 break;
3003 default:
3004 gcc_unreachable ();
3005 }
3006
3007 return replace_equiv_address (x, temp);
3008 }
3009
3010 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3011 X is known to satisfy push_operand, and MODE is known to be complex.
3012 Returns the last instruction emitted. */
3013
3014 rtx
3015 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3016 {
3017 enum machine_mode submode = GET_MODE_INNER (mode);
3018 bool imag_first;
3019
3020 #ifdef PUSH_ROUNDING
3021 unsigned int submodesize = GET_MODE_SIZE (submode);
3022
3023 /* In case we output to the stack, but the size is smaller than the
3024 machine can push exactly, we need to use move instructions. */
3025 if (PUSH_ROUNDING (submodesize) != submodesize)
3026 {
3027 x = emit_move_resolve_push (mode, x);
3028 return emit_move_insn (x, y);
3029 }
3030 #endif
3031
3032 /* Note that the real part always precedes the imag part in memory
3033 regardless of machine's endianness. */
3034 switch (GET_CODE (XEXP (x, 0)))
3035 {
3036 case PRE_DEC:
3037 case POST_DEC:
3038 imag_first = true;
3039 break;
3040 case PRE_INC:
3041 case POST_INC:
3042 imag_first = false;
3043 break;
3044 default:
3045 gcc_unreachable ();
3046 }
3047
3048 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3049 read_complex_part (y, imag_first));
3050 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3051 read_complex_part (y, !imag_first));
3052 }
3053
3054 /* A subroutine of emit_move_complex. Perform the move from Y to X
3055 via two moves of the parts. Returns the last instruction emitted. */
3056
3057 rtx
3058 emit_move_complex_parts (rtx x, rtx y)
3059 {
3060 /* Show the output dies here. This is necessary for SUBREGs
3061 of pseudos since we cannot track their lifetimes correctly;
3062 hard regs shouldn't appear here except as return values. */
3063 if (!reload_completed && !reload_in_progress
3064 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3065 emit_clobber (x);
3066
3067 write_complex_part (x, read_complex_part (y, false), false);
3068 write_complex_part (x, read_complex_part (y, true), true);
3069
3070 return get_last_insn ();
3071 }
3072
3073 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3074 MODE is known to be complex. Returns the last instruction emitted. */
3075
3076 static rtx
3077 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3078 {
3079 bool try_int;
3080
3081 /* Need to take special care for pushes, to maintain proper ordering
3082 of the data, and possibly extra padding. */
3083 if (push_operand (x, mode))
3084 return emit_move_complex_push (mode, x, y);
3085
3086 /* See if we can coerce the target into moving both values at once. */
3087
3088 /* Move floating point as parts. */
3089 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3090 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3091 try_int = false;
3092 /* Not possible if the values are inherently not adjacent. */
3093 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3094 try_int = false;
3095 /* Is possible if both are registers (or subregs of registers). */
3096 else if (register_operand (x, mode) && register_operand (y, mode))
3097 try_int = true;
3098 /* If one of the operands is a memory, and alignment constraints
3099 are friendly enough, we may be able to do combined memory operations.
3100 We do not attempt this if Y is a constant because that combination is
3101 usually better with the by-parts thing below. */
3102 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3103 && (!STRICT_ALIGNMENT
3104 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3105 try_int = true;
3106 else
3107 try_int = false;
3108
3109 if (try_int)
3110 {
3111 rtx ret;
3112
3113 /* For memory to memory moves, optimal behavior can be had with the
3114 existing block move logic. */
3115 if (MEM_P (x) && MEM_P (y))
3116 {
3117 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3118 BLOCK_OP_NO_LIBCALL);
3119 return get_last_insn ();
3120 }
3121
3122 ret = emit_move_via_integer (mode, x, y, true);
3123 if (ret)
3124 return ret;
3125 }
3126
3127 return emit_move_complex_parts (x, y);
3128 }
3129
3130 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3131 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3132
3133 static rtx
3134 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3135 {
3136 rtx ret;
3137
3138 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3139 if (mode != CCmode)
3140 {
3141 enum insn_code code = optab_handler (mov_optab, CCmode);
3142 if (code != CODE_FOR_nothing)
3143 {
3144 x = emit_move_change_mode (CCmode, mode, x, true);
3145 y = emit_move_change_mode (CCmode, mode, y, true);
3146 return emit_insn (GEN_FCN (code) (x, y));
3147 }
3148 }
3149
3150 /* Otherwise, find the MODE_INT mode of the same width. */
3151 ret = emit_move_via_integer (mode, x, y, false);
3152 gcc_assert (ret != NULL);
3153 return ret;
3154 }
3155
3156 /* Return true if word I of OP lies entirely in the
3157 undefined bits of a paradoxical subreg. */
3158
3159 static bool
3160 undefined_operand_subword_p (const_rtx op, int i)
3161 {
3162 enum machine_mode innermode, innermostmode;
3163 int offset;
3164 if (GET_CODE (op) != SUBREG)
3165 return false;
3166 innermode = GET_MODE (op);
3167 innermostmode = GET_MODE (SUBREG_REG (op));
3168 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3169 /* The SUBREG_BYTE represents offset, as if the value were stored in
3170 memory, except for a paradoxical subreg where we define
3171 SUBREG_BYTE to be 0; undo this exception as in
3172 simplify_subreg. */
3173 if (SUBREG_BYTE (op) == 0
3174 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3175 {
3176 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3177 if (WORDS_BIG_ENDIAN)
3178 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3179 if (BYTES_BIG_ENDIAN)
3180 offset += difference % UNITS_PER_WORD;
3181 }
3182 if (offset >= GET_MODE_SIZE (innermostmode)
3183 || offset <= -GET_MODE_SIZE (word_mode))
3184 return true;
3185 return false;
3186 }
3187
3188 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3189 MODE is any multi-word or full-word mode that lacks a move_insn
3190 pattern. Note that you will get better code if you define such
3191 patterns, even if they must turn into multiple assembler instructions. */
3192
3193 static rtx
3194 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3195 {
3196 rtx last_insn = 0;
3197 rtx seq, inner;
3198 bool need_clobber;
3199 int i;
3200
3201 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3202
3203 /* If X is a push on the stack, do the push now and replace
3204 X with a reference to the stack pointer. */
3205 if (push_operand (x, mode))
3206 x = emit_move_resolve_push (mode, x);
3207
3208 /* If we are in reload, see if either operand is a MEM whose address
3209 is scheduled for replacement. */
3210 if (reload_in_progress && MEM_P (x)
3211 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3212 x = replace_equiv_address_nv (x, inner);
3213 if (reload_in_progress && MEM_P (y)
3214 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3215 y = replace_equiv_address_nv (y, inner);
3216
3217 start_sequence ();
3218
3219 need_clobber = false;
3220 for (i = 0;
3221 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3222 i++)
3223 {
3224 rtx xpart = operand_subword (x, i, 1, mode);
3225 rtx ypart;
3226
3227 /* Do not generate code for a move if it would come entirely
3228 from the undefined bits of a paradoxical subreg. */
3229 if (undefined_operand_subword_p (y, i))
3230 continue;
3231
3232 ypart = operand_subword (y, i, 1, mode);
3233
3234 /* If we can't get a part of Y, put Y into memory if it is a
3235 constant. Otherwise, force it into a register. Then we must
3236 be able to get a part of Y. */
3237 if (ypart == 0 && CONSTANT_P (y))
3238 {
3239 y = use_anchored_address (force_const_mem (mode, y));
3240 ypart = operand_subword (y, i, 1, mode);
3241 }
3242 else if (ypart == 0)
3243 ypart = operand_subword_force (y, i, mode);
3244
3245 gcc_assert (xpart && ypart);
3246
3247 need_clobber |= (GET_CODE (xpart) == SUBREG);
3248
3249 last_insn = emit_move_insn (xpart, ypart);
3250 }
3251
3252 seq = get_insns ();
3253 end_sequence ();
3254
3255 /* Show the output dies here. This is necessary for SUBREGs
3256 of pseudos since we cannot track their lifetimes correctly;
3257 hard regs shouldn't appear here except as return values.
3258 We never want to emit such a clobber after reload. */
3259 if (x != y
3260 && ! (reload_in_progress || reload_completed)
3261 && need_clobber != 0)
3262 emit_clobber (x);
3263
3264 emit_insn (seq);
3265
3266 return last_insn;
3267 }
3268
3269 /* Low level part of emit_move_insn.
3270 Called just like emit_move_insn, but assumes X and Y
3271 are basically valid. */
3272
3273 rtx
3274 emit_move_insn_1 (rtx x, rtx y)
3275 {
3276 enum machine_mode mode = GET_MODE (x);
3277 enum insn_code code;
3278
3279 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3280
3281 code = optab_handler (mov_optab, mode);
3282 if (code != CODE_FOR_nothing)
3283 return emit_insn (GEN_FCN (code) (x, y));
3284
3285 /* Expand complex moves by moving real part and imag part. */
3286 if (COMPLEX_MODE_P (mode))
3287 return emit_move_complex (mode, x, y);
3288
3289 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3290 || ALL_FIXED_POINT_MODE_P (mode))
3291 {
3292 rtx result = emit_move_via_integer (mode, x, y, true);
3293
3294 /* If we can't find an integer mode, use multi words. */
3295 if (result)
3296 return result;
3297 else
3298 return emit_move_multi_word (mode, x, y);
3299 }
3300
3301 if (GET_MODE_CLASS (mode) == MODE_CC)
3302 return emit_move_ccmode (mode, x, y);
3303
3304 /* Try using a move pattern for the corresponding integer mode. This is
3305 only safe when simplify_subreg can convert MODE constants into integer
3306 constants. At present, it can only do this reliably if the value
3307 fits within a HOST_WIDE_INT. */
3308 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3309 {
3310 rtx ret = emit_move_via_integer (mode, x, y, false);
3311 if (ret)
3312 return ret;
3313 }
3314
3315 return emit_move_multi_word (mode, x, y);
3316 }
3317
3318 /* Generate code to copy Y into X.
3319 Both Y and X must have the same mode, except that
3320 Y can be a constant with VOIDmode.
3321 This mode cannot be BLKmode; use emit_block_move for that.
3322
3323 Return the last instruction emitted. */
3324
3325 rtx
3326 emit_move_insn (rtx x, rtx y)
3327 {
3328 enum machine_mode mode = GET_MODE (x);
3329 rtx y_cst = NULL_RTX;
3330 rtx last_insn, set;
3331
3332 gcc_assert (mode != BLKmode
3333 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3334
3335 if (CONSTANT_P (y))
3336 {
3337 if (optimize
3338 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3339 && (last_insn = compress_float_constant (x, y)))
3340 return last_insn;
3341
3342 y_cst = y;
3343
3344 if (!targetm.legitimate_constant_p (mode, y))
3345 {
3346 y = force_const_mem (mode, y);
3347
3348 /* If the target's cannot_force_const_mem prevented the spill,
3349 assume that the target's move expanders will also take care
3350 of the non-legitimate constant. */
3351 if (!y)
3352 y = y_cst;
3353 else
3354 y = use_anchored_address (y);
3355 }
3356 }
3357
3358 /* If X or Y are memory references, verify that their addresses are valid
3359 for the machine. */
3360 if (MEM_P (x)
3361 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3362 MEM_ADDR_SPACE (x))
3363 && ! push_operand (x, GET_MODE (x))))
3364 x = validize_mem (x);
3365
3366 if (MEM_P (y)
3367 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3368 MEM_ADDR_SPACE (y)))
3369 y = validize_mem (y);
3370
3371 gcc_assert (mode != BLKmode);
3372
3373 last_insn = emit_move_insn_1 (x, y);
3374
3375 if (y_cst && REG_P (x)
3376 && (set = single_set (last_insn)) != NULL_RTX
3377 && SET_DEST (set) == x
3378 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3379 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3380
3381 return last_insn;
3382 }
3383
3384 /* If Y is representable exactly in a narrower mode, and the target can
3385 perform the extension directly from constant or memory, then emit the
3386 move as an extension. */
3387
3388 static rtx
3389 compress_float_constant (rtx x, rtx y)
3390 {
3391 enum machine_mode dstmode = GET_MODE (x);
3392 enum machine_mode orig_srcmode = GET_MODE (y);
3393 enum machine_mode srcmode;
3394 REAL_VALUE_TYPE r;
3395 int oldcost, newcost;
3396 bool speed = optimize_insn_for_speed_p ();
3397
3398 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3399
3400 if (targetm.legitimate_constant_p (dstmode, y))
3401 oldcost = rtx_cost (y, SET, speed);
3402 else
3403 oldcost = rtx_cost (force_const_mem (dstmode, y), SET, speed);
3404
3405 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3406 srcmode != orig_srcmode;
3407 srcmode = GET_MODE_WIDER_MODE (srcmode))
3408 {
3409 enum insn_code ic;
3410 rtx trunc_y, last_insn;
3411
3412 /* Skip if the target can't extend this way. */
3413 ic = can_extend_p (dstmode, srcmode, 0);
3414 if (ic == CODE_FOR_nothing)
3415 continue;
3416
3417 /* Skip if the narrowed value isn't exact. */
3418 if (! exact_real_truncate (srcmode, &r))
3419 continue;
3420
3421 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3422
3423 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3424 {
3425 /* Skip if the target needs extra instructions to perform
3426 the extension. */
3427 if (!insn_operand_matches (ic, 1, trunc_y))
3428 continue;
3429 /* This is valid, but may not be cheaper than the original. */
3430 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3431 if (oldcost < newcost)
3432 continue;
3433 }
3434 else if (float_extend_from_mem[dstmode][srcmode])
3435 {
3436 trunc_y = force_const_mem (srcmode, trunc_y);
3437 /* This is valid, but may not be cheaper than the original. */
3438 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3439 if (oldcost < newcost)
3440 continue;
3441 trunc_y = validize_mem (trunc_y);
3442 }
3443 else
3444 continue;
3445
3446 /* For CSE's benefit, force the compressed constant pool entry
3447 into a new pseudo. This constant may be used in different modes,
3448 and if not, combine will put things back together for us. */
3449 trunc_y = force_reg (srcmode, trunc_y);
3450 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3451 last_insn = get_last_insn ();
3452
3453 if (REG_P (x))
3454 set_unique_reg_note (last_insn, REG_EQUAL, y);
3455
3456 return last_insn;
3457 }
3458
3459 return NULL_RTX;
3460 }
3461 \f
3462 /* Pushing data onto the stack. */
3463
3464 /* Push a block of length SIZE (perhaps variable)
3465 and return an rtx to address the beginning of the block.
3466 The value may be virtual_outgoing_args_rtx.
3467
3468 EXTRA is the number of bytes of padding to push in addition to SIZE.
3469 BELOW nonzero means this padding comes at low addresses;
3470 otherwise, the padding comes at high addresses. */
3471
3472 rtx
3473 push_block (rtx size, int extra, int below)
3474 {
3475 rtx temp;
3476
3477 size = convert_modes (Pmode, ptr_mode, size, 1);
3478 if (CONSTANT_P (size))
3479 anti_adjust_stack (plus_constant (size, extra));
3480 else if (REG_P (size) && extra == 0)
3481 anti_adjust_stack (size);
3482 else
3483 {
3484 temp = copy_to_mode_reg (Pmode, size);
3485 if (extra != 0)
3486 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3487 temp, 0, OPTAB_LIB_WIDEN);
3488 anti_adjust_stack (temp);
3489 }
3490
3491 #ifndef STACK_GROWS_DOWNWARD
3492 if (0)
3493 #else
3494 if (1)
3495 #endif
3496 {
3497 temp = virtual_outgoing_args_rtx;
3498 if (extra != 0 && below)
3499 temp = plus_constant (temp, extra);
3500 }
3501 else
3502 {
3503 if (CONST_INT_P (size))
3504 temp = plus_constant (virtual_outgoing_args_rtx,
3505 -INTVAL (size) - (below ? 0 : extra));
3506 else if (extra != 0 && !below)
3507 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3508 negate_rtx (Pmode, plus_constant (size, extra)));
3509 else
3510 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3511 negate_rtx (Pmode, size));
3512 }
3513
3514 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3515 }
3516
3517 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3518
3519 static rtx
3520 mem_autoinc_base (rtx mem)
3521 {
3522 if (MEM_P (mem))
3523 {
3524 rtx addr = XEXP (mem, 0);
3525 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3526 return XEXP (addr, 0);
3527 }
3528 return NULL;
3529 }
3530
3531 /* A utility routine used here, in reload, and in try_split. The insns
3532 after PREV up to and including LAST are known to adjust the stack,
3533 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3534 placing notes as appropriate. PREV may be NULL, indicating the
3535 entire insn sequence prior to LAST should be scanned.
3536
3537 The set of allowed stack pointer modifications is small:
3538 (1) One or more auto-inc style memory references (aka pushes),
3539 (2) One or more addition/subtraction with the SP as destination,
3540 (3) A single move insn with the SP as destination,
3541 (4) A call_pop insn.
3542
3543 Insns in the sequence that do not modify the SP are ignored.
3544
3545 The return value is the amount of adjustment that can be trivially
3546 verified, via immediate operand or auto-inc. If the adjustment
3547 cannot be trivially extracted, the return value is INT_MIN. */
3548
3549 int
3550 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3551 {
3552 int args_size = end_args_size;
3553 bool saw_unknown = false;
3554 rtx insn;
3555
3556 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3557 {
3558 rtx dest, set, pat;
3559 HOST_WIDE_INT this_delta = 0;
3560 int i;
3561
3562 if (!NONDEBUG_INSN_P (insn))
3563 continue;
3564 pat = PATTERN (insn);
3565 set = NULL;
3566
3567 /* Look for a call_pop pattern. */
3568 if (CALL_P (insn))
3569 {
3570 /* We have to allow non-call_pop patterns for the case
3571 of emit_single_push_insn of a TLS address. */
3572 if (GET_CODE (pat) != PARALLEL)
3573 continue;
3574
3575 /* All call_pop have a stack pointer adjust in the parallel.
3576 The call itself is always first, and the stack adjust is
3577 usually last, so search from the end. */
3578 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3579 {
3580 set = XVECEXP (pat, 0, i);
3581 if (GET_CODE (set) != SET)
3582 continue;
3583 dest = SET_DEST (set);
3584 if (dest == stack_pointer_rtx)
3585 break;
3586 }
3587 /* We'd better have found the stack pointer adjust. */
3588 if (i == 0)
3589 continue;
3590 /* Fall through to process the extracted SET and DEST
3591 as if it was a standalone insn. */
3592 }
3593 else if (GET_CODE (pat) == SET)
3594 set = pat;
3595 else if ((set = single_set (insn)) != NULL)
3596 ;
3597 else if (GET_CODE (pat) == PARALLEL)
3598 {
3599 /* ??? Some older ports use a parallel with a stack adjust
3600 and a store for a PUSH_ROUNDING pattern, rather than a
3601 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3602 /* ??? See h8300 and m68k, pushqi1. */
3603 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3604 {
3605 set = XVECEXP (pat, 0, i);
3606 if (GET_CODE (set) != SET)
3607 continue;
3608 dest = SET_DEST (set);
3609 if (dest == stack_pointer_rtx)
3610 break;
3611
3612 /* We do not expect an auto-inc of the sp in the parallel. */
3613 gcc_checking_assert (mem_autoinc_base (dest)
3614 != stack_pointer_rtx);
3615 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3616 != stack_pointer_rtx);
3617 }
3618 if (i < 0)
3619 continue;
3620 }
3621 else
3622 continue;
3623 dest = SET_DEST (set);
3624
3625 /* Look for direct modifications of the stack pointer. */
3626 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3627 {
3628 gcc_assert (!saw_unknown);
3629 /* Look for a trivial adjustment, otherwise assume nothing. */
3630 /* Note that the SPU restore_stack_block pattern refers to
3631 the stack pointer in V4SImode. Consider that non-trivial. */
3632 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3633 && GET_CODE (SET_SRC (set)) == PLUS
3634 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3635 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3636 this_delta = INTVAL (XEXP (SET_SRC (set), 1));
3637 /* ??? Reload can generate no-op moves, which will be cleaned
3638 up later. Recognize it and continue searching. */
3639 else if (rtx_equal_p (dest, SET_SRC (set)))
3640 this_delta = 0;
3641 else
3642 saw_unknown = true;
3643 }
3644 /* Otherwise only think about autoinc patterns. */
3645 else if (mem_autoinc_base (dest) == stack_pointer_rtx)
3646 {
3647 rtx addr = XEXP (dest, 0);
3648 gcc_assert (!saw_unknown);
3649 switch (GET_CODE (addr))
3650 {
3651 case PRE_INC:
3652 case POST_INC:
3653 this_delta = GET_MODE_SIZE (GET_MODE (dest));
3654 break;
3655 case PRE_DEC:
3656 case POST_DEC:
3657 this_delta = -GET_MODE_SIZE (GET_MODE (dest));
3658 break;
3659 case PRE_MODIFY:
3660 case POST_MODIFY:
3661 addr = XEXP (addr, 1);
3662 gcc_assert (GET_CODE (addr) == PLUS);
3663 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3664 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3665 this_delta = INTVAL (XEXP (addr, 1));
3666 break;
3667 default:
3668 gcc_unreachable ();
3669 }
3670 }
3671 else
3672 continue;
3673
3674 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3675 #ifdef STACK_GROWS_DOWNWARD
3676 this_delta = -this_delta;
3677 #endif
3678 args_size -= this_delta;
3679 }
3680
3681 return saw_unknown ? INT_MIN : args_size;
3682 }
3683
3684 #ifdef PUSH_ROUNDING
3685 /* Emit single push insn. */
3686
3687 static void
3688 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3689 {
3690 rtx dest_addr;
3691 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3692 rtx dest;
3693 enum insn_code icode;
3694
3695 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3696 /* If there is push pattern, use it. Otherwise try old way of throwing
3697 MEM representing push operation to move expander. */
3698 icode = optab_handler (push_optab, mode);
3699 if (icode != CODE_FOR_nothing)
3700 {
3701 struct expand_operand ops[1];
3702
3703 create_input_operand (&ops[0], x, mode);
3704 if (maybe_expand_insn (icode, 1, ops))
3705 return;
3706 }
3707 if (GET_MODE_SIZE (mode) == rounded_size)
3708 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3709 /* If we are to pad downward, adjust the stack pointer first and
3710 then store X into the stack location using an offset. This is
3711 because emit_move_insn does not know how to pad; it does not have
3712 access to type. */
3713 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3714 {
3715 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3716 HOST_WIDE_INT offset;
3717
3718 emit_move_insn (stack_pointer_rtx,
3719 expand_binop (Pmode,
3720 #ifdef STACK_GROWS_DOWNWARD
3721 sub_optab,
3722 #else
3723 add_optab,
3724 #endif
3725 stack_pointer_rtx,
3726 GEN_INT (rounded_size),
3727 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3728
3729 offset = (HOST_WIDE_INT) padding_size;
3730 #ifdef STACK_GROWS_DOWNWARD
3731 if (STACK_PUSH_CODE == POST_DEC)
3732 /* We have already decremented the stack pointer, so get the
3733 previous value. */
3734 offset += (HOST_WIDE_INT) rounded_size;
3735 #else
3736 if (STACK_PUSH_CODE == POST_INC)
3737 /* We have already incremented the stack pointer, so get the
3738 previous value. */
3739 offset -= (HOST_WIDE_INT) rounded_size;
3740 #endif
3741 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3742 }
3743 else
3744 {
3745 #ifdef STACK_GROWS_DOWNWARD
3746 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3747 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3748 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3749 #else
3750 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3751 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3752 GEN_INT (rounded_size));
3753 #endif
3754 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3755 }
3756
3757 dest = gen_rtx_MEM (mode, dest_addr);
3758
3759 if (type != 0)
3760 {
3761 set_mem_attributes (dest, type, 1);
3762
3763 if (flag_optimize_sibling_calls)
3764 /* Function incoming arguments may overlap with sibling call
3765 outgoing arguments and we cannot allow reordering of reads
3766 from function arguments with stores to outgoing arguments
3767 of sibling calls. */
3768 set_mem_alias_set (dest, 0);
3769 }
3770 emit_move_insn (dest, x);
3771 }
3772
3773 /* Emit and annotate a single push insn. */
3774
3775 static void
3776 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3777 {
3778 int delta, old_delta = stack_pointer_delta;
3779 rtx prev = get_last_insn ();
3780 rtx last;
3781
3782 emit_single_push_insn_1 (mode, x, type);
3783
3784 last = get_last_insn ();
3785
3786 /* Notice the common case where we emitted exactly one insn. */
3787 if (PREV_INSN (last) == prev)
3788 {
3789 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3790 return;
3791 }
3792
3793 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3794 gcc_assert (delta == INT_MIN || delta == old_delta);
3795 }
3796 #endif
3797
3798 /* Generate code to push X onto the stack, assuming it has mode MODE and
3799 type TYPE.
3800 MODE is redundant except when X is a CONST_INT (since they don't
3801 carry mode info).
3802 SIZE is an rtx for the size of data to be copied (in bytes),
3803 needed only if X is BLKmode.
3804
3805 ALIGN (in bits) is maximum alignment we can assume.
3806
3807 If PARTIAL and REG are both nonzero, then copy that many of the first
3808 bytes of X into registers starting with REG, and push the rest of X.
3809 The amount of space pushed is decreased by PARTIAL bytes.
3810 REG must be a hard register in this case.
3811 If REG is zero but PARTIAL is not, take any all others actions for an
3812 argument partially in registers, but do not actually load any
3813 registers.
3814
3815 EXTRA is the amount in bytes of extra space to leave next to this arg.
3816 This is ignored if an argument block has already been allocated.
3817
3818 On a machine that lacks real push insns, ARGS_ADDR is the address of
3819 the bottom of the argument block for this call. We use indexing off there
3820 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3821 argument block has not been preallocated.
3822
3823 ARGS_SO_FAR is the size of args previously pushed for this call.
3824
3825 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3826 for arguments passed in registers. If nonzero, it will be the number
3827 of bytes required. */
3828
3829 void
3830 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3831 unsigned int align, int partial, rtx reg, int extra,
3832 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3833 rtx alignment_pad)
3834 {
3835 rtx xinner;
3836 enum direction stack_direction
3837 #ifdef STACK_GROWS_DOWNWARD
3838 = downward;
3839 #else
3840 = upward;
3841 #endif
3842
3843 /* Decide where to pad the argument: `downward' for below,
3844 `upward' for above, or `none' for don't pad it.
3845 Default is below for small data on big-endian machines; else above. */
3846 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3847
3848 /* Invert direction if stack is post-decrement.
3849 FIXME: why? */
3850 if (STACK_PUSH_CODE == POST_DEC)
3851 if (where_pad != none)
3852 where_pad = (where_pad == downward ? upward : downward);
3853
3854 xinner = x;
3855
3856 if (mode == BLKmode
3857 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3858 {
3859 /* Copy a block into the stack, entirely or partially. */
3860
3861 rtx temp;
3862 int used;
3863 int offset;
3864 int skip;
3865
3866 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3867 used = partial - offset;
3868
3869 if (mode != BLKmode)
3870 {
3871 /* A value is to be stored in an insufficiently aligned
3872 stack slot; copy via a suitably aligned slot if
3873 necessary. */
3874 size = GEN_INT (GET_MODE_SIZE (mode));
3875 if (!MEM_P (xinner))
3876 {
3877 temp = assign_temp (type, 0, 1, 1);
3878 emit_move_insn (temp, xinner);
3879 xinner = temp;
3880 }
3881 }
3882
3883 gcc_assert (size);
3884
3885 /* USED is now the # of bytes we need not copy to the stack
3886 because registers will take care of them. */
3887
3888 if (partial != 0)
3889 xinner = adjust_address (xinner, BLKmode, used);
3890
3891 /* If the partial register-part of the arg counts in its stack size,
3892 skip the part of stack space corresponding to the registers.
3893 Otherwise, start copying to the beginning of the stack space,
3894 by setting SKIP to 0. */
3895 skip = (reg_parm_stack_space == 0) ? 0 : used;
3896
3897 #ifdef PUSH_ROUNDING
3898 /* Do it with several push insns if that doesn't take lots of insns
3899 and if there is no difficulty with push insns that skip bytes
3900 on the stack for alignment purposes. */
3901 if (args_addr == 0
3902 && PUSH_ARGS
3903 && CONST_INT_P (size)
3904 && skip == 0
3905 && MEM_ALIGN (xinner) >= align
3906 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
3907 /* Here we avoid the case of a structure whose weak alignment
3908 forces many pushes of a small amount of data,
3909 and such small pushes do rounding that causes trouble. */
3910 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
3911 || align >= BIGGEST_ALIGNMENT
3912 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
3913 == (align / BITS_PER_UNIT)))
3914 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
3915 {
3916 /* Push padding now if padding above and stack grows down,
3917 or if padding below and stack grows up.
3918 But if space already allocated, this has already been done. */
3919 if (extra && args_addr == 0
3920 && where_pad != none && where_pad != stack_direction)
3921 anti_adjust_stack (GEN_INT (extra));
3922
3923 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
3924 }
3925 else
3926 #endif /* PUSH_ROUNDING */
3927 {
3928 rtx target;
3929
3930 /* Otherwise make space on the stack and copy the data
3931 to the address of that space. */
3932
3933 /* Deduct words put into registers from the size we must copy. */
3934 if (partial != 0)
3935 {
3936 if (CONST_INT_P (size))
3937 size = GEN_INT (INTVAL (size) - used);
3938 else
3939 size = expand_binop (GET_MODE (size), sub_optab, size,
3940 GEN_INT (used), NULL_RTX, 0,
3941 OPTAB_LIB_WIDEN);
3942 }
3943
3944 /* Get the address of the stack space.
3945 In this case, we do not deal with EXTRA separately.
3946 A single stack adjust will do. */
3947 if (! args_addr)
3948 {
3949 temp = push_block (size, extra, where_pad == downward);
3950 extra = 0;
3951 }
3952 else if (CONST_INT_P (args_so_far))
3953 temp = memory_address (BLKmode,
3954 plus_constant (args_addr,
3955 skip + INTVAL (args_so_far)));
3956 else
3957 temp = memory_address (BLKmode,
3958 plus_constant (gen_rtx_PLUS (Pmode,
3959 args_addr,
3960 args_so_far),
3961 skip));
3962
3963 if (!ACCUMULATE_OUTGOING_ARGS)
3964 {
3965 /* If the source is referenced relative to the stack pointer,
3966 copy it to another register to stabilize it. We do not need
3967 to do this if we know that we won't be changing sp. */
3968
3969 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
3970 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
3971 temp = copy_to_reg (temp);
3972 }
3973
3974 target = gen_rtx_MEM (BLKmode, temp);
3975
3976 /* We do *not* set_mem_attributes here, because incoming arguments
3977 may overlap with sibling call outgoing arguments and we cannot
3978 allow reordering of reads from function arguments with stores
3979 to outgoing arguments of sibling calls. We do, however, want
3980 to record the alignment of the stack slot. */
3981 /* ALIGN may well be better aligned than TYPE, e.g. due to
3982 PARM_BOUNDARY. Assume the caller isn't lying. */
3983 set_mem_align (target, align);
3984
3985 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
3986 }
3987 }
3988 else if (partial > 0)
3989 {
3990 /* Scalar partly in registers. */
3991
3992 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
3993 int i;
3994 int not_stack;
3995 /* # bytes of start of argument
3996 that we must make space for but need not store. */
3997 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3998 int args_offset = INTVAL (args_so_far);
3999 int skip;
4000
4001 /* Push padding now if padding above and stack grows down,
4002 or if padding below and stack grows up.
4003 But if space already allocated, this has already been done. */
4004 if (extra && args_addr == 0
4005 && where_pad != none && where_pad != stack_direction)
4006 anti_adjust_stack (GEN_INT (extra));
4007
4008 /* If we make space by pushing it, we might as well push
4009 the real data. Otherwise, we can leave OFFSET nonzero
4010 and leave the space uninitialized. */
4011 if (args_addr == 0)
4012 offset = 0;
4013
4014 /* Now NOT_STACK gets the number of words that we don't need to
4015 allocate on the stack. Convert OFFSET to words too. */
4016 not_stack = (partial - offset) / UNITS_PER_WORD;
4017 offset /= UNITS_PER_WORD;
4018
4019 /* If the partial register-part of the arg counts in its stack size,
4020 skip the part of stack space corresponding to the registers.
4021 Otherwise, start copying to the beginning of the stack space,
4022 by setting SKIP to 0. */
4023 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4024
4025 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4026 x = validize_mem (force_const_mem (mode, x));
4027
4028 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4029 SUBREGs of such registers are not allowed. */
4030 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4031 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4032 x = copy_to_reg (x);
4033
4034 /* Loop over all the words allocated on the stack for this arg. */
4035 /* We can do it by words, because any scalar bigger than a word
4036 has a size a multiple of a word. */
4037 #ifndef PUSH_ARGS_REVERSED
4038 for (i = not_stack; i < size; i++)
4039 #else
4040 for (i = size - 1; i >= not_stack; i--)
4041 #endif
4042 if (i >= not_stack + offset)
4043 emit_push_insn (operand_subword_force (x, i, mode),
4044 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4045 0, args_addr,
4046 GEN_INT (args_offset + ((i - not_stack + skip)
4047 * UNITS_PER_WORD)),
4048 reg_parm_stack_space, alignment_pad);
4049 }
4050 else
4051 {
4052 rtx addr;
4053 rtx dest;
4054
4055 /* Push padding now if padding above and stack grows down,
4056 or if padding below and stack grows up.
4057 But if space already allocated, this has already been done. */
4058 if (extra && args_addr == 0
4059 && where_pad != none && where_pad != stack_direction)
4060 anti_adjust_stack (GEN_INT (extra));
4061
4062 #ifdef PUSH_ROUNDING
4063 if (args_addr == 0 && PUSH_ARGS)
4064 emit_single_push_insn (mode, x, type);
4065 else
4066 #endif
4067 {
4068 if (CONST_INT_P (args_so_far))
4069 addr
4070 = memory_address (mode,
4071 plus_constant (args_addr,
4072 INTVAL (args_so_far)));
4073 else
4074 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4075 args_so_far));
4076 dest = gen_rtx_MEM (mode, addr);
4077
4078 /* We do *not* set_mem_attributes here, because incoming arguments
4079 may overlap with sibling call outgoing arguments and we cannot
4080 allow reordering of reads from function arguments with stores
4081 to outgoing arguments of sibling calls. We do, however, want
4082 to record the alignment of the stack slot. */
4083 /* ALIGN may well be better aligned than TYPE, e.g. due to
4084 PARM_BOUNDARY. Assume the caller isn't lying. */
4085 set_mem_align (dest, align);
4086
4087 emit_move_insn (dest, x);
4088 }
4089 }
4090
4091 /* If part should go in registers, copy that part
4092 into the appropriate registers. Do this now, at the end,
4093 since mem-to-mem copies above may do function calls. */
4094 if (partial > 0 && reg != 0)
4095 {
4096 /* Handle calls that pass values in multiple non-contiguous locations.
4097 The Irix 6 ABI has examples of this. */
4098 if (GET_CODE (reg) == PARALLEL)
4099 emit_group_load (reg, x, type, -1);
4100 else
4101 {
4102 gcc_assert (partial % UNITS_PER_WORD == 0);
4103 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4104 }
4105 }
4106
4107 if (extra && args_addr == 0 && where_pad == stack_direction)
4108 anti_adjust_stack (GEN_INT (extra));
4109
4110 if (alignment_pad && args_addr == 0)
4111 anti_adjust_stack (alignment_pad);
4112 }
4113 \f
4114 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4115 operations. */
4116
4117 static rtx
4118 get_subtarget (rtx x)
4119 {
4120 return (optimize
4121 || x == 0
4122 /* Only registers can be subtargets. */
4123 || !REG_P (x)
4124 /* Don't use hard regs to avoid extending their life. */
4125 || REGNO (x) < FIRST_PSEUDO_REGISTER
4126 ? 0 : x);
4127 }
4128
4129 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4130 FIELD is a bitfield. Returns true if the optimization was successful,
4131 and there's nothing else to do. */
4132
4133 static bool
4134 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4135 unsigned HOST_WIDE_INT bitpos,
4136 unsigned HOST_WIDE_INT bitregion_start,
4137 unsigned HOST_WIDE_INT bitregion_end,
4138 enum machine_mode mode1, rtx str_rtx,
4139 tree to, tree src)
4140 {
4141 enum machine_mode str_mode = GET_MODE (str_rtx);
4142 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4143 tree op0, op1;
4144 rtx value, result;
4145 optab binop;
4146 gimple srcstmt;
4147 enum tree_code code;
4148
4149 if (mode1 != VOIDmode
4150 || bitsize >= BITS_PER_WORD
4151 || str_bitsize > BITS_PER_WORD
4152 || TREE_SIDE_EFFECTS (to)
4153 || TREE_THIS_VOLATILE (to))
4154 return false;
4155
4156 STRIP_NOPS (src);
4157 if (TREE_CODE (src) != SSA_NAME)
4158 return false;
4159 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4160 return false;
4161
4162 srcstmt = get_gimple_for_ssa_name (src);
4163 if (!srcstmt
4164 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4165 return false;
4166
4167 code = gimple_assign_rhs_code (srcstmt);
4168
4169 op0 = gimple_assign_rhs1 (srcstmt);
4170
4171 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4172 to find its initialization. Hopefully the initialization will
4173 be from a bitfield load. */
4174 if (TREE_CODE (op0) == SSA_NAME)
4175 {
4176 gimple op0stmt = get_gimple_for_ssa_name (op0);
4177
4178 /* We want to eventually have OP0 be the same as TO, which
4179 should be a bitfield. */
4180 if (!op0stmt
4181 || !is_gimple_assign (op0stmt)
4182 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4183 return false;
4184 op0 = gimple_assign_rhs1 (op0stmt);
4185 }
4186
4187 op1 = gimple_assign_rhs2 (srcstmt);
4188
4189 if (!operand_equal_p (to, op0, 0))
4190 return false;
4191
4192 if (MEM_P (str_rtx))
4193 {
4194 unsigned HOST_WIDE_INT offset1;
4195
4196 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4197 str_mode = word_mode;
4198 str_mode = get_best_mode (bitsize, bitpos,
4199 bitregion_start, bitregion_end,
4200 MEM_ALIGN (str_rtx), str_mode, 0);
4201 if (str_mode == VOIDmode)
4202 return false;
4203 str_bitsize = GET_MODE_BITSIZE (str_mode);
4204
4205 offset1 = bitpos;
4206 bitpos %= str_bitsize;
4207 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4208 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4209 }
4210 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4211 return false;
4212
4213 /* If the bit field covers the whole REG/MEM, store_field
4214 will likely generate better code. */
4215 if (bitsize >= str_bitsize)
4216 return false;
4217
4218 /* We can't handle fields split across multiple entities. */
4219 if (bitpos + bitsize > str_bitsize)
4220 return false;
4221
4222 if (BYTES_BIG_ENDIAN)
4223 bitpos = str_bitsize - bitpos - bitsize;
4224
4225 switch (code)
4226 {
4227 case PLUS_EXPR:
4228 case MINUS_EXPR:
4229 /* For now, just optimize the case of the topmost bitfield
4230 where we don't need to do any masking and also
4231 1 bit bitfields where xor can be used.
4232 We might win by one instruction for the other bitfields
4233 too if insv/extv instructions aren't used, so that
4234 can be added later. */
4235 if (bitpos + bitsize != str_bitsize
4236 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4237 break;
4238
4239 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4240 value = convert_modes (str_mode,
4241 TYPE_MODE (TREE_TYPE (op1)), value,
4242 TYPE_UNSIGNED (TREE_TYPE (op1)));
4243
4244 /* We may be accessing data outside the field, which means
4245 we can alias adjacent data. */
4246 if (MEM_P (str_rtx))
4247 {
4248 str_rtx = shallow_copy_rtx (str_rtx);
4249 set_mem_alias_set (str_rtx, 0);
4250 set_mem_expr (str_rtx, 0);
4251 }
4252
4253 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4254 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4255 {
4256 value = expand_and (str_mode, value, const1_rtx, NULL);
4257 binop = xor_optab;
4258 }
4259 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4260 bitpos, NULL_RTX, 1);
4261 result = expand_binop (str_mode, binop, str_rtx,
4262 value, str_rtx, 1, OPTAB_WIDEN);
4263 if (result != str_rtx)
4264 emit_move_insn (str_rtx, result);
4265 return true;
4266
4267 case BIT_IOR_EXPR:
4268 case BIT_XOR_EXPR:
4269 if (TREE_CODE (op1) != INTEGER_CST)
4270 break;
4271 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4272 value = convert_modes (GET_MODE (str_rtx),
4273 TYPE_MODE (TREE_TYPE (op1)), value,
4274 TYPE_UNSIGNED (TREE_TYPE (op1)));
4275
4276 /* We may be accessing data outside the field, which means
4277 we can alias adjacent data. */
4278 if (MEM_P (str_rtx))
4279 {
4280 str_rtx = shallow_copy_rtx (str_rtx);
4281 set_mem_alias_set (str_rtx, 0);
4282 set_mem_expr (str_rtx, 0);
4283 }
4284
4285 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4286 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4287 {
4288 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4289 - 1);
4290 value = expand_and (GET_MODE (str_rtx), value, mask,
4291 NULL_RTX);
4292 }
4293 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4294 bitpos, NULL_RTX, 1);
4295 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4296 value, str_rtx, 1, OPTAB_WIDEN);
4297 if (result != str_rtx)
4298 emit_move_insn (str_rtx, result);
4299 return true;
4300
4301 default:
4302 break;
4303 }
4304
4305 return false;
4306 }
4307
4308 /* In the C++ memory model, consecutive bit fields in a structure are
4309 considered one memory location.
4310
4311 Given a COMPONENT_REF, this function returns the bit range of
4312 consecutive bits in which this COMPONENT_REF belongs in. The
4313 values are returned in *BITSTART and *BITEND. If either the C++
4314 memory model is not activated, or this memory access is not thread
4315 visible, 0 is returned in *BITSTART and *BITEND.
4316
4317 EXP is the COMPONENT_REF.
4318 INNERDECL is the actual object being referenced.
4319 BITPOS is the position in bits where the bit starts within the structure.
4320 BITSIZE is size in bits of the field being referenced in EXP.
4321
4322 For example, while storing into FOO.A here...
4323
4324 struct {
4325 BIT 0:
4326 unsigned int a : 4;
4327 unsigned int b : 1;
4328 BIT 8:
4329 unsigned char c;
4330 unsigned int d : 6;
4331 } foo;
4332
4333 ...we are not allowed to store past <b>, so for the layout above, a
4334 range of 0..7 (because no one cares if we store into the
4335 padding). */
4336
4337 static void
4338 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4339 unsigned HOST_WIDE_INT *bitend,
4340 tree exp, tree innerdecl,
4341 HOST_WIDE_INT bitpos, HOST_WIDE_INT bitsize)
4342 {
4343 tree field, record_type, fld;
4344 bool found_field = false;
4345 bool prev_field_is_bitfield;
4346
4347 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4348
4349 /* If other threads can't see this value, no need to restrict stores. */
4350 if (ALLOW_STORE_DATA_RACES
4351 || ((TREE_CODE (innerdecl) == MEM_REF
4352 || TREE_CODE (innerdecl) == TARGET_MEM_REF)
4353 && !ptr_deref_may_alias_global_p (TREE_OPERAND (innerdecl, 0)))
4354 || (DECL_P (innerdecl)
4355 && (DECL_THREAD_LOCAL_P (innerdecl)
4356 || !TREE_STATIC (innerdecl))))
4357 {
4358 *bitstart = *bitend = 0;
4359 return;
4360 }
4361
4362 /* Bit field we're storing into. */
4363 field = TREE_OPERAND (exp, 1);
4364 record_type = DECL_FIELD_CONTEXT (field);
4365
4366 /* Count the contiguous bitfields for the memory location that
4367 contains FIELD. */
4368 *bitstart = 0;
4369 prev_field_is_bitfield = true;
4370 for (fld = TYPE_FIELDS (record_type); fld; fld = DECL_CHAIN (fld))
4371 {
4372 tree t, offset;
4373 enum machine_mode mode;
4374 int unsignedp, volatilep;
4375
4376 if (TREE_CODE (fld) != FIELD_DECL)
4377 continue;
4378
4379 t = build3 (COMPONENT_REF, TREE_TYPE (exp),
4380 unshare_expr (TREE_OPERAND (exp, 0)),
4381 fld, NULL_TREE);
4382 get_inner_reference (t, &bitsize, &bitpos, &offset,
4383 &mode, &unsignedp, &volatilep, true);
4384
4385 if (field == fld)
4386 found_field = true;
4387
4388 if (DECL_BIT_FIELD_TYPE (fld) && bitsize > 0)
4389 {
4390 if (prev_field_is_bitfield == false)
4391 {
4392 *bitstart = bitpos;
4393 prev_field_is_bitfield = true;
4394 }
4395 }
4396 else
4397 {
4398 prev_field_is_bitfield = false;
4399 if (found_field)
4400 break;
4401 }
4402 }
4403 gcc_assert (found_field);
4404
4405 if (fld)
4406 {
4407 /* We found the end of the bit field sequence. Include the
4408 padding up to the next field and be done. */
4409 *bitend = bitpos - 1;
4410 }
4411 else
4412 {
4413 /* If this is the last element in the structure, include the padding
4414 at the end of structure. */
4415 *bitend = TREE_INT_CST_LOW (TYPE_SIZE (record_type)) - 1;
4416 }
4417 }
4418
4419 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4420 is true, try generating a nontemporal store. */
4421
4422 void
4423 expand_assignment (tree to, tree from, bool nontemporal)
4424 {
4425 rtx to_rtx = 0;
4426 rtx result;
4427 enum machine_mode mode;
4428 int align;
4429 enum insn_code icode;
4430
4431 /* Don't crash if the lhs of the assignment was erroneous. */
4432 if (TREE_CODE (to) == ERROR_MARK)
4433 {
4434 expand_normal (from);
4435 return;
4436 }
4437
4438 /* Optimize away no-op moves without side-effects. */
4439 if (operand_equal_p (to, from, 0))
4440 return;
4441
4442 mode = TYPE_MODE (TREE_TYPE (to));
4443 if ((TREE_CODE (to) == MEM_REF
4444 || TREE_CODE (to) == TARGET_MEM_REF)
4445 && mode != BLKmode
4446 && ((align = MAX (TYPE_ALIGN (TREE_TYPE (to)), get_object_alignment (to)))
4447 < (signed) GET_MODE_ALIGNMENT (mode))
4448 && ((icode = optab_handler (movmisalign_optab, mode))
4449 != CODE_FOR_nothing))
4450 {
4451 struct expand_operand ops[2];
4452 enum machine_mode address_mode;
4453 rtx reg, op0, mem;
4454
4455 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4456 reg = force_not_mem (reg);
4457
4458 if (TREE_CODE (to) == MEM_REF)
4459 {
4460 addr_space_t as
4461 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (to, 1))));
4462 tree base = TREE_OPERAND (to, 0);
4463 address_mode = targetm.addr_space.address_mode (as);
4464 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4465 op0 = convert_memory_address_addr_space (address_mode, op0, as);
4466 if (!integer_zerop (TREE_OPERAND (to, 1)))
4467 {
4468 rtx off
4469 = immed_double_int_const (mem_ref_offset (to), address_mode);
4470 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
4471 }
4472 op0 = memory_address_addr_space (mode, op0, as);
4473 mem = gen_rtx_MEM (mode, op0);
4474 set_mem_attributes (mem, to, 0);
4475 set_mem_addr_space (mem, as);
4476 }
4477 else if (TREE_CODE (to) == TARGET_MEM_REF)
4478 {
4479 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (to));
4480 struct mem_address addr;
4481
4482 get_address_description (to, &addr);
4483 op0 = addr_for_mem_ref (&addr, as, true);
4484 op0 = memory_address_addr_space (mode, op0, as);
4485 mem = gen_rtx_MEM (mode, op0);
4486 set_mem_attributes (mem, to, 0);
4487 set_mem_addr_space (mem, as);
4488 }
4489 else
4490 gcc_unreachable ();
4491 if (TREE_THIS_VOLATILE (to))
4492 MEM_VOLATILE_P (mem) = 1;
4493
4494 create_fixed_operand (&ops[0], mem);
4495 create_input_operand (&ops[1], reg, mode);
4496 /* The movmisalign<mode> pattern cannot fail, else the assignment would
4497 silently be omitted. */
4498 expand_insn (icode, 2, ops);
4499 return;
4500 }
4501
4502 /* Assignment of a structure component needs special treatment
4503 if the structure component's rtx is not simply a MEM.
4504 Assignment of an array element at a constant index, and assignment of
4505 an array element in an unaligned packed structure field, has the same
4506 problem. */
4507 if (handled_component_p (to)
4508 /* ??? We only need to handle MEM_REF here if the access is not
4509 a full access of the base object. */
4510 || (TREE_CODE (to) == MEM_REF
4511 && TREE_CODE (TREE_OPERAND (to, 0)) == ADDR_EXPR)
4512 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4513 {
4514 enum machine_mode mode1;
4515 HOST_WIDE_INT bitsize, bitpos;
4516 unsigned HOST_WIDE_INT bitregion_start = 0;
4517 unsigned HOST_WIDE_INT bitregion_end = 0;
4518 tree offset;
4519 int unsignedp;
4520 int volatilep = 0;
4521 tree tem;
4522
4523 push_temp_slots ();
4524 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4525 &unsignedp, &volatilep, true);
4526
4527 if (TREE_CODE (to) == COMPONENT_REF
4528 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4529 get_bit_range (&bitregion_start, &bitregion_end,
4530 to, tem, bitpos, bitsize);
4531
4532 /* If we are going to use store_bit_field and extract_bit_field,
4533 make sure to_rtx will be safe for multiple use. */
4534
4535 to_rtx = expand_normal (tem);
4536
4537 /* If the bitfield is volatile, we want to access it in the
4538 field's mode, not the computed mode.
4539 If a MEM has VOIDmode (external with incomplete type),
4540 use BLKmode for it instead. */
4541 if (MEM_P (to_rtx))
4542 {
4543 if (volatilep && flag_strict_volatile_bitfields > 0)
4544 to_rtx = adjust_address (to_rtx, mode1, 0);
4545 else if (GET_MODE (to_rtx) == VOIDmode)
4546 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4547 }
4548
4549 if (offset != 0)
4550 {
4551 enum machine_mode address_mode;
4552 rtx offset_rtx;
4553
4554 if (!MEM_P (to_rtx))
4555 {
4556 /* We can get constant negative offsets into arrays with broken
4557 user code. Translate this to a trap instead of ICEing. */
4558 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4559 expand_builtin_trap ();
4560 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4561 }
4562
4563 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4564 address_mode
4565 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4566 if (GET_MODE (offset_rtx) != address_mode)
4567 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4568
4569 /* A constant address in TO_RTX can have VOIDmode, we must not try
4570 to call force_reg for that case. Avoid that case. */
4571 if (MEM_P (to_rtx)
4572 && GET_MODE (to_rtx) == BLKmode
4573 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4574 && bitsize > 0
4575 && (bitpos % bitsize) == 0
4576 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4577 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4578 {
4579 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4580 bitpos = 0;
4581 }
4582
4583 to_rtx = offset_address (to_rtx, offset_rtx,
4584 highest_pow2_factor_for_target (to,
4585 offset));
4586 }
4587
4588 /* No action is needed if the target is not a memory and the field
4589 lies completely outside that target. This can occur if the source
4590 code contains an out-of-bounds access to a small array. */
4591 if (!MEM_P (to_rtx)
4592 && GET_MODE (to_rtx) != BLKmode
4593 && (unsigned HOST_WIDE_INT) bitpos
4594 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4595 {
4596 expand_normal (from);
4597 result = NULL;
4598 }
4599 /* Handle expand_expr of a complex value returning a CONCAT. */
4600 else if (GET_CODE (to_rtx) == CONCAT)
4601 {
4602 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4603 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4604 && bitpos == 0
4605 && bitsize == mode_bitsize)
4606 result = store_expr (from, to_rtx, false, nontemporal);
4607 else if (bitsize == mode_bitsize / 2
4608 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4609 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4610 nontemporal);
4611 else if (bitpos + bitsize <= mode_bitsize / 2)
4612 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4613 bitregion_start, bitregion_end,
4614 mode1, from, TREE_TYPE (tem),
4615 get_alias_set (to), nontemporal);
4616 else if (bitpos >= mode_bitsize / 2)
4617 result = store_field (XEXP (to_rtx, 1), bitsize,
4618 bitpos - mode_bitsize / 2,
4619 bitregion_start, bitregion_end,
4620 mode1, from,
4621 TREE_TYPE (tem), get_alias_set (to),
4622 nontemporal);
4623 else if (bitpos == 0 && bitsize == mode_bitsize)
4624 {
4625 rtx from_rtx;
4626 result = expand_normal (from);
4627 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4628 TYPE_MODE (TREE_TYPE (from)), 0);
4629 emit_move_insn (XEXP (to_rtx, 0),
4630 read_complex_part (from_rtx, false));
4631 emit_move_insn (XEXP (to_rtx, 1),
4632 read_complex_part (from_rtx, true));
4633 }
4634 else
4635 {
4636 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4637 GET_MODE_SIZE (GET_MODE (to_rtx)),
4638 0);
4639 write_complex_part (temp, XEXP (to_rtx, 0), false);
4640 write_complex_part (temp, XEXP (to_rtx, 1), true);
4641 result = store_field (temp, bitsize, bitpos,
4642 bitregion_start, bitregion_end,
4643 mode1, from,
4644 TREE_TYPE (tem), get_alias_set (to),
4645 nontemporal);
4646 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4647 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4648 }
4649 }
4650 else
4651 {
4652 if (MEM_P (to_rtx))
4653 {
4654 /* If the field is at offset zero, we could have been given the
4655 DECL_RTX of the parent struct. Don't munge it. */
4656 to_rtx = shallow_copy_rtx (to_rtx);
4657
4658 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4659
4660 /* Deal with volatile and readonly fields. The former is only
4661 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4662 if (volatilep)
4663 MEM_VOLATILE_P (to_rtx) = 1;
4664 if (component_uses_parent_alias_set (to))
4665 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4666 }
4667
4668 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4669 bitregion_start, bitregion_end,
4670 mode1,
4671 to_rtx, to, from))
4672 result = NULL;
4673 else
4674 result = store_field (to_rtx, bitsize, bitpos,
4675 bitregion_start, bitregion_end,
4676 mode1, from,
4677 TREE_TYPE (tem), get_alias_set (to),
4678 nontemporal);
4679 }
4680
4681 if (result)
4682 preserve_temp_slots (result);
4683 free_temp_slots ();
4684 pop_temp_slots ();
4685 return;
4686 }
4687
4688 /* If the rhs is a function call and its value is not an aggregate,
4689 call the function before we start to compute the lhs.
4690 This is needed for correct code for cases such as
4691 val = setjmp (buf) on machines where reference to val
4692 requires loading up part of an address in a separate insn.
4693
4694 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4695 since it might be a promoted variable where the zero- or sign- extension
4696 needs to be done. Handling this in the normal way is safe because no
4697 computation is done before the call. The same is true for SSA names. */
4698 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4699 && COMPLETE_TYPE_P (TREE_TYPE (from))
4700 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4701 && ! (((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
4702 && REG_P (DECL_RTL (to)))
4703 || TREE_CODE (to) == SSA_NAME))
4704 {
4705 rtx value;
4706
4707 push_temp_slots ();
4708 value = expand_normal (from);
4709 if (to_rtx == 0)
4710 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4711
4712 /* Handle calls that return values in multiple non-contiguous locations.
4713 The Irix 6 ABI has examples of this. */
4714 if (GET_CODE (to_rtx) == PARALLEL)
4715 emit_group_load (to_rtx, value, TREE_TYPE (from),
4716 int_size_in_bytes (TREE_TYPE (from)));
4717 else if (GET_MODE (to_rtx) == BLKmode)
4718 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4719 else
4720 {
4721 if (POINTER_TYPE_P (TREE_TYPE (to)))
4722 value = convert_memory_address_addr_space
4723 (GET_MODE (to_rtx), value,
4724 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4725
4726 emit_move_insn (to_rtx, value);
4727 }
4728 preserve_temp_slots (to_rtx);
4729 free_temp_slots ();
4730 pop_temp_slots ();
4731 return;
4732 }
4733
4734 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
4735 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
4736
4737 if (to_rtx == 0)
4738 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4739
4740 /* Don't move directly into a return register. */
4741 if (TREE_CODE (to) == RESULT_DECL
4742 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4743 {
4744 rtx temp;
4745
4746 push_temp_slots ();
4747 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4748
4749 if (GET_CODE (to_rtx) == PARALLEL)
4750 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4751 int_size_in_bytes (TREE_TYPE (from)));
4752 else
4753 emit_move_insn (to_rtx, temp);
4754
4755 preserve_temp_slots (to_rtx);
4756 free_temp_slots ();
4757 pop_temp_slots ();
4758 return;
4759 }
4760
4761 /* In case we are returning the contents of an object which overlaps
4762 the place the value is being stored, use a safe function when copying
4763 a value through a pointer into a structure value return block. */
4764 if (TREE_CODE (to) == RESULT_DECL
4765 && TREE_CODE (from) == INDIRECT_REF
4766 && ADDR_SPACE_GENERIC_P
4767 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4768 && refs_may_alias_p (to, from)
4769 && cfun->returns_struct
4770 && !cfun->returns_pcc_struct)
4771 {
4772 rtx from_rtx, size;
4773
4774 push_temp_slots ();
4775 size = expr_size (from);
4776 from_rtx = expand_normal (from);
4777
4778 emit_library_call (memmove_libfunc, LCT_NORMAL,
4779 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4780 XEXP (from_rtx, 0), Pmode,
4781 convert_to_mode (TYPE_MODE (sizetype),
4782 size, TYPE_UNSIGNED (sizetype)),
4783 TYPE_MODE (sizetype));
4784
4785 preserve_temp_slots (to_rtx);
4786 free_temp_slots ();
4787 pop_temp_slots ();
4788 return;
4789 }
4790
4791 /* Compute FROM and store the value in the rtx we got. */
4792
4793 push_temp_slots ();
4794 result = store_expr (from, to_rtx, 0, nontemporal);
4795 preserve_temp_slots (result);
4796 free_temp_slots ();
4797 pop_temp_slots ();
4798 return;
4799 }
4800
4801 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4802 succeeded, false otherwise. */
4803
4804 bool
4805 emit_storent_insn (rtx to, rtx from)
4806 {
4807 struct expand_operand ops[2];
4808 enum machine_mode mode = GET_MODE (to);
4809 enum insn_code code = optab_handler (storent_optab, mode);
4810
4811 if (code == CODE_FOR_nothing)
4812 return false;
4813
4814 create_fixed_operand (&ops[0], to);
4815 create_input_operand (&ops[1], from, mode);
4816 return maybe_expand_insn (code, 2, ops);
4817 }
4818
4819 /* Generate code for computing expression EXP,
4820 and storing the value into TARGET.
4821
4822 If the mode is BLKmode then we may return TARGET itself.
4823 It turns out that in BLKmode it doesn't cause a problem.
4824 because C has no operators that could combine two different
4825 assignments into the same BLKmode object with different values
4826 with no sequence point. Will other languages need this to
4827 be more thorough?
4828
4829 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4830 stack, and block moves may need to be treated specially.
4831
4832 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4833
4834 rtx
4835 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4836 {
4837 rtx temp;
4838 rtx alt_rtl = NULL_RTX;
4839 location_t loc = EXPR_LOCATION (exp);
4840
4841 if (VOID_TYPE_P (TREE_TYPE (exp)))
4842 {
4843 /* C++ can generate ?: expressions with a throw expression in one
4844 branch and an rvalue in the other. Here, we resolve attempts to
4845 store the throw expression's nonexistent result. */
4846 gcc_assert (!call_param_p);
4847 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4848 return NULL_RTX;
4849 }
4850 if (TREE_CODE (exp) == COMPOUND_EXPR)
4851 {
4852 /* Perform first part of compound expression, then assign from second
4853 part. */
4854 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4855 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4856 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4857 nontemporal);
4858 }
4859 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4860 {
4861 /* For conditional expression, get safe form of the target. Then
4862 test the condition, doing the appropriate assignment on either
4863 side. This avoids the creation of unnecessary temporaries.
4864 For non-BLKmode, it is more efficient not to do this. */
4865
4866 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
4867
4868 do_pending_stack_adjust ();
4869 NO_DEFER_POP;
4870 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
4871 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4872 nontemporal);
4873 emit_jump_insn (gen_jump (lab2));
4874 emit_barrier ();
4875 emit_label (lab1);
4876 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
4877 nontemporal);
4878 emit_label (lab2);
4879 OK_DEFER_POP;
4880
4881 return NULL_RTX;
4882 }
4883 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
4884 /* If this is a scalar in a register that is stored in a wider mode
4885 than the declared mode, compute the result into its declared mode
4886 and then convert to the wider mode. Our value is the computed
4887 expression. */
4888 {
4889 rtx inner_target = 0;
4890
4891 /* We can do the conversion inside EXP, which will often result
4892 in some optimizations. Do the conversion in two steps: first
4893 change the signedness, if needed, then the extend. But don't
4894 do this if the type of EXP is a subtype of something else
4895 since then the conversion might involve more than just
4896 converting modes. */
4897 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
4898 && TREE_TYPE (TREE_TYPE (exp)) == 0
4899 && GET_MODE_PRECISION (GET_MODE (target))
4900 == TYPE_PRECISION (TREE_TYPE (exp)))
4901 {
4902 if (TYPE_UNSIGNED (TREE_TYPE (exp))
4903 != SUBREG_PROMOTED_UNSIGNED_P (target))
4904 {
4905 /* Some types, e.g. Fortran's logical*4, won't have a signed
4906 version, so use the mode instead. */
4907 tree ntype
4908 = (signed_or_unsigned_type_for
4909 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
4910 if (ntype == NULL)
4911 ntype = lang_hooks.types.type_for_mode
4912 (TYPE_MODE (TREE_TYPE (exp)),
4913 SUBREG_PROMOTED_UNSIGNED_P (target));
4914
4915 exp = fold_convert_loc (loc, ntype, exp);
4916 }
4917
4918 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
4919 (GET_MODE (SUBREG_REG (target)),
4920 SUBREG_PROMOTED_UNSIGNED_P (target)),
4921 exp);
4922
4923 inner_target = SUBREG_REG (target);
4924 }
4925
4926 temp = expand_expr (exp, inner_target, VOIDmode,
4927 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4928
4929 /* If TEMP is a VOIDmode constant, use convert_modes to make
4930 sure that we properly convert it. */
4931 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
4932 {
4933 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4934 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
4935 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
4936 GET_MODE (target), temp,
4937 SUBREG_PROMOTED_UNSIGNED_P (target));
4938 }
4939
4940 convert_move (SUBREG_REG (target), temp,
4941 SUBREG_PROMOTED_UNSIGNED_P (target));
4942
4943 return NULL_RTX;
4944 }
4945 else if ((TREE_CODE (exp) == STRING_CST
4946 || (TREE_CODE (exp) == MEM_REF
4947 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
4948 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
4949 == STRING_CST
4950 && integer_zerop (TREE_OPERAND (exp, 1))))
4951 && !nontemporal && !call_param_p
4952 && MEM_P (target))
4953 {
4954 /* Optimize initialization of an array with a STRING_CST. */
4955 HOST_WIDE_INT exp_len, str_copy_len;
4956 rtx dest_mem;
4957 tree str = TREE_CODE (exp) == STRING_CST
4958 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
4959
4960 exp_len = int_expr_size (exp);
4961 if (exp_len <= 0)
4962 goto normal_expr;
4963
4964 if (TREE_STRING_LENGTH (str) <= 0)
4965 goto normal_expr;
4966
4967 str_copy_len = strlen (TREE_STRING_POINTER (str));
4968 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
4969 goto normal_expr;
4970
4971 str_copy_len = TREE_STRING_LENGTH (str);
4972 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
4973 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
4974 {
4975 str_copy_len += STORE_MAX_PIECES - 1;
4976 str_copy_len &= ~(STORE_MAX_PIECES - 1);
4977 }
4978 str_copy_len = MIN (str_copy_len, exp_len);
4979 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
4980 CONST_CAST (char *, TREE_STRING_POINTER (str)),
4981 MEM_ALIGN (target), false))
4982 goto normal_expr;
4983
4984 dest_mem = target;
4985
4986 dest_mem = store_by_pieces (dest_mem,
4987 str_copy_len, builtin_strncpy_read_str,
4988 CONST_CAST (char *,
4989 TREE_STRING_POINTER (str)),
4990 MEM_ALIGN (target), false,
4991 exp_len > str_copy_len ? 1 : 0);
4992 if (exp_len > str_copy_len)
4993 clear_storage (adjust_address (dest_mem, BLKmode, 0),
4994 GEN_INT (exp_len - str_copy_len),
4995 BLOCK_OP_NORMAL);
4996 return NULL_RTX;
4997 }
4998 else
4999 {
5000 rtx tmp_target;
5001
5002 normal_expr:
5003 /* If we want to use a nontemporal store, force the value to
5004 register first. */
5005 tmp_target = nontemporal ? NULL_RTX : target;
5006 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5007 (call_param_p
5008 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5009 &alt_rtl);
5010 }
5011
5012 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5013 the same as that of TARGET, adjust the constant. This is needed, for
5014 example, in case it is a CONST_DOUBLE and we want only a word-sized
5015 value. */
5016 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5017 && TREE_CODE (exp) != ERROR_MARK
5018 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5019 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5020 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5021
5022 /* If value was not generated in the target, store it there.
5023 Convert the value to TARGET's type first if necessary and emit the
5024 pending incrementations that have been queued when expanding EXP.
5025 Note that we cannot emit the whole queue blindly because this will
5026 effectively disable the POST_INC optimization later.
5027
5028 If TEMP and TARGET compare equal according to rtx_equal_p, but
5029 one or both of them are volatile memory refs, we have to distinguish
5030 two cases:
5031 - expand_expr has used TARGET. In this case, we must not generate
5032 another copy. This can be detected by TARGET being equal according
5033 to == .
5034 - expand_expr has not used TARGET - that means that the source just
5035 happens to have the same RTX form. Since temp will have been created
5036 by expand_expr, it will compare unequal according to == .
5037 We must generate a copy in this case, to reach the correct number
5038 of volatile memory references. */
5039
5040 if ((! rtx_equal_p (temp, target)
5041 || (temp != target && (side_effects_p (temp)
5042 || side_effects_p (target))))
5043 && TREE_CODE (exp) != ERROR_MARK
5044 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5045 but TARGET is not valid memory reference, TEMP will differ
5046 from TARGET although it is really the same location. */
5047 && !(alt_rtl
5048 && rtx_equal_p (alt_rtl, target)
5049 && !side_effects_p (alt_rtl)
5050 && !side_effects_p (target))
5051 /* If there's nothing to copy, don't bother. Don't call
5052 expr_size unless necessary, because some front-ends (C++)
5053 expr_size-hook must not be given objects that are not
5054 supposed to be bit-copied or bit-initialized. */
5055 && expr_size (exp) != const0_rtx)
5056 {
5057 if (GET_MODE (temp) != GET_MODE (target)
5058 && GET_MODE (temp) != VOIDmode)
5059 {
5060 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5061 if (GET_MODE (target) == BLKmode
5062 && GET_MODE (temp) == BLKmode)
5063 emit_block_move (target, temp, expr_size (exp),
5064 (call_param_p
5065 ? BLOCK_OP_CALL_PARM
5066 : BLOCK_OP_NORMAL));
5067 else if (GET_MODE (target) == BLKmode)
5068 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5069 0, 0, 0, GET_MODE (temp), temp);
5070 else
5071 convert_move (target, temp, unsignedp);
5072 }
5073
5074 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5075 {
5076 /* Handle copying a string constant into an array. The string
5077 constant may be shorter than the array. So copy just the string's
5078 actual length, and clear the rest. First get the size of the data
5079 type of the string, which is actually the size of the target. */
5080 rtx size = expr_size (exp);
5081
5082 if (CONST_INT_P (size)
5083 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5084 emit_block_move (target, temp, size,
5085 (call_param_p
5086 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5087 else
5088 {
5089 enum machine_mode pointer_mode
5090 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5091 enum machine_mode address_mode
5092 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
5093
5094 /* Compute the size of the data to copy from the string. */
5095 tree copy_size
5096 = size_binop_loc (loc, MIN_EXPR,
5097 make_tree (sizetype, size),
5098 size_int (TREE_STRING_LENGTH (exp)));
5099 rtx copy_size_rtx
5100 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5101 (call_param_p
5102 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5103 rtx label = 0;
5104
5105 /* Copy that much. */
5106 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5107 TYPE_UNSIGNED (sizetype));
5108 emit_block_move (target, temp, copy_size_rtx,
5109 (call_param_p
5110 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5111
5112 /* Figure out how much is left in TARGET that we have to clear.
5113 Do all calculations in pointer_mode. */
5114 if (CONST_INT_P (copy_size_rtx))
5115 {
5116 size = plus_constant (size, -INTVAL (copy_size_rtx));
5117 target = adjust_address (target, BLKmode,
5118 INTVAL (copy_size_rtx));
5119 }
5120 else
5121 {
5122 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5123 copy_size_rtx, NULL_RTX, 0,
5124 OPTAB_LIB_WIDEN);
5125
5126 if (GET_MODE (copy_size_rtx) != address_mode)
5127 copy_size_rtx = convert_to_mode (address_mode,
5128 copy_size_rtx,
5129 TYPE_UNSIGNED (sizetype));
5130
5131 target = offset_address (target, copy_size_rtx,
5132 highest_pow2_factor (copy_size));
5133 label = gen_label_rtx ();
5134 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5135 GET_MODE (size), 0, label);
5136 }
5137
5138 if (size != const0_rtx)
5139 clear_storage (target, size, BLOCK_OP_NORMAL);
5140
5141 if (label)
5142 emit_label (label);
5143 }
5144 }
5145 /* Handle calls that return values in multiple non-contiguous locations.
5146 The Irix 6 ABI has examples of this. */
5147 else if (GET_CODE (target) == PARALLEL)
5148 emit_group_load (target, temp, TREE_TYPE (exp),
5149 int_size_in_bytes (TREE_TYPE (exp)));
5150 else if (GET_MODE (temp) == BLKmode)
5151 emit_block_move (target, temp, expr_size (exp),
5152 (call_param_p
5153 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5154 else if (nontemporal
5155 && emit_storent_insn (target, temp))
5156 /* If we managed to emit a nontemporal store, there is nothing else to
5157 do. */
5158 ;
5159 else
5160 {
5161 temp = force_operand (temp, target);
5162 if (temp != target)
5163 emit_move_insn (target, temp);
5164 }
5165 }
5166
5167 return NULL_RTX;
5168 }
5169 \f
5170 /* Return true if field F of structure TYPE is a flexible array. */
5171
5172 static bool
5173 flexible_array_member_p (const_tree f, const_tree type)
5174 {
5175 const_tree tf;
5176
5177 tf = TREE_TYPE (f);
5178 return (DECL_CHAIN (f) == NULL
5179 && TREE_CODE (tf) == ARRAY_TYPE
5180 && TYPE_DOMAIN (tf)
5181 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5182 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5183 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5184 && int_size_in_bytes (type) >= 0);
5185 }
5186
5187 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5188 must have in order for it to completely initialize a value of type TYPE.
5189 Return -1 if the number isn't known.
5190
5191 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5192
5193 static HOST_WIDE_INT
5194 count_type_elements (const_tree type, bool for_ctor_p)
5195 {
5196 switch (TREE_CODE (type))
5197 {
5198 case ARRAY_TYPE:
5199 {
5200 tree nelts;
5201
5202 nelts = array_type_nelts (type);
5203 if (nelts && host_integerp (nelts, 1))
5204 {
5205 unsigned HOST_WIDE_INT n;
5206
5207 n = tree_low_cst (nelts, 1) + 1;
5208 if (n == 0 || for_ctor_p)
5209 return n;
5210 else
5211 return n * count_type_elements (TREE_TYPE (type), false);
5212 }
5213 return for_ctor_p ? -1 : 1;
5214 }
5215
5216 case RECORD_TYPE:
5217 {
5218 unsigned HOST_WIDE_INT n;
5219 tree f;
5220
5221 n = 0;
5222 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5223 if (TREE_CODE (f) == FIELD_DECL)
5224 {
5225 if (!for_ctor_p)
5226 n += count_type_elements (TREE_TYPE (f), false);
5227 else if (!flexible_array_member_p (f, type))
5228 /* Don't count flexible arrays, which are not supposed
5229 to be initialized. */
5230 n += 1;
5231 }
5232
5233 return n;
5234 }
5235
5236 case UNION_TYPE:
5237 case QUAL_UNION_TYPE:
5238 {
5239 tree f;
5240 HOST_WIDE_INT n, m;
5241
5242 gcc_assert (!for_ctor_p);
5243 /* Estimate the number of scalars in each field and pick the
5244 maximum. Other estimates would do instead; the idea is simply
5245 to make sure that the estimate is not sensitive to the ordering
5246 of the fields. */
5247 n = 1;
5248 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5249 if (TREE_CODE (f) == FIELD_DECL)
5250 {
5251 m = count_type_elements (TREE_TYPE (f), false);
5252 /* If the field doesn't span the whole union, add an extra
5253 scalar for the rest. */
5254 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5255 TYPE_SIZE (type)) != 1)
5256 m++;
5257 if (n < m)
5258 n = m;
5259 }
5260 return n;
5261 }
5262
5263 case COMPLEX_TYPE:
5264 return 2;
5265
5266 case VECTOR_TYPE:
5267 return TYPE_VECTOR_SUBPARTS (type);
5268
5269 case INTEGER_TYPE:
5270 case REAL_TYPE:
5271 case FIXED_POINT_TYPE:
5272 case ENUMERAL_TYPE:
5273 case BOOLEAN_TYPE:
5274 case POINTER_TYPE:
5275 case OFFSET_TYPE:
5276 case REFERENCE_TYPE:
5277 return 1;
5278
5279 case ERROR_MARK:
5280 return 0;
5281
5282 case VOID_TYPE:
5283 case METHOD_TYPE:
5284 case FUNCTION_TYPE:
5285 case LANG_TYPE:
5286 default:
5287 gcc_unreachable ();
5288 }
5289 }
5290
5291 /* Helper for categorize_ctor_elements. Identical interface. */
5292
5293 static bool
5294 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5295 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5296 {
5297 unsigned HOST_WIDE_INT idx;
5298 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5299 tree value, purpose, elt_type;
5300
5301 /* Whether CTOR is a valid constant initializer, in accordance with what
5302 initializer_constant_valid_p does. If inferred from the constructor
5303 elements, true until proven otherwise. */
5304 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5305 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5306
5307 nz_elts = 0;
5308 init_elts = 0;
5309 num_fields = 0;
5310 elt_type = NULL_TREE;
5311
5312 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5313 {
5314 HOST_WIDE_INT mult = 1;
5315
5316 if (TREE_CODE (purpose) == RANGE_EXPR)
5317 {
5318 tree lo_index = TREE_OPERAND (purpose, 0);
5319 tree hi_index = TREE_OPERAND (purpose, 1);
5320
5321 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5322 mult = (tree_low_cst (hi_index, 1)
5323 - tree_low_cst (lo_index, 1) + 1);
5324 }
5325 num_fields += mult;
5326 elt_type = TREE_TYPE (value);
5327
5328 switch (TREE_CODE (value))
5329 {
5330 case CONSTRUCTOR:
5331 {
5332 HOST_WIDE_INT nz = 0, ic = 0;
5333
5334 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5335 p_complete);
5336
5337 nz_elts += mult * nz;
5338 init_elts += mult * ic;
5339
5340 if (const_from_elts_p && const_p)
5341 const_p = const_elt_p;
5342 }
5343 break;
5344
5345 case INTEGER_CST:
5346 case REAL_CST:
5347 case FIXED_CST:
5348 if (!initializer_zerop (value))
5349 nz_elts += mult;
5350 init_elts += mult;
5351 break;
5352
5353 case STRING_CST:
5354 nz_elts += mult * TREE_STRING_LENGTH (value);
5355 init_elts += mult * TREE_STRING_LENGTH (value);
5356 break;
5357
5358 case COMPLEX_CST:
5359 if (!initializer_zerop (TREE_REALPART (value)))
5360 nz_elts += mult;
5361 if (!initializer_zerop (TREE_IMAGPART (value)))
5362 nz_elts += mult;
5363 init_elts += mult;
5364 break;
5365
5366 case VECTOR_CST:
5367 {
5368 tree v;
5369 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
5370 {
5371 if (!initializer_zerop (TREE_VALUE (v)))
5372 nz_elts += mult;
5373 init_elts += mult;
5374 }
5375 }
5376 break;
5377
5378 default:
5379 {
5380 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5381 nz_elts += mult * tc;
5382 init_elts += mult * tc;
5383
5384 if (const_from_elts_p && const_p)
5385 const_p = initializer_constant_valid_p (value, elt_type)
5386 != NULL_TREE;
5387 }
5388 break;
5389 }
5390 }
5391
5392 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5393 num_fields, elt_type))
5394 *p_complete = false;
5395
5396 *p_nz_elts += nz_elts;
5397 *p_init_elts += init_elts;
5398
5399 return const_p;
5400 }
5401
5402 /* Examine CTOR to discover:
5403 * how many scalar fields are set to nonzero values,
5404 and place it in *P_NZ_ELTS;
5405 * how many scalar fields in total are in CTOR,
5406 and place it in *P_ELT_COUNT.
5407 * whether the constructor is complete -- in the sense that every
5408 meaningful byte is explicitly given a value --
5409 and place it in *P_COMPLETE.
5410
5411 Return whether or not CTOR is a valid static constant initializer, the same
5412 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5413
5414 bool
5415 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5416 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5417 {
5418 *p_nz_elts = 0;
5419 *p_init_elts = 0;
5420 *p_complete = true;
5421
5422 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5423 }
5424
5425 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5426 of which had type LAST_TYPE. Each element was itself a complete
5427 initializer, in the sense that every meaningful byte was explicitly
5428 given a value. Return true if the same is true for the constructor
5429 as a whole. */
5430
5431 bool
5432 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5433 const_tree last_type)
5434 {
5435 if (TREE_CODE (type) == UNION_TYPE
5436 || TREE_CODE (type) == QUAL_UNION_TYPE)
5437 {
5438 if (num_elts == 0)
5439 return false;
5440
5441 gcc_assert (num_elts == 1 && last_type);
5442
5443 /* ??? We could look at each element of the union, and find the
5444 largest element. Which would avoid comparing the size of the
5445 initialized element against any tail padding in the union.
5446 Doesn't seem worth the effort... */
5447 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5448 }
5449
5450 return count_type_elements (type, true) == num_elts;
5451 }
5452
5453 /* Return 1 if EXP contains mostly (3/4) zeros. */
5454
5455 static int
5456 mostly_zeros_p (const_tree exp)
5457 {
5458 if (TREE_CODE (exp) == CONSTRUCTOR)
5459 {
5460 HOST_WIDE_INT nz_elts, init_elts;
5461 bool complete_p;
5462
5463 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5464 return !complete_p || nz_elts < init_elts / 4;
5465 }
5466
5467 return initializer_zerop (exp);
5468 }
5469
5470 /* Return 1 if EXP contains all zeros. */
5471
5472 static int
5473 all_zeros_p (const_tree exp)
5474 {
5475 if (TREE_CODE (exp) == CONSTRUCTOR)
5476 {
5477 HOST_WIDE_INT nz_elts, init_elts;
5478 bool complete_p;
5479
5480 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5481 return nz_elts == 0;
5482 }
5483
5484 return initializer_zerop (exp);
5485 }
5486 \f
5487 /* Helper function for store_constructor.
5488 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5489 TYPE is the type of the CONSTRUCTOR, not the element type.
5490 CLEARED is as for store_constructor.
5491 ALIAS_SET is the alias set to use for any stores.
5492
5493 This provides a recursive shortcut back to store_constructor when it isn't
5494 necessary to go through store_field. This is so that we can pass through
5495 the cleared field to let store_constructor know that we may not have to
5496 clear a substructure if the outer structure has already been cleared. */
5497
5498 static void
5499 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5500 HOST_WIDE_INT bitpos, enum machine_mode mode,
5501 tree exp, tree type, int cleared,
5502 alias_set_type alias_set)
5503 {
5504 if (TREE_CODE (exp) == CONSTRUCTOR
5505 /* We can only call store_constructor recursively if the size and
5506 bit position are on a byte boundary. */
5507 && bitpos % BITS_PER_UNIT == 0
5508 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5509 /* If we have a nonzero bitpos for a register target, then we just
5510 let store_field do the bitfield handling. This is unlikely to
5511 generate unnecessary clear instructions anyways. */
5512 && (bitpos == 0 || MEM_P (target)))
5513 {
5514 if (MEM_P (target))
5515 target
5516 = adjust_address (target,
5517 GET_MODE (target) == BLKmode
5518 || 0 != (bitpos
5519 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5520 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5521
5522
5523 /* Update the alias set, if required. */
5524 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5525 && MEM_ALIAS_SET (target) != 0)
5526 {
5527 target = copy_rtx (target);
5528 set_mem_alias_set (target, alias_set);
5529 }
5530
5531 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5532 }
5533 else
5534 store_field (target, bitsize, bitpos, 0, 0, mode, exp, type, alias_set,
5535 false);
5536 }
5537
5538 /* Store the value of constructor EXP into the rtx TARGET.
5539 TARGET is either a REG or a MEM; we know it cannot conflict, since
5540 safe_from_p has been called.
5541 CLEARED is true if TARGET is known to have been zero'd.
5542 SIZE is the number of bytes of TARGET we are allowed to modify: this
5543 may not be the same as the size of EXP if we are assigning to a field
5544 which has been packed to exclude padding bits. */
5545
5546 static void
5547 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5548 {
5549 tree type = TREE_TYPE (exp);
5550 #ifdef WORD_REGISTER_OPERATIONS
5551 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5552 #endif
5553
5554 switch (TREE_CODE (type))
5555 {
5556 case RECORD_TYPE:
5557 case UNION_TYPE:
5558 case QUAL_UNION_TYPE:
5559 {
5560 unsigned HOST_WIDE_INT idx;
5561 tree field, value;
5562
5563 /* If size is zero or the target is already cleared, do nothing. */
5564 if (size == 0 || cleared)
5565 cleared = 1;
5566 /* We either clear the aggregate or indicate the value is dead. */
5567 else if ((TREE_CODE (type) == UNION_TYPE
5568 || TREE_CODE (type) == QUAL_UNION_TYPE)
5569 && ! CONSTRUCTOR_ELTS (exp))
5570 /* If the constructor is empty, clear the union. */
5571 {
5572 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5573 cleared = 1;
5574 }
5575
5576 /* If we are building a static constructor into a register,
5577 set the initial value as zero so we can fold the value into
5578 a constant. But if more than one register is involved,
5579 this probably loses. */
5580 else if (REG_P (target) && TREE_STATIC (exp)
5581 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5582 {
5583 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5584 cleared = 1;
5585 }
5586
5587 /* If the constructor has fewer fields than the structure or
5588 if we are initializing the structure to mostly zeros, clear
5589 the whole structure first. Don't do this if TARGET is a
5590 register whose mode size isn't equal to SIZE since
5591 clear_storage can't handle this case. */
5592 else if (size > 0
5593 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5594 != fields_length (type))
5595 || mostly_zeros_p (exp))
5596 && (!REG_P (target)
5597 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5598 == size)))
5599 {
5600 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5601 cleared = 1;
5602 }
5603
5604 if (REG_P (target) && !cleared)
5605 emit_clobber (target);
5606
5607 /* Store each element of the constructor into the
5608 corresponding field of TARGET. */
5609 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5610 {
5611 enum machine_mode mode;
5612 HOST_WIDE_INT bitsize;
5613 HOST_WIDE_INT bitpos = 0;
5614 tree offset;
5615 rtx to_rtx = target;
5616
5617 /* Just ignore missing fields. We cleared the whole
5618 structure, above, if any fields are missing. */
5619 if (field == 0)
5620 continue;
5621
5622 if (cleared && initializer_zerop (value))
5623 continue;
5624
5625 if (host_integerp (DECL_SIZE (field), 1))
5626 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5627 else
5628 bitsize = -1;
5629
5630 mode = DECL_MODE (field);
5631 if (DECL_BIT_FIELD (field))
5632 mode = VOIDmode;
5633
5634 offset = DECL_FIELD_OFFSET (field);
5635 if (host_integerp (offset, 0)
5636 && host_integerp (bit_position (field), 0))
5637 {
5638 bitpos = int_bit_position (field);
5639 offset = 0;
5640 }
5641 else
5642 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5643
5644 if (offset)
5645 {
5646 enum machine_mode address_mode;
5647 rtx offset_rtx;
5648
5649 offset
5650 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5651 make_tree (TREE_TYPE (exp),
5652 target));
5653
5654 offset_rtx = expand_normal (offset);
5655 gcc_assert (MEM_P (to_rtx));
5656
5657 address_mode
5658 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5659 if (GET_MODE (offset_rtx) != address_mode)
5660 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5661
5662 to_rtx = offset_address (to_rtx, offset_rtx,
5663 highest_pow2_factor (offset));
5664 }
5665
5666 #ifdef WORD_REGISTER_OPERATIONS
5667 /* If this initializes a field that is smaller than a
5668 word, at the start of a word, try to widen it to a full
5669 word. This special case allows us to output C++ member
5670 function initializations in a form that the optimizers
5671 can understand. */
5672 if (REG_P (target)
5673 && bitsize < BITS_PER_WORD
5674 && bitpos % BITS_PER_WORD == 0
5675 && GET_MODE_CLASS (mode) == MODE_INT
5676 && TREE_CODE (value) == INTEGER_CST
5677 && exp_size >= 0
5678 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5679 {
5680 tree type = TREE_TYPE (value);
5681
5682 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5683 {
5684 type = lang_hooks.types.type_for_size
5685 (BITS_PER_WORD, TYPE_UNSIGNED (type));
5686 value = fold_convert (type, value);
5687 }
5688
5689 if (BYTES_BIG_ENDIAN)
5690 value
5691 = fold_build2 (LSHIFT_EXPR, type, value,
5692 build_int_cst (type,
5693 BITS_PER_WORD - bitsize));
5694 bitsize = BITS_PER_WORD;
5695 mode = word_mode;
5696 }
5697 #endif
5698
5699 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5700 && DECL_NONADDRESSABLE_P (field))
5701 {
5702 to_rtx = copy_rtx (to_rtx);
5703 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5704 }
5705
5706 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5707 value, type, cleared,
5708 get_alias_set (TREE_TYPE (field)));
5709 }
5710 break;
5711 }
5712 case ARRAY_TYPE:
5713 {
5714 tree value, index;
5715 unsigned HOST_WIDE_INT i;
5716 int need_to_clear;
5717 tree domain;
5718 tree elttype = TREE_TYPE (type);
5719 int const_bounds_p;
5720 HOST_WIDE_INT minelt = 0;
5721 HOST_WIDE_INT maxelt = 0;
5722
5723 domain = TYPE_DOMAIN (type);
5724 const_bounds_p = (TYPE_MIN_VALUE (domain)
5725 && TYPE_MAX_VALUE (domain)
5726 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5727 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5728
5729 /* If we have constant bounds for the range of the type, get them. */
5730 if (const_bounds_p)
5731 {
5732 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5733 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5734 }
5735
5736 /* If the constructor has fewer elements than the array, clear
5737 the whole array first. Similarly if this is static
5738 constructor of a non-BLKmode object. */
5739 if (cleared)
5740 need_to_clear = 0;
5741 else if (REG_P (target) && TREE_STATIC (exp))
5742 need_to_clear = 1;
5743 else
5744 {
5745 unsigned HOST_WIDE_INT idx;
5746 tree index, value;
5747 HOST_WIDE_INT count = 0, zero_count = 0;
5748 need_to_clear = ! const_bounds_p;
5749
5750 /* This loop is a more accurate version of the loop in
5751 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5752 is also needed to check for missing elements. */
5753 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5754 {
5755 HOST_WIDE_INT this_node_count;
5756
5757 if (need_to_clear)
5758 break;
5759
5760 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5761 {
5762 tree lo_index = TREE_OPERAND (index, 0);
5763 tree hi_index = TREE_OPERAND (index, 1);
5764
5765 if (! host_integerp (lo_index, 1)
5766 || ! host_integerp (hi_index, 1))
5767 {
5768 need_to_clear = 1;
5769 break;
5770 }
5771
5772 this_node_count = (tree_low_cst (hi_index, 1)
5773 - tree_low_cst (lo_index, 1) + 1);
5774 }
5775 else
5776 this_node_count = 1;
5777
5778 count += this_node_count;
5779 if (mostly_zeros_p (value))
5780 zero_count += this_node_count;
5781 }
5782
5783 /* Clear the entire array first if there are any missing
5784 elements, or if the incidence of zero elements is >=
5785 75%. */
5786 if (! need_to_clear
5787 && (count < maxelt - minelt + 1
5788 || 4 * zero_count >= 3 * count))
5789 need_to_clear = 1;
5790 }
5791
5792 if (need_to_clear && size > 0)
5793 {
5794 if (REG_P (target))
5795 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5796 else
5797 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5798 cleared = 1;
5799 }
5800
5801 if (!cleared && REG_P (target))
5802 /* Inform later passes that the old value is dead. */
5803 emit_clobber (target);
5804
5805 /* Store each element of the constructor into the
5806 corresponding element of TARGET, determined by counting the
5807 elements. */
5808 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5809 {
5810 enum machine_mode mode;
5811 HOST_WIDE_INT bitsize;
5812 HOST_WIDE_INT bitpos;
5813 rtx xtarget = target;
5814
5815 if (cleared && initializer_zerop (value))
5816 continue;
5817
5818 mode = TYPE_MODE (elttype);
5819 if (mode == BLKmode)
5820 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5821 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5822 : -1);
5823 else
5824 bitsize = GET_MODE_BITSIZE (mode);
5825
5826 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5827 {
5828 tree lo_index = TREE_OPERAND (index, 0);
5829 tree hi_index = TREE_OPERAND (index, 1);
5830 rtx index_r, pos_rtx;
5831 HOST_WIDE_INT lo, hi, count;
5832 tree position;
5833
5834 /* If the range is constant and "small", unroll the loop. */
5835 if (const_bounds_p
5836 && host_integerp (lo_index, 0)
5837 && host_integerp (hi_index, 0)
5838 && (lo = tree_low_cst (lo_index, 0),
5839 hi = tree_low_cst (hi_index, 0),
5840 count = hi - lo + 1,
5841 (!MEM_P (target)
5842 || count <= 2
5843 || (host_integerp (TYPE_SIZE (elttype), 1)
5844 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5845 <= 40 * 8)))))
5846 {
5847 lo -= minelt; hi -= minelt;
5848 for (; lo <= hi; lo++)
5849 {
5850 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
5851
5852 if (MEM_P (target)
5853 && !MEM_KEEP_ALIAS_SET_P (target)
5854 && TREE_CODE (type) == ARRAY_TYPE
5855 && TYPE_NONALIASED_COMPONENT (type))
5856 {
5857 target = copy_rtx (target);
5858 MEM_KEEP_ALIAS_SET_P (target) = 1;
5859 }
5860
5861 store_constructor_field
5862 (target, bitsize, bitpos, mode, value, type, cleared,
5863 get_alias_set (elttype));
5864 }
5865 }
5866 else
5867 {
5868 rtx loop_start = gen_label_rtx ();
5869 rtx loop_end = gen_label_rtx ();
5870 tree exit_cond;
5871
5872 expand_normal (hi_index);
5873
5874 index = build_decl (EXPR_LOCATION (exp),
5875 VAR_DECL, NULL_TREE, domain);
5876 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
5877 SET_DECL_RTL (index, index_r);
5878 store_expr (lo_index, index_r, 0, false);
5879
5880 /* Build the head of the loop. */
5881 do_pending_stack_adjust ();
5882 emit_label (loop_start);
5883
5884 /* Assign value to element index. */
5885 position =
5886 fold_convert (ssizetype,
5887 fold_build2 (MINUS_EXPR,
5888 TREE_TYPE (index),
5889 index,
5890 TYPE_MIN_VALUE (domain)));
5891
5892 position =
5893 size_binop (MULT_EXPR, position,
5894 fold_convert (ssizetype,
5895 TYPE_SIZE_UNIT (elttype)));
5896
5897 pos_rtx = expand_normal (position);
5898 xtarget = offset_address (target, pos_rtx,
5899 highest_pow2_factor (position));
5900 xtarget = adjust_address (xtarget, mode, 0);
5901 if (TREE_CODE (value) == CONSTRUCTOR)
5902 store_constructor (value, xtarget, cleared,
5903 bitsize / BITS_PER_UNIT);
5904 else
5905 store_expr (value, xtarget, 0, false);
5906
5907 /* Generate a conditional jump to exit the loop. */
5908 exit_cond = build2 (LT_EXPR, integer_type_node,
5909 index, hi_index);
5910 jumpif (exit_cond, loop_end, -1);
5911
5912 /* Update the loop counter, and jump to the head of
5913 the loop. */
5914 expand_assignment (index,
5915 build2 (PLUS_EXPR, TREE_TYPE (index),
5916 index, integer_one_node),
5917 false);
5918
5919 emit_jump (loop_start);
5920
5921 /* Build the end of the loop. */
5922 emit_label (loop_end);
5923 }
5924 }
5925 else if ((index != 0 && ! host_integerp (index, 0))
5926 || ! host_integerp (TYPE_SIZE (elttype), 1))
5927 {
5928 tree position;
5929
5930 if (index == 0)
5931 index = ssize_int (1);
5932
5933 if (minelt)
5934 index = fold_convert (ssizetype,
5935 fold_build2 (MINUS_EXPR,
5936 TREE_TYPE (index),
5937 index,
5938 TYPE_MIN_VALUE (domain)));
5939
5940 position =
5941 size_binop (MULT_EXPR, index,
5942 fold_convert (ssizetype,
5943 TYPE_SIZE_UNIT (elttype)));
5944 xtarget = offset_address (target,
5945 expand_normal (position),
5946 highest_pow2_factor (position));
5947 xtarget = adjust_address (xtarget, mode, 0);
5948 store_expr (value, xtarget, 0, false);
5949 }
5950 else
5951 {
5952 if (index != 0)
5953 bitpos = ((tree_low_cst (index, 0) - minelt)
5954 * tree_low_cst (TYPE_SIZE (elttype), 1));
5955 else
5956 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
5957
5958 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
5959 && TREE_CODE (type) == ARRAY_TYPE
5960 && TYPE_NONALIASED_COMPONENT (type))
5961 {
5962 target = copy_rtx (target);
5963 MEM_KEEP_ALIAS_SET_P (target) = 1;
5964 }
5965 store_constructor_field (target, bitsize, bitpos, mode, value,
5966 type, cleared, get_alias_set (elttype));
5967 }
5968 }
5969 break;
5970 }
5971
5972 case VECTOR_TYPE:
5973 {
5974 unsigned HOST_WIDE_INT idx;
5975 constructor_elt *ce;
5976 int i;
5977 int need_to_clear;
5978 int icode = 0;
5979 tree elttype = TREE_TYPE (type);
5980 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
5981 enum machine_mode eltmode = TYPE_MODE (elttype);
5982 HOST_WIDE_INT bitsize;
5983 HOST_WIDE_INT bitpos;
5984 rtvec vector = NULL;
5985 unsigned n_elts;
5986 alias_set_type alias;
5987
5988 gcc_assert (eltmode != BLKmode);
5989
5990 n_elts = TYPE_VECTOR_SUBPARTS (type);
5991 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
5992 {
5993 enum machine_mode mode = GET_MODE (target);
5994
5995 icode = (int) optab_handler (vec_init_optab, mode);
5996 if (icode != CODE_FOR_nothing)
5997 {
5998 unsigned int i;
5999
6000 vector = rtvec_alloc (n_elts);
6001 for (i = 0; i < n_elts; i++)
6002 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6003 }
6004 }
6005
6006 /* If the constructor has fewer elements than the vector,
6007 clear the whole array first. Similarly if this is static
6008 constructor of a non-BLKmode object. */
6009 if (cleared)
6010 need_to_clear = 0;
6011 else if (REG_P (target) && TREE_STATIC (exp))
6012 need_to_clear = 1;
6013 else
6014 {
6015 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6016 tree value;
6017
6018 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6019 {
6020 int n_elts_here = tree_low_cst
6021 (int_const_binop (TRUNC_DIV_EXPR,
6022 TYPE_SIZE (TREE_TYPE (value)),
6023 TYPE_SIZE (elttype)), 1);
6024
6025 count += n_elts_here;
6026 if (mostly_zeros_p (value))
6027 zero_count += n_elts_here;
6028 }
6029
6030 /* Clear the entire vector first if there are any missing elements,
6031 or if the incidence of zero elements is >= 75%. */
6032 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6033 }
6034
6035 if (need_to_clear && size > 0 && !vector)
6036 {
6037 if (REG_P (target))
6038 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6039 else
6040 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6041 cleared = 1;
6042 }
6043
6044 /* Inform later passes that the old value is dead. */
6045 if (!cleared && !vector && REG_P (target))
6046 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6047
6048 if (MEM_P (target))
6049 alias = MEM_ALIAS_SET (target);
6050 else
6051 alias = get_alias_set (elttype);
6052
6053 /* Store each element of the constructor into the corresponding
6054 element of TARGET, determined by counting the elements. */
6055 for (idx = 0, i = 0;
6056 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6057 idx++, i += bitsize / elt_size)
6058 {
6059 HOST_WIDE_INT eltpos;
6060 tree value = ce->value;
6061
6062 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6063 if (cleared && initializer_zerop (value))
6064 continue;
6065
6066 if (ce->index)
6067 eltpos = tree_low_cst (ce->index, 1);
6068 else
6069 eltpos = i;
6070
6071 if (vector)
6072 {
6073 /* Vector CONSTRUCTORs should only be built from smaller
6074 vectors in the case of BLKmode vectors. */
6075 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6076 RTVEC_ELT (vector, eltpos)
6077 = expand_normal (value);
6078 }
6079 else
6080 {
6081 enum machine_mode value_mode =
6082 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6083 ? TYPE_MODE (TREE_TYPE (value))
6084 : eltmode;
6085 bitpos = eltpos * elt_size;
6086 store_constructor_field (target, bitsize, bitpos,
6087 value_mode, value, type,
6088 cleared, alias);
6089 }
6090 }
6091
6092 if (vector)
6093 emit_insn (GEN_FCN (icode)
6094 (target,
6095 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6096 break;
6097 }
6098
6099 default:
6100 gcc_unreachable ();
6101 }
6102 }
6103
6104 /* Store the value of EXP (an expression tree)
6105 into a subfield of TARGET which has mode MODE and occupies
6106 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6107 If MODE is VOIDmode, it means that we are storing into a bit-field.
6108
6109 BITREGION_START is bitpos of the first bitfield in this region.
6110 BITREGION_END is the bitpos of the ending bitfield in this region.
6111 These two fields are 0, if the C++ memory model does not apply,
6112 or we are not interested in keeping track of bitfield regions.
6113
6114 Always return const0_rtx unless we have something particular to
6115 return.
6116
6117 TYPE is the type of the underlying object,
6118
6119 ALIAS_SET is the alias set for the destination. This value will
6120 (in general) be different from that for TARGET, since TARGET is a
6121 reference to the containing structure.
6122
6123 If NONTEMPORAL is true, try generating a nontemporal store. */
6124
6125 static rtx
6126 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6127 unsigned HOST_WIDE_INT bitregion_start,
6128 unsigned HOST_WIDE_INT bitregion_end,
6129 enum machine_mode mode, tree exp, tree type,
6130 alias_set_type alias_set, bool nontemporal)
6131 {
6132 if (TREE_CODE (exp) == ERROR_MARK)
6133 return const0_rtx;
6134
6135 /* If we have nothing to store, do nothing unless the expression has
6136 side-effects. */
6137 if (bitsize == 0)
6138 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6139
6140 /* If we are storing into an unaligned field of an aligned union that is
6141 in a register, we may have the mode of TARGET being an integer mode but
6142 MODE == BLKmode. In that case, get an aligned object whose size and
6143 alignment are the same as TARGET and store TARGET into it (we can avoid
6144 the store if the field being stored is the entire width of TARGET). Then
6145 call ourselves recursively to store the field into a BLKmode version of
6146 that object. Finally, load from the object into TARGET. This is not
6147 very efficient in general, but should only be slightly more expensive
6148 than the otherwise-required unaligned accesses. Perhaps this can be
6149 cleaned up later. It's tempting to make OBJECT readonly, but it's set
6150 twice, once with emit_move_insn and once via store_field. */
6151
6152 if (mode == BLKmode
6153 && (REG_P (target) || GET_CODE (target) == SUBREG))
6154 {
6155 rtx object = assign_temp (type, 0, 1, 1);
6156 rtx blk_object = adjust_address (object, BLKmode, 0);
6157
6158 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
6159 emit_move_insn (object, target);
6160
6161 store_field (blk_object, bitsize, bitpos,
6162 bitregion_start, bitregion_end,
6163 mode, exp, type, alias_set, nontemporal);
6164
6165 emit_move_insn (target, object);
6166
6167 /* We want to return the BLKmode version of the data. */
6168 return blk_object;
6169 }
6170
6171 if (GET_CODE (target) == CONCAT)
6172 {
6173 /* We're storing into a struct containing a single __complex. */
6174
6175 gcc_assert (!bitpos);
6176 return store_expr (exp, target, 0, nontemporal);
6177 }
6178
6179 /* If the structure is in a register or if the component
6180 is a bit field, we cannot use addressing to access it.
6181 Use bit-field techniques or SUBREG to store in it. */
6182
6183 if (mode == VOIDmode
6184 || (mode != BLKmode && ! direct_store[(int) mode]
6185 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6186 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6187 || REG_P (target)
6188 || GET_CODE (target) == SUBREG
6189 /* If the field isn't aligned enough to store as an ordinary memref,
6190 store it as a bit field. */
6191 || (mode != BLKmode
6192 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6193 || bitpos % GET_MODE_ALIGNMENT (mode))
6194 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6195 || (bitpos % BITS_PER_UNIT != 0)))
6196 /* If the RHS and field are a constant size and the size of the
6197 RHS isn't the same size as the bitfield, we must use bitfield
6198 operations. */
6199 || (bitsize >= 0
6200 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6201 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6202 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6203 decl we must use bitfield operations. */
6204 || (bitsize >= 0
6205 && TREE_CODE (exp) == MEM_REF
6206 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6207 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6208 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6209 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6210 {
6211 rtx temp;
6212 gimple nop_def;
6213
6214 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6215 implies a mask operation. If the precision is the same size as
6216 the field we're storing into, that mask is redundant. This is
6217 particularly common with bit field assignments generated by the
6218 C front end. */
6219 nop_def = get_def_for_expr (exp, NOP_EXPR);
6220 if (nop_def)
6221 {
6222 tree type = TREE_TYPE (exp);
6223 if (INTEGRAL_TYPE_P (type)
6224 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6225 && bitsize == TYPE_PRECISION (type))
6226 {
6227 tree op = gimple_assign_rhs1 (nop_def);
6228 type = TREE_TYPE (op);
6229 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6230 exp = op;
6231 }
6232 }
6233
6234 temp = expand_normal (exp);
6235
6236 /* If BITSIZE is narrower than the size of the type of EXP
6237 we will be narrowing TEMP. Normally, what's wanted are the
6238 low-order bits. However, if EXP's type is a record and this is
6239 big-endian machine, we want the upper BITSIZE bits. */
6240 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6241 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6242 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6243 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6244 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6245 NULL_RTX, 1);
6246
6247 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
6248 MODE. */
6249 if (mode != VOIDmode && mode != BLKmode
6250 && mode != TYPE_MODE (TREE_TYPE (exp)))
6251 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6252
6253 /* If the modes of TEMP and TARGET are both BLKmode, both
6254 must be in memory and BITPOS must be aligned on a byte
6255 boundary. If so, we simply do a block copy. Likewise
6256 for a BLKmode-like TARGET. */
6257 if (GET_MODE (temp) == BLKmode
6258 && (GET_MODE (target) == BLKmode
6259 || (MEM_P (target)
6260 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6261 && (bitpos % BITS_PER_UNIT) == 0
6262 && (bitsize % BITS_PER_UNIT) == 0)))
6263 {
6264 gcc_assert (MEM_P (target) && MEM_P (temp)
6265 && (bitpos % BITS_PER_UNIT) == 0);
6266
6267 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6268 emit_block_move (target, temp,
6269 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6270 / BITS_PER_UNIT),
6271 BLOCK_OP_NORMAL);
6272
6273 return const0_rtx;
6274 }
6275
6276 /* Store the value in the bitfield. */
6277 store_bit_field (target, bitsize, bitpos,
6278 bitregion_start, bitregion_end,
6279 mode, temp);
6280
6281 return const0_rtx;
6282 }
6283 else
6284 {
6285 /* Now build a reference to just the desired component. */
6286 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6287
6288 if (to_rtx == target)
6289 to_rtx = copy_rtx (to_rtx);
6290
6291 if (!MEM_SCALAR_P (to_rtx))
6292 MEM_IN_STRUCT_P (to_rtx) = 1;
6293 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6294 set_mem_alias_set (to_rtx, alias_set);
6295
6296 return store_expr (exp, to_rtx, 0, nontemporal);
6297 }
6298 }
6299 \f
6300 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6301 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6302 codes and find the ultimate containing object, which we return.
6303
6304 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6305 bit position, and *PUNSIGNEDP to the signedness of the field.
6306 If the position of the field is variable, we store a tree
6307 giving the variable offset (in units) in *POFFSET.
6308 This offset is in addition to the bit position.
6309 If the position is not variable, we store 0 in *POFFSET.
6310
6311 If any of the extraction expressions is volatile,
6312 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6313
6314 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6315 Otherwise, it is a mode that can be used to access the field.
6316
6317 If the field describes a variable-sized object, *PMODE is set to
6318 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6319 this case, but the address of the object can be found.
6320
6321 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6322 look through nodes that serve as markers of a greater alignment than
6323 the one that can be deduced from the expression. These nodes make it
6324 possible for front-ends to prevent temporaries from being created by
6325 the middle-end on alignment considerations. For that purpose, the
6326 normal operating mode at high-level is to always pass FALSE so that
6327 the ultimate containing object is really returned; moreover, the
6328 associated predicate handled_component_p will always return TRUE
6329 on these nodes, thus indicating that they are essentially handled
6330 by get_inner_reference. TRUE should only be passed when the caller
6331 is scanning the expression in order to build another representation
6332 and specifically knows how to handle these nodes; as such, this is
6333 the normal operating mode in the RTL expanders. */
6334
6335 tree
6336 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6337 HOST_WIDE_INT *pbitpos, tree *poffset,
6338 enum machine_mode *pmode, int *punsignedp,
6339 int *pvolatilep, bool keep_aligning)
6340 {
6341 tree size_tree = 0;
6342 enum machine_mode mode = VOIDmode;
6343 bool blkmode_bitfield = false;
6344 tree offset = size_zero_node;
6345 double_int bit_offset = double_int_zero;
6346
6347 /* First get the mode, signedness, and size. We do this from just the
6348 outermost expression. */
6349 *pbitsize = -1;
6350 if (TREE_CODE (exp) == COMPONENT_REF)
6351 {
6352 tree field = TREE_OPERAND (exp, 1);
6353 size_tree = DECL_SIZE (field);
6354 if (!DECL_BIT_FIELD (field))
6355 mode = DECL_MODE (field);
6356 else if (DECL_MODE (field) == BLKmode)
6357 blkmode_bitfield = true;
6358 else if (TREE_THIS_VOLATILE (exp)
6359 && flag_strict_volatile_bitfields > 0)
6360 /* Volatile bitfields should be accessed in the mode of the
6361 field's type, not the mode computed based on the bit
6362 size. */
6363 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6364
6365 *punsignedp = DECL_UNSIGNED (field);
6366 }
6367 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6368 {
6369 size_tree = TREE_OPERAND (exp, 1);
6370 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6371 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6372
6373 /* For vector types, with the correct size of access, use the mode of
6374 inner type. */
6375 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6376 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6377 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6378 mode = TYPE_MODE (TREE_TYPE (exp));
6379 }
6380 else
6381 {
6382 mode = TYPE_MODE (TREE_TYPE (exp));
6383 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6384
6385 if (mode == BLKmode)
6386 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6387 else
6388 *pbitsize = GET_MODE_BITSIZE (mode);
6389 }
6390
6391 if (size_tree != 0)
6392 {
6393 if (! host_integerp (size_tree, 1))
6394 mode = BLKmode, *pbitsize = -1;
6395 else
6396 *pbitsize = tree_low_cst (size_tree, 1);
6397 }
6398
6399 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6400 and find the ultimate containing object. */
6401 while (1)
6402 {
6403 switch (TREE_CODE (exp))
6404 {
6405 case BIT_FIELD_REF:
6406 bit_offset
6407 = double_int_add (bit_offset,
6408 tree_to_double_int (TREE_OPERAND (exp, 2)));
6409 break;
6410
6411 case COMPONENT_REF:
6412 {
6413 tree field = TREE_OPERAND (exp, 1);
6414 tree this_offset = component_ref_field_offset (exp);
6415
6416 /* If this field hasn't been filled in yet, don't go past it.
6417 This should only happen when folding expressions made during
6418 type construction. */
6419 if (this_offset == 0)
6420 break;
6421
6422 offset = size_binop (PLUS_EXPR, offset, this_offset);
6423 bit_offset = double_int_add (bit_offset,
6424 tree_to_double_int
6425 (DECL_FIELD_BIT_OFFSET (field)));
6426
6427 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6428 }
6429 break;
6430
6431 case ARRAY_REF:
6432 case ARRAY_RANGE_REF:
6433 {
6434 tree index = TREE_OPERAND (exp, 1);
6435 tree low_bound = array_ref_low_bound (exp);
6436 tree unit_size = array_ref_element_size (exp);
6437
6438 /* We assume all arrays have sizes that are a multiple of a byte.
6439 First subtract the lower bound, if any, in the type of the
6440 index, then convert to sizetype and multiply by the size of
6441 the array element. */
6442 if (! integer_zerop (low_bound))
6443 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6444 index, low_bound);
6445
6446 offset = size_binop (PLUS_EXPR, offset,
6447 size_binop (MULT_EXPR,
6448 fold_convert (sizetype, index),
6449 unit_size));
6450 }
6451 break;
6452
6453 case REALPART_EXPR:
6454 break;
6455
6456 case IMAGPART_EXPR:
6457 bit_offset = double_int_add (bit_offset,
6458 uhwi_to_double_int (*pbitsize));
6459 break;
6460
6461 case VIEW_CONVERT_EXPR:
6462 if (keep_aligning && STRICT_ALIGNMENT
6463 && (TYPE_ALIGN (TREE_TYPE (exp))
6464 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6465 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6466 < BIGGEST_ALIGNMENT)
6467 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6468 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6469 goto done;
6470 break;
6471
6472 case MEM_REF:
6473 /* Hand back the decl for MEM[&decl, off]. */
6474 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6475 {
6476 tree off = TREE_OPERAND (exp, 1);
6477 if (!integer_zerop (off))
6478 {
6479 double_int boff, coff = mem_ref_offset (exp);
6480 boff = double_int_lshift (coff,
6481 BITS_PER_UNIT == 8
6482 ? 3 : exact_log2 (BITS_PER_UNIT),
6483 HOST_BITS_PER_DOUBLE_INT, true);
6484 bit_offset = double_int_add (bit_offset, boff);
6485 }
6486 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6487 }
6488 goto done;
6489
6490 default:
6491 goto done;
6492 }
6493
6494 /* If any reference in the chain is volatile, the effect is volatile. */
6495 if (TREE_THIS_VOLATILE (exp))
6496 *pvolatilep = 1;
6497
6498 exp = TREE_OPERAND (exp, 0);
6499 }
6500 done:
6501
6502 /* If OFFSET is constant, see if we can return the whole thing as a
6503 constant bit position. Make sure to handle overflow during
6504 this conversion. */
6505 if (host_integerp (offset, 0))
6506 {
6507 double_int tem = double_int_lshift (tree_to_double_int (offset),
6508 BITS_PER_UNIT == 8
6509 ? 3 : exact_log2 (BITS_PER_UNIT),
6510 HOST_BITS_PER_DOUBLE_INT, true);
6511 tem = double_int_add (tem, bit_offset);
6512 if (double_int_fits_in_shwi_p (tem))
6513 {
6514 *pbitpos = double_int_to_shwi (tem);
6515 *poffset = offset = NULL_TREE;
6516 }
6517 }
6518
6519 /* Otherwise, split it up. */
6520 if (offset)
6521 {
6522 *pbitpos = double_int_to_shwi (bit_offset);
6523 *poffset = offset;
6524 }
6525
6526 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6527 if (mode == VOIDmode
6528 && blkmode_bitfield
6529 && (*pbitpos % BITS_PER_UNIT) == 0
6530 && (*pbitsize % BITS_PER_UNIT) == 0)
6531 *pmode = BLKmode;
6532 else
6533 *pmode = mode;
6534
6535 return exp;
6536 }
6537
6538 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6539 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6540 EXP is marked as PACKED. */
6541
6542 bool
6543 contains_packed_reference (const_tree exp)
6544 {
6545 bool packed_p = false;
6546
6547 while (1)
6548 {
6549 switch (TREE_CODE (exp))
6550 {
6551 case COMPONENT_REF:
6552 {
6553 tree field = TREE_OPERAND (exp, 1);
6554 packed_p = DECL_PACKED (field)
6555 || TYPE_PACKED (TREE_TYPE (field))
6556 || TYPE_PACKED (TREE_TYPE (exp));
6557 if (packed_p)
6558 goto done;
6559 }
6560 break;
6561
6562 case BIT_FIELD_REF:
6563 case ARRAY_REF:
6564 case ARRAY_RANGE_REF:
6565 case REALPART_EXPR:
6566 case IMAGPART_EXPR:
6567 case VIEW_CONVERT_EXPR:
6568 break;
6569
6570 default:
6571 goto done;
6572 }
6573 exp = TREE_OPERAND (exp, 0);
6574 }
6575 done:
6576 return packed_p;
6577 }
6578
6579 /* Return a tree of sizetype representing the size, in bytes, of the element
6580 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6581
6582 tree
6583 array_ref_element_size (tree exp)
6584 {
6585 tree aligned_size = TREE_OPERAND (exp, 3);
6586 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6587 location_t loc = EXPR_LOCATION (exp);
6588
6589 /* If a size was specified in the ARRAY_REF, it's the size measured
6590 in alignment units of the element type. So multiply by that value. */
6591 if (aligned_size)
6592 {
6593 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6594 sizetype from another type of the same width and signedness. */
6595 if (TREE_TYPE (aligned_size) != sizetype)
6596 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6597 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6598 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6599 }
6600
6601 /* Otherwise, take the size from that of the element type. Substitute
6602 any PLACEHOLDER_EXPR that we have. */
6603 else
6604 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6605 }
6606
6607 /* Return a tree representing the lower bound of the array mentioned in
6608 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6609
6610 tree
6611 array_ref_low_bound (tree exp)
6612 {
6613 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6614
6615 /* If a lower bound is specified in EXP, use it. */
6616 if (TREE_OPERAND (exp, 2))
6617 return TREE_OPERAND (exp, 2);
6618
6619 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6620 substituting for a PLACEHOLDER_EXPR as needed. */
6621 if (domain_type && TYPE_MIN_VALUE (domain_type))
6622 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6623
6624 /* Otherwise, return a zero of the appropriate type. */
6625 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6626 }
6627
6628 /* Return a tree representing the upper bound of the array mentioned in
6629 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6630
6631 tree
6632 array_ref_up_bound (tree exp)
6633 {
6634 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6635
6636 /* If there is a domain type and it has an upper bound, use it, substituting
6637 for a PLACEHOLDER_EXPR as needed. */
6638 if (domain_type && TYPE_MAX_VALUE (domain_type))
6639 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6640
6641 /* Otherwise fail. */
6642 return NULL_TREE;
6643 }
6644
6645 /* Return a tree representing the offset, in bytes, of the field referenced
6646 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6647
6648 tree
6649 component_ref_field_offset (tree exp)
6650 {
6651 tree aligned_offset = TREE_OPERAND (exp, 2);
6652 tree field = TREE_OPERAND (exp, 1);
6653 location_t loc = EXPR_LOCATION (exp);
6654
6655 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6656 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6657 value. */
6658 if (aligned_offset)
6659 {
6660 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6661 sizetype from another type of the same width and signedness. */
6662 if (TREE_TYPE (aligned_offset) != sizetype)
6663 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6664 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6665 size_int (DECL_OFFSET_ALIGN (field)
6666 / BITS_PER_UNIT));
6667 }
6668
6669 /* Otherwise, take the offset from that of the field. Substitute
6670 any PLACEHOLDER_EXPR that we have. */
6671 else
6672 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6673 }
6674
6675 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6676
6677 static unsigned HOST_WIDE_INT
6678 target_align (const_tree target)
6679 {
6680 /* We might have a chain of nested references with intermediate misaligning
6681 bitfields components, so need to recurse to find out. */
6682
6683 unsigned HOST_WIDE_INT this_align, outer_align;
6684
6685 switch (TREE_CODE (target))
6686 {
6687 case BIT_FIELD_REF:
6688 return 1;
6689
6690 case COMPONENT_REF:
6691 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6692 outer_align = target_align (TREE_OPERAND (target, 0));
6693 return MIN (this_align, outer_align);
6694
6695 case ARRAY_REF:
6696 case ARRAY_RANGE_REF:
6697 this_align = TYPE_ALIGN (TREE_TYPE (target));
6698 outer_align = target_align (TREE_OPERAND (target, 0));
6699 return MIN (this_align, outer_align);
6700
6701 CASE_CONVERT:
6702 case NON_LVALUE_EXPR:
6703 case VIEW_CONVERT_EXPR:
6704 this_align = TYPE_ALIGN (TREE_TYPE (target));
6705 outer_align = target_align (TREE_OPERAND (target, 0));
6706 return MAX (this_align, outer_align);
6707
6708 default:
6709 return TYPE_ALIGN (TREE_TYPE (target));
6710 }
6711 }
6712
6713 \f
6714 /* Given an rtx VALUE that may contain additions and multiplications, return
6715 an equivalent value that just refers to a register, memory, or constant.
6716 This is done by generating instructions to perform the arithmetic and
6717 returning a pseudo-register containing the value.
6718
6719 The returned value may be a REG, SUBREG, MEM or constant. */
6720
6721 rtx
6722 force_operand (rtx value, rtx target)
6723 {
6724 rtx op1, op2;
6725 /* Use subtarget as the target for operand 0 of a binary operation. */
6726 rtx subtarget = get_subtarget (target);
6727 enum rtx_code code = GET_CODE (value);
6728
6729 /* Check for subreg applied to an expression produced by loop optimizer. */
6730 if (code == SUBREG
6731 && !REG_P (SUBREG_REG (value))
6732 && !MEM_P (SUBREG_REG (value)))
6733 {
6734 value
6735 = simplify_gen_subreg (GET_MODE (value),
6736 force_reg (GET_MODE (SUBREG_REG (value)),
6737 force_operand (SUBREG_REG (value),
6738 NULL_RTX)),
6739 GET_MODE (SUBREG_REG (value)),
6740 SUBREG_BYTE (value));
6741 code = GET_CODE (value);
6742 }
6743
6744 /* Check for a PIC address load. */
6745 if ((code == PLUS || code == MINUS)
6746 && XEXP (value, 0) == pic_offset_table_rtx
6747 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6748 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6749 || GET_CODE (XEXP (value, 1)) == CONST))
6750 {
6751 if (!subtarget)
6752 subtarget = gen_reg_rtx (GET_MODE (value));
6753 emit_move_insn (subtarget, value);
6754 return subtarget;
6755 }
6756
6757 if (ARITHMETIC_P (value))
6758 {
6759 op2 = XEXP (value, 1);
6760 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6761 subtarget = 0;
6762 if (code == MINUS && CONST_INT_P (op2))
6763 {
6764 code = PLUS;
6765 op2 = negate_rtx (GET_MODE (value), op2);
6766 }
6767
6768 /* Check for an addition with OP2 a constant integer and our first
6769 operand a PLUS of a virtual register and something else. In that
6770 case, we want to emit the sum of the virtual register and the
6771 constant first and then add the other value. This allows virtual
6772 register instantiation to simply modify the constant rather than
6773 creating another one around this addition. */
6774 if (code == PLUS && CONST_INT_P (op2)
6775 && GET_CODE (XEXP (value, 0)) == PLUS
6776 && REG_P (XEXP (XEXP (value, 0), 0))
6777 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6778 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6779 {
6780 rtx temp = expand_simple_binop (GET_MODE (value), code,
6781 XEXP (XEXP (value, 0), 0), op2,
6782 subtarget, 0, OPTAB_LIB_WIDEN);
6783 return expand_simple_binop (GET_MODE (value), code, temp,
6784 force_operand (XEXP (XEXP (value,
6785 0), 1), 0),
6786 target, 0, OPTAB_LIB_WIDEN);
6787 }
6788
6789 op1 = force_operand (XEXP (value, 0), subtarget);
6790 op2 = force_operand (op2, NULL_RTX);
6791 switch (code)
6792 {
6793 case MULT:
6794 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6795 case DIV:
6796 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6797 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6798 target, 1, OPTAB_LIB_WIDEN);
6799 else
6800 return expand_divmod (0,
6801 FLOAT_MODE_P (GET_MODE (value))
6802 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6803 GET_MODE (value), op1, op2, target, 0);
6804 case MOD:
6805 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6806 target, 0);
6807 case UDIV:
6808 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6809 target, 1);
6810 case UMOD:
6811 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6812 target, 1);
6813 case ASHIFTRT:
6814 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6815 target, 0, OPTAB_LIB_WIDEN);
6816 default:
6817 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6818 target, 1, OPTAB_LIB_WIDEN);
6819 }
6820 }
6821 if (UNARY_P (value))
6822 {
6823 if (!target)
6824 target = gen_reg_rtx (GET_MODE (value));
6825 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6826 switch (code)
6827 {
6828 case ZERO_EXTEND:
6829 case SIGN_EXTEND:
6830 case TRUNCATE:
6831 case FLOAT_EXTEND:
6832 case FLOAT_TRUNCATE:
6833 convert_move (target, op1, code == ZERO_EXTEND);
6834 return target;
6835
6836 case FIX:
6837 case UNSIGNED_FIX:
6838 expand_fix (target, op1, code == UNSIGNED_FIX);
6839 return target;
6840
6841 case FLOAT:
6842 case UNSIGNED_FLOAT:
6843 expand_float (target, op1, code == UNSIGNED_FLOAT);
6844 return target;
6845
6846 default:
6847 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
6848 }
6849 }
6850
6851 #ifdef INSN_SCHEDULING
6852 /* On machines that have insn scheduling, we want all memory reference to be
6853 explicit, so we need to deal with such paradoxical SUBREGs. */
6854 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
6855 value
6856 = simplify_gen_subreg (GET_MODE (value),
6857 force_reg (GET_MODE (SUBREG_REG (value)),
6858 force_operand (SUBREG_REG (value),
6859 NULL_RTX)),
6860 GET_MODE (SUBREG_REG (value)),
6861 SUBREG_BYTE (value));
6862 #endif
6863
6864 return value;
6865 }
6866 \f
6867 /* Subroutine of expand_expr: return nonzero iff there is no way that
6868 EXP can reference X, which is being modified. TOP_P is nonzero if this
6869 call is going to be used to determine whether we need a temporary
6870 for EXP, as opposed to a recursive call to this function.
6871
6872 It is always safe for this routine to return zero since it merely
6873 searches for optimization opportunities. */
6874
6875 int
6876 safe_from_p (const_rtx x, tree exp, int top_p)
6877 {
6878 rtx exp_rtl = 0;
6879 int i, nops;
6880
6881 if (x == 0
6882 /* If EXP has varying size, we MUST use a target since we currently
6883 have no way of allocating temporaries of variable size
6884 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
6885 So we assume here that something at a higher level has prevented a
6886 clash. This is somewhat bogus, but the best we can do. Only
6887 do this when X is BLKmode and when we are at the top level. */
6888 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
6889 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
6890 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
6891 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
6892 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
6893 != INTEGER_CST)
6894 && GET_MODE (x) == BLKmode)
6895 /* If X is in the outgoing argument area, it is always safe. */
6896 || (MEM_P (x)
6897 && (XEXP (x, 0) == virtual_outgoing_args_rtx
6898 || (GET_CODE (XEXP (x, 0)) == PLUS
6899 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
6900 return 1;
6901
6902 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
6903 find the underlying pseudo. */
6904 if (GET_CODE (x) == SUBREG)
6905 {
6906 x = SUBREG_REG (x);
6907 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6908 return 0;
6909 }
6910
6911 /* Now look at our tree code and possibly recurse. */
6912 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
6913 {
6914 case tcc_declaration:
6915 exp_rtl = DECL_RTL_IF_SET (exp);
6916 break;
6917
6918 case tcc_constant:
6919 return 1;
6920
6921 case tcc_exceptional:
6922 if (TREE_CODE (exp) == TREE_LIST)
6923 {
6924 while (1)
6925 {
6926 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
6927 return 0;
6928 exp = TREE_CHAIN (exp);
6929 if (!exp)
6930 return 1;
6931 if (TREE_CODE (exp) != TREE_LIST)
6932 return safe_from_p (x, exp, 0);
6933 }
6934 }
6935 else if (TREE_CODE (exp) == CONSTRUCTOR)
6936 {
6937 constructor_elt *ce;
6938 unsigned HOST_WIDE_INT idx;
6939
6940 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
6941 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
6942 || !safe_from_p (x, ce->value, 0))
6943 return 0;
6944 return 1;
6945 }
6946 else if (TREE_CODE (exp) == ERROR_MARK)
6947 return 1; /* An already-visited SAVE_EXPR? */
6948 else
6949 return 0;
6950
6951 case tcc_statement:
6952 /* The only case we look at here is the DECL_INITIAL inside a
6953 DECL_EXPR. */
6954 return (TREE_CODE (exp) != DECL_EXPR
6955 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
6956 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
6957 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
6958
6959 case tcc_binary:
6960 case tcc_comparison:
6961 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
6962 return 0;
6963 /* Fall through. */
6964
6965 case tcc_unary:
6966 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6967
6968 case tcc_expression:
6969 case tcc_reference:
6970 case tcc_vl_exp:
6971 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
6972 the expression. If it is set, we conflict iff we are that rtx or
6973 both are in memory. Otherwise, we check all operands of the
6974 expression recursively. */
6975
6976 switch (TREE_CODE (exp))
6977 {
6978 case ADDR_EXPR:
6979 /* If the operand is static or we are static, we can't conflict.
6980 Likewise if we don't conflict with the operand at all. */
6981 if (staticp (TREE_OPERAND (exp, 0))
6982 || TREE_STATIC (exp)
6983 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
6984 return 1;
6985
6986 /* Otherwise, the only way this can conflict is if we are taking
6987 the address of a DECL a that address if part of X, which is
6988 very rare. */
6989 exp = TREE_OPERAND (exp, 0);
6990 if (DECL_P (exp))
6991 {
6992 if (!DECL_RTL_SET_P (exp)
6993 || !MEM_P (DECL_RTL (exp)))
6994 return 0;
6995 else
6996 exp_rtl = XEXP (DECL_RTL (exp), 0);
6997 }
6998 break;
6999
7000 case MEM_REF:
7001 if (MEM_P (x)
7002 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7003 get_alias_set (exp)))
7004 return 0;
7005 break;
7006
7007 case CALL_EXPR:
7008 /* Assume that the call will clobber all hard registers and
7009 all of memory. */
7010 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7011 || MEM_P (x))
7012 return 0;
7013 break;
7014
7015 case WITH_CLEANUP_EXPR:
7016 case CLEANUP_POINT_EXPR:
7017 /* Lowered by gimplify.c. */
7018 gcc_unreachable ();
7019
7020 case SAVE_EXPR:
7021 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7022
7023 default:
7024 break;
7025 }
7026
7027 /* If we have an rtx, we do not need to scan our operands. */
7028 if (exp_rtl)
7029 break;
7030
7031 nops = TREE_OPERAND_LENGTH (exp);
7032 for (i = 0; i < nops; i++)
7033 if (TREE_OPERAND (exp, i) != 0
7034 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7035 return 0;
7036
7037 break;
7038
7039 case tcc_type:
7040 /* Should never get a type here. */
7041 gcc_unreachable ();
7042 }
7043
7044 /* If we have an rtl, find any enclosed object. Then see if we conflict
7045 with it. */
7046 if (exp_rtl)
7047 {
7048 if (GET_CODE (exp_rtl) == SUBREG)
7049 {
7050 exp_rtl = SUBREG_REG (exp_rtl);
7051 if (REG_P (exp_rtl)
7052 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7053 return 0;
7054 }
7055
7056 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7057 are memory and they conflict. */
7058 return ! (rtx_equal_p (x, exp_rtl)
7059 || (MEM_P (x) && MEM_P (exp_rtl)
7060 && true_dependence (exp_rtl, VOIDmode, x,
7061 rtx_addr_varies_p)));
7062 }
7063
7064 /* If we reach here, it is safe. */
7065 return 1;
7066 }
7067
7068 \f
7069 /* Return the highest power of two that EXP is known to be a multiple of.
7070 This is used in updating alignment of MEMs in array references. */
7071
7072 unsigned HOST_WIDE_INT
7073 highest_pow2_factor (const_tree exp)
7074 {
7075 unsigned HOST_WIDE_INT c0, c1;
7076
7077 switch (TREE_CODE (exp))
7078 {
7079 case INTEGER_CST:
7080 /* We can find the lowest bit that's a one. If the low
7081 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7082 We need to handle this case since we can find it in a COND_EXPR,
7083 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7084 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7085 later ICE. */
7086 if (TREE_OVERFLOW (exp))
7087 return BIGGEST_ALIGNMENT;
7088 else
7089 {
7090 /* Note: tree_low_cst is intentionally not used here,
7091 we don't care about the upper bits. */
7092 c0 = TREE_INT_CST_LOW (exp);
7093 c0 &= -c0;
7094 return c0 ? c0 : BIGGEST_ALIGNMENT;
7095 }
7096 break;
7097
7098 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7099 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7100 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7101 return MIN (c0, c1);
7102
7103 case MULT_EXPR:
7104 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7105 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7106 return c0 * c1;
7107
7108 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7109 case CEIL_DIV_EXPR:
7110 if (integer_pow2p (TREE_OPERAND (exp, 1))
7111 && host_integerp (TREE_OPERAND (exp, 1), 1))
7112 {
7113 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7114 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7115 return MAX (1, c0 / c1);
7116 }
7117 break;
7118
7119 case BIT_AND_EXPR:
7120 /* The highest power of two of a bit-and expression is the maximum of
7121 that of its operands. We typically get here for a complex LHS and
7122 a constant negative power of two on the RHS to force an explicit
7123 alignment, so don't bother looking at the LHS. */
7124 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7125
7126 CASE_CONVERT:
7127 case SAVE_EXPR:
7128 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7129
7130 case COMPOUND_EXPR:
7131 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7132
7133 case COND_EXPR:
7134 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7135 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7136 return MIN (c0, c1);
7137
7138 default:
7139 break;
7140 }
7141
7142 return 1;
7143 }
7144
7145 /* Similar, except that the alignment requirements of TARGET are
7146 taken into account. Assume it is at least as aligned as its
7147 type, unless it is a COMPONENT_REF in which case the layout of
7148 the structure gives the alignment. */
7149
7150 static unsigned HOST_WIDE_INT
7151 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7152 {
7153 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7154 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7155
7156 return MAX (factor, talign);
7157 }
7158 \f
7159 /* Subroutine of expand_expr. Expand the two operands of a binary
7160 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7161 The value may be stored in TARGET if TARGET is nonzero. The
7162 MODIFIER argument is as documented by expand_expr. */
7163
7164 static void
7165 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7166 enum expand_modifier modifier)
7167 {
7168 if (! safe_from_p (target, exp1, 1))
7169 target = 0;
7170 if (operand_equal_p (exp0, exp1, 0))
7171 {
7172 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7173 *op1 = copy_rtx (*op0);
7174 }
7175 else
7176 {
7177 /* If we need to preserve evaluation order, copy exp0 into its own
7178 temporary variable so that it can't be clobbered by exp1. */
7179 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7180 exp0 = save_expr (exp0);
7181 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7182 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7183 }
7184 }
7185
7186 \f
7187 /* Return a MEM that contains constant EXP. DEFER is as for
7188 output_constant_def and MODIFIER is as for expand_expr. */
7189
7190 static rtx
7191 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7192 {
7193 rtx mem;
7194
7195 mem = output_constant_def (exp, defer);
7196 if (modifier != EXPAND_INITIALIZER)
7197 mem = use_anchored_address (mem);
7198 return mem;
7199 }
7200
7201 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7202 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7203
7204 static rtx
7205 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7206 enum expand_modifier modifier, addr_space_t as)
7207 {
7208 rtx result, subtarget;
7209 tree inner, offset;
7210 HOST_WIDE_INT bitsize, bitpos;
7211 int volatilep, unsignedp;
7212 enum machine_mode mode1;
7213
7214 /* If we are taking the address of a constant and are at the top level,
7215 we have to use output_constant_def since we can't call force_const_mem
7216 at top level. */
7217 /* ??? This should be considered a front-end bug. We should not be
7218 generating ADDR_EXPR of something that isn't an LVALUE. The only
7219 exception here is STRING_CST. */
7220 if (CONSTANT_CLASS_P (exp))
7221 return XEXP (expand_expr_constant (exp, 0, modifier), 0);
7222
7223 /* Everything must be something allowed by is_gimple_addressable. */
7224 switch (TREE_CODE (exp))
7225 {
7226 case INDIRECT_REF:
7227 /* This case will happen via recursion for &a->b. */
7228 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7229
7230 case MEM_REF:
7231 {
7232 tree tem = TREE_OPERAND (exp, 0);
7233 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7234 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7235 return expand_expr (tem, target, tmode, modifier);
7236 }
7237
7238 case CONST_DECL:
7239 /* Expand the initializer like constants above. */
7240 return XEXP (expand_expr_constant (DECL_INITIAL (exp), 0, modifier), 0);
7241
7242 case REALPART_EXPR:
7243 /* The real part of the complex number is always first, therefore
7244 the address is the same as the address of the parent object. */
7245 offset = 0;
7246 bitpos = 0;
7247 inner = TREE_OPERAND (exp, 0);
7248 break;
7249
7250 case IMAGPART_EXPR:
7251 /* The imaginary part of the complex number is always second.
7252 The expression is therefore always offset by the size of the
7253 scalar type. */
7254 offset = 0;
7255 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7256 inner = TREE_OPERAND (exp, 0);
7257 break;
7258
7259 default:
7260 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7261 expand_expr, as that can have various side effects; LABEL_DECLs for
7262 example, may not have their DECL_RTL set yet. Expand the rtl of
7263 CONSTRUCTORs too, which should yield a memory reference for the
7264 constructor's contents. Assume language specific tree nodes can
7265 be expanded in some interesting way. */
7266 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7267 if (DECL_P (exp)
7268 || TREE_CODE (exp) == CONSTRUCTOR
7269 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7270 {
7271 result = expand_expr (exp, target, tmode,
7272 modifier == EXPAND_INITIALIZER
7273 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7274
7275 /* If the DECL isn't in memory, then the DECL wasn't properly
7276 marked TREE_ADDRESSABLE, which will be either a front-end
7277 or a tree optimizer bug. */
7278
7279 if (TREE_ADDRESSABLE (exp)
7280 && ! MEM_P (result)
7281 && ! targetm.calls.allocate_stack_slots_for_args())
7282 {
7283 error ("local frame unavailable (naked function?)");
7284 return result;
7285 }
7286 else
7287 gcc_assert (MEM_P (result));
7288 result = XEXP (result, 0);
7289
7290 /* ??? Is this needed anymore? */
7291 if (DECL_P (exp) && !TREE_USED (exp) == 0)
7292 {
7293 assemble_external (exp);
7294 TREE_USED (exp) = 1;
7295 }
7296
7297 if (modifier != EXPAND_INITIALIZER
7298 && modifier != EXPAND_CONST_ADDRESS)
7299 result = force_operand (result, target);
7300 return result;
7301 }
7302
7303 /* Pass FALSE as the last argument to get_inner_reference although
7304 we are expanding to RTL. The rationale is that we know how to
7305 handle "aligning nodes" here: we can just bypass them because
7306 they won't change the final object whose address will be returned
7307 (they actually exist only for that purpose). */
7308 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7309 &mode1, &unsignedp, &volatilep, false);
7310 break;
7311 }
7312
7313 /* We must have made progress. */
7314 gcc_assert (inner != exp);
7315
7316 subtarget = offset || bitpos ? NULL_RTX : target;
7317 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7318 inner alignment, force the inner to be sufficiently aligned. */
7319 if (CONSTANT_CLASS_P (inner)
7320 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7321 {
7322 inner = copy_node (inner);
7323 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7324 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7325 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7326 }
7327 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7328
7329 if (offset)
7330 {
7331 rtx tmp;
7332
7333 if (modifier != EXPAND_NORMAL)
7334 result = force_operand (result, NULL);
7335 tmp = expand_expr (offset, NULL_RTX, tmode,
7336 modifier == EXPAND_INITIALIZER
7337 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7338
7339 result = convert_memory_address_addr_space (tmode, result, as);
7340 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7341
7342 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7343 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7344 else
7345 {
7346 subtarget = bitpos ? NULL_RTX : target;
7347 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7348 1, OPTAB_LIB_WIDEN);
7349 }
7350 }
7351
7352 if (bitpos)
7353 {
7354 /* Someone beforehand should have rejected taking the address
7355 of such an object. */
7356 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7357
7358 result = plus_constant (result, bitpos / BITS_PER_UNIT);
7359 if (modifier < EXPAND_SUM)
7360 result = force_operand (result, target);
7361 }
7362
7363 return result;
7364 }
7365
7366 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7367 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7368
7369 static rtx
7370 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7371 enum expand_modifier modifier)
7372 {
7373 addr_space_t as = ADDR_SPACE_GENERIC;
7374 enum machine_mode address_mode = Pmode;
7375 enum machine_mode pointer_mode = ptr_mode;
7376 enum machine_mode rmode;
7377 rtx result;
7378
7379 /* Target mode of VOIDmode says "whatever's natural". */
7380 if (tmode == VOIDmode)
7381 tmode = TYPE_MODE (TREE_TYPE (exp));
7382
7383 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7384 {
7385 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7386 address_mode = targetm.addr_space.address_mode (as);
7387 pointer_mode = targetm.addr_space.pointer_mode (as);
7388 }
7389
7390 /* We can get called with some Weird Things if the user does silliness
7391 like "(short) &a". In that case, convert_memory_address won't do
7392 the right thing, so ignore the given target mode. */
7393 if (tmode != address_mode && tmode != pointer_mode)
7394 tmode = address_mode;
7395
7396 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7397 tmode, modifier, as);
7398
7399 /* Despite expand_expr claims concerning ignoring TMODE when not
7400 strictly convenient, stuff breaks if we don't honor it. Note
7401 that combined with the above, we only do this for pointer modes. */
7402 rmode = GET_MODE (result);
7403 if (rmode == VOIDmode)
7404 rmode = tmode;
7405 if (rmode != tmode)
7406 result = convert_memory_address_addr_space (tmode, result, as);
7407
7408 return result;
7409 }
7410
7411 /* Generate code for computing CONSTRUCTOR EXP.
7412 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7413 is TRUE, instead of creating a temporary variable in memory
7414 NULL is returned and the caller needs to handle it differently. */
7415
7416 static rtx
7417 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7418 bool avoid_temp_mem)
7419 {
7420 tree type = TREE_TYPE (exp);
7421 enum machine_mode mode = TYPE_MODE (type);
7422
7423 /* Try to avoid creating a temporary at all. This is possible
7424 if all of the initializer is zero.
7425 FIXME: try to handle all [0..255] initializers we can handle
7426 with memset. */
7427 if (TREE_STATIC (exp)
7428 && !TREE_ADDRESSABLE (exp)
7429 && target != 0 && mode == BLKmode
7430 && all_zeros_p (exp))
7431 {
7432 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7433 return target;
7434 }
7435
7436 /* All elts simple constants => refer to a constant in memory. But
7437 if this is a non-BLKmode mode, let it store a field at a time
7438 since that should make a CONST_INT or CONST_DOUBLE when we
7439 fold. Likewise, if we have a target we can use, it is best to
7440 store directly into the target unless the type is large enough
7441 that memcpy will be used. If we are making an initializer and
7442 all operands are constant, put it in memory as well.
7443
7444 FIXME: Avoid trying to fill vector constructors piece-meal.
7445 Output them with output_constant_def below unless we're sure
7446 they're zeros. This should go away when vector initializers
7447 are treated like VECTOR_CST instead of arrays. */
7448 if ((TREE_STATIC (exp)
7449 && ((mode == BLKmode
7450 && ! (target != 0 && safe_from_p (target, exp, 1)))
7451 || TREE_ADDRESSABLE (exp)
7452 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7453 && (! MOVE_BY_PIECES_P
7454 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7455 TYPE_ALIGN (type)))
7456 && ! mostly_zeros_p (exp))))
7457 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7458 && TREE_CONSTANT (exp)))
7459 {
7460 rtx constructor;
7461
7462 if (avoid_temp_mem)
7463 return NULL_RTX;
7464
7465 constructor = expand_expr_constant (exp, 1, modifier);
7466
7467 if (modifier != EXPAND_CONST_ADDRESS
7468 && modifier != EXPAND_INITIALIZER
7469 && modifier != EXPAND_SUM)
7470 constructor = validize_mem (constructor);
7471
7472 return constructor;
7473 }
7474
7475 /* Handle calls that pass values in multiple non-contiguous
7476 locations. The Irix 6 ABI has examples of this. */
7477 if (target == 0 || ! safe_from_p (target, exp, 1)
7478 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7479 {
7480 if (avoid_temp_mem)
7481 return NULL_RTX;
7482
7483 target
7484 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7485 | (TREE_READONLY (exp)
7486 * TYPE_QUAL_CONST))),
7487 0, TREE_ADDRESSABLE (exp), 1);
7488 }
7489
7490 store_constructor (exp, target, 0, int_expr_size (exp));
7491 return target;
7492 }
7493
7494
7495 /* expand_expr: generate code for computing expression EXP.
7496 An rtx for the computed value is returned. The value is never null.
7497 In the case of a void EXP, const0_rtx is returned.
7498
7499 The value may be stored in TARGET if TARGET is nonzero.
7500 TARGET is just a suggestion; callers must assume that
7501 the rtx returned may not be the same as TARGET.
7502
7503 If TARGET is CONST0_RTX, it means that the value will be ignored.
7504
7505 If TMODE is not VOIDmode, it suggests generating the
7506 result in mode TMODE. But this is done only when convenient.
7507 Otherwise, TMODE is ignored and the value generated in its natural mode.
7508 TMODE is just a suggestion; callers must assume that
7509 the rtx returned may not have mode TMODE.
7510
7511 Note that TARGET may have neither TMODE nor MODE. In that case, it
7512 probably will not be used.
7513
7514 If MODIFIER is EXPAND_SUM then when EXP is an addition
7515 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7516 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7517 products as above, or REG or MEM, or constant.
7518 Ordinarily in such cases we would output mul or add instructions
7519 and then return a pseudo reg containing the sum.
7520
7521 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7522 it also marks a label as absolutely required (it can't be dead).
7523 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7524 This is used for outputting expressions used in initializers.
7525
7526 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7527 with a constant address even if that address is not normally legitimate.
7528 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7529
7530 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7531 a call parameter. Such targets require special care as we haven't yet
7532 marked TARGET so that it's safe from being trashed by libcalls. We
7533 don't want to use TARGET for anything but the final result;
7534 Intermediate values must go elsewhere. Additionally, calls to
7535 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7536
7537 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7538 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7539 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7540 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7541 recursively. */
7542
7543 rtx
7544 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7545 enum expand_modifier modifier, rtx *alt_rtl)
7546 {
7547 rtx ret;
7548
7549 /* Handle ERROR_MARK before anybody tries to access its type. */
7550 if (TREE_CODE (exp) == ERROR_MARK
7551 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7552 {
7553 ret = CONST0_RTX (tmode);
7554 return ret ? ret : const0_rtx;
7555 }
7556
7557 /* If this is an expression of some kind and it has an associated line
7558 number, then emit the line number before expanding the expression.
7559
7560 We need to save and restore the file and line information so that
7561 errors discovered during expansion are emitted with the right
7562 information. It would be better of the diagnostic routines
7563 used the file/line information embedded in the tree nodes rather
7564 than globals. */
7565 if (cfun && EXPR_HAS_LOCATION (exp))
7566 {
7567 location_t saved_location = input_location;
7568 location_t saved_curr_loc = get_curr_insn_source_location ();
7569 tree saved_block = get_curr_insn_block ();
7570 input_location = EXPR_LOCATION (exp);
7571 set_curr_insn_source_location (input_location);
7572
7573 /* Record where the insns produced belong. */
7574 set_curr_insn_block (TREE_BLOCK (exp));
7575
7576 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7577
7578 input_location = saved_location;
7579 set_curr_insn_block (saved_block);
7580 set_curr_insn_source_location (saved_curr_loc);
7581 }
7582 else
7583 {
7584 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7585 }
7586
7587 return ret;
7588 }
7589
7590 rtx
7591 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7592 enum expand_modifier modifier)
7593 {
7594 rtx op0, op1, op2, temp;
7595 tree type;
7596 int unsignedp;
7597 enum machine_mode mode;
7598 enum tree_code code = ops->code;
7599 optab this_optab;
7600 rtx subtarget, original_target;
7601 int ignore;
7602 bool reduce_bit_field;
7603 location_t loc = ops->location;
7604 tree treeop0, treeop1, treeop2;
7605 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7606 ? reduce_to_bit_field_precision ((expr), \
7607 target, \
7608 type) \
7609 : (expr))
7610
7611 type = ops->type;
7612 mode = TYPE_MODE (type);
7613 unsignedp = TYPE_UNSIGNED (type);
7614
7615 treeop0 = ops->op0;
7616 treeop1 = ops->op1;
7617 treeop2 = ops->op2;
7618
7619 /* We should be called only on simple (binary or unary) expressions,
7620 exactly those that are valid in gimple expressions that aren't
7621 GIMPLE_SINGLE_RHS (or invalid). */
7622 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7623 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7624 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7625
7626 ignore = (target == const0_rtx
7627 || ((CONVERT_EXPR_CODE_P (code)
7628 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7629 && TREE_CODE (type) == VOID_TYPE));
7630
7631 /* We should be called only if we need the result. */
7632 gcc_assert (!ignore);
7633
7634 /* An operation in what may be a bit-field type needs the
7635 result to be reduced to the precision of the bit-field type,
7636 which is narrower than that of the type's mode. */
7637 reduce_bit_field = (INTEGRAL_TYPE_P (type)
7638 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7639
7640 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7641 target = 0;
7642
7643 /* Use subtarget as the target for operand 0 of a binary operation. */
7644 subtarget = get_subtarget (target);
7645 original_target = target;
7646
7647 switch (code)
7648 {
7649 case NON_LVALUE_EXPR:
7650 case PAREN_EXPR:
7651 CASE_CONVERT:
7652 if (treeop0 == error_mark_node)
7653 return const0_rtx;
7654
7655 if (TREE_CODE (type) == UNION_TYPE)
7656 {
7657 tree valtype = TREE_TYPE (treeop0);
7658
7659 /* If both input and output are BLKmode, this conversion isn't doing
7660 anything except possibly changing memory attribute. */
7661 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7662 {
7663 rtx result = expand_expr (treeop0, target, tmode,
7664 modifier);
7665
7666 result = copy_rtx (result);
7667 set_mem_attributes (result, type, 0);
7668 return result;
7669 }
7670
7671 if (target == 0)
7672 {
7673 if (TYPE_MODE (type) != BLKmode)
7674 target = gen_reg_rtx (TYPE_MODE (type));
7675 else
7676 target = assign_temp (type, 0, 1, 1);
7677 }
7678
7679 if (MEM_P (target))
7680 /* Store data into beginning of memory target. */
7681 store_expr (treeop0,
7682 adjust_address (target, TYPE_MODE (valtype), 0),
7683 modifier == EXPAND_STACK_PARM,
7684 false);
7685
7686 else
7687 {
7688 gcc_assert (REG_P (target));
7689
7690 /* Store this field into a union of the proper type. */
7691 store_field (target,
7692 MIN ((int_size_in_bytes (TREE_TYPE
7693 (treeop0))
7694 * BITS_PER_UNIT),
7695 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7696 0, 0, 0, TYPE_MODE (valtype), treeop0,
7697 type, 0, false);
7698 }
7699
7700 /* Return the entire union. */
7701 return target;
7702 }
7703
7704 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
7705 {
7706 op0 = expand_expr (treeop0, target, VOIDmode,
7707 modifier);
7708
7709 /* If the signedness of the conversion differs and OP0 is
7710 a promoted SUBREG, clear that indication since we now
7711 have to do the proper extension. */
7712 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
7713 && GET_CODE (op0) == SUBREG)
7714 SUBREG_PROMOTED_VAR_P (op0) = 0;
7715
7716 return REDUCE_BIT_FIELD (op0);
7717 }
7718
7719 op0 = expand_expr (treeop0, NULL_RTX, mode,
7720 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
7721 if (GET_MODE (op0) == mode)
7722 ;
7723
7724 /* If OP0 is a constant, just convert it into the proper mode. */
7725 else if (CONSTANT_P (op0))
7726 {
7727 tree inner_type = TREE_TYPE (treeop0);
7728 enum machine_mode inner_mode = GET_MODE (op0);
7729
7730 if (inner_mode == VOIDmode)
7731 inner_mode = TYPE_MODE (inner_type);
7732
7733 if (modifier == EXPAND_INITIALIZER)
7734 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7735 subreg_lowpart_offset (mode,
7736 inner_mode));
7737 else
7738 op0= convert_modes (mode, inner_mode, op0,
7739 TYPE_UNSIGNED (inner_type));
7740 }
7741
7742 else if (modifier == EXPAND_INITIALIZER)
7743 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7744
7745 else if (target == 0)
7746 op0 = convert_to_mode (mode, op0,
7747 TYPE_UNSIGNED (TREE_TYPE
7748 (treeop0)));
7749 else
7750 {
7751 convert_move (target, op0,
7752 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7753 op0 = target;
7754 }
7755
7756 return REDUCE_BIT_FIELD (op0);
7757
7758 case ADDR_SPACE_CONVERT_EXPR:
7759 {
7760 tree treeop0_type = TREE_TYPE (treeop0);
7761 addr_space_t as_to;
7762 addr_space_t as_from;
7763
7764 gcc_assert (POINTER_TYPE_P (type));
7765 gcc_assert (POINTER_TYPE_P (treeop0_type));
7766
7767 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
7768 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
7769
7770 /* Conversions between pointers to the same address space should
7771 have been implemented via CONVERT_EXPR / NOP_EXPR. */
7772 gcc_assert (as_to != as_from);
7773
7774 /* Ask target code to handle conversion between pointers
7775 to overlapping address spaces. */
7776 if (targetm.addr_space.subset_p (as_to, as_from)
7777 || targetm.addr_space.subset_p (as_from, as_to))
7778 {
7779 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
7780 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
7781 gcc_assert (op0);
7782 return op0;
7783 }
7784
7785 /* For disjoint address spaces, converting anything but
7786 a null pointer invokes undefined behaviour. We simply
7787 always return a null pointer here. */
7788 return CONST0_RTX (mode);
7789 }
7790
7791 case POINTER_PLUS_EXPR:
7792 /* Even though the sizetype mode and the pointer's mode can be different
7793 expand is able to handle this correctly and get the correct result out
7794 of the PLUS_EXPR code. */
7795 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
7796 if sizetype precision is smaller than pointer precision. */
7797 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
7798 treeop1 = fold_convert_loc (loc, type,
7799 fold_convert_loc (loc, ssizetype,
7800 treeop1));
7801 case PLUS_EXPR:
7802 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7803 something else, make sure we add the register to the constant and
7804 then to the other thing. This case can occur during strength
7805 reduction and doing it this way will produce better code if the
7806 frame pointer or argument pointer is eliminated.
7807
7808 fold-const.c will ensure that the constant is always in the inner
7809 PLUS_EXPR, so the only case we need to do anything about is if
7810 sp, ap, or fp is our second argument, in which case we must swap
7811 the innermost first argument and our second argument. */
7812
7813 if (TREE_CODE (treeop0) == PLUS_EXPR
7814 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
7815 && TREE_CODE (treeop1) == VAR_DECL
7816 && (DECL_RTL (treeop1) == frame_pointer_rtx
7817 || DECL_RTL (treeop1) == stack_pointer_rtx
7818 || DECL_RTL (treeop1) == arg_pointer_rtx))
7819 {
7820 tree t = treeop1;
7821
7822 treeop1 = TREE_OPERAND (treeop0, 0);
7823 TREE_OPERAND (treeop0, 0) = t;
7824 }
7825
7826 /* If the result is to be ptr_mode and we are adding an integer to
7827 something, we might be forming a constant. So try to use
7828 plus_constant. If it produces a sum and we can't accept it,
7829 use force_operand. This allows P = &ARR[const] to generate
7830 efficient code on machines where a SYMBOL_REF is not a valid
7831 address.
7832
7833 If this is an EXPAND_SUM call, always return the sum. */
7834 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7835 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
7836 {
7837 if (modifier == EXPAND_STACK_PARM)
7838 target = 0;
7839 if (TREE_CODE (treeop0) == INTEGER_CST
7840 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7841 && TREE_CONSTANT (treeop1))
7842 {
7843 rtx constant_part;
7844
7845 op1 = expand_expr (treeop1, subtarget, VOIDmode,
7846 EXPAND_SUM);
7847 /* Use immed_double_const to ensure that the constant is
7848 truncated according to the mode of OP1, then sign extended
7849 to a HOST_WIDE_INT. Using the constant directly can result
7850 in non-canonical RTL in a 64x32 cross compile. */
7851 constant_part
7852 = immed_double_const (TREE_INT_CST_LOW (treeop0),
7853 (HOST_WIDE_INT) 0,
7854 TYPE_MODE (TREE_TYPE (treeop1)));
7855 op1 = plus_constant (op1, INTVAL (constant_part));
7856 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7857 op1 = force_operand (op1, target);
7858 return REDUCE_BIT_FIELD (op1);
7859 }
7860
7861 else if (TREE_CODE (treeop1) == INTEGER_CST
7862 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7863 && TREE_CONSTANT (treeop0))
7864 {
7865 rtx constant_part;
7866
7867 op0 = expand_expr (treeop0, subtarget, VOIDmode,
7868 (modifier == EXPAND_INITIALIZER
7869 ? EXPAND_INITIALIZER : EXPAND_SUM));
7870 if (! CONSTANT_P (op0))
7871 {
7872 op1 = expand_expr (treeop1, NULL_RTX,
7873 VOIDmode, modifier);
7874 /* Return a PLUS if modifier says it's OK. */
7875 if (modifier == EXPAND_SUM
7876 || modifier == EXPAND_INITIALIZER)
7877 return simplify_gen_binary (PLUS, mode, op0, op1);
7878 goto binop2;
7879 }
7880 /* Use immed_double_const to ensure that the constant is
7881 truncated according to the mode of OP1, then sign extended
7882 to a HOST_WIDE_INT. Using the constant directly can result
7883 in non-canonical RTL in a 64x32 cross compile. */
7884 constant_part
7885 = immed_double_const (TREE_INT_CST_LOW (treeop1),
7886 (HOST_WIDE_INT) 0,
7887 TYPE_MODE (TREE_TYPE (treeop0)));
7888 op0 = plus_constant (op0, INTVAL (constant_part));
7889 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7890 op0 = force_operand (op0, target);
7891 return REDUCE_BIT_FIELD (op0);
7892 }
7893 }
7894
7895 /* Use TER to expand pointer addition of a negated value
7896 as pointer subtraction. */
7897 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
7898 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
7899 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
7900 && TREE_CODE (treeop1) == SSA_NAME
7901 && TYPE_MODE (TREE_TYPE (treeop0))
7902 == TYPE_MODE (TREE_TYPE (treeop1)))
7903 {
7904 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
7905 if (def)
7906 {
7907 treeop1 = gimple_assign_rhs1 (def);
7908 code = MINUS_EXPR;
7909 goto do_minus;
7910 }
7911 }
7912
7913 /* No sense saving up arithmetic to be done
7914 if it's all in the wrong mode to form part of an address.
7915 And force_operand won't know whether to sign-extend or
7916 zero-extend. */
7917 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7918 || mode != ptr_mode)
7919 {
7920 expand_operands (treeop0, treeop1,
7921 subtarget, &op0, &op1, EXPAND_NORMAL);
7922 if (op0 == const0_rtx)
7923 return op1;
7924 if (op1 == const0_rtx)
7925 return op0;
7926 goto binop2;
7927 }
7928
7929 expand_operands (treeop0, treeop1,
7930 subtarget, &op0, &op1, modifier);
7931 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7932
7933 case MINUS_EXPR:
7934 do_minus:
7935 /* For initializers, we are allowed to return a MINUS of two
7936 symbolic constants. Here we handle all cases when both operands
7937 are constant. */
7938 /* Handle difference of two symbolic constants,
7939 for the sake of an initializer. */
7940 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7941 && really_constant_p (treeop0)
7942 && really_constant_p (treeop1))
7943 {
7944 expand_operands (treeop0, treeop1,
7945 NULL_RTX, &op0, &op1, modifier);
7946
7947 /* If the last operand is a CONST_INT, use plus_constant of
7948 the negated constant. Else make the MINUS. */
7949 if (CONST_INT_P (op1))
7950 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
7951 else
7952 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
7953 }
7954
7955 /* No sense saving up arithmetic to be done
7956 if it's all in the wrong mode to form part of an address.
7957 And force_operand won't know whether to sign-extend or
7958 zero-extend. */
7959 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7960 || mode != ptr_mode)
7961 goto binop;
7962
7963 expand_operands (treeop0, treeop1,
7964 subtarget, &op0, &op1, modifier);
7965
7966 /* Convert A - const to A + (-const). */
7967 if (CONST_INT_P (op1))
7968 {
7969 op1 = negate_rtx (mode, op1);
7970 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7971 }
7972
7973 goto binop2;
7974
7975 case WIDEN_MULT_PLUS_EXPR:
7976 case WIDEN_MULT_MINUS_EXPR:
7977 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
7978 op2 = expand_normal (treeop2);
7979 target = expand_widen_pattern_expr (ops, op0, op1, op2,
7980 target, unsignedp);
7981 return target;
7982
7983 case WIDEN_MULT_EXPR:
7984 /* If first operand is constant, swap them.
7985 Thus the following special case checks need only
7986 check the second operand. */
7987 if (TREE_CODE (treeop0) == INTEGER_CST)
7988 {
7989 tree t1 = treeop0;
7990 treeop0 = treeop1;
7991 treeop1 = t1;
7992 }
7993
7994 /* First, check if we have a multiplication of one signed and one
7995 unsigned operand. */
7996 if (TREE_CODE (treeop1) != INTEGER_CST
7997 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
7998 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
7999 {
8000 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8001 this_optab = usmul_widen_optab;
8002 if (mode == GET_MODE_2XWIDER_MODE (innermode))
8003 {
8004 if (optab_handler (this_optab, mode) != CODE_FOR_nothing)
8005 {
8006 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8007 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8008 EXPAND_NORMAL);
8009 else
8010 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8011 EXPAND_NORMAL);
8012 goto binop3;
8013 }
8014 }
8015 }
8016 /* Check for a multiplication with matching signedness. */
8017 else if ((TREE_CODE (treeop1) == INTEGER_CST
8018 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8019 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8020 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8021 {
8022 tree op0type = TREE_TYPE (treeop0);
8023 enum machine_mode innermode = TYPE_MODE (op0type);
8024 bool zextend_p = TYPE_UNSIGNED (op0type);
8025 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8026 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8027
8028 if (mode == GET_MODE_2XWIDER_MODE (innermode)
8029 && TREE_CODE (treeop0) != INTEGER_CST)
8030 {
8031 if (optab_handler (this_optab, mode) != CODE_FOR_nothing)
8032 {
8033 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8034 EXPAND_NORMAL);
8035 temp = expand_widening_mult (mode, op0, op1, target,
8036 unsignedp, this_optab);
8037 return REDUCE_BIT_FIELD (temp);
8038 }
8039 if (optab_handler (other_optab, mode) != CODE_FOR_nothing
8040 && innermode == word_mode)
8041 {
8042 rtx htem, hipart;
8043 op0 = expand_normal (treeop0);
8044 if (TREE_CODE (treeop1) == INTEGER_CST)
8045 op1 = convert_modes (innermode, mode,
8046 expand_normal (treeop1), unsignedp);
8047 else
8048 op1 = expand_normal (treeop1);
8049 temp = expand_binop (mode, other_optab, op0, op1, target,
8050 unsignedp, OPTAB_LIB_WIDEN);
8051 hipart = gen_highpart (innermode, temp);
8052 htem = expand_mult_highpart_adjust (innermode, hipart,
8053 op0, op1, hipart,
8054 zextend_p);
8055 if (htem != hipart)
8056 emit_move_insn (hipart, htem);
8057 return REDUCE_BIT_FIELD (temp);
8058 }
8059 }
8060 }
8061 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8062 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8063 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8064 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8065
8066 case FMA_EXPR:
8067 {
8068 optab opt = fma_optab;
8069 gimple def0, def2;
8070
8071 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8072 call. */
8073 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8074 {
8075 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8076 tree call_expr;
8077
8078 gcc_assert (fn != NULL_TREE);
8079 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8080 return expand_builtin (call_expr, target, subtarget, mode, false);
8081 }
8082
8083 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8084 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8085
8086 op0 = op2 = NULL;
8087
8088 if (def0 && def2
8089 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8090 {
8091 opt = fnms_optab;
8092 op0 = expand_normal (gimple_assign_rhs1 (def0));
8093 op2 = expand_normal (gimple_assign_rhs1 (def2));
8094 }
8095 else if (def0
8096 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8097 {
8098 opt = fnma_optab;
8099 op0 = expand_normal (gimple_assign_rhs1 (def0));
8100 }
8101 else if (def2
8102 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8103 {
8104 opt = fms_optab;
8105 op2 = expand_normal (gimple_assign_rhs1 (def2));
8106 }
8107
8108 if (op0 == NULL)
8109 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8110 if (op2 == NULL)
8111 op2 = expand_normal (treeop2);
8112 op1 = expand_normal (treeop1);
8113
8114 return expand_ternary_op (TYPE_MODE (type), opt,
8115 op0, op1, op2, target, 0);
8116 }
8117
8118 case MULT_EXPR:
8119 /* If this is a fixed-point operation, then we cannot use the code
8120 below because "expand_mult" doesn't support sat/no-sat fixed-point
8121 multiplications. */
8122 if (ALL_FIXED_POINT_MODE_P (mode))
8123 goto binop;
8124
8125 /* If first operand is constant, swap them.
8126 Thus the following special case checks need only
8127 check the second operand. */
8128 if (TREE_CODE (treeop0) == INTEGER_CST)
8129 {
8130 tree t1 = treeop0;
8131 treeop0 = treeop1;
8132 treeop1 = t1;
8133 }
8134
8135 /* Attempt to return something suitable for generating an
8136 indexed address, for machines that support that. */
8137
8138 if (modifier == EXPAND_SUM && mode == ptr_mode
8139 && host_integerp (treeop1, 0))
8140 {
8141 tree exp1 = treeop1;
8142
8143 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8144 EXPAND_SUM);
8145
8146 if (!REG_P (op0))
8147 op0 = force_operand (op0, NULL_RTX);
8148 if (!REG_P (op0))
8149 op0 = copy_to_mode_reg (mode, op0);
8150
8151 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8152 gen_int_mode (tree_low_cst (exp1, 0),
8153 TYPE_MODE (TREE_TYPE (exp1)))));
8154 }
8155
8156 if (modifier == EXPAND_STACK_PARM)
8157 target = 0;
8158
8159 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8160 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8161
8162 case TRUNC_DIV_EXPR:
8163 case FLOOR_DIV_EXPR:
8164 case CEIL_DIV_EXPR:
8165 case ROUND_DIV_EXPR:
8166 case EXACT_DIV_EXPR:
8167 /* If this is a fixed-point operation, then we cannot use the code
8168 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8169 divisions. */
8170 if (ALL_FIXED_POINT_MODE_P (mode))
8171 goto binop;
8172
8173 if (modifier == EXPAND_STACK_PARM)
8174 target = 0;
8175 /* Possible optimization: compute the dividend with EXPAND_SUM
8176 then if the divisor is constant can optimize the case
8177 where some terms of the dividend have coeffs divisible by it. */
8178 expand_operands (treeop0, treeop1,
8179 subtarget, &op0, &op1, EXPAND_NORMAL);
8180 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8181
8182 case RDIV_EXPR:
8183 goto binop;
8184
8185 case TRUNC_MOD_EXPR:
8186 case FLOOR_MOD_EXPR:
8187 case CEIL_MOD_EXPR:
8188 case ROUND_MOD_EXPR:
8189 if (modifier == EXPAND_STACK_PARM)
8190 target = 0;
8191 expand_operands (treeop0, treeop1,
8192 subtarget, &op0, &op1, EXPAND_NORMAL);
8193 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8194
8195 case FIXED_CONVERT_EXPR:
8196 op0 = expand_normal (treeop0);
8197 if (target == 0 || modifier == EXPAND_STACK_PARM)
8198 target = gen_reg_rtx (mode);
8199
8200 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8201 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8202 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8203 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8204 else
8205 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8206 return target;
8207
8208 case FIX_TRUNC_EXPR:
8209 op0 = expand_normal (treeop0);
8210 if (target == 0 || modifier == EXPAND_STACK_PARM)
8211 target = gen_reg_rtx (mode);
8212 expand_fix (target, op0, unsignedp);
8213 return target;
8214
8215 case FLOAT_EXPR:
8216 op0 = expand_normal (treeop0);
8217 if (target == 0 || modifier == EXPAND_STACK_PARM)
8218 target = gen_reg_rtx (mode);
8219 /* expand_float can't figure out what to do if FROM has VOIDmode.
8220 So give it the correct mode. With -O, cse will optimize this. */
8221 if (GET_MODE (op0) == VOIDmode)
8222 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8223 op0);
8224 expand_float (target, op0,
8225 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8226 return target;
8227
8228 case NEGATE_EXPR:
8229 op0 = expand_expr (treeop0, subtarget,
8230 VOIDmode, EXPAND_NORMAL);
8231 if (modifier == EXPAND_STACK_PARM)
8232 target = 0;
8233 temp = expand_unop (mode,
8234 optab_for_tree_code (NEGATE_EXPR, type,
8235 optab_default),
8236 op0, target, 0);
8237 gcc_assert (temp);
8238 return REDUCE_BIT_FIELD (temp);
8239
8240 case ABS_EXPR:
8241 op0 = expand_expr (treeop0, subtarget,
8242 VOIDmode, EXPAND_NORMAL);
8243 if (modifier == EXPAND_STACK_PARM)
8244 target = 0;
8245
8246 /* ABS_EXPR is not valid for complex arguments. */
8247 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8248 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8249
8250 /* Unsigned abs is simply the operand. Testing here means we don't
8251 risk generating incorrect code below. */
8252 if (TYPE_UNSIGNED (type))
8253 return op0;
8254
8255 return expand_abs (mode, op0, target, unsignedp,
8256 safe_from_p (target, treeop0, 1));
8257
8258 case MAX_EXPR:
8259 case MIN_EXPR:
8260 target = original_target;
8261 if (target == 0
8262 || modifier == EXPAND_STACK_PARM
8263 || (MEM_P (target) && MEM_VOLATILE_P (target))
8264 || GET_MODE (target) != mode
8265 || (REG_P (target)
8266 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8267 target = gen_reg_rtx (mode);
8268 expand_operands (treeop0, treeop1,
8269 target, &op0, &op1, EXPAND_NORMAL);
8270
8271 /* First try to do it with a special MIN or MAX instruction.
8272 If that does not win, use a conditional jump to select the proper
8273 value. */
8274 this_optab = optab_for_tree_code (code, type, optab_default);
8275 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8276 OPTAB_WIDEN);
8277 if (temp != 0)
8278 return temp;
8279
8280 /* At this point, a MEM target is no longer useful; we will get better
8281 code without it. */
8282
8283 if (! REG_P (target))
8284 target = gen_reg_rtx (mode);
8285
8286 /* If op1 was placed in target, swap op0 and op1. */
8287 if (target != op0 && target == op1)
8288 {
8289 temp = op0;
8290 op0 = op1;
8291 op1 = temp;
8292 }
8293
8294 /* We generate better code and avoid problems with op1 mentioning
8295 target by forcing op1 into a pseudo if it isn't a constant. */
8296 if (! CONSTANT_P (op1))
8297 op1 = force_reg (mode, op1);
8298
8299 {
8300 enum rtx_code comparison_code;
8301 rtx cmpop1 = op1;
8302
8303 if (code == MAX_EXPR)
8304 comparison_code = unsignedp ? GEU : GE;
8305 else
8306 comparison_code = unsignedp ? LEU : LE;
8307
8308 /* Canonicalize to comparisons against 0. */
8309 if (op1 == const1_rtx)
8310 {
8311 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8312 or (a != 0 ? a : 1) for unsigned.
8313 For MIN we are safe converting (a <= 1 ? a : 1)
8314 into (a <= 0 ? a : 1) */
8315 cmpop1 = const0_rtx;
8316 if (code == MAX_EXPR)
8317 comparison_code = unsignedp ? NE : GT;
8318 }
8319 if (op1 == constm1_rtx && !unsignedp)
8320 {
8321 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8322 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8323 cmpop1 = const0_rtx;
8324 if (code == MIN_EXPR)
8325 comparison_code = LT;
8326 }
8327 #ifdef HAVE_conditional_move
8328 /* Use a conditional move if possible. */
8329 if (can_conditionally_move_p (mode))
8330 {
8331 rtx insn;
8332
8333 /* ??? Same problem as in expmed.c: emit_conditional_move
8334 forces a stack adjustment via compare_from_rtx, and we
8335 lose the stack adjustment if the sequence we are about
8336 to create is discarded. */
8337 do_pending_stack_adjust ();
8338
8339 start_sequence ();
8340
8341 /* Try to emit the conditional move. */
8342 insn = emit_conditional_move (target, comparison_code,
8343 op0, cmpop1, mode,
8344 op0, op1, mode,
8345 unsignedp);
8346
8347 /* If we could do the conditional move, emit the sequence,
8348 and return. */
8349 if (insn)
8350 {
8351 rtx seq = get_insns ();
8352 end_sequence ();
8353 emit_insn (seq);
8354 return target;
8355 }
8356
8357 /* Otherwise discard the sequence and fall back to code with
8358 branches. */
8359 end_sequence ();
8360 }
8361 #endif
8362 if (target != op0)
8363 emit_move_insn (target, op0);
8364
8365 temp = gen_label_rtx ();
8366 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8367 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8368 -1);
8369 }
8370 emit_move_insn (target, op1);
8371 emit_label (temp);
8372 return target;
8373
8374 case BIT_NOT_EXPR:
8375 op0 = expand_expr (treeop0, subtarget,
8376 VOIDmode, EXPAND_NORMAL);
8377 if (modifier == EXPAND_STACK_PARM)
8378 target = 0;
8379 /* In case we have to reduce the result to bitfield precision
8380 expand this as XOR with a proper constant instead. */
8381 if (reduce_bit_field)
8382 temp = expand_binop (mode, xor_optab, op0,
8383 immed_double_int_const
8384 (double_int_mask (TYPE_PRECISION (type)), mode),
8385 target, 1, OPTAB_LIB_WIDEN);
8386 else
8387 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8388 gcc_assert (temp);
8389 return temp;
8390
8391 /* ??? Can optimize bitwise operations with one arg constant.
8392 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8393 and (a bitwise1 b) bitwise2 b (etc)
8394 but that is probably not worth while. */
8395
8396 case BIT_AND_EXPR:
8397 case BIT_IOR_EXPR:
8398 case BIT_XOR_EXPR:
8399 goto binop;
8400
8401 case LROTATE_EXPR:
8402 case RROTATE_EXPR:
8403 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8404 || (GET_MODE_PRECISION (TYPE_MODE (type))
8405 == TYPE_PRECISION (type)));
8406 /* fall through */
8407
8408 case LSHIFT_EXPR:
8409 case RSHIFT_EXPR:
8410 /* If this is a fixed-point operation, then we cannot use the code
8411 below because "expand_shift" doesn't support sat/no-sat fixed-point
8412 shifts. */
8413 if (ALL_FIXED_POINT_MODE_P (mode))
8414 goto binop;
8415
8416 if (! safe_from_p (subtarget, treeop1, 1))
8417 subtarget = 0;
8418 if (modifier == EXPAND_STACK_PARM)
8419 target = 0;
8420 op0 = expand_expr (treeop0, subtarget,
8421 VOIDmode, EXPAND_NORMAL);
8422 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8423 unsignedp);
8424 if (code == LSHIFT_EXPR)
8425 temp = REDUCE_BIT_FIELD (temp);
8426 return temp;
8427
8428 /* Could determine the answer when only additive constants differ. Also,
8429 the addition of one can be handled by changing the condition. */
8430 case LT_EXPR:
8431 case LE_EXPR:
8432 case GT_EXPR:
8433 case GE_EXPR:
8434 case EQ_EXPR:
8435 case NE_EXPR:
8436 case UNORDERED_EXPR:
8437 case ORDERED_EXPR:
8438 case UNLT_EXPR:
8439 case UNLE_EXPR:
8440 case UNGT_EXPR:
8441 case UNGE_EXPR:
8442 case UNEQ_EXPR:
8443 case LTGT_EXPR:
8444 temp = do_store_flag (ops,
8445 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8446 tmode != VOIDmode ? tmode : mode);
8447 if (temp)
8448 return temp;
8449
8450 /* Use a compare and a jump for BLKmode comparisons, or for function
8451 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8452
8453 if ((target == 0
8454 || modifier == EXPAND_STACK_PARM
8455 || ! safe_from_p (target, treeop0, 1)
8456 || ! safe_from_p (target, treeop1, 1)
8457 /* Make sure we don't have a hard reg (such as function's return
8458 value) live across basic blocks, if not optimizing. */
8459 || (!optimize && REG_P (target)
8460 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8461 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8462
8463 emit_move_insn (target, const0_rtx);
8464
8465 op1 = gen_label_rtx ();
8466 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8467
8468 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8469 emit_move_insn (target, constm1_rtx);
8470 else
8471 emit_move_insn (target, const1_rtx);
8472
8473 emit_label (op1);
8474 return target;
8475
8476 case COMPLEX_EXPR:
8477 /* Get the rtx code of the operands. */
8478 op0 = expand_normal (treeop0);
8479 op1 = expand_normal (treeop1);
8480
8481 if (!target)
8482 target = gen_reg_rtx (TYPE_MODE (type));
8483
8484 /* Move the real (op0) and imaginary (op1) parts to their location. */
8485 write_complex_part (target, op0, false);
8486 write_complex_part (target, op1, true);
8487
8488 return target;
8489
8490 case WIDEN_SUM_EXPR:
8491 {
8492 tree oprnd0 = treeop0;
8493 tree oprnd1 = treeop1;
8494
8495 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8496 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8497 target, unsignedp);
8498 return target;
8499 }
8500
8501 case REDUC_MAX_EXPR:
8502 case REDUC_MIN_EXPR:
8503 case REDUC_PLUS_EXPR:
8504 {
8505 op0 = expand_normal (treeop0);
8506 this_optab = optab_for_tree_code (code, type, optab_default);
8507 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8508 gcc_assert (temp);
8509 return temp;
8510 }
8511
8512 case VEC_EXTRACT_EVEN_EXPR:
8513 case VEC_EXTRACT_ODD_EXPR:
8514 {
8515 expand_operands (treeop0, treeop1,
8516 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8517 this_optab = optab_for_tree_code (code, type, optab_default);
8518 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8519 OPTAB_WIDEN);
8520 gcc_assert (temp);
8521 return temp;
8522 }
8523
8524 case VEC_INTERLEAVE_HIGH_EXPR:
8525 case VEC_INTERLEAVE_LOW_EXPR:
8526 {
8527 expand_operands (treeop0, treeop1,
8528 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8529 this_optab = optab_for_tree_code (code, type, optab_default);
8530 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8531 OPTAB_WIDEN);
8532 gcc_assert (temp);
8533 return temp;
8534 }
8535
8536 case VEC_LSHIFT_EXPR:
8537 case VEC_RSHIFT_EXPR:
8538 {
8539 target = expand_vec_shift_expr (ops, target);
8540 return target;
8541 }
8542
8543 case VEC_UNPACK_HI_EXPR:
8544 case VEC_UNPACK_LO_EXPR:
8545 {
8546 op0 = expand_normal (treeop0);
8547 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8548 target, unsignedp);
8549 gcc_assert (temp);
8550 return temp;
8551 }
8552
8553 case VEC_UNPACK_FLOAT_HI_EXPR:
8554 case VEC_UNPACK_FLOAT_LO_EXPR:
8555 {
8556 op0 = expand_normal (treeop0);
8557 /* The signedness is determined from input operand. */
8558 temp = expand_widen_pattern_expr
8559 (ops, op0, NULL_RTX, NULL_RTX,
8560 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8561
8562 gcc_assert (temp);
8563 return temp;
8564 }
8565
8566 case VEC_WIDEN_MULT_HI_EXPR:
8567 case VEC_WIDEN_MULT_LO_EXPR:
8568 {
8569 tree oprnd0 = treeop0;
8570 tree oprnd1 = treeop1;
8571
8572 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8573 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8574 target, unsignedp);
8575 gcc_assert (target);
8576 return target;
8577 }
8578
8579 case VEC_PACK_TRUNC_EXPR:
8580 case VEC_PACK_SAT_EXPR:
8581 case VEC_PACK_FIX_TRUNC_EXPR:
8582 mode = TYPE_MODE (TREE_TYPE (treeop0));
8583 goto binop;
8584
8585 case DOT_PROD_EXPR:
8586 {
8587 tree oprnd0 = treeop0;
8588 tree oprnd1 = treeop1;
8589 tree oprnd2 = treeop2;
8590 rtx op2;
8591
8592 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8593 op2 = expand_normal (oprnd2);
8594 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8595 target, unsignedp);
8596 return target;
8597 }
8598
8599 case REALIGN_LOAD_EXPR:
8600 {
8601 tree oprnd0 = treeop0;
8602 tree oprnd1 = treeop1;
8603 tree oprnd2 = treeop2;
8604 rtx op2;
8605
8606 this_optab = optab_for_tree_code (code, type, optab_default);
8607 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8608 op2 = expand_normal (oprnd2);
8609 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8610 target, unsignedp);
8611 gcc_assert (temp);
8612 return temp;
8613 }
8614
8615 default:
8616 gcc_unreachable ();
8617 }
8618
8619 /* Here to do an ordinary binary operator. */
8620 binop:
8621 expand_operands (treeop0, treeop1,
8622 subtarget, &op0, &op1, EXPAND_NORMAL);
8623 binop2:
8624 this_optab = optab_for_tree_code (code, type, optab_default);
8625 binop3:
8626 if (modifier == EXPAND_STACK_PARM)
8627 target = 0;
8628 temp = expand_binop (mode, this_optab, op0, op1, target,
8629 unsignedp, OPTAB_LIB_WIDEN);
8630 gcc_assert (temp);
8631 /* Bitwise operations do not need bitfield reduction as we expect their
8632 operands being properly truncated. */
8633 if (code == BIT_XOR_EXPR
8634 || code == BIT_AND_EXPR
8635 || code == BIT_IOR_EXPR)
8636 return temp;
8637 return REDUCE_BIT_FIELD (temp);
8638 }
8639 #undef REDUCE_BIT_FIELD
8640
8641 rtx
8642 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
8643 enum expand_modifier modifier, rtx *alt_rtl)
8644 {
8645 rtx op0, op1, temp, decl_rtl;
8646 tree type;
8647 int unsignedp;
8648 enum machine_mode mode;
8649 enum tree_code code = TREE_CODE (exp);
8650 rtx subtarget, original_target;
8651 int ignore;
8652 tree context;
8653 bool reduce_bit_field;
8654 location_t loc = EXPR_LOCATION (exp);
8655 struct separate_ops ops;
8656 tree treeop0, treeop1, treeop2;
8657 tree ssa_name = NULL_TREE;
8658 gimple g;
8659
8660 type = TREE_TYPE (exp);
8661 mode = TYPE_MODE (type);
8662 unsignedp = TYPE_UNSIGNED (type);
8663
8664 treeop0 = treeop1 = treeop2 = NULL_TREE;
8665 if (!VL_EXP_CLASS_P (exp))
8666 switch (TREE_CODE_LENGTH (code))
8667 {
8668 default:
8669 case 3: treeop2 = TREE_OPERAND (exp, 2);
8670 case 2: treeop1 = TREE_OPERAND (exp, 1);
8671 case 1: treeop0 = TREE_OPERAND (exp, 0);
8672 case 0: break;
8673 }
8674 ops.code = code;
8675 ops.type = type;
8676 ops.op0 = treeop0;
8677 ops.op1 = treeop1;
8678 ops.op2 = treeop2;
8679 ops.location = loc;
8680
8681 ignore = (target == const0_rtx
8682 || ((CONVERT_EXPR_CODE_P (code)
8683 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8684 && TREE_CODE (type) == VOID_TYPE));
8685
8686 /* An operation in what may be a bit-field type needs the
8687 result to be reduced to the precision of the bit-field type,
8688 which is narrower than that of the type's mode. */
8689 reduce_bit_field = (!ignore
8690 && INTEGRAL_TYPE_P (type)
8691 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8692
8693 /* If we are going to ignore this result, we need only do something
8694 if there is a side-effect somewhere in the expression. If there
8695 is, short-circuit the most common cases here. Note that we must
8696 not call expand_expr with anything but const0_rtx in case this
8697 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
8698
8699 if (ignore)
8700 {
8701 if (! TREE_SIDE_EFFECTS (exp))
8702 return const0_rtx;
8703
8704 /* Ensure we reference a volatile object even if value is ignored, but
8705 don't do this if all we are doing is taking its address. */
8706 if (TREE_THIS_VOLATILE (exp)
8707 && TREE_CODE (exp) != FUNCTION_DECL
8708 && mode != VOIDmode && mode != BLKmode
8709 && modifier != EXPAND_CONST_ADDRESS)
8710 {
8711 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
8712 if (MEM_P (temp))
8713 copy_to_reg (temp);
8714 return const0_rtx;
8715 }
8716
8717 if (TREE_CODE_CLASS (code) == tcc_unary
8718 || code == COMPONENT_REF || code == INDIRECT_REF)
8719 return expand_expr (treeop0, const0_rtx, VOIDmode,
8720 modifier);
8721
8722 else if (TREE_CODE_CLASS (code) == tcc_binary
8723 || TREE_CODE_CLASS (code) == tcc_comparison
8724 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
8725 {
8726 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8727 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8728 return const0_rtx;
8729 }
8730 else if (code == BIT_FIELD_REF)
8731 {
8732 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8733 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8734 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
8735 return const0_rtx;
8736 }
8737
8738 target = 0;
8739 }
8740
8741 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8742 target = 0;
8743
8744 /* Use subtarget as the target for operand 0 of a binary operation. */
8745 subtarget = get_subtarget (target);
8746 original_target = target;
8747
8748 switch (code)
8749 {
8750 case LABEL_DECL:
8751 {
8752 tree function = decl_function_context (exp);
8753
8754 temp = label_rtx (exp);
8755 temp = gen_rtx_LABEL_REF (Pmode, temp);
8756
8757 if (function != current_function_decl
8758 && function != 0)
8759 LABEL_REF_NONLOCAL_P (temp) = 1;
8760
8761 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
8762 return temp;
8763 }
8764
8765 case SSA_NAME:
8766 /* ??? ivopts calls expander, without any preparation from
8767 out-of-ssa. So fake instructions as if this was an access to the
8768 base variable. This unnecessarily allocates a pseudo, see how we can
8769 reuse it, if partition base vars have it set already. */
8770 if (!currently_expanding_to_rtl)
8771 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
8772 NULL);
8773
8774 g = get_gimple_for_ssa_name (exp);
8775 /* For EXPAND_INITIALIZER try harder to get something simpler. */
8776 if (g == NULL
8777 && modifier == EXPAND_INITIALIZER
8778 && !SSA_NAME_IS_DEFAULT_DEF (exp)
8779 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
8780 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
8781 g = SSA_NAME_DEF_STMT (exp);
8782 if (g)
8783 return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
8784 modifier, NULL);
8785
8786 ssa_name = exp;
8787 decl_rtl = get_rtx_for_ssa_name (ssa_name);
8788 exp = SSA_NAME_VAR (ssa_name);
8789 goto expand_decl_rtl;
8790
8791 case PARM_DECL:
8792 case VAR_DECL:
8793 /* If a static var's type was incomplete when the decl was written,
8794 but the type is complete now, lay out the decl now. */
8795 if (DECL_SIZE (exp) == 0
8796 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
8797 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
8798 layout_decl (exp, 0);
8799
8800 /* ... fall through ... */
8801
8802 case FUNCTION_DECL:
8803 case RESULT_DECL:
8804 decl_rtl = DECL_RTL (exp);
8805 expand_decl_rtl:
8806 gcc_assert (decl_rtl);
8807 decl_rtl = copy_rtx (decl_rtl);
8808 /* Record writes to register variables. */
8809 if (modifier == EXPAND_WRITE
8810 && REG_P (decl_rtl)
8811 && HARD_REGISTER_P (decl_rtl))
8812 add_to_hard_reg_set (&crtl->asm_clobbers,
8813 GET_MODE (decl_rtl), REGNO (decl_rtl));
8814
8815 /* Ensure variable marked as used even if it doesn't go through
8816 a parser. If it hasn't be used yet, write out an external
8817 definition. */
8818 if (! TREE_USED (exp))
8819 {
8820 assemble_external (exp);
8821 TREE_USED (exp) = 1;
8822 }
8823
8824 /* Show we haven't gotten RTL for this yet. */
8825 temp = 0;
8826
8827 /* Variables inherited from containing functions should have
8828 been lowered by this point. */
8829 context = decl_function_context (exp);
8830 gcc_assert (!context
8831 || context == current_function_decl
8832 || TREE_STATIC (exp)
8833 || DECL_EXTERNAL (exp)
8834 /* ??? C++ creates functions that are not TREE_STATIC. */
8835 || TREE_CODE (exp) == FUNCTION_DECL);
8836
8837 /* This is the case of an array whose size is to be determined
8838 from its initializer, while the initializer is still being parsed.
8839 See expand_decl. */
8840
8841 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
8842 temp = validize_mem (decl_rtl);
8843
8844 /* If DECL_RTL is memory, we are in the normal case and the
8845 address is not valid, get the address into a register. */
8846
8847 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
8848 {
8849 if (alt_rtl)
8850 *alt_rtl = decl_rtl;
8851 decl_rtl = use_anchored_address (decl_rtl);
8852 if (modifier != EXPAND_CONST_ADDRESS
8853 && modifier != EXPAND_SUM
8854 && !memory_address_addr_space_p (DECL_MODE (exp),
8855 XEXP (decl_rtl, 0),
8856 MEM_ADDR_SPACE (decl_rtl)))
8857 temp = replace_equiv_address (decl_rtl,
8858 copy_rtx (XEXP (decl_rtl, 0)));
8859 }
8860
8861 /* If we got something, return it. But first, set the alignment
8862 if the address is a register. */
8863 if (temp != 0)
8864 {
8865 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
8866 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
8867
8868 return temp;
8869 }
8870
8871 /* If the mode of DECL_RTL does not match that of the decl, it
8872 must be a promoted value. We return a SUBREG of the wanted mode,
8873 but mark it so that we know that it was already extended. */
8874 if (REG_P (decl_rtl) && GET_MODE (decl_rtl) != DECL_MODE (exp))
8875 {
8876 enum machine_mode pmode;
8877
8878 /* Get the signedness to be used for this variable. Ensure we get
8879 the same mode we got when the variable was declared. */
8880 if (code == SSA_NAME
8881 && (g = SSA_NAME_DEF_STMT (ssa_name))
8882 && gimple_code (g) == GIMPLE_CALL)
8883 {
8884 gcc_assert (!gimple_call_internal_p (g));
8885 pmode = promote_function_mode (type, mode, &unsignedp,
8886 gimple_call_fntype (g),
8887 2);
8888 }
8889 else
8890 pmode = promote_decl_mode (exp, &unsignedp);
8891 gcc_assert (GET_MODE (decl_rtl) == pmode);
8892
8893 temp = gen_lowpart_SUBREG (mode, decl_rtl);
8894 SUBREG_PROMOTED_VAR_P (temp) = 1;
8895 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
8896 return temp;
8897 }
8898
8899 return decl_rtl;
8900
8901 case INTEGER_CST:
8902 temp = immed_double_const (TREE_INT_CST_LOW (exp),
8903 TREE_INT_CST_HIGH (exp), mode);
8904
8905 return temp;
8906
8907 case VECTOR_CST:
8908 {
8909 tree tmp = NULL_TREE;
8910 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
8911 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
8912 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
8913 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
8914 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
8915 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
8916 return const_vector_from_tree (exp);
8917 if (GET_MODE_CLASS (mode) == MODE_INT)
8918 {
8919 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
8920 if (type_for_mode)
8921 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
8922 }
8923 if (!tmp)
8924 tmp = build_constructor_from_list (type,
8925 TREE_VECTOR_CST_ELTS (exp));
8926 return expand_expr (tmp, ignore ? const0_rtx : target,
8927 tmode, modifier);
8928 }
8929
8930 case CONST_DECL:
8931 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
8932
8933 case REAL_CST:
8934 /* If optimized, generate immediate CONST_DOUBLE
8935 which will be turned into memory by reload if necessary.
8936
8937 We used to force a register so that loop.c could see it. But
8938 this does not allow gen_* patterns to perform optimizations with
8939 the constants. It also produces two insns in cases like "x = 1.0;".
8940 On most machines, floating-point constants are not permitted in
8941 many insns, so we'd end up copying it to a register in any case.
8942
8943 Now, we do the copying in expand_binop, if appropriate. */
8944 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
8945 TYPE_MODE (TREE_TYPE (exp)));
8946
8947 case FIXED_CST:
8948 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
8949 TYPE_MODE (TREE_TYPE (exp)));
8950
8951 case COMPLEX_CST:
8952 /* Handle evaluating a complex constant in a CONCAT target. */
8953 if (original_target && GET_CODE (original_target) == CONCAT)
8954 {
8955 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
8956 rtx rtarg, itarg;
8957
8958 rtarg = XEXP (original_target, 0);
8959 itarg = XEXP (original_target, 1);
8960
8961 /* Move the real and imaginary parts separately. */
8962 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
8963 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
8964
8965 if (op0 != rtarg)
8966 emit_move_insn (rtarg, op0);
8967 if (op1 != itarg)
8968 emit_move_insn (itarg, op1);
8969
8970 return original_target;
8971 }
8972
8973 /* ... fall through ... */
8974
8975 case STRING_CST:
8976 temp = expand_expr_constant (exp, 1, modifier);
8977
8978 /* temp contains a constant address.
8979 On RISC machines where a constant address isn't valid,
8980 make some insns to get that address into a register. */
8981 if (modifier != EXPAND_CONST_ADDRESS
8982 && modifier != EXPAND_INITIALIZER
8983 && modifier != EXPAND_SUM
8984 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
8985 MEM_ADDR_SPACE (temp)))
8986 return replace_equiv_address (temp,
8987 copy_rtx (XEXP (temp, 0)));
8988 return temp;
8989
8990 case SAVE_EXPR:
8991 {
8992 tree val = treeop0;
8993 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
8994
8995 if (!SAVE_EXPR_RESOLVED_P (exp))
8996 {
8997 /* We can indeed still hit this case, typically via builtin
8998 expanders calling save_expr immediately before expanding
8999 something. Assume this means that we only have to deal
9000 with non-BLKmode values. */
9001 gcc_assert (GET_MODE (ret) != BLKmode);
9002
9003 val = build_decl (EXPR_LOCATION (exp),
9004 VAR_DECL, NULL, TREE_TYPE (exp));
9005 DECL_ARTIFICIAL (val) = 1;
9006 DECL_IGNORED_P (val) = 1;
9007 treeop0 = val;
9008 TREE_OPERAND (exp, 0) = treeop0;
9009 SAVE_EXPR_RESOLVED_P (exp) = 1;
9010
9011 if (!CONSTANT_P (ret))
9012 ret = copy_to_reg (ret);
9013 SET_DECL_RTL (val, ret);
9014 }
9015
9016 return ret;
9017 }
9018
9019
9020 case CONSTRUCTOR:
9021 /* If we don't need the result, just ensure we evaluate any
9022 subexpressions. */
9023 if (ignore)
9024 {
9025 unsigned HOST_WIDE_INT idx;
9026 tree value;
9027
9028 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9029 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9030
9031 return const0_rtx;
9032 }
9033
9034 return expand_constructor (exp, target, modifier, false);
9035
9036 case TARGET_MEM_REF:
9037 {
9038 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
9039 struct mem_address addr;
9040 enum insn_code icode;
9041 int align;
9042
9043 get_address_description (exp, &addr);
9044 op0 = addr_for_mem_ref (&addr, as, true);
9045 op0 = memory_address_addr_space (mode, op0, as);
9046 temp = gen_rtx_MEM (mode, op0);
9047 set_mem_attributes (temp, exp, 0);
9048 set_mem_addr_space (temp, as);
9049 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)), get_object_alignment (exp));
9050 if (mode != BLKmode
9051 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
9052 /* If the target does not have special handling for unaligned
9053 loads of mode then it can use regular moves for them. */
9054 && ((icode = optab_handler (movmisalign_optab, mode))
9055 != CODE_FOR_nothing))
9056 {
9057 struct expand_operand ops[2];
9058
9059 /* We've already validated the memory, and we're creating a
9060 new pseudo destination. The predicates really can't fail,
9061 nor can the generator. */
9062 create_output_operand (&ops[0], NULL_RTX, mode);
9063 create_fixed_operand (&ops[1], temp);
9064 expand_insn (icode, 2, ops);
9065 return ops[0].value;
9066 }
9067 return temp;
9068 }
9069
9070 case MEM_REF:
9071 {
9072 addr_space_t as
9073 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1))));
9074 enum machine_mode address_mode;
9075 tree base = TREE_OPERAND (exp, 0);
9076 gimple def_stmt;
9077 enum insn_code icode;
9078 int align;
9079 /* Handle expansion of non-aliased memory with non-BLKmode. That
9080 might end up in a register. */
9081 if (TREE_CODE (base) == ADDR_EXPR)
9082 {
9083 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9084 tree bit_offset;
9085 base = TREE_OPERAND (base, 0);
9086 if (!DECL_P (base))
9087 {
9088 HOST_WIDE_INT off;
9089 base = get_addr_base_and_unit_offset (base, &off);
9090 gcc_assert (base);
9091 offset += off;
9092 }
9093 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
9094 decl we must use bitfield operations. */
9095 if (DECL_P (base)
9096 && !TREE_ADDRESSABLE (base)
9097 && DECL_MODE (base) != BLKmode
9098 && DECL_RTL_SET_P (base)
9099 && !MEM_P (DECL_RTL (base)))
9100 {
9101 tree bftype;
9102 if (offset == 0
9103 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9104 && (GET_MODE_BITSIZE (DECL_MODE (base))
9105 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9106 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9107 TREE_TYPE (exp), base),
9108 target, tmode, modifier);
9109 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9110 bftype = TREE_TYPE (base);
9111 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9112 bftype = TREE_TYPE (exp);
9113 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9114 base,
9115 TYPE_SIZE (TREE_TYPE (exp)),
9116 bit_offset),
9117 target, tmode, modifier);
9118 }
9119 }
9120 address_mode = targetm.addr_space.address_mode (as);
9121 base = TREE_OPERAND (exp, 0);
9122 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9123 {
9124 tree mask = gimple_assign_rhs2 (def_stmt);
9125 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9126 gimple_assign_rhs1 (def_stmt), mask);
9127 TREE_OPERAND (exp, 0) = base;
9128 }
9129 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)), get_object_alignment (exp));
9130 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9131 op0 = memory_address_addr_space (address_mode, op0, as);
9132 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9133 {
9134 rtx off
9135 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9136 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9137 }
9138 op0 = memory_address_addr_space (mode, op0, as);
9139 temp = gen_rtx_MEM (mode, op0);
9140 set_mem_attributes (temp, exp, 0);
9141 set_mem_addr_space (temp, as);
9142 if (TREE_THIS_VOLATILE (exp))
9143 MEM_VOLATILE_P (temp) = 1;
9144 if (mode != BLKmode
9145 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
9146 /* If the target does not have special handling for unaligned
9147 loads of mode then it can use regular moves for them. */
9148 && ((icode = optab_handler (movmisalign_optab, mode))
9149 != CODE_FOR_nothing))
9150 {
9151 struct expand_operand ops[2];
9152
9153 /* We've already validated the memory, and we're creating a
9154 new pseudo destination. The predicates really can't fail,
9155 nor can the generator. */
9156 create_output_operand (&ops[0], NULL_RTX, mode);
9157 create_fixed_operand (&ops[1], temp);
9158 expand_insn (icode, 2, ops);
9159 return ops[0].value;
9160 }
9161 return temp;
9162 }
9163
9164 case ARRAY_REF:
9165
9166 {
9167 tree array = treeop0;
9168 tree index = treeop1;
9169
9170 /* Fold an expression like: "foo"[2].
9171 This is not done in fold so it won't happen inside &.
9172 Don't fold if this is for wide characters since it's too
9173 difficult to do correctly and this is a very rare case. */
9174
9175 if (modifier != EXPAND_CONST_ADDRESS
9176 && modifier != EXPAND_INITIALIZER
9177 && modifier != EXPAND_MEMORY)
9178 {
9179 tree t = fold_read_from_constant_string (exp);
9180
9181 if (t)
9182 return expand_expr (t, target, tmode, modifier);
9183 }
9184
9185 /* If this is a constant index into a constant array,
9186 just get the value from the array. Handle both the cases when
9187 we have an explicit constructor and when our operand is a variable
9188 that was declared const. */
9189
9190 if (modifier != EXPAND_CONST_ADDRESS
9191 && modifier != EXPAND_INITIALIZER
9192 && modifier != EXPAND_MEMORY
9193 && TREE_CODE (array) == CONSTRUCTOR
9194 && ! TREE_SIDE_EFFECTS (array)
9195 && TREE_CODE (index) == INTEGER_CST)
9196 {
9197 unsigned HOST_WIDE_INT ix;
9198 tree field, value;
9199
9200 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9201 field, value)
9202 if (tree_int_cst_equal (field, index))
9203 {
9204 if (!TREE_SIDE_EFFECTS (value))
9205 return expand_expr (fold (value), target, tmode, modifier);
9206 break;
9207 }
9208 }
9209
9210 else if (optimize >= 1
9211 && modifier != EXPAND_CONST_ADDRESS
9212 && modifier != EXPAND_INITIALIZER
9213 && modifier != EXPAND_MEMORY
9214 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9215 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9216 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9217 && const_value_known_p (array))
9218 {
9219 if (TREE_CODE (index) == INTEGER_CST)
9220 {
9221 tree init = DECL_INITIAL (array);
9222
9223 if (TREE_CODE (init) == CONSTRUCTOR)
9224 {
9225 unsigned HOST_WIDE_INT ix;
9226 tree field, value;
9227
9228 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9229 field, value)
9230 if (tree_int_cst_equal (field, index))
9231 {
9232 if (TREE_SIDE_EFFECTS (value))
9233 break;
9234
9235 if (TREE_CODE (value) == CONSTRUCTOR)
9236 {
9237 /* If VALUE is a CONSTRUCTOR, this
9238 optimization is only useful if
9239 this doesn't store the CONSTRUCTOR
9240 into memory. If it does, it is more
9241 efficient to just load the data from
9242 the array directly. */
9243 rtx ret = expand_constructor (value, target,
9244 modifier, true);
9245 if (ret == NULL_RTX)
9246 break;
9247 }
9248
9249 return expand_expr (fold (value), target, tmode,
9250 modifier);
9251 }
9252 }
9253 else if(TREE_CODE (init) == STRING_CST)
9254 {
9255 tree index1 = index;
9256 tree low_bound = array_ref_low_bound (exp);
9257 index1 = fold_convert_loc (loc, sizetype,
9258 treeop1);
9259
9260 /* Optimize the special-case of a zero lower bound.
9261
9262 We convert the low_bound to sizetype to avoid some problems
9263 with constant folding. (E.g. suppose the lower bound is 1,
9264 and its mode is QI. Without the conversion,l (ARRAY
9265 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9266 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9267
9268 if (! integer_zerop (low_bound))
9269 index1 = size_diffop_loc (loc, index1,
9270 fold_convert_loc (loc, sizetype,
9271 low_bound));
9272
9273 if (0 > compare_tree_int (index1,
9274 TREE_STRING_LENGTH (init)))
9275 {
9276 tree type = TREE_TYPE (TREE_TYPE (init));
9277 enum machine_mode mode = TYPE_MODE (type);
9278
9279 if (GET_MODE_CLASS (mode) == MODE_INT
9280 && GET_MODE_SIZE (mode) == 1)
9281 return gen_int_mode (TREE_STRING_POINTER (init)
9282 [TREE_INT_CST_LOW (index1)],
9283 mode);
9284 }
9285 }
9286 }
9287 }
9288 }
9289 goto normal_inner_ref;
9290
9291 case COMPONENT_REF:
9292 /* If the operand is a CONSTRUCTOR, we can just extract the
9293 appropriate field if it is present. */
9294 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9295 {
9296 unsigned HOST_WIDE_INT idx;
9297 tree field, value;
9298
9299 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9300 idx, field, value)
9301 if (field == treeop1
9302 /* We can normally use the value of the field in the
9303 CONSTRUCTOR. However, if this is a bitfield in
9304 an integral mode that we can fit in a HOST_WIDE_INT,
9305 we must mask only the number of bits in the bitfield,
9306 since this is done implicitly by the constructor. If
9307 the bitfield does not meet either of those conditions,
9308 we can't do this optimization. */
9309 && (! DECL_BIT_FIELD (field)
9310 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9311 && (GET_MODE_PRECISION (DECL_MODE (field))
9312 <= HOST_BITS_PER_WIDE_INT))))
9313 {
9314 if (DECL_BIT_FIELD (field)
9315 && modifier == EXPAND_STACK_PARM)
9316 target = 0;
9317 op0 = expand_expr (value, target, tmode, modifier);
9318 if (DECL_BIT_FIELD (field))
9319 {
9320 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9321 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9322
9323 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9324 {
9325 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9326 op0 = expand_and (imode, op0, op1, target);
9327 }
9328 else
9329 {
9330 int count = GET_MODE_PRECISION (imode) - bitsize;
9331
9332 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9333 target, 0);
9334 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9335 target, 0);
9336 }
9337 }
9338
9339 return op0;
9340 }
9341 }
9342 goto normal_inner_ref;
9343
9344 case BIT_FIELD_REF:
9345 case ARRAY_RANGE_REF:
9346 normal_inner_ref:
9347 {
9348 enum machine_mode mode1, mode2;
9349 HOST_WIDE_INT bitsize, bitpos;
9350 tree offset;
9351 int volatilep = 0, must_force_mem;
9352 bool packedp = false;
9353 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9354 &mode1, &unsignedp, &volatilep, true);
9355 rtx orig_op0, memloc;
9356
9357 /* If we got back the original object, something is wrong. Perhaps
9358 we are evaluating an expression too early. In any event, don't
9359 infinitely recurse. */
9360 gcc_assert (tem != exp);
9361
9362 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9363 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9364 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9365 packedp = true;
9366
9367 /* If TEM's type is a union of variable size, pass TARGET to the inner
9368 computation, since it will need a temporary and TARGET is known
9369 to have to do. This occurs in unchecked conversion in Ada. */
9370 orig_op0 = op0
9371 = expand_expr (tem,
9372 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9373 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9374 != INTEGER_CST)
9375 && modifier != EXPAND_STACK_PARM
9376 ? target : NULL_RTX),
9377 VOIDmode,
9378 (modifier == EXPAND_INITIALIZER
9379 || modifier == EXPAND_CONST_ADDRESS
9380 || modifier == EXPAND_STACK_PARM)
9381 ? modifier : EXPAND_NORMAL);
9382
9383
9384 /* If the bitfield is volatile, we want to access it in the
9385 field's mode, not the computed mode.
9386 If a MEM has VOIDmode (external with incomplete type),
9387 use BLKmode for it instead. */
9388 if (MEM_P (op0))
9389 {
9390 if (volatilep && flag_strict_volatile_bitfields > 0)
9391 op0 = adjust_address (op0, mode1, 0);
9392 else if (GET_MODE (op0) == VOIDmode)
9393 op0 = adjust_address (op0, BLKmode, 0);
9394 }
9395
9396 mode2
9397 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9398
9399 /* If we have either an offset, a BLKmode result, or a reference
9400 outside the underlying object, we must force it to memory.
9401 Such a case can occur in Ada if we have unchecked conversion
9402 of an expression from a scalar type to an aggregate type or
9403 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9404 passed a partially uninitialized object or a view-conversion
9405 to a larger size. */
9406 must_force_mem = (offset
9407 || mode1 == BLKmode
9408 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9409
9410 /* Handle CONCAT first. */
9411 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9412 {
9413 if (bitpos == 0
9414 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9415 return op0;
9416 if (bitpos == 0
9417 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9418 && bitsize)
9419 {
9420 op0 = XEXP (op0, 0);
9421 mode2 = GET_MODE (op0);
9422 }
9423 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9424 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9425 && bitpos
9426 && bitsize)
9427 {
9428 op0 = XEXP (op0, 1);
9429 bitpos = 0;
9430 mode2 = GET_MODE (op0);
9431 }
9432 else
9433 /* Otherwise force into memory. */
9434 must_force_mem = 1;
9435 }
9436
9437 /* If this is a constant, put it in a register if it is a legitimate
9438 constant and we don't need a memory reference. */
9439 if (CONSTANT_P (op0)
9440 && mode2 != BLKmode
9441 && targetm.legitimate_constant_p (mode2, op0)
9442 && !must_force_mem)
9443 op0 = force_reg (mode2, op0);
9444
9445 /* Otherwise, if this is a constant, try to force it to the constant
9446 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9447 is a legitimate constant. */
9448 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9449 op0 = validize_mem (memloc);
9450
9451 /* Otherwise, if this is a constant or the object is not in memory
9452 and need be, put it there. */
9453 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9454 {
9455 tree nt = build_qualified_type (TREE_TYPE (tem),
9456 (TYPE_QUALS (TREE_TYPE (tem))
9457 | TYPE_QUAL_CONST));
9458 memloc = assign_temp (nt, 1, 1, 1);
9459 emit_move_insn (memloc, op0);
9460 op0 = memloc;
9461 }
9462
9463 if (offset)
9464 {
9465 enum machine_mode address_mode;
9466 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9467 EXPAND_SUM);
9468
9469 gcc_assert (MEM_P (op0));
9470
9471 address_mode
9472 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9473 if (GET_MODE (offset_rtx) != address_mode)
9474 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9475
9476 if (GET_MODE (op0) == BLKmode
9477 /* A constant address in OP0 can have VOIDmode, we must
9478 not try to call force_reg in that case. */
9479 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9480 && bitsize != 0
9481 && (bitpos % bitsize) == 0
9482 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9483 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9484 {
9485 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9486 bitpos = 0;
9487 }
9488
9489 op0 = offset_address (op0, offset_rtx,
9490 highest_pow2_factor (offset));
9491 }
9492
9493 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9494 record its alignment as BIGGEST_ALIGNMENT. */
9495 if (MEM_P (op0) && bitpos == 0 && offset != 0
9496 && is_aligning_offset (offset, tem))
9497 set_mem_align (op0, BIGGEST_ALIGNMENT);
9498
9499 /* Don't forget about volatility even if this is a bitfield. */
9500 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9501 {
9502 if (op0 == orig_op0)
9503 op0 = copy_rtx (op0);
9504
9505 MEM_VOLATILE_P (op0) = 1;
9506 }
9507
9508 /* In cases where an aligned union has an unaligned object
9509 as a field, we might be extracting a BLKmode value from
9510 an integer-mode (e.g., SImode) object. Handle this case
9511 by doing the extract into an object as wide as the field
9512 (which we know to be the width of a basic mode), then
9513 storing into memory, and changing the mode to BLKmode. */
9514 if (mode1 == VOIDmode
9515 || REG_P (op0) || GET_CODE (op0) == SUBREG
9516 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9517 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9518 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9519 && modifier != EXPAND_CONST_ADDRESS
9520 && modifier != EXPAND_INITIALIZER)
9521 /* If the field is volatile, we always want an aligned
9522 access. Only do this if the access is not already naturally
9523 aligned, otherwise "normal" (non-bitfield) volatile fields
9524 become non-addressable. */
9525 || (volatilep && flag_strict_volatile_bitfields > 0
9526 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0))
9527 /* If the field isn't aligned enough to fetch as a memref,
9528 fetch it as a bit field. */
9529 || (mode1 != BLKmode
9530 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9531 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9532 || (MEM_P (op0)
9533 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9534 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9535 && ((modifier == EXPAND_CONST_ADDRESS
9536 || modifier == EXPAND_INITIALIZER)
9537 ? STRICT_ALIGNMENT
9538 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9539 || (bitpos % BITS_PER_UNIT != 0)))
9540 /* If the type and the field are a constant size and the
9541 size of the type isn't the same size as the bitfield,
9542 we must use bitfield operations. */
9543 || (bitsize >= 0
9544 && TYPE_SIZE (TREE_TYPE (exp))
9545 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9546 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9547 bitsize)))
9548 {
9549 enum machine_mode ext_mode = mode;
9550
9551 if (ext_mode == BLKmode
9552 && ! (target != 0 && MEM_P (op0)
9553 && MEM_P (target)
9554 && bitpos % BITS_PER_UNIT == 0))
9555 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9556
9557 if (ext_mode == BLKmode)
9558 {
9559 if (target == 0)
9560 target = assign_temp (type, 0, 1, 1);
9561
9562 if (bitsize == 0)
9563 return target;
9564
9565 /* In this case, BITPOS must start at a byte boundary and
9566 TARGET, if specified, must be a MEM. */
9567 gcc_assert (MEM_P (op0)
9568 && (!target || MEM_P (target))
9569 && !(bitpos % BITS_PER_UNIT));
9570
9571 emit_block_move (target,
9572 adjust_address (op0, VOIDmode,
9573 bitpos / BITS_PER_UNIT),
9574 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9575 / BITS_PER_UNIT),
9576 (modifier == EXPAND_STACK_PARM
9577 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9578
9579 return target;
9580 }
9581
9582 op0 = validize_mem (op0);
9583
9584 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9585 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9586
9587 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
9588 (modifier == EXPAND_STACK_PARM
9589 ? NULL_RTX : target),
9590 ext_mode, ext_mode);
9591
9592 /* If the result is a record type and BITSIZE is narrower than
9593 the mode of OP0, an integral mode, and this is a big endian
9594 machine, we must put the field into the high-order bits. */
9595 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
9596 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
9597 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
9598 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
9599 GET_MODE_BITSIZE (GET_MODE (op0))
9600 - bitsize, op0, 1);
9601
9602 /* If the result type is BLKmode, store the data into a temporary
9603 of the appropriate type, but with the mode corresponding to the
9604 mode for the data we have (op0's mode). It's tempting to make
9605 this a constant type, since we know it's only being stored once,
9606 but that can cause problems if we are taking the address of this
9607 COMPONENT_REF because the MEM of any reference via that address
9608 will have flags corresponding to the type, which will not
9609 necessarily be constant. */
9610 if (mode == BLKmode)
9611 {
9612 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
9613 rtx new_rtx;
9614
9615 /* If the reference doesn't use the alias set of its type,
9616 we cannot create the temporary using that type. */
9617 if (component_uses_parent_alias_set (exp))
9618 {
9619 new_rtx = assign_stack_local (ext_mode, size, 0);
9620 set_mem_alias_set (new_rtx, get_alias_set (exp));
9621 }
9622 else
9623 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
9624
9625 emit_move_insn (new_rtx, op0);
9626 op0 = copy_rtx (new_rtx);
9627 PUT_MODE (op0, BLKmode);
9628 set_mem_attributes (op0, exp, 1);
9629 }
9630
9631 return op0;
9632 }
9633
9634 /* If the result is BLKmode, use that to access the object
9635 now as well. */
9636 if (mode == BLKmode)
9637 mode1 = BLKmode;
9638
9639 /* Get a reference to just this component. */
9640 if (modifier == EXPAND_CONST_ADDRESS
9641 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
9642 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
9643 else
9644 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9645
9646 if (op0 == orig_op0)
9647 op0 = copy_rtx (op0);
9648
9649 set_mem_attributes (op0, exp, 0);
9650 if (REG_P (XEXP (op0, 0)))
9651 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9652
9653 MEM_VOLATILE_P (op0) |= volatilep;
9654 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
9655 || modifier == EXPAND_CONST_ADDRESS
9656 || modifier == EXPAND_INITIALIZER)
9657 return op0;
9658 else if (target == 0)
9659 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9660
9661 convert_move (target, op0, unsignedp);
9662 return target;
9663 }
9664
9665 case OBJ_TYPE_REF:
9666 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
9667
9668 case CALL_EXPR:
9669 /* All valid uses of __builtin_va_arg_pack () are removed during
9670 inlining. */
9671 if (CALL_EXPR_VA_ARG_PACK (exp))
9672 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
9673 {
9674 tree fndecl = get_callee_fndecl (exp), attr;
9675
9676 if (fndecl
9677 && (attr = lookup_attribute ("error",
9678 DECL_ATTRIBUTES (fndecl))) != NULL)
9679 error ("%Kcall to %qs declared with attribute error: %s",
9680 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9681 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9682 if (fndecl
9683 && (attr = lookup_attribute ("warning",
9684 DECL_ATTRIBUTES (fndecl))) != NULL)
9685 warning_at (tree_nonartificial_location (exp),
9686 0, "%Kcall to %qs declared with attribute warning: %s",
9687 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9688 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9689
9690 /* Check for a built-in function. */
9691 if (fndecl && DECL_BUILT_IN (fndecl))
9692 {
9693 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
9694 return expand_builtin (exp, target, subtarget, tmode, ignore);
9695 }
9696 }
9697 return expand_call (exp, target, ignore);
9698
9699 case VIEW_CONVERT_EXPR:
9700 op0 = NULL_RTX;
9701
9702 /* If we are converting to BLKmode, try to avoid an intermediate
9703 temporary by fetching an inner memory reference. */
9704 if (mode == BLKmode
9705 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9706 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
9707 && handled_component_p (treeop0))
9708 {
9709 enum machine_mode mode1;
9710 HOST_WIDE_INT bitsize, bitpos;
9711 tree offset;
9712 int unsignedp;
9713 int volatilep = 0;
9714 tree tem
9715 = get_inner_reference (treeop0, &bitsize, &bitpos,
9716 &offset, &mode1, &unsignedp, &volatilep,
9717 true);
9718 rtx orig_op0;
9719
9720 /* ??? We should work harder and deal with non-zero offsets. */
9721 if (!offset
9722 && (bitpos % BITS_PER_UNIT) == 0
9723 && bitsize >= 0
9724 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
9725 {
9726 /* See the normal_inner_ref case for the rationale. */
9727 orig_op0
9728 = expand_expr (tem,
9729 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9730 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9731 != INTEGER_CST)
9732 && modifier != EXPAND_STACK_PARM
9733 ? target : NULL_RTX),
9734 VOIDmode,
9735 (modifier == EXPAND_INITIALIZER
9736 || modifier == EXPAND_CONST_ADDRESS
9737 || modifier == EXPAND_STACK_PARM)
9738 ? modifier : EXPAND_NORMAL);
9739
9740 if (MEM_P (orig_op0))
9741 {
9742 op0 = orig_op0;
9743
9744 /* Get a reference to just this component. */
9745 if (modifier == EXPAND_CONST_ADDRESS
9746 || modifier == EXPAND_SUM
9747 || modifier == EXPAND_INITIALIZER)
9748 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
9749 else
9750 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
9751
9752 if (op0 == orig_op0)
9753 op0 = copy_rtx (op0);
9754
9755 set_mem_attributes (op0, treeop0, 0);
9756 if (REG_P (XEXP (op0, 0)))
9757 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9758
9759 MEM_VOLATILE_P (op0) |= volatilep;
9760 }
9761 }
9762 }
9763
9764 if (!op0)
9765 op0 = expand_expr (treeop0,
9766 NULL_RTX, VOIDmode, modifier);
9767
9768 /* If the input and output modes are both the same, we are done. */
9769 if (mode == GET_MODE (op0))
9770 ;
9771 /* If neither mode is BLKmode, and both modes are the same size
9772 then we can use gen_lowpart. */
9773 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
9774 && (GET_MODE_PRECISION (mode)
9775 == GET_MODE_PRECISION (GET_MODE (op0)))
9776 && !COMPLEX_MODE_P (GET_MODE (op0)))
9777 {
9778 if (GET_CODE (op0) == SUBREG)
9779 op0 = force_reg (GET_MODE (op0), op0);
9780 temp = gen_lowpart_common (mode, op0);
9781 if (temp)
9782 op0 = temp;
9783 else
9784 {
9785 if (!REG_P (op0) && !MEM_P (op0))
9786 op0 = force_reg (GET_MODE (op0), op0);
9787 op0 = gen_lowpart (mode, op0);
9788 }
9789 }
9790 /* If both types are integral, convert from one mode to the other. */
9791 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
9792 op0 = convert_modes (mode, GET_MODE (op0), op0,
9793 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9794 /* As a last resort, spill op0 to memory, and reload it in a
9795 different mode. */
9796 else if (!MEM_P (op0))
9797 {
9798 /* If the operand is not a MEM, force it into memory. Since we
9799 are going to be changing the mode of the MEM, don't call
9800 force_const_mem for constants because we don't allow pool
9801 constants to change mode. */
9802 tree inner_type = TREE_TYPE (treeop0);
9803
9804 gcc_assert (!TREE_ADDRESSABLE (exp));
9805
9806 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
9807 target
9808 = assign_stack_temp_for_type
9809 (TYPE_MODE (inner_type),
9810 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
9811
9812 emit_move_insn (target, op0);
9813 op0 = target;
9814 }
9815
9816 /* At this point, OP0 is in the correct mode. If the output type is
9817 such that the operand is known to be aligned, indicate that it is.
9818 Otherwise, we need only be concerned about alignment for non-BLKmode
9819 results. */
9820 if (MEM_P (op0))
9821 {
9822 op0 = copy_rtx (op0);
9823
9824 if (TYPE_ALIGN_OK (type))
9825 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
9826 else if (STRICT_ALIGNMENT
9827 && mode != BLKmode
9828 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
9829 {
9830 tree inner_type = TREE_TYPE (treeop0);
9831 HOST_WIDE_INT temp_size
9832 = MAX (int_size_in_bytes (inner_type),
9833 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
9834 rtx new_rtx
9835 = assign_stack_temp_for_type (mode, temp_size, 0, type);
9836 rtx new_with_op0_mode
9837 = adjust_address (new_rtx, GET_MODE (op0), 0);
9838
9839 gcc_assert (!TREE_ADDRESSABLE (exp));
9840
9841 if (GET_MODE (op0) == BLKmode)
9842 emit_block_move (new_with_op0_mode, op0,
9843 GEN_INT (GET_MODE_SIZE (mode)),
9844 (modifier == EXPAND_STACK_PARM
9845 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9846 else
9847 emit_move_insn (new_with_op0_mode, op0);
9848
9849 op0 = new_rtx;
9850 }
9851
9852 op0 = adjust_address (op0, mode, 0);
9853 }
9854
9855 return op0;
9856
9857 case COND_EXPR:
9858 /* A COND_EXPR with its type being VOID_TYPE represents a
9859 conditional jump and is handled in
9860 expand_gimple_cond_expr. */
9861 gcc_assert (!VOID_TYPE_P (type));
9862
9863 /* Note that COND_EXPRs whose type is a structure or union
9864 are required to be constructed to contain assignments of
9865 a temporary variable, so that we can evaluate them here
9866 for side effect only. If type is void, we must do likewise. */
9867
9868 gcc_assert (!TREE_ADDRESSABLE (type)
9869 && !ignore
9870 && TREE_TYPE (treeop1) != void_type_node
9871 && TREE_TYPE (treeop2) != void_type_node);
9872
9873 /* If we are not to produce a result, we have no target. Otherwise,
9874 if a target was specified use it; it will not be used as an
9875 intermediate target unless it is safe. If no target, use a
9876 temporary. */
9877
9878 if (modifier != EXPAND_STACK_PARM
9879 && original_target
9880 && safe_from_p (original_target, treeop0, 1)
9881 && GET_MODE (original_target) == mode
9882 #ifdef HAVE_conditional_move
9883 && (! can_conditionally_move_p (mode)
9884 || REG_P (original_target))
9885 #endif
9886 && !MEM_P (original_target))
9887 temp = original_target;
9888 else
9889 temp = assign_temp (type, 0, 0, 1);
9890
9891 do_pending_stack_adjust ();
9892 NO_DEFER_POP;
9893 op0 = gen_label_rtx ();
9894 op1 = gen_label_rtx ();
9895 jumpifnot (treeop0, op0, -1);
9896 store_expr (treeop1, temp,
9897 modifier == EXPAND_STACK_PARM,
9898 false);
9899
9900 emit_jump_insn (gen_jump (op1));
9901 emit_barrier ();
9902 emit_label (op0);
9903 store_expr (treeop2, temp,
9904 modifier == EXPAND_STACK_PARM,
9905 false);
9906
9907 emit_label (op1);
9908 OK_DEFER_POP;
9909 return temp;
9910
9911 case VEC_COND_EXPR:
9912 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9913 return target;
9914
9915 case MODIFY_EXPR:
9916 {
9917 tree lhs = treeop0;
9918 tree rhs = treeop1;
9919 gcc_assert (ignore);
9920
9921 /* Check for |= or &= of a bitfield of size one into another bitfield
9922 of size 1. In this case, (unless we need the result of the
9923 assignment) we can do this more efficiently with a
9924 test followed by an assignment, if necessary.
9925
9926 ??? At this point, we can't get a BIT_FIELD_REF here. But if
9927 things change so we do, this code should be enhanced to
9928 support it. */
9929 if (TREE_CODE (lhs) == COMPONENT_REF
9930 && (TREE_CODE (rhs) == BIT_IOR_EXPR
9931 || TREE_CODE (rhs) == BIT_AND_EXPR)
9932 && TREE_OPERAND (rhs, 0) == lhs
9933 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
9934 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
9935 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
9936 {
9937 rtx label = gen_label_rtx ();
9938 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
9939 do_jump (TREE_OPERAND (rhs, 1),
9940 value ? label : 0,
9941 value ? 0 : label, -1);
9942 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
9943 MOVE_NONTEMPORAL (exp));
9944 do_pending_stack_adjust ();
9945 emit_label (label);
9946 return const0_rtx;
9947 }
9948
9949 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
9950 return const0_rtx;
9951 }
9952
9953 case ADDR_EXPR:
9954 return expand_expr_addr_expr (exp, target, tmode, modifier);
9955
9956 case REALPART_EXPR:
9957 op0 = expand_normal (treeop0);
9958 return read_complex_part (op0, false);
9959
9960 case IMAGPART_EXPR:
9961 op0 = expand_normal (treeop0);
9962 return read_complex_part (op0, true);
9963
9964 case RETURN_EXPR:
9965 case LABEL_EXPR:
9966 case GOTO_EXPR:
9967 case SWITCH_EXPR:
9968 case ASM_EXPR:
9969 /* Expanded in cfgexpand.c. */
9970 gcc_unreachable ();
9971
9972 case TRY_CATCH_EXPR:
9973 case CATCH_EXPR:
9974 case EH_FILTER_EXPR:
9975 case TRY_FINALLY_EXPR:
9976 /* Lowered by tree-eh.c. */
9977 gcc_unreachable ();
9978
9979 case WITH_CLEANUP_EXPR:
9980 case CLEANUP_POINT_EXPR:
9981 case TARGET_EXPR:
9982 case CASE_LABEL_EXPR:
9983 case VA_ARG_EXPR:
9984 case BIND_EXPR:
9985 case INIT_EXPR:
9986 case CONJ_EXPR:
9987 case COMPOUND_EXPR:
9988 case PREINCREMENT_EXPR:
9989 case PREDECREMENT_EXPR:
9990 case POSTINCREMENT_EXPR:
9991 case POSTDECREMENT_EXPR:
9992 case LOOP_EXPR:
9993 case EXIT_EXPR:
9994 /* Lowered by gimplify.c. */
9995 gcc_unreachable ();
9996
9997 case FDESC_EXPR:
9998 /* Function descriptors are not valid except for as
9999 initialization constants, and should not be expanded. */
10000 gcc_unreachable ();
10001
10002 case WITH_SIZE_EXPR:
10003 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10004 have pulled out the size to use in whatever context it needed. */
10005 return expand_expr_real (treeop0, original_target, tmode,
10006 modifier, alt_rtl);
10007
10008 case COMPOUND_LITERAL_EXPR:
10009 {
10010 /* Initialize the anonymous variable declared in the compound
10011 literal, then return the variable. */
10012 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
10013
10014 /* Create RTL for this variable. */
10015 if (!DECL_RTL_SET_P (decl))
10016 {
10017 if (DECL_HARD_REGISTER (decl))
10018 /* The user specified an assembler name for this variable.
10019 Set that up now. */
10020 rest_of_decl_compilation (decl, 0, 0);
10021 else
10022 expand_decl (decl);
10023 }
10024
10025 return expand_expr_real (decl, original_target, tmode,
10026 modifier, alt_rtl);
10027 }
10028
10029 default:
10030 return expand_expr_real_2 (&ops, target, tmode, modifier);
10031 }
10032 }
10033 \f
10034 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10035 signedness of TYPE), possibly returning the result in TARGET. */
10036 static rtx
10037 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10038 {
10039 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10040 if (target && GET_MODE (target) != GET_MODE (exp))
10041 target = 0;
10042 /* For constant values, reduce using build_int_cst_type. */
10043 if (CONST_INT_P (exp))
10044 {
10045 HOST_WIDE_INT value = INTVAL (exp);
10046 tree t = build_int_cst_type (type, value);
10047 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10048 }
10049 else if (TYPE_UNSIGNED (type))
10050 {
10051 rtx mask = immed_double_int_const (double_int_mask (prec),
10052 GET_MODE (exp));
10053 return expand_and (GET_MODE (exp), exp, mask, target);
10054 }
10055 else
10056 {
10057 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10058 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10059 exp, count, target, 0);
10060 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10061 exp, count, target, 0);
10062 }
10063 }
10064 \f
10065 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10066 when applied to the address of EXP produces an address known to be
10067 aligned more than BIGGEST_ALIGNMENT. */
10068
10069 static int
10070 is_aligning_offset (const_tree offset, const_tree exp)
10071 {
10072 /* Strip off any conversions. */
10073 while (CONVERT_EXPR_P (offset))
10074 offset = TREE_OPERAND (offset, 0);
10075
10076 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10077 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10078 if (TREE_CODE (offset) != BIT_AND_EXPR
10079 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10080 || compare_tree_int (TREE_OPERAND (offset, 1),
10081 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10082 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10083 return 0;
10084
10085 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10086 It must be NEGATE_EXPR. Then strip any more conversions. */
10087 offset = TREE_OPERAND (offset, 0);
10088 while (CONVERT_EXPR_P (offset))
10089 offset = TREE_OPERAND (offset, 0);
10090
10091 if (TREE_CODE (offset) != NEGATE_EXPR)
10092 return 0;
10093
10094 offset = TREE_OPERAND (offset, 0);
10095 while (CONVERT_EXPR_P (offset))
10096 offset = TREE_OPERAND (offset, 0);
10097
10098 /* This must now be the address of EXP. */
10099 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10100 }
10101 \f
10102 /* Return the tree node if an ARG corresponds to a string constant or zero
10103 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10104 in bytes within the string that ARG is accessing. The type of the
10105 offset will be `sizetype'. */
10106
10107 tree
10108 string_constant (tree arg, tree *ptr_offset)
10109 {
10110 tree array, offset, lower_bound;
10111 STRIP_NOPS (arg);
10112
10113 if (TREE_CODE (arg) == ADDR_EXPR)
10114 {
10115 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10116 {
10117 *ptr_offset = size_zero_node;
10118 return TREE_OPERAND (arg, 0);
10119 }
10120 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10121 {
10122 array = TREE_OPERAND (arg, 0);
10123 offset = size_zero_node;
10124 }
10125 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10126 {
10127 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10128 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10129 if (TREE_CODE (array) != STRING_CST
10130 && TREE_CODE (array) != VAR_DECL)
10131 return 0;
10132
10133 /* Check if the array has a nonzero lower bound. */
10134 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10135 if (!integer_zerop (lower_bound))
10136 {
10137 /* If the offset and base aren't both constants, return 0. */
10138 if (TREE_CODE (lower_bound) != INTEGER_CST)
10139 return 0;
10140 if (TREE_CODE (offset) != INTEGER_CST)
10141 return 0;
10142 /* Adjust offset by the lower bound. */
10143 offset = size_diffop (fold_convert (sizetype, offset),
10144 fold_convert (sizetype, lower_bound));
10145 }
10146 }
10147 else
10148 return 0;
10149 }
10150 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10151 {
10152 tree arg0 = TREE_OPERAND (arg, 0);
10153 tree arg1 = TREE_OPERAND (arg, 1);
10154
10155 STRIP_NOPS (arg0);
10156 STRIP_NOPS (arg1);
10157
10158 if (TREE_CODE (arg0) == ADDR_EXPR
10159 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10160 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10161 {
10162 array = TREE_OPERAND (arg0, 0);
10163 offset = arg1;
10164 }
10165 else if (TREE_CODE (arg1) == ADDR_EXPR
10166 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10167 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10168 {
10169 array = TREE_OPERAND (arg1, 0);
10170 offset = arg0;
10171 }
10172 else
10173 return 0;
10174 }
10175 else
10176 return 0;
10177
10178 if (TREE_CODE (array) == STRING_CST)
10179 {
10180 *ptr_offset = fold_convert (sizetype, offset);
10181 return array;
10182 }
10183 else if (TREE_CODE (array) == VAR_DECL
10184 || TREE_CODE (array) == CONST_DECL)
10185 {
10186 int length;
10187
10188 /* Variables initialized to string literals can be handled too. */
10189 if (!const_value_known_p (array)
10190 || !DECL_INITIAL (array)
10191 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10192 return 0;
10193
10194 /* Avoid const char foo[4] = "abcde"; */
10195 if (DECL_SIZE_UNIT (array) == NULL_TREE
10196 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10197 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10198 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10199 return 0;
10200
10201 /* If variable is bigger than the string literal, OFFSET must be constant
10202 and inside of the bounds of the string literal. */
10203 offset = fold_convert (sizetype, offset);
10204 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10205 && (! host_integerp (offset, 1)
10206 || compare_tree_int (offset, length) >= 0))
10207 return 0;
10208
10209 *ptr_offset = offset;
10210 return DECL_INITIAL (array);
10211 }
10212
10213 return 0;
10214 }
10215 \f
10216 /* Generate code to calculate OPS, and exploded expression
10217 using a store-flag instruction and return an rtx for the result.
10218 OPS reflects a comparison.
10219
10220 If TARGET is nonzero, store the result there if convenient.
10221
10222 Return zero if there is no suitable set-flag instruction
10223 available on this machine.
10224
10225 Once expand_expr has been called on the arguments of the comparison,
10226 we are committed to doing the store flag, since it is not safe to
10227 re-evaluate the expression. We emit the store-flag insn by calling
10228 emit_store_flag, but only expand the arguments if we have a reason
10229 to believe that emit_store_flag will be successful. If we think that
10230 it will, but it isn't, we have to simulate the store-flag with a
10231 set/jump/set sequence. */
10232
10233 static rtx
10234 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10235 {
10236 enum rtx_code code;
10237 tree arg0, arg1, type;
10238 tree tem;
10239 enum machine_mode operand_mode;
10240 int unsignedp;
10241 rtx op0, op1;
10242 rtx subtarget = target;
10243 location_t loc = ops->location;
10244
10245 arg0 = ops->op0;
10246 arg1 = ops->op1;
10247
10248 /* Don't crash if the comparison was erroneous. */
10249 if (arg0 == error_mark_node || arg1 == error_mark_node)
10250 return const0_rtx;
10251
10252 type = TREE_TYPE (arg0);
10253 operand_mode = TYPE_MODE (type);
10254 unsignedp = TYPE_UNSIGNED (type);
10255
10256 /* We won't bother with BLKmode store-flag operations because it would mean
10257 passing a lot of information to emit_store_flag. */
10258 if (operand_mode == BLKmode)
10259 return 0;
10260
10261 /* We won't bother with store-flag operations involving function pointers
10262 when function pointers must be canonicalized before comparisons. */
10263 #ifdef HAVE_canonicalize_funcptr_for_compare
10264 if (HAVE_canonicalize_funcptr_for_compare
10265 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10266 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10267 == FUNCTION_TYPE))
10268 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10269 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10270 == FUNCTION_TYPE))))
10271 return 0;
10272 #endif
10273
10274 STRIP_NOPS (arg0);
10275 STRIP_NOPS (arg1);
10276
10277 /* Get the rtx comparison code to use. We know that EXP is a comparison
10278 operation of some type. Some comparisons against 1 and -1 can be
10279 converted to comparisons with zero. Do so here so that the tests
10280 below will be aware that we have a comparison with zero. These
10281 tests will not catch constants in the first operand, but constants
10282 are rarely passed as the first operand. */
10283
10284 switch (ops->code)
10285 {
10286 case EQ_EXPR:
10287 code = EQ;
10288 break;
10289 case NE_EXPR:
10290 code = NE;
10291 break;
10292 case LT_EXPR:
10293 if (integer_onep (arg1))
10294 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10295 else
10296 code = unsignedp ? LTU : LT;
10297 break;
10298 case LE_EXPR:
10299 if (! unsignedp && integer_all_onesp (arg1))
10300 arg1 = integer_zero_node, code = LT;
10301 else
10302 code = unsignedp ? LEU : LE;
10303 break;
10304 case GT_EXPR:
10305 if (! unsignedp && integer_all_onesp (arg1))
10306 arg1 = integer_zero_node, code = GE;
10307 else
10308 code = unsignedp ? GTU : GT;
10309 break;
10310 case GE_EXPR:
10311 if (integer_onep (arg1))
10312 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10313 else
10314 code = unsignedp ? GEU : GE;
10315 break;
10316
10317 case UNORDERED_EXPR:
10318 code = UNORDERED;
10319 break;
10320 case ORDERED_EXPR:
10321 code = ORDERED;
10322 break;
10323 case UNLT_EXPR:
10324 code = UNLT;
10325 break;
10326 case UNLE_EXPR:
10327 code = UNLE;
10328 break;
10329 case UNGT_EXPR:
10330 code = UNGT;
10331 break;
10332 case UNGE_EXPR:
10333 code = UNGE;
10334 break;
10335 case UNEQ_EXPR:
10336 code = UNEQ;
10337 break;
10338 case LTGT_EXPR:
10339 code = LTGT;
10340 break;
10341
10342 default:
10343 gcc_unreachable ();
10344 }
10345
10346 /* Put a constant second. */
10347 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10348 || TREE_CODE (arg0) == FIXED_CST)
10349 {
10350 tem = arg0; arg0 = arg1; arg1 = tem;
10351 code = swap_condition (code);
10352 }
10353
10354 /* If this is an equality or inequality test of a single bit, we can
10355 do this by shifting the bit being tested to the low-order bit and
10356 masking the result with the constant 1. If the condition was EQ,
10357 we xor it with 1. This does not require an scc insn and is faster
10358 than an scc insn even if we have it.
10359
10360 The code to make this transformation was moved into fold_single_bit_test,
10361 so we just call into the folder and expand its result. */
10362
10363 if ((code == NE || code == EQ)
10364 && TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1)
10365 && integer_pow2p (TREE_OPERAND (arg0, 1))
10366 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10367 {
10368 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10369 return expand_expr (fold_single_bit_test (loc,
10370 code == NE ? NE_EXPR : EQ_EXPR,
10371 arg0, arg1, type),
10372 target, VOIDmode, EXPAND_NORMAL);
10373 }
10374
10375 if (! get_subtarget (target)
10376 || GET_MODE (subtarget) != operand_mode)
10377 subtarget = 0;
10378
10379 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10380
10381 if (target == 0)
10382 target = gen_reg_rtx (mode);
10383
10384 /* Try a cstore if possible. */
10385 return emit_store_flag_force (target, code, op0, op1,
10386 operand_mode, unsignedp,
10387 (TYPE_PRECISION (ops->type) == 1
10388 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10389 }
10390 \f
10391
10392 /* Stubs in case we haven't got a casesi insn. */
10393 #ifndef HAVE_casesi
10394 # define HAVE_casesi 0
10395 # define gen_casesi(a, b, c, d, e) (0)
10396 # define CODE_FOR_casesi CODE_FOR_nothing
10397 #endif
10398
10399 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10400 0 otherwise (i.e. if there is no casesi instruction). */
10401 int
10402 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10403 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10404 rtx fallback_label ATTRIBUTE_UNUSED)
10405 {
10406 struct expand_operand ops[5];
10407 enum machine_mode index_mode = SImode;
10408 int index_bits = GET_MODE_BITSIZE (index_mode);
10409 rtx op1, op2, index;
10410
10411 if (! HAVE_casesi)
10412 return 0;
10413
10414 /* Convert the index to SImode. */
10415 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10416 {
10417 enum machine_mode omode = TYPE_MODE (index_type);
10418 rtx rangertx = expand_normal (range);
10419
10420 /* We must handle the endpoints in the original mode. */
10421 index_expr = build2 (MINUS_EXPR, index_type,
10422 index_expr, minval);
10423 minval = integer_zero_node;
10424 index = expand_normal (index_expr);
10425 if (default_label)
10426 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10427 omode, 1, default_label);
10428 /* Now we can safely truncate. */
10429 index = convert_to_mode (index_mode, index, 0);
10430 }
10431 else
10432 {
10433 if (TYPE_MODE (index_type) != index_mode)
10434 {
10435 index_type = lang_hooks.types.type_for_size (index_bits, 0);
10436 index_expr = fold_convert (index_type, index_expr);
10437 }
10438
10439 index = expand_normal (index_expr);
10440 }
10441
10442 do_pending_stack_adjust ();
10443
10444 op1 = expand_normal (minval);
10445 op2 = expand_normal (range);
10446
10447 create_input_operand (&ops[0], index, index_mode);
10448 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10449 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10450 create_fixed_operand (&ops[3], table_label);
10451 create_fixed_operand (&ops[4], (default_label
10452 ? default_label
10453 : fallback_label));
10454 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10455 return 1;
10456 }
10457
10458 /* Attempt to generate a tablejump instruction; same concept. */
10459 #ifndef HAVE_tablejump
10460 #define HAVE_tablejump 0
10461 #define gen_tablejump(x, y) (0)
10462 #endif
10463
10464 /* Subroutine of the next function.
10465
10466 INDEX is the value being switched on, with the lowest value
10467 in the table already subtracted.
10468 MODE is its expected mode (needed if INDEX is constant).
10469 RANGE is the length of the jump table.
10470 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10471
10472 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10473 index value is out of range. */
10474
10475 static void
10476 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10477 rtx default_label)
10478 {
10479 rtx temp, vector;
10480
10481 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10482 cfun->cfg->max_jumptable_ents = INTVAL (range);
10483
10484 /* Do an unsigned comparison (in the proper mode) between the index
10485 expression and the value which represents the length of the range.
10486 Since we just finished subtracting the lower bound of the range
10487 from the index expression, this comparison allows us to simultaneously
10488 check that the original index expression value is both greater than
10489 or equal to the minimum value of the range and less than or equal to
10490 the maximum value of the range. */
10491
10492 if (default_label)
10493 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10494 default_label);
10495
10496 /* If index is in range, it must fit in Pmode.
10497 Convert to Pmode so we can index with it. */
10498 if (mode != Pmode)
10499 index = convert_to_mode (Pmode, index, 1);
10500
10501 /* Don't let a MEM slip through, because then INDEX that comes
10502 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10503 and break_out_memory_refs will go to work on it and mess it up. */
10504 #ifdef PIC_CASE_VECTOR_ADDRESS
10505 if (flag_pic && !REG_P (index))
10506 index = copy_to_mode_reg (Pmode, index);
10507 #endif
10508
10509 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10510 GET_MODE_SIZE, because this indicates how large insns are. The other
10511 uses should all be Pmode, because they are addresses. This code
10512 could fail if addresses and insns are not the same size. */
10513 index = gen_rtx_PLUS (Pmode,
10514 gen_rtx_MULT (Pmode, index,
10515 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10516 gen_rtx_LABEL_REF (Pmode, table_label));
10517 #ifdef PIC_CASE_VECTOR_ADDRESS
10518 if (flag_pic)
10519 index = PIC_CASE_VECTOR_ADDRESS (index);
10520 else
10521 #endif
10522 index = memory_address (CASE_VECTOR_MODE, index);
10523 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10524 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10525 convert_move (temp, vector, 0);
10526
10527 emit_jump_insn (gen_tablejump (temp, table_label));
10528
10529 /* If we are generating PIC code or if the table is PC-relative, the
10530 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10531 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10532 emit_barrier ();
10533 }
10534
10535 int
10536 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10537 rtx table_label, rtx default_label)
10538 {
10539 rtx index;
10540
10541 if (! HAVE_tablejump)
10542 return 0;
10543
10544 index_expr = fold_build2 (MINUS_EXPR, index_type,
10545 fold_convert (index_type, index_expr),
10546 fold_convert (index_type, minval));
10547 index = expand_normal (index_expr);
10548 do_pending_stack_adjust ();
10549
10550 do_tablejump (index, TYPE_MODE (index_type),
10551 convert_modes (TYPE_MODE (index_type),
10552 TYPE_MODE (TREE_TYPE (range)),
10553 expand_normal (range),
10554 TYPE_UNSIGNED (TREE_TYPE (range))),
10555 table_label, default_label);
10556 return 1;
10557 }
10558
10559 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10560 static rtx
10561 const_vector_from_tree (tree exp)
10562 {
10563 rtvec v;
10564 int units, i;
10565 tree link, elt;
10566 enum machine_mode inner, mode;
10567
10568 mode = TYPE_MODE (TREE_TYPE (exp));
10569
10570 if (initializer_zerop (exp))
10571 return CONST0_RTX (mode);
10572
10573 units = GET_MODE_NUNITS (mode);
10574 inner = GET_MODE_INNER (mode);
10575
10576 v = rtvec_alloc (units);
10577
10578 link = TREE_VECTOR_CST_ELTS (exp);
10579 for (i = 0; link; link = TREE_CHAIN (link), ++i)
10580 {
10581 elt = TREE_VALUE (link);
10582
10583 if (TREE_CODE (elt) == REAL_CST)
10584 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10585 inner);
10586 else if (TREE_CODE (elt) == FIXED_CST)
10587 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10588 inner);
10589 else
10590 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10591 inner);
10592 }
10593
10594 /* Initialize remaining elements to 0. */
10595 for (; i < units; ++i)
10596 RTVEC_ELT (v, i) = CONST0_RTX (inner);
10597
10598 return gen_rtx_CONST_VECTOR (mode, v);
10599 }
10600
10601 /* Build a decl for a personality function given a language prefix. */
10602
10603 tree
10604 build_personality_function (const char *lang)
10605 {
10606 const char *unwind_and_version;
10607 tree decl, type;
10608 char *name;
10609
10610 switch (targetm_common.except_unwind_info (&global_options))
10611 {
10612 case UI_NONE:
10613 return NULL;
10614 case UI_SJLJ:
10615 unwind_and_version = "_sj0";
10616 break;
10617 case UI_DWARF2:
10618 case UI_TARGET:
10619 unwind_and_version = "_v0";
10620 break;
10621 default:
10622 gcc_unreachable ();
10623 }
10624
10625 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
10626
10627 type = build_function_type_list (integer_type_node, integer_type_node,
10628 long_long_unsigned_type_node,
10629 ptr_type_node, ptr_type_node, NULL_TREE);
10630 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
10631 get_identifier (name), type);
10632 DECL_ARTIFICIAL (decl) = 1;
10633 DECL_EXTERNAL (decl) = 1;
10634 TREE_PUBLIC (decl) = 1;
10635
10636 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
10637 are the flags assigned by targetm.encode_section_info. */
10638 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
10639
10640 return decl;
10641 }
10642
10643 /* Extracts the personality function of DECL and returns the corresponding
10644 libfunc. */
10645
10646 rtx
10647 get_personality_function (tree decl)
10648 {
10649 tree personality = DECL_FUNCTION_PERSONALITY (decl);
10650 enum eh_personality_kind pk;
10651
10652 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
10653 if (pk == eh_personality_none)
10654 return NULL;
10655
10656 if (!personality
10657 && pk == eh_personality_any)
10658 personality = lang_hooks.eh_personality ();
10659
10660 if (pk == eh_personality_lang)
10661 gcc_assert (personality != NULL_TREE);
10662
10663 return XEXP (DECL_RTL (personality), 0);
10664 }
10665
10666 #include "gt-expr.h"