params.h (ALLOW_STORE_DATA_RACES): New.
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "common/common-target.h"
53 #include "timevar.h"
54 #include "df.h"
55 #include "diagnostic.h"
56 #include "ssaexpand.h"
57 #include "target-globals.h"
58 #include "params.h"
59
60 /* Decide whether a function's arguments should be processed
61 from first to last or from last to first.
62
63 They should if the stack and args grow in opposite directions, but
64 only if we have push insns. */
65
66 #ifdef PUSH_ROUNDING
67
68 #ifndef PUSH_ARGS_REVERSED
69 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
70 #define PUSH_ARGS_REVERSED /* If it's last to first. */
71 #endif
72 #endif
73
74 #endif
75
76 #ifndef STACK_PUSH_CODE
77 #ifdef STACK_GROWS_DOWNWARD
78 #define STACK_PUSH_CODE PRE_DEC
79 #else
80 #define STACK_PUSH_CODE PRE_INC
81 #endif
82 #endif
83
84
85 /* If this is nonzero, we do not bother generating VOLATILE
86 around volatile memory references, and we are willing to
87 output indirect addresses. If cse is to follow, we reject
88 indirect addresses so a useful potential cse is generated;
89 if it is used only once, instruction combination will produce
90 the same indirect address eventually. */
91 int cse_not_expected;
92
93 /* This structure is used by move_by_pieces to describe the move to
94 be performed. */
95 struct move_by_pieces_d
96 {
97 rtx to;
98 rtx to_addr;
99 int autinc_to;
100 int explicit_inc_to;
101 rtx from;
102 rtx from_addr;
103 int autinc_from;
104 int explicit_inc_from;
105 unsigned HOST_WIDE_INT len;
106 HOST_WIDE_INT offset;
107 int reverse;
108 };
109
110 /* This structure is used by store_by_pieces to describe the clear to
111 be performed. */
112
113 struct store_by_pieces_d
114 {
115 rtx to;
116 rtx to_addr;
117 int autinc_to;
118 int explicit_inc_to;
119 unsigned HOST_WIDE_INT len;
120 HOST_WIDE_INT offset;
121 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
122 void *constfundata;
123 int reverse;
124 };
125
126 static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT,
127 unsigned int,
128 unsigned int);
129 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
130 struct move_by_pieces_d *);
131 static bool block_move_libcall_safe_for_call_parm (void);
132 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
133 static tree emit_block_move_libcall_fn (int);
134 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
135 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
136 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
137 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
138 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
139 struct store_by_pieces_d *);
140 static tree clear_storage_libcall_fn (int);
141 static rtx compress_float_constant (rtx, rtx);
142 static rtx get_subtarget (rtx);
143 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
144 HOST_WIDE_INT, enum machine_mode,
145 tree, tree, int, alias_set_type);
146 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
147 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
148 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
149 enum machine_mode,
150 tree, tree, alias_set_type, bool);
151
152 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
153
154 static int is_aligning_offset (const_tree, const_tree);
155 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
156 enum expand_modifier);
157 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
158 static rtx do_store_flag (sepops, rtx, enum machine_mode);
159 #ifdef PUSH_ROUNDING
160 static void emit_single_push_insn (enum machine_mode, rtx, tree);
161 #endif
162 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
163 static rtx const_vector_from_tree (tree);
164 static void write_complex_part (rtx, rtx, bool);
165
166 /* This macro is used to determine whether move_by_pieces should be called
167 to perform a structure copy. */
168 #ifndef MOVE_BY_PIECES_P
169 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
170 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
171 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
172 #endif
173
174 /* This macro is used to determine whether clear_by_pieces should be
175 called to clear storage. */
176 #ifndef CLEAR_BY_PIECES_P
177 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
178 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
179 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
180 #endif
181
182 /* This macro is used to determine whether store_by_pieces should be
183 called to "memset" storage with byte values other than zero. */
184 #ifndef SET_BY_PIECES_P
185 #define SET_BY_PIECES_P(SIZE, ALIGN) \
186 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
187 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
188 #endif
189
190 /* This macro is used to determine whether store_by_pieces should be
191 called to "memcpy" storage when the source is a constant string. */
192 #ifndef STORE_BY_PIECES_P
193 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
194 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
195 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
196 #endif
197
198 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
199
200 #ifndef SLOW_UNALIGNED_ACCESS
201 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
202 #endif
203 \f
204 /* This is run to set up which modes can be used
205 directly in memory and to initialize the block move optab. It is run
206 at the beginning of compilation and when the target is reinitialized. */
207
208 void
209 init_expr_target (void)
210 {
211 rtx insn, pat;
212 enum machine_mode mode;
213 int num_clobbers;
214 rtx mem, mem1;
215 rtx reg;
216
217 /* Try indexing by frame ptr and try by stack ptr.
218 It is known that on the Convex the stack ptr isn't a valid index.
219 With luck, one or the other is valid on any machine. */
220 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
221 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
222
223 /* A scratch register we can modify in-place below to avoid
224 useless RTL allocations. */
225 reg = gen_rtx_REG (VOIDmode, -1);
226
227 insn = rtx_alloc (INSN);
228 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
229 PATTERN (insn) = pat;
230
231 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
232 mode = (enum machine_mode) ((int) mode + 1))
233 {
234 int regno;
235
236 direct_load[(int) mode] = direct_store[(int) mode] = 0;
237 PUT_MODE (mem, mode);
238 PUT_MODE (mem1, mode);
239 PUT_MODE (reg, mode);
240
241 /* See if there is some register that can be used in this mode and
242 directly loaded or stored from memory. */
243
244 if (mode != VOIDmode && mode != BLKmode)
245 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
246 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
247 regno++)
248 {
249 if (! HARD_REGNO_MODE_OK (regno, mode))
250 continue;
251
252 SET_REGNO (reg, regno);
253
254 SET_SRC (pat) = mem;
255 SET_DEST (pat) = reg;
256 if (recog (pat, insn, &num_clobbers) >= 0)
257 direct_load[(int) mode] = 1;
258
259 SET_SRC (pat) = mem1;
260 SET_DEST (pat) = reg;
261 if (recog (pat, insn, &num_clobbers) >= 0)
262 direct_load[(int) mode] = 1;
263
264 SET_SRC (pat) = reg;
265 SET_DEST (pat) = mem;
266 if (recog (pat, insn, &num_clobbers) >= 0)
267 direct_store[(int) mode] = 1;
268
269 SET_SRC (pat) = reg;
270 SET_DEST (pat) = mem1;
271 if (recog (pat, insn, &num_clobbers) >= 0)
272 direct_store[(int) mode] = 1;
273 }
274 }
275
276 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
277
278 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
279 mode = GET_MODE_WIDER_MODE (mode))
280 {
281 enum machine_mode srcmode;
282 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
283 srcmode = GET_MODE_WIDER_MODE (srcmode))
284 {
285 enum insn_code ic;
286
287 ic = can_extend_p (mode, srcmode, 0);
288 if (ic == CODE_FOR_nothing)
289 continue;
290
291 PUT_MODE (mem, srcmode);
292
293 if (insn_operand_matches (ic, 1, mem))
294 float_extend_from_mem[mode][srcmode] = true;
295 }
296 }
297 }
298
299 /* This is run at the start of compiling a function. */
300
301 void
302 init_expr (void)
303 {
304 memset (&crtl->expr, 0, sizeof (crtl->expr));
305 }
306 \f
307 /* Copy data from FROM to TO, where the machine modes are not the same.
308 Both modes may be integer, or both may be floating, or both may be
309 fixed-point.
310 UNSIGNEDP should be nonzero if FROM is an unsigned type.
311 This causes zero-extension instead of sign-extension. */
312
313 void
314 convert_move (rtx to, rtx from, int unsignedp)
315 {
316 enum machine_mode to_mode = GET_MODE (to);
317 enum machine_mode from_mode = GET_MODE (from);
318 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
319 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
320 enum insn_code code;
321 rtx libcall;
322
323 /* rtx code for making an equivalent value. */
324 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
325 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
326
327
328 gcc_assert (to_real == from_real);
329 gcc_assert (to_mode != BLKmode);
330 gcc_assert (from_mode != BLKmode);
331
332 /* If the source and destination are already the same, then there's
333 nothing to do. */
334 if (to == from)
335 return;
336
337 /* If FROM is a SUBREG that indicates that we have already done at least
338 the required extension, strip it. We don't handle such SUBREGs as
339 TO here. */
340
341 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
342 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
343 >= GET_MODE_PRECISION (to_mode))
344 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
345 from = gen_lowpart (to_mode, from), from_mode = to_mode;
346
347 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
348
349 if (to_mode == from_mode
350 || (from_mode == VOIDmode && CONSTANT_P (from)))
351 {
352 emit_move_insn (to, from);
353 return;
354 }
355
356 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
357 {
358 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
359
360 if (VECTOR_MODE_P (to_mode))
361 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
362 else
363 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
364
365 emit_move_insn (to, from);
366 return;
367 }
368
369 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
370 {
371 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
372 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
373 return;
374 }
375
376 if (to_real)
377 {
378 rtx value, insns;
379 convert_optab tab;
380
381 gcc_assert ((GET_MODE_PRECISION (from_mode)
382 != GET_MODE_PRECISION (to_mode))
383 || (DECIMAL_FLOAT_MODE_P (from_mode)
384 != DECIMAL_FLOAT_MODE_P (to_mode)));
385
386 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
387 /* Conversion between decimal float and binary float, same size. */
388 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
389 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
390 tab = sext_optab;
391 else
392 tab = trunc_optab;
393
394 /* Try converting directly if the insn is supported. */
395
396 code = convert_optab_handler (tab, to_mode, from_mode);
397 if (code != CODE_FOR_nothing)
398 {
399 emit_unop_insn (code, to, from,
400 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
401 return;
402 }
403
404 /* Otherwise use a libcall. */
405 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
406
407 /* Is this conversion implemented yet? */
408 gcc_assert (libcall);
409
410 start_sequence ();
411 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
412 1, from, from_mode);
413 insns = get_insns ();
414 end_sequence ();
415 emit_libcall_block (insns, to, value,
416 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
417 from)
418 : gen_rtx_FLOAT_EXTEND (to_mode, from));
419 return;
420 }
421
422 /* Handle pointer conversion. */ /* SPEE 900220. */
423 /* Targets are expected to provide conversion insns between PxImode and
424 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
425 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
426 {
427 enum machine_mode full_mode
428 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
429
430 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
431 != CODE_FOR_nothing);
432
433 if (full_mode != from_mode)
434 from = convert_to_mode (full_mode, from, unsignedp);
435 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
436 to, from, UNKNOWN);
437 return;
438 }
439 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
440 {
441 rtx new_from;
442 enum machine_mode full_mode
443 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
444
445 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)
446 != CODE_FOR_nothing);
447
448 if (to_mode == full_mode)
449 {
450 emit_unop_insn (convert_optab_handler (sext_optab, full_mode,
451 from_mode),
452 to, from, UNKNOWN);
453 return;
454 }
455
456 new_from = gen_reg_rtx (full_mode);
457 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode),
458 new_from, from, UNKNOWN);
459
460 /* else proceed to integer conversions below. */
461 from_mode = full_mode;
462 from = new_from;
463 }
464
465 /* Make sure both are fixed-point modes or both are not. */
466 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
467 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
468 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
469 {
470 /* If we widen from_mode to to_mode and they are in the same class,
471 we won't saturate the result.
472 Otherwise, always saturate the result to play safe. */
473 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
474 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
475 expand_fixed_convert (to, from, 0, 0);
476 else
477 expand_fixed_convert (to, from, 0, 1);
478 return;
479 }
480
481 /* Now both modes are integers. */
482
483 /* Handle expanding beyond a word. */
484 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
485 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
486 {
487 rtx insns;
488 rtx lowpart;
489 rtx fill_value;
490 rtx lowfrom;
491 int i;
492 enum machine_mode lowpart_mode;
493 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
494
495 /* Try converting directly if the insn is supported. */
496 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
497 != CODE_FOR_nothing)
498 {
499 /* If FROM is a SUBREG, put it into a register. Do this
500 so that we always generate the same set of insns for
501 better cse'ing; if an intermediate assignment occurred,
502 we won't be doing the operation directly on the SUBREG. */
503 if (optimize > 0 && GET_CODE (from) == SUBREG)
504 from = force_reg (from_mode, from);
505 emit_unop_insn (code, to, from, equiv_code);
506 return;
507 }
508 /* Next, try converting via full word. */
509 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
510 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
511 != CODE_FOR_nothing))
512 {
513 rtx word_to = gen_reg_rtx (word_mode);
514 if (REG_P (to))
515 {
516 if (reg_overlap_mentioned_p (to, from))
517 from = force_reg (from_mode, from);
518 emit_clobber (to);
519 }
520 convert_move (word_to, from, unsignedp);
521 emit_unop_insn (code, to, word_to, equiv_code);
522 return;
523 }
524
525 /* No special multiword conversion insn; do it by hand. */
526 start_sequence ();
527
528 /* Since we will turn this into a no conflict block, we must ensure
529 that the source does not overlap the target. */
530
531 if (reg_overlap_mentioned_p (to, from))
532 from = force_reg (from_mode, from);
533
534 /* Get a copy of FROM widened to a word, if necessary. */
535 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
536 lowpart_mode = word_mode;
537 else
538 lowpart_mode = from_mode;
539
540 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
541
542 lowpart = gen_lowpart (lowpart_mode, to);
543 emit_move_insn (lowpart, lowfrom);
544
545 /* Compute the value to put in each remaining word. */
546 if (unsignedp)
547 fill_value = const0_rtx;
548 else
549 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
550 LT, lowfrom, const0_rtx,
551 VOIDmode, 0, -1);
552
553 /* Fill the remaining words. */
554 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
555 {
556 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
557 rtx subword = operand_subword (to, index, 1, to_mode);
558
559 gcc_assert (subword);
560
561 if (fill_value != subword)
562 emit_move_insn (subword, fill_value);
563 }
564
565 insns = get_insns ();
566 end_sequence ();
567
568 emit_insn (insns);
569 return;
570 }
571
572 /* Truncating multi-word to a word or less. */
573 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
574 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
575 {
576 if (!((MEM_P (from)
577 && ! MEM_VOLATILE_P (from)
578 && direct_load[(int) to_mode]
579 && ! mode_dependent_address_p (XEXP (from, 0)))
580 || REG_P (from)
581 || GET_CODE (from) == SUBREG))
582 from = force_reg (from_mode, from);
583 convert_move (to, gen_lowpart (word_mode, from), 0);
584 return;
585 }
586
587 /* Now follow all the conversions between integers
588 no more than a word long. */
589
590 /* For truncation, usually we can just refer to FROM in a narrower mode. */
591 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
592 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
593 {
594 if (!((MEM_P (from)
595 && ! MEM_VOLATILE_P (from)
596 && direct_load[(int) to_mode]
597 && ! mode_dependent_address_p (XEXP (from, 0)))
598 || REG_P (from)
599 || GET_CODE (from) == SUBREG))
600 from = force_reg (from_mode, from);
601 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
602 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
603 from = copy_to_reg (from);
604 emit_move_insn (to, gen_lowpart (to_mode, from));
605 return;
606 }
607
608 /* Handle extension. */
609 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
610 {
611 /* Convert directly if that works. */
612 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
613 != CODE_FOR_nothing)
614 {
615 emit_unop_insn (code, to, from, equiv_code);
616 return;
617 }
618 else
619 {
620 enum machine_mode intermediate;
621 rtx tmp;
622 int shift_amount;
623
624 /* Search for a mode to convert via. */
625 for (intermediate = from_mode; intermediate != VOIDmode;
626 intermediate = GET_MODE_WIDER_MODE (intermediate))
627 if (((can_extend_p (to_mode, intermediate, unsignedp)
628 != CODE_FOR_nothing)
629 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
630 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
631 && (can_extend_p (intermediate, from_mode, unsignedp)
632 != CODE_FOR_nothing))
633 {
634 convert_move (to, convert_to_mode (intermediate, from,
635 unsignedp), unsignedp);
636 return;
637 }
638
639 /* No suitable intermediate mode.
640 Generate what we need with shifts. */
641 shift_amount = (GET_MODE_PRECISION (to_mode)
642 - GET_MODE_PRECISION (from_mode));
643 from = gen_lowpart (to_mode, force_reg (from_mode, from));
644 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
645 to, unsignedp);
646 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
647 to, unsignedp);
648 if (tmp != to)
649 emit_move_insn (to, tmp);
650 return;
651 }
652 }
653
654 /* Support special truncate insns for certain modes. */
655 if (convert_optab_handler (trunc_optab, to_mode,
656 from_mode) != CODE_FOR_nothing)
657 {
658 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
659 to, from, UNKNOWN);
660 return;
661 }
662
663 /* Handle truncation of volatile memrefs, and so on;
664 the things that couldn't be truncated directly,
665 and for which there was no special instruction.
666
667 ??? Code above formerly short-circuited this, for most integer
668 mode pairs, with a force_reg in from_mode followed by a recursive
669 call to this routine. Appears always to have been wrong. */
670 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
671 {
672 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
673 emit_move_insn (to, temp);
674 return;
675 }
676
677 /* Mode combination is not recognized. */
678 gcc_unreachable ();
679 }
680
681 /* Return an rtx for a value that would result
682 from converting X to mode MODE.
683 Both X and MODE may be floating, or both integer.
684 UNSIGNEDP is nonzero if X is an unsigned value.
685 This can be done by referring to a part of X in place
686 or by copying to a new temporary with conversion. */
687
688 rtx
689 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
690 {
691 return convert_modes (mode, VOIDmode, x, unsignedp);
692 }
693
694 /* Return an rtx for a value that would result
695 from converting X from mode OLDMODE to mode MODE.
696 Both modes may be floating, or both integer.
697 UNSIGNEDP is nonzero if X is an unsigned value.
698
699 This can be done by referring to a part of X in place
700 or by copying to a new temporary with conversion.
701
702 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
703
704 rtx
705 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
706 {
707 rtx temp;
708
709 /* If FROM is a SUBREG that indicates that we have already done at least
710 the required extension, strip it. */
711
712 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
713 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
714 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
715 x = gen_lowpart (mode, x);
716
717 if (GET_MODE (x) != VOIDmode)
718 oldmode = GET_MODE (x);
719
720 if (mode == oldmode)
721 return x;
722
723 /* There is one case that we must handle specially: If we are converting
724 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
725 we are to interpret the constant as unsigned, gen_lowpart will do
726 the wrong if the constant appears negative. What we want to do is
727 make the high-order word of the constant zero, not all ones. */
728
729 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
730 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
731 && CONST_INT_P (x) && INTVAL (x) < 0)
732 {
733 double_int val = uhwi_to_double_int (INTVAL (x));
734
735 /* We need to zero extend VAL. */
736 if (oldmode != VOIDmode)
737 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
738
739 return immed_double_int_const (val, mode);
740 }
741
742 /* We can do this with a gen_lowpart if both desired and current modes
743 are integer, and this is either a constant integer, a register, or a
744 non-volatile MEM. Except for the constant case where MODE is no
745 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
746
747 if ((CONST_INT_P (x)
748 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
749 || (GET_MODE_CLASS (mode) == MODE_INT
750 && GET_MODE_CLASS (oldmode) == MODE_INT
751 && (GET_CODE (x) == CONST_DOUBLE
752 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
753 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
754 && direct_load[(int) mode])
755 || (REG_P (x)
756 && (! HARD_REGISTER_P (x)
757 || HARD_REGNO_MODE_OK (REGNO (x), mode))
758 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
759 GET_MODE (x))))))))
760 {
761 /* ?? If we don't know OLDMODE, we have to assume here that
762 X does not need sign- or zero-extension. This may not be
763 the case, but it's the best we can do. */
764 if (CONST_INT_P (x) && oldmode != VOIDmode
765 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
766 {
767 HOST_WIDE_INT val = INTVAL (x);
768
769 /* We must sign or zero-extend in this case. Start by
770 zero-extending, then sign extend if we need to. */
771 val &= GET_MODE_MASK (oldmode);
772 if (! unsignedp
773 && val_signbit_known_set_p (oldmode, val))
774 val |= ~GET_MODE_MASK (oldmode);
775
776 return gen_int_mode (val, mode);
777 }
778
779 return gen_lowpart (mode, x);
780 }
781
782 /* Converting from integer constant into mode is always equivalent to an
783 subreg operation. */
784 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
785 {
786 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
787 return simplify_gen_subreg (mode, x, oldmode, 0);
788 }
789
790 temp = gen_reg_rtx (mode);
791 convert_move (temp, x, unsignedp);
792 return temp;
793 }
794 \f
795 /* Return the largest alignment we can use for doing a move (or store)
796 of MAX_PIECES. ALIGN is the largest alignment we could use. */
797
798 static unsigned int
799 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
800 {
801 enum machine_mode tmode;
802
803 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
804 if (align >= GET_MODE_ALIGNMENT (tmode))
805 align = GET_MODE_ALIGNMENT (tmode);
806 else
807 {
808 enum machine_mode tmode, xmode;
809
810 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
811 tmode != VOIDmode;
812 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
813 if (GET_MODE_SIZE (tmode) > max_pieces
814 || SLOW_UNALIGNED_ACCESS (tmode, align))
815 break;
816
817 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
818 }
819
820 return align;
821 }
822
823 /* Return the widest integer mode no wider than SIZE. If no such mode
824 can be found, return VOIDmode. */
825
826 static enum machine_mode
827 widest_int_mode_for_size (unsigned int size)
828 {
829 enum machine_mode tmode, mode = VOIDmode;
830
831 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
832 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
833 if (GET_MODE_SIZE (tmode) < size)
834 mode = tmode;
835
836 return mode;
837 }
838
839 /* STORE_MAX_PIECES is the number of bytes at a time that we can
840 store efficiently. Due to internal GCC limitations, this is
841 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
842 for an immediate constant. */
843
844 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
845
846 /* Determine whether the LEN bytes can be moved by using several move
847 instructions. Return nonzero if a call to move_by_pieces should
848 succeed. */
849
850 int
851 can_move_by_pieces (unsigned HOST_WIDE_INT len,
852 unsigned int align ATTRIBUTE_UNUSED)
853 {
854 return MOVE_BY_PIECES_P (len, align);
855 }
856
857 /* Generate several move instructions to copy LEN bytes from block FROM to
858 block TO. (These are MEM rtx's with BLKmode).
859
860 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
861 used to push FROM to the stack.
862
863 ALIGN is maximum stack alignment we can assume.
864
865 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
866 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
867 stpcpy. */
868
869 rtx
870 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
871 unsigned int align, int endp)
872 {
873 struct move_by_pieces_d data;
874 enum machine_mode to_addr_mode, from_addr_mode
875 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
876 rtx to_addr, from_addr = XEXP (from, 0);
877 unsigned int max_size = MOVE_MAX_PIECES + 1;
878 enum insn_code icode;
879
880 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
881
882 data.offset = 0;
883 data.from_addr = from_addr;
884 if (to)
885 {
886 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
887 to_addr = XEXP (to, 0);
888 data.to = to;
889 data.autinc_to
890 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
891 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
892 data.reverse
893 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
894 }
895 else
896 {
897 to_addr_mode = VOIDmode;
898 to_addr = NULL_RTX;
899 data.to = NULL_RTX;
900 data.autinc_to = 1;
901 #ifdef STACK_GROWS_DOWNWARD
902 data.reverse = 1;
903 #else
904 data.reverse = 0;
905 #endif
906 }
907 data.to_addr = to_addr;
908 data.from = from;
909 data.autinc_from
910 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
911 || GET_CODE (from_addr) == POST_INC
912 || GET_CODE (from_addr) == POST_DEC);
913
914 data.explicit_inc_from = 0;
915 data.explicit_inc_to = 0;
916 if (data.reverse) data.offset = len;
917 data.len = len;
918
919 /* If copying requires more than two move insns,
920 copy addresses to registers (to make displacements shorter)
921 and use post-increment if available. */
922 if (!(data.autinc_from && data.autinc_to)
923 && move_by_pieces_ninsns (len, align, max_size) > 2)
924 {
925 /* Find the mode of the largest move...
926 MODE might not be used depending on the definitions of the
927 USE_* macros below. */
928 enum machine_mode mode ATTRIBUTE_UNUSED
929 = widest_int_mode_for_size (max_size);
930
931 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
932 {
933 data.from_addr = copy_to_mode_reg (from_addr_mode,
934 plus_constant (from_addr, len));
935 data.autinc_from = 1;
936 data.explicit_inc_from = -1;
937 }
938 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
939 {
940 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
941 data.autinc_from = 1;
942 data.explicit_inc_from = 1;
943 }
944 if (!data.autinc_from && CONSTANT_P (from_addr))
945 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
946 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
947 {
948 data.to_addr = copy_to_mode_reg (to_addr_mode,
949 plus_constant (to_addr, len));
950 data.autinc_to = 1;
951 data.explicit_inc_to = -1;
952 }
953 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
954 {
955 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
956 data.autinc_to = 1;
957 data.explicit_inc_to = 1;
958 }
959 if (!data.autinc_to && CONSTANT_P (to_addr))
960 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
961 }
962
963 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
964
965 /* First move what we can in the largest integer mode, then go to
966 successively smaller modes. */
967
968 while (max_size > 1)
969 {
970 enum machine_mode mode = widest_int_mode_for_size (max_size);
971
972 if (mode == VOIDmode)
973 break;
974
975 icode = optab_handler (mov_optab, mode);
976 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
977 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
978
979 max_size = GET_MODE_SIZE (mode);
980 }
981
982 /* The code above should have handled everything. */
983 gcc_assert (!data.len);
984
985 if (endp)
986 {
987 rtx to1;
988
989 gcc_assert (!data.reverse);
990 if (data.autinc_to)
991 {
992 if (endp == 2)
993 {
994 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
995 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
996 else
997 data.to_addr = copy_to_mode_reg (to_addr_mode,
998 plus_constant (data.to_addr,
999 -1));
1000 }
1001 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
1002 data.offset);
1003 }
1004 else
1005 {
1006 if (endp == 2)
1007 --data.offset;
1008 to1 = adjust_address (data.to, QImode, data.offset);
1009 }
1010 return to1;
1011 }
1012 else
1013 return data.to;
1014 }
1015
1016 /* Return number of insns required to move L bytes by pieces.
1017 ALIGN (in bits) is maximum alignment we can assume. */
1018
1019 static unsigned HOST_WIDE_INT
1020 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1021 unsigned int max_size)
1022 {
1023 unsigned HOST_WIDE_INT n_insns = 0;
1024
1025 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1026
1027 while (max_size > 1)
1028 {
1029 enum machine_mode mode;
1030 enum insn_code icode;
1031
1032 mode = widest_int_mode_for_size (max_size);
1033
1034 if (mode == VOIDmode)
1035 break;
1036
1037 icode = optab_handler (mov_optab, mode);
1038 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1039 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1040
1041 max_size = GET_MODE_SIZE (mode);
1042 }
1043
1044 gcc_assert (!l);
1045 return n_insns;
1046 }
1047
1048 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1049 with move instructions for mode MODE. GENFUN is the gen_... function
1050 to make a move insn for that mode. DATA has all the other info. */
1051
1052 static void
1053 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1054 struct move_by_pieces_d *data)
1055 {
1056 unsigned int size = GET_MODE_SIZE (mode);
1057 rtx to1 = NULL_RTX, from1;
1058
1059 while (data->len >= size)
1060 {
1061 if (data->reverse)
1062 data->offset -= size;
1063
1064 if (data->to)
1065 {
1066 if (data->autinc_to)
1067 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1068 data->offset);
1069 else
1070 to1 = adjust_address (data->to, mode, data->offset);
1071 }
1072
1073 if (data->autinc_from)
1074 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1075 data->offset);
1076 else
1077 from1 = adjust_address (data->from, mode, data->offset);
1078
1079 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1080 emit_insn (gen_add2_insn (data->to_addr,
1081 GEN_INT (-(HOST_WIDE_INT)size)));
1082 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1083 emit_insn (gen_add2_insn (data->from_addr,
1084 GEN_INT (-(HOST_WIDE_INT)size)));
1085
1086 if (data->to)
1087 emit_insn ((*genfun) (to1, from1));
1088 else
1089 {
1090 #ifdef PUSH_ROUNDING
1091 emit_single_push_insn (mode, from1, NULL);
1092 #else
1093 gcc_unreachable ();
1094 #endif
1095 }
1096
1097 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1098 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1099 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1100 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1101
1102 if (! data->reverse)
1103 data->offset += size;
1104
1105 data->len -= size;
1106 }
1107 }
1108 \f
1109 /* Emit code to move a block Y to a block X. This may be done with
1110 string-move instructions, with multiple scalar move instructions,
1111 or with a library call.
1112
1113 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1114 SIZE is an rtx that says how long they are.
1115 ALIGN is the maximum alignment we can assume they have.
1116 METHOD describes what kind of copy this is, and what mechanisms may be used.
1117
1118 Return the address of the new block, if memcpy is called and returns it,
1119 0 otherwise. */
1120
1121 rtx
1122 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1123 unsigned int expected_align, HOST_WIDE_INT expected_size)
1124 {
1125 bool may_use_call;
1126 rtx retval = 0;
1127 unsigned int align;
1128
1129 gcc_assert (size);
1130 if (CONST_INT_P (size)
1131 && INTVAL (size) == 0)
1132 return 0;
1133
1134 switch (method)
1135 {
1136 case BLOCK_OP_NORMAL:
1137 case BLOCK_OP_TAILCALL:
1138 may_use_call = true;
1139 break;
1140
1141 case BLOCK_OP_CALL_PARM:
1142 may_use_call = block_move_libcall_safe_for_call_parm ();
1143
1144 /* Make inhibit_defer_pop nonzero around the library call
1145 to force it to pop the arguments right away. */
1146 NO_DEFER_POP;
1147 break;
1148
1149 case BLOCK_OP_NO_LIBCALL:
1150 may_use_call = false;
1151 break;
1152
1153 default:
1154 gcc_unreachable ();
1155 }
1156
1157 gcc_assert (MEM_P (x) && MEM_P (y));
1158 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1159 gcc_assert (align >= BITS_PER_UNIT);
1160
1161 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1162 block copy is more efficient for other large modes, e.g. DCmode. */
1163 x = adjust_address (x, BLKmode, 0);
1164 y = adjust_address (y, BLKmode, 0);
1165
1166 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1167 can be incorrect is coming from __builtin_memcpy. */
1168 if (CONST_INT_P (size))
1169 {
1170 x = shallow_copy_rtx (x);
1171 y = shallow_copy_rtx (y);
1172 set_mem_size (x, INTVAL (size));
1173 set_mem_size (y, INTVAL (size));
1174 }
1175
1176 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1177 move_by_pieces (x, y, INTVAL (size), align, 0);
1178 else if (emit_block_move_via_movmem (x, y, size, align,
1179 expected_align, expected_size))
1180 ;
1181 else if (may_use_call
1182 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1183 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1184 {
1185 /* Since x and y are passed to a libcall, mark the corresponding
1186 tree EXPR as addressable. */
1187 tree y_expr = MEM_EXPR (y);
1188 tree x_expr = MEM_EXPR (x);
1189 if (y_expr)
1190 mark_addressable (y_expr);
1191 if (x_expr)
1192 mark_addressable (x_expr);
1193 retval = emit_block_move_via_libcall (x, y, size,
1194 method == BLOCK_OP_TAILCALL);
1195 }
1196
1197 else
1198 emit_block_move_via_loop (x, y, size, align);
1199
1200 if (method == BLOCK_OP_CALL_PARM)
1201 OK_DEFER_POP;
1202
1203 return retval;
1204 }
1205
1206 rtx
1207 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1208 {
1209 return emit_block_move_hints (x, y, size, method, 0, -1);
1210 }
1211
1212 /* A subroutine of emit_block_move. Returns true if calling the
1213 block move libcall will not clobber any parameters which may have
1214 already been placed on the stack. */
1215
1216 static bool
1217 block_move_libcall_safe_for_call_parm (void)
1218 {
1219 #if defined (REG_PARM_STACK_SPACE)
1220 tree fn;
1221 #endif
1222
1223 /* If arguments are pushed on the stack, then they're safe. */
1224 if (PUSH_ARGS)
1225 return true;
1226
1227 /* If registers go on the stack anyway, any argument is sure to clobber
1228 an outgoing argument. */
1229 #if defined (REG_PARM_STACK_SPACE)
1230 fn = emit_block_move_libcall_fn (false);
1231 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1232 depend on its argument. */
1233 (void) fn;
1234 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1235 && REG_PARM_STACK_SPACE (fn) != 0)
1236 return false;
1237 #endif
1238
1239 /* If any argument goes in memory, then it might clobber an outgoing
1240 argument. */
1241 {
1242 CUMULATIVE_ARGS args_so_far_v;
1243 cumulative_args_t args_so_far;
1244 tree fn, arg;
1245
1246 fn = emit_block_move_libcall_fn (false);
1247 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1248 args_so_far = pack_cumulative_args (&args_so_far_v);
1249
1250 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1251 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1252 {
1253 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1254 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1255 NULL_TREE, true);
1256 if (!tmp || !REG_P (tmp))
1257 return false;
1258 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1259 return false;
1260 targetm.calls.function_arg_advance (args_so_far, mode,
1261 NULL_TREE, true);
1262 }
1263 }
1264 return true;
1265 }
1266
1267 /* A subroutine of emit_block_move. Expand a movmem pattern;
1268 return true if successful. */
1269
1270 static bool
1271 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1272 unsigned int expected_align, HOST_WIDE_INT expected_size)
1273 {
1274 int save_volatile_ok = volatile_ok;
1275 enum machine_mode mode;
1276
1277 if (expected_align < align)
1278 expected_align = align;
1279
1280 /* Since this is a move insn, we don't care about volatility. */
1281 volatile_ok = 1;
1282
1283 /* Try the most limited insn first, because there's no point
1284 including more than one in the machine description unless
1285 the more limited one has some advantage. */
1286
1287 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1288 mode = GET_MODE_WIDER_MODE (mode))
1289 {
1290 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1291
1292 if (code != CODE_FOR_nothing
1293 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1294 here because if SIZE is less than the mode mask, as it is
1295 returned by the macro, it will definitely be less than the
1296 actual mode mask. */
1297 && ((CONST_INT_P (size)
1298 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1299 <= (GET_MODE_MASK (mode) >> 1)))
1300 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1301 {
1302 struct expand_operand ops[6];
1303 unsigned int nops;
1304
1305 /* ??? When called via emit_block_move_for_call, it'd be
1306 nice if there were some way to inform the backend, so
1307 that it doesn't fail the expansion because it thinks
1308 emitting the libcall would be more efficient. */
1309 nops = insn_data[(int) code].n_generator_args;
1310 gcc_assert (nops == 4 || nops == 6);
1311
1312 create_fixed_operand (&ops[0], x);
1313 create_fixed_operand (&ops[1], y);
1314 /* The check above guarantees that this size conversion is valid. */
1315 create_convert_operand_to (&ops[2], size, mode, true);
1316 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1317 if (nops == 6)
1318 {
1319 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1320 create_integer_operand (&ops[5], expected_size);
1321 }
1322 if (maybe_expand_insn (code, nops, ops))
1323 {
1324 volatile_ok = save_volatile_ok;
1325 return true;
1326 }
1327 }
1328 }
1329
1330 volatile_ok = save_volatile_ok;
1331 return false;
1332 }
1333
1334 /* A subroutine of emit_block_move. Expand a call to memcpy.
1335 Return the return value from memcpy, 0 otherwise. */
1336
1337 rtx
1338 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1339 {
1340 rtx dst_addr, src_addr;
1341 tree call_expr, fn, src_tree, dst_tree, size_tree;
1342 enum machine_mode size_mode;
1343 rtx retval;
1344
1345 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1346 pseudos. We can then place those new pseudos into a VAR_DECL and
1347 use them later. */
1348
1349 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1350 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1351
1352 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1353 src_addr = convert_memory_address (ptr_mode, src_addr);
1354
1355 dst_tree = make_tree (ptr_type_node, dst_addr);
1356 src_tree = make_tree (ptr_type_node, src_addr);
1357
1358 size_mode = TYPE_MODE (sizetype);
1359
1360 size = convert_to_mode (size_mode, size, 1);
1361 size = copy_to_mode_reg (size_mode, size);
1362
1363 /* It is incorrect to use the libcall calling conventions to call
1364 memcpy in this context. This could be a user call to memcpy and
1365 the user may wish to examine the return value from memcpy. For
1366 targets where libcalls and normal calls have different conventions
1367 for returning pointers, we could end up generating incorrect code. */
1368
1369 size_tree = make_tree (sizetype, size);
1370
1371 fn = emit_block_move_libcall_fn (true);
1372 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1373 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1374
1375 retval = expand_normal (call_expr);
1376
1377 return retval;
1378 }
1379
1380 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1381 for the function we use for block copies. The first time FOR_CALL
1382 is true, we call assemble_external. */
1383
1384 static GTY(()) tree block_move_fn;
1385
1386 void
1387 init_block_move_fn (const char *asmspec)
1388 {
1389 if (!block_move_fn)
1390 {
1391 tree args, fn;
1392
1393 fn = get_identifier ("memcpy");
1394 args = build_function_type_list (ptr_type_node, ptr_type_node,
1395 const_ptr_type_node, sizetype,
1396 NULL_TREE);
1397
1398 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1399 DECL_EXTERNAL (fn) = 1;
1400 TREE_PUBLIC (fn) = 1;
1401 DECL_ARTIFICIAL (fn) = 1;
1402 TREE_NOTHROW (fn) = 1;
1403 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1404 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1405
1406 block_move_fn = fn;
1407 }
1408
1409 if (asmspec)
1410 set_user_assembler_name (block_move_fn, asmspec);
1411 }
1412
1413 static tree
1414 emit_block_move_libcall_fn (int for_call)
1415 {
1416 static bool emitted_extern;
1417
1418 if (!block_move_fn)
1419 init_block_move_fn (NULL);
1420
1421 if (for_call && !emitted_extern)
1422 {
1423 emitted_extern = true;
1424 make_decl_rtl (block_move_fn);
1425 assemble_external (block_move_fn);
1426 }
1427
1428 return block_move_fn;
1429 }
1430
1431 /* A subroutine of emit_block_move. Copy the data via an explicit
1432 loop. This is used only when libcalls are forbidden. */
1433 /* ??? It'd be nice to copy in hunks larger than QImode. */
1434
1435 static void
1436 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1437 unsigned int align ATTRIBUTE_UNUSED)
1438 {
1439 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1440 enum machine_mode x_addr_mode
1441 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1442 enum machine_mode y_addr_mode
1443 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1444 enum machine_mode iter_mode;
1445
1446 iter_mode = GET_MODE (size);
1447 if (iter_mode == VOIDmode)
1448 iter_mode = word_mode;
1449
1450 top_label = gen_label_rtx ();
1451 cmp_label = gen_label_rtx ();
1452 iter = gen_reg_rtx (iter_mode);
1453
1454 emit_move_insn (iter, const0_rtx);
1455
1456 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1457 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1458 do_pending_stack_adjust ();
1459
1460 emit_jump (cmp_label);
1461 emit_label (top_label);
1462
1463 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1464 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1465
1466 if (x_addr_mode != y_addr_mode)
1467 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1468 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1469
1470 x = change_address (x, QImode, x_addr);
1471 y = change_address (y, QImode, y_addr);
1472
1473 emit_move_insn (x, y);
1474
1475 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1476 true, OPTAB_LIB_WIDEN);
1477 if (tmp != iter)
1478 emit_move_insn (iter, tmp);
1479
1480 emit_label (cmp_label);
1481
1482 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1483 true, top_label);
1484 }
1485 \f
1486 /* Copy all or part of a value X into registers starting at REGNO.
1487 The number of registers to be filled is NREGS. */
1488
1489 void
1490 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1491 {
1492 int i;
1493 #ifdef HAVE_load_multiple
1494 rtx pat;
1495 rtx last;
1496 #endif
1497
1498 if (nregs == 0)
1499 return;
1500
1501 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1502 x = validize_mem (force_const_mem (mode, x));
1503
1504 /* See if the machine can do this with a load multiple insn. */
1505 #ifdef HAVE_load_multiple
1506 if (HAVE_load_multiple)
1507 {
1508 last = get_last_insn ();
1509 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1510 GEN_INT (nregs));
1511 if (pat)
1512 {
1513 emit_insn (pat);
1514 return;
1515 }
1516 else
1517 delete_insns_since (last);
1518 }
1519 #endif
1520
1521 for (i = 0; i < nregs; i++)
1522 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1523 operand_subword_force (x, i, mode));
1524 }
1525
1526 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1527 The number of registers to be filled is NREGS. */
1528
1529 void
1530 move_block_from_reg (int regno, rtx x, int nregs)
1531 {
1532 int i;
1533
1534 if (nregs == 0)
1535 return;
1536
1537 /* See if the machine can do this with a store multiple insn. */
1538 #ifdef HAVE_store_multiple
1539 if (HAVE_store_multiple)
1540 {
1541 rtx last = get_last_insn ();
1542 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1543 GEN_INT (nregs));
1544 if (pat)
1545 {
1546 emit_insn (pat);
1547 return;
1548 }
1549 else
1550 delete_insns_since (last);
1551 }
1552 #endif
1553
1554 for (i = 0; i < nregs; i++)
1555 {
1556 rtx tem = operand_subword (x, i, 1, BLKmode);
1557
1558 gcc_assert (tem);
1559
1560 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1561 }
1562 }
1563
1564 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1565 ORIG, where ORIG is a non-consecutive group of registers represented by
1566 a PARALLEL. The clone is identical to the original except in that the
1567 original set of registers is replaced by a new set of pseudo registers.
1568 The new set has the same modes as the original set. */
1569
1570 rtx
1571 gen_group_rtx (rtx orig)
1572 {
1573 int i, length;
1574 rtx *tmps;
1575
1576 gcc_assert (GET_CODE (orig) == PARALLEL);
1577
1578 length = XVECLEN (orig, 0);
1579 tmps = XALLOCAVEC (rtx, length);
1580
1581 /* Skip a NULL entry in first slot. */
1582 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1583
1584 if (i)
1585 tmps[0] = 0;
1586
1587 for (; i < length; i++)
1588 {
1589 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1590 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1591
1592 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1593 }
1594
1595 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1596 }
1597
1598 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1599 except that values are placed in TMPS[i], and must later be moved
1600 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1601
1602 static void
1603 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1604 {
1605 rtx src;
1606 int start, i;
1607 enum machine_mode m = GET_MODE (orig_src);
1608
1609 gcc_assert (GET_CODE (dst) == PARALLEL);
1610
1611 if (m != VOIDmode
1612 && !SCALAR_INT_MODE_P (m)
1613 && !MEM_P (orig_src)
1614 && GET_CODE (orig_src) != CONCAT)
1615 {
1616 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1617 if (imode == BLKmode)
1618 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1619 else
1620 src = gen_reg_rtx (imode);
1621 if (imode != BLKmode)
1622 src = gen_lowpart (GET_MODE (orig_src), src);
1623 emit_move_insn (src, orig_src);
1624 /* ...and back again. */
1625 if (imode != BLKmode)
1626 src = gen_lowpart (imode, src);
1627 emit_group_load_1 (tmps, dst, src, type, ssize);
1628 return;
1629 }
1630
1631 /* Check for a NULL entry, used to indicate that the parameter goes
1632 both on the stack and in registers. */
1633 if (XEXP (XVECEXP (dst, 0, 0), 0))
1634 start = 0;
1635 else
1636 start = 1;
1637
1638 /* Process the pieces. */
1639 for (i = start; i < XVECLEN (dst, 0); i++)
1640 {
1641 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1642 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1643 unsigned int bytelen = GET_MODE_SIZE (mode);
1644 int shift = 0;
1645
1646 /* Handle trailing fragments that run over the size of the struct. */
1647 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1648 {
1649 /* Arrange to shift the fragment to where it belongs.
1650 extract_bit_field loads to the lsb of the reg. */
1651 if (
1652 #ifdef BLOCK_REG_PADDING
1653 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1654 == (BYTES_BIG_ENDIAN ? upward : downward)
1655 #else
1656 BYTES_BIG_ENDIAN
1657 #endif
1658 )
1659 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1660 bytelen = ssize - bytepos;
1661 gcc_assert (bytelen > 0);
1662 }
1663
1664 /* If we won't be loading directly from memory, protect the real source
1665 from strange tricks we might play; but make sure that the source can
1666 be loaded directly into the destination. */
1667 src = orig_src;
1668 if (!MEM_P (orig_src)
1669 && (!CONSTANT_P (orig_src)
1670 || (GET_MODE (orig_src) != mode
1671 && GET_MODE (orig_src) != VOIDmode)))
1672 {
1673 if (GET_MODE (orig_src) == VOIDmode)
1674 src = gen_reg_rtx (mode);
1675 else
1676 src = gen_reg_rtx (GET_MODE (orig_src));
1677
1678 emit_move_insn (src, orig_src);
1679 }
1680
1681 /* Optimize the access just a bit. */
1682 if (MEM_P (src)
1683 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1684 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1685 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1686 && bytelen == GET_MODE_SIZE (mode))
1687 {
1688 tmps[i] = gen_reg_rtx (mode);
1689 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1690 }
1691 else if (COMPLEX_MODE_P (mode)
1692 && GET_MODE (src) == mode
1693 && bytelen == GET_MODE_SIZE (mode))
1694 /* Let emit_move_complex do the bulk of the work. */
1695 tmps[i] = src;
1696 else if (GET_CODE (src) == CONCAT)
1697 {
1698 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1699 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1700
1701 if ((bytepos == 0 && bytelen == slen0)
1702 || (bytepos != 0 && bytepos + bytelen <= slen))
1703 {
1704 /* The following assumes that the concatenated objects all
1705 have the same size. In this case, a simple calculation
1706 can be used to determine the object and the bit field
1707 to be extracted. */
1708 tmps[i] = XEXP (src, bytepos / slen0);
1709 if (! CONSTANT_P (tmps[i])
1710 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1711 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1712 (bytepos % slen0) * BITS_PER_UNIT,
1713 1, false, NULL_RTX, mode, mode);
1714 }
1715 else
1716 {
1717 rtx mem;
1718
1719 gcc_assert (!bytepos);
1720 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1721 emit_move_insn (mem, src);
1722 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1723 0, 1, false, NULL_RTX, mode, mode);
1724 }
1725 }
1726 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1727 SIMD register, which is currently broken. While we get GCC
1728 to emit proper RTL for these cases, let's dump to memory. */
1729 else if (VECTOR_MODE_P (GET_MODE (dst))
1730 && REG_P (src))
1731 {
1732 int slen = GET_MODE_SIZE (GET_MODE (src));
1733 rtx mem;
1734
1735 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1736 emit_move_insn (mem, src);
1737 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1738 }
1739 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1740 && XVECLEN (dst, 0) > 1)
1741 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1742 else if (CONSTANT_P (src))
1743 {
1744 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1745
1746 if (len == ssize)
1747 tmps[i] = src;
1748 else
1749 {
1750 rtx first, second;
1751
1752 gcc_assert (2 * len == ssize);
1753 split_double (src, &first, &second);
1754 if (i)
1755 tmps[i] = second;
1756 else
1757 tmps[i] = first;
1758 }
1759 }
1760 else if (REG_P (src) && GET_MODE (src) == mode)
1761 tmps[i] = src;
1762 else
1763 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1764 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1765 mode, mode);
1766
1767 if (shift)
1768 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1769 shift, tmps[i], 0);
1770 }
1771 }
1772
1773 /* Emit code to move a block SRC of type TYPE to a block DST,
1774 where DST is non-consecutive registers represented by a PARALLEL.
1775 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1776 if not known. */
1777
1778 void
1779 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1780 {
1781 rtx *tmps;
1782 int i;
1783
1784 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1785 emit_group_load_1 (tmps, dst, src, type, ssize);
1786
1787 /* Copy the extracted pieces into the proper (probable) hard regs. */
1788 for (i = 0; i < XVECLEN (dst, 0); i++)
1789 {
1790 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1791 if (d == NULL)
1792 continue;
1793 emit_move_insn (d, tmps[i]);
1794 }
1795 }
1796
1797 /* Similar, but load SRC into new pseudos in a format that looks like
1798 PARALLEL. This can later be fed to emit_group_move to get things
1799 in the right place. */
1800
1801 rtx
1802 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1803 {
1804 rtvec vec;
1805 int i;
1806
1807 vec = rtvec_alloc (XVECLEN (parallel, 0));
1808 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1809
1810 /* Convert the vector to look just like the original PARALLEL, except
1811 with the computed values. */
1812 for (i = 0; i < XVECLEN (parallel, 0); i++)
1813 {
1814 rtx e = XVECEXP (parallel, 0, i);
1815 rtx d = XEXP (e, 0);
1816
1817 if (d)
1818 {
1819 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1820 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1821 }
1822 RTVEC_ELT (vec, i) = e;
1823 }
1824
1825 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1826 }
1827
1828 /* Emit code to move a block SRC to block DST, where SRC and DST are
1829 non-consecutive groups of registers, each represented by a PARALLEL. */
1830
1831 void
1832 emit_group_move (rtx dst, rtx src)
1833 {
1834 int i;
1835
1836 gcc_assert (GET_CODE (src) == PARALLEL
1837 && GET_CODE (dst) == PARALLEL
1838 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1839
1840 /* Skip first entry if NULL. */
1841 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1842 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1843 XEXP (XVECEXP (src, 0, i), 0));
1844 }
1845
1846 /* Move a group of registers represented by a PARALLEL into pseudos. */
1847
1848 rtx
1849 emit_group_move_into_temps (rtx src)
1850 {
1851 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1852 int i;
1853
1854 for (i = 0; i < XVECLEN (src, 0); i++)
1855 {
1856 rtx e = XVECEXP (src, 0, i);
1857 rtx d = XEXP (e, 0);
1858
1859 if (d)
1860 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1861 RTVEC_ELT (vec, i) = e;
1862 }
1863
1864 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1865 }
1866
1867 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1868 where SRC is non-consecutive registers represented by a PARALLEL.
1869 SSIZE represents the total size of block ORIG_DST, or -1 if not
1870 known. */
1871
1872 void
1873 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1874 {
1875 rtx *tmps, dst;
1876 int start, finish, i;
1877 enum machine_mode m = GET_MODE (orig_dst);
1878
1879 gcc_assert (GET_CODE (src) == PARALLEL);
1880
1881 if (!SCALAR_INT_MODE_P (m)
1882 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1883 {
1884 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1885 if (imode == BLKmode)
1886 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1887 else
1888 dst = gen_reg_rtx (imode);
1889 emit_group_store (dst, src, type, ssize);
1890 if (imode != BLKmode)
1891 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1892 emit_move_insn (orig_dst, dst);
1893 return;
1894 }
1895
1896 /* Check for a NULL entry, used to indicate that the parameter goes
1897 both on the stack and in registers. */
1898 if (XEXP (XVECEXP (src, 0, 0), 0))
1899 start = 0;
1900 else
1901 start = 1;
1902 finish = XVECLEN (src, 0);
1903
1904 tmps = XALLOCAVEC (rtx, finish);
1905
1906 /* Copy the (probable) hard regs into pseudos. */
1907 for (i = start; i < finish; i++)
1908 {
1909 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1910 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1911 {
1912 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1913 emit_move_insn (tmps[i], reg);
1914 }
1915 else
1916 tmps[i] = reg;
1917 }
1918
1919 /* If we won't be storing directly into memory, protect the real destination
1920 from strange tricks we might play. */
1921 dst = orig_dst;
1922 if (GET_CODE (dst) == PARALLEL)
1923 {
1924 rtx temp;
1925
1926 /* We can get a PARALLEL dst if there is a conditional expression in
1927 a return statement. In that case, the dst and src are the same,
1928 so no action is necessary. */
1929 if (rtx_equal_p (dst, src))
1930 return;
1931
1932 /* It is unclear if we can ever reach here, but we may as well handle
1933 it. Allocate a temporary, and split this into a store/load to/from
1934 the temporary. */
1935
1936 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1937 emit_group_store (temp, src, type, ssize);
1938 emit_group_load (dst, temp, type, ssize);
1939 return;
1940 }
1941 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1942 {
1943 enum machine_mode outer = GET_MODE (dst);
1944 enum machine_mode inner;
1945 HOST_WIDE_INT bytepos;
1946 bool done = false;
1947 rtx temp;
1948
1949 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1950 dst = gen_reg_rtx (outer);
1951
1952 /* Make life a bit easier for combine. */
1953 /* If the first element of the vector is the low part
1954 of the destination mode, use a paradoxical subreg to
1955 initialize the destination. */
1956 if (start < finish)
1957 {
1958 inner = GET_MODE (tmps[start]);
1959 bytepos = subreg_lowpart_offset (inner, outer);
1960 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1961 {
1962 temp = simplify_gen_subreg (outer, tmps[start],
1963 inner, 0);
1964 if (temp)
1965 {
1966 emit_move_insn (dst, temp);
1967 done = true;
1968 start++;
1969 }
1970 }
1971 }
1972
1973 /* If the first element wasn't the low part, try the last. */
1974 if (!done
1975 && start < finish - 1)
1976 {
1977 inner = GET_MODE (tmps[finish - 1]);
1978 bytepos = subreg_lowpart_offset (inner, outer);
1979 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1980 {
1981 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1982 inner, 0);
1983 if (temp)
1984 {
1985 emit_move_insn (dst, temp);
1986 done = true;
1987 finish--;
1988 }
1989 }
1990 }
1991
1992 /* Otherwise, simply initialize the result to zero. */
1993 if (!done)
1994 emit_move_insn (dst, CONST0_RTX (outer));
1995 }
1996
1997 /* Process the pieces. */
1998 for (i = start; i < finish; i++)
1999 {
2000 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2001 enum machine_mode mode = GET_MODE (tmps[i]);
2002 unsigned int bytelen = GET_MODE_SIZE (mode);
2003 unsigned int adj_bytelen = bytelen;
2004 rtx dest = dst;
2005
2006 /* Handle trailing fragments that run over the size of the struct. */
2007 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2008 adj_bytelen = ssize - bytepos;
2009
2010 if (GET_CODE (dst) == CONCAT)
2011 {
2012 if (bytepos + adj_bytelen
2013 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2014 dest = XEXP (dst, 0);
2015 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2016 {
2017 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2018 dest = XEXP (dst, 1);
2019 }
2020 else
2021 {
2022 enum machine_mode dest_mode = GET_MODE (dest);
2023 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2024
2025 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2026
2027 if (GET_MODE_ALIGNMENT (dest_mode)
2028 >= GET_MODE_ALIGNMENT (tmp_mode))
2029 {
2030 dest = assign_stack_temp (dest_mode,
2031 GET_MODE_SIZE (dest_mode),
2032 0);
2033 emit_move_insn (adjust_address (dest,
2034 tmp_mode,
2035 bytepos),
2036 tmps[i]);
2037 dst = dest;
2038 }
2039 else
2040 {
2041 dest = assign_stack_temp (tmp_mode,
2042 GET_MODE_SIZE (tmp_mode),
2043 0);
2044 emit_move_insn (dest, tmps[i]);
2045 dst = adjust_address (dest, dest_mode, bytepos);
2046 }
2047 break;
2048 }
2049 }
2050
2051 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2052 {
2053 /* store_bit_field always takes its value from the lsb.
2054 Move the fragment to the lsb if it's not already there. */
2055 if (
2056 #ifdef BLOCK_REG_PADDING
2057 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2058 == (BYTES_BIG_ENDIAN ? upward : downward)
2059 #else
2060 BYTES_BIG_ENDIAN
2061 #endif
2062 )
2063 {
2064 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2065 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2066 shift, tmps[i], 0);
2067 }
2068 bytelen = adj_bytelen;
2069 }
2070
2071 /* Optimize the access just a bit. */
2072 if (MEM_P (dest)
2073 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2074 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2075 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2076 && bytelen == GET_MODE_SIZE (mode))
2077 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2078 else
2079 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2080 0, 0, mode, tmps[i]);
2081 }
2082
2083 /* Copy from the pseudo into the (probable) hard reg. */
2084 if (orig_dst != dst)
2085 emit_move_insn (orig_dst, dst);
2086 }
2087
2088 /* Generate code to copy a BLKmode object of TYPE out of a
2089 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2090 is null, a stack temporary is created. TGTBLK is returned.
2091
2092 The purpose of this routine is to handle functions that return
2093 BLKmode structures in registers. Some machines (the PA for example)
2094 want to return all small structures in registers regardless of the
2095 structure's alignment. */
2096
2097 rtx
2098 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2099 {
2100 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2101 rtx src = NULL, dst = NULL;
2102 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2103 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2104 enum machine_mode copy_mode;
2105
2106 if (tgtblk == 0)
2107 {
2108 tgtblk = assign_temp (build_qualified_type (type,
2109 (TYPE_QUALS (type)
2110 | TYPE_QUAL_CONST)),
2111 0, 1, 1);
2112 preserve_temp_slots (tgtblk);
2113 }
2114
2115 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2116 into a new pseudo which is a full word. */
2117
2118 if (GET_MODE (srcreg) != BLKmode
2119 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2120 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2121
2122 /* If the structure doesn't take up a whole number of words, see whether
2123 SRCREG is padded on the left or on the right. If it's on the left,
2124 set PADDING_CORRECTION to the number of bits to skip.
2125
2126 In most ABIs, the structure will be returned at the least end of
2127 the register, which translates to right padding on little-endian
2128 targets and left padding on big-endian targets. The opposite
2129 holds if the structure is returned at the most significant
2130 end of the register. */
2131 if (bytes % UNITS_PER_WORD != 0
2132 && (targetm.calls.return_in_msb (type)
2133 ? !BYTES_BIG_ENDIAN
2134 : BYTES_BIG_ENDIAN))
2135 padding_correction
2136 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2137
2138 /* Copy the structure BITSIZE bits at a time. If the target lives in
2139 memory, take care of not reading/writing past its end by selecting
2140 a copy mode suited to BITSIZE. This should always be possible given
2141 how it is computed.
2142
2143 We could probably emit more efficient code for machines which do not use
2144 strict alignment, but it doesn't seem worth the effort at the current
2145 time. */
2146
2147 copy_mode = word_mode;
2148 if (MEM_P (tgtblk))
2149 {
2150 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2151 if (mem_mode != BLKmode)
2152 copy_mode = mem_mode;
2153 }
2154
2155 for (bitpos = 0, xbitpos = padding_correction;
2156 bitpos < bytes * BITS_PER_UNIT;
2157 bitpos += bitsize, xbitpos += bitsize)
2158 {
2159 /* We need a new source operand each time xbitpos is on a
2160 word boundary and when xbitpos == padding_correction
2161 (the first time through). */
2162 if (xbitpos % BITS_PER_WORD == 0
2163 || xbitpos == padding_correction)
2164 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2165 GET_MODE (srcreg));
2166
2167 /* We need a new destination operand each time bitpos is on
2168 a word boundary. */
2169 if (bitpos % BITS_PER_WORD == 0)
2170 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2171
2172 /* Use xbitpos for the source extraction (right justified) and
2173 bitpos for the destination store (left justified). */
2174 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2175 extract_bit_field (src, bitsize,
2176 xbitpos % BITS_PER_WORD, 1, false,
2177 NULL_RTX, copy_mode, copy_mode));
2178 }
2179
2180 return tgtblk;
2181 }
2182
2183 /* Add a USE expression for REG to the (possibly empty) list pointed
2184 to by CALL_FUSAGE. REG must denote a hard register. */
2185
2186 void
2187 use_reg (rtx *call_fusage, rtx reg)
2188 {
2189 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2190
2191 *call_fusage
2192 = gen_rtx_EXPR_LIST (VOIDmode,
2193 gen_rtx_USE (VOIDmode, reg), *call_fusage);
2194 }
2195
2196 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2197 starting at REGNO. All of these registers must be hard registers. */
2198
2199 void
2200 use_regs (rtx *call_fusage, int regno, int nregs)
2201 {
2202 int i;
2203
2204 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2205
2206 for (i = 0; i < nregs; i++)
2207 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2208 }
2209
2210 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2211 PARALLEL REGS. This is for calls that pass values in multiple
2212 non-contiguous locations. The Irix 6 ABI has examples of this. */
2213
2214 void
2215 use_group_regs (rtx *call_fusage, rtx regs)
2216 {
2217 int i;
2218
2219 for (i = 0; i < XVECLEN (regs, 0); i++)
2220 {
2221 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2222
2223 /* A NULL entry means the parameter goes both on the stack and in
2224 registers. This can also be a MEM for targets that pass values
2225 partially on the stack and partially in registers. */
2226 if (reg != 0 && REG_P (reg))
2227 use_reg (call_fusage, reg);
2228 }
2229 }
2230
2231 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2232 assigment and the code of the expresion on the RHS is CODE. Return
2233 NULL otherwise. */
2234
2235 static gimple
2236 get_def_for_expr (tree name, enum tree_code code)
2237 {
2238 gimple def_stmt;
2239
2240 if (TREE_CODE (name) != SSA_NAME)
2241 return NULL;
2242
2243 def_stmt = get_gimple_for_ssa_name (name);
2244 if (!def_stmt
2245 || gimple_assign_rhs_code (def_stmt) != code)
2246 return NULL;
2247
2248 return def_stmt;
2249 }
2250 \f
2251
2252 /* Determine whether the LEN bytes generated by CONSTFUN can be
2253 stored to memory using several move instructions. CONSTFUNDATA is
2254 a pointer which will be passed as argument in every CONSTFUN call.
2255 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2256 a memset operation and false if it's a copy of a constant string.
2257 Return nonzero if a call to store_by_pieces should succeed. */
2258
2259 int
2260 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2261 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2262 void *constfundata, unsigned int align, bool memsetp)
2263 {
2264 unsigned HOST_WIDE_INT l;
2265 unsigned int max_size;
2266 HOST_WIDE_INT offset = 0;
2267 enum machine_mode mode;
2268 enum insn_code icode;
2269 int reverse;
2270 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2271 rtx cst ATTRIBUTE_UNUSED;
2272
2273 if (len == 0)
2274 return 1;
2275
2276 if (! (memsetp
2277 ? SET_BY_PIECES_P (len, align)
2278 : STORE_BY_PIECES_P (len, align)))
2279 return 0;
2280
2281 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2282
2283 /* We would first store what we can in the largest integer mode, then go to
2284 successively smaller modes. */
2285
2286 for (reverse = 0;
2287 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2288 reverse++)
2289 {
2290 l = len;
2291 max_size = STORE_MAX_PIECES + 1;
2292 while (max_size > 1)
2293 {
2294 mode = widest_int_mode_for_size (max_size);
2295
2296 if (mode == VOIDmode)
2297 break;
2298
2299 icode = optab_handler (mov_optab, mode);
2300 if (icode != CODE_FOR_nothing
2301 && align >= GET_MODE_ALIGNMENT (mode))
2302 {
2303 unsigned int size = GET_MODE_SIZE (mode);
2304
2305 while (l >= size)
2306 {
2307 if (reverse)
2308 offset -= size;
2309
2310 cst = (*constfun) (constfundata, offset, mode);
2311 if (!targetm.legitimate_constant_p (mode, cst))
2312 return 0;
2313
2314 if (!reverse)
2315 offset += size;
2316
2317 l -= size;
2318 }
2319 }
2320
2321 max_size = GET_MODE_SIZE (mode);
2322 }
2323
2324 /* The code above should have handled everything. */
2325 gcc_assert (!l);
2326 }
2327
2328 return 1;
2329 }
2330
2331 /* Generate several move instructions to store LEN bytes generated by
2332 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2333 pointer which will be passed as argument in every CONSTFUN call.
2334 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2335 a memset operation and false if it's a copy of a constant string.
2336 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2337 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2338 stpcpy. */
2339
2340 rtx
2341 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2342 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2343 void *constfundata, unsigned int align, bool memsetp, int endp)
2344 {
2345 enum machine_mode to_addr_mode
2346 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2347 struct store_by_pieces_d data;
2348
2349 if (len == 0)
2350 {
2351 gcc_assert (endp != 2);
2352 return to;
2353 }
2354
2355 gcc_assert (memsetp
2356 ? SET_BY_PIECES_P (len, align)
2357 : STORE_BY_PIECES_P (len, align));
2358 data.constfun = constfun;
2359 data.constfundata = constfundata;
2360 data.len = len;
2361 data.to = to;
2362 store_by_pieces_1 (&data, align);
2363 if (endp)
2364 {
2365 rtx to1;
2366
2367 gcc_assert (!data.reverse);
2368 if (data.autinc_to)
2369 {
2370 if (endp == 2)
2371 {
2372 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2373 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2374 else
2375 data.to_addr = copy_to_mode_reg (to_addr_mode,
2376 plus_constant (data.to_addr,
2377 -1));
2378 }
2379 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2380 data.offset);
2381 }
2382 else
2383 {
2384 if (endp == 2)
2385 --data.offset;
2386 to1 = adjust_address (data.to, QImode, data.offset);
2387 }
2388 return to1;
2389 }
2390 else
2391 return data.to;
2392 }
2393
2394 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2395 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2396
2397 static void
2398 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2399 {
2400 struct store_by_pieces_d data;
2401
2402 if (len == 0)
2403 return;
2404
2405 data.constfun = clear_by_pieces_1;
2406 data.constfundata = NULL;
2407 data.len = len;
2408 data.to = to;
2409 store_by_pieces_1 (&data, align);
2410 }
2411
2412 /* Callback routine for clear_by_pieces.
2413 Return const0_rtx unconditionally. */
2414
2415 static rtx
2416 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2417 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2418 enum machine_mode mode ATTRIBUTE_UNUSED)
2419 {
2420 return const0_rtx;
2421 }
2422
2423 /* Subroutine of clear_by_pieces and store_by_pieces.
2424 Generate several move instructions to store LEN bytes of block TO. (A MEM
2425 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2426
2427 static void
2428 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2429 unsigned int align ATTRIBUTE_UNUSED)
2430 {
2431 enum machine_mode to_addr_mode
2432 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2433 rtx to_addr = XEXP (data->to, 0);
2434 unsigned int max_size = STORE_MAX_PIECES + 1;
2435 enum insn_code icode;
2436
2437 data->offset = 0;
2438 data->to_addr = to_addr;
2439 data->autinc_to
2440 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2441 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2442
2443 data->explicit_inc_to = 0;
2444 data->reverse
2445 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2446 if (data->reverse)
2447 data->offset = data->len;
2448
2449 /* If storing requires more than two move insns,
2450 copy addresses to registers (to make displacements shorter)
2451 and use post-increment if available. */
2452 if (!data->autinc_to
2453 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2454 {
2455 /* Determine the main mode we'll be using.
2456 MODE might not be used depending on the definitions of the
2457 USE_* macros below. */
2458 enum machine_mode mode ATTRIBUTE_UNUSED
2459 = widest_int_mode_for_size (max_size);
2460
2461 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2462 {
2463 data->to_addr = copy_to_mode_reg (to_addr_mode,
2464 plus_constant (to_addr, data->len));
2465 data->autinc_to = 1;
2466 data->explicit_inc_to = -1;
2467 }
2468
2469 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2470 && ! data->autinc_to)
2471 {
2472 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2473 data->autinc_to = 1;
2474 data->explicit_inc_to = 1;
2475 }
2476
2477 if ( !data->autinc_to && CONSTANT_P (to_addr))
2478 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2479 }
2480
2481 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2482
2483 /* First store what we can in the largest integer mode, then go to
2484 successively smaller modes. */
2485
2486 while (max_size > 1)
2487 {
2488 enum machine_mode mode = widest_int_mode_for_size (max_size);
2489
2490 if (mode == VOIDmode)
2491 break;
2492
2493 icode = optab_handler (mov_optab, mode);
2494 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2495 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2496
2497 max_size = GET_MODE_SIZE (mode);
2498 }
2499
2500 /* The code above should have handled everything. */
2501 gcc_assert (!data->len);
2502 }
2503
2504 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2505 with move instructions for mode MODE. GENFUN is the gen_... function
2506 to make a move insn for that mode. DATA has all the other info. */
2507
2508 static void
2509 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2510 struct store_by_pieces_d *data)
2511 {
2512 unsigned int size = GET_MODE_SIZE (mode);
2513 rtx to1, cst;
2514
2515 while (data->len >= size)
2516 {
2517 if (data->reverse)
2518 data->offset -= size;
2519
2520 if (data->autinc_to)
2521 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2522 data->offset);
2523 else
2524 to1 = adjust_address (data->to, mode, data->offset);
2525
2526 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2527 emit_insn (gen_add2_insn (data->to_addr,
2528 GEN_INT (-(HOST_WIDE_INT) size)));
2529
2530 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2531 emit_insn ((*genfun) (to1, cst));
2532
2533 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2534 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2535
2536 if (! data->reverse)
2537 data->offset += size;
2538
2539 data->len -= size;
2540 }
2541 }
2542 \f
2543 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2544 its length in bytes. */
2545
2546 rtx
2547 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2548 unsigned int expected_align, HOST_WIDE_INT expected_size)
2549 {
2550 enum machine_mode mode = GET_MODE (object);
2551 unsigned int align;
2552
2553 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2554
2555 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2556 just move a zero. Otherwise, do this a piece at a time. */
2557 if (mode != BLKmode
2558 && CONST_INT_P (size)
2559 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2560 {
2561 rtx zero = CONST0_RTX (mode);
2562 if (zero != NULL)
2563 {
2564 emit_move_insn (object, zero);
2565 return NULL;
2566 }
2567
2568 if (COMPLEX_MODE_P (mode))
2569 {
2570 zero = CONST0_RTX (GET_MODE_INNER (mode));
2571 if (zero != NULL)
2572 {
2573 write_complex_part (object, zero, 0);
2574 write_complex_part (object, zero, 1);
2575 return NULL;
2576 }
2577 }
2578 }
2579
2580 if (size == const0_rtx)
2581 return NULL;
2582
2583 align = MEM_ALIGN (object);
2584
2585 if (CONST_INT_P (size)
2586 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2587 clear_by_pieces (object, INTVAL (size), align);
2588 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2589 expected_align, expected_size))
2590 ;
2591 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2592 return set_storage_via_libcall (object, size, const0_rtx,
2593 method == BLOCK_OP_TAILCALL);
2594 else
2595 gcc_unreachable ();
2596
2597 return NULL;
2598 }
2599
2600 rtx
2601 clear_storage (rtx object, rtx size, enum block_op_methods method)
2602 {
2603 return clear_storage_hints (object, size, method, 0, -1);
2604 }
2605
2606
2607 /* A subroutine of clear_storage. Expand a call to memset.
2608 Return the return value of memset, 0 otherwise. */
2609
2610 rtx
2611 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2612 {
2613 tree call_expr, fn, object_tree, size_tree, val_tree;
2614 enum machine_mode size_mode;
2615 rtx retval;
2616
2617 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2618 place those into new pseudos into a VAR_DECL and use them later. */
2619
2620 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2621
2622 size_mode = TYPE_MODE (sizetype);
2623 size = convert_to_mode (size_mode, size, 1);
2624 size = copy_to_mode_reg (size_mode, size);
2625
2626 /* It is incorrect to use the libcall calling conventions to call
2627 memset in this context. This could be a user call to memset and
2628 the user may wish to examine the return value from memset. For
2629 targets where libcalls and normal calls have different conventions
2630 for returning pointers, we could end up generating incorrect code. */
2631
2632 object_tree = make_tree (ptr_type_node, object);
2633 if (!CONST_INT_P (val))
2634 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2635 size_tree = make_tree (sizetype, size);
2636 val_tree = make_tree (integer_type_node, val);
2637
2638 fn = clear_storage_libcall_fn (true);
2639 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2640 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2641
2642 retval = expand_normal (call_expr);
2643
2644 return retval;
2645 }
2646
2647 /* A subroutine of set_storage_via_libcall. Create the tree node
2648 for the function we use for block clears. The first time FOR_CALL
2649 is true, we call assemble_external. */
2650
2651 tree block_clear_fn;
2652
2653 void
2654 init_block_clear_fn (const char *asmspec)
2655 {
2656 if (!block_clear_fn)
2657 {
2658 tree fn, args;
2659
2660 fn = get_identifier ("memset");
2661 args = build_function_type_list (ptr_type_node, ptr_type_node,
2662 integer_type_node, sizetype,
2663 NULL_TREE);
2664
2665 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2666 DECL_EXTERNAL (fn) = 1;
2667 TREE_PUBLIC (fn) = 1;
2668 DECL_ARTIFICIAL (fn) = 1;
2669 TREE_NOTHROW (fn) = 1;
2670 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2671 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2672
2673 block_clear_fn = fn;
2674 }
2675
2676 if (asmspec)
2677 set_user_assembler_name (block_clear_fn, asmspec);
2678 }
2679
2680 static tree
2681 clear_storage_libcall_fn (int for_call)
2682 {
2683 static bool emitted_extern;
2684
2685 if (!block_clear_fn)
2686 init_block_clear_fn (NULL);
2687
2688 if (for_call && !emitted_extern)
2689 {
2690 emitted_extern = true;
2691 make_decl_rtl (block_clear_fn);
2692 assemble_external (block_clear_fn);
2693 }
2694
2695 return block_clear_fn;
2696 }
2697 \f
2698 /* Expand a setmem pattern; return true if successful. */
2699
2700 bool
2701 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2702 unsigned int expected_align, HOST_WIDE_INT expected_size)
2703 {
2704 /* Try the most limited insn first, because there's no point
2705 including more than one in the machine description unless
2706 the more limited one has some advantage. */
2707
2708 enum machine_mode mode;
2709
2710 if (expected_align < align)
2711 expected_align = align;
2712
2713 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2714 mode = GET_MODE_WIDER_MODE (mode))
2715 {
2716 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2717
2718 if (code != CODE_FOR_nothing
2719 /* We don't need MODE to be narrower than
2720 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2721 the mode mask, as it is returned by the macro, it will
2722 definitely be less than the actual mode mask. */
2723 && ((CONST_INT_P (size)
2724 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2725 <= (GET_MODE_MASK (mode) >> 1)))
2726 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2727 {
2728 struct expand_operand ops[6];
2729 unsigned int nops;
2730
2731 nops = insn_data[(int) code].n_generator_args;
2732 gcc_assert (nops == 4 || nops == 6);
2733
2734 create_fixed_operand (&ops[0], object);
2735 /* The check above guarantees that this size conversion is valid. */
2736 create_convert_operand_to (&ops[1], size, mode, true);
2737 create_convert_operand_from (&ops[2], val, byte_mode, true);
2738 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2739 if (nops == 6)
2740 {
2741 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2742 create_integer_operand (&ops[5], expected_size);
2743 }
2744 if (maybe_expand_insn (code, nops, ops))
2745 return true;
2746 }
2747 }
2748
2749 return false;
2750 }
2751
2752 \f
2753 /* Write to one of the components of the complex value CPLX. Write VAL to
2754 the real part if IMAG_P is false, and the imaginary part if its true. */
2755
2756 static void
2757 write_complex_part (rtx cplx, rtx val, bool imag_p)
2758 {
2759 enum machine_mode cmode;
2760 enum machine_mode imode;
2761 unsigned ibitsize;
2762
2763 if (GET_CODE (cplx) == CONCAT)
2764 {
2765 emit_move_insn (XEXP (cplx, imag_p), val);
2766 return;
2767 }
2768
2769 cmode = GET_MODE (cplx);
2770 imode = GET_MODE_INNER (cmode);
2771 ibitsize = GET_MODE_BITSIZE (imode);
2772
2773 /* For MEMs simplify_gen_subreg may generate an invalid new address
2774 because, e.g., the original address is considered mode-dependent
2775 by the target, which restricts simplify_subreg from invoking
2776 adjust_address_nv. Instead of preparing fallback support for an
2777 invalid address, we call adjust_address_nv directly. */
2778 if (MEM_P (cplx))
2779 {
2780 emit_move_insn (adjust_address_nv (cplx, imode,
2781 imag_p ? GET_MODE_SIZE (imode) : 0),
2782 val);
2783 return;
2784 }
2785
2786 /* If the sub-object is at least word sized, then we know that subregging
2787 will work. This special case is important, since store_bit_field
2788 wants to operate on integer modes, and there's rarely an OImode to
2789 correspond to TCmode. */
2790 if (ibitsize >= BITS_PER_WORD
2791 /* For hard regs we have exact predicates. Assume we can split
2792 the original object if it spans an even number of hard regs.
2793 This special case is important for SCmode on 64-bit platforms
2794 where the natural size of floating-point regs is 32-bit. */
2795 || (REG_P (cplx)
2796 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2797 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2798 {
2799 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2800 imag_p ? GET_MODE_SIZE (imode) : 0);
2801 if (part)
2802 {
2803 emit_move_insn (part, val);
2804 return;
2805 }
2806 else
2807 /* simplify_gen_subreg may fail for sub-word MEMs. */
2808 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2809 }
2810
2811 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2812 }
2813
2814 /* Extract one of the components of the complex value CPLX. Extract the
2815 real part if IMAG_P is false, and the imaginary part if it's true. */
2816
2817 static rtx
2818 read_complex_part (rtx cplx, bool imag_p)
2819 {
2820 enum machine_mode cmode, imode;
2821 unsigned ibitsize;
2822
2823 if (GET_CODE (cplx) == CONCAT)
2824 return XEXP (cplx, imag_p);
2825
2826 cmode = GET_MODE (cplx);
2827 imode = GET_MODE_INNER (cmode);
2828 ibitsize = GET_MODE_BITSIZE (imode);
2829
2830 /* Special case reads from complex constants that got spilled to memory. */
2831 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2832 {
2833 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2834 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2835 {
2836 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2837 if (CONSTANT_CLASS_P (part))
2838 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2839 }
2840 }
2841
2842 /* For MEMs simplify_gen_subreg may generate an invalid new address
2843 because, e.g., the original address is considered mode-dependent
2844 by the target, which restricts simplify_subreg from invoking
2845 adjust_address_nv. Instead of preparing fallback support for an
2846 invalid address, we call adjust_address_nv directly. */
2847 if (MEM_P (cplx))
2848 return adjust_address_nv (cplx, imode,
2849 imag_p ? GET_MODE_SIZE (imode) : 0);
2850
2851 /* If the sub-object is at least word sized, then we know that subregging
2852 will work. This special case is important, since extract_bit_field
2853 wants to operate on integer modes, and there's rarely an OImode to
2854 correspond to TCmode. */
2855 if (ibitsize >= BITS_PER_WORD
2856 /* For hard regs we have exact predicates. Assume we can split
2857 the original object if it spans an even number of hard regs.
2858 This special case is important for SCmode on 64-bit platforms
2859 where the natural size of floating-point regs is 32-bit. */
2860 || (REG_P (cplx)
2861 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2862 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2863 {
2864 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2865 imag_p ? GET_MODE_SIZE (imode) : 0);
2866 if (ret)
2867 return ret;
2868 else
2869 /* simplify_gen_subreg may fail for sub-word MEMs. */
2870 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2871 }
2872
2873 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2874 true, false, NULL_RTX, imode, imode);
2875 }
2876 \f
2877 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2878 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2879 represented in NEW_MODE. If FORCE is true, this will never happen, as
2880 we'll force-create a SUBREG if needed. */
2881
2882 static rtx
2883 emit_move_change_mode (enum machine_mode new_mode,
2884 enum machine_mode old_mode, rtx x, bool force)
2885 {
2886 rtx ret;
2887
2888 if (push_operand (x, GET_MODE (x)))
2889 {
2890 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2891 MEM_COPY_ATTRIBUTES (ret, x);
2892 }
2893 else if (MEM_P (x))
2894 {
2895 /* We don't have to worry about changing the address since the
2896 size in bytes is supposed to be the same. */
2897 if (reload_in_progress)
2898 {
2899 /* Copy the MEM to change the mode and move any
2900 substitutions from the old MEM to the new one. */
2901 ret = adjust_address_nv (x, new_mode, 0);
2902 copy_replacements (x, ret);
2903 }
2904 else
2905 ret = adjust_address (x, new_mode, 0);
2906 }
2907 else
2908 {
2909 /* Note that we do want simplify_subreg's behavior of validating
2910 that the new mode is ok for a hard register. If we were to use
2911 simplify_gen_subreg, we would create the subreg, but would
2912 probably run into the target not being able to implement it. */
2913 /* Except, of course, when FORCE is true, when this is exactly what
2914 we want. Which is needed for CCmodes on some targets. */
2915 if (force)
2916 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
2917 else
2918 ret = simplify_subreg (new_mode, x, old_mode, 0);
2919 }
2920
2921 return ret;
2922 }
2923
2924 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
2925 an integer mode of the same size as MODE. Returns the instruction
2926 emitted, or NULL if such a move could not be generated. */
2927
2928 static rtx
2929 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
2930 {
2931 enum machine_mode imode;
2932 enum insn_code code;
2933
2934 /* There must exist a mode of the exact size we require. */
2935 imode = int_mode_for_mode (mode);
2936 if (imode == BLKmode)
2937 return NULL_RTX;
2938
2939 /* The target must support moves in this mode. */
2940 code = optab_handler (mov_optab, imode);
2941 if (code == CODE_FOR_nothing)
2942 return NULL_RTX;
2943
2944 x = emit_move_change_mode (imode, mode, x, force);
2945 if (x == NULL_RTX)
2946 return NULL_RTX;
2947 y = emit_move_change_mode (imode, mode, y, force);
2948 if (y == NULL_RTX)
2949 return NULL_RTX;
2950 return emit_insn (GEN_FCN (code) (x, y));
2951 }
2952
2953 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
2954 Return an equivalent MEM that does not use an auto-increment. */
2955
2956 static rtx
2957 emit_move_resolve_push (enum machine_mode mode, rtx x)
2958 {
2959 enum rtx_code code = GET_CODE (XEXP (x, 0));
2960 HOST_WIDE_INT adjust;
2961 rtx temp;
2962
2963 adjust = GET_MODE_SIZE (mode);
2964 #ifdef PUSH_ROUNDING
2965 adjust = PUSH_ROUNDING (adjust);
2966 #endif
2967 if (code == PRE_DEC || code == POST_DEC)
2968 adjust = -adjust;
2969 else if (code == PRE_MODIFY || code == POST_MODIFY)
2970 {
2971 rtx expr = XEXP (XEXP (x, 0), 1);
2972 HOST_WIDE_INT val;
2973
2974 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
2975 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
2976 val = INTVAL (XEXP (expr, 1));
2977 if (GET_CODE (expr) == MINUS)
2978 val = -val;
2979 gcc_assert (adjust == val || adjust == -val);
2980 adjust = val;
2981 }
2982
2983 /* Do not use anti_adjust_stack, since we don't want to update
2984 stack_pointer_delta. */
2985 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
2986 GEN_INT (adjust), stack_pointer_rtx,
2987 0, OPTAB_LIB_WIDEN);
2988 if (temp != stack_pointer_rtx)
2989 emit_move_insn (stack_pointer_rtx, temp);
2990
2991 switch (code)
2992 {
2993 case PRE_INC:
2994 case PRE_DEC:
2995 case PRE_MODIFY:
2996 temp = stack_pointer_rtx;
2997 break;
2998 case POST_INC:
2999 case POST_DEC:
3000 case POST_MODIFY:
3001 temp = plus_constant (stack_pointer_rtx, -adjust);
3002 break;
3003 default:
3004 gcc_unreachable ();
3005 }
3006
3007 return replace_equiv_address (x, temp);
3008 }
3009
3010 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3011 X is known to satisfy push_operand, and MODE is known to be complex.
3012 Returns the last instruction emitted. */
3013
3014 rtx
3015 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3016 {
3017 enum machine_mode submode = GET_MODE_INNER (mode);
3018 bool imag_first;
3019
3020 #ifdef PUSH_ROUNDING
3021 unsigned int submodesize = GET_MODE_SIZE (submode);
3022
3023 /* In case we output to the stack, but the size is smaller than the
3024 machine can push exactly, we need to use move instructions. */
3025 if (PUSH_ROUNDING (submodesize) != submodesize)
3026 {
3027 x = emit_move_resolve_push (mode, x);
3028 return emit_move_insn (x, y);
3029 }
3030 #endif
3031
3032 /* Note that the real part always precedes the imag part in memory
3033 regardless of machine's endianness. */
3034 switch (GET_CODE (XEXP (x, 0)))
3035 {
3036 case PRE_DEC:
3037 case POST_DEC:
3038 imag_first = true;
3039 break;
3040 case PRE_INC:
3041 case POST_INC:
3042 imag_first = false;
3043 break;
3044 default:
3045 gcc_unreachable ();
3046 }
3047
3048 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3049 read_complex_part (y, imag_first));
3050 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3051 read_complex_part (y, !imag_first));
3052 }
3053
3054 /* A subroutine of emit_move_complex. Perform the move from Y to X
3055 via two moves of the parts. Returns the last instruction emitted. */
3056
3057 rtx
3058 emit_move_complex_parts (rtx x, rtx y)
3059 {
3060 /* Show the output dies here. This is necessary for SUBREGs
3061 of pseudos since we cannot track their lifetimes correctly;
3062 hard regs shouldn't appear here except as return values. */
3063 if (!reload_completed && !reload_in_progress
3064 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3065 emit_clobber (x);
3066
3067 write_complex_part (x, read_complex_part (y, false), false);
3068 write_complex_part (x, read_complex_part (y, true), true);
3069
3070 return get_last_insn ();
3071 }
3072
3073 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3074 MODE is known to be complex. Returns the last instruction emitted. */
3075
3076 static rtx
3077 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3078 {
3079 bool try_int;
3080
3081 /* Need to take special care for pushes, to maintain proper ordering
3082 of the data, and possibly extra padding. */
3083 if (push_operand (x, mode))
3084 return emit_move_complex_push (mode, x, y);
3085
3086 /* See if we can coerce the target into moving both values at once. */
3087
3088 /* Move floating point as parts. */
3089 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3090 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3091 try_int = false;
3092 /* Not possible if the values are inherently not adjacent. */
3093 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3094 try_int = false;
3095 /* Is possible if both are registers (or subregs of registers). */
3096 else if (register_operand (x, mode) && register_operand (y, mode))
3097 try_int = true;
3098 /* If one of the operands is a memory, and alignment constraints
3099 are friendly enough, we may be able to do combined memory operations.
3100 We do not attempt this if Y is a constant because that combination is
3101 usually better with the by-parts thing below. */
3102 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3103 && (!STRICT_ALIGNMENT
3104 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3105 try_int = true;
3106 else
3107 try_int = false;
3108
3109 if (try_int)
3110 {
3111 rtx ret;
3112
3113 /* For memory to memory moves, optimal behavior can be had with the
3114 existing block move logic. */
3115 if (MEM_P (x) && MEM_P (y))
3116 {
3117 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3118 BLOCK_OP_NO_LIBCALL);
3119 return get_last_insn ();
3120 }
3121
3122 ret = emit_move_via_integer (mode, x, y, true);
3123 if (ret)
3124 return ret;
3125 }
3126
3127 return emit_move_complex_parts (x, y);
3128 }
3129
3130 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3131 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3132
3133 static rtx
3134 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3135 {
3136 rtx ret;
3137
3138 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3139 if (mode != CCmode)
3140 {
3141 enum insn_code code = optab_handler (mov_optab, CCmode);
3142 if (code != CODE_FOR_nothing)
3143 {
3144 x = emit_move_change_mode (CCmode, mode, x, true);
3145 y = emit_move_change_mode (CCmode, mode, y, true);
3146 return emit_insn (GEN_FCN (code) (x, y));
3147 }
3148 }
3149
3150 /* Otherwise, find the MODE_INT mode of the same width. */
3151 ret = emit_move_via_integer (mode, x, y, false);
3152 gcc_assert (ret != NULL);
3153 return ret;
3154 }
3155
3156 /* Return true if word I of OP lies entirely in the
3157 undefined bits of a paradoxical subreg. */
3158
3159 static bool
3160 undefined_operand_subword_p (const_rtx op, int i)
3161 {
3162 enum machine_mode innermode, innermostmode;
3163 int offset;
3164 if (GET_CODE (op) != SUBREG)
3165 return false;
3166 innermode = GET_MODE (op);
3167 innermostmode = GET_MODE (SUBREG_REG (op));
3168 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3169 /* The SUBREG_BYTE represents offset, as if the value were stored in
3170 memory, except for a paradoxical subreg where we define
3171 SUBREG_BYTE to be 0; undo this exception as in
3172 simplify_subreg. */
3173 if (SUBREG_BYTE (op) == 0
3174 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3175 {
3176 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3177 if (WORDS_BIG_ENDIAN)
3178 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3179 if (BYTES_BIG_ENDIAN)
3180 offset += difference % UNITS_PER_WORD;
3181 }
3182 if (offset >= GET_MODE_SIZE (innermostmode)
3183 || offset <= -GET_MODE_SIZE (word_mode))
3184 return true;
3185 return false;
3186 }
3187
3188 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3189 MODE is any multi-word or full-word mode that lacks a move_insn
3190 pattern. Note that you will get better code if you define such
3191 patterns, even if they must turn into multiple assembler instructions. */
3192
3193 static rtx
3194 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3195 {
3196 rtx last_insn = 0;
3197 rtx seq, inner;
3198 bool need_clobber;
3199 int i;
3200
3201 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3202
3203 /* If X is a push on the stack, do the push now and replace
3204 X with a reference to the stack pointer. */
3205 if (push_operand (x, mode))
3206 x = emit_move_resolve_push (mode, x);
3207
3208 /* If we are in reload, see if either operand is a MEM whose address
3209 is scheduled for replacement. */
3210 if (reload_in_progress && MEM_P (x)
3211 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3212 x = replace_equiv_address_nv (x, inner);
3213 if (reload_in_progress && MEM_P (y)
3214 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3215 y = replace_equiv_address_nv (y, inner);
3216
3217 start_sequence ();
3218
3219 need_clobber = false;
3220 for (i = 0;
3221 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3222 i++)
3223 {
3224 rtx xpart = operand_subword (x, i, 1, mode);
3225 rtx ypart;
3226
3227 /* Do not generate code for a move if it would come entirely
3228 from the undefined bits of a paradoxical subreg. */
3229 if (undefined_operand_subword_p (y, i))
3230 continue;
3231
3232 ypart = operand_subword (y, i, 1, mode);
3233
3234 /* If we can't get a part of Y, put Y into memory if it is a
3235 constant. Otherwise, force it into a register. Then we must
3236 be able to get a part of Y. */
3237 if (ypart == 0 && CONSTANT_P (y))
3238 {
3239 y = use_anchored_address (force_const_mem (mode, y));
3240 ypart = operand_subword (y, i, 1, mode);
3241 }
3242 else if (ypart == 0)
3243 ypart = operand_subword_force (y, i, mode);
3244
3245 gcc_assert (xpart && ypart);
3246
3247 need_clobber |= (GET_CODE (xpart) == SUBREG);
3248
3249 last_insn = emit_move_insn (xpart, ypart);
3250 }
3251
3252 seq = get_insns ();
3253 end_sequence ();
3254
3255 /* Show the output dies here. This is necessary for SUBREGs
3256 of pseudos since we cannot track their lifetimes correctly;
3257 hard regs shouldn't appear here except as return values.
3258 We never want to emit such a clobber after reload. */
3259 if (x != y
3260 && ! (reload_in_progress || reload_completed)
3261 && need_clobber != 0)
3262 emit_clobber (x);
3263
3264 emit_insn (seq);
3265
3266 return last_insn;
3267 }
3268
3269 /* Low level part of emit_move_insn.
3270 Called just like emit_move_insn, but assumes X and Y
3271 are basically valid. */
3272
3273 rtx
3274 emit_move_insn_1 (rtx x, rtx y)
3275 {
3276 enum machine_mode mode = GET_MODE (x);
3277 enum insn_code code;
3278
3279 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3280
3281 code = optab_handler (mov_optab, mode);
3282 if (code != CODE_FOR_nothing)
3283 return emit_insn (GEN_FCN (code) (x, y));
3284
3285 /* Expand complex moves by moving real part and imag part. */
3286 if (COMPLEX_MODE_P (mode))
3287 return emit_move_complex (mode, x, y);
3288
3289 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3290 || ALL_FIXED_POINT_MODE_P (mode))
3291 {
3292 rtx result = emit_move_via_integer (mode, x, y, true);
3293
3294 /* If we can't find an integer mode, use multi words. */
3295 if (result)
3296 return result;
3297 else
3298 return emit_move_multi_word (mode, x, y);
3299 }
3300
3301 if (GET_MODE_CLASS (mode) == MODE_CC)
3302 return emit_move_ccmode (mode, x, y);
3303
3304 /* Try using a move pattern for the corresponding integer mode. This is
3305 only safe when simplify_subreg can convert MODE constants into integer
3306 constants. At present, it can only do this reliably if the value
3307 fits within a HOST_WIDE_INT. */
3308 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3309 {
3310 rtx ret = emit_move_via_integer (mode, x, y, false);
3311 if (ret)
3312 return ret;
3313 }
3314
3315 return emit_move_multi_word (mode, x, y);
3316 }
3317
3318 /* Generate code to copy Y into X.
3319 Both Y and X must have the same mode, except that
3320 Y can be a constant with VOIDmode.
3321 This mode cannot be BLKmode; use emit_block_move for that.
3322
3323 Return the last instruction emitted. */
3324
3325 rtx
3326 emit_move_insn (rtx x, rtx y)
3327 {
3328 enum machine_mode mode = GET_MODE (x);
3329 rtx y_cst = NULL_RTX;
3330 rtx last_insn, set;
3331
3332 gcc_assert (mode != BLKmode
3333 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3334
3335 if (CONSTANT_P (y))
3336 {
3337 if (optimize
3338 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3339 && (last_insn = compress_float_constant (x, y)))
3340 return last_insn;
3341
3342 y_cst = y;
3343
3344 if (!targetm.legitimate_constant_p (mode, y))
3345 {
3346 y = force_const_mem (mode, y);
3347
3348 /* If the target's cannot_force_const_mem prevented the spill,
3349 assume that the target's move expanders will also take care
3350 of the non-legitimate constant. */
3351 if (!y)
3352 y = y_cst;
3353 else
3354 y = use_anchored_address (y);
3355 }
3356 }
3357
3358 /* If X or Y are memory references, verify that their addresses are valid
3359 for the machine. */
3360 if (MEM_P (x)
3361 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3362 MEM_ADDR_SPACE (x))
3363 && ! push_operand (x, GET_MODE (x))))
3364 x = validize_mem (x);
3365
3366 if (MEM_P (y)
3367 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3368 MEM_ADDR_SPACE (y)))
3369 y = validize_mem (y);
3370
3371 gcc_assert (mode != BLKmode);
3372
3373 last_insn = emit_move_insn_1 (x, y);
3374
3375 if (y_cst && REG_P (x)
3376 && (set = single_set (last_insn)) != NULL_RTX
3377 && SET_DEST (set) == x
3378 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3379 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3380
3381 return last_insn;
3382 }
3383
3384 /* If Y is representable exactly in a narrower mode, and the target can
3385 perform the extension directly from constant or memory, then emit the
3386 move as an extension. */
3387
3388 static rtx
3389 compress_float_constant (rtx x, rtx y)
3390 {
3391 enum machine_mode dstmode = GET_MODE (x);
3392 enum machine_mode orig_srcmode = GET_MODE (y);
3393 enum machine_mode srcmode;
3394 REAL_VALUE_TYPE r;
3395 int oldcost, newcost;
3396 bool speed = optimize_insn_for_speed_p ();
3397
3398 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3399
3400 if (targetm.legitimate_constant_p (dstmode, y))
3401 oldcost = rtx_cost (y, SET, speed);
3402 else
3403 oldcost = rtx_cost (force_const_mem (dstmode, y), SET, speed);
3404
3405 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3406 srcmode != orig_srcmode;
3407 srcmode = GET_MODE_WIDER_MODE (srcmode))
3408 {
3409 enum insn_code ic;
3410 rtx trunc_y, last_insn;
3411
3412 /* Skip if the target can't extend this way. */
3413 ic = can_extend_p (dstmode, srcmode, 0);
3414 if (ic == CODE_FOR_nothing)
3415 continue;
3416
3417 /* Skip if the narrowed value isn't exact. */
3418 if (! exact_real_truncate (srcmode, &r))
3419 continue;
3420
3421 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3422
3423 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3424 {
3425 /* Skip if the target needs extra instructions to perform
3426 the extension. */
3427 if (!insn_operand_matches (ic, 1, trunc_y))
3428 continue;
3429 /* This is valid, but may not be cheaper than the original. */
3430 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3431 if (oldcost < newcost)
3432 continue;
3433 }
3434 else if (float_extend_from_mem[dstmode][srcmode])
3435 {
3436 trunc_y = force_const_mem (srcmode, trunc_y);
3437 /* This is valid, but may not be cheaper than the original. */
3438 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3439 if (oldcost < newcost)
3440 continue;
3441 trunc_y = validize_mem (trunc_y);
3442 }
3443 else
3444 continue;
3445
3446 /* For CSE's benefit, force the compressed constant pool entry
3447 into a new pseudo. This constant may be used in different modes,
3448 and if not, combine will put things back together for us. */
3449 trunc_y = force_reg (srcmode, trunc_y);
3450 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3451 last_insn = get_last_insn ();
3452
3453 if (REG_P (x))
3454 set_unique_reg_note (last_insn, REG_EQUAL, y);
3455
3456 return last_insn;
3457 }
3458
3459 return NULL_RTX;
3460 }
3461 \f
3462 /* Pushing data onto the stack. */
3463
3464 /* Push a block of length SIZE (perhaps variable)
3465 and return an rtx to address the beginning of the block.
3466 The value may be virtual_outgoing_args_rtx.
3467
3468 EXTRA is the number of bytes of padding to push in addition to SIZE.
3469 BELOW nonzero means this padding comes at low addresses;
3470 otherwise, the padding comes at high addresses. */
3471
3472 rtx
3473 push_block (rtx size, int extra, int below)
3474 {
3475 rtx temp;
3476
3477 size = convert_modes (Pmode, ptr_mode, size, 1);
3478 if (CONSTANT_P (size))
3479 anti_adjust_stack (plus_constant (size, extra));
3480 else if (REG_P (size) && extra == 0)
3481 anti_adjust_stack (size);
3482 else
3483 {
3484 temp = copy_to_mode_reg (Pmode, size);
3485 if (extra != 0)
3486 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3487 temp, 0, OPTAB_LIB_WIDEN);
3488 anti_adjust_stack (temp);
3489 }
3490
3491 #ifndef STACK_GROWS_DOWNWARD
3492 if (0)
3493 #else
3494 if (1)
3495 #endif
3496 {
3497 temp = virtual_outgoing_args_rtx;
3498 if (extra != 0 && below)
3499 temp = plus_constant (temp, extra);
3500 }
3501 else
3502 {
3503 if (CONST_INT_P (size))
3504 temp = plus_constant (virtual_outgoing_args_rtx,
3505 -INTVAL (size) - (below ? 0 : extra));
3506 else if (extra != 0 && !below)
3507 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3508 negate_rtx (Pmode, plus_constant (size, extra)));
3509 else
3510 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3511 negate_rtx (Pmode, size));
3512 }
3513
3514 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3515 }
3516
3517 #ifdef PUSH_ROUNDING
3518
3519 /* Emit single push insn. */
3520
3521 static void
3522 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3523 {
3524 rtx dest_addr;
3525 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3526 rtx dest;
3527 enum insn_code icode;
3528
3529 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3530 /* If there is push pattern, use it. Otherwise try old way of throwing
3531 MEM representing push operation to move expander. */
3532 icode = optab_handler (push_optab, mode);
3533 if (icode != CODE_FOR_nothing)
3534 {
3535 struct expand_operand ops[1];
3536
3537 create_input_operand (&ops[0], x, mode);
3538 if (maybe_expand_insn (icode, 1, ops))
3539 return;
3540 }
3541 if (GET_MODE_SIZE (mode) == rounded_size)
3542 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3543 /* If we are to pad downward, adjust the stack pointer first and
3544 then store X into the stack location using an offset. This is
3545 because emit_move_insn does not know how to pad; it does not have
3546 access to type. */
3547 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3548 {
3549 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3550 HOST_WIDE_INT offset;
3551
3552 emit_move_insn (stack_pointer_rtx,
3553 expand_binop (Pmode,
3554 #ifdef STACK_GROWS_DOWNWARD
3555 sub_optab,
3556 #else
3557 add_optab,
3558 #endif
3559 stack_pointer_rtx,
3560 GEN_INT (rounded_size),
3561 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3562
3563 offset = (HOST_WIDE_INT) padding_size;
3564 #ifdef STACK_GROWS_DOWNWARD
3565 if (STACK_PUSH_CODE == POST_DEC)
3566 /* We have already decremented the stack pointer, so get the
3567 previous value. */
3568 offset += (HOST_WIDE_INT) rounded_size;
3569 #else
3570 if (STACK_PUSH_CODE == POST_INC)
3571 /* We have already incremented the stack pointer, so get the
3572 previous value. */
3573 offset -= (HOST_WIDE_INT) rounded_size;
3574 #endif
3575 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3576 }
3577 else
3578 {
3579 #ifdef STACK_GROWS_DOWNWARD
3580 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3581 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3582 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3583 #else
3584 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3585 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3586 GEN_INT (rounded_size));
3587 #endif
3588 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3589 }
3590
3591 dest = gen_rtx_MEM (mode, dest_addr);
3592
3593 if (type != 0)
3594 {
3595 set_mem_attributes (dest, type, 1);
3596
3597 if (flag_optimize_sibling_calls)
3598 /* Function incoming arguments may overlap with sibling call
3599 outgoing arguments and we cannot allow reordering of reads
3600 from function arguments with stores to outgoing arguments
3601 of sibling calls. */
3602 set_mem_alias_set (dest, 0);
3603 }
3604 emit_move_insn (dest, x);
3605 }
3606 #endif
3607
3608 /* Generate code to push X onto the stack, assuming it has mode MODE and
3609 type TYPE.
3610 MODE is redundant except when X is a CONST_INT (since they don't
3611 carry mode info).
3612 SIZE is an rtx for the size of data to be copied (in bytes),
3613 needed only if X is BLKmode.
3614
3615 ALIGN (in bits) is maximum alignment we can assume.
3616
3617 If PARTIAL and REG are both nonzero, then copy that many of the first
3618 bytes of X into registers starting with REG, and push the rest of X.
3619 The amount of space pushed is decreased by PARTIAL bytes.
3620 REG must be a hard register in this case.
3621 If REG is zero but PARTIAL is not, take any all others actions for an
3622 argument partially in registers, but do not actually load any
3623 registers.
3624
3625 EXTRA is the amount in bytes of extra space to leave next to this arg.
3626 This is ignored if an argument block has already been allocated.
3627
3628 On a machine that lacks real push insns, ARGS_ADDR is the address of
3629 the bottom of the argument block for this call. We use indexing off there
3630 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3631 argument block has not been preallocated.
3632
3633 ARGS_SO_FAR is the size of args previously pushed for this call.
3634
3635 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3636 for arguments passed in registers. If nonzero, it will be the number
3637 of bytes required. */
3638
3639 void
3640 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3641 unsigned int align, int partial, rtx reg, int extra,
3642 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3643 rtx alignment_pad)
3644 {
3645 rtx xinner;
3646 enum direction stack_direction
3647 #ifdef STACK_GROWS_DOWNWARD
3648 = downward;
3649 #else
3650 = upward;
3651 #endif
3652
3653 /* Decide where to pad the argument: `downward' for below,
3654 `upward' for above, or `none' for don't pad it.
3655 Default is below for small data on big-endian machines; else above. */
3656 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3657
3658 /* Invert direction if stack is post-decrement.
3659 FIXME: why? */
3660 if (STACK_PUSH_CODE == POST_DEC)
3661 if (where_pad != none)
3662 where_pad = (where_pad == downward ? upward : downward);
3663
3664 xinner = x;
3665
3666 if (mode == BLKmode
3667 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3668 {
3669 /* Copy a block into the stack, entirely or partially. */
3670
3671 rtx temp;
3672 int used;
3673 int offset;
3674 int skip;
3675
3676 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3677 used = partial - offset;
3678
3679 if (mode != BLKmode)
3680 {
3681 /* A value is to be stored in an insufficiently aligned
3682 stack slot; copy via a suitably aligned slot if
3683 necessary. */
3684 size = GEN_INT (GET_MODE_SIZE (mode));
3685 if (!MEM_P (xinner))
3686 {
3687 temp = assign_temp (type, 0, 1, 1);
3688 emit_move_insn (temp, xinner);
3689 xinner = temp;
3690 }
3691 }
3692
3693 gcc_assert (size);
3694
3695 /* USED is now the # of bytes we need not copy to the stack
3696 because registers will take care of them. */
3697
3698 if (partial != 0)
3699 xinner = adjust_address (xinner, BLKmode, used);
3700
3701 /* If the partial register-part of the arg counts in its stack size,
3702 skip the part of stack space corresponding to the registers.
3703 Otherwise, start copying to the beginning of the stack space,
3704 by setting SKIP to 0. */
3705 skip = (reg_parm_stack_space == 0) ? 0 : used;
3706
3707 #ifdef PUSH_ROUNDING
3708 /* Do it with several push insns if that doesn't take lots of insns
3709 and if there is no difficulty with push insns that skip bytes
3710 on the stack for alignment purposes. */
3711 if (args_addr == 0
3712 && PUSH_ARGS
3713 && CONST_INT_P (size)
3714 && skip == 0
3715 && MEM_ALIGN (xinner) >= align
3716 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
3717 /* Here we avoid the case of a structure whose weak alignment
3718 forces many pushes of a small amount of data,
3719 and such small pushes do rounding that causes trouble. */
3720 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
3721 || align >= BIGGEST_ALIGNMENT
3722 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
3723 == (align / BITS_PER_UNIT)))
3724 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
3725 {
3726 /* Push padding now if padding above and stack grows down,
3727 or if padding below and stack grows up.
3728 But if space already allocated, this has already been done. */
3729 if (extra && args_addr == 0
3730 && where_pad != none && where_pad != stack_direction)
3731 anti_adjust_stack (GEN_INT (extra));
3732
3733 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
3734 }
3735 else
3736 #endif /* PUSH_ROUNDING */
3737 {
3738 rtx target;
3739
3740 /* Otherwise make space on the stack and copy the data
3741 to the address of that space. */
3742
3743 /* Deduct words put into registers from the size we must copy. */
3744 if (partial != 0)
3745 {
3746 if (CONST_INT_P (size))
3747 size = GEN_INT (INTVAL (size) - used);
3748 else
3749 size = expand_binop (GET_MODE (size), sub_optab, size,
3750 GEN_INT (used), NULL_RTX, 0,
3751 OPTAB_LIB_WIDEN);
3752 }
3753
3754 /* Get the address of the stack space.
3755 In this case, we do not deal with EXTRA separately.
3756 A single stack adjust will do. */
3757 if (! args_addr)
3758 {
3759 temp = push_block (size, extra, where_pad == downward);
3760 extra = 0;
3761 }
3762 else if (CONST_INT_P (args_so_far))
3763 temp = memory_address (BLKmode,
3764 plus_constant (args_addr,
3765 skip + INTVAL (args_so_far)));
3766 else
3767 temp = memory_address (BLKmode,
3768 plus_constant (gen_rtx_PLUS (Pmode,
3769 args_addr,
3770 args_so_far),
3771 skip));
3772
3773 if (!ACCUMULATE_OUTGOING_ARGS)
3774 {
3775 /* If the source is referenced relative to the stack pointer,
3776 copy it to another register to stabilize it. We do not need
3777 to do this if we know that we won't be changing sp. */
3778
3779 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
3780 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
3781 temp = copy_to_reg (temp);
3782 }
3783
3784 target = gen_rtx_MEM (BLKmode, temp);
3785
3786 /* We do *not* set_mem_attributes here, because incoming arguments
3787 may overlap with sibling call outgoing arguments and we cannot
3788 allow reordering of reads from function arguments with stores
3789 to outgoing arguments of sibling calls. We do, however, want
3790 to record the alignment of the stack slot. */
3791 /* ALIGN may well be better aligned than TYPE, e.g. due to
3792 PARM_BOUNDARY. Assume the caller isn't lying. */
3793 set_mem_align (target, align);
3794
3795 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
3796 }
3797 }
3798 else if (partial > 0)
3799 {
3800 /* Scalar partly in registers. */
3801
3802 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
3803 int i;
3804 int not_stack;
3805 /* # bytes of start of argument
3806 that we must make space for but need not store. */
3807 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3808 int args_offset = INTVAL (args_so_far);
3809 int skip;
3810
3811 /* Push padding now if padding above and stack grows down,
3812 or if padding below and stack grows up.
3813 But if space already allocated, this has already been done. */
3814 if (extra && args_addr == 0
3815 && where_pad != none && where_pad != stack_direction)
3816 anti_adjust_stack (GEN_INT (extra));
3817
3818 /* If we make space by pushing it, we might as well push
3819 the real data. Otherwise, we can leave OFFSET nonzero
3820 and leave the space uninitialized. */
3821 if (args_addr == 0)
3822 offset = 0;
3823
3824 /* Now NOT_STACK gets the number of words that we don't need to
3825 allocate on the stack. Convert OFFSET to words too. */
3826 not_stack = (partial - offset) / UNITS_PER_WORD;
3827 offset /= UNITS_PER_WORD;
3828
3829 /* If the partial register-part of the arg counts in its stack size,
3830 skip the part of stack space corresponding to the registers.
3831 Otherwise, start copying to the beginning of the stack space,
3832 by setting SKIP to 0. */
3833 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
3834
3835 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
3836 x = validize_mem (force_const_mem (mode, x));
3837
3838 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
3839 SUBREGs of such registers are not allowed. */
3840 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
3841 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
3842 x = copy_to_reg (x);
3843
3844 /* Loop over all the words allocated on the stack for this arg. */
3845 /* We can do it by words, because any scalar bigger than a word
3846 has a size a multiple of a word. */
3847 #ifndef PUSH_ARGS_REVERSED
3848 for (i = not_stack; i < size; i++)
3849 #else
3850 for (i = size - 1; i >= not_stack; i--)
3851 #endif
3852 if (i >= not_stack + offset)
3853 emit_push_insn (operand_subword_force (x, i, mode),
3854 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
3855 0, args_addr,
3856 GEN_INT (args_offset + ((i - not_stack + skip)
3857 * UNITS_PER_WORD)),
3858 reg_parm_stack_space, alignment_pad);
3859 }
3860 else
3861 {
3862 rtx addr;
3863 rtx dest;
3864
3865 /* Push padding now if padding above and stack grows down,
3866 or if padding below and stack grows up.
3867 But if space already allocated, this has already been done. */
3868 if (extra && args_addr == 0
3869 && where_pad != none && where_pad != stack_direction)
3870 anti_adjust_stack (GEN_INT (extra));
3871
3872 #ifdef PUSH_ROUNDING
3873 if (args_addr == 0 && PUSH_ARGS)
3874 emit_single_push_insn (mode, x, type);
3875 else
3876 #endif
3877 {
3878 if (CONST_INT_P (args_so_far))
3879 addr
3880 = memory_address (mode,
3881 plus_constant (args_addr,
3882 INTVAL (args_so_far)));
3883 else
3884 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
3885 args_so_far));
3886 dest = gen_rtx_MEM (mode, addr);
3887
3888 /* We do *not* set_mem_attributes here, because incoming arguments
3889 may overlap with sibling call outgoing arguments and we cannot
3890 allow reordering of reads from function arguments with stores
3891 to outgoing arguments of sibling calls. We do, however, want
3892 to record the alignment of the stack slot. */
3893 /* ALIGN may well be better aligned than TYPE, e.g. due to
3894 PARM_BOUNDARY. Assume the caller isn't lying. */
3895 set_mem_align (dest, align);
3896
3897 emit_move_insn (dest, x);
3898 }
3899 }
3900
3901 /* If part should go in registers, copy that part
3902 into the appropriate registers. Do this now, at the end,
3903 since mem-to-mem copies above may do function calls. */
3904 if (partial > 0 && reg != 0)
3905 {
3906 /* Handle calls that pass values in multiple non-contiguous locations.
3907 The Irix 6 ABI has examples of this. */
3908 if (GET_CODE (reg) == PARALLEL)
3909 emit_group_load (reg, x, type, -1);
3910 else
3911 {
3912 gcc_assert (partial % UNITS_PER_WORD == 0);
3913 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
3914 }
3915 }
3916
3917 if (extra && args_addr == 0 && where_pad == stack_direction)
3918 anti_adjust_stack (GEN_INT (extra));
3919
3920 if (alignment_pad && args_addr == 0)
3921 anti_adjust_stack (alignment_pad);
3922 }
3923 \f
3924 /* Return X if X can be used as a subtarget in a sequence of arithmetic
3925 operations. */
3926
3927 static rtx
3928 get_subtarget (rtx x)
3929 {
3930 return (optimize
3931 || x == 0
3932 /* Only registers can be subtargets. */
3933 || !REG_P (x)
3934 /* Don't use hard regs to avoid extending their life. */
3935 || REGNO (x) < FIRST_PSEUDO_REGISTER
3936 ? 0 : x);
3937 }
3938
3939 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
3940 FIELD is a bitfield. Returns true if the optimization was successful,
3941 and there's nothing else to do. */
3942
3943 static bool
3944 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
3945 unsigned HOST_WIDE_INT bitpos,
3946 unsigned HOST_WIDE_INT bitregion_start,
3947 unsigned HOST_WIDE_INT bitregion_end,
3948 enum machine_mode mode1, rtx str_rtx,
3949 tree to, tree src)
3950 {
3951 enum machine_mode str_mode = GET_MODE (str_rtx);
3952 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
3953 tree op0, op1;
3954 rtx value, result;
3955 optab binop;
3956 gimple srcstmt;
3957 enum tree_code code;
3958
3959 if (mode1 != VOIDmode
3960 || bitsize >= BITS_PER_WORD
3961 || str_bitsize > BITS_PER_WORD
3962 || TREE_SIDE_EFFECTS (to)
3963 || TREE_THIS_VOLATILE (to))
3964 return false;
3965
3966 STRIP_NOPS (src);
3967 if (TREE_CODE (src) != SSA_NAME)
3968 return false;
3969 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
3970 return false;
3971
3972 srcstmt = get_gimple_for_ssa_name (src);
3973 if (!srcstmt
3974 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
3975 return false;
3976
3977 code = gimple_assign_rhs_code (srcstmt);
3978
3979 op0 = gimple_assign_rhs1 (srcstmt);
3980
3981 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
3982 to find its initialization. Hopefully the initialization will
3983 be from a bitfield load. */
3984 if (TREE_CODE (op0) == SSA_NAME)
3985 {
3986 gimple op0stmt = get_gimple_for_ssa_name (op0);
3987
3988 /* We want to eventually have OP0 be the same as TO, which
3989 should be a bitfield. */
3990 if (!op0stmt
3991 || !is_gimple_assign (op0stmt)
3992 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
3993 return false;
3994 op0 = gimple_assign_rhs1 (op0stmt);
3995 }
3996
3997 op1 = gimple_assign_rhs2 (srcstmt);
3998
3999 if (!operand_equal_p (to, op0, 0))
4000 return false;
4001
4002 if (MEM_P (str_rtx))
4003 {
4004 unsigned HOST_WIDE_INT offset1;
4005
4006 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4007 str_mode = word_mode;
4008 str_mode = get_best_mode (bitsize, bitpos,
4009 bitregion_start, bitregion_end,
4010 MEM_ALIGN (str_rtx), str_mode, 0);
4011 if (str_mode == VOIDmode)
4012 return false;
4013 str_bitsize = GET_MODE_BITSIZE (str_mode);
4014
4015 offset1 = bitpos;
4016 bitpos %= str_bitsize;
4017 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4018 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4019 }
4020 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4021 return false;
4022
4023 /* If the bit field covers the whole REG/MEM, store_field
4024 will likely generate better code. */
4025 if (bitsize >= str_bitsize)
4026 return false;
4027
4028 /* We can't handle fields split across multiple entities. */
4029 if (bitpos + bitsize > str_bitsize)
4030 return false;
4031
4032 if (BYTES_BIG_ENDIAN)
4033 bitpos = str_bitsize - bitpos - bitsize;
4034
4035 switch (code)
4036 {
4037 case PLUS_EXPR:
4038 case MINUS_EXPR:
4039 /* For now, just optimize the case of the topmost bitfield
4040 where we don't need to do any masking and also
4041 1 bit bitfields where xor can be used.
4042 We might win by one instruction for the other bitfields
4043 too if insv/extv instructions aren't used, so that
4044 can be added later. */
4045 if (bitpos + bitsize != str_bitsize
4046 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4047 break;
4048
4049 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4050 value = convert_modes (str_mode,
4051 TYPE_MODE (TREE_TYPE (op1)), value,
4052 TYPE_UNSIGNED (TREE_TYPE (op1)));
4053
4054 /* We may be accessing data outside the field, which means
4055 we can alias adjacent data. */
4056 if (MEM_P (str_rtx))
4057 {
4058 str_rtx = shallow_copy_rtx (str_rtx);
4059 set_mem_alias_set (str_rtx, 0);
4060 set_mem_expr (str_rtx, 0);
4061 }
4062
4063 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4064 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4065 {
4066 value = expand_and (str_mode, value, const1_rtx, NULL);
4067 binop = xor_optab;
4068 }
4069 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4070 bitpos, NULL_RTX, 1);
4071 result = expand_binop (str_mode, binop, str_rtx,
4072 value, str_rtx, 1, OPTAB_WIDEN);
4073 if (result != str_rtx)
4074 emit_move_insn (str_rtx, result);
4075 return true;
4076
4077 case BIT_IOR_EXPR:
4078 case BIT_XOR_EXPR:
4079 if (TREE_CODE (op1) != INTEGER_CST)
4080 break;
4081 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4082 value = convert_modes (GET_MODE (str_rtx),
4083 TYPE_MODE (TREE_TYPE (op1)), value,
4084 TYPE_UNSIGNED (TREE_TYPE (op1)));
4085
4086 /* We may be accessing data outside the field, which means
4087 we can alias adjacent data. */
4088 if (MEM_P (str_rtx))
4089 {
4090 str_rtx = shallow_copy_rtx (str_rtx);
4091 set_mem_alias_set (str_rtx, 0);
4092 set_mem_expr (str_rtx, 0);
4093 }
4094
4095 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4096 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4097 {
4098 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4099 - 1);
4100 value = expand_and (GET_MODE (str_rtx), value, mask,
4101 NULL_RTX);
4102 }
4103 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4104 bitpos, NULL_RTX, 1);
4105 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4106 value, str_rtx, 1, OPTAB_WIDEN);
4107 if (result != str_rtx)
4108 emit_move_insn (str_rtx, result);
4109 return true;
4110
4111 default:
4112 break;
4113 }
4114
4115 return false;
4116 }
4117
4118 /* In the C++ memory model, consecutive bit fields in a structure are
4119 considered one memory location.
4120
4121 Given a COMPONENT_REF, this function returns the bit range of
4122 consecutive bits in which this COMPONENT_REF belongs in. The
4123 values are returned in *BITSTART and *BITEND. If either the C++
4124 memory model is not activated, or this memory access is not thread
4125 visible, 0 is returned in *BITSTART and *BITEND.
4126
4127 EXP is the COMPONENT_REF.
4128 INNERDECL is the actual object being referenced.
4129 BITPOS is the position in bits where the bit starts within the structure.
4130 BITSIZE is size in bits of the field being referenced in EXP.
4131
4132 For example, while storing into FOO.A here...
4133
4134 struct {
4135 BIT 0:
4136 unsigned int a : 4;
4137 unsigned int b : 1;
4138 BIT 8:
4139 unsigned char c;
4140 unsigned int d : 6;
4141 } foo;
4142
4143 ...we are not allowed to store past <b>, so for the layout above, a
4144 range of 0..7 (because no one cares if we store into the
4145 padding). */
4146
4147 static void
4148 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4149 unsigned HOST_WIDE_INT *bitend,
4150 tree exp, tree innerdecl,
4151 HOST_WIDE_INT bitpos, HOST_WIDE_INT bitsize)
4152 {
4153 tree field, record_type, fld;
4154 bool found_field = false;
4155 bool prev_field_is_bitfield;
4156
4157 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4158
4159 /* If other threads can't see this value, no need to restrict stores. */
4160 if (ALLOW_STORE_DATA_RACES
4161 || (!ptr_deref_may_alias_global_p (innerdecl)
4162 && (DECL_THREAD_LOCAL_P (innerdecl)
4163 || !TREE_STATIC (innerdecl))))
4164 {
4165 *bitstart = *bitend = 0;
4166 return;
4167 }
4168
4169 /* Bit field we're storing into. */
4170 field = TREE_OPERAND (exp, 1);
4171 record_type = DECL_FIELD_CONTEXT (field);
4172
4173 /* Count the contiguous bitfields for the memory location that
4174 contains FIELD. */
4175 *bitstart = 0;
4176 prev_field_is_bitfield = true;
4177 for (fld = TYPE_FIELDS (record_type); fld; fld = DECL_CHAIN (fld))
4178 {
4179 tree t, offset;
4180 enum machine_mode mode;
4181 int unsignedp, volatilep;
4182
4183 if (TREE_CODE (fld) != FIELD_DECL)
4184 continue;
4185
4186 t = build3 (COMPONENT_REF, TREE_TYPE (exp),
4187 unshare_expr (TREE_OPERAND (exp, 0)),
4188 fld, NULL_TREE);
4189 get_inner_reference (t, &bitsize, &bitpos, &offset,
4190 &mode, &unsignedp, &volatilep, true);
4191
4192 if (field == fld)
4193 found_field = true;
4194
4195 if (DECL_BIT_FIELD_TYPE (fld) && bitsize > 0)
4196 {
4197 if (prev_field_is_bitfield == false)
4198 {
4199 *bitstart = bitpos;
4200 prev_field_is_bitfield = true;
4201 }
4202 }
4203 else
4204 {
4205 prev_field_is_bitfield = false;
4206 if (found_field)
4207 break;
4208 }
4209 }
4210 gcc_assert (found_field);
4211
4212 if (fld)
4213 {
4214 /* We found the end of the bit field sequence. Include the
4215 padding up to the next field and be done. */
4216 *bitend = bitpos - 1;
4217 }
4218 else
4219 {
4220 /* If this is the last element in the structure, include the padding
4221 at the end of structure. */
4222 *bitend = TREE_INT_CST_LOW (TYPE_SIZE (record_type)) - 1;
4223 }
4224 }
4225
4226 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4227 is true, try generating a nontemporal store. */
4228
4229 void
4230 expand_assignment (tree to, tree from, bool nontemporal)
4231 {
4232 rtx to_rtx = 0;
4233 rtx result;
4234 enum machine_mode mode;
4235 int align;
4236 enum insn_code icode;
4237
4238 /* Don't crash if the lhs of the assignment was erroneous. */
4239 if (TREE_CODE (to) == ERROR_MARK)
4240 {
4241 expand_normal (from);
4242 return;
4243 }
4244
4245 /* Optimize away no-op moves without side-effects. */
4246 if (operand_equal_p (to, from, 0))
4247 return;
4248
4249 mode = TYPE_MODE (TREE_TYPE (to));
4250 if ((TREE_CODE (to) == MEM_REF
4251 || TREE_CODE (to) == TARGET_MEM_REF)
4252 && mode != BLKmode
4253 && ((align = MAX (TYPE_ALIGN (TREE_TYPE (to)),
4254 get_object_alignment (to, BIGGEST_ALIGNMENT)))
4255 < (signed) GET_MODE_ALIGNMENT (mode))
4256 && ((icode = optab_handler (movmisalign_optab, mode))
4257 != CODE_FOR_nothing))
4258 {
4259 struct expand_operand ops[2];
4260 enum machine_mode address_mode;
4261 rtx reg, op0, mem;
4262
4263 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4264 reg = force_not_mem (reg);
4265
4266 if (TREE_CODE (to) == MEM_REF)
4267 {
4268 addr_space_t as
4269 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (to, 1))));
4270 tree base = TREE_OPERAND (to, 0);
4271 address_mode = targetm.addr_space.address_mode (as);
4272 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4273 op0 = convert_memory_address_addr_space (address_mode, op0, as);
4274 if (!integer_zerop (TREE_OPERAND (to, 1)))
4275 {
4276 rtx off
4277 = immed_double_int_const (mem_ref_offset (to), address_mode);
4278 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
4279 }
4280 op0 = memory_address_addr_space (mode, op0, as);
4281 mem = gen_rtx_MEM (mode, op0);
4282 set_mem_attributes (mem, to, 0);
4283 set_mem_addr_space (mem, as);
4284 }
4285 else if (TREE_CODE (to) == TARGET_MEM_REF)
4286 {
4287 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (to));
4288 struct mem_address addr;
4289
4290 get_address_description (to, &addr);
4291 op0 = addr_for_mem_ref (&addr, as, true);
4292 op0 = memory_address_addr_space (mode, op0, as);
4293 mem = gen_rtx_MEM (mode, op0);
4294 set_mem_attributes (mem, to, 0);
4295 set_mem_addr_space (mem, as);
4296 }
4297 else
4298 gcc_unreachable ();
4299 if (TREE_THIS_VOLATILE (to))
4300 MEM_VOLATILE_P (mem) = 1;
4301
4302 create_fixed_operand (&ops[0], mem);
4303 create_input_operand (&ops[1], reg, mode);
4304 /* The movmisalign<mode> pattern cannot fail, else the assignment would
4305 silently be omitted. */
4306 expand_insn (icode, 2, ops);
4307 return;
4308 }
4309
4310 /* Assignment of a structure component needs special treatment
4311 if the structure component's rtx is not simply a MEM.
4312 Assignment of an array element at a constant index, and assignment of
4313 an array element in an unaligned packed structure field, has the same
4314 problem. */
4315 if (handled_component_p (to)
4316 /* ??? We only need to handle MEM_REF here if the access is not
4317 a full access of the base object. */
4318 || (TREE_CODE (to) == MEM_REF
4319 && TREE_CODE (TREE_OPERAND (to, 0)) == ADDR_EXPR)
4320 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4321 {
4322 enum machine_mode mode1;
4323 HOST_WIDE_INT bitsize, bitpos;
4324 unsigned HOST_WIDE_INT bitregion_start = 0;
4325 unsigned HOST_WIDE_INT bitregion_end = 0;
4326 tree offset;
4327 int unsignedp;
4328 int volatilep = 0;
4329 tree tem;
4330
4331 push_temp_slots ();
4332 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4333 &unsignedp, &volatilep, true);
4334
4335 if (TREE_CODE (to) == COMPONENT_REF
4336 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4337 get_bit_range (&bitregion_start, &bitregion_end,
4338 to, tem, bitpos, bitsize);
4339
4340 /* If we are going to use store_bit_field and extract_bit_field,
4341 make sure to_rtx will be safe for multiple use. */
4342
4343 to_rtx = expand_normal (tem);
4344
4345 /* If the bitfield is volatile, we want to access it in the
4346 field's mode, not the computed mode.
4347 If a MEM has VOIDmode (external with incomplete type),
4348 use BLKmode for it instead. */
4349 if (MEM_P (to_rtx))
4350 {
4351 if (volatilep && flag_strict_volatile_bitfields > 0)
4352 to_rtx = adjust_address (to_rtx, mode1, 0);
4353 else if (GET_MODE (to_rtx) == VOIDmode)
4354 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4355 }
4356
4357 if (offset != 0)
4358 {
4359 enum machine_mode address_mode;
4360 rtx offset_rtx;
4361
4362 if (!MEM_P (to_rtx))
4363 {
4364 /* We can get constant negative offsets into arrays with broken
4365 user code. Translate this to a trap instead of ICEing. */
4366 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4367 expand_builtin_trap ();
4368 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4369 }
4370
4371 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4372 address_mode
4373 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4374 if (GET_MODE (offset_rtx) != address_mode)
4375 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4376
4377 /* A constant address in TO_RTX can have VOIDmode, we must not try
4378 to call force_reg for that case. Avoid that case. */
4379 if (MEM_P (to_rtx)
4380 && GET_MODE (to_rtx) == BLKmode
4381 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4382 && bitsize > 0
4383 && (bitpos % bitsize) == 0
4384 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4385 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4386 {
4387 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4388 bitpos = 0;
4389 }
4390
4391 to_rtx = offset_address (to_rtx, offset_rtx,
4392 highest_pow2_factor_for_target (to,
4393 offset));
4394 }
4395
4396 /* No action is needed if the target is not a memory and the field
4397 lies completely outside that target. This can occur if the source
4398 code contains an out-of-bounds access to a small array. */
4399 if (!MEM_P (to_rtx)
4400 && GET_MODE (to_rtx) != BLKmode
4401 && (unsigned HOST_WIDE_INT) bitpos
4402 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4403 {
4404 expand_normal (from);
4405 result = NULL;
4406 }
4407 /* Handle expand_expr of a complex value returning a CONCAT. */
4408 else if (GET_CODE (to_rtx) == CONCAT)
4409 {
4410 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4411 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4412 && bitpos == 0
4413 && bitsize == mode_bitsize)
4414 result = store_expr (from, to_rtx, false, nontemporal);
4415 else if (bitsize == mode_bitsize / 2
4416 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4417 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4418 nontemporal);
4419 else if (bitpos + bitsize <= mode_bitsize / 2)
4420 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4421 bitregion_start, bitregion_end,
4422 mode1, from, TREE_TYPE (tem),
4423 get_alias_set (to), nontemporal);
4424 else if (bitpos >= mode_bitsize / 2)
4425 result = store_field (XEXP (to_rtx, 1), bitsize,
4426 bitpos - mode_bitsize / 2,
4427 bitregion_start, bitregion_end,
4428 mode1, from,
4429 TREE_TYPE (tem), get_alias_set (to),
4430 nontemporal);
4431 else if (bitpos == 0 && bitsize == mode_bitsize)
4432 {
4433 rtx from_rtx;
4434 result = expand_normal (from);
4435 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4436 TYPE_MODE (TREE_TYPE (from)), 0);
4437 emit_move_insn (XEXP (to_rtx, 0),
4438 read_complex_part (from_rtx, false));
4439 emit_move_insn (XEXP (to_rtx, 1),
4440 read_complex_part (from_rtx, true));
4441 }
4442 else
4443 {
4444 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4445 GET_MODE_SIZE (GET_MODE (to_rtx)),
4446 0);
4447 write_complex_part (temp, XEXP (to_rtx, 0), false);
4448 write_complex_part (temp, XEXP (to_rtx, 1), true);
4449 result = store_field (temp, bitsize, bitpos,
4450 bitregion_start, bitregion_end,
4451 mode1, from,
4452 TREE_TYPE (tem), get_alias_set (to),
4453 nontemporal);
4454 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4455 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4456 }
4457 }
4458 else
4459 {
4460 if (MEM_P (to_rtx))
4461 {
4462 /* If the field is at offset zero, we could have been given the
4463 DECL_RTX of the parent struct. Don't munge it. */
4464 to_rtx = shallow_copy_rtx (to_rtx);
4465
4466 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4467
4468 /* Deal with volatile and readonly fields. The former is only
4469 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4470 if (volatilep)
4471 MEM_VOLATILE_P (to_rtx) = 1;
4472 if (component_uses_parent_alias_set (to))
4473 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4474 }
4475
4476 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4477 bitregion_start, bitregion_end,
4478 mode1,
4479 to_rtx, to, from))
4480 result = NULL;
4481 else
4482 result = store_field (to_rtx, bitsize, bitpos,
4483 bitregion_start, bitregion_end,
4484 mode1, from,
4485 TREE_TYPE (tem), get_alias_set (to),
4486 nontemporal);
4487 }
4488
4489 if (result)
4490 preserve_temp_slots (result);
4491 free_temp_slots ();
4492 pop_temp_slots ();
4493 return;
4494 }
4495
4496 /* If the rhs is a function call and its value is not an aggregate,
4497 call the function before we start to compute the lhs.
4498 This is needed for correct code for cases such as
4499 val = setjmp (buf) on machines where reference to val
4500 requires loading up part of an address in a separate insn.
4501
4502 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4503 since it might be a promoted variable where the zero- or sign- extension
4504 needs to be done. Handling this in the normal way is safe because no
4505 computation is done before the call. The same is true for SSA names. */
4506 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4507 && COMPLETE_TYPE_P (TREE_TYPE (from))
4508 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4509 && ! (((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
4510 && REG_P (DECL_RTL (to)))
4511 || TREE_CODE (to) == SSA_NAME))
4512 {
4513 rtx value;
4514
4515 push_temp_slots ();
4516 value = expand_normal (from);
4517 if (to_rtx == 0)
4518 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4519
4520 /* Handle calls that return values in multiple non-contiguous locations.
4521 The Irix 6 ABI has examples of this. */
4522 if (GET_CODE (to_rtx) == PARALLEL)
4523 emit_group_load (to_rtx, value, TREE_TYPE (from),
4524 int_size_in_bytes (TREE_TYPE (from)));
4525 else if (GET_MODE (to_rtx) == BLKmode)
4526 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4527 else
4528 {
4529 if (POINTER_TYPE_P (TREE_TYPE (to)))
4530 value = convert_memory_address_addr_space
4531 (GET_MODE (to_rtx), value,
4532 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4533
4534 emit_move_insn (to_rtx, value);
4535 }
4536 preserve_temp_slots (to_rtx);
4537 free_temp_slots ();
4538 pop_temp_slots ();
4539 return;
4540 }
4541
4542 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
4543 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
4544
4545 if (to_rtx == 0)
4546 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4547
4548 /* Don't move directly into a return register. */
4549 if (TREE_CODE (to) == RESULT_DECL
4550 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4551 {
4552 rtx temp;
4553
4554 push_temp_slots ();
4555 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4556
4557 if (GET_CODE (to_rtx) == PARALLEL)
4558 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4559 int_size_in_bytes (TREE_TYPE (from)));
4560 else
4561 emit_move_insn (to_rtx, temp);
4562
4563 preserve_temp_slots (to_rtx);
4564 free_temp_slots ();
4565 pop_temp_slots ();
4566 return;
4567 }
4568
4569 /* In case we are returning the contents of an object which overlaps
4570 the place the value is being stored, use a safe function when copying
4571 a value through a pointer into a structure value return block. */
4572 if (TREE_CODE (to) == RESULT_DECL
4573 && TREE_CODE (from) == INDIRECT_REF
4574 && ADDR_SPACE_GENERIC_P
4575 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4576 && refs_may_alias_p (to, from)
4577 && cfun->returns_struct
4578 && !cfun->returns_pcc_struct)
4579 {
4580 rtx from_rtx, size;
4581
4582 push_temp_slots ();
4583 size = expr_size (from);
4584 from_rtx = expand_normal (from);
4585
4586 emit_library_call (memmove_libfunc, LCT_NORMAL,
4587 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4588 XEXP (from_rtx, 0), Pmode,
4589 convert_to_mode (TYPE_MODE (sizetype),
4590 size, TYPE_UNSIGNED (sizetype)),
4591 TYPE_MODE (sizetype));
4592
4593 preserve_temp_slots (to_rtx);
4594 free_temp_slots ();
4595 pop_temp_slots ();
4596 return;
4597 }
4598
4599 /* Compute FROM and store the value in the rtx we got. */
4600
4601 push_temp_slots ();
4602 result = store_expr (from, to_rtx, 0, nontemporal);
4603 preserve_temp_slots (result);
4604 free_temp_slots ();
4605 pop_temp_slots ();
4606 return;
4607 }
4608
4609 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4610 succeeded, false otherwise. */
4611
4612 bool
4613 emit_storent_insn (rtx to, rtx from)
4614 {
4615 struct expand_operand ops[2];
4616 enum machine_mode mode = GET_MODE (to);
4617 enum insn_code code = optab_handler (storent_optab, mode);
4618
4619 if (code == CODE_FOR_nothing)
4620 return false;
4621
4622 create_fixed_operand (&ops[0], to);
4623 create_input_operand (&ops[1], from, mode);
4624 return maybe_expand_insn (code, 2, ops);
4625 }
4626
4627 /* Generate code for computing expression EXP,
4628 and storing the value into TARGET.
4629
4630 If the mode is BLKmode then we may return TARGET itself.
4631 It turns out that in BLKmode it doesn't cause a problem.
4632 because C has no operators that could combine two different
4633 assignments into the same BLKmode object with different values
4634 with no sequence point. Will other languages need this to
4635 be more thorough?
4636
4637 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4638 stack, and block moves may need to be treated specially.
4639
4640 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4641
4642 rtx
4643 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4644 {
4645 rtx temp;
4646 rtx alt_rtl = NULL_RTX;
4647 location_t loc = EXPR_LOCATION (exp);
4648
4649 if (VOID_TYPE_P (TREE_TYPE (exp)))
4650 {
4651 /* C++ can generate ?: expressions with a throw expression in one
4652 branch and an rvalue in the other. Here, we resolve attempts to
4653 store the throw expression's nonexistent result. */
4654 gcc_assert (!call_param_p);
4655 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4656 return NULL_RTX;
4657 }
4658 if (TREE_CODE (exp) == COMPOUND_EXPR)
4659 {
4660 /* Perform first part of compound expression, then assign from second
4661 part. */
4662 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4663 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4664 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4665 nontemporal);
4666 }
4667 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4668 {
4669 /* For conditional expression, get safe form of the target. Then
4670 test the condition, doing the appropriate assignment on either
4671 side. This avoids the creation of unnecessary temporaries.
4672 For non-BLKmode, it is more efficient not to do this. */
4673
4674 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
4675
4676 do_pending_stack_adjust ();
4677 NO_DEFER_POP;
4678 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
4679 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4680 nontemporal);
4681 emit_jump_insn (gen_jump (lab2));
4682 emit_barrier ();
4683 emit_label (lab1);
4684 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
4685 nontemporal);
4686 emit_label (lab2);
4687 OK_DEFER_POP;
4688
4689 return NULL_RTX;
4690 }
4691 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
4692 /* If this is a scalar in a register that is stored in a wider mode
4693 than the declared mode, compute the result into its declared mode
4694 and then convert to the wider mode. Our value is the computed
4695 expression. */
4696 {
4697 rtx inner_target = 0;
4698
4699 /* We can do the conversion inside EXP, which will often result
4700 in some optimizations. Do the conversion in two steps: first
4701 change the signedness, if needed, then the extend. But don't
4702 do this if the type of EXP is a subtype of something else
4703 since then the conversion might involve more than just
4704 converting modes. */
4705 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
4706 && TREE_TYPE (TREE_TYPE (exp)) == 0
4707 && GET_MODE_PRECISION (GET_MODE (target))
4708 == TYPE_PRECISION (TREE_TYPE (exp)))
4709 {
4710 if (TYPE_UNSIGNED (TREE_TYPE (exp))
4711 != SUBREG_PROMOTED_UNSIGNED_P (target))
4712 {
4713 /* Some types, e.g. Fortran's logical*4, won't have a signed
4714 version, so use the mode instead. */
4715 tree ntype
4716 = (signed_or_unsigned_type_for
4717 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
4718 if (ntype == NULL)
4719 ntype = lang_hooks.types.type_for_mode
4720 (TYPE_MODE (TREE_TYPE (exp)),
4721 SUBREG_PROMOTED_UNSIGNED_P (target));
4722
4723 exp = fold_convert_loc (loc, ntype, exp);
4724 }
4725
4726 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
4727 (GET_MODE (SUBREG_REG (target)),
4728 SUBREG_PROMOTED_UNSIGNED_P (target)),
4729 exp);
4730
4731 inner_target = SUBREG_REG (target);
4732 }
4733
4734 temp = expand_expr (exp, inner_target, VOIDmode,
4735 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4736
4737 /* If TEMP is a VOIDmode constant, use convert_modes to make
4738 sure that we properly convert it. */
4739 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
4740 {
4741 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4742 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
4743 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
4744 GET_MODE (target), temp,
4745 SUBREG_PROMOTED_UNSIGNED_P (target));
4746 }
4747
4748 convert_move (SUBREG_REG (target), temp,
4749 SUBREG_PROMOTED_UNSIGNED_P (target));
4750
4751 return NULL_RTX;
4752 }
4753 else if ((TREE_CODE (exp) == STRING_CST
4754 || (TREE_CODE (exp) == MEM_REF
4755 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
4756 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
4757 == STRING_CST
4758 && integer_zerop (TREE_OPERAND (exp, 1))))
4759 && !nontemporal && !call_param_p
4760 && MEM_P (target))
4761 {
4762 /* Optimize initialization of an array with a STRING_CST. */
4763 HOST_WIDE_INT exp_len, str_copy_len;
4764 rtx dest_mem;
4765 tree str = TREE_CODE (exp) == STRING_CST
4766 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
4767
4768 exp_len = int_expr_size (exp);
4769 if (exp_len <= 0)
4770 goto normal_expr;
4771
4772 if (TREE_STRING_LENGTH (str) <= 0)
4773 goto normal_expr;
4774
4775 str_copy_len = strlen (TREE_STRING_POINTER (str));
4776 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
4777 goto normal_expr;
4778
4779 str_copy_len = TREE_STRING_LENGTH (str);
4780 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
4781 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
4782 {
4783 str_copy_len += STORE_MAX_PIECES - 1;
4784 str_copy_len &= ~(STORE_MAX_PIECES - 1);
4785 }
4786 str_copy_len = MIN (str_copy_len, exp_len);
4787 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
4788 CONST_CAST (char *, TREE_STRING_POINTER (str)),
4789 MEM_ALIGN (target), false))
4790 goto normal_expr;
4791
4792 dest_mem = target;
4793
4794 dest_mem = store_by_pieces (dest_mem,
4795 str_copy_len, builtin_strncpy_read_str,
4796 CONST_CAST (char *,
4797 TREE_STRING_POINTER (str)),
4798 MEM_ALIGN (target), false,
4799 exp_len > str_copy_len ? 1 : 0);
4800 if (exp_len > str_copy_len)
4801 clear_storage (adjust_address (dest_mem, BLKmode, 0),
4802 GEN_INT (exp_len - str_copy_len),
4803 BLOCK_OP_NORMAL);
4804 return NULL_RTX;
4805 }
4806 else
4807 {
4808 rtx tmp_target;
4809
4810 normal_expr:
4811 /* If we want to use a nontemporal store, force the value to
4812 register first. */
4813 tmp_target = nontemporal ? NULL_RTX : target;
4814 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
4815 (call_param_p
4816 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
4817 &alt_rtl);
4818 }
4819
4820 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
4821 the same as that of TARGET, adjust the constant. This is needed, for
4822 example, in case it is a CONST_DOUBLE and we want only a word-sized
4823 value. */
4824 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
4825 && TREE_CODE (exp) != ERROR_MARK
4826 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
4827 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4828 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
4829
4830 /* If value was not generated in the target, store it there.
4831 Convert the value to TARGET's type first if necessary and emit the
4832 pending incrementations that have been queued when expanding EXP.
4833 Note that we cannot emit the whole queue blindly because this will
4834 effectively disable the POST_INC optimization later.
4835
4836 If TEMP and TARGET compare equal according to rtx_equal_p, but
4837 one or both of them are volatile memory refs, we have to distinguish
4838 two cases:
4839 - expand_expr has used TARGET. In this case, we must not generate
4840 another copy. This can be detected by TARGET being equal according
4841 to == .
4842 - expand_expr has not used TARGET - that means that the source just
4843 happens to have the same RTX form. Since temp will have been created
4844 by expand_expr, it will compare unequal according to == .
4845 We must generate a copy in this case, to reach the correct number
4846 of volatile memory references. */
4847
4848 if ((! rtx_equal_p (temp, target)
4849 || (temp != target && (side_effects_p (temp)
4850 || side_effects_p (target))))
4851 && TREE_CODE (exp) != ERROR_MARK
4852 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
4853 but TARGET is not valid memory reference, TEMP will differ
4854 from TARGET although it is really the same location. */
4855 && !(alt_rtl
4856 && rtx_equal_p (alt_rtl, target)
4857 && !side_effects_p (alt_rtl)
4858 && !side_effects_p (target))
4859 /* If there's nothing to copy, don't bother. Don't call
4860 expr_size unless necessary, because some front-ends (C++)
4861 expr_size-hook must not be given objects that are not
4862 supposed to be bit-copied or bit-initialized. */
4863 && expr_size (exp) != const0_rtx)
4864 {
4865 if (GET_MODE (temp) != GET_MODE (target)
4866 && GET_MODE (temp) != VOIDmode)
4867 {
4868 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
4869 if (GET_MODE (target) == BLKmode
4870 && GET_MODE (temp) == BLKmode)
4871 emit_block_move (target, temp, expr_size (exp),
4872 (call_param_p
4873 ? BLOCK_OP_CALL_PARM
4874 : BLOCK_OP_NORMAL));
4875 else if (GET_MODE (target) == BLKmode)
4876 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
4877 0, 0, 0, GET_MODE (temp), temp);
4878 else
4879 convert_move (target, temp, unsignedp);
4880 }
4881
4882 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
4883 {
4884 /* Handle copying a string constant into an array. The string
4885 constant may be shorter than the array. So copy just the string's
4886 actual length, and clear the rest. First get the size of the data
4887 type of the string, which is actually the size of the target. */
4888 rtx size = expr_size (exp);
4889
4890 if (CONST_INT_P (size)
4891 && INTVAL (size) < TREE_STRING_LENGTH (exp))
4892 emit_block_move (target, temp, size,
4893 (call_param_p
4894 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4895 else
4896 {
4897 enum machine_mode pointer_mode
4898 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
4899 enum machine_mode address_mode
4900 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
4901
4902 /* Compute the size of the data to copy from the string. */
4903 tree copy_size
4904 = size_binop_loc (loc, MIN_EXPR,
4905 make_tree (sizetype, size),
4906 size_int (TREE_STRING_LENGTH (exp)));
4907 rtx copy_size_rtx
4908 = expand_expr (copy_size, NULL_RTX, VOIDmode,
4909 (call_param_p
4910 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
4911 rtx label = 0;
4912
4913 /* Copy that much. */
4914 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
4915 TYPE_UNSIGNED (sizetype));
4916 emit_block_move (target, temp, copy_size_rtx,
4917 (call_param_p
4918 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4919
4920 /* Figure out how much is left in TARGET that we have to clear.
4921 Do all calculations in pointer_mode. */
4922 if (CONST_INT_P (copy_size_rtx))
4923 {
4924 size = plus_constant (size, -INTVAL (copy_size_rtx));
4925 target = adjust_address (target, BLKmode,
4926 INTVAL (copy_size_rtx));
4927 }
4928 else
4929 {
4930 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
4931 copy_size_rtx, NULL_RTX, 0,
4932 OPTAB_LIB_WIDEN);
4933
4934 if (GET_MODE (copy_size_rtx) != address_mode)
4935 copy_size_rtx = convert_to_mode (address_mode,
4936 copy_size_rtx,
4937 TYPE_UNSIGNED (sizetype));
4938
4939 target = offset_address (target, copy_size_rtx,
4940 highest_pow2_factor (copy_size));
4941 label = gen_label_rtx ();
4942 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
4943 GET_MODE (size), 0, label);
4944 }
4945
4946 if (size != const0_rtx)
4947 clear_storage (target, size, BLOCK_OP_NORMAL);
4948
4949 if (label)
4950 emit_label (label);
4951 }
4952 }
4953 /* Handle calls that return values in multiple non-contiguous locations.
4954 The Irix 6 ABI has examples of this. */
4955 else if (GET_CODE (target) == PARALLEL)
4956 emit_group_load (target, temp, TREE_TYPE (exp),
4957 int_size_in_bytes (TREE_TYPE (exp)));
4958 else if (GET_MODE (temp) == BLKmode)
4959 emit_block_move (target, temp, expr_size (exp),
4960 (call_param_p
4961 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4962 else if (nontemporal
4963 && emit_storent_insn (target, temp))
4964 /* If we managed to emit a nontemporal store, there is nothing else to
4965 do. */
4966 ;
4967 else
4968 {
4969 temp = force_operand (temp, target);
4970 if (temp != target)
4971 emit_move_insn (target, temp);
4972 }
4973 }
4974
4975 return NULL_RTX;
4976 }
4977 \f
4978 /* Return true if field F of structure TYPE is a flexible array. */
4979
4980 static bool
4981 flexible_array_member_p (const_tree f, const_tree type)
4982 {
4983 const_tree tf;
4984
4985 tf = TREE_TYPE (f);
4986 return (DECL_CHAIN (f) == NULL
4987 && TREE_CODE (tf) == ARRAY_TYPE
4988 && TYPE_DOMAIN (tf)
4989 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
4990 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
4991 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
4992 && int_size_in_bytes (type) >= 0);
4993 }
4994
4995 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
4996 must have in order for it to completely initialize a value of type TYPE.
4997 Return -1 if the number isn't known.
4998
4999 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5000
5001 static HOST_WIDE_INT
5002 count_type_elements (const_tree type, bool for_ctor_p)
5003 {
5004 switch (TREE_CODE (type))
5005 {
5006 case ARRAY_TYPE:
5007 {
5008 tree nelts;
5009
5010 nelts = array_type_nelts (type);
5011 if (nelts && host_integerp (nelts, 1))
5012 {
5013 unsigned HOST_WIDE_INT n;
5014
5015 n = tree_low_cst (nelts, 1) + 1;
5016 if (n == 0 || for_ctor_p)
5017 return n;
5018 else
5019 return n * count_type_elements (TREE_TYPE (type), false);
5020 }
5021 return for_ctor_p ? -1 : 1;
5022 }
5023
5024 case RECORD_TYPE:
5025 {
5026 unsigned HOST_WIDE_INT n;
5027 tree f;
5028
5029 n = 0;
5030 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5031 if (TREE_CODE (f) == FIELD_DECL)
5032 {
5033 if (!for_ctor_p)
5034 n += count_type_elements (TREE_TYPE (f), false);
5035 else if (!flexible_array_member_p (f, type))
5036 /* Don't count flexible arrays, which are not supposed
5037 to be initialized. */
5038 n += 1;
5039 }
5040
5041 return n;
5042 }
5043
5044 case UNION_TYPE:
5045 case QUAL_UNION_TYPE:
5046 {
5047 tree f;
5048 HOST_WIDE_INT n, m;
5049
5050 gcc_assert (!for_ctor_p);
5051 /* Estimate the number of scalars in each field and pick the
5052 maximum. Other estimates would do instead; the idea is simply
5053 to make sure that the estimate is not sensitive to the ordering
5054 of the fields. */
5055 n = 1;
5056 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5057 if (TREE_CODE (f) == FIELD_DECL)
5058 {
5059 m = count_type_elements (TREE_TYPE (f), false);
5060 /* If the field doesn't span the whole union, add an extra
5061 scalar for the rest. */
5062 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5063 TYPE_SIZE (type)) != 1)
5064 m++;
5065 if (n < m)
5066 n = m;
5067 }
5068 return n;
5069 }
5070
5071 case COMPLEX_TYPE:
5072 return 2;
5073
5074 case VECTOR_TYPE:
5075 return TYPE_VECTOR_SUBPARTS (type);
5076
5077 case INTEGER_TYPE:
5078 case REAL_TYPE:
5079 case FIXED_POINT_TYPE:
5080 case ENUMERAL_TYPE:
5081 case BOOLEAN_TYPE:
5082 case POINTER_TYPE:
5083 case OFFSET_TYPE:
5084 case REFERENCE_TYPE:
5085 return 1;
5086
5087 case ERROR_MARK:
5088 return 0;
5089
5090 case VOID_TYPE:
5091 case METHOD_TYPE:
5092 case FUNCTION_TYPE:
5093 case LANG_TYPE:
5094 default:
5095 gcc_unreachable ();
5096 }
5097 }
5098
5099 /* Helper for categorize_ctor_elements. Identical interface. */
5100
5101 static bool
5102 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5103 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5104 {
5105 unsigned HOST_WIDE_INT idx;
5106 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5107 tree value, purpose, elt_type;
5108
5109 /* Whether CTOR is a valid constant initializer, in accordance with what
5110 initializer_constant_valid_p does. If inferred from the constructor
5111 elements, true until proven otherwise. */
5112 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5113 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5114
5115 nz_elts = 0;
5116 init_elts = 0;
5117 num_fields = 0;
5118 elt_type = NULL_TREE;
5119
5120 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5121 {
5122 HOST_WIDE_INT mult = 1;
5123
5124 if (TREE_CODE (purpose) == RANGE_EXPR)
5125 {
5126 tree lo_index = TREE_OPERAND (purpose, 0);
5127 tree hi_index = TREE_OPERAND (purpose, 1);
5128
5129 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5130 mult = (tree_low_cst (hi_index, 1)
5131 - tree_low_cst (lo_index, 1) + 1);
5132 }
5133 num_fields += mult;
5134 elt_type = TREE_TYPE (value);
5135
5136 switch (TREE_CODE (value))
5137 {
5138 case CONSTRUCTOR:
5139 {
5140 HOST_WIDE_INT nz = 0, ic = 0;
5141
5142 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5143 p_complete);
5144
5145 nz_elts += mult * nz;
5146 init_elts += mult * ic;
5147
5148 if (const_from_elts_p && const_p)
5149 const_p = const_elt_p;
5150 }
5151 break;
5152
5153 case INTEGER_CST:
5154 case REAL_CST:
5155 case FIXED_CST:
5156 if (!initializer_zerop (value))
5157 nz_elts += mult;
5158 init_elts += mult;
5159 break;
5160
5161 case STRING_CST:
5162 nz_elts += mult * TREE_STRING_LENGTH (value);
5163 init_elts += mult * TREE_STRING_LENGTH (value);
5164 break;
5165
5166 case COMPLEX_CST:
5167 if (!initializer_zerop (TREE_REALPART (value)))
5168 nz_elts += mult;
5169 if (!initializer_zerop (TREE_IMAGPART (value)))
5170 nz_elts += mult;
5171 init_elts += mult;
5172 break;
5173
5174 case VECTOR_CST:
5175 {
5176 tree v;
5177 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
5178 {
5179 if (!initializer_zerop (TREE_VALUE (v)))
5180 nz_elts += mult;
5181 init_elts += mult;
5182 }
5183 }
5184 break;
5185
5186 default:
5187 {
5188 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5189 nz_elts += mult * tc;
5190 init_elts += mult * tc;
5191
5192 if (const_from_elts_p && const_p)
5193 const_p = initializer_constant_valid_p (value, elt_type)
5194 != NULL_TREE;
5195 }
5196 break;
5197 }
5198 }
5199
5200 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5201 num_fields, elt_type))
5202 *p_complete = false;
5203
5204 *p_nz_elts += nz_elts;
5205 *p_init_elts += init_elts;
5206
5207 return const_p;
5208 }
5209
5210 /* Examine CTOR to discover:
5211 * how many scalar fields are set to nonzero values,
5212 and place it in *P_NZ_ELTS;
5213 * how many scalar fields in total are in CTOR,
5214 and place it in *P_ELT_COUNT.
5215 * whether the constructor is complete -- in the sense that every
5216 meaningful byte is explicitly given a value --
5217 and place it in *P_COMPLETE.
5218
5219 Return whether or not CTOR is a valid static constant initializer, the same
5220 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5221
5222 bool
5223 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5224 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5225 {
5226 *p_nz_elts = 0;
5227 *p_init_elts = 0;
5228 *p_complete = true;
5229
5230 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5231 }
5232
5233 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5234 of which had type LAST_TYPE. Each element was itself a complete
5235 initializer, in the sense that every meaningful byte was explicitly
5236 given a value. Return true if the same is true for the constructor
5237 as a whole. */
5238
5239 bool
5240 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5241 const_tree last_type)
5242 {
5243 if (TREE_CODE (type) == UNION_TYPE
5244 || TREE_CODE (type) == QUAL_UNION_TYPE)
5245 {
5246 if (num_elts == 0)
5247 return false;
5248
5249 gcc_assert (num_elts == 1 && last_type);
5250
5251 /* ??? We could look at each element of the union, and find the
5252 largest element. Which would avoid comparing the size of the
5253 initialized element against any tail padding in the union.
5254 Doesn't seem worth the effort... */
5255 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5256 }
5257
5258 return count_type_elements (type, true) == num_elts;
5259 }
5260
5261 /* Return 1 if EXP contains mostly (3/4) zeros. */
5262
5263 static int
5264 mostly_zeros_p (const_tree exp)
5265 {
5266 if (TREE_CODE (exp) == CONSTRUCTOR)
5267 {
5268 HOST_WIDE_INT nz_elts, init_elts;
5269 bool complete_p;
5270
5271 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5272 return !complete_p || nz_elts < init_elts / 4;
5273 }
5274
5275 return initializer_zerop (exp);
5276 }
5277
5278 /* Return 1 if EXP contains all zeros. */
5279
5280 static int
5281 all_zeros_p (const_tree exp)
5282 {
5283 if (TREE_CODE (exp) == CONSTRUCTOR)
5284 {
5285 HOST_WIDE_INT nz_elts, init_elts;
5286 bool complete_p;
5287
5288 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5289 return nz_elts == 0;
5290 }
5291
5292 return initializer_zerop (exp);
5293 }
5294 \f
5295 /* Helper function for store_constructor.
5296 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5297 TYPE is the type of the CONSTRUCTOR, not the element type.
5298 CLEARED is as for store_constructor.
5299 ALIAS_SET is the alias set to use for any stores.
5300
5301 This provides a recursive shortcut back to store_constructor when it isn't
5302 necessary to go through store_field. This is so that we can pass through
5303 the cleared field to let store_constructor know that we may not have to
5304 clear a substructure if the outer structure has already been cleared. */
5305
5306 static void
5307 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5308 HOST_WIDE_INT bitpos, enum machine_mode mode,
5309 tree exp, tree type, int cleared,
5310 alias_set_type alias_set)
5311 {
5312 if (TREE_CODE (exp) == CONSTRUCTOR
5313 /* We can only call store_constructor recursively if the size and
5314 bit position are on a byte boundary. */
5315 && bitpos % BITS_PER_UNIT == 0
5316 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5317 /* If we have a nonzero bitpos for a register target, then we just
5318 let store_field do the bitfield handling. This is unlikely to
5319 generate unnecessary clear instructions anyways. */
5320 && (bitpos == 0 || MEM_P (target)))
5321 {
5322 if (MEM_P (target))
5323 target
5324 = adjust_address (target,
5325 GET_MODE (target) == BLKmode
5326 || 0 != (bitpos
5327 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5328 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5329
5330
5331 /* Update the alias set, if required. */
5332 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5333 && MEM_ALIAS_SET (target) != 0)
5334 {
5335 target = copy_rtx (target);
5336 set_mem_alias_set (target, alias_set);
5337 }
5338
5339 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5340 }
5341 else
5342 store_field (target, bitsize, bitpos, 0, 0, mode, exp, type, alias_set,
5343 false);
5344 }
5345
5346 /* Store the value of constructor EXP into the rtx TARGET.
5347 TARGET is either a REG or a MEM; we know it cannot conflict, since
5348 safe_from_p has been called.
5349 CLEARED is true if TARGET is known to have been zero'd.
5350 SIZE is the number of bytes of TARGET we are allowed to modify: this
5351 may not be the same as the size of EXP if we are assigning to a field
5352 which has been packed to exclude padding bits. */
5353
5354 static void
5355 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5356 {
5357 tree type = TREE_TYPE (exp);
5358 #ifdef WORD_REGISTER_OPERATIONS
5359 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5360 #endif
5361
5362 switch (TREE_CODE (type))
5363 {
5364 case RECORD_TYPE:
5365 case UNION_TYPE:
5366 case QUAL_UNION_TYPE:
5367 {
5368 unsigned HOST_WIDE_INT idx;
5369 tree field, value;
5370
5371 /* If size is zero or the target is already cleared, do nothing. */
5372 if (size == 0 || cleared)
5373 cleared = 1;
5374 /* We either clear the aggregate or indicate the value is dead. */
5375 else if ((TREE_CODE (type) == UNION_TYPE
5376 || TREE_CODE (type) == QUAL_UNION_TYPE)
5377 && ! CONSTRUCTOR_ELTS (exp))
5378 /* If the constructor is empty, clear the union. */
5379 {
5380 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5381 cleared = 1;
5382 }
5383
5384 /* If we are building a static constructor into a register,
5385 set the initial value as zero so we can fold the value into
5386 a constant. But if more than one register is involved,
5387 this probably loses. */
5388 else if (REG_P (target) && TREE_STATIC (exp)
5389 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5390 {
5391 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5392 cleared = 1;
5393 }
5394
5395 /* If the constructor has fewer fields than the structure or
5396 if we are initializing the structure to mostly zeros, clear
5397 the whole structure first. Don't do this if TARGET is a
5398 register whose mode size isn't equal to SIZE since
5399 clear_storage can't handle this case. */
5400 else if (size > 0
5401 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5402 != fields_length (type))
5403 || mostly_zeros_p (exp))
5404 && (!REG_P (target)
5405 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5406 == size)))
5407 {
5408 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5409 cleared = 1;
5410 }
5411
5412 if (REG_P (target) && !cleared)
5413 emit_clobber (target);
5414
5415 /* Store each element of the constructor into the
5416 corresponding field of TARGET. */
5417 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5418 {
5419 enum machine_mode mode;
5420 HOST_WIDE_INT bitsize;
5421 HOST_WIDE_INT bitpos = 0;
5422 tree offset;
5423 rtx to_rtx = target;
5424
5425 /* Just ignore missing fields. We cleared the whole
5426 structure, above, if any fields are missing. */
5427 if (field == 0)
5428 continue;
5429
5430 if (cleared && initializer_zerop (value))
5431 continue;
5432
5433 if (host_integerp (DECL_SIZE (field), 1))
5434 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5435 else
5436 bitsize = -1;
5437
5438 mode = DECL_MODE (field);
5439 if (DECL_BIT_FIELD (field))
5440 mode = VOIDmode;
5441
5442 offset = DECL_FIELD_OFFSET (field);
5443 if (host_integerp (offset, 0)
5444 && host_integerp (bit_position (field), 0))
5445 {
5446 bitpos = int_bit_position (field);
5447 offset = 0;
5448 }
5449 else
5450 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5451
5452 if (offset)
5453 {
5454 enum machine_mode address_mode;
5455 rtx offset_rtx;
5456
5457 offset
5458 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5459 make_tree (TREE_TYPE (exp),
5460 target));
5461
5462 offset_rtx = expand_normal (offset);
5463 gcc_assert (MEM_P (to_rtx));
5464
5465 address_mode
5466 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5467 if (GET_MODE (offset_rtx) != address_mode)
5468 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5469
5470 to_rtx = offset_address (to_rtx, offset_rtx,
5471 highest_pow2_factor (offset));
5472 }
5473
5474 #ifdef WORD_REGISTER_OPERATIONS
5475 /* If this initializes a field that is smaller than a
5476 word, at the start of a word, try to widen it to a full
5477 word. This special case allows us to output C++ member
5478 function initializations in a form that the optimizers
5479 can understand. */
5480 if (REG_P (target)
5481 && bitsize < BITS_PER_WORD
5482 && bitpos % BITS_PER_WORD == 0
5483 && GET_MODE_CLASS (mode) == MODE_INT
5484 && TREE_CODE (value) == INTEGER_CST
5485 && exp_size >= 0
5486 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5487 {
5488 tree type = TREE_TYPE (value);
5489
5490 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5491 {
5492 type = lang_hooks.types.type_for_size
5493 (BITS_PER_WORD, TYPE_UNSIGNED (type));
5494 value = fold_convert (type, value);
5495 }
5496
5497 if (BYTES_BIG_ENDIAN)
5498 value
5499 = fold_build2 (LSHIFT_EXPR, type, value,
5500 build_int_cst (type,
5501 BITS_PER_WORD - bitsize));
5502 bitsize = BITS_PER_WORD;
5503 mode = word_mode;
5504 }
5505 #endif
5506
5507 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5508 && DECL_NONADDRESSABLE_P (field))
5509 {
5510 to_rtx = copy_rtx (to_rtx);
5511 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5512 }
5513
5514 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5515 value, type, cleared,
5516 get_alias_set (TREE_TYPE (field)));
5517 }
5518 break;
5519 }
5520 case ARRAY_TYPE:
5521 {
5522 tree value, index;
5523 unsigned HOST_WIDE_INT i;
5524 int need_to_clear;
5525 tree domain;
5526 tree elttype = TREE_TYPE (type);
5527 int const_bounds_p;
5528 HOST_WIDE_INT minelt = 0;
5529 HOST_WIDE_INT maxelt = 0;
5530
5531 domain = TYPE_DOMAIN (type);
5532 const_bounds_p = (TYPE_MIN_VALUE (domain)
5533 && TYPE_MAX_VALUE (domain)
5534 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5535 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5536
5537 /* If we have constant bounds for the range of the type, get them. */
5538 if (const_bounds_p)
5539 {
5540 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5541 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5542 }
5543
5544 /* If the constructor has fewer elements than the array, clear
5545 the whole array first. Similarly if this is static
5546 constructor of a non-BLKmode object. */
5547 if (cleared)
5548 need_to_clear = 0;
5549 else if (REG_P (target) && TREE_STATIC (exp))
5550 need_to_clear = 1;
5551 else
5552 {
5553 unsigned HOST_WIDE_INT idx;
5554 tree index, value;
5555 HOST_WIDE_INT count = 0, zero_count = 0;
5556 need_to_clear = ! const_bounds_p;
5557
5558 /* This loop is a more accurate version of the loop in
5559 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5560 is also needed to check for missing elements. */
5561 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5562 {
5563 HOST_WIDE_INT this_node_count;
5564
5565 if (need_to_clear)
5566 break;
5567
5568 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5569 {
5570 tree lo_index = TREE_OPERAND (index, 0);
5571 tree hi_index = TREE_OPERAND (index, 1);
5572
5573 if (! host_integerp (lo_index, 1)
5574 || ! host_integerp (hi_index, 1))
5575 {
5576 need_to_clear = 1;
5577 break;
5578 }
5579
5580 this_node_count = (tree_low_cst (hi_index, 1)
5581 - tree_low_cst (lo_index, 1) + 1);
5582 }
5583 else
5584 this_node_count = 1;
5585
5586 count += this_node_count;
5587 if (mostly_zeros_p (value))
5588 zero_count += this_node_count;
5589 }
5590
5591 /* Clear the entire array first if there are any missing
5592 elements, or if the incidence of zero elements is >=
5593 75%. */
5594 if (! need_to_clear
5595 && (count < maxelt - minelt + 1
5596 || 4 * zero_count >= 3 * count))
5597 need_to_clear = 1;
5598 }
5599
5600 if (need_to_clear && size > 0)
5601 {
5602 if (REG_P (target))
5603 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5604 else
5605 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5606 cleared = 1;
5607 }
5608
5609 if (!cleared && REG_P (target))
5610 /* Inform later passes that the old value is dead. */
5611 emit_clobber (target);
5612
5613 /* Store each element of the constructor into the
5614 corresponding element of TARGET, determined by counting the
5615 elements. */
5616 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5617 {
5618 enum machine_mode mode;
5619 HOST_WIDE_INT bitsize;
5620 HOST_WIDE_INT bitpos;
5621 rtx xtarget = target;
5622
5623 if (cleared && initializer_zerop (value))
5624 continue;
5625
5626 mode = TYPE_MODE (elttype);
5627 if (mode == BLKmode)
5628 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5629 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5630 : -1);
5631 else
5632 bitsize = GET_MODE_BITSIZE (mode);
5633
5634 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5635 {
5636 tree lo_index = TREE_OPERAND (index, 0);
5637 tree hi_index = TREE_OPERAND (index, 1);
5638 rtx index_r, pos_rtx;
5639 HOST_WIDE_INT lo, hi, count;
5640 tree position;
5641
5642 /* If the range is constant and "small", unroll the loop. */
5643 if (const_bounds_p
5644 && host_integerp (lo_index, 0)
5645 && host_integerp (hi_index, 0)
5646 && (lo = tree_low_cst (lo_index, 0),
5647 hi = tree_low_cst (hi_index, 0),
5648 count = hi - lo + 1,
5649 (!MEM_P (target)
5650 || count <= 2
5651 || (host_integerp (TYPE_SIZE (elttype), 1)
5652 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5653 <= 40 * 8)))))
5654 {
5655 lo -= minelt; hi -= minelt;
5656 for (; lo <= hi; lo++)
5657 {
5658 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
5659
5660 if (MEM_P (target)
5661 && !MEM_KEEP_ALIAS_SET_P (target)
5662 && TREE_CODE (type) == ARRAY_TYPE
5663 && TYPE_NONALIASED_COMPONENT (type))
5664 {
5665 target = copy_rtx (target);
5666 MEM_KEEP_ALIAS_SET_P (target) = 1;
5667 }
5668
5669 store_constructor_field
5670 (target, bitsize, bitpos, mode, value, type, cleared,
5671 get_alias_set (elttype));
5672 }
5673 }
5674 else
5675 {
5676 rtx loop_start = gen_label_rtx ();
5677 rtx loop_end = gen_label_rtx ();
5678 tree exit_cond;
5679
5680 expand_normal (hi_index);
5681
5682 index = build_decl (EXPR_LOCATION (exp),
5683 VAR_DECL, NULL_TREE, domain);
5684 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
5685 SET_DECL_RTL (index, index_r);
5686 store_expr (lo_index, index_r, 0, false);
5687
5688 /* Build the head of the loop. */
5689 do_pending_stack_adjust ();
5690 emit_label (loop_start);
5691
5692 /* Assign value to element index. */
5693 position =
5694 fold_convert (ssizetype,
5695 fold_build2 (MINUS_EXPR,
5696 TREE_TYPE (index),
5697 index,
5698 TYPE_MIN_VALUE (domain)));
5699
5700 position =
5701 size_binop (MULT_EXPR, position,
5702 fold_convert (ssizetype,
5703 TYPE_SIZE_UNIT (elttype)));
5704
5705 pos_rtx = expand_normal (position);
5706 xtarget = offset_address (target, pos_rtx,
5707 highest_pow2_factor (position));
5708 xtarget = adjust_address (xtarget, mode, 0);
5709 if (TREE_CODE (value) == CONSTRUCTOR)
5710 store_constructor (value, xtarget, cleared,
5711 bitsize / BITS_PER_UNIT);
5712 else
5713 store_expr (value, xtarget, 0, false);
5714
5715 /* Generate a conditional jump to exit the loop. */
5716 exit_cond = build2 (LT_EXPR, integer_type_node,
5717 index, hi_index);
5718 jumpif (exit_cond, loop_end, -1);
5719
5720 /* Update the loop counter, and jump to the head of
5721 the loop. */
5722 expand_assignment (index,
5723 build2 (PLUS_EXPR, TREE_TYPE (index),
5724 index, integer_one_node),
5725 false);
5726
5727 emit_jump (loop_start);
5728
5729 /* Build the end of the loop. */
5730 emit_label (loop_end);
5731 }
5732 }
5733 else if ((index != 0 && ! host_integerp (index, 0))
5734 || ! host_integerp (TYPE_SIZE (elttype), 1))
5735 {
5736 tree position;
5737
5738 if (index == 0)
5739 index = ssize_int (1);
5740
5741 if (minelt)
5742 index = fold_convert (ssizetype,
5743 fold_build2 (MINUS_EXPR,
5744 TREE_TYPE (index),
5745 index,
5746 TYPE_MIN_VALUE (domain)));
5747
5748 position =
5749 size_binop (MULT_EXPR, index,
5750 fold_convert (ssizetype,
5751 TYPE_SIZE_UNIT (elttype)));
5752 xtarget = offset_address (target,
5753 expand_normal (position),
5754 highest_pow2_factor (position));
5755 xtarget = adjust_address (xtarget, mode, 0);
5756 store_expr (value, xtarget, 0, false);
5757 }
5758 else
5759 {
5760 if (index != 0)
5761 bitpos = ((tree_low_cst (index, 0) - minelt)
5762 * tree_low_cst (TYPE_SIZE (elttype), 1));
5763 else
5764 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
5765
5766 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
5767 && TREE_CODE (type) == ARRAY_TYPE
5768 && TYPE_NONALIASED_COMPONENT (type))
5769 {
5770 target = copy_rtx (target);
5771 MEM_KEEP_ALIAS_SET_P (target) = 1;
5772 }
5773 store_constructor_field (target, bitsize, bitpos, mode, value,
5774 type, cleared, get_alias_set (elttype));
5775 }
5776 }
5777 break;
5778 }
5779
5780 case VECTOR_TYPE:
5781 {
5782 unsigned HOST_WIDE_INT idx;
5783 constructor_elt *ce;
5784 int i;
5785 int need_to_clear;
5786 int icode = 0;
5787 tree elttype = TREE_TYPE (type);
5788 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
5789 enum machine_mode eltmode = TYPE_MODE (elttype);
5790 HOST_WIDE_INT bitsize;
5791 HOST_WIDE_INT bitpos;
5792 rtvec vector = NULL;
5793 unsigned n_elts;
5794 alias_set_type alias;
5795
5796 gcc_assert (eltmode != BLKmode);
5797
5798 n_elts = TYPE_VECTOR_SUBPARTS (type);
5799 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
5800 {
5801 enum machine_mode mode = GET_MODE (target);
5802
5803 icode = (int) optab_handler (vec_init_optab, mode);
5804 if (icode != CODE_FOR_nothing)
5805 {
5806 unsigned int i;
5807
5808 vector = rtvec_alloc (n_elts);
5809 for (i = 0; i < n_elts; i++)
5810 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
5811 }
5812 }
5813
5814 /* If the constructor has fewer elements than the vector,
5815 clear the whole array first. Similarly if this is static
5816 constructor of a non-BLKmode object. */
5817 if (cleared)
5818 need_to_clear = 0;
5819 else if (REG_P (target) && TREE_STATIC (exp))
5820 need_to_clear = 1;
5821 else
5822 {
5823 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
5824 tree value;
5825
5826 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
5827 {
5828 int n_elts_here = tree_low_cst
5829 (int_const_binop (TRUNC_DIV_EXPR,
5830 TYPE_SIZE (TREE_TYPE (value)),
5831 TYPE_SIZE (elttype)), 1);
5832
5833 count += n_elts_here;
5834 if (mostly_zeros_p (value))
5835 zero_count += n_elts_here;
5836 }
5837
5838 /* Clear the entire vector first if there are any missing elements,
5839 or if the incidence of zero elements is >= 75%. */
5840 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
5841 }
5842
5843 if (need_to_clear && size > 0 && !vector)
5844 {
5845 if (REG_P (target))
5846 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5847 else
5848 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5849 cleared = 1;
5850 }
5851
5852 /* Inform later passes that the old value is dead. */
5853 if (!cleared && !vector && REG_P (target))
5854 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5855
5856 if (MEM_P (target))
5857 alias = MEM_ALIAS_SET (target);
5858 else
5859 alias = get_alias_set (elttype);
5860
5861 /* Store each element of the constructor into the corresponding
5862 element of TARGET, determined by counting the elements. */
5863 for (idx = 0, i = 0;
5864 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
5865 idx++, i += bitsize / elt_size)
5866 {
5867 HOST_WIDE_INT eltpos;
5868 tree value = ce->value;
5869
5870 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
5871 if (cleared && initializer_zerop (value))
5872 continue;
5873
5874 if (ce->index)
5875 eltpos = tree_low_cst (ce->index, 1);
5876 else
5877 eltpos = i;
5878
5879 if (vector)
5880 {
5881 /* Vector CONSTRUCTORs should only be built from smaller
5882 vectors in the case of BLKmode vectors. */
5883 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
5884 RTVEC_ELT (vector, eltpos)
5885 = expand_normal (value);
5886 }
5887 else
5888 {
5889 enum machine_mode value_mode =
5890 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
5891 ? TYPE_MODE (TREE_TYPE (value))
5892 : eltmode;
5893 bitpos = eltpos * elt_size;
5894 store_constructor_field (target, bitsize, bitpos,
5895 value_mode, value, type,
5896 cleared, alias);
5897 }
5898 }
5899
5900 if (vector)
5901 emit_insn (GEN_FCN (icode)
5902 (target,
5903 gen_rtx_PARALLEL (GET_MODE (target), vector)));
5904 break;
5905 }
5906
5907 default:
5908 gcc_unreachable ();
5909 }
5910 }
5911
5912 /* Store the value of EXP (an expression tree)
5913 into a subfield of TARGET which has mode MODE and occupies
5914 BITSIZE bits, starting BITPOS bits from the start of TARGET.
5915 If MODE is VOIDmode, it means that we are storing into a bit-field.
5916
5917 BITREGION_START is bitpos of the first bitfield in this region.
5918 BITREGION_END is the bitpos of the ending bitfield in this region.
5919 These two fields are 0, if the C++ memory model does not apply,
5920 or we are not interested in keeping track of bitfield regions.
5921
5922 Always return const0_rtx unless we have something particular to
5923 return.
5924
5925 TYPE is the type of the underlying object,
5926
5927 ALIAS_SET is the alias set for the destination. This value will
5928 (in general) be different from that for TARGET, since TARGET is a
5929 reference to the containing structure.
5930
5931 If NONTEMPORAL is true, try generating a nontemporal store. */
5932
5933 static rtx
5934 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
5935 unsigned HOST_WIDE_INT bitregion_start,
5936 unsigned HOST_WIDE_INT bitregion_end,
5937 enum machine_mode mode, tree exp, tree type,
5938 alias_set_type alias_set, bool nontemporal)
5939 {
5940 if (TREE_CODE (exp) == ERROR_MARK)
5941 return const0_rtx;
5942
5943 /* If we have nothing to store, do nothing unless the expression has
5944 side-effects. */
5945 if (bitsize == 0)
5946 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5947
5948 /* If we are storing into an unaligned field of an aligned union that is
5949 in a register, we may have the mode of TARGET being an integer mode but
5950 MODE == BLKmode. In that case, get an aligned object whose size and
5951 alignment are the same as TARGET and store TARGET into it (we can avoid
5952 the store if the field being stored is the entire width of TARGET). Then
5953 call ourselves recursively to store the field into a BLKmode version of
5954 that object. Finally, load from the object into TARGET. This is not
5955 very efficient in general, but should only be slightly more expensive
5956 than the otherwise-required unaligned accesses. Perhaps this can be
5957 cleaned up later. It's tempting to make OBJECT readonly, but it's set
5958 twice, once with emit_move_insn and once via store_field. */
5959
5960 if (mode == BLKmode
5961 && (REG_P (target) || GET_CODE (target) == SUBREG))
5962 {
5963 rtx object = assign_temp (type, 0, 1, 1);
5964 rtx blk_object = adjust_address (object, BLKmode, 0);
5965
5966 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
5967 emit_move_insn (object, target);
5968
5969 store_field (blk_object, bitsize, bitpos,
5970 bitregion_start, bitregion_end,
5971 mode, exp, type, alias_set, nontemporal);
5972
5973 emit_move_insn (target, object);
5974
5975 /* We want to return the BLKmode version of the data. */
5976 return blk_object;
5977 }
5978
5979 if (GET_CODE (target) == CONCAT)
5980 {
5981 /* We're storing into a struct containing a single __complex. */
5982
5983 gcc_assert (!bitpos);
5984 return store_expr (exp, target, 0, nontemporal);
5985 }
5986
5987 /* If the structure is in a register or if the component
5988 is a bit field, we cannot use addressing to access it.
5989 Use bit-field techniques or SUBREG to store in it. */
5990
5991 if (mode == VOIDmode
5992 || (mode != BLKmode && ! direct_store[(int) mode]
5993 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
5994 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
5995 || REG_P (target)
5996 || GET_CODE (target) == SUBREG
5997 /* If the field isn't aligned enough to store as an ordinary memref,
5998 store it as a bit field. */
5999 || (mode != BLKmode
6000 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6001 || bitpos % GET_MODE_ALIGNMENT (mode))
6002 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6003 || (bitpos % BITS_PER_UNIT != 0)))
6004 /* If the RHS and field are a constant size and the size of the
6005 RHS isn't the same size as the bitfield, we must use bitfield
6006 operations. */
6007 || (bitsize >= 0
6008 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6009 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6010 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6011 decl we must use bitfield operations. */
6012 || (bitsize >= 0
6013 && TREE_CODE (exp) == MEM_REF
6014 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6015 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6016 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6017 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6018 {
6019 rtx temp;
6020 gimple nop_def;
6021
6022 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6023 implies a mask operation. If the precision is the same size as
6024 the field we're storing into, that mask is redundant. This is
6025 particularly common with bit field assignments generated by the
6026 C front end. */
6027 nop_def = get_def_for_expr (exp, NOP_EXPR);
6028 if (nop_def)
6029 {
6030 tree type = TREE_TYPE (exp);
6031 if (INTEGRAL_TYPE_P (type)
6032 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6033 && bitsize == TYPE_PRECISION (type))
6034 {
6035 tree op = gimple_assign_rhs1 (nop_def);
6036 type = TREE_TYPE (op);
6037 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6038 exp = op;
6039 }
6040 }
6041
6042 temp = expand_normal (exp);
6043
6044 /* If BITSIZE is narrower than the size of the type of EXP
6045 we will be narrowing TEMP. Normally, what's wanted are the
6046 low-order bits. However, if EXP's type is a record and this is
6047 big-endian machine, we want the upper BITSIZE bits. */
6048 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6049 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6050 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6051 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6052 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6053 NULL_RTX, 1);
6054
6055 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
6056 MODE. */
6057 if (mode != VOIDmode && mode != BLKmode
6058 && mode != TYPE_MODE (TREE_TYPE (exp)))
6059 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6060
6061 /* If the modes of TEMP and TARGET are both BLKmode, both
6062 must be in memory and BITPOS must be aligned on a byte
6063 boundary. If so, we simply do a block copy. Likewise
6064 for a BLKmode-like TARGET. */
6065 if (GET_MODE (temp) == BLKmode
6066 && (GET_MODE (target) == BLKmode
6067 || (MEM_P (target)
6068 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6069 && (bitpos % BITS_PER_UNIT) == 0
6070 && (bitsize % BITS_PER_UNIT) == 0)))
6071 {
6072 gcc_assert (MEM_P (target) && MEM_P (temp)
6073 && (bitpos % BITS_PER_UNIT) == 0);
6074
6075 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6076 emit_block_move (target, temp,
6077 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6078 / BITS_PER_UNIT),
6079 BLOCK_OP_NORMAL);
6080
6081 return const0_rtx;
6082 }
6083
6084 /* Store the value in the bitfield. */
6085 store_bit_field (target, bitsize, bitpos,
6086 bitregion_start, bitregion_end,
6087 mode, temp);
6088
6089 return const0_rtx;
6090 }
6091 else
6092 {
6093 /* Now build a reference to just the desired component. */
6094 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6095
6096 if (to_rtx == target)
6097 to_rtx = copy_rtx (to_rtx);
6098
6099 if (!MEM_SCALAR_P (to_rtx))
6100 MEM_IN_STRUCT_P (to_rtx) = 1;
6101 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6102 set_mem_alias_set (to_rtx, alias_set);
6103
6104 return store_expr (exp, to_rtx, 0, nontemporal);
6105 }
6106 }
6107 \f
6108 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6109 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6110 codes and find the ultimate containing object, which we return.
6111
6112 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6113 bit position, and *PUNSIGNEDP to the signedness of the field.
6114 If the position of the field is variable, we store a tree
6115 giving the variable offset (in units) in *POFFSET.
6116 This offset is in addition to the bit position.
6117 If the position is not variable, we store 0 in *POFFSET.
6118
6119 If any of the extraction expressions is volatile,
6120 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6121
6122 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6123 Otherwise, it is a mode that can be used to access the field.
6124
6125 If the field describes a variable-sized object, *PMODE is set to
6126 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6127 this case, but the address of the object can be found.
6128
6129 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6130 look through nodes that serve as markers of a greater alignment than
6131 the one that can be deduced from the expression. These nodes make it
6132 possible for front-ends to prevent temporaries from being created by
6133 the middle-end on alignment considerations. For that purpose, the
6134 normal operating mode at high-level is to always pass FALSE so that
6135 the ultimate containing object is really returned; moreover, the
6136 associated predicate handled_component_p will always return TRUE
6137 on these nodes, thus indicating that they are essentially handled
6138 by get_inner_reference. TRUE should only be passed when the caller
6139 is scanning the expression in order to build another representation
6140 and specifically knows how to handle these nodes; as such, this is
6141 the normal operating mode in the RTL expanders. */
6142
6143 tree
6144 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6145 HOST_WIDE_INT *pbitpos, tree *poffset,
6146 enum machine_mode *pmode, int *punsignedp,
6147 int *pvolatilep, bool keep_aligning)
6148 {
6149 tree size_tree = 0;
6150 enum machine_mode mode = VOIDmode;
6151 bool blkmode_bitfield = false;
6152 tree offset = size_zero_node;
6153 double_int bit_offset = double_int_zero;
6154
6155 /* First get the mode, signedness, and size. We do this from just the
6156 outermost expression. */
6157 *pbitsize = -1;
6158 if (TREE_CODE (exp) == COMPONENT_REF)
6159 {
6160 tree field = TREE_OPERAND (exp, 1);
6161 size_tree = DECL_SIZE (field);
6162 if (!DECL_BIT_FIELD (field))
6163 mode = DECL_MODE (field);
6164 else if (DECL_MODE (field) == BLKmode)
6165 blkmode_bitfield = true;
6166 else if (TREE_THIS_VOLATILE (exp)
6167 && flag_strict_volatile_bitfields > 0)
6168 /* Volatile bitfields should be accessed in the mode of the
6169 field's type, not the mode computed based on the bit
6170 size. */
6171 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6172
6173 *punsignedp = DECL_UNSIGNED (field);
6174 }
6175 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6176 {
6177 size_tree = TREE_OPERAND (exp, 1);
6178 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6179 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6180
6181 /* For vector types, with the correct size of access, use the mode of
6182 inner type. */
6183 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6184 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6185 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6186 mode = TYPE_MODE (TREE_TYPE (exp));
6187 }
6188 else
6189 {
6190 mode = TYPE_MODE (TREE_TYPE (exp));
6191 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6192
6193 if (mode == BLKmode)
6194 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6195 else
6196 *pbitsize = GET_MODE_BITSIZE (mode);
6197 }
6198
6199 if (size_tree != 0)
6200 {
6201 if (! host_integerp (size_tree, 1))
6202 mode = BLKmode, *pbitsize = -1;
6203 else
6204 *pbitsize = tree_low_cst (size_tree, 1);
6205 }
6206
6207 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6208 and find the ultimate containing object. */
6209 while (1)
6210 {
6211 switch (TREE_CODE (exp))
6212 {
6213 case BIT_FIELD_REF:
6214 bit_offset
6215 = double_int_add (bit_offset,
6216 tree_to_double_int (TREE_OPERAND (exp, 2)));
6217 break;
6218
6219 case COMPONENT_REF:
6220 {
6221 tree field = TREE_OPERAND (exp, 1);
6222 tree this_offset = component_ref_field_offset (exp);
6223
6224 /* If this field hasn't been filled in yet, don't go past it.
6225 This should only happen when folding expressions made during
6226 type construction. */
6227 if (this_offset == 0)
6228 break;
6229
6230 offset = size_binop (PLUS_EXPR, offset, this_offset);
6231 bit_offset = double_int_add (bit_offset,
6232 tree_to_double_int
6233 (DECL_FIELD_BIT_OFFSET (field)));
6234
6235 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6236 }
6237 break;
6238
6239 case ARRAY_REF:
6240 case ARRAY_RANGE_REF:
6241 {
6242 tree index = TREE_OPERAND (exp, 1);
6243 tree low_bound = array_ref_low_bound (exp);
6244 tree unit_size = array_ref_element_size (exp);
6245
6246 /* We assume all arrays have sizes that are a multiple of a byte.
6247 First subtract the lower bound, if any, in the type of the
6248 index, then convert to sizetype and multiply by the size of
6249 the array element. */
6250 if (! integer_zerop (low_bound))
6251 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6252 index, low_bound);
6253
6254 offset = size_binop (PLUS_EXPR, offset,
6255 size_binop (MULT_EXPR,
6256 fold_convert (sizetype, index),
6257 unit_size));
6258 }
6259 break;
6260
6261 case REALPART_EXPR:
6262 break;
6263
6264 case IMAGPART_EXPR:
6265 bit_offset = double_int_add (bit_offset,
6266 uhwi_to_double_int (*pbitsize));
6267 break;
6268
6269 case VIEW_CONVERT_EXPR:
6270 if (keep_aligning && STRICT_ALIGNMENT
6271 && (TYPE_ALIGN (TREE_TYPE (exp))
6272 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6273 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6274 < BIGGEST_ALIGNMENT)
6275 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6276 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6277 goto done;
6278 break;
6279
6280 case MEM_REF:
6281 /* Hand back the decl for MEM[&decl, off]. */
6282 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6283 {
6284 tree off = TREE_OPERAND (exp, 1);
6285 if (!integer_zerop (off))
6286 {
6287 double_int boff, coff = mem_ref_offset (exp);
6288 boff = double_int_lshift (coff,
6289 BITS_PER_UNIT == 8
6290 ? 3 : exact_log2 (BITS_PER_UNIT),
6291 HOST_BITS_PER_DOUBLE_INT, true);
6292 bit_offset = double_int_add (bit_offset, boff);
6293 }
6294 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6295 }
6296 goto done;
6297
6298 default:
6299 goto done;
6300 }
6301
6302 /* If any reference in the chain is volatile, the effect is volatile. */
6303 if (TREE_THIS_VOLATILE (exp))
6304 *pvolatilep = 1;
6305
6306 exp = TREE_OPERAND (exp, 0);
6307 }
6308 done:
6309
6310 /* If OFFSET is constant, see if we can return the whole thing as a
6311 constant bit position. Make sure to handle overflow during
6312 this conversion. */
6313 if (host_integerp (offset, 0))
6314 {
6315 double_int tem = double_int_lshift (tree_to_double_int (offset),
6316 BITS_PER_UNIT == 8
6317 ? 3 : exact_log2 (BITS_PER_UNIT),
6318 HOST_BITS_PER_DOUBLE_INT, true);
6319 tem = double_int_add (tem, bit_offset);
6320 if (double_int_fits_in_shwi_p (tem))
6321 {
6322 *pbitpos = double_int_to_shwi (tem);
6323 *poffset = offset = NULL_TREE;
6324 }
6325 }
6326
6327 /* Otherwise, split it up. */
6328 if (offset)
6329 {
6330 *pbitpos = double_int_to_shwi (bit_offset);
6331 *poffset = offset;
6332 }
6333
6334 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6335 if (mode == VOIDmode
6336 && blkmode_bitfield
6337 && (*pbitpos % BITS_PER_UNIT) == 0
6338 && (*pbitsize % BITS_PER_UNIT) == 0)
6339 *pmode = BLKmode;
6340 else
6341 *pmode = mode;
6342
6343 return exp;
6344 }
6345
6346 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6347 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6348 EXP is marked as PACKED. */
6349
6350 bool
6351 contains_packed_reference (const_tree exp)
6352 {
6353 bool packed_p = false;
6354
6355 while (1)
6356 {
6357 switch (TREE_CODE (exp))
6358 {
6359 case COMPONENT_REF:
6360 {
6361 tree field = TREE_OPERAND (exp, 1);
6362 packed_p = DECL_PACKED (field)
6363 || TYPE_PACKED (TREE_TYPE (field))
6364 || TYPE_PACKED (TREE_TYPE (exp));
6365 if (packed_p)
6366 goto done;
6367 }
6368 break;
6369
6370 case BIT_FIELD_REF:
6371 case ARRAY_REF:
6372 case ARRAY_RANGE_REF:
6373 case REALPART_EXPR:
6374 case IMAGPART_EXPR:
6375 case VIEW_CONVERT_EXPR:
6376 break;
6377
6378 default:
6379 goto done;
6380 }
6381 exp = TREE_OPERAND (exp, 0);
6382 }
6383 done:
6384 return packed_p;
6385 }
6386
6387 /* Return a tree of sizetype representing the size, in bytes, of the element
6388 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6389
6390 tree
6391 array_ref_element_size (tree exp)
6392 {
6393 tree aligned_size = TREE_OPERAND (exp, 3);
6394 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6395 location_t loc = EXPR_LOCATION (exp);
6396
6397 /* If a size was specified in the ARRAY_REF, it's the size measured
6398 in alignment units of the element type. So multiply by that value. */
6399 if (aligned_size)
6400 {
6401 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6402 sizetype from another type of the same width and signedness. */
6403 if (TREE_TYPE (aligned_size) != sizetype)
6404 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6405 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6406 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6407 }
6408
6409 /* Otherwise, take the size from that of the element type. Substitute
6410 any PLACEHOLDER_EXPR that we have. */
6411 else
6412 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6413 }
6414
6415 /* Return a tree representing the lower bound of the array mentioned in
6416 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6417
6418 tree
6419 array_ref_low_bound (tree exp)
6420 {
6421 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6422
6423 /* If a lower bound is specified in EXP, use it. */
6424 if (TREE_OPERAND (exp, 2))
6425 return TREE_OPERAND (exp, 2);
6426
6427 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6428 substituting for a PLACEHOLDER_EXPR as needed. */
6429 if (domain_type && TYPE_MIN_VALUE (domain_type))
6430 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6431
6432 /* Otherwise, return a zero of the appropriate type. */
6433 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6434 }
6435
6436 /* Return a tree representing the upper bound of the array mentioned in
6437 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6438
6439 tree
6440 array_ref_up_bound (tree exp)
6441 {
6442 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6443
6444 /* If there is a domain type and it has an upper bound, use it, substituting
6445 for a PLACEHOLDER_EXPR as needed. */
6446 if (domain_type && TYPE_MAX_VALUE (domain_type))
6447 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6448
6449 /* Otherwise fail. */
6450 return NULL_TREE;
6451 }
6452
6453 /* Return a tree representing the offset, in bytes, of the field referenced
6454 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6455
6456 tree
6457 component_ref_field_offset (tree exp)
6458 {
6459 tree aligned_offset = TREE_OPERAND (exp, 2);
6460 tree field = TREE_OPERAND (exp, 1);
6461 location_t loc = EXPR_LOCATION (exp);
6462
6463 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6464 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6465 value. */
6466 if (aligned_offset)
6467 {
6468 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6469 sizetype from another type of the same width and signedness. */
6470 if (TREE_TYPE (aligned_offset) != sizetype)
6471 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6472 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6473 size_int (DECL_OFFSET_ALIGN (field)
6474 / BITS_PER_UNIT));
6475 }
6476
6477 /* Otherwise, take the offset from that of the field. Substitute
6478 any PLACEHOLDER_EXPR that we have. */
6479 else
6480 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6481 }
6482
6483 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6484
6485 static unsigned HOST_WIDE_INT
6486 target_align (const_tree target)
6487 {
6488 /* We might have a chain of nested references with intermediate misaligning
6489 bitfields components, so need to recurse to find out. */
6490
6491 unsigned HOST_WIDE_INT this_align, outer_align;
6492
6493 switch (TREE_CODE (target))
6494 {
6495 case BIT_FIELD_REF:
6496 return 1;
6497
6498 case COMPONENT_REF:
6499 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6500 outer_align = target_align (TREE_OPERAND (target, 0));
6501 return MIN (this_align, outer_align);
6502
6503 case ARRAY_REF:
6504 case ARRAY_RANGE_REF:
6505 this_align = TYPE_ALIGN (TREE_TYPE (target));
6506 outer_align = target_align (TREE_OPERAND (target, 0));
6507 return MIN (this_align, outer_align);
6508
6509 CASE_CONVERT:
6510 case NON_LVALUE_EXPR:
6511 case VIEW_CONVERT_EXPR:
6512 this_align = TYPE_ALIGN (TREE_TYPE (target));
6513 outer_align = target_align (TREE_OPERAND (target, 0));
6514 return MAX (this_align, outer_align);
6515
6516 default:
6517 return TYPE_ALIGN (TREE_TYPE (target));
6518 }
6519 }
6520
6521 \f
6522 /* Given an rtx VALUE that may contain additions and multiplications, return
6523 an equivalent value that just refers to a register, memory, or constant.
6524 This is done by generating instructions to perform the arithmetic and
6525 returning a pseudo-register containing the value.
6526
6527 The returned value may be a REG, SUBREG, MEM or constant. */
6528
6529 rtx
6530 force_operand (rtx value, rtx target)
6531 {
6532 rtx op1, op2;
6533 /* Use subtarget as the target for operand 0 of a binary operation. */
6534 rtx subtarget = get_subtarget (target);
6535 enum rtx_code code = GET_CODE (value);
6536
6537 /* Check for subreg applied to an expression produced by loop optimizer. */
6538 if (code == SUBREG
6539 && !REG_P (SUBREG_REG (value))
6540 && !MEM_P (SUBREG_REG (value)))
6541 {
6542 value
6543 = simplify_gen_subreg (GET_MODE (value),
6544 force_reg (GET_MODE (SUBREG_REG (value)),
6545 force_operand (SUBREG_REG (value),
6546 NULL_RTX)),
6547 GET_MODE (SUBREG_REG (value)),
6548 SUBREG_BYTE (value));
6549 code = GET_CODE (value);
6550 }
6551
6552 /* Check for a PIC address load. */
6553 if ((code == PLUS || code == MINUS)
6554 && XEXP (value, 0) == pic_offset_table_rtx
6555 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6556 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6557 || GET_CODE (XEXP (value, 1)) == CONST))
6558 {
6559 if (!subtarget)
6560 subtarget = gen_reg_rtx (GET_MODE (value));
6561 emit_move_insn (subtarget, value);
6562 return subtarget;
6563 }
6564
6565 if (ARITHMETIC_P (value))
6566 {
6567 op2 = XEXP (value, 1);
6568 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6569 subtarget = 0;
6570 if (code == MINUS && CONST_INT_P (op2))
6571 {
6572 code = PLUS;
6573 op2 = negate_rtx (GET_MODE (value), op2);
6574 }
6575
6576 /* Check for an addition with OP2 a constant integer and our first
6577 operand a PLUS of a virtual register and something else. In that
6578 case, we want to emit the sum of the virtual register and the
6579 constant first and then add the other value. This allows virtual
6580 register instantiation to simply modify the constant rather than
6581 creating another one around this addition. */
6582 if (code == PLUS && CONST_INT_P (op2)
6583 && GET_CODE (XEXP (value, 0)) == PLUS
6584 && REG_P (XEXP (XEXP (value, 0), 0))
6585 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6586 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6587 {
6588 rtx temp = expand_simple_binop (GET_MODE (value), code,
6589 XEXP (XEXP (value, 0), 0), op2,
6590 subtarget, 0, OPTAB_LIB_WIDEN);
6591 return expand_simple_binop (GET_MODE (value), code, temp,
6592 force_operand (XEXP (XEXP (value,
6593 0), 1), 0),
6594 target, 0, OPTAB_LIB_WIDEN);
6595 }
6596
6597 op1 = force_operand (XEXP (value, 0), subtarget);
6598 op2 = force_operand (op2, NULL_RTX);
6599 switch (code)
6600 {
6601 case MULT:
6602 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6603 case DIV:
6604 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6605 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6606 target, 1, OPTAB_LIB_WIDEN);
6607 else
6608 return expand_divmod (0,
6609 FLOAT_MODE_P (GET_MODE (value))
6610 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6611 GET_MODE (value), op1, op2, target, 0);
6612 case MOD:
6613 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6614 target, 0);
6615 case UDIV:
6616 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6617 target, 1);
6618 case UMOD:
6619 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6620 target, 1);
6621 case ASHIFTRT:
6622 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6623 target, 0, OPTAB_LIB_WIDEN);
6624 default:
6625 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6626 target, 1, OPTAB_LIB_WIDEN);
6627 }
6628 }
6629 if (UNARY_P (value))
6630 {
6631 if (!target)
6632 target = gen_reg_rtx (GET_MODE (value));
6633 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6634 switch (code)
6635 {
6636 case ZERO_EXTEND:
6637 case SIGN_EXTEND:
6638 case TRUNCATE:
6639 case FLOAT_EXTEND:
6640 case FLOAT_TRUNCATE:
6641 convert_move (target, op1, code == ZERO_EXTEND);
6642 return target;
6643
6644 case FIX:
6645 case UNSIGNED_FIX:
6646 expand_fix (target, op1, code == UNSIGNED_FIX);
6647 return target;
6648
6649 case FLOAT:
6650 case UNSIGNED_FLOAT:
6651 expand_float (target, op1, code == UNSIGNED_FLOAT);
6652 return target;
6653
6654 default:
6655 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
6656 }
6657 }
6658
6659 #ifdef INSN_SCHEDULING
6660 /* On machines that have insn scheduling, we want all memory reference to be
6661 explicit, so we need to deal with such paradoxical SUBREGs. */
6662 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
6663 value
6664 = simplify_gen_subreg (GET_MODE (value),
6665 force_reg (GET_MODE (SUBREG_REG (value)),
6666 force_operand (SUBREG_REG (value),
6667 NULL_RTX)),
6668 GET_MODE (SUBREG_REG (value)),
6669 SUBREG_BYTE (value));
6670 #endif
6671
6672 return value;
6673 }
6674 \f
6675 /* Subroutine of expand_expr: return nonzero iff there is no way that
6676 EXP can reference X, which is being modified. TOP_P is nonzero if this
6677 call is going to be used to determine whether we need a temporary
6678 for EXP, as opposed to a recursive call to this function.
6679
6680 It is always safe for this routine to return zero since it merely
6681 searches for optimization opportunities. */
6682
6683 int
6684 safe_from_p (const_rtx x, tree exp, int top_p)
6685 {
6686 rtx exp_rtl = 0;
6687 int i, nops;
6688
6689 if (x == 0
6690 /* If EXP has varying size, we MUST use a target since we currently
6691 have no way of allocating temporaries of variable size
6692 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
6693 So we assume here that something at a higher level has prevented a
6694 clash. This is somewhat bogus, but the best we can do. Only
6695 do this when X is BLKmode and when we are at the top level. */
6696 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
6697 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
6698 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
6699 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
6700 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
6701 != INTEGER_CST)
6702 && GET_MODE (x) == BLKmode)
6703 /* If X is in the outgoing argument area, it is always safe. */
6704 || (MEM_P (x)
6705 && (XEXP (x, 0) == virtual_outgoing_args_rtx
6706 || (GET_CODE (XEXP (x, 0)) == PLUS
6707 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
6708 return 1;
6709
6710 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
6711 find the underlying pseudo. */
6712 if (GET_CODE (x) == SUBREG)
6713 {
6714 x = SUBREG_REG (x);
6715 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6716 return 0;
6717 }
6718
6719 /* Now look at our tree code and possibly recurse. */
6720 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
6721 {
6722 case tcc_declaration:
6723 exp_rtl = DECL_RTL_IF_SET (exp);
6724 break;
6725
6726 case tcc_constant:
6727 return 1;
6728
6729 case tcc_exceptional:
6730 if (TREE_CODE (exp) == TREE_LIST)
6731 {
6732 while (1)
6733 {
6734 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
6735 return 0;
6736 exp = TREE_CHAIN (exp);
6737 if (!exp)
6738 return 1;
6739 if (TREE_CODE (exp) != TREE_LIST)
6740 return safe_from_p (x, exp, 0);
6741 }
6742 }
6743 else if (TREE_CODE (exp) == CONSTRUCTOR)
6744 {
6745 constructor_elt *ce;
6746 unsigned HOST_WIDE_INT idx;
6747
6748 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
6749 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
6750 || !safe_from_p (x, ce->value, 0))
6751 return 0;
6752 return 1;
6753 }
6754 else if (TREE_CODE (exp) == ERROR_MARK)
6755 return 1; /* An already-visited SAVE_EXPR? */
6756 else
6757 return 0;
6758
6759 case tcc_statement:
6760 /* The only case we look at here is the DECL_INITIAL inside a
6761 DECL_EXPR. */
6762 return (TREE_CODE (exp) != DECL_EXPR
6763 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
6764 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
6765 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
6766
6767 case tcc_binary:
6768 case tcc_comparison:
6769 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
6770 return 0;
6771 /* Fall through. */
6772
6773 case tcc_unary:
6774 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6775
6776 case tcc_expression:
6777 case tcc_reference:
6778 case tcc_vl_exp:
6779 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
6780 the expression. If it is set, we conflict iff we are that rtx or
6781 both are in memory. Otherwise, we check all operands of the
6782 expression recursively. */
6783
6784 switch (TREE_CODE (exp))
6785 {
6786 case ADDR_EXPR:
6787 /* If the operand is static or we are static, we can't conflict.
6788 Likewise if we don't conflict with the operand at all. */
6789 if (staticp (TREE_OPERAND (exp, 0))
6790 || TREE_STATIC (exp)
6791 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
6792 return 1;
6793
6794 /* Otherwise, the only way this can conflict is if we are taking
6795 the address of a DECL a that address if part of X, which is
6796 very rare. */
6797 exp = TREE_OPERAND (exp, 0);
6798 if (DECL_P (exp))
6799 {
6800 if (!DECL_RTL_SET_P (exp)
6801 || !MEM_P (DECL_RTL (exp)))
6802 return 0;
6803 else
6804 exp_rtl = XEXP (DECL_RTL (exp), 0);
6805 }
6806 break;
6807
6808 case MEM_REF:
6809 if (MEM_P (x)
6810 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
6811 get_alias_set (exp)))
6812 return 0;
6813 break;
6814
6815 case CALL_EXPR:
6816 /* Assume that the call will clobber all hard registers and
6817 all of memory. */
6818 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6819 || MEM_P (x))
6820 return 0;
6821 break;
6822
6823 case WITH_CLEANUP_EXPR:
6824 case CLEANUP_POINT_EXPR:
6825 /* Lowered by gimplify.c. */
6826 gcc_unreachable ();
6827
6828 case SAVE_EXPR:
6829 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6830
6831 default:
6832 break;
6833 }
6834
6835 /* If we have an rtx, we do not need to scan our operands. */
6836 if (exp_rtl)
6837 break;
6838
6839 nops = TREE_OPERAND_LENGTH (exp);
6840 for (i = 0; i < nops; i++)
6841 if (TREE_OPERAND (exp, i) != 0
6842 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
6843 return 0;
6844
6845 break;
6846
6847 case tcc_type:
6848 /* Should never get a type here. */
6849 gcc_unreachable ();
6850 }
6851
6852 /* If we have an rtl, find any enclosed object. Then see if we conflict
6853 with it. */
6854 if (exp_rtl)
6855 {
6856 if (GET_CODE (exp_rtl) == SUBREG)
6857 {
6858 exp_rtl = SUBREG_REG (exp_rtl);
6859 if (REG_P (exp_rtl)
6860 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
6861 return 0;
6862 }
6863
6864 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
6865 are memory and they conflict. */
6866 return ! (rtx_equal_p (x, exp_rtl)
6867 || (MEM_P (x) && MEM_P (exp_rtl)
6868 && true_dependence (exp_rtl, VOIDmode, x,
6869 rtx_addr_varies_p)));
6870 }
6871
6872 /* If we reach here, it is safe. */
6873 return 1;
6874 }
6875
6876 \f
6877 /* Return the highest power of two that EXP is known to be a multiple of.
6878 This is used in updating alignment of MEMs in array references. */
6879
6880 unsigned HOST_WIDE_INT
6881 highest_pow2_factor (const_tree exp)
6882 {
6883 unsigned HOST_WIDE_INT c0, c1;
6884
6885 switch (TREE_CODE (exp))
6886 {
6887 case INTEGER_CST:
6888 /* We can find the lowest bit that's a one. If the low
6889 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
6890 We need to handle this case since we can find it in a COND_EXPR,
6891 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
6892 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
6893 later ICE. */
6894 if (TREE_OVERFLOW (exp))
6895 return BIGGEST_ALIGNMENT;
6896 else
6897 {
6898 /* Note: tree_low_cst is intentionally not used here,
6899 we don't care about the upper bits. */
6900 c0 = TREE_INT_CST_LOW (exp);
6901 c0 &= -c0;
6902 return c0 ? c0 : BIGGEST_ALIGNMENT;
6903 }
6904 break;
6905
6906 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
6907 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6908 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6909 return MIN (c0, c1);
6910
6911 case MULT_EXPR:
6912 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6913 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6914 return c0 * c1;
6915
6916 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
6917 case CEIL_DIV_EXPR:
6918 if (integer_pow2p (TREE_OPERAND (exp, 1))
6919 && host_integerp (TREE_OPERAND (exp, 1), 1))
6920 {
6921 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6922 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
6923 return MAX (1, c0 / c1);
6924 }
6925 break;
6926
6927 case BIT_AND_EXPR:
6928 /* The highest power of two of a bit-and expression is the maximum of
6929 that of its operands. We typically get here for a complex LHS and
6930 a constant negative power of two on the RHS to force an explicit
6931 alignment, so don't bother looking at the LHS. */
6932 return highest_pow2_factor (TREE_OPERAND (exp, 1));
6933
6934 CASE_CONVERT:
6935 case SAVE_EXPR:
6936 return highest_pow2_factor (TREE_OPERAND (exp, 0));
6937
6938 case COMPOUND_EXPR:
6939 return highest_pow2_factor (TREE_OPERAND (exp, 1));
6940
6941 case COND_EXPR:
6942 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6943 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
6944 return MIN (c0, c1);
6945
6946 default:
6947 break;
6948 }
6949
6950 return 1;
6951 }
6952
6953 /* Similar, except that the alignment requirements of TARGET are
6954 taken into account. Assume it is at least as aligned as its
6955 type, unless it is a COMPONENT_REF in which case the layout of
6956 the structure gives the alignment. */
6957
6958 static unsigned HOST_WIDE_INT
6959 highest_pow2_factor_for_target (const_tree target, const_tree exp)
6960 {
6961 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
6962 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
6963
6964 return MAX (factor, talign);
6965 }
6966 \f
6967 /* Subroutine of expand_expr. Expand the two operands of a binary
6968 expression EXP0 and EXP1 placing the results in OP0 and OP1.
6969 The value may be stored in TARGET if TARGET is nonzero. The
6970 MODIFIER argument is as documented by expand_expr. */
6971
6972 static void
6973 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
6974 enum expand_modifier modifier)
6975 {
6976 if (! safe_from_p (target, exp1, 1))
6977 target = 0;
6978 if (operand_equal_p (exp0, exp1, 0))
6979 {
6980 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6981 *op1 = copy_rtx (*op0);
6982 }
6983 else
6984 {
6985 /* If we need to preserve evaluation order, copy exp0 into its own
6986 temporary variable so that it can't be clobbered by exp1. */
6987 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
6988 exp0 = save_expr (exp0);
6989 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6990 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
6991 }
6992 }
6993
6994 \f
6995 /* Return a MEM that contains constant EXP. DEFER is as for
6996 output_constant_def and MODIFIER is as for expand_expr. */
6997
6998 static rtx
6999 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7000 {
7001 rtx mem;
7002
7003 mem = output_constant_def (exp, defer);
7004 if (modifier != EXPAND_INITIALIZER)
7005 mem = use_anchored_address (mem);
7006 return mem;
7007 }
7008
7009 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7010 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7011
7012 static rtx
7013 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7014 enum expand_modifier modifier, addr_space_t as)
7015 {
7016 rtx result, subtarget;
7017 tree inner, offset;
7018 HOST_WIDE_INT bitsize, bitpos;
7019 int volatilep, unsignedp;
7020 enum machine_mode mode1;
7021
7022 /* If we are taking the address of a constant and are at the top level,
7023 we have to use output_constant_def since we can't call force_const_mem
7024 at top level. */
7025 /* ??? This should be considered a front-end bug. We should not be
7026 generating ADDR_EXPR of something that isn't an LVALUE. The only
7027 exception here is STRING_CST. */
7028 if (CONSTANT_CLASS_P (exp))
7029 return XEXP (expand_expr_constant (exp, 0, modifier), 0);
7030
7031 /* Everything must be something allowed by is_gimple_addressable. */
7032 switch (TREE_CODE (exp))
7033 {
7034 case INDIRECT_REF:
7035 /* This case will happen via recursion for &a->b. */
7036 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7037
7038 case MEM_REF:
7039 {
7040 tree tem = TREE_OPERAND (exp, 0);
7041 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7042 tem = build2 (POINTER_PLUS_EXPR, TREE_TYPE (TREE_OPERAND (exp, 1)),
7043 tem,
7044 double_int_to_tree (sizetype, mem_ref_offset (exp)));
7045 return expand_expr (tem, target, tmode, modifier);
7046 }
7047
7048 case CONST_DECL:
7049 /* Expand the initializer like constants above. */
7050 return XEXP (expand_expr_constant (DECL_INITIAL (exp), 0, modifier), 0);
7051
7052 case REALPART_EXPR:
7053 /* The real part of the complex number is always first, therefore
7054 the address is the same as the address of the parent object. */
7055 offset = 0;
7056 bitpos = 0;
7057 inner = TREE_OPERAND (exp, 0);
7058 break;
7059
7060 case IMAGPART_EXPR:
7061 /* The imaginary part of the complex number is always second.
7062 The expression is therefore always offset by the size of the
7063 scalar type. */
7064 offset = 0;
7065 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7066 inner = TREE_OPERAND (exp, 0);
7067 break;
7068
7069 default:
7070 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7071 expand_expr, as that can have various side effects; LABEL_DECLs for
7072 example, may not have their DECL_RTL set yet. Expand the rtl of
7073 CONSTRUCTORs too, which should yield a memory reference for the
7074 constructor's contents. Assume language specific tree nodes can
7075 be expanded in some interesting way. */
7076 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7077 if (DECL_P (exp)
7078 || TREE_CODE (exp) == CONSTRUCTOR
7079 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7080 {
7081 result = expand_expr (exp, target, tmode,
7082 modifier == EXPAND_INITIALIZER
7083 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7084
7085 /* If the DECL isn't in memory, then the DECL wasn't properly
7086 marked TREE_ADDRESSABLE, which will be either a front-end
7087 or a tree optimizer bug. */
7088 gcc_assert (MEM_P (result));
7089 result = XEXP (result, 0);
7090
7091 /* ??? Is this needed anymore? */
7092 if (DECL_P (exp) && !TREE_USED (exp) == 0)
7093 {
7094 assemble_external (exp);
7095 TREE_USED (exp) = 1;
7096 }
7097
7098 if (modifier != EXPAND_INITIALIZER
7099 && modifier != EXPAND_CONST_ADDRESS)
7100 result = force_operand (result, target);
7101 return result;
7102 }
7103
7104 /* Pass FALSE as the last argument to get_inner_reference although
7105 we are expanding to RTL. The rationale is that we know how to
7106 handle "aligning nodes" here: we can just bypass them because
7107 they won't change the final object whose address will be returned
7108 (they actually exist only for that purpose). */
7109 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7110 &mode1, &unsignedp, &volatilep, false);
7111 break;
7112 }
7113
7114 /* We must have made progress. */
7115 gcc_assert (inner != exp);
7116
7117 subtarget = offset || bitpos ? NULL_RTX : target;
7118 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7119 inner alignment, force the inner to be sufficiently aligned. */
7120 if (CONSTANT_CLASS_P (inner)
7121 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7122 {
7123 inner = copy_node (inner);
7124 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7125 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7126 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7127 }
7128 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7129
7130 if (offset)
7131 {
7132 rtx tmp;
7133
7134 if (modifier != EXPAND_NORMAL)
7135 result = force_operand (result, NULL);
7136 tmp = expand_expr (offset, NULL_RTX, tmode,
7137 modifier == EXPAND_INITIALIZER
7138 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7139
7140 result = convert_memory_address_addr_space (tmode, result, as);
7141 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7142
7143 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7144 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7145 else
7146 {
7147 subtarget = bitpos ? NULL_RTX : target;
7148 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7149 1, OPTAB_LIB_WIDEN);
7150 }
7151 }
7152
7153 if (bitpos)
7154 {
7155 /* Someone beforehand should have rejected taking the address
7156 of such an object. */
7157 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7158
7159 result = plus_constant (result, bitpos / BITS_PER_UNIT);
7160 if (modifier < EXPAND_SUM)
7161 result = force_operand (result, target);
7162 }
7163
7164 return result;
7165 }
7166
7167 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7168 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7169
7170 static rtx
7171 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7172 enum expand_modifier modifier)
7173 {
7174 addr_space_t as = ADDR_SPACE_GENERIC;
7175 enum machine_mode address_mode = Pmode;
7176 enum machine_mode pointer_mode = ptr_mode;
7177 enum machine_mode rmode;
7178 rtx result;
7179
7180 /* Target mode of VOIDmode says "whatever's natural". */
7181 if (tmode == VOIDmode)
7182 tmode = TYPE_MODE (TREE_TYPE (exp));
7183
7184 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7185 {
7186 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7187 address_mode = targetm.addr_space.address_mode (as);
7188 pointer_mode = targetm.addr_space.pointer_mode (as);
7189 }
7190
7191 /* We can get called with some Weird Things if the user does silliness
7192 like "(short) &a". In that case, convert_memory_address won't do
7193 the right thing, so ignore the given target mode. */
7194 if (tmode != address_mode && tmode != pointer_mode)
7195 tmode = address_mode;
7196
7197 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7198 tmode, modifier, as);
7199
7200 /* Despite expand_expr claims concerning ignoring TMODE when not
7201 strictly convenient, stuff breaks if we don't honor it. Note
7202 that combined with the above, we only do this for pointer modes. */
7203 rmode = GET_MODE (result);
7204 if (rmode == VOIDmode)
7205 rmode = tmode;
7206 if (rmode != tmode)
7207 result = convert_memory_address_addr_space (tmode, result, as);
7208
7209 return result;
7210 }
7211
7212 /* Generate code for computing CONSTRUCTOR EXP.
7213 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7214 is TRUE, instead of creating a temporary variable in memory
7215 NULL is returned and the caller needs to handle it differently. */
7216
7217 static rtx
7218 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7219 bool avoid_temp_mem)
7220 {
7221 tree type = TREE_TYPE (exp);
7222 enum machine_mode mode = TYPE_MODE (type);
7223
7224 /* Try to avoid creating a temporary at all. This is possible
7225 if all of the initializer is zero.
7226 FIXME: try to handle all [0..255] initializers we can handle
7227 with memset. */
7228 if (TREE_STATIC (exp)
7229 && !TREE_ADDRESSABLE (exp)
7230 && target != 0 && mode == BLKmode
7231 && all_zeros_p (exp))
7232 {
7233 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7234 return target;
7235 }
7236
7237 /* All elts simple constants => refer to a constant in memory. But
7238 if this is a non-BLKmode mode, let it store a field at a time
7239 since that should make a CONST_INT or CONST_DOUBLE when we
7240 fold. Likewise, if we have a target we can use, it is best to
7241 store directly into the target unless the type is large enough
7242 that memcpy will be used. If we are making an initializer and
7243 all operands are constant, put it in memory as well.
7244
7245 FIXME: Avoid trying to fill vector constructors piece-meal.
7246 Output them with output_constant_def below unless we're sure
7247 they're zeros. This should go away when vector initializers
7248 are treated like VECTOR_CST instead of arrays. */
7249 if ((TREE_STATIC (exp)
7250 && ((mode == BLKmode
7251 && ! (target != 0 && safe_from_p (target, exp, 1)))
7252 || TREE_ADDRESSABLE (exp)
7253 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7254 && (! MOVE_BY_PIECES_P
7255 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7256 TYPE_ALIGN (type)))
7257 && ! mostly_zeros_p (exp))))
7258 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7259 && TREE_CONSTANT (exp)))
7260 {
7261 rtx constructor;
7262
7263 if (avoid_temp_mem)
7264 return NULL_RTX;
7265
7266 constructor = expand_expr_constant (exp, 1, modifier);
7267
7268 if (modifier != EXPAND_CONST_ADDRESS
7269 && modifier != EXPAND_INITIALIZER
7270 && modifier != EXPAND_SUM)
7271 constructor = validize_mem (constructor);
7272
7273 return constructor;
7274 }
7275
7276 /* Handle calls that pass values in multiple non-contiguous
7277 locations. The Irix 6 ABI has examples of this. */
7278 if (target == 0 || ! safe_from_p (target, exp, 1)
7279 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7280 {
7281 if (avoid_temp_mem)
7282 return NULL_RTX;
7283
7284 target
7285 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7286 | (TREE_READONLY (exp)
7287 * TYPE_QUAL_CONST))),
7288 0, TREE_ADDRESSABLE (exp), 1);
7289 }
7290
7291 store_constructor (exp, target, 0, int_expr_size (exp));
7292 return target;
7293 }
7294
7295
7296 /* expand_expr: generate code for computing expression EXP.
7297 An rtx for the computed value is returned. The value is never null.
7298 In the case of a void EXP, const0_rtx is returned.
7299
7300 The value may be stored in TARGET if TARGET is nonzero.
7301 TARGET is just a suggestion; callers must assume that
7302 the rtx returned may not be the same as TARGET.
7303
7304 If TARGET is CONST0_RTX, it means that the value will be ignored.
7305
7306 If TMODE is not VOIDmode, it suggests generating the
7307 result in mode TMODE. But this is done only when convenient.
7308 Otherwise, TMODE is ignored and the value generated in its natural mode.
7309 TMODE is just a suggestion; callers must assume that
7310 the rtx returned may not have mode TMODE.
7311
7312 Note that TARGET may have neither TMODE nor MODE. In that case, it
7313 probably will not be used.
7314
7315 If MODIFIER is EXPAND_SUM then when EXP is an addition
7316 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7317 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7318 products as above, or REG or MEM, or constant.
7319 Ordinarily in such cases we would output mul or add instructions
7320 and then return a pseudo reg containing the sum.
7321
7322 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7323 it also marks a label as absolutely required (it can't be dead).
7324 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7325 This is used for outputting expressions used in initializers.
7326
7327 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7328 with a constant address even if that address is not normally legitimate.
7329 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7330
7331 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7332 a call parameter. Such targets require special care as we haven't yet
7333 marked TARGET so that it's safe from being trashed by libcalls. We
7334 don't want to use TARGET for anything but the final result;
7335 Intermediate values must go elsewhere. Additionally, calls to
7336 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7337
7338 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7339 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7340 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7341 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7342 recursively. */
7343
7344 rtx
7345 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7346 enum expand_modifier modifier, rtx *alt_rtl)
7347 {
7348 rtx ret;
7349
7350 /* Handle ERROR_MARK before anybody tries to access its type. */
7351 if (TREE_CODE (exp) == ERROR_MARK
7352 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7353 {
7354 ret = CONST0_RTX (tmode);
7355 return ret ? ret : const0_rtx;
7356 }
7357
7358 /* If this is an expression of some kind and it has an associated line
7359 number, then emit the line number before expanding the expression.
7360
7361 We need to save and restore the file and line information so that
7362 errors discovered during expansion are emitted with the right
7363 information. It would be better of the diagnostic routines
7364 used the file/line information embedded in the tree nodes rather
7365 than globals. */
7366 if (cfun && EXPR_HAS_LOCATION (exp))
7367 {
7368 location_t saved_location = input_location;
7369 location_t saved_curr_loc = get_curr_insn_source_location ();
7370 tree saved_block = get_curr_insn_block ();
7371 input_location = EXPR_LOCATION (exp);
7372 set_curr_insn_source_location (input_location);
7373
7374 /* Record where the insns produced belong. */
7375 set_curr_insn_block (TREE_BLOCK (exp));
7376
7377 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7378
7379 input_location = saved_location;
7380 set_curr_insn_block (saved_block);
7381 set_curr_insn_source_location (saved_curr_loc);
7382 }
7383 else
7384 {
7385 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7386 }
7387
7388 return ret;
7389 }
7390
7391 rtx
7392 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7393 enum expand_modifier modifier)
7394 {
7395 rtx op0, op1, op2, temp;
7396 tree type;
7397 int unsignedp;
7398 enum machine_mode mode;
7399 enum tree_code code = ops->code;
7400 optab this_optab;
7401 rtx subtarget, original_target;
7402 int ignore;
7403 bool reduce_bit_field;
7404 location_t loc = ops->location;
7405 tree treeop0, treeop1, treeop2;
7406 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7407 ? reduce_to_bit_field_precision ((expr), \
7408 target, \
7409 type) \
7410 : (expr))
7411
7412 type = ops->type;
7413 mode = TYPE_MODE (type);
7414 unsignedp = TYPE_UNSIGNED (type);
7415
7416 treeop0 = ops->op0;
7417 treeop1 = ops->op1;
7418 treeop2 = ops->op2;
7419
7420 /* We should be called only on simple (binary or unary) expressions,
7421 exactly those that are valid in gimple expressions that aren't
7422 GIMPLE_SINGLE_RHS (or invalid). */
7423 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7424 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7425 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7426
7427 ignore = (target == const0_rtx
7428 || ((CONVERT_EXPR_CODE_P (code)
7429 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7430 && TREE_CODE (type) == VOID_TYPE));
7431
7432 /* We should be called only if we need the result. */
7433 gcc_assert (!ignore);
7434
7435 /* An operation in what may be a bit-field type needs the
7436 result to be reduced to the precision of the bit-field type,
7437 which is narrower than that of the type's mode. */
7438 reduce_bit_field = (INTEGRAL_TYPE_P (type)
7439 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7440
7441 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7442 target = 0;
7443
7444 /* Use subtarget as the target for operand 0 of a binary operation. */
7445 subtarget = get_subtarget (target);
7446 original_target = target;
7447
7448 switch (code)
7449 {
7450 case NON_LVALUE_EXPR:
7451 case PAREN_EXPR:
7452 CASE_CONVERT:
7453 if (treeop0 == error_mark_node)
7454 return const0_rtx;
7455
7456 if (TREE_CODE (type) == UNION_TYPE)
7457 {
7458 tree valtype = TREE_TYPE (treeop0);
7459
7460 /* If both input and output are BLKmode, this conversion isn't doing
7461 anything except possibly changing memory attribute. */
7462 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7463 {
7464 rtx result = expand_expr (treeop0, target, tmode,
7465 modifier);
7466
7467 result = copy_rtx (result);
7468 set_mem_attributes (result, type, 0);
7469 return result;
7470 }
7471
7472 if (target == 0)
7473 {
7474 if (TYPE_MODE (type) != BLKmode)
7475 target = gen_reg_rtx (TYPE_MODE (type));
7476 else
7477 target = assign_temp (type, 0, 1, 1);
7478 }
7479
7480 if (MEM_P (target))
7481 /* Store data into beginning of memory target. */
7482 store_expr (treeop0,
7483 adjust_address (target, TYPE_MODE (valtype), 0),
7484 modifier == EXPAND_STACK_PARM,
7485 false);
7486
7487 else
7488 {
7489 gcc_assert (REG_P (target));
7490
7491 /* Store this field into a union of the proper type. */
7492 store_field (target,
7493 MIN ((int_size_in_bytes (TREE_TYPE
7494 (treeop0))
7495 * BITS_PER_UNIT),
7496 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7497 0, 0, 0, TYPE_MODE (valtype), treeop0,
7498 type, 0, false);
7499 }
7500
7501 /* Return the entire union. */
7502 return target;
7503 }
7504
7505 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
7506 {
7507 op0 = expand_expr (treeop0, target, VOIDmode,
7508 modifier);
7509
7510 /* If the signedness of the conversion differs and OP0 is
7511 a promoted SUBREG, clear that indication since we now
7512 have to do the proper extension. */
7513 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
7514 && GET_CODE (op0) == SUBREG)
7515 SUBREG_PROMOTED_VAR_P (op0) = 0;
7516
7517 return REDUCE_BIT_FIELD (op0);
7518 }
7519
7520 op0 = expand_expr (treeop0, NULL_RTX, mode,
7521 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
7522 if (GET_MODE (op0) == mode)
7523 ;
7524
7525 /* If OP0 is a constant, just convert it into the proper mode. */
7526 else if (CONSTANT_P (op0))
7527 {
7528 tree inner_type = TREE_TYPE (treeop0);
7529 enum machine_mode inner_mode = GET_MODE (op0);
7530
7531 if (inner_mode == VOIDmode)
7532 inner_mode = TYPE_MODE (inner_type);
7533
7534 if (modifier == EXPAND_INITIALIZER)
7535 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7536 subreg_lowpart_offset (mode,
7537 inner_mode));
7538 else
7539 op0= convert_modes (mode, inner_mode, op0,
7540 TYPE_UNSIGNED (inner_type));
7541 }
7542
7543 else if (modifier == EXPAND_INITIALIZER)
7544 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7545
7546 else if (target == 0)
7547 op0 = convert_to_mode (mode, op0,
7548 TYPE_UNSIGNED (TREE_TYPE
7549 (treeop0)));
7550 else
7551 {
7552 convert_move (target, op0,
7553 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7554 op0 = target;
7555 }
7556
7557 return REDUCE_BIT_FIELD (op0);
7558
7559 case ADDR_SPACE_CONVERT_EXPR:
7560 {
7561 tree treeop0_type = TREE_TYPE (treeop0);
7562 addr_space_t as_to;
7563 addr_space_t as_from;
7564
7565 gcc_assert (POINTER_TYPE_P (type));
7566 gcc_assert (POINTER_TYPE_P (treeop0_type));
7567
7568 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
7569 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
7570
7571 /* Conversions between pointers to the same address space should
7572 have been implemented via CONVERT_EXPR / NOP_EXPR. */
7573 gcc_assert (as_to != as_from);
7574
7575 /* Ask target code to handle conversion between pointers
7576 to overlapping address spaces. */
7577 if (targetm.addr_space.subset_p (as_to, as_from)
7578 || targetm.addr_space.subset_p (as_from, as_to))
7579 {
7580 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
7581 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
7582 gcc_assert (op0);
7583 return op0;
7584 }
7585
7586 /* For disjoint address spaces, converting anything but
7587 a null pointer invokes undefined behaviour. We simply
7588 always return a null pointer here. */
7589 return CONST0_RTX (mode);
7590 }
7591
7592 case POINTER_PLUS_EXPR:
7593 /* Even though the sizetype mode and the pointer's mode can be different
7594 expand is able to handle this correctly and get the correct result out
7595 of the PLUS_EXPR code. */
7596 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
7597 if sizetype precision is smaller than pointer precision. */
7598 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
7599 treeop1 = fold_convert_loc (loc, type,
7600 fold_convert_loc (loc, ssizetype,
7601 treeop1));
7602 case PLUS_EXPR:
7603 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7604 something else, make sure we add the register to the constant and
7605 then to the other thing. This case can occur during strength
7606 reduction and doing it this way will produce better code if the
7607 frame pointer or argument pointer is eliminated.
7608
7609 fold-const.c will ensure that the constant is always in the inner
7610 PLUS_EXPR, so the only case we need to do anything about is if
7611 sp, ap, or fp is our second argument, in which case we must swap
7612 the innermost first argument and our second argument. */
7613
7614 if (TREE_CODE (treeop0) == PLUS_EXPR
7615 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
7616 && TREE_CODE (treeop1) == VAR_DECL
7617 && (DECL_RTL (treeop1) == frame_pointer_rtx
7618 || DECL_RTL (treeop1) == stack_pointer_rtx
7619 || DECL_RTL (treeop1) == arg_pointer_rtx))
7620 {
7621 tree t = treeop1;
7622
7623 treeop1 = TREE_OPERAND (treeop0, 0);
7624 TREE_OPERAND (treeop0, 0) = t;
7625 }
7626
7627 /* If the result is to be ptr_mode and we are adding an integer to
7628 something, we might be forming a constant. So try to use
7629 plus_constant. If it produces a sum and we can't accept it,
7630 use force_operand. This allows P = &ARR[const] to generate
7631 efficient code on machines where a SYMBOL_REF is not a valid
7632 address.
7633
7634 If this is an EXPAND_SUM call, always return the sum. */
7635 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7636 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
7637 {
7638 if (modifier == EXPAND_STACK_PARM)
7639 target = 0;
7640 if (TREE_CODE (treeop0) == INTEGER_CST
7641 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7642 && TREE_CONSTANT (treeop1))
7643 {
7644 rtx constant_part;
7645
7646 op1 = expand_expr (treeop1, subtarget, VOIDmode,
7647 EXPAND_SUM);
7648 /* Use immed_double_const to ensure that the constant is
7649 truncated according to the mode of OP1, then sign extended
7650 to a HOST_WIDE_INT. Using the constant directly can result
7651 in non-canonical RTL in a 64x32 cross compile. */
7652 constant_part
7653 = immed_double_const (TREE_INT_CST_LOW (treeop0),
7654 (HOST_WIDE_INT) 0,
7655 TYPE_MODE (TREE_TYPE (treeop1)));
7656 op1 = plus_constant (op1, INTVAL (constant_part));
7657 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7658 op1 = force_operand (op1, target);
7659 return REDUCE_BIT_FIELD (op1);
7660 }
7661
7662 else if (TREE_CODE (treeop1) == INTEGER_CST
7663 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7664 && TREE_CONSTANT (treeop0))
7665 {
7666 rtx constant_part;
7667
7668 op0 = expand_expr (treeop0, subtarget, VOIDmode,
7669 (modifier == EXPAND_INITIALIZER
7670 ? EXPAND_INITIALIZER : EXPAND_SUM));
7671 if (! CONSTANT_P (op0))
7672 {
7673 op1 = expand_expr (treeop1, NULL_RTX,
7674 VOIDmode, modifier);
7675 /* Return a PLUS if modifier says it's OK. */
7676 if (modifier == EXPAND_SUM
7677 || modifier == EXPAND_INITIALIZER)
7678 return simplify_gen_binary (PLUS, mode, op0, op1);
7679 goto binop2;
7680 }
7681 /* Use immed_double_const to ensure that the constant is
7682 truncated according to the mode of OP1, then sign extended
7683 to a HOST_WIDE_INT. Using the constant directly can result
7684 in non-canonical RTL in a 64x32 cross compile. */
7685 constant_part
7686 = immed_double_const (TREE_INT_CST_LOW (treeop1),
7687 (HOST_WIDE_INT) 0,
7688 TYPE_MODE (TREE_TYPE (treeop0)));
7689 op0 = plus_constant (op0, INTVAL (constant_part));
7690 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7691 op0 = force_operand (op0, target);
7692 return REDUCE_BIT_FIELD (op0);
7693 }
7694 }
7695
7696 /* Use TER to expand pointer addition of a negated value
7697 as pointer subtraction. */
7698 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
7699 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
7700 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
7701 && TREE_CODE (treeop1) == SSA_NAME
7702 && TYPE_MODE (TREE_TYPE (treeop0))
7703 == TYPE_MODE (TREE_TYPE (treeop1)))
7704 {
7705 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
7706 if (def)
7707 {
7708 treeop1 = gimple_assign_rhs1 (def);
7709 code = MINUS_EXPR;
7710 goto do_minus;
7711 }
7712 }
7713
7714 /* No sense saving up arithmetic to be done
7715 if it's all in the wrong mode to form part of an address.
7716 And force_operand won't know whether to sign-extend or
7717 zero-extend. */
7718 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7719 || mode != ptr_mode)
7720 {
7721 expand_operands (treeop0, treeop1,
7722 subtarget, &op0, &op1, EXPAND_NORMAL);
7723 if (op0 == const0_rtx)
7724 return op1;
7725 if (op1 == const0_rtx)
7726 return op0;
7727 goto binop2;
7728 }
7729
7730 expand_operands (treeop0, treeop1,
7731 subtarget, &op0, &op1, modifier);
7732 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7733
7734 case MINUS_EXPR:
7735 do_minus:
7736 /* For initializers, we are allowed to return a MINUS of two
7737 symbolic constants. Here we handle all cases when both operands
7738 are constant. */
7739 /* Handle difference of two symbolic constants,
7740 for the sake of an initializer. */
7741 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7742 && really_constant_p (treeop0)
7743 && really_constant_p (treeop1))
7744 {
7745 expand_operands (treeop0, treeop1,
7746 NULL_RTX, &op0, &op1, modifier);
7747
7748 /* If the last operand is a CONST_INT, use plus_constant of
7749 the negated constant. Else make the MINUS. */
7750 if (CONST_INT_P (op1))
7751 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
7752 else
7753 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
7754 }
7755
7756 /* No sense saving up arithmetic to be done
7757 if it's all in the wrong mode to form part of an address.
7758 And force_operand won't know whether to sign-extend or
7759 zero-extend. */
7760 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7761 || mode != ptr_mode)
7762 goto binop;
7763
7764 expand_operands (treeop0, treeop1,
7765 subtarget, &op0, &op1, modifier);
7766
7767 /* Convert A - const to A + (-const). */
7768 if (CONST_INT_P (op1))
7769 {
7770 op1 = negate_rtx (mode, op1);
7771 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7772 }
7773
7774 goto binop2;
7775
7776 case WIDEN_MULT_PLUS_EXPR:
7777 case WIDEN_MULT_MINUS_EXPR:
7778 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
7779 op2 = expand_normal (treeop2);
7780 target = expand_widen_pattern_expr (ops, op0, op1, op2,
7781 target, unsignedp);
7782 return target;
7783
7784 case WIDEN_MULT_EXPR:
7785 /* If first operand is constant, swap them.
7786 Thus the following special case checks need only
7787 check the second operand. */
7788 if (TREE_CODE (treeop0) == INTEGER_CST)
7789 {
7790 tree t1 = treeop0;
7791 treeop0 = treeop1;
7792 treeop1 = t1;
7793 }
7794
7795 /* First, check if we have a multiplication of one signed and one
7796 unsigned operand. */
7797 if (TREE_CODE (treeop1) != INTEGER_CST
7798 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
7799 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
7800 {
7801 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
7802 this_optab = usmul_widen_optab;
7803 if (mode == GET_MODE_2XWIDER_MODE (innermode))
7804 {
7805 if (optab_handler (this_optab, mode) != CODE_FOR_nothing)
7806 {
7807 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
7808 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
7809 EXPAND_NORMAL);
7810 else
7811 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
7812 EXPAND_NORMAL);
7813 goto binop3;
7814 }
7815 }
7816 }
7817 /* Check for a multiplication with matching signedness. */
7818 else if ((TREE_CODE (treeop1) == INTEGER_CST
7819 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
7820 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
7821 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
7822 {
7823 tree op0type = TREE_TYPE (treeop0);
7824 enum machine_mode innermode = TYPE_MODE (op0type);
7825 bool zextend_p = TYPE_UNSIGNED (op0type);
7826 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
7827 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
7828
7829 if (mode == GET_MODE_2XWIDER_MODE (innermode)
7830 && TREE_CODE (treeop0) != INTEGER_CST)
7831 {
7832 if (optab_handler (this_optab, mode) != CODE_FOR_nothing)
7833 {
7834 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
7835 EXPAND_NORMAL);
7836 temp = expand_widening_mult (mode, op0, op1, target,
7837 unsignedp, this_optab);
7838 return REDUCE_BIT_FIELD (temp);
7839 }
7840 if (optab_handler (other_optab, mode) != CODE_FOR_nothing
7841 && innermode == word_mode)
7842 {
7843 rtx htem, hipart;
7844 op0 = expand_normal (treeop0);
7845 if (TREE_CODE (treeop1) == INTEGER_CST)
7846 op1 = convert_modes (innermode, mode,
7847 expand_normal (treeop1), unsignedp);
7848 else
7849 op1 = expand_normal (treeop1);
7850 temp = expand_binop (mode, other_optab, op0, op1, target,
7851 unsignedp, OPTAB_LIB_WIDEN);
7852 hipart = gen_highpart (innermode, temp);
7853 htem = expand_mult_highpart_adjust (innermode, hipart,
7854 op0, op1, hipart,
7855 zextend_p);
7856 if (htem != hipart)
7857 emit_move_insn (hipart, htem);
7858 return REDUCE_BIT_FIELD (temp);
7859 }
7860 }
7861 }
7862 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
7863 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
7864 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
7865 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
7866
7867 case FMA_EXPR:
7868 {
7869 optab opt = fma_optab;
7870 gimple def0, def2;
7871
7872 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
7873 call. */
7874 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
7875 {
7876 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
7877 tree call_expr;
7878
7879 gcc_assert (fn != NULL_TREE);
7880 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
7881 return expand_builtin (call_expr, target, subtarget, mode, false);
7882 }
7883
7884 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
7885 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
7886
7887 op0 = op2 = NULL;
7888
7889 if (def0 && def2
7890 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
7891 {
7892 opt = fnms_optab;
7893 op0 = expand_normal (gimple_assign_rhs1 (def0));
7894 op2 = expand_normal (gimple_assign_rhs1 (def2));
7895 }
7896 else if (def0
7897 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
7898 {
7899 opt = fnma_optab;
7900 op0 = expand_normal (gimple_assign_rhs1 (def0));
7901 }
7902 else if (def2
7903 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
7904 {
7905 opt = fms_optab;
7906 op2 = expand_normal (gimple_assign_rhs1 (def2));
7907 }
7908
7909 if (op0 == NULL)
7910 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
7911 if (op2 == NULL)
7912 op2 = expand_normal (treeop2);
7913 op1 = expand_normal (treeop1);
7914
7915 return expand_ternary_op (TYPE_MODE (type), opt,
7916 op0, op1, op2, target, 0);
7917 }
7918
7919 case MULT_EXPR:
7920 /* If this is a fixed-point operation, then we cannot use the code
7921 below because "expand_mult" doesn't support sat/no-sat fixed-point
7922 multiplications. */
7923 if (ALL_FIXED_POINT_MODE_P (mode))
7924 goto binop;
7925
7926 /* If first operand is constant, swap them.
7927 Thus the following special case checks need only
7928 check the second operand. */
7929 if (TREE_CODE (treeop0) == INTEGER_CST)
7930 {
7931 tree t1 = treeop0;
7932 treeop0 = treeop1;
7933 treeop1 = t1;
7934 }
7935
7936 /* Attempt to return something suitable for generating an
7937 indexed address, for machines that support that. */
7938
7939 if (modifier == EXPAND_SUM && mode == ptr_mode
7940 && host_integerp (treeop1, 0))
7941 {
7942 tree exp1 = treeop1;
7943
7944 op0 = expand_expr (treeop0, subtarget, VOIDmode,
7945 EXPAND_SUM);
7946
7947 if (!REG_P (op0))
7948 op0 = force_operand (op0, NULL_RTX);
7949 if (!REG_P (op0))
7950 op0 = copy_to_mode_reg (mode, op0);
7951
7952 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
7953 gen_int_mode (tree_low_cst (exp1, 0),
7954 TYPE_MODE (TREE_TYPE (exp1)))));
7955 }
7956
7957 if (modifier == EXPAND_STACK_PARM)
7958 target = 0;
7959
7960 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
7961 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
7962
7963 case TRUNC_DIV_EXPR:
7964 case FLOOR_DIV_EXPR:
7965 case CEIL_DIV_EXPR:
7966 case ROUND_DIV_EXPR:
7967 case EXACT_DIV_EXPR:
7968 /* If this is a fixed-point operation, then we cannot use the code
7969 below because "expand_divmod" doesn't support sat/no-sat fixed-point
7970 divisions. */
7971 if (ALL_FIXED_POINT_MODE_P (mode))
7972 goto binop;
7973
7974 if (modifier == EXPAND_STACK_PARM)
7975 target = 0;
7976 /* Possible optimization: compute the dividend with EXPAND_SUM
7977 then if the divisor is constant can optimize the case
7978 where some terms of the dividend have coeffs divisible by it. */
7979 expand_operands (treeop0, treeop1,
7980 subtarget, &op0, &op1, EXPAND_NORMAL);
7981 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
7982
7983 case RDIV_EXPR:
7984 goto binop;
7985
7986 case TRUNC_MOD_EXPR:
7987 case FLOOR_MOD_EXPR:
7988 case CEIL_MOD_EXPR:
7989 case ROUND_MOD_EXPR:
7990 if (modifier == EXPAND_STACK_PARM)
7991 target = 0;
7992 expand_operands (treeop0, treeop1,
7993 subtarget, &op0, &op1, EXPAND_NORMAL);
7994 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
7995
7996 case FIXED_CONVERT_EXPR:
7997 op0 = expand_normal (treeop0);
7998 if (target == 0 || modifier == EXPAND_STACK_PARM)
7999 target = gen_reg_rtx (mode);
8000
8001 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8002 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8003 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8004 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8005 else
8006 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8007 return target;
8008
8009 case FIX_TRUNC_EXPR:
8010 op0 = expand_normal (treeop0);
8011 if (target == 0 || modifier == EXPAND_STACK_PARM)
8012 target = gen_reg_rtx (mode);
8013 expand_fix (target, op0, unsignedp);
8014 return target;
8015
8016 case FLOAT_EXPR:
8017 op0 = expand_normal (treeop0);
8018 if (target == 0 || modifier == EXPAND_STACK_PARM)
8019 target = gen_reg_rtx (mode);
8020 /* expand_float can't figure out what to do if FROM has VOIDmode.
8021 So give it the correct mode. With -O, cse will optimize this. */
8022 if (GET_MODE (op0) == VOIDmode)
8023 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8024 op0);
8025 expand_float (target, op0,
8026 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8027 return target;
8028
8029 case NEGATE_EXPR:
8030 op0 = expand_expr (treeop0, subtarget,
8031 VOIDmode, EXPAND_NORMAL);
8032 if (modifier == EXPAND_STACK_PARM)
8033 target = 0;
8034 temp = expand_unop (mode,
8035 optab_for_tree_code (NEGATE_EXPR, type,
8036 optab_default),
8037 op0, target, 0);
8038 gcc_assert (temp);
8039 return REDUCE_BIT_FIELD (temp);
8040
8041 case ABS_EXPR:
8042 op0 = expand_expr (treeop0, subtarget,
8043 VOIDmode, EXPAND_NORMAL);
8044 if (modifier == EXPAND_STACK_PARM)
8045 target = 0;
8046
8047 /* ABS_EXPR is not valid for complex arguments. */
8048 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8049 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8050
8051 /* Unsigned abs is simply the operand. Testing here means we don't
8052 risk generating incorrect code below. */
8053 if (TYPE_UNSIGNED (type))
8054 return op0;
8055
8056 return expand_abs (mode, op0, target, unsignedp,
8057 safe_from_p (target, treeop0, 1));
8058
8059 case MAX_EXPR:
8060 case MIN_EXPR:
8061 target = original_target;
8062 if (target == 0
8063 || modifier == EXPAND_STACK_PARM
8064 || (MEM_P (target) && MEM_VOLATILE_P (target))
8065 || GET_MODE (target) != mode
8066 || (REG_P (target)
8067 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8068 target = gen_reg_rtx (mode);
8069 expand_operands (treeop0, treeop1,
8070 target, &op0, &op1, EXPAND_NORMAL);
8071
8072 /* First try to do it with a special MIN or MAX instruction.
8073 If that does not win, use a conditional jump to select the proper
8074 value. */
8075 this_optab = optab_for_tree_code (code, type, optab_default);
8076 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8077 OPTAB_WIDEN);
8078 if (temp != 0)
8079 return temp;
8080
8081 /* At this point, a MEM target is no longer useful; we will get better
8082 code without it. */
8083
8084 if (! REG_P (target))
8085 target = gen_reg_rtx (mode);
8086
8087 /* If op1 was placed in target, swap op0 and op1. */
8088 if (target != op0 && target == op1)
8089 {
8090 temp = op0;
8091 op0 = op1;
8092 op1 = temp;
8093 }
8094
8095 /* We generate better code and avoid problems with op1 mentioning
8096 target by forcing op1 into a pseudo if it isn't a constant. */
8097 if (! CONSTANT_P (op1))
8098 op1 = force_reg (mode, op1);
8099
8100 {
8101 enum rtx_code comparison_code;
8102 rtx cmpop1 = op1;
8103
8104 if (code == MAX_EXPR)
8105 comparison_code = unsignedp ? GEU : GE;
8106 else
8107 comparison_code = unsignedp ? LEU : LE;
8108
8109 /* Canonicalize to comparisons against 0. */
8110 if (op1 == const1_rtx)
8111 {
8112 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8113 or (a != 0 ? a : 1) for unsigned.
8114 For MIN we are safe converting (a <= 1 ? a : 1)
8115 into (a <= 0 ? a : 1) */
8116 cmpop1 = const0_rtx;
8117 if (code == MAX_EXPR)
8118 comparison_code = unsignedp ? NE : GT;
8119 }
8120 if (op1 == constm1_rtx && !unsignedp)
8121 {
8122 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8123 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8124 cmpop1 = const0_rtx;
8125 if (code == MIN_EXPR)
8126 comparison_code = LT;
8127 }
8128 #ifdef HAVE_conditional_move
8129 /* Use a conditional move if possible. */
8130 if (can_conditionally_move_p (mode))
8131 {
8132 rtx insn;
8133
8134 /* ??? Same problem as in expmed.c: emit_conditional_move
8135 forces a stack adjustment via compare_from_rtx, and we
8136 lose the stack adjustment if the sequence we are about
8137 to create is discarded. */
8138 do_pending_stack_adjust ();
8139
8140 start_sequence ();
8141
8142 /* Try to emit the conditional move. */
8143 insn = emit_conditional_move (target, comparison_code,
8144 op0, cmpop1, mode,
8145 op0, op1, mode,
8146 unsignedp);
8147
8148 /* If we could do the conditional move, emit the sequence,
8149 and return. */
8150 if (insn)
8151 {
8152 rtx seq = get_insns ();
8153 end_sequence ();
8154 emit_insn (seq);
8155 return target;
8156 }
8157
8158 /* Otherwise discard the sequence and fall back to code with
8159 branches. */
8160 end_sequence ();
8161 }
8162 #endif
8163 if (target != op0)
8164 emit_move_insn (target, op0);
8165
8166 temp = gen_label_rtx ();
8167 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8168 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8169 -1);
8170 }
8171 emit_move_insn (target, op1);
8172 emit_label (temp);
8173 return target;
8174
8175 case BIT_NOT_EXPR:
8176 op0 = expand_expr (treeop0, subtarget,
8177 VOIDmode, EXPAND_NORMAL);
8178 if (modifier == EXPAND_STACK_PARM)
8179 target = 0;
8180 /* In case we have to reduce the result to bitfield precision
8181 expand this as XOR with a proper constant instead. */
8182 if (reduce_bit_field)
8183 temp = expand_binop (mode, xor_optab, op0,
8184 immed_double_int_const
8185 (double_int_mask (TYPE_PRECISION (type)), mode),
8186 target, 1, OPTAB_LIB_WIDEN);
8187 else
8188 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8189 gcc_assert (temp);
8190 return temp;
8191
8192 /* ??? Can optimize bitwise operations with one arg constant.
8193 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8194 and (a bitwise1 b) bitwise2 b (etc)
8195 but that is probably not worth while. */
8196
8197 case BIT_AND_EXPR:
8198 case BIT_IOR_EXPR:
8199 case BIT_XOR_EXPR:
8200 goto binop;
8201
8202 case LROTATE_EXPR:
8203 case RROTATE_EXPR:
8204 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8205 || (GET_MODE_PRECISION (TYPE_MODE (type))
8206 == TYPE_PRECISION (type)));
8207 /* fall through */
8208
8209 case LSHIFT_EXPR:
8210 case RSHIFT_EXPR:
8211 /* If this is a fixed-point operation, then we cannot use the code
8212 below because "expand_shift" doesn't support sat/no-sat fixed-point
8213 shifts. */
8214 if (ALL_FIXED_POINT_MODE_P (mode))
8215 goto binop;
8216
8217 if (! safe_from_p (subtarget, treeop1, 1))
8218 subtarget = 0;
8219 if (modifier == EXPAND_STACK_PARM)
8220 target = 0;
8221 op0 = expand_expr (treeop0, subtarget,
8222 VOIDmode, EXPAND_NORMAL);
8223 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8224 unsignedp);
8225 if (code == LSHIFT_EXPR)
8226 temp = REDUCE_BIT_FIELD (temp);
8227 return temp;
8228
8229 /* Could determine the answer when only additive constants differ. Also,
8230 the addition of one can be handled by changing the condition. */
8231 case LT_EXPR:
8232 case LE_EXPR:
8233 case GT_EXPR:
8234 case GE_EXPR:
8235 case EQ_EXPR:
8236 case NE_EXPR:
8237 case UNORDERED_EXPR:
8238 case ORDERED_EXPR:
8239 case UNLT_EXPR:
8240 case UNLE_EXPR:
8241 case UNGT_EXPR:
8242 case UNGE_EXPR:
8243 case UNEQ_EXPR:
8244 case LTGT_EXPR:
8245 temp = do_store_flag (ops,
8246 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8247 tmode != VOIDmode ? tmode : mode);
8248 if (temp)
8249 return temp;
8250
8251 /* Use a compare and a jump for BLKmode comparisons, or for function
8252 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8253
8254 if ((target == 0
8255 || modifier == EXPAND_STACK_PARM
8256 || ! safe_from_p (target, treeop0, 1)
8257 || ! safe_from_p (target, treeop1, 1)
8258 /* Make sure we don't have a hard reg (such as function's return
8259 value) live across basic blocks, if not optimizing. */
8260 || (!optimize && REG_P (target)
8261 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8262 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8263
8264 emit_move_insn (target, const0_rtx);
8265
8266 op1 = gen_label_rtx ();
8267 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8268
8269 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8270 emit_move_insn (target, constm1_rtx);
8271 else
8272 emit_move_insn (target, const1_rtx);
8273
8274 emit_label (op1);
8275 return target;
8276
8277 case COMPLEX_EXPR:
8278 /* Get the rtx code of the operands. */
8279 op0 = expand_normal (treeop0);
8280 op1 = expand_normal (treeop1);
8281
8282 if (!target)
8283 target = gen_reg_rtx (TYPE_MODE (type));
8284
8285 /* Move the real (op0) and imaginary (op1) parts to their location. */
8286 write_complex_part (target, op0, false);
8287 write_complex_part (target, op1, true);
8288
8289 return target;
8290
8291 case WIDEN_SUM_EXPR:
8292 {
8293 tree oprnd0 = treeop0;
8294 tree oprnd1 = treeop1;
8295
8296 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8297 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8298 target, unsignedp);
8299 return target;
8300 }
8301
8302 case REDUC_MAX_EXPR:
8303 case REDUC_MIN_EXPR:
8304 case REDUC_PLUS_EXPR:
8305 {
8306 op0 = expand_normal (treeop0);
8307 this_optab = optab_for_tree_code (code, type, optab_default);
8308 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8309 gcc_assert (temp);
8310 return temp;
8311 }
8312
8313 case VEC_EXTRACT_EVEN_EXPR:
8314 case VEC_EXTRACT_ODD_EXPR:
8315 {
8316 expand_operands (treeop0, treeop1,
8317 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8318 this_optab = optab_for_tree_code (code, type, optab_default);
8319 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8320 OPTAB_WIDEN);
8321 gcc_assert (temp);
8322 return temp;
8323 }
8324
8325 case VEC_INTERLEAVE_HIGH_EXPR:
8326 case VEC_INTERLEAVE_LOW_EXPR:
8327 {
8328 expand_operands (treeop0, treeop1,
8329 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8330 this_optab = optab_for_tree_code (code, type, optab_default);
8331 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8332 OPTAB_WIDEN);
8333 gcc_assert (temp);
8334 return temp;
8335 }
8336
8337 case VEC_LSHIFT_EXPR:
8338 case VEC_RSHIFT_EXPR:
8339 {
8340 target = expand_vec_shift_expr (ops, target);
8341 return target;
8342 }
8343
8344 case VEC_UNPACK_HI_EXPR:
8345 case VEC_UNPACK_LO_EXPR:
8346 {
8347 op0 = expand_normal (treeop0);
8348 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8349 target, unsignedp);
8350 gcc_assert (temp);
8351 return temp;
8352 }
8353
8354 case VEC_UNPACK_FLOAT_HI_EXPR:
8355 case VEC_UNPACK_FLOAT_LO_EXPR:
8356 {
8357 op0 = expand_normal (treeop0);
8358 /* The signedness is determined from input operand. */
8359 temp = expand_widen_pattern_expr
8360 (ops, op0, NULL_RTX, NULL_RTX,
8361 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8362
8363 gcc_assert (temp);
8364 return temp;
8365 }
8366
8367 case VEC_WIDEN_MULT_HI_EXPR:
8368 case VEC_WIDEN_MULT_LO_EXPR:
8369 {
8370 tree oprnd0 = treeop0;
8371 tree oprnd1 = treeop1;
8372
8373 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8374 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8375 target, unsignedp);
8376 gcc_assert (target);
8377 return target;
8378 }
8379
8380 case VEC_PACK_TRUNC_EXPR:
8381 case VEC_PACK_SAT_EXPR:
8382 case VEC_PACK_FIX_TRUNC_EXPR:
8383 mode = TYPE_MODE (TREE_TYPE (treeop0));
8384 goto binop;
8385
8386 case DOT_PROD_EXPR:
8387 {
8388 tree oprnd0 = treeop0;
8389 tree oprnd1 = treeop1;
8390 tree oprnd2 = treeop2;
8391 rtx op2;
8392
8393 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8394 op2 = expand_normal (oprnd2);
8395 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8396 target, unsignedp);
8397 return target;
8398 }
8399
8400 case REALIGN_LOAD_EXPR:
8401 {
8402 tree oprnd0 = treeop0;
8403 tree oprnd1 = treeop1;
8404 tree oprnd2 = treeop2;
8405 rtx op2;
8406
8407 this_optab = optab_for_tree_code (code, type, optab_default);
8408 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8409 op2 = expand_normal (oprnd2);
8410 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8411 target, unsignedp);
8412 gcc_assert (temp);
8413 return temp;
8414 }
8415
8416 default:
8417 gcc_unreachable ();
8418 }
8419
8420 /* Here to do an ordinary binary operator. */
8421 binop:
8422 expand_operands (treeop0, treeop1,
8423 subtarget, &op0, &op1, EXPAND_NORMAL);
8424 binop2:
8425 this_optab = optab_for_tree_code (code, type, optab_default);
8426 binop3:
8427 if (modifier == EXPAND_STACK_PARM)
8428 target = 0;
8429 temp = expand_binop (mode, this_optab, op0, op1, target,
8430 unsignedp, OPTAB_LIB_WIDEN);
8431 gcc_assert (temp);
8432 /* Bitwise operations do not need bitfield reduction as we expect their
8433 operands being properly truncated. */
8434 if (code == BIT_XOR_EXPR
8435 || code == BIT_AND_EXPR
8436 || code == BIT_IOR_EXPR)
8437 return temp;
8438 return REDUCE_BIT_FIELD (temp);
8439 }
8440 #undef REDUCE_BIT_FIELD
8441
8442 rtx
8443 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
8444 enum expand_modifier modifier, rtx *alt_rtl)
8445 {
8446 rtx op0, op1, temp, decl_rtl;
8447 tree type;
8448 int unsignedp;
8449 enum machine_mode mode;
8450 enum tree_code code = TREE_CODE (exp);
8451 rtx subtarget, original_target;
8452 int ignore;
8453 tree context;
8454 bool reduce_bit_field;
8455 location_t loc = EXPR_LOCATION (exp);
8456 struct separate_ops ops;
8457 tree treeop0, treeop1, treeop2;
8458 tree ssa_name = NULL_TREE;
8459 gimple g;
8460
8461 type = TREE_TYPE (exp);
8462 mode = TYPE_MODE (type);
8463 unsignedp = TYPE_UNSIGNED (type);
8464
8465 treeop0 = treeop1 = treeop2 = NULL_TREE;
8466 if (!VL_EXP_CLASS_P (exp))
8467 switch (TREE_CODE_LENGTH (code))
8468 {
8469 default:
8470 case 3: treeop2 = TREE_OPERAND (exp, 2);
8471 case 2: treeop1 = TREE_OPERAND (exp, 1);
8472 case 1: treeop0 = TREE_OPERAND (exp, 0);
8473 case 0: break;
8474 }
8475 ops.code = code;
8476 ops.type = type;
8477 ops.op0 = treeop0;
8478 ops.op1 = treeop1;
8479 ops.op2 = treeop2;
8480 ops.location = loc;
8481
8482 ignore = (target == const0_rtx
8483 || ((CONVERT_EXPR_CODE_P (code)
8484 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8485 && TREE_CODE (type) == VOID_TYPE));
8486
8487 /* An operation in what may be a bit-field type needs the
8488 result to be reduced to the precision of the bit-field type,
8489 which is narrower than that of the type's mode. */
8490 reduce_bit_field = (!ignore
8491 && INTEGRAL_TYPE_P (type)
8492 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8493
8494 /* If we are going to ignore this result, we need only do something
8495 if there is a side-effect somewhere in the expression. If there
8496 is, short-circuit the most common cases here. Note that we must
8497 not call expand_expr with anything but const0_rtx in case this
8498 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
8499
8500 if (ignore)
8501 {
8502 if (! TREE_SIDE_EFFECTS (exp))
8503 return const0_rtx;
8504
8505 /* Ensure we reference a volatile object even if value is ignored, but
8506 don't do this if all we are doing is taking its address. */
8507 if (TREE_THIS_VOLATILE (exp)
8508 && TREE_CODE (exp) != FUNCTION_DECL
8509 && mode != VOIDmode && mode != BLKmode
8510 && modifier != EXPAND_CONST_ADDRESS)
8511 {
8512 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
8513 if (MEM_P (temp))
8514 copy_to_reg (temp);
8515 return const0_rtx;
8516 }
8517
8518 if (TREE_CODE_CLASS (code) == tcc_unary
8519 || code == COMPONENT_REF || code == INDIRECT_REF)
8520 return expand_expr (treeop0, const0_rtx, VOIDmode,
8521 modifier);
8522
8523 else if (TREE_CODE_CLASS (code) == tcc_binary
8524 || TREE_CODE_CLASS (code) == tcc_comparison
8525 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
8526 {
8527 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8528 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8529 return const0_rtx;
8530 }
8531 else if (code == BIT_FIELD_REF)
8532 {
8533 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8534 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8535 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
8536 return const0_rtx;
8537 }
8538
8539 target = 0;
8540 }
8541
8542 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8543 target = 0;
8544
8545 /* Use subtarget as the target for operand 0 of a binary operation. */
8546 subtarget = get_subtarget (target);
8547 original_target = target;
8548
8549 switch (code)
8550 {
8551 case LABEL_DECL:
8552 {
8553 tree function = decl_function_context (exp);
8554
8555 temp = label_rtx (exp);
8556 temp = gen_rtx_LABEL_REF (Pmode, temp);
8557
8558 if (function != current_function_decl
8559 && function != 0)
8560 LABEL_REF_NONLOCAL_P (temp) = 1;
8561
8562 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
8563 return temp;
8564 }
8565
8566 case SSA_NAME:
8567 /* ??? ivopts calls expander, without any preparation from
8568 out-of-ssa. So fake instructions as if this was an access to the
8569 base variable. This unnecessarily allocates a pseudo, see how we can
8570 reuse it, if partition base vars have it set already. */
8571 if (!currently_expanding_to_rtl)
8572 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
8573 NULL);
8574
8575 g = get_gimple_for_ssa_name (exp);
8576 /* For EXPAND_INITIALIZER try harder to get something simpler. */
8577 if (g == NULL
8578 && modifier == EXPAND_INITIALIZER
8579 && !SSA_NAME_IS_DEFAULT_DEF (exp)
8580 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
8581 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
8582 g = SSA_NAME_DEF_STMT (exp);
8583 if (g)
8584 return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
8585 modifier, NULL);
8586
8587 ssa_name = exp;
8588 decl_rtl = get_rtx_for_ssa_name (ssa_name);
8589 exp = SSA_NAME_VAR (ssa_name);
8590 goto expand_decl_rtl;
8591
8592 case PARM_DECL:
8593 case VAR_DECL:
8594 /* If a static var's type was incomplete when the decl was written,
8595 but the type is complete now, lay out the decl now. */
8596 if (DECL_SIZE (exp) == 0
8597 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
8598 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
8599 layout_decl (exp, 0);
8600
8601 /* ... fall through ... */
8602
8603 case FUNCTION_DECL:
8604 case RESULT_DECL:
8605 decl_rtl = DECL_RTL (exp);
8606 expand_decl_rtl:
8607 gcc_assert (decl_rtl);
8608 decl_rtl = copy_rtx (decl_rtl);
8609 /* Record writes to register variables. */
8610 if (modifier == EXPAND_WRITE
8611 && REG_P (decl_rtl)
8612 && HARD_REGISTER_P (decl_rtl))
8613 add_to_hard_reg_set (&crtl->asm_clobbers,
8614 GET_MODE (decl_rtl), REGNO (decl_rtl));
8615
8616 /* Ensure variable marked as used even if it doesn't go through
8617 a parser. If it hasn't be used yet, write out an external
8618 definition. */
8619 if (! TREE_USED (exp))
8620 {
8621 assemble_external (exp);
8622 TREE_USED (exp) = 1;
8623 }
8624
8625 /* Show we haven't gotten RTL for this yet. */
8626 temp = 0;
8627
8628 /* Variables inherited from containing functions should have
8629 been lowered by this point. */
8630 context = decl_function_context (exp);
8631 gcc_assert (!context
8632 || context == current_function_decl
8633 || TREE_STATIC (exp)
8634 || DECL_EXTERNAL (exp)
8635 /* ??? C++ creates functions that are not TREE_STATIC. */
8636 || TREE_CODE (exp) == FUNCTION_DECL);
8637
8638 /* This is the case of an array whose size is to be determined
8639 from its initializer, while the initializer is still being parsed.
8640 See expand_decl. */
8641
8642 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
8643 temp = validize_mem (decl_rtl);
8644
8645 /* If DECL_RTL is memory, we are in the normal case and the
8646 address is not valid, get the address into a register. */
8647
8648 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
8649 {
8650 if (alt_rtl)
8651 *alt_rtl = decl_rtl;
8652 decl_rtl = use_anchored_address (decl_rtl);
8653 if (modifier != EXPAND_CONST_ADDRESS
8654 && modifier != EXPAND_SUM
8655 && !memory_address_addr_space_p (DECL_MODE (exp),
8656 XEXP (decl_rtl, 0),
8657 MEM_ADDR_SPACE (decl_rtl)))
8658 temp = replace_equiv_address (decl_rtl,
8659 copy_rtx (XEXP (decl_rtl, 0)));
8660 }
8661
8662 /* If we got something, return it. But first, set the alignment
8663 if the address is a register. */
8664 if (temp != 0)
8665 {
8666 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
8667 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
8668
8669 return temp;
8670 }
8671
8672 /* If the mode of DECL_RTL does not match that of the decl, it
8673 must be a promoted value. We return a SUBREG of the wanted mode,
8674 but mark it so that we know that it was already extended. */
8675 if (REG_P (decl_rtl) && GET_MODE (decl_rtl) != DECL_MODE (exp))
8676 {
8677 enum machine_mode pmode;
8678
8679 /* Get the signedness to be used for this variable. Ensure we get
8680 the same mode we got when the variable was declared. */
8681 if (code == SSA_NAME
8682 && (g = SSA_NAME_DEF_STMT (ssa_name))
8683 && gimple_code (g) == GIMPLE_CALL)
8684 {
8685 gcc_assert (!gimple_call_internal_p (g));
8686 pmode = promote_function_mode (type, mode, &unsignedp,
8687 gimple_call_fntype (g),
8688 2);
8689 }
8690 else
8691 pmode = promote_decl_mode (exp, &unsignedp);
8692 gcc_assert (GET_MODE (decl_rtl) == pmode);
8693
8694 temp = gen_lowpart_SUBREG (mode, decl_rtl);
8695 SUBREG_PROMOTED_VAR_P (temp) = 1;
8696 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
8697 return temp;
8698 }
8699
8700 return decl_rtl;
8701
8702 case INTEGER_CST:
8703 temp = immed_double_const (TREE_INT_CST_LOW (exp),
8704 TREE_INT_CST_HIGH (exp), mode);
8705
8706 return temp;
8707
8708 case VECTOR_CST:
8709 {
8710 tree tmp = NULL_TREE;
8711 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
8712 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
8713 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
8714 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
8715 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
8716 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
8717 return const_vector_from_tree (exp);
8718 if (GET_MODE_CLASS (mode) == MODE_INT)
8719 {
8720 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
8721 if (type_for_mode)
8722 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
8723 }
8724 if (!tmp)
8725 tmp = build_constructor_from_list (type,
8726 TREE_VECTOR_CST_ELTS (exp));
8727 return expand_expr (tmp, ignore ? const0_rtx : target,
8728 tmode, modifier);
8729 }
8730
8731 case CONST_DECL:
8732 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
8733
8734 case REAL_CST:
8735 /* If optimized, generate immediate CONST_DOUBLE
8736 which will be turned into memory by reload if necessary.
8737
8738 We used to force a register so that loop.c could see it. But
8739 this does not allow gen_* patterns to perform optimizations with
8740 the constants. It also produces two insns in cases like "x = 1.0;".
8741 On most machines, floating-point constants are not permitted in
8742 many insns, so we'd end up copying it to a register in any case.
8743
8744 Now, we do the copying in expand_binop, if appropriate. */
8745 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
8746 TYPE_MODE (TREE_TYPE (exp)));
8747
8748 case FIXED_CST:
8749 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
8750 TYPE_MODE (TREE_TYPE (exp)));
8751
8752 case COMPLEX_CST:
8753 /* Handle evaluating a complex constant in a CONCAT target. */
8754 if (original_target && GET_CODE (original_target) == CONCAT)
8755 {
8756 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
8757 rtx rtarg, itarg;
8758
8759 rtarg = XEXP (original_target, 0);
8760 itarg = XEXP (original_target, 1);
8761
8762 /* Move the real and imaginary parts separately. */
8763 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
8764 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
8765
8766 if (op0 != rtarg)
8767 emit_move_insn (rtarg, op0);
8768 if (op1 != itarg)
8769 emit_move_insn (itarg, op1);
8770
8771 return original_target;
8772 }
8773
8774 /* ... fall through ... */
8775
8776 case STRING_CST:
8777 temp = expand_expr_constant (exp, 1, modifier);
8778
8779 /* temp contains a constant address.
8780 On RISC machines where a constant address isn't valid,
8781 make some insns to get that address into a register. */
8782 if (modifier != EXPAND_CONST_ADDRESS
8783 && modifier != EXPAND_INITIALIZER
8784 && modifier != EXPAND_SUM
8785 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
8786 MEM_ADDR_SPACE (temp)))
8787 return replace_equiv_address (temp,
8788 copy_rtx (XEXP (temp, 0)));
8789 return temp;
8790
8791 case SAVE_EXPR:
8792 {
8793 tree val = treeop0;
8794 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
8795
8796 if (!SAVE_EXPR_RESOLVED_P (exp))
8797 {
8798 /* We can indeed still hit this case, typically via builtin
8799 expanders calling save_expr immediately before expanding
8800 something. Assume this means that we only have to deal
8801 with non-BLKmode values. */
8802 gcc_assert (GET_MODE (ret) != BLKmode);
8803
8804 val = build_decl (EXPR_LOCATION (exp),
8805 VAR_DECL, NULL, TREE_TYPE (exp));
8806 DECL_ARTIFICIAL (val) = 1;
8807 DECL_IGNORED_P (val) = 1;
8808 treeop0 = val;
8809 TREE_OPERAND (exp, 0) = treeop0;
8810 SAVE_EXPR_RESOLVED_P (exp) = 1;
8811
8812 if (!CONSTANT_P (ret))
8813 ret = copy_to_reg (ret);
8814 SET_DECL_RTL (val, ret);
8815 }
8816
8817 return ret;
8818 }
8819
8820
8821 case CONSTRUCTOR:
8822 /* If we don't need the result, just ensure we evaluate any
8823 subexpressions. */
8824 if (ignore)
8825 {
8826 unsigned HOST_WIDE_INT idx;
8827 tree value;
8828
8829 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
8830 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
8831
8832 return const0_rtx;
8833 }
8834
8835 return expand_constructor (exp, target, modifier, false);
8836
8837 case TARGET_MEM_REF:
8838 {
8839 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
8840 struct mem_address addr;
8841 enum insn_code icode;
8842 int align;
8843
8844 get_address_description (exp, &addr);
8845 op0 = addr_for_mem_ref (&addr, as, true);
8846 op0 = memory_address_addr_space (mode, op0, as);
8847 temp = gen_rtx_MEM (mode, op0);
8848 set_mem_attributes (temp, exp, 0);
8849 set_mem_addr_space (temp, as);
8850 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)),
8851 get_object_alignment (exp, BIGGEST_ALIGNMENT));
8852 if (mode != BLKmode
8853 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
8854 /* If the target does not have special handling for unaligned
8855 loads of mode then it can use regular moves for them. */
8856 && ((icode = optab_handler (movmisalign_optab, mode))
8857 != CODE_FOR_nothing))
8858 {
8859 struct expand_operand ops[2];
8860
8861 /* We've already validated the memory, and we're creating a
8862 new pseudo destination. The predicates really can't fail,
8863 nor can the generator. */
8864 create_output_operand (&ops[0], NULL_RTX, mode);
8865 create_fixed_operand (&ops[1], temp);
8866 expand_insn (icode, 2, ops);
8867 return ops[0].value;
8868 }
8869 return temp;
8870 }
8871
8872 case MEM_REF:
8873 {
8874 addr_space_t as
8875 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1))));
8876 enum machine_mode address_mode;
8877 tree base = TREE_OPERAND (exp, 0);
8878 gimple def_stmt;
8879 enum insn_code icode;
8880 int align;
8881 /* Handle expansion of non-aliased memory with non-BLKmode. That
8882 might end up in a register. */
8883 if (TREE_CODE (base) == ADDR_EXPR)
8884 {
8885 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
8886 tree bit_offset;
8887 base = TREE_OPERAND (base, 0);
8888 if (!DECL_P (base))
8889 {
8890 HOST_WIDE_INT off;
8891 base = get_addr_base_and_unit_offset (base, &off);
8892 gcc_assert (base);
8893 offset += off;
8894 }
8895 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
8896 decl we must use bitfield operations. */
8897 if (DECL_P (base)
8898 && !TREE_ADDRESSABLE (base)
8899 && DECL_MODE (base) != BLKmode
8900 && DECL_RTL_SET_P (base)
8901 && !MEM_P (DECL_RTL (base)))
8902 {
8903 tree bftype;
8904 if (offset == 0
8905 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
8906 && (GET_MODE_BITSIZE (DECL_MODE (base))
8907 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
8908 return expand_expr (build1 (VIEW_CONVERT_EXPR,
8909 TREE_TYPE (exp), base),
8910 target, tmode, modifier);
8911 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
8912 bftype = TREE_TYPE (base);
8913 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
8914 bftype = TREE_TYPE (exp);
8915 return expand_expr (build3 (BIT_FIELD_REF, bftype,
8916 base,
8917 TYPE_SIZE (TREE_TYPE (exp)),
8918 bit_offset),
8919 target, tmode, modifier);
8920 }
8921 }
8922 address_mode = targetm.addr_space.address_mode (as);
8923 base = TREE_OPERAND (exp, 0);
8924 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
8925 {
8926 tree mask = gimple_assign_rhs2 (def_stmt);
8927 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
8928 gimple_assign_rhs1 (def_stmt), mask);
8929 TREE_OPERAND (exp, 0) = base;
8930 }
8931 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)),
8932 get_object_alignment (exp, BIGGEST_ALIGNMENT));
8933 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
8934 op0 = memory_address_addr_space (address_mode, op0, as);
8935 if (!integer_zerop (TREE_OPERAND (exp, 1)))
8936 {
8937 rtx off
8938 = immed_double_int_const (mem_ref_offset (exp), address_mode);
8939 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
8940 }
8941 op0 = memory_address_addr_space (mode, op0, as);
8942 temp = gen_rtx_MEM (mode, op0);
8943 set_mem_attributes (temp, exp, 0);
8944 set_mem_addr_space (temp, as);
8945 if (TREE_THIS_VOLATILE (exp))
8946 MEM_VOLATILE_P (temp) = 1;
8947 if (mode != BLKmode
8948 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
8949 /* If the target does not have special handling for unaligned
8950 loads of mode then it can use regular moves for them. */
8951 && ((icode = optab_handler (movmisalign_optab, mode))
8952 != CODE_FOR_nothing))
8953 {
8954 struct expand_operand ops[2];
8955
8956 /* We've already validated the memory, and we're creating a
8957 new pseudo destination. The predicates really can't fail,
8958 nor can the generator. */
8959 create_output_operand (&ops[0], NULL_RTX, mode);
8960 create_fixed_operand (&ops[1], temp);
8961 expand_insn (icode, 2, ops);
8962 return ops[0].value;
8963 }
8964 return temp;
8965 }
8966
8967 case ARRAY_REF:
8968
8969 {
8970 tree array = treeop0;
8971 tree index = treeop1;
8972
8973 /* Fold an expression like: "foo"[2].
8974 This is not done in fold so it won't happen inside &.
8975 Don't fold if this is for wide characters since it's too
8976 difficult to do correctly and this is a very rare case. */
8977
8978 if (modifier != EXPAND_CONST_ADDRESS
8979 && modifier != EXPAND_INITIALIZER
8980 && modifier != EXPAND_MEMORY)
8981 {
8982 tree t = fold_read_from_constant_string (exp);
8983
8984 if (t)
8985 return expand_expr (t, target, tmode, modifier);
8986 }
8987
8988 /* If this is a constant index into a constant array,
8989 just get the value from the array. Handle both the cases when
8990 we have an explicit constructor and when our operand is a variable
8991 that was declared const. */
8992
8993 if (modifier != EXPAND_CONST_ADDRESS
8994 && modifier != EXPAND_INITIALIZER
8995 && modifier != EXPAND_MEMORY
8996 && TREE_CODE (array) == CONSTRUCTOR
8997 && ! TREE_SIDE_EFFECTS (array)
8998 && TREE_CODE (index) == INTEGER_CST)
8999 {
9000 unsigned HOST_WIDE_INT ix;
9001 tree field, value;
9002
9003 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9004 field, value)
9005 if (tree_int_cst_equal (field, index))
9006 {
9007 if (!TREE_SIDE_EFFECTS (value))
9008 return expand_expr (fold (value), target, tmode, modifier);
9009 break;
9010 }
9011 }
9012
9013 else if (optimize >= 1
9014 && modifier != EXPAND_CONST_ADDRESS
9015 && modifier != EXPAND_INITIALIZER
9016 && modifier != EXPAND_MEMORY
9017 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9018 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9019 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9020 && const_value_known_p (array))
9021 {
9022 if (TREE_CODE (index) == INTEGER_CST)
9023 {
9024 tree init = DECL_INITIAL (array);
9025
9026 if (TREE_CODE (init) == CONSTRUCTOR)
9027 {
9028 unsigned HOST_WIDE_INT ix;
9029 tree field, value;
9030
9031 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9032 field, value)
9033 if (tree_int_cst_equal (field, index))
9034 {
9035 if (TREE_SIDE_EFFECTS (value))
9036 break;
9037
9038 if (TREE_CODE (value) == CONSTRUCTOR)
9039 {
9040 /* If VALUE is a CONSTRUCTOR, this
9041 optimization is only useful if
9042 this doesn't store the CONSTRUCTOR
9043 into memory. If it does, it is more
9044 efficient to just load the data from
9045 the array directly. */
9046 rtx ret = expand_constructor (value, target,
9047 modifier, true);
9048 if (ret == NULL_RTX)
9049 break;
9050 }
9051
9052 return expand_expr (fold (value), target, tmode,
9053 modifier);
9054 }
9055 }
9056 else if(TREE_CODE (init) == STRING_CST)
9057 {
9058 tree index1 = index;
9059 tree low_bound = array_ref_low_bound (exp);
9060 index1 = fold_convert_loc (loc, sizetype,
9061 treeop1);
9062
9063 /* Optimize the special-case of a zero lower bound.
9064
9065 We convert the low_bound to sizetype to avoid some problems
9066 with constant folding. (E.g. suppose the lower bound is 1,
9067 and its mode is QI. Without the conversion,l (ARRAY
9068 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9069 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9070
9071 if (! integer_zerop (low_bound))
9072 index1 = size_diffop_loc (loc, index1,
9073 fold_convert_loc (loc, sizetype,
9074 low_bound));
9075
9076 if (0 > compare_tree_int (index1,
9077 TREE_STRING_LENGTH (init)))
9078 {
9079 tree type = TREE_TYPE (TREE_TYPE (init));
9080 enum machine_mode mode = TYPE_MODE (type);
9081
9082 if (GET_MODE_CLASS (mode) == MODE_INT
9083 && GET_MODE_SIZE (mode) == 1)
9084 return gen_int_mode (TREE_STRING_POINTER (init)
9085 [TREE_INT_CST_LOW (index1)],
9086 mode);
9087 }
9088 }
9089 }
9090 }
9091 }
9092 goto normal_inner_ref;
9093
9094 case COMPONENT_REF:
9095 /* If the operand is a CONSTRUCTOR, we can just extract the
9096 appropriate field if it is present. */
9097 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9098 {
9099 unsigned HOST_WIDE_INT idx;
9100 tree field, value;
9101
9102 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9103 idx, field, value)
9104 if (field == treeop1
9105 /* We can normally use the value of the field in the
9106 CONSTRUCTOR. However, if this is a bitfield in
9107 an integral mode that we can fit in a HOST_WIDE_INT,
9108 we must mask only the number of bits in the bitfield,
9109 since this is done implicitly by the constructor. If
9110 the bitfield does not meet either of those conditions,
9111 we can't do this optimization. */
9112 && (! DECL_BIT_FIELD (field)
9113 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9114 && (GET_MODE_PRECISION (DECL_MODE (field))
9115 <= HOST_BITS_PER_WIDE_INT))))
9116 {
9117 if (DECL_BIT_FIELD (field)
9118 && modifier == EXPAND_STACK_PARM)
9119 target = 0;
9120 op0 = expand_expr (value, target, tmode, modifier);
9121 if (DECL_BIT_FIELD (field))
9122 {
9123 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9124 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9125
9126 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9127 {
9128 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9129 op0 = expand_and (imode, op0, op1, target);
9130 }
9131 else
9132 {
9133 int count = GET_MODE_PRECISION (imode) - bitsize;
9134
9135 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9136 target, 0);
9137 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9138 target, 0);
9139 }
9140 }
9141
9142 return op0;
9143 }
9144 }
9145 goto normal_inner_ref;
9146
9147 case BIT_FIELD_REF:
9148 case ARRAY_RANGE_REF:
9149 normal_inner_ref:
9150 {
9151 enum machine_mode mode1, mode2;
9152 HOST_WIDE_INT bitsize, bitpos;
9153 tree offset;
9154 int volatilep = 0, must_force_mem;
9155 bool packedp = false;
9156 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9157 &mode1, &unsignedp, &volatilep, true);
9158 rtx orig_op0, memloc;
9159
9160 /* If we got back the original object, something is wrong. Perhaps
9161 we are evaluating an expression too early. In any event, don't
9162 infinitely recurse. */
9163 gcc_assert (tem != exp);
9164
9165 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9166 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9167 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9168 packedp = true;
9169
9170 /* If TEM's type is a union of variable size, pass TARGET to the inner
9171 computation, since it will need a temporary and TARGET is known
9172 to have to do. This occurs in unchecked conversion in Ada. */
9173 orig_op0 = op0
9174 = expand_expr (tem,
9175 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9176 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9177 != INTEGER_CST)
9178 && modifier != EXPAND_STACK_PARM
9179 ? target : NULL_RTX),
9180 VOIDmode,
9181 (modifier == EXPAND_INITIALIZER
9182 || modifier == EXPAND_CONST_ADDRESS
9183 || modifier == EXPAND_STACK_PARM)
9184 ? modifier : EXPAND_NORMAL);
9185
9186
9187 /* If the bitfield is volatile, we want to access it in the
9188 field's mode, not the computed mode.
9189 If a MEM has VOIDmode (external with incomplete type),
9190 use BLKmode for it instead. */
9191 if (MEM_P (op0))
9192 {
9193 if (volatilep && flag_strict_volatile_bitfields > 0)
9194 op0 = adjust_address (op0, mode1, 0);
9195 else if (GET_MODE (op0) == VOIDmode)
9196 op0 = adjust_address (op0, BLKmode, 0);
9197 }
9198
9199 mode2
9200 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9201
9202 /* If we have either an offset, a BLKmode result, or a reference
9203 outside the underlying object, we must force it to memory.
9204 Such a case can occur in Ada if we have unchecked conversion
9205 of an expression from a scalar type to an aggregate type or
9206 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9207 passed a partially uninitialized object or a view-conversion
9208 to a larger size. */
9209 must_force_mem = (offset
9210 || mode1 == BLKmode
9211 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9212
9213 /* Handle CONCAT first. */
9214 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9215 {
9216 if (bitpos == 0
9217 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9218 return op0;
9219 if (bitpos == 0
9220 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9221 && bitsize)
9222 {
9223 op0 = XEXP (op0, 0);
9224 mode2 = GET_MODE (op0);
9225 }
9226 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9227 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9228 && bitpos
9229 && bitsize)
9230 {
9231 op0 = XEXP (op0, 1);
9232 bitpos = 0;
9233 mode2 = GET_MODE (op0);
9234 }
9235 else
9236 /* Otherwise force into memory. */
9237 must_force_mem = 1;
9238 }
9239
9240 /* If this is a constant, put it in a register if it is a legitimate
9241 constant and we don't need a memory reference. */
9242 if (CONSTANT_P (op0)
9243 && mode2 != BLKmode
9244 && targetm.legitimate_constant_p (mode2, op0)
9245 && !must_force_mem)
9246 op0 = force_reg (mode2, op0);
9247
9248 /* Otherwise, if this is a constant, try to force it to the constant
9249 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9250 is a legitimate constant. */
9251 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9252 op0 = validize_mem (memloc);
9253
9254 /* Otherwise, if this is a constant or the object is not in memory
9255 and need be, put it there. */
9256 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9257 {
9258 tree nt = build_qualified_type (TREE_TYPE (tem),
9259 (TYPE_QUALS (TREE_TYPE (tem))
9260 | TYPE_QUAL_CONST));
9261 memloc = assign_temp (nt, 1, 1, 1);
9262 emit_move_insn (memloc, op0);
9263 op0 = memloc;
9264 }
9265
9266 if (offset)
9267 {
9268 enum machine_mode address_mode;
9269 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9270 EXPAND_SUM);
9271
9272 gcc_assert (MEM_P (op0));
9273
9274 address_mode
9275 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9276 if (GET_MODE (offset_rtx) != address_mode)
9277 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9278
9279 if (GET_MODE (op0) == BLKmode
9280 /* A constant address in OP0 can have VOIDmode, we must
9281 not try to call force_reg in that case. */
9282 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9283 && bitsize != 0
9284 && (bitpos % bitsize) == 0
9285 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9286 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9287 {
9288 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9289 bitpos = 0;
9290 }
9291
9292 op0 = offset_address (op0, offset_rtx,
9293 highest_pow2_factor (offset));
9294 }
9295
9296 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9297 record its alignment as BIGGEST_ALIGNMENT. */
9298 if (MEM_P (op0) && bitpos == 0 && offset != 0
9299 && is_aligning_offset (offset, tem))
9300 set_mem_align (op0, BIGGEST_ALIGNMENT);
9301
9302 /* Don't forget about volatility even if this is a bitfield. */
9303 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9304 {
9305 if (op0 == orig_op0)
9306 op0 = copy_rtx (op0);
9307
9308 MEM_VOLATILE_P (op0) = 1;
9309 }
9310
9311 /* In cases where an aligned union has an unaligned object
9312 as a field, we might be extracting a BLKmode value from
9313 an integer-mode (e.g., SImode) object. Handle this case
9314 by doing the extract into an object as wide as the field
9315 (which we know to be the width of a basic mode), then
9316 storing into memory, and changing the mode to BLKmode. */
9317 if (mode1 == VOIDmode
9318 || REG_P (op0) || GET_CODE (op0) == SUBREG
9319 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9320 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9321 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9322 && modifier != EXPAND_CONST_ADDRESS
9323 && modifier != EXPAND_INITIALIZER)
9324 /* If the field is volatile, we always want an aligned
9325 access. Only do this if the access is not already naturally
9326 aligned, otherwise "normal" (non-bitfield) volatile fields
9327 become non-addressable. */
9328 || (volatilep && flag_strict_volatile_bitfields > 0
9329 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0))
9330 /* If the field isn't aligned enough to fetch as a memref,
9331 fetch it as a bit field. */
9332 || (mode1 != BLKmode
9333 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9334 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9335 || (MEM_P (op0)
9336 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9337 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9338 && ((modifier == EXPAND_CONST_ADDRESS
9339 || modifier == EXPAND_INITIALIZER)
9340 ? STRICT_ALIGNMENT
9341 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9342 || (bitpos % BITS_PER_UNIT != 0)))
9343 /* If the type and the field are a constant size and the
9344 size of the type isn't the same size as the bitfield,
9345 we must use bitfield operations. */
9346 || (bitsize >= 0
9347 && TYPE_SIZE (TREE_TYPE (exp))
9348 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9349 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9350 bitsize)))
9351 {
9352 enum machine_mode ext_mode = mode;
9353
9354 if (ext_mode == BLKmode
9355 && ! (target != 0 && MEM_P (op0)
9356 && MEM_P (target)
9357 && bitpos % BITS_PER_UNIT == 0))
9358 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9359
9360 if (ext_mode == BLKmode)
9361 {
9362 if (target == 0)
9363 target = assign_temp (type, 0, 1, 1);
9364
9365 if (bitsize == 0)
9366 return target;
9367
9368 /* In this case, BITPOS must start at a byte boundary and
9369 TARGET, if specified, must be a MEM. */
9370 gcc_assert (MEM_P (op0)
9371 && (!target || MEM_P (target))
9372 && !(bitpos % BITS_PER_UNIT));
9373
9374 emit_block_move (target,
9375 adjust_address (op0, VOIDmode,
9376 bitpos / BITS_PER_UNIT),
9377 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9378 / BITS_PER_UNIT),
9379 (modifier == EXPAND_STACK_PARM
9380 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9381
9382 return target;
9383 }
9384
9385 op0 = validize_mem (op0);
9386
9387 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9388 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9389
9390 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
9391 (modifier == EXPAND_STACK_PARM
9392 ? NULL_RTX : target),
9393 ext_mode, ext_mode);
9394
9395 /* If the result is a record type and BITSIZE is narrower than
9396 the mode of OP0, an integral mode, and this is a big endian
9397 machine, we must put the field into the high-order bits. */
9398 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
9399 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
9400 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
9401 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
9402 GET_MODE_BITSIZE (GET_MODE (op0))
9403 - bitsize, op0, 1);
9404
9405 /* If the result type is BLKmode, store the data into a temporary
9406 of the appropriate type, but with the mode corresponding to the
9407 mode for the data we have (op0's mode). It's tempting to make
9408 this a constant type, since we know it's only being stored once,
9409 but that can cause problems if we are taking the address of this
9410 COMPONENT_REF because the MEM of any reference via that address
9411 will have flags corresponding to the type, which will not
9412 necessarily be constant. */
9413 if (mode == BLKmode)
9414 {
9415 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
9416 rtx new_rtx;
9417
9418 /* If the reference doesn't use the alias set of its type,
9419 we cannot create the temporary using that type. */
9420 if (component_uses_parent_alias_set (exp))
9421 {
9422 new_rtx = assign_stack_local (ext_mode, size, 0);
9423 set_mem_alias_set (new_rtx, get_alias_set (exp));
9424 }
9425 else
9426 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
9427
9428 emit_move_insn (new_rtx, op0);
9429 op0 = copy_rtx (new_rtx);
9430 PUT_MODE (op0, BLKmode);
9431 set_mem_attributes (op0, exp, 1);
9432 }
9433
9434 return op0;
9435 }
9436
9437 /* If the result is BLKmode, use that to access the object
9438 now as well. */
9439 if (mode == BLKmode)
9440 mode1 = BLKmode;
9441
9442 /* Get a reference to just this component. */
9443 if (modifier == EXPAND_CONST_ADDRESS
9444 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
9445 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
9446 else
9447 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9448
9449 if (op0 == orig_op0)
9450 op0 = copy_rtx (op0);
9451
9452 set_mem_attributes (op0, exp, 0);
9453 if (REG_P (XEXP (op0, 0)))
9454 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9455
9456 MEM_VOLATILE_P (op0) |= volatilep;
9457 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
9458 || modifier == EXPAND_CONST_ADDRESS
9459 || modifier == EXPAND_INITIALIZER)
9460 return op0;
9461 else if (target == 0)
9462 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9463
9464 convert_move (target, op0, unsignedp);
9465 return target;
9466 }
9467
9468 case OBJ_TYPE_REF:
9469 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
9470
9471 case CALL_EXPR:
9472 /* All valid uses of __builtin_va_arg_pack () are removed during
9473 inlining. */
9474 if (CALL_EXPR_VA_ARG_PACK (exp))
9475 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
9476 {
9477 tree fndecl = get_callee_fndecl (exp), attr;
9478
9479 if (fndecl
9480 && (attr = lookup_attribute ("error",
9481 DECL_ATTRIBUTES (fndecl))) != NULL)
9482 error ("%Kcall to %qs declared with attribute error: %s",
9483 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9484 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9485 if (fndecl
9486 && (attr = lookup_attribute ("warning",
9487 DECL_ATTRIBUTES (fndecl))) != NULL)
9488 warning_at (tree_nonartificial_location (exp),
9489 0, "%Kcall to %qs declared with attribute warning: %s",
9490 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9491 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9492
9493 /* Check for a built-in function. */
9494 if (fndecl && DECL_BUILT_IN (fndecl))
9495 {
9496 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
9497 return expand_builtin (exp, target, subtarget, tmode, ignore);
9498 }
9499 }
9500 return expand_call (exp, target, ignore);
9501
9502 case VIEW_CONVERT_EXPR:
9503 op0 = NULL_RTX;
9504
9505 /* If we are converting to BLKmode, try to avoid an intermediate
9506 temporary by fetching an inner memory reference. */
9507 if (mode == BLKmode
9508 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9509 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
9510 && handled_component_p (treeop0))
9511 {
9512 enum machine_mode mode1;
9513 HOST_WIDE_INT bitsize, bitpos;
9514 tree offset;
9515 int unsignedp;
9516 int volatilep = 0;
9517 tree tem
9518 = get_inner_reference (treeop0, &bitsize, &bitpos,
9519 &offset, &mode1, &unsignedp, &volatilep,
9520 true);
9521 rtx orig_op0;
9522
9523 /* ??? We should work harder and deal with non-zero offsets. */
9524 if (!offset
9525 && (bitpos % BITS_PER_UNIT) == 0
9526 && bitsize >= 0
9527 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
9528 {
9529 /* See the normal_inner_ref case for the rationale. */
9530 orig_op0
9531 = expand_expr (tem,
9532 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9533 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9534 != INTEGER_CST)
9535 && modifier != EXPAND_STACK_PARM
9536 ? target : NULL_RTX),
9537 VOIDmode,
9538 (modifier == EXPAND_INITIALIZER
9539 || modifier == EXPAND_CONST_ADDRESS
9540 || modifier == EXPAND_STACK_PARM)
9541 ? modifier : EXPAND_NORMAL);
9542
9543 if (MEM_P (orig_op0))
9544 {
9545 op0 = orig_op0;
9546
9547 /* Get a reference to just this component. */
9548 if (modifier == EXPAND_CONST_ADDRESS
9549 || modifier == EXPAND_SUM
9550 || modifier == EXPAND_INITIALIZER)
9551 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
9552 else
9553 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
9554
9555 if (op0 == orig_op0)
9556 op0 = copy_rtx (op0);
9557
9558 set_mem_attributes (op0, treeop0, 0);
9559 if (REG_P (XEXP (op0, 0)))
9560 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9561
9562 MEM_VOLATILE_P (op0) |= volatilep;
9563 }
9564 }
9565 }
9566
9567 if (!op0)
9568 op0 = expand_expr (treeop0,
9569 NULL_RTX, VOIDmode, modifier);
9570
9571 /* If the input and output modes are both the same, we are done. */
9572 if (mode == GET_MODE (op0))
9573 ;
9574 /* If neither mode is BLKmode, and both modes are the same size
9575 then we can use gen_lowpart. */
9576 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
9577 && (GET_MODE_PRECISION (mode)
9578 == GET_MODE_PRECISION (GET_MODE (op0)))
9579 && !COMPLEX_MODE_P (GET_MODE (op0)))
9580 {
9581 if (GET_CODE (op0) == SUBREG)
9582 op0 = force_reg (GET_MODE (op0), op0);
9583 temp = gen_lowpart_common (mode, op0);
9584 if (temp)
9585 op0 = temp;
9586 else
9587 {
9588 if (!REG_P (op0) && !MEM_P (op0))
9589 op0 = force_reg (GET_MODE (op0), op0);
9590 op0 = gen_lowpart (mode, op0);
9591 }
9592 }
9593 /* If both types are integral, convert from one mode to the other. */
9594 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
9595 op0 = convert_modes (mode, GET_MODE (op0), op0,
9596 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9597 /* As a last resort, spill op0 to memory, and reload it in a
9598 different mode. */
9599 else if (!MEM_P (op0))
9600 {
9601 /* If the operand is not a MEM, force it into memory. Since we
9602 are going to be changing the mode of the MEM, don't call
9603 force_const_mem for constants because we don't allow pool
9604 constants to change mode. */
9605 tree inner_type = TREE_TYPE (treeop0);
9606
9607 gcc_assert (!TREE_ADDRESSABLE (exp));
9608
9609 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
9610 target
9611 = assign_stack_temp_for_type
9612 (TYPE_MODE (inner_type),
9613 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
9614
9615 emit_move_insn (target, op0);
9616 op0 = target;
9617 }
9618
9619 /* At this point, OP0 is in the correct mode. If the output type is
9620 such that the operand is known to be aligned, indicate that it is.
9621 Otherwise, we need only be concerned about alignment for non-BLKmode
9622 results. */
9623 if (MEM_P (op0))
9624 {
9625 op0 = copy_rtx (op0);
9626
9627 if (TYPE_ALIGN_OK (type))
9628 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
9629 else if (STRICT_ALIGNMENT
9630 && mode != BLKmode
9631 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
9632 {
9633 tree inner_type = TREE_TYPE (treeop0);
9634 HOST_WIDE_INT temp_size
9635 = MAX (int_size_in_bytes (inner_type),
9636 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
9637 rtx new_rtx
9638 = assign_stack_temp_for_type (mode, temp_size, 0, type);
9639 rtx new_with_op0_mode
9640 = adjust_address (new_rtx, GET_MODE (op0), 0);
9641
9642 gcc_assert (!TREE_ADDRESSABLE (exp));
9643
9644 if (GET_MODE (op0) == BLKmode)
9645 emit_block_move (new_with_op0_mode, op0,
9646 GEN_INT (GET_MODE_SIZE (mode)),
9647 (modifier == EXPAND_STACK_PARM
9648 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9649 else
9650 emit_move_insn (new_with_op0_mode, op0);
9651
9652 op0 = new_rtx;
9653 }
9654
9655 op0 = adjust_address (op0, mode, 0);
9656 }
9657
9658 return op0;
9659
9660 case COND_EXPR:
9661 /* A COND_EXPR with its type being VOID_TYPE represents a
9662 conditional jump and is handled in
9663 expand_gimple_cond_expr. */
9664 gcc_assert (!VOID_TYPE_P (type));
9665
9666 /* Note that COND_EXPRs whose type is a structure or union
9667 are required to be constructed to contain assignments of
9668 a temporary variable, so that we can evaluate them here
9669 for side effect only. If type is void, we must do likewise. */
9670
9671 gcc_assert (!TREE_ADDRESSABLE (type)
9672 && !ignore
9673 && TREE_TYPE (treeop1) != void_type_node
9674 && TREE_TYPE (treeop2) != void_type_node);
9675
9676 /* If we are not to produce a result, we have no target. Otherwise,
9677 if a target was specified use it; it will not be used as an
9678 intermediate target unless it is safe. If no target, use a
9679 temporary. */
9680
9681 if (modifier != EXPAND_STACK_PARM
9682 && original_target
9683 && safe_from_p (original_target, treeop0, 1)
9684 && GET_MODE (original_target) == mode
9685 #ifdef HAVE_conditional_move
9686 && (! can_conditionally_move_p (mode)
9687 || REG_P (original_target))
9688 #endif
9689 && !MEM_P (original_target))
9690 temp = original_target;
9691 else
9692 temp = assign_temp (type, 0, 0, 1);
9693
9694 do_pending_stack_adjust ();
9695 NO_DEFER_POP;
9696 op0 = gen_label_rtx ();
9697 op1 = gen_label_rtx ();
9698 jumpifnot (treeop0, op0, -1);
9699 store_expr (treeop1, temp,
9700 modifier == EXPAND_STACK_PARM,
9701 false);
9702
9703 emit_jump_insn (gen_jump (op1));
9704 emit_barrier ();
9705 emit_label (op0);
9706 store_expr (treeop2, temp,
9707 modifier == EXPAND_STACK_PARM,
9708 false);
9709
9710 emit_label (op1);
9711 OK_DEFER_POP;
9712 return temp;
9713
9714 case VEC_COND_EXPR:
9715 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9716 return target;
9717
9718 case MODIFY_EXPR:
9719 {
9720 tree lhs = treeop0;
9721 tree rhs = treeop1;
9722 gcc_assert (ignore);
9723
9724 /* Check for |= or &= of a bitfield of size one into another bitfield
9725 of size 1. In this case, (unless we need the result of the
9726 assignment) we can do this more efficiently with a
9727 test followed by an assignment, if necessary.
9728
9729 ??? At this point, we can't get a BIT_FIELD_REF here. But if
9730 things change so we do, this code should be enhanced to
9731 support it. */
9732 if (TREE_CODE (lhs) == COMPONENT_REF
9733 && (TREE_CODE (rhs) == BIT_IOR_EXPR
9734 || TREE_CODE (rhs) == BIT_AND_EXPR)
9735 && TREE_OPERAND (rhs, 0) == lhs
9736 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
9737 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
9738 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
9739 {
9740 rtx label = gen_label_rtx ();
9741 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
9742 do_jump (TREE_OPERAND (rhs, 1),
9743 value ? label : 0,
9744 value ? 0 : label, -1);
9745 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
9746 MOVE_NONTEMPORAL (exp));
9747 do_pending_stack_adjust ();
9748 emit_label (label);
9749 return const0_rtx;
9750 }
9751
9752 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
9753 return const0_rtx;
9754 }
9755
9756 case ADDR_EXPR:
9757 return expand_expr_addr_expr (exp, target, tmode, modifier);
9758
9759 case REALPART_EXPR:
9760 op0 = expand_normal (treeop0);
9761 return read_complex_part (op0, false);
9762
9763 case IMAGPART_EXPR:
9764 op0 = expand_normal (treeop0);
9765 return read_complex_part (op0, true);
9766
9767 case RETURN_EXPR:
9768 case LABEL_EXPR:
9769 case GOTO_EXPR:
9770 case SWITCH_EXPR:
9771 case ASM_EXPR:
9772 /* Expanded in cfgexpand.c. */
9773 gcc_unreachable ();
9774
9775 case TRY_CATCH_EXPR:
9776 case CATCH_EXPR:
9777 case EH_FILTER_EXPR:
9778 case TRY_FINALLY_EXPR:
9779 /* Lowered by tree-eh.c. */
9780 gcc_unreachable ();
9781
9782 case WITH_CLEANUP_EXPR:
9783 case CLEANUP_POINT_EXPR:
9784 case TARGET_EXPR:
9785 case CASE_LABEL_EXPR:
9786 case VA_ARG_EXPR:
9787 case BIND_EXPR:
9788 case INIT_EXPR:
9789 case CONJ_EXPR:
9790 case COMPOUND_EXPR:
9791 case PREINCREMENT_EXPR:
9792 case PREDECREMENT_EXPR:
9793 case POSTINCREMENT_EXPR:
9794 case POSTDECREMENT_EXPR:
9795 case LOOP_EXPR:
9796 case EXIT_EXPR:
9797 /* Lowered by gimplify.c. */
9798 gcc_unreachable ();
9799
9800 case FDESC_EXPR:
9801 /* Function descriptors are not valid except for as
9802 initialization constants, and should not be expanded. */
9803 gcc_unreachable ();
9804
9805 case WITH_SIZE_EXPR:
9806 /* WITH_SIZE_EXPR expands to its first argument. The caller should
9807 have pulled out the size to use in whatever context it needed. */
9808 return expand_expr_real (treeop0, original_target, tmode,
9809 modifier, alt_rtl);
9810
9811 case COMPOUND_LITERAL_EXPR:
9812 {
9813 /* Initialize the anonymous variable declared in the compound
9814 literal, then return the variable. */
9815 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
9816
9817 /* Create RTL for this variable. */
9818 if (!DECL_RTL_SET_P (decl))
9819 {
9820 if (DECL_HARD_REGISTER (decl))
9821 /* The user specified an assembler name for this variable.
9822 Set that up now. */
9823 rest_of_decl_compilation (decl, 0, 0);
9824 else
9825 expand_decl (decl);
9826 }
9827
9828 return expand_expr_real (decl, original_target, tmode,
9829 modifier, alt_rtl);
9830 }
9831
9832 default:
9833 return expand_expr_real_2 (&ops, target, tmode, modifier);
9834 }
9835 }
9836 \f
9837 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
9838 signedness of TYPE), possibly returning the result in TARGET. */
9839 static rtx
9840 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
9841 {
9842 HOST_WIDE_INT prec = TYPE_PRECISION (type);
9843 if (target && GET_MODE (target) != GET_MODE (exp))
9844 target = 0;
9845 /* For constant values, reduce using build_int_cst_type. */
9846 if (CONST_INT_P (exp))
9847 {
9848 HOST_WIDE_INT value = INTVAL (exp);
9849 tree t = build_int_cst_type (type, value);
9850 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
9851 }
9852 else if (TYPE_UNSIGNED (type))
9853 {
9854 rtx mask = immed_double_int_const (double_int_mask (prec),
9855 GET_MODE (exp));
9856 return expand_and (GET_MODE (exp), exp, mask, target);
9857 }
9858 else
9859 {
9860 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
9861 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
9862 exp, count, target, 0);
9863 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
9864 exp, count, target, 0);
9865 }
9866 }
9867 \f
9868 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
9869 when applied to the address of EXP produces an address known to be
9870 aligned more than BIGGEST_ALIGNMENT. */
9871
9872 static int
9873 is_aligning_offset (const_tree offset, const_tree exp)
9874 {
9875 /* Strip off any conversions. */
9876 while (CONVERT_EXPR_P (offset))
9877 offset = TREE_OPERAND (offset, 0);
9878
9879 /* We must now have a BIT_AND_EXPR with a constant that is one less than
9880 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
9881 if (TREE_CODE (offset) != BIT_AND_EXPR
9882 || !host_integerp (TREE_OPERAND (offset, 1), 1)
9883 || compare_tree_int (TREE_OPERAND (offset, 1),
9884 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
9885 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
9886 return 0;
9887
9888 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
9889 It must be NEGATE_EXPR. Then strip any more conversions. */
9890 offset = TREE_OPERAND (offset, 0);
9891 while (CONVERT_EXPR_P (offset))
9892 offset = TREE_OPERAND (offset, 0);
9893
9894 if (TREE_CODE (offset) != NEGATE_EXPR)
9895 return 0;
9896
9897 offset = TREE_OPERAND (offset, 0);
9898 while (CONVERT_EXPR_P (offset))
9899 offset = TREE_OPERAND (offset, 0);
9900
9901 /* This must now be the address of EXP. */
9902 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
9903 }
9904 \f
9905 /* Return the tree node if an ARG corresponds to a string constant or zero
9906 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
9907 in bytes within the string that ARG is accessing. The type of the
9908 offset will be `sizetype'. */
9909
9910 tree
9911 string_constant (tree arg, tree *ptr_offset)
9912 {
9913 tree array, offset, lower_bound;
9914 STRIP_NOPS (arg);
9915
9916 if (TREE_CODE (arg) == ADDR_EXPR)
9917 {
9918 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
9919 {
9920 *ptr_offset = size_zero_node;
9921 return TREE_OPERAND (arg, 0);
9922 }
9923 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
9924 {
9925 array = TREE_OPERAND (arg, 0);
9926 offset = size_zero_node;
9927 }
9928 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
9929 {
9930 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
9931 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
9932 if (TREE_CODE (array) != STRING_CST
9933 && TREE_CODE (array) != VAR_DECL)
9934 return 0;
9935
9936 /* Check if the array has a nonzero lower bound. */
9937 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
9938 if (!integer_zerop (lower_bound))
9939 {
9940 /* If the offset and base aren't both constants, return 0. */
9941 if (TREE_CODE (lower_bound) != INTEGER_CST)
9942 return 0;
9943 if (TREE_CODE (offset) != INTEGER_CST)
9944 return 0;
9945 /* Adjust offset by the lower bound. */
9946 offset = size_diffop (fold_convert (sizetype, offset),
9947 fold_convert (sizetype, lower_bound));
9948 }
9949 }
9950 else
9951 return 0;
9952 }
9953 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
9954 {
9955 tree arg0 = TREE_OPERAND (arg, 0);
9956 tree arg1 = TREE_OPERAND (arg, 1);
9957
9958 STRIP_NOPS (arg0);
9959 STRIP_NOPS (arg1);
9960
9961 if (TREE_CODE (arg0) == ADDR_EXPR
9962 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
9963 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
9964 {
9965 array = TREE_OPERAND (arg0, 0);
9966 offset = arg1;
9967 }
9968 else if (TREE_CODE (arg1) == ADDR_EXPR
9969 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
9970 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
9971 {
9972 array = TREE_OPERAND (arg1, 0);
9973 offset = arg0;
9974 }
9975 else
9976 return 0;
9977 }
9978 else
9979 return 0;
9980
9981 if (TREE_CODE (array) == STRING_CST)
9982 {
9983 *ptr_offset = fold_convert (sizetype, offset);
9984 return array;
9985 }
9986 else if (TREE_CODE (array) == VAR_DECL
9987 || TREE_CODE (array) == CONST_DECL)
9988 {
9989 int length;
9990
9991 /* Variables initialized to string literals can be handled too. */
9992 if (!const_value_known_p (array)
9993 || !DECL_INITIAL (array)
9994 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
9995 return 0;
9996
9997 /* Avoid const char foo[4] = "abcde"; */
9998 if (DECL_SIZE_UNIT (array) == NULL_TREE
9999 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10000 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10001 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10002 return 0;
10003
10004 /* If variable is bigger than the string literal, OFFSET must be constant
10005 and inside of the bounds of the string literal. */
10006 offset = fold_convert (sizetype, offset);
10007 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10008 && (! host_integerp (offset, 1)
10009 || compare_tree_int (offset, length) >= 0))
10010 return 0;
10011
10012 *ptr_offset = offset;
10013 return DECL_INITIAL (array);
10014 }
10015
10016 return 0;
10017 }
10018 \f
10019 /* Generate code to calculate OPS, and exploded expression
10020 using a store-flag instruction and return an rtx for the result.
10021 OPS reflects a comparison.
10022
10023 If TARGET is nonzero, store the result there if convenient.
10024
10025 Return zero if there is no suitable set-flag instruction
10026 available on this machine.
10027
10028 Once expand_expr has been called on the arguments of the comparison,
10029 we are committed to doing the store flag, since it is not safe to
10030 re-evaluate the expression. We emit the store-flag insn by calling
10031 emit_store_flag, but only expand the arguments if we have a reason
10032 to believe that emit_store_flag will be successful. If we think that
10033 it will, but it isn't, we have to simulate the store-flag with a
10034 set/jump/set sequence. */
10035
10036 static rtx
10037 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10038 {
10039 enum rtx_code code;
10040 tree arg0, arg1, type;
10041 tree tem;
10042 enum machine_mode operand_mode;
10043 int unsignedp;
10044 rtx op0, op1;
10045 rtx subtarget = target;
10046 location_t loc = ops->location;
10047
10048 arg0 = ops->op0;
10049 arg1 = ops->op1;
10050
10051 /* Don't crash if the comparison was erroneous. */
10052 if (arg0 == error_mark_node || arg1 == error_mark_node)
10053 return const0_rtx;
10054
10055 type = TREE_TYPE (arg0);
10056 operand_mode = TYPE_MODE (type);
10057 unsignedp = TYPE_UNSIGNED (type);
10058
10059 /* We won't bother with BLKmode store-flag operations because it would mean
10060 passing a lot of information to emit_store_flag. */
10061 if (operand_mode == BLKmode)
10062 return 0;
10063
10064 /* We won't bother with store-flag operations involving function pointers
10065 when function pointers must be canonicalized before comparisons. */
10066 #ifdef HAVE_canonicalize_funcptr_for_compare
10067 if (HAVE_canonicalize_funcptr_for_compare
10068 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10069 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10070 == FUNCTION_TYPE))
10071 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10072 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10073 == FUNCTION_TYPE))))
10074 return 0;
10075 #endif
10076
10077 STRIP_NOPS (arg0);
10078 STRIP_NOPS (arg1);
10079
10080 /* Get the rtx comparison code to use. We know that EXP is a comparison
10081 operation of some type. Some comparisons against 1 and -1 can be
10082 converted to comparisons with zero. Do so here so that the tests
10083 below will be aware that we have a comparison with zero. These
10084 tests will not catch constants in the first operand, but constants
10085 are rarely passed as the first operand. */
10086
10087 switch (ops->code)
10088 {
10089 case EQ_EXPR:
10090 code = EQ;
10091 break;
10092 case NE_EXPR:
10093 code = NE;
10094 break;
10095 case LT_EXPR:
10096 if (integer_onep (arg1))
10097 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10098 else
10099 code = unsignedp ? LTU : LT;
10100 break;
10101 case LE_EXPR:
10102 if (! unsignedp && integer_all_onesp (arg1))
10103 arg1 = integer_zero_node, code = LT;
10104 else
10105 code = unsignedp ? LEU : LE;
10106 break;
10107 case GT_EXPR:
10108 if (! unsignedp && integer_all_onesp (arg1))
10109 arg1 = integer_zero_node, code = GE;
10110 else
10111 code = unsignedp ? GTU : GT;
10112 break;
10113 case GE_EXPR:
10114 if (integer_onep (arg1))
10115 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10116 else
10117 code = unsignedp ? GEU : GE;
10118 break;
10119
10120 case UNORDERED_EXPR:
10121 code = UNORDERED;
10122 break;
10123 case ORDERED_EXPR:
10124 code = ORDERED;
10125 break;
10126 case UNLT_EXPR:
10127 code = UNLT;
10128 break;
10129 case UNLE_EXPR:
10130 code = UNLE;
10131 break;
10132 case UNGT_EXPR:
10133 code = UNGT;
10134 break;
10135 case UNGE_EXPR:
10136 code = UNGE;
10137 break;
10138 case UNEQ_EXPR:
10139 code = UNEQ;
10140 break;
10141 case LTGT_EXPR:
10142 code = LTGT;
10143 break;
10144
10145 default:
10146 gcc_unreachable ();
10147 }
10148
10149 /* Put a constant second. */
10150 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10151 || TREE_CODE (arg0) == FIXED_CST)
10152 {
10153 tem = arg0; arg0 = arg1; arg1 = tem;
10154 code = swap_condition (code);
10155 }
10156
10157 /* If this is an equality or inequality test of a single bit, we can
10158 do this by shifting the bit being tested to the low-order bit and
10159 masking the result with the constant 1. If the condition was EQ,
10160 we xor it with 1. This does not require an scc insn and is faster
10161 than an scc insn even if we have it.
10162
10163 The code to make this transformation was moved into fold_single_bit_test,
10164 so we just call into the folder and expand its result. */
10165
10166 if ((code == NE || code == EQ)
10167 && TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1)
10168 && integer_pow2p (TREE_OPERAND (arg0, 1))
10169 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10170 {
10171 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10172 return expand_expr (fold_single_bit_test (loc,
10173 code == NE ? NE_EXPR : EQ_EXPR,
10174 arg0, arg1, type),
10175 target, VOIDmode, EXPAND_NORMAL);
10176 }
10177
10178 if (! get_subtarget (target)
10179 || GET_MODE (subtarget) != operand_mode)
10180 subtarget = 0;
10181
10182 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10183
10184 if (target == 0)
10185 target = gen_reg_rtx (mode);
10186
10187 /* Try a cstore if possible. */
10188 return emit_store_flag_force (target, code, op0, op1,
10189 operand_mode, unsignedp,
10190 (TYPE_PRECISION (ops->type) == 1
10191 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10192 }
10193 \f
10194
10195 /* Stubs in case we haven't got a casesi insn. */
10196 #ifndef HAVE_casesi
10197 # define HAVE_casesi 0
10198 # define gen_casesi(a, b, c, d, e) (0)
10199 # define CODE_FOR_casesi CODE_FOR_nothing
10200 #endif
10201
10202 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10203 0 otherwise (i.e. if there is no casesi instruction). */
10204 int
10205 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10206 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10207 rtx fallback_label ATTRIBUTE_UNUSED)
10208 {
10209 struct expand_operand ops[5];
10210 enum machine_mode index_mode = SImode;
10211 int index_bits = GET_MODE_BITSIZE (index_mode);
10212 rtx op1, op2, index;
10213
10214 if (! HAVE_casesi)
10215 return 0;
10216
10217 /* Convert the index to SImode. */
10218 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10219 {
10220 enum machine_mode omode = TYPE_MODE (index_type);
10221 rtx rangertx = expand_normal (range);
10222
10223 /* We must handle the endpoints in the original mode. */
10224 index_expr = build2 (MINUS_EXPR, index_type,
10225 index_expr, minval);
10226 minval = integer_zero_node;
10227 index = expand_normal (index_expr);
10228 if (default_label)
10229 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10230 omode, 1, default_label);
10231 /* Now we can safely truncate. */
10232 index = convert_to_mode (index_mode, index, 0);
10233 }
10234 else
10235 {
10236 if (TYPE_MODE (index_type) != index_mode)
10237 {
10238 index_type = lang_hooks.types.type_for_size (index_bits, 0);
10239 index_expr = fold_convert (index_type, index_expr);
10240 }
10241
10242 index = expand_normal (index_expr);
10243 }
10244
10245 do_pending_stack_adjust ();
10246
10247 op1 = expand_normal (minval);
10248 op2 = expand_normal (range);
10249
10250 create_input_operand (&ops[0], index, index_mode);
10251 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10252 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10253 create_fixed_operand (&ops[3], table_label);
10254 create_fixed_operand (&ops[4], (default_label
10255 ? default_label
10256 : fallback_label));
10257 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10258 return 1;
10259 }
10260
10261 /* Attempt to generate a tablejump instruction; same concept. */
10262 #ifndef HAVE_tablejump
10263 #define HAVE_tablejump 0
10264 #define gen_tablejump(x, y) (0)
10265 #endif
10266
10267 /* Subroutine of the next function.
10268
10269 INDEX is the value being switched on, with the lowest value
10270 in the table already subtracted.
10271 MODE is its expected mode (needed if INDEX is constant).
10272 RANGE is the length of the jump table.
10273 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10274
10275 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10276 index value is out of range. */
10277
10278 static void
10279 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10280 rtx default_label)
10281 {
10282 rtx temp, vector;
10283
10284 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10285 cfun->cfg->max_jumptable_ents = INTVAL (range);
10286
10287 /* Do an unsigned comparison (in the proper mode) between the index
10288 expression and the value which represents the length of the range.
10289 Since we just finished subtracting the lower bound of the range
10290 from the index expression, this comparison allows us to simultaneously
10291 check that the original index expression value is both greater than
10292 or equal to the minimum value of the range and less than or equal to
10293 the maximum value of the range. */
10294
10295 if (default_label)
10296 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10297 default_label);
10298
10299 /* If index is in range, it must fit in Pmode.
10300 Convert to Pmode so we can index with it. */
10301 if (mode != Pmode)
10302 index = convert_to_mode (Pmode, index, 1);
10303
10304 /* Don't let a MEM slip through, because then INDEX that comes
10305 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10306 and break_out_memory_refs will go to work on it and mess it up. */
10307 #ifdef PIC_CASE_VECTOR_ADDRESS
10308 if (flag_pic && !REG_P (index))
10309 index = copy_to_mode_reg (Pmode, index);
10310 #endif
10311
10312 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10313 GET_MODE_SIZE, because this indicates how large insns are. The other
10314 uses should all be Pmode, because they are addresses. This code
10315 could fail if addresses and insns are not the same size. */
10316 index = gen_rtx_PLUS (Pmode,
10317 gen_rtx_MULT (Pmode, index,
10318 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10319 gen_rtx_LABEL_REF (Pmode, table_label));
10320 #ifdef PIC_CASE_VECTOR_ADDRESS
10321 if (flag_pic)
10322 index = PIC_CASE_VECTOR_ADDRESS (index);
10323 else
10324 #endif
10325 index = memory_address (CASE_VECTOR_MODE, index);
10326 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10327 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10328 convert_move (temp, vector, 0);
10329
10330 emit_jump_insn (gen_tablejump (temp, table_label));
10331
10332 /* If we are generating PIC code or if the table is PC-relative, the
10333 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10334 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10335 emit_barrier ();
10336 }
10337
10338 int
10339 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10340 rtx table_label, rtx default_label)
10341 {
10342 rtx index;
10343
10344 if (! HAVE_tablejump)
10345 return 0;
10346
10347 index_expr = fold_build2 (MINUS_EXPR, index_type,
10348 fold_convert (index_type, index_expr),
10349 fold_convert (index_type, minval));
10350 index = expand_normal (index_expr);
10351 do_pending_stack_adjust ();
10352
10353 do_tablejump (index, TYPE_MODE (index_type),
10354 convert_modes (TYPE_MODE (index_type),
10355 TYPE_MODE (TREE_TYPE (range)),
10356 expand_normal (range),
10357 TYPE_UNSIGNED (TREE_TYPE (range))),
10358 table_label, default_label);
10359 return 1;
10360 }
10361
10362 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10363 static rtx
10364 const_vector_from_tree (tree exp)
10365 {
10366 rtvec v;
10367 int units, i;
10368 tree link, elt;
10369 enum machine_mode inner, mode;
10370
10371 mode = TYPE_MODE (TREE_TYPE (exp));
10372
10373 if (initializer_zerop (exp))
10374 return CONST0_RTX (mode);
10375
10376 units = GET_MODE_NUNITS (mode);
10377 inner = GET_MODE_INNER (mode);
10378
10379 v = rtvec_alloc (units);
10380
10381 link = TREE_VECTOR_CST_ELTS (exp);
10382 for (i = 0; link; link = TREE_CHAIN (link), ++i)
10383 {
10384 elt = TREE_VALUE (link);
10385
10386 if (TREE_CODE (elt) == REAL_CST)
10387 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10388 inner);
10389 else if (TREE_CODE (elt) == FIXED_CST)
10390 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10391 inner);
10392 else
10393 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10394 inner);
10395 }
10396
10397 /* Initialize remaining elements to 0. */
10398 for (; i < units; ++i)
10399 RTVEC_ELT (v, i) = CONST0_RTX (inner);
10400
10401 return gen_rtx_CONST_VECTOR (mode, v);
10402 }
10403
10404 /* Build a decl for a personality function given a language prefix. */
10405
10406 tree
10407 build_personality_function (const char *lang)
10408 {
10409 const char *unwind_and_version;
10410 tree decl, type;
10411 char *name;
10412
10413 switch (targetm_common.except_unwind_info (&global_options))
10414 {
10415 case UI_NONE:
10416 return NULL;
10417 case UI_SJLJ:
10418 unwind_and_version = "_sj0";
10419 break;
10420 case UI_DWARF2:
10421 case UI_TARGET:
10422 unwind_and_version = "_v0";
10423 break;
10424 default:
10425 gcc_unreachable ();
10426 }
10427
10428 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
10429
10430 type = build_function_type_list (integer_type_node, integer_type_node,
10431 long_long_unsigned_type_node,
10432 ptr_type_node, ptr_type_node, NULL_TREE);
10433 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
10434 get_identifier (name), type);
10435 DECL_ARTIFICIAL (decl) = 1;
10436 DECL_EXTERNAL (decl) = 1;
10437 TREE_PUBLIC (decl) = 1;
10438
10439 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
10440 are the flags assigned by targetm.encode_section_info. */
10441 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
10442
10443 return decl;
10444 }
10445
10446 /* Extracts the personality function of DECL and returns the corresponding
10447 libfunc. */
10448
10449 rtx
10450 get_personality_function (tree decl)
10451 {
10452 tree personality = DECL_FUNCTION_PERSONALITY (decl);
10453 enum eh_personality_kind pk;
10454
10455 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
10456 if (pk == eh_personality_none)
10457 return NULL;
10458
10459 if (!personality
10460 && pk == eh_personality_any)
10461 personality = lang_hooks.eh_personality ();
10462
10463 if (pk == eh_personality_lang)
10464 gcc_assert (personality != NULL_TREE);
10465
10466 return XEXP (DECL_RTL (personality), 0);
10467 }
10468
10469 #include "gt-expr.h"