re PR target/52080 (Stores to bitfields introduce a store-data-race on adjacent data)
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
4 2012 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "common/common-target.h"
53 #include "timevar.h"
54 #include "df.h"
55 #include "diagnostic.h"
56 #include "ssaexpand.h"
57 #include "target-globals.h"
58 #include "params.h"
59
60 /* Decide whether a function's arguments should be processed
61 from first to last or from last to first.
62
63 They should if the stack and args grow in opposite directions, but
64 only if we have push insns. */
65
66 #ifdef PUSH_ROUNDING
67
68 #ifndef PUSH_ARGS_REVERSED
69 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
70 #define PUSH_ARGS_REVERSED /* If it's last to first. */
71 #endif
72 #endif
73
74 #endif
75
76 #ifndef STACK_PUSH_CODE
77 #ifdef STACK_GROWS_DOWNWARD
78 #define STACK_PUSH_CODE PRE_DEC
79 #else
80 #define STACK_PUSH_CODE PRE_INC
81 #endif
82 #endif
83
84
85 /* If this is nonzero, we do not bother generating VOLATILE
86 around volatile memory references, and we are willing to
87 output indirect addresses. If cse is to follow, we reject
88 indirect addresses so a useful potential cse is generated;
89 if it is used only once, instruction combination will produce
90 the same indirect address eventually. */
91 int cse_not_expected;
92
93 /* This structure is used by move_by_pieces to describe the move to
94 be performed. */
95 struct move_by_pieces_d
96 {
97 rtx to;
98 rtx to_addr;
99 int autinc_to;
100 int explicit_inc_to;
101 rtx from;
102 rtx from_addr;
103 int autinc_from;
104 int explicit_inc_from;
105 unsigned HOST_WIDE_INT len;
106 HOST_WIDE_INT offset;
107 int reverse;
108 };
109
110 /* This structure is used by store_by_pieces to describe the clear to
111 be performed. */
112
113 struct store_by_pieces_d
114 {
115 rtx to;
116 rtx to_addr;
117 int autinc_to;
118 int explicit_inc_to;
119 unsigned HOST_WIDE_INT len;
120 HOST_WIDE_INT offset;
121 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
122 void *constfundata;
123 int reverse;
124 };
125
126 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
127 struct move_by_pieces_d *);
128 static bool block_move_libcall_safe_for_call_parm (void);
129 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
130 static tree emit_block_move_libcall_fn (int);
131 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
132 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
133 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
134 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
135 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
136 struct store_by_pieces_d *);
137 static tree clear_storage_libcall_fn (int);
138 static rtx compress_float_constant (rtx, rtx);
139 static rtx get_subtarget (rtx);
140 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
141 HOST_WIDE_INT, enum machine_mode,
142 tree, tree, int, alias_set_type);
143 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
144 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
145 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
146 enum machine_mode,
147 tree, tree, alias_set_type, bool);
148
149 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
150
151 static int is_aligning_offset (const_tree, const_tree);
152 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
153 enum expand_modifier);
154 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
155 static rtx do_store_flag (sepops, rtx, enum machine_mode);
156 #ifdef PUSH_ROUNDING
157 static void emit_single_push_insn (enum machine_mode, rtx, tree);
158 #endif
159 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
160 static rtx const_vector_from_tree (tree);
161 static void write_complex_part (rtx, rtx, bool);
162
163 /* This macro is used to determine whether move_by_pieces should be called
164 to perform a structure copy. */
165 #ifndef MOVE_BY_PIECES_P
166 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
167 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
168 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
169 #endif
170
171 /* This macro is used to determine whether clear_by_pieces should be
172 called to clear storage. */
173 #ifndef CLEAR_BY_PIECES_P
174 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
175 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
176 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
177 #endif
178
179 /* This macro is used to determine whether store_by_pieces should be
180 called to "memset" storage with byte values other than zero. */
181 #ifndef SET_BY_PIECES_P
182 #define SET_BY_PIECES_P(SIZE, ALIGN) \
183 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
184 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
185 #endif
186
187 /* This macro is used to determine whether store_by_pieces should be
188 called to "memcpy" storage when the source is a constant string. */
189 #ifndef STORE_BY_PIECES_P
190 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
191 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
192 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
193 #endif
194
195 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
196
197 #ifndef SLOW_UNALIGNED_ACCESS
198 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
199 #endif
200 \f
201 /* This is run to set up which modes can be used
202 directly in memory and to initialize the block move optab. It is run
203 at the beginning of compilation and when the target is reinitialized. */
204
205 void
206 init_expr_target (void)
207 {
208 rtx insn, pat;
209 enum machine_mode mode;
210 int num_clobbers;
211 rtx mem, mem1;
212 rtx reg;
213
214 /* Try indexing by frame ptr and try by stack ptr.
215 It is known that on the Convex the stack ptr isn't a valid index.
216 With luck, one or the other is valid on any machine. */
217 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
218 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
219
220 /* A scratch register we can modify in-place below to avoid
221 useless RTL allocations. */
222 reg = gen_rtx_REG (VOIDmode, -1);
223
224 insn = rtx_alloc (INSN);
225 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
226 PATTERN (insn) = pat;
227
228 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
229 mode = (enum machine_mode) ((int) mode + 1))
230 {
231 int regno;
232
233 direct_load[(int) mode] = direct_store[(int) mode] = 0;
234 PUT_MODE (mem, mode);
235 PUT_MODE (mem1, mode);
236 PUT_MODE (reg, mode);
237
238 /* See if there is some register that can be used in this mode and
239 directly loaded or stored from memory. */
240
241 if (mode != VOIDmode && mode != BLKmode)
242 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
243 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
244 regno++)
245 {
246 if (! HARD_REGNO_MODE_OK (regno, mode))
247 continue;
248
249 SET_REGNO (reg, regno);
250
251 SET_SRC (pat) = mem;
252 SET_DEST (pat) = reg;
253 if (recog (pat, insn, &num_clobbers) >= 0)
254 direct_load[(int) mode] = 1;
255
256 SET_SRC (pat) = mem1;
257 SET_DEST (pat) = reg;
258 if (recog (pat, insn, &num_clobbers) >= 0)
259 direct_load[(int) mode] = 1;
260
261 SET_SRC (pat) = reg;
262 SET_DEST (pat) = mem;
263 if (recog (pat, insn, &num_clobbers) >= 0)
264 direct_store[(int) mode] = 1;
265
266 SET_SRC (pat) = reg;
267 SET_DEST (pat) = mem1;
268 if (recog (pat, insn, &num_clobbers) >= 0)
269 direct_store[(int) mode] = 1;
270 }
271 }
272
273 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
274
275 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
276 mode = GET_MODE_WIDER_MODE (mode))
277 {
278 enum machine_mode srcmode;
279 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
280 srcmode = GET_MODE_WIDER_MODE (srcmode))
281 {
282 enum insn_code ic;
283
284 ic = can_extend_p (mode, srcmode, 0);
285 if (ic == CODE_FOR_nothing)
286 continue;
287
288 PUT_MODE (mem, srcmode);
289
290 if (insn_operand_matches (ic, 1, mem))
291 float_extend_from_mem[mode][srcmode] = true;
292 }
293 }
294 }
295
296 /* This is run at the start of compiling a function. */
297
298 void
299 init_expr (void)
300 {
301 memset (&crtl->expr, 0, sizeof (crtl->expr));
302 }
303 \f
304 /* Copy data from FROM to TO, where the machine modes are not the same.
305 Both modes may be integer, or both may be floating, or both may be
306 fixed-point.
307 UNSIGNEDP should be nonzero if FROM is an unsigned type.
308 This causes zero-extension instead of sign-extension. */
309
310 void
311 convert_move (rtx to, rtx from, int unsignedp)
312 {
313 enum machine_mode to_mode = GET_MODE (to);
314 enum machine_mode from_mode = GET_MODE (from);
315 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
316 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
317 enum insn_code code;
318 rtx libcall;
319
320 /* rtx code for making an equivalent value. */
321 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
322 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
323
324
325 gcc_assert (to_real == from_real);
326 gcc_assert (to_mode != BLKmode);
327 gcc_assert (from_mode != BLKmode);
328
329 /* If the source and destination are already the same, then there's
330 nothing to do. */
331 if (to == from)
332 return;
333
334 /* If FROM is a SUBREG that indicates that we have already done at least
335 the required extension, strip it. We don't handle such SUBREGs as
336 TO here. */
337
338 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
339 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
340 >= GET_MODE_PRECISION (to_mode))
341 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
342 from = gen_lowpart (to_mode, from), from_mode = to_mode;
343
344 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
345
346 if (to_mode == from_mode
347 || (from_mode == VOIDmode && CONSTANT_P (from)))
348 {
349 emit_move_insn (to, from);
350 return;
351 }
352
353 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
354 {
355 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
356
357 if (VECTOR_MODE_P (to_mode))
358 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
359 else
360 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
361
362 emit_move_insn (to, from);
363 return;
364 }
365
366 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
367 {
368 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
369 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
370 return;
371 }
372
373 if (to_real)
374 {
375 rtx value, insns;
376 convert_optab tab;
377
378 gcc_assert ((GET_MODE_PRECISION (from_mode)
379 != GET_MODE_PRECISION (to_mode))
380 || (DECIMAL_FLOAT_MODE_P (from_mode)
381 != DECIMAL_FLOAT_MODE_P (to_mode)));
382
383 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
384 /* Conversion between decimal float and binary float, same size. */
385 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
386 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
387 tab = sext_optab;
388 else
389 tab = trunc_optab;
390
391 /* Try converting directly if the insn is supported. */
392
393 code = convert_optab_handler (tab, to_mode, from_mode);
394 if (code != CODE_FOR_nothing)
395 {
396 emit_unop_insn (code, to, from,
397 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
398 return;
399 }
400
401 /* Otherwise use a libcall. */
402 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
403
404 /* Is this conversion implemented yet? */
405 gcc_assert (libcall);
406
407 start_sequence ();
408 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
409 1, from, from_mode);
410 insns = get_insns ();
411 end_sequence ();
412 emit_libcall_block (insns, to, value,
413 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
414 from)
415 : gen_rtx_FLOAT_EXTEND (to_mode, from));
416 return;
417 }
418
419 /* Handle pointer conversion. */ /* SPEE 900220. */
420 /* Targets are expected to provide conversion insns between PxImode and
421 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
422 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
423 {
424 enum machine_mode full_mode
425 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
426
427 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
428 != CODE_FOR_nothing);
429
430 if (full_mode != from_mode)
431 from = convert_to_mode (full_mode, from, unsignedp);
432 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
433 to, from, UNKNOWN);
434 return;
435 }
436 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
437 {
438 rtx new_from;
439 enum machine_mode full_mode
440 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
441
442 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)
443 != CODE_FOR_nothing);
444
445 if (to_mode == full_mode)
446 {
447 emit_unop_insn (convert_optab_handler (sext_optab, full_mode,
448 from_mode),
449 to, from, UNKNOWN);
450 return;
451 }
452
453 new_from = gen_reg_rtx (full_mode);
454 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode),
455 new_from, from, UNKNOWN);
456
457 /* else proceed to integer conversions below. */
458 from_mode = full_mode;
459 from = new_from;
460 }
461
462 /* Make sure both are fixed-point modes or both are not. */
463 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
464 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
465 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
466 {
467 /* If we widen from_mode to to_mode and they are in the same class,
468 we won't saturate the result.
469 Otherwise, always saturate the result to play safe. */
470 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
471 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
472 expand_fixed_convert (to, from, 0, 0);
473 else
474 expand_fixed_convert (to, from, 0, 1);
475 return;
476 }
477
478 /* Now both modes are integers. */
479
480 /* Handle expanding beyond a word. */
481 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
482 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
483 {
484 rtx insns;
485 rtx lowpart;
486 rtx fill_value;
487 rtx lowfrom;
488 int i;
489 enum machine_mode lowpart_mode;
490 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
491
492 /* Try converting directly if the insn is supported. */
493 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
494 != CODE_FOR_nothing)
495 {
496 /* If FROM is a SUBREG, put it into a register. Do this
497 so that we always generate the same set of insns for
498 better cse'ing; if an intermediate assignment occurred,
499 we won't be doing the operation directly on the SUBREG. */
500 if (optimize > 0 && GET_CODE (from) == SUBREG)
501 from = force_reg (from_mode, from);
502 emit_unop_insn (code, to, from, equiv_code);
503 return;
504 }
505 /* Next, try converting via full word. */
506 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
507 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
508 != CODE_FOR_nothing))
509 {
510 rtx word_to = gen_reg_rtx (word_mode);
511 if (REG_P (to))
512 {
513 if (reg_overlap_mentioned_p (to, from))
514 from = force_reg (from_mode, from);
515 emit_clobber (to);
516 }
517 convert_move (word_to, from, unsignedp);
518 emit_unop_insn (code, to, word_to, equiv_code);
519 return;
520 }
521
522 /* No special multiword conversion insn; do it by hand. */
523 start_sequence ();
524
525 /* Since we will turn this into a no conflict block, we must ensure
526 that the source does not overlap the target. */
527
528 if (reg_overlap_mentioned_p (to, from))
529 from = force_reg (from_mode, from);
530
531 /* Get a copy of FROM widened to a word, if necessary. */
532 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
533 lowpart_mode = word_mode;
534 else
535 lowpart_mode = from_mode;
536
537 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
538
539 lowpart = gen_lowpart (lowpart_mode, to);
540 emit_move_insn (lowpart, lowfrom);
541
542 /* Compute the value to put in each remaining word. */
543 if (unsignedp)
544 fill_value = const0_rtx;
545 else
546 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
547 LT, lowfrom, const0_rtx,
548 VOIDmode, 0, -1);
549
550 /* Fill the remaining words. */
551 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
552 {
553 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
554 rtx subword = operand_subword (to, index, 1, to_mode);
555
556 gcc_assert (subword);
557
558 if (fill_value != subword)
559 emit_move_insn (subword, fill_value);
560 }
561
562 insns = get_insns ();
563 end_sequence ();
564
565 emit_insn (insns);
566 return;
567 }
568
569 /* Truncating multi-word to a word or less. */
570 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
571 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
572 {
573 if (!((MEM_P (from)
574 && ! MEM_VOLATILE_P (from)
575 && direct_load[(int) to_mode]
576 && ! mode_dependent_address_p (XEXP (from, 0)))
577 || REG_P (from)
578 || GET_CODE (from) == SUBREG))
579 from = force_reg (from_mode, from);
580 convert_move (to, gen_lowpart (word_mode, from), 0);
581 return;
582 }
583
584 /* Now follow all the conversions between integers
585 no more than a word long. */
586
587 /* For truncation, usually we can just refer to FROM in a narrower mode. */
588 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
589 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
590 {
591 if (!((MEM_P (from)
592 && ! MEM_VOLATILE_P (from)
593 && direct_load[(int) to_mode]
594 && ! mode_dependent_address_p (XEXP (from, 0)))
595 || REG_P (from)
596 || GET_CODE (from) == SUBREG))
597 from = force_reg (from_mode, from);
598 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
599 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
600 from = copy_to_reg (from);
601 emit_move_insn (to, gen_lowpart (to_mode, from));
602 return;
603 }
604
605 /* Handle extension. */
606 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
607 {
608 /* Convert directly if that works. */
609 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
610 != CODE_FOR_nothing)
611 {
612 emit_unop_insn (code, to, from, equiv_code);
613 return;
614 }
615 else
616 {
617 enum machine_mode intermediate;
618 rtx tmp;
619 int shift_amount;
620
621 /* Search for a mode to convert via. */
622 for (intermediate = from_mode; intermediate != VOIDmode;
623 intermediate = GET_MODE_WIDER_MODE (intermediate))
624 if (((can_extend_p (to_mode, intermediate, unsignedp)
625 != CODE_FOR_nothing)
626 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
627 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
628 && (can_extend_p (intermediate, from_mode, unsignedp)
629 != CODE_FOR_nothing))
630 {
631 convert_move (to, convert_to_mode (intermediate, from,
632 unsignedp), unsignedp);
633 return;
634 }
635
636 /* No suitable intermediate mode.
637 Generate what we need with shifts. */
638 shift_amount = (GET_MODE_PRECISION (to_mode)
639 - GET_MODE_PRECISION (from_mode));
640 from = gen_lowpart (to_mode, force_reg (from_mode, from));
641 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
642 to, unsignedp);
643 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
644 to, unsignedp);
645 if (tmp != to)
646 emit_move_insn (to, tmp);
647 return;
648 }
649 }
650
651 /* Support special truncate insns for certain modes. */
652 if (convert_optab_handler (trunc_optab, to_mode,
653 from_mode) != CODE_FOR_nothing)
654 {
655 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
656 to, from, UNKNOWN);
657 return;
658 }
659
660 /* Handle truncation of volatile memrefs, and so on;
661 the things that couldn't be truncated directly,
662 and for which there was no special instruction.
663
664 ??? Code above formerly short-circuited this, for most integer
665 mode pairs, with a force_reg in from_mode followed by a recursive
666 call to this routine. Appears always to have been wrong. */
667 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
668 {
669 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
670 emit_move_insn (to, temp);
671 return;
672 }
673
674 /* Mode combination is not recognized. */
675 gcc_unreachable ();
676 }
677
678 /* Return an rtx for a value that would result
679 from converting X to mode MODE.
680 Both X and MODE may be floating, or both integer.
681 UNSIGNEDP is nonzero if X is an unsigned value.
682 This can be done by referring to a part of X in place
683 or by copying to a new temporary with conversion. */
684
685 rtx
686 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
687 {
688 return convert_modes (mode, VOIDmode, x, unsignedp);
689 }
690
691 /* Return an rtx for a value that would result
692 from converting X from mode OLDMODE to mode MODE.
693 Both modes may be floating, or both integer.
694 UNSIGNEDP is nonzero if X is an unsigned value.
695
696 This can be done by referring to a part of X in place
697 or by copying to a new temporary with conversion.
698
699 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
700
701 rtx
702 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
703 {
704 rtx temp;
705
706 /* If FROM is a SUBREG that indicates that we have already done at least
707 the required extension, strip it. */
708
709 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
710 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
711 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
712 x = gen_lowpart (mode, x);
713
714 if (GET_MODE (x) != VOIDmode)
715 oldmode = GET_MODE (x);
716
717 if (mode == oldmode)
718 return x;
719
720 /* There is one case that we must handle specially: If we are converting
721 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
722 we are to interpret the constant as unsigned, gen_lowpart will do
723 the wrong if the constant appears negative. What we want to do is
724 make the high-order word of the constant zero, not all ones. */
725
726 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
727 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
728 && CONST_INT_P (x) && INTVAL (x) < 0)
729 {
730 double_int val = uhwi_to_double_int (INTVAL (x));
731
732 /* We need to zero extend VAL. */
733 if (oldmode != VOIDmode)
734 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
735
736 return immed_double_int_const (val, mode);
737 }
738
739 /* We can do this with a gen_lowpart if both desired and current modes
740 are integer, and this is either a constant integer, a register, or a
741 non-volatile MEM. Except for the constant case where MODE is no
742 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
743
744 if ((CONST_INT_P (x)
745 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
746 || (GET_MODE_CLASS (mode) == MODE_INT
747 && GET_MODE_CLASS (oldmode) == MODE_INT
748 && (GET_CODE (x) == CONST_DOUBLE
749 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
750 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
751 && direct_load[(int) mode])
752 || (REG_P (x)
753 && (! HARD_REGISTER_P (x)
754 || HARD_REGNO_MODE_OK (REGNO (x), mode))
755 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
756 GET_MODE (x))))))))
757 {
758 /* ?? If we don't know OLDMODE, we have to assume here that
759 X does not need sign- or zero-extension. This may not be
760 the case, but it's the best we can do. */
761 if (CONST_INT_P (x) && oldmode != VOIDmode
762 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
763 {
764 HOST_WIDE_INT val = INTVAL (x);
765
766 /* We must sign or zero-extend in this case. Start by
767 zero-extending, then sign extend if we need to. */
768 val &= GET_MODE_MASK (oldmode);
769 if (! unsignedp
770 && val_signbit_known_set_p (oldmode, val))
771 val |= ~GET_MODE_MASK (oldmode);
772
773 return gen_int_mode (val, mode);
774 }
775
776 return gen_lowpart (mode, x);
777 }
778
779 /* Converting from integer constant into mode is always equivalent to an
780 subreg operation. */
781 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
782 {
783 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
784 return simplify_gen_subreg (mode, x, oldmode, 0);
785 }
786
787 temp = gen_reg_rtx (mode);
788 convert_move (temp, x, unsignedp);
789 return temp;
790 }
791 \f
792 /* Return the largest alignment we can use for doing a move (or store)
793 of MAX_PIECES. ALIGN is the largest alignment we could use. */
794
795 static unsigned int
796 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
797 {
798 enum machine_mode tmode;
799
800 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
801 if (align >= GET_MODE_ALIGNMENT (tmode))
802 align = GET_MODE_ALIGNMENT (tmode);
803 else
804 {
805 enum machine_mode tmode, xmode;
806
807 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
808 tmode != VOIDmode;
809 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
810 if (GET_MODE_SIZE (tmode) > max_pieces
811 || SLOW_UNALIGNED_ACCESS (tmode, align))
812 break;
813
814 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
815 }
816
817 return align;
818 }
819
820 /* Return the widest integer mode no wider than SIZE. If no such mode
821 can be found, return VOIDmode. */
822
823 static enum machine_mode
824 widest_int_mode_for_size (unsigned int size)
825 {
826 enum machine_mode tmode, mode = VOIDmode;
827
828 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
829 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
830 if (GET_MODE_SIZE (tmode) < size)
831 mode = tmode;
832
833 return mode;
834 }
835
836 /* STORE_MAX_PIECES is the number of bytes at a time that we can
837 store efficiently. Due to internal GCC limitations, this is
838 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
839 for an immediate constant. */
840
841 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
842
843 /* Determine whether the LEN bytes can be moved by using several move
844 instructions. Return nonzero if a call to move_by_pieces should
845 succeed. */
846
847 int
848 can_move_by_pieces (unsigned HOST_WIDE_INT len,
849 unsigned int align ATTRIBUTE_UNUSED)
850 {
851 return MOVE_BY_PIECES_P (len, align);
852 }
853
854 /* Generate several move instructions to copy LEN bytes from block FROM to
855 block TO. (These are MEM rtx's with BLKmode).
856
857 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
858 used to push FROM to the stack.
859
860 ALIGN is maximum stack alignment we can assume.
861
862 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
863 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
864 stpcpy. */
865
866 rtx
867 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
868 unsigned int align, int endp)
869 {
870 struct move_by_pieces_d data;
871 enum machine_mode to_addr_mode, from_addr_mode
872 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
873 rtx to_addr, from_addr = XEXP (from, 0);
874 unsigned int max_size = MOVE_MAX_PIECES + 1;
875 enum insn_code icode;
876
877 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
878
879 data.offset = 0;
880 data.from_addr = from_addr;
881 if (to)
882 {
883 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
884 to_addr = XEXP (to, 0);
885 data.to = to;
886 data.autinc_to
887 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
888 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
889 data.reverse
890 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
891 }
892 else
893 {
894 to_addr_mode = VOIDmode;
895 to_addr = NULL_RTX;
896 data.to = NULL_RTX;
897 data.autinc_to = 1;
898 #ifdef STACK_GROWS_DOWNWARD
899 data.reverse = 1;
900 #else
901 data.reverse = 0;
902 #endif
903 }
904 data.to_addr = to_addr;
905 data.from = from;
906 data.autinc_from
907 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
908 || GET_CODE (from_addr) == POST_INC
909 || GET_CODE (from_addr) == POST_DEC);
910
911 data.explicit_inc_from = 0;
912 data.explicit_inc_to = 0;
913 if (data.reverse) data.offset = len;
914 data.len = len;
915
916 /* If copying requires more than two move insns,
917 copy addresses to registers (to make displacements shorter)
918 and use post-increment if available. */
919 if (!(data.autinc_from && data.autinc_to)
920 && move_by_pieces_ninsns (len, align, max_size) > 2)
921 {
922 /* Find the mode of the largest move...
923 MODE might not be used depending on the definitions of the
924 USE_* macros below. */
925 enum machine_mode mode ATTRIBUTE_UNUSED
926 = widest_int_mode_for_size (max_size);
927
928 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
929 {
930 data.from_addr = copy_to_mode_reg (from_addr_mode,
931 plus_constant (from_addr, len));
932 data.autinc_from = 1;
933 data.explicit_inc_from = -1;
934 }
935 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
936 {
937 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
938 data.autinc_from = 1;
939 data.explicit_inc_from = 1;
940 }
941 if (!data.autinc_from && CONSTANT_P (from_addr))
942 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
943 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
944 {
945 data.to_addr = copy_to_mode_reg (to_addr_mode,
946 plus_constant (to_addr, len));
947 data.autinc_to = 1;
948 data.explicit_inc_to = -1;
949 }
950 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
951 {
952 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
953 data.autinc_to = 1;
954 data.explicit_inc_to = 1;
955 }
956 if (!data.autinc_to && CONSTANT_P (to_addr))
957 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
958 }
959
960 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
961
962 /* First move what we can in the largest integer mode, then go to
963 successively smaller modes. */
964
965 while (max_size > 1)
966 {
967 enum machine_mode mode = widest_int_mode_for_size (max_size);
968
969 if (mode == VOIDmode)
970 break;
971
972 icode = optab_handler (mov_optab, mode);
973 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
974 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
975
976 max_size = GET_MODE_SIZE (mode);
977 }
978
979 /* The code above should have handled everything. */
980 gcc_assert (!data.len);
981
982 if (endp)
983 {
984 rtx to1;
985
986 gcc_assert (!data.reverse);
987 if (data.autinc_to)
988 {
989 if (endp == 2)
990 {
991 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
992 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
993 else
994 data.to_addr = copy_to_mode_reg (to_addr_mode,
995 plus_constant (data.to_addr,
996 -1));
997 }
998 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
999 data.offset);
1000 }
1001 else
1002 {
1003 if (endp == 2)
1004 --data.offset;
1005 to1 = adjust_address (data.to, QImode, data.offset);
1006 }
1007 return to1;
1008 }
1009 else
1010 return data.to;
1011 }
1012
1013 /* Return number of insns required to move L bytes by pieces.
1014 ALIGN (in bits) is maximum alignment we can assume. */
1015
1016 unsigned HOST_WIDE_INT
1017 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1018 unsigned int max_size)
1019 {
1020 unsigned HOST_WIDE_INT n_insns = 0;
1021
1022 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1023
1024 while (max_size > 1)
1025 {
1026 enum machine_mode mode;
1027 enum insn_code icode;
1028
1029 mode = widest_int_mode_for_size (max_size);
1030
1031 if (mode == VOIDmode)
1032 break;
1033
1034 icode = optab_handler (mov_optab, mode);
1035 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1036 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1037
1038 max_size = GET_MODE_SIZE (mode);
1039 }
1040
1041 gcc_assert (!l);
1042 return n_insns;
1043 }
1044
1045 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1046 with move instructions for mode MODE. GENFUN is the gen_... function
1047 to make a move insn for that mode. DATA has all the other info. */
1048
1049 static void
1050 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1051 struct move_by_pieces_d *data)
1052 {
1053 unsigned int size = GET_MODE_SIZE (mode);
1054 rtx to1 = NULL_RTX, from1;
1055
1056 while (data->len >= size)
1057 {
1058 if (data->reverse)
1059 data->offset -= size;
1060
1061 if (data->to)
1062 {
1063 if (data->autinc_to)
1064 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1065 data->offset);
1066 else
1067 to1 = adjust_address (data->to, mode, data->offset);
1068 }
1069
1070 if (data->autinc_from)
1071 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1072 data->offset);
1073 else
1074 from1 = adjust_address (data->from, mode, data->offset);
1075
1076 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1077 emit_insn (gen_add2_insn (data->to_addr,
1078 GEN_INT (-(HOST_WIDE_INT)size)));
1079 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1080 emit_insn (gen_add2_insn (data->from_addr,
1081 GEN_INT (-(HOST_WIDE_INT)size)));
1082
1083 if (data->to)
1084 emit_insn ((*genfun) (to1, from1));
1085 else
1086 {
1087 #ifdef PUSH_ROUNDING
1088 emit_single_push_insn (mode, from1, NULL);
1089 #else
1090 gcc_unreachable ();
1091 #endif
1092 }
1093
1094 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1095 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1096 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1097 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1098
1099 if (! data->reverse)
1100 data->offset += size;
1101
1102 data->len -= size;
1103 }
1104 }
1105 \f
1106 /* Emit code to move a block Y to a block X. This may be done with
1107 string-move instructions, with multiple scalar move instructions,
1108 or with a library call.
1109
1110 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1111 SIZE is an rtx that says how long they are.
1112 ALIGN is the maximum alignment we can assume they have.
1113 METHOD describes what kind of copy this is, and what mechanisms may be used.
1114
1115 Return the address of the new block, if memcpy is called and returns it,
1116 0 otherwise. */
1117
1118 rtx
1119 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1120 unsigned int expected_align, HOST_WIDE_INT expected_size)
1121 {
1122 bool may_use_call;
1123 rtx retval = 0;
1124 unsigned int align;
1125
1126 gcc_assert (size);
1127 if (CONST_INT_P (size)
1128 && INTVAL (size) == 0)
1129 return 0;
1130
1131 switch (method)
1132 {
1133 case BLOCK_OP_NORMAL:
1134 case BLOCK_OP_TAILCALL:
1135 may_use_call = true;
1136 break;
1137
1138 case BLOCK_OP_CALL_PARM:
1139 may_use_call = block_move_libcall_safe_for_call_parm ();
1140
1141 /* Make inhibit_defer_pop nonzero around the library call
1142 to force it to pop the arguments right away. */
1143 NO_DEFER_POP;
1144 break;
1145
1146 case BLOCK_OP_NO_LIBCALL:
1147 may_use_call = false;
1148 break;
1149
1150 default:
1151 gcc_unreachable ();
1152 }
1153
1154 gcc_assert (MEM_P (x) && MEM_P (y));
1155 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1156 gcc_assert (align >= BITS_PER_UNIT);
1157
1158 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1159 block copy is more efficient for other large modes, e.g. DCmode. */
1160 x = adjust_address (x, BLKmode, 0);
1161 y = adjust_address (y, BLKmode, 0);
1162
1163 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1164 can be incorrect is coming from __builtin_memcpy. */
1165 if (CONST_INT_P (size))
1166 {
1167 x = shallow_copy_rtx (x);
1168 y = shallow_copy_rtx (y);
1169 set_mem_size (x, INTVAL (size));
1170 set_mem_size (y, INTVAL (size));
1171 }
1172
1173 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1174 move_by_pieces (x, y, INTVAL (size), align, 0);
1175 else if (emit_block_move_via_movmem (x, y, size, align,
1176 expected_align, expected_size))
1177 ;
1178 else if (may_use_call
1179 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1180 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1181 {
1182 /* Since x and y are passed to a libcall, mark the corresponding
1183 tree EXPR as addressable. */
1184 tree y_expr = MEM_EXPR (y);
1185 tree x_expr = MEM_EXPR (x);
1186 if (y_expr)
1187 mark_addressable (y_expr);
1188 if (x_expr)
1189 mark_addressable (x_expr);
1190 retval = emit_block_move_via_libcall (x, y, size,
1191 method == BLOCK_OP_TAILCALL);
1192 }
1193
1194 else
1195 emit_block_move_via_loop (x, y, size, align);
1196
1197 if (method == BLOCK_OP_CALL_PARM)
1198 OK_DEFER_POP;
1199
1200 return retval;
1201 }
1202
1203 rtx
1204 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1205 {
1206 return emit_block_move_hints (x, y, size, method, 0, -1);
1207 }
1208
1209 /* A subroutine of emit_block_move. Returns true if calling the
1210 block move libcall will not clobber any parameters which may have
1211 already been placed on the stack. */
1212
1213 static bool
1214 block_move_libcall_safe_for_call_parm (void)
1215 {
1216 #if defined (REG_PARM_STACK_SPACE)
1217 tree fn;
1218 #endif
1219
1220 /* If arguments are pushed on the stack, then they're safe. */
1221 if (PUSH_ARGS)
1222 return true;
1223
1224 /* If registers go on the stack anyway, any argument is sure to clobber
1225 an outgoing argument. */
1226 #if defined (REG_PARM_STACK_SPACE)
1227 fn = emit_block_move_libcall_fn (false);
1228 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1229 depend on its argument. */
1230 (void) fn;
1231 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1232 && REG_PARM_STACK_SPACE (fn) != 0)
1233 return false;
1234 #endif
1235
1236 /* If any argument goes in memory, then it might clobber an outgoing
1237 argument. */
1238 {
1239 CUMULATIVE_ARGS args_so_far_v;
1240 cumulative_args_t args_so_far;
1241 tree fn, arg;
1242
1243 fn = emit_block_move_libcall_fn (false);
1244 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1245 args_so_far = pack_cumulative_args (&args_so_far_v);
1246
1247 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1248 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1249 {
1250 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1251 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1252 NULL_TREE, true);
1253 if (!tmp || !REG_P (tmp))
1254 return false;
1255 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1256 return false;
1257 targetm.calls.function_arg_advance (args_so_far, mode,
1258 NULL_TREE, true);
1259 }
1260 }
1261 return true;
1262 }
1263
1264 /* A subroutine of emit_block_move. Expand a movmem pattern;
1265 return true if successful. */
1266
1267 static bool
1268 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1269 unsigned int expected_align, HOST_WIDE_INT expected_size)
1270 {
1271 int save_volatile_ok = volatile_ok;
1272 enum machine_mode mode;
1273
1274 if (expected_align < align)
1275 expected_align = align;
1276
1277 /* Since this is a move insn, we don't care about volatility. */
1278 volatile_ok = 1;
1279
1280 /* Try the most limited insn first, because there's no point
1281 including more than one in the machine description unless
1282 the more limited one has some advantage. */
1283
1284 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1285 mode = GET_MODE_WIDER_MODE (mode))
1286 {
1287 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1288
1289 if (code != CODE_FOR_nothing
1290 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1291 here because if SIZE is less than the mode mask, as it is
1292 returned by the macro, it will definitely be less than the
1293 actual mode mask. */
1294 && ((CONST_INT_P (size)
1295 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1296 <= (GET_MODE_MASK (mode) >> 1)))
1297 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1298 {
1299 struct expand_operand ops[6];
1300 unsigned int nops;
1301
1302 /* ??? When called via emit_block_move_for_call, it'd be
1303 nice if there were some way to inform the backend, so
1304 that it doesn't fail the expansion because it thinks
1305 emitting the libcall would be more efficient. */
1306 nops = insn_data[(int) code].n_generator_args;
1307 gcc_assert (nops == 4 || nops == 6);
1308
1309 create_fixed_operand (&ops[0], x);
1310 create_fixed_operand (&ops[1], y);
1311 /* The check above guarantees that this size conversion is valid. */
1312 create_convert_operand_to (&ops[2], size, mode, true);
1313 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1314 if (nops == 6)
1315 {
1316 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1317 create_integer_operand (&ops[5], expected_size);
1318 }
1319 if (maybe_expand_insn (code, nops, ops))
1320 {
1321 volatile_ok = save_volatile_ok;
1322 return true;
1323 }
1324 }
1325 }
1326
1327 volatile_ok = save_volatile_ok;
1328 return false;
1329 }
1330
1331 /* A subroutine of emit_block_move. Expand a call to memcpy.
1332 Return the return value from memcpy, 0 otherwise. */
1333
1334 rtx
1335 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1336 {
1337 rtx dst_addr, src_addr;
1338 tree call_expr, fn, src_tree, dst_tree, size_tree;
1339 enum machine_mode size_mode;
1340 rtx retval;
1341
1342 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1343 pseudos. We can then place those new pseudos into a VAR_DECL and
1344 use them later. */
1345
1346 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1347 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1348
1349 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1350 src_addr = convert_memory_address (ptr_mode, src_addr);
1351
1352 dst_tree = make_tree (ptr_type_node, dst_addr);
1353 src_tree = make_tree (ptr_type_node, src_addr);
1354
1355 size_mode = TYPE_MODE (sizetype);
1356
1357 size = convert_to_mode (size_mode, size, 1);
1358 size = copy_to_mode_reg (size_mode, size);
1359
1360 /* It is incorrect to use the libcall calling conventions to call
1361 memcpy in this context. This could be a user call to memcpy and
1362 the user may wish to examine the return value from memcpy. For
1363 targets where libcalls and normal calls have different conventions
1364 for returning pointers, we could end up generating incorrect code. */
1365
1366 size_tree = make_tree (sizetype, size);
1367
1368 fn = emit_block_move_libcall_fn (true);
1369 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1370 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1371
1372 retval = expand_normal (call_expr);
1373
1374 return retval;
1375 }
1376
1377 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1378 for the function we use for block copies. The first time FOR_CALL
1379 is true, we call assemble_external. */
1380
1381 static GTY(()) tree block_move_fn;
1382
1383 void
1384 init_block_move_fn (const char *asmspec)
1385 {
1386 if (!block_move_fn)
1387 {
1388 tree args, fn;
1389
1390 fn = get_identifier ("memcpy");
1391 args = build_function_type_list (ptr_type_node, ptr_type_node,
1392 const_ptr_type_node, sizetype,
1393 NULL_TREE);
1394
1395 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1396 DECL_EXTERNAL (fn) = 1;
1397 TREE_PUBLIC (fn) = 1;
1398 DECL_ARTIFICIAL (fn) = 1;
1399 TREE_NOTHROW (fn) = 1;
1400 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1401 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1402
1403 block_move_fn = fn;
1404 }
1405
1406 if (asmspec)
1407 set_user_assembler_name (block_move_fn, asmspec);
1408 }
1409
1410 static tree
1411 emit_block_move_libcall_fn (int for_call)
1412 {
1413 static bool emitted_extern;
1414
1415 if (!block_move_fn)
1416 init_block_move_fn (NULL);
1417
1418 if (for_call && !emitted_extern)
1419 {
1420 emitted_extern = true;
1421 make_decl_rtl (block_move_fn);
1422 assemble_external (block_move_fn);
1423 }
1424
1425 return block_move_fn;
1426 }
1427
1428 /* A subroutine of emit_block_move. Copy the data via an explicit
1429 loop. This is used only when libcalls are forbidden. */
1430 /* ??? It'd be nice to copy in hunks larger than QImode. */
1431
1432 static void
1433 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1434 unsigned int align ATTRIBUTE_UNUSED)
1435 {
1436 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1437 enum machine_mode x_addr_mode
1438 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1439 enum machine_mode y_addr_mode
1440 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1441 enum machine_mode iter_mode;
1442
1443 iter_mode = GET_MODE (size);
1444 if (iter_mode == VOIDmode)
1445 iter_mode = word_mode;
1446
1447 top_label = gen_label_rtx ();
1448 cmp_label = gen_label_rtx ();
1449 iter = gen_reg_rtx (iter_mode);
1450
1451 emit_move_insn (iter, const0_rtx);
1452
1453 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1454 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1455 do_pending_stack_adjust ();
1456
1457 emit_jump (cmp_label);
1458 emit_label (top_label);
1459
1460 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1461 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1462
1463 if (x_addr_mode != y_addr_mode)
1464 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1465 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1466
1467 x = change_address (x, QImode, x_addr);
1468 y = change_address (y, QImode, y_addr);
1469
1470 emit_move_insn (x, y);
1471
1472 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1473 true, OPTAB_LIB_WIDEN);
1474 if (tmp != iter)
1475 emit_move_insn (iter, tmp);
1476
1477 emit_label (cmp_label);
1478
1479 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1480 true, top_label);
1481 }
1482 \f
1483 /* Copy all or part of a value X into registers starting at REGNO.
1484 The number of registers to be filled is NREGS. */
1485
1486 void
1487 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1488 {
1489 int i;
1490 #ifdef HAVE_load_multiple
1491 rtx pat;
1492 rtx last;
1493 #endif
1494
1495 if (nregs == 0)
1496 return;
1497
1498 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1499 x = validize_mem (force_const_mem (mode, x));
1500
1501 /* See if the machine can do this with a load multiple insn. */
1502 #ifdef HAVE_load_multiple
1503 if (HAVE_load_multiple)
1504 {
1505 last = get_last_insn ();
1506 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1507 GEN_INT (nregs));
1508 if (pat)
1509 {
1510 emit_insn (pat);
1511 return;
1512 }
1513 else
1514 delete_insns_since (last);
1515 }
1516 #endif
1517
1518 for (i = 0; i < nregs; i++)
1519 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1520 operand_subword_force (x, i, mode));
1521 }
1522
1523 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1524 The number of registers to be filled is NREGS. */
1525
1526 void
1527 move_block_from_reg (int regno, rtx x, int nregs)
1528 {
1529 int i;
1530
1531 if (nregs == 0)
1532 return;
1533
1534 /* See if the machine can do this with a store multiple insn. */
1535 #ifdef HAVE_store_multiple
1536 if (HAVE_store_multiple)
1537 {
1538 rtx last = get_last_insn ();
1539 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1540 GEN_INT (nregs));
1541 if (pat)
1542 {
1543 emit_insn (pat);
1544 return;
1545 }
1546 else
1547 delete_insns_since (last);
1548 }
1549 #endif
1550
1551 for (i = 0; i < nregs; i++)
1552 {
1553 rtx tem = operand_subword (x, i, 1, BLKmode);
1554
1555 gcc_assert (tem);
1556
1557 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1558 }
1559 }
1560
1561 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1562 ORIG, where ORIG is a non-consecutive group of registers represented by
1563 a PARALLEL. The clone is identical to the original except in that the
1564 original set of registers is replaced by a new set of pseudo registers.
1565 The new set has the same modes as the original set. */
1566
1567 rtx
1568 gen_group_rtx (rtx orig)
1569 {
1570 int i, length;
1571 rtx *tmps;
1572
1573 gcc_assert (GET_CODE (orig) == PARALLEL);
1574
1575 length = XVECLEN (orig, 0);
1576 tmps = XALLOCAVEC (rtx, length);
1577
1578 /* Skip a NULL entry in first slot. */
1579 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1580
1581 if (i)
1582 tmps[0] = 0;
1583
1584 for (; i < length; i++)
1585 {
1586 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1587 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1588
1589 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1590 }
1591
1592 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1593 }
1594
1595 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1596 except that values are placed in TMPS[i], and must later be moved
1597 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1598
1599 static void
1600 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1601 {
1602 rtx src;
1603 int start, i;
1604 enum machine_mode m = GET_MODE (orig_src);
1605
1606 gcc_assert (GET_CODE (dst) == PARALLEL);
1607
1608 if (m != VOIDmode
1609 && !SCALAR_INT_MODE_P (m)
1610 && !MEM_P (orig_src)
1611 && GET_CODE (orig_src) != CONCAT)
1612 {
1613 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1614 if (imode == BLKmode)
1615 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1616 else
1617 src = gen_reg_rtx (imode);
1618 if (imode != BLKmode)
1619 src = gen_lowpart (GET_MODE (orig_src), src);
1620 emit_move_insn (src, orig_src);
1621 /* ...and back again. */
1622 if (imode != BLKmode)
1623 src = gen_lowpart (imode, src);
1624 emit_group_load_1 (tmps, dst, src, type, ssize);
1625 return;
1626 }
1627
1628 /* Check for a NULL entry, used to indicate that the parameter goes
1629 both on the stack and in registers. */
1630 if (XEXP (XVECEXP (dst, 0, 0), 0))
1631 start = 0;
1632 else
1633 start = 1;
1634
1635 /* Process the pieces. */
1636 for (i = start; i < XVECLEN (dst, 0); i++)
1637 {
1638 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1639 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1640 unsigned int bytelen = GET_MODE_SIZE (mode);
1641 int shift = 0;
1642
1643 /* Handle trailing fragments that run over the size of the struct. */
1644 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1645 {
1646 /* Arrange to shift the fragment to where it belongs.
1647 extract_bit_field loads to the lsb of the reg. */
1648 if (
1649 #ifdef BLOCK_REG_PADDING
1650 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1651 == (BYTES_BIG_ENDIAN ? upward : downward)
1652 #else
1653 BYTES_BIG_ENDIAN
1654 #endif
1655 )
1656 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1657 bytelen = ssize - bytepos;
1658 gcc_assert (bytelen > 0);
1659 }
1660
1661 /* If we won't be loading directly from memory, protect the real source
1662 from strange tricks we might play; but make sure that the source can
1663 be loaded directly into the destination. */
1664 src = orig_src;
1665 if (!MEM_P (orig_src)
1666 && (!CONSTANT_P (orig_src)
1667 || (GET_MODE (orig_src) != mode
1668 && GET_MODE (orig_src) != VOIDmode)))
1669 {
1670 if (GET_MODE (orig_src) == VOIDmode)
1671 src = gen_reg_rtx (mode);
1672 else
1673 src = gen_reg_rtx (GET_MODE (orig_src));
1674
1675 emit_move_insn (src, orig_src);
1676 }
1677
1678 /* Optimize the access just a bit. */
1679 if (MEM_P (src)
1680 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1681 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1682 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1683 && bytelen == GET_MODE_SIZE (mode))
1684 {
1685 tmps[i] = gen_reg_rtx (mode);
1686 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1687 }
1688 else if (COMPLEX_MODE_P (mode)
1689 && GET_MODE (src) == mode
1690 && bytelen == GET_MODE_SIZE (mode))
1691 /* Let emit_move_complex do the bulk of the work. */
1692 tmps[i] = src;
1693 else if (GET_CODE (src) == CONCAT)
1694 {
1695 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1696 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1697
1698 if ((bytepos == 0 && bytelen == slen0)
1699 || (bytepos != 0 && bytepos + bytelen <= slen))
1700 {
1701 /* The following assumes that the concatenated objects all
1702 have the same size. In this case, a simple calculation
1703 can be used to determine the object and the bit field
1704 to be extracted. */
1705 tmps[i] = XEXP (src, bytepos / slen0);
1706 if (! CONSTANT_P (tmps[i])
1707 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1708 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1709 (bytepos % slen0) * BITS_PER_UNIT,
1710 1, false, NULL_RTX, mode, mode);
1711 }
1712 else
1713 {
1714 rtx mem;
1715
1716 gcc_assert (!bytepos);
1717 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1718 emit_move_insn (mem, src);
1719 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1720 0, 1, false, NULL_RTX, mode, mode);
1721 }
1722 }
1723 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1724 SIMD register, which is currently broken. While we get GCC
1725 to emit proper RTL for these cases, let's dump to memory. */
1726 else if (VECTOR_MODE_P (GET_MODE (dst))
1727 && REG_P (src))
1728 {
1729 int slen = GET_MODE_SIZE (GET_MODE (src));
1730 rtx mem;
1731
1732 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1733 emit_move_insn (mem, src);
1734 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1735 }
1736 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1737 && XVECLEN (dst, 0) > 1)
1738 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1739 else if (CONSTANT_P (src))
1740 {
1741 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1742
1743 if (len == ssize)
1744 tmps[i] = src;
1745 else
1746 {
1747 rtx first, second;
1748
1749 gcc_assert (2 * len == ssize);
1750 split_double (src, &first, &second);
1751 if (i)
1752 tmps[i] = second;
1753 else
1754 tmps[i] = first;
1755 }
1756 }
1757 else if (REG_P (src) && GET_MODE (src) == mode)
1758 tmps[i] = src;
1759 else
1760 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1761 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1762 mode, mode);
1763
1764 if (shift)
1765 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1766 shift, tmps[i], 0);
1767 }
1768 }
1769
1770 /* Emit code to move a block SRC of type TYPE to a block DST,
1771 where DST is non-consecutive registers represented by a PARALLEL.
1772 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1773 if not known. */
1774
1775 void
1776 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1777 {
1778 rtx *tmps;
1779 int i;
1780
1781 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1782 emit_group_load_1 (tmps, dst, src, type, ssize);
1783
1784 /* Copy the extracted pieces into the proper (probable) hard regs. */
1785 for (i = 0; i < XVECLEN (dst, 0); i++)
1786 {
1787 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1788 if (d == NULL)
1789 continue;
1790 emit_move_insn (d, tmps[i]);
1791 }
1792 }
1793
1794 /* Similar, but load SRC into new pseudos in a format that looks like
1795 PARALLEL. This can later be fed to emit_group_move to get things
1796 in the right place. */
1797
1798 rtx
1799 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1800 {
1801 rtvec vec;
1802 int i;
1803
1804 vec = rtvec_alloc (XVECLEN (parallel, 0));
1805 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1806
1807 /* Convert the vector to look just like the original PARALLEL, except
1808 with the computed values. */
1809 for (i = 0; i < XVECLEN (parallel, 0); i++)
1810 {
1811 rtx e = XVECEXP (parallel, 0, i);
1812 rtx d = XEXP (e, 0);
1813
1814 if (d)
1815 {
1816 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1817 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1818 }
1819 RTVEC_ELT (vec, i) = e;
1820 }
1821
1822 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1823 }
1824
1825 /* Emit code to move a block SRC to block DST, where SRC and DST are
1826 non-consecutive groups of registers, each represented by a PARALLEL. */
1827
1828 void
1829 emit_group_move (rtx dst, rtx src)
1830 {
1831 int i;
1832
1833 gcc_assert (GET_CODE (src) == PARALLEL
1834 && GET_CODE (dst) == PARALLEL
1835 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1836
1837 /* Skip first entry if NULL. */
1838 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1839 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1840 XEXP (XVECEXP (src, 0, i), 0));
1841 }
1842
1843 /* Move a group of registers represented by a PARALLEL into pseudos. */
1844
1845 rtx
1846 emit_group_move_into_temps (rtx src)
1847 {
1848 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1849 int i;
1850
1851 for (i = 0; i < XVECLEN (src, 0); i++)
1852 {
1853 rtx e = XVECEXP (src, 0, i);
1854 rtx d = XEXP (e, 0);
1855
1856 if (d)
1857 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1858 RTVEC_ELT (vec, i) = e;
1859 }
1860
1861 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1862 }
1863
1864 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1865 where SRC is non-consecutive registers represented by a PARALLEL.
1866 SSIZE represents the total size of block ORIG_DST, or -1 if not
1867 known. */
1868
1869 void
1870 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1871 {
1872 rtx *tmps, dst;
1873 int start, finish, i;
1874 enum machine_mode m = GET_MODE (orig_dst);
1875
1876 gcc_assert (GET_CODE (src) == PARALLEL);
1877
1878 if (!SCALAR_INT_MODE_P (m)
1879 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1880 {
1881 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1882 if (imode == BLKmode)
1883 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1884 else
1885 dst = gen_reg_rtx (imode);
1886 emit_group_store (dst, src, type, ssize);
1887 if (imode != BLKmode)
1888 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1889 emit_move_insn (orig_dst, dst);
1890 return;
1891 }
1892
1893 /* Check for a NULL entry, used to indicate that the parameter goes
1894 both on the stack and in registers. */
1895 if (XEXP (XVECEXP (src, 0, 0), 0))
1896 start = 0;
1897 else
1898 start = 1;
1899 finish = XVECLEN (src, 0);
1900
1901 tmps = XALLOCAVEC (rtx, finish);
1902
1903 /* Copy the (probable) hard regs into pseudos. */
1904 for (i = start; i < finish; i++)
1905 {
1906 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1907 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1908 {
1909 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1910 emit_move_insn (tmps[i], reg);
1911 }
1912 else
1913 tmps[i] = reg;
1914 }
1915
1916 /* If we won't be storing directly into memory, protect the real destination
1917 from strange tricks we might play. */
1918 dst = orig_dst;
1919 if (GET_CODE (dst) == PARALLEL)
1920 {
1921 rtx temp;
1922
1923 /* We can get a PARALLEL dst if there is a conditional expression in
1924 a return statement. In that case, the dst and src are the same,
1925 so no action is necessary. */
1926 if (rtx_equal_p (dst, src))
1927 return;
1928
1929 /* It is unclear if we can ever reach here, but we may as well handle
1930 it. Allocate a temporary, and split this into a store/load to/from
1931 the temporary. */
1932
1933 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1934 emit_group_store (temp, src, type, ssize);
1935 emit_group_load (dst, temp, type, ssize);
1936 return;
1937 }
1938 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1939 {
1940 enum machine_mode outer = GET_MODE (dst);
1941 enum machine_mode inner;
1942 HOST_WIDE_INT bytepos;
1943 bool done = false;
1944 rtx temp;
1945
1946 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1947 dst = gen_reg_rtx (outer);
1948
1949 /* Make life a bit easier for combine. */
1950 /* If the first element of the vector is the low part
1951 of the destination mode, use a paradoxical subreg to
1952 initialize the destination. */
1953 if (start < finish)
1954 {
1955 inner = GET_MODE (tmps[start]);
1956 bytepos = subreg_lowpart_offset (inner, outer);
1957 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1958 {
1959 temp = simplify_gen_subreg (outer, tmps[start],
1960 inner, 0);
1961 if (temp)
1962 {
1963 emit_move_insn (dst, temp);
1964 done = true;
1965 start++;
1966 }
1967 }
1968 }
1969
1970 /* If the first element wasn't the low part, try the last. */
1971 if (!done
1972 && start < finish - 1)
1973 {
1974 inner = GET_MODE (tmps[finish - 1]);
1975 bytepos = subreg_lowpart_offset (inner, outer);
1976 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1977 {
1978 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1979 inner, 0);
1980 if (temp)
1981 {
1982 emit_move_insn (dst, temp);
1983 done = true;
1984 finish--;
1985 }
1986 }
1987 }
1988
1989 /* Otherwise, simply initialize the result to zero. */
1990 if (!done)
1991 emit_move_insn (dst, CONST0_RTX (outer));
1992 }
1993
1994 /* Process the pieces. */
1995 for (i = start; i < finish; i++)
1996 {
1997 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
1998 enum machine_mode mode = GET_MODE (tmps[i]);
1999 unsigned int bytelen = GET_MODE_SIZE (mode);
2000 unsigned int adj_bytelen = bytelen;
2001 rtx dest = dst;
2002
2003 /* Handle trailing fragments that run over the size of the struct. */
2004 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2005 adj_bytelen = ssize - bytepos;
2006
2007 if (GET_CODE (dst) == CONCAT)
2008 {
2009 if (bytepos + adj_bytelen
2010 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2011 dest = XEXP (dst, 0);
2012 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2013 {
2014 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2015 dest = XEXP (dst, 1);
2016 }
2017 else
2018 {
2019 enum machine_mode dest_mode = GET_MODE (dest);
2020 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2021
2022 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2023
2024 if (GET_MODE_ALIGNMENT (dest_mode)
2025 >= GET_MODE_ALIGNMENT (tmp_mode))
2026 {
2027 dest = assign_stack_temp (dest_mode,
2028 GET_MODE_SIZE (dest_mode),
2029 0);
2030 emit_move_insn (adjust_address (dest,
2031 tmp_mode,
2032 bytepos),
2033 tmps[i]);
2034 dst = dest;
2035 }
2036 else
2037 {
2038 dest = assign_stack_temp (tmp_mode,
2039 GET_MODE_SIZE (tmp_mode),
2040 0);
2041 emit_move_insn (dest, tmps[i]);
2042 dst = adjust_address (dest, dest_mode, bytepos);
2043 }
2044 break;
2045 }
2046 }
2047
2048 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2049 {
2050 /* store_bit_field always takes its value from the lsb.
2051 Move the fragment to the lsb if it's not already there. */
2052 if (
2053 #ifdef BLOCK_REG_PADDING
2054 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2055 == (BYTES_BIG_ENDIAN ? upward : downward)
2056 #else
2057 BYTES_BIG_ENDIAN
2058 #endif
2059 )
2060 {
2061 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2062 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2063 shift, tmps[i], 0);
2064 }
2065 bytelen = adj_bytelen;
2066 }
2067
2068 /* Optimize the access just a bit. */
2069 if (MEM_P (dest)
2070 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2071 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2072 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2073 && bytelen == GET_MODE_SIZE (mode))
2074 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2075 else
2076 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2077 0, 0, mode, tmps[i]);
2078 }
2079
2080 /* Copy from the pseudo into the (probable) hard reg. */
2081 if (orig_dst != dst)
2082 emit_move_insn (orig_dst, dst);
2083 }
2084
2085 /* Generate code to copy a BLKmode object of TYPE out of a
2086 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2087 is null, a stack temporary is created. TGTBLK is returned.
2088
2089 The purpose of this routine is to handle functions that return
2090 BLKmode structures in registers. Some machines (the PA for example)
2091 want to return all small structures in registers regardless of the
2092 structure's alignment. */
2093
2094 rtx
2095 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2096 {
2097 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2098 rtx src = NULL, dst = NULL;
2099 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2100 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2101 enum machine_mode copy_mode;
2102
2103 if (tgtblk == 0)
2104 {
2105 tgtblk = assign_temp (build_qualified_type (type,
2106 (TYPE_QUALS (type)
2107 | TYPE_QUAL_CONST)),
2108 0, 1, 1);
2109 preserve_temp_slots (tgtblk);
2110 }
2111
2112 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2113 into a new pseudo which is a full word. */
2114
2115 if (GET_MODE (srcreg) != BLKmode
2116 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2117 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2118
2119 /* If the structure doesn't take up a whole number of words, see whether
2120 SRCREG is padded on the left or on the right. If it's on the left,
2121 set PADDING_CORRECTION to the number of bits to skip.
2122
2123 In most ABIs, the structure will be returned at the least end of
2124 the register, which translates to right padding on little-endian
2125 targets and left padding on big-endian targets. The opposite
2126 holds if the structure is returned at the most significant
2127 end of the register. */
2128 if (bytes % UNITS_PER_WORD != 0
2129 && (targetm.calls.return_in_msb (type)
2130 ? !BYTES_BIG_ENDIAN
2131 : BYTES_BIG_ENDIAN))
2132 padding_correction
2133 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2134
2135 /* Copy the structure BITSIZE bits at a time. If the target lives in
2136 memory, take care of not reading/writing past its end by selecting
2137 a copy mode suited to BITSIZE. This should always be possible given
2138 how it is computed.
2139
2140 We could probably emit more efficient code for machines which do not use
2141 strict alignment, but it doesn't seem worth the effort at the current
2142 time. */
2143
2144 copy_mode = word_mode;
2145 if (MEM_P (tgtblk))
2146 {
2147 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2148 if (mem_mode != BLKmode)
2149 copy_mode = mem_mode;
2150 }
2151
2152 for (bitpos = 0, xbitpos = padding_correction;
2153 bitpos < bytes * BITS_PER_UNIT;
2154 bitpos += bitsize, xbitpos += bitsize)
2155 {
2156 /* We need a new source operand each time xbitpos is on a
2157 word boundary and when xbitpos == padding_correction
2158 (the first time through). */
2159 if (xbitpos % BITS_PER_WORD == 0
2160 || xbitpos == padding_correction)
2161 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2162 GET_MODE (srcreg));
2163
2164 /* We need a new destination operand each time bitpos is on
2165 a word boundary. */
2166 if (bitpos % BITS_PER_WORD == 0)
2167 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2168
2169 /* Use xbitpos for the source extraction (right justified) and
2170 bitpos for the destination store (left justified). */
2171 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2172 extract_bit_field (src, bitsize,
2173 xbitpos % BITS_PER_WORD, 1, false,
2174 NULL_RTX, copy_mode, copy_mode));
2175 }
2176
2177 return tgtblk;
2178 }
2179
2180 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2181 register if it contains any data, otherwise return null.
2182
2183 This is used on targets that return BLKmode values in registers. */
2184
2185 rtx
2186 copy_blkmode_to_reg (enum machine_mode mode, tree src)
2187 {
2188 int i, n_regs;
2189 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2190 unsigned int bitsize;
2191 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2192 enum machine_mode dst_mode;
2193
2194 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2195
2196 x = expand_normal (src);
2197
2198 bytes = int_size_in_bytes (TREE_TYPE (src));
2199 if (bytes == 0)
2200 return NULL_RTX;
2201
2202 /* If the structure doesn't take up a whole number of words, see
2203 whether the register value should be padded on the left or on
2204 the right. Set PADDING_CORRECTION to the number of padding
2205 bits needed on the left side.
2206
2207 In most ABIs, the structure will be returned at the least end of
2208 the register, which translates to right padding on little-endian
2209 targets and left padding on big-endian targets. The opposite
2210 holds if the structure is returned at the most significant
2211 end of the register. */
2212 if (bytes % UNITS_PER_WORD != 0
2213 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2214 ? !BYTES_BIG_ENDIAN
2215 : BYTES_BIG_ENDIAN))
2216 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2217 * BITS_PER_UNIT));
2218
2219 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2220 dst_words = XALLOCAVEC (rtx, n_regs);
2221 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2222
2223 /* Copy the structure BITSIZE bits at a time. */
2224 for (bitpos = 0, xbitpos = padding_correction;
2225 bitpos < bytes * BITS_PER_UNIT;
2226 bitpos += bitsize, xbitpos += bitsize)
2227 {
2228 /* We need a new destination pseudo each time xbitpos is
2229 on a word boundary and when xbitpos == padding_correction
2230 (the first time through). */
2231 if (xbitpos % BITS_PER_WORD == 0
2232 || xbitpos == padding_correction)
2233 {
2234 /* Generate an appropriate register. */
2235 dst_word = gen_reg_rtx (word_mode);
2236 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2237
2238 /* Clear the destination before we move anything into it. */
2239 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2240 }
2241
2242 /* We need a new source operand each time bitpos is on a word
2243 boundary. */
2244 if (bitpos % BITS_PER_WORD == 0)
2245 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2246
2247 /* Use bitpos for the source extraction (left justified) and
2248 xbitpos for the destination store (right justified). */
2249 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2250 0, 0, word_mode,
2251 extract_bit_field (src_word, bitsize,
2252 bitpos % BITS_PER_WORD, 1, false,
2253 NULL_RTX, word_mode, word_mode));
2254 }
2255
2256 if (mode == BLKmode)
2257 {
2258 /* Find the smallest integer mode large enough to hold the
2259 entire structure. */
2260 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2261 mode != VOIDmode;
2262 mode = GET_MODE_WIDER_MODE (mode))
2263 /* Have we found a large enough mode? */
2264 if (GET_MODE_SIZE (mode) >= bytes)
2265 break;
2266
2267 /* A suitable mode should have been found. */
2268 gcc_assert (mode != VOIDmode);
2269 }
2270
2271 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2272 dst_mode = word_mode;
2273 else
2274 dst_mode = mode;
2275 dst = gen_reg_rtx (dst_mode);
2276
2277 for (i = 0; i < n_regs; i++)
2278 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2279
2280 if (mode != dst_mode)
2281 dst = gen_lowpart (mode, dst);
2282
2283 return dst;
2284 }
2285
2286 /* Add a USE expression for REG to the (possibly empty) list pointed
2287 to by CALL_FUSAGE. REG must denote a hard register. */
2288
2289 void
2290 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2291 {
2292 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2293
2294 *call_fusage
2295 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2296 }
2297
2298 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2299 starting at REGNO. All of these registers must be hard registers. */
2300
2301 void
2302 use_regs (rtx *call_fusage, int regno, int nregs)
2303 {
2304 int i;
2305
2306 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2307
2308 for (i = 0; i < nregs; i++)
2309 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2310 }
2311
2312 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2313 PARALLEL REGS. This is for calls that pass values in multiple
2314 non-contiguous locations. The Irix 6 ABI has examples of this. */
2315
2316 void
2317 use_group_regs (rtx *call_fusage, rtx regs)
2318 {
2319 int i;
2320
2321 for (i = 0; i < XVECLEN (regs, 0); i++)
2322 {
2323 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2324
2325 /* A NULL entry means the parameter goes both on the stack and in
2326 registers. This can also be a MEM for targets that pass values
2327 partially on the stack and partially in registers. */
2328 if (reg != 0 && REG_P (reg))
2329 use_reg (call_fusage, reg);
2330 }
2331 }
2332
2333 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2334 assigment and the code of the expresion on the RHS is CODE. Return
2335 NULL otherwise. */
2336
2337 static gimple
2338 get_def_for_expr (tree name, enum tree_code code)
2339 {
2340 gimple def_stmt;
2341
2342 if (TREE_CODE (name) != SSA_NAME)
2343 return NULL;
2344
2345 def_stmt = get_gimple_for_ssa_name (name);
2346 if (!def_stmt
2347 || gimple_assign_rhs_code (def_stmt) != code)
2348 return NULL;
2349
2350 return def_stmt;
2351 }
2352 \f
2353
2354 /* Determine whether the LEN bytes generated by CONSTFUN can be
2355 stored to memory using several move instructions. CONSTFUNDATA is
2356 a pointer which will be passed as argument in every CONSTFUN call.
2357 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2358 a memset operation and false if it's a copy of a constant string.
2359 Return nonzero if a call to store_by_pieces should succeed. */
2360
2361 int
2362 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2363 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2364 void *constfundata, unsigned int align, bool memsetp)
2365 {
2366 unsigned HOST_WIDE_INT l;
2367 unsigned int max_size;
2368 HOST_WIDE_INT offset = 0;
2369 enum machine_mode mode;
2370 enum insn_code icode;
2371 int reverse;
2372 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2373 rtx cst ATTRIBUTE_UNUSED;
2374
2375 if (len == 0)
2376 return 1;
2377
2378 if (! (memsetp
2379 ? SET_BY_PIECES_P (len, align)
2380 : STORE_BY_PIECES_P (len, align)))
2381 return 0;
2382
2383 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2384
2385 /* We would first store what we can in the largest integer mode, then go to
2386 successively smaller modes. */
2387
2388 for (reverse = 0;
2389 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2390 reverse++)
2391 {
2392 l = len;
2393 max_size = STORE_MAX_PIECES + 1;
2394 while (max_size > 1)
2395 {
2396 mode = widest_int_mode_for_size (max_size);
2397
2398 if (mode == VOIDmode)
2399 break;
2400
2401 icode = optab_handler (mov_optab, mode);
2402 if (icode != CODE_FOR_nothing
2403 && align >= GET_MODE_ALIGNMENT (mode))
2404 {
2405 unsigned int size = GET_MODE_SIZE (mode);
2406
2407 while (l >= size)
2408 {
2409 if (reverse)
2410 offset -= size;
2411
2412 cst = (*constfun) (constfundata, offset, mode);
2413 if (!targetm.legitimate_constant_p (mode, cst))
2414 return 0;
2415
2416 if (!reverse)
2417 offset += size;
2418
2419 l -= size;
2420 }
2421 }
2422
2423 max_size = GET_MODE_SIZE (mode);
2424 }
2425
2426 /* The code above should have handled everything. */
2427 gcc_assert (!l);
2428 }
2429
2430 return 1;
2431 }
2432
2433 /* Generate several move instructions to store LEN bytes generated by
2434 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2435 pointer which will be passed as argument in every CONSTFUN call.
2436 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2437 a memset operation and false if it's a copy of a constant string.
2438 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2439 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2440 stpcpy. */
2441
2442 rtx
2443 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2444 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2445 void *constfundata, unsigned int align, bool memsetp, int endp)
2446 {
2447 enum machine_mode to_addr_mode
2448 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2449 struct store_by_pieces_d data;
2450
2451 if (len == 0)
2452 {
2453 gcc_assert (endp != 2);
2454 return to;
2455 }
2456
2457 gcc_assert (memsetp
2458 ? SET_BY_PIECES_P (len, align)
2459 : STORE_BY_PIECES_P (len, align));
2460 data.constfun = constfun;
2461 data.constfundata = constfundata;
2462 data.len = len;
2463 data.to = to;
2464 store_by_pieces_1 (&data, align);
2465 if (endp)
2466 {
2467 rtx to1;
2468
2469 gcc_assert (!data.reverse);
2470 if (data.autinc_to)
2471 {
2472 if (endp == 2)
2473 {
2474 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2475 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2476 else
2477 data.to_addr = copy_to_mode_reg (to_addr_mode,
2478 plus_constant (data.to_addr,
2479 -1));
2480 }
2481 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2482 data.offset);
2483 }
2484 else
2485 {
2486 if (endp == 2)
2487 --data.offset;
2488 to1 = adjust_address (data.to, QImode, data.offset);
2489 }
2490 return to1;
2491 }
2492 else
2493 return data.to;
2494 }
2495
2496 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2497 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2498
2499 static void
2500 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2501 {
2502 struct store_by_pieces_d data;
2503
2504 if (len == 0)
2505 return;
2506
2507 data.constfun = clear_by_pieces_1;
2508 data.constfundata = NULL;
2509 data.len = len;
2510 data.to = to;
2511 store_by_pieces_1 (&data, align);
2512 }
2513
2514 /* Callback routine for clear_by_pieces.
2515 Return const0_rtx unconditionally. */
2516
2517 static rtx
2518 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2519 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2520 enum machine_mode mode ATTRIBUTE_UNUSED)
2521 {
2522 return const0_rtx;
2523 }
2524
2525 /* Subroutine of clear_by_pieces and store_by_pieces.
2526 Generate several move instructions to store LEN bytes of block TO. (A MEM
2527 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2528
2529 static void
2530 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2531 unsigned int align ATTRIBUTE_UNUSED)
2532 {
2533 enum machine_mode to_addr_mode
2534 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2535 rtx to_addr = XEXP (data->to, 0);
2536 unsigned int max_size = STORE_MAX_PIECES + 1;
2537 enum insn_code icode;
2538
2539 data->offset = 0;
2540 data->to_addr = to_addr;
2541 data->autinc_to
2542 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2543 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2544
2545 data->explicit_inc_to = 0;
2546 data->reverse
2547 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2548 if (data->reverse)
2549 data->offset = data->len;
2550
2551 /* If storing requires more than two move insns,
2552 copy addresses to registers (to make displacements shorter)
2553 and use post-increment if available. */
2554 if (!data->autinc_to
2555 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2556 {
2557 /* Determine the main mode we'll be using.
2558 MODE might not be used depending on the definitions of the
2559 USE_* macros below. */
2560 enum machine_mode mode ATTRIBUTE_UNUSED
2561 = widest_int_mode_for_size (max_size);
2562
2563 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2564 {
2565 data->to_addr = copy_to_mode_reg (to_addr_mode,
2566 plus_constant (to_addr, data->len));
2567 data->autinc_to = 1;
2568 data->explicit_inc_to = -1;
2569 }
2570
2571 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2572 && ! data->autinc_to)
2573 {
2574 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2575 data->autinc_to = 1;
2576 data->explicit_inc_to = 1;
2577 }
2578
2579 if ( !data->autinc_to && CONSTANT_P (to_addr))
2580 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2581 }
2582
2583 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2584
2585 /* First store what we can in the largest integer mode, then go to
2586 successively smaller modes. */
2587
2588 while (max_size > 1)
2589 {
2590 enum machine_mode mode = widest_int_mode_for_size (max_size);
2591
2592 if (mode == VOIDmode)
2593 break;
2594
2595 icode = optab_handler (mov_optab, mode);
2596 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2597 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2598
2599 max_size = GET_MODE_SIZE (mode);
2600 }
2601
2602 /* The code above should have handled everything. */
2603 gcc_assert (!data->len);
2604 }
2605
2606 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2607 with move instructions for mode MODE. GENFUN is the gen_... function
2608 to make a move insn for that mode. DATA has all the other info. */
2609
2610 static void
2611 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2612 struct store_by_pieces_d *data)
2613 {
2614 unsigned int size = GET_MODE_SIZE (mode);
2615 rtx to1, cst;
2616
2617 while (data->len >= size)
2618 {
2619 if (data->reverse)
2620 data->offset -= size;
2621
2622 if (data->autinc_to)
2623 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2624 data->offset);
2625 else
2626 to1 = adjust_address (data->to, mode, data->offset);
2627
2628 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2629 emit_insn (gen_add2_insn (data->to_addr,
2630 GEN_INT (-(HOST_WIDE_INT) size)));
2631
2632 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2633 emit_insn ((*genfun) (to1, cst));
2634
2635 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2636 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2637
2638 if (! data->reverse)
2639 data->offset += size;
2640
2641 data->len -= size;
2642 }
2643 }
2644 \f
2645 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2646 its length in bytes. */
2647
2648 rtx
2649 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2650 unsigned int expected_align, HOST_WIDE_INT expected_size)
2651 {
2652 enum machine_mode mode = GET_MODE (object);
2653 unsigned int align;
2654
2655 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2656
2657 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2658 just move a zero. Otherwise, do this a piece at a time. */
2659 if (mode != BLKmode
2660 && CONST_INT_P (size)
2661 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2662 {
2663 rtx zero = CONST0_RTX (mode);
2664 if (zero != NULL)
2665 {
2666 emit_move_insn (object, zero);
2667 return NULL;
2668 }
2669
2670 if (COMPLEX_MODE_P (mode))
2671 {
2672 zero = CONST0_RTX (GET_MODE_INNER (mode));
2673 if (zero != NULL)
2674 {
2675 write_complex_part (object, zero, 0);
2676 write_complex_part (object, zero, 1);
2677 return NULL;
2678 }
2679 }
2680 }
2681
2682 if (size == const0_rtx)
2683 return NULL;
2684
2685 align = MEM_ALIGN (object);
2686
2687 if (CONST_INT_P (size)
2688 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2689 clear_by_pieces (object, INTVAL (size), align);
2690 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2691 expected_align, expected_size))
2692 ;
2693 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2694 return set_storage_via_libcall (object, size, const0_rtx,
2695 method == BLOCK_OP_TAILCALL);
2696 else
2697 gcc_unreachable ();
2698
2699 return NULL;
2700 }
2701
2702 rtx
2703 clear_storage (rtx object, rtx size, enum block_op_methods method)
2704 {
2705 return clear_storage_hints (object, size, method, 0, -1);
2706 }
2707
2708
2709 /* A subroutine of clear_storage. Expand a call to memset.
2710 Return the return value of memset, 0 otherwise. */
2711
2712 rtx
2713 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2714 {
2715 tree call_expr, fn, object_tree, size_tree, val_tree;
2716 enum machine_mode size_mode;
2717 rtx retval;
2718
2719 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2720 place those into new pseudos into a VAR_DECL and use them later. */
2721
2722 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2723
2724 size_mode = TYPE_MODE (sizetype);
2725 size = convert_to_mode (size_mode, size, 1);
2726 size = copy_to_mode_reg (size_mode, size);
2727
2728 /* It is incorrect to use the libcall calling conventions to call
2729 memset in this context. This could be a user call to memset and
2730 the user may wish to examine the return value from memset. For
2731 targets where libcalls and normal calls have different conventions
2732 for returning pointers, we could end up generating incorrect code. */
2733
2734 object_tree = make_tree (ptr_type_node, object);
2735 if (!CONST_INT_P (val))
2736 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2737 size_tree = make_tree (sizetype, size);
2738 val_tree = make_tree (integer_type_node, val);
2739
2740 fn = clear_storage_libcall_fn (true);
2741 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2742 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2743
2744 retval = expand_normal (call_expr);
2745
2746 return retval;
2747 }
2748
2749 /* A subroutine of set_storage_via_libcall. Create the tree node
2750 for the function we use for block clears. The first time FOR_CALL
2751 is true, we call assemble_external. */
2752
2753 tree block_clear_fn;
2754
2755 void
2756 init_block_clear_fn (const char *asmspec)
2757 {
2758 if (!block_clear_fn)
2759 {
2760 tree fn, args;
2761
2762 fn = get_identifier ("memset");
2763 args = build_function_type_list (ptr_type_node, ptr_type_node,
2764 integer_type_node, sizetype,
2765 NULL_TREE);
2766
2767 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2768 DECL_EXTERNAL (fn) = 1;
2769 TREE_PUBLIC (fn) = 1;
2770 DECL_ARTIFICIAL (fn) = 1;
2771 TREE_NOTHROW (fn) = 1;
2772 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2773 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2774
2775 block_clear_fn = fn;
2776 }
2777
2778 if (asmspec)
2779 set_user_assembler_name (block_clear_fn, asmspec);
2780 }
2781
2782 static tree
2783 clear_storage_libcall_fn (int for_call)
2784 {
2785 static bool emitted_extern;
2786
2787 if (!block_clear_fn)
2788 init_block_clear_fn (NULL);
2789
2790 if (for_call && !emitted_extern)
2791 {
2792 emitted_extern = true;
2793 make_decl_rtl (block_clear_fn);
2794 assemble_external (block_clear_fn);
2795 }
2796
2797 return block_clear_fn;
2798 }
2799 \f
2800 /* Expand a setmem pattern; return true if successful. */
2801
2802 bool
2803 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2804 unsigned int expected_align, HOST_WIDE_INT expected_size)
2805 {
2806 /* Try the most limited insn first, because there's no point
2807 including more than one in the machine description unless
2808 the more limited one has some advantage. */
2809
2810 enum machine_mode mode;
2811
2812 if (expected_align < align)
2813 expected_align = align;
2814
2815 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2816 mode = GET_MODE_WIDER_MODE (mode))
2817 {
2818 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2819
2820 if (code != CODE_FOR_nothing
2821 /* We don't need MODE to be narrower than
2822 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2823 the mode mask, as it is returned by the macro, it will
2824 definitely be less than the actual mode mask. */
2825 && ((CONST_INT_P (size)
2826 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2827 <= (GET_MODE_MASK (mode) >> 1)))
2828 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2829 {
2830 struct expand_operand ops[6];
2831 unsigned int nops;
2832
2833 nops = insn_data[(int) code].n_generator_args;
2834 gcc_assert (nops == 4 || nops == 6);
2835
2836 create_fixed_operand (&ops[0], object);
2837 /* The check above guarantees that this size conversion is valid. */
2838 create_convert_operand_to (&ops[1], size, mode, true);
2839 create_convert_operand_from (&ops[2], val, byte_mode, true);
2840 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2841 if (nops == 6)
2842 {
2843 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2844 create_integer_operand (&ops[5], expected_size);
2845 }
2846 if (maybe_expand_insn (code, nops, ops))
2847 return true;
2848 }
2849 }
2850
2851 return false;
2852 }
2853
2854 \f
2855 /* Write to one of the components of the complex value CPLX. Write VAL to
2856 the real part if IMAG_P is false, and the imaginary part if its true. */
2857
2858 static void
2859 write_complex_part (rtx cplx, rtx val, bool imag_p)
2860 {
2861 enum machine_mode cmode;
2862 enum machine_mode imode;
2863 unsigned ibitsize;
2864
2865 if (GET_CODE (cplx) == CONCAT)
2866 {
2867 emit_move_insn (XEXP (cplx, imag_p), val);
2868 return;
2869 }
2870
2871 cmode = GET_MODE (cplx);
2872 imode = GET_MODE_INNER (cmode);
2873 ibitsize = GET_MODE_BITSIZE (imode);
2874
2875 /* For MEMs simplify_gen_subreg may generate an invalid new address
2876 because, e.g., the original address is considered mode-dependent
2877 by the target, which restricts simplify_subreg from invoking
2878 adjust_address_nv. Instead of preparing fallback support for an
2879 invalid address, we call adjust_address_nv directly. */
2880 if (MEM_P (cplx))
2881 {
2882 emit_move_insn (adjust_address_nv (cplx, imode,
2883 imag_p ? GET_MODE_SIZE (imode) : 0),
2884 val);
2885 return;
2886 }
2887
2888 /* If the sub-object is at least word sized, then we know that subregging
2889 will work. This special case is important, since store_bit_field
2890 wants to operate on integer modes, and there's rarely an OImode to
2891 correspond to TCmode. */
2892 if (ibitsize >= BITS_PER_WORD
2893 /* For hard regs we have exact predicates. Assume we can split
2894 the original object if it spans an even number of hard regs.
2895 This special case is important for SCmode on 64-bit platforms
2896 where the natural size of floating-point regs is 32-bit. */
2897 || (REG_P (cplx)
2898 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2899 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2900 {
2901 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2902 imag_p ? GET_MODE_SIZE (imode) : 0);
2903 if (part)
2904 {
2905 emit_move_insn (part, val);
2906 return;
2907 }
2908 else
2909 /* simplify_gen_subreg may fail for sub-word MEMs. */
2910 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2911 }
2912
2913 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2914 }
2915
2916 /* Extract one of the components of the complex value CPLX. Extract the
2917 real part if IMAG_P is false, and the imaginary part if it's true. */
2918
2919 static rtx
2920 read_complex_part (rtx cplx, bool imag_p)
2921 {
2922 enum machine_mode cmode, imode;
2923 unsigned ibitsize;
2924
2925 if (GET_CODE (cplx) == CONCAT)
2926 return XEXP (cplx, imag_p);
2927
2928 cmode = GET_MODE (cplx);
2929 imode = GET_MODE_INNER (cmode);
2930 ibitsize = GET_MODE_BITSIZE (imode);
2931
2932 /* Special case reads from complex constants that got spilled to memory. */
2933 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2934 {
2935 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2936 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2937 {
2938 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2939 if (CONSTANT_CLASS_P (part))
2940 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2941 }
2942 }
2943
2944 /* For MEMs simplify_gen_subreg may generate an invalid new address
2945 because, e.g., the original address is considered mode-dependent
2946 by the target, which restricts simplify_subreg from invoking
2947 adjust_address_nv. Instead of preparing fallback support for an
2948 invalid address, we call adjust_address_nv directly. */
2949 if (MEM_P (cplx))
2950 return adjust_address_nv (cplx, imode,
2951 imag_p ? GET_MODE_SIZE (imode) : 0);
2952
2953 /* If the sub-object is at least word sized, then we know that subregging
2954 will work. This special case is important, since extract_bit_field
2955 wants to operate on integer modes, and there's rarely an OImode to
2956 correspond to TCmode. */
2957 if (ibitsize >= BITS_PER_WORD
2958 /* For hard regs we have exact predicates. Assume we can split
2959 the original object if it spans an even number of hard regs.
2960 This special case is important for SCmode on 64-bit platforms
2961 where the natural size of floating-point regs is 32-bit. */
2962 || (REG_P (cplx)
2963 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2964 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2965 {
2966 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2967 imag_p ? GET_MODE_SIZE (imode) : 0);
2968 if (ret)
2969 return ret;
2970 else
2971 /* simplify_gen_subreg may fail for sub-word MEMs. */
2972 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2973 }
2974
2975 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2976 true, false, NULL_RTX, imode, imode);
2977 }
2978 \f
2979 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2980 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2981 represented in NEW_MODE. If FORCE is true, this will never happen, as
2982 we'll force-create a SUBREG if needed. */
2983
2984 static rtx
2985 emit_move_change_mode (enum machine_mode new_mode,
2986 enum machine_mode old_mode, rtx x, bool force)
2987 {
2988 rtx ret;
2989
2990 if (push_operand (x, GET_MODE (x)))
2991 {
2992 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2993 MEM_COPY_ATTRIBUTES (ret, x);
2994 }
2995 else if (MEM_P (x))
2996 {
2997 /* We don't have to worry about changing the address since the
2998 size in bytes is supposed to be the same. */
2999 if (reload_in_progress)
3000 {
3001 /* Copy the MEM to change the mode and move any
3002 substitutions from the old MEM to the new one. */
3003 ret = adjust_address_nv (x, new_mode, 0);
3004 copy_replacements (x, ret);
3005 }
3006 else
3007 ret = adjust_address (x, new_mode, 0);
3008 }
3009 else
3010 {
3011 /* Note that we do want simplify_subreg's behavior of validating
3012 that the new mode is ok for a hard register. If we were to use
3013 simplify_gen_subreg, we would create the subreg, but would
3014 probably run into the target not being able to implement it. */
3015 /* Except, of course, when FORCE is true, when this is exactly what
3016 we want. Which is needed for CCmodes on some targets. */
3017 if (force)
3018 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3019 else
3020 ret = simplify_subreg (new_mode, x, old_mode, 0);
3021 }
3022
3023 return ret;
3024 }
3025
3026 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3027 an integer mode of the same size as MODE. Returns the instruction
3028 emitted, or NULL if such a move could not be generated. */
3029
3030 static rtx
3031 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3032 {
3033 enum machine_mode imode;
3034 enum insn_code code;
3035
3036 /* There must exist a mode of the exact size we require. */
3037 imode = int_mode_for_mode (mode);
3038 if (imode == BLKmode)
3039 return NULL_RTX;
3040
3041 /* The target must support moves in this mode. */
3042 code = optab_handler (mov_optab, imode);
3043 if (code == CODE_FOR_nothing)
3044 return NULL_RTX;
3045
3046 x = emit_move_change_mode (imode, mode, x, force);
3047 if (x == NULL_RTX)
3048 return NULL_RTX;
3049 y = emit_move_change_mode (imode, mode, y, force);
3050 if (y == NULL_RTX)
3051 return NULL_RTX;
3052 return emit_insn (GEN_FCN (code) (x, y));
3053 }
3054
3055 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3056 Return an equivalent MEM that does not use an auto-increment. */
3057
3058 static rtx
3059 emit_move_resolve_push (enum machine_mode mode, rtx x)
3060 {
3061 enum rtx_code code = GET_CODE (XEXP (x, 0));
3062 HOST_WIDE_INT adjust;
3063 rtx temp;
3064
3065 adjust = GET_MODE_SIZE (mode);
3066 #ifdef PUSH_ROUNDING
3067 adjust = PUSH_ROUNDING (adjust);
3068 #endif
3069 if (code == PRE_DEC || code == POST_DEC)
3070 adjust = -adjust;
3071 else if (code == PRE_MODIFY || code == POST_MODIFY)
3072 {
3073 rtx expr = XEXP (XEXP (x, 0), 1);
3074 HOST_WIDE_INT val;
3075
3076 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3077 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3078 val = INTVAL (XEXP (expr, 1));
3079 if (GET_CODE (expr) == MINUS)
3080 val = -val;
3081 gcc_assert (adjust == val || adjust == -val);
3082 adjust = val;
3083 }
3084
3085 /* Do not use anti_adjust_stack, since we don't want to update
3086 stack_pointer_delta. */
3087 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3088 GEN_INT (adjust), stack_pointer_rtx,
3089 0, OPTAB_LIB_WIDEN);
3090 if (temp != stack_pointer_rtx)
3091 emit_move_insn (stack_pointer_rtx, temp);
3092
3093 switch (code)
3094 {
3095 case PRE_INC:
3096 case PRE_DEC:
3097 case PRE_MODIFY:
3098 temp = stack_pointer_rtx;
3099 break;
3100 case POST_INC:
3101 case POST_DEC:
3102 case POST_MODIFY:
3103 temp = plus_constant (stack_pointer_rtx, -adjust);
3104 break;
3105 default:
3106 gcc_unreachable ();
3107 }
3108
3109 return replace_equiv_address (x, temp);
3110 }
3111
3112 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3113 X is known to satisfy push_operand, and MODE is known to be complex.
3114 Returns the last instruction emitted. */
3115
3116 rtx
3117 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3118 {
3119 enum machine_mode submode = GET_MODE_INNER (mode);
3120 bool imag_first;
3121
3122 #ifdef PUSH_ROUNDING
3123 unsigned int submodesize = GET_MODE_SIZE (submode);
3124
3125 /* In case we output to the stack, but the size is smaller than the
3126 machine can push exactly, we need to use move instructions. */
3127 if (PUSH_ROUNDING (submodesize) != submodesize)
3128 {
3129 x = emit_move_resolve_push (mode, x);
3130 return emit_move_insn (x, y);
3131 }
3132 #endif
3133
3134 /* Note that the real part always precedes the imag part in memory
3135 regardless of machine's endianness. */
3136 switch (GET_CODE (XEXP (x, 0)))
3137 {
3138 case PRE_DEC:
3139 case POST_DEC:
3140 imag_first = true;
3141 break;
3142 case PRE_INC:
3143 case POST_INC:
3144 imag_first = false;
3145 break;
3146 default:
3147 gcc_unreachable ();
3148 }
3149
3150 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3151 read_complex_part (y, imag_first));
3152 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3153 read_complex_part (y, !imag_first));
3154 }
3155
3156 /* A subroutine of emit_move_complex. Perform the move from Y to X
3157 via two moves of the parts. Returns the last instruction emitted. */
3158
3159 rtx
3160 emit_move_complex_parts (rtx x, rtx y)
3161 {
3162 /* Show the output dies here. This is necessary for SUBREGs
3163 of pseudos since we cannot track their lifetimes correctly;
3164 hard regs shouldn't appear here except as return values. */
3165 if (!reload_completed && !reload_in_progress
3166 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3167 emit_clobber (x);
3168
3169 write_complex_part (x, read_complex_part (y, false), false);
3170 write_complex_part (x, read_complex_part (y, true), true);
3171
3172 return get_last_insn ();
3173 }
3174
3175 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3176 MODE is known to be complex. Returns the last instruction emitted. */
3177
3178 static rtx
3179 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3180 {
3181 bool try_int;
3182
3183 /* Need to take special care for pushes, to maintain proper ordering
3184 of the data, and possibly extra padding. */
3185 if (push_operand (x, mode))
3186 return emit_move_complex_push (mode, x, y);
3187
3188 /* See if we can coerce the target into moving both values at once. */
3189
3190 /* Move floating point as parts. */
3191 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3192 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3193 try_int = false;
3194 /* Not possible if the values are inherently not adjacent. */
3195 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3196 try_int = false;
3197 /* Is possible if both are registers (or subregs of registers). */
3198 else if (register_operand (x, mode) && register_operand (y, mode))
3199 try_int = true;
3200 /* If one of the operands is a memory, and alignment constraints
3201 are friendly enough, we may be able to do combined memory operations.
3202 We do not attempt this if Y is a constant because that combination is
3203 usually better with the by-parts thing below. */
3204 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3205 && (!STRICT_ALIGNMENT
3206 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3207 try_int = true;
3208 else
3209 try_int = false;
3210
3211 if (try_int)
3212 {
3213 rtx ret;
3214
3215 /* For memory to memory moves, optimal behavior can be had with the
3216 existing block move logic. */
3217 if (MEM_P (x) && MEM_P (y))
3218 {
3219 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3220 BLOCK_OP_NO_LIBCALL);
3221 return get_last_insn ();
3222 }
3223
3224 ret = emit_move_via_integer (mode, x, y, true);
3225 if (ret)
3226 return ret;
3227 }
3228
3229 return emit_move_complex_parts (x, y);
3230 }
3231
3232 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3233 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3234
3235 static rtx
3236 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3237 {
3238 rtx ret;
3239
3240 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3241 if (mode != CCmode)
3242 {
3243 enum insn_code code = optab_handler (mov_optab, CCmode);
3244 if (code != CODE_FOR_nothing)
3245 {
3246 x = emit_move_change_mode (CCmode, mode, x, true);
3247 y = emit_move_change_mode (CCmode, mode, y, true);
3248 return emit_insn (GEN_FCN (code) (x, y));
3249 }
3250 }
3251
3252 /* Otherwise, find the MODE_INT mode of the same width. */
3253 ret = emit_move_via_integer (mode, x, y, false);
3254 gcc_assert (ret != NULL);
3255 return ret;
3256 }
3257
3258 /* Return true if word I of OP lies entirely in the
3259 undefined bits of a paradoxical subreg. */
3260
3261 static bool
3262 undefined_operand_subword_p (const_rtx op, int i)
3263 {
3264 enum machine_mode innermode, innermostmode;
3265 int offset;
3266 if (GET_CODE (op) != SUBREG)
3267 return false;
3268 innermode = GET_MODE (op);
3269 innermostmode = GET_MODE (SUBREG_REG (op));
3270 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3271 /* The SUBREG_BYTE represents offset, as if the value were stored in
3272 memory, except for a paradoxical subreg where we define
3273 SUBREG_BYTE to be 0; undo this exception as in
3274 simplify_subreg. */
3275 if (SUBREG_BYTE (op) == 0
3276 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3277 {
3278 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3279 if (WORDS_BIG_ENDIAN)
3280 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3281 if (BYTES_BIG_ENDIAN)
3282 offset += difference % UNITS_PER_WORD;
3283 }
3284 if (offset >= GET_MODE_SIZE (innermostmode)
3285 || offset <= -GET_MODE_SIZE (word_mode))
3286 return true;
3287 return false;
3288 }
3289
3290 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3291 MODE is any multi-word or full-word mode that lacks a move_insn
3292 pattern. Note that you will get better code if you define such
3293 patterns, even if they must turn into multiple assembler instructions. */
3294
3295 static rtx
3296 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3297 {
3298 rtx last_insn = 0;
3299 rtx seq, inner;
3300 bool need_clobber;
3301 int i;
3302
3303 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3304
3305 /* If X is a push on the stack, do the push now and replace
3306 X with a reference to the stack pointer. */
3307 if (push_operand (x, mode))
3308 x = emit_move_resolve_push (mode, x);
3309
3310 /* If we are in reload, see if either operand is a MEM whose address
3311 is scheduled for replacement. */
3312 if (reload_in_progress && MEM_P (x)
3313 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3314 x = replace_equiv_address_nv (x, inner);
3315 if (reload_in_progress && MEM_P (y)
3316 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3317 y = replace_equiv_address_nv (y, inner);
3318
3319 start_sequence ();
3320
3321 need_clobber = false;
3322 for (i = 0;
3323 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3324 i++)
3325 {
3326 rtx xpart = operand_subword (x, i, 1, mode);
3327 rtx ypart;
3328
3329 /* Do not generate code for a move if it would come entirely
3330 from the undefined bits of a paradoxical subreg. */
3331 if (undefined_operand_subword_p (y, i))
3332 continue;
3333
3334 ypart = operand_subword (y, i, 1, mode);
3335
3336 /* If we can't get a part of Y, put Y into memory if it is a
3337 constant. Otherwise, force it into a register. Then we must
3338 be able to get a part of Y. */
3339 if (ypart == 0 && CONSTANT_P (y))
3340 {
3341 y = use_anchored_address (force_const_mem (mode, y));
3342 ypart = operand_subword (y, i, 1, mode);
3343 }
3344 else if (ypart == 0)
3345 ypart = operand_subword_force (y, i, mode);
3346
3347 gcc_assert (xpart && ypart);
3348
3349 need_clobber |= (GET_CODE (xpart) == SUBREG);
3350
3351 last_insn = emit_move_insn (xpart, ypart);
3352 }
3353
3354 seq = get_insns ();
3355 end_sequence ();
3356
3357 /* Show the output dies here. This is necessary for SUBREGs
3358 of pseudos since we cannot track their lifetimes correctly;
3359 hard regs shouldn't appear here except as return values.
3360 We never want to emit such a clobber after reload. */
3361 if (x != y
3362 && ! (reload_in_progress || reload_completed)
3363 && need_clobber != 0)
3364 emit_clobber (x);
3365
3366 emit_insn (seq);
3367
3368 return last_insn;
3369 }
3370
3371 /* Low level part of emit_move_insn.
3372 Called just like emit_move_insn, but assumes X and Y
3373 are basically valid. */
3374
3375 rtx
3376 emit_move_insn_1 (rtx x, rtx y)
3377 {
3378 enum machine_mode mode = GET_MODE (x);
3379 enum insn_code code;
3380
3381 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3382
3383 code = optab_handler (mov_optab, mode);
3384 if (code != CODE_FOR_nothing)
3385 return emit_insn (GEN_FCN (code) (x, y));
3386
3387 /* Expand complex moves by moving real part and imag part. */
3388 if (COMPLEX_MODE_P (mode))
3389 return emit_move_complex (mode, x, y);
3390
3391 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3392 || ALL_FIXED_POINT_MODE_P (mode))
3393 {
3394 rtx result = emit_move_via_integer (mode, x, y, true);
3395
3396 /* If we can't find an integer mode, use multi words. */
3397 if (result)
3398 return result;
3399 else
3400 return emit_move_multi_word (mode, x, y);
3401 }
3402
3403 if (GET_MODE_CLASS (mode) == MODE_CC)
3404 return emit_move_ccmode (mode, x, y);
3405
3406 /* Try using a move pattern for the corresponding integer mode. This is
3407 only safe when simplify_subreg can convert MODE constants into integer
3408 constants. At present, it can only do this reliably if the value
3409 fits within a HOST_WIDE_INT. */
3410 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3411 {
3412 rtx ret = emit_move_via_integer (mode, x, y, false);
3413 if (ret)
3414 return ret;
3415 }
3416
3417 return emit_move_multi_word (mode, x, y);
3418 }
3419
3420 /* Generate code to copy Y into X.
3421 Both Y and X must have the same mode, except that
3422 Y can be a constant with VOIDmode.
3423 This mode cannot be BLKmode; use emit_block_move for that.
3424
3425 Return the last instruction emitted. */
3426
3427 rtx
3428 emit_move_insn (rtx x, rtx y)
3429 {
3430 enum machine_mode mode = GET_MODE (x);
3431 rtx y_cst = NULL_RTX;
3432 rtx last_insn, set;
3433
3434 gcc_assert (mode != BLKmode
3435 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3436
3437 if (CONSTANT_P (y))
3438 {
3439 if (optimize
3440 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3441 && (last_insn = compress_float_constant (x, y)))
3442 return last_insn;
3443
3444 y_cst = y;
3445
3446 if (!targetm.legitimate_constant_p (mode, y))
3447 {
3448 y = force_const_mem (mode, y);
3449
3450 /* If the target's cannot_force_const_mem prevented the spill,
3451 assume that the target's move expanders will also take care
3452 of the non-legitimate constant. */
3453 if (!y)
3454 y = y_cst;
3455 else
3456 y = use_anchored_address (y);
3457 }
3458 }
3459
3460 /* If X or Y are memory references, verify that their addresses are valid
3461 for the machine. */
3462 if (MEM_P (x)
3463 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3464 MEM_ADDR_SPACE (x))
3465 && ! push_operand (x, GET_MODE (x))))
3466 x = validize_mem (x);
3467
3468 if (MEM_P (y)
3469 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3470 MEM_ADDR_SPACE (y)))
3471 y = validize_mem (y);
3472
3473 gcc_assert (mode != BLKmode);
3474
3475 last_insn = emit_move_insn_1 (x, y);
3476
3477 if (y_cst && REG_P (x)
3478 && (set = single_set (last_insn)) != NULL_RTX
3479 && SET_DEST (set) == x
3480 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3481 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3482
3483 return last_insn;
3484 }
3485
3486 /* If Y is representable exactly in a narrower mode, and the target can
3487 perform the extension directly from constant or memory, then emit the
3488 move as an extension. */
3489
3490 static rtx
3491 compress_float_constant (rtx x, rtx y)
3492 {
3493 enum machine_mode dstmode = GET_MODE (x);
3494 enum machine_mode orig_srcmode = GET_MODE (y);
3495 enum machine_mode srcmode;
3496 REAL_VALUE_TYPE r;
3497 int oldcost, newcost;
3498 bool speed = optimize_insn_for_speed_p ();
3499
3500 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3501
3502 if (targetm.legitimate_constant_p (dstmode, y))
3503 oldcost = set_src_cost (y, speed);
3504 else
3505 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3506
3507 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3508 srcmode != orig_srcmode;
3509 srcmode = GET_MODE_WIDER_MODE (srcmode))
3510 {
3511 enum insn_code ic;
3512 rtx trunc_y, last_insn;
3513
3514 /* Skip if the target can't extend this way. */
3515 ic = can_extend_p (dstmode, srcmode, 0);
3516 if (ic == CODE_FOR_nothing)
3517 continue;
3518
3519 /* Skip if the narrowed value isn't exact. */
3520 if (! exact_real_truncate (srcmode, &r))
3521 continue;
3522
3523 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3524
3525 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3526 {
3527 /* Skip if the target needs extra instructions to perform
3528 the extension. */
3529 if (!insn_operand_matches (ic, 1, trunc_y))
3530 continue;
3531 /* This is valid, but may not be cheaper than the original. */
3532 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3533 speed);
3534 if (oldcost < newcost)
3535 continue;
3536 }
3537 else if (float_extend_from_mem[dstmode][srcmode])
3538 {
3539 trunc_y = force_const_mem (srcmode, trunc_y);
3540 /* This is valid, but may not be cheaper than the original. */
3541 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3542 speed);
3543 if (oldcost < newcost)
3544 continue;
3545 trunc_y = validize_mem (trunc_y);
3546 }
3547 else
3548 continue;
3549
3550 /* For CSE's benefit, force the compressed constant pool entry
3551 into a new pseudo. This constant may be used in different modes,
3552 and if not, combine will put things back together for us. */
3553 trunc_y = force_reg (srcmode, trunc_y);
3554 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3555 last_insn = get_last_insn ();
3556
3557 if (REG_P (x))
3558 set_unique_reg_note (last_insn, REG_EQUAL, y);
3559
3560 return last_insn;
3561 }
3562
3563 return NULL_RTX;
3564 }
3565 \f
3566 /* Pushing data onto the stack. */
3567
3568 /* Push a block of length SIZE (perhaps variable)
3569 and return an rtx to address the beginning of the block.
3570 The value may be virtual_outgoing_args_rtx.
3571
3572 EXTRA is the number of bytes of padding to push in addition to SIZE.
3573 BELOW nonzero means this padding comes at low addresses;
3574 otherwise, the padding comes at high addresses. */
3575
3576 rtx
3577 push_block (rtx size, int extra, int below)
3578 {
3579 rtx temp;
3580
3581 size = convert_modes (Pmode, ptr_mode, size, 1);
3582 if (CONSTANT_P (size))
3583 anti_adjust_stack (plus_constant (size, extra));
3584 else if (REG_P (size) && extra == 0)
3585 anti_adjust_stack (size);
3586 else
3587 {
3588 temp = copy_to_mode_reg (Pmode, size);
3589 if (extra != 0)
3590 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3591 temp, 0, OPTAB_LIB_WIDEN);
3592 anti_adjust_stack (temp);
3593 }
3594
3595 #ifndef STACK_GROWS_DOWNWARD
3596 if (0)
3597 #else
3598 if (1)
3599 #endif
3600 {
3601 temp = virtual_outgoing_args_rtx;
3602 if (extra != 0 && below)
3603 temp = plus_constant (temp, extra);
3604 }
3605 else
3606 {
3607 if (CONST_INT_P (size))
3608 temp = plus_constant (virtual_outgoing_args_rtx,
3609 -INTVAL (size) - (below ? 0 : extra));
3610 else if (extra != 0 && !below)
3611 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3612 negate_rtx (Pmode, plus_constant (size, extra)));
3613 else
3614 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3615 negate_rtx (Pmode, size));
3616 }
3617
3618 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3619 }
3620
3621 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3622
3623 static rtx
3624 mem_autoinc_base (rtx mem)
3625 {
3626 if (MEM_P (mem))
3627 {
3628 rtx addr = XEXP (mem, 0);
3629 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3630 return XEXP (addr, 0);
3631 }
3632 return NULL;
3633 }
3634
3635 /* A utility routine used here, in reload, and in try_split. The insns
3636 after PREV up to and including LAST are known to adjust the stack,
3637 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3638 placing notes as appropriate. PREV may be NULL, indicating the
3639 entire insn sequence prior to LAST should be scanned.
3640
3641 The set of allowed stack pointer modifications is small:
3642 (1) One or more auto-inc style memory references (aka pushes),
3643 (2) One or more addition/subtraction with the SP as destination,
3644 (3) A single move insn with the SP as destination,
3645 (4) A call_pop insn,
3646 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3647
3648 Insns in the sequence that do not modify the SP are ignored,
3649 except for noreturn calls.
3650
3651 The return value is the amount of adjustment that can be trivially
3652 verified, via immediate operand or auto-inc. If the adjustment
3653 cannot be trivially extracted, the return value is INT_MIN. */
3654
3655 HOST_WIDE_INT
3656 find_args_size_adjust (rtx insn)
3657 {
3658 rtx dest, set, pat;
3659 int i;
3660
3661 pat = PATTERN (insn);
3662 set = NULL;
3663
3664 /* Look for a call_pop pattern. */
3665 if (CALL_P (insn))
3666 {
3667 /* We have to allow non-call_pop patterns for the case
3668 of emit_single_push_insn of a TLS address. */
3669 if (GET_CODE (pat) != PARALLEL)
3670 return 0;
3671
3672 /* All call_pop have a stack pointer adjust in the parallel.
3673 The call itself is always first, and the stack adjust is
3674 usually last, so search from the end. */
3675 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3676 {
3677 set = XVECEXP (pat, 0, i);
3678 if (GET_CODE (set) != SET)
3679 continue;
3680 dest = SET_DEST (set);
3681 if (dest == stack_pointer_rtx)
3682 break;
3683 }
3684 /* We'd better have found the stack pointer adjust. */
3685 if (i == 0)
3686 return 0;
3687 /* Fall through to process the extracted SET and DEST
3688 as if it was a standalone insn. */
3689 }
3690 else if (GET_CODE (pat) == SET)
3691 set = pat;
3692 else if ((set = single_set (insn)) != NULL)
3693 ;
3694 else if (GET_CODE (pat) == PARALLEL)
3695 {
3696 /* ??? Some older ports use a parallel with a stack adjust
3697 and a store for a PUSH_ROUNDING pattern, rather than a
3698 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3699 /* ??? See h8300 and m68k, pushqi1. */
3700 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3701 {
3702 set = XVECEXP (pat, 0, i);
3703 if (GET_CODE (set) != SET)
3704 continue;
3705 dest = SET_DEST (set);
3706 if (dest == stack_pointer_rtx)
3707 break;
3708
3709 /* We do not expect an auto-inc of the sp in the parallel. */
3710 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3711 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3712 != stack_pointer_rtx);
3713 }
3714 if (i < 0)
3715 return 0;
3716 }
3717 else
3718 return 0;
3719
3720 dest = SET_DEST (set);
3721
3722 /* Look for direct modifications of the stack pointer. */
3723 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3724 {
3725 /* Look for a trivial adjustment, otherwise assume nothing. */
3726 /* Note that the SPU restore_stack_block pattern refers to
3727 the stack pointer in V4SImode. Consider that non-trivial. */
3728 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3729 && GET_CODE (SET_SRC (set)) == PLUS
3730 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3731 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3732 return INTVAL (XEXP (SET_SRC (set), 1));
3733 /* ??? Reload can generate no-op moves, which will be cleaned
3734 up later. Recognize it and continue searching. */
3735 else if (rtx_equal_p (dest, SET_SRC (set)))
3736 return 0;
3737 else
3738 return HOST_WIDE_INT_MIN;
3739 }
3740 else
3741 {
3742 rtx mem, addr;
3743
3744 /* Otherwise only think about autoinc patterns. */
3745 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3746 {
3747 mem = dest;
3748 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3749 != stack_pointer_rtx);
3750 }
3751 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3752 mem = SET_SRC (set);
3753 else
3754 return 0;
3755
3756 addr = XEXP (mem, 0);
3757 switch (GET_CODE (addr))
3758 {
3759 case PRE_INC:
3760 case POST_INC:
3761 return GET_MODE_SIZE (GET_MODE (mem));
3762 case PRE_DEC:
3763 case POST_DEC:
3764 return -GET_MODE_SIZE (GET_MODE (mem));
3765 case PRE_MODIFY:
3766 case POST_MODIFY:
3767 addr = XEXP (addr, 1);
3768 gcc_assert (GET_CODE (addr) == PLUS);
3769 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3770 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3771 return INTVAL (XEXP (addr, 1));
3772 default:
3773 gcc_unreachable ();
3774 }
3775 }
3776 }
3777
3778 int
3779 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3780 {
3781 int args_size = end_args_size;
3782 bool saw_unknown = false;
3783 rtx insn;
3784
3785 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3786 {
3787 HOST_WIDE_INT this_delta;
3788
3789 if (!NONDEBUG_INSN_P (insn))
3790 continue;
3791
3792 this_delta = find_args_size_adjust (insn);
3793 if (this_delta == 0)
3794 {
3795 if (!CALL_P (insn)
3796 || ACCUMULATE_OUTGOING_ARGS
3797 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3798 continue;
3799 }
3800
3801 gcc_assert (!saw_unknown);
3802 if (this_delta == HOST_WIDE_INT_MIN)
3803 saw_unknown = true;
3804
3805 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3806 #ifdef STACK_GROWS_DOWNWARD
3807 this_delta = -this_delta;
3808 #endif
3809 args_size -= this_delta;
3810 }
3811
3812 return saw_unknown ? INT_MIN : args_size;
3813 }
3814
3815 #ifdef PUSH_ROUNDING
3816 /* Emit single push insn. */
3817
3818 static void
3819 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3820 {
3821 rtx dest_addr;
3822 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3823 rtx dest;
3824 enum insn_code icode;
3825
3826 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3827 /* If there is push pattern, use it. Otherwise try old way of throwing
3828 MEM representing push operation to move expander. */
3829 icode = optab_handler (push_optab, mode);
3830 if (icode != CODE_FOR_nothing)
3831 {
3832 struct expand_operand ops[1];
3833
3834 create_input_operand (&ops[0], x, mode);
3835 if (maybe_expand_insn (icode, 1, ops))
3836 return;
3837 }
3838 if (GET_MODE_SIZE (mode) == rounded_size)
3839 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3840 /* If we are to pad downward, adjust the stack pointer first and
3841 then store X into the stack location using an offset. This is
3842 because emit_move_insn does not know how to pad; it does not have
3843 access to type. */
3844 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3845 {
3846 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3847 HOST_WIDE_INT offset;
3848
3849 emit_move_insn (stack_pointer_rtx,
3850 expand_binop (Pmode,
3851 #ifdef STACK_GROWS_DOWNWARD
3852 sub_optab,
3853 #else
3854 add_optab,
3855 #endif
3856 stack_pointer_rtx,
3857 GEN_INT (rounded_size),
3858 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3859
3860 offset = (HOST_WIDE_INT) padding_size;
3861 #ifdef STACK_GROWS_DOWNWARD
3862 if (STACK_PUSH_CODE == POST_DEC)
3863 /* We have already decremented the stack pointer, so get the
3864 previous value. */
3865 offset += (HOST_WIDE_INT) rounded_size;
3866 #else
3867 if (STACK_PUSH_CODE == POST_INC)
3868 /* We have already incremented the stack pointer, so get the
3869 previous value. */
3870 offset -= (HOST_WIDE_INT) rounded_size;
3871 #endif
3872 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3873 }
3874 else
3875 {
3876 #ifdef STACK_GROWS_DOWNWARD
3877 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3878 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3879 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3880 #else
3881 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3882 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3883 GEN_INT (rounded_size));
3884 #endif
3885 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3886 }
3887
3888 dest = gen_rtx_MEM (mode, dest_addr);
3889
3890 if (type != 0)
3891 {
3892 set_mem_attributes (dest, type, 1);
3893
3894 if (flag_optimize_sibling_calls)
3895 /* Function incoming arguments may overlap with sibling call
3896 outgoing arguments and we cannot allow reordering of reads
3897 from function arguments with stores to outgoing arguments
3898 of sibling calls. */
3899 set_mem_alias_set (dest, 0);
3900 }
3901 emit_move_insn (dest, x);
3902 }
3903
3904 /* Emit and annotate a single push insn. */
3905
3906 static void
3907 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3908 {
3909 int delta, old_delta = stack_pointer_delta;
3910 rtx prev = get_last_insn ();
3911 rtx last;
3912
3913 emit_single_push_insn_1 (mode, x, type);
3914
3915 last = get_last_insn ();
3916
3917 /* Notice the common case where we emitted exactly one insn. */
3918 if (PREV_INSN (last) == prev)
3919 {
3920 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3921 return;
3922 }
3923
3924 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3925 gcc_assert (delta == INT_MIN || delta == old_delta);
3926 }
3927 #endif
3928
3929 /* Generate code to push X onto the stack, assuming it has mode MODE and
3930 type TYPE.
3931 MODE is redundant except when X is a CONST_INT (since they don't
3932 carry mode info).
3933 SIZE is an rtx for the size of data to be copied (in bytes),
3934 needed only if X is BLKmode.
3935
3936 ALIGN (in bits) is maximum alignment we can assume.
3937
3938 If PARTIAL and REG are both nonzero, then copy that many of the first
3939 bytes of X into registers starting with REG, and push the rest of X.
3940 The amount of space pushed is decreased by PARTIAL bytes.
3941 REG must be a hard register in this case.
3942 If REG is zero but PARTIAL is not, take any all others actions for an
3943 argument partially in registers, but do not actually load any
3944 registers.
3945
3946 EXTRA is the amount in bytes of extra space to leave next to this arg.
3947 This is ignored if an argument block has already been allocated.
3948
3949 On a machine that lacks real push insns, ARGS_ADDR is the address of
3950 the bottom of the argument block for this call. We use indexing off there
3951 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3952 argument block has not been preallocated.
3953
3954 ARGS_SO_FAR is the size of args previously pushed for this call.
3955
3956 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3957 for arguments passed in registers. If nonzero, it will be the number
3958 of bytes required. */
3959
3960 void
3961 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3962 unsigned int align, int partial, rtx reg, int extra,
3963 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3964 rtx alignment_pad)
3965 {
3966 rtx xinner;
3967 enum direction stack_direction
3968 #ifdef STACK_GROWS_DOWNWARD
3969 = downward;
3970 #else
3971 = upward;
3972 #endif
3973
3974 /* Decide where to pad the argument: `downward' for below,
3975 `upward' for above, or `none' for don't pad it.
3976 Default is below for small data on big-endian machines; else above. */
3977 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3978
3979 /* Invert direction if stack is post-decrement.
3980 FIXME: why? */
3981 if (STACK_PUSH_CODE == POST_DEC)
3982 if (where_pad != none)
3983 where_pad = (where_pad == downward ? upward : downward);
3984
3985 xinner = x;
3986
3987 if (mode == BLKmode
3988 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3989 {
3990 /* Copy a block into the stack, entirely or partially. */
3991
3992 rtx temp;
3993 int used;
3994 int offset;
3995 int skip;
3996
3997 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3998 used = partial - offset;
3999
4000 if (mode != BLKmode)
4001 {
4002 /* A value is to be stored in an insufficiently aligned
4003 stack slot; copy via a suitably aligned slot if
4004 necessary. */
4005 size = GEN_INT (GET_MODE_SIZE (mode));
4006 if (!MEM_P (xinner))
4007 {
4008 temp = assign_temp (type, 0, 1, 1);
4009 emit_move_insn (temp, xinner);
4010 xinner = temp;
4011 }
4012 }
4013
4014 gcc_assert (size);
4015
4016 /* USED is now the # of bytes we need not copy to the stack
4017 because registers will take care of them. */
4018
4019 if (partial != 0)
4020 xinner = adjust_address (xinner, BLKmode, used);
4021
4022 /* If the partial register-part of the arg counts in its stack size,
4023 skip the part of stack space corresponding to the registers.
4024 Otherwise, start copying to the beginning of the stack space,
4025 by setting SKIP to 0. */
4026 skip = (reg_parm_stack_space == 0) ? 0 : used;
4027
4028 #ifdef PUSH_ROUNDING
4029 /* Do it with several push insns if that doesn't take lots of insns
4030 and if there is no difficulty with push insns that skip bytes
4031 on the stack for alignment purposes. */
4032 if (args_addr == 0
4033 && PUSH_ARGS
4034 && CONST_INT_P (size)
4035 && skip == 0
4036 && MEM_ALIGN (xinner) >= align
4037 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
4038 /* Here we avoid the case of a structure whose weak alignment
4039 forces many pushes of a small amount of data,
4040 and such small pushes do rounding that causes trouble. */
4041 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4042 || align >= BIGGEST_ALIGNMENT
4043 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4044 == (align / BITS_PER_UNIT)))
4045 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4046 {
4047 /* Push padding now if padding above and stack grows down,
4048 or if padding below and stack grows up.
4049 But if space already allocated, this has already been done. */
4050 if (extra && args_addr == 0
4051 && where_pad != none && where_pad != stack_direction)
4052 anti_adjust_stack (GEN_INT (extra));
4053
4054 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4055 }
4056 else
4057 #endif /* PUSH_ROUNDING */
4058 {
4059 rtx target;
4060
4061 /* Otherwise make space on the stack and copy the data
4062 to the address of that space. */
4063
4064 /* Deduct words put into registers from the size we must copy. */
4065 if (partial != 0)
4066 {
4067 if (CONST_INT_P (size))
4068 size = GEN_INT (INTVAL (size) - used);
4069 else
4070 size = expand_binop (GET_MODE (size), sub_optab, size,
4071 GEN_INT (used), NULL_RTX, 0,
4072 OPTAB_LIB_WIDEN);
4073 }
4074
4075 /* Get the address of the stack space.
4076 In this case, we do not deal with EXTRA separately.
4077 A single stack adjust will do. */
4078 if (! args_addr)
4079 {
4080 temp = push_block (size, extra, where_pad == downward);
4081 extra = 0;
4082 }
4083 else if (CONST_INT_P (args_so_far))
4084 temp = memory_address (BLKmode,
4085 plus_constant (args_addr,
4086 skip + INTVAL (args_so_far)));
4087 else
4088 temp = memory_address (BLKmode,
4089 plus_constant (gen_rtx_PLUS (Pmode,
4090 args_addr,
4091 args_so_far),
4092 skip));
4093
4094 if (!ACCUMULATE_OUTGOING_ARGS)
4095 {
4096 /* If the source is referenced relative to the stack pointer,
4097 copy it to another register to stabilize it. We do not need
4098 to do this if we know that we won't be changing sp. */
4099
4100 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4101 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4102 temp = copy_to_reg (temp);
4103 }
4104
4105 target = gen_rtx_MEM (BLKmode, temp);
4106
4107 /* We do *not* set_mem_attributes here, because incoming arguments
4108 may overlap with sibling call outgoing arguments and we cannot
4109 allow reordering of reads from function arguments with stores
4110 to outgoing arguments of sibling calls. We do, however, want
4111 to record the alignment of the stack slot. */
4112 /* ALIGN may well be better aligned than TYPE, e.g. due to
4113 PARM_BOUNDARY. Assume the caller isn't lying. */
4114 set_mem_align (target, align);
4115
4116 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4117 }
4118 }
4119 else if (partial > 0)
4120 {
4121 /* Scalar partly in registers. */
4122
4123 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4124 int i;
4125 int not_stack;
4126 /* # bytes of start of argument
4127 that we must make space for but need not store. */
4128 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4129 int args_offset = INTVAL (args_so_far);
4130 int skip;
4131
4132 /* Push padding now if padding above and stack grows down,
4133 or if padding below and stack grows up.
4134 But if space already allocated, this has already been done. */
4135 if (extra && args_addr == 0
4136 && where_pad != none && where_pad != stack_direction)
4137 anti_adjust_stack (GEN_INT (extra));
4138
4139 /* If we make space by pushing it, we might as well push
4140 the real data. Otherwise, we can leave OFFSET nonzero
4141 and leave the space uninitialized. */
4142 if (args_addr == 0)
4143 offset = 0;
4144
4145 /* Now NOT_STACK gets the number of words that we don't need to
4146 allocate on the stack. Convert OFFSET to words too. */
4147 not_stack = (partial - offset) / UNITS_PER_WORD;
4148 offset /= UNITS_PER_WORD;
4149
4150 /* If the partial register-part of the arg counts in its stack size,
4151 skip the part of stack space corresponding to the registers.
4152 Otherwise, start copying to the beginning of the stack space,
4153 by setting SKIP to 0. */
4154 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4155
4156 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4157 x = validize_mem (force_const_mem (mode, x));
4158
4159 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4160 SUBREGs of such registers are not allowed. */
4161 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4162 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4163 x = copy_to_reg (x);
4164
4165 /* Loop over all the words allocated on the stack for this arg. */
4166 /* We can do it by words, because any scalar bigger than a word
4167 has a size a multiple of a word. */
4168 #ifndef PUSH_ARGS_REVERSED
4169 for (i = not_stack; i < size; i++)
4170 #else
4171 for (i = size - 1; i >= not_stack; i--)
4172 #endif
4173 if (i >= not_stack + offset)
4174 emit_push_insn (operand_subword_force (x, i, mode),
4175 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4176 0, args_addr,
4177 GEN_INT (args_offset + ((i - not_stack + skip)
4178 * UNITS_PER_WORD)),
4179 reg_parm_stack_space, alignment_pad);
4180 }
4181 else
4182 {
4183 rtx addr;
4184 rtx dest;
4185
4186 /* Push padding now if padding above and stack grows down,
4187 or if padding below and stack grows up.
4188 But if space already allocated, this has already been done. */
4189 if (extra && args_addr == 0
4190 && where_pad != none && where_pad != stack_direction)
4191 anti_adjust_stack (GEN_INT (extra));
4192
4193 #ifdef PUSH_ROUNDING
4194 if (args_addr == 0 && PUSH_ARGS)
4195 emit_single_push_insn (mode, x, type);
4196 else
4197 #endif
4198 {
4199 if (CONST_INT_P (args_so_far))
4200 addr
4201 = memory_address (mode,
4202 plus_constant (args_addr,
4203 INTVAL (args_so_far)));
4204 else
4205 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4206 args_so_far));
4207 dest = gen_rtx_MEM (mode, addr);
4208
4209 /* We do *not* set_mem_attributes here, because incoming arguments
4210 may overlap with sibling call outgoing arguments and we cannot
4211 allow reordering of reads from function arguments with stores
4212 to outgoing arguments of sibling calls. We do, however, want
4213 to record the alignment of the stack slot. */
4214 /* ALIGN may well be better aligned than TYPE, e.g. due to
4215 PARM_BOUNDARY. Assume the caller isn't lying. */
4216 set_mem_align (dest, align);
4217
4218 emit_move_insn (dest, x);
4219 }
4220 }
4221
4222 /* If part should go in registers, copy that part
4223 into the appropriate registers. Do this now, at the end,
4224 since mem-to-mem copies above may do function calls. */
4225 if (partial > 0 && reg != 0)
4226 {
4227 /* Handle calls that pass values in multiple non-contiguous locations.
4228 The Irix 6 ABI has examples of this. */
4229 if (GET_CODE (reg) == PARALLEL)
4230 emit_group_load (reg, x, type, -1);
4231 else
4232 {
4233 gcc_assert (partial % UNITS_PER_WORD == 0);
4234 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4235 }
4236 }
4237
4238 if (extra && args_addr == 0 && where_pad == stack_direction)
4239 anti_adjust_stack (GEN_INT (extra));
4240
4241 if (alignment_pad && args_addr == 0)
4242 anti_adjust_stack (alignment_pad);
4243 }
4244 \f
4245 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4246 operations. */
4247
4248 static rtx
4249 get_subtarget (rtx x)
4250 {
4251 return (optimize
4252 || x == 0
4253 /* Only registers can be subtargets. */
4254 || !REG_P (x)
4255 /* Don't use hard regs to avoid extending their life. */
4256 || REGNO (x) < FIRST_PSEUDO_REGISTER
4257 ? 0 : x);
4258 }
4259
4260 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4261 FIELD is a bitfield. Returns true if the optimization was successful,
4262 and there's nothing else to do. */
4263
4264 static bool
4265 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4266 unsigned HOST_WIDE_INT bitpos,
4267 unsigned HOST_WIDE_INT bitregion_start,
4268 unsigned HOST_WIDE_INT bitregion_end,
4269 enum machine_mode mode1, rtx str_rtx,
4270 tree to, tree src)
4271 {
4272 enum machine_mode str_mode = GET_MODE (str_rtx);
4273 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4274 tree op0, op1;
4275 rtx value, result;
4276 optab binop;
4277 gimple srcstmt;
4278 enum tree_code code;
4279
4280 if (mode1 != VOIDmode
4281 || bitsize >= BITS_PER_WORD
4282 || str_bitsize > BITS_PER_WORD
4283 || TREE_SIDE_EFFECTS (to)
4284 || TREE_THIS_VOLATILE (to))
4285 return false;
4286
4287 STRIP_NOPS (src);
4288 if (TREE_CODE (src) != SSA_NAME)
4289 return false;
4290 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4291 return false;
4292
4293 srcstmt = get_gimple_for_ssa_name (src);
4294 if (!srcstmt
4295 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4296 return false;
4297
4298 code = gimple_assign_rhs_code (srcstmt);
4299
4300 op0 = gimple_assign_rhs1 (srcstmt);
4301
4302 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4303 to find its initialization. Hopefully the initialization will
4304 be from a bitfield load. */
4305 if (TREE_CODE (op0) == SSA_NAME)
4306 {
4307 gimple op0stmt = get_gimple_for_ssa_name (op0);
4308
4309 /* We want to eventually have OP0 be the same as TO, which
4310 should be a bitfield. */
4311 if (!op0stmt
4312 || !is_gimple_assign (op0stmt)
4313 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4314 return false;
4315 op0 = gimple_assign_rhs1 (op0stmt);
4316 }
4317
4318 op1 = gimple_assign_rhs2 (srcstmt);
4319
4320 if (!operand_equal_p (to, op0, 0))
4321 return false;
4322
4323 if (MEM_P (str_rtx))
4324 {
4325 unsigned HOST_WIDE_INT offset1;
4326
4327 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4328 str_mode = word_mode;
4329 str_mode = get_best_mode (bitsize, bitpos,
4330 bitregion_start, bitregion_end,
4331 MEM_ALIGN (str_rtx), str_mode, 0);
4332 if (str_mode == VOIDmode)
4333 return false;
4334 str_bitsize = GET_MODE_BITSIZE (str_mode);
4335
4336 offset1 = bitpos;
4337 bitpos %= str_bitsize;
4338 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4339 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4340 }
4341 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4342 return false;
4343
4344 /* If the bit field covers the whole REG/MEM, store_field
4345 will likely generate better code. */
4346 if (bitsize >= str_bitsize)
4347 return false;
4348
4349 /* We can't handle fields split across multiple entities. */
4350 if (bitpos + bitsize > str_bitsize)
4351 return false;
4352
4353 if (BYTES_BIG_ENDIAN)
4354 bitpos = str_bitsize - bitpos - bitsize;
4355
4356 switch (code)
4357 {
4358 case PLUS_EXPR:
4359 case MINUS_EXPR:
4360 /* For now, just optimize the case of the topmost bitfield
4361 where we don't need to do any masking and also
4362 1 bit bitfields where xor can be used.
4363 We might win by one instruction for the other bitfields
4364 too if insv/extv instructions aren't used, so that
4365 can be added later. */
4366 if (bitpos + bitsize != str_bitsize
4367 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4368 break;
4369
4370 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4371 value = convert_modes (str_mode,
4372 TYPE_MODE (TREE_TYPE (op1)), value,
4373 TYPE_UNSIGNED (TREE_TYPE (op1)));
4374
4375 /* We may be accessing data outside the field, which means
4376 we can alias adjacent data. */
4377 if (MEM_P (str_rtx))
4378 {
4379 str_rtx = shallow_copy_rtx (str_rtx);
4380 set_mem_alias_set (str_rtx, 0);
4381 set_mem_expr (str_rtx, 0);
4382 }
4383
4384 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4385 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4386 {
4387 value = expand_and (str_mode, value, const1_rtx, NULL);
4388 binop = xor_optab;
4389 }
4390 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4391 bitpos, NULL_RTX, 1);
4392 result = expand_binop (str_mode, binop, str_rtx,
4393 value, str_rtx, 1, OPTAB_WIDEN);
4394 if (result != str_rtx)
4395 emit_move_insn (str_rtx, result);
4396 return true;
4397
4398 case BIT_IOR_EXPR:
4399 case BIT_XOR_EXPR:
4400 if (TREE_CODE (op1) != INTEGER_CST)
4401 break;
4402 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4403 value = convert_modes (GET_MODE (str_rtx),
4404 TYPE_MODE (TREE_TYPE (op1)), value,
4405 TYPE_UNSIGNED (TREE_TYPE (op1)));
4406
4407 /* We may be accessing data outside the field, which means
4408 we can alias adjacent data. */
4409 if (MEM_P (str_rtx))
4410 {
4411 str_rtx = shallow_copy_rtx (str_rtx);
4412 set_mem_alias_set (str_rtx, 0);
4413 set_mem_expr (str_rtx, 0);
4414 }
4415
4416 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4417 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4418 {
4419 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4420 - 1);
4421 value = expand_and (GET_MODE (str_rtx), value, mask,
4422 NULL_RTX);
4423 }
4424 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4425 bitpos, NULL_RTX, 1);
4426 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4427 value, str_rtx, 1, OPTAB_WIDEN);
4428 if (result != str_rtx)
4429 emit_move_insn (str_rtx, result);
4430 return true;
4431
4432 default:
4433 break;
4434 }
4435
4436 return false;
4437 }
4438
4439 /* In the C++ memory model, consecutive bit fields in a structure are
4440 considered one memory location.
4441
4442 Given a COMPONENT_REF EXP at bit position BITPOS, this function
4443 returns the bit range of consecutive bits in which this COMPONENT_REF
4444 belongs in. The values are returned in *BITSTART and *BITEND.
4445 If the access does not need to be restricted 0 is returned in
4446 *BITSTART and *BITEND. */
4447
4448 static void
4449 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4450 unsigned HOST_WIDE_INT *bitend,
4451 tree exp,
4452 HOST_WIDE_INT bitpos)
4453 {
4454 unsigned HOST_WIDE_INT bitoffset;
4455 tree field, repr, offset;
4456
4457 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4458
4459 field = TREE_OPERAND (exp, 1);
4460 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4461 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4462 need to limit the range we can access. */
4463 if (!repr)
4464 {
4465 *bitstart = *bitend = 0;
4466 return;
4467 }
4468
4469 /* Compute the adjustment to bitpos from the offset of the field
4470 relative to the representative. */
4471 offset = size_diffop (DECL_FIELD_OFFSET (field),
4472 DECL_FIELD_OFFSET (repr));
4473 bitoffset = (tree_low_cst (offset, 1) * BITS_PER_UNIT
4474 + tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
4475 - tree_low_cst (DECL_FIELD_BIT_OFFSET (repr), 1));
4476
4477 *bitstart = bitpos - bitoffset;
4478 *bitend = *bitstart + tree_low_cst (DECL_SIZE (repr), 1) - 1;
4479 }
4480
4481 /* Returns true if the MEM_REF REF refers to an object that does not
4482 reside in memory and has non-BLKmode. */
4483
4484 static bool
4485 mem_ref_refers_to_non_mem_p (tree ref)
4486 {
4487 tree base = TREE_OPERAND (ref, 0);
4488 if (TREE_CODE (base) != ADDR_EXPR)
4489 return false;
4490 base = TREE_OPERAND (base, 0);
4491 return (DECL_P (base)
4492 && !TREE_ADDRESSABLE (base)
4493 && DECL_MODE (base) != BLKmode
4494 && DECL_RTL_SET_P (base)
4495 && !MEM_P (DECL_RTL (base)));
4496 }
4497
4498 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4499 is true, try generating a nontemporal store. */
4500
4501 void
4502 expand_assignment (tree to, tree from, bool nontemporal)
4503 {
4504 rtx to_rtx = 0;
4505 rtx result;
4506 enum machine_mode mode;
4507 unsigned int align;
4508 enum insn_code icode;
4509
4510 /* Don't crash if the lhs of the assignment was erroneous. */
4511 if (TREE_CODE (to) == ERROR_MARK)
4512 {
4513 expand_normal (from);
4514 return;
4515 }
4516
4517 /* Optimize away no-op moves without side-effects. */
4518 if (operand_equal_p (to, from, 0))
4519 return;
4520
4521 /* Handle misaligned stores. */
4522 mode = TYPE_MODE (TREE_TYPE (to));
4523 if ((TREE_CODE (to) == MEM_REF
4524 || TREE_CODE (to) == TARGET_MEM_REF)
4525 && mode != BLKmode
4526 && !mem_ref_refers_to_non_mem_p (to)
4527 && ((align = get_object_or_type_alignment (to))
4528 < GET_MODE_ALIGNMENT (mode))
4529 && (((icode = optab_handler (movmisalign_optab, mode))
4530 != CODE_FOR_nothing)
4531 || SLOW_UNALIGNED_ACCESS (mode, align)))
4532 {
4533 addr_space_t as
4534 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (to, 0))));
4535 struct expand_operand ops[2];
4536 enum machine_mode address_mode;
4537 rtx reg, op0, mem;
4538
4539 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4540 reg = force_not_mem (reg);
4541
4542 if (TREE_CODE (to) == MEM_REF)
4543 {
4544 tree base = TREE_OPERAND (to, 0);
4545 address_mode = targetm.addr_space.address_mode (as);
4546 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4547 op0 = convert_memory_address_addr_space (address_mode, op0, as);
4548 if (!integer_zerop (TREE_OPERAND (to, 1)))
4549 {
4550 rtx off
4551 = immed_double_int_const (mem_ref_offset (to), address_mode);
4552 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
4553 }
4554 op0 = memory_address_addr_space (mode, op0, as);
4555 mem = gen_rtx_MEM (mode, op0);
4556 set_mem_attributes (mem, to, 0);
4557 set_mem_addr_space (mem, as);
4558 }
4559 else if (TREE_CODE (to) == TARGET_MEM_REF)
4560 {
4561 struct mem_address addr;
4562 get_address_description (to, &addr);
4563 op0 = addr_for_mem_ref (&addr, as, true);
4564 op0 = memory_address_addr_space (mode, op0, as);
4565 mem = gen_rtx_MEM (mode, op0);
4566 set_mem_attributes (mem, to, 0);
4567 set_mem_addr_space (mem, as);
4568 }
4569 else
4570 gcc_unreachable ();
4571 if (TREE_THIS_VOLATILE (to))
4572 MEM_VOLATILE_P (mem) = 1;
4573
4574 if (icode != CODE_FOR_nothing)
4575 {
4576 create_fixed_operand (&ops[0], mem);
4577 create_input_operand (&ops[1], reg, mode);
4578 /* The movmisalign<mode> pattern cannot fail, else the assignment
4579 would silently be omitted. */
4580 expand_insn (icode, 2, ops);
4581 }
4582 else
4583 store_bit_field (mem, GET_MODE_BITSIZE (mode),
4584 0, 0, 0, mode, reg);
4585 return;
4586 }
4587
4588 /* Assignment of a structure component needs special treatment
4589 if the structure component's rtx is not simply a MEM.
4590 Assignment of an array element at a constant index, and assignment of
4591 an array element in an unaligned packed structure field, has the same
4592 problem. Same for (partially) storing into a non-memory object. */
4593 if (handled_component_p (to)
4594 || (TREE_CODE (to) == MEM_REF
4595 && mem_ref_refers_to_non_mem_p (to))
4596 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4597 {
4598 enum machine_mode mode1;
4599 HOST_WIDE_INT bitsize, bitpos;
4600 unsigned HOST_WIDE_INT bitregion_start = 0;
4601 unsigned HOST_WIDE_INT bitregion_end = 0;
4602 tree offset;
4603 int unsignedp;
4604 int volatilep = 0;
4605 tree tem;
4606 bool misalignp;
4607 rtx mem = NULL_RTX;
4608
4609 push_temp_slots ();
4610 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4611 &unsignedp, &volatilep, true);
4612
4613 if (TREE_CODE (to) == COMPONENT_REF
4614 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4615 get_bit_range (&bitregion_start, &bitregion_end, to, bitpos);
4616
4617 /* If we are going to use store_bit_field and extract_bit_field,
4618 make sure to_rtx will be safe for multiple use. */
4619 mode = TYPE_MODE (TREE_TYPE (tem));
4620 if (TREE_CODE (tem) == MEM_REF
4621 && mode != BLKmode
4622 && ((align = get_object_or_type_alignment (tem))
4623 < GET_MODE_ALIGNMENT (mode))
4624 && ((icode = optab_handler (movmisalign_optab, mode))
4625 != CODE_FOR_nothing))
4626 {
4627 enum machine_mode address_mode;
4628 rtx op0;
4629 struct expand_operand ops[2];
4630 addr_space_t as = TYPE_ADDR_SPACE
4631 (TREE_TYPE (TREE_TYPE (TREE_OPERAND (tem, 0))));
4632 tree base = TREE_OPERAND (tem, 0);
4633
4634 misalignp = true;
4635 to_rtx = gen_reg_rtx (mode);
4636
4637 address_mode = targetm.addr_space.address_mode (as);
4638 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4639 op0 = convert_memory_address_addr_space (address_mode, op0, as);
4640 if (!integer_zerop (TREE_OPERAND (tem, 1)))
4641 {
4642 rtx off = immed_double_int_const (mem_ref_offset (tem),
4643 address_mode);
4644 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
4645 }
4646 op0 = memory_address_addr_space (mode, op0, as);
4647 mem = gen_rtx_MEM (mode, op0);
4648 set_mem_attributes (mem, tem, 0);
4649 set_mem_addr_space (mem, as);
4650 if (TREE_THIS_VOLATILE (tem))
4651 MEM_VOLATILE_P (mem) = 1;
4652
4653 /* If the misaligned store doesn't overwrite all bits, perform
4654 rmw cycle on MEM. */
4655 if (bitsize != GET_MODE_BITSIZE (mode))
4656 {
4657 create_input_operand (&ops[0], to_rtx, mode);
4658 create_fixed_operand (&ops[1], mem);
4659 /* The movmisalign<mode> pattern cannot fail, else the assignment
4660 would silently be omitted. */
4661 expand_insn (icode, 2, ops);
4662
4663 mem = copy_rtx (mem);
4664 }
4665 }
4666 else
4667 {
4668 misalignp = false;
4669 to_rtx = expand_normal (tem);
4670 }
4671
4672 /* If the bitfield is volatile, we want to access it in the
4673 field's mode, not the computed mode.
4674 If a MEM has VOIDmode (external with incomplete type),
4675 use BLKmode for it instead. */
4676 if (MEM_P (to_rtx))
4677 {
4678 if (volatilep && flag_strict_volatile_bitfields > 0)
4679 to_rtx = adjust_address (to_rtx, mode1, 0);
4680 else if (GET_MODE (to_rtx) == VOIDmode)
4681 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4682 }
4683
4684 if (offset != 0)
4685 {
4686 enum machine_mode address_mode;
4687 rtx offset_rtx;
4688
4689 if (!MEM_P (to_rtx))
4690 {
4691 /* We can get constant negative offsets into arrays with broken
4692 user code. Translate this to a trap instead of ICEing. */
4693 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4694 expand_builtin_trap ();
4695 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4696 }
4697
4698 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4699 address_mode
4700 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4701 if (GET_MODE (offset_rtx) != address_mode)
4702 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4703
4704 /* A constant address in TO_RTX can have VOIDmode, we must not try
4705 to call force_reg for that case. Avoid that case. */
4706 if (MEM_P (to_rtx)
4707 && GET_MODE (to_rtx) == BLKmode
4708 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4709 && bitsize > 0
4710 && (bitpos % bitsize) == 0
4711 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4712 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4713 {
4714 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4715 bitpos = 0;
4716 }
4717
4718 to_rtx = offset_address (to_rtx, offset_rtx,
4719 highest_pow2_factor_for_target (to,
4720 offset));
4721 }
4722
4723 /* No action is needed if the target is not a memory and the field
4724 lies completely outside that target. This can occur if the source
4725 code contains an out-of-bounds access to a small array. */
4726 if (!MEM_P (to_rtx)
4727 && GET_MODE (to_rtx) != BLKmode
4728 && (unsigned HOST_WIDE_INT) bitpos
4729 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4730 {
4731 expand_normal (from);
4732 result = NULL;
4733 }
4734 /* Handle expand_expr of a complex value returning a CONCAT. */
4735 else if (GET_CODE (to_rtx) == CONCAT)
4736 {
4737 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4738 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4739 && bitpos == 0
4740 && bitsize == mode_bitsize)
4741 result = store_expr (from, to_rtx, false, nontemporal);
4742 else if (bitsize == mode_bitsize / 2
4743 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4744 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4745 nontemporal);
4746 else if (bitpos + bitsize <= mode_bitsize / 2)
4747 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4748 bitregion_start, bitregion_end,
4749 mode1, from, TREE_TYPE (tem),
4750 get_alias_set (to), nontemporal);
4751 else if (bitpos >= mode_bitsize / 2)
4752 result = store_field (XEXP (to_rtx, 1), bitsize,
4753 bitpos - mode_bitsize / 2,
4754 bitregion_start, bitregion_end,
4755 mode1, from,
4756 TREE_TYPE (tem), get_alias_set (to),
4757 nontemporal);
4758 else if (bitpos == 0 && bitsize == mode_bitsize)
4759 {
4760 rtx from_rtx;
4761 result = expand_normal (from);
4762 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4763 TYPE_MODE (TREE_TYPE (from)), 0);
4764 emit_move_insn (XEXP (to_rtx, 0),
4765 read_complex_part (from_rtx, false));
4766 emit_move_insn (XEXP (to_rtx, 1),
4767 read_complex_part (from_rtx, true));
4768 }
4769 else
4770 {
4771 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4772 GET_MODE_SIZE (GET_MODE (to_rtx)),
4773 0);
4774 write_complex_part (temp, XEXP (to_rtx, 0), false);
4775 write_complex_part (temp, XEXP (to_rtx, 1), true);
4776 result = store_field (temp, bitsize, bitpos,
4777 bitregion_start, bitregion_end,
4778 mode1, from,
4779 TREE_TYPE (tem), get_alias_set (to),
4780 nontemporal);
4781 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4782 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4783 }
4784 }
4785 else
4786 {
4787 if (MEM_P (to_rtx))
4788 {
4789 /* If the field is at offset zero, we could have been given the
4790 DECL_RTX of the parent struct. Don't munge it. */
4791 to_rtx = shallow_copy_rtx (to_rtx);
4792
4793 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4794
4795 /* Deal with volatile and readonly fields. The former is only
4796 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4797 if (volatilep)
4798 MEM_VOLATILE_P (to_rtx) = 1;
4799 if (component_uses_parent_alias_set (to))
4800 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4801 }
4802
4803 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4804 bitregion_start, bitregion_end,
4805 mode1,
4806 to_rtx, to, from))
4807 result = NULL;
4808 else
4809 result = store_field (to_rtx, bitsize, bitpos,
4810 bitregion_start, bitregion_end,
4811 mode1, from,
4812 TREE_TYPE (tem), get_alias_set (to),
4813 nontemporal);
4814 }
4815
4816 if (misalignp)
4817 {
4818 struct expand_operand ops[2];
4819
4820 create_fixed_operand (&ops[0], mem);
4821 create_input_operand (&ops[1], to_rtx, mode);
4822 /* The movmisalign<mode> pattern cannot fail, else the assignment
4823 would silently be omitted. */
4824 expand_insn (icode, 2, ops);
4825 }
4826
4827 if (result)
4828 preserve_temp_slots (result);
4829 free_temp_slots ();
4830 pop_temp_slots ();
4831 return;
4832 }
4833
4834 /* If the rhs is a function call and its value is not an aggregate,
4835 call the function before we start to compute the lhs.
4836 This is needed for correct code for cases such as
4837 val = setjmp (buf) on machines where reference to val
4838 requires loading up part of an address in a separate insn.
4839
4840 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4841 since it might be a promoted variable where the zero- or sign- extension
4842 needs to be done. Handling this in the normal way is safe because no
4843 computation is done before the call. The same is true for SSA names. */
4844 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4845 && COMPLETE_TYPE_P (TREE_TYPE (from))
4846 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4847 && ! (((TREE_CODE (to) == VAR_DECL
4848 || TREE_CODE (to) == PARM_DECL
4849 || TREE_CODE (to) == RESULT_DECL)
4850 && REG_P (DECL_RTL (to)))
4851 || TREE_CODE (to) == SSA_NAME))
4852 {
4853 rtx value;
4854
4855 push_temp_slots ();
4856 value = expand_normal (from);
4857 if (to_rtx == 0)
4858 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4859
4860 /* Handle calls that return values in multiple non-contiguous locations.
4861 The Irix 6 ABI has examples of this. */
4862 if (GET_CODE (to_rtx) == PARALLEL)
4863 emit_group_load (to_rtx, value, TREE_TYPE (from),
4864 int_size_in_bytes (TREE_TYPE (from)));
4865 else if (GET_MODE (to_rtx) == BLKmode)
4866 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4867 else
4868 {
4869 if (POINTER_TYPE_P (TREE_TYPE (to)))
4870 value = convert_memory_address_addr_space
4871 (GET_MODE (to_rtx), value,
4872 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4873
4874 emit_move_insn (to_rtx, value);
4875 }
4876 preserve_temp_slots (to_rtx);
4877 free_temp_slots ();
4878 pop_temp_slots ();
4879 return;
4880 }
4881
4882 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
4883 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4884
4885 /* Don't move directly into a return register. */
4886 if (TREE_CODE (to) == RESULT_DECL
4887 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4888 {
4889 rtx temp;
4890
4891 push_temp_slots ();
4892 if (REG_P (to_rtx) && TYPE_MODE (TREE_TYPE (from)) == BLKmode)
4893 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
4894 else
4895 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4896
4897 if (GET_CODE (to_rtx) == PARALLEL)
4898 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4899 int_size_in_bytes (TREE_TYPE (from)));
4900 else if (temp)
4901 emit_move_insn (to_rtx, temp);
4902
4903 preserve_temp_slots (to_rtx);
4904 free_temp_slots ();
4905 pop_temp_slots ();
4906 return;
4907 }
4908
4909 /* In case we are returning the contents of an object which overlaps
4910 the place the value is being stored, use a safe function when copying
4911 a value through a pointer into a structure value return block. */
4912 if (TREE_CODE (to) == RESULT_DECL
4913 && TREE_CODE (from) == INDIRECT_REF
4914 && ADDR_SPACE_GENERIC_P
4915 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4916 && refs_may_alias_p (to, from)
4917 && cfun->returns_struct
4918 && !cfun->returns_pcc_struct)
4919 {
4920 rtx from_rtx, size;
4921
4922 push_temp_slots ();
4923 size = expr_size (from);
4924 from_rtx = expand_normal (from);
4925
4926 emit_library_call (memmove_libfunc, LCT_NORMAL,
4927 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4928 XEXP (from_rtx, 0), Pmode,
4929 convert_to_mode (TYPE_MODE (sizetype),
4930 size, TYPE_UNSIGNED (sizetype)),
4931 TYPE_MODE (sizetype));
4932
4933 preserve_temp_slots (to_rtx);
4934 free_temp_slots ();
4935 pop_temp_slots ();
4936 return;
4937 }
4938
4939 /* Compute FROM and store the value in the rtx we got. */
4940
4941 push_temp_slots ();
4942 result = store_expr (from, to_rtx, 0, nontemporal);
4943 preserve_temp_slots (result);
4944 free_temp_slots ();
4945 pop_temp_slots ();
4946 return;
4947 }
4948
4949 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4950 succeeded, false otherwise. */
4951
4952 bool
4953 emit_storent_insn (rtx to, rtx from)
4954 {
4955 struct expand_operand ops[2];
4956 enum machine_mode mode = GET_MODE (to);
4957 enum insn_code code = optab_handler (storent_optab, mode);
4958
4959 if (code == CODE_FOR_nothing)
4960 return false;
4961
4962 create_fixed_operand (&ops[0], to);
4963 create_input_operand (&ops[1], from, mode);
4964 return maybe_expand_insn (code, 2, ops);
4965 }
4966
4967 /* Generate code for computing expression EXP,
4968 and storing the value into TARGET.
4969
4970 If the mode is BLKmode then we may return TARGET itself.
4971 It turns out that in BLKmode it doesn't cause a problem.
4972 because C has no operators that could combine two different
4973 assignments into the same BLKmode object with different values
4974 with no sequence point. Will other languages need this to
4975 be more thorough?
4976
4977 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4978 stack, and block moves may need to be treated specially.
4979
4980 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4981
4982 rtx
4983 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4984 {
4985 rtx temp;
4986 rtx alt_rtl = NULL_RTX;
4987 location_t loc = EXPR_LOCATION (exp);
4988
4989 if (VOID_TYPE_P (TREE_TYPE (exp)))
4990 {
4991 /* C++ can generate ?: expressions with a throw expression in one
4992 branch and an rvalue in the other. Here, we resolve attempts to
4993 store the throw expression's nonexistent result. */
4994 gcc_assert (!call_param_p);
4995 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4996 return NULL_RTX;
4997 }
4998 if (TREE_CODE (exp) == COMPOUND_EXPR)
4999 {
5000 /* Perform first part of compound expression, then assign from second
5001 part. */
5002 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5003 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5004 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5005 nontemporal);
5006 }
5007 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5008 {
5009 /* For conditional expression, get safe form of the target. Then
5010 test the condition, doing the appropriate assignment on either
5011 side. This avoids the creation of unnecessary temporaries.
5012 For non-BLKmode, it is more efficient not to do this. */
5013
5014 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
5015
5016 do_pending_stack_adjust ();
5017 NO_DEFER_POP;
5018 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5019 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5020 nontemporal);
5021 emit_jump_insn (gen_jump (lab2));
5022 emit_barrier ();
5023 emit_label (lab1);
5024 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5025 nontemporal);
5026 emit_label (lab2);
5027 OK_DEFER_POP;
5028
5029 return NULL_RTX;
5030 }
5031 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5032 /* If this is a scalar in a register that is stored in a wider mode
5033 than the declared mode, compute the result into its declared mode
5034 and then convert to the wider mode. Our value is the computed
5035 expression. */
5036 {
5037 rtx inner_target = 0;
5038
5039 /* We can do the conversion inside EXP, which will often result
5040 in some optimizations. Do the conversion in two steps: first
5041 change the signedness, if needed, then the extend. But don't
5042 do this if the type of EXP is a subtype of something else
5043 since then the conversion might involve more than just
5044 converting modes. */
5045 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5046 && TREE_TYPE (TREE_TYPE (exp)) == 0
5047 && GET_MODE_PRECISION (GET_MODE (target))
5048 == TYPE_PRECISION (TREE_TYPE (exp)))
5049 {
5050 if (TYPE_UNSIGNED (TREE_TYPE (exp))
5051 != SUBREG_PROMOTED_UNSIGNED_P (target))
5052 {
5053 /* Some types, e.g. Fortran's logical*4, won't have a signed
5054 version, so use the mode instead. */
5055 tree ntype
5056 = (signed_or_unsigned_type_for
5057 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
5058 if (ntype == NULL)
5059 ntype = lang_hooks.types.type_for_mode
5060 (TYPE_MODE (TREE_TYPE (exp)),
5061 SUBREG_PROMOTED_UNSIGNED_P (target));
5062
5063 exp = fold_convert_loc (loc, ntype, exp);
5064 }
5065
5066 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5067 (GET_MODE (SUBREG_REG (target)),
5068 SUBREG_PROMOTED_UNSIGNED_P (target)),
5069 exp);
5070
5071 inner_target = SUBREG_REG (target);
5072 }
5073
5074 temp = expand_expr (exp, inner_target, VOIDmode,
5075 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5076
5077 /* If TEMP is a VOIDmode constant, use convert_modes to make
5078 sure that we properly convert it. */
5079 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5080 {
5081 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5082 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
5083 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5084 GET_MODE (target), temp,
5085 SUBREG_PROMOTED_UNSIGNED_P (target));
5086 }
5087
5088 convert_move (SUBREG_REG (target), temp,
5089 SUBREG_PROMOTED_UNSIGNED_P (target));
5090
5091 return NULL_RTX;
5092 }
5093 else if ((TREE_CODE (exp) == STRING_CST
5094 || (TREE_CODE (exp) == MEM_REF
5095 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5096 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5097 == STRING_CST
5098 && integer_zerop (TREE_OPERAND (exp, 1))))
5099 && !nontemporal && !call_param_p
5100 && MEM_P (target))
5101 {
5102 /* Optimize initialization of an array with a STRING_CST. */
5103 HOST_WIDE_INT exp_len, str_copy_len;
5104 rtx dest_mem;
5105 tree str = TREE_CODE (exp) == STRING_CST
5106 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5107
5108 exp_len = int_expr_size (exp);
5109 if (exp_len <= 0)
5110 goto normal_expr;
5111
5112 if (TREE_STRING_LENGTH (str) <= 0)
5113 goto normal_expr;
5114
5115 str_copy_len = strlen (TREE_STRING_POINTER (str));
5116 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5117 goto normal_expr;
5118
5119 str_copy_len = TREE_STRING_LENGTH (str);
5120 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5121 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5122 {
5123 str_copy_len += STORE_MAX_PIECES - 1;
5124 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5125 }
5126 str_copy_len = MIN (str_copy_len, exp_len);
5127 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5128 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5129 MEM_ALIGN (target), false))
5130 goto normal_expr;
5131
5132 dest_mem = target;
5133
5134 dest_mem = store_by_pieces (dest_mem,
5135 str_copy_len, builtin_strncpy_read_str,
5136 CONST_CAST (char *,
5137 TREE_STRING_POINTER (str)),
5138 MEM_ALIGN (target), false,
5139 exp_len > str_copy_len ? 1 : 0);
5140 if (exp_len > str_copy_len)
5141 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5142 GEN_INT (exp_len - str_copy_len),
5143 BLOCK_OP_NORMAL);
5144 return NULL_RTX;
5145 }
5146 else
5147 {
5148 rtx tmp_target;
5149
5150 normal_expr:
5151 /* If we want to use a nontemporal store, force the value to
5152 register first. */
5153 tmp_target = nontemporal ? NULL_RTX : target;
5154 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5155 (call_param_p
5156 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5157 &alt_rtl);
5158 }
5159
5160 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5161 the same as that of TARGET, adjust the constant. This is needed, for
5162 example, in case it is a CONST_DOUBLE and we want only a word-sized
5163 value. */
5164 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5165 && TREE_CODE (exp) != ERROR_MARK
5166 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5167 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5168 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5169
5170 /* If value was not generated in the target, store it there.
5171 Convert the value to TARGET's type first if necessary and emit the
5172 pending incrementations that have been queued when expanding EXP.
5173 Note that we cannot emit the whole queue blindly because this will
5174 effectively disable the POST_INC optimization later.
5175
5176 If TEMP and TARGET compare equal according to rtx_equal_p, but
5177 one or both of them are volatile memory refs, we have to distinguish
5178 two cases:
5179 - expand_expr has used TARGET. In this case, we must not generate
5180 another copy. This can be detected by TARGET being equal according
5181 to == .
5182 - expand_expr has not used TARGET - that means that the source just
5183 happens to have the same RTX form. Since temp will have been created
5184 by expand_expr, it will compare unequal according to == .
5185 We must generate a copy in this case, to reach the correct number
5186 of volatile memory references. */
5187
5188 if ((! rtx_equal_p (temp, target)
5189 || (temp != target && (side_effects_p (temp)
5190 || side_effects_p (target))))
5191 && TREE_CODE (exp) != ERROR_MARK
5192 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5193 but TARGET is not valid memory reference, TEMP will differ
5194 from TARGET although it is really the same location. */
5195 && !(alt_rtl
5196 && rtx_equal_p (alt_rtl, target)
5197 && !side_effects_p (alt_rtl)
5198 && !side_effects_p (target))
5199 /* If there's nothing to copy, don't bother. Don't call
5200 expr_size unless necessary, because some front-ends (C++)
5201 expr_size-hook must not be given objects that are not
5202 supposed to be bit-copied or bit-initialized. */
5203 && expr_size (exp) != const0_rtx)
5204 {
5205 if (GET_MODE (temp) != GET_MODE (target)
5206 && GET_MODE (temp) != VOIDmode)
5207 {
5208 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5209 if (GET_MODE (target) == BLKmode
5210 && GET_MODE (temp) == BLKmode)
5211 emit_block_move (target, temp, expr_size (exp),
5212 (call_param_p
5213 ? BLOCK_OP_CALL_PARM
5214 : BLOCK_OP_NORMAL));
5215 else if (GET_MODE (target) == BLKmode)
5216 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5217 0, 0, 0, GET_MODE (temp), temp);
5218 else
5219 convert_move (target, temp, unsignedp);
5220 }
5221
5222 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5223 {
5224 /* Handle copying a string constant into an array. The string
5225 constant may be shorter than the array. So copy just the string's
5226 actual length, and clear the rest. First get the size of the data
5227 type of the string, which is actually the size of the target. */
5228 rtx size = expr_size (exp);
5229
5230 if (CONST_INT_P (size)
5231 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5232 emit_block_move (target, temp, size,
5233 (call_param_p
5234 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5235 else
5236 {
5237 enum machine_mode pointer_mode
5238 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5239 enum machine_mode address_mode
5240 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
5241
5242 /* Compute the size of the data to copy from the string. */
5243 tree copy_size
5244 = size_binop_loc (loc, MIN_EXPR,
5245 make_tree (sizetype, size),
5246 size_int (TREE_STRING_LENGTH (exp)));
5247 rtx copy_size_rtx
5248 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5249 (call_param_p
5250 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5251 rtx label = 0;
5252
5253 /* Copy that much. */
5254 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5255 TYPE_UNSIGNED (sizetype));
5256 emit_block_move (target, temp, copy_size_rtx,
5257 (call_param_p
5258 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5259
5260 /* Figure out how much is left in TARGET that we have to clear.
5261 Do all calculations in pointer_mode. */
5262 if (CONST_INT_P (copy_size_rtx))
5263 {
5264 size = plus_constant (size, -INTVAL (copy_size_rtx));
5265 target = adjust_address (target, BLKmode,
5266 INTVAL (copy_size_rtx));
5267 }
5268 else
5269 {
5270 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5271 copy_size_rtx, NULL_RTX, 0,
5272 OPTAB_LIB_WIDEN);
5273
5274 if (GET_MODE (copy_size_rtx) != address_mode)
5275 copy_size_rtx = convert_to_mode (address_mode,
5276 copy_size_rtx,
5277 TYPE_UNSIGNED (sizetype));
5278
5279 target = offset_address (target, copy_size_rtx,
5280 highest_pow2_factor (copy_size));
5281 label = gen_label_rtx ();
5282 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5283 GET_MODE (size), 0, label);
5284 }
5285
5286 if (size != const0_rtx)
5287 clear_storage (target, size, BLOCK_OP_NORMAL);
5288
5289 if (label)
5290 emit_label (label);
5291 }
5292 }
5293 /* Handle calls that return values in multiple non-contiguous locations.
5294 The Irix 6 ABI has examples of this. */
5295 else if (GET_CODE (target) == PARALLEL)
5296 emit_group_load (target, temp, TREE_TYPE (exp),
5297 int_size_in_bytes (TREE_TYPE (exp)));
5298 else if (GET_MODE (temp) == BLKmode)
5299 emit_block_move (target, temp, expr_size (exp),
5300 (call_param_p
5301 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5302 else if (nontemporal
5303 && emit_storent_insn (target, temp))
5304 /* If we managed to emit a nontemporal store, there is nothing else to
5305 do. */
5306 ;
5307 else
5308 {
5309 temp = force_operand (temp, target);
5310 if (temp != target)
5311 emit_move_insn (target, temp);
5312 }
5313 }
5314
5315 return NULL_RTX;
5316 }
5317 \f
5318 /* Return true if field F of structure TYPE is a flexible array. */
5319
5320 static bool
5321 flexible_array_member_p (const_tree f, const_tree type)
5322 {
5323 const_tree tf;
5324
5325 tf = TREE_TYPE (f);
5326 return (DECL_CHAIN (f) == NULL
5327 && TREE_CODE (tf) == ARRAY_TYPE
5328 && TYPE_DOMAIN (tf)
5329 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5330 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5331 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5332 && int_size_in_bytes (type) >= 0);
5333 }
5334
5335 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5336 must have in order for it to completely initialize a value of type TYPE.
5337 Return -1 if the number isn't known.
5338
5339 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5340
5341 static HOST_WIDE_INT
5342 count_type_elements (const_tree type, bool for_ctor_p)
5343 {
5344 switch (TREE_CODE (type))
5345 {
5346 case ARRAY_TYPE:
5347 {
5348 tree nelts;
5349
5350 nelts = array_type_nelts (type);
5351 if (nelts && host_integerp (nelts, 1))
5352 {
5353 unsigned HOST_WIDE_INT n;
5354
5355 n = tree_low_cst (nelts, 1) + 1;
5356 if (n == 0 || for_ctor_p)
5357 return n;
5358 else
5359 return n * count_type_elements (TREE_TYPE (type), false);
5360 }
5361 return for_ctor_p ? -1 : 1;
5362 }
5363
5364 case RECORD_TYPE:
5365 {
5366 unsigned HOST_WIDE_INT n;
5367 tree f;
5368
5369 n = 0;
5370 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5371 if (TREE_CODE (f) == FIELD_DECL)
5372 {
5373 if (!for_ctor_p)
5374 n += count_type_elements (TREE_TYPE (f), false);
5375 else if (!flexible_array_member_p (f, type))
5376 /* Don't count flexible arrays, which are not supposed
5377 to be initialized. */
5378 n += 1;
5379 }
5380
5381 return n;
5382 }
5383
5384 case UNION_TYPE:
5385 case QUAL_UNION_TYPE:
5386 {
5387 tree f;
5388 HOST_WIDE_INT n, m;
5389
5390 gcc_assert (!for_ctor_p);
5391 /* Estimate the number of scalars in each field and pick the
5392 maximum. Other estimates would do instead; the idea is simply
5393 to make sure that the estimate is not sensitive to the ordering
5394 of the fields. */
5395 n = 1;
5396 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5397 if (TREE_CODE (f) == FIELD_DECL)
5398 {
5399 m = count_type_elements (TREE_TYPE (f), false);
5400 /* If the field doesn't span the whole union, add an extra
5401 scalar for the rest. */
5402 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5403 TYPE_SIZE (type)) != 1)
5404 m++;
5405 if (n < m)
5406 n = m;
5407 }
5408 return n;
5409 }
5410
5411 case COMPLEX_TYPE:
5412 return 2;
5413
5414 case VECTOR_TYPE:
5415 return TYPE_VECTOR_SUBPARTS (type);
5416
5417 case INTEGER_TYPE:
5418 case REAL_TYPE:
5419 case FIXED_POINT_TYPE:
5420 case ENUMERAL_TYPE:
5421 case BOOLEAN_TYPE:
5422 case POINTER_TYPE:
5423 case OFFSET_TYPE:
5424 case REFERENCE_TYPE:
5425 case NULLPTR_TYPE:
5426 return 1;
5427
5428 case ERROR_MARK:
5429 return 0;
5430
5431 case VOID_TYPE:
5432 case METHOD_TYPE:
5433 case FUNCTION_TYPE:
5434 case LANG_TYPE:
5435 default:
5436 gcc_unreachable ();
5437 }
5438 }
5439
5440 /* Helper for categorize_ctor_elements. Identical interface. */
5441
5442 static bool
5443 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5444 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5445 {
5446 unsigned HOST_WIDE_INT idx;
5447 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5448 tree value, purpose, elt_type;
5449
5450 /* Whether CTOR is a valid constant initializer, in accordance with what
5451 initializer_constant_valid_p does. If inferred from the constructor
5452 elements, true until proven otherwise. */
5453 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5454 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5455
5456 nz_elts = 0;
5457 init_elts = 0;
5458 num_fields = 0;
5459 elt_type = NULL_TREE;
5460
5461 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5462 {
5463 HOST_WIDE_INT mult = 1;
5464
5465 if (TREE_CODE (purpose) == RANGE_EXPR)
5466 {
5467 tree lo_index = TREE_OPERAND (purpose, 0);
5468 tree hi_index = TREE_OPERAND (purpose, 1);
5469
5470 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5471 mult = (tree_low_cst (hi_index, 1)
5472 - tree_low_cst (lo_index, 1) + 1);
5473 }
5474 num_fields += mult;
5475 elt_type = TREE_TYPE (value);
5476
5477 switch (TREE_CODE (value))
5478 {
5479 case CONSTRUCTOR:
5480 {
5481 HOST_WIDE_INT nz = 0, ic = 0;
5482
5483 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5484 p_complete);
5485
5486 nz_elts += mult * nz;
5487 init_elts += mult * ic;
5488
5489 if (const_from_elts_p && const_p)
5490 const_p = const_elt_p;
5491 }
5492 break;
5493
5494 case INTEGER_CST:
5495 case REAL_CST:
5496 case FIXED_CST:
5497 if (!initializer_zerop (value))
5498 nz_elts += mult;
5499 init_elts += mult;
5500 break;
5501
5502 case STRING_CST:
5503 nz_elts += mult * TREE_STRING_LENGTH (value);
5504 init_elts += mult * TREE_STRING_LENGTH (value);
5505 break;
5506
5507 case COMPLEX_CST:
5508 if (!initializer_zerop (TREE_REALPART (value)))
5509 nz_elts += mult;
5510 if (!initializer_zerop (TREE_IMAGPART (value)))
5511 nz_elts += mult;
5512 init_elts += mult;
5513 break;
5514
5515 case VECTOR_CST:
5516 {
5517 tree v;
5518 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
5519 {
5520 if (!initializer_zerop (TREE_VALUE (v)))
5521 nz_elts += mult;
5522 init_elts += mult;
5523 }
5524 }
5525 break;
5526
5527 default:
5528 {
5529 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5530 nz_elts += mult * tc;
5531 init_elts += mult * tc;
5532
5533 if (const_from_elts_p && const_p)
5534 const_p = initializer_constant_valid_p (value, elt_type)
5535 != NULL_TREE;
5536 }
5537 break;
5538 }
5539 }
5540
5541 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5542 num_fields, elt_type))
5543 *p_complete = false;
5544
5545 *p_nz_elts += nz_elts;
5546 *p_init_elts += init_elts;
5547
5548 return const_p;
5549 }
5550
5551 /* Examine CTOR to discover:
5552 * how many scalar fields are set to nonzero values,
5553 and place it in *P_NZ_ELTS;
5554 * how many scalar fields in total are in CTOR,
5555 and place it in *P_ELT_COUNT.
5556 * whether the constructor is complete -- in the sense that every
5557 meaningful byte is explicitly given a value --
5558 and place it in *P_COMPLETE.
5559
5560 Return whether or not CTOR is a valid static constant initializer, the same
5561 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5562
5563 bool
5564 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5565 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5566 {
5567 *p_nz_elts = 0;
5568 *p_init_elts = 0;
5569 *p_complete = true;
5570
5571 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5572 }
5573
5574 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5575 of which had type LAST_TYPE. Each element was itself a complete
5576 initializer, in the sense that every meaningful byte was explicitly
5577 given a value. Return true if the same is true for the constructor
5578 as a whole. */
5579
5580 bool
5581 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5582 const_tree last_type)
5583 {
5584 if (TREE_CODE (type) == UNION_TYPE
5585 || TREE_CODE (type) == QUAL_UNION_TYPE)
5586 {
5587 if (num_elts == 0)
5588 return false;
5589
5590 gcc_assert (num_elts == 1 && last_type);
5591
5592 /* ??? We could look at each element of the union, and find the
5593 largest element. Which would avoid comparing the size of the
5594 initialized element against any tail padding in the union.
5595 Doesn't seem worth the effort... */
5596 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5597 }
5598
5599 return count_type_elements (type, true) == num_elts;
5600 }
5601
5602 /* Return 1 if EXP contains mostly (3/4) zeros. */
5603
5604 static int
5605 mostly_zeros_p (const_tree exp)
5606 {
5607 if (TREE_CODE (exp) == CONSTRUCTOR)
5608 {
5609 HOST_WIDE_INT nz_elts, init_elts;
5610 bool complete_p;
5611
5612 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5613 return !complete_p || nz_elts < init_elts / 4;
5614 }
5615
5616 return initializer_zerop (exp);
5617 }
5618
5619 /* Return 1 if EXP contains all zeros. */
5620
5621 static int
5622 all_zeros_p (const_tree exp)
5623 {
5624 if (TREE_CODE (exp) == CONSTRUCTOR)
5625 {
5626 HOST_WIDE_INT nz_elts, init_elts;
5627 bool complete_p;
5628
5629 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5630 return nz_elts == 0;
5631 }
5632
5633 return initializer_zerop (exp);
5634 }
5635 \f
5636 /* Helper function for store_constructor.
5637 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5638 TYPE is the type of the CONSTRUCTOR, not the element type.
5639 CLEARED is as for store_constructor.
5640 ALIAS_SET is the alias set to use for any stores.
5641
5642 This provides a recursive shortcut back to store_constructor when it isn't
5643 necessary to go through store_field. This is so that we can pass through
5644 the cleared field to let store_constructor know that we may not have to
5645 clear a substructure if the outer structure has already been cleared. */
5646
5647 static void
5648 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5649 HOST_WIDE_INT bitpos, enum machine_mode mode,
5650 tree exp, tree type, int cleared,
5651 alias_set_type alias_set)
5652 {
5653 if (TREE_CODE (exp) == CONSTRUCTOR
5654 /* We can only call store_constructor recursively if the size and
5655 bit position are on a byte boundary. */
5656 && bitpos % BITS_PER_UNIT == 0
5657 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5658 /* If we have a nonzero bitpos for a register target, then we just
5659 let store_field do the bitfield handling. This is unlikely to
5660 generate unnecessary clear instructions anyways. */
5661 && (bitpos == 0 || MEM_P (target)))
5662 {
5663 if (MEM_P (target))
5664 target
5665 = adjust_address (target,
5666 GET_MODE (target) == BLKmode
5667 || 0 != (bitpos
5668 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5669 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5670
5671
5672 /* Update the alias set, if required. */
5673 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5674 && MEM_ALIAS_SET (target) != 0)
5675 {
5676 target = copy_rtx (target);
5677 set_mem_alias_set (target, alias_set);
5678 }
5679
5680 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5681 }
5682 else
5683 store_field (target, bitsize, bitpos, 0, 0, mode, exp, type, alias_set,
5684 false);
5685 }
5686
5687 /* Store the value of constructor EXP into the rtx TARGET.
5688 TARGET is either a REG or a MEM; we know it cannot conflict, since
5689 safe_from_p has been called.
5690 CLEARED is true if TARGET is known to have been zero'd.
5691 SIZE is the number of bytes of TARGET we are allowed to modify: this
5692 may not be the same as the size of EXP if we are assigning to a field
5693 which has been packed to exclude padding bits. */
5694
5695 static void
5696 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5697 {
5698 tree type = TREE_TYPE (exp);
5699 #ifdef WORD_REGISTER_OPERATIONS
5700 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5701 #endif
5702
5703 switch (TREE_CODE (type))
5704 {
5705 case RECORD_TYPE:
5706 case UNION_TYPE:
5707 case QUAL_UNION_TYPE:
5708 {
5709 unsigned HOST_WIDE_INT idx;
5710 tree field, value;
5711
5712 /* If size is zero or the target is already cleared, do nothing. */
5713 if (size == 0 || cleared)
5714 cleared = 1;
5715 /* We either clear the aggregate or indicate the value is dead. */
5716 else if ((TREE_CODE (type) == UNION_TYPE
5717 || TREE_CODE (type) == QUAL_UNION_TYPE)
5718 && ! CONSTRUCTOR_ELTS (exp))
5719 /* If the constructor is empty, clear the union. */
5720 {
5721 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5722 cleared = 1;
5723 }
5724
5725 /* If we are building a static constructor into a register,
5726 set the initial value as zero so we can fold the value into
5727 a constant. But if more than one register is involved,
5728 this probably loses. */
5729 else if (REG_P (target) && TREE_STATIC (exp)
5730 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5731 {
5732 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5733 cleared = 1;
5734 }
5735
5736 /* If the constructor has fewer fields than the structure or
5737 if we are initializing the structure to mostly zeros, clear
5738 the whole structure first. Don't do this if TARGET is a
5739 register whose mode size isn't equal to SIZE since
5740 clear_storage can't handle this case. */
5741 else if (size > 0
5742 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5743 != fields_length (type))
5744 || mostly_zeros_p (exp))
5745 && (!REG_P (target)
5746 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5747 == size)))
5748 {
5749 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5750 cleared = 1;
5751 }
5752
5753 if (REG_P (target) && !cleared)
5754 emit_clobber (target);
5755
5756 /* Store each element of the constructor into the
5757 corresponding field of TARGET. */
5758 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5759 {
5760 enum machine_mode mode;
5761 HOST_WIDE_INT bitsize;
5762 HOST_WIDE_INT bitpos = 0;
5763 tree offset;
5764 rtx to_rtx = target;
5765
5766 /* Just ignore missing fields. We cleared the whole
5767 structure, above, if any fields are missing. */
5768 if (field == 0)
5769 continue;
5770
5771 if (cleared && initializer_zerop (value))
5772 continue;
5773
5774 if (host_integerp (DECL_SIZE (field), 1))
5775 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5776 else
5777 bitsize = -1;
5778
5779 mode = DECL_MODE (field);
5780 if (DECL_BIT_FIELD (field))
5781 mode = VOIDmode;
5782
5783 offset = DECL_FIELD_OFFSET (field);
5784 if (host_integerp (offset, 0)
5785 && host_integerp (bit_position (field), 0))
5786 {
5787 bitpos = int_bit_position (field);
5788 offset = 0;
5789 }
5790 else
5791 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5792
5793 if (offset)
5794 {
5795 enum machine_mode address_mode;
5796 rtx offset_rtx;
5797
5798 offset
5799 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5800 make_tree (TREE_TYPE (exp),
5801 target));
5802
5803 offset_rtx = expand_normal (offset);
5804 gcc_assert (MEM_P (to_rtx));
5805
5806 address_mode
5807 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5808 if (GET_MODE (offset_rtx) != address_mode)
5809 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5810
5811 to_rtx = offset_address (to_rtx, offset_rtx,
5812 highest_pow2_factor (offset));
5813 }
5814
5815 #ifdef WORD_REGISTER_OPERATIONS
5816 /* If this initializes a field that is smaller than a
5817 word, at the start of a word, try to widen it to a full
5818 word. This special case allows us to output C++ member
5819 function initializations in a form that the optimizers
5820 can understand. */
5821 if (REG_P (target)
5822 && bitsize < BITS_PER_WORD
5823 && bitpos % BITS_PER_WORD == 0
5824 && GET_MODE_CLASS (mode) == MODE_INT
5825 && TREE_CODE (value) == INTEGER_CST
5826 && exp_size >= 0
5827 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5828 {
5829 tree type = TREE_TYPE (value);
5830
5831 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5832 {
5833 type = lang_hooks.types.type_for_mode
5834 (word_mode, TYPE_UNSIGNED (type));
5835 value = fold_convert (type, value);
5836 }
5837
5838 if (BYTES_BIG_ENDIAN)
5839 value
5840 = fold_build2 (LSHIFT_EXPR, type, value,
5841 build_int_cst (type,
5842 BITS_PER_WORD - bitsize));
5843 bitsize = BITS_PER_WORD;
5844 mode = word_mode;
5845 }
5846 #endif
5847
5848 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5849 && DECL_NONADDRESSABLE_P (field))
5850 {
5851 to_rtx = copy_rtx (to_rtx);
5852 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5853 }
5854
5855 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5856 value, type, cleared,
5857 get_alias_set (TREE_TYPE (field)));
5858 }
5859 break;
5860 }
5861 case ARRAY_TYPE:
5862 {
5863 tree value, index;
5864 unsigned HOST_WIDE_INT i;
5865 int need_to_clear;
5866 tree domain;
5867 tree elttype = TREE_TYPE (type);
5868 int const_bounds_p;
5869 HOST_WIDE_INT minelt = 0;
5870 HOST_WIDE_INT maxelt = 0;
5871
5872 domain = TYPE_DOMAIN (type);
5873 const_bounds_p = (TYPE_MIN_VALUE (domain)
5874 && TYPE_MAX_VALUE (domain)
5875 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5876 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5877
5878 /* If we have constant bounds for the range of the type, get them. */
5879 if (const_bounds_p)
5880 {
5881 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5882 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5883 }
5884
5885 /* If the constructor has fewer elements than the array, clear
5886 the whole array first. Similarly if this is static
5887 constructor of a non-BLKmode object. */
5888 if (cleared)
5889 need_to_clear = 0;
5890 else if (REG_P (target) && TREE_STATIC (exp))
5891 need_to_clear = 1;
5892 else
5893 {
5894 unsigned HOST_WIDE_INT idx;
5895 tree index, value;
5896 HOST_WIDE_INT count = 0, zero_count = 0;
5897 need_to_clear = ! const_bounds_p;
5898
5899 /* This loop is a more accurate version of the loop in
5900 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5901 is also needed to check for missing elements. */
5902 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5903 {
5904 HOST_WIDE_INT this_node_count;
5905
5906 if (need_to_clear)
5907 break;
5908
5909 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5910 {
5911 tree lo_index = TREE_OPERAND (index, 0);
5912 tree hi_index = TREE_OPERAND (index, 1);
5913
5914 if (! host_integerp (lo_index, 1)
5915 || ! host_integerp (hi_index, 1))
5916 {
5917 need_to_clear = 1;
5918 break;
5919 }
5920
5921 this_node_count = (tree_low_cst (hi_index, 1)
5922 - tree_low_cst (lo_index, 1) + 1);
5923 }
5924 else
5925 this_node_count = 1;
5926
5927 count += this_node_count;
5928 if (mostly_zeros_p (value))
5929 zero_count += this_node_count;
5930 }
5931
5932 /* Clear the entire array first if there are any missing
5933 elements, or if the incidence of zero elements is >=
5934 75%. */
5935 if (! need_to_clear
5936 && (count < maxelt - minelt + 1
5937 || 4 * zero_count >= 3 * count))
5938 need_to_clear = 1;
5939 }
5940
5941 if (need_to_clear && size > 0)
5942 {
5943 if (REG_P (target))
5944 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5945 else
5946 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5947 cleared = 1;
5948 }
5949
5950 if (!cleared && REG_P (target))
5951 /* Inform later passes that the old value is dead. */
5952 emit_clobber (target);
5953
5954 /* Store each element of the constructor into the
5955 corresponding element of TARGET, determined by counting the
5956 elements. */
5957 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5958 {
5959 enum machine_mode mode;
5960 HOST_WIDE_INT bitsize;
5961 HOST_WIDE_INT bitpos;
5962 rtx xtarget = target;
5963
5964 if (cleared && initializer_zerop (value))
5965 continue;
5966
5967 mode = TYPE_MODE (elttype);
5968 if (mode == BLKmode)
5969 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5970 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5971 : -1);
5972 else
5973 bitsize = GET_MODE_BITSIZE (mode);
5974
5975 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5976 {
5977 tree lo_index = TREE_OPERAND (index, 0);
5978 tree hi_index = TREE_OPERAND (index, 1);
5979 rtx index_r, pos_rtx;
5980 HOST_WIDE_INT lo, hi, count;
5981 tree position;
5982
5983 /* If the range is constant and "small", unroll the loop. */
5984 if (const_bounds_p
5985 && host_integerp (lo_index, 0)
5986 && host_integerp (hi_index, 0)
5987 && (lo = tree_low_cst (lo_index, 0),
5988 hi = tree_low_cst (hi_index, 0),
5989 count = hi - lo + 1,
5990 (!MEM_P (target)
5991 || count <= 2
5992 || (host_integerp (TYPE_SIZE (elttype), 1)
5993 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5994 <= 40 * 8)))))
5995 {
5996 lo -= minelt; hi -= minelt;
5997 for (; lo <= hi; lo++)
5998 {
5999 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
6000
6001 if (MEM_P (target)
6002 && !MEM_KEEP_ALIAS_SET_P (target)
6003 && TREE_CODE (type) == ARRAY_TYPE
6004 && TYPE_NONALIASED_COMPONENT (type))
6005 {
6006 target = copy_rtx (target);
6007 MEM_KEEP_ALIAS_SET_P (target) = 1;
6008 }
6009
6010 store_constructor_field
6011 (target, bitsize, bitpos, mode, value, type, cleared,
6012 get_alias_set (elttype));
6013 }
6014 }
6015 else
6016 {
6017 rtx loop_start = gen_label_rtx ();
6018 rtx loop_end = gen_label_rtx ();
6019 tree exit_cond;
6020
6021 expand_normal (hi_index);
6022
6023 index = build_decl (EXPR_LOCATION (exp),
6024 VAR_DECL, NULL_TREE, domain);
6025 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6026 SET_DECL_RTL (index, index_r);
6027 store_expr (lo_index, index_r, 0, false);
6028
6029 /* Build the head of the loop. */
6030 do_pending_stack_adjust ();
6031 emit_label (loop_start);
6032
6033 /* Assign value to element index. */
6034 position =
6035 fold_convert (ssizetype,
6036 fold_build2 (MINUS_EXPR,
6037 TREE_TYPE (index),
6038 index,
6039 TYPE_MIN_VALUE (domain)));
6040
6041 position =
6042 size_binop (MULT_EXPR, position,
6043 fold_convert (ssizetype,
6044 TYPE_SIZE_UNIT (elttype)));
6045
6046 pos_rtx = expand_normal (position);
6047 xtarget = offset_address (target, pos_rtx,
6048 highest_pow2_factor (position));
6049 xtarget = adjust_address (xtarget, mode, 0);
6050 if (TREE_CODE (value) == CONSTRUCTOR)
6051 store_constructor (value, xtarget, cleared,
6052 bitsize / BITS_PER_UNIT);
6053 else
6054 store_expr (value, xtarget, 0, false);
6055
6056 /* Generate a conditional jump to exit the loop. */
6057 exit_cond = build2 (LT_EXPR, integer_type_node,
6058 index, hi_index);
6059 jumpif (exit_cond, loop_end, -1);
6060
6061 /* Update the loop counter, and jump to the head of
6062 the loop. */
6063 expand_assignment (index,
6064 build2 (PLUS_EXPR, TREE_TYPE (index),
6065 index, integer_one_node),
6066 false);
6067
6068 emit_jump (loop_start);
6069
6070 /* Build the end of the loop. */
6071 emit_label (loop_end);
6072 }
6073 }
6074 else if ((index != 0 && ! host_integerp (index, 0))
6075 || ! host_integerp (TYPE_SIZE (elttype), 1))
6076 {
6077 tree position;
6078
6079 if (index == 0)
6080 index = ssize_int (1);
6081
6082 if (minelt)
6083 index = fold_convert (ssizetype,
6084 fold_build2 (MINUS_EXPR,
6085 TREE_TYPE (index),
6086 index,
6087 TYPE_MIN_VALUE (domain)));
6088
6089 position =
6090 size_binop (MULT_EXPR, index,
6091 fold_convert (ssizetype,
6092 TYPE_SIZE_UNIT (elttype)));
6093 xtarget = offset_address (target,
6094 expand_normal (position),
6095 highest_pow2_factor (position));
6096 xtarget = adjust_address (xtarget, mode, 0);
6097 store_expr (value, xtarget, 0, false);
6098 }
6099 else
6100 {
6101 if (index != 0)
6102 bitpos = ((tree_low_cst (index, 0) - minelt)
6103 * tree_low_cst (TYPE_SIZE (elttype), 1));
6104 else
6105 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
6106
6107 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6108 && TREE_CODE (type) == ARRAY_TYPE
6109 && TYPE_NONALIASED_COMPONENT (type))
6110 {
6111 target = copy_rtx (target);
6112 MEM_KEEP_ALIAS_SET_P (target) = 1;
6113 }
6114 store_constructor_field (target, bitsize, bitpos, mode, value,
6115 type, cleared, get_alias_set (elttype));
6116 }
6117 }
6118 break;
6119 }
6120
6121 case VECTOR_TYPE:
6122 {
6123 unsigned HOST_WIDE_INT idx;
6124 constructor_elt *ce;
6125 int i;
6126 int need_to_clear;
6127 int icode = 0;
6128 tree elttype = TREE_TYPE (type);
6129 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
6130 enum machine_mode eltmode = TYPE_MODE (elttype);
6131 HOST_WIDE_INT bitsize;
6132 HOST_WIDE_INT bitpos;
6133 rtvec vector = NULL;
6134 unsigned n_elts;
6135 alias_set_type alias;
6136
6137 gcc_assert (eltmode != BLKmode);
6138
6139 n_elts = TYPE_VECTOR_SUBPARTS (type);
6140 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6141 {
6142 enum machine_mode mode = GET_MODE (target);
6143
6144 icode = (int) optab_handler (vec_init_optab, mode);
6145 if (icode != CODE_FOR_nothing)
6146 {
6147 unsigned int i;
6148
6149 vector = rtvec_alloc (n_elts);
6150 for (i = 0; i < n_elts; i++)
6151 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6152 }
6153 }
6154
6155 /* If the constructor has fewer elements than the vector,
6156 clear the whole array first. Similarly if this is static
6157 constructor of a non-BLKmode object. */
6158 if (cleared)
6159 need_to_clear = 0;
6160 else if (REG_P (target) && TREE_STATIC (exp))
6161 need_to_clear = 1;
6162 else
6163 {
6164 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6165 tree value;
6166
6167 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6168 {
6169 int n_elts_here = tree_low_cst
6170 (int_const_binop (TRUNC_DIV_EXPR,
6171 TYPE_SIZE (TREE_TYPE (value)),
6172 TYPE_SIZE (elttype)), 1);
6173
6174 count += n_elts_here;
6175 if (mostly_zeros_p (value))
6176 zero_count += n_elts_here;
6177 }
6178
6179 /* Clear the entire vector first if there are any missing elements,
6180 or if the incidence of zero elements is >= 75%. */
6181 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6182 }
6183
6184 if (need_to_clear && size > 0 && !vector)
6185 {
6186 if (REG_P (target))
6187 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6188 else
6189 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6190 cleared = 1;
6191 }
6192
6193 /* Inform later passes that the old value is dead. */
6194 if (!cleared && !vector && REG_P (target))
6195 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6196
6197 if (MEM_P (target))
6198 alias = MEM_ALIAS_SET (target);
6199 else
6200 alias = get_alias_set (elttype);
6201
6202 /* Store each element of the constructor into the corresponding
6203 element of TARGET, determined by counting the elements. */
6204 for (idx = 0, i = 0;
6205 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6206 idx++, i += bitsize / elt_size)
6207 {
6208 HOST_WIDE_INT eltpos;
6209 tree value = ce->value;
6210
6211 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6212 if (cleared && initializer_zerop (value))
6213 continue;
6214
6215 if (ce->index)
6216 eltpos = tree_low_cst (ce->index, 1);
6217 else
6218 eltpos = i;
6219
6220 if (vector)
6221 {
6222 /* Vector CONSTRUCTORs should only be built from smaller
6223 vectors in the case of BLKmode vectors. */
6224 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6225 RTVEC_ELT (vector, eltpos)
6226 = expand_normal (value);
6227 }
6228 else
6229 {
6230 enum machine_mode value_mode =
6231 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6232 ? TYPE_MODE (TREE_TYPE (value))
6233 : eltmode;
6234 bitpos = eltpos * elt_size;
6235 store_constructor_field (target, bitsize, bitpos,
6236 value_mode, value, type,
6237 cleared, alias);
6238 }
6239 }
6240
6241 if (vector)
6242 emit_insn (GEN_FCN (icode)
6243 (target,
6244 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6245 break;
6246 }
6247
6248 default:
6249 gcc_unreachable ();
6250 }
6251 }
6252
6253 /* Store the value of EXP (an expression tree)
6254 into a subfield of TARGET which has mode MODE and occupies
6255 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6256 If MODE is VOIDmode, it means that we are storing into a bit-field.
6257
6258 BITREGION_START is bitpos of the first bitfield in this region.
6259 BITREGION_END is the bitpos of the ending bitfield in this region.
6260 These two fields are 0, if the C++ memory model does not apply,
6261 or we are not interested in keeping track of bitfield regions.
6262
6263 Always return const0_rtx unless we have something particular to
6264 return.
6265
6266 TYPE is the type of the underlying object,
6267
6268 ALIAS_SET is the alias set for the destination. This value will
6269 (in general) be different from that for TARGET, since TARGET is a
6270 reference to the containing structure.
6271
6272 If NONTEMPORAL is true, try generating a nontemporal store. */
6273
6274 static rtx
6275 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6276 unsigned HOST_WIDE_INT bitregion_start,
6277 unsigned HOST_WIDE_INT bitregion_end,
6278 enum machine_mode mode, tree exp, tree type,
6279 alias_set_type alias_set, bool nontemporal)
6280 {
6281 if (TREE_CODE (exp) == ERROR_MARK)
6282 return const0_rtx;
6283
6284 /* If we have nothing to store, do nothing unless the expression has
6285 side-effects. */
6286 if (bitsize == 0)
6287 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6288
6289 /* If we are storing into an unaligned field of an aligned union that is
6290 in a register, we may have the mode of TARGET being an integer mode but
6291 MODE == BLKmode. In that case, get an aligned object whose size and
6292 alignment are the same as TARGET and store TARGET into it (we can avoid
6293 the store if the field being stored is the entire width of TARGET). Then
6294 call ourselves recursively to store the field into a BLKmode version of
6295 that object. Finally, load from the object into TARGET. This is not
6296 very efficient in general, but should only be slightly more expensive
6297 than the otherwise-required unaligned accesses. Perhaps this can be
6298 cleaned up later. It's tempting to make OBJECT readonly, but it's set
6299 twice, once with emit_move_insn and once via store_field. */
6300
6301 if (mode == BLKmode
6302 && (REG_P (target) || GET_CODE (target) == SUBREG))
6303 {
6304 rtx object = assign_temp (type, 0, 1, 1);
6305 rtx blk_object = adjust_address (object, BLKmode, 0);
6306
6307 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
6308 emit_move_insn (object, target);
6309
6310 store_field (blk_object, bitsize, bitpos,
6311 bitregion_start, bitregion_end,
6312 mode, exp, type, MEM_ALIAS_SET (blk_object), nontemporal);
6313
6314 emit_move_insn (target, object);
6315
6316 /* We want to return the BLKmode version of the data. */
6317 return blk_object;
6318 }
6319
6320 if (GET_CODE (target) == CONCAT)
6321 {
6322 /* We're storing into a struct containing a single __complex. */
6323
6324 gcc_assert (!bitpos);
6325 return store_expr (exp, target, 0, nontemporal);
6326 }
6327
6328 /* If the structure is in a register or if the component
6329 is a bit field, we cannot use addressing to access it.
6330 Use bit-field techniques or SUBREG to store in it. */
6331
6332 if (mode == VOIDmode
6333 || (mode != BLKmode && ! direct_store[(int) mode]
6334 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6335 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6336 || REG_P (target)
6337 || GET_CODE (target) == SUBREG
6338 /* If the field isn't aligned enough to store as an ordinary memref,
6339 store it as a bit field. */
6340 || (mode != BLKmode
6341 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6342 || bitpos % GET_MODE_ALIGNMENT (mode))
6343 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6344 || (bitpos % BITS_PER_UNIT != 0)))
6345 || (bitsize >= 0 && mode != BLKmode
6346 && GET_MODE_BITSIZE (mode) > bitsize)
6347 /* If the RHS and field are a constant size and the size of the
6348 RHS isn't the same size as the bitfield, we must use bitfield
6349 operations. */
6350 || (bitsize >= 0
6351 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6352 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6353 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6354 decl we must use bitfield operations. */
6355 || (bitsize >= 0
6356 && TREE_CODE (exp) == MEM_REF
6357 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6358 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6359 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6360 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6361 {
6362 rtx temp;
6363 gimple nop_def;
6364
6365 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6366 implies a mask operation. If the precision is the same size as
6367 the field we're storing into, that mask is redundant. This is
6368 particularly common with bit field assignments generated by the
6369 C front end. */
6370 nop_def = get_def_for_expr (exp, NOP_EXPR);
6371 if (nop_def)
6372 {
6373 tree type = TREE_TYPE (exp);
6374 if (INTEGRAL_TYPE_P (type)
6375 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6376 && bitsize == TYPE_PRECISION (type))
6377 {
6378 tree op = gimple_assign_rhs1 (nop_def);
6379 type = TREE_TYPE (op);
6380 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6381 exp = op;
6382 }
6383 }
6384
6385 temp = expand_normal (exp);
6386
6387 /* If BITSIZE is narrower than the size of the type of EXP
6388 we will be narrowing TEMP. Normally, what's wanted are the
6389 low-order bits. However, if EXP's type is a record and this is
6390 big-endian machine, we want the upper BITSIZE bits. */
6391 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6392 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6393 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6394 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6395 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6396 NULL_RTX, 1);
6397
6398 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
6399 MODE. */
6400 if (mode != VOIDmode && mode != BLKmode
6401 && mode != TYPE_MODE (TREE_TYPE (exp)))
6402 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6403
6404 /* If the modes of TEMP and TARGET are both BLKmode, both
6405 must be in memory and BITPOS must be aligned on a byte
6406 boundary. If so, we simply do a block copy. Likewise
6407 for a BLKmode-like TARGET. */
6408 if (GET_MODE (temp) == BLKmode
6409 && (GET_MODE (target) == BLKmode
6410 || (MEM_P (target)
6411 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6412 && (bitpos % BITS_PER_UNIT) == 0
6413 && (bitsize % BITS_PER_UNIT) == 0)))
6414 {
6415 gcc_assert (MEM_P (target) && MEM_P (temp)
6416 && (bitpos % BITS_PER_UNIT) == 0);
6417
6418 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6419 emit_block_move (target, temp,
6420 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6421 / BITS_PER_UNIT),
6422 BLOCK_OP_NORMAL);
6423
6424 return const0_rtx;
6425 }
6426
6427 /* Store the value in the bitfield. */
6428 store_bit_field (target, bitsize, bitpos,
6429 bitregion_start, bitregion_end,
6430 mode, temp);
6431
6432 return const0_rtx;
6433 }
6434 else
6435 {
6436 /* Now build a reference to just the desired component. */
6437 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6438
6439 if (to_rtx == target)
6440 to_rtx = copy_rtx (to_rtx);
6441
6442 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6443 set_mem_alias_set (to_rtx, alias_set);
6444
6445 return store_expr (exp, to_rtx, 0, nontemporal);
6446 }
6447 }
6448 \f
6449 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6450 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6451 codes and find the ultimate containing object, which we return.
6452
6453 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6454 bit position, and *PUNSIGNEDP to the signedness of the field.
6455 If the position of the field is variable, we store a tree
6456 giving the variable offset (in units) in *POFFSET.
6457 This offset is in addition to the bit position.
6458 If the position is not variable, we store 0 in *POFFSET.
6459
6460 If any of the extraction expressions is volatile,
6461 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6462
6463 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6464 Otherwise, it is a mode that can be used to access the field.
6465
6466 If the field describes a variable-sized object, *PMODE is set to
6467 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6468 this case, but the address of the object can be found.
6469
6470 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6471 look through nodes that serve as markers of a greater alignment than
6472 the one that can be deduced from the expression. These nodes make it
6473 possible for front-ends to prevent temporaries from being created by
6474 the middle-end on alignment considerations. For that purpose, the
6475 normal operating mode at high-level is to always pass FALSE so that
6476 the ultimate containing object is really returned; moreover, the
6477 associated predicate handled_component_p will always return TRUE
6478 on these nodes, thus indicating that they are essentially handled
6479 by get_inner_reference. TRUE should only be passed when the caller
6480 is scanning the expression in order to build another representation
6481 and specifically knows how to handle these nodes; as such, this is
6482 the normal operating mode in the RTL expanders. */
6483
6484 tree
6485 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6486 HOST_WIDE_INT *pbitpos, tree *poffset,
6487 enum machine_mode *pmode, int *punsignedp,
6488 int *pvolatilep, bool keep_aligning)
6489 {
6490 tree size_tree = 0;
6491 enum machine_mode mode = VOIDmode;
6492 bool blkmode_bitfield = false;
6493 tree offset = size_zero_node;
6494 double_int bit_offset = double_int_zero;
6495
6496 /* First get the mode, signedness, and size. We do this from just the
6497 outermost expression. */
6498 *pbitsize = -1;
6499 if (TREE_CODE (exp) == COMPONENT_REF)
6500 {
6501 tree field = TREE_OPERAND (exp, 1);
6502 size_tree = DECL_SIZE (field);
6503 if (!DECL_BIT_FIELD (field))
6504 mode = DECL_MODE (field);
6505 else if (DECL_MODE (field) == BLKmode)
6506 blkmode_bitfield = true;
6507 else if (TREE_THIS_VOLATILE (exp)
6508 && flag_strict_volatile_bitfields > 0)
6509 /* Volatile bitfields should be accessed in the mode of the
6510 field's type, not the mode computed based on the bit
6511 size. */
6512 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6513
6514 *punsignedp = DECL_UNSIGNED (field);
6515 }
6516 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6517 {
6518 size_tree = TREE_OPERAND (exp, 1);
6519 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6520 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6521
6522 /* For vector types, with the correct size of access, use the mode of
6523 inner type. */
6524 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6525 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6526 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6527 mode = TYPE_MODE (TREE_TYPE (exp));
6528 }
6529 else
6530 {
6531 mode = TYPE_MODE (TREE_TYPE (exp));
6532 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6533
6534 if (mode == BLKmode)
6535 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6536 else
6537 *pbitsize = GET_MODE_BITSIZE (mode);
6538 }
6539
6540 if (size_tree != 0)
6541 {
6542 if (! host_integerp (size_tree, 1))
6543 mode = BLKmode, *pbitsize = -1;
6544 else
6545 *pbitsize = tree_low_cst (size_tree, 1);
6546 }
6547
6548 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6549 and find the ultimate containing object. */
6550 while (1)
6551 {
6552 switch (TREE_CODE (exp))
6553 {
6554 case BIT_FIELD_REF:
6555 bit_offset
6556 = double_int_add (bit_offset,
6557 tree_to_double_int (TREE_OPERAND (exp, 2)));
6558 break;
6559
6560 case COMPONENT_REF:
6561 {
6562 tree field = TREE_OPERAND (exp, 1);
6563 tree this_offset = component_ref_field_offset (exp);
6564
6565 /* If this field hasn't been filled in yet, don't go past it.
6566 This should only happen when folding expressions made during
6567 type construction. */
6568 if (this_offset == 0)
6569 break;
6570
6571 offset = size_binop (PLUS_EXPR, offset, this_offset);
6572 bit_offset = double_int_add (bit_offset,
6573 tree_to_double_int
6574 (DECL_FIELD_BIT_OFFSET (field)));
6575
6576 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6577 }
6578 break;
6579
6580 case ARRAY_REF:
6581 case ARRAY_RANGE_REF:
6582 {
6583 tree index = TREE_OPERAND (exp, 1);
6584 tree low_bound = array_ref_low_bound (exp);
6585 tree unit_size = array_ref_element_size (exp);
6586
6587 /* We assume all arrays have sizes that are a multiple of a byte.
6588 First subtract the lower bound, if any, in the type of the
6589 index, then convert to sizetype and multiply by the size of
6590 the array element. */
6591 if (! integer_zerop (low_bound))
6592 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6593 index, low_bound);
6594
6595 offset = size_binop (PLUS_EXPR, offset,
6596 size_binop (MULT_EXPR,
6597 fold_convert (sizetype, index),
6598 unit_size));
6599 }
6600 break;
6601
6602 case REALPART_EXPR:
6603 break;
6604
6605 case IMAGPART_EXPR:
6606 bit_offset = double_int_add (bit_offset,
6607 uhwi_to_double_int (*pbitsize));
6608 break;
6609
6610 case VIEW_CONVERT_EXPR:
6611 if (keep_aligning && STRICT_ALIGNMENT
6612 && (TYPE_ALIGN (TREE_TYPE (exp))
6613 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6614 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6615 < BIGGEST_ALIGNMENT)
6616 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6617 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6618 goto done;
6619 break;
6620
6621 case MEM_REF:
6622 /* Hand back the decl for MEM[&decl, off]. */
6623 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6624 {
6625 tree off = TREE_OPERAND (exp, 1);
6626 if (!integer_zerop (off))
6627 {
6628 double_int boff, coff = mem_ref_offset (exp);
6629 boff = double_int_lshift (coff,
6630 BITS_PER_UNIT == 8
6631 ? 3 : exact_log2 (BITS_PER_UNIT),
6632 HOST_BITS_PER_DOUBLE_INT, true);
6633 bit_offset = double_int_add (bit_offset, boff);
6634 }
6635 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6636 }
6637 goto done;
6638
6639 default:
6640 goto done;
6641 }
6642
6643 /* If any reference in the chain is volatile, the effect is volatile. */
6644 if (TREE_THIS_VOLATILE (exp))
6645 *pvolatilep = 1;
6646
6647 exp = TREE_OPERAND (exp, 0);
6648 }
6649 done:
6650
6651 /* If OFFSET is constant, see if we can return the whole thing as a
6652 constant bit position. Make sure to handle overflow during
6653 this conversion. */
6654 if (TREE_CODE (offset) == INTEGER_CST)
6655 {
6656 double_int tem = tree_to_double_int (offset);
6657 tem = double_int_sext (tem, TYPE_PRECISION (sizetype));
6658 tem = double_int_lshift (tem,
6659 BITS_PER_UNIT == 8
6660 ? 3 : exact_log2 (BITS_PER_UNIT),
6661 HOST_BITS_PER_DOUBLE_INT, true);
6662 tem = double_int_add (tem, bit_offset);
6663 if (double_int_fits_in_shwi_p (tem))
6664 {
6665 *pbitpos = double_int_to_shwi (tem);
6666 *poffset = offset = NULL_TREE;
6667 }
6668 }
6669
6670 /* Otherwise, split it up. */
6671 if (offset)
6672 {
6673 /* Avoid returning a negative bitpos as this may wreak havoc later. */
6674 if (double_int_negative_p (bit_offset))
6675 {
6676 double_int mask
6677 = double_int_mask (BITS_PER_UNIT == 8
6678 ? 3 : exact_log2 (BITS_PER_UNIT));
6679 double_int tem = double_int_and_not (bit_offset, mask);
6680 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
6681 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
6682 bit_offset = double_int_sub (bit_offset, tem);
6683 tem = double_int_rshift (tem,
6684 BITS_PER_UNIT == 8
6685 ? 3 : exact_log2 (BITS_PER_UNIT),
6686 HOST_BITS_PER_DOUBLE_INT, true);
6687 offset = size_binop (PLUS_EXPR, offset,
6688 double_int_to_tree (sizetype, tem));
6689 }
6690
6691 *pbitpos = double_int_to_shwi (bit_offset);
6692 *poffset = offset;
6693 }
6694
6695 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6696 if (mode == VOIDmode
6697 && blkmode_bitfield
6698 && (*pbitpos % BITS_PER_UNIT) == 0
6699 && (*pbitsize % BITS_PER_UNIT) == 0)
6700 *pmode = BLKmode;
6701 else
6702 *pmode = mode;
6703
6704 return exp;
6705 }
6706
6707 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6708 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6709 EXP is marked as PACKED. */
6710
6711 bool
6712 contains_packed_reference (const_tree exp)
6713 {
6714 bool packed_p = false;
6715
6716 while (1)
6717 {
6718 switch (TREE_CODE (exp))
6719 {
6720 case COMPONENT_REF:
6721 {
6722 tree field = TREE_OPERAND (exp, 1);
6723 packed_p = DECL_PACKED (field)
6724 || TYPE_PACKED (TREE_TYPE (field))
6725 || TYPE_PACKED (TREE_TYPE (exp));
6726 if (packed_p)
6727 goto done;
6728 }
6729 break;
6730
6731 case BIT_FIELD_REF:
6732 case ARRAY_REF:
6733 case ARRAY_RANGE_REF:
6734 case REALPART_EXPR:
6735 case IMAGPART_EXPR:
6736 case VIEW_CONVERT_EXPR:
6737 break;
6738
6739 default:
6740 goto done;
6741 }
6742 exp = TREE_OPERAND (exp, 0);
6743 }
6744 done:
6745 return packed_p;
6746 }
6747
6748 /* Return a tree of sizetype representing the size, in bytes, of the element
6749 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6750
6751 tree
6752 array_ref_element_size (tree exp)
6753 {
6754 tree aligned_size = TREE_OPERAND (exp, 3);
6755 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6756 location_t loc = EXPR_LOCATION (exp);
6757
6758 /* If a size was specified in the ARRAY_REF, it's the size measured
6759 in alignment units of the element type. So multiply by that value. */
6760 if (aligned_size)
6761 {
6762 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6763 sizetype from another type of the same width and signedness. */
6764 if (TREE_TYPE (aligned_size) != sizetype)
6765 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6766 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6767 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6768 }
6769
6770 /* Otherwise, take the size from that of the element type. Substitute
6771 any PLACEHOLDER_EXPR that we have. */
6772 else
6773 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6774 }
6775
6776 /* Return a tree representing the lower bound of the array mentioned in
6777 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6778
6779 tree
6780 array_ref_low_bound (tree exp)
6781 {
6782 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6783
6784 /* If a lower bound is specified in EXP, use it. */
6785 if (TREE_OPERAND (exp, 2))
6786 return TREE_OPERAND (exp, 2);
6787
6788 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6789 substituting for a PLACEHOLDER_EXPR as needed. */
6790 if (domain_type && TYPE_MIN_VALUE (domain_type))
6791 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6792
6793 /* Otherwise, return a zero of the appropriate type. */
6794 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6795 }
6796
6797 /* Return a tree representing the upper bound of the array mentioned in
6798 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6799
6800 tree
6801 array_ref_up_bound (tree exp)
6802 {
6803 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6804
6805 /* If there is a domain type and it has an upper bound, use it, substituting
6806 for a PLACEHOLDER_EXPR as needed. */
6807 if (domain_type && TYPE_MAX_VALUE (domain_type))
6808 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6809
6810 /* Otherwise fail. */
6811 return NULL_TREE;
6812 }
6813
6814 /* Return a tree representing the offset, in bytes, of the field referenced
6815 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6816
6817 tree
6818 component_ref_field_offset (tree exp)
6819 {
6820 tree aligned_offset = TREE_OPERAND (exp, 2);
6821 tree field = TREE_OPERAND (exp, 1);
6822 location_t loc = EXPR_LOCATION (exp);
6823
6824 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6825 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6826 value. */
6827 if (aligned_offset)
6828 {
6829 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6830 sizetype from another type of the same width and signedness. */
6831 if (TREE_TYPE (aligned_offset) != sizetype)
6832 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6833 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6834 size_int (DECL_OFFSET_ALIGN (field)
6835 / BITS_PER_UNIT));
6836 }
6837
6838 /* Otherwise, take the offset from that of the field. Substitute
6839 any PLACEHOLDER_EXPR that we have. */
6840 else
6841 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6842 }
6843
6844 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6845
6846 static unsigned HOST_WIDE_INT
6847 target_align (const_tree target)
6848 {
6849 /* We might have a chain of nested references with intermediate misaligning
6850 bitfields components, so need to recurse to find out. */
6851
6852 unsigned HOST_WIDE_INT this_align, outer_align;
6853
6854 switch (TREE_CODE (target))
6855 {
6856 case BIT_FIELD_REF:
6857 return 1;
6858
6859 case COMPONENT_REF:
6860 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6861 outer_align = target_align (TREE_OPERAND (target, 0));
6862 return MIN (this_align, outer_align);
6863
6864 case ARRAY_REF:
6865 case ARRAY_RANGE_REF:
6866 this_align = TYPE_ALIGN (TREE_TYPE (target));
6867 outer_align = target_align (TREE_OPERAND (target, 0));
6868 return MIN (this_align, outer_align);
6869
6870 CASE_CONVERT:
6871 case NON_LVALUE_EXPR:
6872 case VIEW_CONVERT_EXPR:
6873 this_align = TYPE_ALIGN (TREE_TYPE (target));
6874 outer_align = target_align (TREE_OPERAND (target, 0));
6875 return MAX (this_align, outer_align);
6876
6877 default:
6878 return TYPE_ALIGN (TREE_TYPE (target));
6879 }
6880 }
6881
6882 \f
6883 /* Given an rtx VALUE that may contain additions and multiplications, return
6884 an equivalent value that just refers to a register, memory, or constant.
6885 This is done by generating instructions to perform the arithmetic and
6886 returning a pseudo-register containing the value.
6887
6888 The returned value may be a REG, SUBREG, MEM or constant. */
6889
6890 rtx
6891 force_operand (rtx value, rtx target)
6892 {
6893 rtx op1, op2;
6894 /* Use subtarget as the target for operand 0 of a binary operation. */
6895 rtx subtarget = get_subtarget (target);
6896 enum rtx_code code = GET_CODE (value);
6897
6898 /* Check for subreg applied to an expression produced by loop optimizer. */
6899 if (code == SUBREG
6900 && !REG_P (SUBREG_REG (value))
6901 && !MEM_P (SUBREG_REG (value)))
6902 {
6903 value
6904 = simplify_gen_subreg (GET_MODE (value),
6905 force_reg (GET_MODE (SUBREG_REG (value)),
6906 force_operand (SUBREG_REG (value),
6907 NULL_RTX)),
6908 GET_MODE (SUBREG_REG (value)),
6909 SUBREG_BYTE (value));
6910 code = GET_CODE (value);
6911 }
6912
6913 /* Check for a PIC address load. */
6914 if ((code == PLUS || code == MINUS)
6915 && XEXP (value, 0) == pic_offset_table_rtx
6916 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6917 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6918 || GET_CODE (XEXP (value, 1)) == CONST))
6919 {
6920 if (!subtarget)
6921 subtarget = gen_reg_rtx (GET_MODE (value));
6922 emit_move_insn (subtarget, value);
6923 return subtarget;
6924 }
6925
6926 if (ARITHMETIC_P (value))
6927 {
6928 op2 = XEXP (value, 1);
6929 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6930 subtarget = 0;
6931 if (code == MINUS && CONST_INT_P (op2))
6932 {
6933 code = PLUS;
6934 op2 = negate_rtx (GET_MODE (value), op2);
6935 }
6936
6937 /* Check for an addition with OP2 a constant integer and our first
6938 operand a PLUS of a virtual register and something else. In that
6939 case, we want to emit the sum of the virtual register and the
6940 constant first and then add the other value. This allows virtual
6941 register instantiation to simply modify the constant rather than
6942 creating another one around this addition. */
6943 if (code == PLUS && CONST_INT_P (op2)
6944 && GET_CODE (XEXP (value, 0)) == PLUS
6945 && REG_P (XEXP (XEXP (value, 0), 0))
6946 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6947 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6948 {
6949 rtx temp = expand_simple_binop (GET_MODE (value), code,
6950 XEXP (XEXP (value, 0), 0), op2,
6951 subtarget, 0, OPTAB_LIB_WIDEN);
6952 return expand_simple_binop (GET_MODE (value), code, temp,
6953 force_operand (XEXP (XEXP (value,
6954 0), 1), 0),
6955 target, 0, OPTAB_LIB_WIDEN);
6956 }
6957
6958 op1 = force_operand (XEXP (value, 0), subtarget);
6959 op2 = force_operand (op2, NULL_RTX);
6960 switch (code)
6961 {
6962 case MULT:
6963 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6964 case DIV:
6965 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6966 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6967 target, 1, OPTAB_LIB_WIDEN);
6968 else
6969 return expand_divmod (0,
6970 FLOAT_MODE_P (GET_MODE (value))
6971 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6972 GET_MODE (value), op1, op2, target, 0);
6973 case MOD:
6974 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6975 target, 0);
6976 case UDIV:
6977 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6978 target, 1);
6979 case UMOD:
6980 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6981 target, 1);
6982 case ASHIFTRT:
6983 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6984 target, 0, OPTAB_LIB_WIDEN);
6985 default:
6986 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6987 target, 1, OPTAB_LIB_WIDEN);
6988 }
6989 }
6990 if (UNARY_P (value))
6991 {
6992 if (!target)
6993 target = gen_reg_rtx (GET_MODE (value));
6994 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6995 switch (code)
6996 {
6997 case ZERO_EXTEND:
6998 case SIGN_EXTEND:
6999 case TRUNCATE:
7000 case FLOAT_EXTEND:
7001 case FLOAT_TRUNCATE:
7002 convert_move (target, op1, code == ZERO_EXTEND);
7003 return target;
7004
7005 case FIX:
7006 case UNSIGNED_FIX:
7007 expand_fix (target, op1, code == UNSIGNED_FIX);
7008 return target;
7009
7010 case FLOAT:
7011 case UNSIGNED_FLOAT:
7012 expand_float (target, op1, code == UNSIGNED_FLOAT);
7013 return target;
7014
7015 default:
7016 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7017 }
7018 }
7019
7020 #ifdef INSN_SCHEDULING
7021 /* On machines that have insn scheduling, we want all memory reference to be
7022 explicit, so we need to deal with such paradoxical SUBREGs. */
7023 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7024 value
7025 = simplify_gen_subreg (GET_MODE (value),
7026 force_reg (GET_MODE (SUBREG_REG (value)),
7027 force_operand (SUBREG_REG (value),
7028 NULL_RTX)),
7029 GET_MODE (SUBREG_REG (value)),
7030 SUBREG_BYTE (value));
7031 #endif
7032
7033 return value;
7034 }
7035 \f
7036 /* Subroutine of expand_expr: return nonzero iff there is no way that
7037 EXP can reference X, which is being modified. TOP_P is nonzero if this
7038 call is going to be used to determine whether we need a temporary
7039 for EXP, as opposed to a recursive call to this function.
7040
7041 It is always safe for this routine to return zero since it merely
7042 searches for optimization opportunities. */
7043
7044 int
7045 safe_from_p (const_rtx x, tree exp, int top_p)
7046 {
7047 rtx exp_rtl = 0;
7048 int i, nops;
7049
7050 if (x == 0
7051 /* If EXP has varying size, we MUST use a target since we currently
7052 have no way of allocating temporaries of variable size
7053 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7054 So we assume here that something at a higher level has prevented a
7055 clash. This is somewhat bogus, but the best we can do. Only
7056 do this when X is BLKmode and when we are at the top level. */
7057 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7058 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7059 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7060 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7061 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7062 != INTEGER_CST)
7063 && GET_MODE (x) == BLKmode)
7064 /* If X is in the outgoing argument area, it is always safe. */
7065 || (MEM_P (x)
7066 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7067 || (GET_CODE (XEXP (x, 0)) == PLUS
7068 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7069 return 1;
7070
7071 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7072 find the underlying pseudo. */
7073 if (GET_CODE (x) == SUBREG)
7074 {
7075 x = SUBREG_REG (x);
7076 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7077 return 0;
7078 }
7079
7080 /* Now look at our tree code and possibly recurse. */
7081 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7082 {
7083 case tcc_declaration:
7084 exp_rtl = DECL_RTL_IF_SET (exp);
7085 break;
7086
7087 case tcc_constant:
7088 return 1;
7089
7090 case tcc_exceptional:
7091 if (TREE_CODE (exp) == TREE_LIST)
7092 {
7093 while (1)
7094 {
7095 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7096 return 0;
7097 exp = TREE_CHAIN (exp);
7098 if (!exp)
7099 return 1;
7100 if (TREE_CODE (exp) != TREE_LIST)
7101 return safe_from_p (x, exp, 0);
7102 }
7103 }
7104 else if (TREE_CODE (exp) == CONSTRUCTOR)
7105 {
7106 constructor_elt *ce;
7107 unsigned HOST_WIDE_INT idx;
7108
7109 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
7110 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7111 || !safe_from_p (x, ce->value, 0))
7112 return 0;
7113 return 1;
7114 }
7115 else if (TREE_CODE (exp) == ERROR_MARK)
7116 return 1; /* An already-visited SAVE_EXPR? */
7117 else
7118 return 0;
7119
7120 case tcc_statement:
7121 /* The only case we look at here is the DECL_INITIAL inside a
7122 DECL_EXPR. */
7123 return (TREE_CODE (exp) != DECL_EXPR
7124 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7125 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7126 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7127
7128 case tcc_binary:
7129 case tcc_comparison:
7130 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7131 return 0;
7132 /* Fall through. */
7133
7134 case tcc_unary:
7135 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7136
7137 case tcc_expression:
7138 case tcc_reference:
7139 case tcc_vl_exp:
7140 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7141 the expression. If it is set, we conflict iff we are that rtx or
7142 both are in memory. Otherwise, we check all operands of the
7143 expression recursively. */
7144
7145 switch (TREE_CODE (exp))
7146 {
7147 case ADDR_EXPR:
7148 /* If the operand is static or we are static, we can't conflict.
7149 Likewise if we don't conflict with the operand at all. */
7150 if (staticp (TREE_OPERAND (exp, 0))
7151 || TREE_STATIC (exp)
7152 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7153 return 1;
7154
7155 /* Otherwise, the only way this can conflict is if we are taking
7156 the address of a DECL a that address if part of X, which is
7157 very rare. */
7158 exp = TREE_OPERAND (exp, 0);
7159 if (DECL_P (exp))
7160 {
7161 if (!DECL_RTL_SET_P (exp)
7162 || !MEM_P (DECL_RTL (exp)))
7163 return 0;
7164 else
7165 exp_rtl = XEXP (DECL_RTL (exp), 0);
7166 }
7167 break;
7168
7169 case MEM_REF:
7170 if (MEM_P (x)
7171 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7172 get_alias_set (exp)))
7173 return 0;
7174 break;
7175
7176 case CALL_EXPR:
7177 /* Assume that the call will clobber all hard registers and
7178 all of memory. */
7179 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7180 || MEM_P (x))
7181 return 0;
7182 break;
7183
7184 case WITH_CLEANUP_EXPR:
7185 case CLEANUP_POINT_EXPR:
7186 /* Lowered by gimplify.c. */
7187 gcc_unreachable ();
7188
7189 case SAVE_EXPR:
7190 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7191
7192 default:
7193 break;
7194 }
7195
7196 /* If we have an rtx, we do not need to scan our operands. */
7197 if (exp_rtl)
7198 break;
7199
7200 nops = TREE_OPERAND_LENGTH (exp);
7201 for (i = 0; i < nops; i++)
7202 if (TREE_OPERAND (exp, i) != 0
7203 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7204 return 0;
7205
7206 break;
7207
7208 case tcc_type:
7209 /* Should never get a type here. */
7210 gcc_unreachable ();
7211 }
7212
7213 /* If we have an rtl, find any enclosed object. Then see if we conflict
7214 with it. */
7215 if (exp_rtl)
7216 {
7217 if (GET_CODE (exp_rtl) == SUBREG)
7218 {
7219 exp_rtl = SUBREG_REG (exp_rtl);
7220 if (REG_P (exp_rtl)
7221 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7222 return 0;
7223 }
7224
7225 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7226 are memory and they conflict. */
7227 return ! (rtx_equal_p (x, exp_rtl)
7228 || (MEM_P (x) && MEM_P (exp_rtl)
7229 && true_dependence (exp_rtl, VOIDmode, x)));
7230 }
7231
7232 /* If we reach here, it is safe. */
7233 return 1;
7234 }
7235
7236 \f
7237 /* Return the highest power of two that EXP is known to be a multiple of.
7238 This is used in updating alignment of MEMs in array references. */
7239
7240 unsigned HOST_WIDE_INT
7241 highest_pow2_factor (const_tree exp)
7242 {
7243 unsigned HOST_WIDE_INT c0, c1;
7244
7245 switch (TREE_CODE (exp))
7246 {
7247 case INTEGER_CST:
7248 /* We can find the lowest bit that's a one. If the low
7249 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7250 We need to handle this case since we can find it in a COND_EXPR,
7251 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7252 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7253 later ICE. */
7254 if (TREE_OVERFLOW (exp))
7255 return BIGGEST_ALIGNMENT;
7256 else
7257 {
7258 /* Note: tree_low_cst is intentionally not used here,
7259 we don't care about the upper bits. */
7260 c0 = TREE_INT_CST_LOW (exp);
7261 c0 &= -c0;
7262 return c0 ? c0 : BIGGEST_ALIGNMENT;
7263 }
7264 break;
7265
7266 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7267 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7268 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7269 return MIN (c0, c1);
7270
7271 case MULT_EXPR:
7272 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7273 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7274 return c0 * c1;
7275
7276 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7277 case CEIL_DIV_EXPR:
7278 if (integer_pow2p (TREE_OPERAND (exp, 1))
7279 && host_integerp (TREE_OPERAND (exp, 1), 1))
7280 {
7281 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7282 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7283 return MAX (1, c0 / c1);
7284 }
7285 break;
7286
7287 case BIT_AND_EXPR:
7288 /* The highest power of two of a bit-and expression is the maximum of
7289 that of its operands. We typically get here for a complex LHS and
7290 a constant negative power of two on the RHS to force an explicit
7291 alignment, so don't bother looking at the LHS. */
7292 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7293
7294 CASE_CONVERT:
7295 case SAVE_EXPR:
7296 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7297
7298 case COMPOUND_EXPR:
7299 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7300
7301 case COND_EXPR:
7302 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7303 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7304 return MIN (c0, c1);
7305
7306 default:
7307 break;
7308 }
7309
7310 return 1;
7311 }
7312
7313 /* Similar, except that the alignment requirements of TARGET are
7314 taken into account. Assume it is at least as aligned as its
7315 type, unless it is a COMPONENT_REF in which case the layout of
7316 the structure gives the alignment. */
7317
7318 static unsigned HOST_WIDE_INT
7319 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7320 {
7321 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7322 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7323
7324 return MAX (factor, talign);
7325 }
7326 \f
7327 /* Subroutine of expand_expr. Expand the two operands of a binary
7328 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7329 The value may be stored in TARGET if TARGET is nonzero. The
7330 MODIFIER argument is as documented by expand_expr. */
7331
7332 static void
7333 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7334 enum expand_modifier modifier)
7335 {
7336 if (! safe_from_p (target, exp1, 1))
7337 target = 0;
7338 if (operand_equal_p (exp0, exp1, 0))
7339 {
7340 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7341 *op1 = copy_rtx (*op0);
7342 }
7343 else
7344 {
7345 /* If we need to preserve evaluation order, copy exp0 into its own
7346 temporary variable so that it can't be clobbered by exp1. */
7347 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7348 exp0 = save_expr (exp0);
7349 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7350 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7351 }
7352 }
7353
7354 \f
7355 /* Return a MEM that contains constant EXP. DEFER is as for
7356 output_constant_def and MODIFIER is as for expand_expr. */
7357
7358 static rtx
7359 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7360 {
7361 rtx mem;
7362
7363 mem = output_constant_def (exp, defer);
7364 if (modifier != EXPAND_INITIALIZER)
7365 mem = use_anchored_address (mem);
7366 return mem;
7367 }
7368
7369 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7370 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7371
7372 static rtx
7373 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7374 enum expand_modifier modifier, addr_space_t as)
7375 {
7376 rtx result, subtarget;
7377 tree inner, offset;
7378 HOST_WIDE_INT bitsize, bitpos;
7379 int volatilep, unsignedp;
7380 enum machine_mode mode1;
7381
7382 /* If we are taking the address of a constant and are at the top level,
7383 we have to use output_constant_def since we can't call force_const_mem
7384 at top level. */
7385 /* ??? This should be considered a front-end bug. We should not be
7386 generating ADDR_EXPR of something that isn't an LVALUE. The only
7387 exception here is STRING_CST. */
7388 if (CONSTANT_CLASS_P (exp))
7389 {
7390 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7391 if (modifier < EXPAND_SUM)
7392 result = force_operand (result, target);
7393 return result;
7394 }
7395
7396 /* Everything must be something allowed by is_gimple_addressable. */
7397 switch (TREE_CODE (exp))
7398 {
7399 case INDIRECT_REF:
7400 /* This case will happen via recursion for &a->b. */
7401 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7402
7403 case MEM_REF:
7404 {
7405 tree tem = TREE_OPERAND (exp, 0);
7406 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7407 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7408 return expand_expr (tem, target, tmode, modifier);
7409 }
7410
7411 case CONST_DECL:
7412 /* Expand the initializer like constants above. */
7413 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7414 0, modifier), 0);
7415 if (modifier < EXPAND_SUM)
7416 result = force_operand (result, target);
7417 return result;
7418
7419 case REALPART_EXPR:
7420 /* The real part of the complex number is always first, therefore
7421 the address is the same as the address of the parent object. */
7422 offset = 0;
7423 bitpos = 0;
7424 inner = TREE_OPERAND (exp, 0);
7425 break;
7426
7427 case IMAGPART_EXPR:
7428 /* The imaginary part of the complex number is always second.
7429 The expression is therefore always offset by the size of the
7430 scalar type. */
7431 offset = 0;
7432 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7433 inner = TREE_OPERAND (exp, 0);
7434 break;
7435
7436 default:
7437 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7438 expand_expr, as that can have various side effects; LABEL_DECLs for
7439 example, may not have their DECL_RTL set yet. Expand the rtl of
7440 CONSTRUCTORs too, which should yield a memory reference for the
7441 constructor's contents. Assume language specific tree nodes can
7442 be expanded in some interesting way. */
7443 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7444 if (DECL_P (exp)
7445 || TREE_CODE (exp) == CONSTRUCTOR
7446 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7447 {
7448 result = expand_expr (exp, target, tmode,
7449 modifier == EXPAND_INITIALIZER
7450 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7451
7452 /* If the DECL isn't in memory, then the DECL wasn't properly
7453 marked TREE_ADDRESSABLE, which will be either a front-end
7454 or a tree optimizer bug. */
7455
7456 if (TREE_ADDRESSABLE (exp)
7457 && ! MEM_P (result)
7458 && ! targetm.calls.allocate_stack_slots_for_args())
7459 {
7460 error ("local frame unavailable (naked function?)");
7461 return result;
7462 }
7463 else
7464 gcc_assert (MEM_P (result));
7465 result = XEXP (result, 0);
7466
7467 /* ??? Is this needed anymore? */
7468 if (DECL_P (exp) && !TREE_USED (exp) == 0)
7469 {
7470 assemble_external (exp);
7471 TREE_USED (exp) = 1;
7472 }
7473
7474 if (modifier != EXPAND_INITIALIZER
7475 && modifier != EXPAND_CONST_ADDRESS
7476 && modifier != EXPAND_SUM)
7477 result = force_operand (result, target);
7478 return result;
7479 }
7480
7481 /* Pass FALSE as the last argument to get_inner_reference although
7482 we are expanding to RTL. The rationale is that we know how to
7483 handle "aligning nodes" here: we can just bypass them because
7484 they won't change the final object whose address will be returned
7485 (they actually exist only for that purpose). */
7486 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7487 &mode1, &unsignedp, &volatilep, false);
7488 break;
7489 }
7490
7491 /* We must have made progress. */
7492 gcc_assert (inner != exp);
7493
7494 subtarget = offset || bitpos ? NULL_RTX : target;
7495 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7496 inner alignment, force the inner to be sufficiently aligned. */
7497 if (CONSTANT_CLASS_P (inner)
7498 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7499 {
7500 inner = copy_node (inner);
7501 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7502 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7503 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7504 }
7505 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7506
7507 if (offset)
7508 {
7509 rtx tmp;
7510
7511 if (modifier != EXPAND_NORMAL)
7512 result = force_operand (result, NULL);
7513 tmp = expand_expr (offset, NULL_RTX, tmode,
7514 modifier == EXPAND_INITIALIZER
7515 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7516
7517 result = convert_memory_address_addr_space (tmode, result, as);
7518 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7519
7520 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7521 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7522 else
7523 {
7524 subtarget = bitpos ? NULL_RTX : target;
7525 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7526 1, OPTAB_LIB_WIDEN);
7527 }
7528 }
7529
7530 if (bitpos)
7531 {
7532 /* Someone beforehand should have rejected taking the address
7533 of such an object. */
7534 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7535
7536 result = plus_constant (result, bitpos / BITS_PER_UNIT);
7537 if (modifier < EXPAND_SUM)
7538 result = force_operand (result, target);
7539 }
7540
7541 return result;
7542 }
7543
7544 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7545 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7546
7547 static rtx
7548 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7549 enum expand_modifier modifier)
7550 {
7551 addr_space_t as = ADDR_SPACE_GENERIC;
7552 enum machine_mode address_mode = Pmode;
7553 enum machine_mode pointer_mode = ptr_mode;
7554 enum machine_mode rmode;
7555 rtx result;
7556
7557 /* Target mode of VOIDmode says "whatever's natural". */
7558 if (tmode == VOIDmode)
7559 tmode = TYPE_MODE (TREE_TYPE (exp));
7560
7561 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7562 {
7563 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7564 address_mode = targetm.addr_space.address_mode (as);
7565 pointer_mode = targetm.addr_space.pointer_mode (as);
7566 }
7567
7568 /* We can get called with some Weird Things if the user does silliness
7569 like "(short) &a". In that case, convert_memory_address won't do
7570 the right thing, so ignore the given target mode. */
7571 if (tmode != address_mode && tmode != pointer_mode)
7572 tmode = address_mode;
7573
7574 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7575 tmode, modifier, as);
7576
7577 /* Despite expand_expr claims concerning ignoring TMODE when not
7578 strictly convenient, stuff breaks if we don't honor it. Note
7579 that combined with the above, we only do this for pointer modes. */
7580 rmode = GET_MODE (result);
7581 if (rmode == VOIDmode)
7582 rmode = tmode;
7583 if (rmode != tmode)
7584 result = convert_memory_address_addr_space (tmode, result, as);
7585
7586 return result;
7587 }
7588
7589 /* Generate code for computing CONSTRUCTOR EXP.
7590 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7591 is TRUE, instead of creating a temporary variable in memory
7592 NULL is returned and the caller needs to handle it differently. */
7593
7594 static rtx
7595 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7596 bool avoid_temp_mem)
7597 {
7598 tree type = TREE_TYPE (exp);
7599 enum machine_mode mode = TYPE_MODE (type);
7600
7601 /* Try to avoid creating a temporary at all. This is possible
7602 if all of the initializer is zero.
7603 FIXME: try to handle all [0..255] initializers we can handle
7604 with memset. */
7605 if (TREE_STATIC (exp)
7606 && !TREE_ADDRESSABLE (exp)
7607 && target != 0 && mode == BLKmode
7608 && all_zeros_p (exp))
7609 {
7610 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7611 return target;
7612 }
7613
7614 /* All elts simple constants => refer to a constant in memory. But
7615 if this is a non-BLKmode mode, let it store a field at a time
7616 since that should make a CONST_INT or CONST_DOUBLE when we
7617 fold. Likewise, if we have a target we can use, it is best to
7618 store directly into the target unless the type is large enough
7619 that memcpy will be used. If we are making an initializer and
7620 all operands are constant, put it in memory as well.
7621
7622 FIXME: Avoid trying to fill vector constructors piece-meal.
7623 Output them with output_constant_def below unless we're sure
7624 they're zeros. This should go away when vector initializers
7625 are treated like VECTOR_CST instead of arrays. */
7626 if ((TREE_STATIC (exp)
7627 && ((mode == BLKmode
7628 && ! (target != 0 && safe_from_p (target, exp, 1)))
7629 || TREE_ADDRESSABLE (exp)
7630 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7631 && (! MOVE_BY_PIECES_P
7632 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7633 TYPE_ALIGN (type)))
7634 && ! mostly_zeros_p (exp))))
7635 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7636 && TREE_CONSTANT (exp)))
7637 {
7638 rtx constructor;
7639
7640 if (avoid_temp_mem)
7641 return NULL_RTX;
7642
7643 constructor = expand_expr_constant (exp, 1, modifier);
7644
7645 if (modifier != EXPAND_CONST_ADDRESS
7646 && modifier != EXPAND_INITIALIZER
7647 && modifier != EXPAND_SUM)
7648 constructor = validize_mem (constructor);
7649
7650 return constructor;
7651 }
7652
7653 /* Handle calls that pass values in multiple non-contiguous
7654 locations. The Irix 6 ABI has examples of this. */
7655 if (target == 0 || ! safe_from_p (target, exp, 1)
7656 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7657 {
7658 if (avoid_temp_mem)
7659 return NULL_RTX;
7660
7661 target
7662 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7663 | (TREE_READONLY (exp)
7664 * TYPE_QUAL_CONST))),
7665 0, TREE_ADDRESSABLE (exp), 1);
7666 }
7667
7668 store_constructor (exp, target, 0, int_expr_size (exp));
7669 return target;
7670 }
7671
7672
7673 /* expand_expr: generate code for computing expression EXP.
7674 An rtx for the computed value is returned. The value is never null.
7675 In the case of a void EXP, const0_rtx is returned.
7676
7677 The value may be stored in TARGET if TARGET is nonzero.
7678 TARGET is just a suggestion; callers must assume that
7679 the rtx returned may not be the same as TARGET.
7680
7681 If TARGET is CONST0_RTX, it means that the value will be ignored.
7682
7683 If TMODE is not VOIDmode, it suggests generating the
7684 result in mode TMODE. But this is done only when convenient.
7685 Otherwise, TMODE is ignored and the value generated in its natural mode.
7686 TMODE is just a suggestion; callers must assume that
7687 the rtx returned may not have mode TMODE.
7688
7689 Note that TARGET may have neither TMODE nor MODE. In that case, it
7690 probably will not be used.
7691
7692 If MODIFIER is EXPAND_SUM then when EXP is an addition
7693 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7694 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7695 products as above, or REG or MEM, or constant.
7696 Ordinarily in such cases we would output mul or add instructions
7697 and then return a pseudo reg containing the sum.
7698
7699 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7700 it also marks a label as absolutely required (it can't be dead).
7701 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7702 This is used for outputting expressions used in initializers.
7703
7704 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7705 with a constant address even if that address is not normally legitimate.
7706 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7707
7708 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7709 a call parameter. Such targets require special care as we haven't yet
7710 marked TARGET so that it's safe from being trashed by libcalls. We
7711 don't want to use TARGET for anything but the final result;
7712 Intermediate values must go elsewhere. Additionally, calls to
7713 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7714
7715 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7716 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7717 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7718 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7719 recursively. */
7720
7721 rtx
7722 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7723 enum expand_modifier modifier, rtx *alt_rtl)
7724 {
7725 rtx ret;
7726
7727 /* Handle ERROR_MARK before anybody tries to access its type. */
7728 if (TREE_CODE (exp) == ERROR_MARK
7729 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7730 {
7731 ret = CONST0_RTX (tmode);
7732 return ret ? ret : const0_rtx;
7733 }
7734
7735 /* If this is an expression of some kind and it has an associated line
7736 number, then emit the line number before expanding the expression.
7737
7738 We need to save and restore the file and line information so that
7739 errors discovered during expansion are emitted with the right
7740 information. It would be better of the diagnostic routines
7741 used the file/line information embedded in the tree nodes rather
7742 than globals. */
7743 if (cfun && EXPR_HAS_LOCATION (exp))
7744 {
7745 location_t saved_location = input_location;
7746 location_t saved_curr_loc = get_curr_insn_source_location ();
7747 tree saved_block = get_curr_insn_block ();
7748 input_location = EXPR_LOCATION (exp);
7749 set_curr_insn_source_location (input_location);
7750
7751 /* Record where the insns produced belong. */
7752 set_curr_insn_block (TREE_BLOCK (exp));
7753
7754 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7755
7756 input_location = saved_location;
7757 set_curr_insn_block (saved_block);
7758 set_curr_insn_source_location (saved_curr_loc);
7759 }
7760 else
7761 {
7762 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7763 }
7764
7765 return ret;
7766 }
7767
7768 rtx
7769 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7770 enum expand_modifier modifier)
7771 {
7772 rtx op0, op1, op2, temp;
7773 tree type;
7774 int unsignedp;
7775 enum machine_mode mode;
7776 enum tree_code code = ops->code;
7777 optab this_optab;
7778 rtx subtarget, original_target;
7779 int ignore;
7780 bool reduce_bit_field;
7781 location_t loc = ops->location;
7782 tree treeop0, treeop1, treeop2;
7783 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7784 ? reduce_to_bit_field_precision ((expr), \
7785 target, \
7786 type) \
7787 : (expr))
7788
7789 type = ops->type;
7790 mode = TYPE_MODE (type);
7791 unsignedp = TYPE_UNSIGNED (type);
7792
7793 treeop0 = ops->op0;
7794 treeop1 = ops->op1;
7795 treeop2 = ops->op2;
7796
7797 /* We should be called only on simple (binary or unary) expressions,
7798 exactly those that are valid in gimple expressions that aren't
7799 GIMPLE_SINGLE_RHS (or invalid). */
7800 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7801 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7802 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7803
7804 ignore = (target == const0_rtx
7805 || ((CONVERT_EXPR_CODE_P (code)
7806 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7807 && TREE_CODE (type) == VOID_TYPE));
7808
7809 /* We should be called only if we need the result. */
7810 gcc_assert (!ignore);
7811
7812 /* An operation in what may be a bit-field type needs the
7813 result to be reduced to the precision of the bit-field type,
7814 which is narrower than that of the type's mode. */
7815 reduce_bit_field = (INTEGRAL_TYPE_P (type)
7816 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7817
7818 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7819 target = 0;
7820
7821 /* Use subtarget as the target for operand 0 of a binary operation. */
7822 subtarget = get_subtarget (target);
7823 original_target = target;
7824
7825 switch (code)
7826 {
7827 case NON_LVALUE_EXPR:
7828 case PAREN_EXPR:
7829 CASE_CONVERT:
7830 if (treeop0 == error_mark_node)
7831 return const0_rtx;
7832
7833 if (TREE_CODE (type) == UNION_TYPE)
7834 {
7835 tree valtype = TREE_TYPE (treeop0);
7836
7837 /* If both input and output are BLKmode, this conversion isn't doing
7838 anything except possibly changing memory attribute. */
7839 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7840 {
7841 rtx result = expand_expr (treeop0, target, tmode,
7842 modifier);
7843
7844 result = copy_rtx (result);
7845 set_mem_attributes (result, type, 0);
7846 return result;
7847 }
7848
7849 if (target == 0)
7850 {
7851 if (TYPE_MODE (type) != BLKmode)
7852 target = gen_reg_rtx (TYPE_MODE (type));
7853 else
7854 target = assign_temp (type, 0, 1, 1);
7855 }
7856
7857 if (MEM_P (target))
7858 /* Store data into beginning of memory target. */
7859 store_expr (treeop0,
7860 adjust_address (target, TYPE_MODE (valtype), 0),
7861 modifier == EXPAND_STACK_PARM,
7862 false);
7863
7864 else
7865 {
7866 gcc_assert (REG_P (target));
7867
7868 /* Store this field into a union of the proper type. */
7869 store_field (target,
7870 MIN ((int_size_in_bytes (TREE_TYPE
7871 (treeop0))
7872 * BITS_PER_UNIT),
7873 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7874 0, 0, 0, TYPE_MODE (valtype), treeop0,
7875 type, 0, false);
7876 }
7877
7878 /* Return the entire union. */
7879 return target;
7880 }
7881
7882 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
7883 {
7884 op0 = expand_expr (treeop0, target, VOIDmode,
7885 modifier);
7886
7887 /* If the signedness of the conversion differs and OP0 is
7888 a promoted SUBREG, clear that indication since we now
7889 have to do the proper extension. */
7890 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
7891 && GET_CODE (op0) == SUBREG)
7892 SUBREG_PROMOTED_VAR_P (op0) = 0;
7893
7894 return REDUCE_BIT_FIELD (op0);
7895 }
7896
7897 op0 = expand_expr (treeop0, NULL_RTX, mode,
7898 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
7899 if (GET_MODE (op0) == mode)
7900 ;
7901
7902 /* If OP0 is a constant, just convert it into the proper mode. */
7903 else if (CONSTANT_P (op0))
7904 {
7905 tree inner_type = TREE_TYPE (treeop0);
7906 enum machine_mode inner_mode = GET_MODE (op0);
7907
7908 if (inner_mode == VOIDmode)
7909 inner_mode = TYPE_MODE (inner_type);
7910
7911 if (modifier == EXPAND_INITIALIZER)
7912 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7913 subreg_lowpart_offset (mode,
7914 inner_mode));
7915 else
7916 op0= convert_modes (mode, inner_mode, op0,
7917 TYPE_UNSIGNED (inner_type));
7918 }
7919
7920 else if (modifier == EXPAND_INITIALIZER)
7921 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7922
7923 else if (target == 0)
7924 op0 = convert_to_mode (mode, op0,
7925 TYPE_UNSIGNED (TREE_TYPE
7926 (treeop0)));
7927 else
7928 {
7929 convert_move (target, op0,
7930 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7931 op0 = target;
7932 }
7933
7934 return REDUCE_BIT_FIELD (op0);
7935
7936 case ADDR_SPACE_CONVERT_EXPR:
7937 {
7938 tree treeop0_type = TREE_TYPE (treeop0);
7939 addr_space_t as_to;
7940 addr_space_t as_from;
7941
7942 gcc_assert (POINTER_TYPE_P (type));
7943 gcc_assert (POINTER_TYPE_P (treeop0_type));
7944
7945 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
7946 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
7947
7948 /* Conversions between pointers to the same address space should
7949 have been implemented via CONVERT_EXPR / NOP_EXPR. */
7950 gcc_assert (as_to != as_from);
7951
7952 /* Ask target code to handle conversion between pointers
7953 to overlapping address spaces. */
7954 if (targetm.addr_space.subset_p (as_to, as_from)
7955 || targetm.addr_space.subset_p (as_from, as_to))
7956 {
7957 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
7958 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
7959 gcc_assert (op0);
7960 return op0;
7961 }
7962
7963 /* For disjoint address spaces, converting anything but
7964 a null pointer invokes undefined behaviour. We simply
7965 always return a null pointer here. */
7966 return CONST0_RTX (mode);
7967 }
7968
7969 case POINTER_PLUS_EXPR:
7970 /* Even though the sizetype mode and the pointer's mode can be different
7971 expand is able to handle this correctly and get the correct result out
7972 of the PLUS_EXPR code. */
7973 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
7974 if sizetype precision is smaller than pointer precision. */
7975 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
7976 treeop1 = fold_convert_loc (loc, type,
7977 fold_convert_loc (loc, ssizetype,
7978 treeop1));
7979 case PLUS_EXPR:
7980 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7981 something else, make sure we add the register to the constant and
7982 then to the other thing. This case can occur during strength
7983 reduction and doing it this way will produce better code if the
7984 frame pointer or argument pointer is eliminated.
7985
7986 fold-const.c will ensure that the constant is always in the inner
7987 PLUS_EXPR, so the only case we need to do anything about is if
7988 sp, ap, or fp is our second argument, in which case we must swap
7989 the innermost first argument and our second argument. */
7990
7991 if (TREE_CODE (treeop0) == PLUS_EXPR
7992 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
7993 && TREE_CODE (treeop1) == VAR_DECL
7994 && (DECL_RTL (treeop1) == frame_pointer_rtx
7995 || DECL_RTL (treeop1) == stack_pointer_rtx
7996 || DECL_RTL (treeop1) == arg_pointer_rtx))
7997 {
7998 tree t = treeop1;
7999
8000 treeop1 = TREE_OPERAND (treeop0, 0);
8001 TREE_OPERAND (treeop0, 0) = t;
8002 }
8003
8004 /* If the result is to be ptr_mode and we are adding an integer to
8005 something, we might be forming a constant. So try to use
8006 plus_constant. If it produces a sum and we can't accept it,
8007 use force_operand. This allows P = &ARR[const] to generate
8008 efficient code on machines where a SYMBOL_REF is not a valid
8009 address.
8010
8011 If this is an EXPAND_SUM call, always return the sum. */
8012 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8013 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8014 {
8015 if (modifier == EXPAND_STACK_PARM)
8016 target = 0;
8017 if (TREE_CODE (treeop0) == INTEGER_CST
8018 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8019 && TREE_CONSTANT (treeop1))
8020 {
8021 rtx constant_part;
8022
8023 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8024 EXPAND_SUM);
8025 /* Use immed_double_const to ensure that the constant is
8026 truncated according to the mode of OP1, then sign extended
8027 to a HOST_WIDE_INT. Using the constant directly can result
8028 in non-canonical RTL in a 64x32 cross compile. */
8029 constant_part
8030 = immed_double_const (TREE_INT_CST_LOW (treeop0),
8031 (HOST_WIDE_INT) 0,
8032 TYPE_MODE (TREE_TYPE (treeop1)));
8033 op1 = plus_constant (op1, INTVAL (constant_part));
8034 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8035 op1 = force_operand (op1, target);
8036 return REDUCE_BIT_FIELD (op1);
8037 }
8038
8039 else if (TREE_CODE (treeop1) == INTEGER_CST
8040 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8041 && TREE_CONSTANT (treeop0))
8042 {
8043 rtx constant_part;
8044
8045 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8046 (modifier == EXPAND_INITIALIZER
8047 ? EXPAND_INITIALIZER : EXPAND_SUM));
8048 if (! CONSTANT_P (op0))
8049 {
8050 op1 = expand_expr (treeop1, NULL_RTX,
8051 VOIDmode, modifier);
8052 /* Return a PLUS if modifier says it's OK. */
8053 if (modifier == EXPAND_SUM
8054 || modifier == EXPAND_INITIALIZER)
8055 return simplify_gen_binary (PLUS, mode, op0, op1);
8056 goto binop2;
8057 }
8058 /* Use immed_double_const to ensure that the constant is
8059 truncated according to the mode of OP1, then sign extended
8060 to a HOST_WIDE_INT. Using the constant directly can result
8061 in non-canonical RTL in a 64x32 cross compile. */
8062 constant_part
8063 = immed_double_const (TREE_INT_CST_LOW (treeop1),
8064 (HOST_WIDE_INT) 0,
8065 TYPE_MODE (TREE_TYPE (treeop0)));
8066 op0 = plus_constant (op0, INTVAL (constant_part));
8067 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8068 op0 = force_operand (op0, target);
8069 return REDUCE_BIT_FIELD (op0);
8070 }
8071 }
8072
8073 /* Use TER to expand pointer addition of a negated value
8074 as pointer subtraction. */
8075 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8076 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8077 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8078 && TREE_CODE (treeop1) == SSA_NAME
8079 && TYPE_MODE (TREE_TYPE (treeop0))
8080 == TYPE_MODE (TREE_TYPE (treeop1)))
8081 {
8082 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8083 if (def)
8084 {
8085 treeop1 = gimple_assign_rhs1 (def);
8086 code = MINUS_EXPR;
8087 goto do_minus;
8088 }
8089 }
8090
8091 /* No sense saving up arithmetic to be done
8092 if it's all in the wrong mode to form part of an address.
8093 And force_operand won't know whether to sign-extend or
8094 zero-extend. */
8095 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8096 || mode != ptr_mode)
8097 {
8098 expand_operands (treeop0, treeop1,
8099 subtarget, &op0, &op1, EXPAND_NORMAL);
8100 if (op0 == const0_rtx)
8101 return op1;
8102 if (op1 == const0_rtx)
8103 return op0;
8104 goto binop2;
8105 }
8106
8107 expand_operands (treeop0, treeop1,
8108 subtarget, &op0, &op1, modifier);
8109 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8110
8111 case MINUS_EXPR:
8112 do_minus:
8113 /* For initializers, we are allowed to return a MINUS of two
8114 symbolic constants. Here we handle all cases when both operands
8115 are constant. */
8116 /* Handle difference of two symbolic constants,
8117 for the sake of an initializer. */
8118 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8119 && really_constant_p (treeop0)
8120 && really_constant_p (treeop1))
8121 {
8122 expand_operands (treeop0, treeop1,
8123 NULL_RTX, &op0, &op1, modifier);
8124
8125 /* If the last operand is a CONST_INT, use plus_constant of
8126 the negated constant. Else make the MINUS. */
8127 if (CONST_INT_P (op1))
8128 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
8129 else
8130 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8131 }
8132
8133 /* No sense saving up arithmetic to be done
8134 if it's all in the wrong mode to form part of an address.
8135 And force_operand won't know whether to sign-extend or
8136 zero-extend. */
8137 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8138 || mode != ptr_mode)
8139 goto binop;
8140
8141 expand_operands (treeop0, treeop1,
8142 subtarget, &op0, &op1, modifier);
8143
8144 /* Convert A - const to A + (-const). */
8145 if (CONST_INT_P (op1))
8146 {
8147 op1 = negate_rtx (mode, op1);
8148 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8149 }
8150
8151 goto binop2;
8152
8153 case WIDEN_MULT_PLUS_EXPR:
8154 case WIDEN_MULT_MINUS_EXPR:
8155 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8156 op2 = expand_normal (treeop2);
8157 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8158 target, unsignedp);
8159 return target;
8160
8161 case WIDEN_MULT_EXPR:
8162 /* If first operand is constant, swap them.
8163 Thus the following special case checks need only
8164 check the second operand. */
8165 if (TREE_CODE (treeop0) == INTEGER_CST)
8166 {
8167 tree t1 = treeop0;
8168 treeop0 = treeop1;
8169 treeop1 = t1;
8170 }
8171
8172 /* First, check if we have a multiplication of one signed and one
8173 unsigned operand. */
8174 if (TREE_CODE (treeop1) != INTEGER_CST
8175 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8176 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8177 {
8178 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8179 this_optab = usmul_widen_optab;
8180 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8181 != CODE_FOR_nothing)
8182 {
8183 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8184 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8185 EXPAND_NORMAL);
8186 else
8187 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8188 EXPAND_NORMAL);
8189 goto binop3;
8190 }
8191 }
8192 /* Check for a multiplication with matching signedness. */
8193 else if ((TREE_CODE (treeop1) == INTEGER_CST
8194 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8195 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8196 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8197 {
8198 tree op0type = TREE_TYPE (treeop0);
8199 enum machine_mode innermode = TYPE_MODE (op0type);
8200 bool zextend_p = TYPE_UNSIGNED (op0type);
8201 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8202 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8203
8204 if (TREE_CODE (treeop0) != INTEGER_CST)
8205 {
8206 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8207 != CODE_FOR_nothing)
8208 {
8209 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8210 EXPAND_NORMAL);
8211 temp = expand_widening_mult (mode, op0, op1, target,
8212 unsignedp, this_optab);
8213 return REDUCE_BIT_FIELD (temp);
8214 }
8215 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8216 != CODE_FOR_nothing
8217 && innermode == word_mode)
8218 {
8219 rtx htem, hipart;
8220 op0 = expand_normal (treeop0);
8221 if (TREE_CODE (treeop1) == INTEGER_CST)
8222 op1 = convert_modes (innermode, mode,
8223 expand_normal (treeop1), unsignedp);
8224 else
8225 op1 = expand_normal (treeop1);
8226 temp = expand_binop (mode, other_optab, op0, op1, target,
8227 unsignedp, OPTAB_LIB_WIDEN);
8228 hipart = gen_highpart (innermode, temp);
8229 htem = expand_mult_highpart_adjust (innermode, hipart,
8230 op0, op1, hipart,
8231 zextend_p);
8232 if (htem != hipart)
8233 emit_move_insn (hipart, htem);
8234 return REDUCE_BIT_FIELD (temp);
8235 }
8236 }
8237 }
8238 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8239 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8240 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8241 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8242
8243 case FMA_EXPR:
8244 {
8245 optab opt = fma_optab;
8246 gimple def0, def2;
8247
8248 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8249 call. */
8250 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8251 {
8252 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8253 tree call_expr;
8254
8255 gcc_assert (fn != NULL_TREE);
8256 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8257 return expand_builtin (call_expr, target, subtarget, mode, false);
8258 }
8259
8260 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8261 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8262
8263 op0 = op2 = NULL;
8264
8265 if (def0 && def2
8266 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8267 {
8268 opt = fnms_optab;
8269 op0 = expand_normal (gimple_assign_rhs1 (def0));
8270 op2 = expand_normal (gimple_assign_rhs1 (def2));
8271 }
8272 else if (def0
8273 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8274 {
8275 opt = fnma_optab;
8276 op0 = expand_normal (gimple_assign_rhs1 (def0));
8277 }
8278 else if (def2
8279 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8280 {
8281 opt = fms_optab;
8282 op2 = expand_normal (gimple_assign_rhs1 (def2));
8283 }
8284
8285 if (op0 == NULL)
8286 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8287 if (op2 == NULL)
8288 op2 = expand_normal (treeop2);
8289 op1 = expand_normal (treeop1);
8290
8291 return expand_ternary_op (TYPE_MODE (type), opt,
8292 op0, op1, op2, target, 0);
8293 }
8294
8295 case MULT_EXPR:
8296 /* If this is a fixed-point operation, then we cannot use the code
8297 below because "expand_mult" doesn't support sat/no-sat fixed-point
8298 multiplications. */
8299 if (ALL_FIXED_POINT_MODE_P (mode))
8300 goto binop;
8301
8302 /* If first operand is constant, swap them.
8303 Thus the following special case checks need only
8304 check the second operand. */
8305 if (TREE_CODE (treeop0) == INTEGER_CST)
8306 {
8307 tree t1 = treeop0;
8308 treeop0 = treeop1;
8309 treeop1 = t1;
8310 }
8311
8312 /* Attempt to return something suitable for generating an
8313 indexed address, for machines that support that. */
8314
8315 if (modifier == EXPAND_SUM && mode == ptr_mode
8316 && host_integerp (treeop1, 0))
8317 {
8318 tree exp1 = treeop1;
8319
8320 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8321 EXPAND_SUM);
8322
8323 if (!REG_P (op0))
8324 op0 = force_operand (op0, NULL_RTX);
8325 if (!REG_P (op0))
8326 op0 = copy_to_mode_reg (mode, op0);
8327
8328 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8329 gen_int_mode (tree_low_cst (exp1, 0),
8330 TYPE_MODE (TREE_TYPE (exp1)))));
8331 }
8332
8333 if (modifier == EXPAND_STACK_PARM)
8334 target = 0;
8335
8336 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8337 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8338
8339 case TRUNC_DIV_EXPR:
8340 case FLOOR_DIV_EXPR:
8341 case CEIL_DIV_EXPR:
8342 case ROUND_DIV_EXPR:
8343 case EXACT_DIV_EXPR:
8344 /* If this is a fixed-point operation, then we cannot use the code
8345 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8346 divisions. */
8347 if (ALL_FIXED_POINT_MODE_P (mode))
8348 goto binop;
8349
8350 if (modifier == EXPAND_STACK_PARM)
8351 target = 0;
8352 /* Possible optimization: compute the dividend with EXPAND_SUM
8353 then if the divisor is constant can optimize the case
8354 where some terms of the dividend have coeffs divisible by it. */
8355 expand_operands (treeop0, treeop1,
8356 subtarget, &op0, &op1, EXPAND_NORMAL);
8357 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8358
8359 case RDIV_EXPR:
8360 goto binop;
8361
8362 case TRUNC_MOD_EXPR:
8363 case FLOOR_MOD_EXPR:
8364 case CEIL_MOD_EXPR:
8365 case ROUND_MOD_EXPR:
8366 if (modifier == EXPAND_STACK_PARM)
8367 target = 0;
8368 expand_operands (treeop0, treeop1,
8369 subtarget, &op0, &op1, EXPAND_NORMAL);
8370 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8371
8372 case FIXED_CONVERT_EXPR:
8373 op0 = expand_normal (treeop0);
8374 if (target == 0 || modifier == EXPAND_STACK_PARM)
8375 target = gen_reg_rtx (mode);
8376
8377 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8378 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8379 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8380 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8381 else
8382 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8383 return target;
8384
8385 case FIX_TRUNC_EXPR:
8386 op0 = expand_normal (treeop0);
8387 if (target == 0 || modifier == EXPAND_STACK_PARM)
8388 target = gen_reg_rtx (mode);
8389 expand_fix (target, op0, unsignedp);
8390 return target;
8391
8392 case FLOAT_EXPR:
8393 op0 = expand_normal (treeop0);
8394 if (target == 0 || modifier == EXPAND_STACK_PARM)
8395 target = gen_reg_rtx (mode);
8396 /* expand_float can't figure out what to do if FROM has VOIDmode.
8397 So give it the correct mode. With -O, cse will optimize this. */
8398 if (GET_MODE (op0) == VOIDmode)
8399 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8400 op0);
8401 expand_float (target, op0,
8402 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8403 return target;
8404
8405 case NEGATE_EXPR:
8406 op0 = expand_expr (treeop0, subtarget,
8407 VOIDmode, EXPAND_NORMAL);
8408 if (modifier == EXPAND_STACK_PARM)
8409 target = 0;
8410 temp = expand_unop (mode,
8411 optab_for_tree_code (NEGATE_EXPR, type,
8412 optab_default),
8413 op0, target, 0);
8414 gcc_assert (temp);
8415 return REDUCE_BIT_FIELD (temp);
8416
8417 case ABS_EXPR:
8418 op0 = expand_expr (treeop0, subtarget,
8419 VOIDmode, EXPAND_NORMAL);
8420 if (modifier == EXPAND_STACK_PARM)
8421 target = 0;
8422
8423 /* ABS_EXPR is not valid for complex arguments. */
8424 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8425 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8426
8427 /* Unsigned abs is simply the operand. Testing here means we don't
8428 risk generating incorrect code below. */
8429 if (TYPE_UNSIGNED (type))
8430 return op0;
8431
8432 return expand_abs (mode, op0, target, unsignedp,
8433 safe_from_p (target, treeop0, 1));
8434
8435 case MAX_EXPR:
8436 case MIN_EXPR:
8437 target = original_target;
8438 if (target == 0
8439 || modifier == EXPAND_STACK_PARM
8440 || (MEM_P (target) && MEM_VOLATILE_P (target))
8441 || GET_MODE (target) != mode
8442 || (REG_P (target)
8443 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8444 target = gen_reg_rtx (mode);
8445 expand_operands (treeop0, treeop1,
8446 target, &op0, &op1, EXPAND_NORMAL);
8447
8448 /* First try to do it with a special MIN or MAX instruction.
8449 If that does not win, use a conditional jump to select the proper
8450 value. */
8451 this_optab = optab_for_tree_code (code, type, optab_default);
8452 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8453 OPTAB_WIDEN);
8454 if (temp != 0)
8455 return temp;
8456
8457 /* At this point, a MEM target is no longer useful; we will get better
8458 code without it. */
8459
8460 if (! REG_P (target))
8461 target = gen_reg_rtx (mode);
8462
8463 /* If op1 was placed in target, swap op0 and op1. */
8464 if (target != op0 && target == op1)
8465 {
8466 temp = op0;
8467 op0 = op1;
8468 op1 = temp;
8469 }
8470
8471 /* We generate better code and avoid problems with op1 mentioning
8472 target by forcing op1 into a pseudo if it isn't a constant. */
8473 if (! CONSTANT_P (op1))
8474 op1 = force_reg (mode, op1);
8475
8476 {
8477 enum rtx_code comparison_code;
8478 rtx cmpop1 = op1;
8479
8480 if (code == MAX_EXPR)
8481 comparison_code = unsignedp ? GEU : GE;
8482 else
8483 comparison_code = unsignedp ? LEU : LE;
8484
8485 /* Canonicalize to comparisons against 0. */
8486 if (op1 == const1_rtx)
8487 {
8488 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8489 or (a != 0 ? a : 1) for unsigned.
8490 For MIN we are safe converting (a <= 1 ? a : 1)
8491 into (a <= 0 ? a : 1) */
8492 cmpop1 = const0_rtx;
8493 if (code == MAX_EXPR)
8494 comparison_code = unsignedp ? NE : GT;
8495 }
8496 if (op1 == constm1_rtx && !unsignedp)
8497 {
8498 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8499 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8500 cmpop1 = const0_rtx;
8501 if (code == MIN_EXPR)
8502 comparison_code = LT;
8503 }
8504 #ifdef HAVE_conditional_move
8505 /* Use a conditional move if possible. */
8506 if (can_conditionally_move_p (mode))
8507 {
8508 rtx insn;
8509
8510 /* ??? Same problem as in expmed.c: emit_conditional_move
8511 forces a stack adjustment via compare_from_rtx, and we
8512 lose the stack adjustment if the sequence we are about
8513 to create is discarded. */
8514 do_pending_stack_adjust ();
8515
8516 start_sequence ();
8517
8518 /* Try to emit the conditional move. */
8519 insn = emit_conditional_move (target, comparison_code,
8520 op0, cmpop1, mode,
8521 op0, op1, mode,
8522 unsignedp);
8523
8524 /* If we could do the conditional move, emit the sequence,
8525 and return. */
8526 if (insn)
8527 {
8528 rtx seq = get_insns ();
8529 end_sequence ();
8530 emit_insn (seq);
8531 return target;
8532 }
8533
8534 /* Otherwise discard the sequence and fall back to code with
8535 branches. */
8536 end_sequence ();
8537 }
8538 #endif
8539 if (target != op0)
8540 emit_move_insn (target, op0);
8541
8542 temp = gen_label_rtx ();
8543 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8544 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8545 -1);
8546 }
8547 emit_move_insn (target, op1);
8548 emit_label (temp);
8549 return target;
8550
8551 case BIT_NOT_EXPR:
8552 op0 = expand_expr (treeop0, subtarget,
8553 VOIDmode, EXPAND_NORMAL);
8554 if (modifier == EXPAND_STACK_PARM)
8555 target = 0;
8556 /* In case we have to reduce the result to bitfield precision
8557 for unsigned bitfield expand this as XOR with a proper constant
8558 instead. */
8559 if (reduce_bit_field && TYPE_UNSIGNED (type))
8560 temp = expand_binop (mode, xor_optab, op0,
8561 immed_double_int_const
8562 (double_int_mask (TYPE_PRECISION (type)), mode),
8563 target, 1, OPTAB_LIB_WIDEN);
8564 else
8565 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8566 gcc_assert (temp);
8567 return temp;
8568
8569 /* ??? Can optimize bitwise operations with one arg constant.
8570 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8571 and (a bitwise1 b) bitwise2 b (etc)
8572 but that is probably not worth while. */
8573
8574 case BIT_AND_EXPR:
8575 case BIT_IOR_EXPR:
8576 case BIT_XOR_EXPR:
8577 goto binop;
8578
8579 case LROTATE_EXPR:
8580 case RROTATE_EXPR:
8581 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8582 || (GET_MODE_PRECISION (TYPE_MODE (type))
8583 == TYPE_PRECISION (type)));
8584 /* fall through */
8585
8586 case LSHIFT_EXPR:
8587 case RSHIFT_EXPR:
8588 /* If this is a fixed-point operation, then we cannot use the code
8589 below because "expand_shift" doesn't support sat/no-sat fixed-point
8590 shifts. */
8591 if (ALL_FIXED_POINT_MODE_P (mode))
8592 goto binop;
8593
8594 if (! safe_from_p (subtarget, treeop1, 1))
8595 subtarget = 0;
8596 if (modifier == EXPAND_STACK_PARM)
8597 target = 0;
8598 op0 = expand_expr (treeop0, subtarget,
8599 VOIDmode, EXPAND_NORMAL);
8600 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8601 unsignedp);
8602 if (code == LSHIFT_EXPR)
8603 temp = REDUCE_BIT_FIELD (temp);
8604 return temp;
8605
8606 /* Could determine the answer when only additive constants differ. Also,
8607 the addition of one can be handled by changing the condition. */
8608 case LT_EXPR:
8609 case LE_EXPR:
8610 case GT_EXPR:
8611 case GE_EXPR:
8612 case EQ_EXPR:
8613 case NE_EXPR:
8614 case UNORDERED_EXPR:
8615 case ORDERED_EXPR:
8616 case UNLT_EXPR:
8617 case UNLE_EXPR:
8618 case UNGT_EXPR:
8619 case UNGE_EXPR:
8620 case UNEQ_EXPR:
8621 case LTGT_EXPR:
8622 temp = do_store_flag (ops,
8623 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8624 tmode != VOIDmode ? tmode : mode);
8625 if (temp)
8626 return temp;
8627
8628 /* Use a compare and a jump for BLKmode comparisons, or for function
8629 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8630
8631 if ((target == 0
8632 || modifier == EXPAND_STACK_PARM
8633 || ! safe_from_p (target, treeop0, 1)
8634 || ! safe_from_p (target, treeop1, 1)
8635 /* Make sure we don't have a hard reg (such as function's return
8636 value) live across basic blocks, if not optimizing. */
8637 || (!optimize && REG_P (target)
8638 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8639 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8640
8641 emit_move_insn (target, const0_rtx);
8642
8643 op1 = gen_label_rtx ();
8644 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8645
8646 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8647 emit_move_insn (target, constm1_rtx);
8648 else
8649 emit_move_insn (target, const1_rtx);
8650
8651 emit_label (op1);
8652 return target;
8653
8654 case COMPLEX_EXPR:
8655 /* Get the rtx code of the operands. */
8656 op0 = expand_normal (treeop0);
8657 op1 = expand_normal (treeop1);
8658
8659 if (!target)
8660 target = gen_reg_rtx (TYPE_MODE (type));
8661
8662 /* Move the real (op0) and imaginary (op1) parts to their location. */
8663 write_complex_part (target, op0, false);
8664 write_complex_part (target, op1, true);
8665
8666 return target;
8667
8668 case WIDEN_SUM_EXPR:
8669 {
8670 tree oprnd0 = treeop0;
8671 tree oprnd1 = treeop1;
8672
8673 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8674 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8675 target, unsignedp);
8676 return target;
8677 }
8678
8679 case REDUC_MAX_EXPR:
8680 case REDUC_MIN_EXPR:
8681 case REDUC_PLUS_EXPR:
8682 {
8683 op0 = expand_normal (treeop0);
8684 this_optab = optab_for_tree_code (code, type, optab_default);
8685 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8686 gcc_assert (temp);
8687 return temp;
8688 }
8689
8690 case VEC_LSHIFT_EXPR:
8691 case VEC_RSHIFT_EXPR:
8692 {
8693 target = expand_vec_shift_expr (ops, target);
8694 return target;
8695 }
8696
8697 case VEC_UNPACK_HI_EXPR:
8698 case VEC_UNPACK_LO_EXPR:
8699 {
8700 op0 = expand_normal (treeop0);
8701 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8702 target, unsignedp);
8703 gcc_assert (temp);
8704 return temp;
8705 }
8706
8707 case VEC_UNPACK_FLOAT_HI_EXPR:
8708 case VEC_UNPACK_FLOAT_LO_EXPR:
8709 {
8710 op0 = expand_normal (treeop0);
8711 /* The signedness is determined from input operand. */
8712 temp = expand_widen_pattern_expr
8713 (ops, op0, NULL_RTX, NULL_RTX,
8714 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8715
8716 gcc_assert (temp);
8717 return temp;
8718 }
8719
8720 case VEC_WIDEN_MULT_HI_EXPR:
8721 case VEC_WIDEN_MULT_LO_EXPR:
8722 {
8723 tree oprnd0 = treeop0;
8724 tree oprnd1 = treeop1;
8725
8726 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8727 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8728 target, unsignedp);
8729 gcc_assert (target);
8730 return target;
8731 }
8732
8733 case VEC_WIDEN_LSHIFT_HI_EXPR:
8734 case VEC_WIDEN_LSHIFT_LO_EXPR:
8735 {
8736 tree oprnd0 = treeop0;
8737 tree oprnd1 = treeop1;
8738
8739 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8740 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8741 target, unsignedp);
8742 gcc_assert (target);
8743 return target;
8744 }
8745
8746 case VEC_PACK_TRUNC_EXPR:
8747 case VEC_PACK_SAT_EXPR:
8748 case VEC_PACK_FIX_TRUNC_EXPR:
8749 mode = TYPE_MODE (TREE_TYPE (treeop0));
8750 goto binop;
8751
8752 case VEC_PERM_EXPR:
8753 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
8754 op2 = expand_normal (treeop2);
8755
8756 /* Careful here: if the target doesn't support integral vector modes,
8757 a constant selection vector could wind up smooshed into a normal
8758 integral constant. */
8759 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
8760 {
8761 tree sel_type = TREE_TYPE (treeop2);
8762 enum machine_mode vmode
8763 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
8764 TYPE_VECTOR_SUBPARTS (sel_type));
8765 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
8766 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
8767 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
8768 }
8769 else
8770 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
8771
8772 temp = expand_vec_perm (mode, op0, op1, op2, target);
8773 gcc_assert (temp);
8774 return temp;
8775
8776 case DOT_PROD_EXPR:
8777 {
8778 tree oprnd0 = treeop0;
8779 tree oprnd1 = treeop1;
8780 tree oprnd2 = treeop2;
8781 rtx op2;
8782
8783 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8784 op2 = expand_normal (oprnd2);
8785 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8786 target, unsignedp);
8787 return target;
8788 }
8789
8790 case REALIGN_LOAD_EXPR:
8791 {
8792 tree oprnd0 = treeop0;
8793 tree oprnd1 = treeop1;
8794 tree oprnd2 = treeop2;
8795 rtx op2;
8796
8797 this_optab = optab_for_tree_code (code, type, optab_default);
8798 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8799 op2 = expand_normal (oprnd2);
8800 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8801 target, unsignedp);
8802 gcc_assert (temp);
8803 return temp;
8804 }
8805
8806 case COND_EXPR:
8807 /* A COND_EXPR with its type being VOID_TYPE represents a
8808 conditional jump and is handled in
8809 expand_gimple_cond_expr. */
8810 gcc_assert (!VOID_TYPE_P (type));
8811
8812 /* Note that COND_EXPRs whose type is a structure or union
8813 are required to be constructed to contain assignments of
8814 a temporary variable, so that we can evaluate them here
8815 for side effect only. If type is void, we must do likewise. */
8816
8817 gcc_assert (!TREE_ADDRESSABLE (type)
8818 && !ignore
8819 && TREE_TYPE (treeop1) != void_type_node
8820 && TREE_TYPE (treeop2) != void_type_node);
8821
8822 /* If we are not to produce a result, we have no target. Otherwise,
8823 if a target was specified use it; it will not be used as an
8824 intermediate target unless it is safe. If no target, use a
8825 temporary. */
8826
8827 if (modifier != EXPAND_STACK_PARM
8828 && original_target
8829 && safe_from_p (original_target, treeop0, 1)
8830 && GET_MODE (original_target) == mode
8831 #ifdef HAVE_conditional_move
8832 && (! can_conditionally_move_p (mode)
8833 || REG_P (original_target))
8834 #endif
8835 && !MEM_P (original_target))
8836 temp = original_target;
8837 else
8838 temp = assign_temp (type, 0, 0, 1);
8839
8840 do_pending_stack_adjust ();
8841 NO_DEFER_POP;
8842 op0 = gen_label_rtx ();
8843 op1 = gen_label_rtx ();
8844 jumpifnot (treeop0, op0, -1);
8845 store_expr (treeop1, temp,
8846 modifier == EXPAND_STACK_PARM,
8847 false);
8848
8849 emit_jump_insn (gen_jump (op1));
8850 emit_barrier ();
8851 emit_label (op0);
8852 store_expr (treeop2, temp,
8853 modifier == EXPAND_STACK_PARM,
8854 false);
8855
8856 emit_label (op1);
8857 OK_DEFER_POP;
8858 return temp;
8859
8860 case VEC_COND_EXPR:
8861 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
8862 return target;
8863
8864 default:
8865 gcc_unreachable ();
8866 }
8867
8868 /* Here to do an ordinary binary operator. */
8869 binop:
8870 expand_operands (treeop0, treeop1,
8871 subtarget, &op0, &op1, EXPAND_NORMAL);
8872 binop2:
8873 this_optab = optab_for_tree_code (code, type, optab_default);
8874 binop3:
8875 if (modifier == EXPAND_STACK_PARM)
8876 target = 0;
8877 temp = expand_binop (mode, this_optab, op0, op1, target,
8878 unsignedp, OPTAB_LIB_WIDEN);
8879 gcc_assert (temp);
8880 /* Bitwise operations do not need bitfield reduction as we expect their
8881 operands being properly truncated. */
8882 if (code == BIT_XOR_EXPR
8883 || code == BIT_AND_EXPR
8884 || code == BIT_IOR_EXPR)
8885 return temp;
8886 return REDUCE_BIT_FIELD (temp);
8887 }
8888 #undef REDUCE_BIT_FIELD
8889
8890 rtx
8891 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
8892 enum expand_modifier modifier, rtx *alt_rtl)
8893 {
8894 rtx op0, op1, temp, decl_rtl;
8895 tree type;
8896 int unsignedp;
8897 enum machine_mode mode;
8898 enum tree_code code = TREE_CODE (exp);
8899 rtx subtarget, original_target;
8900 int ignore;
8901 tree context;
8902 bool reduce_bit_field;
8903 location_t loc = EXPR_LOCATION (exp);
8904 struct separate_ops ops;
8905 tree treeop0, treeop1, treeop2;
8906 tree ssa_name = NULL_TREE;
8907 gimple g;
8908
8909 type = TREE_TYPE (exp);
8910 mode = TYPE_MODE (type);
8911 unsignedp = TYPE_UNSIGNED (type);
8912
8913 treeop0 = treeop1 = treeop2 = NULL_TREE;
8914 if (!VL_EXP_CLASS_P (exp))
8915 switch (TREE_CODE_LENGTH (code))
8916 {
8917 default:
8918 case 3: treeop2 = TREE_OPERAND (exp, 2);
8919 case 2: treeop1 = TREE_OPERAND (exp, 1);
8920 case 1: treeop0 = TREE_OPERAND (exp, 0);
8921 case 0: break;
8922 }
8923 ops.code = code;
8924 ops.type = type;
8925 ops.op0 = treeop0;
8926 ops.op1 = treeop1;
8927 ops.op2 = treeop2;
8928 ops.location = loc;
8929
8930 ignore = (target == const0_rtx
8931 || ((CONVERT_EXPR_CODE_P (code)
8932 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8933 && TREE_CODE (type) == VOID_TYPE));
8934
8935 /* An operation in what may be a bit-field type needs the
8936 result to be reduced to the precision of the bit-field type,
8937 which is narrower than that of the type's mode. */
8938 reduce_bit_field = (!ignore
8939 && INTEGRAL_TYPE_P (type)
8940 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8941
8942 /* If we are going to ignore this result, we need only do something
8943 if there is a side-effect somewhere in the expression. If there
8944 is, short-circuit the most common cases here. Note that we must
8945 not call expand_expr with anything but const0_rtx in case this
8946 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
8947
8948 if (ignore)
8949 {
8950 if (! TREE_SIDE_EFFECTS (exp))
8951 return const0_rtx;
8952
8953 /* Ensure we reference a volatile object even if value is ignored, but
8954 don't do this if all we are doing is taking its address. */
8955 if (TREE_THIS_VOLATILE (exp)
8956 && TREE_CODE (exp) != FUNCTION_DECL
8957 && mode != VOIDmode && mode != BLKmode
8958 && modifier != EXPAND_CONST_ADDRESS)
8959 {
8960 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
8961 if (MEM_P (temp))
8962 copy_to_reg (temp);
8963 return const0_rtx;
8964 }
8965
8966 if (TREE_CODE_CLASS (code) == tcc_unary
8967 || code == COMPONENT_REF || code == INDIRECT_REF)
8968 return expand_expr (treeop0, const0_rtx, VOIDmode,
8969 modifier);
8970
8971 else if (TREE_CODE_CLASS (code) == tcc_binary
8972 || TREE_CODE_CLASS (code) == tcc_comparison
8973 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
8974 {
8975 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8976 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8977 return const0_rtx;
8978 }
8979 else if (code == BIT_FIELD_REF)
8980 {
8981 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8982 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8983 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
8984 return const0_rtx;
8985 }
8986
8987 target = 0;
8988 }
8989
8990 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8991 target = 0;
8992
8993 /* Use subtarget as the target for operand 0 of a binary operation. */
8994 subtarget = get_subtarget (target);
8995 original_target = target;
8996
8997 switch (code)
8998 {
8999 case LABEL_DECL:
9000 {
9001 tree function = decl_function_context (exp);
9002
9003 temp = label_rtx (exp);
9004 temp = gen_rtx_LABEL_REF (Pmode, temp);
9005
9006 if (function != current_function_decl
9007 && function != 0)
9008 LABEL_REF_NONLOCAL_P (temp) = 1;
9009
9010 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9011 return temp;
9012 }
9013
9014 case SSA_NAME:
9015 /* ??? ivopts calls expander, without any preparation from
9016 out-of-ssa. So fake instructions as if this was an access to the
9017 base variable. This unnecessarily allocates a pseudo, see how we can
9018 reuse it, if partition base vars have it set already. */
9019 if (!currently_expanding_to_rtl)
9020 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
9021 NULL);
9022
9023 g = get_gimple_for_ssa_name (exp);
9024 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9025 if (g == NULL
9026 && modifier == EXPAND_INITIALIZER
9027 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9028 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9029 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9030 g = SSA_NAME_DEF_STMT (exp);
9031 if (g)
9032 return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
9033 modifier, NULL);
9034
9035 ssa_name = exp;
9036 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9037 exp = SSA_NAME_VAR (ssa_name);
9038 goto expand_decl_rtl;
9039
9040 case PARM_DECL:
9041 case VAR_DECL:
9042 /* If a static var's type was incomplete when the decl was written,
9043 but the type is complete now, lay out the decl now. */
9044 if (DECL_SIZE (exp) == 0
9045 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9046 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9047 layout_decl (exp, 0);
9048
9049 /* ... fall through ... */
9050
9051 case FUNCTION_DECL:
9052 case RESULT_DECL:
9053 decl_rtl = DECL_RTL (exp);
9054 expand_decl_rtl:
9055 gcc_assert (decl_rtl);
9056 decl_rtl = copy_rtx (decl_rtl);
9057 /* Record writes to register variables. */
9058 if (modifier == EXPAND_WRITE
9059 && REG_P (decl_rtl)
9060 && HARD_REGISTER_P (decl_rtl))
9061 add_to_hard_reg_set (&crtl->asm_clobbers,
9062 GET_MODE (decl_rtl), REGNO (decl_rtl));
9063
9064 /* Ensure variable marked as used even if it doesn't go through
9065 a parser. If it hasn't be used yet, write out an external
9066 definition. */
9067 if (! TREE_USED (exp))
9068 {
9069 assemble_external (exp);
9070 TREE_USED (exp) = 1;
9071 }
9072
9073 /* Show we haven't gotten RTL for this yet. */
9074 temp = 0;
9075
9076 /* Variables inherited from containing functions should have
9077 been lowered by this point. */
9078 context = decl_function_context (exp);
9079 gcc_assert (!context
9080 || context == current_function_decl
9081 || TREE_STATIC (exp)
9082 || DECL_EXTERNAL (exp)
9083 /* ??? C++ creates functions that are not TREE_STATIC. */
9084 || TREE_CODE (exp) == FUNCTION_DECL);
9085
9086 /* This is the case of an array whose size is to be determined
9087 from its initializer, while the initializer is still being parsed.
9088 See expand_decl. */
9089
9090 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9091 temp = validize_mem (decl_rtl);
9092
9093 /* If DECL_RTL is memory, we are in the normal case and the
9094 address is not valid, get the address into a register. */
9095
9096 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9097 {
9098 if (alt_rtl)
9099 *alt_rtl = decl_rtl;
9100 decl_rtl = use_anchored_address (decl_rtl);
9101 if (modifier != EXPAND_CONST_ADDRESS
9102 && modifier != EXPAND_SUM
9103 && !memory_address_addr_space_p (DECL_MODE (exp),
9104 XEXP (decl_rtl, 0),
9105 MEM_ADDR_SPACE (decl_rtl)))
9106 temp = replace_equiv_address (decl_rtl,
9107 copy_rtx (XEXP (decl_rtl, 0)));
9108 }
9109
9110 /* If we got something, return it. But first, set the alignment
9111 if the address is a register. */
9112 if (temp != 0)
9113 {
9114 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9115 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9116
9117 return temp;
9118 }
9119
9120 /* If the mode of DECL_RTL does not match that of the decl,
9121 there are two cases: we are dealing with a BLKmode value
9122 that is returned in a register, or we are dealing with
9123 a promoted value. In the latter case, return a SUBREG
9124 of the wanted mode, but mark it so that we know that it
9125 was already extended. */
9126 if (REG_P (decl_rtl)
9127 && DECL_MODE (exp) != BLKmode
9128 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9129 {
9130 enum machine_mode pmode;
9131
9132 /* Get the signedness to be used for this variable. Ensure we get
9133 the same mode we got when the variable was declared. */
9134 if (code == SSA_NAME
9135 && (g = SSA_NAME_DEF_STMT (ssa_name))
9136 && gimple_code (g) == GIMPLE_CALL)
9137 {
9138 gcc_assert (!gimple_call_internal_p (g));
9139 pmode = promote_function_mode (type, mode, &unsignedp,
9140 gimple_call_fntype (g),
9141 2);
9142 }
9143 else
9144 pmode = promote_decl_mode (exp, &unsignedp);
9145 gcc_assert (GET_MODE (decl_rtl) == pmode);
9146
9147 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9148 SUBREG_PROMOTED_VAR_P (temp) = 1;
9149 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
9150 return temp;
9151 }
9152
9153 return decl_rtl;
9154
9155 case INTEGER_CST:
9156 temp = immed_double_const (TREE_INT_CST_LOW (exp),
9157 TREE_INT_CST_HIGH (exp), mode);
9158
9159 return temp;
9160
9161 case VECTOR_CST:
9162 {
9163 tree tmp = NULL_TREE;
9164 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9165 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9166 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9167 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9168 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9169 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9170 return const_vector_from_tree (exp);
9171 if (GET_MODE_CLASS (mode) == MODE_INT)
9172 {
9173 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9174 if (type_for_mode)
9175 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9176 }
9177 if (!tmp)
9178 tmp = build_constructor_from_list (type,
9179 TREE_VECTOR_CST_ELTS (exp));
9180 return expand_expr (tmp, ignore ? const0_rtx : target,
9181 tmode, modifier);
9182 }
9183
9184 case CONST_DECL:
9185 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9186
9187 case REAL_CST:
9188 /* If optimized, generate immediate CONST_DOUBLE
9189 which will be turned into memory by reload if necessary.
9190
9191 We used to force a register so that loop.c could see it. But
9192 this does not allow gen_* patterns to perform optimizations with
9193 the constants. It also produces two insns in cases like "x = 1.0;".
9194 On most machines, floating-point constants are not permitted in
9195 many insns, so we'd end up copying it to a register in any case.
9196
9197 Now, we do the copying in expand_binop, if appropriate. */
9198 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9199 TYPE_MODE (TREE_TYPE (exp)));
9200
9201 case FIXED_CST:
9202 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9203 TYPE_MODE (TREE_TYPE (exp)));
9204
9205 case COMPLEX_CST:
9206 /* Handle evaluating a complex constant in a CONCAT target. */
9207 if (original_target && GET_CODE (original_target) == CONCAT)
9208 {
9209 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9210 rtx rtarg, itarg;
9211
9212 rtarg = XEXP (original_target, 0);
9213 itarg = XEXP (original_target, 1);
9214
9215 /* Move the real and imaginary parts separately. */
9216 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9217 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9218
9219 if (op0 != rtarg)
9220 emit_move_insn (rtarg, op0);
9221 if (op1 != itarg)
9222 emit_move_insn (itarg, op1);
9223
9224 return original_target;
9225 }
9226
9227 /* ... fall through ... */
9228
9229 case STRING_CST:
9230 temp = expand_expr_constant (exp, 1, modifier);
9231
9232 /* temp contains a constant address.
9233 On RISC machines where a constant address isn't valid,
9234 make some insns to get that address into a register. */
9235 if (modifier != EXPAND_CONST_ADDRESS
9236 && modifier != EXPAND_INITIALIZER
9237 && modifier != EXPAND_SUM
9238 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9239 MEM_ADDR_SPACE (temp)))
9240 return replace_equiv_address (temp,
9241 copy_rtx (XEXP (temp, 0)));
9242 return temp;
9243
9244 case SAVE_EXPR:
9245 {
9246 tree val = treeop0;
9247 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
9248
9249 if (!SAVE_EXPR_RESOLVED_P (exp))
9250 {
9251 /* We can indeed still hit this case, typically via builtin
9252 expanders calling save_expr immediately before expanding
9253 something. Assume this means that we only have to deal
9254 with non-BLKmode values. */
9255 gcc_assert (GET_MODE (ret) != BLKmode);
9256
9257 val = build_decl (EXPR_LOCATION (exp),
9258 VAR_DECL, NULL, TREE_TYPE (exp));
9259 DECL_ARTIFICIAL (val) = 1;
9260 DECL_IGNORED_P (val) = 1;
9261 treeop0 = val;
9262 TREE_OPERAND (exp, 0) = treeop0;
9263 SAVE_EXPR_RESOLVED_P (exp) = 1;
9264
9265 if (!CONSTANT_P (ret))
9266 ret = copy_to_reg (ret);
9267 SET_DECL_RTL (val, ret);
9268 }
9269
9270 return ret;
9271 }
9272
9273
9274 case CONSTRUCTOR:
9275 /* If we don't need the result, just ensure we evaluate any
9276 subexpressions. */
9277 if (ignore)
9278 {
9279 unsigned HOST_WIDE_INT idx;
9280 tree value;
9281
9282 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9283 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9284
9285 return const0_rtx;
9286 }
9287
9288 return expand_constructor (exp, target, modifier, false);
9289
9290 case TARGET_MEM_REF:
9291 {
9292 addr_space_t as
9293 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9294 struct mem_address addr;
9295 enum insn_code icode;
9296 unsigned int align;
9297
9298 get_address_description (exp, &addr);
9299 op0 = addr_for_mem_ref (&addr, as, true);
9300 op0 = memory_address_addr_space (mode, op0, as);
9301 temp = gen_rtx_MEM (mode, op0);
9302 set_mem_attributes (temp, exp, 0);
9303 set_mem_addr_space (temp, as);
9304 align = get_object_or_type_alignment (exp);
9305 if (mode != BLKmode
9306 && align < GET_MODE_ALIGNMENT (mode)
9307 /* If the target does not have special handling for unaligned
9308 loads of mode then it can use regular moves for them. */
9309 && ((icode = optab_handler (movmisalign_optab, mode))
9310 != CODE_FOR_nothing))
9311 {
9312 struct expand_operand ops[2];
9313
9314 /* We've already validated the memory, and we're creating a
9315 new pseudo destination. The predicates really can't fail,
9316 nor can the generator. */
9317 create_output_operand (&ops[0], NULL_RTX, mode);
9318 create_fixed_operand (&ops[1], temp);
9319 expand_insn (icode, 2, ops);
9320 return ops[0].value;
9321 }
9322 return temp;
9323 }
9324
9325 case MEM_REF:
9326 {
9327 addr_space_t as
9328 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9329 enum machine_mode address_mode;
9330 tree base = TREE_OPERAND (exp, 0);
9331 gimple def_stmt;
9332 enum insn_code icode;
9333 unsigned align;
9334 /* Handle expansion of non-aliased memory with non-BLKmode. That
9335 might end up in a register. */
9336 if (mem_ref_refers_to_non_mem_p (exp))
9337 {
9338 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9339 tree bit_offset;
9340 tree bftype;
9341 base = TREE_OPERAND (base, 0);
9342 if (offset == 0
9343 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9344 && (GET_MODE_BITSIZE (DECL_MODE (base))
9345 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9346 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9347 TREE_TYPE (exp), base),
9348 target, tmode, modifier);
9349 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9350 bftype = TREE_TYPE (base);
9351 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9352 bftype = TREE_TYPE (exp);
9353 else
9354 {
9355 temp = assign_stack_temp (DECL_MODE (base),
9356 GET_MODE_SIZE (DECL_MODE (base)),
9357 0);
9358 store_expr (base, temp, 0, false);
9359 temp = adjust_address (temp, BLKmode, offset);
9360 set_mem_size (temp, int_size_in_bytes (TREE_TYPE (exp)));
9361 return temp;
9362 }
9363 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9364 base,
9365 TYPE_SIZE (TREE_TYPE (exp)),
9366 bit_offset),
9367 target, tmode, modifier);
9368 }
9369 address_mode = targetm.addr_space.address_mode (as);
9370 base = TREE_OPERAND (exp, 0);
9371 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9372 {
9373 tree mask = gimple_assign_rhs2 (def_stmt);
9374 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9375 gimple_assign_rhs1 (def_stmt), mask);
9376 TREE_OPERAND (exp, 0) = base;
9377 }
9378 align = get_object_or_type_alignment (exp);
9379 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9380 op0 = memory_address_addr_space (address_mode, op0, as);
9381 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9382 {
9383 rtx off
9384 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9385 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9386 }
9387 op0 = memory_address_addr_space (mode, op0, as);
9388 temp = gen_rtx_MEM (mode, op0);
9389 set_mem_attributes (temp, exp, 0);
9390 set_mem_addr_space (temp, as);
9391 if (TREE_THIS_VOLATILE (exp))
9392 MEM_VOLATILE_P (temp) = 1;
9393 if (mode != BLKmode
9394 && align < GET_MODE_ALIGNMENT (mode)
9395 /* If the target does not have special handling for unaligned
9396 loads of mode then it can use regular moves for them. */
9397 && ((icode = optab_handler (movmisalign_optab, mode))
9398 != CODE_FOR_nothing))
9399 {
9400 struct expand_operand ops[2];
9401
9402 /* We've already validated the memory, and we're creating a
9403 new pseudo destination. The predicates really can't fail,
9404 nor can the generator. */
9405 create_output_operand (&ops[0], NULL_RTX, mode);
9406 create_fixed_operand (&ops[1], temp);
9407 expand_insn (icode, 2, ops);
9408 return ops[0].value;
9409 }
9410 return temp;
9411 }
9412
9413 case ARRAY_REF:
9414
9415 {
9416 tree array = treeop0;
9417 tree index = treeop1;
9418
9419 /* Fold an expression like: "foo"[2].
9420 This is not done in fold so it won't happen inside &.
9421 Don't fold if this is for wide characters since it's too
9422 difficult to do correctly and this is a very rare case. */
9423
9424 if (modifier != EXPAND_CONST_ADDRESS
9425 && modifier != EXPAND_INITIALIZER
9426 && modifier != EXPAND_MEMORY)
9427 {
9428 tree t = fold_read_from_constant_string (exp);
9429
9430 if (t)
9431 return expand_expr (t, target, tmode, modifier);
9432 }
9433
9434 /* If this is a constant index into a constant array,
9435 just get the value from the array. Handle both the cases when
9436 we have an explicit constructor and when our operand is a variable
9437 that was declared const. */
9438
9439 if (modifier != EXPAND_CONST_ADDRESS
9440 && modifier != EXPAND_INITIALIZER
9441 && modifier != EXPAND_MEMORY
9442 && TREE_CODE (array) == CONSTRUCTOR
9443 && ! TREE_SIDE_EFFECTS (array)
9444 && TREE_CODE (index) == INTEGER_CST)
9445 {
9446 unsigned HOST_WIDE_INT ix;
9447 tree field, value;
9448
9449 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9450 field, value)
9451 if (tree_int_cst_equal (field, index))
9452 {
9453 if (!TREE_SIDE_EFFECTS (value))
9454 return expand_expr (fold (value), target, tmode, modifier);
9455 break;
9456 }
9457 }
9458
9459 else if (optimize >= 1
9460 && modifier != EXPAND_CONST_ADDRESS
9461 && modifier != EXPAND_INITIALIZER
9462 && modifier != EXPAND_MEMORY
9463 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9464 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9465 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9466 && const_value_known_p (array))
9467 {
9468 if (TREE_CODE (index) == INTEGER_CST)
9469 {
9470 tree init = DECL_INITIAL (array);
9471
9472 if (TREE_CODE (init) == CONSTRUCTOR)
9473 {
9474 unsigned HOST_WIDE_INT ix;
9475 tree field, value;
9476
9477 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9478 field, value)
9479 if (tree_int_cst_equal (field, index))
9480 {
9481 if (TREE_SIDE_EFFECTS (value))
9482 break;
9483
9484 if (TREE_CODE (value) == CONSTRUCTOR)
9485 {
9486 /* If VALUE is a CONSTRUCTOR, this
9487 optimization is only useful if
9488 this doesn't store the CONSTRUCTOR
9489 into memory. If it does, it is more
9490 efficient to just load the data from
9491 the array directly. */
9492 rtx ret = expand_constructor (value, target,
9493 modifier, true);
9494 if (ret == NULL_RTX)
9495 break;
9496 }
9497
9498 return expand_expr (fold (value), target, tmode,
9499 modifier);
9500 }
9501 }
9502 else if(TREE_CODE (init) == STRING_CST)
9503 {
9504 tree index1 = index;
9505 tree low_bound = array_ref_low_bound (exp);
9506 index1 = fold_convert_loc (loc, sizetype,
9507 treeop1);
9508
9509 /* Optimize the special-case of a zero lower bound.
9510
9511 We convert the low_bound to sizetype to avoid some problems
9512 with constant folding. (E.g. suppose the lower bound is 1,
9513 and its mode is QI. Without the conversion,l (ARRAY
9514 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9515 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9516
9517 if (! integer_zerop (low_bound))
9518 index1 = size_diffop_loc (loc, index1,
9519 fold_convert_loc (loc, sizetype,
9520 low_bound));
9521
9522 if (0 > compare_tree_int (index1,
9523 TREE_STRING_LENGTH (init)))
9524 {
9525 tree type = TREE_TYPE (TREE_TYPE (init));
9526 enum machine_mode mode = TYPE_MODE (type);
9527
9528 if (GET_MODE_CLASS (mode) == MODE_INT
9529 && GET_MODE_SIZE (mode) == 1)
9530 return gen_int_mode (TREE_STRING_POINTER (init)
9531 [TREE_INT_CST_LOW (index1)],
9532 mode);
9533 }
9534 }
9535 }
9536 }
9537 }
9538 goto normal_inner_ref;
9539
9540 case COMPONENT_REF:
9541 /* If the operand is a CONSTRUCTOR, we can just extract the
9542 appropriate field if it is present. */
9543 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9544 {
9545 unsigned HOST_WIDE_INT idx;
9546 tree field, value;
9547
9548 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9549 idx, field, value)
9550 if (field == treeop1
9551 /* We can normally use the value of the field in the
9552 CONSTRUCTOR. However, if this is a bitfield in
9553 an integral mode that we can fit in a HOST_WIDE_INT,
9554 we must mask only the number of bits in the bitfield,
9555 since this is done implicitly by the constructor. If
9556 the bitfield does not meet either of those conditions,
9557 we can't do this optimization. */
9558 && (! DECL_BIT_FIELD (field)
9559 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9560 && (GET_MODE_PRECISION (DECL_MODE (field))
9561 <= HOST_BITS_PER_WIDE_INT))))
9562 {
9563 if (DECL_BIT_FIELD (field)
9564 && modifier == EXPAND_STACK_PARM)
9565 target = 0;
9566 op0 = expand_expr (value, target, tmode, modifier);
9567 if (DECL_BIT_FIELD (field))
9568 {
9569 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9570 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9571
9572 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9573 {
9574 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9575 op0 = expand_and (imode, op0, op1, target);
9576 }
9577 else
9578 {
9579 int count = GET_MODE_PRECISION (imode) - bitsize;
9580
9581 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9582 target, 0);
9583 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9584 target, 0);
9585 }
9586 }
9587
9588 return op0;
9589 }
9590 }
9591 goto normal_inner_ref;
9592
9593 case BIT_FIELD_REF:
9594 case ARRAY_RANGE_REF:
9595 normal_inner_ref:
9596 {
9597 enum machine_mode mode1, mode2;
9598 HOST_WIDE_INT bitsize, bitpos;
9599 tree offset;
9600 int volatilep = 0, must_force_mem;
9601 bool packedp = false;
9602 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9603 &mode1, &unsignedp, &volatilep, true);
9604 rtx orig_op0, memloc;
9605
9606 /* If we got back the original object, something is wrong. Perhaps
9607 we are evaluating an expression too early. In any event, don't
9608 infinitely recurse. */
9609 gcc_assert (tem != exp);
9610
9611 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9612 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9613 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9614 packedp = true;
9615
9616 /* If TEM's type is a union of variable size, pass TARGET to the inner
9617 computation, since it will need a temporary and TARGET is known
9618 to have to do. This occurs in unchecked conversion in Ada. */
9619 orig_op0 = op0
9620 = expand_expr (tem,
9621 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9622 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9623 != INTEGER_CST)
9624 && modifier != EXPAND_STACK_PARM
9625 ? target : NULL_RTX),
9626 VOIDmode,
9627 (modifier == EXPAND_INITIALIZER
9628 || modifier == EXPAND_CONST_ADDRESS
9629 || modifier == EXPAND_STACK_PARM)
9630 ? modifier : EXPAND_NORMAL);
9631
9632
9633 /* If the bitfield is volatile, we want to access it in the
9634 field's mode, not the computed mode.
9635 If a MEM has VOIDmode (external with incomplete type),
9636 use BLKmode for it instead. */
9637 if (MEM_P (op0))
9638 {
9639 if (volatilep && flag_strict_volatile_bitfields > 0)
9640 op0 = adjust_address (op0, mode1, 0);
9641 else if (GET_MODE (op0) == VOIDmode)
9642 op0 = adjust_address (op0, BLKmode, 0);
9643 }
9644
9645 mode2
9646 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9647
9648 /* If we have either an offset, a BLKmode result, or a reference
9649 outside the underlying object, we must force it to memory.
9650 Such a case can occur in Ada if we have unchecked conversion
9651 of an expression from a scalar type to an aggregate type or
9652 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9653 passed a partially uninitialized object or a view-conversion
9654 to a larger size. */
9655 must_force_mem = (offset
9656 || mode1 == BLKmode
9657 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9658
9659 /* Handle CONCAT first. */
9660 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9661 {
9662 if (bitpos == 0
9663 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9664 return op0;
9665 if (bitpos == 0
9666 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9667 && bitsize)
9668 {
9669 op0 = XEXP (op0, 0);
9670 mode2 = GET_MODE (op0);
9671 }
9672 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9673 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9674 && bitpos
9675 && bitsize)
9676 {
9677 op0 = XEXP (op0, 1);
9678 bitpos = 0;
9679 mode2 = GET_MODE (op0);
9680 }
9681 else
9682 /* Otherwise force into memory. */
9683 must_force_mem = 1;
9684 }
9685
9686 /* If this is a constant, put it in a register if it is a legitimate
9687 constant and we don't need a memory reference. */
9688 if (CONSTANT_P (op0)
9689 && mode2 != BLKmode
9690 && targetm.legitimate_constant_p (mode2, op0)
9691 && !must_force_mem)
9692 op0 = force_reg (mode2, op0);
9693
9694 /* Otherwise, if this is a constant, try to force it to the constant
9695 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9696 is a legitimate constant. */
9697 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9698 op0 = validize_mem (memloc);
9699
9700 /* Otherwise, if this is a constant or the object is not in memory
9701 and need be, put it there. */
9702 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9703 {
9704 tree nt = build_qualified_type (TREE_TYPE (tem),
9705 (TYPE_QUALS (TREE_TYPE (tem))
9706 | TYPE_QUAL_CONST));
9707 memloc = assign_temp (nt, 1, 1, 1);
9708 emit_move_insn (memloc, op0);
9709 op0 = memloc;
9710 }
9711
9712 if (offset)
9713 {
9714 enum machine_mode address_mode;
9715 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9716 EXPAND_SUM);
9717
9718 gcc_assert (MEM_P (op0));
9719
9720 address_mode
9721 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9722 if (GET_MODE (offset_rtx) != address_mode)
9723 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9724
9725 if (GET_MODE (op0) == BLKmode
9726 /* A constant address in OP0 can have VOIDmode, we must
9727 not try to call force_reg in that case. */
9728 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9729 && bitsize != 0
9730 && (bitpos % bitsize) == 0
9731 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9732 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9733 {
9734 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9735 bitpos = 0;
9736 }
9737
9738 op0 = offset_address (op0, offset_rtx,
9739 highest_pow2_factor (offset));
9740 }
9741
9742 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9743 record its alignment as BIGGEST_ALIGNMENT. */
9744 if (MEM_P (op0) && bitpos == 0 && offset != 0
9745 && is_aligning_offset (offset, tem))
9746 set_mem_align (op0, BIGGEST_ALIGNMENT);
9747
9748 /* Don't forget about volatility even if this is a bitfield. */
9749 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9750 {
9751 if (op0 == orig_op0)
9752 op0 = copy_rtx (op0);
9753
9754 MEM_VOLATILE_P (op0) = 1;
9755 }
9756
9757 /* In cases where an aligned union has an unaligned object
9758 as a field, we might be extracting a BLKmode value from
9759 an integer-mode (e.g., SImode) object. Handle this case
9760 by doing the extract into an object as wide as the field
9761 (which we know to be the width of a basic mode), then
9762 storing into memory, and changing the mode to BLKmode. */
9763 if (mode1 == VOIDmode
9764 || REG_P (op0) || GET_CODE (op0) == SUBREG
9765 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9766 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9767 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9768 && modifier != EXPAND_CONST_ADDRESS
9769 && modifier != EXPAND_INITIALIZER)
9770 /* If the field is volatile, we always want an aligned
9771 access. Do this in following two situations:
9772 1. the access is not already naturally
9773 aligned, otherwise "normal" (non-bitfield) volatile fields
9774 become non-addressable.
9775 2. the bitsize is narrower than the access size. Need
9776 to extract bitfields from the access. */
9777 || (volatilep && flag_strict_volatile_bitfields > 0
9778 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0
9779 || (mode1 != BLKmode
9780 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)))
9781 /* If the field isn't aligned enough to fetch as a memref,
9782 fetch it as a bit field. */
9783 || (mode1 != BLKmode
9784 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9785 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9786 || (MEM_P (op0)
9787 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9788 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9789 && ((modifier == EXPAND_CONST_ADDRESS
9790 || modifier == EXPAND_INITIALIZER)
9791 ? STRICT_ALIGNMENT
9792 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9793 || (bitpos % BITS_PER_UNIT != 0)))
9794 /* If the type and the field are a constant size and the
9795 size of the type isn't the same size as the bitfield,
9796 we must use bitfield operations. */
9797 || (bitsize >= 0
9798 && TYPE_SIZE (TREE_TYPE (exp))
9799 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9800 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9801 bitsize)))
9802 {
9803 enum machine_mode ext_mode = mode;
9804
9805 if (ext_mode == BLKmode
9806 && ! (target != 0 && MEM_P (op0)
9807 && MEM_P (target)
9808 && bitpos % BITS_PER_UNIT == 0))
9809 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9810
9811 if (ext_mode == BLKmode)
9812 {
9813 if (target == 0)
9814 target = assign_temp (type, 0, 1, 1);
9815
9816 if (bitsize == 0)
9817 return target;
9818
9819 /* In this case, BITPOS must start at a byte boundary and
9820 TARGET, if specified, must be a MEM. */
9821 gcc_assert (MEM_P (op0)
9822 && (!target || MEM_P (target))
9823 && !(bitpos % BITS_PER_UNIT));
9824
9825 emit_block_move (target,
9826 adjust_address (op0, VOIDmode,
9827 bitpos / BITS_PER_UNIT),
9828 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9829 / BITS_PER_UNIT),
9830 (modifier == EXPAND_STACK_PARM
9831 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9832
9833 return target;
9834 }
9835
9836 op0 = validize_mem (op0);
9837
9838 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9839 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9840
9841 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
9842 (modifier == EXPAND_STACK_PARM
9843 ? NULL_RTX : target),
9844 ext_mode, ext_mode);
9845
9846 /* If the result is a record type and BITSIZE is narrower than
9847 the mode of OP0, an integral mode, and this is a big endian
9848 machine, we must put the field into the high-order bits. */
9849 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
9850 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
9851 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
9852 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
9853 GET_MODE_BITSIZE (GET_MODE (op0))
9854 - bitsize, op0, 1);
9855
9856 /* If the result type is BLKmode, store the data into a temporary
9857 of the appropriate type, but with the mode corresponding to the
9858 mode for the data we have (op0's mode). It's tempting to make
9859 this a constant type, since we know it's only being stored once,
9860 but that can cause problems if we are taking the address of this
9861 COMPONENT_REF because the MEM of any reference via that address
9862 will have flags corresponding to the type, which will not
9863 necessarily be constant. */
9864 if (mode == BLKmode)
9865 {
9866 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
9867 rtx new_rtx;
9868
9869 /* If the reference doesn't use the alias set of its type,
9870 we cannot create the temporary using that type. */
9871 if (component_uses_parent_alias_set (exp))
9872 {
9873 new_rtx = assign_stack_local (ext_mode, size, 0);
9874 set_mem_alias_set (new_rtx, get_alias_set (exp));
9875 }
9876 else
9877 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
9878
9879 emit_move_insn (new_rtx, op0);
9880 op0 = copy_rtx (new_rtx);
9881 PUT_MODE (op0, BLKmode);
9882 set_mem_attributes (op0, exp, 1);
9883 }
9884
9885 return op0;
9886 }
9887
9888 /* If the result is BLKmode, use that to access the object
9889 now as well. */
9890 if (mode == BLKmode)
9891 mode1 = BLKmode;
9892
9893 /* Get a reference to just this component. */
9894 if (modifier == EXPAND_CONST_ADDRESS
9895 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
9896 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
9897 else
9898 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9899
9900 if (op0 == orig_op0)
9901 op0 = copy_rtx (op0);
9902
9903 set_mem_attributes (op0, exp, 0);
9904 if (REG_P (XEXP (op0, 0)))
9905 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9906
9907 MEM_VOLATILE_P (op0) |= volatilep;
9908 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
9909 || modifier == EXPAND_CONST_ADDRESS
9910 || modifier == EXPAND_INITIALIZER)
9911 return op0;
9912 else if (target == 0)
9913 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9914
9915 convert_move (target, op0, unsignedp);
9916 return target;
9917 }
9918
9919 case OBJ_TYPE_REF:
9920 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
9921
9922 case CALL_EXPR:
9923 /* All valid uses of __builtin_va_arg_pack () are removed during
9924 inlining. */
9925 if (CALL_EXPR_VA_ARG_PACK (exp))
9926 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
9927 {
9928 tree fndecl = get_callee_fndecl (exp), attr;
9929
9930 if (fndecl
9931 && (attr = lookup_attribute ("error",
9932 DECL_ATTRIBUTES (fndecl))) != NULL)
9933 error ("%Kcall to %qs declared with attribute error: %s",
9934 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9935 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9936 if (fndecl
9937 && (attr = lookup_attribute ("warning",
9938 DECL_ATTRIBUTES (fndecl))) != NULL)
9939 warning_at (tree_nonartificial_location (exp),
9940 0, "%Kcall to %qs declared with attribute warning: %s",
9941 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9942 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9943
9944 /* Check for a built-in function. */
9945 if (fndecl && DECL_BUILT_IN (fndecl))
9946 {
9947 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
9948 return expand_builtin (exp, target, subtarget, tmode, ignore);
9949 }
9950 }
9951 return expand_call (exp, target, ignore);
9952
9953 case VIEW_CONVERT_EXPR:
9954 op0 = NULL_RTX;
9955
9956 /* If we are converting to BLKmode, try to avoid an intermediate
9957 temporary by fetching an inner memory reference. */
9958 if (mode == BLKmode
9959 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9960 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
9961 && handled_component_p (treeop0))
9962 {
9963 enum machine_mode mode1;
9964 HOST_WIDE_INT bitsize, bitpos;
9965 tree offset;
9966 int unsignedp;
9967 int volatilep = 0;
9968 tree tem
9969 = get_inner_reference (treeop0, &bitsize, &bitpos,
9970 &offset, &mode1, &unsignedp, &volatilep,
9971 true);
9972 rtx orig_op0;
9973
9974 /* ??? We should work harder and deal with non-zero offsets. */
9975 if (!offset
9976 && (bitpos % BITS_PER_UNIT) == 0
9977 && bitsize >= 0
9978 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
9979 {
9980 /* See the normal_inner_ref case for the rationale. */
9981 orig_op0
9982 = expand_expr (tem,
9983 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9984 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9985 != INTEGER_CST)
9986 && modifier != EXPAND_STACK_PARM
9987 ? target : NULL_RTX),
9988 VOIDmode,
9989 (modifier == EXPAND_INITIALIZER
9990 || modifier == EXPAND_CONST_ADDRESS
9991 || modifier == EXPAND_STACK_PARM)
9992 ? modifier : EXPAND_NORMAL);
9993
9994 if (MEM_P (orig_op0))
9995 {
9996 op0 = orig_op0;
9997
9998 /* Get a reference to just this component. */
9999 if (modifier == EXPAND_CONST_ADDRESS
10000 || modifier == EXPAND_SUM
10001 || modifier == EXPAND_INITIALIZER)
10002 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
10003 else
10004 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10005
10006 if (op0 == orig_op0)
10007 op0 = copy_rtx (op0);
10008
10009 set_mem_attributes (op0, treeop0, 0);
10010 if (REG_P (XEXP (op0, 0)))
10011 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10012
10013 MEM_VOLATILE_P (op0) |= volatilep;
10014 }
10015 }
10016 }
10017
10018 if (!op0)
10019 op0 = expand_expr (treeop0,
10020 NULL_RTX, VOIDmode, modifier);
10021
10022 /* If the input and output modes are both the same, we are done. */
10023 if (mode == GET_MODE (op0))
10024 ;
10025 /* If neither mode is BLKmode, and both modes are the same size
10026 then we can use gen_lowpart. */
10027 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10028 && (GET_MODE_PRECISION (mode)
10029 == GET_MODE_PRECISION (GET_MODE (op0)))
10030 && !COMPLEX_MODE_P (GET_MODE (op0)))
10031 {
10032 if (GET_CODE (op0) == SUBREG)
10033 op0 = force_reg (GET_MODE (op0), op0);
10034 temp = gen_lowpart_common (mode, op0);
10035 if (temp)
10036 op0 = temp;
10037 else
10038 {
10039 if (!REG_P (op0) && !MEM_P (op0))
10040 op0 = force_reg (GET_MODE (op0), op0);
10041 op0 = gen_lowpart (mode, op0);
10042 }
10043 }
10044 /* If both types are integral, convert from one mode to the other. */
10045 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10046 op0 = convert_modes (mode, GET_MODE (op0), op0,
10047 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10048 /* As a last resort, spill op0 to memory, and reload it in a
10049 different mode. */
10050 else if (!MEM_P (op0))
10051 {
10052 /* If the operand is not a MEM, force it into memory. Since we
10053 are going to be changing the mode of the MEM, don't call
10054 force_const_mem for constants because we don't allow pool
10055 constants to change mode. */
10056 tree inner_type = TREE_TYPE (treeop0);
10057
10058 gcc_assert (!TREE_ADDRESSABLE (exp));
10059
10060 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10061 target
10062 = assign_stack_temp_for_type
10063 (TYPE_MODE (inner_type),
10064 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
10065
10066 emit_move_insn (target, op0);
10067 op0 = target;
10068 }
10069
10070 /* At this point, OP0 is in the correct mode. If the output type is
10071 such that the operand is known to be aligned, indicate that it is.
10072 Otherwise, we need only be concerned about alignment for non-BLKmode
10073 results. */
10074 if (MEM_P (op0))
10075 {
10076 enum insn_code icode;
10077
10078 op0 = copy_rtx (op0);
10079
10080 if (TYPE_ALIGN_OK (type))
10081 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10082 else if (mode != BLKmode
10083 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)
10084 /* If the target does have special handling for unaligned
10085 loads of mode then use them. */
10086 && ((icode = optab_handler (movmisalign_optab, mode))
10087 != CODE_FOR_nothing))
10088 {
10089 rtx reg, insn;
10090
10091 op0 = adjust_address (op0, mode, 0);
10092 /* We've already validated the memory, and we're creating a
10093 new pseudo destination. The predicates really can't
10094 fail. */
10095 reg = gen_reg_rtx (mode);
10096
10097 /* Nor can the insn generator. */
10098 insn = GEN_FCN (icode) (reg, op0);
10099 emit_insn (insn);
10100 return reg;
10101 }
10102 else if (STRICT_ALIGNMENT
10103 && mode != BLKmode
10104 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10105 {
10106 tree inner_type = TREE_TYPE (treeop0);
10107 HOST_WIDE_INT temp_size
10108 = MAX (int_size_in_bytes (inner_type),
10109 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10110 rtx new_rtx
10111 = assign_stack_temp_for_type (mode, temp_size, 0, type);
10112 rtx new_with_op0_mode
10113 = adjust_address (new_rtx, GET_MODE (op0), 0);
10114
10115 gcc_assert (!TREE_ADDRESSABLE (exp));
10116
10117 if (GET_MODE (op0) == BLKmode)
10118 emit_block_move (new_with_op0_mode, op0,
10119 GEN_INT (GET_MODE_SIZE (mode)),
10120 (modifier == EXPAND_STACK_PARM
10121 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10122 else
10123 emit_move_insn (new_with_op0_mode, op0);
10124
10125 op0 = new_rtx;
10126 }
10127
10128 op0 = adjust_address (op0, mode, 0);
10129 }
10130
10131 return op0;
10132
10133 case MODIFY_EXPR:
10134 {
10135 tree lhs = treeop0;
10136 tree rhs = treeop1;
10137 gcc_assert (ignore);
10138
10139 /* Check for |= or &= of a bitfield of size one into another bitfield
10140 of size 1. In this case, (unless we need the result of the
10141 assignment) we can do this more efficiently with a
10142 test followed by an assignment, if necessary.
10143
10144 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10145 things change so we do, this code should be enhanced to
10146 support it. */
10147 if (TREE_CODE (lhs) == COMPONENT_REF
10148 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10149 || TREE_CODE (rhs) == BIT_AND_EXPR)
10150 && TREE_OPERAND (rhs, 0) == lhs
10151 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10152 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10153 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10154 {
10155 rtx label = gen_label_rtx ();
10156 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10157 do_jump (TREE_OPERAND (rhs, 1),
10158 value ? label : 0,
10159 value ? 0 : label, -1);
10160 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10161 MOVE_NONTEMPORAL (exp));
10162 do_pending_stack_adjust ();
10163 emit_label (label);
10164 return const0_rtx;
10165 }
10166
10167 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
10168 return const0_rtx;
10169 }
10170
10171 case ADDR_EXPR:
10172 return expand_expr_addr_expr (exp, target, tmode, modifier);
10173
10174 case REALPART_EXPR:
10175 op0 = expand_normal (treeop0);
10176 return read_complex_part (op0, false);
10177
10178 case IMAGPART_EXPR:
10179 op0 = expand_normal (treeop0);
10180 return read_complex_part (op0, true);
10181
10182 case RETURN_EXPR:
10183 case LABEL_EXPR:
10184 case GOTO_EXPR:
10185 case SWITCH_EXPR:
10186 case ASM_EXPR:
10187 /* Expanded in cfgexpand.c. */
10188 gcc_unreachable ();
10189
10190 case TRY_CATCH_EXPR:
10191 case CATCH_EXPR:
10192 case EH_FILTER_EXPR:
10193 case TRY_FINALLY_EXPR:
10194 /* Lowered by tree-eh.c. */
10195 gcc_unreachable ();
10196
10197 case WITH_CLEANUP_EXPR:
10198 case CLEANUP_POINT_EXPR:
10199 case TARGET_EXPR:
10200 case CASE_LABEL_EXPR:
10201 case VA_ARG_EXPR:
10202 case BIND_EXPR:
10203 case INIT_EXPR:
10204 case CONJ_EXPR:
10205 case COMPOUND_EXPR:
10206 case PREINCREMENT_EXPR:
10207 case PREDECREMENT_EXPR:
10208 case POSTINCREMENT_EXPR:
10209 case POSTDECREMENT_EXPR:
10210 case LOOP_EXPR:
10211 case EXIT_EXPR:
10212 /* Lowered by gimplify.c. */
10213 gcc_unreachable ();
10214
10215 case FDESC_EXPR:
10216 /* Function descriptors are not valid except for as
10217 initialization constants, and should not be expanded. */
10218 gcc_unreachable ();
10219
10220 case WITH_SIZE_EXPR:
10221 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10222 have pulled out the size to use in whatever context it needed. */
10223 return expand_expr_real (treeop0, original_target, tmode,
10224 modifier, alt_rtl);
10225
10226 case COMPOUND_LITERAL_EXPR:
10227 {
10228 /* Initialize the anonymous variable declared in the compound
10229 literal, then return the variable. */
10230 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
10231
10232 /* Create RTL for this variable. */
10233 if (!DECL_RTL_SET_P (decl))
10234 {
10235 if (DECL_HARD_REGISTER (decl))
10236 /* The user specified an assembler name for this variable.
10237 Set that up now. */
10238 rest_of_decl_compilation (decl, 0, 0);
10239 else
10240 expand_decl (decl);
10241 }
10242
10243 return expand_expr_real (decl, original_target, tmode,
10244 modifier, alt_rtl);
10245 }
10246
10247 default:
10248 return expand_expr_real_2 (&ops, target, tmode, modifier);
10249 }
10250 }
10251 \f
10252 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10253 signedness of TYPE), possibly returning the result in TARGET. */
10254 static rtx
10255 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10256 {
10257 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10258 if (target && GET_MODE (target) != GET_MODE (exp))
10259 target = 0;
10260 /* For constant values, reduce using build_int_cst_type. */
10261 if (CONST_INT_P (exp))
10262 {
10263 HOST_WIDE_INT value = INTVAL (exp);
10264 tree t = build_int_cst_type (type, value);
10265 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10266 }
10267 else if (TYPE_UNSIGNED (type))
10268 {
10269 rtx mask = immed_double_int_const (double_int_mask (prec),
10270 GET_MODE (exp));
10271 return expand_and (GET_MODE (exp), exp, mask, target);
10272 }
10273 else
10274 {
10275 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10276 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10277 exp, count, target, 0);
10278 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10279 exp, count, target, 0);
10280 }
10281 }
10282 \f
10283 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10284 when applied to the address of EXP produces an address known to be
10285 aligned more than BIGGEST_ALIGNMENT. */
10286
10287 static int
10288 is_aligning_offset (const_tree offset, const_tree exp)
10289 {
10290 /* Strip off any conversions. */
10291 while (CONVERT_EXPR_P (offset))
10292 offset = TREE_OPERAND (offset, 0);
10293
10294 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10295 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10296 if (TREE_CODE (offset) != BIT_AND_EXPR
10297 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10298 || compare_tree_int (TREE_OPERAND (offset, 1),
10299 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10300 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10301 return 0;
10302
10303 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10304 It must be NEGATE_EXPR. Then strip any more conversions. */
10305 offset = TREE_OPERAND (offset, 0);
10306 while (CONVERT_EXPR_P (offset))
10307 offset = TREE_OPERAND (offset, 0);
10308
10309 if (TREE_CODE (offset) != NEGATE_EXPR)
10310 return 0;
10311
10312 offset = TREE_OPERAND (offset, 0);
10313 while (CONVERT_EXPR_P (offset))
10314 offset = TREE_OPERAND (offset, 0);
10315
10316 /* This must now be the address of EXP. */
10317 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10318 }
10319 \f
10320 /* Return the tree node if an ARG corresponds to a string constant or zero
10321 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10322 in bytes within the string that ARG is accessing. The type of the
10323 offset will be `sizetype'. */
10324
10325 tree
10326 string_constant (tree arg, tree *ptr_offset)
10327 {
10328 tree array, offset, lower_bound;
10329 STRIP_NOPS (arg);
10330
10331 if (TREE_CODE (arg) == ADDR_EXPR)
10332 {
10333 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10334 {
10335 *ptr_offset = size_zero_node;
10336 return TREE_OPERAND (arg, 0);
10337 }
10338 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10339 {
10340 array = TREE_OPERAND (arg, 0);
10341 offset = size_zero_node;
10342 }
10343 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10344 {
10345 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10346 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10347 if (TREE_CODE (array) != STRING_CST
10348 && TREE_CODE (array) != VAR_DECL)
10349 return 0;
10350
10351 /* Check if the array has a nonzero lower bound. */
10352 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10353 if (!integer_zerop (lower_bound))
10354 {
10355 /* If the offset and base aren't both constants, return 0. */
10356 if (TREE_CODE (lower_bound) != INTEGER_CST)
10357 return 0;
10358 if (TREE_CODE (offset) != INTEGER_CST)
10359 return 0;
10360 /* Adjust offset by the lower bound. */
10361 offset = size_diffop (fold_convert (sizetype, offset),
10362 fold_convert (sizetype, lower_bound));
10363 }
10364 }
10365 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10366 {
10367 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10368 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10369 if (TREE_CODE (array) != ADDR_EXPR)
10370 return 0;
10371 array = TREE_OPERAND (array, 0);
10372 if (TREE_CODE (array) != STRING_CST
10373 && TREE_CODE (array) != VAR_DECL)
10374 return 0;
10375 }
10376 else
10377 return 0;
10378 }
10379 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10380 {
10381 tree arg0 = TREE_OPERAND (arg, 0);
10382 tree arg1 = TREE_OPERAND (arg, 1);
10383
10384 STRIP_NOPS (arg0);
10385 STRIP_NOPS (arg1);
10386
10387 if (TREE_CODE (arg0) == ADDR_EXPR
10388 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10389 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10390 {
10391 array = TREE_OPERAND (arg0, 0);
10392 offset = arg1;
10393 }
10394 else if (TREE_CODE (arg1) == ADDR_EXPR
10395 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10396 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10397 {
10398 array = TREE_OPERAND (arg1, 0);
10399 offset = arg0;
10400 }
10401 else
10402 return 0;
10403 }
10404 else
10405 return 0;
10406
10407 if (TREE_CODE (array) == STRING_CST)
10408 {
10409 *ptr_offset = fold_convert (sizetype, offset);
10410 return array;
10411 }
10412 else if (TREE_CODE (array) == VAR_DECL
10413 || TREE_CODE (array) == CONST_DECL)
10414 {
10415 int length;
10416
10417 /* Variables initialized to string literals can be handled too. */
10418 if (!const_value_known_p (array)
10419 || !DECL_INITIAL (array)
10420 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10421 return 0;
10422
10423 /* Avoid const char foo[4] = "abcde"; */
10424 if (DECL_SIZE_UNIT (array) == NULL_TREE
10425 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10426 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10427 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10428 return 0;
10429
10430 /* If variable is bigger than the string literal, OFFSET must be constant
10431 and inside of the bounds of the string literal. */
10432 offset = fold_convert (sizetype, offset);
10433 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10434 && (! host_integerp (offset, 1)
10435 || compare_tree_int (offset, length) >= 0))
10436 return 0;
10437
10438 *ptr_offset = offset;
10439 return DECL_INITIAL (array);
10440 }
10441
10442 return 0;
10443 }
10444 \f
10445 /* Generate code to calculate OPS, and exploded expression
10446 using a store-flag instruction and return an rtx for the result.
10447 OPS reflects a comparison.
10448
10449 If TARGET is nonzero, store the result there if convenient.
10450
10451 Return zero if there is no suitable set-flag instruction
10452 available on this machine.
10453
10454 Once expand_expr has been called on the arguments of the comparison,
10455 we are committed to doing the store flag, since it is not safe to
10456 re-evaluate the expression. We emit the store-flag insn by calling
10457 emit_store_flag, but only expand the arguments if we have a reason
10458 to believe that emit_store_flag will be successful. If we think that
10459 it will, but it isn't, we have to simulate the store-flag with a
10460 set/jump/set sequence. */
10461
10462 static rtx
10463 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10464 {
10465 enum rtx_code code;
10466 tree arg0, arg1, type;
10467 tree tem;
10468 enum machine_mode operand_mode;
10469 int unsignedp;
10470 rtx op0, op1;
10471 rtx subtarget = target;
10472 location_t loc = ops->location;
10473
10474 arg0 = ops->op0;
10475 arg1 = ops->op1;
10476
10477 /* Don't crash if the comparison was erroneous. */
10478 if (arg0 == error_mark_node || arg1 == error_mark_node)
10479 return const0_rtx;
10480
10481 type = TREE_TYPE (arg0);
10482 operand_mode = TYPE_MODE (type);
10483 unsignedp = TYPE_UNSIGNED (type);
10484
10485 /* We won't bother with BLKmode store-flag operations because it would mean
10486 passing a lot of information to emit_store_flag. */
10487 if (operand_mode == BLKmode)
10488 return 0;
10489
10490 /* We won't bother with store-flag operations involving function pointers
10491 when function pointers must be canonicalized before comparisons. */
10492 #ifdef HAVE_canonicalize_funcptr_for_compare
10493 if (HAVE_canonicalize_funcptr_for_compare
10494 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10495 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10496 == FUNCTION_TYPE))
10497 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10498 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10499 == FUNCTION_TYPE))))
10500 return 0;
10501 #endif
10502
10503 STRIP_NOPS (arg0);
10504 STRIP_NOPS (arg1);
10505
10506 /* For vector typed comparisons emit code to generate the desired
10507 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10508 expander for this. */
10509 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10510 {
10511 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10512 tree if_true = constant_boolean_node (true, ops->type);
10513 tree if_false = constant_boolean_node (false, ops->type);
10514 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10515 }
10516
10517 /* For vector typed comparisons emit code to generate the desired
10518 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10519 expander for this. */
10520 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10521 {
10522 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10523 tree if_true = constant_boolean_node (true, ops->type);
10524 tree if_false = constant_boolean_node (false, ops->type);
10525 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10526 }
10527
10528 /* Get the rtx comparison code to use. We know that EXP is a comparison
10529 operation of some type. Some comparisons against 1 and -1 can be
10530 converted to comparisons with zero. Do so here so that the tests
10531 below will be aware that we have a comparison with zero. These
10532 tests will not catch constants in the first operand, but constants
10533 are rarely passed as the first operand. */
10534
10535 switch (ops->code)
10536 {
10537 case EQ_EXPR:
10538 code = EQ;
10539 break;
10540 case NE_EXPR:
10541 code = NE;
10542 break;
10543 case LT_EXPR:
10544 if (integer_onep (arg1))
10545 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10546 else
10547 code = unsignedp ? LTU : LT;
10548 break;
10549 case LE_EXPR:
10550 if (! unsignedp && integer_all_onesp (arg1))
10551 arg1 = integer_zero_node, code = LT;
10552 else
10553 code = unsignedp ? LEU : LE;
10554 break;
10555 case GT_EXPR:
10556 if (! unsignedp && integer_all_onesp (arg1))
10557 arg1 = integer_zero_node, code = GE;
10558 else
10559 code = unsignedp ? GTU : GT;
10560 break;
10561 case GE_EXPR:
10562 if (integer_onep (arg1))
10563 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10564 else
10565 code = unsignedp ? GEU : GE;
10566 break;
10567
10568 case UNORDERED_EXPR:
10569 code = UNORDERED;
10570 break;
10571 case ORDERED_EXPR:
10572 code = ORDERED;
10573 break;
10574 case UNLT_EXPR:
10575 code = UNLT;
10576 break;
10577 case UNLE_EXPR:
10578 code = UNLE;
10579 break;
10580 case UNGT_EXPR:
10581 code = UNGT;
10582 break;
10583 case UNGE_EXPR:
10584 code = UNGE;
10585 break;
10586 case UNEQ_EXPR:
10587 code = UNEQ;
10588 break;
10589 case LTGT_EXPR:
10590 code = LTGT;
10591 break;
10592
10593 default:
10594 gcc_unreachable ();
10595 }
10596
10597 /* Put a constant second. */
10598 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10599 || TREE_CODE (arg0) == FIXED_CST)
10600 {
10601 tem = arg0; arg0 = arg1; arg1 = tem;
10602 code = swap_condition (code);
10603 }
10604
10605 /* If this is an equality or inequality test of a single bit, we can
10606 do this by shifting the bit being tested to the low-order bit and
10607 masking the result with the constant 1. If the condition was EQ,
10608 we xor it with 1. This does not require an scc insn and is faster
10609 than an scc insn even if we have it.
10610
10611 The code to make this transformation was moved into fold_single_bit_test,
10612 so we just call into the folder and expand its result. */
10613
10614 if ((code == NE || code == EQ)
10615 && integer_zerop (arg1)
10616 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10617 {
10618 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
10619 if (srcstmt
10620 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
10621 {
10622 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
10623 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10624 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
10625 gimple_assign_rhs1 (srcstmt),
10626 gimple_assign_rhs2 (srcstmt));
10627 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
10628 if (temp)
10629 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
10630 }
10631 }
10632
10633 if (! get_subtarget (target)
10634 || GET_MODE (subtarget) != operand_mode)
10635 subtarget = 0;
10636
10637 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10638
10639 if (target == 0)
10640 target = gen_reg_rtx (mode);
10641
10642 /* Try a cstore if possible. */
10643 return emit_store_flag_force (target, code, op0, op1,
10644 operand_mode, unsignedp,
10645 (TYPE_PRECISION (ops->type) == 1
10646 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10647 }
10648 \f
10649
10650 /* Stubs in case we haven't got a casesi insn. */
10651 #ifndef HAVE_casesi
10652 # define HAVE_casesi 0
10653 # define gen_casesi(a, b, c, d, e) (0)
10654 # define CODE_FOR_casesi CODE_FOR_nothing
10655 #endif
10656
10657 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10658 0 otherwise (i.e. if there is no casesi instruction). */
10659 int
10660 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10661 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10662 rtx fallback_label ATTRIBUTE_UNUSED)
10663 {
10664 struct expand_operand ops[5];
10665 enum machine_mode index_mode = SImode;
10666 rtx op1, op2, index;
10667
10668 if (! HAVE_casesi)
10669 return 0;
10670
10671 /* Convert the index to SImode. */
10672 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10673 {
10674 enum machine_mode omode = TYPE_MODE (index_type);
10675 rtx rangertx = expand_normal (range);
10676
10677 /* We must handle the endpoints in the original mode. */
10678 index_expr = build2 (MINUS_EXPR, index_type,
10679 index_expr, minval);
10680 minval = integer_zero_node;
10681 index = expand_normal (index_expr);
10682 if (default_label)
10683 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10684 omode, 1, default_label);
10685 /* Now we can safely truncate. */
10686 index = convert_to_mode (index_mode, index, 0);
10687 }
10688 else
10689 {
10690 if (TYPE_MODE (index_type) != index_mode)
10691 {
10692 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
10693 index_expr = fold_convert (index_type, index_expr);
10694 }
10695
10696 index = expand_normal (index_expr);
10697 }
10698
10699 do_pending_stack_adjust ();
10700
10701 op1 = expand_normal (minval);
10702 op2 = expand_normal (range);
10703
10704 create_input_operand (&ops[0], index, index_mode);
10705 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10706 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10707 create_fixed_operand (&ops[3], table_label);
10708 create_fixed_operand (&ops[4], (default_label
10709 ? default_label
10710 : fallback_label));
10711 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10712 return 1;
10713 }
10714
10715 /* Attempt to generate a tablejump instruction; same concept. */
10716 #ifndef HAVE_tablejump
10717 #define HAVE_tablejump 0
10718 #define gen_tablejump(x, y) (0)
10719 #endif
10720
10721 /* Subroutine of the next function.
10722
10723 INDEX is the value being switched on, with the lowest value
10724 in the table already subtracted.
10725 MODE is its expected mode (needed if INDEX is constant).
10726 RANGE is the length of the jump table.
10727 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10728
10729 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10730 index value is out of range. */
10731
10732 static void
10733 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10734 rtx default_label)
10735 {
10736 rtx temp, vector;
10737
10738 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10739 cfun->cfg->max_jumptable_ents = INTVAL (range);
10740
10741 /* Do an unsigned comparison (in the proper mode) between the index
10742 expression and the value which represents the length of the range.
10743 Since we just finished subtracting the lower bound of the range
10744 from the index expression, this comparison allows us to simultaneously
10745 check that the original index expression value is both greater than
10746 or equal to the minimum value of the range and less than or equal to
10747 the maximum value of the range. */
10748
10749 if (default_label)
10750 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10751 default_label);
10752
10753 /* If index is in range, it must fit in Pmode.
10754 Convert to Pmode so we can index with it. */
10755 if (mode != Pmode)
10756 index = convert_to_mode (Pmode, index, 1);
10757
10758 /* Don't let a MEM slip through, because then INDEX that comes
10759 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10760 and break_out_memory_refs will go to work on it and mess it up. */
10761 #ifdef PIC_CASE_VECTOR_ADDRESS
10762 if (flag_pic && !REG_P (index))
10763 index = copy_to_mode_reg (Pmode, index);
10764 #endif
10765
10766 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10767 GET_MODE_SIZE, because this indicates how large insns are. The other
10768 uses should all be Pmode, because they are addresses. This code
10769 could fail if addresses and insns are not the same size. */
10770 index = gen_rtx_PLUS (Pmode,
10771 gen_rtx_MULT (Pmode, index,
10772 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10773 gen_rtx_LABEL_REF (Pmode, table_label));
10774 #ifdef PIC_CASE_VECTOR_ADDRESS
10775 if (flag_pic)
10776 index = PIC_CASE_VECTOR_ADDRESS (index);
10777 else
10778 #endif
10779 index = memory_address (CASE_VECTOR_MODE, index);
10780 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10781 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10782 convert_move (temp, vector, 0);
10783
10784 emit_jump_insn (gen_tablejump (temp, table_label));
10785
10786 /* If we are generating PIC code or if the table is PC-relative, the
10787 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10788 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10789 emit_barrier ();
10790 }
10791
10792 int
10793 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10794 rtx table_label, rtx default_label)
10795 {
10796 rtx index;
10797
10798 if (! HAVE_tablejump)
10799 return 0;
10800
10801 index_expr = fold_build2 (MINUS_EXPR, index_type,
10802 fold_convert (index_type, index_expr),
10803 fold_convert (index_type, minval));
10804 index = expand_normal (index_expr);
10805 do_pending_stack_adjust ();
10806
10807 do_tablejump (index, TYPE_MODE (index_type),
10808 convert_modes (TYPE_MODE (index_type),
10809 TYPE_MODE (TREE_TYPE (range)),
10810 expand_normal (range),
10811 TYPE_UNSIGNED (TREE_TYPE (range))),
10812 table_label, default_label);
10813 return 1;
10814 }
10815
10816 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10817 static rtx
10818 const_vector_from_tree (tree exp)
10819 {
10820 rtvec v;
10821 int units, i;
10822 tree link, elt;
10823 enum machine_mode inner, mode;
10824
10825 mode = TYPE_MODE (TREE_TYPE (exp));
10826
10827 if (initializer_zerop (exp))
10828 return CONST0_RTX (mode);
10829
10830 units = GET_MODE_NUNITS (mode);
10831 inner = GET_MODE_INNER (mode);
10832
10833 v = rtvec_alloc (units);
10834
10835 link = TREE_VECTOR_CST_ELTS (exp);
10836 for (i = 0; link; link = TREE_CHAIN (link), ++i)
10837 {
10838 elt = TREE_VALUE (link);
10839
10840 if (TREE_CODE (elt) == REAL_CST)
10841 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10842 inner);
10843 else if (TREE_CODE (elt) == FIXED_CST)
10844 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10845 inner);
10846 else
10847 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10848 inner);
10849 }
10850
10851 /* Initialize remaining elements to 0. */
10852 for (; i < units; ++i)
10853 RTVEC_ELT (v, i) = CONST0_RTX (inner);
10854
10855 return gen_rtx_CONST_VECTOR (mode, v);
10856 }
10857
10858 /* Build a decl for a personality function given a language prefix. */
10859
10860 tree
10861 build_personality_function (const char *lang)
10862 {
10863 const char *unwind_and_version;
10864 tree decl, type;
10865 char *name;
10866
10867 switch (targetm_common.except_unwind_info (&global_options))
10868 {
10869 case UI_NONE:
10870 return NULL;
10871 case UI_SJLJ:
10872 unwind_and_version = "_sj0";
10873 break;
10874 case UI_DWARF2:
10875 case UI_TARGET:
10876 unwind_and_version = "_v0";
10877 break;
10878 default:
10879 gcc_unreachable ();
10880 }
10881
10882 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
10883
10884 type = build_function_type_list (integer_type_node, integer_type_node,
10885 long_long_unsigned_type_node,
10886 ptr_type_node, ptr_type_node, NULL_TREE);
10887 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
10888 get_identifier (name), type);
10889 DECL_ARTIFICIAL (decl) = 1;
10890 DECL_EXTERNAL (decl) = 1;
10891 TREE_PUBLIC (decl) = 1;
10892
10893 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
10894 are the flags assigned by targetm.encode_section_info. */
10895 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
10896
10897 return decl;
10898 }
10899
10900 /* Extracts the personality function of DECL and returns the corresponding
10901 libfunc. */
10902
10903 rtx
10904 get_personality_function (tree decl)
10905 {
10906 tree personality = DECL_FUNCTION_PERSONALITY (decl);
10907 enum eh_personality_kind pk;
10908
10909 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
10910 if (pk == eh_personality_none)
10911 return NULL;
10912
10913 if (!personality
10914 && pk == eh_personality_any)
10915 personality = lang_hooks.eh_personality ();
10916
10917 if (pk == eh_personality_lang)
10918 gcc_assert (personality != NULL_TREE);
10919
10920 return XEXP (DECL_RTL (personality), 0);
10921 }
10922
10923 #include "gt-expr.h"