expr.c (store_constructor): Allow CONSTRUCTOR with VECTOR_TYPE (same sized) elements...
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2013 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "machmode.h"
25 #include "rtl.h"
26 #include "tree.h"
27 #include "stringpool.h"
28 #include "stor-layout.h"
29 #include "attribs.h"
30 #include "varasm.h"
31 #include "flags.h"
32 #include "regs.h"
33 #include "hard-reg-set.h"
34 #include "except.h"
35 #include "function.h"
36 #include "insn-config.h"
37 #include "insn-attr.h"
38 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
39 #include "expr.h"
40 #include "optabs.h"
41 #include "libfuncs.h"
42 #include "recog.h"
43 #include "reload.h"
44 #include "typeclass.h"
45 #include "toplev.h"
46 #include "langhooks.h"
47 #include "intl.h"
48 #include "tm_p.h"
49 #include "tree-iterator.h"
50 #include "gimple.h"
51 #include "gimple-ssa.h"
52 #include "cgraph.h"
53 #include "tree-ssanames.h"
54 #include "target.h"
55 #include "common/common-target.h"
56 #include "timevar.h"
57 #include "df.h"
58 #include "diagnostic.h"
59 #include "tree-ssa-live.h"
60 #include "tree-outof-ssa.h"
61 #include "target-globals.h"
62 #include "params.h"
63 #include "tree-ssa-address.h"
64 #include "cfgexpand.h"
65
66 /* Decide whether a function's arguments should be processed
67 from first to last or from last to first.
68
69 They should if the stack and args grow in opposite directions, but
70 only if we have push insns. */
71
72 #ifdef PUSH_ROUNDING
73
74 #ifndef PUSH_ARGS_REVERSED
75 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
76 #define PUSH_ARGS_REVERSED /* If it's last to first. */
77 #endif
78 #endif
79
80 #endif
81
82 #ifndef STACK_PUSH_CODE
83 #ifdef STACK_GROWS_DOWNWARD
84 #define STACK_PUSH_CODE PRE_DEC
85 #else
86 #define STACK_PUSH_CODE PRE_INC
87 #endif
88 #endif
89
90
91 /* If this is nonzero, we do not bother generating VOLATILE
92 around volatile memory references, and we are willing to
93 output indirect addresses. If cse is to follow, we reject
94 indirect addresses so a useful potential cse is generated;
95 if it is used only once, instruction combination will produce
96 the same indirect address eventually. */
97 int cse_not_expected;
98
99 /* This structure is used by move_by_pieces to describe the move to
100 be performed. */
101 struct move_by_pieces_d
102 {
103 rtx to;
104 rtx to_addr;
105 int autinc_to;
106 int explicit_inc_to;
107 rtx from;
108 rtx from_addr;
109 int autinc_from;
110 int explicit_inc_from;
111 unsigned HOST_WIDE_INT len;
112 HOST_WIDE_INT offset;
113 int reverse;
114 };
115
116 /* This structure is used by store_by_pieces to describe the clear to
117 be performed. */
118
119 struct store_by_pieces_d
120 {
121 rtx to;
122 rtx to_addr;
123 int autinc_to;
124 int explicit_inc_to;
125 unsigned HOST_WIDE_INT len;
126 HOST_WIDE_INT offset;
127 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
128 void *constfundata;
129 int reverse;
130 };
131
132 static void move_by_pieces_1 (insn_gen_fn, machine_mode,
133 struct move_by_pieces_d *);
134 static bool block_move_libcall_safe_for_call_parm (void);
135 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT,
136 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
137 unsigned HOST_WIDE_INT);
138 static tree emit_block_move_libcall_fn (int);
139 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
140 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
141 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
142 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
143 static void store_by_pieces_2 (insn_gen_fn, machine_mode,
144 struct store_by_pieces_d *);
145 static tree clear_storage_libcall_fn (int);
146 static rtx compress_float_constant (rtx, rtx);
147 static rtx get_subtarget (rtx);
148 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
149 HOST_WIDE_INT, enum machine_mode,
150 tree, int, alias_set_type);
151 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
152 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
153 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
154 enum machine_mode, tree, alias_set_type, bool);
155
156 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
157
158 static int is_aligning_offset (const_tree, const_tree);
159 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
160 enum expand_modifier);
161 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
162 static rtx do_store_flag (sepops, rtx, enum machine_mode);
163 #ifdef PUSH_ROUNDING
164 static void emit_single_push_insn (enum machine_mode, rtx, tree);
165 #endif
166 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx, int);
167 static rtx const_vector_from_tree (tree);
168 static void write_complex_part (rtx, rtx, bool);
169
170 /* This macro is used to determine whether move_by_pieces should be called
171 to perform a structure copy. */
172 #ifndef MOVE_BY_PIECES_P
173 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
174 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
175 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
176 #endif
177
178 /* This macro is used to determine whether clear_by_pieces should be
179 called to clear storage. */
180 #ifndef CLEAR_BY_PIECES_P
181 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
182 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
183 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
184 #endif
185
186 /* This macro is used to determine whether store_by_pieces should be
187 called to "memset" storage with byte values other than zero. */
188 #ifndef SET_BY_PIECES_P
189 #define SET_BY_PIECES_P(SIZE, ALIGN) \
190 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
191 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
192 #endif
193
194 /* This macro is used to determine whether store_by_pieces should be
195 called to "memcpy" storage when the source is a constant string. */
196 #ifndef STORE_BY_PIECES_P
197 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
198 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
199 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
200 #endif
201 \f
202 /* This is run to set up which modes can be used
203 directly in memory and to initialize the block move optab. It is run
204 at the beginning of compilation and when the target is reinitialized. */
205
206 void
207 init_expr_target (void)
208 {
209 rtx insn, pat;
210 enum machine_mode mode;
211 int num_clobbers;
212 rtx mem, mem1;
213 rtx reg;
214
215 /* Try indexing by frame ptr and try by stack ptr.
216 It is known that on the Convex the stack ptr isn't a valid index.
217 With luck, one or the other is valid on any machine. */
218 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
219 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
220
221 /* A scratch register we can modify in-place below to avoid
222 useless RTL allocations. */
223 reg = gen_rtx_REG (VOIDmode, -1);
224
225 insn = rtx_alloc (INSN);
226 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
227 PATTERN (insn) = pat;
228
229 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
230 mode = (enum machine_mode) ((int) mode + 1))
231 {
232 int regno;
233
234 direct_load[(int) mode] = direct_store[(int) mode] = 0;
235 PUT_MODE (mem, mode);
236 PUT_MODE (mem1, mode);
237 PUT_MODE (reg, mode);
238
239 /* See if there is some register that can be used in this mode and
240 directly loaded or stored from memory. */
241
242 if (mode != VOIDmode && mode != BLKmode)
243 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
244 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
245 regno++)
246 {
247 if (! HARD_REGNO_MODE_OK (regno, mode))
248 continue;
249
250 SET_REGNO (reg, regno);
251
252 SET_SRC (pat) = mem;
253 SET_DEST (pat) = reg;
254 if (recog (pat, insn, &num_clobbers) >= 0)
255 direct_load[(int) mode] = 1;
256
257 SET_SRC (pat) = mem1;
258 SET_DEST (pat) = reg;
259 if (recog (pat, insn, &num_clobbers) >= 0)
260 direct_load[(int) mode] = 1;
261
262 SET_SRC (pat) = reg;
263 SET_DEST (pat) = mem;
264 if (recog (pat, insn, &num_clobbers) >= 0)
265 direct_store[(int) mode] = 1;
266
267 SET_SRC (pat) = reg;
268 SET_DEST (pat) = mem1;
269 if (recog (pat, insn, &num_clobbers) >= 0)
270 direct_store[(int) mode] = 1;
271 }
272 }
273
274 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
275
276 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
277 mode = GET_MODE_WIDER_MODE (mode))
278 {
279 enum machine_mode srcmode;
280 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
281 srcmode = GET_MODE_WIDER_MODE (srcmode))
282 {
283 enum insn_code ic;
284
285 ic = can_extend_p (mode, srcmode, 0);
286 if (ic == CODE_FOR_nothing)
287 continue;
288
289 PUT_MODE (mem, srcmode);
290
291 if (insn_operand_matches (ic, 1, mem))
292 float_extend_from_mem[mode][srcmode] = true;
293 }
294 }
295 }
296
297 /* This is run at the start of compiling a function. */
298
299 void
300 init_expr (void)
301 {
302 memset (&crtl->expr, 0, sizeof (crtl->expr));
303 }
304 \f
305 /* Copy data from FROM to TO, where the machine modes are not the same.
306 Both modes may be integer, or both may be floating, or both may be
307 fixed-point.
308 UNSIGNEDP should be nonzero if FROM is an unsigned type.
309 This causes zero-extension instead of sign-extension. */
310
311 void
312 convert_move (rtx to, rtx from, int unsignedp)
313 {
314 enum machine_mode to_mode = GET_MODE (to);
315 enum machine_mode from_mode = GET_MODE (from);
316 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
317 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
318 enum insn_code code;
319 rtx libcall;
320
321 /* rtx code for making an equivalent value. */
322 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
323 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
324
325
326 gcc_assert (to_real == from_real);
327 gcc_assert (to_mode != BLKmode);
328 gcc_assert (from_mode != BLKmode);
329
330 /* If the source and destination are already the same, then there's
331 nothing to do. */
332 if (to == from)
333 return;
334
335 /* If FROM is a SUBREG that indicates that we have already done at least
336 the required extension, strip it. We don't handle such SUBREGs as
337 TO here. */
338
339 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
340 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
341 >= GET_MODE_PRECISION (to_mode))
342 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
343 from = gen_lowpart (to_mode, from), from_mode = to_mode;
344
345 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
346
347 if (to_mode == from_mode
348 || (from_mode == VOIDmode && CONSTANT_P (from)))
349 {
350 emit_move_insn (to, from);
351 return;
352 }
353
354 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
355 {
356 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
357
358 if (VECTOR_MODE_P (to_mode))
359 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
360 else
361 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
362
363 emit_move_insn (to, from);
364 return;
365 }
366
367 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
368 {
369 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
370 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
371 return;
372 }
373
374 if (to_real)
375 {
376 rtx value, insns;
377 convert_optab tab;
378
379 gcc_assert ((GET_MODE_PRECISION (from_mode)
380 != GET_MODE_PRECISION (to_mode))
381 || (DECIMAL_FLOAT_MODE_P (from_mode)
382 != DECIMAL_FLOAT_MODE_P (to_mode)));
383
384 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
385 /* Conversion between decimal float and binary float, same size. */
386 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
387 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
388 tab = sext_optab;
389 else
390 tab = trunc_optab;
391
392 /* Try converting directly if the insn is supported. */
393
394 code = convert_optab_handler (tab, to_mode, from_mode);
395 if (code != CODE_FOR_nothing)
396 {
397 emit_unop_insn (code, to, from,
398 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
399 return;
400 }
401
402 /* Otherwise use a libcall. */
403 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
404
405 /* Is this conversion implemented yet? */
406 gcc_assert (libcall);
407
408 start_sequence ();
409 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
410 1, from, from_mode);
411 insns = get_insns ();
412 end_sequence ();
413 emit_libcall_block (insns, to, value,
414 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
415 from)
416 : gen_rtx_FLOAT_EXTEND (to_mode, from));
417 return;
418 }
419
420 /* Handle pointer conversion. */ /* SPEE 900220. */
421 /* Targets are expected to provide conversion insns between PxImode and
422 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
423 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
424 {
425 enum machine_mode full_mode
426 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
427
428 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
429 != CODE_FOR_nothing);
430
431 if (full_mode != from_mode)
432 from = convert_to_mode (full_mode, from, unsignedp);
433 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
434 to, from, UNKNOWN);
435 return;
436 }
437 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
438 {
439 rtx new_from;
440 enum machine_mode full_mode
441 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
442 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
443 enum insn_code icode;
444
445 icode = convert_optab_handler (ctab, full_mode, from_mode);
446 gcc_assert (icode != CODE_FOR_nothing);
447
448 if (to_mode == full_mode)
449 {
450 emit_unop_insn (icode, to, from, UNKNOWN);
451 return;
452 }
453
454 new_from = gen_reg_rtx (full_mode);
455 emit_unop_insn (icode, new_from, from, UNKNOWN);
456
457 /* else proceed to integer conversions below. */
458 from_mode = full_mode;
459 from = new_from;
460 }
461
462 /* Make sure both are fixed-point modes or both are not. */
463 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
464 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
465 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
466 {
467 /* If we widen from_mode to to_mode and they are in the same class,
468 we won't saturate the result.
469 Otherwise, always saturate the result to play safe. */
470 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
471 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
472 expand_fixed_convert (to, from, 0, 0);
473 else
474 expand_fixed_convert (to, from, 0, 1);
475 return;
476 }
477
478 /* Now both modes are integers. */
479
480 /* Handle expanding beyond a word. */
481 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
482 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
483 {
484 rtx insns;
485 rtx lowpart;
486 rtx fill_value;
487 rtx lowfrom;
488 int i;
489 enum machine_mode lowpart_mode;
490 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
491
492 /* Try converting directly if the insn is supported. */
493 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
494 != CODE_FOR_nothing)
495 {
496 /* If FROM is a SUBREG, put it into a register. Do this
497 so that we always generate the same set of insns for
498 better cse'ing; if an intermediate assignment occurred,
499 we won't be doing the operation directly on the SUBREG. */
500 if (optimize > 0 && GET_CODE (from) == SUBREG)
501 from = force_reg (from_mode, from);
502 emit_unop_insn (code, to, from, equiv_code);
503 return;
504 }
505 /* Next, try converting via full word. */
506 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
507 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
508 != CODE_FOR_nothing))
509 {
510 rtx word_to = gen_reg_rtx (word_mode);
511 if (REG_P (to))
512 {
513 if (reg_overlap_mentioned_p (to, from))
514 from = force_reg (from_mode, from);
515 emit_clobber (to);
516 }
517 convert_move (word_to, from, unsignedp);
518 emit_unop_insn (code, to, word_to, equiv_code);
519 return;
520 }
521
522 /* No special multiword conversion insn; do it by hand. */
523 start_sequence ();
524
525 /* Since we will turn this into a no conflict block, we must ensure the
526 the source does not overlap the target so force it into an isolated
527 register when maybe so. Likewise for any MEM input, since the
528 conversion sequence might require several references to it and we
529 must ensure we're getting the same value every time. */
530
531 if (MEM_P (from) || reg_overlap_mentioned_p (to, from))
532 from = force_reg (from_mode, from);
533
534 /* Get a copy of FROM widened to a word, if necessary. */
535 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
536 lowpart_mode = word_mode;
537 else
538 lowpart_mode = from_mode;
539
540 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
541
542 lowpart = gen_lowpart (lowpart_mode, to);
543 emit_move_insn (lowpart, lowfrom);
544
545 /* Compute the value to put in each remaining word. */
546 if (unsignedp)
547 fill_value = const0_rtx;
548 else
549 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
550 LT, lowfrom, const0_rtx,
551 VOIDmode, 0, -1);
552
553 /* Fill the remaining words. */
554 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
555 {
556 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
557 rtx subword = operand_subword (to, index, 1, to_mode);
558
559 gcc_assert (subword);
560
561 if (fill_value != subword)
562 emit_move_insn (subword, fill_value);
563 }
564
565 insns = get_insns ();
566 end_sequence ();
567
568 emit_insn (insns);
569 return;
570 }
571
572 /* Truncating multi-word to a word or less. */
573 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
574 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
575 {
576 if (!((MEM_P (from)
577 && ! MEM_VOLATILE_P (from)
578 && direct_load[(int) to_mode]
579 && ! mode_dependent_address_p (XEXP (from, 0),
580 MEM_ADDR_SPACE (from)))
581 || REG_P (from)
582 || GET_CODE (from) == SUBREG))
583 from = force_reg (from_mode, from);
584 convert_move (to, gen_lowpart (word_mode, from), 0);
585 return;
586 }
587
588 /* Now follow all the conversions between integers
589 no more than a word long. */
590
591 /* For truncation, usually we can just refer to FROM in a narrower mode. */
592 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
593 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
594 {
595 if (!((MEM_P (from)
596 && ! MEM_VOLATILE_P (from)
597 && direct_load[(int) to_mode]
598 && ! mode_dependent_address_p (XEXP (from, 0),
599 MEM_ADDR_SPACE (from)))
600 || REG_P (from)
601 || GET_CODE (from) == SUBREG))
602 from = force_reg (from_mode, from);
603 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
604 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
605 from = copy_to_reg (from);
606 emit_move_insn (to, gen_lowpart (to_mode, from));
607 return;
608 }
609
610 /* Handle extension. */
611 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
612 {
613 /* Convert directly if that works. */
614 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
615 != CODE_FOR_nothing)
616 {
617 emit_unop_insn (code, to, from, equiv_code);
618 return;
619 }
620 else
621 {
622 enum machine_mode intermediate;
623 rtx tmp;
624 int shift_amount;
625
626 /* Search for a mode to convert via. */
627 for (intermediate = from_mode; intermediate != VOIDmode;
628 intermediate = GET_MODE_WIDER_MODE (intermediate))
629 if (((can_extend_p (to_mode, intermediate, unsignedp)
630 != CODE_FOR_nothing)
631 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
632 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
633 && (can_extend_p (intermediate, from_mode, unsignedp)
634 != CODE_FOR_nothing))
635 {
636 convert_move (to, convert_to_mode (intermediate, from,
637 unsignedp), unsignedp);
638 return;
639 }
640
641 /* No suitable intermediate mode.
642 Generate what we need with shifts. */
643 shift_amount = (GET_MODE_PRECISION (to_mode)
644 - GET_MODE_PRECISION (from_mode));
645 from = gen_lowpart (to_mode, force_reg (from_mode, from));
646 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
647 to, unsignedp);
648 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
649 to, unsignedp);
650 if (tmp != to)
651 emit_move_insn (to, tmp);
652 return;
653 }
654 }
655
656 /* Support special truncate insns for certain modes. */
657 if (convert_optab_handler (trunc_optab, to_mode,
658 from_mode) != CODE_FOR_nothing)
659 {
660 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
661 to, from, UNKNOWN);
662 return;
663 }
664
665 /* Handle truncation of volatile memrefs, and so on;
666 the things that couldn't be truncated directly,
667 and for which there was no special instruction.
668
669 ??? Code above formerly short-circuited this, for most integer
670 mode pairs, with a force_reg in from_mode followed by a recursive
671 call to this routine. Appears always to have been wrong. */
672 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
673 {
674 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
675 emit_move_insn (to, temp);
676 return;
677 }
678
679 /* Mode combination is not recognized. */
680 gcc_unreachable ();
681 }
682
683 /* Return an rtx for a value that would result
684 from converting X to mode MODE.
685 Both X and MODE may be floating, or both integer.
686 UNSIGNEDP is nonzero if X is an unsigned value.
687 This can be done by referring to a part of X in place
688 or by copying to a new temporary with conversion. */
689
690 rtx
691 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
692 {
693 return convert_modes (mode, VOIDmode, x, unsignedp);
694 }
695
696 /* Return an rtx for a value that would result
697 from converting X from mode OLDMODE to mode MODE.
698 Both modes may be floating, or both integer.
699 UNSIGNEDP is nonzero if X is an unsigned value.
700
701 This can be done by referring to a part of X in place
702 or by copying to a new temporary with conversion.
703
704 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
705
706 rtx
707 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
708 {
709 rtx temp;
710
711 /* If FROM is a SUBREG that indicates that we have already done at least
712 the required extension, strip it. */
713
714 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
715 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
716 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
717 x = gen_lowpart (mode, x);
718
719 if (GET_MODE (x) != VOIDmode)
720 oldmode = GET_MODE (x);
721
722 if (mode == oldmode)
723 return x;
724
725 /* There is one case that we must handle specially: If we are converting
726 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
727 we are to interpret the constant as unsigned, gen_lowpart will do
728 the wrong if the constant appears negative. What we want to do is
729 make the high-order word of the constant zero, not all ones. */
730
731 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
732 && GET_MODE_BITSIZE (mode) == HOST_BITS_PER_DOUBLE_INT
733 && CONST_INT_P (x) && INTVAL (x) < 0)
734 {
735 double_int val = double_int::from_uhwi (INTVAL (x));
736
737 /* We need to zero extend VAL. */
738 if (oldmode != VOIDmode)
739 val = val.zext (GET_MODE_BITSIZE (oldmode));
740
741 return immed_double_int_const (val, mode);
742 }
743
744 /* We can do this with a gen_lowpart if both desired and current modes
745 are integer, and this is either a constant integer, a register, or a
746 non-volatile MEM. Except for the constant case where MODE is no
747 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
748
749 if ((CONST_INT_P (x)
750 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
751 || (GET_MODE_CLASS (mode) == MODE_INT
752 && GET_MODE_CLASS (oldmode) == MODE_INT
753 && (CONST_DOUBLE_AS_INT_P (x)
754 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
755 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
756 && direct_load[(int) mode])
757 || (REG_P (x)
758 && (! HARD_REGISTER_P (x)
759 || HARD_REGNO_MODE_OK (REGNO (x), mode))
760 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
761 GET_MODE (x))))))))
762 {
763 /* ?? If we don't know OLDMODE, we have to assume here that
764 X does not need sign- or zero-extension. This may not be
765 the case, but it's the best we can do. */
766 if (CONST_INT_P (x) && oldmode != VOIDmode
767 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
768 {
769 HOST_WIDE_INT val = INTVAL (x);
770
771 /* We must sign or zero-extend in this case. Start by
772 zero-extending, then sign extend if we need to. */
773 val &= GET_MODE_MASK (oldmode);
774 if (! unsignedp
775 && val_signbit_known_set_p (oldmode, val))
776 val |= ~GET_MODE_MASK (oldmode);
777
778 return gen_int_mode (val, mode);
779 }
780
781 return gen_lowpart (mode, x);
782 }
783
784 /* Converting from integer constant into mode is always equivalent to an
785 subreg operation. */
786 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
787 {
788 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
789 return simplify_gen_subreg (mode, x, oldmode, 0);
790 }
791
792 temp = gen_reg_rtx (mode);
793 convert_move (temp, x, unsignedp);
794 return temp;
795 }
796 \f
797 /* Return the largest alignment we can use for doing a move (or store)
798 of MAX_PIECES. ALIGN is the largest alignment we could use. */
799
800 static unsigned int
801 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
802 {
803 enum machine_mode tmode;
804
805 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
806 if (align >= GET_MODE_ALIGNMENT (tmode))
807 align = GET_MODE_ALIGNMENT (tmode);
808 else
809 {
810 enum machine_mode tmode, xmode;
811
812 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
813 tmode != VOIDmode;
814 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
815 if (GET_MODE_SIZE (tmode) > max_pieces
816 || SLOW_UNALIGNED_ACCESS (tmode, align))
817 break;
818
819 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
820 }
821
822 return align;
823 }
824
825 /* Return the widest integer mode no wider than SIZE. If no such mode
826 can be found, return VOIDmode. */
827
828 static enum machine_mode
829 widest_int_mode_for_size (unsigned int size)
830 {
831 enum machine_mode tmode, mode = VOIDmode;
832
833 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
834 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
835 if (GET_MODE_SIZE (tmode) < size)
836 mode = tmode;
837
838 return mode;
839 }
840
841 /* STORE_MAX_PIECES is the number of bytes at a time that we can
842 store efficiently. Due to internal GCC limitations, this is
843 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
844 for an immediate constant. */
845
846 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
847
848 /* Determine whether the LEN bytes can be moved by using several move
849 instructions. Return nonzero if a call to move_by_pieces should
850 succeed. */
851
852 int
853 can_move_by_pieces (unsigned HOST_WIDE_INT len ATTRIBUTE_UNUSED,
854 unsigned int align ATTRIBUTE_UNUSED)
855 {
856 return MOVE_BY_PIECES_P (len, align);
857 }
858
859 /* Generate several move instructions to copy LEN bytes from block FROM to
860 block TO. (These are MEM rtx's with BLKmode).
861
862 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
863 used to push FROM to the stack.
864
865 ALIGN is maximum stack alignment we can assume.
866
867 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
868 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
869 stpcpy. */
870
871 rtx
872 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
873 unsigned int align, int endp)
874 {
875 struct move_by_pieces_d data;
876 enum machine_mode to_addr_mode;
877 enum machine_mode from_addr_mode = get_address_mode (from);
878 rtx to_addr, from_addr = XEXP (from, 0);
879 unsigned int max_size = MOVE_MAX_PIECES + 1;
880 enum insn_code icode;
881
882 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
883
884 data.offset = 0;
885 data.from_addr = from_addr;
886 if (to)
887 {
888 to_addr_mode = get_address_mode (to);
889 to_addr = XEXP (to, 0);
890 data.to = to;
891 data.autinc_to
892 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
893 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
894 data.reverse
895 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
896 }
897 else
898 {
899 to_addr_mode = VOIDmode;
900 to_addr = NULL_RTX;
901 data.to = NULL_RTX;
902 data.autinc_to = 1;
903 #ifdef STACK_GROWS_DOWNWARD
904 data.reverse = 1;
905 #else
906 data.reverse = 0;
907 #endif
908 }
909 data.to_addr = to_addr;
910 data.from = from;
911 data.autinc_from
912 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
913 || GET_CODE (from_addr) == POST_INC
914 || GET_CODE (from_addr) == POST_DEC);
915
916 data.explicit_inc_from = 0;
917 data.explicit_inc_to = 0;
918 if (data.reverse) data.offset = len;
919 data.len = len;
920
921 /* If copying requires more than two move insns,
922 copy addresses to registers (to make displacements shorter)
923 and use post-increment if available. */
924 if (!(data.autinc_from && data.autinc_to)
925 && move_by_pieces_ninsns (len, align, max_size) > 2)
926 {
927 /* Find the mode of the largest move...
928 MODE might not be used depending on the definitions of the
929 USE_* macros below. */
930 enum machine_mode mode ATTRIBUTE_UNUSED
931 = widest_int_mode_for_size (max_size);
932
933 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
934 {
935 data.from_addr = copy_to_mode_reg (from_addr_mode,
936 plus_constant (from_addr_mode,
937 from_addr, len));
938 data.autinc_from = 1;
939 data.explicit_inc_from = -1;
940 }
941 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
942 {
943 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
944 data.autinc_from = 1;
945 data.explicit_inc_from = 1;
946 }
947 if (!data.autinc_from && CONSTANT_P (from_addr))
948 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
949 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
950 {
951 data.to_addr = copy_to_mode_reg (to_addr_mode,
952 plus_constant (to_addr_mode,
953 to_addr, len));
954 data.autinc_to = 1;
955 data.explicit_inc_to = -1;
956 }
957 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
958 {
959 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
960 data.autinc_to = 1;
961 data.explicit_inc_to = 1;
962 }
963 if (!data.autinc_to && CONSTANT_P (to_addr))
964 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
965 }
966
967 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
968
969 /* First move what we can in the largest integer mode, then go to
970 successively smaller modes. */
971
972 while (max_size > 1 && data.len > 0)
973 {
974 enum machine_mode mode = widest_int_mode_for_size (max_size);
975
976 if (mode == VOIDmode)
977 break;
978
979 icode = optab_handler (mov_optab, mode);
980 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
981 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
982
983 max_size = GET_MODE_SIZE (mode);
984 }
985
986 /* The code above should have handled everything. */
987 gcc_assert (!data.len);
988
989 if (endp)
990 {
991 rtx to1;
992
993 gcc_assert (!data.reverse);
994 if (data.autinc_to)
995 {
996 if (endp == 2)
997 {
998 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
999 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
1000 else
1001 data.to_addr = copy_to_mode_reg (to_addr_mode,
1002 plus_constant (to_addr_mode,
1003 data.to_addr,
1004 -1));
1005 }
1006 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
1007 data.offset);
1008 }
1009 else
1010 {
1011 if (endp == 2)
1012 --data.offset;
1013 to1 = adjust_address (data.to, QImode, data.offset);
1014 }
1015 return to1;
1016 }
1017 else
1018 return data.to;
1019 }
1020
1021 /* Return number of insns required to move L bytes by pieces.
1022 ALIGN (in bits) is maximum alignment we can assume. */
1023
1024 unsigned HOST_WIDE_INT
1025 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1026 unsigned int max_size)
1027 {
1028 unsigned HOST_WIDE_INT n_insns = 0;
1029
1030 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1031
1032 while (max_size > 1 && l > 0)
1033 {
1034 enum machine_mode mode;
1035 enum insn_code icode;
1036
1037 mode = widest_int_mode_for_size (max_size);
1038
1039 if (mode == VOIDmode)
1040 break;
1041
1042 icode = optab_handler (mov_optab, mode);
1043 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1044 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1045
1046 max_size = GET_MODE_SIZE (mode);
1047 }
1048
1049 gcc_assert (!l);
1050 return n_insns;
1051 }
1052
1053 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1054 with move instructions for mode MODE. GENFUN is the gen_... function
1055 to make a move insn for that mode. DATA has all the other info. */
1056
1057 static void
1058 move_by_pieces_1 (insn_gen_fn genfun, machine_mode mode,
1059 struct move_by_pieces_d *data)
1060 {
1061 unsigned int size = GET_MODE_SIZE (mode);
1062 rtx to1 = NULL_RTX, from1;
1063
1064 while (data->len >= size)
1065 {
1066 if (data->reverse)
1067 data->offset -= size;
1068
1069 if (data->to)
1070 {
1071 if (data->autinc_to)
1072 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1073 data->offset);
1074 else
1075 to1 = adjust_address (data->to, mode, data->offset);
1076 }
1077
1078 if (data->autinc_from)
1079 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1080 data->offset);
1081 else
1082 from1 = adjust_address (data->from, mode, data->offset);
1083
1084 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1085 emit_insn (gen_add2_insn (data->to_addr,
1086 gen_int_mode (-(HOST_WIDE_INT) size,
1087 GET_MODE (data->to_addr))));
1088 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1089 emit_insn (gen_add2_insn (data->from_addr,
1090 gen_int_mode (-(HOST_WIDE_INT) size,
1091 GET_MODE (data->from_addr))));
1092
1093 if (data->to)
1094 emit_insn ((*genfun) (to1, from1));
1095 else
1096 {
1097 #ifdef PUSH_ROUNDING
1098 emit_single_push_insn (mode, from1, NULL);
1099 #else
1100 gcc_unreachable ();
1101 #endif
1102 }
1103
1104 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1105 emit_insn (gen_add2_insn (data->to_addr,
1106 gen_int_mode (size,
1107 GET_MODE (data->to_addr))));
1108 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1109 emit_insn (gen_add2_insn (data->from_addr,
1110 gen_int_mode (size,
1111 GET_MODE (data->from_addr))));
1112
1113 if (! data->reverse)
1114 data->offset += size;
1115
1116 data->len -= size;
1117 }
1118 }
1119 \f
1120 /* Emit code to move a block Y to a block X. This may be done with
1121 string-move instructions, with multiple scalar move instructions,
1122 or with a library call.
1123
1124 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1125 SIZE is an rtx that says how long they are.
1126 ALIGN is the maximum alignment we can assume they have.
1127 METHOD describes what kind of copy this is, and what mechanisms may be used.
1128 MIN_SIZE is the minimal size of block to move
1129 MAX_SIZE is the maximal size of block to move, if it can not be represented
1130 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1131
1132 Return the address of the new block, if memcpy is called and returns it,
1133 0 otherwise. */
1134
1135 rtx
1136 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1137 unsigned int expected_align, HOST_WIDE_INT expected_size,
1138 unsigned HOST_WIDE_INT min_size,
1139 unsigned HOST_WIDE_INT max_size,
1140 unsigned HOST_WIDE_INT probable_max_size)
1141 {
1142 bool may_use_call;
1143 rtx retval = 0;
1144 unsigned int align;
1145
1146 gcc_assert (size);
1147 if (CONST_INT_P (size)
1148 && INTVAL (size) == 0)
1149 return 0;
1150
1151 switch (method)
1152 {
1153 case BLOCK_OP_NORMAL:
1154 case BLOCK_OP_TAILCALL:
1155 may_use_call = true;
1156 break;
1157
1158 case BLOCK_OP_CALL_PARM:
1159 may_use_call = block_move_libcall_safe_for_call_parm ();
1160
1161 /* Make inhibit_defer_pop nonzero around the library call
1162 to force it to pop the arguments right away. */
1163 NO_DEFER_POP;
1164 break;
1165
1166 case BLOCK_OP_NO_LIBCALL:
1167 may_use_call = false;
1168 break;
1169
1170 default:
1171 gcc_unreachable ();
1172 }
1173
1174 gcc_assert (MEM_P (x) && MEM_P (y));
1175 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1176 gcc_assert (align >= BITS_PER_UNIT);
1177
1178 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1179 block copy is more efficient for other large modes, e.g. DCmode. */
1180 x = adjust_address (x, BLKmode, 0);
1181 y = adjust_address (y, BLKmode, 0);
1182
1183 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1184 can be incorrect is coming from __builtin_memcpy. */
1185 if (CONST_INT_P (size))
1186 {
1187 x = shallow_copy_rtx (x);
1188 y = shallow_copy_rtx (y);
1189 set_mem_size (x, INTVAL (size));
1190 set_mem_size (y, INTVAL (size));
1191 }
1192
1193 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1194 move_by_pieces (x, y, INTVAL (size), align, 0);
1195 else if (emit_block_move_via_movmem (x, y, size, align,
1196 expected_align, expected_size,
1197 min_size, max_size, probable_max_size))
1198 ;
1199 else if (may_use_call
1200 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1201 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1202 {
1203 /* Since x and y are passed to a libcall, mark the corresponding
1204 tree EXPR as addressable. */
1205 tree y_expr = MEM_EXPR (y);
1206 tree x_expr = MEM_EXPR (x);
1207 if (y_expr)
1208 mark_addressable (y_expr);
1209 if (x_expr)
1210 mark_addressable (x_expr);
1211 retval = emit_block_move_via_libcall (x, y, size,
1212 method == BLOCK_OP_TAILCALL);
1213 }
1214
1215 else
1216 emit_block_move_via_loop (x, y, size, align);
1217
1218 if (method == BLOCK_OP_CALL_PARM)
1219 OK_DEFER_POP;
1220
1221 return retval;
1222 }
1223
1224 rtx
1225 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1226 {
1227 unsigned HOST_WIDE_INT max, min = 0;
1228 if (GET_CODE (size) == CONST_INT)
1229 min = max = UINTVAL (size);
1230 else
1231 max = GET_MODE_MASK (GET_MODE (size));
1232 return emit_block_move_hints (x, y, size, method, 0, -1,
1233 min, max, max);
1234 }
1235
1236 /* A subroutine of emit_block_move. Returns true if calling the
1237 block move libcall will not clobber any parameters which may have
1238 already been placed on the stack. */
1239
1240 static bool
1241 block_move_libcall_safe_for_call_parm (void)
1242 {
1243 #if defined (REG_PARM_STACK_SPACE)
1244 tree fn;
1245 #endif
1246
1247 /* If arguments are pushed on the stack, then they're safe. */
1248 if (PUSH_ARGS)
1249 return true;
1250
1251 /* If registers go on the stack anyway, any argument is sure to clobber
1252 an outgoing argument. */
1253 #if defined (REG_PARM_STACK_SPACE)
1254 fn = emit_block_move_libcall_fn (false);
1255 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1256 depend on its argument. */
1257 (void) fn;
1258 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1259 && REG_PARM_STACK_SPACE (fn) != 0)
1260 return false;
1261 #endif
1262
1263 /* If any argument goes in memory, then it might clobber an outgoing
1264 argument. */
1265 {
1266 CUMULATIVE_ARGS args_so_far_v;
1267 cumulative_args_t args_so_far;
1268 tree fn, arg;
1269
1270 fn = emit_block_move_libcall_fn (false);
1271 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1272 args_so_far = pack_cumulative_args (&args_so_far_v);
1273
1274 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1275 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1276 {
1277 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1278 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1279 NULL_TREE, true);
1280 if (!tmp || !REG_P (tmp))
1281 return false;
1282 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1283 return false;
1284 targetm.calls.function_arg_advance (args_so_far, mode,
1285 NULL_TREE, true);
1286 }
1287 }
1288 return true;
1289 }
1290
1291 /* A subroutine of emit_block_move. Expand a movmem pattern;
1292 return true if successful. */
1293
1294 static bool
1295 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1296 unsigned int expected_align, HOST_WIDE_INT expected_size,
1297 unsigned HOST_WIDE_INT min_size,
1298 unsigned HOST_WIDE_INT max_size,
1299 unsigned HOST_WIDE_INT probable_max_size)
1300 {
1301 int save_volatile_ok = volatile_ok;
1302 enum machine_mode mode;
1303
1304 if (expected_align < align)
1305 expected_align = align;
1306 if (expected_size != -1)
1307 {
1308 if ((unsigned HOST_WIDE_INT)expected_size > probable_max_size)
1309 expected_size = probable_max_size;
1310 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
1311 expected_size = min_size;
1312 }
1313
1314 /* Since this is a move insn, we don't care about volatility. */
1315 volatile_ok = 1;
1316
1317 /* Try the most limited insn first, because there's no point
1318 including more than one in the machine description unless
1319 the more limited one has some advantage. */
1320
1321 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1322 mode = GET_MODE_WIDER_MODE (mode))
1323 {
1324 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1325
1326 if (code != CODE_FOR_nothing
1327 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1328 here because if SIZE is less than the mode mask, as it is
1329 returned by the macro, it will definitely be less than the
1330 actual mode mask. Since SIZE is within the Pmode address
1331 space, we limit MODE to Pmode. */
1332 && ((CONST_INT_P (size)
1333 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1334 <= (GET_MODE_MASK (mode) >> 1)))
1335 || max_size <= (GET_MODE_MASK (mode) >> 1)
1336 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
1337 {
1338 struct expand_operand ops[9];
1339 unsigned int nops;
1340
1341 /* ??? When called via emit_block_move_for_call, it'd be
1342 nice if there were some way to inform the backend, so
1343 that it doesn't fail the expansion because it thinks
1344 emitting the libcall would be more efficient. */
1345 nops = insn_data[(int) code].n_generator_args;
1346 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
1347
1348 create_fixed_operand (&ops[0], x);
1349 create_fixed_operand (&ops[1], y);
1350 /* The check above guarantees that this size conversion is valid. */
1351 create_convert_operand_to (&ops[2], size, mode, true);
1352 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1353 if (nops >= 6)
1354 {
1355 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1356 create_integer_operand (&ops[5], expected_size);
1357 }
1358 if (nops >= 8)
1359 {
1360 create_integer_operand (&ops[6], min_size);
1361 /* If we can not represent the maximal size,
1362 make parameter NULL. */
1363 if ((HOST_WIDE_INT) max_size != -1)
1364 create_integer_operand (&ops[7], max_size);
1365 else
1366 create_fixed_operand (&ops[7], NULL);
1367 }
1368 if (nops == 9)
1369 {
1370 /* If we can not represent the maximal size,
1371 make parameter NULL. */
1372 if ((HOST_WIDE_INT) probable_max_size != -1)
1373 create_integer_operand (&ops[8], probable_max_size);
1374 else
1375 create_fixed_operand (&ops[8], NULL);
1376 }
1377 if (maybe_expand_insn (code, nops, ops))
1378 {
1379 volatile_ok = save_volatile_ok;
1380 return true;
1381 }
1382 }
1383 }
1384
1385 volatile_ok = save_volatile_ok;
1386 return false;
1387 }
1388
1389 /* A subroutine of emit_block_move. Expand a call to memcpy.
1390 Return the return value from memcpy, 0 otherwise. */
1391
1392 rtx
1393 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1394 {
1395 rtx dst_addr, src_addr;
1396 tree call_expr, fn, src_tree, dst_tree, size_tree;
1397 enum machine_mode size_mode;
1398 rtx retval;
1399
1400 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1401 pseudos. We can then place those new pseudos into a VAR_DECL and
1402 use them later. */
1403
1404 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1405 src_addr = copy_addr_to_reg (XEXP (src, 0));
1406
1407 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1408 src_addr = convert_memory_address (ptr_mode, src_addr);
1409
1410 dst_tree = make_tree (ptr_type_node, dst_addr);
1411 src_tree = make_tree (ptr_type_node, src_addr);
1412
1413 size_mode = TYPE_MODE (sizetype);
1414
1415 size = convert_to_mode (size_mode, size, 1);
1416 size = copy_to_mode_reg (size_mode, size);
1417
1418 /* It is incorrect to use the libcall calling conventions to call
1419 memcpy in this context. This could be a user call to memcpy and
1420 the user may wish to examine the return value from memcpy. For
1421 targets where libcalls and normal calls have different conventions
1422 for returning pointers, we could end up generating incorrect code. */
1423
1424 size_tree = make_tree (sizetype, size);
1425
1426 fn = emit_block_move_libcall_fn (true);
1427 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1428 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1429
1430 retval = expand_normal (call_expr);
1431
1432 return retval;
1433 }
1434
1435 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1436 for the function we use for block copies. */
1437
1438 static GTY(()) tree block_move_fn;
1439
1440 void
1441 init_block_move_fn (const char *asmspec)
1442 {
1443 if (!block_move_fn)
1444 {
1445 tree args, fn, attrs, attr_args;
1446
1447 fn = get_identifier ("memcpy");
1448 args = build_function_type_list (ptr_type_node, ptr_type_node,
1449 const_ptr_type_node, sizetype,
1450 NULL_TREE);
1451
1452 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1453 DECL_EXTERNAL (fn) = 1;
1454 TREE_PUBLIC (fn) = 1;
1455 DECL_ARTIFICIAL (fn) = 1;
1456 TREE_NOTHROW (fn) = 1;
1457 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1458 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1459
1460 attr_args = build_tree_list (NULL_TREE, build_string (1, "1"));
1461 attrs = tree_cons (get_identifier ("fn spec"), attr_args, NULL);
1462
1463 decl_attributes (&fn, attrs, ATTR_FLAG_BUILT_IN);
1464
1465 block_move_fn = fn;
1466 }
1467
1468 if (asmspec)
1469 set_user_assembler_name (block_move_fn, asmspec);
1470 }
1471
1472 static tree
1473 emit_block_move_libcall_fn (int for_call)
1474 {
1475 static bool emitted_extern;
1476
1477 if (!block_move_fn)
1478 init_block_move_fn (NULL);
1479
1480 if (for_call && !emitted_extern)
1481 {
1482 emitted_extern = true;
1483 make_decl_rtl (block_move_fn);
1484 }
1485
1486 return block_move_fn;
1487 }
1488
1489 /* A subroutine of emit_block_move. Copy the data via an explicit
1490 loop. This is used only when libcalls are forbidden. */
1491 /* ??? It'd be nice to copy in hunks larger than QImode. */
1492
1493 static void
1494 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1495 unsigned int align ATTRIBUTE_UNUSED)
1496 {
1497 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1498 enum machine_mode x_addr_mode = get_address_mode (x);
1499 enum machine_mode y_addr_mode = get_address_mode (y);
1500 enum machine_mode iter_mode;
1501
1502 iter_mode = GET_MODE (size);
1503 if (iter_mode == VOIDmode)
1504 iter_mode = word_mode;
1505
1506 top_label = gen_label_rtx ();
1507 cmp_label = gen_label_rtx ();
1508 iter = gen_reg_rtx (iter_mode);
1509
1510 emit_move_insn (iter, const0_rtx);
1511
1512 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1513 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1514 do_pending_stack_adjust ();
1515
1516 emit_jump (cmp_label);
1517 emit_label (top_label);
1518
1519 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1520 x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp);
1521
1522 if (x_addr_mode != y_addr_mode)
1523 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1524 y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp);
1525
1526 x = change_address (x, QImode, x_addr);
1527 y = change_address (y, QImode, y_addr);
1528
1529 emit_move_insn (x, y);
1530
1531 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1532 true, OPTAB_LIB_WIDEN);
1533 if (tmp != iter)
1534 emit_move_insn (iter, tmp);
1535
1536 emit_label (cmp_label);
1537
1538 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1539 true, top_label, REG_BR_PROB_BASE * 90 / 100);
1540 }
1541 \f
1542 /* Copy all or part of a value X into registers starting at REGNO.
1543 The number of registers to be filled is NREGS. */
1544
1545 void
1546 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1547 {
1548 int i;
1549 #ifdef HAVE_load_multiple
1550 rtx pat;
1551 rtx last;
1552 #endif
1553
1554 if (nregs == 0)
1555 return;
1556
1557 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1558 x = validize_mem (force_const_mem (mode, x));
1559
1560 /* See if the machine can do this with a load multiple insn. */
1561 #ifdef HAVE_load_multiple
1562 if (HAVE_load_multiple)
1563 {
1564 last = get_last_insn ();
1565 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1566 GEN_INT (nregs));
1567 if (pat)
1568 {
1569 emit_insn (pat);
1570 return;
1571 }
1572 else
1573 delete_insns_since (last);
1574 }
1575 #endif
1576
1577 for (i = 0; i < nregs; i++)
1578 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1579 operand_subword_force (x, i, mode));
1580 }
1581
1582 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1583 The number of registers to be filled is NREGS. */
1584
1585 void
1586 move_block_from_reg (int regno, rtx x, int nregs)
1587 {
1588 int i;
1589
1590 if (nregs == 0)
1591 return;
1592
1593 /* See if the machine can do this with a store multiple insn. */
1594 #ifdef HAVE_store_multiple
1595 if (HAVE_store_multiple)
1596 {
1597 rtx last = get_last_insn ();
1598 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1599 GEN_INT (nregs));
1600 if (pat)
1601 {
1602 emit_insn (pat);
1603 return;
1604 }
1605 else
1606 delete_insns_since (last);
1607 }
1608 #endif
1609
1610 for (i = 0; i < nregs; i++)
1611 {
1612 rtx tem = operand_subword (x, i, 1, BLKmode);
1613
1614 gcc_assert (tem);
1615
1616 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1617 }
1618 }
1619
1620 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1621 ORIG, where ORIG is a non-consecutive group of registers represented by
1622 a PARALLEL. The clone is identical to the original except in that the
1623 original set of registers is replaced by a new set of pseudo registers.
1624 The new set has the same modes as the original set. */
1625
1626 rtx
1627 gen_group_rtx (rtx orig)
1628 {
1629 int i, length;
1630 rtx *tmps;
1631
1632 gcc_assert (GET_CODE (orig) == PARALLEL);
1633
1634 length = XVECLEN (orig, 0);
1635 tmps = XALLOCAVEC (rtx, length);
1636
1637 /* Skip a NULL entry in first slot. */
1638 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1639
1640 if (i)
1641 tmps[0] = 0;
1642
1643 for (; i < length; i++)
1644 {
1645 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1646 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1647
1648 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1649 }
1650
1651 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1652 }
1653
1654 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1655 except that values are placed in TMPS[i], and must later be moved
1656 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1657
1658 static void
1659 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1660 {
1661 rtx src;
1662 int start, i;
1663 enum machine_mode m = GET_MODE (orig_src);
1664
1665 gcc_assert (GET_CODE (dst) == PARALLEL);
1666
1667 if (m != VOIDmode
1668 && !SCALAR_INT_MODE_P (m)
1669 && !MEM_P (orig_src)
1670 && GET_CODE (orig_src) != CONCAT)
1671 {
1672 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1673 if (imode == BLKmode)
1674 src = assign_stack_temp (GET_MODE (orig_src), ssize);
1675 else
1676 src = gen_reg_rtx (imode);
1677 if (imode != BLKmode)
1678 src = gen_lowpart (GET_MODE (orig_src), src);
1679 emit_move_insn (src, orig_src);
1680 /* ...and back again. */
1681 if (imode != BLKmode)
1682 src = gen_lowpart (imode, src);
1683 emit_group_load_1 (tmps, dst, src, type, ssize);
1684 return;
1685 }
1686
1687 /* Check for a NULL entry, used to indicate that the parameter goes
1688 both on the stack and in registers. */
1689 if (XEXP (XVECEXP (dst, 0, 0), 0))
1690 start = 0;
1691 else
1692 start = 1;
1693
1694 /* Process the pieces. */
1695 for (i = start; i < XVECLEN (dst, 0); i++)
1696 {
1697 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1698 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1699 unsigned int bytelen = GET_MODE_SIZE (mode);
1700 int shift = 0;
1701
1702 /* Handle trailing fragments that run over the size of the struct. */
1703 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1704 {
1705 /* Arrange to shift the fragment to where it belongs.
1706 extract_bit_field loads to the lsb of the reg. */
1707 if (
1708 #ifdef BLOCK_REG_PADDING
1709 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1710 == (BYTES_BIG_ENDIAN ? upward : downward)
1711 #else
1712 BYTES_BIG_ENDIAN
1713 #endif
1714 )
1715 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1716 bytelen = ssize - bytepos;
1717 gcc_assert (bytelen > 0);
1718 }
1719
1720 /* If we won't be loading directly from memory, protect the real source
1721 from strange tricks we might play; but make sure that the source can
1722 be loaded directly into the destination. */
1723 src = orig_src;
1724 if (!MEM_P (orig_src)
1725 && (!CONSTANT_P (orig_src)
1726 || (GET_MODE (orig_src) != mode
1727 && GET_MODE (orig_src) != VOIDmode)))
1728 {
1729 if (GET_MODE (orig_src) == VOIDmode)
1730 src = gen_reg_rtx (mode);
1731 else
1732 src = gen_reg_rtx (GET_MODE (orig_src));
1733
1734 emit_move_insn (src, orig_src);
1735 }
1736
1737 /* Optimize the access just a bit. */
1738 if (MEM_P (src)
1739 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1740 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1741 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1742 && bytelen == GET_MODE_SIZE (mode))
1743 {
1744 tmps[i] = gen_reg_rtx (mode);
1745 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1746 }
1747 else if (COMPLEX_MODE_P (mode)
1748 && GET_MODE (src) == mode
1749 && bytelen == GET_MODE_SIZE (mode))
1750 /* Let emit_move_complex do the bulk of the work. */
1751 tmps[i] = src;
1752 else if (GET_CODE (src) == CONCAT)
1753 {
1754 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1755 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1756
1757 if ((bytepos == 0 && bytelen == slen0)
1758 || (bytepos != 0 && bytepos + bytelen <= slen))
1759 {
1760 /* The following assumes that the concatenated objects all
1761 have the same size. In this case, a simple calculation
1762 can be used to determine the object and the bit field
1763 to be extracted. */
1764 tmps[i] = XEXP (src, bytepos / slen0);
1765 if (! CONSTANT_P (tmps[i])
1766 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1767 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1768 (bytepos % slen0) * BITS_PER_UNIT,
1769 1, NULL_RTX, mode, mode);
1770 }
1771 else
1772 {
1773 rtx mem;
1774
1775 gcc_assert (!bytepos);
1776 mem = assign_stack_temp (GET_MODE (src), slen);
1777 emit_move_insn (mem, src);
1778 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1779 0, 1, NULL_RTX, mode, mode);
1780 }
1781 }
1782 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1783 SIMD register, which is currently broken. While we get GCC
1784 to emit proper RTL for these cases, let's dump to memory. */
1785 else if (VECTOR_MODE_P (GET_MODE (dst))
1786 && REG_P (src))
1787 {
1788 int slen = GET_MODE_SIZE (GET_MODE (src));
1789 rtx mem;
1790
1791 mem = assign_stack_temp (GET_MODE (src), slen);
1792 emit_move_insn (mem, src);
1793 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1794 }
1795 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1796 && XVECLEN (dst, 0) > 1)
1797 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE (dst), bytepos);
1798 else if (CONSTANT_P (src))
1799 {
1800 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1801
1802 if (len == ssize)
1803 tmps[i] = src;
1804 else
1805 {
1806 rtx first, second;
1807
1808 gcc_assert (2 * len == ssize);
1809 split_double (src, &first, &second);
1810 if (i)
1811 tmps[i] = second;
1812 else
1813 tmps[i] = first;
1814 }
1815 }
1816 else if (REG_P (src) && GET_MODE (src) == mode)
1817 tmps[i] = src;
1818 else
1819 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1820 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
1821 mode, mode);
1822
1823 if (shift)
1824 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1825 shift, tmps[i], 0);
1826 }
1827 }
1828
1829 /* Emit code to move a block SRC of type TYPE to a block DST,
1830 where DST is non-consecutive registers represented by a PARALLEL.
1831 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1832 if not known. */
1833
1834 void
1835 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1836 {
1837 rtx *tmps;
1838 int i;
1839
1840 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1841 emit_group_load_1 (tmps, dst, src, type, ssize);
1842
1843 /* Copy the extracted pieces into the proper (probable) hard regs. */
1844 for (i = 0; i < XVECLEN (dst, 0); i++)
1845 {
1846 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1847 if (d == NULL)
1848 continue;
1849 emit_move_insn (d, tmps[i]);
1850 }
1851 }
1852
1853 /* Similar, but load SRC into new pseudos in a format that looks like
1854 PARALLEL. This can later be fed to emit_group_move to get things
1855 in the right place. */
1856
1857 rtx
1858 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1859 {
1860 rtvec vec;
1861 int i;
1862
1863 vec = rtvec_alloc (XVECLEN (parallel, 0));
1864 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1865
1866 /* Convert the vector to look just like the original PARALLEL, except
1867 with the computed values. */
1868 for (i = 0; i < XVECLEN (parallel, 0); i++)
1869 {
1870 rtx e = XVECEXP (parallel, 0, i);
1871 rtx d = XEXP (e, 0);
1872
1873 if (d)
1874 {
1875 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1876 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1877 }
1878 RTVEC_ELT (vec, i) = e;
1879 }
1880
1881 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1882 }
1883
1884 /* Emit code to move a block SRC to block DST, where SRC and DST are
1885 non-consecutive groups of registers, each represented by a PARALLEL. */
1886
1887 void
1888 emit_group_move (rtx dst, rtx src)
1889 {
1890 int i;
1891
1892 gcc_assert (GET_CODE (src) == PARALLEL
1893 && GET_CODE (dst) == PARALLEL
1894 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1895
1896 /* Skip first entry if NULL. */
1897 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1898 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1899 XEXP (XVECEXP (src, 0, i), 0));
1900 }
1901
1902 /* Move a group of registers represented by a PARALLEL into pseudos. */
1903
1904 rtx
1905 emit_group_move_into_temps (rtx src)
1906 {
1907 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1908 int i;
1909
1910 for (i = 0; i < XVECLEN (src, 0); i++)
1911 {
1912 rtx e = XVECEXP (src, 0, i);
1913 rtx d = XEXP (e, 0);
1914
1915 if (d)
1916 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1917 RTVEC_ELT (vec, i) = e;
1918 }
1919
1920 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1921 }
1922
1923 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1924 where SRC is non-consecutive registers represented by a PARALLEL.
1925 SSIZE represents the total size of block ORIG_DST, or -1 if not
1926 known. */
1927
1928 void
1929 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1930 {
1931 rtx *tmps, dst;
1932 int start, finish, i;
1933 enum machine_mode m = GET_MODE (orig_dst);
1934
1935 gcc_assert (GET_CODE (src) == PARALLEL);
1936
1937 if (!SCALAR_INT_MODE_P (m)
1938 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1939 {
1940 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1941 if (imode == BLKmode)
1942 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
1943 else
1944 dst = gen_reg_rtx (imode);
1945 emit_group_store (dst, src, type, ssize);
1946 if (imode != BLKmode)
1947 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1948 emit_move_insn (orig_dst, dst);
1949 return;
1950 }
1951
1952 /* Check for a NULL entry, used to indicate that the parameter goes
1953 both on the stack and in registers. */
1954 if (XEXP (XVECEXP (src, 0, 0), 0))
1955 start = 0;
1956 else
1957 start = 1;
1958 finish = XVECLEN (src, 0);
1959
1960 tmps = XALLOCAVEC (rtx, finish);
1961
1962 /* Copy the (probable) hard regs into pseudos. */
1963 for (i = start; i < finish; i++)
1964 {
1965 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1966 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1967 {
1968 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1969 emit_move_insn (tmps[i], reg);
1970 }
1971 else
1972 tmps[i] = reg;
1973 }
1974
1975 /* If we won't be storing directly into memory, protect the real destination
1976 from strange tricks we might play. */
1977 dst = orig_dst;
1978 if (GET_CODE (dst) == PARALLEL)
1979 {
1980 rtx temp;
1981
1982 /* We can get a PARALLEL dst if there is a conditional expression in
1983 a return statement. In that case, the dst and src are the same,
1984 so no action is necessary. */
1985 if (rtx_equal_p (dst, src))
1986 return;
1987
1988 /* It is unclear if we can ever reach here, but we may as well handle
1989 it. Allocate a temporary, and split this into a store/load to/from
1990 the temporary. */
1991
1992 temp = assign_stack_temp (GET_MODE (dst), ssize);
1993 emit_group_store (temp, src, type, ssize);
1994 emit_group_load (dst, temp, type, ssize);
1995 return;
1996 }
1997 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1998 {
1999 enum machine_mode outer = GET_MODE (dst);
2000 enum machine_mode inner;
2001 HOST_WIDE_INT bytepos;
2002 bool done = false;
2003 rtx temp;
2004
2005 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
2006 dst = gen_reg_rtx (outer);
2007
2008 /* Make life a bit easier for combine. */
2009 /* If the first element of the vector is the low part
2010 of the destination mode, use a paradoxical subreg to
2011 initialize the destination. */
2012 if (start < finish)
2013 {
2014 inner = GET_MODE (tmps[start]);
2015 bytepos = subreg_lowpart_offset (inner, outer);
2016 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
2017 {
2018 temp = simplify_gen_subreg (outer, tmps[start],
2019 inner, 0);
2020 if (temp)
2021 {
2022 emit_move_insn (dst, temp);
2023 done = true;
2024 start++;
2025 }
2026 }
2027 }
2028
2029 /* If the first element wasn't the low part, try the last. */
2030 if (!done
2031 && start < finish - 1)
2032 {
2033 inner = GET_MODE (tmps[finish - 1]);
2034 bytepos = subreg_lowpart_offset (inner, outer);
2035 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
2036 {
2037 temp = simplify_gen_subreg (outer, tmps[finish - 1],
2038 inner, 0);
2039 if (temp)
2040 {
2041 emit_move_insn (dst, temp);
2042 done = true;
2043 finish--;
2044 }
2045 }
2046 }
2047
2048 /* Otherwise, simply initialize the result to zero. */
2049 if (!done)
2050 emit_move_insn (dst, CONST0_RTX (outer));
2051 }
2052
2053 /* Process the pieces. */
2054 for (i = start; i < finish; i++)
2055 {
2056 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2057 enum machine_mode mode = GET_MODE (tmps[i]);
2058 unsigned int bytelen = GET_MODE_SIZE (mode);
2059 unsigned int adj_bytelen = bytelen;
2060 rtx dest = dst;
2061
2062 /* Handle trailing fragments that run over the size of the struct. */
2063 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2064 adj_bytelen = ssize - bytepos;
2065
2066 if (GET_CODE (dst) == CONCAT)
2067 {
2068 if (bytepos + adj_bytelen
2069 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2070 dest = XEXP (dst, 0);
2071 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2072 {
2073 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2074 dest = XEXP (dst, 1);
2075 }
2076 else
2077 {
2078 enum machine_mode dest_mode = GET_MODE (dest);
2079 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2080
2081 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2082
2083 if (GET_MODE_ALIGNMENT (dest_mode)
2084 >= GET_MODE_ALIGNMENT (tmp_mode))
2085 {
2086 dest = assign_stack_temp (dest_mode,
2087 GET_MODE_SIZE (dest_mode));
2088 emit_move_insn (adjust_address (dest,
2089 tmp_mode,
2090 bytepos),
2091 tmps[i]);
2092 dst = dest;
2093 }
2094 else
2095 {
2096 dest = assign_stack_temp (tmp_mode,
2097 GET_MODE_SIZE (tmp_mode));
2098 emit_move_insn (dest, tmps[i]);
2099 dst = adjust_address (dest, dest_mode, bytepos);
2100 }
2101 break;
2102 }
2103 }
2104
2105 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2106 {
2107 /* store_bit_field always takes its value from the lsb.
2108 Move the fragment to the lsb if it's not already there. */
2109 if (
2110 #ifdef BLOCK_REG_PADDING
2111 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2112 == (BYTES_BIG_ENDIAN ? upward : downward)
2113 #else
2114 BYTES_BIG_ENDIAN
2115 #endif
2116 )
2117 {
2118 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2119 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2120 shift, tmps[i], 0);
2121 }
2122 bytelen = adj_bytelen;
2123 }
2124
2125 /* Optimize the access just a bit. */
2126 if (MEM_P (dest)
2127 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2128 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2129 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2130 && bytelen == GET_MODE_SIZE (mode))
2131 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2132 else
2133 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2134 0, 0, mode, tmps[i]);
2135 }
2136
2137 /* Copy from the pseudo into the (probable) hard reg. */
2138 if (orig_dst != dst)
2139 emit_move_insn (orig_dst, dst);
2140 }
2141
2142 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2143 of the value stored in X. */
2144
2145 rtx
2146 maybe_emit_group_store (rtx x, tree type)
2147 {
2148 enum machine_mode mode = TYPE_MODE (type);
2149 gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode);
2150 if (GET_CODE (x) == PARALLEL)
2151 {
2152 rtx result = gen_reg_rtx (mode);
2153 emit_group_store (result, x, type, int_size_in_bytes (type));
2154 return result;
2155 }
2156 return x;
2157 }
2158
2159 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2160
2161 This is used on targets that return BLKmode values in registers. */
2162
2163 void
2164 copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
2165 {
2166 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2167 rtx src = NULL, dst = NULL;
2168 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2169 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2170 enum machine_mode mode = GET_MODE (srcreg);
2171 enum machine_mode tmode = GET_MODE (target);
2172 enum machine_mode copy_mode;
2173
2174 /* BLKmode registers created in the back-end shouldn't have survived. */
2175 gcc_assert (mode != BLKmode);
2176
2177 /* If the structure doesn't take up a whole number of words, see whether
2178 SRCREG is padded on the left or on the right. If it's on the left,
2179 set PADDING_CORRECTION to the number of bits to skip.
2180
2181 In most ABIs, the structure will be returned at the least end of
2182 the register, which translates to right padding on little-endian
2183 targets and left padding on big-endian targets. The opposite
2184 holds if the structure is returned at the most significant
2185 end of the register. */
2186 if (bytes % UNITS_PER_WORD != 0
2187 && (targetm.calls.return_in_msb (type)
2188 ? !BYTES_BIG_ENDIAN
2189 : BYTES_BIG_ENDIAN))
2190 padding_correction
2191 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2192
2193 /* We can use a single move if we have an exact mode for the size. */
2194 else if (MEM_P (target)
2195 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target))
2196 || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode))
2197 && bytes == GET_MODE_SIZE (mode))
2198 {
2199 emit_move_insn (adjust_address (target, mode, 0), srcreg);
2200 return;
2201 }
2202
2203 /* And if we additionally have the same mode for a register. */
2204 else if (REG_P (target)
2205 && GET_MODE (target) == mode
2206 && bytes == GET_MODE_SIZE (mode))
2207 {
2208 emit_move_insn (target, srcreg);
2209 return;
2210 }
2211
2212 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2213 into a new pseudo which is a full word. */
2214 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
2215 {
2216 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2217 mode = word_mode;
2218 }
2219
2220 /* Copy the structure BITSIZE bits at a time. If the target lives in
2221 memory, take care of not reading/writing past its end by selecting
2222 a copy mode suited to BITSIZE. This should always be possible given
2223 how it is computed.
2224
2225 If the target lives in register, make sure not to select a copy mode
2226 larger than the mode of the register.
2227
2228 We could probably emit more efficient code for machines which do not use
2229 strict alignment, but it doesn't seem worth the effort at the current
2230 time. */
2231
2232 copy_mode = word_mode;
2233 if (MEM_P (target))
2234 {
2235 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2236 if (mem_mode != BLKmode)
2237 copy_mode = mem_mode;
2238 }
2239 else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2240 copy_mode = tmode;
2241
2242 for (bitpos = 0, xbitpos = padding_correction;
2243 bitpos < bytes * BITS_PER_UNIT;
2244 bitpos += bitsize, xbitpos += bitsize)
2245 {
2246 /* We need a new source operand each time xbitpos is on a
2247 word boundary and when xbitpos == padding_correction
2248 (the first time through). */
2249 if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction)
2250 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode);
2251
2252 /* We need a new destination operand each time bitpos is on
2253 a word boundary. */
2254 if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2255 dst = target;
2256 else if (bitpos % BITS_PER_WORD == 0)
2257 dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode);
2258
2259 /* Use xbitpos for the source extraction (right justified) and
2260 bitpos for the destination store (left justified). */
2261 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2262 extract_bit_field (src, bitsize,
2263 xbitpos % BITS_PER_WORD, 1,
2264 NULL_RTX, copy_mode, copy_mode));
2265 }
2266 }
2267
2268 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2269 register if it contains any data, otherwise return null.
2270
2271 This is used on targets that return BLKmode values in registers. */
2272
2273 rtx
2274 copy_blkmode_to_reg (enum machine_mode mode, tree src)
2275 {
2276 int i, n_regs;
2277 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2278 unsigned int bitsize;
2279 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2280 enum machine_mode dst_mode;
2281
2282 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2283
2284 x = expand_normal (src);
2285
2286 bytes = int_size_in_bytes (TREE_TYPE (src));
2287 if (bytes == 0)
2288 return NULL_RTX;
2289
2290 /* If the structure doesn't take up a whole number of words, see
2291 whether the register value should be padded on the left or on
2292 the right. Set PADDING_CORRECTION to the number of padding
2293 bits needed on the left side.
2294
2295 In most ABIs, the structure will be returned at the least end of
2296 the register, which translates to right padding on little-endian
2297 targets and left padding on big-endian targets. The opposite
2298 holds if the structure is returned at the most significant
2299 end of the register. */
2300 if (bytes % UNITS_PER_WORD != 0
2301 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2302 ? !BYTES_BIG_ENDIAN
2303 : BYTES_BIG_ENDIAN))
2304 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2305 * BITS_PER_UNIT));
2306
2307 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2308 dst_words = XALLOCAVEC (rtx, n_regs);
2309 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2310
2311 /* Copy the structure BITSIZE bits at a time. */
2312 for (bitpos = 0, xbitpos = padding_correction;
2313 bitpos < bytes * BITS_PER_UNIT;
2314 bitpos += bitsize, xbitpos += bitsize)
2315 {
2316 /* We need a new destination pseudo each time xbitpos is
2317 on a word boundary and when xbitpos == padding_correction
2318 (the first time through). */
2319 if (xbitpos % BITS_PER_WORD == 0
2320 || xbitpos == padding_correction)
2321 {
2322 /* Generate an appropriate register. */
2323 dst_word = gen_reg_rtx (word_mode);
2324 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2325
2326 /* Clear the destination before we move anything into it. */
2327 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2328 }
2329
2330 /* We need a new source operand each time bitpos is on a word
2331 boundary. */
2332 if (bitpos % BITS_PER_WORD == 0)
2333 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2334
2335 /* Use bitpos for the source extraction (left justified) and
2336 xbitpos for the destination store (right justified). */
2337 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2338 0, 0, word_mode,
2339 extract_bit_field (src_word, bitsize,
2340 bitpos % BITS_PER_WORD, 1,
2341 NULL_RTX, word_mode, word_mode));
2342 }
2343
2344 if (mode == BLKmode)
2345 {
2346 /* Find the smallest integer mode large enough to hold the
2347 entire structure. */
2348 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2349 mode != VOIDmode;
2350 mode = GET_MODE_WIDER_MODE (mode))
2351 /* Have we found a large enough mode? */
2352 if (GET_MODE_SIZE (mode) >= bytes)
2353 break;
2354
2355 /* A suitable mode should have been found. */
2356 gcc_assert (mode != VOIDmode);
2357 }
2358
2359 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2360 dst_mode = word_mode;
2361 else
2362 dst_mode = mode;
2363 dst = gen_reg_rtx (dst_mode);
2364
2365 for (i = 0; i < n_regs; i++)
2366 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2367
2368 if (mode != dst_mode)
2369 dst = gen_lowpart (mode, dst);
2370
2371 return dst;
2372 }
2373
2374 /* Add a USE expression for REG to the (possibly empty) list pointed
2375 to by CALL_FUSAGE. REG must denote a hard register. */
2376
2377 void
2378 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2379 {
2380 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2381
2382 *call_fusage
2383 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2384 }
2385
2386 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2387 starting at REGNO. All of these registers must be hard registers. */
2388
2389 void
2390 use_regs (rtx *call_fusage, int regno, int nregs)
2391 {
2392 int i;
2393
2394 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2395
2396 for (i = 0; i < nregs; i++)
2397 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2398 }
2399
2400 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2401 PARALLEL REGS. This is for calls that pass values in multiple
2402 non-contiguous locations. The Irix 6 ABI has examples of this. */
2403
2404 void
2405 use_group_regs (rtx *call_fusage, rtx regs)
2406 {
2407 int i;
2408
2409 for (i = 0; i < XVECLEN (regs, 0); i++)
2410 {
2411 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2412
2413 /* A NULL entry means the parameter goes both on the stack and in
2414 registers. This can also be a MEM for targets that pass values
2415 partially on the stack and partially in registers. */
2416 if (reg != 0 && REG_P (reg))
2417 use_reg (call_fusage, reg);
2418 }
2419 }
2420
2421 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2422 assigment and the code of the expresion on the RHS is CODE. Return
2423 NULL otherwise. */
2424
2425 static gimple
2426 get_def_for_expr (tree name, enum tree_code code)
2427 {
2428 gimple def_stmt;
2429
2430 if (TREE_CODE (name) != SSA_NAME)
2431 return NULL;
2432
2433 def_stmt = get_gimple_for_ssa_name (name);
2434 if (!def_stmt
2435 || gimple_assign_rhs_code (def_stmt) != code)
2436 return NULL;
2437
2438 return def_stmt;
2439 }
2440
2441 #ifdef HAVE_conditional_move
2442 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2443 assigment and the class of the expresion on the RHS is CLASS. Return
2444 NULL otherwise. */
2445
2446 static gimple
2447 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2448 {
2449 gimple def_stmt;
2450
2451 if (TREE_CODE (name) != SSA_NAME)
2452 return NULL;
2453
2454 def_stmt = get_gimple_for_ssa_name (name);
2455 if (!def_stmt
2456 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2457 return NULL;
2458
2459 return def_stmt;
2460 }
2461 #endif
2462 \f
2463
2464 /* Determine whether the LEN bytes generated by CONSTFUN can be
2465 stored to memory using several move instructions. CONSTFUNDATA is
2466 a pointer which will be passed as argument in every CONSTFUN call.
2467 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2468 a memset operation and false if it's a copy of a constant string.
2469 Return nonzero if a call to store_by_pieces should succeed. */
2470
2471 int
2472 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2473 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2474 void *constfundata, unsigned int align, bool memsetp)
2475 {
2476 unsigned HOST_WIDE_INT l;
2477 unsigned int max_size;
2478 HOST_WIDE_INT offset = 0;
2479 enum machine_mode mode;
2480 enum insn_code icode;
2481 int reverse;
2482 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2483 rtx cst ATTRIBUTE_UNUSED;
2484
2485 if (len == 0)
2486 return 1;
2487
2488 if (! (memsetp
2489 ? SET_BY_PIECES_P (len, align)
2490 : STORE_BY_PIECES_P (len, align)))
2491 return 0;
2492
2493 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2494
2495 /* We would first store what we can in the largest integer mode, then go to
2496 successively smaller modes. */
2497
2498 for (reverse = 0;
2499 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2500 reverse++)
2501 {
2502 l = len;
2503 max_size = STORE_MAX_PIECES + 1;
2504 while (max_size > 1 && l > 0)
2505 {
2506 mode = widest_int_mode_for_size (max_size);
2507
2508 if (mode == VOIDmode)
2509 break;
2510
2511 icode = optab_handler (mov_optab, mode);
2512 if (icode != CODE_FOR_nothing
2513 && align >= GET_MODE_ALIGNMENT (mode))
2514 {
2515 unsigned int size = GET_MODE_SIZE (mode);
2516
2517 while (l >= size)
2518 {
2519 if (reverse)
2520 offset -= size;
2521
2522 cst = (*constfun) (constfundata, offset, mode);
2523 if (!targetm.legitimate_constant_p (mode, cst))
2524 return 0;
2525
2526 if (!reverse)
2527 offset += size;
2528
2529 l -= size;
2530 }
2531 }
2532
2533 max_size = GET_MODE_SIZE (mode);
2534 }
2535
2536 /* The code above should have handled everything. */
2537 gcc_assert (!l);
2538 }
2539
2540 return 1;
2541 }
2542
2543 /* Generate several move instructions to store LEN bytes generated by
2544 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2545 pointer which will be passed as argument in every CONSTFUN call.
2546 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2547 a memset operation and false if it's a copy of a constant string.
2548 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2549 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2550 stpcpy. */
2551
2552 rtx
2553 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2554 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2555 void *constfundata, unsigned int align, bool memsetp, int endp)
2556 {
2557 enum machine_mode to_addr_mode = get_address_mode (to);
2558 struct store_by_pieces_d data;
2559
2560 if (len == 0)
2561 {
2562 gcc_assert (endp != 2);
2563 return to;
2564 }
2565
2566 gcc_assert (memsetp
2567 ? SET_BY_PIECES_P (len, align)
2568 : STORE_BY_PIECES_P (len, align));
2569 data.constfun = constfun;
2570 data.constfundata = constfundata;
2571 data.len = len;
2572 data.to = to;
2573 store_by_pieces_1 (&data, align);
2574 if (endp)
2575 {
2576 rtx to1;
2577
2578 gcc_assert (!data.reverse);
2579 if (data.autinc_to)
2580 {
2581 if (endp == 2)
2582 {
2583 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2584 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2585 else
2586 data.to_addr = copy_to_mode_reg (to_addr_mode,
2587 plus_constant (to_addr_mode,
2588 data.to_addr,
2589 -1));
2590 }
2591 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2592 data.offset);
2593 }
2594 else
2595 {
2596 if (endp == 2)
2597 --data.offset;
2598 to1 = adjust_address (data.to, QImode, data.offset);
2599 }
2600 return to1;
2601 }
2602 else
2603 return data.to;
2604 }
2605
2606 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2607 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2608
2609 static void
2610 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2611 {
2612 struct store_by_pieces_d data;
2613
2614 if (len == 0)
2615 return;
2616
2617 data.constfun = clear_by_pieces_1;
2618 data.constfundata = NULL;
2619 data.len = len;
2620 data.to = to;
2621 store_by_pieces_1 (&data, align);
2622 }
2623
2624 /* Callback routine for clear_by_pieces.
2625 Return const0_rtx unconditionally. */
2626
2627 static rtx
2628 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2629 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2630 enum machine_mode mode ATTRIBUTE_UNUSED)
2631 {
2632 return const0_rtx;
2633 }
2634
2635 /* Subroutine of clear_by_pieces and store_by_pieces.
2636 Generate several move instructions to store LEN bytes of block TO. (A MEM
2637 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2638
2639 static void
2640 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2641 unsigned int align ATTRIBUTE_UNUSED)
2642 {
2643 enum machine_mode to_addr_mode = get_address_mode (data->to);
2644 rtx to_addr = XEXP (data->to, 0);
2645 unsigned int max_size = STORE_MAX_PIECES + 1;
2646 enum insn_code icode;
2647
2648 data->offset = 0;
2649 data->to_addr = to_addr;
2650 data->autinc_to
2651 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2652 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2653
2654 data->explicit_inc_to = 0;
2655 data->reverse
2656 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2657 if (data->reverse)
2658 data->offset = data->len;
2659
2660 /* If storing requires more than two move insns,
2661 copy addresses to registers (to make displacements shorter)
2662 and use post-increment if available. */
2663 if (!data->autinc_to
2664 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2665 {
2666 /* Determine the main mode we'll be using.
2667 MODE might not be used depending on the definitions of the
2668 USE_* macros below. */
2669 enum machine_mode mode ATTRIBUTE_UNUSED
2670 = widest_int_mode_for_size (max_size);
2671
2672 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2673 {
2674 data->to_addr = copy_to_mode_reg (to_addr_mode,
2675 plus_constant (to_addr_mode,
2676 to_addr,
2677 data->len));
2678 data->autinc_to = 1;
2679 data->explicit_inc_to = -1;
2680 }
2681
2682 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2683 && ! data->autinc_to)
2684 {
2685 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2686 data->autinc_to = 1;
2687 data->explicit_inc_to = 1;
2688 }
2689
2690 if ( !data->autinc_to && CONSTANT_P (to_addr))
2691 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2692 }
2693
2694 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2695
2696 /* First store what we can in the largest integer mode, then go to
2697 successively smaller modes. */
2698
2699 while (max_size > 1 && data->len > 0)
2700 {
2701 enum machine_mode mode = widest_int_mode_for_size (max_size);
2702
2703 if (mode == VOIDmode)
2704 break;
2705
2706 icode = optab_handler (mov_optab, mode);
2707 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2708 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2709
2710 max_size = GET_MODE_SIZE (mode);
2711 }
2712
2713 /* The code above should have handled everything. */
2714 gcc_assert (!data->len);
2715 }
2716
2717 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2718 with move instructions for mode MODE. GENFUN is the gen_... function
2719 to make a move insn for that mode. DATA has all the other info. */
2720
2721 static void
2722 store_by_pieces_2 (insn_gen_fn genfun, machine_mode mode,
2723 struct store_by_pieces_d *data)
2724 {
2725 unsigned int size = GET_MODE_SIZE (mode);
2726 rtx to1, cst;
2727
2728 while (data->len >= size)
2729 {
2730 if (data->reverse)
2731 data->offset -= size;
2732
2733 if (data->autinc_to)
2734 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2735 data->offset);
2736 else
2737 to1 = adjust_address (data->to, mode, data->offset);
2738
2739 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2740 emit_insn (gen_add2_insn (data->to_addr,
2741 gen_int_mode (-(HOST_WIDE_INT) size,
2742 GET_MODE (data->to_addr))));
2743
2744 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2745 emit_insn ((*genfun) (to1, cst));
2746
2747 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2748 emit_insn (gen_add2_insn (data->to_addr,
2749 gen_int_mode (size,
2750 GET_MODE (data->to_addr))));
2751
2752 if (! data->reverse)
2753 data->offset += size;
2754
2755 data->len -= size;
2756 }
2757 }
2758 \f
2759 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2760 its length in bytes. */
2761
2762 rtx
2763 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2764 unsigned int expected_align, HOST_WIDE_INT expected_size,
2765 unsigned HOST_WIDE_INT min_size,
2766 unsigned HOST_WIDE_INT max_size,
2767 unsigned HOST_WIDE_INT probable_max_size)
2768 {
2769 enum machine_mode mode = GET_MODE (object);
2770 unsigned int align;
2771
2772 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2773
2774 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2775 just move a zero. Otherwise, do this a piece at a time. */
2776 if (mode != BLKmode
2777 && CONST_INT_P (size)
2778 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2779 {
2780 rtx zero = CONST0_RTX (mode);
2781 if (zero != NULL)
2782 {
2783 emit_move_insn (object, zero);
2784 return NULL;
2785 }
2786
2787 if (COMPLEX_MODE_P (mode))
2788 {
2789 zero = CONST0_RTX (GET_MODE_INNER (mode));
2790 if (zero != NULL)
2791 {
2792 write_complex_part (object, zero, 0);
2793 write_complex_part (object, zero, 1);
2794 return NULL;
2795 }
2796 }
2797 }
2798
2799 if (size == const0_rtx)
2800 return NULL;
2801
2802 align = MEM_ALIGN (object);
2803
2804 if (CONST_INT_P (size)
2805 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2806 clear_by_pieces (object, INTVAL (size), align);
2807 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2808 expected_align, expected_size,
2809 min_size, max_size, probable_max_size))
2810 ;
2811 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2812 return set_storage_via_libcall (object, size, const0_rtx,
2813 method == BLOCK_OP_TAILCALL);
2814 else
2815 gcc_unreachable ();
2816
2817 return NULL;
2818 }
2819
2820 rtx
2821 clear_storage (rtx object, rtx size, enum block_op_methods method)
2822 {
2823 unsigned HOST_WIDE_INT max, min = 0;
2824 if (GET_CODE (size) == CONST_INT)
2825 min = max = UINTVAL (size);
2826 else
2827 max = GET_MODE_MASK (GET_MODE (size));
2828 return clear_storage_hints (object, size, method, 0, -1, min, max, max);
2829 }
2830
2831
2832 /* A subroutine of clear_storage. Expand a call to memset.
2833 Return the return value of memset, 0 otherwise. */
2834
2835 rtx
2836 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2837 {
2838 tree call_expr, fn, object_tree, size_tree, val_tree;
2839 enum machine_mode size_mode;
2840 rtx retval;
2841
2842 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2843 place those into new pseudos into a VAR_DECL and use them later. */
2844
2845 object = copy_addr_to_reg (XEXP (object, 0));
2846
2847 size_mode = TYPE_MODE (sizetype);
2848 size = convert_to_mode (size_mode, size, 1);
2849 size = copy_to_mode_reg (size_mode, size);
2850
2851 /* It is incorrect to use the libcall calling conventions to call
2852 memset in this context. This could be a user call to memset and
2853 the user may wish to examine the return value from memset. For
2854 targets where libcalls and normal calls have different conventions
2855 for returning pointers, we could end up generating incorrect code. */
2856
2857 object_tree = make_tree (ptr_type_node, object);
2858 if (!CONST_INT_P (val))
2859 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2860 size_tree = make_tree (sizetype, size);
2861 val_tree = make_tree (integer_type_node, val);
2862
2863 fn = clear_storage_libcall_fn (true);
2864 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2865 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2866
2867 retval = expand_normal (call_expr);
2868
2869 return retval;
2870 }
2871
2872 /* A subroutine of set_storage_via_libcall. Create the tree node
2873 for the function we use for block clears. */
2874
2875 tree block_clear_fn;
2876
2877 void
2878 init_block_clear_fn (const char *asmspec)
2879 {
2880 if (!block_clear_fn)
2881 {
2882 tree fn, args;
2883
2884 fn = get_identifier ("memset");
2885 args = build_function_type_list (ptr_type_node, ptr_type_node,
2886 integer_type_node, sizetype,
2887 NULL_TREE);
2888
2889 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2890 DECL_EXTERNAL (fn) = 1;
2891 TREE_PUBLIC (fn) = 1;
2892 DECL_ARTIFICIAL (fn) = 1;
2893 TREE_NOTHROW (fn) = 1;
2894 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2895 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2896
2897 block_clear_fn = fn;
2898 }
2899
2900 if (asmspec)
2901 set_user_assembler_name (block_clear_fn, asmspec);
2902 }
2903
2904 static tree
2905 clear_storage_libcall_fn (int for_call)
2906 {
2907 static bool emitted_extern;
2908
2909 if (!block_clear_fn)
2910 init_block_clear_fn (NULL);
2911
2912 if (for_call && !emitted_extern)
2913 {
2914 emitted_extern = true;
2915 make_decl_rtl (block_clear_fn);
2916 }
2917
2918 return block_clear_fn;
2919 }
2920 \f
2921 /* Expand a setmem pattern; return true if successful. */
2922
2923 bool
2924 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2925 unsigned int expected_align, HOST_WIDE_INT expected_size,
2926 unsigned HOST_WIDE_INT min_size,
2927 unsigned HOST_WIDE_INT max_size,
2928 unsigned HOST_WIDE_INT probable_max_size)
2929 {
2930 /* Try the most limited insn first, because there's no point
2931 including more than one in the machine description unless
2932 the more limited one has some advantage. */
2933
2934 enum machine_mode mode;
2935
2936 if (expected_align < align)
2937 expected_align = align;
2938 if (expected_size != -1)
2939 {
2940 if ((unsigned HOST_WIDE_INT)expected_size > max_size)
2941 expected_size = max_size;
2942 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
2943 expected_size = min_size;
2944 }
2945
2946 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2947 mode = GET_MODE_WIDER_MODE (mode))
2948 {
2949 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2950
2951 if (code != CODE_FOR_nothing
2952 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
2953 here because if SIZE is less than the mode mask, as it is
2954 returned by the macro, it will definitely be less than the
2955 actual mode mask. Since SIZE is within the Pmode address
2956 space, we limit MODE to Pmode. */
2957 && ((CONST_INT_P (size)
2958 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2959 <= (GET_MODE_MASK (mode) >> 1)))
2960 || max_size <= (GET_MODE_MASK (mode) >> 1)
2961 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
2962 {
2963 struct expand_operand ops[9];
2964 unsigned int nops;
2965
2966 nops = insn_data[(int) code].n_generator_args;
2967 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
2968
2969 create_fixed_operand (&ops[0], object);
2970 /* The check above guarantees that this size conversion is valid. */
2971 create_convert_operand_to (&ops[1], size, mode, true);
2972 create_convert_operand_from (&ops[2], val, byte_mode, true);
2973 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2974 if (nops >= 6)
2975 {
2976 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2977 create_integer_operand (&ops[5], expected_size);
2978 }
2979 if (nops >= 8)
2980 {
2981 create_integer_operand (&ops[6], min_size);
2982 /* If we can not represent the maximal size,
2983 make parameter NULL. */
2984 if ((HOST_WIDE_INT) max_size != -1)
2985 create_integer_operand (&ops[7], max_size);
2986 else
2987 create_fixed_operand (&ops[7], NULL);
2988 }
2989 if (nops == 9)
2990 {
2991 /* If we can not represent the maximal size,
2992 make parameter NULL. */
2993 if ((HOST_WIDE_INT) probable_max_size != -1)
2994 create_integer_operand (&ops[8], probable_max_size);
2995 else
2996 create_fixed_operand (&ops[8], NULL);
2997 }
2998 if (maybe_expand_insn (code, nops, ops))
2999 return true;
3000 }
3001 }
3002
3003 return false;
3004 }
3005
3006 \f
3007 /* Write to one of the components of the complex value CPLX. Write VAL to
3008 the real part if IMAG_P is false, and the imaginary part if its true. */
3009
3010 static void
3011 write_complex_part (rtx cplx, rtx val, bool imag_p)
3012 {
3013 enum machine_mode cmode;
3014 enum machine_mode imode;
3015 unsigned ibitsize;
3016
3017 if (GET_CODE (cplx) == CONCAT)
3018 {
3019 emit_move_insn (XEXP (cplx, imag_p), val);
3020 return;
3021 }
3022
3023 cmode = GET_MODE (cplx);
3024 imode = GET_MODE_INNER (cmode);
3025 ibitsize = GET_MODE_BITSIZE (imode);
3026
3027 /* For MEMs simplify_gen_subreg may generate an invalid new address
3028 because, e.g., the original address is considered mode-dependent
3029 by the target, which restricts simplify_subreg from invoking
3030 adjust_address_nv. Instead of preparing fallback support for an
3031 invalid address, we call adjust_address_nv directly. */
3032 if (MEM_P (cplx))
3033 {
3034 emit_move_insn (adjust_address_nv (cplx, imode,
3035 imag_p ? GET_MODE_SIZE (imode) : 0),
3036 val);
3037 return;
3038 }
3039
3040 /* If the sub-object is at least word sized, then we know that subregging
3041 will work. This special case is important, since store_bit_field
3042 wants to operate on integer modes, and there's rarely an OImode to
3043 correspond to TCmode. */
3044 if (ibitsize >= BITS_PER_WORD
3045 /* For hard regs we have exact predicates. Assume we can split
3046 the original object if it spans an even number of hard regs.
3047 This special case is important for SCmode on 64-bit platforms
3048 where the natural size of floating-point regs is 32-bit. */
3049 || (REG_P (cplx)
3050 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3051 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
3052 {
3053 rtx part = simplify_gen_subreg (imode, cplx, cmode,
3054 imag_p ? GET_MODE_SIZE (imode) : 0);
3055 if (part)
3056 {
3057 emit_move_insn (part, val);
3058 return;
3059 }
3060 else
3061 /* simplify_gen_subreg may fail for sub-word MEMs. */
3062 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3063 }
3064
3065 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
3066 }
3067
3068 /* Extract one of the components of the complex value CPLX. Extract the
3069 real part if IMAG_P is false, and the imaginary part if it's true. */
3070
3071 static rtx
3072 read_complex_part (rtx cplx, bool imag_p)
3073 {
3074 enum machine_mode cmode, imode;
3075 unsigned ibitsize;
3076
3077 if (GET_CODE (cplx) == CONCAT)
3078 return XEXP (cplx, imag_p);
3079
3080 cmode = GET_MODE (cplx);
3081 imode = GET_MODE_INNER (cmode);
3082 ibitsize = GET_MODE_BITSIZE (imode);
3083
3084 /* Special case reads from complex constants that got spilled to memory. */
3085 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
3086 {
3087 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
3088 if (decl && TREE_CODE (decl) == COMPLEX_CST)
3089 {
3090 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
3091 if (CONSTANT_CLASS_P (part))
3092 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
3093 }
3094 }
3095
3096 /* For MEMs simplify_gen_subreg may generate an invalid new address
3097 because, e.g., the original address is considered mode-dependent
3098 by the target, which restricts simplify_subreg from invoking
3099 adjust_address_nv. Instead of preparing fallback support for an
3100 invalid address, we call adjust_address_nv directly. */
3101 if (MEM_P (cplx))
3102 return adjust_address_nv (cplx, imode,
3103 imag_p ? GET_MODE_SIZE (imode) : 0);
3104
3105 /* If the sub-object is at least word sized, then we know that subregging
3106 will work. This special case is important, since extract_bit_field
3107 wants to operate on integer modes, and there's rarely an OImode to
3108 correspond to TCmode. */
3109 if (ibitsize >= BITS_PER_WORD
3110 /* For hard regs we have exact predicates. Assume we can split
3111 the original object if it spans an even number of hard regs.
3112 This special case is important for SCmode on 64-bit platforms
3113 where the natural size of floating-point regs is 32-bit. */
3114 || (REG_P (cplx)
3115 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3116 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
3117 {
3118 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
3119 imag_p ? GET_MODE_SIZE (imode) : 0);
3120 if (ret)
3121 return ret;
3122 else
3123 /* simplify_gen_subreg may fail for sub-word MEMs. */
3124 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3125 }
3126
3127 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
3128 true, NULL_RTX, imode, imode);
3129 }
3130 \f
3131 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3132 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3133 represented in NEW_MODE. If FORCE is true, this will never happen, as
3134 we'll force-create a SUBREG if needed. */
3135
3136 static rtx
3137 emit_move_change_mode (enum machine_mode new_mode,
3138 enum machine_mode old_mode, rtx x, bool force)
3139 {
3140 rtx ret;
3141
3142 if (push_operand (x, GET_MODE (x)))
3143 {
3144 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3145 MEM_COPY_ATTRIBUTES (ret, x);
3146 }
3147 else if (MEM_P (x))
3148 {
3149 /* We don't have to worry about changing the address since the
3150 size in bytes is supposed to be the same. */
3151 if (reload_in_progress)
3152 {
3153 /* Copy the MEM to change the mode and move any
3154 substitutions from the old MEM to the new one. */
3155 ret = adjust_address_nv (x, new_mode, 0);
3156 copy_replacements (x, ret);
3157 }
3158 else
3159 ret = adjust_address (x, new_mode, 0);
3160 }
3161 else
3162 {
3163 /* Note that we do want simplify_subreg's behavior of validating
3164 that the new mode is ok for a hard register. If we were to use
3165 simplify_gen_subreg, we would create the subreg, but would
3166 probably run into the target not being able to implement it. */
3167 /* Except, of course, when FORCE is true, when this is exactly what
3168 we want. Which is needed for CCmodes on some targets. */
3169 if (force)
3170 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3171 else
3172 ret = simplify_subreg (new_mode, x, old_mode, 0);
3173 }
3174
3175 return ret;
3176 }
3177
3178 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3179 an integer mode of the same size as MODE. Returns the instruction
3180 emitted, or NULL if such a move could not be generated. */
3181
3182 static rtx
3183 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3184 {
3185 enum machine_mode imode;
3186 enum insn_code code;
3187
3188 /* There must exist a mode of the exact size we require. */
3189 imode = int_mode_for_mode (mode);
3190 if (imode == BLKmode)
3191 return NULL_RTX;
3192
3193 /* The target must support moves in this mode. */
3194 code = optab_handler (mov_optab, imode);
3195 if (code == CODE_FOR_nothing)
3196 return NULL_RTX;
3197
3198 x = emit_move_change_mode (imode, mode, x, force);
3199 if (x == NULL_RTX)
3200 return NULL_RTX;
3201 y = emit_move_change_mode (imode, mode, y, force);
3202 if (y == NULL_RTX)
3203 return NULL_RTX;
3204 return emit_insn (GEN_FCN (code) (x, y));
3205 }
3206
3207 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3208 Return an equivalent MEM that does not use an auto-increment. */
3209
3210 static rtx
3211 emit_move_resolve_push (enum machine_mode mode, rtx x)
3212 {
3213 enum rtx_code code = GET_CODE (XEXP (x, 0));
3214 HOST_WIDE_INT adjust;
3215 rtx temp;
3216
3217 adjust = GET_MODE_SIZE (mode);
3218 #ifdef PUSH_ROUNDING
3219 adjust = PUSH_ROUNDING (adjust);
3220 #endif
3221 if (code == PRE_DEC || code == POST_DEC)
3222 adjust = -adjust;
3223 else if (code == PRE_MODIFY || code == POST_MODIFY)
3224 {
3225 rtx expr = XEXP (XEXP (x, 0), 1);
3226 HOST_WIDE_INT val;
3227
3228 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3229 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3230 val = INTVAL (XEXP (expr, 1));
3231 if (GET_CODE (expr) == MINUS)
3232 val = -val;
3233 gcc_assert (adjust == val || adjust == -val);
3234 adjust = val;
3235 }
3236
3237 /* Do not use anti_adjust_stack, since we don't want to update
3238 stack_pointer_delta. */
3239 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3240 gen_int_mode (adjust, Pmode), stack_pointer_rtx,
3241 0, OPTAB_LIB_WIDEN);
3242 if (temp != stack_pointer_rtx)
3243 emit_move_insn (stack_pointer_rtx, temp);
3244
3245 switch (code)
3246 {
3247 case PRE_INC:
3248 case PRE_DEC:
3249 case PRE_MODIFY:
3250 temp = stack_pointer_rtx;
3251 break;
3252 case POST_INC:
3253 case POST_DEC:
3254 case POST_MODIFY:
3255 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3256 break;
3257 default:
3258 gcc_unreachable ();
3259 }
3260
3261 return replace_equiv_address (x, temp);
3262 }
3263
3264 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3265 X is known to satisfy push_operand, and MODE is known to be complex.
3266 Returns the last instruction emitted. */
3267
3268 rtx
3269 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3270 {
3271 enum machine_mode submode = GET_MODE_INNER (mode);
3272 bool imag_first;
3273
3274 #ifdef PUSH_ROUNDING
3275 unsigned int submodesize = GET_MODE_SIZE (submode);
3276
3277 /* In case we output to the stack, but the size is smaller than the
3278 machine can push exactly, we need to use move instructions. */
3279 if (PUSH_ROUNDING (submodesize) != submodesize)
3280 {
3281 x = emit_move_resolve_push (mode, x);
3282 return emit_move_insn (x, y);
3283 }
3284 #endif
3285
3286 /* Note that the real part always precedes the imag part in memory
3287 regardless of machine's endianness. */
3288 switch (GET_CODE (XEXP (x, 0)))
3289 {
3290 case PRE_DEC:
3291 case POST_DEC:
3292 imag_first = true;
3293 break;
3294 case PRE_INC:
3295 case POST_INC:
3296 imag_first = false;
3297 break;
3298 default:
3299 gcc_unreachable ();
3300 }
3301
3302 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3303 read_complex_part (y, imag_first));
3304 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3305 read_complex_part (y, !imag_first));
3306 }
3307
3308 /* A subroutine of emit_move_complex. Perform the move from Y to X
3309 via two moves of the parts. Returns the last instruction emitted. */
3310
3311 rtx
3312 emit_move_complex_parts (rtx x, rtx y)
3313 {
3314 /* Show the output dies here. This is necessary for SUBREGs
3315 of pseudos since we cannot track their lifetimes correctly;
3316 hard regs shouldn't appear here except as return values. */
3317 if (!reload_completed && !reload_in_progress
3318 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3319 emit_clobber (x);
3320
3321 write_complex_part (x, read_complex_part (y, false), false);
3322 write_complex_part (x, read_complex_part (y, true), true);
3323
3324 return get_last_insn ();
3325 }
3326
3327 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3328 MODE is known to be complex. Returns the last instruction emitted. */
3329
3330 static rtx
3331 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3332 {
3333 bool try_int;
3334
3335 /* Need to take special care for pushes, to maintain proper ordering
3336 of the data, and possibly extra padding. */
3337 if (push_operand (x, mode))
3338 return emit_move_complex_push (mode, x, y);
3339
3340 /* See if we can coerce the target into moving both values at once, except
3341 for floating point where we favor moving as parts if this is easy. */
3342 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3343 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing
3344 && !(REG_P (x)
3345 && HARD_REGISTER_P (x)
3346 && hard_regno_nregs[REGNO (x)][mode] == 1)
3347 && !(REG_P (y)
3348 && HARD_REGISTER_P (y)
3349 && hard_regno_nregs[REGNO (y)][mode] == 1))
3350 try_int = false;
3351 /* Not possible if the values are inherently not adjacent. */
3352 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3353 try_int = false;
3354 /* Is possible if both are registers (or subregs of registers). */
3355 else if (register_operand (x, mode) && register_operand (y, mode))
3356 try_int = true;
3357 /* If one of the operands is a memory, and alignment constraints
3358 are friendly enough, we may be able to do combined memory operations.
3359 We do not attempt this if Y is a constant because that combination is
3360 usually better with the by-parts thing below. */
3361 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3362 && (!STRICT_ALIGNMENT
3363 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3364 try_int = true;
3365 else
3366 try_int = false;
3367
3368 if (try_int)
3369 {
3370 rtx ret;
3371
3372 /* For memory to memory moves, optimal behavior can be had with the
3373 existing block move logic. */
3374 if (MEM_P (x) && MEM_P (y))
3375 {
3376 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3377 BLOCK_OP_NO_LIBCALL);
3378 return get_last_insn ();
3379 }
3380
3381 ret = emit_move_via_integer (mode, x, y, true);
3382 if (ret)
3383 return ret;
3384 }
3385
3386 return emit_move_complex_parts (x, y);
3387 }
3388
3389 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3390 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3391
3392 static rtx
3393 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3394 {
3395 rtx ret;
3396
3397 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3398 if (mode != CCmode)
3399 {
3400 enum insn_code code = optab_handler (mov_optab, CCmode);
3401 if (code != CODE_FOR_nothing)
3402 {
3403 x = emit_move_change_mode (CCmode, mode, x, true);
3404 y = emit_move_change_mode (CCmode, mode, y, true);
3405 return emit_insn (GEN_FCN (code) (x, y));
3406 }
3407 }
3408
3409 /* Otherwise, find the MODE_INT mode of the same width. */
3410 ret = emit_move_via_integer (mode, x, y, false);
3411 gcc_assert (ret != NULL);
3412 return ret;
3413 }
3414
3415 /* Return true if word I of OP lies entirely in the
3416 undefined bits of a paradoxical subreg. */
3417
3418 static bool
3419 undefined_operand_subword_p (const_rtx op, int i)
3420 {
3421 enum machine_mode innermode, innermostmode;
3422 int offset;
3423 if (GET_CODE (op) != SUBREG)
3424 return false;
3425 innermode = GET_MODE (op);
3426 innermostmode = GET_MODE (SUBREG_REG (op));
3427 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3428 /* The SUBREG_BYTE represents offset, as if the value were stored in
3429 memory, except for a paradoxical subreg where we define
3430 SUBREG_BYTE to be 0; undo this exception as in
3431 simplify_subreg. */
3432 if (SUBREG_BYTE (op) == 0
3433 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3434 {
3435 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3436 if (WORDS_BIG_ENDIAN)
3437 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3438 if (BYTES_BIG_ENDIAN)
3439 offset += difference % UNITS_PER_WORD;
3440 }
3441 if (offset >= GET_MODE_SIZE (innermostmode)
3442 || offset <= -GET_MODE_SIZE (word_mode))
3443 return true;
3444 return false;
3445 }
3446
3447 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3448 MODE is any multi-word or full-word mode that lacks a move_insn
3449 pattern. Note that you will get better code if you define such
3450 patterns, even if they must turn into multiple assembler instructions. */
3451
3452 static rtx
3453 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3454 {
3455 rtx last_insn = 0;
3456 rtx seq, inner;
3457 bool need_clobber;
3458 int i;
3459
3460 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3461
3462 /* If X is a push on the stack, do the push now and replace
3463 X with a reference to the stack pointer. */
3464 if (push_operand (x, mode))
3465 x = emit_move_resolve_push (mode, x);
3466
3467 /* If we are in reload, see if either operand is a MEM whose address
3468 is scheduled for replacement. */
3469 if (reload_in_progress && MEM_P (x)
3470 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3471 x = replace_equiv_address_nv (x, inner);
3472 if (reload_in_progress && MEM_P (y)
3473 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3474 y = replace_equiv_address_nv (y, inner);
3475
3476 start_sequence ();
3477
3478 need_clobber = false;
3479 for (i = 0;
3480 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3481 i++)
3482 {
3483 rtx xpart = operand_subword (x, i, 1, mode);
3484 rtx ypart;
3485
3486 /* Do not generate code for a move if it would come entirely
3487 from the undefined bits of a paradoxical subreg. */
3488 if (undefined_operand_subword_p (y, i))
3489 continue;
3490
3491 ypart = operand_subword (y, i, 1, mode);
3492
3493 /* If we can't get a part of Y, put Y into memory if it is a
3494 constant. Otherwise, force it into a register. Then we must
3495 be able to get a part of Y. */
3496 if (ypart == 0 && CONSTANT_P (y))
3497 {
3498 y = use_anchored_address (force_const_mem (mode, y));
3499 ypart = operand_subword (y, i, 1, mode);
3500 }
3501 else if (ypart == 0)
3502 ypart = operand_subword_force (y, i, mode);
3503
3504 gcc_assert (xpart && ypart);
3505
3506 need_clobber |= (GET_CODE (xpart) == SUBREG);
3507
3508 last_insn = emit_move_insn (xpart, ypart);
3509 }
3510
3511 seq = get_insns ();
3512 end_sequence ();
3513
3514 /* Show the output dies here. This is necessary for SUBREGs
3515 of pseudos since we cannot track their lifetimes correctly;
3516 hard regs shouldn't appear here except as return values.
3517 We never want to emit such a clobber after reload. */
3518 if (x != y
3519 && ! (reload_in_progress || reload_completed)
3520 && need_clobber != 0)
3521 emit_clobber (x);
3522
3523 emit_insn (seq);
3524
3525 return last_insn;
3526 }
3527
3528 /* Low level part of emit_move_insn.
3529 Called just like emit_move_insn, but assumes X and Y
3530 are basically valid. */
3531
3532 rtx
3533 emit_move_insn_1 (rtx x, rtx y)
3534 {
3535 enum machine_mode mode = GET_MODE (x);
3536 enum insn_code code;
3537
3538 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3539
3540 code = optab_handler (mov_optab, mode);
3541 if (code != CODE_FOR_nothing)
3542 return emit_insn (GEN_FCN (code) (x, y));
3543
3544 /* Expand complex moves by moving real part and imag part. */
3545 if (COMPLEX_MODE_P (mode))
3546 return emit_move_complex (mode, x, y);
3547
3548 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3549 || ALL_FIXED_POINT_MODE_P (mode))
3550 {
3551 rtx result = emit_move_via_integer (mode, x, y, true);
3552
3553 /* If we can't find an integer mode, use multi words. */
3554 if (result)
3555 return result;
3556 else
3557 return emit_move_multi_word (mode, x, y);
3558 }
3559
3560 if (GET_MODE_CLASS (mode) == MODE_CC)
3561 return emit_move_ccmode (mode, x, y);
3562
3563 /* Try using a move pattern for the corresponding integer mode. This is
3564 only safe when simplify_subreg can convert MODE constants into integer
3565 constants. At present, it can only do this reliably if the value
3566 fits within a HOST_WIDE_INT. */
3567 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3568 {
3569 rtx ret = emit_move_via_integer (mode, x, y, lra_in_progress);
3570
3571 if (ret)
3572 {
3573 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0)
3574 return ret;
3575 }
3576 }
3577
3578 return emit_move_multi_word (mode, x, y);
3579 }
3580
3581 /* Generate code to copy Y into X.
3582 Both Y and X must have the same mode, except that
3583 Y can be a constant with VOIDmode.
3584 This mode cannot be BLKmode; use emit_block_move for that.
3585
3586 Return the last instruction emitted. */
3587
3588 rtx
3589 emit_move_insn (rtx x, rtx y)
3590 {
3591 enum machine_mode mode = GET_MODE (x);
3592 rtx y_cst = NULL_RTX;
3593 rtx last_insn, set;
3594
3595 gcc_assert (mode != BLKmode
3596 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3597
3598 if (CONSTANT_P (y))
3599 {
3600 if (optimize
3601 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3602 && (last_insn = compress_float_constant (x, y)))
3603 return last_insn;
3604
3605 y_cst = y;
3606
3607 if (!targetm.legitimate_constant_p (mode, y))
3608 {
3609 y = force_const_mem (mode, y);
3610
3611 /* If the target's cannot_force_const_mem prevented the spill,
3612 assume that the target's move expanders will also take care
3613 of the non-legitimate constant. */
3614 if (!y)
3615 y = y_cst;
3616 else
3617 y = use_anchored_address (y);
3618 }
3619 }
3620
3621 /* If X or Y are memory references, verify that their addresses are valid
3622 for the machine. */
3623 if (MEM_P (x)
3624 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3625 MEM_ADDR_SPACE (x))
3626 && ! push_operand (x, GET_MODE (x))))
3627 x = validize_mem (x);
3628
3629 if (MEM_P (y)
3630 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3631 MEM_ADDR_SPACE (y)))
3632 y = validize_mem (y);
3633
3634 gcc_assert (mode != BLKmode);
3635
3636 last_insn = emit_move_insn_1 (x, y);
3637
3638 if (y_cst && REG_P (x)
3639 && (set = single_set (last_insn)) != NULL_RTX
3640 && SET_DEST (set) == x
3641 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3642 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3643
3644 return last_insn;
3645 }
3646
3647 /* If Y is representable exactly in a narrower mode, and the target can
3648 perform the extension directly from constant or memory, then emit the
3649 move as an extension. */
3650
3651 static rtx
3652 compress_float_constant (rtx x, rtx y)
3653 {
3654 enum machine_mode dstmode = GET_MODE (x);
3655 enum machine_mode orig_srcmode = GET_MODE (y);
3656 enum machine_mode srcmode;
3657 REAL_VALUE_TYPE r;
3658 int oldcost, newcost;
3659 bool speed = optimize_insn_for_speed_p ();
3660
3661 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3662
3663 if (targetm.legitimate_constant_p (dstmode, y))
3664 oldcost = set_src_cost (y, speed);
3665 else
3666 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3667
3668 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3669 srcmode != orig_srcmode;
3670 srcmode = GET_MODE_WIDER_MODE (srcmode))
3671 {
3672 enum insn_code ic;
3673 rtx trunc_y, last_insn;
3674
3675 /* Skip if the target can't extend this way. */
3676 ic = can_extend_p (dstmode, srcmode, 0);
3677 if (ic == CODE_FOR_nothing)
3678 continue;
3679
3680 /* Skip if the narrowed value isn't exact. */
3681 if (! exact_real_truncate (srcmode, &r))
3682 continue;
3683
3684 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3685
3686 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3687 {
3688 /* Skip if the target needs extra instructions to perform
3689 the extension. */
3690 if (!insn_operand_matches (ic, 1, trunc_y))
3691 continue;
3692 /* This is valid, but may not be cheaper than the original. */
3693 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3694 speed);
3695 if (oldcost < newcost)
3696 continue;
3697 }
3698 else if (float_extend_from_mem[dstmode][srcmode])
3699 {
3700 trunc_y = force_const_mem (srcmode, trunc_y);
3701 /* This is valid, but may not be cheaper than the original. */
3702 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3703 speed);
3704 if (oldcost < newcost)
3705 continue;
3706 trunc_y = validize_mem (trunc_y);
3707 }
3708 else
3709 continue;
3710
3711 /* For CSE's benefit, force the compressed constant pool entry
3712 into a new pseudo. This constant may be used in different modes,
3713 and if not, combine will put things back together for us. */
3714 trunc_y = force_reg (srcmode, trunc_y);
3715 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3716 last_insn = get_last_insn ();
3717
3718 if (REG_P (x))
3719 set_unique_reg_note (last_insn, REG_EQUAL, y);
3720
3721 return last_insn;
3722 }
3723
3724 return NULL_RTX;
3725 }
3726 \f
3727 /* Pushing data onto the stack. */
3728
3729 /* Push a block of length SIZE (perhaps variable)
3730 and return an rtx to address the beginning of the block.
3731 The value may be virtual_outgoing_args_rtx.
3732
3733 EXTRA is the number of bytes of padding to push in addition to SIZE.
3734 BELOW nonzero means this padding comes at low addresses;
3735 otherwise, the padding comes at high addresses. */
3736
3737 rtx
3738 push_block (rtx size, int extra, int below)
3739 {
3740 rtx temp;
3741
3742 size = convert_modes (Pmode, ptr_mode, size, 1);
3743 if (CONSTANT_P (size))
3744 anti_adjust_stack (plus_constant (Pmode, size, extra));
3745 else if (REG_P (size) && extra == 0)
3746 anti_adjust_stack (size);
3747 else
3748 {
3749 temp = copy_to_mode_reg (Pmode, size);
3750 if (extra != 0)
3751 temp = expand_binop (Pmode, add_optab, temp,
3752 gen_int_mode (extra, Pmode),
3753 temp, 0, OPTAB_LIB_WIDEN);
3754 anti_adjust_stack (temp);
3755 }
3756
3757 #ifndef STACK_GROWS_DOWNWARD
3758 if (0)
3759 #else
3760 if (1)
3761 #endif
3762 {
3763 temp = virtual_outgoing_args_rtx;
3764 if (extra != 0 && below)
3765 temp = plus_constant (Pmode, temp, extra);
3766 }
3767 else
3768 {
3769 if (CONST_INT_P (size))
3770 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
3771 -INTVAL (size) - (below ? 0 : extra));
3772 else if (extra != 0 && !below)
3773 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3774 negate_rtx (Pmode, plus_constant (Pmode, size,
3775 extra)));
3776 else
3777 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3778 negate_rtx (Pmode, size));
3779 }
3780
3781 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3782 }
3783
3784 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3785
3786 static rtx
3787 mem_autoinc_base (rtx mem)
3788 {
3789 if (MEM_P (mem))
3790 {
3791 rtx addr = XEXP (mem, 0);
3792 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3793 return XEXP (addr, 0);
3794 }
3795 return NULL;
3796 }
3797
3798 /* A utility routine used here, in reload, and in try_split. The insns
3799 after PREV up to and including LAST are known to adjust the stack,
3800 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3801 placing notes as appropriate. PREV may be NULL, indicating the
3802 entire insn sequence prior to LAST should be scanned.
3803
3804 The set of allowed stack pointer modifications is small:
3805 (1) One or more auto-inc style memory references (aka pushes),
3806 (2) One or more addition/subtraction with the SP as destination,
3807 (3) A single move insn with the SP as destination,
3808 (4) A call_pop insn,
3809 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3810
3811 Insns in the sequence that do not modify the SP are ignored,
3812 except for noreturn calls.
3813
3814 The return value is the amount of adjustment that can be trivially
3815 verified, via immediate operand or auto-inc. If the adjustment
3816 cannot be trivially extracted, the return value is INT_MIN. */
3817
3818 HOST_WIDE_INT
3819 find_args_size_adjust (rtx insn)
3820 {
3821 rtx dest, set, pat;
3822 int i;
3823
3824 pat = PATTERN (insn);
3825 set = NULL;
3826
3827 /* Look for a call_pop pattern. */
3828 if (CALL_P (insn))
3829 {
3830 /* We have to allow non-call_pop patterns for the case
3831 of emit_single_push_insn of a TLS address. */
3832 if (GET_CODE (pat) != PARALLEL)
3833 return 0;
3834
3835 /* All call_pop have a stack pointer adjust in the parallel.
3836 The call itself is always first, and the stack adjust is
3837 usually last, so search from the end. */
3838 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3839 {
3840 set = XVECEXP (pat, 0, i);
3841 if (GET_CODE (set) != SET)
3842 continue;
3843 dest = SET_DEST (set);
3844 if (dest == stack_pointer_rtx)
3845 break;
3846 }
3847 /* We'd better have found the stack pointer adjust. */
3848 if (i == 0)
3849 return 0;
3850 /* Fall through to process the extracted SET and DEST
3851 as if it was a standalone insn. */
3852 }
3853 else if (GET_CODE (pat) == SET)
3854 set = pat;
3855 else if ((set = single_set (insn)) != NULL)
3856 ;
3857 else if (GET_CODE (pat) == PARALLEL)
3858 {
3859 /* ??? Some older ports use a parallel with a stack adjust
3860 and a store for a PUSH_ROUNDING pattern, rather than a
3861 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3862 /* ??? See h8300 and m68k, pushqi1. */
3863 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3864 {
3865 set = XVECEXP (pat, 0, i);
3866 if (GET_CODE (set) != SET)
3867 continue;
3868 dest = SET_DEST (set);
3869 if (dest == stack_pointer_rtx)
3870 break;
3871
3872 /* We do not expect an auto-inc of the sp in the parallel. */
3873 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3874 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3875 != stack_pointer_rtx);
3876 }
3877 if (i < 0)
3878 return 0;
3879 }
3880 else
3881 return 0;
3882
3883 dest = SET_DEST (set);
3884
3885 /* Look for direct modifications of the stack pointer. */
3886 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3887 {
3888 /* Look for a trivial adjustment, otherwise assume nothing. */
3889 /* Note that the SPU restore_stack_block pattern refers to
3890 the stack pointer in V4SImode. Consider that non-trivial. */
3891 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3892 && GET_CODE (SET_SRC (set)) == PLUS
3893 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3894 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3895 return INTVAL (XEXP (SET_SRC (set), 1));
3896 /* ??? Reload can generate no-op moves, which will be cleaned
3897 up later. Recognize it and continue searching. */
3898 else if (rtx_equal_p (dest, SET_SRC (set)))
3899 return 0;
3900 else
3901 return HOST_WIDE_INT_MIN;
3902 }
3903 else
3904 {
3905 rtx mem, addr;
3906
3907 /* Otherwise only think about autoinc patterns. */
3908 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3909 {
3910 mem = dest;
3911 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3912 != stack_pointer_rtx);
3913 }
3914 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3915 mem = SET_SRC (set);
3916 else
3917 return 0;
3918
3919 addr = XEXP (mem, 0);
3920 switch (GET_CODE (addr))
3921 {
3922 case PRE_INC:
3923 case POST_INC:
3924 return GET_MODE_SIZE (GET_MODE (mem));
3925 case PRE_DEC:
3926 case POST_DEC:
3927 return -GET_MODE_SIZE (GET_MODE (mem));
3928 case PRE_MODIFY:
3929 case POST_MODIFY:
3930 addr = XEXP (addr, 1);
3931 gcc_assert (GET_CODE (addr) == PLUS);
3932 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3933 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3934 return INTVAL (XEXP (addr, 1));
3935 default:
3936 gcc_unreachable ();
3937 }
3938 }
3939 }
3940
3941 int
3942 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3943 {
3944 int args_size = end_args_size;
3945 bool saw_unknown = false;
3946 rtx insn;
3947
3948 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3949 {
3950 HOST_WIDE_INT this_delta;
3951
3952 if (!NONDEBUG_INSN_P (insn))
3953 continue;
3954
3955 this_delta = find_args_size_adjust (insn);
3956 if (this_delta == 0)
3957 {
3958 if (!CALL_P (insn)
3959 || ACCUMULATE_OUTGOING_ARGS
3960 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3961 continue;
3962 }
3963
3964 gcc_assert (!saw_unknown);
3965 if (this_delta == HOST_WIDE_INT_MIN)
3966 saw_unknown = true;
3967
3968 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3969 #ifdef STACK_GROWS_DOWNWARD
3970 this_delta = -(unsigned HOST_WIDE_INT) this_delta;
3971 #endif
3972 args_size -= this_delta;
3973 }
3974
3975 return saw_unknown ? INT_MIN : args_size;
3976 }
3977
3978 #ifdef PUSH_ROUNDING
3979 /* Emit single push insn. */
3980
3981 static void
3982 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3983 {
3984 rtx dest_addr;
3985 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3986 rtx dest;
3987 enum insn_code icode;
3988
3989 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3990 /* If there is push pattern, use it. Otherwise try old way of throwing
3991 MEM representing push operation to move expander. */
3992 icode = optab_handler (push_optab, mode);
3993 if (icode != CODE_FOR_nothing)
3994 {
3995 struct expand_operand ops[1];
3996
3997 create_input_operand (&ops[0], x, mode);
3998 if (maybe_expand_insn (icode, 1, ops))
3999 return;
4000 }
4001 if (GET_MODE_SIZE (mode) == rounded_size)
4002 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
4003 /* If we are to pad downward, adjust the stack pointer first and
4004 then store X into the stack location using an offset. This is
4005 because emit_move_insn does not know how to pad; it does not have
4006 access to type. */
4007 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
4008 {
4009 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
4010 HOST_WIDE_INT offset;
4011
4012 emit_move_insn (stack_pointer_rtx,
4013 expand_binop (Pmode,
4014 #ifdef STACK_GROWS_DOWNWARD
4015 sub_optab,
4016 #else
4017 add_optab,
4018 #endif
4019 stack_pointer_rtx,
4020 gen_int_mode (rounded_size, Pmode),
4021 NULL_RTX, 0, OPTAB_LIB_WIDEN));
4022
4023 offset = (HOST_WIDE_INT) padding_size;
4024 #ifdef STACK_GROWS_DOWNWARD
4025 if (STACK_PUSH_CODE == POST_DEC)
4026 /* We have already decremented the stack pointer, so get the
4027 previous value. */
4028 offset += (HOST_WIDE_INT) rounded_size;
4029 #else
4030 if (STACK_PUSH_CODE == POST_INC)
4031 /* We have already incremented the stack pointer, so get the
4032 previous value. */
4033 offset -= (HOST_WIDE_INT) rounded_size;
4034 #endif
4035 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4036 gen_int_mode (offset, Pmode));
4037 }
4038 else
4039 {
4040 #ifdef STACK_GROWS_DOWNWARD
4041 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4042 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4043 gen_int_mode (-(HOST_WIDE_INT) rounded_size,
4044 Pmode));
4045 #else
4046 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4047 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4048 gen_int_mode (rounded_size, Pmode));
4049 #endif
4050 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
4051 }
4052
4053 dest = gen_rtx_MEM (mode, dest_addr);
4054
4055 if (type != 0)
4056 {
4057 set_mem_attributes (dest, type, 1);
4058
4059 if (flag_optimize_sibling_calls)
4060 /* Function incoming arguments may overlap with sibling call
4061 outgoing arguments and we cannot allow reordering of reads
4062 from function arguments with stores to outgoing arguments
4063 of sibling calls. */
4064 set_mem_alias_set (dest, 0);
4065 }
4066 emit_move_insn (dest, x);
4067 }
4068
4069 /* Emit and annotate a single push insn. */
4070
4071 static void
4072 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
4073 {
4074 int delta, old_delta = stack_pointer_delta;
4075 rtx prev = get_last_insn ();
4076 rtx last;
4077
4078 emit_single_push_insn_1 (mode, x, type);
4079
4080 last = get_last_insn ();
4081
4082 /* Notice the common case where we emitted exactly one insn. */
4083 if (PREV_INSN (last) == prev)
4084 {
4085 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
4086 return;
4087 }
4088
4089 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
4090 gcc_assert (delta == INT_MIN || delta == old_delta);
4091 }
4092 #endif
4093
4094 /* Generate code to push X onto the stack, assuming it has mode MODE and
4095 type TYPE.
4096 MODE is redundant except when X is a CONST_INT (since they don't
4097 carry mode info).
4098 SIZE is an rtx for the size of data to be copied (in bytes),
4099 needed only if X is BLKmode.
4100
4101 ALIGN (in bits) is maximum alignment we can assume.
4102
4103 If PARTIAL and REG are both nonzero, then copy that many of the first
4104 bytes of X into registers starting with REG, and push the rest of X.
4105 The amount of space pushed is decreased by PARTIAL bytes.
4106 REG must be a hard register in this case.
4107 If REG is zero but PARTIAL is not, take any all others actions for an
4108 argument partially in registers, but do not actually load any
4109 registers.
4110
4111 EXTRA is the amount in bytes of extra space to leave next to this arg.
4112 This is ignored if an argument block has already been allocated.
4113
4114 On a machine that lacks real push insns, ARGS_ADDR is the address of
4115 the bottom of the argument block for this call. We use indexing off there
4116 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4117 argument block has not been preallocated.
4118
4119 ARGS_SO_FAR is the size of args previously pushed for this call.
4120
4121 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4122 for arguments passed in registers. If nonzero, it will be the number
4123 of bytes required. */
4124
4125 void
4126 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
4127 unsigned int align, int partial, rtx reg, int extra,
4128 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
4129 rtx alignment_pad)
4130 {
4131 rtx xinner;
4132 enum direction stack_direction
4133 #ifdef STACK_GROWS_DOWNWARD
4134 = downward;
4135 #else
4136 = upward;
4137 #endif
4138
4139 /* Decide where to pad the argument: `downward' for below,
4140 `upward' for above, or `none' for don't pad it.
4141 Default is below for small data on big-endian machines; else above. */
4142 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
4143
4144 /* Invert direction if stack is post-decrement.
4145 FIXME: why? */
4146 if (STACK_PUSH_CODE == POST_DEC)
4147 if (where_pad != none)
4148 where_pad = (where_pad == downward ? upward : downward);
4149
4150 xinner = x;
4151
4152 if (mode == BLKmode
4153 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4154 {
4155 /* Copy a block into the stack, entirely or partially. */
4156
4157 rtx temp;
4158 int used;
4159 int offset;
4160 int skip;
4161
4162 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4163 used = partial - offset;
4164
4165 if (mode != BLKmode)
4166 {
4167 /* A value is to be stored in an insufficiently aligned
4168 stack slot; copy via a suitably aligned slot if
4169 necessary. */
4170 size = GEN_INT (GET_MODE_SIZE (mode));
4171 if (!MEM_P (xinner))
4172 {
4173 temp = assign_temp (type, 1, 1);
4174 emit_move_insn (temp, xinner);
4175 xinner = temp;
4176 }
4177 }
4178
4179 gcc_assert (size);
4180
4181 /* USED is now the # of bytes we need not copy to the stack
4182 because registers will take care of them. */
4183
4184 if (partial != 0)
4185 xinner = adjust_address (xinner, BLKmode, used);
4186
4187 /* If the partial register-part of the arg counts in its stack size,
4188 skip the part of stack space corresponding to the registers.
4189 Otherwise, start copying to the beginning of the stack space,
4190 by setting SKIP to 0. */
4191 skip = (reg_parm_stack_space == 0) ? 0 : used;
4192
4193 #ifdef PUSH_ROUNDING
4194 /* Do it with several push insns if that doesn't take lots of insns
4195 and if there is no difficulty with push insns that skip bytes
4196 on the stack for alignment purposes. */
4197 if (args_addr == 0
4198 && PUSH_ARGS
4199 && CONST_INT_P (size)
4200 && skip == 0
4201 && MEM_ALIGN (xinner) >= align
4202 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
4203 /* Here we avoid the case of a structure whose weak alignment
4204 forces many pushes of a small amount of data,
4205 and such small pushes do rounding that causes trouble. */
4206 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4207 || align >= BIGGEST_ALIGNMENT
4208 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4209 == (align / BITS_PER_UNIT)))
4210 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4211 {
4212 /* Push padding now if padding above and stack grows down,
4213 or if padding below and stack grows up.
4214 But if space already allocated, this has already been done. */
4215 if (extra && args_addr == 0
4216 && where_pad != none && where_pad != stack_direction)
4217 anti_adjust_stack (GEN_INT (extra));
4218
4219 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4220 }
4221 else
4222 #endif /* PUSH_ROUNDING */
4223 {
4224 rtx target;
4225
4226 /* Otherwise make space on the stack and copy the data
4227 to the address of that space. */
4228
4229 /* Deduct words put into registers from the size we must copy. */
4230 if (partial != 0)
4231 {
4232 if (CONST_INT_P (size))
4233 size = GEN_INT (INTVAL (size) - used);
4234 else
4235 size = expand_binop (GET_MODE (size), sub_optab, size,
4236 gen_int_mode (used, GET_MODE (size)),
4237 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4238 }
4239
4240 /* Get the address of the stack space.
4241 In this case, we do not deal with EXTRA separately.
4242 A single stack adjust will do. */
4243 if (! args_addr)
4244 {
4245 temp = push_block (size, extra, where_pad == downward);
4246 extra = 0;
4247 }
4248 else if (CONST_INT_P (args_so_far))
4249 temp = memory_address (BLKmode,
4250 plus_constant (Pmode, args_addr,
4251 skip + INTVAL (args_so_far)));
4252 else
4253 temp = memory_address (BLKmode,
4254 plus_constant (Pmode,
4255 gen_rtx_PLUS (Pmode,
4256 args_addr,
4257 args_so_far),
4258 skip));
4259
4260 if (!ACCUMULATE_OUTGOING_ARGS)
4261 {
4262 /* If the source is referenced relative to the stack pointer,
4263 copy it to another register to stabilize it. We do not need
4264 to do this if we know that we won't be changing sp. */
4265
4266 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4267 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4268 temp = copy_to_reg (temp);
4269 }
4270
4271 target = gen_rtx_MEM (BLKmode, temp);
4272
4273 /* We do *not* set_mem_attributes here, because incoming arguments
4274 may overlap with sibling call outgoing arguments and we cannot
4275 allow reordering of reads from function arguments with stores
4276 to outgoing arguments of sibling calls. We do, however, want
4277 to record the alignment of the stack slot. */
4278 /* ALIGN may well be better aligned than TYPE, e.g. due to
4279 PARM_BOUNDARY. Assume the caller isn't lying. */
4280 set_mem_align (target, align);
4281
4282 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4283 }
4284 }
4285 else if (partial > 0)
4286 {
4287 /* Scalar partly in registers. */
4288
4289 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4290 int i;
4291 int not_stack;
4292 /* # bytes of start of argument
4293 that we must make space for but need not store. */
4294 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4295 int args_offset = INTVAL (args_so_far);
4296 int skip;
4297
4298 /* Push padding now if padding above and stack grows down,
4299 or if padding below and stack grows up.
4300 But if space already allocated, this has already been done. */
4301 if (extra && args_addr == 0
4302 && where_pad != none && where_pad != stack_direction)
4303 anti_adjust_stack (GEN_INT (extra));
4304
4305 /* If we make space by pushing it, we might as well push
4306 the real data. Otherwise, we can leave OFFSET nonzero
4307 and leave the space uninitialized. */
4308 if (args_addr == 0)
4309 offset = 0;
4310
4311 /* Now NOT_STACK gets the number of words that we don't need to
4312 allocate on the stack. Convert OFFSET to words too. */
4313 not_stack = (partial - offset) / UNITS_PER_WORD;
4314 offset /= UNITS_PER_WORD;
4315
4316 /* If the partial register-part of the arg counts in its stack size,
4317 skip the part of stack space corresponding to the registers.
4318 Otherwise, start copying to the beginning of the stack space,
4319 by setting SKIP to 0. */
4320 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4321
4322 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4323 x = validize_mem (force_const_mem (mode, x));
4324
4325 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4326 SUBREGs of such registers are not allowed. */
4327 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4328 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4329 x = copy_to_reg (x);
4330
4331 /* Loop over all the words allocated on the stack for this arg. */
4332 /* We can do it by words, because any scalar bigger than a word
4333 has a size a multiple of a word. */
4334 #ifndef PUSH_ARGS_REVERSED
4335 for (i = not_stack; i < size; i++)
4336 #else
4337 for (i = size - 1; i >= not_stack; i--)
4338 #endif
4339 if (i >= not_stack + offset)
4340 emit_push_insn (operand_subword_force (x, i, mode),
4341 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4342 0, args_addr,
4343 GEN_INT (args_offset + ((i - not_stack + skip)
4344 * UNITS_PER_WORD)),
4345 reg_parm_stack_space, alignment_pad);
4346 }
4347 else
4348 {
4349 rtx addr;
4350 rtx dest;
4351
4352 /* Push padding now if padding above and stack grows down,
4353 or if padding below and stack grows up.
4354 But if space already allocated, this has already been done. */
4355 if (extra && args_addr == 0
4356 && where_pad != none && where_pad != stack_direction)
4357 anti_adjust_stack (GEN_INT (extra));
4358
4359 #ifdef PUSH_ROUNDING
4360 if (args_addr == 0 && PUSH_ARGS)
4361 emit_single_push_insn (mode, x, type);
4362 else
4363 #endif
4364 {
4365 if (CONST_INT_P (args_so_far))
4366 addr
4367 = memory_address (mode,
4368 plus_constant (Pmode, args_addr,
4369 INTVAL (args_so_far)));
4370 else
4371 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4372 args_so_far));
4373 dest = gen_rtx_MEM (mode, addr);
4374
4375 /* We do *not* set_mem_attributes here, because incoming arguments
4376 may overlap with sibling call outgoing arguments and we cannot
4377 allow reordering of reads from function arguments with stores
4378 to outgoing arguments of sibling calls. We do, however, want
4379 to record the alignment of the stack slot. */
4380 /* ALIGN may well be better aligned than TYPE, e.g. due to
4381 PARM_BOUNDARY. Assume the caller isn't lying. */
4382 set_mem_align (dest, align);
4383
4384 emit_move_insn (dest, x);
4385 }
4386 }
4387
4388 /* If part should go in registers, copy that part
4389 into the appropriate registers. Do this now, at the end,
4390 since mem-to-mem copies above may do function calls. */
4391 if (partial > 0 && reg != 0)
4392 {
4393 /* Handle calls that pass values in multiple non-contiguous locations.
4394 The Irix 6 ABI has examples of this. */
4395 if (GET_CODE (reg) == PARALLEL)
4396 emit_group_load (reg, x, type, -1);
4397 else
4398 {
4399 gcc_assert (partial % UNITS_PER_WORD == 0);
4400 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4401 }
4402 }
4403
4404 if (extra && args_addr == 0 && where_pad == stack_direction)
4405 anti_adjust_stack (GEN_INT (extra));
4406
4407 if (alignment_pad && args_addr == 0)
4408 anti_adjust_stack (alignment_pad);
4409 }
4410 \f
4411 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4412 operations. */
4413
4414 static rtx
4415 get_subtarget (rtx x)
4416 {
4417 return (optimize
4418 || x == 0
4419 /* Only registers can be subtargets. */
4420 || !REG_P (x)
4421 /* Don't use hard regs to avoid extending their life. */
4422 || REGNO (x) < FIRST_PSEUDO_REGISTER
4423 ? 0 : x);
4424 }
4425
4426 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4427 FIELD is a bitfield. Returns true if the optimization was successful,
4428 and there's nothing else to do. */
4429
4430 static bool
4431 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4432 unsigned HOST_WIDE_INT bitpos,
4433 unsigned HOST_WIDE_INT bitregion_start,
4434 unsigned HOST_WIDE_INT bitregion_end,
4435 enum machine_mode mode1, rtx str_rtx,
4436 tree to, tree src)
4437 {
4438 enum machine_mode str_mode = GET_MODE (str_rtx);
4439 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4440 tree op0, op1;
4441 rtx value, result;
4442 optab binop;
4443 gimple srcstmt;
4444 enum tree_code code;
4445
4446 if (mode1 != VOIDmode
4447 || bitsize >= BITS_PER_WORD
4448 || str_bitsize > BITS_PER_WORD
4449 || TREE_SIDE_EFFECTS (to)
4450 || TREE_THIS_VOLATILE (to))
4451 return false;
4452
4453 STRIP_NOPS (src);
4454 if (TREE_CODE (src) != SSA_NAME)
4455 return false;
4456 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4457 return false;
4458
4459 srcstmt = get_gimple_for_ssa_name (src);
4460 if (!srcstmt
4461 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4462 return false;
4463
4464 code = gimple_assign_rhs_code (srcstmt);
4465
4466 op0 = gimple_assign_rhs1 (srcstmt);
4467
4468 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4469 to find its initialization. Hopefully the initialization will
4470 be from a bitfield load. */
4471 if (TREE_CODE (op0) == SSA_NAME)
4472 {
4473 gimple op0stmt = get_gimple_for_ssa_name (op0);
4474
4475 /* We want to eventually have OP0 be the same as TO, which
4476 should be a bitfield. */
4477 if (!op0stmt
4478 || !is_gimple_assign (op0stmt)
4479 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4480 return false;
4481 op0 = gimple_assign_rhs1 (op0stmt);
4482 }
4483
4484 op1 = gimple_assign_rhs2 (srcstmt);
4485
4486 if (!operand_equal_p (to, op0, 0))
4487 return false;
4488
4489 if (MEM_P (str_rtx))
4490 {
4491 unsigned HOST_WIDE_INT offset1;
4492
4493 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4494 str_mode = word_mode;
4495 str_mode = get_best_mode (bitsize, bitpos,
4496 bitregion_start, bitregion_end,
4497 MEM_ALIGN (str_rtx), str_mode, 0);
4498 if (str_mode == VOIDmode)
4499 return false;
4500 str_bitsize = GET_MODE_BITSIZE (str_mode);
4501
4502 offset1 = bitpos;
4503 bitpos %= str_bitsize;
4504 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4505 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4506 }
4507 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4508 return false;
4509
4510 /* If the bit field covers the whole REG/MEM, store_field
4511 will likely generate better code. */
4512 if (bitsize >= str_bitsize)
4513 return false;
4514
4515 /* We can't handle fields split across multiple entities. */
4516 if (bitpos + bitsize > str_bitsize)
4517 return false;
4518
4519 if (BYTES_BIG_ENDIAN)
4520 bitpos = str_bitsize - bitpos - bitsize;
4521
4522 switch (code)
4523 {
4524 case PLUS_EXPR:
4525 case MINUS_EXPR:
4526 /* For now, just optimize the case of the topmost bitfield
4527 where we don't need to do any masking and also
4528 1 bit bitfields where xor can be used.
4529 We might win by one instruction for the other bitfields
4530 too if insv/extv instructions aren't used, so that
4531 can be added later. */
4532 if (bitpos + bitsize != str_bitsize
4533 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4534 break;
4535
4536 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4537 value = convert_modes (str_mode,
4538 TYPE_MODE (TREE_TYPE (op1)), value,
4539 TYPE_UNSIGNED (TREE_TYPE (op1)));
4540
4541 /* We may be accessing data outside the field, which means
4542 we can alias adjacent data. */
4543 if (MEM_P (str_rtx))
4544 {
4545 str_rtx = shallow_copy_rtx (str_rtx);
4546 set_mem_alias_set (str_rtx, 0);
4547 set_mem_expr (str_rtx, 0);
4548 }
4549
4550 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4551 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4552 {
4553 value = expand_and (str_mode, value, const1_rtx, NULL);
4554 binop = xor_optab;
4555 }
4556 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4557 result = expand_binop (str_mode, binop, str_rtx,
4558 value, str_rtx, 1, OPTAB_WIDEN);
4559 if (result != str_rtx)
4560 emit_move_insn (str_rtx, result);
4561 return true;
4562
4563 case BIT_IOR_EXPR:
4564 case BIT_XOR_EXPR:
4565 if (TREE_CODE (op1) != INTEGER_CST)
4566 break;
4567 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4568 value = convert_modes (str_mode,
4569 TYPE_MODE (TREE_TYPE (op1)), value,
4570 TYPE_UNSIGNED (TREE_TYPE (op1)));
4571
4572 /* We may be accessing data outside the field, which means
4573 we can alias adjacent data. */
4574 if (MEM_P (str_rtx))
4575 {
4576 str_rtx = shallow_copy_rtx (str_rtx);
4577 set_mem_alias_set (str_rtx, 0);
4578 set_mem_expr (str_rtx, 0);
4579 }
4580
4581 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4582 if (bitpos + bitsize != str_bitsize)
4583 {
4584 rtx mask = gen_int_mode (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1,
4585 str_mode);
4586 value = expand_and (str_mode, value, mask, NULL_RTX);
4587 }
4588 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4589 result = expand_binop (str_mode, binop, str_rtx,
4590 value, str_rtx, 1, OPTAB_WIDEN);
4591 if (result != str_rtx)
4592 emit_move_insn (str_rtx, result);
4593 return true;
4594
4595 default:
4596 break;
4597 }
4598
4599 return false;
4600 }
4601
4602 /* In the C++ memory model, consecutive bit fields in a structure are
4603 considered one memory location.
4604
4605 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4606 returns the bit range of consecutive bits in which this COMPONENT_REF
4607 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4608 and *OFFSET may be adjusted in the process.
4609
4610 If the access does not need to be restricted, 0 is returned in both
4611 *BITSTART and *BITEND. */
4612
4613 static void
4614 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4615 unsigned HOST_WIDE_INT *bitend,
4616 tree exp,
4617 HOST_WIDE_INT *bitpos,
4618 tree *offset)
4619 {
4620 HOST_WIDE_INT bitoffset;
4621 tree field, repr;
4622
4623 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4624
4625 field = TREE_OPERAND (exp, 1);
4626 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4627 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4628 need to limit the range we can access. */
4629 if (!repr)
4630 {
4631 *bitstart = *bitend = 0;
4632 return;
4633 }
4634
4635 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4636 part of a larger bit field, then the representative does not serve any
4637 useful purpose. This can occur in Ada. */
4638 if (handled_component_p (TREE_OPERAND (exp, 0)))
4639 {
4640 enum machine_mode rmode;
4641 HOST_WIDE_INT rbitsize, rbitpos;
4642 tree roffset;
4643 int unsignedp;
4644 int volatilep = 0;
4645 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4646 &roffset, &rmode, &unsignedp, &volatilep, false);
4647 if ((rbitpos % BITS_PER_UNIT) != 0)
4648 {
4649 *bitstart = *bitend = 0;
4650 return;
4651 }
4652 }
4653
4654 /* Compute the adjustment to bitpos from the offset of the field
4655 relative to the representative. DECL_FIELD_OFFSET of field and
4656 repr are the same by construction if they are not constants,
4657 see finish_bitfield_layout. */
4658 if (tree_fits_uhwi_p (DECL_FIELD_OFFSET (field))
4659 && tree_fits_uhwi_p (DECL_FIELD_OFFSET (repr)))
4660 bitoffset = (tree_to_uhwi (DECL_FIELD_OFFSET (field))
4661 - tree_to_uhwi (DECL_FIELD_OFFSET (repr))) * BITS_PER_UNIT;
4662 else
4663 bitoffset = 0;
4664 bitoffset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
4665 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr)));
4666
4667 /* If the adjustment is larger than bitpos, we would have a negative bit
4668 position for the lower bound and this may wreak havoc later. Adjust
4669 offset and bitpos to make the lower bound non-negative in that case. */
4670 if (bitoffset > *bitpos)
4671 {
4672 HOST_WIDE_INT adjust = bitoffset - *bitpos;
4673 gcc_assert ((adjust % BITS_PER_UNIT) == 0);
4674
4675 *bitpos += adjust;
4676 if (*offset == NULL_TREE)
4677 *offset = size_int (-adjust / BITS_PER_UNIT);
4678 else
4679 *offset
4680 = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));
4681 *bitstart = 0;
4682 }
4683 else
4684 *bitstart = *bitpos - bitoffset;
4685
4686 *bitend = *bitstart + tree_to_uhwi (DECL_SIZE (repr)) - 1;
4687 }
4688
4689 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4690 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4691 DECL_RTL was not set yet, return NORTL. */
4692
4693 static inline bool
4694 addr_expr_of_non_mem_decl_p_1 (tree addr, bool nortl)
4695 {
4696 if (TREE_CODE (addr) != ADDR_EXPR)
4697 return false;
4698
4699 tree base = TREE_OPERAND (addr, 0);
4700
4701 if (!DECL_P (base)
4702 || TREE_ADDRESSABLE (base)
4703 || DECL_MODE (base) == BLKmode)
4704 return false;
4705
4706 if (!DECL_RTL_SET_P (base))
4707 return nortl;
4708
4709 return (!MEM_P (DECL_RTL (base)));
4710 }
4711
4712 /* Returns true if the MEM_REF REF refers to an object that does not
4713 reside in memory and has non-BLKmode. */
4714
4715 static inline bool
4716 mem_ref_refers_to_non_mem_p (tree ref)
4717 {
4718 tree base = TREE_OPERAND (ref, 0);
4719 return addr_expr_of_non_mem_decl_p_1 (base, false);
4720 }
4721
4722 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4723 is true, try generating a nontemporal store. */
4724
4725 void
4726 expand_assignment (tree to, tree from, bool nontemporal)
4727 {
4728 rtx to_rtx = 0;
4729 rtx result;
4730 enum machine_mode mode;
4731 unsigned int align;
4732 enum insn_code icode;
4733
4734 /* Don't crash if the lhs of the assignment was erroneous. */
4735 if (TREE_CODE (to) == ERROR_MARK)
4736 {
4737 expand_normal (from);
4738 return;
4739 }
4740
4741 /* Optimize away no-op moves without side-effects. */
4742 if (operand_equal_p (to, from, 0))
4743 return;
4744
4745 /* Handle misaligned stores. */
4746 mode = TYPE_MODE (TREE_TYPE (to));
4747 if ((TREE_CODE (to) == MEM_REF
4748 || TREE_CODE (to) == TARGET_MEM_REF)
4749 && mode != BLKmode
4750 && !mem_ref_refers_to_non_mem_p (to)
4751 && ((align = get_object_alignment (to))
4752 < GET_MODE_ALIGNMENT (mode))
4753 && (((icode = optab_handler (movmisalign_optab, mode))
4754 != CODE_FOR_nothing)
4755 || SLOW_UNALIGNED_ACCESS (mode, align)))
4756 {
4757 rtx reg, mem;
4758
4759 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4760 reg = force_not_mem (reg);
4761 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4762
4763 if (icode != CODE_FOR_nothing)
4764 {
4765 struct expand_operand ops[2];
4766
4767 create_fixed_operand (&ops[0], mem);
4768 create_input_operand (&ops[1], reg, mode);
4769 /* The movmisalign<mode> pattern cannot fail, else the assignment
4770 would silently be omitted. */
4771 expand_insn (icode, 2, ops);
4772 }
4773 else
4774 store_bit_field (mem, GET_MODE_BITSIZE (mode),
4775 0, 0, 0, mode, reg);
4776 return;
4777 }
4778
4779 /* Assignment of a structure component needs special treatment
4780 if the structure component's rtx is not simply a MEM.
4781 Assignment of an array element at a constant index, and assignment of
4782 an array element in an unaligned packed structure field, has the same
4783 problem. Same for (partially) storing into a non-memory object. */
4784 if (handled_component_p (to)
4785 || (TREE_CODE (to) == MEM_REF
4786 && mem_ref_refers_to_non_mem_p (to))
4787 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4788 {
4789 enum machine_mode mode1;
4790 HOST_WIDE_INT bitsize, bitpos;
4791 unsigned HOST_WIDE_INT bitregion_start = 0;
4792 unsigned HOST_WIDE_INT bitregion_end = 0;
4793 tree offset;
4794 int unsignedp;
4795 int volatilep = 0;
4796 tree tem;
4797
4798 push_temp_slots ();
4799 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4800 &unsignedp, &volatilep, true);
4801
4802 /* Make sure bitpos is not negative, it can wreak havoc later. */
4803 if (bitpos < 0)
4804 {
4805 gcc_assert (offset == NULL_TREE);
4806 offset = size_int (bitpos >> (BITS_PER_UNIT == 8
4807 ? 3 : exact_log2 (BITS_PER_UNIT)));
4808 bitpos &= BITS_PER_UNIT - 1;
4809 }
4810
4811 if (TREE_CODE (to) == COMPONENT_REF
4812 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4813 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
4814
4815 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4816
4817 /* If the bitfield is volatile, we want to access it in the
4818 field's mode, not the computed mode.
4819 If a MEM has VOIDmode (external with incomplete type),
4820 use BLKmode for it instead. */
4821 if (MEM_P (to_rtx))
4822 {
4823 if (volatilep && flag_strict_volatile_bitfields > 0)
4824 to_rtx = adjust_address (to_rtx, mode1, 0);
4825 else if (GET_MODE (to_rtx) == VOIDmode)
4826 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4827 }
4828
4829 if (offset != 0)
4830 {
4831 enum machine_mode address_mode;
4832 rtx offset_rtx;
4833
4834 if (!MEM_P (to_rtx))
4835 {
4836 /* We can get constant negative offsets into arrays with broken
4837 user code. Translate this to a trap instead of ICEing. */
4838 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4839 expand_builtin_trap ();
4840 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4841 }
4842
4843 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4844 address_mode = get_address_mode (to_rtx);
4845 if (GET_MODE (offset_rtx) != address_mode)
4846 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4847
4848 /* A constant address in TO_RTX can have VOIDmode, we must not try
4849 to call force_reg for that case. Avoid that case. */
4850 if (MEM_P (to_rtx)
4851 && GET_MODE (to_rtx) == BLKmode
4852 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4853 && bitsize > 0
4854 && (bitpos % bitsize) == 0
4855 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4856 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4857 {
4858 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4859 bitpos = 0;
4860 }
4861
4862 to_rtx = offset_address (to_rtx, offset_rtx,
4863 highest_pow2_factor_for_target (to,
4864 offset));
4865 }
4866
4867 /* No action is needed if the target is not a memory and the field
4868 lies completely outside that target. This can occur if the source
4869 code contains an out-of-bounds access to a small array. */
4870 if (!MEM_P (to_rtx)
4871 && GET_MODE (to_rtx) != BLKmode
4872 && (unsigned HOST_WIDE_INT) bitpos
4873 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4874 {
4875 expand_normal (from);
4876 result = NULL;
4877 }
4878 /* Handle expand_expr of a complex value returning a CONCAT. */
4879 else if (GET_CODE (to_rtx) == CONCAT)
4880 {
4881 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4882 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4883 && bitpos == 0
4884 && bitsize == mode_bitsize)
4885 result = store_expr (from, to_rtx, false, nontemporal);
4886 else if (bitsize == mode_bitsize / 2
4887 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4888 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4889 nontemporal);
4890 else if (bitpos + bitsize <= mode_bitsize / 2)
4891 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4892 bitregion_start, bitregion_end,
4893 mode1, from,
4894 get_alias_set (to), nontemporal);
4895 else if (bitpos >= mode_bitsize / 2)
4896 result = store_field (XEXP (to_rtx, 1), bitsize,
4897 bitpos - mode_bitsize / 2,
4898 bitregion_start, bitregion_end,
4899 mode1, from,
4900 get_alias_set (to), nontemporal);
4901 else if (bitpos == 0 && bitsize == mode_bitsize)
4902 {
4903 rtx from_rtx;
4904 result = expand_normal (from);
4905 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4906 TYPE_MODE (TREE_TYPE (from)), 0);
4907 emit_move_insn (XEXP (to_rtx, 0),
4908 read_complex_part (from_rtx, false));
4909 emit_move_insn (XEXP (to_rtx, 1),
4910 read_complex_part (from_rtx, true));
4911 }
4912 else
4913 {
4914 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4915 GET_MODE_SIZE (GET_MODE (to_rtx)));
4916 write_complex_part (temp, XEXP (to_rtx, 0), false);
4917 write_complex_part (temp, XEXP (to_rtx, 1), true);
4918 result = store_field (temp, bitsize, bitpos,
4919 bitregion_start, bitregion_end,
4920 mode1, from,
4921 get_alias_set (to), nontemporal);
4922 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4923 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4924 }
4925 }
4926 else
4927 {
4928 if (MEM_P (to_rtx))
4929 {
4930 /* If the field is at offset zero, we could have been given the
4931 DECL_RTX of the parent struct. Don't munge it. */
4932 to_rtx = shallow_copy_rtx (to_rtx);
4933 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4934 if (volatilep)
4935 MEM_VOLATILE_P (to_rtx) = 1;
4936 }
4937
4938 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4939 bitregion_start, bitregion_end,
4940 mode1,
4941 to_rtx, to, from))
4942 result = NULL;
4943 else
4944 result = store_field (to_rtx, bitsize, bitpos,
4945 bitregion_start, bitregion_end,
4946 mode1, from,
4947 get_alias_set (to), nontemporal);
4948 }
4949
4950 if (result)
4951 preserve_temp_slots (result);
4952 pop_temp_slots ();
4953 return;
4954 }
4955
4956 /* If the rhs is a function call and its value is not an aggregate,
4957 call the function before we start to compute the lhs.
4958 This is needed for correct code for cases such as
4959 val = setjmp (buf) on machines where reference to val
4960 requires loading up part of an address in a separate insn.
4961
4962 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4963 since it might be a promoted variable where the zero- or sign- extension
4964 needs to be done. Handling this in the normal way is safe because no
4965 computation is done before the call. The same is true for SSA names. */
4966 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4967 && COMPLETE_TYPE_P (TREE_TYPE (from))
4968 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4969 && ! (((TREE_CODE (to) == VAR_DECL
4970 || TREE_CODE (to) == PARM_DECL
4971 || TREE_CODE (to) == RESULT_DECL)
4972 && REG_P (DECL_RTL (to)))
4973 || TREE_CODE (to) == SSA_NAME))
4974 {
4975 rtx value;
4976
4977 push_temp_slots ();
4978 value = expand_normal (from);
4979 if (to_rtx == 0)
4980 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4981
4982 /* Handle calls that return values in multiple non-contiguous locations.
4983 The Irix 6 ABI has examples of this. */
4984 if (GET_CODE (to_rtx) == PARALLEL)
4985 {
4986 if (GET_CODE (value) == PARALLEL)
4987 emit_group_move (to_rtx, value);
4988 else
4989 emit_group_load (to_rtx, value, TREE_TYPE (from),
4990 int_size_in_bytes (TREE_TYPE (from)));
4991 }
4992 else if (GET_CODE (value) == PARALLEL)
4993 emit_group_store (to_rtx, value, TREE_TYPE (from),
4994 int_size_in_bytes (TREE_TYPE (from)));
4995 else if (GET_MODE (to_rtx) == BLKmode)
4996 {
4997 /* Handle calls that return BLKmode values in registers. */
4998 if (REG_P (value))
4999 copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from));
5000 else
5001 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
5002 }
5003 else
5004 {
5005 if (POINTER_TYPE_P (TREE_TYPE (to)))
5006 value = convert_memory_address_addr_space
5007 (GET_MODE (to_rtx), value,
5008 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
5009
5010 emit_move_insn (to_rtx, value);
5011 }
5012 preserve_temp_slots (to_rtx);
5013 pop_temp_slots ();
5014 return;
5015 }
5016
5017 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5018 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5019
5020 /* Don't move directly into a return register. */
5021 if (TREE_CODE (to) == RESULT_DECL
5022 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
5023 {
5024 rtx temp;
5025
5026 push_temp_slots ();
5027
5028 /* If the source is itself a return value, it still is in a pseudo at
5029 this point so we can move it back to the return register directly. */
5030 if (REG_P (to_rtx)
5031 && TYPE_MODE (TREE_TYPE (from)) == BLKmode
5032 && TREE_CODE (from) != CALL_EXPR)
5033 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
5034 else
5035 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
5036
5037 /* Handle calls that return values in multiple non-contiguous locations.
5038 The Irix 6 ABI has examples of this. */
5039 if (GET_CODE (to_rtx) == PARALLEL)
5040 {
5041 if (GET_CODE (temp) == PARALLEL)
5042 emit_group_move (to_rtx, temp);
5043 else
5044 emit_group_load (to_rtx, temp, TREE_TYPE (from),
5045 int_size_in_bytes (TREE_TYPE (from)));
5046 }
5047 else if (temp)
5048 emit_move_insn (to_rtx, temp);
5049
5050 preserve_temp_slots (to_rtx);
5051 pop_temp_slots ();
5052 return;
5053 }
5054
5055 /* In case we are returning the contents of an object which overlaps
5056 the place the value is being stored, use a safe function when copying
5057 a value through a pointer into a structure value return block. */
5058 if (TREE_CODE (to) == RESULT_DECL
5059 && TREE_CODE (from) == INDIRECT_REF
5060 && ADDR_SPACE_GENERIC_P
5061 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
5062 && refs_may_alias_p (to, from)
5063 && cfun->returns_struct
5064 && !cfun->returns_pcc_struct)
5065 {
5066 rtx from_rtx, size;
5067
5068 push_temp_slots ();
5069 size = expr_size (from);
5070 from_rtx = expand_normal (from);
5071
5072 emit_library_call (memmove_libfunc, LCT_NORMAL,
5073 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
5074 XEXP (from_rtx, 0), Pmode,
5075 convert_to_mode (TYPE_MODE (sizetype),
5076 size, TYPE_UNSIGNED (sizetype)),
5077 TYPE_MODE (sizetype));
5078
5079 preserve_temp_slots (to_rtx);
5080 pop_temp_slots ();
5081 return;
5082 }
5083
5084 /* Compute FROM and store the value in the rtx we got. */
5085
5086 push_temp_slots ();
5087 result = store_expr (from, to_rtx, 0, nontemporal);
5088 preserve_temp_slots (result);
5089 pop_temp_slots ();
5090 return;
5091 }
5092
5093 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5094 succeeded, false otherwise. */
5095
5096 bool
5097 emit_storent_insn (rtx to, rtx from)
5098 {
5099 struct expand_operand ops[2];
5100 enum machine_mode mode = GET_MODE (to);
5101 enum insn_code code = optab_handler (storent_optab, mode);
5102
5103 if (code == CODE_FOR_nothing)
5104 return false;
5105
5106 create_fixed_operand (&ops[0], to);
5107 create_input_operand (&ops[1], from, mode);
5108 return maybe_expand_insn (code, 2, ops);
5109 }
5110
5111 /* Generate code for computing expression EXP,
5112 and storing the value into TARGET.
5113
5114 If the mode is BLKmode then we may return TARGET itself.
5115 It turns out that in BLKmode it doesn't cause a problem.
5116 because C has no operators that could combine two different
5117 assignments into the same BLKmode object with different values
5118 with no sequence point. Will other languages need this to
5119 be more thorough?
5120
5121 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5122 stack, and block moves may need to be treated specially.
5123
5124 If NONTEMPORAL is true, try using a nontemporal store instruction. */
5125
5126 rtx
5127 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
5128 {
5129 rtx temp;
5130 rtx alt_rtl = NULL_RTX;
5131 location_t loc = curr_insn_location ();
5132
5133 if (VOID_TYPE_P (TREE_TYPE (exp)))
5134 {
5135 /* C++ can generate ?: expressions with a throw expression in one
5136 branch and an rvalue in the other. Here, we resolve attempts to
5137 store the throw expression's nonexistent result. */
5138 gcc_assert (!call_param_p);
5139 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5140 return NULL_RTX;
5141 }
5142 if (TREE_CODE (exp) == COMPOUND_EXPR)
5143 {
5144 /* Perform first part of compound expression, then assign from second
5145 part. */
5146 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5147 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5148 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5149 nontemporal);
5150 }
5151 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5152 {
5153 /* For conditional expression, get safe form of the target. Then
5154 test the condition, doing the appropriate assignment on either
5155 side. This avoids the creation of unnecessary temporaries.
5156 For non-BLKmode, it is more efficient not to do this. */
5157
5158 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
5159
5160 do_pending_stack_adjust ();
5161 NO_DEFER_POP;
5162 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5163 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5164 nontemporal);
5165 emit_jump_insn (gen_jump (lab2));
5166 emit_barrier ();
5167 emit_label (lab1);
5168 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5169 nontemporal);
5170 emit_label (lab2);
5171 OK_DEFER_POP;
5172
5173 return NULL_RTX;
5174 }
5175 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5176 /* If this is a scalar in a register that is stored in a wider mode
5177 than the declared mode, compute the result into its declared mode
5178 and then convert to the wider mode. Our value is the computed
5179 expression. */
5180 {
5181 rtx inner_target = 0;
5182
5183 /* We can do the conversion inside EXP, which will often result
5184 in some optimizations. Do the conversion in two steps: first
5185 change the signedness, if needed, then the extend. But don't
5186 do this if the type of EXP is a subtype of something else
5187 since then the conversion might involve more than just
5188 converting modes. */
5189 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5190 && TREE_TYPE (TREE_TYPE (exp)) == 0
5191 && GET_MODE_PRECISION (GET_MODE (target))
5192 == TYPE_PRECISION (TREE_TYPE (exp)))
5193 {
5194 if (TYPE_UNSIGNED (TREE_TYPE (exp))
5195 != SUBREG_PROMOTED_UNSIGNED_P (target))
5196 {
5197 /* Some types, e.g. Fortran's logical*4, won't have a signed
5198 version, so use the mode instead. */
5199 tree ntype
5200 = (signed_or_unsigned_type_for
5201 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
5202 if (ntype == NULL)
5203 ntype = lang_hooks.types.type_for_mode
5204 (TYPE_MODE (TREE_TYPE (exp)),
5205 SUBREG_PROMOTED_UNSIGNED_P (target));
5206
5207 exp = fold_convert_loc (loc, ntype, exp);
5208 }
5209
5210 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5211 (GET_MODE (SUBREG_REG (target)),
5212 SUBREG_PROMOTED_UNSIGNED_P (target)),
5213 exp);
5214
5215 inner_target = SUBREG_REG (target);
5216 }
5217
5218 temp = expand_expr (exp, inner_target, VOIDmode,
5219 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5220
5221 /* If TEMP is a VOIDmode constant, use convert_modes to make
5222 sure that we properly convert it. */
5223 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5224 {
5225 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5226 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
5227 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5228 GET_MODE (target), temp,
5229 SUBREG_PROMOTED_UNSIGNED_P (target));
5230 }
5231
5232 convert_move (SUBREG_REG (target), temp,
5233 SUBREG_PROMOTED_UNSIGNED_P (target));
5234
5235 return NULL_RTX;
5236 }
5237 else if ((TREE_CODE (exp) == STRING_CST
5238 || (TREE_CODE (exp) == MEM_REF
5239 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5240 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5241 == STRING_CST
5242 && integer_zerop (TREE_OPERAND (exp, 1))))
5243 && !nontemporal && !call_param_p
5244 && MEM_P (target))
5245 {
5246 /* Optimize initialization of an array with a STRING_CST. */
5247 HOST_WIDE_INT exp_len, str_copy_len;
5248 rtx dest_mem;
5249 tree str = TREE_CODE (exp) == STRING_CST
5250 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5251
5252 exp_len = int_expr_size (exp);
5253 if (exp_len <= 0)
5254 goto normal_expr;
5255
5256 if (TREE_STRING_LENGTH (str) <= 0)
5257 goto normal_expr;
5258
5259 str_copy_len = strlen (TREE_STRING_POINTER (str));
5260 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5261 goto normal_expr;
5262
5263 str_copy_len = TREE_STRING_LENGTH (str);
5264 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5265 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5266 {
5267 str_copy_len += STORE_MAX_PIECES - 1;
5268 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5269 }
5270 str_copy_len = MIN (str_copy_len, exp_len);
5271 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5272 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5273 MEM_ALIGN (target), false))
5274 goto normal_expr;
5275
5276 dest_mem = target;
5277
5278 dest_mem = store_by_pieces (dest_mem,
5279 str_copy_len, builtin_strncpy_read_str,
5280 CONST_CAST (char *,
5281 TREE_STRING_POINTER (str)),
5282 MEM_ALIGN (target), false,
5283 exp_len > str_copy_len ? 1 : 0);
5284 if (exp_len > str_copy_len)
5285 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5286 GEN_INT (exp_len - str_copy_len),
5287 BLOCK_OP_NORMAL);
5288 return NULL_RTX;
5289 }
5290 else
5291 {
5292 rtx tmp_target;
5293
5294 normal_expr:
5295 /* If we want to use a nontemporal store, force the value to
5296 register first. */
5297 tmp_target = nontemporal ? NULL_RTX : target;
5298 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5299 (call_param_p
5300 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5301 &alt_rtl);
5302 }
5303
5304 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5305 the same as that of TARGET, adjust the constant. This is needed, for
5306 example, in case it is a CONST_DOUBLE and we want only a word-sized
5307 value. */
5308 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5309 && TREE_CODE (exp) != ERROR_MARK
5310 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5311 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5312 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5313
5314 /* If value was not generated in the target, store it there.
5315 Convert the value to TARGET's type first if necessary and emit the
5316 pending incrementations that have been queued when expanding EXP.
5317 Note that we cannot emit the whole queue blindly because this will
5318 effectively disable the POST_INC optimization later.
5319
5320 If TEMP and TARGET compare equal according to rtx_equal_p, but
5321 one or both of them are volatile memory refs, we have to distinguish
5322 two cases:
5323 - expand_expr has used TARGET. In this case, we must not generate
5324 another copy. This can be detected by TARGET being equal according
5325 to == .
5326 - expand_expr has not used TARGET - that means that the source just
5327 happens to have the same RTX form. Since temp will have been created
5328 by expand_expr, it will compare unequal according to == .
5329 We must generate a copy in this case, to reach the correct number
5330 of volatile memory references. */
5331
5332 if ((! rtx_equal_p (temp, target)
5333 || (temp != target && (side_effects_p (temp)
5334 || side_effects_p (target))))
5335 && TREE_CODE (exp) != ERROR_MARK
5336 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5337 but TARGET is not valid memory reference, TEMP will differ
5338 from TARGET although it is really the same location. */
5339 && !(alt_rtl
5340 && rtx_equal_p (alt_rtl, target)
5341 && !side_effects_p (alt_rtl)
5342 && !side_effects_p (target))
5343 /* If there's nothing to copy, don't bother. Don't call
5344 expr_size unless necessary, because some front-ends (C++)
5345 expr_size-hook must not be given objects that are not
5346 supposed to be bit-copied or bit-initialized. */
5347 && expr_size (exp) != const0_rtx)
5348 {
5349 if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode)
5350 {
5351 if (GET_MODE (target) == BLKmode)
5352 {
5353 /* Handle calls that return BLKmode values in registers. */
5354 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
5355 copy_blkmode_from_reg (target, temp, TREE_TYPE (exp));
5356 else
5357 store_bit_field (target,
5358 INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5359 0, 0, 0, GET_MODE (temp), temp);
5360 }
5361 else
5362 convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5363 }
5364
5365 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5366 {
5367 /* Handle copying a string constant into an array. The string
5368 constant may be shorter than the array. So copy just the string's
5369 actual length, and clear the rest. First get the size of the data
5370 type of the string, which is actually the size of the target. */
5371 rtx size = expr_size (exp);
5372
5373 if (CONST_INT_P (size)
5374 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5375 emit_block_move (target, temp, size,
5376 (call_param_p
5377 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5378 else
5379 {
5380 enum machine_mode pointer_mode
5381 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5382 enum machine_mode address_mode = get_address_mode (target);
5383
5384 /* Compute the size of the data to copy from the string. */
5385 tree copy_size
5386 = size_binop_loc (loc, MIN_EXPR,
5387 make_tree (sizetype, size),
5388 size_int (TREE_STRING_LENGTH (exp)));
5389 rtx copy_size_rtx
5390 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5391 (call_param_p
5392 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5393 rtx label = 0;
5394
5395 /* Copy that much. */
5396 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5397 TYPE_UNSIGNED (sizetype));
5398 emit_block_move (target, temp, copy_size_rtx,
5399 (call_param_p
5400 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5401
5402 /* Figure out how much is left in TARGET that we have to clear.
5403 Do all calculations in pointer_mode. */
5404 if (CONST_INT_P (copy_size_rtx))
5405 {
5406 size = plus_constant (address_mode, size,
5407 -INTVAL (copy_size_rtx));
5408 target = adjust_address (target, BLKmode,
5409 INTVAL (copy_size_rtx));
5410 }
5411 else
5412 {
5413 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5414 copy_size_rtx, NULL_RTX, 0,
5415 OPTAB_LIB_WIDEN);
5416
5417 if (GET_MODE (copy_size_rtx) != address_mode)
5418 copy_size_rtx = convert_to_mode (address_mode,
5419 copy_size_rtx,
5420 TYPE_UNSIGNED (sizetype));
5421
5422 target = offset_address (target, copy_size_rtx,
5423 highest_pow2_factor (copy_size));
5424 label = gen_label_rtx ();
5425 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5426 GET_MODE (size), 0, label);
5427 }
5428
5429 if (size != const0_rtx)
5430 clear_storage (target, size, BLOCK_OP_NORMAL);
5431
5432 if (label)
5433 emit_label (label);
5434 }
5435 }
5436 /* Handle calls that return values in multiple non-contiguous locations.
5437 The Irix 6 ABI has examples of this. */
5438 else if (GET_CODE (target) == PARALLEL)
5439 {
5440 if (GET_CODE (temp) == PARALLEL)
5441 emit_group_move (target, temp);
5442 else
5443 emit_group_load (target, temp, TREE_TYPE (exp),
5444 int_size_in_bytes (TREE_TYPE (exp)));
5445 }
5446 else if (GET_CODE (temp) == PARALLEL)
5447 emit_group_store (target, temp, TREE_TYPE (exp),
5448 int_size_in_bytes (TREE_TYPE (exp)));
5449 else if (GET_MODE (temp) == BLKmode)
5450 emit_block_move (target, temp, expr_size (exp),
5451 (call_param_p
5452 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5453 /* If we emit a nontemporal store, there is nothing else to do. */
5454 else if (nontemporal && emit_storent_insn (target, temp))
5455 ;
5456 else
5457 {
5458 temp = force_operand (temp, target);
5459 if (temp != target)
5460 emit_move_insn (target, temp);
5461 }
5462 }
5463
5464 return NULL_RTX;
5465 }
5466 \f
5467 /* Return true if field F of structure TYPE is a flexible array. */
5468
5469 static bool
5470 flexible_array_member_p (const_tree f, const_tree type)
5471 {
5472 const_tree tf;
5473
5474 tf = TREE_TYPE (f);
5475 return (DECL_CHAIN (f) == NULL
5476 && TREE_CODE (tf) == ARRAY_TYPE
5477 && TYPE_DOMAIN (tf)
5478 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5479 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5480 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5481 && int_size_in_bytes (type) >= 0);
5482 }
5483
5484 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5485 must have in order for it to completely initialize a value of type TYPE.
5486 Return -1 if the number isn't known.
5487
5488 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5489
5490 static HOST_WIDE_INT
5491 count_type_elements (const_tree type, bool for_ctor_p)
5492 {
5493 switch (TREE_CODE (type))
5494 {
5495 case ARRAY_TYPE:
5496 {
5497 tree nelts;
5498
5499 nelts = array_type_nelts (type);
5500 if (nelts && tree_fits_uhwi_p (nelts))
5501 {
5502 unsigned HOST_WIDE_INT n;
5503
5504 n = tree_to_uhwi (nelts) + 1;
5505 if (n == 0 || for_ctor_p)
5506 return n;
5507 else
5508 return n * count_type_elements (TREE_TYPE (type), false);
5509 }
5510 return for_ctor_p ? -1 : 1;
5511 }
5512
5513 case RECORD_TYPE:
5514 {
5515 unsigned HOST_WIDE_INT n;
5516 tree f;
5517
5518 n = 0;
5519 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5520 if (TREE_CODE (f) == FIELD_DECL)
5521 {
5522 if (!for_ctor_p)
5523 n += count_type_elements (TREE_TYPE (f), false);
5524 else if (!flexible_array_member_p (f, type))
5525 /* Don't count flexible arrays, which are not supposed
5526 to be initialized. */
5527 n += 1;
5528 }
5529
5530 return n;
5531 }
5532
5533 case UNION_TYPE:
5534 case QUAL_UNION_TYPE:
5535 {
5536 tree f;
5537 HOST_WIDE_INT n, m;
5538
5539 gcc_assert (!for_ctor_p);
5540 /* Estimate the number of scalars in each field and pick the
5541 maximum. Other estimates would do instead; the idea is simply
5542 to make sure that the estimate is not sensitive to the ordering
5543 of the fields. */
5544 n = 1;
5545 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5546 if (TREE_CODE (f) == FIELD_DECL)
5547 {
5548 m = count_type_elements (TREE_TYPE (f), false);
5549 /* If the field doesn't span the whole union, add an extra
5550 scalar for the rest. */
5551 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5552 TYPE_SIZE (type)) != 1)
5553 m++;
5554 if (n < m)
5555 n = m;
5556 }
5557 return n;
5558 }
5559
5560 case COMPLEX_TYPE:
5561 return 2;
5562
5563 case VECTOR_TYPE:
5564 return TYPE_VECTOR_SUBPARTS (type);
5565
5566 case INTEGER_TYPE:
5567 case REAL_TYPE:
5568 case FIXED_POINT_TYPE:
5569 case ENUMERAL_TYPE:
5570 case BOOLEAN_TYPE:
5571 case POINTER_TYPE:
5572 case OFFSET_TYPE:
5573 case REFERENCE_TYPE:
5574 case NULLPTR_TYPE:
5575 return 1;
5576
5577 case ERROR_MARK:
5578 return 0;
5579
5580 case VOID_TYPE:
5581 case METHOD_TYPE:
5582 case FUNCTION_TYPE:
5583 case LANG_TYPE:
5584 default:
5585 gcc_unreachable ();
5586 }
5587 }
5588
5589 /* Helper for categorize_ctor_elements. Identical interface. */
5590
5591 static bool
5592 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5593 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5594 {
5595 unsigned HOST_WIDE_INT idx;
5596 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5597 tree value, purpose, elt_type;
5598
5599 /* Whether CTOR is a valid constant initializer, in accordance with what
5600 initializer_constant_valid_p does. If inferred from the constructor
5601 elements, true until proven otherwise. */
5602 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5603 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5604
5605 nz_elts = 0;
5606 init_elts = 0;
5607 num_fields = 0;
5608 elt_type = NULL_TREE;
5609
5610 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5611 {
5612 HOST_WIDE_INT mult = 1;
5613
5614 if (purpose && TREE_CODE (purpose) == RANGE_EXPR)
5615 {
5616 tree lo_index = TREE_OPERAND (purpose, 0);
5617 tree hi_index = TREE_OPERAND (purpose, 1);
5618
5619 if (tree_fits_uhwi_p (lo_index) && tree_fits_uhwi_p (hi_index))
5620 mult = (tree_to_uhwi (hi_index)
5621 - tree_to_uhwi (lo_index) + 1);
5622 }
5623 num_fields += mult;
5624 elt_type = TREE_TYPE (value);
5625
5626 switch (TREE_CODE (value))
5627 {
5628 case CONSTRUCTOR:
5629 {
5630 HOST_WIDE_INT nz = 0, ic = 0;
5631
5632 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5633 p_complete);
5634
5635 nz_elts += mult * nz;
5636 init_elts += mult * ic;
5637
5638 if (const_from_elts_p && const_p)
5639 const_p = const_elt_p;
5640 }
5641 break;
5642
5643 case INTEGER_CST:
5644 case REAL_CST:
5645 case FIXED_CST:
5646 if (!initializer_zerop (value))
5647 nz_elts += mult;
5648 init_elts += mult;
5649 break;
5650
5651 case STRING_CST:
5652 nz_elts += mult * TREE_STRING_LENGTH (value);
5653 init_elts += mult * TREE_STRING_LENGTH (value);
5654 break;
5655
5656 case COMPLEX_CST:
5657 if (!initializer_zerop (TREE_REALPART (value)))
5658 nz_elts += mult;
5659 if (!initializer_zerop (TREE_IMAGPART (value)))
5660 nz_elts += mult;
5661 init_elts += mult;
5662 break;
5663
5664 case VECTOR_CST:
5665 {
5666 unsigned i;
5667 for (i = 0; i < VECTOR_CST_NELTS (value); ++i)
5668 {
5669 tree v = VECTOR_CST_ELT (value, i);
5670 if (!initializer_zerop (v))
5671 nz_elts += mult;
5672 init_elts += mult;
5673 }
5674 }
5675 break;
5676
5677 default:
5678 {
5679 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5680 nz_elts += mult * tc;
5681 init_elts += mult * tc;
5682
5683 if (const_from_elts_p && const_p)
5684 const_p = initializer_constant_valid_p (value, elt_type)
5685 != NULL_TREE;
5686 }
5687 break;
5688 }
5689 }
5690
5691 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5692 num_fields, elt_type))
5693 *p_complete = false;
5694
5695 *p_nz_elts += nz_elts;
5696 *p_init_elts += init_elts;
5697
5698 return const_p;
5699 }
5700
5701 /* Examine CTOR to discover:
5702 * how many scalar fields are set to nonzero values,
5703 and place it in *P_NZ_ELTS;
5704 * how many scalar fields in total are in CTOR,
5705 and place it in *P_ELT_COUNT.
5706 * whether the constructor is complete -- in the sense that every
5707 meaningful byte is explicitly given a value --
5708 and place it in *P_COMPLETE.
5709
5710 Return whether or not CTOR is a valid static constant initializer, the same
5711 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5712
5713 bool
5714 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5715 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5716 {
5717 *p_nz_elts = 0;
5718 *p_init_elts = 0;
5719 *p_complete = true;
5720
5721 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5722 }
5723
5724 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5725 of which had type LAST_TYPE. Each element was itself a complete
5726 initializer, in the sense that every meaningful byte was explicitly
5727 given a value. Return true if the same is true for the constructor
5728 as a whole. */
5729
5730 bool
5731 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5732 const_tree last_type)
5733 {
5734 if (TREE_CODE (type) == UNION_TYPE
5735 || TREE_CODE (type) == QUAL_UNION_TYPE)
5736 {
5737 if (num_elts == 0)
5738 return false;
5739
5740 gcc_assert (num_elts == 1 && last_type);
5741
5742 /* ??? We could look at each element of the union, and find the
5743 largest element. Which would avoid comparing the size of the
5744 initialized element against any tail padding in the union.
5745 Doesn't seem worth the effort... */
5746 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5747 }
5748
5749 return count_type_elements (type, true) == num_elts;
5750 }
5751
5752 /* Return 1 if EXP contains mostly (3/4) zeros. */
5753
5754 static int
5755 mostly_zeros_p (const_tree exp)
5756 {
5757 if (TREE_CODE (exp) == CONSTRUCTOR)
5758 {
5759 HOST_WIDE_INT nz_elts, init_elts;
5760 bool complete_p;
5761
5762 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5763 return !complete_p || nz_elts < init_elts / 4;
5764 }
5765
5766 return initializer_zerop (exp);
5767 }
5768
5769 /* Return 1 if EXP contains all zeros. */
5770
5771 static int
5772 all_zeros_p (const_tree exp)
5773 {
5774 if (TREE_CODE (exp) == CONSTRUCTOR)
5775 {
5776 HOST_WIDE_INT nz_elts, init_elts;
5777 bool complete_p;
5778
5779 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5780 return nz_elts == 0;
5781 }
5782
5783 return initializer_zerop (exp);
5784 }
5785 \f
5786 /* Helper function for store_constructor.
5787 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5788 CLEARED is as for store_constructor.
5789 ALIAS_SET is the alias set to use for any stores.
5790
5791 This provides a recursive shortcut back to store_constructor when it isn't
5792 necessary to go through store_field. This is so that we can pass through
5793 the cleared field to let store_constructor know that we may not have to
5794 clear a substructure if the outer structure has already been cleared. */
5795
5796 static void
5797 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5798 HOST_WIDE_INT bitpos, enum machine_mode mode,
5799 tree exp, int cleared, alias_set_type alias_set)
5800 {
5801 if (TREE_CODE (exp) == CONSTRUCTOR
5802 /* We can only call store_constructor recursively if the size and
5803 bit position are on a byte boundary. */
5804 && bitpos % BITS_PER_UNIT == 0
5805 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5806 /* If we have a nonzero bitpos for a register target, then we just
5807 let store_field do the bitfield handling. This is unlikely to
5808 generate unnecessary clear instructions anyways. */
5809 && (bitpos == 0 || MEM_P (target)))
5810 {
5811 if (MEM_P (target))
5812 target
5813 = adjust_address (target,
5814 GET_MODE (target) == BLKmode
5815 || 0 != (bitpos
5816 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5817 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5818
5819
5820 /* Update the alias set, if required. */
5821 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5822 && MEM_ALIAS_SET (target) != 0)
5823 {
5824 target = copy_rtx (target);
5825 set_mem_alias_set (target, alias_set);
5826 }
5827
5828 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5829 }
5830 else
5831 store_field (target, bitsize, bitpos, 0, 0, mode, exp, alias_set, false);
5832 }
5833
5834
5835 /* Returns the number of FIELD_DECLs in TYPE. */
5836
5837 static int
5838 fields_length (const_tree type)
5839 {
5840 tree t = TYPE_FIELDS (type);
5841 int count = 0;
5842
5843 for (; t; t = DECL_CHAIN (t))
5844 if (TREE_CODE (t) == FIELD_DECL)
5845 ++count;
5846
5847 return count;
5848 }
5849
5850
5851 /* Store the value of constructor EXP into the rtx TARGET.
5852 TARGET is either a REG or a MEM; we know it cannot conflict, since
5853 safe_from_p has been called.
5854 CLEARED is true if TARGET is known to have been zero'd.
5855 SIZE is the number of bytes of TARGET we are allowed to modify: this
5856 may not be the same as the size of EXP if we are assigning to a field
5857 which has been packed to exclude padding bits. */
5858
5859 static void
5860 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5861 {
5862 tree type = TREE_TYPE (exp);
5863 #ifdef WORD_REGISTER_OPERATIONS
5864 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5865 #endif
5866
5867 switch (TREE_CODE (type))
5868 {
5869 case RECORD_TYPE:
5870 case UNION_TYPE:
5871 case QUAL_UNION_TYPE:
5872 {
5873 unsigned HOST_WIDE_INT idx;
5874 tree field, value;
5875
5876 /* If size is zero or the target is already cleared, do nothing. */
5877 if (size == 0 || cleared)
5878 cleared = 1;
5879 /* We either clear the aggregate or indicate the value is dead. */
5880 else if ((TREE_CODE (type) == UNION_TYPE
5881 || TREE_CODE (type) == QUAL_UNION_TYPE)
5882 && ! CONSTRUCTOR_ELTS (exp))
5883 /* If the constructor is empty, clear the union. */
5884 {
5885 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5886 cleared = 1;
5887 }
5888
5889 /* If we are building a static constructor into a register,
5890 set the initial value as zero so we can fold the value into
5891 a constant. But if more than one register is involved,
5892 this probably loses. */
5893 else if (REG_P (target) && TREE_STATIC (exp)
5894 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5895 {
5896 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5897 cleared = 1;
5898 }
5899
5900 /* If the constructor has fewer fields than the structure or
5901 if we are initializing the structure to mostly zeros, clear
5902 the whole structure first. Don't do this if TARGET is a
5903 register whose mode size isn't equal to SIZE since
5904 clear_storage can't handle this case. */
5905 else if (size > 0
5906 && (((int)vec_safe_length (CONSTRUCTOR_ELTS (exp))
5907 != fields_length (type))
5908 || mostly_zeros_p (exp))
5909 && (!REG_P (target)
5910 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5911 == size)))
5912 {
5913 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5914 cleared = 1;
5915 }
5916
5917 if (REG_P (target) && !cleared)
5918 emit_clobber (target);
5919
5920 /* Store each element of the constructor into the
5921 corresponding field of TARGET. */
5922 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5923 {
5924 enum machine_mode mode;
5925 HOST_WIDE_INT bitsize;
5926 HOST_WIDE_INT bitpos = 0;
5927 tree offset;
5928 rtx to_rtx = target;
5929
5930 /* Just ignore missing fields. We cleared the whole
5931 structure, above, if any fields are missing. */
5932 if (field == 0)
5933 continue;
5934
5935 if (cleared && initializer_zerop (value))
5936 continue;
5937
5938 if (tree_fits_uhwi_p (DECL_SIZE (field)))
5939 bitsize = tree_to_uhwi (DECL_SIZE (field));
5940 else
5941 bitsize = -1;
5942
5943 mode = DECL_MODE (field);
5944 if (DECL_BIT_FIELD (field))
5945 mode = VOIDmode;
5946
5947 offset = DECL_FIELD_OFFSET (field);
5948 if (tree_fits_shwi_p (offset)
5949 && tree_fits_shwi_p (bit_position (field)))
5950 {
5951 bitpos = int_bit_position (field);
5952 offset = 0;
5953 }
5954 else
5955 bitpos = tree_to_shwi (DECL_FIELD_BIT_OFFSET (field));
5956
5957 if (offset)
5958 {
5959 enum machine_mode address_mode;
5960 rtx offset_rtx;
5961
5962 offset
5963 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5964 make_tree (TREE_TYPE (exp),
5965 target));
5966
5967 offset_rtx = expand_normal (offset);
5968 gcc_assert (MEM_P (to_rtx));
5969
5970 address_mode = get_address_mode (to_rtx);
5971 if (GET_MODE (offset_rtx) != address_mode)
5972 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5973
5974 to_rtx = offset_address (to_rtx, offset_rtx,
5975 highest_pow2_factor (offset));
5976 }
5977
5978 #ifdef WORD_REGISTER_OPERATIONS
5979 /* If this initializes a field that is smaller than a
5980 word, at the start of a word, try to widen it to a full
5981 word. This special case allows us to output C++ member
5982 function initializations in a form that the optimizers
5983 can understand. */
5984 if (REG_P (target)
5985 && bitsize < BITS_PER_WORD
5986 && bitpos % BITS_PER_WORD == 0
5987 && GET_MODE_CLASS (mode) == MODE_INT
5988 && TREE_CODE (value) == INTEGER_CST
5989 && exp_size >= 0
5990 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5991 {
5992 tree type = TREE_TYPE (value);
5993
5994 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5995 {
5996 type = lang_hooks.types.type_for_mode
5997 (word_mode, TYPE_UNSIGNED (type));
5998 value = fold_convert (type, value);
5999 }
6000
6001 if (BYTES_BIG_ENDIAN)
6002 value
6003 = fold_build2 (LSHIFT_EXPR, type, value,
6004 build_int_cst (type,
6005 BITS_PER_WORD - bitsize));
6006 bitsize = BITS_PER_WORD;
6007 mode = word_mode;
6008 }
6009 #endif
6010
6011 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
6012 && DECL_NONADDRESSABLE_P (field))
6013 {
6014 to_rtx = copy_rtx (to_rtx);
6015 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
6016 }
6017
6018 store_constructor_field (to_rtx, bitsize, bitpos, mode,
6019 value, cleared,
6020 get_alias_set (TREE_TYPE (field)));
6021 }
6022 break;
6023 }
6024 case ARRAY_TYPE:
6025 {
6026 tree value, index;
6027 unsigned HOST_WIDE_INT i;
6028 int need_to_clear;
6029 tree domain;
6030 tree elttype = TREE_TYPE (type);
6031 int const_bounds_p;
6032 HOST_WIDE_INT minelt = 0;
6033 HOST_WIDE_INT maxelt = 0;
6034
6035 domain = TYPE_DOMAIN (type);
6036 const_bounds_p = (TYPE_MIN_VALUE (domain)
6037 && TYPE_MAX_VALUE (domain)
6038 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain))
6039 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain)));
6040
6041 /* If we have constant bounds for the range of the type, get them. */
6042 if (const_bounds_p)
6043 {
6044 minelt = tree_to_shwi (TYPE_MIN_VALUE (domain));
6045 maxelt = tree_to_shwi (TYPE_MAX_VALUE (domain));
6046 }
6047
6048 /* If the constructor has fewer elements than the array, clear
6049 the whole array first. Similarly if this is static
6050 constructor of a non-BLKmode object. */
6051 if (cleared)
6052 need_to_clear = 0;
6053 else if (REG_P (target) && TREE_STATIC (exp))
6054 need_to_clear = 1;
6055 else
6056 {
6057 unsigned HOST_WIDE_INT idx;
6058 tree index, value;
6059 HOST_WIDE_INT count = 0, zero_count = 0;
6060 need_to_clear = ! const_bounds_p;
6061
6062 /* This loop is a more accurate version of the loop in
6063 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6064 is also needed to check for missing elements. */
6065 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
6066 {
6067 HOST_WIDE_INT this_node_count;
6068
6069 if (need_to_clear)
6070 break;
6071
6072 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6073 {
6074 tree lo_index = TREE_OPERAND (index, 0);
6075 tree hi_index = TREE_OPERAND (index, 1);
6076
6077 if (! tree_fits_uhwi_p (lo_index)
6078 || ! tree_fits_uhwi_p (hi_index))
6079 {
6080 need_to_clear = 1;
6081 break;
6082 }
6083
6084 this_node_count = (tree_to_uhwi (hi_index)
6085 - tree_to_uhwi (lo_index) + 1);
6086 }
6087 else
6088 this_node_count = 1;
6089
6090 count += this_node_count;
6091 if (mostly_zeros_p (value))
6092 zero_count += this_node_count;
6093 }
6094
6095 /* Clear the entire array first if there are any missing
6096 elements, or if the incidence of zero elements is >=
6097 75%. */
6098 if (! need_to_clear
6099 && (count < maxelt - minelt + 1
6100 || 4 * zero_count >= 3 * count))
6101 need_to_clear = 1;
6102 }
6103
6104 if (need_to_clear && size > 0)
6105 {
6106 if (REG_P (target))
6107 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6108 else
6109 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6110 cleared = 1;
6111 }
6112
6113 if (!cleared && REG_P (target))
6114 /* Inform later passes that the old value is dead. */
6115 emit_clobber (target);
6116
6117 /* Store each element of the constructor into the
6118 corresponding element of TARGET, determined by counting the
6119 elements. */
6120 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
6121 {
6122 enum machine_mode mode;
6123 HOST_WIDE_INT bitsize;
6124 HOST_WIDE_INT bitpos;
6125 rtx xtarget = target;
6126
6127 if (cleared && initializer_zerop (value))
6128 continue;
6129
6130 mode = TYPE_MODE (elttype);
6131 if (mode == BLKmode)
6132 bitsize = (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6133 ? tree_to_uhwi (TYPE_SIZE (elttype))
6134 : -1);
6135 else
6136 bitsize = GET_MODE_BITSIZE (mode);
6137
6138 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6139 {
6140 tree lo_index = TREE_OPERAND (index, 0);
6141 tree hi_index = TREE_OPERAND (index, 1);
6142 rtx index_r, pos_rtx;
6143 HOST_WIDE_INT lo, hi, count;
6144 tree position;
6145
6146 /* If the range is constant and "small", unroll the loop. */
6147 if (const_bounds_p
6148 && tree_fits_shwi_p (lo_index)
6149 && tree_fits_shwi_p (hi_index)
6150 && (lo = tree_to_shwi (lo_index),
6151 hi = tree_to_shwi (hi_index),
6152 count = hi - lo + 1,
6153 (!MEM_P (target)
6154 || count <= 2
6155 || (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6156 && (tree_to_uhwi (TYPE_SIZE (elttype)) * count
6157 <= 40 * 8)))))
6158 {
6159 lo -= minelt; hi -= minelt;
6160 for (; lo <= hi; lo++)
6161 {
6162 bitpos = lo * tree_to_shwi (TYPE_SIZE (elttype));
6163
6164 if (MEM_P (target)
6165 && !MEM_KEEP_ALIAS_SET_P (target)
6166 && TREE_CODE (type) == ARRAY_TYPE
6167 && TYPE_NONALIASED_COMPONENT (type))
6168 {
6169 target = copy_rtx (target);
6170 MEM_KEEP_ALIAS_SET_P (target) = 1;
6171 }
6172
6173 store_constructor_field
6174 (target, bitsize, bitpos, mode, value, cleared,
6175 get_alias_set (elttype));
6176 }
6177 }
6178 else
6179 {
6180 rtx loop_start = gen_label_rtx ();
6181 rtx loop_end = gen_label_rtx ();
6182 tree exit_cond;
6183
6184 expand_normal (hi_index);
6185
6186 index = build_decl (EXPR_LOCATION (exp),
6187 VAR_DECL, NULL_TREE, domain);
6188 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6189 SET_DECL_RTL (index, index_r);
6190 store_expr (lo_index, index_r, 0, false);
6191
6192 /* Build the head of the loop. */
6193 do_pending_stack_adjust ();
6194 emit_label (loop_start);
6195
6196 /* Assign value to element index. */
6197 position =
6198 fold_convert (ssizetype,
6199 fold_build2 (MINUS_EXPR,
6200 TREE_TYPE (index),
6201 index,
6202 TYPE_MIN_VALUE (domain)));
6203
6204 position =
6205 size_binop (MULT_EXPR, position,
6206 fold_convert (ssizetype,
6207 TYPE_SIZE_UNIT (elttype)));
6208
6209 pos_rtx = expand_normal (position);
6210 xtarget = offset_address (target, pos_rtx,
6211 highest_pow2_factor (position));
6212 xtarget = adjust_address (xtarget, mode, 0);
6213 if (TREE_CODE (value) == CONSTRUCTOR)
6214 store_constructor (value, xtarget, cleared,
6215 bitsize / BITS_PER_UNIT);
6216 else
6217 store_expr (value, xtarget, 0, false);
6218
6219 /* Generate a conditional jump to exit the loop. */
6220 exit_cond = build2 (LT_EXPR, integer_type_node,
6221 index, hi_index);
6222 jumpif (exit_cond, loop_end, -1);
6223
6224 /* Update the loop counter, and jump to the head of
6225 the loop. */
6226 expand_assignment (index,
6227 build2 (PLUS_EXPR, TREE_TYPE (index),
6228 index, integer_one_node),
6229 false);
6230
6231 emit_jump (loop_start);
6232
6233 /* Build the end of the loop. */
6234 emit_label (loop_end);
6235 }
6236 }
6237 else if ((index != 0 && ! tree_fits_shwi_p (index))
6238 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype)))
6239 {
6240 tree position;
6241
6242 if (index == 0)
6243 index = ssize_int (1);
6244
6245 if (minelt)
6246 index = fold_convert (ssizetype,
6247 fold_build2 (MINUS_EXPR,
6248 TREE_TYPE (index),
6249 index,
6250 TYPE_MIN_VALUE (domain)));
6251
6252 position =
6253 size_binop (MULT_EXPR, index,
6254 fold_convert (ssizetype,
6255 TYPE_SIZE_UNIT (elttype)));
6256 xtarget = offset_address (target,
6257 expand_normal (position),
6258 highest_pow2_factor (position));
6259 xtarget = adjust_address (xtarget, mode, 0);
6260 store_expr (value, xtarget, 0, false);
6261 }
6262 else
6263 {
6264 if (index != 0)
6265 bitpos = ((tree_to_shwi (index) - minelt)
6266 * tree_to_uhwi (TYPE_SIZE (elttype)));
6267 else
6268 bitpos = (i * tree_to_uhwi (TYPE_SIZE (elttype)));
6269
6270 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6271 && TREE_CODE (type) == ARRAY_TYPE
6272 && TYPE_NONALIASED_COMPONENT (type))
6273 {
6274 target = copy_rtx (target);
6275 MEM_KEEP_ALIAS_SET_P (target) = 1;
6276 }
6277 store_constructor_field (target, bitsize, bitpos, mode, value,
6278 cleared, get_alias_set (elttype));
6279 }
6280 }
6281 break;
6282 }
6283
6284 case VECTOR_TYPE:
6285 {
6286 unsigned HOST_WIDE_INT idx;
6287 constructor_elt *ce;
6288 int i;
6289 int need_to_clear;
6290 int icode = CODE_FOR_nothing;
6291 tree elttype = TREE_TYPE (type);
6292 int elt_size = tree_to_uhwi (TYPE_SIZE (elttype));
6293 enum machine_mode eltmode = TYPE_MODE (elttype);
6294 HOST_WIDE_INT bitsize;
6295 HOST_WIDE_INT bitpos;
6296 rtvec vector = NULL;
6297 unsigned n_elts;
6298 alias_set_type alias;
6299
6300 gcc_assert (eltmode != BLKmode);
6301
6302 n_elts = TYPE_VECTOR_SUBPARTS (type);
6303 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6304 {
6305 enum machine_mode mode = GET_MODE (target);
6306
6307 icode = (int) optab_handler (vec_init_optab, mode);
6308 /* Don't use vec_init<mode> if some elements have VECTOR_TYPE. */
6309 if (icode != CODE_FOR_nothing)
6310 {
6311 tree value;
6312
6313 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6314 if (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE)
6315 {
6316 icode = CODE_FOR_nothing;
6317 break;
6318 }
6319 }
6320 if (icode != CODE_FOR_nothing)
6321 {
6322 unsigned int i;
6323
6324 vector = rtvec_alloc (n_elts);
6325 for (i = 0; i < n_elts; i++)
6326 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6327 }
6328 }
6329
6330 /* If the constructor has fewer elements than the vector,
6331 clear the whole array first. Similarly if this is static
6332 constructor of a non-BLKmode object. */
6333 if (cleared)
6334 need_to_clear = 0;
6335 else if (REG_P (target) && TREE_STATIC (exp))
6336 need_to_clear = 1;
6337 else
6338 {
6339 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6340 tree value;
6341
6342 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6343 {
6344 int n_elts_here = tree_to_uhwi
6345 (int_const_binop (TRUNC_DIV_EXPR,
6346 TYPE_SIZE (TREE_TYPE (value)),
6347 TYPE_SIZE (elttype)));
6348
6349 count += n_elts_here;
6350 if (mostly_zeros_p (value))
6351 zero_count += n_elts_here;
6352 }
6353
6354 /* Clear the entire vector first if there are any missing elements,
6355 or if the incidence of zero elements is >= 75%. */
6356 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6357 }
6358
6359 if (need_to_clear && size > 0 && !vector)
6360 {
6361 if (REG_P (target))
6362 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6363 else
6364 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6365 cleared = 1;
6366 }
6367
6368 /* Inform later passes that the old value is dead. */
6369 if (!cleared && !vector && REG_P (target))
6370 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6371
6372 if (MEM_P (target))
6373 alias = MEM_ALIAS_SET (target);
6374 else
6375 alias = get_alias_set (elttype);
6376
6377 /* Store each element of the constructor into the corresponding
6378 element of TARGET, determined by counting the elements. */
6379 for (idx = 0, i = 0;
6380 vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce);
6381 idx++, i += bitsize / elt_size)
6382 {
6383 HOST_WIDE_INT eltpos;
6384 tree value = ce->value;
6385
6386 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value)));
6387 if (cleared && initializer_zerop (value))
6388 continue;
6389
6390 if (ce->index)
6391 eltpos = tree_to_uhwi (ce->index);
6392 else
6393 eltpos = i;
6394
6395 if (vector)
6396 {
6397 /* vec_init<mode> should not be used if there are VECTOR_TYPE
6398 elements. */
6399 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6400 RTVEC_ELT (vector, eltpos)
6401 = expand_normal (value);
6402 }
6403 else
6404 {
6405 enum machine_mode value_mode =
6406 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6407 ? TYPE_MODE (TREE_TYPE (value))
6408 : eltmode;
6409 bitpos = eltpos * elt_size;
6410 store_constructor_field (target, bitsize, bitpos, value_mode,
6411 value, cleared, alias);
6412 }
6413 }
6414
6415 if (vector)
6416 emit_insn (GEN_FCN (icode)
6417 (target,
6418 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6419 break;
6420 }
6421
6422 default:
6423 gcc_unreachable ();
6424 }
6425 }
6426
6427 /* Store the value of EXP (an expression tree)
6428 into a subfield of TARGET which has mode MODE and occupies
6429 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6430 If MODE is VOIDmode, it means that we are storing into a bit-field.
6431
6432 BITREGION_START is bitpos of the first bitfield in this region.
6433 BITREGION_END is the bitpos of the ending bitfield in this region.
6434 These two fields are 0, if the C++ memory model does not apply,
6435 or we are not interested in keeping track of bitfield regions.
6436
6437 Always return const0_rtx unless we have something particular to
6438 return.
6439
6440 ALIAS_SET is the alias set for the destination. This value will
6441 (in general) be different from that for TARGET, since TARGET is a
6442 reference to the containing structure.
6443
6444 If NONTEMPORAL is true, try generating a nontemporal store. */
6445
6446 static rtx
6447 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6448 unsigned HOST_WIDE_INT bitregion_start,
6449 unsigned HOST_WIDE_INT bitregion_end,
6450 enum machine_mode mode, tree exp,
6451 alias_set_type alias_set, bool nontemporal)
6452 {
6453 if (TREE_CODE (exp) == ERROR_MARK)
6454 return const0_rtx;
6455
6456 /* If we have nothing to store, do nothing unless the expression has
6457 side-effects. */
6458 if (bitsize == 0)
6459 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6460
6461 if (GET_CODE (target) == CONCAT)
6462 {
6463 /* We're storing into a struct containing a single __complex. */
6464
6465 gcc_assert (!bitpos);
6466 return store_expr (exp, target, 0, nontemporal);
6467 }
6468
6469 /* If the structure is in a register or if the component
6470 is a bit field, we cannot use addressing to access it.
6471 Use bit-field techniques or SUBREG to store in it. */
6472
6473 if (mode == VOIDmode
6474 || (mode != BLKmode && ! direct_store[(int) mode]
6475 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6476 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6477 || REG_P (target)
6478 || GET_CODE (target) == SUBREG
6479 /* If the field isn't aligned enough to store as an ordinary memref,
6480 store it as a bit field. */
6481 || (mode != BLKmode
6482 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6483 || bitpos % GET_MODE_ALIGNMENT (mode))
6484 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6485 || (bitpos % BITS_PER_UNIT != 0)))
6486 || (bitsize >= 0 && mode != BLKmode
6487 && GET_MODE_BITSIZE (mode) > bitsize)
6488 /* If the RHS and field are a constant size and the size of the
6489 RHS isn't the same size as the bitfield, we must use bitfield
6490 operations. */
6491 || (bitsize >= 0
6492 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6493 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6494 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6495 decl we must use bitfield operations. */
6496 || (bitsize >= 0
6497 && TREE_CODE (exp) == MEM_REF
6498 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6499 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6500 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6501 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6502 {
6503 rtx temp;
6504 gimple nop_def;
6505
6506 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6507 implies a mask operation. If the precision is the same size as
6508 the field we're storing into, that mask is redundant. This is
6509 particularly common with bit field assignments generated by the
6510 C front end. */
6511 nop_def = get_def_for_expr (exp, NOP_EXPR);
6512 if (nop_def)
6513 {
6514 tree type = TREE_TYPE (exp);
6515 if (INTEGRAL_TYPE_P (type)
6516 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6517 && bitsize == TYPE_PRECISION (type))
6518 {
6519 tree op = gimple_assign_rhs1 (nop_def);
6520 type = TREE_TYPE (op);
6521 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6522 exp = op;
6523 }
6524 }
6525
6526 temp = expand_normal (exp);
6527
6528 /* If BITSIZE is narrower than the size of the type of EXP
6529 we will be narrowing TEMP. Normally, what's wanted are the
6530 low-order bits. However, if EXP's type is a record and this is
6531 big-endian machine, we want the upper BITSIZE bits. */
6532 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6533 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6534 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6535 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6536 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6537 NULL_RTX, 1);
6538
6539 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6540 if (mode != VOIDmode && mode != BLKmode
6541 && mode != TYPE_MODE (TREE_TYPE (exp)))
6542 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6543
6544 /* If the modes of TEMP and TARGET are both BLKmode, both
6545 must be in memory and BITPOS must be aligned on a byte
6546 boundary. If so, we simply do a block copy. Likewise
6547 for a BLKmode-like TARGET. */
6548 if (GET_MODE (temp) == BLKmode
6549 && (GET_MODE (target) == BLKmode
6550 || (MEM_P (target)
6551 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6552 && (bitpos % BITS_PER_UNIT) == 0
6553 && (bitsize % BITS_PER_UNIT) == 0)))
6554 {
6555 gcc_assert (MEM_P (target) && MEM_P (temp)
6556 && (bitpos % BITS_PER_UNIT) == 0);
6557
6558 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6559 emit_block_move (target, temp,
6560 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6561 / BITS_PER_UNIT),
6562 BLOCK_OP_NORMAL);
6563
6564 return const0_rtx;
6565 }
6566
6567 /* Handle calls that return values in multiple non-contiguous locations.
6568 The Irix 6 ABI has examples of this. */
6569 if (GET_CODE (temp) == PARALLEL)
6570 {
6571 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6572 rtx temp_target;
6573 if (mode == BLKmode)
6574 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6575 temp_target = gen_reg_rtx (mode);
6576 emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
6577 temp = temp_target;
6578 }
6579 else if (mode == BLKmode)
6580 {
6581 /* Handle calls that return BLKmode values in registers. */
6582 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
6583 {
6584 rtx temp_target = gen_reg_rtx (GET_MODE (temp));
6585 copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp));
6586 temp = temp_target;
6587 }
6588 else
6589 {
6590 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6591 rtx temp_target;
6592 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6593 temp_target = gen_reg_rtx (mode);
6594 temp_target
6595 = extract_bit_field (temp, size * BITS_PER_UNIT, 0, 1,
6596 temp_target, mode, mode);
6597 temp = temp_target;
6598 }
6599 }
6600
6601 /* Store the value in the bitfield. */
6602 store_bit_field (target, bitsize, bitpos,
6603 bitregion_start, bitregion_end,
6604 mode, temp);
6605
6606 return const0_rtx;
6607 }
6608 else
6609 {
6610 /* Now build a reference to just the desired component. */
6611 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6612
6613 if (to_rtx == target)
6614 to_rtx = copy_rtx (to_rtx);
6615
6616 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6617 set_mem_alias_set (to_rtx, alias_set);
6618
6619 return store_expr (exp, to_rtx, 0, nontemporal);
6620 }
6621 }
6622 \f
6623 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6624 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6625 codes and find the ultimate containing object, which we return.
6626
6627 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6628 bit position, and *PUNSIGNEDP to the signedness of the field.
6629 If the position of the field is variable, we store a tree
6630 giving the variable offset (in units) in *POFFSET.
6631 This offset is in addition to the bit position.
6632 If the position is not variable, we store 0 in *POFFSET.
6633
6634 If any of the extraction expressions is volatile,
6635 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6636
6637 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6638 Otherwise, it is a mode that can be used to access the field.
6639
6640 If the field describes a variable-sized object, *PMODE is set to
6641 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6642 this case, but the address of the object can be found.
6643
6644 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6645 look through nodes that serve as markers of a greater alignment than
6646 the one that can be deduced from the expression. These nodes make it
6647 possible for front-ends to prevent temporaries from being created by
6648 the middle-end on alignment considerations. For that purpose, the
6649 normal operating mode at high-level is to always pass FALSE so that
6650 the ultimate containing object is really returned; moreover, the
6651 associated predicate handled_component_p will always return TRUE
6652 on these nodes, thus indicating that they are essentially handled
6653 by get_inner_reference. TRUE should only be passed when the caller
6654 is scanning the expression in order to build another representation
6655 and specifically knows how to handle these nodes; as such, this is
6656 the normal operating mode in the RTL expanders. */
6657
6658 tree
6659 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6660 HOST_WIDE_INT *pbitpos, tree *poffset,
6661 enum machine_mode *pmode, int *punsignedp,
6662 int *pvolatilep, bool keep_aligning)
6663 {
6664 tree size_tree = 0;
6665 enum machine_mode mode = VOIDmode;
6666 bool blkmode_bitfield = false;
6667 tree offset = size_zero_node;
6668 double_int bit_offset = double_int_zero;
6669
6670 /* First get the mode, signedness, and size. We do this from just the
6671 outermost expression. */
6672 *pbitsize = -1;
6673 if (TREE_CODE (exp) == COMPONENT_REF)
6674 {
6675 tree field = TREE_OPERAND (exp, 1);
6676 size_tree = DECL_SIZE (field);
6677 if (flag_strict_volatile_bitfields > 0
6678 && TREE_THIS_VOLATILE (exp)
6679 && DECL_BIT_FIELD_TYPE (field)
6680 && DECL_MODE (field) != BLKmode)
6681 /* Volatile bitfields should be accessed in the mode of the
6682 field's type, not the mode computed based on the bit
6683 size. */
6684 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6685 else if (!DECL_BIT_FIELD (field))
6686 mode = DECL_MODE (field);
6687 else if (DECL_MODE (field) == BLKmode)
6688 blkmode_bitfield = true;
6689
6690 *punsignedp = DECL_UNSIGNED (field);
6691 }
6692 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6693 {
6694 size_tree = TREE_OPERAND (exp, 1);
6695 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6696 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6697
6698 /* For vector types, with the correct size of access, use the mode of
6699 inner type. */
6700 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6701 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6702 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6703 mode = TYPE_MODE (TREE_TYPE (exp));
6704 }
6705 else
6706 {
6707 mode = TYPE_MODE (TREE_TYPE (exp));
6708 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6709
6710 if (mode == BLKmode)
6711 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6712 else
6713 *pbitsize = GET_MODE_BITSIZE (mode);
6714 }
6715
6716 if (size_tree != 0)
6717 {
6718 if (! tree_fits_uhwi_p (size_tree))
6719 mode = BLKmode, *pbitsize = -1;
6720 else
6721 *pbitsize = tree_to_uhwi (size_tree);
6722 }
6723
6724 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6725 and find the ultimate containing object. */
6726 while (1)
6727 {
6728 switch (TREE_CODE (exp))
6729 {
6730 case BIT_FIELD_REF:
6731 bit_offset += tree_to_double_int (TREE_OPERAND (exp, 2));
6732 break;
6733
6734 case COMPONENT_REF:
6735 {
6736 tree field = TREE_OPERAND (exp, 1);
6737 tree this_offset = component_ref_field_offset (exp);
6738
6739 /* If this field hasn't been filled in yet, don't go past it.
6740 This should only happen when folding expressions made during
6741 type construction. */
6742 if (this_offset == 0)
6743 break;
6744
6745 offset = size_binop (PLUS_EXPR, offset, this_offset);
6746 bit_offset += tree_to_double_int (DECL_FIELD_BIT_OFFSET (field));
6747
6748 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6749 }
6750 break;
6751
6752 case ARRAY_REF:
6753 case ARRAY_RANGE_REF:
6754 {
6755 tree index = TREE_OPERAND (exp, 1);
6756 tree low_bound = array_ref_low_bound (exp);
6757 tree unit_size = array_ref_element_size (exp);
6758
6759 /* We assume all arrays have sizes that are a multiple of a byte.
6760 First subtract the lower bound, if any, in the type of the
6761 index, then convert to sizetype and multiply by the size of
6762 the array element. */
6763 if (! integer_zerop (low_bound))
6764 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6765 index, low_bound);
6766
6767 offset = size_binop (PLUS_EXPR, offset,
6768 size_binop (MULT_EXPR,
6769 fold_convert (sizetype, index),
6770 unit_size));
6771 }
6772 break;
6773
6774 case REALPART_EXPR:
6775 break;
6776
6777 case IMAGPART_EXPR:
6778 bit_offset += double_int::from_uhwi (*pbitsize);
6779 break;
6780
6781 case VIEW_CONVERT_EXPR:
6782 if (keep_aligning && STRICT_ALIGNMENT
6783 && (TYPE_ALIGN (TREE_TYPE (exp))
6784 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6785 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6786 < BIGGEST_ALIGNMENT)
6787 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6788 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6789 goto done;
6790 break;
6791
6792 case MEM_REF:
6793 /* Hand back the decl for MEM[&decl, off]. */
6794 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6795 {
6796 tree off = TREE_OPERAND (exp, 1);
6797 if (!integer_zerop (off))
6798 {
6799 double_int boff, coff = mem_ref_offset (exp);
6800 boff = coff.lshift (BITS_PER_UNIT == 8
6801 ? 3 : exact_log2 (BITS_PER_UNIT));
6802 bit_offset += boff;
6803 }
6804 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6805 }
6806 goto done;
6807
6808 default:
6809 goto done;
6810 }
6811
6812 /* If any reference in the chain is volatile, the effect is volatile. */
6813 if (TREE_THIS_VOLATILE (exp))
6814 *pvolatilep = 1;
6815
6816 exp = TREE_OPERAND (exp, 0);
6817 }
6818 done:
6819
6820 /* If OFFSET is constant, see if we can return the whole thing as a
6821 constant bit position. Make sure to handle overflow during
6822 this conversion. */
6823 if (TREE_CODE (offset) == INTEGER_CST)
6824 {
6825 double_int tem = tree_to_double_int (offset);
6826 tem = tem.sext (TYPE_PRECISION (sizetype));
6827 tem = tem.lshift (BITS_PER_UNIT == 8 ? 3 : exact_log2 (BITS_PER_UNIT));
6828 tem += bit_offset;
6829 if (tem.fits_shwi ())
6830 {
6831 *pbitpos = tem.to_shwi ();
6832 *poffset = offset = NULL_TREE;
6833 }
6834 }
6835
6836 /* Otherwise, split it up. */
6837 if (offset)
6838 {
6839 /* Avoid returning a negative bitpos as this may wreak havoc later. */
6840 if (bit_offset.is_negative ())
6841 {
6842 double_int mask
6843 = double_int::mask (BITS_PER_UNIT == 8
6844 ? 3 : exact_log2 (BITS_PER_UNIT));
6845 double_int tem = bit_offset.and_not (mask);
6846 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
6847 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
6848 bit_offset -= tem;
6849 tem = tem.arshift (BITS_PER_UNIT == 8
6850 ? 3 : exact_log2 (BITS_PER_UNIT),
6851 HOST_BITS_PER_DOUBLE_INT);
6852 offset = size_binop (PLUS_EXPR, offset,
6853 double_int_to_tree (sizetype, tem));
6854 }
6855
6856 *pbitpos = bit_offset.to_shwi ();
6857 *poffset = offset;
6858 }
6859
6860 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6861 if (mode == VOIDmode
6862 && blkmode_bitfield
6863 && (*pbitpos % BITS_PER_UNIT) == 0
6864 && (*pbitsize % BITS_PER_UNIT) == 0)
6865 *pmode = BLKmode;
6866 else
6867 *pmode = mode;
6868
6869 return exp;
6870 }
6871
6872 /* Return a tree of sizetype representing the size, in bytes, of the element
6873 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6874
6875 tree
6876 array_ref_element_size (tree exp)
6877 {
6878 tree aligned_size = TREE_OPERAND (exp, 3);
6879 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6880 location_t loc = EXPR_LOCATION (exp);
6881
6882 /* If a size was specified in the ARRAY_REF, it's the size measured
6883 in alignment units of the element type. So multiply by that value. */
6884 if (aligned_size)
6885 {
6886 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6887 sizetype from another type of the same width and signedness. */
6888 if (TREE_TYPE (aligned_size) != sizetype)
6889 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6890 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6891 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6892 }
6893
6894 /* Otherwise, take the size from that of the element type. Substitute
6895 any PLACEHOLDER_EXPR that we have. */
6896 else
6897 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6898 }
6899
6900 /* Return a tree representing the lower bound of the array mentioned in
6901 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6902
6903 tree
6904 array_ref_low_bound (tree exp)
6905 {
6906 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6907
6908 /* If a lower bound is specified in EXP, use it. */
6909 if (TREE_OPERAND (exp, 2))
6910 return TREE_OPERAND (exp, 2);
6911
6912 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6913 substituting for a PLACEHOLDER_EXPR as needed. */
6914 if (domain_type && TYPE_MIN_VALUE (domain_type))
6915 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6916
6917 /* Otherwise, return a zero of the appropriate type. */
6918 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6919 }
6920
6921 /* Returns true if REF is an array reference to an array at the end of
6922 a structure. If this is the case, the array may be allocated larger
6923 than its upper bound implies. */
6924
6925 bool
6926 array_at_struct_end_p (tree ref)
6927 {
6928 if (TREE_CODE (ref) != ARRAY_REF
6929 && TREE_CODE (ref) != ARRAY_RANGE_REF)
6930 return false;
6931
6932 while (handled_component_p (ref))
6933 {
6934 /* If the reference chain contains a component reference to a
6935 non-union type and there follows another field the reference
6936 is not at the end of a structure. */
6937 if (TREE_CODE (ref) == COMPONENT_REF
6938 && TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == RECORD_TYPE)
6939 {
6940 tree nextf = DECL_CHAIN (TREE_OPERAND (ref, 1));
6941 while (nextf && TREE_CODE (nextf) != FIELD_DECL)
6942 nextf = DECL_CHAIN (nextf);
6943 if (nextf)
6944 return false;
6945 }
6946
6947 ref = TREE_OPERAND (ref, 0);
6948 }
6949
6950 /* If the reference is based on a declared entity, the size of the array
6951 is constrained by its given domain. */
6952 if (DECL_P (ref))
6953 return false;
6954
6955 return true;
6956 }
6957
6958 /* Return a tree representing the upper bound of the array mentioned in
6959 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6960
6961 tree
6962 array_ref_up_bound (tree exp)
6963 {
6964 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6965
6966 /* If there is a domain type and it has an upper bound, use it, substituting
6967 for a PLACEHOLDER_EXPR as needed. */
6968 if (domain_type && TYPE_MAX_VALUE (domain_type))
6969 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6970
6971 /* Otherwise fail. */
6972 return NULL_TREE;
6973 }
6974
6975 /* Return a tree representing the offset, in bytes, of the field referenced
6976 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6977
6978 tree
6979 component_ref_field_offset (tree exp)
6980 {
6981 tree aligned_offset = TREE_OPERAND (exp, 2);
6982 tree field = TREE_OPERAND (exp, 1);
6983 location_t loc = EXPR_LOCATION (exp);
6984
6985 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6986 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6987 value. */
6988 if (aligned_offset)
6989 {
6990 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6991 sizetype from another type of the same width and signedness. */
6992 if (TREE_TYPE (aligned_offset) != sizetype)
6993 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6994 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6995 size_int (DECL_OFFSET_ALIGN (field)
6996 / BITS_PER_UNIT));
6997 }
6998
6999 /* Otherwise, take the offset from that of the field. Substitute
7000 any PLACEHOLDER_EXPR that we have. */
7001 else
7002 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
7003 }
7004
7005 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7006
7007 static unsigned HOST_WIDE_INT
7008 target_align (const_tree target)
7009 {
7010 /* We might have a chain of nested references with intermediate misaligning
7011 bitfields components, so need to recurse to find out. */
7012
7013 unsigned HOST_WIDE_INT this_align, outer_align;
7014
7015 switch (TREE_CODE (target))
7016 {
7017 case BIT_FIELD_REF:
7018 return 1;
7019
7020 case COMPONENT_REF:
7021 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
7022 outer_align = target_align (TREE_OPERAND (target, 0));
7023 return MIN (this_align, outer_align);
7024
7025 case ARRAY_REF:
7026 case ARRAY_RANGE_REF:
7027 this_align = TYPE_ALIGN (TREE_TYPE (target));
7028 outer_align = target_align (TREE_OPERAND (target, 0));
7029 return MIN (this_align, outer_align);
7030
7031 CASE_CONVERT:
7032 case NON_LVALUE_EXPR:
7033 case VIEW_CONVERT_EXPR:
7034 this_align = TYPE_ALIGN (TREE_TYPE (target));
7035 outer_align = target_align (TREE_OPERAND (target, 0));
7036 return MAX (this_align, outer_align);
7037
7038 default:
7039 return TYPE_ALIGN (TREE_TYPE (target));
7040 }
7041 }
7042
7043 \f
7044 /* Given an rtx VALUE that may contain additions and multiplications, return
7045 an equivalent value that just refers to a register, memory, or constant.
7046 This is done by generating instructions to perform the arithmetic and
7047 returning a pseudo-register containing the value.
7048
7049 The returned value may be a REG, SUBREG, MEM or constant. */
7050
7051 rtx
7052 force_operand (rtx value, rtx target)
7053 {
7054 rtx op1, op2;
7055 /* Use subtarget as the target for operand 0 of a binary operation. */
7056 rtx subtarget = get_subtarget (target);
7057 enum rtx_code code = GET_CODE (value);
7058
7059 /* Check for subreg applied to an expression produced by loop optimizer. */
7060 if (code == SUBREG
7061 && !REG_P (SUBREG_REG (value))
7062 && !MEM_P (SUBREG_REG (value)))
7063 {
7064 value
7065 = simplify_gen_subreg (GET_MODE (value),
7066 force_reg (GET_MODE (SUBREG_REG (value)),
7067 force_operand (SUBREG_REG (value),
7068 NULL_RTX)),
7069 GET_MODE (SUBREG_REG (value)),
7070 SUBREG_BYTE (value));
7071 code = GET_CODE (value);
7072 }
7073
7074 /* Check for a PIC address load. */
7075 if ((code == PLUS || code == MINUS)
7076 && XEXP (value, 0) == pic_offset_table_rtx
7077 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
7078 || GET_CODE (XEXP (value, 1)) == LABEL_REF
7079 || GET_CODE (XEXP (value, 1)) == CONST))
7080 {
7081 if (!subtarget)
7082 subtarget = gen_reg_rtx (GET_MODE (value));
7083 emit_move_insn (subtarget, value);
7084 return subtarget;
7085 }
7086
7087 if (ARITHMETIC_P (value))
7088 {
7089 op2 = XEXP (value, 1);
7090 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
7091 subtarget = 0;
7092 if (code == MINUS && CONST_INT_P (op2))
7093 {
7094 code = PLUS;
7095 op2 = negate_rtx (GET_MODE (value), op2);
7096 }
7097
7098 /* Check for an addition with OP2 a constant integer and our first
7099 operand a PLUS of a virtual register and something else. In that
7100 case, we want to emit the sum of the virtual register and the
7101 constant first and then add the other value. This allows virtual
7102 register instantiation to simply modify the constant rather than
7103 creating another one around this addition. */
7104 if (code == PLUS && CONST_INT_P (op2)
7105 && GET_CODE (XEXP (value, 0)) == PLUS
7106 && REG_P (XEXP (XEXP (value, 0), 0))
7107 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7108 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
7109 {
7110 rtx temp = expand_simple_binop (GET_MODE (value), code,
7111 XEXP (XEXP (value, 0), 0), op2,
7112 subtarget, 0, OPTAB_LIB_WIDEN);
7113 return expand_simple_binop (GET_MODE (value), code, temp,
7114 force_operand (XEXP (XEXP (value,
7115 0), 1), 0),
7116 target, 0, OPTAB_LIB_WIDEN);
7117 }
7118
7119 op1 = force_operand (XEXP (value, 0), subtarget);
7120 op2 = force_operand (op2, NULL_RTX);
7121 switch (code)
7122 {
7123 case MULT:
7124 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7125 case DIV:
7126 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7127 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7128 target, 1, OPTAB_LIB_WIDEN);
7129 else
7130 return expand_divmod (0,
7131 FLOAT_MODE_P (GET_MODE (value))
7132 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7133 GET_MODE (value), op1, op2, target, 0);
7134 case MOD:
7135 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7136 target, 0);
7137 case UDIV:
7138 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7139 target, 1);
7140 case UMOD:
7141 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7142 target, 1);
7143 case ASHIFTRT:
7144 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7145 target, 0, OPTAB_LIB_WIDEN);
7146 default:
7147 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7148 target, 1, OPTAB_LIB_WIDEN);
7149 }
7150 }
7151 if (UNARY_P (value))
7152 {
7153 if (!target)
7154 target = gen_reg_rtx (GET_MODE (value));
7155 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7156 switch (code)
7157 {
7158 case ZERO_EXTEND:
7159 case SIGN_EXTEND:
7160 case TRUNCATE:
7161 case FLOAT_EXTEND:
7162 case FLOAT_TRUNCATE:
7163 convert_move (target, op1, code == ZERO_EXTEND);
7164 return target;
7165
7166 case FIX:
7167 case UNSIGNED_FIX:
7168 expand_fix (target, op1, code == UNSIGNED_FIX);
7169 return target;
7170
7171 case FLOAT:
7172 case UNSIGNED_FLOAT:
7173 expand_float (target, op1, code == UNSIGNED_FLOAT);
7174 return target;
7175
7176 default:
7177 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7178 }
7179 }
7180
7181 #ifdef INSN_SCHEDULING
7182 /* On machines that have insn scheduling, we want all memory reference to be
7183 explicit, so we need to deal with such paradoxical SUBREGs. */
7184 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7185 value
7186 = simplify_gen_subreg (GET_MODE (value),
7187 force_reg (GET_MODE (SUBREG_REG (value)),
7188 force_operand (SUBREG_REG (value),
7189 NULL_RTX)),
7190 GET_MODE (SUBREG_REG (value)),
7191 SUBREG_BYTE (value));
7192 #endif
7193
7194 return value;
7195 }
7196 \f
7197 /* Subroutine of expand_expr: return nonzero iff there is no way that
7198 EXP can reference X, which is being modified. TOP_P is nonzero if this
7199 call is going to be used to determine whether we need a temporary
7200 for EXP, as opposed to a recursive call to this function.
7201
7202 It is always safe for this routine to return zero since it merely
7203 searches for optimization opportunities. */
7204
7205 int
7206 safe_from_p (const_rtx x, tree exp, int top_p)
7207 {
7208 rtx exp_rtl = 0;
7209 int i, nops;
7210
7211 if (x == 0
7212 /* If EXP has varying size, we MUST use a target since we currently
7213 have no way of allocating temporaries of variable size
7214 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7215 So we assume here that something at a higher level has prevented a
7216 clash. This is somewhat bogus, but the best we can do. Only
7217 do this when X is BLKmode and when we are at the top level. */
7218 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7219 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7220 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7221 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7222 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7223 != INTEGER_CST)
7224 && GET_MODE (x) == BLKmode)
7225 /* If X is in the outgoing argument area, it is always safe. */
7226 || (MEM_P (x)
7227 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7228 || (GET_CODE (XEXP (x, 0)) == PLUS
7229 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7230 return 1;
7231
7232 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7233 find the underlying pseudo. */
7234 if (GET_CODE (x) == SUBREG)
7235 {
7236 x = SUBREG_REG (x);
7237 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7238 return 0;
7239 }
7240
7241 /* Now look at our tree code and possibly recurse. */
7242 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7243 {
7244 case tcc_declaration:
7245 exp_rtl = DECL_RTL_IF_SET (exp);
7246 break;
7247
7248 case tcc_constant:
7249 return 1;
7250
7251 case tcc_exceptional:
7252 if (TREE_CODE (exp) == TREE_LIST)
7253 {
7254 while (1)
7255 {
7256 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7257 return 0;
7258 exp = TREE_CHAIN (exp);
7259 if (!exp)
7260 return 1;
7261 if (TREE_CODE (exp) != TREE_LIST)
7262 return safe_from_p (x, exp, 0);
7263 }
7264 }
7265 else if (TREE_CODE (exp) == CONSTRUCTOR)
7266 {
7267 constructor_elt *ce;
7268 unsigned HOST_WIDE_INT idx;
7269
7270 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce)
7271 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7272 || !safe_from_p (x, ce->value, 0))
7273 return 0;
7274 return 1;
7275 }
7276 else if (TREE_CODE (exp) == ERROR_MARK)
7277 return 1; /* An already-visited SAVE_EXPR? */
7278 else
7279 return 0;
7280
7281 case tcc_statement:
7282 /* The only case we look at here is the DECL_INITIAL inside a
7283 DECL_EXPR. */
7284 return (TREE_CODE (exp) != DECL_EXPR
7285 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7286 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7287 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7288
7289 case tcc_binary:
7290 case tcc_comparison:
7291 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7292 return 0;
7293 /* Fall through. */
7294
7295 case tcc_unary:
7296 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7297
7298 case tcc_expression:
7299 case tcc_reference:
7300 case tcc_vl_exp:
7301 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7302 the expression. If it is set, we conflict iff we are that rtx or
7303 both are in memory. Otherwise, we check all operands of the
7304 expression recursively. */
7305
7306 switch (TREE_CODE (exp))
7307 {
7308 case ADDR_EXPR:
7309 /* If the operand is static or we are static, we can't conflict.
7310 Likewise if we don't conflict with the operand at all. */
7311 if (staticp (TREE_OPERAND (exp, 0))
7312 || TREE_STATIC (exp)
7313 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7314 return 1;
7315
7316 /* Otherwise, the only way this can conflict is if we are taking
7317 the address of a DECL a that address if part of X, which is
7318 very rare. */
7319 exp = TREE_OPERAND (exp, 0);
7320 if (DECL_P (exp))
7321 {
7322 if (!DECL_RTL_SET_P (exp)
7323 || !MEM_P (DECL_RTL (exp)))
7324 return 0;
7325 else
7326 exp_rtl = XEXP (DECL_RTL (exp), 0);
7327 }
7328 break;
7329
7330 case MEM_REF:
7331 if (MEM_P (x)
7332 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7333 get_alias_set (exp)))
7334 return 0;
7335 break;
7336
7337 case CALL_EXPR:
7338 /* Assume that the call will clobber all hard registers and
7339 all of memory. */
7340 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7341 || MEM_P (x))
7342 return 0;
7343 break;
7344
7345 case WITH_CLEANUP_EXPR:
7346 case CLEANUP_POINT_EXPR:
7347 /* Lowered by gimplify.c. */
7348 gcc_unreachable ();
7349
7350 case SAVE_EXPR:
7351 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7352
7353 default:
7354 break;
7355 }
7356
7357 /* If we have an rtx, we do not need to scan our operands. */
7358 if (exp_rtl)
7359 break;
7360
7361 nops = TREE_OPERAND_LENGTH (exp);
7362 for (i = 0; i < nops; i++)
7363 if (TREE_OPERAND (exp, i) != 0
7364 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7365 return 0;
7366
7367 break;
7368
7369 case tcc_type:
7370 /* Should never get a type here. */
7371 gcc_unreachable ();
7372 }
7373
7374 /* If we have an rtl, find any enclosed object. Then see if we conflict
7375 with it. */
7376 if (exp_rtl)
7377 {
7378 if (GET_CODE (exp_rtl) == SUBREG)
7379 {
7380 exp_rtl = SUBREG_REG (exp_rtl);
7381 if (REG_P (exp_rtl)
7382 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7383 return 0;
7384 }
7385
7386 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7387 are memory and they conflict. */
7388 return ! (rtx_equal_p (x, exp_rtl)
7389 || (MEM_P (x) && MEM_P (exp_rtl)
7390 && true_dependence (exp_rtl, VOIDmode, x)));
7391 }
7392
7393 /* If we reach here, it is safe. */
7394 return 1;
7395 }
7396
7397 \f
7398 /* Return the highest power of two that EXP is known to be a multiple of.
7399 This is used in updating alignment of MEMs in array references. */
7400
7401 unsigned HOST_WIDE_INT
7402 highest_pow2_factor (const_tree exp)
7403 {
7404 unsigned HOST_WIDE_INT ret;
7405 int trailing_zeros = tree_ctz (exp);
7406 if (trailing_zeros >= HOST_BITS_PER_WIDE_INT)
7407 return BIGGEST_ALIGNMENT;
7408 ret = (unsigned HOST_WIDE_INT) 1 << trailing_zeros;
7409 if (ret > BIGGEST_ALIGNMENT)
7410 return BIGGEST_ALIGNMENT;
7411 return ret;
7412 }
7413
7414 /* Similar, except that the alignment requirements of TARGET are
7415 taken into account. Assume it is at least as aligned as its
7416 type, unless it is a COMPONENT_REF in which case the layout of
7417 the structure gives the alignment. */
7418
7419 static unsigned HOST_WIDE_INT
7420 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7421 {
7422 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7423 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7424
7425 return MAX (factor, talign);
7426 }
7427 \f
7428 #ifdef HAVE_conditional_move
7429 /* Convert the tree comparison code TCODE to the rtl one where the
7430 signedness is UNSIGNEDP. */
7431
7432 static enum rtx_code
7433 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7434 {
7435 enum rtx_code code;
7436 switch (tcode)
7437 {
7438 case EQ_EXPR:
7439 code = EQ;
7440 break;
7441 case NE_EXPR:
7442 code = NE;
7443 break;
7444 case LT_EXPR:
7445 code = unsignedp ? LTU : LT;
7446 break;
7447 case LE_EXPR:
7448 code = unsignedp ? LEU : LE;
7449 break;
7450 case GT_EXPR:
7451 code = unsignedp ? GTU : GT;
7452 break;
7453 case GE_EXPR:
7454 code = unsignedp ? GEU : GE;
7455 break;
7456 case UNORDERED_EXPR:
7457 code = UNORDERED;
7458 break;
7459 case ORDERED_EXPR:
7460 code = ORDERED;
7461 break;
7462 case UNLT_EXPR:
7463 code = UNLT;
7464 break;
7465 case UNLE_EXPR:
7466 code = UNLE;
7467 break;
7468 case UNGT_EXPR:
7469 code = UNGT;
7470 break;
7471 case UNGE_EXPR:
7472 code = UNGE;
7473 break;
7474 case UNEQ_EXPR:
7475 code = UNEQ;
7476 break;
7477 case LTGT_EXPR:
7478 code = LTGT;
7479 break;
7480
7481 default:
7482 gcc_unreachable ();
7483 }
7484 return code;
7485 }
7486 #endif
7487
7488 /* Subroutine of expand_expr. Expand the two operands of a binary
7489 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7490 The value may be stored in TARGET if TARGET is nonzero. The
7491 MODIFIER argument is as documented by expand_expr. */
7492
7493 static void
7494 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7495 enum expand_modifier modifier)
7496 {
7497 if (! safe_from_p (target, exp1, 1))
7498 target = 0;
7499 if (operand_equal_p (exp0, exp1, 0))
7500 {
7501 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7502 *op1 = copy_rtx (*op0);
7503 }
7504 else
7505 {
7506 /* If we need to preserve evaluation order, copy exp0 into its own
7507 temporary variable so that it can't be clobbered by exp1. */
7508 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7509 exp0 = save_expr (exp0);
7510 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7511 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7512 }
7513 }
7514
7515 \f
7516 /* Return a MEM that contains constant EXP. DEFER is as for
7517 output_constant_def and MODIFIER is as for expand_expr. */
7518
7519 static rtx
7520 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7521 {
7522 rtx mem;
7523
7524 mem = output_constant_def (exp, defer);
7525 if (modifier != EXPAND_INITIALIZER)
7526 mem = use_anchored_address (mem);
7527 return mem;
7528 }
7529
7530 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7531 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7532
7533 static rtx
7534 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7535 enum expand_modifier modifier, addr_space_t as)
7536 {
7537 rtx result, subtarget;
7538 tree inner, offset;
7539 HOST_WIDE_INT bitsize, bitpos;
7540 int volatilep, unsignedp;
7541 enum machine_mode mode1;
7542
7543 /* If we are taking the address of a constant and are at the top level,
7544 we have to use output_constant_def since we can't call force_const_mem
7545 at top level. */
7546 /* ??? This should be considered a front-end bug. We should not be
7547 generating ADDR_EXPR of something that isn't an LVALUE. The only
7548 exception here is STRING_CST. */
7549 if (CONSTANT_CLASS_P (exp))
7550 {
7551 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7552 if (modifier < EXPAND_SUM)
7553 result = force_operand (result, target);
7554 return result;
7555 }
7556
7557 /* Everything must be something allowed by is_gimple_addressable. */
7558 switch (TREE_CODE (exp))
7559 {
7560 case INDIRECT_REF:
7561 /* This case will happen via recursion for &a->b. */
7562 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7563
7564 case MEM_REF:
7565 {
7566 tree tem = TREE_OPERAND (exp, 0);
7567 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7568 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7569 return expand_expr (tem, target, tmode, modifier);
7570 }
7571
7572 case CONST_DECL:
7573 /* Expand the initializer like constants above. */
7574 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7575 0, modifier), 0);
7576 if (modifier < EXPAND_SUM)
7577 result = force_operand (result, target);
7578 return result;
7579
7580 case REALPART_EXPR:
7581 /* The real part of the complex number is always first, therefore
7582 the address is the same as the address of the parent object. */
7583 offset = 0;
7584 bitpos = 0;
7585 inner = TREE_OPERAND (exp, 0);
7586 break;
7587
7588 case IMAGPART_EXPR:
7589 /* The imaginary part of the complex number is always second.
7590 The expression is therefore always offset by the size of the
7591 scalar type. */
7592 offset = 0;
7593 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7594 inner = TREE_OPERAND (exp, 0);
7595 break;
7596
7597 case COMPOUND_LITERAL_EXPR:
7598 /* Allow COMPOUND_LITERAL_EXPR in initializers, if e.g.
7599 rtl_for_decl_init is called on DECL_INITIAL with
7600 COMPOUNT_LITERAL_EXPRs in it, they aren't gimplified. */
7601 if (modifier == EXPAND_INITIALIZER
7602 && COMPOUND_LITERAL_EXPR_DECL (exp))
7603 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp),
7604 target, tmode, modifier, as);
7605 /* FALLTHRU */
7606 default:
7607 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7608 expand_expr, as that can have various side effects; LABEL_DECLs for
7609 example, may not have their DECL_RTL set yet. Expand the rtl of
7610 CONSTRUCTORs too, which should yield a memory reference for the
7611 constructor's contents. Assume language specific tree nodes can
7612 be expanded in some interesting way. */
7613 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7614 if (DECL_P (exp)
7615 || TREE_CODE (exp) == CONSTRUCTOR
7616 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7617 {
7618 result = expand_expr (exp, target, tmode,
7619 modifier == EXPAND_INITIALIZER
7620 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7621
7622 /* If the DECL isn't in memory, then the DECL wasn't properly
7623 marked TREE_ADDRESSABLE, which will be either a front-end
7624 or a tree optimizer bug. */
7625
7626 if (TREE_ADDRESSABLE (exp)
7627 && ! MEM_P (result)
7628 && ! targetm.calls.allocate_stack_slots_for_args ())
7629 {
7630 error ("local frame unavailable (naked function?)");
7631 return result;
7632 }
7633 else
7634 gcc_assert (MEM_P (result));
7635 result = XEXP (result, 0);
7636
7637 /* ??? Is this needed anymore? */
7638 if (DECL_P (exp))
7639 TREE_USED (exp) = 1;
7640
7641 if (modifier != EXPAND_INITIALIZER
7642 && modifier != EXPAND_CONST_ADDRESS
7643 && modifier != EXPAND_SUM)
7644 result = force_operand (result, target);
7645 return result;
7646 }
7647
7648 /* Pass FALSE as the last argument to get_inner_reference although
7649 we are expanding to RTL. The rationale is that we know how to
7650 handle "aligning nodes" here: we can just bypass them because
7651 they won't change the final object whose address will be returned
7652 (they actually exist only for that purpose). */
7653 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7654 &mode1, &unsignedp, &volatilep, false);
7655 break;
7656 }
7657
7658 /* We must have made progress. */
7659 gcc_assert (inner != exp);
7660
7661 subtarget = offset || bitpos ? NULL_RTX : target;
7662 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7663 inner alignment, force the inner to be sufficiently aligned. */
7664 if (CONSTANT_CLASS_P (inner)
7665 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7666 {
7667 inner = copy_node (inner);
7668 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7669 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7670 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7671 }
7672 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7673
7674 if (offset)
7675 {
7676 rtx tmp;
7677
7678 if (modifier != EXPAND_NORMAL)
7679 result = force_operand (result, NULL);
7680 tmp = expand_expr (offset, NULL_RTX, tmode,
7681 modifier == EXPAND_INITIALIZER
7682 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7683
7684 result = convert_memory_address_addr_space (tmode, result, as);
7685 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7686
7687 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7688 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7689 else
7690 {
7691 subtarget = bitpos ? NULL_RTX : target;
7692 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7693 1, OPTAB_LIB_WIDEN);
7694 }
7695 }
7696
7697 if (bitpos)
7698 {
7699 /* Someone beforehand should have rejected taking the address
7700 of such an object. */
7701 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7702
7703 result = convert_memory_address_addr_space (tmode, result, as);
7704 result = plus_constant (tmode, result, bitpos / BITS_PER_UNIT);
7705 if (modifier < EXPAND_SUM)
7706 result = force_operand (result, target);
7707 }
7708
7709 return result;
7710 }
7711
7712 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7713 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7714
7715 static rtx
7716 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7717 enum expand_modifier modifier)
7718 {
7719 addr_space_t as = ADDR_SPACE_GENERIC;
7720 enum machine_mode address_mode = Pmode;
7721 enum machine_mode pointer_mode = ptr_mode;
7722 enum machine_mode rmode;
7723 rtx result;
7724
7725 /* Target mode of VOIDmode says "whatever's natural". */
7726 if (tmode == VOIDmode)
7727 tmode = TYPE_MODE (TREE_TYPE (exp));
7728
7729 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7730 {
7731 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7732 address_mode = targetm.addr_space.address_mode (as);
7733 pointer_mode = targetm.addr_space.pointer_mode (as);
7734 }
7735
7736 /* We can get called with some Weird Things if the user does silliness
7737 like "(short) &a". In that case, convert_memory_address won't do
7738 the right thing, so ignore the given target mode. */
7739 if (tmode != address_mode && tmode != pointer_mode)
7740 tmode = address_mode;
7741
7742 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7743 tmode, modifier, as);
7744
7745 /* Despite expand_expr claims concerning ignoring TMODE when not
7746 strictly convenient, stuff breaks if we don't honor it. Note
7747 that combined with the above, we only do this for pointer modes. */
7748 rmode = GET_MODE (result);
7749 if (rmode == VOIDmode)
7750 rmode = tmode;
7751 if (rmode != tmode)
7752 result = convert_memory_address_addr_space (tmode, result, as);
7753
7754 return result;
7755 }
7756
7757 /* Generate code for computing CONSTRUCTOR EXP.
7758 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7759 is TRUE, instead of creating a temporary variable in memory
7760 NULL is returned and the caller needs to handle it differently. */
7761
7762 static rtx
7763 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7764 bool avoid_temp_mem)
7765 {
7766 tree type = TREE_TYPE (exp);
7767 enum machine_mode mode = TYPE_MODE (type);
7768
7769 /* Try to avoid creating a temporary at all. This is possible
7770 if all of the initializer is zero.
7771 FIXME: try to handle all [0..255] initializers we can handle
7772 with memset. */
7773 if (TREE_STATIC (exp)
7774 && !TREE_ADDRESSABLE (exp)
7775 && target != 0 && mode == BLKmode
7776 && all_zeros_p (exp))
7777 {
7778 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7779 return target;
7780 }
7781
7782 /* All elts simple constants => refer to a constant in memory. But
7783 if this is a non-BLKmode mode, let it store a field at a time
7784 since that should make a CONST_INT or CONST_DOUBLE when we
7785 fold. Likewise, if we have a target we can use, it is best to
7786 store directly into the target unless the type is large enough
7787 that memcpy will be used. If we are making an initializer and
7788 all operands are constant, put it in memory as well.
7789
7790 FIXME: Avoid trying to fill vector constructors piece-meal.
7791 Output them with output_constant_def below unless we're sure
7792 they're zeros. This should go away when vector initializers
7793 are treated like VECTOR_CST instead of arrays. */
7794 if ((TREE_STATIC (exp)
7795 && ((mode == BLKmode
7796 && ! (target != 0 && safe_from_p (target, exp, 1)))
7797 || TREE_ADDRESSABLE (exp)
7798 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type))
7799 && (! MOVE_BY_PIECES_P
7800 (tree_to_uhwi (TYPE_SIZE_UNIT (type)),
7801 TYPE_ALIGN (type)))
7802 && ! mostly_zeros_p (exp))))
7803 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7804 && TREE_CONSTANT (exp)))
7805 {
7806 rtx constructor;
7807
7808 if (avoid_temp_mem)
7809 return NULL_RTX;
7810
7811 constructor = expand_expr_constant (exp, 1, modifier);
7812
7813 if (modifier != EXPAND_CONST_ADDRESS
7814 && modifier != EXPAND_INITIALIZER
7815 && modifier != EXPAND_SUM)
7816 constructor = validize_mem (constructor);
7817
7818 return constructor;
7819 }
7820
7821 /* Handle calls that pass values in multiple non-contiguous
7822 locations. The Irix 6 ABI has examples of this. */
7823 if (target == 0 || ! safe_from_p (target, exp, 1)
7824 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7825 {
7826 if (avoid_temp_mem)
7827 return NULL_RTX;
7828
7829 target
7830 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7831 | (TREE_READONLY (exp)
7832 * TYPE_QUAL_CONST))),
7833 TREE_ADDRESSABLE (exp), 1);
7834 }
7835
7836 store_constructor (exp, target, 0, int_expr_size (exp));
7837 return target;
7838 }
7839
7840
7841 /* expand_expr: generate code for computing expression EXP.
7842 An rtx for the computed value is returned. The value is never null.
7843 In the case of a void EXP, const0_rtx is returned.
7844
7845 The value may be stored in TARGET if TARGET is nonzero.
7846 TARGET is just a suggestion; callers must assume that
7847 the rtx returned may not be the same as TARGET.
7848
7849 If TARGET is CONST0_RTX, it means that the value will be ignored.
7850
7851 If TMODE is not VOIDmode, it suggests generating the
7852 result in mode TMODE. But this is done only when convenient.
7853 Otherwise, TMODE is ignored and the value generated in its natural mode.
7854 TMODE is just a suggestion; callers must assume that
7855 the rtx returned may not have mode TMODE.
7856
7857 Note that TARGET may have neither TMODE nor MODE. In that case, it
7858 probably will not be used.
7859
7860 If MODIFIER is EXPAND_SUM then when EXP is an addition
7861 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7862 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7863 products as above, or REG or MEM, or constant.
7864 Ordinarily in such cases we would output mul or add instructions
7865 and then return a pseudo reg containing the sum.
7866
7867 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7868 it also marks a label as absolutely required (it can't be dead).
7869 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7870 This is used for outputting expressions used in initializers.
7871
7872 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7873 with a constant address even if that address is not normally legitimate.
7874 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7875
7876 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7877 a call parameter. Such targets require special care as we haven't yet
7878 marked TARGET so that it's safe from being trashed by libcalls. We
7879 don't want to use TARGET for anything but the final result;
7880 Intermediate values must go elsewhere. Additionally, calls to
7881 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7882
7883 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7884 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7885 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7886 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7887 recursively. */
7888
7889 rtx
7890 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7891 enum expand_modifier modifier, rtx *alt_rtl)
7892 {
7893 rtx ret;
7894
7895 /* Handle ERROR_MARK before anybody tries to access its type. */
7896 if (TREE_CODE (exp) == ERROR_MARK
7897 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7898 {
7899 ret = CONST0_RTX (tmode);
7900 return ret ? ret : const0_rtx;
7901 }
7902
7903 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7904 return ret;
7905 }
7906
7907 /* Try to expand the conditional expression which is represented by
7908 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If succeseds
7909 return the rtl reg which repsents the result. Otherwise return
7910 NULL_RTL. */
7911
7912 static rtx
7913 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
7914 tree treeop1 ATTRIBUTE_UNUSED,
7915 tree treeop2 ATTRIBUTE_UNUSED)
7916 {
7917 #ifdef HAVE_conditional_move
7918 rtx insn;
7919 rtx op00, op01, op1, op2;
7920 enum rtx_code comparison_code;
7921 enum machine_mode comparison_mode;
7922 gimple srcstmt;
7923 rtx temp;
7924 tree type = TREE_TYPE (treeop1);
7925 int unsignedp = TYPE_UNSIGNED (type);
7926 enum machine_mode mode = TYPE_MODE (type);
7927 enum machine_mode orig_mode = mode;
7928
7929 /* If we cannot do a conditional move on the mode, try doing it
7930 with the promoted mode. */
7931 if (!can_conditionally_move_p (mode))
7932 {
7933 mode = promote_mode (type, mode, &unsignedp);
7934 if (!can_conditionally_move_p (mode))
7935 return NULL_RTX;
7936 temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */
7937 }
7938 else
7939 temp = assign_temp (type, 0, 1);
7940
7941 start_sequence ();
7942 expand_operands (treeop1, treeop2,
7943 temp, &op1, &op2, EXPAND_NORMAL);
7944
7945 if (TREE_CODE (treeop0) == SSA_NAME
7946 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
7947 {
7948 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
7949 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
7950 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
7951 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
7952 comparison_mode = TYPE_MODE (type);
7953 unsignedp = TYPE_UNSIGNED (type);
7954 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7955 }
7956 else if (TREE_CODE_CLASS (TREE_CODE (treeop0)) == tcc_comparison)
7957 {
7958 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
7959 enum tree_code cmpcode = TREE_CODE (treeop0);
7960 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
7961 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
7962 unsignedp = TYPE_UNSIGNED (type);
7963 comparison_mode = TYPE_MODE (type);
7964 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7965 }
7966 else
7967 {
7968 op00 = expand_normal (treeop0);
7969 op01 = const0_rtx;
7970 comparison_code = NE;
7971 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
7972 }
7973
7974 if (GET_MODE (op1) != mode)
7975 op1 = gen_lowpart (mode, op1);
7976
7977 if (GET_MODE (op2) != mode)
7978 op2 = gen_lowpart (mode, op2);
7979
7980 /* Try to emit the conditional move. */
7981 insn = emit_conditional_move (temp, comparison_code,
7982 op00, op01, comparison_mode,
7983 op1, op2, mode,
7984 unsignedp);
7985
7986 /* If we could do the conditional move, emit the sequence,
7987 and return. */
7988 if (insn)
7989 {
7990 rtx seq = get_insns ();
7991 end_sequence ();
7992 emit_insn (seq);
7993 return convert_modes (orig_mode, mode, temp, 0);
7994 }
7995
7996 /* Otherwise discard the sequence and fall back to code with
7997 branches. */
7998 end_sequence ();
7999 #endif
8000 return NULL_RTX;
8001 }
8002
8003 rtx
8004 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
8005 enum expand_modifier modifier)
8006 {
8007 rtx op0, op1, op2, temp;
8008 tree type;
8009 int unsignedp;
8010 enum machine_mode mode;
8011 enum tree_code code = ops->code;
8012 optab this_optab;
8013 rtx subtarget, original_target;
8014 int ignore;
8015 bool reduce_bit_field;
8016 location_t loc = ops->location;
8017 tree treeop0, treeop1, treeop2;
8018 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8019 ? reduce_to_bit_field_precision ((expr), \
8020 target, \
8021 type) \
8022 : (expr))
8023
8024 type = ops->type;
8025 mode = TYPE_MODE (type);
8026 unsignedp = TYPE_UNSIGNED (type);
8027
8028 treeop0 = ops->op0;
8029 treeop1 = ops->op1;
8030 treeop2 = ops->op2;
8031
8032 /* We should be called only on simple (binary or unary) expressions,
8033 exactly those that are valid in gimple expressions that aren't
8034 GIMPLE_SINGLE_RHS (or invalid). */
8035 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
8036 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
8037 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
8038
8039 ignore = (target == const0_rtx
8040 || ((CONVERT_EXPR_CODE_P (code)
8041 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8042 && TREE_CODE (type) == VOID_TYPE));
8043
8044 /* We should be called only if we need the result. */
8045 gcc_assert (!ignore);
8046
8047 /* An operation in what may be a bit-field type needs the
8048 result to be reduced to the precision of the bit-field type,
8049 which is narrower than that of the type's mode. */
8050 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8051 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8052
8053 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8054 target = 0;
8055
8056 /* Use subtarget as the target for operand 0 of a binary operation. */
8057 subtarget = get_subtarget (target);
8058 original_target = target;
8059
8060 switch (code)
8061 {
8062 case NON_LVALUE_EXPR:
8063 case PAREN_EXPR:
8064 CASE_CONVERT:
8065 if (treeop0 == error_mark_node)
8066 return const0_rtx;
8067
8068 if (TREE_CODE (type) == UNION_TYPE)
8069 {
8070 tree valtype = TREE_TYPE (treeop0);
8071
8072 /* If both input and output are BLKmode, this conversion isn't doing
8073 anything except possibly changing memory attribute. */
8074 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8075 {
8076 rtx result = expand_expr (treeop0, target, tmode,
8077 modifier);
8078
8079 result = copy_rtx (result);
8080 set_mem_attributes (result, type, 0);
8081 return result;
8082 }
8083
8084 if (target == 0)
8085 {
8086 if (TYPE_MODE (type) != BLKmode)
8087 target = gen_reg_rtx (TYPE_MODE (type));
8088 else
8089 target = assign_temp (type, 1, 1);
8090 }
8091
8092 if (MEM_P (target))
8093 /* Store data into beginning of memory target. */
8094 store_expr (treeop0,
8095 adjust_address (target, TYPE_MODE (valtype), 0),
8096 modifier == EXPAND_STACK_PARM,
8097 false);
8098
8099 else
8100 {
8101 gcc_assert (REG_P (target));
8102
8103 /* Store this field into a union of the proper type. */
8104 store_field (target,
8105 MIN ((int_size_in_bytes (TREE_TYPE
8106 (treeop0))
8107 * BITS_PER_UNIT),
8108 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
8109 0, 0, 0, TYPE_MODE (valtype), treeop0, 0, false);
8110 }
8111
8112 /* Return the entire union. */
8113 return target;
8114 }
8115
8116 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8117 {
8118 op0 = expand_expr (treeop0, target, VOIDmode,
8119 modifier);
8120
8121 /* If the signedness of the conversion differs and OP0 is
8122 a promoted SUBREG, clear that indication since we now
8123 have to do the proper extension. */
8124 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8125 && GET_CODE (op0) == SUBREG)
8126 SUBREG_PROMOTED_VAR_P (op0) = 0;
8127
8128 return REDUCE_BIT_FIELD (op0);
8129 }
8130
8131 op0 = expand_expr (treeop0, NULL_RTX, mode,
8132 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8133 if (GET_MODE (op0) == mode)
8134 ;
8135
8136 /* If OP0 is a constant, just convert it into the proper mode. */
8137 else if (CONSTANT_P (op0))
8138 {
8139 tree inner_type = TREE_TYPE (treeop0);
8140 enum machine_mode inner_mode = GET_MODE (op0);
8141
8142 if (inner_mode == VOIDmode)
8143 inner_mode = TYPE_MODE (inner_type);
8144
8145 if (modifier == EXPAND_INITIALIZER)
8146 op0 = simplify_gen_subreg (mode, op0, inner_mode,
8147 subreg_lowpart_offset (mode,
8148 inner_mode));
8149 else
8150 op0= convert_modes (mode, inner_mode, op0,
8151 TYPE_UNSIGNED (inner_type));
8152 }
8153
8154 else if (modifier == EXPAND_INITIALIZER)
8155 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8156
8157 else if (target == 0)
8158 op0 = convert_to_mode (mode, op0,
8159 TYPE_UNSIGNED (TREE_TYPE
8160 (treeop0)));
8161 else
8162 {
8163 convert_move (target, op0,
8164 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8165 op0 = target;
8166 }
8167
8168 return REDUCE_BIT_FIELD (op0);
8169
8170 case ADDR_SPACE_CONVERT_EXPR:
8171 {
8172 tree treeop0_type = TREE_TYPE (treeop0);
8173 addr_space_t as_to;
8174 addr_space_t as_from;
8175
8176 gcc_assert (POINTER_TYPE_P (type));
8177 gcc_assert (POINTER_TYPE_P (treeop0_type));
8178
8179 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8180 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8181
8182 /* Conversions between pointers to the same address space should
8183 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8184 gcc_assert (as_to != as_from);
8185
8186 /* Ask target code to handle conversion between pointers
8187 to overlapping address spaces. */
8188 if (targetm.addr_space.subset_p (as_to, as_from)
8189 || targetm.addr_space.subset_p (as_from, as_to))
8190 {
8191 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8192 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8193 gcc_assert (op0);
8194 return op0;
8195 }
8196
8197 /* For disjoint address spaces, converting anything but
8198 a null pointer invokes undefined behaviour. We simply
8199 always return a null pointer here. */
8200 return CONST0_RTX (mode);
8201 }
8202
8203 case POINTER_PLUS_EXPR:
8204 /* Even though the sizetype mode and the pointer's mode can be different
8205 expand is able to handle this correctly and get the correct result out
8206 of the PLUS_EXPR code. */
8207 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8208 if sizetype precision is smaller than pointer precision. */
8209 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8210 treeop1 = fold_convert_loc (loc, type,
8211 fold_convert_loc (loc, ssizetype,
8212 treeop1));
8213 /* If sizetype precision is larger than pointer precision, truncate the
8214 offset to have matching modes. */
8215 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8216 treeop1 = fold_convert_loc (loc, type, treeop1);
8217
8218 case PLUS_EXPR:
8219 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8220 something else, make sure we add the register to the constant and
8221 then to the other thing. This case can occur during strength
8222 reduction and doing it this way will produce better code if the
8223 frame pointer or argument pointer is eliminated.
8224
8225 fold-const.c will ensure that the constant is always in the inner
8226 PLUS_EXPR, so the only case we need to do anything about is if
8227 sp, ap, or fp is our second argument, in which case we must swap
8228 the innermost first argument and our second argument. */
8229
8230 if (TREE_CODE (treeop0) == PLUS_EXPR
8231 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8232 && TREE_CODE (treeop1) == VAR_DECL
8233 && (DECL_RTL (treeop1) == frame_pointer_rtx
8234 || DECL_RTL (treeop1) == stack_pointer_rtx
8235 || DECL_RTL (treeop1) == arg_pointer_rtx))
8236 {
8237 gcc_unreachable ();
8238 }
8239
8240 /* If the result is to be ptr_mode and we are adding an integer to
8241 something, we might be forming a constant. So try to use
8242 plus_constant. If it produces a sum and we can't accept it,
8243 use force_operand. This allows P = &ARR[const] to generate
8244 efficient code on machines where a SYMBOL_REF is not a valid
8245 address.
8246
8247 If this is an EXPAND_SUM call, always return the sum. */
8248 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8249 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8250 {
8251 if (modifier == EXPAND_STACK_PARM)
8252 target = 0;
8253 if (TREE_CODE (treeop0) == INTEGER_CST
8254 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8255 && TREE_CONSTANT (treeop1))
8256 {
8257 rtx constant_part;
8258
8259 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8260 EXPAND_SUM);
8261 /* Use immed_double_const to ensure that the constant is
8262 truncated according to the mode of OP1, then sign extended
8263 to a HOST_WIDE_INT. Using the constant directly can result
8264 in non-canonical RTL in a 64x32 cross compile. */
8265 constant_part
8266 = immed_double_const (TREE_INT_CST_LOW (treeop0),
8267 (HOST_WIDE_INT) 0,
8268 TYPE_MODE (TREE_TYPE (treeop1)));
8269 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8270 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8271 op1 = force_operand (op1, target);
8272 return REDUCE_BIT_FIELD (op1);
8273 }
8274
8275 else if (TREE_CODE (treeop1) == INTEGER_CST
8276 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8277 && TREE_CONSTANT (treeop0))
8278 {
8279 rtx constant_part;
8280
8281 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8282 (modifier == EXPAND_INITIALIZER
8283 ? EXPAND_INITIALIZER : EXPAND_SUM));
8284 if (! CONSTANT_P (op0))
8285 {
8286 op1 = expand_expr (treeop1, NULL_RTX,
8287 VOIDmode, modifier);
8288 /* Return a PLUS if modifier says it's OK. */
8289 if (modifier == EXPAND_SUM
8290 || modifier == EXPAND_INITIALIZER)
8291 return simplify_gen_binary (PLUS, mode, op0, op1);
8292 goto binop2;
8293 }
8294 /* Use immed_double_const to ensure that the constant is
8295 truncated according to the mode of OP1, then sign extended
8296 to a HOST_WIDE_INT. Using the constant directly can result
8297 in non-canonical RTL in a 64x32 cross compile. */
8298 constant_part
8299 = immed_double_const (TREE_INT_CST_LOW (treeop1),
8300 (HOST_WIDE_INT) 0,
8301 TYPE_MODE (TREE_TYPE (treeop0)));
8302 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8303 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8304 op0 = force_operand (op0, target);
8305 return REDUCE_BIT_FIELD (op0);
8306 }
8307 }
8308
8309 /* Use TER to expand pointer addition of a negated value
8310 as pointer subtraction. */
8311 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8312 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8313 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8314 && TREE_CODE (treeop1) == SSA_NAME
8315 && TYPE_MODE (TREE_TYPE (treeop0))
8316 == TYPE_MODE (TREE_TYPE (treeop1)))
8317 {
8318 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8319 if (def)
8320 {
8321 treeop1 = gimple_assign_rhs1 (def);
8322 code = MINUS_EXPR;
8323 goto do_minus;
8324 }
8325 }
8326
8327 /* No sense saving up arithmetic to be done
8328 if it's all in the wrong mode to form part of an address.
8329 And force_operand won't know whether to sign-extend or
8330 zero-extend. */
8331 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8332 || mode != ptr_mode)
8333 {
8334 expand_operands (treeop0, treeop1,
8335 subtarget, &op0, &op1, EXPAND_NORMAL);
8336 if (op0 == const0_rtx)
8337 return op1;
8338 if (op1 == const0_rtx)
8339 return op0;
8340 goto binop2;
8341 }
8342
8343 expand_operands (treeop0, treeop1,
8344 subtarget, &op0, &op1, modifier);
8345 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8346
8347 case MINUS_EXPR:
8348 do_minus:
8349 /* For initializers, we are allowed to return a MINUS of two
8350 symbolic constants. Here we handle all cases when both operands
8351 are constant. */
8352 /* Handle difference of two symbolic constants,
8353 for the sake of an initializer. */
8354 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8355 && really_constant_p (treeop0)
8356 && really_constant_p (treeop1))
8357 {
8358 expand_operands (treeop0, treeop1,
8359 NULL_RTX, &op0, &op1, modifier);
8360
8361 /* If the last operand is a CONST_INT, use plus_constant of
8362 the negated constant. Else make the MINUS. */
8363 if (CONST_INT_P (op1))
8364 return REDUCE_BIT_FIELD (plus_constant (mode, op0,
8365 -INTVAL (op1)));
8366 else
8367 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8368 }
8369
8370 /* No sense saving up arithmetic to be done
8371 if it's all in the wrong mode to form part of an address.
8372 And force_operand won't know whether to sign-extend or
8373 zero-extend. */
8374 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8375 || mode != ptr_mode)
8376 goto binop;
8377
8378 expand_operands (treeop0, treeop1,
8379 subtarget, &op0, &op1, modifier);
8380
8381 /* Convert A - const to A + (-const). */
8382 if (CONST_INT_P (op1))
8383 {
8384 op1 = negate_rtx (mode, op1);
8385 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8386 }
8387
8388 goto binop2;
8389
8390 case WIDEN_MULT_PLUS_EXPR:
8391 case WIDEN_MULT_MINUS_EXPR:
8392 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8393 op2 = expand_normal (treeop2);
8394 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8395 target, unsignedp);
8396 return target;
8397
8398 case WIDEN_MULT_EXPR:
8399 /* If first operand is constant, swap them.
8400 Thus the following special case checks need only
8401 check the second operand. */
8402 if (TREE_CODE (treeop0) == INTEGER_CST)
8403 {
8404 tree t1 = treeop0;
8405 treeop0 = treeop1;
8406 treeop1 = t1;
8407 }
8408
8409 /* First, check if we have a multiplication of one signed and one
8410 unsigned operand. */
8411 if (TREE_CODE (treeop1) != INTEGER_CST
8412 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8413 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8414 {
8415 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8416 this_optab = usmul_widen_optab;
8417 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8418 != CODE_FOR_nothing)
8419 {
8420 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8421 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8422 EXPAND_NORMAL);
8423 else
8424 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8425 EXPAND_NORMAL);
8426 /* op0 and op1 might still be constant, despite the above
8427 != INTEGER_CST check. Handle it. */
8428 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8429 {
8430 op0 = convert_modes (innermode, mode, op0, true);
8431 op1 = convert_modes (innermode, mode, op1, false);
8432 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8433 target, unsignedp));
8434 }
8435 goto binop3;
8436 }
8437 }
8438 /* Check for a multiplication with matching signedness. */
8439 else if ((TREE_CODE (treeop1) == INTEGER_CST
8440 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8441 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8442 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8443 {
8444 tree op0type = TREE_TYPE (treeop0);
8445 enum machine_mode innermode = TYPE_MODE (op0type);
8446 bool zextend_p = TYPE_UNSIGNED (op0type);
8447 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8448 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8449
8450 if (TREE_CODE (treeop0) != INTEGER_CST)
8451 {
8452 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8453 != CODE_FOR_nothing)
8454 {
8455 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8456 EXPAND_NORMAL);
8457 /* op0 and op1 might still be constant, despite the above
8458 != INTEGER_CST check. Handle it. */
8459 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8460 {
8461 widen_mult_const:
8462 op0 = convert_modes (innermode, mode, op0, zextend_p);
8463 op1
8464 = convert_modes (innermode, mode, op1,
8465 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8466 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8467 target,
8468 unsignedp));
8469 }
8470 temp = expand_widening_mult (mode, op0, op1, target,
8471 unsignedp, this_optab);
8472 return REDUCE_BIT_FIELD (temp);
8473 }
8474 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8475 != CODE_FOR_nothing
8476 && innermode == word_mode)
8477 {
8478 rtx htem, hipart;
8479 op0 = expand_normal (treeop0);
8480 if (TREE_CODE (treeop1) == INTEGER_CST)
8481 op1 = convert_modes (innermode, mode,
8482 expand_normal (treeop1),
8483 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8484 else
8485 op1 = expand_normal (treeop1);
8486 /* op0 and op1 might still be constant, despite the above
8487 != INTEGER_CST check. Handle it. */
8488 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8489 goto widen_mult_const;
8490 temp = expand_binop (mode, other_optab, op0, op1, target,
8491 unsignedp, OPTAB_LIB_WIDEN);
8492 hipart = gen_highpart (innermode, temp);
8493 htem = expand_mult_highpart_adjust (innermode, hipart,
8494 op0, op1, hipart,
8495 zextend_p);
8496 if (htem != hipart)
8497 emit_move_insn (hipart, htem);
8498 return REDUCE_BIT_FIELD (temp);
8499 }
8500 }
8501 }
8502 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8503 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8504 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8505 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8506
8507 case FMA_EXPR:
8508 {
8509 optab opt = fma_optab;
8510 gimple def0, def2;
8511
8512 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8513 call. */
8514 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8515 {
8516 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8517 tree call_expr;
8518
8519 gcc_assert (fn != NULL_TREE);
8520 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8521 return expand_builtin (call_expr, target, subtarget, mode, false);
8522 }
8523
8524 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8525 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8526
8527 op0 = op2 = NULL;
8528
8529 if (def0 && def2
8530 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8531 {
8532 opt = fnms_optab;
8533 op0 = expand_normal (gimple_assign_rhs1 (def0));
8534 op2 = expand_normal (gimple_assign_rhs1 (def2));
8535 }
8536 else if (def0
8537 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8538 {
8539 opt = fnma_optab;
8540 op0 = expand_normal (gimple_assign_rhs1 (def0));
8541 }
8542 else if (def2
8543 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8544 {
8545 opt = fms_optab;
8546 op2 = expand_normal (gimple_assign_rhs1 (def2));
8547 }
8548
8549 if (op0 == NULL)
8550 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8551 if (op2 == NULL)
8552 op2 = expand_normal (treeop2);
8553 op1 = expand_normal (treeop1);
8554
8555 return expand_ternary_op (TYPE_MODE (type), opt,
8556 op0, op1, op2, target, 0);
8557 }
8558
8559 case MULT_EXPR:
8560 /* If this is a fixed-point operation, then we cannot use the code
8561 below because "expand_mult" doesn't support sat/no-sat fixed-point
8562 multiplications. */
8563 if (ALL_FIXED_POINT_MODE_P (mode))
8564 goto binop;
8565
8566 /* If first operand is constant, swap them.
8567 Thus the following special case checks need only
8568 check the second operand. */
8569 if (TREE_CODE (treeop0) == INTEGER_CST)
8570 {
8571 tree t1 = treeop0;
8572 treeop0 = treeop1;
8573 treeop1 = t1;
8574 }
8575
8576 /* Attempt to return something suitable for generating an
8577 indexed address, for machines that support that. */
8578
8579 if (modifier == EXPAND_SUM && mode == ptr_mode
8580 && tree_fits_shwi_p (treeop1))
8581 {
8582 tree exp1 = treeop1;
8583
8584 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8585 EXPAND_SUM);
8586
8587 if (!REG_P (op0))
8588 op0 = force_operand (op0, NULL_RTX);
8589 if (!REG_P (op0))
8590 op0 = copy_to_mode_reg (mode, op0);
8591
8592 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8593 gen_int_mode (tree_to_shwi (exp1),
8594 TYPE_MODE (TREE_TYPE (exp1)))));
8595 }
8596
8597 if (modifier == EXPAND_STACK_PARM)
8598 target = 0;
8599
8600 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8601 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8602
8603 case TRUNC_DIV_EXPR:
8604 case FLOOR_DIV_EXPR:
8605 case CEIL_DIV_EXPR:
8606 case ROUND_DIV_EXPR:
8607 case EXACT_DIV_EXPR:
8608 /* If this is a fixed-point operation, then we cannot use the code
8609 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8610 divisions. */
8611 if (ALL_FIXED_POINT_MODE_P (mode))
8612 goto binop;
8613
8614 if (modifier == EXPAND_STACK_PARM)
8615 target = 0;
8616 /* Possible optimization: compute the dividend with EXPAND_SUM
8617 then if the divisor is constant can optimize the case
8618 where some terms of the dividend have coeffs divisible by it. */
8619 expand_operands (treeop0, treeop1,
8620 subtarget, &op0, &op1, EXPAND_NORMAL);
8621 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8622
8623 case RDIV_EXPR:
8624 goto binop;
8625
8626 case MULT_HIGHPART_EXPR:
8627 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8628 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp);
8629 gcc_assert (temp);
8630 return temp;
8631
8632 case TRUNC_MOD_EXPR:
8633 case FLOOR_MOD_EXPR:
8634 case CEIL_MOD_EXPR:
8635 case ROUND_MOD_EXPR:
8636 if (modifier == EXPAND_STACK_PARM)
8637 target = 0;
8638 expand_operands (treeop0, treeop1,
8639 subtarget, &op0, &op1, EXPAND_NORMAL);
8640 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8641
8642 case FIXED_CONVERT_EXPR:
8643 op0 = expand_normal (treeop0);
8644 if (target == 0 || modifier == EXPAND_STACK_PARM)
8645 target = gen_reg_rtx (mode);
8646
8647 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8648 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8649 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8650 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8651 else
8652 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8653 return target;
8654
8655 case FIX_TRUNC_EXPR:
8656 op0 = expand_normal (treeop0);
8657 if (target == 0 || modifier == EXPAND_STACK_PARM)
8658 target = gen_reg_rtx (mode);
8659 expand_fix (target, op0, unsignedp);
8660 return target;
8661
8662 case FLOAT_EXPR:
8663 op0 = expand_normal (treeop0);
8664 if (target == 0 || modifier == EXPAND_STACK_PARM)
8665 target = gen_reg_rtx (mode);
8666 /* expand_float can't figure out what to do if FROM has VOIDmode.
8667 So give it the correct mode. With -O, cse will optimize this. */
8668 if (GET_MODE (op0) == VOIDmode)
8669 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8670 op0);
8671 expand_float (target, op0,
8672 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8673 return target;
8674
8675 case NEGATE_EXPR:
8676 op0 = expand_expr (treeop0, subtarget,
8677 VOIDmode, EXPAND_NORMAL);
8678 if (modifier == EXPAND_STACK_PARM)
8679 target = 0;
8680 temp = expand_unop (mode,
8681 optab_for_tree_code (NEGATE_EXPR, type,
8682 optab_default),
8683 op0, target, 0);
8684 gcc_assert (temp);
8685 return REDUCE_BIT_FIELD (temp);
8686
8687 case ABS_EXPR:
8688 op0 = expand_expr (treeop0, subtarget,
8689 VOIDmode, EXPAND_NORMAL);
8690 if (modifier == EXPAND_STACK_PARM)
8691 target = 0;
8692
8693 /* ABS_EXPR is not valid for complex arguments. */
8694 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8695 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8696
8697 /* Unsigned abs is simply the operand. Testing here means we don't
8698 risk generating incorrect code below. */
8699 if (TYPE_UNSIGNED (type))
8700 return op0;
8701
8702 return expand_abs (mode, op0, target, unsignedp,
8703 safe_from_p (target, treeop0, 1));
8704
8705 case MAX_EXPR:
8706 case MIN_EXPR:
8707 target = original_target;
8708 if (target == 0
8709 || modifier == EXPAND_STACK_PARM
8710 || (MEM_P (target) && MEM_VOLATILE_P (target))
8711 || GET_MODE (target) != mode
8712 || (REG_P (target)
8713 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8714 target = gen_reg_rtx (mode);
8715 expand_operands (treeop0, treeop1,
8716 target, &op0, &op1, EXPAND_NORMAL);
8717
8718 /* First try to do it with a special MIN or MAX instruction.
8719 If that does not win, use a conditional jump to select the proper
8720 value. */
8721 this_optab = optab_for_tree_code (code, type, optab_default);
8722 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8723 OPTAB_WIDEN);
8724 if (temp != 0)
8725 return temp;
8726
8727 /* At this point, a MEM target is no longer useful; we will get better
8728 code without it. */
8729
8730 if (! REG_P (target))
8731 target = gen_reg_rtx (mode);
8732
8733 /* If op1 was placed in target, swap op0 and op1. */
8734 if (target != op0 && target == op1)
8735 {
8736 temp = op0;
8737 op0 = op1;
8738 op1 = temp;
8739 }
8740
8741 /* We generate better code and avoid problems with op1 mentioning
8742 target by forcing op1 into a pseudo if it isn't a constant. */
8743 if (! CONSTANT_P (op1))
8744 op1 = force_reg (mode, op1);
8745
8746 {
8747 enum rtx_code comparison_code;
8748 rtx cmpop1 = op1;
8749
8750 if (code == MAX_EXPR)
8751 comparison_code = unsignedp ? GEU : GE;
8752 else
8753 comparison_code = unsignedp ? LEU : LE;
8754
8755 /* Canonicalize to comparisons against 0. */
8756 if (op1 == const1_rtx)
8757 {
8758 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8759 or (a != 0 ? a : 1) for unsigned.
8760 For MIN we are safe converting (a <= 1 ? a : 1)
8761 into (a <= 0 ? a : 1) */
8762 cmpop1 = const0_rtx;
8763 if (code == MAX_EXPR)
8764 comparison_code = unsignedp ? NE : GT;
8765 }
8766 if (op1 == constm1_rtx && !unsignedp)
8767 {
8768 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8769 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8770 cmpop1 = const0_rtx;
8771 if (code == MIN_EXPR)
8772 comparison_code = LT;
8773 }
8774 #ifdef HAVE_conditional_move
8775 /* Use a conditional move if possible. */
8776 if (can_conditionally_move_p (mode))
8777 {
8778 rtx insn;
8779
8780 /* ??? Same problem as in expmed.c: emit_conditional_move
8781 forces a stack adjustment via compare_from_rtx, and we
8782 lose the stack adjustment if the sequence we are about
8783 to create is discarded. */
8784 do_pending_stack_adjust ();
8785
8786 start_sequence ();
8787
8788 /* Try to emit the conditional move. */
8789 insn = emit_conditional_move (target, comparison_code,
8790 op0, cmpop1, mode,
8791 op0, op1, mode,
8792 unsignedp);
8793
8794 /* If we could do the conditional move, emit the sequence,
8795 and return. */
8796 if (insn)
8797 {
8798 rtx seq = get_insns ();
8799 end_sequence ();
8800 emit_insn (seq);
8801 return target;
8802 }
8803
8804 /* Otherwise discard the sequence and fall back to code with
8805 branches. */
8806 end_sequence ();
8807 }
8808 #endif
8809 if (target != op0)
8810 emit_move_insn (target, op0);
8811
8812 temp = gen_label_rtx ();
8813 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8814 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8815 -1);
8816 }
8817 emit_move_insn (target, op1);
8818 emit_label (temp);
8819 return target;
8820
8821 case BIT_NOT_EXPR:
8822 op0 = expand_expr (treeop0, subtarget,
8823 VOIDmode, EXPAND_NORMAL);
8824 if (modifier == EXPAND_STACK_PARM)
8825 target = 0;
8826 /* In case we have to reduce the result to bitfield precision
8827 for unsigned bitfield expand this as XOR with a proper constant
8828 instead. */
8829 if (reduce_bit_field && TYPE_UNSIGNED (type))
8830 temp = expand_binop (mode, xor_optab, op0,
8831 immed_double_int_const
8832 (double_int::mask (TYPE_PRECISION (type)), mode),
8833 target, 1, OPTAB_LIB_WIDEN);
8834 else
8835 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8836 gcc_assert (temp);
8837 return temp;
8838
8839 /* ??? Can optimize bitwise operations with one arg constant.
8840 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8841 and (a bitwise1 b) bitwise2 b (etc)
8842 but that is probably not worth while. */
8843
8844 case BIT_AND_EXPR:
8845 case BIT_IOR_EXPR:
8846 case BIT_XOR_EXPR:
8847 goto binop;
8848
8849 case LROTATE_EXPR:
8850 case RROTATE_EXPR:
8851 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8852 || (GET_MODE_PRECISION (TYPE_MODE (type))
8853 == TYPE_PRECISION (type)));
8854 /* fall through */
8855
8856 case LSHIFT_EXPR:
8857 case RSHIFT_EXPR:
8858 /* If this is a fixed-point operation, then we cannot use the code
8859 below because "expand_shift" doesn't support sat/no-sat fixed-point
8860 shifts. */
8861 if (ALL_FIXED_POINT_MODE_P (mode))
8862 goto binop;
8863
8864 if (! safe_from_p (subtarget, treeop1, 1))
8865 subtarget = 0;
8866 if (modifier == EXPAND_STACK_PARM)
8867 target = 0;
8868 op0 = expand_expr (treeop0, subtarget,
8869 VOIDmode, EXPAND_NORMAL);
8870 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8871 unsignedp);
8872 if (code == LSHIFT_EXPR)
8873 temp = REDUCE_BIT_FIELD (temp);
8874 return temp;
8875
8876 /* Could determine the answer when only additive constants differ. Also,
8877 the addition of one can be handled by changing the condition. */
8878 case LT_EXPR:
8879 case LE_EXPR:
8880 case GT_EXPR:
8881 case GE_EXPR:
8882 case EQ_EXPR:
8883 case NE_EXPR:
8884 case UNORDERED_EXPR:
8885 case ORDERED_EXPR:
8886 case UNLT_EXPR:
8887 case UNLE_EXPR:
8888 case UNGT_EXPR:
8889 case UNGE_EXPR:
8890 case UNEQ_EXPR:
8891 case LTGT_EXPR:
8892 temp = do_store_flag (ops,
8893 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8894 tmode != VOIDmode ? tmode : mode);
8895 if (temp)
8896 return temp;
8897
8898 /* Use a compare and a jump for BLKmode comparisons, or for function
8899 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8900
8901 if ((target == 0
8902 || modifier == EXPAND_STACK_PARM
8903 || ! safe_from_p (target, treeop0, 1)
8904 || ! safe_from_p (target, treeop1, 1)
8905 /* Make sure we don't have a hard reg (such as function's return
8906 value) live across basic blocks, if not optimizing. */
8907 || (!optimize && REG_P (target)
8908 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8909 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8910
8911 emit_move_insn (target, const0_rtx);
8912
8913 op1 = gen_label_rtx ();
8914 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8915
8916 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8917 emit_move_insn (target, constm1_rtx);
8918 else
8919 emit_move_insn (target, const1_rtx);
8920
8921 emit_label (op1);
8922 return target;
8923
8924 case COMPLEX_EXPR:
8925 /* Get the rtx code of the operands. */
8926 op0 = expand_normal (treeop0);
8927 op1 = expand_normal (treeop1);
8928
8929 if (!target)
8930 target = gen_reg_rtx (TYPE_MODE (type));
8931 else
8932 /* If target overlaps with op1, then either we need to force
8933 op1 into a pseudo (if target also overlaps with op0),
8934 or write the complex parts in reverse order. */
8935 switch (GET_CODE (target))
8936 {
8937 case CONCAT:
8938 if (reg_overlap_mentioned_p (XEXP (target, 0), op1))
8939 {
8940 if (reg_overlap_mentioned_p (XEXP (target, 1), op0))
8941 {
8942 complex_expr_force_op1:
8943 temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target)));
8944 emit_move_insn (temp, op1);
8945 op1 = temp;
8946 break;
8947 }
8948 complex_expr_swap_order:
8949 /* Move the imaginary (op1) and real (op0) parts to their
8950 location. */
8951 write_complex_part (target, op1, true);
8952 write_complex_part (target, op0, false);
8953
8954 return target;
8955 }
8956 break;
8957 case MEM:
8958 temp = adjust_address_nv (target,
8959 GET_MODE_INNER (GET_MODE (target)), 0);
8960 if (reg_overlap_mentioned_p (temp, op1))
8961 {
8962 enum machine_mode imode = GET_MODE_INNER (GET_MODE (target));
8963 temp = adjust_address_nv (target, imode,
8964 GET_MODE_SIZE (imode));
8965 if (reg_overlap_mentioned_p (temp, op0))
8966 goto complex_expr_force_op1;
8967 goto complex_expr_swap_order;
8968 }
8969 break;
8970 default:
8971 if (reg_overlap_mentioned_p (target, op1))
8972 {
8973 if (reg_overlap_mentioned_p (target, op0))
8974 goto complex_expr_force_op1;
8975 goto complex_expr_swap_order;
8976 }
8977 break;
8978 }
8979
8980 /* Move the real (op0) and imaginary (op1) parts to their location. */
8981 write_complex_part (target, op0, false);
8982 write_complex_part (target, op1, true);
8983
8984 return target;
8985
8986 case WIDEN_SUM_EXPR:
8987 {
8988 tree oprnd0 = treeop0;
8989 tree oprnd1 = treeop1;
8990
8991 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8992 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8993 target, unsignedp);
8994 return target;
8995 }
8996
8997 case REDUC_MAX_EXPR:
8998 case REDUC_MIN_EXPR:
8999 case REDUC_PLUS_EXPR:
9000 {
9001 op0 = expand_normal (treeop0);
9002 this_optab = optab_for_tree_code (code, type, optab_default);
9003 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
9004 gcc_assert (temp);
9005 return temp;
9006 }
9007
9008 case VEC_LSHIFT_EXPR:
9009 case VEC_RSHIFT_EXPR:
9010 {
9011 target = expand_vec_shift_expr (ops, target);
9012 return target;
9013 }
9014
9015 case VEC_UNPACK_HI_EXPR:
9016 case VEC_UNPACK_LO_EXPR:
9017 {
9018 op0 = expand_normal (treeop0);
9019 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
9020 target, unsignedp);
9021 gcc_assert (temp);
9022 return temp;
9023 }
9024
9025 case VEC_UNPACK_FLOAT_HI_EXPR:
9026 case VEC_UNPACK_FLOAT_LO_EXPR:
9027 {
9028 op0 = expand_normal (treeop0);
9029 /* The signedness is determined from input operand. */
9030 temp = expand_widen_pattern_expr
9031 (ops, op0, NULL_RTX, NULL_RTX,
9032 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9033
9034 gcc_assert (temp);
9035 return temp;
9036 }
9037
9038 case VEC_WIDEN_MULT_HI_EXPR:
9039 case VEC_WIDEN_MULT_LO_EXPR:
9040 case VEC_WIDEN_MULT_EVEN_EXPR:
9041 case VEC_WIDEN_MULT_ODD_EXPR:
9042 case VEC_WIDEN_LSHIFT_HI_EXPR:
9043 case VEC_WIDEN_LSHIFT_LO_EXPR:
9044 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9045 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
9046 target, unsignedp);
9047 gcc_assert (target);
9048 return target;
9049
9050 case VEC_PACK_TRUNC_EXPR:
9051 case VEC_PACK_SAT_EXPR:
9052 case VEC_PACK_FIX_TRUNC_EXPR:
9053 mode = TYPE_MODE (TREE_TYPE (treeop0));
9054 goto binop;
9055
9056 case VEC_PERM_EXPR:
9057 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
9058 op2 = expand_normal (treeop2);
9059
9060 /* Careful here: if the target doesn't support integral vector modes,
9061 a constant selection vector could wind up smooshed into a normal
9062 integral constant. */
9063 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
9064 {
9065 tree sel_type = TREE_TYPE (treeop2);
9066 enum machine_mode vmode
9067 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
9068 TYPE_VECTOR_SUBPARTS (sel_type));
9069 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
9070 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
9071 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
9072 }
9073 else
9074 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
9075
9076 temp = expand_vec_perm (mode, op0, op1, op2, target);
9077 gcc_assert (temp);
9078 return temp;
9079
9080 case DOT_PROD_EXPR:
9081 {
9082 tree oprnd0 = treeop0;
9083 tree oprnd1 = treeop1;
9084 tree oprnd2 = treeop2;
9085 rtx op2;
9086
9087 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9088 op2 = expand_normal (oprnd2);
9089 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9090 target, unsignedp);
9091 return target;
9092 }
9093
9094 case REALIGN_LOAD_EXPR:
9095 {
9096 tree oprnd0 = treeop0;
9097 tree oprnd1 = treeop1;
9098 tree oprnd2 = treeop2;
9099 rtx op2;
9100
9101 this_optab = optab_for_tree_code (code, type, optab_default);
9102 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9103 op2 = expand_normal (oprnd2);
9104 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9105 target, unsignedp);
9106 gcc_assert (temp);
9107 return temp;
9108 }
9109
9110 case COND_EXPR:
9111 /* A COND_EXPR with its type being VOID_TYPE represents a
9112 conditional jump and is handled in
9113 expand_gimple_cond_expr. */
9114 gcc_assert (!VOID_TYPE_P (type));
9115
9116 /* Note that COND_EXPRs whose type is a structure or union
9117 are required to be constructed to contain assignments of
9118 a temporary variable, so that we can evaluate them here
9119 for side effect only. If type is void, we must do likewise. */
9120
9121 gcc_assert (!TREE_ADDRESSABLE (type)
9122 && !ignore
9123 && TREE_TYPE (treeop1) != void_type_node
9124 && TREE_TYPE (treeop2) != void_type_node);
9125
9126 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9127 if (temp)
9128 return temp;
9129
9130 /* If we are not to produce a result, we have no target. Otherwise,
9131 if a target was specified use it; it will not be used as an
9132 intermediate target unless it is safe. If no target, use a
9133 temporary. */
9134
9135 if (modifier != EXPAND_STACK_PARM
9136 && original_target
9137 && safe_from_p (original_target, treeop0, 1)
9138 && GET_MODE (original_target) == mode
9139 && !MEM_P (original_target))
9140 temp = original_target;
9141 else
9142 temp = assign_temp (type, 0, 1);
9143
9144 do_pending_stack_adjust ();
9145 NO_DEFER_POP;
9146 op0 = gen_label_rtx ();
9147 op1 = gen_label_rtx ();
9148 jumpifnot (treeop0, op0, -1);
9149 store_expr (treeop1, temp,
9150 modifier == EXPAND_STACK_PARM,
9151 false);
9152
9153 emit_jump_insn (gen_jump (op1));
9154 emit_barrier ();
9155 emit_label (op0);
9156 store_expr (treeop2, temp,
9157 modifier == EXPAND_STACK_PARM,
9158 false);
9159
9160 emit_label (op1);
9161 OK_DEFER_POP;
9162 return temp;
9163
9164 case VEC_COND_EXPR:
9165 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9166 return target;
9167
9168 default:
9169 gcc_unreachable ();
9170 }
9171
9172 /* Here to do an ordinary binary operator. */
9173 binop:
9174 expand_operands (treeop0, treeop1,
9175 subtarget, &op0, &op1, EXPAND_NORMAL);
9176 binop2:
9177 this_optab = optab_for_tree_code (code, type, optab_default);
9178 binop3:
9179 if (modifier == EXPAND_STACK_PARM)
9180 target = 0;
9181 temp = expand_binop (mode, this_optab, op0, op1, target,
9182 unsignedp, OPTAB_LIB_WIDEN);
9183 gcc_assert (temp);
9184 /* Bitwise operations do not need bitfield reduction as we expect their
9185 operands being properly truncated. */
9186 if (code == BIT_XOR_EXPR
9187 || code == BIT_AND_EXPR
9188 || code == BIT_IOR_EXPR)
9189 return temp;
9190 return REDUCE_BIT_FIELD (temp);
9191 }
9192 #undef REDUCE_BIT_FIELD
9193
9194
9195 /* Return TRUE if expression STMT is suitable for replacement.
9196 Never consider memory loads as replaceable, because those don't ever lead
9197 into constant expressions. */
9198
9199 static bool
9200 stmt_is_replaceable_p (gimple stmt)
9201 {
9202 if (ssa_is_replaceable_p (stmt))
9203 {
9204 /* Don't move around loads. */
9205 if (!gimple_assign_single_p (stmt)
9206 || is_gimple_val (gimple_assign_rhs1 (stmt)))
9207 return true;
9208 }
9209 return false;
9210 }
9211
9212 rtx
9213 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
9214 enum expand_modifier modifier, rtx *alt_rtl)
9215 {
9216 rtx op0, op1, temp, decl_rtl;
9217 tree type;
9218 int unsignedp;
9219 enum machine_mode mode;
9220 enum tree_code code = TREE_CODE (exp);
9221 rtx subtarget, original_target;
9222 int ignore;
9223 tree context;
9224 bool reduce_bit_field;
9225 location_t loc = EXPR_LOCATION (exp);
9226 struct separate_ops ops;
9227 tree treeop0, treeop1, treeop2;
9228 tree ssa_name = NULL_TREE;
9229 gimple g;
9230
9231 type = TREE_TYPE (exp);
9232 mode = TYPE_MODE (type);
9233 unsignedp = TYPE_UNSIGNED (type);
9234
9235 treeop0 = treeop1 = treeop2 = NULL_TREE;
9236 if (!VL_EXP_CLASS_P (exp))
9237 switch (TREE_CODE_LENGTH (code))
9238 {
9239 default:
9240 case 3: treeop2 = TREE_OPERAND (exp, 2);
9241 case 2: treeop1 = TREE_OPERAND (exp, 1);
9242 case 1: treeop0 = TREE_OPERAND (exp, 0);
9243 case 0: break;
9244 }
9245 ops.code = code;
9246 ops.type = type;
9247 ops.op0 = treeop0;
9248 ops.op1 = treeop1;
9249 ops.op2 = treeop2;
9250 ops.location = loc;
9251
9252 ignore = (target == const0_rtx
9253 || ((CONVERT_EXPR_CODE_P (code)
9254 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9255 && TREE_CODE (type) == VOID_TYPE));
9256
9257 /* An operation in what may be a bit-field type needs the
9258 result to be reduced to the precision of the bit-field type,
9259 which is narrower than that of the type's mode. */
9260 reduce_bit_field = (!ignore
9261 && INTEGRAL_TYPE_P (type)
9262 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
9263
9264 /* If we are going to ignore this result, we need only do something
9265 if there is a side-effect somewhere in the expression. If there
9266 is, short-circuit the most common cases here. Note that we must
9267 not call expand_expr with anything but const0_rtx in case this
9268 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9269
9270 if (ignore)
9271 {
9272 if (! TREE_SIDE_EFFECTS (exp))
9273 return const0_rtx;
9274
9275 /* Ensure we reference a volatile object even if value is ignored, but
9276 don't do this if all we are doing is taking its address. */
9277 if (TREE_THIS_VOLATILE (exp)
9278 && TREE_CODE (exp) != FUNCTION_DECL
9279 && mode != VOIDmode && mode != BLKmode
9280 && modifier != EXPAND_CONST_ADDRESS)
9281 {
9282 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9283 if (MEM_P (temp))
9284 copy_to_reg (temp);
9285 return const0_rtx;
9286 }
9287
9288 if (TREE_CODE_CLASS (code) == tcc_unary
9289 || code == BIT_FIELD_REF
9290 || code == COMPONENT_REF
9291 || code == INDIRECT_REF)
9292 return expand_expr (treeop0, const0_rtx, VOIDmode,
9293 modifier);
9294
9295 else if (TREE_CODE_CLASS (code) == tcc_binary
9296 || TREE_CODE_CLASS (code) == tcc_comparison
9297 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9298 {
9299 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9300 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9301 return const0_rtx;
9302 }
9303
9304 target = 0;
9305 }
9306
9307 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9308 target = 0;
9309
9310 /* Use subtarget as the target for operand 0 of a binary operation. */
9311 subtarget = get_subtarget (target);
9312 original_target = target;
9313
9314 switch (code)
9315 {
9316 case LABEL_DECL:
9317 {
9318 tree function = decl_function_context (exp);
9319
9320 temp = label_rtx (exp);
9321 temp = gen_rtx_LABEL_REF (Pmode, temp);
9322
9323 if (function != current_function_decl
9324 && function != 0)
9325 LABEL_REF_NONLOCAL_P (temp) = 1;
9326
9327 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9328 return temp;
9329 }
9330
9331 case SSA_NAME:
9332 /* ??? ivopts calls expander, without any preparation from
9333 out-of-ssa. So fake instructions as if this was an access to the
9334 base variable. This unnecessarily allocates a pseudo, see how we can
9335 reuse it, if partition base vars have it set already. */
9336 if (!currently_expanding_to_rtl)
9337 {
9338 tree var = SSA_NAME_VAR (exp);
9339 if (var && DECL_RTL_SET_P (var))
9340 return DECL_RTL (var);
9341 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)),
9342 LAST_VIRTUAL_REGISTER + 1);
9343 }
9344
9345 g = get_gimple_for_ssa_name (exp);
9346 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9347 if (g == NULL
9348 && modifier == EXPAND_INITIALIZER
9349 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9350 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9351 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9352 g = SSA_NAME_DEF_STMT (exp);
9353 if (g)
9354 {
9355 rtx r;
9356 location_t saved_loc = curr_insn_location ();
9357
9358 set_curr_insn_location (gimple_location (g));
9359 r = expand_expr_real (gimple_assign_rhs_to_tree (g), target,
9360 tmode, modifier, NULL);
9361 set_curr_insn_location (saved_loc);
9362 if (REG_P (r) && !REG_EXPR (r))
9363 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9364 return r;
9365 }
9366
9367 ssa_name = exp;
9368 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9369 exp = SSA_NAME_VAR (ssa_name);
9370 goto expand_decl_rtl;
9371
9372 case PARM_DECL:
9373 case VAR_DECL:
9374 /* If a static var's type was incomplete when the decl was written,
9375 but the type is complete now, lay out the decl now. */
9376 if (DECL_SIZE (exp) == 0
9377 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9378 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9379 layout_decl (exp, 0);
9380
9381 /* ... fall through ... */
9382
9383 case FUNCTION_DECL:
9384 case RESULT_DECL:
9385 decl_rtl = DECL_RTL (exp);
9386 expand_decl_rtl:
9387 gcc_assert (decl_rtl);
9388 decl_rtl = copy_rtx (decl_rtl);
9389 /* Record writes to register variables. */
9390 if (modifier == EXPAND_WRITE
9391 && REG_P (decl_rtl)
9392 && HARD_REGISTER_P (decl_rtl))
9393 add_to_hard_reg_set (&crtl->asm_clobbers,
9394 GET_MODE (decl_rtl), REGNO (decl_rtl));
9395
9396 /* Ensure variable marked as used even if it doesn't go through
9397 a parser. If it hasn't be used yet, write out an external
9398 definition. */
9399 TREE_USED (exp) = 1;
9400
9401 /* Show we haven't gotten RTL for this yet. */
9402 temp = 0;
9403
9404 /* Variables inherited from containing functions should have
9405 been lowered by this point. */
9406 context = decl_function_context (exp);
9407 gcc_assert (SCOPE_FILE_SCOPE_P (context)
9408 || context == current_function_decl
9409 || TREE_STATIC (exp)
9410 || DECL_EXTERNAL (exp)
9411 /* ??? C++ creates functions that are not TREE_STATIC. */
9412 || TREE_CODE (exp) == FUNCTION_DECL);
9413
9414 /* This is the case of an array whose size is to be determined
9415 from its initializer, while the initializer is still being parsed.
9416 ??? We aren't parsing while expanding anymore. */
9417
9418 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9419 temp = validize_mem (decl_rtl);
9420
9421 /* If DECL_RTL is memory, we are in the normal case and the
9422 address is not valid, get the address into a register. */
9423
9424 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9425 {
9426 if (alt_rtl)
9427 *alt_rtl = decl_rtl;
9428 decl_rtl = use_anchored_address (decl_rtl);
9429 if (modifier != EXPAND_CONST_ADDRESS
9430 && modifier != EXPAND_SUM
9431 && !memory_address_addr_space_p (DECL_MODE (exp),
9432 XEXP (decl_rtl, 0),
9433 MEM_ADDR_SPACE (decl_rtl)))
9434 temp = replace_equiv_address (decl_rtl,
9435 copy_rtx (XEXP (decl_rtl, 0)));
9436 }
9437
9438 /* If we got something, return it. But first, set the alignment
9439 if the address is a register. */
9440 if (temp != 0)
9441 {
9442 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9443 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9444
9445 return temp;
9446 }
9447
9448 /* If the mode of DECL_RTL does not match that of the decl,
9449 there are two cases: we are dealing with a BLKmode value
9450 that is returned in a register, or we are dealing with
9451 a promoted value. In the latter case, return a SUBREG
9452 of the wanted mode, but mark it so that we know that it
9453 was already extended. */
9454 if (REG_P (decl_rtl)
9455 && DECL_MODE (exp) != BLKmode
9456 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9457 {
9458 enum machine_mode pmode;
9459
9460 /* Get the signedness to be used for this variable. Ensure we get
9461 the same mode we got when the variable was declared. */
9462 if (code == SSA_NAME
9463 && (g = SSA_NAME_DEF_STMT (ssa_name))
9464 && gimple_code (g) == GIMPLE_CALL)
9465 {
9466 gcc_assert (!gimple_call_internal_p (g));
9467 pmode = promote_function_mode (type, mode, &unsignedp,
9468 gimple_call_fntype (g),
9469 2);
9470 }
9471 else
9472 pmode = promote_decl_mode (exp, &unsignedp);
9473 gcc_assert (GET_MODE (decl_rtl) == pmode);
9474
9475 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9476 SUBREG_PROMOTED_VAR_P (temp) = 1;
9477 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
9478 return temp;
9479 }
9480
9481 return decl_rtl;
9482
9483 case INTEGER_CST:
9484 temp = immed_double_const (TREE_INT_CST_LOW (exp),
9485 TREE_INT_CST_HIGH (exp), mode);
9486
9487 return temp;
9488
9489 case VECTOR_CST:
9490 {
9491 tree tmp = NULL_TREE;
9492 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9493 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9494 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9495 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9496 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9497 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9498 return const_vector_from_tree (exp);
9499 if (GET_MODE_CLASS (mode) == MODE_INT)
9500 {
9501 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9502 if (type_for_mode)
9503 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9504 }
9505 if (!tmp)
9506 {
9507 vec<constructor_elt, va_gc> *v;
9508 unsigned i;
9509 vec_alloc (v, VECTOR_CST_NELTS (exp));
9510 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
9511 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
9512 tmp = build_constructor (type, v);
9513 }
9514 return expand_expr (tmp, ignore ? const0_rtx : target,
9515 tmode, modifier);
9516 }
9517
9518 case CONST_DECL:
9519 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9520
9521 case REAL_CST:
9522 /* If optimized, generate immediate CONST_DOUBLE
9523 which will be turned into memory by reload if necessary.
9524
9525 We used to force a register so that loop.c could see it. But
9526 this does not allow gen_* patterns to perform optimizations with
9527 the constants. It also produces two insns in cases like "x = 1.0;".
9528 On most machines, floating-point constants are not permitted in
9529 many insns, so we'd end up copying it to a register in any case.
9530
9531 Now, we do the copying in expand_binop, if appropriate. */
9532 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9533 TYPE_MODE (TREE_TYPE (exp)));
9534
9535 case FIXED_CST:
9536 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9537 TYPE_MODE (TREE_TYPE (exp)));
9538
9539 case COMPLEX_CST:
9540 /* Handle evaluating a complex constant in a CONCAT target. */
9541 if (original_target && GET_CODE (original_target) == CONCAT)
9542 {
9543 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9544 rtx rtarg, itarg;
9545
9546 rtarg = XEXP (original_target, 0);
9547 itarg = XEXP (original_target, 1);
9548
9549 /* Move the real and imaginary parts separately. */
9550 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9551 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9552
9553 if (op0 != rtarg)
9554 emit_move_insn (rtarg, op0);
9555 if (op1 != itarg)
9556 emit_move_insn (itarg, op1);
9557
9558 return original_target;
9559 }
9560
9561 /* ... fall through ... */
9562
9563 case STRING_CST:
9564 temp = expand_expr_constant (exp, 1, modifier);
9565
9566 /* temp contains a constant address.
9567 On RISC machines where a constant address isn't valid,
9568 make some insns to get that address into a register. */
9569 if (modifier != EXPAND_CONST_ADDRESS
9570 && modifier != EXPAND_INITIALIZER
9571 && modifier != EXPAND_SUM
9572 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9573 MEM_ADDR_SPACE (temp)))
9574 return replace_equiv_address (temp,
9575 copy_rtx (XEXP (temp, 0)));
9576 return temp;
9577
9578 case SAVE_EXPR:
9579 {
9580 tree val = treeop0;
9581 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
9582
9583 if (!SAVE_EXPR_RESOLVED_P (exp))
9584 {
9585 /* We can indeed still hit this case, typically via builtin
9586 expanders calling save_expr immediately before expanding
9587 something. Assume this means that we only have to deal
9588 with non-BLKmode values. */
9589 gcc_assert (GET_MODE (ret) != BLKmode);
9590
9591 val = build_decl (curr_insn_location (),
9592 VAR_DECL, NULL, TREE_TYPE (exp));
9593 DECL_ARTIFICIAL (val) = 1;
9594 DECL_IGNORED_P (val) = 1;
9595 treeop0 = val;
9596 TREE_OPERAND (exp, 0) = treeop0;
9597 SAVE_EXPR_RESOLVED_P (exp) = 1;
9598
9599 if (!CONSTANT_P (ret))
9600 ret = copy_to_reg (ret);
9601 SET_DECL_RTL (val, ret);
9602 }
9603
9604 return ret;
9605 }
9606
9607
9608 case CONSTRUCTOR:
9609 /* If we don't need the result, just ensure we evaluate any
9610 subexpressions. */
9611 if (ignore)
9612 {
9613 unsigned HOST_WIDE_INT idx;
9614 tree value;
9615
9616 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9617 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9618
9619 return const0_rtx;
9620 }
9621
9622 return expand_constructor (exp, target, modifier, false);
9623
9624 case TARGET_MEM_REF:
9625 {
9626 addr_space_t as
9627 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9628 enum insn_code icode;
9629 unsigned int align;
9630
9631 op0 = addr_for_mem_ref (exp, as, true);
9632 op0 = memory_address_addr_space (mode, op0, as);
9633 temp = gen_rtx_MEM (mode, op0);
9634 set_mem_attributes (temp, exp, 0);
9635 set_mem_addr_space (temp, as);
9636 align = get_object_alignment (exp);
9637 if (modifier != EXPAND_WRITE
9638 && modifier != EXPAND_MEMORY
9639 && mode != BLKmode
9640 && align < GET_MODE_ALIGNMENT (mode)
9641 /* If the target does not have special handling for unaligned
9642 loads of mode then it can use regular moves for them. */
9643 && ((icode = optab_handler (movmisalign_optab, mode))
9644 != CODE_FOR_nothing))
9645 {
9646 struct expand_operand ops[2];
9647
9648 /* We've already validated the memory, and we're creating a
9649 new pseudo destination. The predicates really can't fail,
9650 nor can the generator. */
9651 create_output_operand (&ops[0], NULL_RTX, mode);
9652 create_fixed_operand (&ops[1], temp);
9653 expand_insn (icode, 2, ops);
9654 temp = ops[0].value;
9655 }
9656 return temp;
9657 }
9658
9659 case MEM_REF:
9660 {
9661 addr_space_t as
9662 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9663 enum machine_mode address_mode;
9664 tree base = TREE_OPERAND (exp, 0);
9665 gimple def_stmt;
9666 enum insn_code icode;
9667 unsigned align;
9668 /* Handle expansion of non-aliased memory with non-BLKmode. That
9669 might end up in a register. */
9670 if (mem_ref_refers_to_non_mem_p (exp))
9671 {
9672 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9673 base = TREE_OPERAND (base, 0);
9674 if (offset == 0
9675 && tree_fits_uhwi_p (TYPE_SIZE (type))
9676 && (GET_MODE_BITSIZE (DECL_MODE (base))
9677 == tree_to_uhwi (TYPE_SIZE (type))))
9678 return expand_expr (build1 (VIEW_CONVERT_EXPR, type, base),
9679 target, tmode, modifier);
9680 if (TYPE_MODE (type) == BLKmode)
9681 {
9682 temp = assign_stack_temp (DECL_MODE (base),
9683 GET_MODE_SIZE (DECL_MODE (base)));
9684 store_expr (base, temp, 0, false);
9685 temp = adjust_address (temp, BLKmode, offset);
9686 set_mem_size (temp, int_size_in_bytes (type));
9687 return temp;
9688 }
9689 exp = build3 (BIT_FIELD_REF, type, base, TYPE_SIZE (type),
9690 bitsize_int (offset * BITS_PER_UNIT));
9691 return expand_expr (exp, target, tmode, modifier);
9692 }
9693 address_mode = targetm.addr_space.address_mode (as);
9694 base = TREE_OPERAND (exp, 0);
9695 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9696 {
9697 tree mask = gimple_assign_rhs2 (def_stmt);
9698 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9699 gimple_assign_rhs1 (def_stmt), mask);
9700 TREE_OPERAND (exp, 0) = base;
9701 }
9702 align = get_object_alignment (exp);
9703 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9704 op0 = memory_address_addr_space (mode, op0, as);
9705 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9706 {
9707 rtx off
9708 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9709 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9710 op0 = memory_address_addr_space (mode, op0, as);
9711 }
9712 temp = gen_rtx_MEM (mode, op0);
9713 set_mem_attributes (temp, exp, 0);
9714 set_mem_addr_space (temp, as);
9715 if (TREE_THIS_VOLATILE (exp))
9716 MEM_VOLATILE_P (temp) = 1;
9717 if (modifier != EXPAND_WRITE
9718 && modifier != EXPAND_MEMORY
9719 && mode != BLKmode
9720 && align < GET_MODE_ALIGNMENT (mode))
9721 {
9722 if ((icode = optab_handler (movmisalign_optab, mode))
9723 != CODE_FOR_nothing)
9724 {
9725 struct expand_operand ops[2];
9726
9727 /* We've already validated the memory, and we're creating a
9728 new pseudo destination. The predicates really can't fail,
9729 nor can the generator. */
9730 create_output_operand (&ops[0], NULL_RTX, mode);
9731 create_fixed_operand (&ops[1], temp);
9732 expand_insn (icode, 2, ops);
9733 temp = ops[0].value;
9734 }
9735 else if (SLOW_UNALIGNED_ACCESS (mode, align))
9736 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
9737 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
9738 (modifier == EXPAND_STACK_PARM
9739 ? NULL_RTX : target),
9740 mode, mode);
9741 }
9742 return temp;
9743 }
9744
9745 case ARRAY_REF:
9746
9747 {
9748 tree array = treeop0;
9749 tree index = treeop1;
9750 tree init;
9751
9752 /* Fold an expression like: "foo"[2].
9753 This is not done in fold so it won't happen inside &.
9754 Don't fold if this is for wide characters since it's too
9755 difficult to do correctly and this is a very rare case. */
9756
9757 if (modifier != EXPAND_CONST_ADDRESS
9758 && modifier != EXPAND_INITIALIZER
9759 && modifier != EXPAND_MEMORY)
9760 {
9761 tree t = fold_read_from_constant_string (exp);
9762
9763 if (t)
9764 return expand_expr (t, target, tmode, modifier);
9765 }
9766
9767 /* If this is a constant index into a constant array,
9768 just get the value from the array. Handle both the cases when
9769 we have an explicit constructor and when our operand is a variable
9770 that was declared const. */
9771
9772 if (modifier != EXPAND_CONST_ADDRESS
9773 && modifier != EXPAND_INITIALIZER
9774 && modifier != EXPAND_MEMORY
9775 && TREE_CODE (array) == CONSTRUCTOR
9776 && ! TREE_SIDE_EFFECTS (array)
9777 && TREE_CODE (index) == INTEGER_CST)
9778 {
9779 unsigned HOST_WIDE_INT ix;
9780 tree field, value;
9781
9782 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9783 field, value)
9784 if (tree_int_cst_equal (field, index))
9785 {
9786 if (!TREE_SIDE_EFFECTS (value))
9787 return expand_expr (fold (value), target, tmode, modifier);
9788 break;
9789 }
9790 }
9791
9792 else if (optimize >= 1
9793 && modifier != EXPAND_CONST_ADDRESS
9794 && modifier != EXPAND_INITIALIZER
9795 && modifier != EXPAND_MEMORY
9796 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9797 && TREE_CODE (index) == INTEGER_CST
9798 && (TREE_CODE (array) == VAR_DECL
9799 || TREE_CODE (array) == CONST_DECL)
9800 && (init = ctor_for_folding (array)) != error_mark_node)
9801 {
9802 if (TREE_CODE (init) == CONSTRUCTOR)
9803 {
9804 unsigned HOST_WIDE_INT ix;
9805 tree field, value;
9806
9807 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9808 field, value)
9809 if (tree_int_cst_equal (field, index))
9810 {
9811 if (TREE_SIDE_EFFECTS (value))
9812 break;
9813
9814 if (TREE_CODE (value) == CONSTRUCTOR)
9815 {
9816 /* If VALUE is a CONSTRUCTOR, this
9817 optimization is only useful if
9818 this doesn't store the CONSTRUCTOR
9819 into memory. If it does, it is more
9820 efficient to just load the data from
9821 the array directly. */
9822 rtx ret = expand_constructor (value, target,
9823 modifier, true);
9824 if (ret == NULL_RTX)
9825 break;
9826 }
9827
9828 return
9829 expand_expr (fold (value), target, tmode, modifier);
9830 }
9831 }
9832 else if (TREE_CODE (init) == STRING_CST)
9833 {
9834 tree low_bound = array_ref_low_bound (exp);
9835 tree index1 = fold_convert_loc (loc, sizetype, treeop1);
9836
9837 /* Optimize the special case of a zero lower bound.
9838
9839 We convert the lower bound to sizetype to avoid problems
9840 with constant folding. E.g. suppose the lower bound is
9841 1 and its mode is QI. Without the conversion
9842 (ARRAY + (INDEX - (unsigned char)1))
9843 becomes
9844 (ARRAY + (-(unsigned char)1) + INDEX)
9845 which becomes
9846 (ARRAY + 255 + INDEX). Oops! */
9847 if (!integer_zerop (low_bound))
9848 index1 = size_diffop_loc (loc, index1,
9849 fold_convert_loc (loc, sizetype,
9850 low_bound));
9851
9852 if (compare_tree_int (index1, TREE_STRING_LENGTH (init)) < 0)
9853 {
9854 tree type = TREE_TYPE (TREE_TYPE (init));
9855 enum machine_mode mode = TYPE_MODE (type);
9856
9857 if (GET_MODE_CLASS (mode) == MODE_INT
9858 && GET_MODE_SIZE (mode) == 1)
9859 return gen_int_mode (TREE_STRING_POINTER (init)
9860 [TREE_INT_CST_LOW (index1)],
9861 mode);
9862 }
9863 }
9864 }
9865 }
9866 goto normal_inner_ref;
9867
9868 case COMPONENT_REF:
9869 /* If the operand is a CONSTRUCTOR, we can just extract the
9870 appropriate field if it is present. */
9871 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9872 {
9873 unsigned HOST_WIDE_INT idx;
9874 tree field, value;
9875
9876 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9877 idx, field, value)
9878 if (field == treeop1
9879 /* We can normally use the value of the field in the
9880 CONSTRUCTOR. However, if this is a bitfield in
9881 an integral mode that we can fit in a HOST_WIDE_INT,
9882 we must mask only the number of bits in the bitfield,
9883 since this is done implicitly by the constructor. If
9884 the bitfield does not meet either of those conditions,
9885 we can't do this optimization. */
9886 && (! DECL_BIT_FIELD (field)
9887 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9888 && (GET_MODE_PRECISION (DECL_MODE (field))
9889 <= HOST_BITS_PER_WIDE_INT))))
9890 {
9891 if (DECL_BIT_FIELD (field)
9892 && modifier == EXPAND_STACK_PARM)
9893 target = 0;
9894 op0 = expand_expr (value, target, tmode, modifier);
9895 if (DECL_BIT_FIELD (field))
9896 {
9897 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9898 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9899
9900 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9901 {
9902 op1 = gen_int_mode (((HOST_WIDE_INT) 1 << bitsize) - 1,
9903 imode);
9904 op0 = expand_and (imode, op0, op1, target);
9905 }
9906 else
9907 {
9908 int count = GET_MODE_PRECISION (imode) - bitsize;
9909
9910 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9911 target, 0);
9912 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9913 target, 0);
9914 }
9915 }
9916
9917 return op0;
9918 }
9919 }
9920 goto normal_inner_ref;
9921
9922 case BIT_FIELD_REF:
9923 case ARRAY_RANGE_REF:
9924 normal_inner_ref:
9925 {
9926 enum machine_mode mode1, mode2;
9927 HOST_WIDE_INT bitsize, bitpos;
9928 tree offset;
9929 int volatilep = 0, must_force_mem;
9930 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9931 &mode1, &unsignedp, &volatilep, true);
9932 rtx orig_op0, memloc;
9933 bool mem_attrs_from_type = false;
9934
9935 /* If we got back the original object, something is wrong. Perhaps
9936 we are evaluating an expression too early. In any event, don't
9937 infinitely recurse. */
9938 gcc_assert (tem != exp);
9939
9940 /* If TEM's type is a union of variable size, pass TARGET to the inner
9941 computation, since it will need a temporary and TARGET is known
9942 to have to do. This occurs in unchecked conversion in Ada. */
9943 orig_op0 = op0
9944 = expand_expr (tem,
9945 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9946 && COMPLETE_TYPE_P (TREE_TYPE (tem))
9947 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9948 != INTEGER_CST)
9949 && modifier != EXPAND_STACK_PARM
9950 ? target : NULL_RTX),
9951 VOIDmode,
9952 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
9953
9954 /* If the bitfield is volatile, we want to access it in the
9955 field's mode, not the computed mode.
9956 If a MEM has VOIDmode (external with incomplete type),
9957 use BLKmode for it instead. */
9958 if (MEM_P (op0))
9959 {
9960 if (volatilep && flag_strict_volatile_bitfields > 0)
9961 op0 = adjust_address (op0, mode1, 0);
9962 else if (GET_MODE (op0) == VOIDmode)
9963 op0 = adjust_address (op0, BLKmode, 0);
9964 }
9965
9966 mode2
9967 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9968
9969 /* If we have either an offset, a BLKmode result, or a reference
9970 outside the underlying object, we must force it to memory.
9971 Such a case can occur in Ada if we have unchecked conversion
9972 of an expression from a scalar type to an aggregate type or
9973 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9974 passed a partially uninitialized object or a view-conversion
9975 to a larger size. */
9976 must_force_mem = (offset
9977 || mode1 == BLKmode
9978 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9979
9980 /* Handle CONCAT first. */
9981 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9982 {
9983 if (bitpos == 0
9984 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9985 return op0;
9986 if (bitpos == 0
9987 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9988 && bitsize)
9989 {
9990 op0 = XEXP (op0, 0);
9991 mode2 = GET_MODE (op0);
9992 }
9993 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9994 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9995 && bitpos
9996 && bitsize)
9997 {
9998 op0 = XEXP (op0, 1);
9999 bitpos = 0;
10000 mode2 = GET_MODE (op0);
10001 }
10002 else
10003 /* Otherwise force into memory. */
10004 must_force_mem = 1;
10005 }
10006
10007 /* If this is a constant, put it in a register if it is a legitimate
10008 constant and we don't need a memory reference. */
10009 if (CONSTANT_P (op0)
10010 && mode2 != BLKmode
10011 && targetm.legitimate_constant_p (mode2, op0)
10012 && !must_force_mem)
10013 op0 = force_reg (mode2, op0);
10014
10015 /* Otherwise, if this is a constant, try to force it to the constant
10016 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10017 is a legitimate constant. */
10018 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
10019 op0 = validize_mem (memloc);
10020
10021 /* Otherwise, if this is a constant or the object is not in memory
10022 and need be, put it there. */
10023 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
10024 {
10025 tree nt = build_qualified_type (TREE_TYPE (tem),
10026 (TYPE_QUALS (TREE_TYPE (tem))
10027 | TYPE_QUAL_CONST));
10028 memloc = assign_temp (nt, 1, 1);
10029 emit_move_insn (memloc, op0);
10030 op0 = memloc;
10031 mem_attrs_from_type = true;
10032 }
10033
10034 if (offset)
10035 {
10036 enum machine_mode address_mode;
10037 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
10038 EXPAND_SUM);
10039
10040 gcc_assert (MEM_P (op0));
10041
10042 address_mode = get_address_mode (op0);
10043 if (GET_MODE (offset_rtx) != address_mode)
10044 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
10045
10046 if (GET_MODE (op0) == BLKmode
10047 /* A constant address in OP0 can have VOIDmode, we must
10048 not try to call force_reg in that case. */
10049 && GET_MODE (XEXP (op0, 0)) != VOIDmode
10050 && bitsize != 0
10051 && (bitpos % bitsize) == 0
10052 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
10053 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
10054 {
10055 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10056 bitpos = 0;
10057 }
10058
10059 op0 = offset_address (op0, offset_rtx,
10060 highest_pow2_factor (offset));
10061 }
10062
10063 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10064 record its alignment as BIGGEST_ALIGNMENT. */
10065 if (MEM_P (op0) && bitpos == 0 && offset != 0
10066 && is_aligning_offset (offset, tem))
10067 set_mem_align (op0, BIGGEST_ALIGNMENT);
10068
10069 /* Don't forget about volatility even if this is a bitfield. */
10070 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
10071 {
10072 if (op0 == orig_op0)
10073 op0 = copy_rtx (op0);
10074
10075 MEM_VOLATILE_P (op0) = 1;
10076 }
10077
10078 /* In cases where an aligned union has an unaligned object
10079 as a field, we might be extracting a BLKmode value from
10080 an integer-mode (e.g., SImode) object. Handle this case
10081 by doing the extract into an object as wide as the field
10082 (which we know to be the width of a basic mode), then
10083 storing into memory, and changing the mode to BLKmode. */
10084 if (mode1 == VOIDmode
10085 || REG_P (op0) || GET_CODE (op0) == SUBREG
10086 || (mode1 != BLKmode && ! direct_load[(int) mode1]
10087 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
10088 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
10089 && modifier != EXPAND_CONST_ADDRESS
10090 && modifier != EXPAND_INITIALIZER
10091 && modifier != EXPAND_MEMORY)
10092 /* If the field is volatile, we always want an aligned
10093 access. Do this in following two situations:
10094 1. the access is not already naturally
10095 aligned, otherwise "normal" (non-bitfield) volatile fields
10096 become non-addressable.
10097 2. the bitsize is narrower than the access size. Need
10098 to extract bitfields from the access. */
10099 || (volatilep && flag_strict_volatile_bitfields > 0
10100 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0
10101 || (mode1 != BLKmode
10102 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)))
10103 /* If the field isn't aligned enough to fetch as a memref,
10104 fetch it as a bit field. */
10105 || (mode1 != BLKmode
10106 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
10107 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
10108 || (MEM_P (op0)
10109 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
10110 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
10111 && modifier != EXPAND_MEMORY
10112 && ((modifier == EXPAND_CONST_ADDRESS
10113 || modifier == EXPAND_INITIALIZER)
10114 ? STRICT_ALIGNMENT
10115 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
10116 || (bitpos % BITS_PER_UNIT != 0)))
10117 /* If the type and the field are a constant size and the
10118 size of the type isn't the same size as the bitfield,
10119 we must use bitfield operations. */
10120 || (bitsize >= 0
10121 && TYPE_SIZE (TREE_TYPE (exp))
10122 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10123 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
10124 bitsize)))
10125 {
10126 enum machine_mode ext_mode = mode;
10127
10128 if (ext_mode == BLKmode
10129 && ! (target != 0 && MEM_P (op0)
10130 && MEM_P (target)
10131 && bitpos % BITS_PER_UNIT == 0))
10132 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
10133
10134 if (ext_mode == BLKmode)
10135 {
10136 if (target == 0)
10137 target = assign_temp (type, 1, 1);
10138
10139 if (bitsize == 0)
10140 return target;
10141
10142 /* In this case, BITPOS must start at a byte boundary and
10143 TARGET, if specified, must be a MEM. */
10144 gcc_assert (MEM_P (op0)
10145 && (!target || MEM_P (target))
10146 && !(bitpos % BITS_PER_UNIT));
10147
10148 emit_block_move (target,
10149 adjust_address (op0, VOIDmode,
10150 bitpos / BITS_PER_UNIT),
10151 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
10152 / BITS_PER_UNIT),
10153 (modifier == EXPAND_STACK_PARM
10154 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10155
10156 return target;
10157 }
10158
10159 op0 = validize_mem (op0);
10160
10161 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10162 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10163
10164 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
10165 (modifier == EXPAND_STACK_PARM
10166 ? NULL_RTX : target),
10167 ext_mode, ext_mode);
10168
10169 /* If the result is a record type and BITSIZE is narrower than
10170 the mode of OP0, an integral mode, and this is a big endian
10171 machine, we must put the field into the high-order bits. */
10172 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
10173 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
10174 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
10175 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
10176 GET_MODE_BITSIZE (GET_MODE (op0))
10177 - bitsize, op0, 1);
10178
10179 /* If the result type is BLKmode, store the data into a temporary
10180 of the appropriate type, but with the mode corresponding to the
10181 mode for the data we have (op0's mode). It's tempting to make
10182 this a constant type, since we know it's only being stored once,
10183 but that can cause problems if we are taking the address of this
10184 COMPONENT_REF because the MEM of any reference via that address
10185 will have flags corresponding to the type, which will not
10186 necessarily be constant. */
10187 if (mode == BLKmode)
10188 {
10189 rtx new_rtx;
10190
10191 new_rtx = assign_stack_temp_for_type (ext_mode,
10192 GET_MODE_BITSIZE (ext_mode),
10193 type);
10194 emit_move_insn (new_rtx, op0);
10195 op0 = copy_rtx (new_rtx);
10196 PUT_MODE (op0, BLKmode);
10197 }
10198
10199 return op0;
10200 }
10201
10202 /* If the result is BLKmode, use that to access the object
10203 now as well. */
10204 if (mode == BLKmode)
10205 mode1 = BLKmode;
10206
10207 /* Get a reference to just this component. */
10208 if (modifier == EXPAND_CONST_ADDRESS
10209 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10210 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
10211 else
10212 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10213
10214 if (op0 == orig_op0)
10215 op0 = copy_rtx (op0);
10216
10217 /* If op0 is a temporary because of forcing to memory, pass only the
10218 type to set_mem_attributes so that the original expression is never
10219 marked as ADDRESSABLE through MEM_EXPR of the temporary. */
10220 if (mem_attrs_from_type)
10221 set_mem_attributes (op0, type, 0);
10222 else
10223 set_mem_attributes (op0, exp, 0);
10224
10225 if (REG_P (XEXP (op0, 0)))
10226 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10227
10228 MEM_VOLATILE_P (op0) |= volatilep;
10229 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
10230 || modifier == EXPAND_CONST_ADDRESS
10231 || modifier == EXPAND_INITIALIZER)
10232 return op0;
10233
10234 if (target == 0)
10235 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
10236
10237 convert_move (target, op0, unsignedp);
10238 return target;
10239 }
10240
10241 case OBJ_TYPE_REF:
10242 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
10243
10244 case CALL_EXPR:
10245 /* All valid uses of __builtin_va_arg_pack () are removed during
10246 inlining. */
10247 if (CALL_EXPR_VA_ARG_PACK (exp))
10248 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
10249 {
10250 tree fndecl = get_callee_fndecl (exp), attr;
10251
10252 if (fndecl
10253 && (attr = lookup_attribute ("error",
10254 DECL_ATTRIBUTES (fndecl))) != NULL)
10255 error ("%Kcall to %qs declared with attribute error: %s",
10256 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10257 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10258 if (fndecl
10259 && (attr = lookup_attribute ("warning",
10260 DECL_ATTRIBUTES (fndecl))) != NULL)
10261 warning_at (tree_nonartificial_location (exp),
10262 0, "%Kcall to %qs declared with attribute warning: %s",
10263 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10264 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10265
10266 /* Check for a built-in function. */
10267 if (fndecl && DECL_BUILT_IN (fndecl))
10268 {
10269 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
10270 return expand_builtin (exp, target, subtarget, tmode, ignore);
10271 }
10272 }
10273 return expand_call (exp, target, ignore);
10274
10275 case VIEW_CONVERT_EXPR:
10276 op0 = NULL_RTX;
10277
10278 /* If we are converting to BLKmode, try to avoid an intermediate
10279 temporary by fetching an inner memory reference. */
10280 if (mode == BLKmode
10281 && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
10282 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10283 && handled_component_p (treeop0))
10284 {
10285 enum machine_mode mode1;
10286 HOST_WIDE_INT bitsize, bitpos;
10287 tree offset;
10288 int unsignedp;
10289 int volatilep = 0;
10290 tree tem
10291 = get_inner_reference (treeop0, &bitsize, &bitpos,
10292 &offset, &mode1, &unsignedp, &volatilep,
10293 true);
10294 rtx orig_op0;
10295
10296 /* ??? We should work harder and deal with non-zero offsets. */
10297 if (!offset
10298 && (bitpos % BITS_PER_UNIT) == 0
10299 && bitsize >= 0
10300 && compare_tree_int (TYPE_SIZE (type), bitsize) == 0)
10301 {
10302 /* See the normal_inner_ref case for the rationale. */
10303 orig_op0
10304 = expand_expr (tem,
10305 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10306 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10307 != INTEGER_CST)
10308 && modifier != EXPAND_STACK_PARM
10309 ? target : NULL_RTX),
10310 VOIDmode,
10311 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
10312
10313 if (MEM_P (orig_op0))
10314 {
10315 op0 = orig_op0;
10316
10317 /* Get a reference to just this component. */
10318 if (modifier == EXPAND_CONST_ADDRESS
10319 || modifier == EXPAND_SUM
10320 || modifier == EXPAND_INITIALIZER)
10321 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
10322 else
10323 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10324
10325 if (op0 == orig_op0)
10326 op0 = copy_rtx (op0);
10327
10328 set_mem_attributes (op0, treeop0, 0);
10329 if (REG_P (XEXP (op0, 0)))
10330 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10331
10332 MEM_VOLATILE_P (op0) |= volatilep;
10333 }
10334 }
10335 }
10336
10337 if (!op0)
10338 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
10339
10340 /* If the input and output modes are both the same, we are done. */
10341 if (mode == GET_MODE (op0))
10342 ;
10343 /* If neither mode is BLKmode, and both modes are the same size
10344 then we can use gen_lowpart. */
10345 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10346 && (GET_MODE_PRECISION (mode)
10347 == GET_MODE_PRECISION (GET_MODE (op0)))
10348 && !COMPLEX_MODE_P (GET_MODE (op0)))
10349 {
10350 if (GET_CODE (op0) == SUBREG)
10351 op0 = force_reg (GET_MODE (op0), op0);
10352 temp = gen_lowpart_common (mode, op0);
10353 if (temp)
10354 op0 = temp;
10355 else
10356 {
10357 if (!REG_P (op0) && !MEM_P (op0))
10358 op0 = force_reg (GET_MODE (op0), op0);
10359 op0 = gen_lowpart (mode, op0);
10360 }
10361 }
10362 /* If both types are integral, convert from one mode to the other. */
10363 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10364 op0 = convert_modes (mode, GET_MODE (op0), op0,
10365 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10366 /* As a last resort, spill op0 to memory, and reload it in a
10367 different mode. */
10368 else if (!MEM_P (op0))
10369 {
10370 /* If the operand is not a MEM, force it into memory. Since we
10371 are going to be changing the mode of the MEM, don't call
10372 force_const_mem for constants because we don't allow pool
10373 constants to change mode. */
10374 tree inner_type = TREE_TYPE (treeop0);
10375
10376 gcc_assert (!TREE_ADDRESSABLE (exp));
10377
10378 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10379 target
10380 = assign_stack_temp_for_type
10381 (TYPE_MODE (inner_type),
10382 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
10383
10384 emit_move_insn (target, op0);
10385 op0 = target;
10386 }
10387
10388 /* At this point, OP0 is in the correct mode. If the output type is
10389 such that the operand is known to be aligned, indicate that it is.
10390 Otherwise, we need only be concerned about alignment for non-BLKmode
10391 results. */
10392 if (MEM_P (op0))
10393 {
10394 enum insn_code icode;
10395
10396 if (TYPE_ALIGN_OK (type))
10397 {
10398 /* ??? Copying the MEM without substantially changing it might
10399 run afoul of the code handling volatile memory references in
10400 store_expr, which assumes that TARGET is returned unmodified
10401 if it has been used. */
10402 op0 = copy_rtx (op0);
10403 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10404 }
10405 else if (mode != BLKmode
10406 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)
10407 /* If the target does have special handling for unaligned
10408 loads of mode then use them. */
10409 && ((icode = optab_handler (movmisalign_optab, mode))
10410 != CODE_FOR_nothing))
10411 {
10412 rtx reg, insn;
10413
10414 op0 = adjust_address (op0, mode, 0);
10415 /* We've already validated the memory, and we're creating a
10416 new pseudo destination. The predicates really can't
10417 fail. */
10418 reg = gen_reg_rtx (mode);
10419
10420 /* Nor can the insn generator. */
10421 insn = GEN_FCN (icode) (reg, op0);
10422 emit_insn (insn);
10423 return reg;
10424 }
10425 else if (STRICT_ALIGNMENT
10426 && mode != BLKmode
10427 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10428 {
10429 tree inner_type = TREE_TYPE (treeop0);
10430 HOST_WIDE_INT temp_size
10431 = MAX (int_size_in_bytes (inner_type),
10432 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10433 rtx new_rtx
10434 = assign_stack_temp_for_type (mode, temp_size, type);
10435 rtx new_with_op0_mode
10436 = adjust_address (new_rtx, GET_MODE (op0), 0);
10437
10438 gcc_assert (!TREE_ADDRESSABLE (exp));
10439
10440 if (GET_MODE (op0) == BLKmode)
10441 emit_block_move (new_with_op0_mode, op0,
10442 GEN_INT (GET_MODE_SIZE (mode)),
10443 (modifier == EXPAND_STACK_PARM
10444 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10445 else
10446 emit_move_insn (new_with_op0_mode, op0);
10447
10448 op0 = new_rtx;
10449 }
10450
10451 op0 = adjust_address (op0, mode, 0);
10452 }
10453
10454 return op0;
10455
10456 case MODIFY_EXPR:
10457 {
10458 tree lhs = treeop0;
10459 tree rhs = treeop1;
10460 gcc_assert (ignore);
10461
10462 /* Check for |= or &= of a bitfield of size one into another bitfield
10463 of size 1. In this case, (unless we need the result of the
10464 assignment) we can do this more efficiently with a
10465 test followed by an assignment, if necessary.
10466
10467 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10468 things change so we do, this code should be enhanced to
10469 support it. */
10470 if (TREE_CODE (lhs) == COMPONENT_REF
10471 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10472 || TREE_CODE (rhs) == BIT_AND_EXPR)
10473 && TREE_OPERAND (rhs, 0) == lhs
10474 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10475 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10476 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10477 {
10478 rtx label = gen_label_rtx ();
10479 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10480 do_jump (TREE_OPERAND (rhs, 1),
10481 value ? label : 0,
10482 value ? 0 : label, -1);
10483 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10484 false);
10485 do_pending_stack_adjust ();
10486 emit_label (label);
10487 return const0_rtx;
10488 }
10489
10490 expand_assignment (lhs, rhs, false);
10491 return const0_rtx;
10492 }
10493
10494 case ADDR_EXPR:
10495 return expand_expr_addr_expr (exp, target, tmode, modifier);
10496
10497 case REALPART_EXPR:
10498 op0 = expand_normal (treeop0);
10499 return read_complex_part (op0, false);
10500
10501 case IMAGPART_EXPR:
10502 op0 = expand_normal (treeop0);
10503 return read_complex_part (op0, true);
10504
10505 case RETURN_EXPR:
10506 case LABEL_EXPR:
10507 case GOTO_EXPR:
10508 case SWITCH_EXPR:
10509 case ASM_EXPR:
10510 /* Expanded in cfgexpand.c. */
10511 gcc_unreachable ();
10512
10513 case TRY_CATCH_EXPR:
10514 case CATCH_EXPR:
10515 case EH_FILTER_EXPR:
10516 case TRY_FINALLY_EXPR:
10517 /* Lowered by tree-eh.c. */
10518 gcc_unreachable ();
10519
10520 case WITH_CLEANUP_EXPR:
10521 case CLEANUP_POINT_EXPR:
10522 case TARGET_EXPR:
10523 case CASE_LABEL_EXPR:
10524 case VA_ARG_EXPR:
10525 case BIND_EXPR:
10526 case INIT_EXPR:
10527 case CONJ_EXPR:
10528 case COMPOUND_EXPR:
10529 case PREINCREMENT_EXPR:
10530 case PREDECREMENT_EXPR:
10531 case POSTINCREMENT_EXPR:
10532 case POSTDECREMENT_EXPR:
10533 case LOOP_EXPR:
10534 case EXIT_EXPR:
10535 case COMPOUND_LITERAL_EXPR:
10536 /* Lowered by gimplify.c. */
10537 gcc_unreachable ();
10538
10539 case FDESC_EXPR:
10540 /* Function descriptors are not valid except for as
10541 initialization constants, and should not be expanded. */
10542 gcc_unreachable ();
10543
10544 case WITH_SIZE_EXPR:
10545 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10546 have pulled out the size to use in whatever context it needed. */
10547 return expand_expr_real (treeop0, original_target, tmode,
10548 modifier, alt_rtl);
10549
10550 default:
10551 return expand_expr_real_2 (&ops, target, tmode, modifier);
10552 }
10553 }
10554 \f
10555 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10556 signedness of TYPE), possibly returning the result in TARGET. */
10557 static rtx
10558 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10559 {
10560 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10561 if (target && GET_MODE (target) != GET_MODE (exp))
10562 target = 0;
10563 /* For constant values, reduce using build_int_cst_type. */
10564 if (CONST_INT_P (exp))
10565 {
10566 HOST_WIDE_INT value = INTVAL (exp);
10567 tree t = build_int_cst_type (type, value);
10568 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10569 }
10570 else if (TYPE_UNSIGNED (type))
10571 {
10572 rtx mask = immed_double_int_const (double_int::mask (prec),
10573 GET_MODE (exp));
10574 return expand_and (GET_MODE (exp), exp, mask, target);
10575 }
10576 else
10577 {
10578 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10579 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10580 exp, count, target, 0);
10581 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10582 exp, count, target, 0);
10583 }
10584 }
10585 \f
10586 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10587 when applied to the address of EXP produces an address known to be
10588 aligned more than BIGGEST_ALIGNMENT. */
10589
10590 static int
10591 is_aligning_offset (const_tree offset, const_tree exp)
10592 {
10593 /* Strip off any conversions. */
10594 while (CONVERT_EXPR_P (offset))
10595 offset = TREE_OPERAND (offset, 0);
10596
10597 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10598 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10599 if (TREE_CODE (offset) != BIT_AND_EXPR
10600 || !tree_fits_uhwi_p (TREE_OPERAND (offset, 1))
10601 || compare_tree_int (TREE_OPERAND (offset, 1),
10602 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10603 || !exact_log2 (tree_to_uhwi (TREE_OPERAND (offset, 1)) + 1) < 0)
10604 return 0;
10605
10606 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10607 It must be NEGATE_EXPR. Then strip any more conversions. */
10608 offset = TREE_OPERAND (offset, 0);
10609 while (CONVERT_EXPR_P (offset))
10610 offset = TREE_OPERAND (offset, 0);
10611
10612 if (TREE_CODE (offset) != NEGATE_EXPR)
10613 return 0;
10614
10615 offset = TREE_OPERAND (offset, 0);
10616 while (CONVERT_EXPR_P (offset))
10617 offset = TREE_OPERAND (offset, 0);
10618
10619 /* This must now be the address of EXP. */
10620 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10621 }
10622 \f
10623 /* Return the tree node if an ARG corresponds to a string constant or zero
10624 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10625 in bytes within the string that ARG is accessing. The type of the
10626 offset will be `sizetype'. */
10627
10628 tree
10629 string_constant (tree arg, tree *ptr_offset)
10630 {
10631 tree array, offset, lower_bound;
10632 STRIP_NOPS (arg);
10633
10634 if (TREE_CODE (arg) == ADDR_EXPR)
10635 {
10636 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10637 {
10638 *ptr_offset = size_zero_node;
10639 return TREE_OPERAND (arg, 0);
10640 }
10641 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10642 {
10643 array = TREE_OPERAND (arg, 0);
10644 offset = size_zero_node;
10645 }
10646 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10647 {
10648 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10649 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10650 if (TREE_CODE (array) != STRING_CST
10651 && TREE_CODE (array) != VAR_DECL)
10652 return 0;
10653
10654 /* Check if the array has a nonzero lower bound. */
10655 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10656 if (!integer_zerop (lower_bound))
10657 {
10658 /* If the offset and base aren't both constants, return 0. */
10659 if (TREE_CODE (lower_bound) != INTEGER_CST)
10660 return 0;
10661 if (TREE_CODE (offset) != INTEGER_CST)
10662 return 0;
10663 /* Adjust offset by the lower bound. */
10664 offset = size_diffop (fold_convert (sizetype, offset),
10665 fold_convert (sizetype, lower_bound));
10666 }
10667 }
10668 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10669 {
10670 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10671 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10672 if (TREE_CODE (array) != ADDR_EXPR)
10673 return 0;
10674 array = TREE_OPERAND (array, 0);
10675 if (TREE_CODE (array) != STRING_CST
10676 && TREE_CODE (array) != VAR_DECL)
10677 return 0;
10678 }
10679 else
10680 return 0;
10681 }
10682 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10683 {
10684 tree arg0 = TREE_OPERAND (arg, 0);
10685 tree arg1 = TREE_OPERAND (arg, 1);
10686
10687 STRIP_NOPS (arg0);
10688 STRIP_NOPS (arg1);
10689
10690 if (TREE_CODE (arg0) == ADDR_EXPR
10691 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10692 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10693 {
10694 array = TREE_OPERAND (arg0, 0);
10695 offset = arg1;
10696 }
10697 else if (TREE_CODE (arg1) == ADDR_EXPR
10698 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10699 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10700 {
10701 array = TREE_OPERAND (arg1, 0);
10702 offset = arg0;
10703 }
10704 else
10705 return 0;
10706 }
10707 else
10708 return 0;
10709
10710 if (TREE_CODE (array) == STRING_CST)
10711 {
10712 *ptr_offset = fold_convert (sizetype, offset);
10713 return array;
10714 }
10715 else if (TREE_CODE (array) == VAR_DECL
10716 || TREE_CODE (array) == CONST_DECL)
10717 {
10718 int length;
10719 tree init = ctor_for_folding (array);
10720
10721 /* Variables initialized to string literals can be handled too. */
10722 if (init == error_mark_node
10723 || !init
10724 || TREE_CODE (init) != STRING_CST)
10725 return 0;
10726
10727 /* Avoid const char foo[4] = "abcde"; */
10728 if (DECL_SIZE_UNIT (array) == NULL_TREE
10729 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10730 || (length = TREE_STRING_LENGTH (init)) <= 0
10731 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10732 return 0;
10733
10734 /* If variable is bigger than the string literal, OFFSET must be constant
10735 and inside of the bounds of the string literal. */
10736 offset = fold_convert (sizetype, offset);
10737 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10738 && (! tree_fits_uhwi_p (offset)
10739 || compare_tree_int (offset, length) >= 0))
10740 return 0;
10741
10742 *ptr_offset = offset;
10743 return init;
10744 }
10745
10746 return 0;
10747 }
10748 \f
10749 /* Generate code to calculate OPS, and exploded expression
10750 using a store-flag instruction and return an rtx for the result.
10751 OPS reflects a comparison.
10752
10753 If TARGET is nonzero, store the result there if convenient.
10754
10755 Return zero if there is no suitable set-flag instruction
10756 available on this machine.
10757
10758 Once expand_expr has been called on the arguments of the comparison,
10759 we are committed to doing the store flag, since it is not safe to
10760 re-evaluate the expression. We emit the store-flag insn by calling
10761 emit_store_flag, but only expand the arguments if we have a reason
10762 to believe that emit_store_flag will be successful. If we think that
10763 it will, but it isn't, we have to simulate the store-flag with a
10764 set/jump/set sequence. */
10765
10766 static rtx
10767 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10768 {
10769 enum rtx_code code;
10770 tree arg0, arg1, type;
10771 tree tem;
10772 enum machine_mode operand_mode;
10773 int unsignedp;
10774 rtx op0, op1;
10775 rtx subtarget = target;
10776 location_t loc = ops->location;
10777
10778 arg0 = ops->op0;
10779 arg1 = ops->op1;
10780
10781 /* Don't crash if the comparison was erroneous. */
10782 if (arg0 == error_mark_node || arg1 == error_mark_node)
10783 return const0_rtx;
10784
10785 type = TREE_TYPE (arg0);
10786 operand_mode = TYPE_MODE (type);
10787 unsignedp = TYPE_UNSIGNED (type);
10788
10789 /* We won't bother with BLKmode store-flag operations because it would mean
10790 passing a lot of information to emit_store_flag. */
10791 if (operand_mode == BLKmode)
10792 return 0;
10793
10794 /* We won't bother with store-flag operations involving function pointers
10795 when function pointers must be canonicalized before comparisons. */
10796 #ifdef HAVE_canonicalize_funcptr_for_compare
10797 if (HAVE_canonicalize_funcptr_for_compare
10798 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10799 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10800 == FUNCTION_TYPE))
10801 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10802 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10803 == FUNCTION_TYPE))))
10804 return 0;
10805 #endif
10806
10807 STRIP_NOPS (arg0);
10808 STRIP_NOPS (arg1);
10809
10810 /* For vector typed comparisons emit code to generate the desired
10811 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10812 expander for this. */
10813 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10814 {
10815 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10816 tree if_true = constant_boolean_node (true, ops->type);
10817 tree if_false = constant_boolean_node (false, ops->type);
10818 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10819 }
10820
10821 /* Get the rtx comparison code to use. We know that EXP is a comparison
10822 operation of some type. Some comparisons against 1 and -1 can be
10823 converted to comparisons with zero. Do so here so that the tests
10824 below will be aware that we have a comparison with zero. These
10825 tests will not catch constants in the first operand, but constants
10826 are rarely passed as the first operand. */
10827
10828 switch (ops->code)
10829 {
10830 case EQ_EXPR:
10831 code = EQ;
10832 break;
10833 case NE_EXPR:
10834 code = NE;
10835 break;
10836 case LT_EXPR:
10837 if (integer_onep (arg1))
10838 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10839 else
10840 code = unsignedp ? LTU : LT;
10841 break;
10842 case LE_EXPR:
10843 if (! unsignedp && integer_all_onesp (arg1))
10844 arg1 = integer_zero_node, code = LT;
10845 else
10846 code = unsignedp ? LEU : LE;
10847 break;
10848 case GT_EXPR:
10849 if (! unsignedp && integer_all_onesp (arg1))
10850 arg1 = integer_zero_node, code = GE;
10851 else
10852 code = unsignedp ? GTU : GT;
10853 break;
10854 case GE_EXPR:
10855 if (integer_onep (arg1))
10856 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10857 else
10858 code = unsignedp ? GEU : GE;
10859 break;
10860
10861 case UNORDERED_EXPR:
10862 code = UNORDERED;
10863 break;
10864 case ORDERED_EXPR:
10865 code = ORDERED;
10866 break;
10867 case UNLT_EXPR:
10868 code = UNLT;
10869 break;
10870 case UNLE_EXPR:
10871 code = UNLE;
10872 break;
10873 case UNGT_EXPR:
10874 code = UNGT;
10875 break;
10876 case UNGE_EXPR:
10877 code = UNGE;
10878 break;
10879 case UNEQ_EXPR:
10880 code = UNEQ;
10881 break;
10882 case LTGT_EXPR:
10883 code = LTGT;
10884 break;
10885
10886 default:
10887 gcc_unreachable ();
10888 }
10889
10890 /* Put a constant second. */
10891 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10892 || TREE_CODE (arg0) == FIXED_CST)
10893 {
10894 tem = arg0; arg0 = arg1; arg1 = tem;
10895 code = swap_condition (code);
10896 }
10897
10898 /* If this is an equality or inequality test of a single bit, we can
10899 do this by shifting the bit being tested to the low-order bit and
10900 masking the result with the constant 1. If the condition was EQ,
10901 we xor it with 1. This does not require an scc insn and is faster
10902 than an scc insn even if we have it.
10903
10904 The code to make this transformation was moved into fold_single_bit_test,
10905 so we just call into the folder and expand its result. */
10906
10907 if ((code == NE || code == EQ)
10908 && integer_zerop (arg1)
10909 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10910 {
10911 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
10912 if (srcstmt
10913 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
10914 {
10915 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
10916 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10917 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
10918 gimple_assign_rhs1 (srcstmt),
10919 gimple_assign_rhs2 (srcstmt));
10920 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
10921 if (temp)
10922 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
10923 }
10924 }
10925
10926 if (! get_subtarget (target)
10927 || GET_MODE (subtarget) != operand_mode)
10928 subtarget = 0;
10929
10930 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10931
10932 if (target == 0)
10933 target = gen_reg_rtx (mode);
10934
10935 /* Try a cstore if possible. */
10936 return emit_store_flag_force (target, code, op0, op1,
10937 operand_mode, unsignedp,
10938 (TYPE_PRECISION (ops->type) == 1
10939 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10940 }
10941 \f
10942
10943 /* Stubs in case we haven't got a casesi insn. */
10944 #ifndef HAVE_casesi
10945 # define HAVE_casesi 0
10946 # define gen_casesi(a, b, c, d, e) (0)
10947 # define CODE_FOR_casesi CODE_FOR_nothing
10948 #endif
10949
10950 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10951 0 otherwise (i.e. if there is no casesi instruction).
10952
10953 DEFAULT_PROBABILITY is the probability of jumping to the default
10954 label. */
10955 int
10956 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10957 rtx table_label, rtx default_label, rtx fallback_label,
10958 int default_probability)
10959 {
10960 struct expand_operand ops[5];
10961 enum machine_mode index_mode = SImode;
10962 rtx op1, op2, index;
10963
10964 if (! HAVE_casesi)
10965 return 0;
10966
10967 /* Convert the index to SImode. */
10968 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10969 {
10970 enum machine_mode omode = TYPE_MODE (index_type);
10971 rtx rangertx = expand_normal (range);
10972
10973 /* We must handle the endpoints in the original mode. */
10974 index_expr = build2 (MINUS_EXPR, index_type,
10975 index_expr, minval);
10976 minval = integer_zero_node;
10977 index = expand_normal (index_expr);
10978 if (default_label)
10979 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10980 omode, 1, default_label,
10981 default_probability);
10982 /* Now we can safely truncate. */
10983 index = convert_to_mode (index_mode, index, 0);
10984 }
10985 else
10986 {
10987 if (TYPE_MODE (index_type) != index_mode)
10988 {
10989 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
10990 index_expr = fold_convert (index_type, index_expr);
10991 }
10992
10993 index = expand_normal (index_expr);
10994 }
10995
10996 do_pending_stack_adjust ();
10997
10998 op1 = expand_normal (minval);
10999 op2 = expand_normal (range);
11000
11001 create_input_operand (&ops[0], index, index_mode);
11002 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
11003 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
11004 create_fixed_operand (&ops[3], table_label);
11005 create_fixed_operand (&ops[4], (default_label
11006 ? default_label
11007 : fallback_label));
11008 expand_jump_insn (CODE_FOR_casesi, 5, ops);
11009 return 1;
11010 }
11011
11012 /* Attempt to generate a tablejump instruction; same concept. */
11013 #ifndef HAVE_tablejump
11014 #define HAVE_tablejump 0
11015 #define gen_tablejump(x, y) (0)
11016 #endif
11017
11018 /* Subroutine of the next function.
11019
11020 INDEX is the value being switched on, with the lowest value
11021 in the table already subtracted.
11022 MODE is its expected mode (needed if INDEX is constant).
11023 RANGE is the length of the jump table.
11024 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11025
11026 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11027 index value is out of range.
11028 DEFAULT_PROBABILITY is the probability of jumping to
11029 the default label. */
11030
11031 static void
11032 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
11033 rtx default_label, int default_probability)
11034 {
11035 rtx temp, vector;
11036
11037 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
11038 cfun->cfg->max_jumptable_ents = INTVAL (range);
11039
11040 /* Do an unsigned comparison (in the proper mode) between the index
11041 expression and the value which represents the length of the range.
11042 Since we just finished subtracting the lower bound of the range
11043 from the index expression, this comparison allows us to simultaneously
11044 check that the original index expression value is both greater than
11045 or equal to the minimum value of the range and less than or equal to
11046 the maximum value of the range. */
11047
11048 if (default_label)
11049 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
11050 default_label, default_probability);
11051
11052
11053 /* If index is in range, it must fit in Pmode.
11054 Convert to Pmode so we can index with it. */
11055 if (mode != Pmode)
11056 index = convert_to_mode (Pmode, index, 1);
11057
11058 /* Don't let a MEM slip through, because then INDEX that comes
11059 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11060 and break_out_memory_refs will go to work on it and mess it up. */
11061 #ifdef PIC_CASE_VECTOR_ADDRESS
11062 if (flag_pic && !REG_P (index))
11063 index = copy_to_mode_reg (Pmode, index);
11064 #endif
11065
11066 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11067 GET_MODE_SIZE, because this indicates how large insns are. The other
11068 uses should all be Pmode, because they are addresses. This code
11069 could fail if addresses and insns are not the same size. */
11070 index = gen_rtx_PLUS
11071 (Pmode,
11072 gen_rtx_MULT (Pmode, index,
11073 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE), Pmode)),
11074 gen_rtx_LABEL_REF (Pmode, table_label));
11075 #ifdef PIC_CASE_VECTOR_ADDRESS
11076 if (flag_pic)
11077 index = PIC_CASE_VECTOR_ADDRESS (index);
11078 else
11079 #endif
11080 index = memory_address (CASE_VECTOR_MODE, index);
11081 temp = gen_reg_rtx (CASE_VECTOR_MODE);
11082 vector = gen_const_mem (CASE_VECTOR_MODE, index);
11083 convert_move (temp, vector, 0);
11084
11085 emit_jump_insn (gen_tablejump (temp, table_label));
11086
11087 /* If we are generating PIC code or if the table is PC-relative, the
11088 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11089 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
11090 emit_barrier ();
11091 }
11092
11093 int
11094 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
11095 rtx table_label, rtx default_label, int default_probability)
11096 {
11097 rtx index;
11098
11099 if (! HAVE_tablejump)
11100 return 0;
11101
11102 index_expr = fold_build2 (MINUS_EXPR, index_type,
11103 fold_convert (index_type, index_expr),
11104 fold_convert (index_type, minval));
11105 index = expand_normal (index_expr);
11106 do_pending_stack_adjust ();
11107
11108 do_tablejump (index, TYPE_MODE (index_type),
11109 convert_modes (TYPE_MODE (index_type),
11110 TYPE_MODE (TREE_TYPE (range)),
11111 expand_normal (range),
11112 TYPE_UNSIGNED (TREE_TYPE (range))),
11113 table_label, default_label, default_probability);
11114 return 1;
11115 }
11116
11117 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11118 static rtx
11119 const_vector_from_tree (tree exp)
11120 {
11121 rtvec v;
11122 unsigned i;
11123 int units;
11124 tree elt;
11125 enum machine_mode inner, mode;
11126
11127 mode = TYPE_MODE (TREE_TYPE (exp));
11128
11129 if (initializer_zerop (exp))
11130 return CONST0_RTX (mode);
11131
11132 units = GET_MODE_NUNITS (mode);
11133 inner = GET_MODE_INNER (mode);
11134
11135 v = rtvec_alloc (units);
11136
11137 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
11138 {
11139 elt = VECTOR_CST_ELT (exp, i);
11140
11141 if (TREE_CODE (elt) == REAL_CST)
11142 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
11143 inner);
11144 else if (TREE_CODE (elt) == FIXED_CST)
11145 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
11146 inner);
11147 else
11148 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
11149 inner);
11150 }
11151
11152 return gen_rtx_CONST_VECTOR (mode, v);
11153 }
11154
11155 /* Build a decl for a personality function given a language prefix. */
11156
11157 tree
11158 build_personality_function (const char *lang)
11159 {
11160 const char *unwind_and_version;
11161 tree decl, type;
11162 char *name;
11163
11164 switch (targetm_common.except_unwind_info (&global_options))
11165 {
11166 case UI_NONE:
11167 return NULL;
11168 case UI_SJLJ:
11169 unwind_and_version = "_sj0";
11170 break;
11171 case UI_DWARF2:
11172 case UI_TARGET:
11173 unwind_and_version = "_v0";
11174 break;
11175 case UI_SEH:
11176 unwind_and_version = "_seh0";
11177 break;
11178 default:
11179 gcc_unreachable ();
11180 }
11181
11182 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
11183
11184 type = build_function_type_list (integer_type_node, integer_type_node,
11185 long_long_unsigned_type_node,
11186 ptr_type_node, ptr_type_node, NULL_TREE);
11187 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
11188 get_identifier (name), type);
11189 DECL_ARTIFICIAL (decl) = 1;
11190 DECL_EXTERNAL (decl) = 1;
11191 TREE_PUBLIC (decl) = 1;
11192
11193 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11194 are the flags assigned by targetm.encode_section_info. */
11195 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
11196
11197 return decl;
11198 }
11199
11200 /* Extracts the personality function of DECL and returns the corresponding
11201 libfunc. */
11202
11203 rtx
11204 get_personality_function (tree decl)
11205 {
11206 tree personality = DECL_FUNCTION_PERSONALITY (decl);
11207 enum eh_personality_kind pk;
11208
11209 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
11210 if (pk == eh_personality_none)
11211 return NULL;
11212
11213 if (!personality
11214 && pk == eh_personality_any)
11215 personality = lang_hooks.eh_personality ();
11216
11217 if (pk == eh_personality_lang)
11218 gcc_assert (personality != NULL_TREE);
11219
11220 return XEXP (DECL_RTL (personality), 0);
11221 }
11222
11223 #include "gt-expr.h"