re PR bootstrap/51796 (internal compiler error: in distribute_notes, at combine.c...
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
4 2012 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "common/common-target.h"
53 #include "timevar.h"
54 #include "df.h"
55 #include "diagnostic.h"
56 #include "ssaexpand.h"
57 #include "target-globals.h"
58 #include "params.h"
59
60 /* Decide whether a function's arguments should be processed
61 from first to last or from last to first.
62
63 They should if the stack and args grow in opposite directions, but
64 only if we have push insns. */
65
66 #ifdef PUSH_ROUNDING
67
68 #ifndef PUSH_ARGS_REVERSED
69 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
70 #define PUSH_ARGS_REVERSED /* If it's last to first. */
71 #endif
72 #endif
73
74 #endif
75
76 #ifndef STACK_PUSH_CODE
77 #ifdef STACK_GROWS_DOWNWARD
78 #define STACK_PUSH_CODE PRE_DEC
79 #else
80 #define STACK_PUSH_CODE PRE_INC
81 #endif
82 #endif
83
84
85 /* If this is nonzero, we do not bother generating VOLATILE
86 around volatile memory references, and we are willing to
87 output indirect addresses. If cse is to follow, we reject
88 indirect addresses so a useful potential cse is generated;
89 if it is used only once, instruction combination will produce
90 the same indirect address eventually. */
91 int cse_not_expected;
92
93 /* This structure is used by move_by_pieces to describe the move to
94 be performed. */
95 struct move_by_pieces_d
96 {
97 rtx to;
98 rtx to_addr;
99 int autinc_to;
100 int explicit_inc_to;
101 rtx from;
102 rtx from_addr;
103 int autinc_from;
104 int explicit_inc_from;
105 unsigned HOST_WIDE_INT len;
106 HOST_WIDE_INT offset;
107 int reverse;
108 };
109
110 /* This structure is used by store_by_pieces to describe the clear to
111 be performed. */
112
113 struct store_by_pieces_d
114 {
115 rtx to;
116 rtx to_addr;
117 int autinc_to;
118 int explicit_inc_to;
119 unsigned HOST_WIDE_INT len;
120 HOST_WIDE_INT offset;
121 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
122 void *constfundata;
123 int reverse;
124 };
125
126 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
127 struct move_by_pieces_d *);
128 static bool block_move_libcall_safe_for_call_parm (void);
129 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
130 static tree emit_block_move_libcall_fn (int);
131 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
132 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
133 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
134 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
135 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
136 struct store_by_pieces_d *);
137 static tree clear_storage_libcall_fn (int);
138 static rtx compress_float_constant (rtx, rtx);
139 static rtx get_subtarget (rtx);
140 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
141 HOST_WIDE_INT, enum machine_mode,
142 tree, tree, int, alias_set_type);
143 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
144 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
145 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
146 enum machine_mode,
147 tree, tree, alias_set_type, bool);
148
149 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
150
151 static int is_aligning_offset (const_tree, const_tree);
152 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
153 enum expand_modifier);
154 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
155 static rtx do_store_flag (sepops, rtx, enum machine_mode);
156 #ifdef PUSH_ROUNDING
157 static void emit_single_push_insn (enum machine_mode, rtx, tree);
158 #endif
159 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
160 static rtx const_vector_from_tree (tree);
161 static void write_complex_part (rtx, rtx, bool);
162
163 /* This macro is used to determine whether move_by_pieces should be called
164 to perform a structure copy. */
165 #ifndef MOVE_BY_PIECES_P
166 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
167 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
168 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
169 #endif
170
171 /* This macro is used to determine whether clear_by_pieces should be
172 called to clear storage. */
173 #ifndef CLEAR_BY_PIECES_P
174 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
175 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
176 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
177 #endif
178
179 /* This macro is used to determine whether store_by_pieces should be
180 called to "memset" storage with byte values other than zero. */
181 #ifndef SET_BY_PIECES_P
182 #define SET_BY_PIECES_P(SIZE, ALIGN) \
183 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
184 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
185 #endif
186
187 /* This macro is used to determine whether store_by_pieces should be
188 called to "memcpy" storage when the source is a constant string. */
189 #ifndef STORE_BY_PIECES_P
190 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
191 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
192 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
193 #endif
194
195 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
196
197 #ifndef SLOW_UNALIGNED_ACCESS
198 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
199 #endif
200 \f
201 /* This is run to set up which modes can be used
202 directly in memory and to initialize the block move optab. It is run
203 at the beginning of compilation and when the target is reinitialized. */
204
205 void
206 init_expr_target (void)
207 {
208 rtx insn, pat;
209 enum machine_mode mode;
210 int num_clobbers;
211 rtx mem, mem1;
212 rtx reg;
213
214 /* Try indexing by frame ptr and try by stack ptr.
215 It is known that on the Convex the stack ptr isn't a valid index.
216 With luck, one or the other is valid on any machine. */
217 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
218 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
219
220 /* A scratch register we can modify in-place below to avoid
221 useless RTL allocations. */
222 reg = gen_rtx_REG (VOIDmode, -1);
223
224 insn = rtx_alloc (INSN);
225 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
226 PATTERN (insn) = pat;
227
228 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
229 mode = (enum machine_mode) ((int) mode + 1))
230 {
231 int regno;
232
233 direct_load[(int) mode] = direct_store[(int) mode] = 0;
234 PUT_MODE (mem, mode);
235 PUT_MODE (mem1, mode);
236 PUT_MODE (reg, mode);
237
238 /* See if there is some register that can be used in this mode and
239 directly loaded or stored from memory. */
240
241 if (mode != VOIDmode && mode != BLKmode)
242 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
243 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
244 regno++)
245 {
246 if (! HARD_REGNO_MODE_OK (regno, mode))
247 continue;
248
249 SET_REGNO (reg, regno);
250
251 SET_SRC (pat) = mem;
252 SET_DEST (pat) = reg;
253 if (recog (pat, insn, &num_clobbers) >= 0)
254 direct_load[(int) mode] = 1;
255
256 SET_SRC (pat) = mem1;
257 SET_DEST (pat) = reg;
258 if (recog (pat, insn, &num_clobbers) >= 0)
259 direct_load[(int) mode] = 1;
260
261 SET_SRC (pat) = reg;
262 SET_DEST (pat) = mem;
263 if (recog (pat, insn, &num_clobbers) >= 0)
264 direct_store[(int) mode] = 1;
265
266 SET_SRC (pat) = reg;
267 SET_DEST (pat) = mem1;
268 if (recog (pat, insn, &num_clobbers) >= 0)
269 direct_store[(int) mode] = 1;
270 }
271 }
272
273 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
274
275 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
276 mode = GET_MODE_WIDER_MODE (mode))
277 {
278 enum machine_mode srcmode;
279 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
280 srcmode = GET_MODE_WIDER_MODE (srcmode))
281 {
282 enum insn_code ic;
283
284 ic = can_extend_p (mode, srcmode, 0);
285 if (ic == CODE_FOR_nothing)
286 continue;
287
288 PUT_MODE (mem, srcmode);
289
290 if (insn_operand_matches (ic, 1, mem))
291 float_extend_from_mem[mode][srcmode] = true;
292 }
293 }
294 }
295
296 /* This is run at the start of compiling a function. */
297
298 void
299 init_expr (void)
300 {
301 memset (&crtl->expr, 0, sizeof (crtl->expr));
302 }
303 \f
304 /* Copy data from FROM to TO, where the machine modes are not the same.
305 Both modes may be integer, or both may be floating, or both may be
306 fixed-point.
307 UNSIGNEDP should be nonzero if FROM is an unsigned type.
308 This causes zero-extension instead of sign-extension. */
309
310 void
311 convert_move (rtx to, rtx from, int unsignedp)
312 {
313 enum machine_mode to_mode = GET_MODE (to);
314 enum machine_mode from_mode = GET_MODE (from);
315 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
316 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
317 enum insn_code code;
318 rtx libcall;
319
320 /* rtx code for making an equivalent value. */
321 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
322 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
323
324
325 gcc_assert (to_real == from_real);
326 gcc_assert (to_mode != BLKmode);
327 gcc_assert (from_mode != BLKmode);
328
329 /* If the source and destination are already the same, then there's
330 nothing to do. */
331 if (to == from)
332 return;
333
334 /* If FROM is a SUBREG that indicates that we have already done at least
335 the required extension, strip it. We don't handle such SUBREGs as
336 TO here. */
337
338 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
339 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
340 >= GET_MODE_PRECISION (to_mode))
341 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
342 from = gen_lowpart (to_mode, from), from_mode = to_mode;
343
344 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
345
346 if (to_mode == from_mode
347 || (from_mode == VOIDmode && CONSTANT_P (from)))
348 {
349 emit_move_insn (to, from);
350 return;
351 }
352
353 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
354 {
355 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
356
357 if (VECTOR_MODE_P (to_mode))
358 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
359 else
360 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
361
362 emit_move_insn (to, from);
363 return;
364 }
365
366 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
367 {
368 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
369 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
370 return;
371 }
372
373 if (to_real)
374 {
375 rtx value, insns;
376 convert_optab tab;
377
378 gcc_assert ((GET_MODE_PRECISION (from_mode)
379 != GET_MODE_PRECISION (to_mode))
380 || (DECIMAL_FLOAT_MODE_P (from_mode)
381 != DECIMAL_FLOAT_MODE_P (to_mode)));
382
383 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
384 /* Conversion between decimal float and binary float, same size. */
385 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
386 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
387 tab = sext_optab;
388 else
389 tab = trunc_optab;
390
391 /* Try converting directly if the insn is supported. */
392
393 code = convert_optab_handler (tab, to_mode, from_mode);
394 if (code != CODE_FOR_nothing)
395 {
396 emit_unop_insn (code, to, from,
397 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
398 return;
399 }
400
401 /* Otherwise use a libcall. */
402 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
403
404 /* Is this conversion implemented yet? */
405 gcc_assert (libcall);
406
407 start_sequence ();
408 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
409 1, from, from_mode);
410 insns = get_insns ();
411 end_sequence ();
412 emit_libcall_block (insns, to, value,
413 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
414 from)
415 : gen_rtx_FLOAT_EXTEND (to_mode, from));
416 return;
417 }
418
419 /* Handle pointer conversion. */ /* SPEE 900220. */
420 /* Targets are expected to provide conversion insns between PxImode and
421 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
422 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
423 {
424 enum machine_mode full_mode
425 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
426
427 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
428 != CODE_FOR_nothing);
429
430 if (full_mode != from_mode)
431 from = convert_to_mode (full_mode, from, unsignedp);
432 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
433 to, from, UNKNOWN);
434 return;
435 }
436 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
437 {
438 rtx new_from;
439 enum machine_mode full_mode
440 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
441
442 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)
443 != CODE_FOR_nothing);
444
445 if (to_mode == full_mode)
446 {
447 emit_unop_insn (convert_optab_handler (sext_optab, full_mode,
448 from_mode),
449 to, from, UNKNOWN);
450 return;
451 }
452
453 new_from = gen_reg_rtx (full_mode);
454 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode),
455 new_from, from, UNKNOWN);
456
457 /* else proceed to integer conversions below. */
458 from_mode = full_mode;
459 from = new_from;
460 }
461
462 /* Make sure both are fixed-point modes or both are not. */
463 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
464 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
465 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
466 {
467 /* If we widen from_mode to to_mode and they are in the same class,
468 we won't saturate the result.
469 Otherwise, always saturate the result to play safe. */
470 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
471 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
472 expand_fixed_convert (to, from, 0, 0);
473 else
474 expand_fixed_convert (to, from, 0, 1);
475 return;
476 }
477
478 /* Now both modes are integers. */
479
480 /* Handle expanding beyond a word. */
481 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
482 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
483 {
484 rtx insns;
485 rtx lowpart;
486 rtx fill_value;
487 rtx lowfrom;
488 int i;
489 enum machine_mode lowpart_mode;
490 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
491
492 /* Try converting directly if the insn is supported. */
493 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
494 != CODE_FOR_nothing)
495 {
496 /* If FROM is a SUBREG, put it into a register. Do this
497 so that we always generate the same set of insns for
498 better cse'ing; if an intermediate assignment occurred,
499 we won't be doing the operation directly on the SUBREG. */
500 if (optimize > 0 && GET_CODE (from) == SUBREG)
501 from = force_reg (from_mode, from);
502 emit_unop_insn (code, to, from, equiv_code);
503 return;
504 }
505 /* Next, try converting via full word. */
506 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
507 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
508 != CODE_FOR_nothing))
509 {
510 rtx word_to = gen_reg_rtx (word_mode);
511 if (REG_P (to))
512 {
513 if (reg_overlap_mentioned_p (to, from))
514 from = force_reg (from_mode, from);
515 emit_clobber (to);
516 }
517 convert_move (word_to, from, unsignedp);
518 emit_unop_insn (code, to, word_to, equiv_code);
519 return;
520 }
521
522 /* No special multiword conversion insn; do it by hand. */
523 start_sequence ();
524
525 /* Since we will turn this into a no conflict block, we must ensure
526 that the source does not overlap the target. */
527
528 if (reg_overlap_mentioned_p (to, from))
529 from = force_reg (from_mode, from);
530
531 /* Get a copy of FROM widened to a word, if necessary. */
532 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
533 lowpart_mode = word_mode;
534 else
535 lowpart_mode = from_mode;
536
537 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
538
539 lowpart = gen_lowpart (lowpart_mode, to);
540 emit_move_insn (lowpart, lowfrom);
541
542 /* Compute the value to put in each remaining word. */
543 if (unsignedp)
544 fill_value = const0_rtx;
545 else
546 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
547 LT, lowfrom, const0_rtx,
548 VOIDmode, 0, -1);
549
550 /* Fill the remaining words. */
551 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
552 {
553 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
554 rtx subword = operand_subword (to, index, 1, to_mode);
555
556 gcc_assert (subword);
557
558 if (fill_value != subword)
559 emit_move_insn (subword, fill_value);
560 }
561
562 insns = get_insns ();
563 end_sequence ();
564
565 emit_insn (insns);
566 return;
567 }
568
569 /* Truncating multi-word to a word or less. */
570 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
571 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
572 {
573 if (!((MEM_P (from)
574 && ! MEM_VOLATILE_P (from)
575 && direct_load[(int) to_mode]
576 && ! mode_dependent_address_p (XEXP (from, 0)))
577 || REG_P (from)
578 || GET_CODE (from) == SUBREG))
579 from = force_reg (from_mode, from);
580 convert_move (to, gen_lowpart (word_mode, from), 0);
581 return;
582 }
583
584 /* Now follow all the conversions between integers
585 no more than a word long. */
586
587 /* For truncation, usually we can just refer to FROM in a narrower mode. */
588 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
589 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
590 {
591 if (!((MEM_P (from)
592 && ! MEM_VOLATILE_P (from)
593 && direct_load[(int) to_mode]
594 && ! mode_dependent_address_p (XEXP (from, 0)))
595 || REG_P (from)
596 || GET_CODE (from) == SUBREG))
597 from = force_reg (from_mode, from);
598 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
599 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
600 from = copy_to_reg (from);
601 emit_move_insn (to, gen_lowpart (to_mode, from));
602 return;
603 }
604
605 /* Handle extension. */
606 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
607 {
608 /* Convert directly if that works. */
609 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
610 != CODE_FOR_nothing)
611 {
612 emit_unop_insn (code, to, from, equiv_code);
613 return;
614 }
615 else
616 {
617 enum machine_mode intermediate;
618 rtx tmp;
619 int shift_amount;
620
621 /* Search for a mode to convert via. */
622 for (intermediate = from_mode; intermediate != VOIDmode;
623 intermediate = GET_MODE_WIDER_MODE (intermediate))
624 if (((can_extend_p (to_mode, intermediate, unsignedp)
625 != CODE_FOR_nothing)
626 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
627 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
628 && (can_extend_p (intermediate, from_mode, unsignedp)
629 != CODE_FOR_nothing))
630 {
631 convert_move (to, convert_to_mode (intermediate, from,
632 unsignedp), unsignedp);
633 return;
634 }
635
636 /* No suitable intermediate mode.
637 Generate what we need with shifts. */
638 shift_amount = (GET_MODE_PRECISION (to_mode)
639 - GET_MODE_PRECISION (from_mode));
640 from = gen_lowpart (to_mode, force_reg (from_mode, from));
641 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
642 to, unsignedp);
643 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
644 to, unsignedp);
645 if (tmp != to)
646 emit_move_insn (to, tmp);
647 return;
648 }
649 }
650
651 /* Support special truncate insns for certain modes. */
652 if (convert_optab_handler (trunc_optab, to_mode,
653 from_mode) != CODE_FOR_nothing)
654 {
655 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
656 to, from, UNKNOWN);
657 return;
658 }
659
660 /* Handle truncation of volatile memrefs, and so on;
661 the things that couldn't be truncated directly,
662 and for which there was no special instruction.
663
664 ??? Code above formerly short-circuited this, for most integer
665 mode pairs, with a force_reg in from_mode followed by a recursive
666 call to this routine. Appears always to have been wrong. */
667 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
668 {
669 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
670 emit_move_insn (to, temp);
671 return;
672 }
673
674 /* Mode combination is not recognized. */
675 gcc_unreachable ();
676 }
677
678 /* Return an rtx for a value that would result
679 from converting X to mode MODE.
680 Both X and MODE may be floating, or both integer.
681 UNSIGNEDP is nonzero if X is an unsigned value.
682 This can be done by referring to a part of X in place
683 or by copying to a new temporary with conversion. */
684
685 rtx
686 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
687 {
688 return convert_modes (mode, VOIDmode, x, unsignedp);
689 }
690
691 /* Return an rtx for a value that would result
692 from converting X from mode OLDMODE to mode MODE.
693 Both modes may be floating, or both integer.
694 UNSIGNEDP is nonzero if X is an unsigned value.
695
696 This can be done by referring to a part of X in place
697 or by copying to a new temporary with conversion.
698
699 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
700
701 rtx
702 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
703 {
704 rtx temp;
705
706 /* If FROM is a SUBREG that indicates that we have already done at least
707 the required extension, strip it. */
708
709 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
710 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
711 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
712 x = gen_lowpart (mode, x);
713
714 if (GET_MODE (x) != VOIDmode)
715 oldmode = GET_MODE (x);
716
717 if (mode == oldmode)
718 return x;
719
720 /* There is one case that we must handle specially: If we are converting
721 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
722 we are to interpret the constant as unsigned, gen_lowpart will do
723 the wrong if the constant appears negative. What we want to do is
724 make the high-order word of the constant zero, not all ones. */
725
726 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
727 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
728 && CONST_INT_P (x) && INTVAL (x) < 0)
729 {
730 double_int val = uhwi_to_double_int (INTVAL (x));
731
732 /* We need to zero extend VAL. */
733 if (oldmode != VOIDmode)
734 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
735
736 return immed_double_int_const (val, mode);
737 }
738
739 /* We can do this with a gen_lowpart if both desired and current modes
740 are integer, and this is either a constant integer, a register, or a
741 non-volatile MEM. Except for the constant case where MODE is no
742 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
743
744 if ((CONST_INT_P (x)
745 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
746 || (GET_MODE_CLASS (mode) == MODE_INT
747 && GET_MODE_CLASS (oldmode) == MODE_INT
748 && (GET_CODE (x) == CONST_DOUBLE
749 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
750 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
751 && direct_load[(int) mode])
752 || (REG_P (x)
753 && (! HARD_REGISTER_P (x)
754 || HARD_REGNO_MODE_OK (REGNO (x), mode))
755 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
756 GET_MODE (x))))))))
757 {
758 /* ?? If we don't know OLDMODE, we have to assume here that
759 X does not need sign- or zero-extension. This may not be
760 the case, but it's the best we can do. */
761 if (CONST_INT_P (x) && oldmode != VOIDmode
762 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
763 {
764 HOST_WIDE_INT val = INTVAL (x);
765
766 /* We must sign or zero-extend in this case. Start by
767 zero-extending, then sign extend if we need to. */
768 val &= GET_MODE_MASK (oldmode);
769 if (! unsignedp
770 && val_signbit_known_set_p (oldmode, val))
771 val |= ~GET_MODE_MASK (oldmode);
772
773 return gen_int_mode (val, mode);
774 }
775
776 return gen_lowpart (mode, x);
777 }
778
779 /* Converting from integer constant into mode is always equivalent to an
780 subreg operation. */
781 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
782 {
783 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
784 return simplify_gen_subreg (mode, x, oldmode, 0);
785 }
786
787 temp = gen_reg_rtx (mode);
788 convert_move (temp, x, unsignedp);
789 return temp;
790 }
791 \f
792 /* Return the largest alignment we can use for doing a move (or store)
793 of MAX_PIECES. ALIGN is the largest alignment we could use. */
794
795 static unsigned int
796 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
797 {
798 enum machine_mode tmode;
799
800 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
801 if (align >= GET_MODE_ALIGNMENT (tmode))
802 align = GET_MODE_ALIGNMENT (tmode);
803 else
804 {
805 enum machine_mode tmode, xmode;
806
807 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
808 tmode != VOIDmode;
809 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
810 if (GET_MODE_SIZE (tmode) > max_pieces
811 || SLOW_UNALIGNED_ACCESS (tmode, align))
812 break;
813
814 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
815 }
816
817 return align;
818 }
819
820 /* Return the widest integer mode no wider than SIZE. If no such mode
821 can be found, return VOIDmode. */
822
823 static enum machine_mode
824 widest_int_mode_for_size (unsigned int size)
825 {
826 enum machine_mode tmode, mode = VOIDmode;
827
828 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
829 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
830 if (GET_MODE_SIZE (tmode) < size)
831 mode = tmode;
832
833 return mode;
834 }
835
836 /* STORE_MAX_PIECES is the number of bytes at a time that we can
837 store efficiently. Due to internal GCC limitations, this is
838 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
839 for an immediate constant. */
840
841 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
842
843 /* Determine whether the LEN bytes can be moved by using several move
844 instructions. Return nonzero if a call to move_by_pieces should
845 succeed. */
846
847 int
848 can_move_by_pieces (unsigned HOST_WIDE_INT len,
849 unsigned int align ATTRIBUTE_UNUSED)
850 {
851 return MOVE_BY_PIECES_P (len, align);
852 }
853
854 /* Generate several move instructions to copy LEN bytes from block FROM to
855 block TO. (These are MEM rtx's with BLKmode).
856
857 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
858 used to push FROM to the stack.
859
860 ALIGN is maximum stack alignment we can assume.
861
862 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
863 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
864 stpcpy. */
865
866 rtx
867 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
868 unsigned int align, int endp)
869 {
870 struct move_by_pieces_d data;
871 enum machine_mode to_addr_mode, from_addr_mode
872 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
873 rtx to_addr, from_addr = XEXP (from, 0);
874 unsigned int max_size = MOVE_MAX_PIECES + 1;
875 enum insn_code icode;
876
877 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
878
879 data.offset = 0;
880 data.from_addr = from_addr;
881 if (to)
882 {
883 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
884 to_addr = XEXP (to, 0);
885 data.to = to;
886 data.autinc_to
887 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
888 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
889 data.reverse
890 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
891 }
892 else
893 {
894 to_addr_mode = VOIDmode;
895 to_addr = NULL_RTX;
896 data.to = NULL_RTX;
897 data.autinc_to = 1;
898 #ifdef STACK_GROWS_DOWNWARD
899 data.reverse = 1;
900 #else
901 data.reverse = 0;
902 #endif
903 }
904 data.to_addr = to_addr;
905 data.from = from;
906 data.autinc_from
907 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
908 || GET_CODE (from_addr) == POST_INC
909 || GET_CODE (from_addr) == POST_DEC);
910
911 data.explicit_inc_from = 0;
912 data.explicit_inc_to = 0;
913 if (data.reverse) data.offset = len;
914 data.len = len;
915
916 /* If copying requires more than two move insns,
917 copy addresses to registers (to make displacements shorter)
918 and use post-increment if available. */
919 if (!(data.autinc_from && data.autinc_to)
920 && move_by_pieces_ninsns (len, align, max_size) > 2)
921 {
922 /* Find the mode of the largest move...
923 MODE might not be used depending on the definitions of the
924 USE_* macros below. */
925 enum machine_mode mode ATTRIBUTE_UNUSED
926 = widest_int_mode_for_size (max_size);
927
928 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
929 {
930 data.from_addr = copy_to_mode_reg (from_addr_mode,
931 plus_constant (from_addr, len));
932 data.autinc_from = 1;
933 data.explicit_inc_from = -1;
934 }
935 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
936 {
937 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
938 data.autinc_from = 1;
939 data.explicit_inc_from = 1;
940 }
941 if (!data.autinc_from && CONSTANT_P (from_addr))
942 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
943 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
944 {
945 data.to_addr = copy_to_mode_reg (to_addr_mode,
946 plus_constant (to_addr, len));
947 data.autinc_to = 1;
948 data.explicit_inc_to = -1;
949 }
950 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
951 {
952 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
953 data.autinc_to = 1;
954 data.explicit_inc_to = 1;
955 }
956 if (!data.autinc_to && CONSTANT_P (to_addr))
957 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
958 }
959
960 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
961
962 /* First move what we can in the largest integer mode, then go to
963 successively smaller modes. */
964
965 while (max_size > 1)
966 {
967 enum machine_mode mode = widest_int_mode_for_size (max_size);
968
969 if (mode == VOIDmode)
970 break;
971
972 icode = optab_handler (mov_optab, mode);
973 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
974 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
975
976 max_size = GET_MODE_SIZE (mode);
977 }
978
979 /* The code above should have handled everything. */
980 gcc_assert (!data.len);
981
982 if (endp)
983 {
984 rtx to1;
985
986 gcc_assert (!data.reverse);
987 if (data.autinc_to)
988 {
989 if (endp == 2)
990 {
991 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
992 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
993 else
994 data.to_addr = copy_to_mode_reg (to_addr_mode,
995 plus_constant (data.to_addr,
996 -1));
997 }
998 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
999 data.offset);
1000 }
1001 else
1002 {
1003 if (endp == 2)
1004 --data.offset;
1005 to1 = adjust_address (data.to, QImode, data.offset);
1006 }
1007 return to1;
1008 }
1009 else
1010 return data.to;
1011 }
1012
1013 /* Return number of insns required to move L bytes by pieces.
1014 ALIGN (in bits) is maximum alignment we can assume. */
1015
1016 unsigned HOST_WIDE_INT
1017 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1018 unsigned int max_size)
1019 {
1020 unsigned HOST_WIDE_INT n_insns = 0;
1021
1022 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1023
1024 while (max_size > 1)
1025 {
1026 enum machine_mode mode;
1027 enum insn_code icode;
1028
1029 mode = widest_int_mode_for_size (max_size);
1030
1031 if (mode == VOIDmode)
1032 break;
1033
1034 icode = optab_handler (mov_optab, mode);
1035 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1036 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1037
1038 max_size = GET_MODE_SIZE (mode);
1039 }
1040
1041 gcc_assert (!l);
1042 return n_insns;
1043 }
1044
1045 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1046 with move instructions for mode MODE. GENFUN is the gen_... function
1047 to make a move insn for that mode. DATA has all the other info. */
1048
1049 static void
1050 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1051 struct move_by_pieces_d *data)
1052 {
1053 unsigned int size = GET_MODE_SIZE (mode);
1054 rtx to1 = NULL_RTX, from1;
1055
1056 while (data->len >= size)
1057 {
1058 if (data->reverse)
1059 data->offset -= size;
1060
1061 if (data->to)
1062 {
1063 if (data->autinc_to)
1064 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1065 data->offset);
1066 else
1067 to1 = adjust_address (data->to, mode, data->offset);
1068 }
1069
1070 if (data->autinc_from)
1071 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1072 data->offset);
1073 else
1074 from1 = adjust_address (data->from, mode, data->offset);
1075
1076 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1077 emit_insn (gen_add2_insn (data->to_addr,
1078 GEN_INT (-(HOST_WIDE_INT)size)));
1079 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1080 emit_insn (gen_add2_insn (data->from_addr,
1081 GEN_INT (-(HOST_WIDE_INT)size)));
1082
1083 if (data->to)
1084 emit_insn ((*genfun) (to1, from1));
1085 else
1086 {
1087 #ifdef PUSH_ROUNDING
1088 emit_single_push_insn (mode, from1, NULL);
1089 #else
1090 gcc_unreachable ();
1091 #endif
1092 }
1093
1094 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1095 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1096 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1097 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1098
1099 if (! data->reverse)
1100 data->offset += size;
1101
1102 data->len -= size;
1103 }
1104 }
1105 \f
1106 /* Emit code to move a block Y to a block X. This may be done with
1107 string-move instructions, with multiple scalar move instructions,
1108 or with a library call.
1109
1110 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1111 SIZE is an rtx that says how long they are.
1112 ALIGN is the maximum alignment we can assume they have.
1113 METHOD describes what kind of copy this is, and what mechanisms may be used.
1114
1115 Return the address of the new block, if memcpy is called and returns it,
1116 0 otherwise. */
1117
1118 rtx
1119 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1120 unsigned int expected_align, HOST_WIDE_INT expected_size)
1121 {
1122 bool may_use_call;
1123 rtx retval = 0;
1124 unsigned int align;
1125
1126 gcc_assert (size);
1127 if (CONST_INT_P (size)
1128 && INTVAL (size) == 0)
1129 return 0;
1130
1131 switch (method)
1132 {
1133 case BLOCK_OP_NORMAL:
1134 case BLOCK_OP_TAILCALL:
1135 may_use_call = true;
1136 break;
1137
1138 case BLOCK_OP_CALL_PARM:
1139 may_use_call = block_move_libcall_safe_for_call_parm ();
1140
1141 /* Make inhibit_defer_pop nonzero around the library call
1142 to force it to pop the arguments right away. */
1143 NO_DEFER_POP;
1144 break;
1145
1146 case BLOCK_OP_NO_LIBCALL:
1147 may_use_call = false;
1148 break;
1149
1150 default:
1151 gcc_unreachable ();
1152 }
1153
1154 gcc_assert (MEM_P (x) && MEM_P (y));
1155 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1156 gcc_assert (align >= BITS_PER_UNIT);
1157
1158 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1159 block copy is more efficient for other large modes, e.g. DCmode. */
1160 x = adjust_address (x, BLKmode, 0);
1161 y = adjust_address (y, BLKmode, 0);
1162
1163 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1164 can be incorrect is coming from __builtin_memcpy. */
1165 if (CONST_INT_P (size))
1166 {
1167 x = shallow_copy_rtx (x);
1168 y = shallow_copy_rtx (y);
1169 set_mem_size (x, INTVAL (size));
1170 set_mem_size (y, INTVAL (size));
1171 }
1172
1173 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1174 move_by_pieces (x, y, INTVAL (size), align, 0);
1175 else if (emit_block_move_via_movmem (x, y, size, align,
1176 expected_align, expected_size))
1177 ;
1178 else if (may_use_call
1179 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1180 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1181 {
1182 /* Since x and y are passed to a libcall, mark the corresponding
1183 tree EXPR as addressable. */
1184 tree y_expr = MEM_EXPR (y);
1185 tree x_expr = MEM_EXPR (x);
1186 if (y_expr)
1187 mark_addressable (y_expr);
1188 if (x_expr)
1189 mark_addressable (x_expr);
1190 retval = emit_block_move_via_libcall (x, y, size,
1191 method == BLOCK_OP_TAILCALL);
1192 }
1193
1194 else
1195 emit_block_move_via_loop (x, y, size, align);
1196
1197 if (method == BLOCK_OP_CALL_PARM)
1198 OK_DEFER_POP;
1199
1200 return retval;
1201 }
1202
1203 rtx
1204 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1205 {
1206 return emit_block_move_hints (x, y, size, method, 0, -1);
1207 }
1208
1209 /* A subroutine of emit_block_move. Returns true if calling the
1210 block move libcall will not clobber any parameters which may have
1211 already been placed on the stack. */
1212
1213 static bool
1214 block_move_libcall_safe_for_call_parm (void)
1215 {
1216 #if defined (REG_PARM_STACK_SPACE)
1217 tree fn;
1218 #endif
1219
1220 /* If arguments are pushed on the stack, then they're safe. */
1221 if (PUSH_ARGS)
1222 return true;
1223
1224 /* If registers go on the stack anyway, any argument is sure to clobber
1225 an outgoing argument. */
1226 #if defined (REG_PARM_STACK_SPACE)
1227 fn = emit_block_move_libcall_fn (false);
1228 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1229 depend on its argument. */
1230 (void) fn;
1231 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1232 && REG_PARM_STACK_SPACE (fn) != 0)
1233 return false;
1234 #endif
1235
1236 /* If any argument goes in memory, then it might clobber an outgoing
1237 argument. */
1238 {
1239 CUMULATIVE_ARGS args_so_far_v;
1240 cumulative_args_t args_so_far;
1241 tree fn, arg;
1242
1243 fn = emit_block_move_libcall_fn (false);
1244 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1245 args_so_far = pack_cumulative_args (&args_so_far_v);
1246
1247 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1248 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1249 {
1250 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1251 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1252 NULL_TREE, true);
1253 if (!tmp || !REG_P (tmp))
1254 return false;
1255 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1256 return false;
1257 targetm.calls.function_arg_advance (args_so_far, mode,
1258 NULL_TREE, true);
1259 }
1260 }
1261 return true;
1262 }
1263
1264 /* A subroutine of emit_block_move. Expand a movmem pattern;
1265 return true if successful. */
1266
1267 static bool
1268 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1269 unsigned int expected_align, HOST_WIDE_INT expected_size)
1270 {
1271 int save_volatile_ok = volatile_ok;
1272 enum machine_mode mode;
1273
1274 if (expected_align < align)
1275 expected_align = align;
1276
1277 /* Since this is a move insn, we don't care about volatility. */
1278 volatile_ok = 1;
1279
1280 /* Try the most limited insn first, because there's no point
1281 including more than one in the machine description unless
1282 the more limited one has some advantage. */
1283
1284 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1285 mode = GET_MODE_WIDER_MODE (mode))
1286 {
1287 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1288
1289 if (code != CODE_FOR_nothing
1290 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1291 here because if SIZE is less than the mode mask, as it is
1292 returned by the macro, it will definitely be less than the
1293 actual mode mask. */
1294 && ((CONST_INT_P (size)
1295 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1296 <= (GET_MODE_MASK (mode) >> 1)))
1297 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1298 {
1299 struct expand_operand ops[6];
1300 unsigned int nops;
1301
1302 /* ??? When called via emit_block_move_for_call, it'd be
1303 nice if there were some way to inform the backend, so
1304 that it doesn't fail the expansion because it thinks
1305 emitting the libcall would be more efficient. */
1306 nops = insn_data[(int) code].n_generator_args;
1307 gcc_assert (nops == 4 || nops == 6);
1308
1309 create_fixed_operand (&ops[0], x);
1310 create_fixed_operand (&ops[1], y);
1311 /* The check above guarantees that this size conversion is valid. */
1312 create_convert_operand_to (&ops[2], size, mode, true);
1313 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1314 if (nops == 6)
1315 {
1316 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1317 create_integer_operand (&ops[5], expected_size);
1318 }
1319 if (maybe_expand_insn (code, nops, ops))
1320 {
1321 volatile_ok = save_volatile_ok;
1322 return true;
1323 }
1324 }
1325 }
1326
1327 volatile_ok = save_volatile_ok;
1328 return false;
1329 }
1330
1331 /* A subroutine of emit_block_move. Expand a call to memcpy.
1332 Return the return value from memcpy, 0 otherwise. */
1333
1334 rtx
1335 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1336 {
1337 rtx dst_addr, src_addr;
1338 tree call_expr, fn, src_tree, dst_tree, size_tree;
1339 enum machine_mode size_mode;
1340 rtx retval;
1341
1342 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1343 pseudos. We can then place those new pseudos into a VAR_DECL and
1344 use them later. */
1345
1346 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1347 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1348
1349 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1350 src_addr = convert_memory_address (ptr_mode, src_addr);
1351
1352 dst_tree = make_tree (ptr_type_node, dst_addr);
1353 src_tree = make_tree (ptr_type_node, src_addr);
1354
1355 size_mode = TYPE_MODE (sizetype);
1356
1357 size = convert_to_mode (size_mode, size, 1);
1358 size = copy_to_mode_reg (size_mode, size);
1359
1360 /* It is incorrect to use the libcall calling conventions to call
1361 memcpy in this context. This could be a user call to memcpy and
1362 the user may wish to examine the return value from memcpy. For
1363 targets where libcalls and normal calls have different conventions
1364 for returning pointers, we could end up generating incorrect code. */
1365
1366 size_tree = make_tree (sizetype, size);
1367
1368 fn = emit_block_move_libcall_fn (true);
1369 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1370 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1371
1372 retval = expand_normal (call_expr);
1373
1374 return retval;
1375 }
1376
1377 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1378 for the function we use for block copies. The first time FOR_CALL
1379 is true, we call assemble_external. */
1380
1381 static GTY(()) tree block_move_fn;
1382
1383 void
1384 init_block_move_fn (const char *asmspec)
1385 {
1386 if (!block_move_fn)
1387 {
1388 tree args, fn;
1389
1390 fn = get_identifier ("memcpy");
1391 args = build_function_type_list (ptr_type_node, ptr_type_node,
1392 const_ptr_type_node, sizetype,
1393 NULL_TREE);
1394
1395 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1396 DECL_EXTERNAL (fn) = 1;
1397 TREE_PUBLIC (fn) = 1;
1398 DECL_ARTIFICIAL (fn) = 1;
1399 TREE_NOTHROW (fn) = 1;
1400 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1401 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1402
1403 block_move_fn = fn;
1404 }
1405
1406 if (asmspec)
1407 set_user_assembler_name (block_move_fn, asmspec);
1408 }
1409
1410 static tree
1411 emit_block_move_libcall_fn (int for_call)
1412 {
1413 static bool emitted_extern;
1414
1415 if (!block_move_fn)
1416 init_block_move_fn (NULL);
1417
1418 if (for_call && !emitted_extern)
1419 {
1420 emitted_extern = true;
1421 make_decl_rtl (block_move_fn);
1422 assemble_external (block_move_fn);
1423 }
1424
1425 return block_move_fn;
1426 }
1427
1428 /* A subroutine of emit_block_move. Copy the data via an explicit
1429 loop. This is used only when libcalls are forbidden. */
1430 /* ??? It'd be nice to copy in hunks larger than QImode. */
1431
1432 static void
1433 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1434 unsigned int align ATTRIBUTE_UNUSED)
1435 {
1436 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1437 enum machine_mode x_addr_mode
1438 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1439 enum machine_mode y_addr_mode
1440 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1441 enum machine_mode iter_mode;
1442
1443 iter_mode = GET_MODE (size);
1444 if (iter_mode == VOIDmode)
1445 iter_mode = word_mode;
1446
1447 top_label = gen_label_rtx ();
1448 cmp_label = gen_label_rtx ();
1449 iter = gen_reg_rtx (iter_mode);
1450
1451 emit_move_insn (iter, const0_rtx);
1452
1453 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1454 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1455 do_pending_stack_adjust ();
1456
1457 emit_jump (cmp_label);
1458 emit_label (top_label);
1459
1460 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1461 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1462
1463 if (x_addr_mode != y_addr_mode)
1464 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1465 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1466
1467 x = change_address (x, QImode, x_addr);
1468 y = change_address (y, QImode, y_addr);
1469
1470 emit_move_insn (x, y);
1471
1472 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1473 true, OPTAB_LIB_WIDEN);
1474 if (tmp != iter)
1475 emit_move_insn (iter, tmp);
1476
1477 emit_label (cmp_label);
1478
1479 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1480 true, top_label);
1481 }
1482 \f
1483 /* Copy all or part of a value X into registers starting at REGNO.
1484 The number of registers to be filled is NREGS. */
1485
1486 void
1487 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1488 {
1489 int i;
1490 #ifdef HAVE_load_multiple
1491 rtx pat;
1492 rtx last;
1493 #endif
1494
1495 if (nregs == 0)
1496 return;
1497
1498 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1499 x = validize_mem (force_const_mem (mode, x));
1500
1501 /* See if the machine can do this with a load multiple insn. */
1502 #ifdef HAVE_load_multiple
1503 if (HAVE_load_multiple)
1504 {
1505 last = get_last_insn ();
1506 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1507 GEN_INT (nregs));
1508 if (pat)
1509 {
1510 emit_insn (pat);
1511 return;
1512 }
1513 else
1514 delete_insns_since (last);
1515 }
1516 #endif
1517
1518 for (i = 0; i < nregs; i++)
1519 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1520 operand_subword_force (x, i, mode));
1521 }
1522
1523 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1524 The number of registers to be filled is NREGS. */
1525
1526 void
1527 move_block_from_reg (int regno, rtx x, int nregs)
1528 {
1529 int i;
1530
1531 if (nregs == 0)
1532 return;
1533
1534 /* See if the machine can do this with a store multiple insn. */
1535 #ifdef HAVE_store_multiple
1536 if (HAVE_store_multiple)
1537 {
1538 rtx last = get_last_insn ();
1539 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1540 GEN_INT (nregs));
1541 if (pat)
1542 {
1543 emit_insn (pat);
1544 return;
1545 }
1546 else
1547 delete_insns_since (last);
1548 }
1549 #endif
1550
1551 for (i = 0; i < nregs; i++)
1552 {
1553 rtx tem = operand_subword (x, i, 1, BLKmode);
1554
1555 gcc_assert (tem);
1556
1557 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1558 }
1559 }
1560
1561 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1562 ORIG, where ORIG is a non-consecutive group of registers represented by
1563 a PARALLEL. The clone is identical to the original except in that the
1564 original set of registers is replaced by a new set of pseudo registers.
1565 The new set has the same modes as the original set. */
1566
1567 rtx
1568 gen_group_rtx (rtx orig)
1569 {
1570 int i, length;
1571 rtx *tmps;
1572
1573 gcc_assert (GET_CODE (orig) == PARALLEL);
1574
1575 length = XVECLEN (orig, 0);
1576 tmps = XALLOCAVEC (rtx, length);
1577
1578 /* Skip a NULL entry in first slot. */
1579 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1580
1581 if (i)
1582 tmps[0] = 0;
1583
1584 for (; i < length; i++)
1585 {
1586 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1587 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1588
1589 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1590 }
1591
1592 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1593 }
1594
1595 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1596 except that values are placed in TMPS[i], and must later be moved
1597 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1598
1599 static void
1600 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1601 {
1602 rtx src;
1603 int start, i;
1604 enum machine_mode m = GET_MODE (orig_src);
1605
1606 gcc_assert (GET_CODE (dst) == PARALLEL);
1607
1608 if (m != VOIDmode
1609 && !SCALAR_INT_MODE_P (m)
1610 && !MEM_P (orig_src)
1611 && GET_CODE (orig_src) != CONCAT)
1612 {
1613 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1614 if (imode == BLKmode)
1615 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1616 else
1617 src = gen_reg_rtx (imode);
1618 if (imode != BLKmode)
1619 src = gen_lowpart (GET_MODE (orig_src), src);
1620 emit_move_insn (src, orig_src);
1621 /* ...and back again. */
1622 if (imode != BLKmode)
1623 src = gen_lowpart (imode, src);
1624 emit_group_load_1 (tmps, dst, src, type, ssize);
1625 return;
1626 }
1627
1628 /* Check for a NULL entry, used to indicate that the parameter goes
1629 both on the stack and in registers. */
1630 if (XEXP (XVECEXP (dst, 0, 0), 0))
1631 start = 0;
1632 else
1633 start = 1;
1634
1635 /* Process the pieces. */
1636 for (i = start; i < XVECLEN (dst, 0); i++)
1637 {
1638 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1639 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1640 unsigned int bytelen = GET_MODE_SIZE (mode);
1641 int shift = 0;
1642
1643 /* Handle trailing fragments that run over the size of the struct. */
1644 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1645 {
1646 /* Arrange to shift the fragment to where it belongs.
1647 extract_bit_field loads to the lsb of the reg. */
1648 if (
1649 #ifdef BLOCK_REG_PADDING
1650 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1651 == (BYTES_BIG_ENDIAN ? upward : downward)
1652 #else
1653 BYTES_BIG_ENDIAN
1654 #endif
1655 )
1656 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1657 bytelen = ssize - bytepos;
1658 gcc_assert (bytelen > 0);
1659 }
1660
1661 /* If we won't be loading directly from memory, protect the real source
1662 from strange tricks we might play; but make sure that the source can
1663 be loaded directly into the destination. */
1664 src = orig_src;
1665 if (!MEM_P (orig_src)
1666 && (!CONSTANT_P (orig_src)
1667 || (GET_MODE (orig_src) != mode
1668 && GET_MODE (orig_src) != VOIDmode)))
1669 {
1670 if (GET_MODE (orig_src) == VOIDmode)
1671 src = gen_reg_rtx (mode);
1672 else
1673 src = gen_reg_rtx (GET_MODE (orig_src));
1674
1675 emit_move_insn (src, orig_src);
1676 }
1677
1678 /* Optimize the access just a bit. */
1679 if (MEM_P (src)
1680 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1681 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1682 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1683 && bytelen == GET_MODE_SIZE (mode))
1684 {
1685 tmps[i] = gen_reg_rtx (mode);
1686 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1687 }
1688 else if (COMPLEX_MODE_P (mode)
1689 && GET_MODE (src) == mode
1690 && bytelen == GET_MODE_SIZE (mode))
1691 /* Let emit_move_complex do the bulk of the work. */
1692 tmps[i] = src;
1693 else if (GET_CODE (src) == CONCAT)
1694 {
1695 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1696 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1697
1698 if ((bytepos == 0 && bytelen == slen0)
1699 || (bytepos != 0 && bytepos + bytelen <= slen))
1700 {
1701 /* The following assumes that the concatenated objects all
1702 have the same size. In this case, a simple calculation
1703 can be used to determine the object and the bit field
1704 to be extracted. */
1705 tmps[i] = XEXP (src, bytepos / slen0);
1706 if (! CONSTANT_P (tmps[i])
1707 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1708 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1709 (bytepos % slen0) * BITS_PER_UNIT,
1710 1, false, NULL_RTX, mode, mode);
1711 }
1712 else
1713 {
1714 rtx mem;
1715
1716 gcc_assert (!bytepos);
1717 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1718 emit_move_insn (mem, src);
1719 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1720 0, 1, false, NULL_RTX, mode, mode);
1721 }
1722 }
1723 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1724 SIMD register, which is currently broken. While we get GCC
1725 to emit proper RTL for these cases, let's dump to memory. */
1726 else if (VECTOR_MODE_P (GET_MODE (dst))
1727 && REG_P (src))
1728 {
1729 int slen = GET_MODE_SIZE (GET_MODE (src));
1730 rtx mem;
1731
1732 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1733 emit_move_insn (mem, src);
1734 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1735 }
1736 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1737 && XVECLEN (dst, 0) > 1)
1738 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1739 else if (CONSTANT_P (src))
1740 {
1741 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1742
1743 if (len == ssize)
1744 tmps[i] = src;
1745 else
1746 {
1747 rtx first, second;
1748
1749 gcc_assert (2 * len == ssize);
1750 split_double (src, &first, &second);
1751 if (i)
1752 tmps[i] = second;
1753 else
1754 tmps[i] = first;
1755 }
1756 }
1757 else if (REG_P (src) && GET_MODE (src) == mode)
1758 tmps[i] = src;
1759 else
1760 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1761 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1762 mode, mode);
1763
1764 if (shift)
1765 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1766 shift, tmps[i], 0);
1767 }
1768 }
1769
1770 /* Emit code to move a block SRC of type TYPE to a block DST,
1771 where DST is non-consecutive registers represented by a PARALLEL.
1772 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1773 if not known. */
1774
1775 void
1776 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1777 {
1778 rtx *tmps;
1779 int i;
1780
1781 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1782 emit_group_load_1 (tmps, dst, src, type, ssize);
1783
1784 /* Copy the extracted pieces into the proper (probable) hard regs. */
1785 for (i = 0; i < XVECLEN (dst, 0); i++)
1786 {
1787 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1788 if (d == NULL)
1789 continue;
1790 emit_move_insn (d, tmps[i]);
1791 }
1792 }
1793
1794 /* Similar, but load SRC into new pseudos in a format that looks like
1795 PARALLEL. This can later be fed to emit_group_move to get things
1796 in the right place. */
1797
1798 rtx
1799 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1800 {
1801 rtvec vec;
1802 int i;
1803
1804 vec = rtvec_alloc (XVECLEN (parallel, 0));
1805 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1806
1807 /* Convert the vector to look just like the original PARALLEL, except
1808 with the computed values. */
1809 for (i = 0; i < XVECLEN (parallel, 0); i++)
1810 {
1811 rtx e = XVECEXP (parallel, 0, i);
1812 rtx d = XEXP (e, 0);
1813
1814 if (d)
1815 {
1816 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1817 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1818 }
1819 RTVEC_ELT (vec, i) = e;
1820 }
1821
1822 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1823 }
1824
1825 /* Emit code to move a block SRC to block DST, where SRC and DST are
1826 non-consecutive groups of registers, each represented by a PARALLEL. */
1827
1828 void
1829 emit_group_move (rtx dst, rtx src)
1830 {
1831 int i;
1832
1833 gcc_assert (GET_CODE (src) == PARALLEL
1834 && GET_CODE (dst) == PARALLEL
1835 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1836
1837 /* Skip first entry if NULL. */
1838 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1839 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1840 XEXP (XVECEXP (src, 0, i), 0));
1841 }
1842
1843 /* Move a group of registers represented by a PARALLEL into pseudos. */
1844
1845 rtx
1846 emit_group_move_into_temps (rtx src)
1847 {
1848 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1849 int i;
1850
1851 for (i = 0; i < XVECLEN (src, 0); i++)
1852 {
1853 rtx e = XVECEXP (src, 0, i);
1854 rtx d = XEXP (e, 0);
1855
1856 if (d)
1857 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1858 RTVEC_ELT (vec, i) = e;
1859 }
1860
1861 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1862 }
1863
1864 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1865 where SRC is non-consecutive registers represented by a PARALLEL.
1866 SSIZE represents the total size of block ORIG_DST, or -1 if not
1867 known. */
1868
1869 void
1870 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1871 {
1872 rtx *tmps, dst;
1873 int start, finish, i;
1874 enum machine_mode m = GET_MODE (orig_dst);
1875
1876 gcc_assert (GET_CODE (src) == PARALLEL);
1877
1878 if (!SCALAR_INT_MODE_P (m)
1879 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1880 {
1881 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1882 if (imode == BLKmode)
1883 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1884 else
1885 dst = gen_reg_rtx (imode);
1886 emit_group_store (dst, src, type, ssize);
1887 if (imode != BLKmode)
1888 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1889 emit_move_insn (orig_dst, dst);
1890 return;
1891 }
1892
1893 /* Check for a NULL entry, used to indicate that the parameter goes
1894 both on the stack and in registers. */
1895 if (XEXP (XVECEXP (src, 0, 0), 0))
1896 start = 0;
1897 else
1898 start = 1;
1899 finish = XVECLEN (src, 0);
1900
1901 tmps = XALLOCAVEC (rtx, finish);
1902
1903 /* Copy the (probable) hard regs into pseudos. */
1904 for (i = start; i < finish; i++)
1905 {
1906 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1907 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1908 {
1909 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1910 emit_move_insn (tmps[i], reg);
1911 }
1912 else
1913 tmps[i] = reg;
1914 }
1915
1916 /* If we won't be storing directly into memory, protect the real destination
1917 from strange tricks we might play. */
1918 dst = orig_dst;
1919 if (GET_CODE (dst) == PARALLEL)
1920 {
1921 rtx temp;
1922
1923 /* We can get a PARALLEL dst if there is a conditional expression in
1924 a return statement. In that case, the dst and src are the same,
1925 so no action is necessary. */
1926 if (rtx_equal_p (dst, src))
1927 return;
1928
1929 /* It is unclear if we can ever reach here, but we may as well handle
1930 it. Allocate a temporary, and split this into a store/load to/from
1931 the temporary. */
1932
1933 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1934 emit_group_store (temp, src, type, ssize);
1935 emit_group_load (dst, temp, type, ssize);
1936 return;
1937 }
1938 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1939 {
1940 enum machine_mode outer = GET_MODE (dst);
1941 enum machine_mode inner;
1942 HOST_WIDE_INT bytepos;
1943 bool done = false;
1944 rtx temp;
1945
1946 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1947 dst = gen_reg_rtx (outer);
1948
1949 /* Make life a bit easier for combine. */
1950 /* If the first element of the vector is the low part
1951 of the destination mode, use a paradoxical subreg to
1952 initialize the destination. */
1953 if (start < finish)
1954 {
1955 inner = GET_MODE (tmps[start]);
1956 bytepos = subreg_lowpart_offset (inner, outer);
1957 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1958 {
1959 temp = simplify_gen_subreg (outer, tmps[start],
1960 inner, 0);
1961 if (temp)
1962 {
1963 emit_move_insn (dst, temp);
1964 done = true;
1965 start++;
1966 }
1967 }
1968 }
1969
1970 /* If the first element wasn't the low part, try the last. */
1971 if (!done
1972 && start < finish - 1)
1973 {
1974 inner = GET_MODE (tmps[finish - 1]);
1975 bytepos = subreg_lowpart_offset (inner, outer);
1976 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1977 {
1978 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1979 inner, 0);
1980 if (temp)
1981 {
1982 emit_move_insn (dst, temp);
1983 done = true;
1984 finish--;
1985 }
1986 }
1987 }
1988
1989 /* Otherwise, simply initialize the result to zero. */
1990 if (!done)
1991 emit_move_insn (dst, CONST0_RTX (outer));
1992 }
1993
1994 /* Process the pieces. */
1995 for (i = start; i < finish; i++)
1996 {
1997 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
1998 enum machine_mode mode = GET_MODE (tmps[i]);
1999 unsigned int bytelen = GET_MODE_SIZE (mode);
2000 unsigned int adj_bytelen = bytelen;
2001 rtx dest = dst;
2002
2003 /* Handle trailing fragments that run over the size of the struct. */
2004 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2005 adj_bytelen = ssize - bytepos;
2006
2007 if (GET_CODE (dst) == CONCAT)
2008 {
2009 if (bytepos + adj_bytelen
2010 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2011 dest = XEXP (dst, 0);
2012 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2013 {
2014 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2015 dest = XEXP (dst, 1);
2016 }
2017 else
2018 {
2019 enum machine_mode dest_mode = GET_MODE (dest);
2020 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2021
2022 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2023
2024 if (GET_MODE_ALIGNMENT (dest_mode)
2025 >= GET_MODE_ALIGNMENT (tmp_mode))
2026 {
2027 dest = assign_stack_temp (dest_mode,
2028 GET_MODE_SIZE (dest_mode),
2029 0);
2030 emit_move_insn (adjust_address (dest,
2031 tmp_mode,
2032 bytepos),
2033 tmps[i]);
2034 dst = dest;
2035 }
2036 else
2037 {
2038 dest = assign_stack_temp (tmp_mode,
2039 GET_MODE_SIZE (tmp_mode),
2040 0);
2041 emit_move_insn (dest, tmps[i]);
2042 dst = adjust_address (dest, dest_mode, bytepos);
2043 }
2044 break;
2045 }
2046 }
2047
2048 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2049 {
2050 /* store_bit_field always takes its value from the lsb.
2051 Move the fragment to the lsb if it's not already there. */
2052 if (
2053 #ifdef BLOCK_REG_PADDING
2054 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2055 == (BYTES_BIG_ENDIAN ? upward : downward)
2056 #else
2057 BYTES_BIG_ENDIAN
2058 #endif
2059 )
2060 {
2061 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2062 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2063 shift, tmps[i], 0);
2064 }
2065 bytelen = adj_bytelen;
2066 }
2067
2068 /* Optimize the access just a bit. */
2069 if (MEM_P (dest)
2070 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2071 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2072 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2073 && bytelen == GET_MODE_SIZE (mode))
2074 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2075 else
2076 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2077 0, 0, mode, tmps[i]);
2078 }
2079
2080 /* Copy from the pseudo into the (probable) hard reg. */
2081 if (orig_dst != dst)
2082 emit_move_insn (orig_dst, dst);
2083 }
2084
2085 /* Generate code to copy a BLKmode object of TYPE out of a
2086 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2087 is null, a stack temporary is created. TGTBLK is returned.
2088
2089 The purpose of this routine is to handle functions that return
2090 BLKmode structures in registers. Some machines (the PA for example)
2091 want to return all small structures in registers regardless of the
2092 structure's alignment. */
2093
2094 rtx
2095 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2096 {
2097 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2098 rtx src = NULL, dst = NULL;
2099 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2100 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2101 enum machine_mode copy_mode;
2102
2103 if (tgtblk == 0)
2104 {
2105 tgtblk = assign_temp (build_qualified_type (type,
2106 (TYPE_QUALS (type)
2107 | TYPE_QUAL_CONST)),
2108 0, 1, 1);
2109 preserve_temp_slots (tgtblk);
2110 }
2111
2112 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2113 into a new pseudo which is a full word. */
2114
2115 if (GET_MODE (srcreg) != BLKmode
2116 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2117 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2118
2119 /* If the structure doesn't take up a whole number of words, see whether
2120 SRCREG is padded on the left or on the right. If it's on the left,
2121 set PADDING_CORRECTION to the number of bits to skip.
2122
2123 In most ABIs, the structure will be returned at the least end of
2124 the register, which translates to right padding on little-endian
2125 targets and left padding on big-endian targets. The opposite
2126 holds if the structure is returned at the most significant
2127 end of the register. */
2128 if (bytes % UNITS_PER_WORD != 0
2129 && (targetm.calls.return_in_msb (type)
2130 ? !BYTES_BIG_ENDIAN
2131 : BYTES_BIG_ENDIAN))
2132 padding_correction
2133 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2134
2135 /* Copy the structure BITSIZE bits at a time. If the target lives in
2136 memory, take care of not reading/writing past its end by selecting
2137 a copy mode suited to BITSIZE. This should always be possible given
2138 how it is computed.
2139
2140 We could probably emit more efficient code for machines which do not use
2141 strict alignment, but it doesn't seem worth the effort at the current
2142 time. */
2143
2144 copy_mode = word_mode;
2145 if (MEM_P (tgtblk))
2146 {
2147 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2148 if (mem_mode != BLKmode)
2149 copy_mode = mem_mode;
2150 }
2151
2152 for (bitpos = 0, xbitpos = padding_correction;
2153 bitpos < bytes * BITS_PER_UNIT;
2154 bitpos += bitsize, xbitpos += bitsize)
2155 {
2156 /* We need a new source operand each time xbitpos is on a
2157 word boundary and when xbitpos == padding_correction
2158 (the first time through). */
2159 if (xbitpos % BITS_PER_WORD == 0
2160 || xbitpos == padding_correction)
2161 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2162 GET_MODE (srcreg));
2163
2164 /* We need a new destination operand each time bitpos is on
2165 a word boundary. */
2166 if (bitpos % BITS_PER_WORD == 0)
2167 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2168
2169 /* Use xbitpos for the source extraction (right justified) and
2170 bitpos for the destination store (left justified). */
2171 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2172 extract_bit_field (src, bitsize,
2173 xbitpos % BITS_PER_WORD, 1, false,
2174 NULL_RTX, copy_mode, copy_mode));
2175 }
2176
2177 return tgtblk;
2178 }
2179
2180 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2181 register if it contains any data, otherwise return null.
2182
2183 This is used on targets that return BLKmode values in registers. */
2184
2185 rtx
2186 copy_blkmode_to_reg (enum machine_mode mode, tree src)
2187 {
2188 int i, n_regs;
2189 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2190 unsigned int bitsize;
2191 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2192 enum machine_mode dst_mode;
2193
2194 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2195
2196 x = expand_normal (src);
2197
2198 bytes = int_size_in_bytes (TREE_TYPE (src));
2199 if (bytes == 0)
2200 return NULL_RTX;
2201
2202 /* If the structure doesn't take up a whole number of words, see
2203 whether the register value should be padded on the left or on
2204 the right. Set PADDING_CORRECTION to the number of padding
2205 bits needed on the left side.
2206
2207 In most ABIs, the structure will be returned at the least end of
2208 the register, which translates to right padding on little-endian
2209 targets and left padding on big-endian targets. The opposite
2210 holds if the structure is returned at the most significant
2211 end of the register. */
2212 if (bytes % UNITS_PER_WORD != 0
2213 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2214 ? !BYTES_BIG_ENDIAN
2215 : BYTES_BIG_ENDIAN))
2216 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2217 * BITS_PER_UNIT));
2218
2219 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2220 dst_words = XALLOCAVEC (rtx, n_regs);
2221 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2222
2223 /* Copy the structure BITSIZE bits at a time. */
2224 for (bitpos = 0, xbitpos = padding_correction;
2225 bitpos < bytes * BITS_PER_UNIT;
2226 bitpos += bitsize, xbitpos += bitsize)
2227 {
2228 /* We need a new destination pseudo each time xbitpos is
2229 on a word boundary and when xbitpos == padding_correction
2230 (the first time through). */
2231 if (xbitpos % BITS_PER_WORD == 0
2232 || xbitpos == padding_correction)
2233 {
2234 /* Generate an appropriate register. */
2235 dst_word = gen_reg_rtx (word_mode);
2236 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2237
2238 /* Clear the destination before we move anything into it. */
2239 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2240 }
2241
2242 /* We need a new source operand each time bitpos is on a word
2243 boundary. */
2244 if (bitpos % BITS_PER_WORD == 0)
2245 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2246
2247 /* Use bitpos for the source extraction (left justified) and
2248 xbitpos for the destination store (right justified). */
2249 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2250 0, 0, word_mode,
2251 extract_bit_field (src_word, bitsize,
2252 bitpos % BITS_PER_WORD, 1, false,
2253 NULL_RTX, word_mode, word_mode));
2254 }
2255
2256 if (mode == BLKmode)
2257 {
2258 /* Find the smallest integer mode large enough to hold the
2259 entire structure. */
2260 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2261 mode != VOIDmode;
2262 mode = GET_MODE_WIDER_MODE (mode))
2263 /* Have we found a large enough mode? */
2264 if (GET_MODE_SIZE (mode) >= bytes)
2265 break;
2266
2267 /* A suitable mode should have been found. */
2268 gcc_assert (mode != VOIDmode);
2269 }
2270
2271 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2272 dst_mode = word_mode;
2273 else
2274 dst_mode = mode;
2275 dst = gen_reg_rtx (dst_mode);
2276
2277 for (i = 0; i < n_regs; i++)
2278 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2279
2280 if (mode != dst_mode)
2281 dst = gen_lowpart (mode, dst);
2282
2283 return dst;
2284 }
2285
2286 /* Add a USE expression for REG to the (possibly empty) list pointed
2287 to by CALL_FUSAGE. REG must denote a hard register. */
2288
2289 void
2290 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2291 {
2292 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2293
2294 *call_fusage
2295 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2296 }
2297
2298 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2299 starting at REGNO. All of these registers must be hard registers. */
2300
2301 void
2302 use_regs (rtx *call_fusage, int regno, int nregs)
2303 {
2304 int i;
2305
2306 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2307
2308 for (i = 0; i < nregs; i++)
2309 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2310 }
2311
2312 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2313 PARALLEL REGS. This is for calls that pass values in multiple
2314 non-contiguous locations. The Irix 6 ABI has examples of this. */
2315
2316 void
2317 use_group_regs (rtx *call_fusage, rtx regs)
2318 {
2319 int i;
2320
2321 for (i = 0; i < XVECLEN (regs, 0); i++)
2322 {
2323 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2324
2325 /* A NULL entry means the parameter goes both on the stack and in
2326 registers. This can also be a MEM for targets that pass values
2327 partially on the stack and partially in registers. */
2328 if (reg != 0 && REG_P (reg))
2329 use_reg (call_fusage, reg);
2330 }
2331 }
2332
2333 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2334 assigment and the code of the expresion on the RHS is CODE. Return
2335 NULL otherwise. */
2336
2337 static gimple
2338 get_def_for_expr (tree name, enum tree_code code)
2339 {
2340 gimple def_stmt;
2341
2342 if (TREE_CODE (name) != SSA_NAME)
2343 return NULL;
2344
2345 def_stmt = get_gimple_for_ssa_name (name);
2346 if (!def_stmt
2347 || gimple_assign_rhs_code (def_stmt) != code)
2348 return NULL;
2349
2350 return def_stmt;
2351 }
2352 \f
2353
2354 /* Determine whether the LEN bytes generated by CONSTFUN can be
2355 stored to memory using several move instructions. CONSTFUNDATA is
2356 a pointer which will be passed as argument in every CONSTFUN call.
2357 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2358 a memset operation and false if it's a copy of a constant string.
2359 Return nonzero if a call to store_by_pieces should succeed. */
2360
2361 int
2362 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2363 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2364 void *constfundata, unsigned int align, bool memsetp)
2365 {
2366 unsigned HOST_WIDE_INT l;
2367 unsigned int max_size;
2368 HOST_WIDE_INT offset = 0;
2369 enum machine_mode mode;
2370 enum insn_code icode;
2371 int reverse;
2372 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2373 rtx cst ATTRIBUTE_UNUSED;
2374
2375 if (len == 0)
2376 return 1;
2377
2378 if (! (memsetp
2379 ? SET_BY_PIECES_P (len, align)
2380 : STORE_BY_PIECES_P (len, align)))
2381 return 0;
2382
2383 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2384
2385 /* We would first store what we can in the largest integer mode, then go to
2386 successively smaller modes. */
2387
2388 for (reverse = 0;
2389 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2390 reverse++)
2391 {
2392 l = len;
2393 max_size = STORE_MAX_PIECES + 1;
2394 while (max_size > 1)
2395 {
2396 mode = widest_int_mode_for_size (max_size);
2397
2398 if (mode == VOIDmode)
2399 break;
2400
2401 icode = optab_handler (mov_optab, mode);
2402 if (icode != CODE_FOR_nothing
2403 && align >= GET_MODE_ALIGNMENT (mode))
2404 {
2405 unsigned int size = GET_MODE_SIZE (mode);
2406
2407 while (l >= size)
2408 {
2409 if (reverse)
2410 offset -= size;
2411
2412 cst = (*constfun) (constfundata, offset, mode);
2413 if (!targetm.legitimate_constant_p (mode, cst))
2414 return 0;
2415
2416 if (!reverse)
2417 offset += size;
2418
2419 l -= size;
2420 }
2421 }
2422
2423 max_size = GET_MODE_SIZE (mode);
2424 }
2425
2426 /* The code above should have handled everything. */
2427 gcc_assert (!l);
2428 }
2429
2430 return 1;
2431 }
2432
2433 /* Generate several move instructions to store LEN bytes generated by
2434 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2435 pointer which will be passed as argument in every CONSTFUN call.
2436 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2437 a memset operation and false if it's a copy of a constant string.
2438 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2439 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2440 stpcpy. */
2441
2442 rtx
2443 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2444 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2445 void *constfundata, unsigned int align, bool memsetp, int endp)
2446 {
2447 enum machine_mode to_addr_mode
2448 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2449 struct store_by_pieces_d data;
2450
2451 if (len == 0)
2452 {
2453 gcc_assert (endp != 2);
2454 return to;
2455 }
2456
2457 gcc_assert (memsetp
2458 ? SET_BY_PIECES_P (len, align)
2459 : STORE_BY_PIECES_P (len, align));
2460 data.constfun = constfun;
2461 data.constfundata = constfundata;
2462 data.len = len;
2463 data.to = to;
2464 store_by_pieces_1 (&data, align);
2465 if (endp)
2466 {
2467 rtx to1;
2468
2469 gcc_assert (!data.reverse);
2470 if (data.autinc_to)
2471 {
2472 if (endp == 2)
2473 {
2474 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2475 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2476 else
2477 data.to_addr = copy_to_mode_reg (to_addr_mode,
2478 plus_constant (data.to_addr,
2479 -1));
2480 }
2481 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2482 data.offset);
2483 }
2484 else
2485 {
2486 if (endp == 2)
2487 --data.offset;
2488 to1 = adjust_address (data.to, QImode, data.offset);
2489 }
2490 return to1;
2491 }
2492 else
2493 return data.to;
2494 }
2495
2496 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2497 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2498
2499 static void
2500 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2501 {
2502 struct store_by_pieces_d data;
2503
2504 if (len == 0)
2505 return;
2506
2507 data.constfun = clear_by_pieces_1;
2508 data.constfundata = NULL;
2509 data.len = len;
2510 data.to = to;
2511 store_by_pieces_1 (&data, align);
2512 }
2513
2514 /* Callback routine for clear_by_pieces.
2515 Return const0_rtx unconditionally. */
2516
2517 static rtx
2518 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2519 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2520 enum machine_mode mode ATTRIBUTE_UNUSED)
2521 {
2522 return const0_rtx;
2523 }
2524
2525 /* Subroutine of clear_by_pieces and store_by_pieces.
2526 Generate several move instructions to store LEN bytes of block TO. (A MEM
2527 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2528
2529 static void
2530 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2531 unsigned int align ATTRIBUTE_UNUSED)
2532 {
2533 enum machine_mode to_addr_mode
2534 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2535 rtx to_addr = XEXP (data->to, 0);
2536 unsigned int max_size = STORE_MAX_PIECES + 1;
2537 enum insn_code icode;
2538
2539 data->offset = 0;
2540 data->to_addr = to_addr;
2541 data->autinc_to
2542 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2543 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2544
2545 data->explicit_inc_to = 0;
2546 data->reverse
2547 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2548 if (data->reverse)
2549 data->offset = data->len;
2550
2551 /* If storing requires more than two move insns,
2552 copy addresses to registers (to make displacements shorter)
2553 and use post-increment if available. */
2554 if (!data->autinc_to
2555 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2556 {
2557 /* Determine the main mode we'll be using.
2558 MODE might not be used depending on the definitions of the
2559 USE_* macros below. */
2560 enum machine_mode mode ATTRIBUTE_UNUSED
2561 = widest_int_mode_for_size (max_size);
2562
2563 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2564 {
2565 data->to_addr = copy_to_mode_reg (to_addr_mode,
2566 plus_constant (to_addr, data->len));
2567 data->autinc_to = 1;
2568 data->explicit_inc_to = -1;
2569 }
2570
2571 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2572 && ! data->autinc_to)
2573 {
2574 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2575 data->autinc_to = 1;
2576 data->explicit_inc_to = 1;
2577 }
2578
2579 if ( !data->autinc_to && CONSTANT_P (to_addr))
2580 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2581 }
2582
2583 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2584
2585 /* First store what we can in the largest integer mode, then go to
2586 successively smaller modes. */
2587
2588 while (max_size > 1)
2589 {
2590 enum machine_mode mode = widest_int_mode_for_size (max_size);
2591
2592 if (mode == VOIDmode)
2593 break;
2594
2595 icode = optab_handler (mov_optab, mode);
2596 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2597 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2598
2599 max_size = GET_MODE_SIZE (mode);
2600 }
2601
2602 /* The code above should have handled everything. */
2603 gcc_assert (!data->len);
2604 }
2605
2606 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2607 with move instructions for mode MODE. GENFUN is the gen_... function
2608 to make a move insn for that mode. DATA has all the other info. */
2609
2610 static void
2611 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2612 struct store_by_pieces_d *data)
2613 {
2614 unsigned int size = GET_MODE_SIZE (mode);
2615 rtx to1, cst;
2616
2617 while (data->len >= size)
2618 {
2619 if (data->reverse)
2620 data->offset -= size;
2621
2622 if (data->autinc_to)
2623 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2624 data->offset);
2625 else
2626 to1 = adjust_address (data->to, mode, data->offset);
2627
2628 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2629 emit_insn (gen_add2_insn (data->to_addr,
2630 GEN_INT (-(HOST_WIDE_INT) size)));
2631
2632 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2633 emit_insn ((*genfun) (to1, cst));
2634
2635 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2636 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2637
2638 if (! data->reverse)
2639 data->offset += size;
2640
2641 data->len -= size;
2642 }
2643 }
2644 \f
2645 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2646 its length in bytes. */
2647
2648 rtx
2649 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2650 unsigned int expected_align, HOST_WIDE_INT expected_size)
2651 {
2652 enum machine_mode mode = GET_MODE (object);
2653 unsigned int align;
2654
2655 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2656
2657 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2658 just move a zero. Otherwise, do this a piece at a time. */
2659 if (mode != BLKmode
2660 && CONST_INT_P (size)
2661 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2662 {
2663 rtx zero = CONST0_RTX (mode);
2664 if (zero != NULL)
2665 {
2666 emit_move_insn (object, zero);
2667 return NULL;
2668 }
2669
2670 if (COMPLEX_MODE_P (mode))
2671 {
2672 zero = CONST0_RTX (GET_MODE_INNER (mode));
2673 if (zero != NULL)
2674 {
2675 write_complex_part (object, zero, 0);
2676 write_complex_part (object, zero, 1);
2677 return NULL;
2678 }
2679 }
2680 }
2681
2682 if (size == const0_rtx)
2683 return NULL;
2684
2685 align = MEM_ALIGN (object);
2686
2687 if (CONST_INT_P (size)
2688 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2689 clear_by_pieces (object, INTVAL (size), align);
2690 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2691 expected_align, expected_size))
2692 ;
2693 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2694 return set_storage_via_libcall (object, size, const0_rtx,
2695 method == BLOCK_OP_TAILCALL);
2696 else
2697 gcc_unreachable ();
2698
2699 return NULL;
2700 }
2701
2702 rtx
2703 clear_storage (rtx object, rtx size, enum block_op_methods method)
2704 {
2705 return clear_storage_hints (object, size, method, 0, -1);
2706 }
2707
2708
2709 /* A subroutine of clear_storage. Expand a call to memset.
2710 Return the return value of memset, 0 otherwise. */
2711
2712 rtx
2713 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2714 {
2715 tree call_expr, fn, object_tree, size_tree, val_tree;
2716 enum machine_mode size_mode;
2717 rtx retval;
2718
2719 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2720 place those into new pseudos into a VAR_DECL and use them later. */
2721
2722 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2723
2724 size_mode = TYPE_MODE (sizetype);
2725 size = convert_to_mode (size_mode, size, 1);
2726 size = copy_to_mode_reg (size_mode, size);
2727
2728 /* It is incorrect to use the libcall calling conventions to call
2729 memset in this context. This could be a user call to memset and
2730 the user may wish to examine the return value from memset. For
2731 targets where libcalls and normal calls have different conventions
2732 for returning pointers, we could end up generating incorrect code. */
2733
2734 object_tree = make_tree (ptr_type_node, object);
2735 if (!CONST_INT_P (val))
2736 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2737 size_tree = make_tree (sizetype, size);
2738 val_tree = make_tree (integer_type_node, val);
2739
2740 fn = clear_storage_libcall_fn (true);
2741 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2742 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2743
2744 retval = expand_normal (call_expr);
2745
2746 return retval;
2747 }
2748
2749 /* A subroutine of set_storage_via_libcall. Create the tree node
2750 for the function we use for block clears. The first time FOR_CALL
2751 is true, we call assemble_external. */
2752
2753 tree block_clear_fn;
2754
2755 void
2756 init_block_clear_fn (const char *asmspec)
2757 {
2758 if (!block_clear_fn)
2759 {
2760 tree fn, args;
2761
2762 fn = get_identifier ("memset");
2763 args = build_function_type_list (ptr_type_node, ptr_type_node,
2764 integer_type_node, sizetype,
2765 NULL_TREE);
2766
2767 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2768 DECL_EXTERNAL (fn) = 1;
2769 TREE_PUBLIC (fn) = 1;
2770 DECL_ARTIFICIAL (fn) = 1;
2771 TREE_NOTHROW (fn) = 1;
2772 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2773 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2774
2775 block_clear_fn = fn;
2776 }
2777
2778 if (asmspec)
2779 set_user_assembler_name (block_clear_fn, asmspec);
2780 }
2781
2782 static tree
2783 clear_storage_libcall_fn (int for_call)
2784 {
2785 static bool emitted_extern;
2786
2787 if (!block_clear_fn)
2788 init_block_clear_fn (NULL);
2789
2790 if (for_call && !emitted_extern)
2791 {
2792 emitted_extern = true;
2793 make_decl_rtl (block_clear_fn);
2794 assemble_external (block_clear_fn);
2795 }
2796
2797 return block_clear_fn;
2798 }
2799 \f
2800 /* Expand a setmem pattern; return true if successful. */
2801
2802 bool
2803 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2804 unsigned int expected_align, HOST_WIDE_INT expected_size)
2805 {
2806 /* Try the most limited insn first, because there's no point
2807 including more than one in the machine description unless
2808 the more limited one has some advantage. */
2809
2810 enum machine_mode mode;
2811
2812 if (expected_align < align)
2813 expected_align = align;
2814
2815 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2816 mode = GET_MODE_WIDER_MODE (mode))
2817 {
2818 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2819
2820 if (code != CODE_FOR_nothing
2821 /* We don't need MODE to be narrower than
2822 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2823 the mode mask, as it is returned by the macro, it will
2824 definitely be less than the actual mode mask. */
2825 && ((CONST_INT_P (size)
2826 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2827 <= (GET_MODE_MASK (mode) >> 1)))
2828 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2829 {
2830 struct expand_operand ops[6];
2831 unsigned int nops;
2832
2833 nops = insn_data[(int) code].n_generator_args;
2834 gcc_assert (nops == 4 || nops == 6);
2835
2836 create_fixed_operand (&ops[0], object);
2837 /* The check above guarantees that this size conversion is valid. */
2838 create_convert_operand_to (&ops[1], size, mode, true);
2839 create_convert_operand_from (&ops[2], val, byte_mode, true);
2840 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2841 if (nops == 6)
2842 {
2843 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2844 create_integer_operand (&ops[5], expected_size);
2845 }
2846 if (maybe_expand_insn (code, nops, ops))
2847 return true;
2848 }
2849 }
2850
2851 return false;
2852 }
2853
2854 \f
2855 /* Write to one of the components of the complex value CPLX. Write VAL to
2856 the real part if IMAG_P is false, and the imaginary part if its true. */
2857
2858 static void
2859 write_complex_part (rtx cplx, rtx val, bool imag_p)
2860 {
2861 enum machine_mode cmode;
2862 enum machine_mode imode;
2863 unsigned ibitsize;
2864
2865 if (GET_CODE (cplx) == CONCAT)
2866 {
2867 emit_move_insn (XEXP (cplx, imag_p), val);
2868 return;
2869 }
2870
2871 cmode = GET_MODE (cplx);
2872 imode = GET_MODE_INNER (cmode);
2873 ibitsize = GET_MODE_BITSIZE (imode);
2874
2875 /* For MEMs simplify_gen_subreg may generate an invalid new address
2876 because, e.g., the original address is considered mode-dependent
2877 by the target, which restricts simplify_subreg from invoking
2878 adjust_address_nv. Instead of preparing fallback support for an
2879 invalid address, we call adjust_address_nv directly. */
2880 if (MEM_P (cplx))
2881 {
2882 emit_move_insn (adjust_address_nv (cplx, imode,
2883 imag_p ? GET_MODE_SIZE (imode) : 0),
2884 val);
2885 return;
2886 }
2887
2888 /* If the sub-object is at least word sized, then we know that subregging
2889 will work. This special case is important, since store_bit_field
2890 wants to operate on integer modes, and there's rarely an OImode to
2891 correspond to TCmode. */
2892 if (ibitsize >= BITS_PER_WORD
2893 /* For hard regs we have exact predicates. Assume we can split
2894 the original object if it spans an even number of hard regs.
2895 This special case is important for SCmode on 64-bit platforms
2896 where the natural size of floating-point regs is 32-bit. */
2897 || (REG_P (cplx)
2898 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2899 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2900 {
2901 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2902 imag_p ? GET_MODE_SIZE (imode) : 0);
2903 if (part)
2904 {
2905 emit_move_insn (part, val);
2906 return;
2907 }
2908 else
2909 /* simplify_gen_subreg may fail for sub-word MEMs. */
2910 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2911 }
2912
2913 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2914 }
2915
2916 /* Extract one of the components of the complex value CPLX. Extract the
2917 real part if IMAG_P is false, and the imaginary part if it's true. */
2918
2919 static rtx
2920 read_complex_part (rtx cplx, bool imag_p)
2921 {
2922 enum machine_mode cmode, imode;
2923 unsigned ibitsize;
2924
2925 if (GET_CODE (cplx) == CONCAT)
2926 return XEXP (cplx, imag_p);
2927
2928 cmode = GET_MODE (cplx);
2929 imode = GET_MODE_INNER (cmode);
2930 ibitsize = GET_MODE_BITSIZE (imode);
2931
2932 /* Special case reads from complex constants that got spilled to memory. */
2933 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2934 {
2935 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2936 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2937 {
2938 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2939 if (CONSTANT_CLASS_P (part))
2940 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2941 }
2942 }
2943
2944 /* For MEMs simplify_gen_subreg may generate an invalid new address
2945 because, e.g., the original address is considered mode-dependent
2946 by the target, which restricts simplify_subreg from invoking
2947 adjust_address_nv. Instead of preparing fallback support for an
2948 invalid address, we call adjust_address_nv directly. */
2949 if (MEM_P (cplx))
2950 return adjust_address_nv (cplx, imode,
2951 imag_p ? GET_MODE_SIZE (imode) : 0);
2952
2953 /* If the sub-object is at least word sized, then we know that subregging
2954 will work. This special case is important, since extract_bit_field
2955 wants to operate on integer modes, and there's rarely an OImode to
2956 correspond to TCmode. */
2957 if (ibitsize >= BITS_PER_WORD
2958 /* For hard regs we have exact predicates. Assume we can split
2959 the original object if it spans an even number of hard regs.
2960 This special case is important for SCmode on 64-bit platforms
2961 where the natural size of floating-point regs is 32-bit. */
2962 || (REG_P (cplx)
2963 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2964 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2965 {
2966 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2967 imag_p ? GET_MODE_SIZE (imode) : 0);
2968 if (ret)
2969 return ret;
2970 else
2971 /* simplify_gen_subreg may fail for sub-word MEMs. */
2972 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2973 }
2974
2975 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2976 true, false, NULL_RTX, imode, imode);
2977 }
2978 \f
2979 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2980 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2981 represented in NEW_MODE. If FORCE is true, this will never happen, as
2982 we'll force-create a SUBREG if needed. */
2983
2984 static rtx
2985 emit_move_change_mode (enum machine_mode new_mode,
2986 enum machine_mode old_mode, rtx x, bool force)
2987 {
2988 rtx ret;
2989
2990 if (push_operand (x, GET_MODE (x)))
2991 {
2992 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2993 MEM_COPY_ATTRIBUTES (ret, x);
2994 }
2995 else if (MEM_P (x))
2996 {
2997 /* We don't have to worry about changing the address since the
2998 size in bytes is supposed to be the same. */
2999 if (reload_in_progress)
3000 {
3001 /* Copy the MEM to change the mode and move any
3002 substitutions from the old MEM to the new one. */
3003 ret = adjust_address_nv (x, new_mode, 0);
3004 copy_replacements (x, ret);
3005 }
3006 else
3007 ret = adjust_address (x, new_mode, 0);
3008 }
3009 else
3010 {
3011 /* Note that we do want simplify_subreg's behavior of validating
3012 that the new mode is ok for a hard register. If we were to use
3013 simplify_gen_subreg, we would create the subreg, but would
3014 probably run into the target not being able to implement it. */
3015 /* Except, of course, when FORCE is true, when this is exactly what
3016 we want. Which is needed for CCmodes on some targets. */
3017 if (force)
3018 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3019 else
3020 ret = simplify_subreg (new_mode, x, old_mode, 0);
3021 }
3022
3023 return ret;
3024 }
3025
3026 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3027 an integer mode of the same size as MODE. Returns the instruction
3028 emitted, or NULL if such a move could not be generated. */
3029
3030 static rtx
3031 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3032 {
3033 enum machine_mode imode;
3034 enum insn_code code;
3035
3036 /* There must exist a mode of the exact size we require. */
3037 imode = int_mode_for_mode (mode);
3038 if (imode == BLKmode)
3039 return NULL_RTX;
3040
3041 /* The target must support moves in this mode. */
3042 code = optab_handler (mov_optab, imode);
3043 if (code == CODE_FOR_nothing)
3044 return NULL_RTX;
3045
3046 x = emit_move_change_mode (imode, mode, x, force);
3047 if (x == NULL_RTX)
3048 return NULL_RTX;
3049 y = emit_move_change_mode (imode, mode, y, force);
3050 if (y == NULL_RTX)
3051 return NULL_RTX;
3052 return emit_insn (GEN_FCN (code) (x, y));
3053 }
3054
3055 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3056 Return an equivalent MEM that does not use an auto-increment. */
3057
3058 static rtx
3059 emit_move_resolve_push (enum machine_mode mode, rtx x)
3060 {
3061 enum rtx_code code = GET_CODE (XEXP (x, 0));
3062 HOST_WIDE_INT adjust;
3063 rtx temp;
3064
3065 adjust = GET_MODE_SIZE (mode);
3066 #ifdef PUSH_ROUNDING
3067 adjust = PUSH_ROUNDING (adjust);
3068 #endif
3069 if (code == PRE_DEC || code == POST_DEC)
3070 adjust = -adjust;
3071 else if (code == PRE_MODIFY || code == POST_MODIFY)
3072 {
3073 rtx expr = XEXP (XEXP (x, 0), 1);
3074 HOST_WIDE_INT val;
3075
3076 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3077 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3078 val = INTVAL (XEXP (expr, 1));
3079 if (GET_CODE (expr) == MINUS)
3080 val = -val;
3081 gcc_assert (adjust == val || adjust == -val);
3082 adjust = val;
3083 }
3084
3085 /* Do not use anti_adjust_stack, since we don't want to update
3086 stack_pointer_delta. */
3087 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3088 GEN_INT (adjust), stack_pointer_rtx,
3089 0, OPTAB_LIB_WIDEN);
3090 if (temp != stack_pointer_rtx)
3091 emit_move_insn (stack_pointer_rtx, temp);
3092
3093 switch (code)
3094 {
3095 case PRE_INC:
3096 case PRE_DEC:
3097 case PRE_MODIFY:
3098 temp = stack_pointer_rtx;
3099 break;
3100 case POST_INC:
3101 case POST_DEC:
3102 case POST_MODIFY:
3103 temp = plus_constant (stack_pointer_rtx, -adjust);
3104 break;
3105 default:
3106 gcc_unreachable ();
3107 }
3108
3109 return replace_equiv_address (x, temp);
3110 }
3111
3112 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3113 X is known to satisfy push_operand, and MODE is known to be complex.
3114 Returns the last instruction emitted. */
3115
3116 rtx
3117 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3118 {
3119 enum machine_mode submode = GET_MODE_INNER (mode);
3120 bool imag_first;
3121
3122 #ifdef PUSH_ROUNDING
3123 unsigned int submodesize = GET_MODE_SIZE (submode);
3124
3125 /* In case we output to the stack, but the size is smaller than the
3126 machine can push exactly, we need to use move instructions. */
3127 if (PUSH_ROUNDING (submodesize) != submodesize)
3128 {
3129 x = emit_move_resolve_push (mode, x);
3130 return emit_move_insn (x, y);
3131 }
3132 #endif
3133
3134 /* Note that the real part always precedes the imag part in memory
3135 regardless of machine's endianness. */
3136 switch (GET_CODE (XEXP (x, 0)))
3137 {
3138 case PRE_DEC:
3139 case POST_DEC:
3140 imag_first = true;
3141 break;
3142 case PRE_INC:
3143 case POST_INC:
3144 imag_first = false;
3145 break;
3146 default:
3147 gcc_unreachable ();
3148 }
3149
3150 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3151 read_complex_part (y, imag_first));
3152 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3153 read_complex_part (y, !imag_first));
3154 }
3155
3156 /* A subroutine of emit_move_complex. Perform the move from Y to X
3157 via two moves of the parts. Returns the last instruction emitted. */
3158
3159 rtx
3160 emit_move_complex_parts (rtx x, rtx y)
3161 {
3162 /* Show the output dies here. This is necessary for SUBREGs
3163 of pseudos since we cannot track their lifetimes correctly;
3164 hard regs shouldn't appear here except as return values. */
3165 if (!reload_completed && !reload_in_progress
3166 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3167 emit_clobber (x);
3168
3169 write_complex_part (x, read_complex_part (y, false), false);
3170 write_complex_part (x, read_complex_part (y, true), true);
3171
3172 return get_last_insn ();
3173 }
3174
3175 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3176 MODE is known to be complex. Returns the last instruction emitted. */
3177
3178 static rtx
3179 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3180 {
3181 bool try_int;
3182
3183 /* Need to take special care for pushes, to maintain proper ordering
3184 of the data, and possibly extra padding. */
3185 if (push_operand (x, mode))
3186 return emit_move_complex_push (mode, x, y);
3187
3188 /* See if we can coerce the target into moving both values at once. */
3189
3190 /* Move floating point as parts. */
3191 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3192 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3193 try_int = false;
3194 /* Not possible if the values are inherently not adjacent. */
3195 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3196 try_int = false;
3197 /* Is possible if both are registers (or subregs of registers). */
3198 else if (register_operand (x, mode) && register_operand (y, mode))
3199 try_int = true;
3200 /* If one of the operands is a memory, and alignment constraints
3201 are friendly enough, we may be able to do combined memory operations.
3202 We do not attempt this if Y is a constant because that combination is
3203 usually better with the by-parts thing below. */
3204 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3205 && (!STRICT_ALIGNMENT
3206 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3207 try_int = true;
3208 else
3209 try_int = false;
3210
3211 if (try_int)
3212 {
3213 rtx ret;
3214
3215 /* For memory to memory moves, optimal behavior can be had with the
3216 existing block move logic. */
3217 if (MEM_P (x) && MEM_P (y))
3218 {
3219 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3220 BLOCK_OP_NO_LIBCALL);
3221 return get_last_insn ();
3222 }
3223
3224 ret = emit_move_via_integer (mode, x, y, true);
3225 if (ret)
3226 return ret;
3227 }
3228
3229 return emit_move_complex_parts (x, y);
3230 }
3231
3232 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3233 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3234
3235 static rtx
3236 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3237 {
3238 rtx ret;
3239
3240 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3241 if (mode != CCmode)
3242 {
3243 enum insn_code code = optab_handler (mov_optab, CCmode);
3244 if (code != CODE_FOR_nothing)
3245 {
3246 x = emit_move_change_mode (CCmode, mode, x, true);
3247 y = emit_move_change_mode (CCmode, mode, y, true);
3248 return emit_insn (GEN_FCN (code) (x, y));
3249 }
3250 }
3251
3252 /* Otherwise, find the MODE_INT mode of the same width. */
3253 ret = emit_move_via_integer (mode, x, y, false);
3254 gcc_assert (ret != NULL);
3255 return ret;
3256 }
3257
3258 /* Return true if word I of OP lies entirely in the
3259 undefined bits of a paradoxical subreg. */
3260
3261 static bool
3262 undefined_operand_subword_p (const_rtx op, int i)
3263 {
3264 enum machine_mode innermode, innermostmode;
3265 int offset;
3266 if (GET_CODE (op) != SUBREG)
3267 return false;
3268 innermode = GET_MODE (op);
3269 innermostmode = GET_MODE (SUBREG_REG (op));
3270 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3271 /* The SUBREG_BYTE represents offset, as if the value were stored in
3272 memory, except for a paradoxical subreg where we define
3273 SUBREG_BYTE to be 0; undo this exception as in
3274 simplify_subreg. */
3275 if (SUBREG_BYTE (op) == 0
3276 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3277 {
3278 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3279 if (WORDS_BIG_ENDIAN)
3280 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3281 if (BYTES_BIG_ENDIAN)
3282 offset += difference % UNITS_PER_WORD;
3283 }
3284 if (offset >= GET_MODE_SIZE (innermostmode)
3285 || offset <= -GET_MODE_SIZE (word_mode))
3286 return true;
3287 return false;
3288 }
3289
3290 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3291 MODE is any multi-word or full-word mode that lacks a move_insn
3292 pattern. Note that you will get better code if you define such
3293 patterns, even if they must turn into multiple assembler instructions. */
3294
3295 static rtx
3296 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3297 {
3298 rtx last_insn = 0;
3299 rtx seq, inner;
3300 bool need_clobber;
3301 int i;
3302
3303 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3304
3305 /* If X is a push on the stack, do the push now and replace
3306 X with a reference to the stack pointer. */
3307 if (push_operand (x, mode))
3308 x = emit_move_resolve_push (mode, x);
3309
3310 /* If we are in reload, see if either operand is a MEM whose address
3311 is scheduled for replacement. */
3312 if (reload_in_progress && MEM_P (x)
3313 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3314 x = replace_equiv_address_nv (x, inner);
3315 if (reload_in_progress && MEM_P (y)
3316 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3317 y = replace_equiv_address_nv (y, inner);
3318
3319 start_sequence ();
3320
3321 need_clobber = false;
3322 for (i = 0;
3323 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3324 i++)
3325 {
3326 rtx xpart = operand_subword (x, i, 1, mode);
3327 rtx ypart;
3328
3329 /* Do not generate code for a move if it would come entirely
3330 from the undefined bits of a paradoxical subreg. */
3331 if (undefined_operand_subword_p (y, i))
3332 continue;
3333
3334 ypart = operand_subword (y, i, 1, mode);
3335
3336 /* If we can't get a part of Y, put Y into memory if it is a
3337 constant. Otherwise, force it into a register. Then we must
3338 be able to get a part of Y. */
3339 if (ypart == 0 && CONSTANT_P (y))
3340 {
3341 y = use_anchored_address (force_const_mem (mode, y));
3342 ypart = operand_subword (y, i, 1, mode);
3343 }
3344 else if (ypart == 0)
3345 ypart = operand_subword_force (y, i, mode);
3346
3347 gcc_assert (xpart && ypart);
3348
3349 need_clobber |= (GET_CODE (xpart) == SUBREG);
3350
3351 last_insn = emit_move_insn (xpart, ypart);
3352 }
3353
3354 seq = get_insns ();
3355 end_sequence ();
3356
3357 /* Show the output dies here. This is necessary for SUBREGs
3358 of pseudos since we cannot track their lifetimes correctly;
3359 hard regs shouldn't appear here except as return values.
3360 We never want to emit such a clobber after reload. */
3361 if (x != y
3362 && ! (reload_in_progress || reload_completed)
3363 && need_clobber != 0)
3364 emit_clobber (x);
3365
3366 emit_insn (seq);
3367
3368 return last_insn;
3369 }
3370
3371 /* Low level part of emit_move_insn.
3372 Called just like emit_move_insn, but assumes X and Y
3373 are basically valid. */
3374
3375 rtx
3376 emit_move_insn_1 (rtx x, rtx y)
3377 {
3378 enum machine_mode mode = GET_MODE (x);
3379 enum insn_code code;
3380
3381 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3382
3383 code = optab_handler (mov_optab, mode);
3384 if (code != CODE_FOR_nothing)
3385 return emit_insn (GEN_FCN (code) (x, y));
3386
3387 /* Expand complex moves by moving real part and imag part. */
3388 if (COMPLEX_MODE_P (mode))
3389 return emit_move_complex (mode, x, y);
3390
3391 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3392 || ALL_FIXED_POINT_MODE_P (mode))
3393 {
3394 rtx result = emit_move_via_integer (mode, x, y, true);
3395
3396 /* If we can't find an integer mode, use multi words. */
3397 if (result)
3398 return result;
3399 else
3400 return emit_move_multi_word (mode, x, y);
3401 }
3402
3403 if (GET_MODE_CLASS (mode) == MODE_CC)
3404 return emit_move_ccmode (mode, x, y);
3405
3406 /* Try using a move pattern for the corresponding integer mode. This is
3407 only safe when simplify_subreg can convert MODE constants into integer
3408 constants. At present, it can only do this reliably if the value
3409 fits within a HOST_WIDE_INT. */
3410 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3411 {
3412 rtx ret = emit_move_via_integer (mode, x, y, false);
3413 if (ret)
3414 return ret;
3415 }
3416
3417 return emit_move_multi_word (mode, x, y);
3418 }
3419
3420 /* Generate code to copy Y into X.
3421 Both Y and X must have the same mode, except that
3422 Y can be a constant with VOIDmode.
3423 This mode cannot be BLKmode; use emit_block_move for that.
3424
3425 Return the last instruction emitted. */
3426
3427 rtx
3428 emit_move_insn (rtx x, rtx y)
3429 {
3430 enum machine_mode mode = GET_MODE (x);
3431 rtx y_cst = NULL_RTX;
3432 rtx last_insn, set;
3433
3434 gcc_assert (mode != BLKmode
3435 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3436
3437 if (CONSTANT_P (y))
3438 {
3439 if (optimize
3440 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3441 && (last_insn = compress_float_constant (x, y)))
3442 return last_insn;
3443
3444 y_cst = y;
3445
3446 if (!targetm.legitimate_constant_p (mode, y))
3447 {
3448 y = force_const_mem (mode, y);
3449
3450 /* If the target's cannot_force_const_mem prevented the spill,
3451 assume that the target's move expanders will also take care
3452 of the non-legitimate constant. */
3453 if (!y)
3454 y = y_cst;
3455 else
3456 y = use_anchored_address (y);
3457 }
3458 }
3459
3460 /* If X or Y are memory references, verify that their addresses are valid
3461 for the machine. */
3462 if (MEM_P (x)
3463 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3464 MEM_ADDR_SPACE (x))
3465 && ! push_operand (x, GET_MODE (x))))
3466 x = validize_mem (x);
3467
3468 if (MEM_P (y)
3469 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3470 MEM_ADDR_SPACE (y)))
3471 y = validize_mem (y);
3472
3473 gcc_assert (mode != BLKmode);
3474
3475 last_insn = emit_move_insn_1 (x, y);
3476
3477 if (y_cst && REG_P (x)
3478 && (set = single_set (last_insn)) != NULL_RTX
3479 && SET_DEST (set) == x
3480 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3481 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3482
3483 return last_insn;
3484 }
3485
3486 /* If Y is representable exactly in a narrower mode, and the target can
3487 perform the extension directly from constant or memory, then emit the
3488 move as an extension. */
3489
3490 static rtx
3491 compress_float_constant (rtx x, rtx y)
3492 {
3493 enum machine_mode dstmode = GET_MODE (x);
3494 enum machine_mode orig_srcmode = GET_MODE (y);
3495 enum machine_mode srcmode;
3496 REAL_VALUE_TYPE r;
3497 int oldcost, newcost;
3498 bool speed = optimize_insn_for_speed_p ();
3499
3500 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3501
3502 if (targetm.legitimate_constant_p (dstmode, y))
3503 oldcost = set_src_cost (y, speed);
3504 else
3505 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3506
3507 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3508 srcmode != orig_srcmode;
3509 srcmode = GET_MODE_WIDER_MODE (srcmode))
3510 {
3511 enum insn_code ic;
3512 rtx trunc_y, last_insn;
3513
3514 /* Skip if the target can't extend this way. */
3515 ic = can_extend_p (dstmode, srcmode, 0);
3516 if (ic == CODE_FOR_nothing)
3517 continue;
3518
3519 /* Skip if the narrowed value isn't exact. */
3520 if (! exact_real_truncate (srcmode, &r))
3521 continue;
3522
3523 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3524
3525 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3526 {
3527 /* Skip if the target needs extra instructions to perform
3528 the extension. */
3529 if (!insn_operand_matches (ic, 1, trunc_y))
3530 continue;
3531 /* This is valid, but may not be cheaper than the original. */
3532 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3533 speed);
3534 if (oldcost < newcost)
3535 continue;
3536 }
3537 else if (float_extend_from_mem[dstmode][srcmode])
3538 {
3539 trunc_y = force_const_mem (srcmode, trunc_y);
3540 /* This is valid, but may not be cheaper than the original. */
3541 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3542 speed);
3543 if (oldcost < newcost)
3544 continue;
3545 trunc_y = validize_mem (trunc_y);
3546 }
3547 else
3548 continue;
3549
3550 /* For CSE's benefit, force the compressed constant pool entry
3551 into a new pseudo. This constant may be used in different modes,
3552 and if not, combine will put things back together for us. */
3553 trunc_y = force_reg (srcmode, trunc_y);
3554 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3555 last_insn = get_last_insn ();
3556
3557 if (REG_P (x))
3558 set_unique_reg_note (last_insn, REG_EQUAL, y);
3559
3560 return last_insn;
3561 }
3562
3563 return NULL_RTX;
3564 }
3565 \f
3566 /* Pushing data onto the stack. */
3567
3568 /* Push a block of length SIZE (perhaps variable)
3569 and return an rtx to address the beginning of the block.
3570 The value may be virtual_outgoing_args_rtx.
3571
3572 EXTRA is the number of bytes of padding to push in addition to SIZE.
3573 BELOW nonzero means this padding comes at low addresses;
3574 otherwise, the padding comes at high addresses. */
3575
3576 rtx
3577 push_block (rtx size, int extra, int below)
3578 {
3579 rtx temp;
3580
3581 size = convert_modes (Pmode, ptr_mode, size, 1);
3582 if (CONSTANT_P (size))
3583 anti_adjust_stack (plus_constant (size, extra));
3584 else if (REG_P (size) && extra == 0)
3585 anti_adjust_stack (size);
3586 else
3587 {
3588 temp = copy_to_mode_reg (Pmode, size);
3589 if (extra != 0)
3590 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3591 temp, 0, OPTAB_LIB_WIDEN);
3592 anti_adjust_stack (temp);
3593 }
3594
3595 #ifndef STACK_GROWS_DOWNWARD
3596 if (0)
3597 #else
3598 if (1)
3599 #endif
3600 {
3601 temp = virtual_outgoing_args_rtx;
3602 if (extra != 0 && below)
3603 temp = plus_constant (temp, extra);
3604 }
3605 else
3606 {
3607 if (CONST_INT_P (size))
3608 temp = plus_constant (virtual_outgoing_args_rtx,
3609 -INTVAL (size) - (below ? 0 : extra));
3610 else if (extra != 0 && !below)
3611 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3612 negate_rtx (Pmode, plus_constant (size, extra)));
3613 else
3614 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3615 negate_rtx (Pmode, size));
3616 }
3617
3618 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3619 }
3620
3621 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3622
3623 static rtx
3624 mem_autoinc_base (rtx mem)
3625 {
3626 if (MEM_P (mem))
3627 {
3628 rtx addr = XEXP (mem, 0);
3629 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3630 return XEXP (addr, 0);
3631 }
3632 return NULL;
3633 }
3634
3635 /* A utility routine used here, in reload, and in try_split. The insns
3636 after PREV up to and including LAST are known to adjust the stack,
3637 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3638 placing notes as appropriate. PREV may be NULL, indicating the
3639 entire insn sequence prior to LAST should be scanned.
3640
3641 The set of allowed stack pointer modifications is small:
3642 (1) One or more auto-inc style memory references (aka pushes),
3643 (2) One or more addition/subtraction with the SP as destination,
3644 (3) A single move insn with the SP as destination,
3645 (4) A call_pop insn,
3646 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3647
3648 Insns in the sequence that do not modify the SP are ignored,
3649 except for noreturn calls.
3650
3651 The return value is the amount of adjustment that can be trivially
3652 verified, via immediate operand or auto-inc. If the adjustment
3653 cannot be trivially extracted, the return value is INT_MIN. */
3654
3655 HOST_WIDE_INT
3656 find_args_size_adjust (rtx insn)
3657 {
3658 rtx dest, set, pat;
3659 int i;
3660
3661 pat = PATTERN (insn);
3662 set = NULL;
3663
3664 /* Look for a call_pop pattern. */
3665 if (CALL_P (insn))
3666 {
3667 /* We have to allow non-call_pop patterns for the case
3668 of emit_single_push_insn of a TLS address. */
3669 if (GET_CODE (pat) != PARALLEL)
3670 return 0;
3671
3672 /* All call_pop have a stack pointer adjust in the parallel.
3673 The call itself is always first, and the stack adjust is
3674 usually last, so search from the end. */
3675 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3676 {
3677 set = XVECEXP (pat, 0, i);
3678 if (GET_CODE (set) != SET)
3679 continue;
3680 dest = SET_DEST (set);
3681 if (dest == stack_pointer_rtx)
3682 break;
3683 }
3684 /* We'd better have found the stack pointer adjust. */
3685 if (i == 0)
3686 return 0;
3687 /* Fall through to process the extracted SET and DEST
3688 as if it was a standalone insn. */
3689 }
3690 else if (GET_CODE (pat) == SET)
3691 set = pat;
3692 else if ((set = single_set (insn)) != NULL)
3693 ;
3694 else if (GET_CODE (pat) == PARALLEL)
3695 {
3696 /* ??? Some older ports use a parallel with a stack adjust
3697 and a store for a PUSH_ROUNDING pattern, rather than a
3698 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3699 /* ??? See h8300 and m68k, pushqi1. */
3700 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3701 {
3702 set = XVECEXP (pat, 0, i);
3703 if (GET_CODE (set) != SET)
3704 continue;
3705 dest = SET_DEST (set);
3706 if (dest == stack_pointer_rtx)
3707 break;
3708
3709 /* We do not expect an auto-inc of the sp in the parallel. */
3710 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3711 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3712 != stack_pointer_rtx);
3713 }
3714 if (i < 0)
3715 return 0;
3716 }
3717 else
3718 return 0;
3719
3720 dest = SET_DEST (set);
3721
3722 /* Look for direct modifications of the stack pointer. */
3723 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3724 {
3725 /* Look for a trivial adjustment, otherwise assume nothing. */
3726 /* Note that the SPU restore_stack_block pattern refers to
3727 the stack pointer in V4SImode. Consider that non-trivial. */
3728 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3729 && GET_CODE (SET_SRC (set)) == PLUS
3730 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3731 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3732 return INTVAL (XEXP (SET_SRC (set), 1));
3733 /* ??? Reload can generate no-op moves, which will be cleaned
3734 up later. Recognize it and continue searching. */
3735 else if (rtx_equal_p (dest, SET_SRC (set)))
3736 return 0;
3737 else
3738 return HOST_WIDE_INT_MIN;
3739 }
3740 else
3741 {
3742 rtx mem, addr;
3743
3744 /* Otherwise only think about autoinc patterns. */
3745 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3746 {
3747 mem = dest;
3748 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3749 != stack_pointer_rtx);
3750 }
3751 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3752 mem = SET_SRC (set);
3753 else
3754 return 0;
3755
3756 addr = XEXP (mem, 0);
3757 switch (GET_CODE (addr))
3758 {
3759 case PRE_INC:
3760 case POST_INC:
3761 return GET_MODE_SIZE (GET_MODE (mem));
3762 case PRE_DEC:
3763 case POST_DEC:
3764 return -GET_MODE_SIZE (GET_MODE (mem));
3765 case PRE_MODIFY:
3766 case POST_MODIFY:
3767 addr = XEXP (addr, 1);
3768 gcc_assert (GET_CODE (addr) == PLUS);
3769 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3770 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3771 return INTVAL (XEXP (addr, 1));
3772 default:
3773 gcc_unreachable ();
3774 }
3775 }
3776 }
3777
3778 int
3779 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3780 {
3781 int args_size = end_args_size;
3782 bool saw_unknown = false;
3783 rtx insn;
3784
3785 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3786 {
3787 HOST_WIDE_INT this_delta;
3788
3789 if (!NONDEBUG_INSN_P (insn))
3790 continue;
3791
3792 this_delta = find_args_size_adjust (insn);
3793 if (this_delta == 0)
3794 {
3795 if (!CALL_P (insn)
3796 || ACCUMULATE_OUTGOING_ARGS
3797 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3798 continue;
3799 }
3800
3801 gcc_assert (!saw_unknown);
3802 if (this_delta == HOST_WIDE_INT_MIN)
3803 saw_unknown = true;
3804
3805 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3806 #ifdef STACK_GROWS_DOWNWARD
3807 this_delta = -this_delta;
3808 #endif
3809 args_size -= this_delta;
3810 }
3811
3812 return saw_unknown ? INT_MIN : args_size;
3813 }
3814
3815 #ifdef PUSH_ROUNDING
3816 /* Emit single push insn. */
3817
3818 static void
3819 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3820 {
3821 rtx dest_addr;
3822 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3823 rtx dest;
3824 enum insn_code icode;
3825
3826 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3827 /* If there is push pattern, use it. Otherwise try old way of throwing
3828 MEM representing push operation to move expander. */
3829 icode = optab_handler (push_optab, mode);
3830 if (icode != CODE_FOR_nothing)
3831 {
3832 struct expand_operand ops[1];
3833
3834 create_input_operand (&ops[0], x, mode);
3835 if (maybe_expand_insn (icode, 1, ops))
3836 return;
3837 }
3838 if (GET_MODE_SIZE (mode) == rounded_size)
3839 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3840 /* If we are to pad downward, adjust the stack pointer first and
3841 then store X into the stack location using an offset. This is
3842 because emit_move_insn does not know how to pad; it does not have
3843 access to type. */
3844 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3845 {
3846 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3847 HOST_WIDE_INT offset;
3848
3849 emit_move_insn (stack_pointer_rtx,
3850 expand_binop (Pmode,
3851 #ifdef STACK_GROWS_DOWNWARD
3852 sub_optab,
3853 #else
3854 add_optab,
3855 #endif
3856 stack_pointer_rtx,
3857 GEN_INT (rounded_size),
3858 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3859
3860 offset = (HOST_WIDE_INT) padding_size;
3861 #ifdef STACK_GROWS_DOWNWARD
3862 if (STACK_PUSH_CODE == POST_DEC)
3863 /* We have already decremented the stack pointer, so get the
3864 previous value. */
3865 offset += (HOST_WIDE_INT) rounded_size;
3866 #else
3867 if (STACK_PUSH_CODE == POST_INC)
3868 /* We have already incremented the stack pointer, so get the
3869 previous value. */
3870 offset -= (HOST_WIDE_INT) rounded_size;
3871 #endif
3872 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3873 }
3874 else
3875 {
3876 #ifdef STACK_GROWS_DOWNWARD
3877 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3878 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3879 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3880 #else
3881 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3882 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3883 GEN_INT (rounded_size));
3884 #endif
3885 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3886 }
3887
3888 dest = gen_rtx_MEM (mode, dest_addr);
3889
3890 if (type != 0)
3891 {
3892 set_mem_attributes (dest, type, 1);
3893
3894 if (flag_optimize_sibling_calls)
3895 /* Function incoming arguments may overlap with sibling call
3896 outgoing arguments and we cannot allow reordering of reads
3897 from function arguments with stores to outgoing arguments
3898 of sibling calls. */
3899 set_mem_alias_set (dest, 0);
3900 }
3901 emit_move_insn (dest, x);
3902 }
3903
3904 /* Emit and annotate a single push insn. */
3905
3906 static void
3907 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3908 {
3909 int delta, old_delta = stack_pointer_delta;
3910 rtx prev = get_last_insn ();
3911 rtx last;
3912
3913 emit_single_push_insn_1 (mode, x, type);
3914
3915 last = get_last_insn ();
3916
3917 /* Notice the common case where we emitted exactly one insn. */
3918 if (PREV_INSN (last) == prev)
3919 {
3920 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3921 return;
3922 }
3923
3924 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3925 gcc_assert (delta == INT_MIN || delta == old_delta);
3926 }
3927 #endif
3928
3929 /* Generate code to push X onto the stack, assuming it has mode MODE and
3930 type TYPE.
3931 MODE is redundant except when X is a CONST_INT (since they don't
3932 carry mode info).
3933 SIZE is an rtx for the size of data to be copied (in bytes),
3934 needed only if X is BLKmode.
3935
3936 ALIGN (in bits) is maximum alignment we can assume.
3937
3938 If PARTIAL and REG are both nonzero, then copy that many of the first
3939 bytes of X into registers starting with REG, and push the rest of X.
3940 The amount of space pushed is decreased by PARTIAL bytes.
3941 REG must be a hard register in this case.
3942 If REG is zero but PARTIAL is not, take any all others actions for an
3943 argument partially in registers, but do not actually load any
3944 registers.
3945
3946 EXTRA is the amount in bytes of extra space to leave next to this arg.
3947 This is ignored if an argument block has already been allocated.
3948
3949 On a machine that lacks real push insns, ARGS_ADDR is the address of
3950 the bottom of the argument block for this call. We use indexing off there
3951 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3952 argument block has not been preallocated.
3953
3954 ARGS_SO_FAR is the size of args previously pushed for this call.
3955
3956 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3957 for arguments passed in registers. If nonzero, it will be the number
3958 of bytes required. */
3959
3960 void
3961 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3962 unsigned int align, int partial, rtx reg, int extra,
3963 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3964 rtx alignment_pad)
3965 {
3966 rtx xinner;
3967 enum direction stack_direction
3968 #ifdef STACK_GROWS_DOWNWARD
3969 = downward;
3970 #else
3971 = upward;
3972 #endif
3973
3974 /* Decide where to pad the argument: `downward' for below,
3975 `upward' for above, or `none' for don't pad it.
3976 Default is below for small data on big-endian machines; else above. */
3977 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3978
3979 /* Invert direction if stack is post-decrement.
3980 FIXME: why? */
3981 if (STACK_PUSH_CODE == POST_DEC)
3982 if (where_pad != none)
3983 where_pad = (where_pad == downward ? upward : downward);
3984
3985 xinner = x;
3986
3987 if (mode == BLKmode
3988 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3989 {
3990 /* Copy a block into the stack, entirely or partially. */
3991
3992 rtx temp;
3993 int used;
3994 int offset;
3995 int skip;
3996
3997 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3998 used = partial - offset;
3999
4000 if (mode != BLKmode)
4001 {
4002 /* A value is to be stored in an insufficiently aligned
4003 stack slot; copy via a suitably aligned slot if
4004 necessary. */
4005 size = GEN_INT (GET_MODE_SIZE (mode));
4006 if (!MEM_P (xinner))
4007 {
4008 temp = assign_temp (type, 0, 1, 1);
4009 emit_move_insn (temp, xinner);
4010 xinner = temp;
4011 }
4012 }
4013
4014 gcc_assert (size);
4015
4016 /* USED is now the # of bytes we need not copy to the stack
4017 because registers will take care of them. */
4018
4019 if (partial != 0)
4020 xinner = adjust_address (xinner, BLKmode, used);
4021
4022 /* If the partial register-part of the arg counts in its stack size,
4023 skip the part of stack space corresponding to the registers.
4024 Otherwise, start copying to the beginning of the stack space,
4025 by setting SKIP to 0. */
4026 skip = (reg_parm_stack_space == 0) ? 0 : used;
4027
4028 #ifdef PUSH_ROUNDING
4029 /* Do it with several push insns if that doesn't take lots of insns
4030 and if there is no difficulty with push insns that skip bytes
4031 on the stack for alignment purposes. */
4032 if (args_addr == 0
4033 && PUSH_ARGS
4034 && CONST_INT_P (size)
4035 && skip == 0
4036 && MEM_ALIGN (xinner) >= align
4037 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
4038 /* Here we avoid the case of a structure whose weak alignment
4039 forces many pushes of a small amount of data,
4040 and such small pushes do rounding that causes trouble. */
4041 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4042 || align >= BIGGEST_ALIGNMENT
4043 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4044 == (align / BITS_PER_UNIT)))
4045 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4046 {
4047 /* Push padding now if padding above and stack grows down,
4048 or if padding below and stack grows up.
4049 But if space already allocated, this has already been done. */
4050 if (extra && args_addr == 0
4051 && where_pad != none && where_pad != stack_direction)
4052 anti_adjust_stack (GEN_INT (extra));
4053
4054 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4055 }
4056 else
4057 #endif /* PUSH_ROUNDING */
4058 {
4059 rtx target;
4060
4061 /* Otherwise make space on the stack and copy the data
4062 to the address of that space. */
4063
4064 /* Deduct words put into registers from the size we must copy. */
4065 if (partial != 0)
4066 {
4067 if (CONST_INT_P (size))
4068 size = GEN_INT (INTVAL (size) - used);
4069 else
4070 size = expand_binop (GET_MODE (size), sub_optab, size,
4071 GEN_INT (used), NULL_RTX, 0,
4072 OPTAB_LIB_WIDEN);
4073 }
4074
4075 /* Get the address of the stack space.
4076 In this case, we do not deal with EXTRA separately.
4077 A single stack adjust will do. */
4078 if (! args_addr)
4079 {
4080 temp = push_block (size, extra, where_pad == downward);
4081 extra = 0;
4082 }
4083 else if (CONST_INT_P (args_so_far))
4084 temp = memory_address (BLKmode,
4085 plus_constant (args_addr,
4086 skip + INTVAL (args_so_far)));
4087 else
4088 temp = memory_address (BLKmode,
4089 plus_constant (gen_rtx_PLUS (Pmode,
4090 args_addr,
4091 args_so_far),
4092 skip));
4093
4094 if (!ACCUMULATE_OUTGOING_ARGS)
4095 {
4096 /* If the source is referenced relative to the stack pointer,
4097 copy it to another register to stabilize it. We do not need
4098 to do this if we know that we won't be changing sp. */
4099
4100 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4101 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4102 temp = copy_to_reg (temp);
4103 }
4104
4105 target = gen_rtx_MEM (BLKmode, temp);
4106
4107 /* We do *not* set_mem_attributes here, because incoming arguments
4108 may overlap with sibling call outgoing arguments and we cannot
4109 allow reordering of reads from function arguments with stores
4110 to outgoing arguments of sibling calls. We do, however, want
4111 to record the alignment of the stack slot. */
4112 /* ALIGN may well be better aligned than TYPE, e.g. due to
4113 PARM_BOUNDARY. Assume the caller isn't lying. */
4114 set_mem_align (target, align);
4115
4116 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4117 }
4118 }
4119 else if (partial > 0)
4120 {
4121 /* Scalar partly in registers. */
4122
4123 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4124 int i;
4125 int not_stack;
4126 /* # bytes of start of argument
4127 that we must make space for but need not store. */
4128 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4129 int args_offset = INTVAL (args_so_far);
4130 int skip;
4131
4132 /* Push padding now if padding above and stack grows down,
4133 or if padding below and stack grows up.
4134 But if space already allocated, this has already been done. */
4135 if (extra && args_addr == 0
4136 && where_pad != none && where_pad != stack_direction)
4137 anti_adjust_stack (GEN_INT (extra));
4138
4139 /* If we make space by pushing it, we might as well push
4140 the real data. Otherwise, we can leave OFFSET nonzero
4141 and leave the space uninitialized. */
4142 if (args_addr == 0)
4143 offset = 0;
4144
4145 /* Now NOT_STACK gets the number of words that we don't need to
4146 allocate on the stack. Convert OFFSET to words too. */
4147 not_stack = (partial - offset) / UNITS_PER_WORD;
4148 offset /= UNITS_PER_WORD;
4149
4150 /* If the partial register-part of the arg counts in its stack size,
4151 skip the part of stack space corresponding to the registers.
4152 Otherwise, start copying to the beginning of the stack space,
4153 by setting SKIP to 0. */
4154 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4155
4156 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4157 x = validize_mem (force_const_mem (mode, x));
4158
4159 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4160 SUBREGs of such registers are not allowed. */
4161 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4162 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4163 x = copy_to_reg (x);
4164
4165 /* Loop over all the words allocated on the stack for this arg. */
4166 /* We can do it by words, because any scalar bigger than a word
4167 has a size a multiple of a word. */
4168 #ifndef PUSH_ARGS_REVERSED
4169 for (i = not_stack; i < size; i++)
4170 #else
4171 for (i = size - 1; i >= not_stack; i--)
4172 #endif
4173 if (i >= not_stack + offset)
4174 emit_push_insn (operand_subword_force (x, i, mode),
4175 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4176 0, args_addr,
4177 GEN_INT (args_offset + ((i - not_stack + skip)
4178 * UNITS_PER_WORD)),
4179 reg_parm_stack_space, alignment_pad);
4180 }
4181 else
4182 {
4183 rtx addr;
4184 rtx dest;
4185
4186 /* Push padding now if padding above and stack grows down,
4187 or if padding below and stack grows up.
4188 But if space already allocated, this has already been done. */
4189 if (extra && args_addr == 0
4190 && where_pad != none && where_pad != stack_direction)
4191 anti_adjust_stack (GEN_INT (extra));
4192
4193 #ifdef PUSH_ROUNDING
4194 if (args_addr == 0 && PUSH_ARGS)
4195 emit_single_push_insn (mode, x, type);
4196 else
4197 #endif
4198 {
4199 if (CONST_INT_P (args_so_far))
4200 addr
4201 = memory_address (mode,
4202 plus_constant (args_addr,
4203 INTVAL (args_so_far)));
4204 else
4205 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4206 args_so_far));
4207 dest = gen_rtx_MEM (mode, addr);
4208
4209 /* We do *not* set_mem_attributes here, because incoming arguments
4210 may overlap with sibling call outgoing arguments and we cannot
4211 allow reordering of reads from function arguments with stores
4212 to outgoing arguments of sibling calls. We do, however, want
4213 to record the alignment of the stack slot. */
4214 /* ALIGN may well be better aligned than TYPE, e.g. due to
4215 PARM_BOUNDARY. Assume the caller isn't lying. */
4216 set_mem_align (dest, align);
4217
4218 emit_move_insn (dest, x);
4219 }
4220 }
4221
4222 /* If part should go in registers, copy that part
4223 into the appropriate registers. Do this now, at the end,
4224 since mem-to-mem copies above may do function calls. */
4225 if (partial > 0 && reg != 0)
4226 {
4227 /* Handle calls that pass values in multiple non-contiguous locations.
4228 The Irix 6 ABI has examples of this. */
4229 if (GET_CODE (reg) == PARALLEL)
4230 emit_group_load (reg, x, type, -1);
4231 else
4232 {
4233 gcc_assert (partial % UNITS_PER_WORD == 0);
4234 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4235 }
4236 }
4237
4238 if (extra && args_addr == 0 && where_pad == stack_direction)
4239 anti_adjust_stack (GEN_INT (extra));
4240
4241 if (alignment_pad && args_addr == 0)
4242 anti_adjust_stack (alignment_pad);
4243 }
4244 \f
4245 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4246 operations. */
4247
4248 static rtx
4249 get_subtarget (rtx x)
4250 {
4251 return (optimize
4252 || x == 0
4253 /* Only registers can be subtargets. */
4254 || !REG_P (x)
4255 /* Don't use hard regs to avoid extending their life. */
4256 || REGNO (x) < FIRST_PSEUDO_REGISTER
4257 ? 0 : x);
4258 }
4259
4260 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4261 FIELD is a bitfield. Returns true if the optimization was successful,
4262 and there's nothing else to do. */
4263
4264 static bool
4265 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4266 unsigned HOST_WIDE_INT bitpos,
4267 unsigned HOST_WIDE_INT bitregion_start,
4268 unsigned HOST_WIDE_INT bitregion_end,
4269 enum machine_mode mode1, rtx str_rtx,
4270 tree to, tree src)
4271 {
4272 enum machine_mode str_mode = GET_MODE (str_rtx);
4273 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4274 tree op0, op1;
4275 rtx value, result;
4276 optab binop;
4277 gimple srcstmt;
4278 enum tree_code code;
4279
4280 if (mode1 != VOIDmode
4281 || bitsize >= BITS_PER_WORD
4282 || str_bitsize > BITS_PER_WORD
4283 || TREE_SIDE_EFFECTS (to)
4284 || TREE_THIS_VOLATILE (to))
4285 return false;
4286
4287 STRIP_NOPS (src);
4288 if (TREE_CODE (src) != SSA_NAME)
4289 return false;
4290 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4291 return false;
4292
4293 srcstmt = get_gimple_for_ssa_name (src);
4294 if (!srcstmt
4295 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4296 return false;
4297
4298 code = gimple_assign_rhs_code (srcstmt);
4299
4300 op0 = gimple_assign_rhs1 (srcstmt);
4301
4302 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4303 to find its initialization. Hopefully the initialization will
4304 be from a bitfield load. */
4305 if (TREE_CODE (op0) == SSA_NAME)
4306 {
4307 gimple op0stmt = get_gimple_for_ssa_name (op0);
4308
4309 /* We want to eventually have OP0 be the same as TO, which
4310 should be a bitfield. */
4311 if (!op0stmt
4312 || !is_gimple_assign (op0stmt)
4313 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4314 return false;
4315 op0 = gimple_assign_rhs1 (op0stmt);
4316 }
4317
4318 op1 = gimple_assign_rhs2 (srcstmt);
4319
4320 if (!operand_equal_p (to, op0, 0))
4321 return false;
4322
4323 if (MEM_P (str_rtx))
4324 {
4325 unsigned HOST_WIDE_INT offset1;
4326
4327 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4328 str_mode = word_mode;
4329 str_mode = get_best_mode (bitsize, bitpos,
4330 bitregion_start, bitregion_end,
4331 MEM_ALIGN (str_rtx), str_mode, 0);
4332 if (str_mode == VOIDmode)
4333 return false;
4334 str_bitsize = GET_MODE_BITSIZE (str_mode);
4335
4336 offset1 = bitpos;
4337 bitpos %= str_bitsize;
4338 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4339 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4340 }
4341 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4342 return false;
4343
4344 /* If the bit field covers the whole REG/MEM, store_field
4345 will likely generate better code. */
4346 if (bitsize >= str_bitsize)
4347 return false;
4348
4349 /* We can't handle fields split across multiple entities. */
4350 if (bitpos + bitsize > str_bitsize)
4351 return false;
4352
4353 if (BYTES_BIG_ENDIAN)
4354 bitpos = str_bitsize - bitpos - bitsize;
4355
4356 switch (code)
4357 {
4358 case PLUS_EXPR:
4359 case MINUS_EXPR:
4360 /* For now, just optimize the case of the topmost bitfield
4361 where we don't need to do any masking and also
4362 1 bit bitfields where xor can be used.
4363 We might win by one instruction for the other bitfields
4364 too if insv/extv instructions aren't used, so that
4365 can be added later. */
4366 if (bitpos + bitsize != str_bitsize
4367 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4368 break;
4369
4370 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4371 value = convert_modes (str_mode,
4372 TYPE_MODE (TREE_TYPE (op1)), value,
4373 TYPE_UNSIGNED (TREE_TYPE (op1)));
4374
4375 /* We may be accessing data outside the field, which means
4376 we can alias adjacent data. */
4377 if (MEM_P (str_rtx))
4378 {
4379 str_rtx = shallow_copy_rtx (str_rtx);
4380 set_mem_alias_set (str_rtx, 0);
4381 set_mem_expr (str_rtx, 0);
4382 }
4383
4384 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4385 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4386 {
4387 value = expand_and (str_mode, value, const1_rtx, NULL);
4388 binop = xor_optab;
4389 }
4390 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4391 bitpos, NULL_RTX, 1);
4392 result = expand_binop (str_mode, binop, str_rtx,
4393 value, str_rtx, 1, OPTAB_WIDEN);
4394 if (result != str_rtx)
4395 emit_move_insn (str_rtx, result);
4396 return true;
4397
4398 case BIT_IOR_EXPR:
4399 case BIT_XOR_EXPR:
4400 if (TREE_CODE (op1) != INTEGER_CST)
4401 break;
4402 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4403 value = convert_modes (GET_MODE (str_rtx),
4404 TYPE_MODE (TREE_TYPE (op1)), value,
4405 TYPE_UNSIGNED (TREE_TYPE (op1)));
4406
4407 /* We may be accessing data outside the field, which means
4408 we can alias adjacent data. */
4409 if (MEM_P (str_rtx))
4410 {
4411 str_rtx = shallow_copy_rtx (str_rtx);
4412 set_mem_alias_set (str_rtx, 0);
4413 set_mem_expr (str_rtx, 0);
4414 }
4415
4416 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4417 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4418 {
4419 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4420 - 1);
4421 value = expand_and (GET_MODE (str_rtx), value, mask,
4422 NULL_RTX);
4423 }
4424 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4425 bitpos, NULL_RTX, 1);
4426 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4427 value, str_rtx, 1, OPTAB_WIDEN);
4428 if (result != str_rtx)
4429 emit_move_insn (str_rtx, result);
4430 return true;
4431
4432 default:
4433 break;
4434 }
4435
4436 return false;
4437 }
4438
4439 /* In the C++ memory model, consecutive bit fields in a structure are
4440 considered one memory location.
4441
4442 Given a COMPONENT_REF, this function returns the bit range of
4443 consecutive bits in which this COMPONENT_REF belongs in. The
4444 values are returned in *BITSTART and *BITEND. If either the C++
4445 memory model is not activated, or this memory access is not thread
4446 visible, 0 is returned in *BITSTART and *BITEND.
4447
4448 EXP is the COMPONENT_REF.
4449 INNERDECL is the actual object being referenced.
4450 BITPOS is the position in bits where the bit starts within the structure.
4451 BITSIZE is size in bits of the field being referenced in EXP.
4452
4453 For example, while storing into FOO.A here...
4454
4455 struct {
4456 BIT 0:
4457 unsigned int a : 4;
4458 unsigned int b : 1;
4459 BIT 8:
4460 unsigned char c;
4461 unsigned int d : 6;
4462 } foo;
4463
4464 ...we are not allowed to store past <b>, so for the layout above, a
4465 range of 0..7 (because no one cares if we store into the
4466 padding). */
4467
4468 static void
4469 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4470 unsigned HOST_WIDE_INT *bitend,
4471 tree exp, tree innerdecl,
4472 HOST_WIDE_INT bitpos, HOST_WIDE_INT bitsize)
4473 {
4474 tree field, record_type, fld;
4475 bool found_field = false;
4476 bool prev_field_is_bitfield;
4477
4478 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4479
4480 /* If other threads can't see this value, no need to restrict stores. */
4481 if (ALLOW_STORE_DATA_RACES
4482 || ((TREE_CODE (innerdecl) == MEM_REF
4483 || TREE_CODE (innerdecl) == TARGET_MEM_REF)
4484 && !ptr_deref_may_alias_global_p (TREE_OPERAND (innerdecl, 0)))
4485 || (DECL_P (innerdecl)
4486 && ((TREE_CODE (innerdecl) == VAR_DECL
4487 && DECL_THREAD_LOCAL_P (innerdecl))
4488 || !TREE_STATIC (innerdecl))))
4489 {
4490 *bitstart = *bitend = 0;
4491 return;
4492 }
4493
4494 /* Bit field we're storing into. */
4495 field = TREE_OPERAND (exp, 1);
4496 record_type = DECL_FIELD_CONTEXT (field);
4497
4498 /* Count the contiguous bitfields for the memory location that
4499 contains FIELD. */
4500 *bitstart = 0;
4501 prev_field_is_bitfield = true;
4502 for (fld = TYPE_FIELDS (record_type); fld; fld = DECL_CHAIN (fld))
4503 {
4504 tree t, offset;
4505 enum machine_mode mode;
4506 int unsignedp, volatilep;
4507
4508 if (TREE_CODE (fld) != FIELD_DECL)
4509 continue;
4510
4511 t = build3 (COMPONENT_REF, TREE_TYPE (exp),
4512 unshare_expr (TREE_OPERAND (exp, 0)),
4513 fld, NULL_TREE);
4514 get_inner_reference (t, &bitsize, &bitpos, &offset,
4515 &mode, &unsignedp, &volatilep, true);
4516
4517 if (field == fld)
4518 found_field = true;
4519
4520 if (DECL_BIT_FIELD_TYPE (fld) && bitsize > 0)
4521 {
4522 if (prev_field_is_bitfield == false)
4523 {
4524 *bitstart = bitpos;
4525 prev_field_is_bitfield = true;
4526 }
4527 }
4528 else
4529 {
4530 prev_field_is_bitfield = false;
4531 if (found_field)
4532 break;
4533 }
4534 }
4535 gcc_assert (found_field);
4536
4537 if (fld)
4538 {
4539 /* We found the end of the bit field sequence. Include the
4540 padding up to the next field and be done. */
4541 *bitend = bitpos - 1;
4542 }
4543 else
4544 {
4545 /* If this is the last element in the structure, include the padding
4546 at the end of structure. */
4547 *bitend = TREE_INT_CST_LOW (TYPE_SIZE (record_type)) - 1;
4548 }
4549 }
4550
4551 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4552 is true, try generating a nontemporal store. */
4553
4554 void
4555 expand_assignment (tree to, tree from, bool nontemporal)
4556 {
4557 rtx to_rtx = 0;
4558 rtx result;
4559 enum machine_mode mode;
4560 unsigned int align;
4561 enum insn_code icode;
4562
4563 /* Don't crash if the lhs of the assignment was erroneous. */
4564 if (TREE_CODE (to) == ERROR_MARK)
4565 {
4566 expand_normal (from);
4567 return;
4568 }
4569
4570 /* Optimize away no-op moves without side-effects. */
4571 if (operand_equal_p (to, from, 0))
4572 return;
4573
4574 mode = TYPE_MODE (TREE_TYPE (to));
4575 if ((TREE_CODE (to) == MEM_REF
4576 || TREE_CODE (to) == TARGET_MEM_REF)
4577 && mode != BLKmode
4578 && ((align = get_object_or_type_alignment (to))
4579 < GET_MODE_ALIGNMENT (mode))
4580 && ((icode = optab_handler (movmisalign_optab, mode))
4581 != CODE_FOR_nothing))
4582 {
4583 struct expand_operand ops[2];
4584 enum machine_mode address_mode;
4585 rtx reg, op0, mem;
4586
4587 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4588 reg = force_not_mem (reg);
4589
4590 if (TREE_CODE (to) == MEM_REF)
4591 {
4592 addr_space_t as
4593 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (to, 1))));
4594 tree base = TREE_OPERAND (to, 0);
4595 address_mode = targetm.addr_space.address_mode (as);
4596 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4597 op0 = convert_memory_address_addr_space (address_mode, op0, as);
4598 if (!integer_zerop (TREE_OPERAND (to, 1)))
4599 {
4600 rtx off
4601 = immed_double_int_const (mem_ref_offset (to), address_mode);
4602 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
4603 }
4604 op0 = memory_address_addr_space (mode, op0, as);
4605 mem = gen_rtx_MEM (mode, op0);
4606 set_mem_attributes (mem, to, 0);
4607 set_mem_addr_space (mem, as);
4608 }
4609 else if (TREE_CODE (to) == TARGET_MEM_REF)
4610 {
4611 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (to));
4612 struct mem_address addr;
4613
4614 get_address_description (to, &addr);
4615 op0 = addr_for_mem_ref (&addr, as, true);
4616 op0 = memory_address_addr_space (mode, op0, as);
4617 mem = gen_rtx_MEM (mode, op0);
4618 set_mem_attributes (mem, to, 0);
4619 set_mem_addr_space (mem, as);
4620 }
4621 else
4622 gcc_unreachable ();
4623 if (TREE_THIS_VOLATILE (to))
4624 MEM_VOLATILE_P (mem) = 1;
4625
4626 create_fixed_operand (&ops[0], mem);
4627 create_input_operand (&ops[1], reg, mode);
4628 /* The movmisalign<mode> pattern cannot fail, else the assignment would
4629 silently be omitted. */
4630 expand_insn (icode, 2, ops);
4631 return;
4632 }
4633
4634 /* Assignment of a structure component needs special treatment
4635 if the structure component's rtx is not simply a MEM.
4636 Assignment of an array element at a constant index, and assignment of
4637 an array element in an unaligned packed structure field, has the same
4638 problem. */
4639 if (handled_component_p (to)
4640 /* ??? We only need to handle MEM_REF here if the access is not
4641 a full access of the base object. */
4642 || (TREE_CODE (to) == MEM_REF
4643 && TREE_CODE (TREE_OPERAND (to, 0)) == ADDR_EXPR)
4644 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4645 {
4646 enum machine_mode mode1;
4647 HOST_WIDE_INT bitsize, bitpos;
4648 unsigned HOST_WIDE_INT bitregion_start = 0;
4649 unsigned HOST_WIDE_INT bitregion_end = 0;
4650 tree offset;
4651 int unsignedp;
4652 int volatilep = 0;
4653 tree tem;
4654
4655 push_temp_slots ();
4656 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4657 &unsignedp, &volatilep, true);
4658
4659 if (TREE_CODE (to) == COMPONENT_REF
4660 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4661 get_bit_range (&bitregion_start, &bitregion_end,
4662 to, tem, bitpos, bitsize);
4663
4664 /* If we are going to use store_bit_field and extract_bit_field,
4665 make sure to_rtx will be safe for multiple use. */
4666
4667 to_rtx = expand_normal (tem);
4668
4669 /* If the bitfield is volatile, we want to access it in the
4670 field's mode, not the computed mode.
4671 If a MEM has VOIDmode (external with incomplete type),
4672 use BLKmode for it instead. */
4673 if (MEM_P (to_rtx))
4674 {
4675 if (volatilep && flag_strict_volatile_bitfields > 0)
4676 to_rtx = adjust_address (to_rtx, mode1, 0);
4677 else if (GET_MODE (to_rtx) == VOIDmode)
4678 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4679 }
4680
4681 if (offset != 0)
4682 {
4683 enum machine_mode address_mode;
4684 rtx offset_rtx;
4685
4686 if (!MEM_P (to_rtx))
4687 {
4688 /* We can get constant negative offsets into arrays with broken
4689 user code. Translate this to a trap instead of ICEing. */
4690 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4691 expand_builtin_trap ();
4692 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4693 }
4694
4695 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4696 address_mode
4697 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4698 if (GET_MODE (offset_rtx) != address_mode)
4699 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4700
4701 /* A constant address in TO_RTX can have VOIDmode, we must not try
4702 to call force_reg for that case. Avoid that case. */
4703 if (MEM_P (to_rtx)
4704 && GET_MODE (to_rtx) == BLKmode
4705 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4706 && bitsize > 0
4707 && (bitpos % bitsize) == 0
4708 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4709 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4710 {
4711 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4712 bitpos = 0;
4713 }
4714
4715 to_rtx = offset_address (to_rtx, offset_rtx,
4716 highest_pow2_factor_for_target (to,
4717 offset));
4718 }
4719
4720 /* No action is needed if the target is not a memory and the field
4721 lies completely outside that target. This can occur if the source
4722 code contains an out-of-bounds access to a small array. */
4723 if (!MEM_P (to_rtx)
4724 && GET_MODE (to_rtx) != BLKmode
4725 && (unsigned HOST_WIDE_INT) bitpos
4726 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4727 {
4728 expand_normal (from);
4729 result = NULL;
4730 }
4731 /* Handle expand_expr of a complex value returning a CONCAT. */
4732 else if (GET_CODE (to_rtx) == CONCAT)
4733 {
4734 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4735 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4736 && bitpos == 0
4737 && bitsize == mode_bitsize)
4738 result = store_expr (from, to_rtx, false, nontemporal);
4739 else if (bitsize == mode_bitsize / 2
4740 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4741 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4742 nontemporal);
4743 else if (bitpos + bitsize <= mode_bitsize / 2)
4744 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4745 bitregion_start, bitregion_end,
4746 mode1, from, TREE_TYPE (tem),
4747 get_alias_set (to), nontemporal);
4748 else if (bitpos >= mode_bitsize / 2)
4749 result = store_field (XEXP (to_rtx, 1), bitsize,
4750 bitpos - mode_bitsize / 2,
4751 bitregion_start, bitregion_end,
4752 mode1, from,
4753 TREE_TYPE (tem), get_alias_set (to),
4754 nontemporal);
4755 else if (bitpos == 0 && bitsize == mode_bitsize)
4756 {
4757 rtx from_rtx;
4758 result = expand_normal (from);
4759 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4760 TYPE_MODE (TREE_TYPE (from)), 0);
4761 emit_move_insn (XEXP (to_rtx, 0),
4762 read_complex_part (from_rtx, false));
4763 emit_move_insn (XEXP (to_rtx, 1),
4764 read_complex_part (from_rtx, true));
4765 }
4766 else
4767 {
4768 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4769 GET_MODE_SIZE (GET_MODE (to_rtx)),
4770 0);
4771 write_complex_part (temp, XEXP (to_rtx, 0), false);
4772 write_complex_part (temp, XEXP (to_rtx, 1), true);
4773 result = store_field (temp, bitsize, bitpos,
4774 bitregion_start, bitregion_end,
4775 mode1, from,
4776 TREE_TYPE (tem), get_alias_set (to),
4777 nontemporal);
4778 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4779 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4780 }
4781 }
4782 else
4783 {
4784 if (MEM_P (to_rtx))
4785 {
4786 /* If the field is at offset zero, we could have been given the
4787 DECL_RTX of the parent struct. Don't munge it. */
4788 to_rtx = shallow_copy_rtx (to_rtx);
4789
4790 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4791
4792 /* Deal with volatile and readonly fields. The former is only
4793 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4794 if (volatilep)
4795 MEM_VOLATILE_P (to_rtx) = 1;
4796 if (component_uses_parent_alias_set (to))
4797 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4798 }
4799
4800 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4801 bitregion_start, bitregion_end,
4802 mode1,
4803 to_rtx, to, from))
4804 result = NULL;
4805 else
4806 result = store_field (to_rtx, bitsize, bitpos,
4807 bitregion_start, bitregion_end,
4808 mode1, from,
4809 TREE_TYPE (tem), get_alias_set (to),
4810 nontemporal);
4811 }
4812
4813 if (result)
4814 preserve_temp_slots (result);
4815 free_temp_slots ();
4816 pop_temp_slots ();
4817 return;
4818 }
4819
4820 /* If the rhs is a function call and its value is not an aggregate,
4821 call the function before we start to compute the lhs.
4822 This is needed for correct code for cases such as
4823 val = setjmp (buf) on machines where reference to val
4824 requires loading up part of an address in a separate insn.
4825
4826 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4827 since it might be a promoted variable where the zero- or sign- extension
4828 needs to be done. Handling this in the normal way is safe because no
4829 computation is done before the call. The same is true for SSA names. */
4830 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4831 && COMPLETE_TYPE_P (TREE_TYPE (from))
4832 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4833 && ! (((TREE_CODE (to) == VAR_DECL
4834 || TREE_CODE (to) == PARM_DECL
4835 || TREE_CODE (to) == RESULT_DECL)
4836 && REG_P (DECL_RTL (to)))
4837 || TREE_CODE (to) == SSA_NAME))
4838 {
4839 rtx value;
4840
4841 push_temp_slots ();
4842 value = expand_normal (from);
4843 if (to_rtx == 0)
4844 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4845
4846 /* Handle calls that return values in multiple non-contiguous locations.
4847 The Irix 6 ABI has examples of this. */
4848 if (GET_CODE (to_rtx) == PARALLEL)
4849 emit_group_load (to_rtx, value, TREE_TYPE (from),
4850 int_size_in_bytes (TREE_TYPE (from)));
4851 else if (GET_MODE (to_rtx) == BLKmode)
4852 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4853 else
4854 {
4855 if (POINTER_TYPE_P (TREE_TYPE (to)))
4856 value = convert_memory_address_addr_space
4857 (GET_MODE (to_rtx), value,
4858 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4859
4860 emit_move_insn (to_rtx, value);
4861 }
4862 preserve_temp_slots (to_rtx);
4863 free_temp_slots ();
4864 pop_temp_slots ();
4865 return;
4866 }
4867
4868 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
4869 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
4870
4871 if (to_rtx == 0)
4872 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4873
4874 /* Don't move directly into a return register. */
4875 if (TREE_CODE (to) == RESULT_DECL
4876 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4877 {
4878 rtx temp;
4879
4880 push_temp_slots ();
4881 if (REG_P (to_rtx) && TYPE_MODE (TREE_TYPE (from)) == BLKmode)
4882 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
4883 else
4884 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4885
4886 if (GET_CODE (to_rtx) == PARALLEL)
4887 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4888 int_size_in_bytes (TREE_TYPE (from)));
4889 else if (temp)
4890 emit_move_insn (to_rtx, temp);
4891
4892 preserve_temp_slots (to_rtx);
4893 free_temp_slots ();
4894 pop_temp_slots ();
4895 return;
4896 }
4897
4898 /* In case we are returning the contents of an object which overlaps
4899 the place the value is being stored, use a safe function when copying
4900 a value through a pointer into a structure value return block. */
4901 if (TREE_CODE (to) == RESULT_DECL
4902 && TREE_CODE (from) == INDIRECT_REF
4903 && ADDR_SPACE_GENERIC_P
4904 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4905 && refs_may_alias_p (to, from)
4906 && cfun->returns_struct
4907 && !cfun->returns_pcc_struct)
4908 {
4909 rtx from_rtx, size;
4910
4911 push_temp_slots ();
4912 size = expr_size (from);
4913 from_rtx = expand_normal (from);
4914
4915 emit_library_call (memmove_libfunc, LCT_NORMAL,
4916 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4917 XEXP (from_rtx, 0), Pmode,
4918 convert_to_mode (TYPE_MODE (sizetype),
4919 size, TYPE_UNSIGNED (sizetype)),
4920 TYPE_MODE (sizetype));
4921
4922 preserve_temp_slots (to_rtx);
4923 free_temp_slots ();
4924 pop_temp_slots ();
4925 return;
4926 }
4927
4928 /* Compute FROM and store the value in the rtx we got. */
4929
4930 push_temp_slots ();
4931 result = store_expr (from, to_rtx, 0, nontemporal);
4932 preserve_temp_slots (result);
4933 free_temp_slots ();
4934 pop_temp_slots ();
4935 return;
4936 }
4937
4938 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4939 succeeded, false otherwise. */
4940
4941 bool
4942 emit_storent_insn (rtx to, rtx from)
4943 {
4944 struct expand_operand ops[2];
4945 enum machine_mode mode = GET_MODE (to);
4946 enum insn_code code = optab_handler (storent_optab, mode);
4947
4948 if (code == CODE_FOR_nothing)
4949 return false;
4950
4951 create_fixed_operand (&ops[0], to);
4952 create_input_operand (&ops[1], from, mode);
4953 return maybe_expand_insn (code, 2, ops);
4954 }
4955
4956 /* Generate code for computing expression EXP,
4957 and storing the value into TARGET.
4958
4959 If the mode is BLKmode then we may return TARGET itself.
4960 It turns out that in BLKmode it doesn't cause a problem.
4961 because C has no operators that could combine two different
4962 assignments into the same BLKmode object with different values
4963 with no sequence point. Will other languages need this to
4964 be more thorough?
4965
4966 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4967 stack, and block moves may need to be treated specially.
4968
4969 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4970
4971 rtx
4972 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4973 {
4974 rtx temp;
4975 rtx alt_rtl = NULL_RTX;
4976 location_t loc = EXPR_LOCATION (exp);
4977
4978 if (VOID_TYPE_P (TREE_TYPE (exp)))
4979 {
4980 /* C++ can generate ?: expressions with a throw expression in one
4981 branch and an rvalue in the other. Here, we resolve attempts to
4982 store the throw expression's nonexistent result. */
4983 gcc_assert (!call_param_p);
4984 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4985 return NULL_RTX;
4986 }
4987 if (TREE_CODE (exp) == COMPOUND_EXPR)
4988 {
4989 /* Perform first part of compound expression, then assign from second
4990 part. */
4991 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4992 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4993 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4994 nontemporal);
4995 }
4996 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4997 {
4998 /* For conditional expression, get safe form of the target. Then
4999 test the condition, doing the appropriate assignment on either
5000 side. This avoids the creation of unnecessary temporaries.
5001 For non-BLKmode, it is more efficient not to do this. */
5002
5003 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
5004
5005 do_pending_stack_adjust ();
5006 NO_DEFER_POP;
5007 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5008 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5009 nontemporal);
5010 emit_jump_insn (gen_jump (lab2));
5011 emit_barrier ();
5012 emit_label (lab1);
5013 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5014 nontemporal);
5015 emit_label (lab2);
5016 OK_DEFER_POP;
5017
5018 return NULL_RTX;
5019 }
5020 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5021 /* If this is a scalar in a register that is stored in a wider mode
5022 than the declared mode, compute the result into its declared mode
5023 and then convert to the wider mode. Our value is the computed
5024 expression. */
5025 {
5026 rtx inner_target = 0;
5027
5028 /* We can do the conversion inside EXP, which will often result
5029 in some optimizations. Do the conversion in two steps: first
5030 change the signedness, if needed, then the extend. But don't
5031 do this if the type of EXP is a subtype of something else
5032 since then the conversion might involve more than just
5033 converting modes. */
5034 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5035 && TREE_TYPE (TREE_TYPE (exp)) == 0
5036 && GET_MODE_PRECISION (GET_MODE (target))
5037 == TYPE_PRECISION (TREE_TYPE (exp)))
5038 {
5039 if (TYPE_UNSIGNED (TREE_TYPE (exp))
5040 != SUBREG_PROMOTED_UNSIGNED_P (target))
5041 {
5042 /* Some types, e.g. Fortran's logical*4, won't have a signed
5043 version, so use the mode instead. */
5044 tree ntype
5045 = (signed_or_unsigned_type_for
5046 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
5047 if (ntype == NULL)
5048 ntype = lang_hooks.types.type_for_mode
5049 (TYPE_MODE (TREE_TYPE (exp)),
5050 SUBREG_PROMOTED_UNSIGNED_P (target));
5051
5052 exp = fold_convert_loc (loc, ntype, exp);
5053 }
5054
5055 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5056 (GET_MODE (SUBREG_REG (target)),
5057 SUBREG_PROMOTED_UNSIGNED_P (target)),
5058 exp);
5059
5060 inner_target = SUBREG_REG (target);
5061 }
5062
5063 temp = expand_expr (exp, inner_target, VOIDmode,
5064 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5065
5066 /* If TEMP is a VOIDmode constant, use convert_modes to make
5067 sure that we properly convert it. */
5068 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5069 {
5070 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5071 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
5072 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5073 GET_MODE (target), temp,
5074 SUBREG_PROMOTED_UNSIGNED_P (target));
5075 }
5076
5077 convert_move (SUBREG_REG (target), temp,
5078 SUBREG_PROMOTED_UNSIGNED_P (target));
5079
5080 return NULL_RTX;
5081 }
5082 else if ((TREE_CODE (exp) == STRING_CST
5083 || (TREE_CODE (exp) == MEM_REF
5084 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5085 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5086 == STRING_CST
5087 && integer_zerop (TREE_OPERAND (exp, 1))))
5088 && !nontemporal && !call_param_p
5089 && MEM_P (target))
5090 {
5091 /* Optimize initialization of an array with a STRING_CST. */
5092 HOST_WIDE_INT exp_len, str_copy_len;
5093 rtx dest_mem;
5094 tree str = TREE_CODE (exp) == STRING_CST
5095 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5096
5097 exp_len = int_expr_size (exp);
5098 if (exp_len <= 0)
5099 goto normal_expr;
5100
5101 if (TREE_STRING_LENGTH (str) <= 0)
5102 goto normal_expr;
5103
5104 str_copy_len = strlen (TREE_STRING_POINTER (str));
5105 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5106 goto normal_expr;
5107
5108 str_copy_len = TREE_STRING_LENGTH (str);
5109 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5110 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5111 {
5112 str_copy_len += STORE_MAX_PIECES - 1;
5113 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5114 }
5115 str_copy_len = MIN (str_copy_len, exp_len);
5116 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5117 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5118 MEM_ALIGN (target), false))
5119 goto normal_expr;
5120
5121 dest_mem = target;
5122
5123 dest_mem = store_by_pieces (dest_mem,
5124 str_copy_len, builtin_strncpy_read_str,
5125 CONST_CAST (char *,
5126 TREE_STRING_POINTER (str)),
5127 MEM_ALIGN (target), false,
5128 exp_len > str_copy_len ? 1 : 0);
5129 if (exp_len > str_copy_len)
5130 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5131 GEN_INT (exp_len - str_copy_len),
5132 BLOCK_OP_NORMAL);
5133 return NULL_RTX;
5134 }
5135 else
5136 {
5137 rtx tmp_target;
5138
5139 normal_expr:
5140 /* If we want to use a nontemporal store, force the value to
5141 register first. */
5142 tmp_target = nontemporal ? NULL_RTX : target;
5143 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5144 (call_param_p
5145 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5146 &alt_rtl);
5147 }
5148
5149 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5150 the same as that of TARGET, adjust the constant. This is needed, for
5151 example, in case it is a CONST_DOUBLE and we want only a word-sized
5152 value. */
5153 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5154 && TREE_CODE (exp) != ERROR_MARK
5155 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5156 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5157 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5158
5159 /* If value was not generated in the target, store it there.
5160 Convert the value to TARGET's type first if necessary and emit the
5161 pending incrementations that have been queued when expanding EXP.
5162 Note that we cannot emit the whole queue blindly because this will
5163 effectively disable the POST_INC optimization later.
5164
5165 If TEMP and TARGET compare equal according to rtx_equal_p, but
5166 one or both of them are volatile memory refs, we have to distinguish
5167 two cases:
5168 - expand_expr has used TARGET. In this case, we must not generate
5169 another copy. This can be detected by TARGET being equal according
5170 to == .
5171 - expand_expr has not used TARGET - that means that the source just
5172 happens to have the same RTX form. Since temp will have been created
5173 by expand_expr, it will compare unequal according to == .
5174 We must generate a copy in this case, to reach the correct number
5175 of volatile memory references. */
5176
5177 if ((! rtx_equal_p (temp, target)
5178 || (temp != target && (side_effects_p (temp)
5179 || side_effects_p (target))))
5180 && TREE_CODE (exp) != ERROR_MARK
5181 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5182 but TARGET is not valid memory reference, TEMP will differ
5183 from TARGET although it is really the same location. */
5184 && !(alt_rtl
5185 && rtx_equal_p (alt_rtl, target)
5186 && !side_effects_p (alt_rtl)
5187 && !side_effects_p (target))
5188 /* If there's nothing to copy, don't bother. Don't call
5189 expr_size unless necessary, because some front-ends (C++)
5190 expr_size-hook must not be given objects that are not
5191 supposed to be bit-copied or bit-initialized. */
5192 && expr_size (exp) != const0_rtx)
5193 {
5194 if (GET_MODE (temp) != GET_MODE (target)
5195 && GET_MODE (temp) != VOIDmode)
5196 {
5197 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5198 if (GET_MODE (target) == BLKmode
5199 && GET_MODE (temp) == BLKmode)
5200 emit_block_move (target, temp, expr_size (exp),
5201 (call_param_p
5202 ? BLOCK_OP_CALL_PARM
5203 : BLOCK_OP_NORMAL));
5204 else if (GET_MODE (target) == BLKmode)
5205 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5206 0, 0, 0, GET_MODE (temp), temp);
5207 else
5208 convert_move (target, temp, unsignedp);
5209 }
5210
5211 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5212 {
5213 /* Handle copying a string constant into an array. The string
5214 constant may be shorter than the array. So copy just the string's
5215 actual length, and clear the rest. First get the size of the data
5216 type of the string, which is actually the size of the target. */
5217 rtx size = expr_size (exp);
5218
5219 if (CONST_INT_P (size)
5220 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5221 emit_block_move (target, temp, size,
5222 (call_param_p
5223 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5224 else
5225 {
5226 enum machine_mode pointer_mode
5227 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5228 enum machine_mode address_mode
5229 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
5230
5231 /* Compute the size of the data to copy from the string. */
5232 tree copy_size
5233 = size_binop_loc (loc, MIN_EXPR,
5234 make_tree (sizetype, size),
5235 size_int (TREE_STRING_LENGTH (exp)));
5236 rtx copy_size_rtx
5237 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5238 (call_param_p
5239 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5240 rtx label = 0;
5241
5242 /* Copy that much. */
5243 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5244 TYPE_UNSIGNED (sizetype));
5245 emit_block_move (target, temp, copy_size_rtx,
5246 (call_param_p
5247 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5248
5249 /* Figure out how much is left in TARGET that we have to clear.
5250 Do all calculations in pointer_mode. */
5251 if (CONST_INT_P (copy_size_rtx))
5252 {
5253 size = plus_constant (size, -INTVAL (copy_size_rtx));
5254 target = adjust_address (target, BLKmode,
5255 INTVAL (copy_size_rtx));
5256 }
5257 else
5258 {
5259 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5260 copy_size_rtx, NULL_RTX, 0,
5261 OPTAB_LIB_WIDEN);
5262
5263 if (GET_MODE (copy_size_rtx) != address_mode)
5264 copy_size_rtx = convert_to_mode (address_mode,
5265 copy_size_rtx,
5266 TYPE_UNSIGNED (sizetype));
5267
5268 target = offset_address (target, copy_size_rtx,
5269 highest_pow2_factor (copy_size));
5270 label = gen_label_rtx ();
5271 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5272 GET_MODE (size), 0, label);
5273 }
5274
5275 if (size != const0_rtx)
5276 clear_storage (target, size, BLOCK_OP_NORMAL);
5277
5278 if (label)
5279 emit_label (label);
5280 }
5281 }
5282 /* Handle calls that return values in multiple non-contiguous locations.
5283 The Irix 6 ABI has examples of this. */
5284 else if (GET_CODE (target) == PARALLEL)
5285 emit_group_load (target, temp, TREE_TYPE (exp),
5286 int_size_in_bytes (TREE_TYPE (exp)));
5287 else if (GET_MODE (temp) == BLKmode)
5288 emit_block_move (target, temp, expr_size (exp),
5289 (call_param_p
5290 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5291 else if (nontemporal
5292 && emit_storent_insn (target, temp))
5293 /* If we managed to emit a nontemporal store, there is nothing else to
5294 do. */
5295 ;
5296 else
5297 {
5298 temp = force_operand (temp, target);
5299 if (temp != target)
5300 emit_move_insn (target, temp);
5301 }
5302 }
5303
5304 return NULL_RTX;
5305 }
5306 \f
5307 /* Return true if field F of structure TYPE is a flexible array. */
5308
5309 static bool
5310 flexible_array_member_p (const_tree f, const_tree type)
5311 {
5312 const_tree tf;
5313
5314 tf = TREE_TYPE (f);
5315 return (DECL_CHAIN (f) == NULL
5316 && TREE_CODE (tf) == ARRAY_TYPE
5317 && TYPE_DOMAIN (tf)
5318 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5319 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5320 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5321 && int_size_in_bytes (type) >= 0);
5322 }
5323
5324 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5325 must have in order for it to completely initialize a value of type TYPE.
5326 Return -1 if the number isn't known.
5327
5328 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5329
5330 static HOST_WIDE_INT
5331 count_type_elements (const_tree type, bool for_ctor_p)
5332 {
5333 switch (TREE_CODE (type))
5334 {
5335 case ARRAY_TYPE:
5336 {
5337 tree nelts;
5338
5339 nelts = array_type_nelts (type);
5340 if (nelts && host_integerp (nelts, 1))
5341 {
5342 unsigned HOST_WIDE_INT n;
5343
5344 n = tree_low_cst (nelts, 1) + 1;
5345 if (n == 0 || for_ctor_p)
5346 return n;
5347 else
5348 return n * count_type_elements (TREE_TYPE (type), false);
5349 }
5350 return for_ctor_p ? -1 : 1;
5351 }
5352
5353 case RECORD_TYPE:
5354 {
5355 unsigned HOST_WIDE_INT n;
5356 tree f;
5357
5358 n = 0;
5359 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5360 if (TREE_CODE (f) == FIELD_DECL)
5361 {
5362 if (!for_ctor_p)
5363 n += count_type_elements (TREE_TYPE (f), false);
5364 else if (!flexible_array_member_p (f, type))
5365 /* Don't count flexible arrays, which are not supposed
5366 to be initialized. */
5367 n += 1;
5368 }
5369
5370 return n;
5371 }
5372
5373 case UNION_TYPE:
5374 case QUAL_UNION_TYPE:
5375 {
5376 tree f;
5377 HOST_WIDE_INT n, m;
5378
5379 gcc_assert (!for_ctor_p);
5380 /* Estimate the number of scalars in each field and pick the
5381 maximum. Other estimates would do instead; the idea is simply
5382 to make sure that the estimate is not sensitive to the ordering
5383 of the fields. */
5384 n = 1;
5385 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5386 if (TREE_CODE (f) == FIELD_DECL)
5387 {
5388 m = count_type_elements (TREE_TYPE (f), false);
5389 /* If the field doesn't span the whole union, add an extra
5390 scalar for the rest. */
5391 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5392 TYPE_SIZE (type)) != 1)
5393 m++;
5394 if (n < m)
5395 n = m;
5396 }
5397 return n;
5398 }
5399
5400 case COMPLEX_TYPE:
5401 return 2;
5402
5403 case VECTOR_TYPE:
5404 return TYPE_VECTOR_SUBPARTS (type);
5405
5406 case INTEGER_TYPE:
5407 case REAL_TYPE:
5408 case FIXED_POINT_TYPE:
5409 case ENUMERAL_TYPE:
5410 case BOOLEAN_TYPE:
5411 case POINTER_TYPE:
5412 case OFFSET_TYPE:
5413 case REFERENCE_TYPE:
5414 case NULLPTR_TYPE:
5415 return 1;
5416
5417 case ERROR_MARK:
5418 return 0;
5419
5420 case VOID_TYPE:
5421 case METHOD_TYPE:
5422 case FUNCTION_TYPE:
5423 case LANG_TYPE:
5424 default:
5425 gcc_unreachable ();
5426 }
5427 }
5428
5429 /* Helper for categorize_ctor_elements. Identical interface. */
5430
5431 static bool
5432 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5433 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5434 {
5435 unsigned HOST_WIDE_INT idx;
5436 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5437 tree value, purpose, elt_type;
5438
5439 /* Whether CTOR is a valid constant initializer, in accordance with what
5440 initializer_constant_valid_p does. If inferred from the constructor
5441 elements, true until proven otherwise. */
5442 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5443 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5444
5445 nz_elts = 0;
5446 init_elts = 0;
5447 num_fields = 0;
5448 elt_type = NULL_TREE;
5449
5450 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5451 {
5452 HOST_WIDE_INT mult = 1;
5453
5454 if (TREE_CODE (purpose) == RANGE_EXPR)
5455 {
5456 tree lo_index = TREE_OPERAND (purpose, 0);
5457 tree hi_index = TREE_OPERAND (purpose, 1);
5458
5459 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5460 mult = (tree_low_cst (hi_index, 1)
5461 - tree_low_cst (lo_index, 1) + 1);
5462 }
5463 num_fields += mult;
5464 elt_type = TREE_TYPE (value);
5465
5466 switch (TREE_CODE (value))
5467 {
5468 case CONSTRUCTOR:
5469 {
5470 HOST_WIDE_INT nz = 0, ic = 0;
5471
5472 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5473 p_complete);
5474
5475 nz_elts += mult * nz;
5476 init_elts += mult * ic;
5477
5478 if (const_from_elts_p && const_p)
5479 const_p = const_elt_p;
5480 }
5481 break;
5482
5483 case INTEGER_CST:
5484 case REAL_CST:
5485 case FIXED_CST:
5486 if (!initializer_zerop (value))
5487 nz_elts += mult;
5488 init_elts += mult;
5489 break;
5490
5491 case STRING_CST:
5492 nz_elts += mult * TREE_STRING_LENGTH (value);
5493 init_elts += mult * TREE_STRING_LENGTH (value);
5494 break;
5495
5496 case COMPLEX_CST:
5497 if (!initializer_zerop (TREE_REALPART (value)))
5498 nz_elts += mult;
5499 if (!initializer_zerop (TREE_IMAGPART (value)))
5500 nz_elts += mult;
5501 init_elts += mult;
5502 break;
5503
5504 case VECTOR_CST:
5505 {
5506 tree v;
5507 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
5508 {
5509 if (!initializer_zerop (TREE_VALUE (v)))
5510 nz_elts += mult;
5511 init_elts += mult;
5512 }
5513 }
5514 break;
5515
5516 default:
5517 {
5518 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5519 nz_elts += mult * tc;
5520 init_elts += mult * tc;
5521
5522 if (const_from_elts_p && const_p)
5523 const_p = initializer_constant_valid_p (value, elt_type)
5524 != NULL_TREE;
5525 }
5526 break;
5527 }
5528 }
5529
5530 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5531 num_fields, elt_type))
5532 *p_complete = false;
5533
5534 *p_nz_elts += nz_elts;
5535 *p_init_elts += init_elts;
5536
5537 return const_p;
5538 }
5539
5540 /* Examine CTOR to discover:
5541 * how many scalar fields are set to nonzero values,
5542 and place it in *P_NZ_ELTS;
5543 * how many scalar fields in total are in CTOR,
5544 and place it in *P_ELT_COUNT.
5545 * whether the constructor is complete -- in the sense that every
5546 meaningful byte is explicitly given a value --
5547 and place it in *P_COMPLETE.
5548
5549 Return whether or not CTOR is a valid static constant initializer, the same
5550 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5551
5552 bool
5553 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5554 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5555 {
5556 *p_nz_elts = 0;
5557 *p_init_elts = 0;
5558 *p_complete = true;
5559
5560 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5561 }
5562
5563 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5564 of which had type LAST_TYPE. Each element was itself a complete
5565 initializer, in the sense that every meaningful byte was explicitly
5566 given a value. Return true if the same is true for the constructor
5567 as a whole. */
5568
5569 bool
5570 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5571 const_tree last_type)
5572 {
5573 if (TREE_CODE (type) == UNION_TYPE
5574 || TREE_CODE (type) == QUAL_UNION_TYPE)
5575 {
5576 if (num_elts == 0)
5577 return false;
5578
5579 gcc_assert (num_elts == 1 && last_type);
5580
5581 /* ??? We could look at each element of the union, and find the
5582 largest element. Which would avoid comparing the size of the
5583 initialized element against any tail padding in the union.
5584 Doesn't seem worth the effort... */
5585 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5586 }
5587
5588 return count_type_elements (type, true) == num_elts;
5589 }
5590
5591 /* Return 1 if EXP contains mostly (3/4) zeros. */
5592
5593 static int
5594 mostly_zeros_p (const_tree exp)
5595 {
5596 if (TREE_CODE (exp) == CONSTRUCTOR)
5597 {
5598 HOST_WIDE_INT nz_elts, init_elts;
5599 bool complete_p;
5600
5601 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5602 return !complete_p || nz_elts < init_elts / 4;
5603 }
5604
5605 return initializer_zerop (exp);
5606 }
5607
5608 /* Return 1 if EXP contains all zeros. */
5609
5610 static int
5611 all_zeros_p (const_tree exp)
5612 {
5613 if (TREE_CODE (exp) == CONSTRUCTOR)
5614 {
5615 HOST_WIDE_INT nz_elts, init_elts;
5616 bool complete_p;
5617
5618 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5619 return nz_elts == 0;
5620 }
5621
5622 return initializer_zerop (exp);
5623 }
5624 \f
5625 /* Helper function for store_constructor.
5626 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5627 TYPE is the type of the CONSTRUCTOR, not the element type.
5628 CLEARED is as for store_constructor.
5629 ALIAS_SET is the alias set to use for any stores.
5630
5631 This provides a recursive shortcut back to store_constructor when it isn't
5632 necessary to go through store_field. This is so that we can pass through
5633 the cleared field to let store_constructor know that we may not have to
5634 clear a substructure if the outer structure has already been cleared. */
5635
5636 static void
5637 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5638 HOST_WIDE_INT bitpos, enum machine_mode mode,
5639 tree exp, tree type, int cleared,
5640 alias_set_type alias_set)
5641 {
5642 if (TREE_CODE (exp) == CONSTRUCTOR
5643 /* We can only call store_constructor recursively if the size and
5644 bit position are on a byte boundary. */
5645 && bitpos % BITS_PER_UNIT == 0
5646 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5647 /* If we have a nonzero bitpos for a register target, then we just
5648 let store_field do the bitfield handling. This is unlikely to
5649 generate unnecessary clear instructions anyways. */
5650 && (bitpos == 0 || MEM_P (target)))
5651 {
5652 if (MEM_P (target))
5653 target
5654 = adjust_address (target,
5655 GET_MODE (target) == BLKmode
5656 || 0 != (bitpos
5657 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5658 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5659
5660
5661 /* Update the alias set, if required. */
5662 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5663 && MEM_ALIAS_SET (target) != 0)
5664 {
5665 target = copy_rtx (target);
5666 set_mem_alias_set (target, alias_set);
5667 }
5668
5669 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5670 }
5671 else
5672 store_field (target, bitsize, bitpos, 0, 0, mode, exp, type, alias_set,
5673 false);
5674 }
5675
5676 /* Store the value of constructor EXP into the rtx TARGET.
5677 TARGET is either a REG or a MEM; we know it cannot conflict, since
5678 safe_from_p has been called.
5679 CLEARED is true if TARGET is known to have been zero'd.
5680 SIZE is the number of bytes of TARGET we are allowed to modify: this
5681 may not be the same as the size of EXP if we are assigning to a field
5682 which has been packed to exclude padding bits. */
5683
5684 static void
5685 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5686 {
5687 tree type = TREE_TYPE (exp);
5688 #ifdef WORD_REGISTER_OPERATIONS
5689 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5690 #endif
5691
5692 switch (TREE_CODE (type))
5693 {
5694 case RECORD_TYPE:
5695 case UNION_TYPE:
5696 case QUAL_UNION_TYPE:
5697 {
5698 unsigned HOST_WIDE_INT idx;
5699 tree field, value;
5700
5701 /* If size is zero or the target is already cleared, do nothing. */
5702 if (size == 0 || cleared)
5703 cleared = 1;
5704 /* We either clear the aggregate or indicate the value is dead. */
5705 else if ((TREE_CODE (type) == UNION_TYPE
5706 || TREE_CODE (type) == QUAL_UNION_TYPE)
5707 && ! CONSTRUCTOR_ELTS (exp))
5708 /* If the constructor is empty, clear the union. */
5709 {
5710 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5711 cleared = 1;
5712 }
5713
5714 /* If we are building a static constructor into a register,
5715 set the initial value as zero so we can fold the value into
5716 a constant. But if more than one register is involved,
5717 this probably loses. */
5718 else if (REG_P (target) && TREE_STATIC (exp)
5719 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5720 {
5721 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5722 cleared = 1;
5723 }
5724
5725 /* If the constructor has fewer fields than the structure or
5726 if we are initializing the structure to mostly zeros, clear
5727 the whole structure first. Don't do this if TARGET is a
5728 register whose mode size isn't equal to SIZE since
5729 clear_storage can't handle this case. */
5730 else if (size > 0
5731 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5732 != fields_length (type))
5733 || mostly_zeros_p (exp))
5734 && (!REG_P (target)
5735 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5736 == size)))
5737 {
5738 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5739 cleared = 1;
5740 }
5741
5742 if (REG_P (target) && !cleared)
5743 emit_clobber (target);
5744
5745 /* Store each element of the constructor into the
5746 corresponding field of TARGET. */
5747 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5748 {
5749 enum machine_mode mode;
5750 HOST_WIDE_INT bitsize;
5751 HOST_WIDE_INT bitpos = 0;
5752 tree offset;
5753 rtx to_rtx = target;
5754
5755 /* Just ignore missing fields. We cleared the whole
5756 structure, above, if any fields are missing. */
5757 if (field == 0)
5758 continue;
5759
5760 if (cleared && initializer_zerop (value))
5761 continue;
5762
5763 if (host_integerp (DECL_SIZE (field), 1))
5764 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5765 else
5766 bitsize = -1;
5767
5768 mode = DECL_MODE (field);
5769 if (DECL_BIT_FIELD (field))
5770 mode = VOIDmode;
5771
5772 offset = DECL_FIELD_OFFSET (field);
5773 if (host_integerp (offset, 0)
5774 && host_integerp (bit_position (field), 0))
5775 {
5776 bitpos = int_bit_position (field);
5777 offset = 0;
5778 }
5779 else
5780 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5781
5782 if (offset)
5783 {
5784 enum machine_mode address_mode;
5785 rtx offset_rtx;
5786
5787 offset
5788 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5789 make_tree (TREE_TYPE (exp),
5790 target));
5791
5792 offset_rtx = expand_normal (offset);
5793 gcc_assert (MEM_P (to_rtx));
5794
5795 address_mode
5796 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5797 if (GET_MODE (offset_rtx) != address_mode)
5798 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5799
5800 to_rtx = offset_address (to_rtx, offset_rtx,
5801 highest_pow2_factor (offset));
5802 }
5803
5804 #ifdef WORD_REGISTER_OPERATIONS
5805 /* If this initializes a field that is smaller than a
5806 word, at the start of a word, try to widen it to a full
5807 word. This special case allows us to output C++ member
5808 function initializations in a form that the optimizers
5809 can understand. */
5810 if (REG_P (target)
5811 && bitsize < BITS_PER_WORD
5812 && bitpos % BITS_PER_WORD == 0
5813 && GET_MODE_CLASS (mode) == MODE_INT
5814 && TREE_CODE (value) == INTEGER_CST
5815 && exp_size >= 0
5816 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5817 {
5818 tree type = TREE_TYPE (value);
5819
5820 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5821 {
5822 type = lang_hooks.types.type_for_size
5823 (BITS_PER_WORD, TYPE_UNSIGNED (type));
5824 value = fold_convert (type, value);
5825 }
5826
5827 if (BYTES_BIG_ENDIAN)
5828 value
5829 = fold_build2 (LSHIFT_EXPR, type, value,
5830 build_int_cst (type,
5831 BITS_PER_WORD - bitsize));
5832 bitsize = BITS_PER_WORD;
5833 mode = word_mode;
5834 }
5835 #endif
5836
5837 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5838 && DECL_NONADDRESSABLE_P (field))
5839 {
5840 to_rtx = copy_rtx (to_rtx);
5841 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5842 }
5843
5844 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5845 value, type, cleared,
5846 get_alias_set (TREE_TYPE (field)));
5847 }
5848 break;
5849 }
5850 case ARRAY_TYPE:
5851 {
5852 tree value, index;
5853 unsigned HOST_WIDE_INT i;
5854 int need_to_clear;
5855 tree domain;
5856 tree elttype = TREE_TYPE (type);
5857 int const_bounds_p;
5858 HOST_WIDE_INT minelt = 0;
5859 HOST_WIDE_INT maxelt = 0;
5860
5861 domain = TYPE_DOMAIN (type);
5862 const_bounds_p = (TYPE_MIN_VALUE (domain)
5863 && TYPE_MAX_VALUE (domain)
5864 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5865 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5866
5867 /* If we have constant bounds for the range of the type, get them. */
5868 if (const_bounds_p)
5869 {
5870 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5871 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5872 }
5873
5874 /* If the constructor has fewer elements than the array, clear
5875 the whole array first. Similarly if this is static
5876 constructor of a non-BLKmode object. */
5877 if (cleared)
5878 need_to_clear = 0;
5879 else if (REG_P (target) && TREE_STATIC (exp))
5880 need_to_clear = 1;
5881 else
5882 {
5883 unsigned HOST_WIDE_INT idx;
5884 tree index, value;
5885 HOST_WIDE_INT count = 0, zero_count = 0;
5886 need_to_clear = ! const_bounds_p;
5887
5888 /* This loop is a more accurate version of the loop in
5889 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5890 is also needed to check for missing elements. */
5891 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5892 {
5893 HOST_WIDE_INT this_node_count;
5894
5895 if (need_to_clear)
5896 break;
5897
5898 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5899 {
5900 tree lo_index = TREE_OPERAND (index, 0);
5901 tree hi_index = TREE_OPERAND (index, 1);
5902
5903 if (! host_integerp (lo_index, 1)
5904 || ! host_integerp (hi_index, 1))
5905 {
5906 need_to_clear = 1;
5907 break;
5908 }
5909
5910 this_node_count = (tree_low_cst (hi_index, 1)
5911 - tree_low_cst (lo_index, 1) + 1);
5912 }
5913 else
5914 this_node_count = 1;
5915
5916 count += this_node_count;
5917 if (mostly_zeros_p (value))
5918 zero_count += this_node_count;
5919 }
5920
5921 /* Clear the entire array first if there are any missing
5922 elements, or if the incidence of zero elements is >=
5923 75%. */
5924 if (! need_to_clear
5925 && (count < maxelt - minelt + 1
5926 || 4 * zero_count >= 3 * count))
5927 need_to_clear = 1;
5928 }
5929
5930 if (need_to_clear && size > 0)
5931 {
5932 if (REG_P (target))
5933 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5934 else
5935 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5936 cleared = 1;
5937 }
5938
5939 if (!cleared && REG_P (target))
5940 /* Inform later passes that the old value is dead. */
5941 emit_clobber (target);
5942
5943 /* Store each element of the constructor into the
5944 corresponding element of TARGET, determined by counting the
5945 elements. */
5946 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5947 {
5948 enum machine_mode mode;
5949 HOST_WIDE_INT bitsize;
5950 HOST_WIDE_INT bitpos;
5951 rtx xtarget = target;
5952
5953 if (cleared && initializer_zerop (value))
5954 continue;
5955
5956 mode = TYPE_MODE (elttype);
5957 if (mode == BLKmode)
5958 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5959 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5960 : -1);
5961 else
5962 bitsize = GET_MODE_BITSIZE (mode);
5963
5964 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5965 {
5966 tree lo_index = TREE_OPERAND (index, 0);
5967 tree hi_index = TREE_OPERAND (index, 1);
5968 rtx index_r, pos_rtx;
5969 HOST_WIDE_INT lo, hi, count;
5970 tree position;
5971
5972 /* If the range is constant and "small", unroll the loop. */
5973 if (const_bounds_p
5974 && host_integerp (lo_index, 0)
5975 && host_integerp (hi_index, 0)
5976 && (lo = tree_low_cst (lo_index, 0),
5977 hi = tree_low_cst (hi_index, 0),
5978 count = hi - lo + 1,
5979 (!MEM_P (target)
5980 || count <= 2
5981 || (host_integerp (TYPE_SIZE (elttype), 1)
5982 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5983 <= 40 * 8)))))
5984 {
5985 lo -= minelt; hi -= minelt;
5986 for (; lo <= hi; lo++)
5987 {
5988 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
5989
5990 if (MEM_P (target)
5991 && !MEM_KEEP_ALIAS_SET_P (target)
5992 && TREE_CODE (type) == ARRAY_TYPE
5993 && TYPE_NONALIASED_COMPONENT (type))
5994 {
5995 target = copy_rtx (target);
5996 MEM_KEEP_ALIAS_SET_P (target) = 1;
5997 }
5998
5999 store_constructor_field
6000 (target, bitsize, bitpos, mode, value, type, cleared,
6001 get_alias_set (elttype));
6002 }
6003 }
6004 else
6005 {
6006 rtx loop_start = gen_label_rtx ();
6007 rtx loop_end = gen_label_rtx ();
6008 tree exit_cond;
6009
6010 expand_normal (hi_index);
6011
6012 index = build_decl (EXPR_LOCATION (exp),
6013 VAR_DECL, NULL_TREE, domain);
6014 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6015 SET_DECL_RTL (index, index_r);
6016 store_expr (lo_index, index_r, 0, false);
6017
6018 /* Build the head of the loop. */
6019 do_pending_stack_adjust ();
6020 emit_label (loop_start);
6021
6022 /* Assign value to element index. */
6023 position =
6024 fold_convert (ssizetype,
6025 fold_build2 (MINUS_EXPR,
6026 TREE_TYPE (index),
6027 index,
6028 TYPE_MIN_VALUE (domain)));
6029
6030 position =
6031 size_binop (MULT_EXPR, position,
6032 fold_convert (ssizetype,
6033 TYPE_SIZE_UNIT (elttype)));
6034
6035 pos_rtx = expand_normal (position);
6036 xtarget = offset_address (target, pos_rtx,
6037 highest_pow2_factor (position));
6038 xtarget = adjust_address (xtarget, mode, 0);
6039 if (TREE_CODE (value) == CONSTRUCTOR)
6040 store_constructor (value, xtarget, cleared,
6041 bitsize / BITS_PER_UNIT);
6042 else
6043 store_expr (value, xtarget, 0, false);
6044
6045 /* Generate a conditional jump to exit the loop. */
6046 exit_cond = build2 (LT_EXPR, integer_type_node,
6047 index, hi_index);
6048 jumpif (exit_cond, loop_end, -1);
6049
6050 /* Update the loop counter, and jump to the head of
6051 the loop. */
6052 expand_assignment (index,
6053 build2 (PLUS_EXPR, TREE_TYPE (index),
6054 index, integer_one_node),
6055 false);
6056
6057 emit_jump (loop_start);
6058
6059 /* Build the end of the loop. */
6060 emit_label (loop_end);
6061 }
6062 }
6063 else if ((index != 0 && ! host_integerp (index, 0))
6064 || ! host_integerp (TYPE_SIZE (elttype), 1))
6065 {
6066 tree position;
6067
6068 if (index == 0)
6069 index = ssize_int (1);
6070
6071 if (minelt)
6072 index = fold_convert (ssizetype,
6073 fold_build2 (MINUS_EXPR,
6074 TREE_TYPE (index),
6075 index,
6076 TYPE_MIN_VALUE (domain)));
6077
6078 position =
6079 size_binop (MULT_EXPR, index,
6080 fold_convert (ssizetype,
6081 TYPE_SIZE_UNIT (elttype)));
6082 xtarget = offset_address (target,
6083 expand_normal (position),
6084 highest_pow2_factor (position));
6085 xtarget = adjust_address (xtarget, mode, 0);
6086 store_expr (value, xtarget, 0, false);
6087 }
6088 else
6089 {
6090 if (index != 0)
6091 bitpos = ((tree_low_cst (index, 0) - minelt)
6092 * tree_low_cst (TYPE_SIZE (elttype), 1));
6093 else
6094 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
6095
6096 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6097 && TREE_CODE (type) == ARRAY_TYPE
6098 && TYPE_NONALIASED_COMPONENT (type))
6099 {
6100 target = copy_rtx (target);
6101 MEM_KEEP_ALIAS_SET_P (target) = 1;
6102 }
6103 store_constructor_field (target, bitsize, bitpos, mode, value,
6104 type, cleared, get_alias_set (elttype));
6105 }
6106 }
6107 break;
6108 }
6109
6110 case VECTOR_TYPE:
6111 {
6112 unsigned HOST_WIDE_INT idx;
6113 constructor_elt *ce;
6114 int i;
6115 int need_to_clear;
6116 int icode = 0;
6117 tree elttype = TREE_TYPE (type);
6118 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
6119 enum machine_mode eltmode = TYPE_MODE (elttype);
6120 HOST_WIDE_INT bitsize;
6121 HOST_WIDE_INT bitpos;
6122 rtvec vector = NULL;
6123 unsigned n_elts;
6124 alias_set_type alias;
6125
6126 gcc_assert (eltmode != BLKmode);
6127
6128 n_elts = TYPE_VECTOR_SUBPARTS (type);
6129 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6130 {
6131 enum machine_mode mode = GET_MODE (target);
6132
6133 icode = (int) optab_handler (vec_init_optab, mode);
6134 if (icode != CODE_FOR_nothing)
6135 {
6136 unsigned int i;
6137
6138 vector = rtvec_alloc (n_elts);
6139 for (i = 0; i < n_elts; i++)
6140 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6141 }
6142 }
6143
6144 /* If the constructor has fewer elements than the vector,
6145 clear the whole array first. Similarly if this is static
6146 constructor of a non-BLKmode object. */
6147 if (cleared)
6148 need_to_clear = 0;
6149 else if (REG_P (target) && TREE_STATIC (exp))
6150 need_to_clear = 1;
6151 else
6152 {
6153 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6154 tree value;
6155
6156 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6157 {
6158 int n_elts_here = tree_low_cst
6159 (int_const_binop (TRUNC_DIV_EXPR,
6160 TYPE_SIZE (TREE_TYPE (value)),
6161 TYPE_SIZE (elttype)), 1);
6162
6163 count += n_elts_here;
6164 if (mostly_zeros_p (value))
6165 zero_count += n_elts_here;
6166 }
6167
6168 /* Clear the entire vector first if there are any missing elements,
6169 or if the incidence of zero elements is >= 75%. */
6170 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6171 }
6172
6173 if (need_to_clear && size > 0 && !vector)
6174 {
6175 if (REG_P (target))
6176 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6177 else
6178 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6179 cleared = 1;
6180 }
6181
6182 /* Inform later passes that the old value is dead. */
6183 if (!cleared && !vector && REG_P (target))
6184 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6185
6186 if (MEM_P (target))
6187 alias = MEM_ALIAS_SET (target);
6188 else
6189 alias = get_alias_set (elttype);
6190
6191 /* Store each element of the constructor into the corresponding
6192 element of TARGET, determined by counting the elements. */
6193 for (idx = 0, i = 0;
6194 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6195 idx++, i += bitsize / elt_size)
6196 {
6197 HOST_WIDE_INT eltpos;
6198 tree value = ce->value;
6199
6200 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6201 if (cleared && initializer_zerop (value))
6202 continue;
6203
6204 if (ce->index)
6205 eltpos = tree_low_cst (ce->index, 1);
6206 else
6207 eltpos = i;
6208
6209 if (vector)
6210 {
6211 /* Vector CONSTRUCTORs should only be built from smaller
6212 vectors in the case of BLKmode vectors. */
6213 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6214 RTVEC_ELT (vector, eltpos)
6215 = expand_normal (value);
6216 }
6217 else
6218 {
6219 enum machine_mode value_mode =
6220 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6221 ? TYPE_MODE (TREE_TYPE (value))
6222 : eltmode;
6223 bitpos = eltpos * elt_size;
6224 store_constructor_field (target, bitsize, bitpos,
6225 value_mode, value, type,
6226 cleared, alias);
6227 }
6228 }
6229
6230 if (vector)
6231 emit_insn (GEN_FCN (icode)
6232 (target,
6233 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6234 break;
6235 }
6236
6237 default:
6238 gcc_unreachable ();
6239 }
6240 }
6241
6242 /* Store the value of EXP (an expression tree)
6243 into a subfield of TARGET which has mode MODE and occupies
6244 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6245 If MODE is VOIDmode, it means that we are storing into a bit-field.
6246
6247 BITREGION_START is bitpos of the first bitfield in this region.
6248 BITREGION_END is the bitpos of the ending bitfield in this region.
6249 These two fields are 0, if the C++ memory model does not apply,
6250 or we are not interested in keeping track of bitfield regions.
6251
6252 Always return const0_rtx unless we have something particular to
6253 return.
6254
6255 TYPE is the type of the underlying object,
6256
6257 ALIAS_SET is the alias set for the destination. This value will
6258 (in general) be different from that for TARGET, since TARGET is a
6259 reference to the containing structure.
6260
6261 If NONTEMPORAL is true, try generating a nontemporal store. */
6262
6263 static rtx
6264 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6265 unsigned HOST_WIDE_INT bitregion_start,
6266 unsigned HOST_WIDE_INT bitregion_end,
6267 enum machine_mode mode, tree exp, tree type,
6268 alias_set_type alias_set, bool nontemporal)
6269 {
6270 if (TREE_CODE (exp) == ERROR_MARK)
6271 return const0_rtx;
6272
6273 /* If we have nothing to store, do nothing unless the expression has
6274 side-effects. */
6275 if (bitsize == 0)
6276 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6277
6278 /* If we are storing into an unaligned field of an aligned union that is
6279 in a register, we may have the mode of TARGET being an integer mode but
6280 MODE == BLKmode. In that case, get an aligned object whose size and
6281 alignment are the same as TARGET and store TARGET into it (we can avoid
6282 the store if the field being stored is the entire width of TARGET). Then
6283 call ourselves recursively to store the field into a BLKmode version of
6284 that object. Finally, load from the object into TARGET. This is not
6285 very efficient in general, but should only be slightly more expensive
6286 than the otherwise-required unaligned accesses. Perhaps this can be
6287 cleaned up later. It's tempting to make OBJECT readonly, but it's set
6288 twice, once with emit_move_insn and once via store_field. */
6289
6290 if (mode == BLKmode
6291 && (REG_P (target) || GET_CODE (target) == SUBREG))
6292 {
6293 rtx object = assign_temp (type, 0, 1, 1);
6294 rtx blk_object = adjust_address (object, BLKmode, 0);
6295
6296 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
6297 emit_move_insn (object, target);
6298
6299 store_field (blk_object, bitsize, bitpos,
6300 bitregion_start, bitregion_end,
6301 mode, exp, type, alias_set, nontemporal);
6302
6303 emit_move_insn (target, object);
6304
6305 /* We want to return the BLKmode version of the data. */
6306 return blk_object;
6307 }
6308
6309 if (GET_CODE (target) == CONCAT)
6310 {
6311 /* We're storing into a struct containing a single __complex. */
6312
6313 gcc_assert (!bitpos);
6314 return store_expr (exp, target, 0, nontemporal);
6315 }
6316
6317 /* If the structure is in a register or if the component
6318 is a bit field, we cannot use addressing to access it.
6319 Use bit-field techniques or SUBREG to store in it. */
6320
6321 if (mode == VOIDmode
6322 || (mode != BLKmode && ! direct_store[(int) mode]
6323 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6324 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6325 || REG_P (target)
6326 || GET_CODE (target) == SUBREG
6327 /* If the field isn't aligned enough to store as an ordinary memref,
6328 store it as a bit field. */
6329 || (mode != BLKmode
6330 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6331 || bitpos % GET_MODE_ALIGNMENT (mode))
6332 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6333 || (bitpos % BITS_PER_UNIT != 0)))
6334 || (bitsize >= 0 && mode != BLKmode
6335 && GET_MODE_BITSIZE (mode) > bitsize)
6336 /* If the RHS and field are a constant size and the size of the
6337 RHS isn't the same size as the bitfield, we must use bitfield
6338 operations. */
6339 || (bitsize >= 0
6340 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6341 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6342 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6343 decl we must use bitfield operations. */
6344 || (bitsize >= 0
6345 && TREE_CODE (exp) == MEM_REF
6346 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6347 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6348 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6349 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6350 {
6351 rtx temp;
6352 gimple nop_def;
6353
6354 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6355 implies a mask operation. If the precision is the same size as
6356 the field we're storing into, that mask is redundant. This is
6357 particularly common with bit field assignments generated by the
6358 C front end. */
6359 nop_def = get_def_for_expr (exp, NOP_EXPR);
6360 if (nop_def)
6361 {
6362 tree type = TREE_TYPE (exp);
6363 if (INTEGRAL_TYPE_P (type)
6364 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6365 && bitsize == TYPE_PRECISION (type))
6366 {
6367 tree op = gimple_assign_rhs1 (nop_def);
6368 type = TREE_TYPE (op);
6369 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6370 exp = op;
6371 }
6372 }
6373
6374 temp = expand_normal (exp);
6375
6376 /* If BITSIZE is narrower than the size of the type of EXP
6377 we will be narrowing TEMP. Normally, what's wanted are the
6378 low-order bits. However, if EXP's type is a record and this is
6379 big-endian machine, we want the upper BITSIZE bits. */
6380 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6381 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6382 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6383 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6384 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6385 NULL_RTX, 1);
6386
6387 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
6388 MODE. */
6389 if (mode != VOIDmode && mode != BLKmode
6390 && mode != TYPE_MODE (TREE_TYPE (exp)))
6391 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6392
6393 /* If the modes of TEMP and TARGET are both BLKmode, both
6394 must be in memory and BITPOS must be aligned on a byte
6395 boundary. If so, we simply do a block copy. Likewise
6396 for a BLKmode-like TARGET. */
6397 if (GET_MODE (temp) == BLKmode
6398 && (GET_MODE (target) == BLKmode
6399 || (MEM_P (target)
6400 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6401 && (bitpos % BITS_PER_UNIT) == 0
6402 && (bitsize % BITS_PER_UNIT) == 0)))
6403 {
6404 gcc_assert (MEM_P (target) && MEM_P (temp)
6405 && (bitpos % BITS_PER_UNIT) == 0);
6406
6407 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6408 emit_block_move (target, temp,
6409 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6410 / BITS_PER_UNIT),
6411 BLOCK_OP_NORMAL);
6412
6413 return const0_rtx;
6414 }
6415
6416 /* Store the value in the bitfield. */
6417 store_bit_field (target, bitsize, bitpos,
6418 bitregion_start, bitregion_end,
6419 mode, temp);
6420
6421 return const0_rtx;
6422 }
6423 else
6424 {
6425 /* Now build a reference to just the desired component. */
6426 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6427
6428 if (to_rtx == target)
6429 to_rtx = copy_rtx (to_rtx);
6430
6431 if (!MEM_SCALAR_P (to_rtx))
6432 MEM_IN_STRUCT_P (to_rtx) = 1;
6433 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6434 set_mem_alias_set (to_rtx, alias_set);
6435
6436 return store_expr (exp, to_rtx, 0, nontemporal);
6437 }
6438 }
6439 \f
6440 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6441 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6442 codes and find the ultimate containing object, which we return.
6443
6444 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6445 bit position, and *PUNSIGNEDP to the signedness of the field.
6446 If the position of the field is variable, we store a tree
6447 giving the variable offset (in units) in *POFFSET.
6448 This offset is in addition to the bit position.
6449 If the position is not variable, we store 0 in *POFFSET.
6450
6451 If any of the extraction expressions is volatile,
6452 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6453
6454 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6455 Otherwise, it is a mode that can be used to access the field.
6456
6457 If the field describes a variable-sized object, *PMODE is set to
6458 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6459 this case, but the address of the object can be found.
6460
6461 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6462 look through nodes that serve as markers of a greater alignment than
6463 the one that can be deduced from the expression. These nodes make it
6464 possible for front-ends to prevent temporaries from being created by
6465 the middle-end on alignment considerations. For that purpose, the
6466 normal operating mode at high-level is to always pass FALSE so that
6467 the ultimate containing object is really returned; moreover, the
6468 associated predicate handled_component_p will always return TRUE
6469 on these nodes, thus indicating that they are essentially handled
6470 by get_inner_reference. TRUE should only be passed when the caller
6471 is scanning the expression in order to build another representation
6472 and specifically knows how to handle these nodes; as such, this is
6473 the normal operating mode in the RTL expanders. */
6474
6475 tree
6476 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6477 HOST_WIDE_INT *pbitpos, tree *poffset,
6478 enum machine_mode *pmode, int *punsignedp,
6479 int *pvolatilep, bool keep_aligning)
6480 {
6481 tree size_tree = 0;
6482 enum machine_mode mode = VOIDmode;
6483 bool blkmode_bitfield = false;
6484 tree offset = size_zero_node;
6485 double_int bit_offset = double_int_zero;
6486
6487 /* First get the mode, signedness, and size. We do this from just the
6488 outermost expression. */
6489 *pbitsize = -1;
6490 if (TREE_CODE (exp) == COMPONENT_REF)
6491 {
6492 tree field = TREE_OPERAND (exp, 1);
6493 size_tree = DECL_SIZE (field);
6494 if (!DECL_BIT_FIELD (field))
6495 mode = DECL_MODE (field);
6496 else if (DECL_MODE (field) == BLKmode)
6497 blkmode_bitfield = true;
6498 else if (TREE_THIS_VOLATILE (exp)
6499 && flag_strict_volatile_bitfields > 0)
6500 /* Volatile bitfields should be accessed in the mode of the
6501 field's type, not the mode computed based on the bit
6502 size. */
6503 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6504
6505 *punsignedp = DECL_UNSIGNED (field);
6506 }
6507 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6508 {
6509 size_tree = TREE_OPERAND (exp, 1);
6510 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6511 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6512
6513 /* For vector types, with the correct size of access, use the mode of
6514 inner type. */
6515 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6516 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6517 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6518 mode = TYPE_MODE (TREE_TYPE (exp));
6519 }
6520 else
6521 {
6522 mode = TYPE_MODE (TREE_TYPE (exp));
6523 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6524
6525 if (mode == BLKmode)
6526 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6527 else
6528 *pbitsize = GET_MODE_BITSIZE (mode);
6529 }
6530
6531 if (size_tree != 0)
6532 {
6533 if (! host_integerp (size_tree, 1))
6534 mode = BLKmode, *pbitsize = -1;
6535 else
6536 *pbitsize = tree_low_cst (size_tree, 1);
6537 }
6538
6539 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6540 and find the ultimate containing object. */
6541 while (1)
6542 {
6543 switch (TREE_CODE (exp))
6544 {
6545 case BIT_FIELD_REF:
6546 bit_offset
6547 = double_int_add (bit_offset,
6548 tree_to_double_int (TREE_OPERAND (exp, 2)));
6549 break;
6550
6551 case COMPONENT_REF:
6552 {
6553 tree field = TREE_OPERAND (exp, 1);
6554 tree this_offset = component_ref_field_offset (exp);
6555
6556 /* If this field hasn't been filled in yet, don't go past it.
6557 This should only happen when folding expressions made during
6558 type construction. */
6559 if (this_offset == 0)
6560 break;
6561
6562 offset = size_binop (PLUS_EXPR, offset, this_offset);
6563 bit_offset = double_int_add (bit_offset,
6564 tree_to_double_int
6565 (DECL_FIELD_BIT_OFFSET (field)));
6566
6567 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6568 }
6569 break;
6570
6571 case ARRAY_REF:
6572 case ARRAY_RANGE_REF:
6573 {
6574 tree index = TREE_OPERAND (exp, 1);
6575 tree low_bound = array_ref_low_bound (exp);
6576 tree unit_size = array_ref_element_size (exp);
6577
6578 /* We assume all arrays have sizes that are a multiple of a byte.
6579 First subtract the lower bound, if any, in the type of the
6580 index, then convert to sizetype and multiply by the size of
6581 the array element. */
6582 if (! integer_zerop (low_bound))
6583 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6584 index, low_bound);
6585
6586 offset = size_binop (PLUS_EXPR, offset,
6587 size_binop (MULT_EXPR,
6588 fold_convert (sizetype, index),
6589 unit_size));
6590 }
6591 break;
6592
6593 case REALPART_EXPR:
6594 break;
6595
6596 case IMAGPART_EXPR:
6597 bit_offset = double_int_add (bit_offset,
6598 uhwi_to_double_int (*pbitsize));
6599 break;
6600
6601 case VIEW_CONVERT_EXPR:
6602 if (keep_aligning && STRICT_ALIGNMENT
6603 && (TYPE_ALIGN (TREE_TYPE (exp))
6604 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6605 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6606 < BIGGEST_ALIGNMENT)
6607 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6608 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6609 goto done;
6610 break;
6611
6612 case MEM_REF:
6613 /* Hand back the decl for MEM[&decl, off]. */
6614 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6615 {
6616 tree off = TREE_OPERAND (exp, 1);
6617 if (!integer_zerop (off))
6618 {
6619 double_int boff, coff = mem_ref_offset (exp);
6620 boff = double_int_lshift (coff,
6621 BITS_PER_UNIT == 8
6622 ? 3 : exact_log2 (BITS_PER_UNIT),
6623 HOST_BITS_PER_DOUBLE_INT, true);
6624 bit_offset = double_int_add (bit_offset, boff);
6625 }
6626 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6627 }
6628 goto done;
6629
6630 default:
6631 goto done;
6632 }
6633
6634 /* If any reference in the chain is volatile, the effect is volatile. */
6635 if (TREE_THIS_VOLATILE (exp))
6636 *pvolatilep = 1;
6637
6638 exp = TREE_OPERAND (exp, 0);
6639 }
6640 done:
6641
6642 /* If OFFSET is constant, see if we can return the whole thing as a
6643 constant bit position. Make sure to handle overflow during
6644 this conversion. */
6645 if (TREE_CODE (offset) == INTEGER_CST)
6646 {
6647 double_int tem = tree_to_double_int (offset);
6648 tem = double_int_sext (tem, TYPE_PRECISION (sizetype));
6649 tem = double_int_lshift (tem,
6650 BITS_PER_UNIT == 8
6651 ? 3 : exact_log2 (BITS_PER_UNIT),
6652 HOST_BITS_PER_DOUBLE_INT, true);
6653 tem = double_int_add (tem, bit_offset);
6654 if (double_int_fits_in_shwi_p (tem))
6655 {
6656 *pbitpos = double_int_to_shwi (tem);
6657 *poffset = offset = NULL_TREE;
6658 }
6659 }
6660
6661 /* Otherwise, split it up. */
6662 if (offset)
6663 {
6664 *pbitpos = double_int_to_shwi (bit_offset);
6665 *poffset = offset;
6666 }
6667
6668 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6669 if (mode == VOIDmode
6670 && blkmode_bitfield
6671 && (*pbitpos % BITS_PER_UNIT) == 0
6672 && (*pbitsize % BITS_PER_UNIT) == 0)
6673 *pmode = BLKmode;
6674 else
6675 *pmode = mode;
6676
6677 return exp;
6678 }
6679
6680 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6681 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6682 EXP is marked as PACKED. */
6683
6684 bool
6685 contains_packed_reference (const_tree exp)
6686 {
6687 bool packed_p = false;
6688
6689 while (1)
6690 {
6691 switch (TREE_CODE (exp))
6692 {
6693 case COMPONENT_REF:
6694 {
6695 tree field = TREE_OPERAND (exp, 1);
6696 packed_p = DECL_PACKED (field)
6697 || TYPE_PACKED (TREE_TYPE (field))
6698 || TYPE_PACKED (TREE_TYPE (exp));
6699 if (packed_p)
6700 goto done;
6701 }
6702 break;
6703
6704 case BIT_FIELD_REF:
6705 case ARRAY_REF:
6706 case ARRAY_RANGE_REF:
6707 case REALPART_EXPR:
6708 case IMAGPART_EXPR:
6709 case VIEW_CONVERT_EXPR:
6710 break;
6711
6712 default:
6713 goto done;
6714 }
6715 exp = TREE_OPERAND (exp, 0);
6716 }
6717 done:
6718 return packed_p;
6719 }
6720
6721 /* Return a tree of sizetype representing the size, in bytes, of the element
6722 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6723
6724 tree
6725 array_ref_element_size (tree exp)
6726 {
6727 tree aligned_size = TREE_OPERAND (exp, 3);
6728 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6729 location_t loc = EXPR_LOCATION (exp);
6730
6731 /* If a size was specified in the ARRAY_REF, it's the size measured
6732 in alignment units of the element type. So multiply by that value. */
6733 if (aligned_size)
6734 {
6735 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6736 sizetype from another type of the same width and signedness. */
6737 if (TREE_TYPE (aligned_size) != sizetype)
6738 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6739 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6740 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6741 }
6742
6743 /* Otherwise, take the size from that of the element type. Substitute
6744 any PLACEHOLDER_EXPR that we have. */
6745 else
6746 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6747 }
6748
6749 /* Return a tree representing the lower bound of the array mentioned in
6750 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6751
6752 tree
6753 array_ref_low_bound (tree exp)
6754 {
6755 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6756
6757 /* If a lower bound is specified in EXP, use it. */
6758 if (TREE_OPERAND (exp, 2))
6759 return TREE_OPERAND (exp, 2);
6760
6761 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6762 substituting for a PLACEHOLDER_EXPR as needed. */
6763 if (domain_type && TYPE_MIN_VALUE (domain_type))
6764 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6765
6766 /* Otherwise, return a zero of the appropriate type. */
6767 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6768 }
6769
6770 /* Return a tree representing the upper bound of the array mentioned in
6771 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6772
6773 tree
6774 array_ref_up_bound (tree exp)
6775 {
6776 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6777
6778 /* If there is a domain type and it has an upper bound, use it, substituting
6779 for a PLACEHOLDER_EXPR as needed. */
6780 if (domain_type && TYPE_MAX_VALUE (domain_type))
6781 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6782
6783 /* Otherwise fail. */
6784 return NULL_TREE;
6785 }
6786
6787 /* Return a tree representing the offset, in bytes, of the field referenced
6788 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6789
6790 tree
6791 component_ref_field_offset (tree exp)
6792 {
6793 tree aligned_offset = TREE_OPERAND (exp, 2);
6794 tree field = TREE_OPERAND (exp, 1);
6795 location_t loc = EXPR_LOCATION (exp);
6796
6797 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6798 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6799 value. */
6800 if (aligned_offset)
6801 {
6802 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6803 sizetype from another type of the same width and signedness. */
6804 if (TREE_TYPE (aligned_offset) != sizetype)
6805 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6806 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6807 size_int (DECL_OFFSET_ALIGN (field)
6808 / BITS_PER_UNIT));
6809 }
6810
6811 /* Otherwise, take the offset from that of the field. Substitute
6812 any PLACEHOLDER_EXPR that we have. */
6813 else
6814 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6815 }
6816
6817 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6818
6819 static unsigned HOST_WIDE_INT
6820 target_align (const_tree target)
6821 {
6822 /* We might have a chain of nested references with intermediate misaligning
6823 bitfields components, so need to recurse to find out. */
6824
6825 unsigned HOST_WIDE_INT this_align, outer_align;
6826
6827 switch (TREE_CODE (target))
6828 {
6829 case BIT_FIELD_REF:
6830 return 1;
6831
6832 case COMPONENT_REF:
6833 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6834 outer_align = target_align (TREE_OPERAND (target, 0));
6835 return MIN (this_align, outer_align);
6836
6837 case ARRAY_REF:
6838 case ARRAY_RANGE_REF:
6839 this_align = TYPE_ALIGN (TREE_TYPE (target));
6840 outer_align = target_align (TREE_OPERAND (target, 0));
6841 return MIN (this_align, outer_align);
6842
6843 CASE_CONVERT:
6844 case NON_LVALUE_EXPR:
6845 case VIEW_CONVERT_EXPR:
6846 this_align = TYPE_ALIGN (TREE_TYPE (target));
6847 outer_align = target_align (TREE_OPERAND (target, 0));
6848 return MAX (this_align, outer_align);
6849
6850 default:
6851 return TYPE_ALIGN (TREE_TYPE (target));
6852 }
6853 }
6854
6855 \f
6856 /* Given an rtx VALUE that may contain additions and multiplications, return
6857 an equivalent value that just refers to a register, memory, or constant.
6858 This is done by generating instructions to perform the arithmetic and
6859 returning a pseudo-register containing the value.
6860
6861 The returned value may be a REG, SUBREG, MEM or constant. */
6862
6863 rtx
6864 force_operand (rtx value, rtx target)
6865 {
6866 rtx op1, op2;
6867 /* Use subtarget as the target for operand 0 of a binary operation. */
6868 rtx subtarget = get_subtarget (target);
6869 enum rtx_code code = GET_CODE (value);
6870
6871 /* Check for subreg applied to an expression produced by loop optimizer. */
6872 if (code == SUBREG
6873 && !REG_P (SUBREG_REG (value))
6874 && !MEM_P (SUBREG_REG (value)))
6875 {
6876 value
6877 = simplify_gen_subreg (GET_MODE (value),
6878 force_reg (GET_MODE (SUBREG_REG (value)),
6879 force_operand (SUBREG_REG (value),
6880 NULL_RTX)),
6881 GET_MODE (SUBREG_REG (value)),
6882 SUBREG_BYTE (value));
6883 code = GET_CODE (value);
6884 }
6885
6886 /* Check for a PIC address load. */
6887 if ((code == PLUS || code == MINUS)
6888 && XEXP (value, 0) == pic_offset_table_rtx
6889 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6890 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6891 || GET_CODE (XEXP (value, 1)) == CONST))
6892 {
6893 if (!subtarget)
6894 subtarget = gen_reg_rtx (GET_MODE (value));
6895 emit_move_insn (subtarget, value);
6896 return subtarget;
6897 }
6898
6899 if (ARITHMETIC_P (value))
6900 {
6901 op2 = XEXP (value, 1);
6902 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6903 subtarget = 0;
6904 if (code == MINUS && CONST_INT_P (op2))
6905 {
6906 code = PLUS;
6907 op2 = negate_rtx (GET_MODE (value), op2);
6908 }
6909
6910 /* Check for an addition with OP2 a constant integer and our first
6911 operand a PLUS of a virtual register and something else. In that
6912 case, we want to emit the sum of the virtual register and the
6913 constant first and then add the other value. This allows virtual
6914 register instantiation to simply modify the constant rather than
6915 creating another one around this addition. */
6916 if (code == PLUS && CONST_INT_P (op2)
6917 && GET_CODE (XEXP (value, 0)) == PLUS
6918 && REG_P (XEXP (XEXP (value, 0), 0))
6919 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6920 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6921 {
6922 rtx temp = expand_simple_binop (GET_MODE (value), code,
6923 XEXP (XEXP (value, 0), 0), op2,
6924 subtarget, 0, OPTAB_LIB_WIDEN);
6925 return expand_simple_binop (GET_MODE (value), code, temp,
6926 force_operand (XEXP (XEXP (value,
6927 0), 1), 0),
6928 target, 0, OPTAB_LIB_WIDEN);
6929 }
6930
6931 op1 = force_operand (XEXP (value, 0), subtarget);
6932 op2 = force_operand (op2, NULL_RTX);
6933 switch (code)
6934 {
6935 case MULT:
6936 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6937 case DIV:
6938 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6939 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6940 target, 1, OPTAB_LIB_WIDEN);
6941 else
6942 return expand_divmod (0,
6943 FLOAT_MODE_P (GET_MODE (value))
6944 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6945 GET_MODE (value), op1, op2, target, 0);
6946 case MOD:
6947 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6948 target, 0);
6949 case UDIV:
6950 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6951 target, 1);
6952 case UMOD:
6953 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6954 target, 1);
6955 case ASHIFTRT:
6956 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6957 target, 0, OPTAB_LIB_WIDEN);
6958 default:
6959 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6960 target, 1, OPTAB_LIB_WIDEN);
6961 }
6962 }
6963 if (UNARY_P (value))
6964 {
6965 if (!target)
6966 target = gen_reg_rtx (GET_MODE (value));
6967 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6968 switch (code)
6969 {
6970 case ZERO_EXTEND:
6971 case SIGN_EXTEND:
6972 case TRUNCATE:
6973 case FLOAT_EXTEND:
6974 case FLOAT_TRUNCATE:
6975 convert_move (target, op1, code == ZERO_EXTEND);
6976 return target;
6977
6978 case FIX:
6979 case UNSIGNED_FIX:
6980 expand_fix (target, op1, code == UNSIGNED_FIX);
6981 return target;
6982
6983 case FLOAT:
6984 case UNSIGNED_FLOAT:
6985 expand_float (target, op1, code == UNSIGNED_FLOAT);
6986 return target;
6987
6988 default:
6989 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
6990 }
6991 }
6992
6993 #ifdef INSN_SCHEDULING
6994 /* On machines that have insn scheduling, we want all memory reference to be
6995 explicit, so we need to deal with such paradoxical SUBREGs. */
6996 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
6997 value
6998 = simplify_gen_subreg (GET_MODE (value),
6999 force_reg (GET_MODE (SUBREG_REG (value)),
7000 force_operand (SUBREG_REG (value),
7001 NULL_RTX)),
7002 GET_MODE (SUBREG_REG (value)),
7003 SUBREG_BYTE (value));
7004 #endif
7005
7006 return value;
7007 }
7008 \f
7009 /* Subroutine of expand_expr: return nonzero iff there is no way that
7010 EXP can reference X, which is being modified. TOP_P is nonzero if this
7011 call is going to be used to determine whether we need a temporary
7012 for EXP, as opposed to a recursive call to this function.
7013
7014 It is always safe for this routine to return zero since it merely
7015 searches for optimization opportunities. */
7016
7017 int
7018 safe_from_p (const_rtx x, tree exp, int top_p)
7019 {
7020 rtx exp_rtl = 0;
7021 int i, nops;
7022
7023 if (x == 0
7024 /* If EXP has varying size, we MUST use a target since we currently
7025 have no way of allocating temporaries of variable size
7026 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7027 So we assume here that something at a higher level has prevented a
7028 clash. This is somewhat bogus, but the best we can do. Only
7029 do this when X is BLKmode and when we are at the top level. */
7030 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7031 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7032 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7033 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7034 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7035 != INTEGER_CST)
7036 && GET_MODE (x) == BLKmode)
7037 /* If X is in the outgoing argument area, it is always safe. */
7038 || (MEM_P (x)
7039 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7040 || (GET_CODE (XEXP (x, 0)) == PLUS
7041 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7042 return 1;
7043
7044 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7045 find the underlying pseudo. */
7046 if (GET_CODE (x) == SUBREG)
7047 {
7048 x = SUBREG_REG (x);
7049 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7050 return 0;
7051 }
7052
7053 /* Now look at our tree code and possibly recurse. */
7054 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7055 {
7056 case tcc_declaration:
7057 exp_rtl = DECL_RTL_IF_SET (exp);
7058 break;
7059
7060 case tcc_constant:
7061 return 1;
7062
7063 case tcc_exceptional:
7064 if (TREE_CODE (exp) == TREE_LIST)
7065 {
7066 while (1)
7067 {
7068 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7069 return 0;
7070 exp = TREE_CHAIN (exp);
7071 if (!exp)
7072 return 1;
7073 if (TREE_CODE (exp) != TREE_LIST)
7074 return safe_from_p (x, exp, 0);
7075 }
7076 }
7077 else if (TREE_CODE (exp) == CONSTRUCTOR)
7078 {
7079 constructor_elt *ce;
7080 unsigned HOST_WIDE_INT idx;
7081
7082 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
7083 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7084 || !safe_from_p (x, ce->value, 0))
7085 return 0;
7086 return 1;
7087 }
7088 else if (TREE_CODE (exp) == ERROR_MARK)
7089 return 1; /* An already-visited SAVE_EXPR? */
7090 else
7091 return 0;
7092
7093 case tcc_statement:
7094 /* The only case we look at here is the DECL_INITIAL inside a
7095 DECL_EXPR. */
7096 return (TREE_CODE (exp) != DECL_EXPR
7097 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7098 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7099 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7100
7101 case tcc_binary:
7102 case tcc_comparison:
7103 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7104 return 0;
7105 /* Fall through. */
7106
7107 case tcc_unary:
7108 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7109
7110 case tcc_expression:
7111 case tcc_reference:
7112 case tcc_vl_exp:
7113 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7114 the expression. If it is set, we conflict iff we are that rtx or
7115 both are in memory. Otherwise, we check all operands of the
7116 expression recursively. */
7117
7118 switch (TREE_CODE (exp))
7119 {
7120 case ADDR_EXPR:
7121 /* If the operand is static or we are static, we can't conflict.
7122 Likewise if we don't conflict with the operand at all. */
7123 if (staticp (TREE_OPERAND (exp, 0))
7124 || TREE_STATIC (exp)
7125 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7126 return 1;
7127
7128 /* Otherwise, the only way this can conflict is if we are taking
7129 the address of a DECL a that address if part of X, which is
7130 very rare. */
7131 exp = TREE_OPERAND (exp, 0);
7132 if (DECL_P (exp))
7133 {
7134 if (!DECL_RTL_SET_P (exp)
7135 || !MEM_P (DECL_RTL (exp)))
7136 return 0;
7137 else
7138 exp_rtl = XEXP (DECL_RTL (exp), 0);
7139 }
7140 break;
7141
7142 case MEM_REF:
7143 if (MEM_P (x)
7144 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7145 get_alias_set (exp)))
7146 return 0;
7147 break;
7148
7149 case CALL_EXPR:
7150 /* Assume that the call will clobber all hard registers and
7151 all of memory. */
7152 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7153 || MEM_P (x))
7154 return 0;
7155 break;
7156
7157 case WITH_CLEANUP_EXPR:
7158 case CLEANUP_POINT_EXPR:
7159 /* Lowered by gimplify.c. */
7160 gcc_unreachable ();
7161
7162 case SAVE_EXPR:
7163 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7164
7165 default:
7166 break;
7167 }
7168
7169 /* If we have an rtx, we do not need to scan our operands. */
7170 if (exp_rtl)
7171 break;
7172
7173 nops = TREE_OPERAND_LENGTH (exp);
7174 for (i = 0; i < nops; i++)
7175 if (TREE_OPERAND (exp, i) != 0
7176 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7177 return 0;
7178
7179 break;
7180
7181 case tcc_type:
7182 /* Should never get a type here. */
7183 gcc_unreachable ();
7184 }
7185
7186 /* If we have an rtl, find any enclosed object. Then see if we conflict
7187 with it. */
7188 if (exp_rtl)
7189 {
7190 if (GET_CODE (exp_rtl) == SUBREG)
7191 {
7192 exp_rtl = SUBREG_REG (exp_rtl);
7193 if (REG_P (exp_rtl)
7194 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7195 return 0;
7196 }
7197
7198 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7199 are memory and they conflict. */
7200 return ! (rtx_equal_p (x, exp_rtl)
7201 || (MEM_P (x) && MEM_P (exp_rtl)
7202 && true_dependence (exp_rtl, VOIDmode, x,
7203 rtx_addr_varies_p)));
7204 }
7205
7206 /* If we reach here, it is safe. */
7207 return 1;
7208 }
7209
7210 \f
7211 /* Return the highest power of two that EXP is known to be a multiple of.
7212 This is used in updating alignment of MEMs in array references. */
7213
7214 unsigned HOST_WIDE_INT
7215 highest_pow2_factor (const_tree exp)
7216 {
7217 unsigned HOST_WIDE_INT c0, c1;
7218
7219 switch (TREE_CODE (exp))
7220 {
7221 case INTEGER_CST:
7222 /* We can find the lowest bit that's a one. If the low
7223 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7224 We need to handle this case since we can find it in a COND_EXPR,
7225 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7226 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7227 later ICE. */
7228 if (TREE_OVERFLOW (exp))
7229 return BIGGEST_ALIGNMENT;
7230 else
7231 {
7232 /* Note: tree_low_cst is intentionally not used here,
7233 we don't care about the upper bits. */
7234 c0 = TREE_INT_CST_LOW (exp);
7235 c0 &= -c0;
7236 return c0 ? c0 : BIGGEST_ALIGNMENT;
7237 }
7238 break;
7239
7240 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7241 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7242 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7243 return MIN (c0, c1);
7244
7245 case MULT_EXPR:
7246 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7247 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7248 return c0 * c1;
7249
7250 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7251 case CEIL_DIV_EXPR:
7252 if (integer_pow2p (TREE_OPERAND (exp, 1))
7253 && host_integerp (TREE_OPERAND (exp, 1), 1))
7254 {
7255 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7256 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7257 return MAX (1, c0 / c1);
7258 }
7259 break;
7260
7261 case BIT_AND_EXPR:
7262 /* The highest power of two of a bit-and expression is the maximum of
7263 that of its operands. We typically get here for a complex LHS and
7264 a constant negative power of two on the RHS to force an explicit
7265 alignment, so don't bother looking at the LHS. */
7266 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7267
7268 CASE_CONVERT:
7269 case SAVE_EXPR:
7270 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7271
7272 case COMPOUND_EXPR:
7273 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7274
7275 case COND_EXPR:
7276 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7277 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7278 return MIN (c0, c1);
7279
7280 default:
7281 break;
7282 }
7283
7284 return 1;
7285 }
7286
7287 /* Similar, except that the alignment requirements of TARGET are
7288 taken into account. Assume it is at least as aligned as its
7289 type, unless it is a COMPONENT_REF in which case the layout of
7290 the structure gives the alignment. */
7291
7292 static unsigned HOST_WIDE_INT
7293 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7294 {
7295 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7296 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7297
7298 return MAX (factor, talign);
7299 }
7300 \f
7301 /* Subroutine of expand_expr. Expand the two operands of a binary
7302 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7303 The value may be stored in TARGET if TARGET is nonzero. The
7304 MODIFIER argument is as documented by expand_expr. */
7305
7306 static void
7307 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7308 enum expand_modifier modifier)
7309 {
7310 if (! safe_from_p (target, exp1, 1))
7311 target = 0;
7312 if (operand_equal_p (exp0, exp1, 0))
7313 {
7314 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7315 *op1 = copy_rtx (*op0);
7316 }
7317 else
7318 {
7319 /* If we need to preserve evaluation order, copy exp0 into its own
7320 temporary variable so that it can't be clobbered by exp1. */
7321 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7322 exp0 = save_expr (exp0);
7323 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7324 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7325 }
7326 }
7327
7328 \f
7329 /* Return a MEM that contains constant EXP. DEFER is as for
7330 output_constant_def and MODIFIER is as for expand_expr. */
7331
7332 static rtx
7333 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7334 {
7335 rtx mem;
7336
7337 mem = output_constant_def (exp, defer);
7338 if (modifier != EXPAND_INITIALIZER)
7339 mem = use_anchored_address (mem);
7340 return mem;
7341 }
7342
7343 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7344 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7345
7346 static rtx
7347 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7348 enum expand_modifier modifier, addr_space_t as)
7349 {
7350 rtx result, subtarget;
7351 tree inner, offset;
7352 HOST_WIDE_INT bitsize, bitpos;
7353 int volatilep, unsignedp;
7354 enum machine_mode mode1;
7355
7356 /* If we are taking the address of a constant and are at the top level,
7357 we have to use output_constant_def since we can't call force_const_mem
7358 at top level. */
7359 /* ??? This should be considered a front-end bug. We should not be
7360 generating ADDR_EXPR of something that isn't an LVALUE. The only
7361 exception here is STRING_CST. */
7362 if (CONSTANT_CLASS_P (exp))
7363 return XEXP (expand_expr_constant (exp, 0, modifier), 0);
7364
7365 /* Everything must be something allowed by is_gimple_addressable. */
7366 switch (TREE_CODE (exp))
7367 {
7368 case INDIRECT_REF:
7369 /* This case will happen via recursion for &a->b. */
7370 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7371
7372 case MEM_REF:
7373 {
7374 tree tem = TREE_OPERAND (exp, 0);
7375 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7376 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7377 return expand_expr (tem, target, tmode, modifier);
7378 }
7379
7380 case CONST_DECL:
7381 /* Expand the initializer like constants above. */
7382 return XEXP (expand_expr_constant (DECL_INITIAL (exp), 0, modifier), 0);
7383
7384 case REALPART_EXPR:
7385 /* The real part of the complex number is always first, therefore
7386 the address is the same as the address of the parent object. */
7387 offset = 0;
7388 bitpos = 0;
7389 inner = TREE_OPERAND (exp, 0);
7390 break;
7391
7392 case IMAGPART_EXPR:
7393 /* The imaginary part of the complex number is always second.
7394 The expression is therefore always offset by the size of the
7395 scalar type. */
7396 offset = 0;
7397 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7398 inner = TREE_OPERAND (exp, 0);
7399 break;
7400
7401 default:
7402 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7403 expand_expr, as that can have various side effects; LABEL_DECLs for
7404 example, may not have their DECL_RTL set yet. Expand the rtl of
7405 CONSTRUCTORs too, which should yield a memory reference for the
7406 constructor's contents. Assume language specific tree nodes can
7407 be expanded in some interesting way. */
7408 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7409 if (DECL_P (exp)
7410 || TREE_CODE (exp) == CONSTRUCTOR
7411 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7412 {
7413 result = expand_expr (exp, target, tmode,
7414 modifier == EXPAND_INITIALIZER
7415 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7416
7417 /* If the DECL isn't in memory, then the DECL wasn't properly
7418 marked TREE_ADDRESSABLE, which will be either a front-end
7419 or a tree optimizer bug. */
7420
7421 if (TREE_ADDRESSABLE (exp)
7422 && ! MEM_P (result)
7423 && ! targetm.calls.allocate_stack_slots_for_args())
7424 {
7425 error ("local frame unavailable (naked function?)");
7426 return result;
7427 }
7428 else
7429 gcc_assert (MEM_P (result));
7430 result = XEXP (result, 0);
7431
7432 /* ??? Is this needed anymore? */
7433 if (DECL_P (exp) && !TREE_USED (exp) == 0)
7434 {
7435 assemble_external (exp);
7436 TREE_USED (exp) = 1;
7437 }
7438
7439 if (modifier != EXPAND_INITIALIZER
7440 && modifier != EXPAND_CONST_ADDRESS
7441 && modifier != EXPAND_SUM)
7442 result = force_operand (result, target);
7443 return result;
7444 }
7445
7446 /* Pass FALSE as the last argument to get_inner_reference although
7447 we are expanding to RTL. The rationale is that we know how to
7448 handle "aligning nodes" here: we can just bypass them because
7449 they won't change the final object whose address will be returned
7450 (they actually exist only for that purpose). */
7451 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7452 &mode1, &unsignedp, &volatilep, false);
7453 break;
7454 }
7455
7456 /* We must have made progress. */
7457 gcc_assert (inner != exp);
7458
7459 subtarget = offset || bitpos ? NULL_RTX : target;
7460 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7461 inner alignment, force the inner to be sufficiently aligned. */
7462 if (CONSTANT_CLASS_P (inner)
7463 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7464 {
7465 inner = copy_node (inner);
7466 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7467 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7468 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7469 }
7470 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7471
7472 if (offset)
7473 {
7474 rtx tmp;
7475
7476 if (modifier != EXPAND_NORMAL)
7477 result = force_operand (result, NULL);
7478 tmp = expand_expr (offset, NULL_RTX, tmode,
7479 modifier == EXPAND_INITIALIZER
7480 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7481
7482 result = convert_memory_address_addr_space (tmode, result, as);
7483 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7484
7485 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7486 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7487 else
7488 {
7489 subtarget = bitpos ? NULL_RTX : target;
7490 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7491 1, OPTAB_LIB_WIDEN);
7492 }
7493 }
7494
7495 if (bitpos)
7496 {
7497 /* Someone beforehand should have rejected taking the address
7498 of such an object. */
7499 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7500
7501 result = plus_constant (result, bitpos / BITS_PER_UNIT);
7502 if (modifier < EXPAND_SUM)
7503 result = force_operand (result, target);
7504 }
7505
7506 return result;
7507 }
7508
7509 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7510 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7511
7512 static rtx
7513 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7514 enum expand_modifier modifier)
7515 {
7516 addr_space_t as = ADDR_SPACE_GENERIC;
7517 enum machine_mode address_mode = Pmode;
7518 enum machine_mode pointer_mode = ptr_mode;
7519 enum machine_mode rmode;
7520 rtx result;
7521
7522 /* Target mode of VOIDmode says "whatever's natural". */
7523 if (tmode == VOIDmode)
7524 tmode = TYPE_MODE (TREE_TYPE (exp));
7525
7526 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7527 {
7528 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7529 address_mode = targetm.addr_space.address_mode (as);
7530 pointer_mode = targetm.addr_space.pointer_mode (as);
7531 }
7532
7533 /* We can get called with some Weird Things if the user does silliness
7534 like "(short) &a". In that case, convert_memory_address won't do
7535 the right thing, so ignore the given target mode. */
7536 if (tmode != address_mode && tmode != pointer_mode)
7537 tmode = address_mode;
7538
7539 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7540 tmode, modifier, as);
7541
7542 /* Despite expand_expr claims concerning ignoring TMODE when not
7543 strictly convenient, stuff breaks if we don't honor it. Note
7544 that combined with the above, we only do this for pointer modes. */
7545 rmode = GET_MODE (result);
7546 if (rmode == VOIDmode)
7547 rmode = tmode;
7548 if (rmode != tmode)
7549 result = convert_memory_address_addr_space (tmode, result, as);
7550
7551 return result;
7552 }
7553
7554 /* Generate code for computing CONSTRUCTOR EXP.
7555 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7556 is TRUE, instead of creating a temporary variable in memory
7557 NULL is returned and the caller needs to handle it differently. */
7558
7559 static rtx
7560 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7561 bool avoid_temp_mem)
7562 {
7563 tree type = TREE_TYPE (exp);
7564 enum machine_mode mode = TYPE_MODE (type);
7565
7566 /* Try to avoid creating a temporary at all. This is possible
7567 if all of the initializer is zero.
7568 FIXME: try to handle all [0..255] initializers we can handle
7569 with memset. */
7570 if (TREE_STATIC (exp)
7571 && !TREE_ADDRESSABLE (exp)
7572 && target != 0 && mode == BLKmode
7573 && all_zeros_p (exp))
7574 {
7575 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7576 return target;
7577 }
7578
7579 /* All elts simple constants => refer to a constant in memory. But
7580 if this is a non-BLKmode mode, let it store a field at a time
7581 since that should make a CONST_INT or CONST_DOUBLE when we
7582 fold. Likewise, if we have a target we can use, it is best to
7583 store directly into the target unless the type is large enough
7584 that memcpy will be used. If we are making an initializer and
7585 all operands are constant, put it in memory as well.
7586
7587 FIXME: Avoid trying to fill vector constructors piece-meal.
7588 Output them with output_constant_def below unless we're sure
7589 they're zeros. This should go away when vector initializers
7590 are treated like VECTOR_CST instead of arrays. */
7591 if ((TREE_STATIC (exp)
7592 && ((mode == BLKmode
7593 && ! (target != 0 && safe_from_p (target, exp, 1)))
7594 || TREE_ADDRESSABLE (exp)
7595 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7596 && (! MOVE_BY_PIECES_P
7597 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7598 TYPE_ALIGN (type)))
7599 && ! mostly_zeros_p (exp))))
7600 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7601 && TREE_CONSTANT (exp)))
7602 {
7603 rtx constructor;
7604
7605 if (avoid_temp_mem)
7606 return NULL_RTX;
7607
7608 constructor = expand_expr_constant (exp, 1, modifier);
7609
7610 if (modifier != EXPAND_CONST_ADDRESS
7611 && modifier != EXPAND_INITIALIZER
7612 && modifier != EXPAND_SUM)
7613 constructor = validize_mem (constructor);
7614
7615 return constructor;
7616 }
7617
7618 /* Handle calls that pass values in multiple non-contiguous
7619 locations. The Irix 6 ABI has examples of this. */
7620 if (target == 0 || ! safe_from_p (target, exp, 1)
7621 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7622 {
7623 if (avoid_temp_mem)
7624 return NULL_RTX;
7625
7626 target
7627 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7628 | (TREE_READONLY (exp)
7629 * TYPE_QUAL_CONST))),
7630 0, TREE_ADDRESSABLE (exp), 1);
7631 }
7632
7633 store_constructor (exp, target, 0, int_expr_size (exp));
7634 return target;
7635 }
7636
7637
7638 /* expand_expr: generate code for computing expression EXP.
7639 An rtx for the computed value is returned. The value is never null.
7640 In the case of a void EXP, const0_rtx is returned.
7641
7642 The value may be stored in TARGET if TARGET is nonzero.
7643 TARGET is just a suggestion; callers must assume that
7644 the rtx returned may not be the same as TARGET.
7645
7646 If TARGET is CONST0_RTX, it means that the value will be ignored.
7647
7648 If TMODE is not VOIDmode, it suggests generating the
7649 result in mode TMODE. But this is done only when convenient.
7650 Otherwise, TMODE is ignored and the value generated in its natural mode.
7651 TMODE is just a suggestion; callers must assume that
7652 the rtx returned may not have mode TMODE.
7653
7654 Note that TARGET may have neither TMODE nor MODE. In that case, it
7655 probably will not be used.
7656
7657 If MODIFIER is EXPAND_SUM then when EXP is an addition
7658 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7659 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7660 products as above, or REG or MEM, or constant.
7661 Ordinarily in such cases we would output mul or add instructions
7662 and then return a pseudo reg containing the sum.
7663
7664 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7665 it also marks a label as absolutely required (it can't be dead).
7666 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7667 This is used for outputting expressions used in initializers.
7668
7669 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7670 with a constant address even if that address is not normally legitimate.
7671 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7672
7673 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7674 a call parameter. Such targets require special care as we haven't yet
7675 marked TARGET so that it's safe from being trashed by libcalls. We
7676 don't want to use TARGET for anything but the final result;
7677 Intermediate values must go elsewhere. Additionally, calls to
7678 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7679
7680 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7681 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7682 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7683 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7684 recursively. */
7685
7686 rtx
7687 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7688 enum expand_modifier modifier, rtx *alt_rtl)
7689 {
7690 rtx ret;
7691
7692 /* Handle ERROR_MARK before anybody tries to access its type. */
7693 if (TREE_CODE (exp) == ERROR_MARK
7694 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7695 {
7696 ret = CONST0_RTX (tmode);
7697 return ret ? ret : const0_rtx;
7698 }
7699
7700 /* If this is an expression of some kind and it has an associated line
7701 number, then emit the line number before expanding the expression.
7702
7703 We need to save and restore the file and line information so that
7704 errors discovered during expansion are emitted with the right
7705 information. It would be better of the diagnostic routines
7706 used the file/line information embedded in the tree nodes rather
7707 than globals. */
7708 if (cfun && EXPR_HAS_LOCATION (exp))
7709 {
7710 location_t saved_location = input_location;
7711 location_t saved_curr_loc = get_curr_insn_source_location ();
7712 tree saved_block = get_curr_insn_block ();
7713 input_location = EXPR_LOCATION (exp);
7714 set_curr_insn_source_location (input_location);
7715
7716 /* Record where the insns produced belong. */
7717 set_curr_insn_block (TREE_BLOCK (exp));
7718
7719 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7720
7721 input_location = saved_location;
7722 set_curr_insn_block (saved_block);
7723 set_curr_insn_source_location (saved_curr_loc);
7724 }
7725 else
7726 {
7727 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7728 }
7729
7730 return ret;
7731 }
7732
7733 rtx
7734 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7735 enum expand_modifier modifier)
7736 {
7737 rtx op0, op1, op2, temp;
7738 tree type;
7739 int unsignedp;
7740 enum machine_mode mode;
7741 enum tree_code code = ops->code;
7742 optab this_optab;
7743 rtx subtarget, original_target;
7744 int ignore;
7745 bool reduce_bit_field;
7746 location_t loc = ops->location;
7747 tree treeop0, treeop1, treeop2;
7748 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7749 ? reduce_to_bit_field_precision ((expr), \
7750 target, \
7751 type) \
7752 : (expr))
7753
7754 type = ops->type;
7755 mode = TYPE_MODE (type);
7756 unsignedp = TYPE_UNSIGNED (type);
7757
7758 treeop0 = ops->op0;
7759 treeop1 = ops->op1;
7760 treeop2 = ops->op2;
7761
7762 /* We should be called only on simple (binary or unary) expressions,
7763 exactly those that are valid in gimple expressions that aren't
7764 GIMPLE_SINGLE_RHS (or invalid). */
7765 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7766 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7767 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7768
7769 ignore = (target == const0_rtx
7770 || ((CONVERT_EXPR_CODE_P (code)
7771 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7772 && TREE_CODE (type) == VOID_TYPE));
7773
7774 /* We should be called only if we need the result. */
7775 gcc_assert (!ignore);
7776
7777 /* An operation in what may be a bit-field type needs the
7778 result to be reduced to the precision of the bit-field type,
7779 which is narrower than that of the type's mode. */
7780 reduce_bit_field = (INTEGRAL_TYPE_P (type)
7781 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7782
7783 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7784 target = 0;
7785
7786 /* Use subtarget as the target for operand 0 of a binary operation. */
7787 subtarget = get_subtarget (target);
7788 original_target = target;
7789
7790 switch (code)
7791 {
7792 case NON_LVALUE_EXPR:
7793 case PAREN_EXPR:
7794 CASE_CONVERT:
7795 if (treeop0 == error_mark_node)
7796 return const0_rtx;
7797
7798 if (TREE_CODE (type) == UNION_TYPE)
7799 {
7800 tree valtype = TREE_TYPE (treeop0);
7801
7802 /* If both input and output are BLKmode, this conversion isn't doing
7803 anything except possibly changing memory attribute. */
7804 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7805 {
7806 rtx result = expand_expr (treeop0, target, tmode,
7807 modifier);
7808
7809 result = copy_rtx (result);
7810 set_mem_attributes (result, type, 0);
7811 return result;
7812 }
7813
7814 if (target == 0)
7815 {
7816 if (TYPE_MODE (type) != BLKmode)
7817 target = gen_reg_rtx (TYPE_MODE (type));
7818 else
7819 target = assign_temp (type, 0, 1, 1);
7820 }
7821
7822 if (MEM_P (target))
7823 /* Store data into beginning of memory target. */
7824 store_expr (treeop0,
7825 adjust_address (target, TYPE_MODE (valtype), 0),
7826 modifier == EXPAND_STACK_PARM,
7827 false);
7828
7829 else
7830 {
7831 gcc_assert (REG_P (target));
7832
7833 /* Store this field into a union of the proper type. */
7834 store_field (target,
7835 MIN ((int_size_in_bytes (TREE_TYPE
7836 (treeop0))
7837 * BITS_PER_UNIT),
7838 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7839 0, 0, 0, TYPE_MODE (valtype), treeop0,
7840 type, 0, false);
7841 }
7842
7843 /* Return the entire union. */
7844 return target;
7845 }
7846
7847 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
7848 {
7849 op0 = expand_expr (treeop0, target, VOIDmode,
7850 modifier);
7851
7852 /* If the signedness of the conversion differs and OP0 is
7853 a promoted SUBREG, clear that indication since we now
7854 have to do the proper extension. */
7855 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
7856 && GET_CODE (op0) == SUBREG)
7857 SUBREG_PROMOTED_VAR_P (op0) = 0;
7858
7859 return REDUCE_BIT_FIELD (op0);
7860 }
7861
7862 op0 = expand_expr (treeop0, NULL_RTX, mode,
7863 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
7864 if (GET_MODE (op0) == mode)
7865 ;
7866
7867 /* If OP0 is a constant, just convert it into the proper mode. */
7868 else if (CONSTANT_P (op0))
7869 {
7870 tree inner_type = TREE_TYPE (treeop0);
7871 enum machine_mode inner_mode = GET_MODE (op0);
7872
7873 if (inner_mode == VOIDmode)
7874 inner_mode = TYPE_MODE (inner_type);
7875
7876 if (modifier == EXPAND_INITIALIZER)
7877 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7878 subreg_lowpart_offset (mode,
7879 inner_mode));
7880 else
7881 op0= convert_modes (mode, inner_mode, op0,
7882 TYPE_UNSIGNED (inner_type));
7883 }
7884
7885 else if (modifier == EXPAND_INITIALIZER)
7886 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7887
7888 else if (target == 0)
7889 op0 = convert_to_mode (mode, op0,
7890 TYPE_UNSIGNED (TREE_TYPE
7891 (treeop0)));
7892 else
7893 {
7894 convert_move (target, op0,
7895 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7896 op0 = target;
7897 }
7898
7899 return REDUCE_BIT_FIELD (op0);
7900
7901 case ADDR_SPACE_CONVERT_EXPR:
7902 {
7903 tree treeop0_type = TREE_TYPE (treeop0);
7904 addr_space_t as_to;
7905 addr_space_t as_from;
7906
7907 gcc_assert (POINTER_TYPE_P (type));
7908 gcc_assert (POINTER_TYPE_P (treeop0_type));
7909
7910 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
7911 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
7912
7913 /* Conversions between pointers to the same address space should
7914 have been implemented via CONVERT_EXPR / NOP_EXPR. */
7915 gcc_assert (as_to != as_from);
7916
7917 /* Ask target code to handle conversion between pointers
7918 to overlapping address spaces. */
7919 if (targetm.addr_space.subset_p (as_to, as_from)
7920 || targetm.addr_space.subset_p (as_from, as_to))
7921 {
7922 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
7923 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
7924 gcc_assert (op0);
7925 return op0;
7926 }
7927
7928 /* For disjoint address spaces, converting anything but
7929 a null pointer invokes undefined behaviour. We simply
7930 always return a null pointer here. */
7931 return CONST0_RTX (mode);
7932 }
7933
7934 case POINTER_PLUS_EXPR:
7935 /* Even though the sizetype mode and the pointer's mode can be different
7936 expand is able to handle this correctly and get the correct result out
7937 of the PLUS_EXPR code. */
7938 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
7939 if sizetype precision is smaller than pointer precision. */
7940 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
7941 treeop1 = fold_convert_loc (loc, type,
7942 fold_convert_loc (loc, ssizetype,
7943 treeop1));
7944 case PLUS_EXPR:
7945 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7946 something else, make sure we add the register to the constant and
7947 then to the other thing. This case can occur during strength
7948 reduction and doing it this way will produce better code if the
7949 frame pointer or argument pointer is eliminated.
7950
7951 fold-const.c will ensure that the constant is always in the inner
7952 PLUS_EXPR, so the only case we need to do anything about is if
7953 sp, ap, or fp is our second argument, in which case we must swap
7954 the innermost first argument and our second argument. */
7955
7956 if (TREE_CODE (treeop0) == PLUS_EXPR
7957 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
7958 && TREE_CODE (treeop1) == VAR_DECL
7959 && (DECL_RTL (treeop1) == frame_pointer_rtx
7960 || DECL_RTL (treeop1) == stack_pointer_rtx
7961 || DECL_RTL (treeop1) == arg_pointer_rtx))
7962 {
7963 tree t = treeop1;
7964
7965 treeop1 = TREE_OPERAND (treeop0, 0);
7966 TREE_OPERAND (treeop0, 0) = t;
7967 }
7968
7969 /* If the result is to be ptr_mode and we are adding an integer to
7970 something, we might be forming a constant. So try to use
7971 plus_constant. If it produces a sum and we can't accept it,
7972 use force_operand. This allows P = &ARR[const] to generate
7973 efficient code on machines where a SYMBOL_REF is not a valid
7974 address.
7975
7976 If this is an EXPAND_SUM call, always return the sum. */
7977 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7978 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
7979 {
7980 if (modifier == EXPAND_STACK_PARM)
7981 target = 0;
7982 if (TREE_CODE (treeop0) == INTEGER_CST
7983 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7984 && TREE_CONSTANT (treeop1))
7985 {
7986 rtx constant_part;
7987
7988 op1 = expand_expr (treeop1, subtarget, VOIDmode,
7989 EXPAND_SUM);
7990 /* Use immed_double_const to ensure that the constant is
7991 truncated according to the mode of OP1, then sign extended
7992 to a HOST_WIDE_INT. Using the constant directly can result
7993 in non-canonical RTL in a 64x32 cross compile. */
7994 constant_part
7995 = immed_double_const (TREE_INT_CST_LOW (treeop0),
7996 (HOST_WIDE_INT) 0,
7997 TYPE_MODE (TREE_TYPE (treeop1)));
7998 op1 = plus_constant (op1, INTVAL (constant_part));
7999 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8000 op1 = force_operand (op1, target);
8001 return REDUCE_BIT_FIELD (op1);
8002 }
8003
8004 else if (TREE_CODE (treeop1) == INTEGER_CST
8005 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8006 && TREE_CONSTANT (treeop0))
8007 {
8008 rtx constant_part;
8009
8010 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8011 (modifier == EXPAND_INITIALIZER
8012 ? EXPAND_INITIALIZER : EXPAND_SUM));
8013 if (! CONSTANT_P (op0))
8014 {
8015 op1 = expand_expr (treeop1, NULL_RTX,
8016 VOIDmode, modifier);
8017 /* Return a PLUS if modifier says it's OK. */
8018 if (modifier == EXPAND_SUM
8019 || modifier == EXPAND_INITIALIZER)
8020 return simplify_gen_binary (PLUS, mode, op0, op1);
8021 goto binop2;
8022 }
8023 /* Use immed_double_const to ensure that the constant is
8024 truncated according to the mode of OP1, then sign extended
8025 to a HOST_WIDE_INT. Using the constant directly can result
8026 in non-canonical RTL in a 64x32 cross compile. */
8027 constant_part
8028 = immed_double_const (TREE_INT_CST_LOW (treeop1),
8029 (HOST_WIDE_INT) 0,
8030 TYPE_MODE (TREE_TYPE (treeop0)));
8031 op0 = plus_constant (op0, INTVAL (constant_part));
8032 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8033 op0 = force_operand (op0, target);
8034 return REDUCE_BIT_FIELD (op0);
8035 }
8036 }
8037
8038 /* Use TER to expand pointer addition of a negated value
8039 as pointer subtraction. */
8040 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8041 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8042 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8043 && TREE_CODE (treeop1) == SSA_NAME
8044 && TYPE_MODE (TREE_TYPE (treeop0))
8045 == TYPE_MODE (TREE_TYPE (treeop1)))
8046 {
8047 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8048 if (def)
8049 {
8050 treeop1 = gimple_assign_rhs1 (def);
8051 code = MINUS_EXPR;
8052 goto do_minus;
8053 }
8054 }
8055
8056 /* No sense saving up arithmetic to be done
8057 if it's all in the wrong mode to form part of an address.
8058 And force_operand won't know whether to sign-extend or
8059 zero-extend. */
8060 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8061 || mode != ptr_mode)
8062 {
8063 expand_operands (treeop0, treeop1,
8064 subtarget, &op0, &op1, EXPAND_NORMAL);
8065 if (op0 == const0_rtx)
8066 return op1;
8067 if (op1 == const0_rtx)
8068 return op0;
8069 goto binop2;
8070 }
8071
8072 expand_operands (treeop0, treeop1,
8073 subtarget, &op0, &op1, modifier);
8074 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8075
8076 case MINUS_EXPR:
8077 do_minus:
8078 /* For initializers, we are allowed to return a MINUS of two
8079 symbolic constants. Here we handle all cases when both operands
8080 are constant. */
8081 /* Handle difference of two symbolic constants,
8082 for the sake of an initializer. */
8083 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8084 && really_constant_p (treeop0)
8085 && really_constant_p (treeop1))
8086 {
8087 expand_operands (treeop0, treeop1,
8088 NULL_RTX, &op0, &op1, modifier);
8089
8090 /* If the last operand is a CONST_INT, use plus_constant of
8091 the negated constant. Else make the MINUS. */
8092 if (CONST_INT_P (op1))
8093 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
8094 else
8095 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8096 }
8097
8098 /* No sense saving up arithmetic to be done
8099 if it's all in the wrong mode to form part of an address.
8100 And force_operand won't know whether to sign-extend or
8101 zero-extend. */
8102 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8103 || mode != ptr_mode)
8104 goto binop;
8105
8106 expand_operands (treeop0, treeop1,
8107 subtarget, &op0, &op1, modifier);
8108
8109 /* Convert A - const to A + (-const). */
8110 if (CONST_INT_P (op1))
8111 {
8112 op1 = negate_rtx (mode, op1);
8113 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8114 }
8115
8116 goto binop2;
8117
8118 case WIDEN_MULT_PLUS_EXPR:
8119 case WIDEN_MULT_MINUS_EXPR:
8120 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8121 op2 = expand_normal (treeop2);
8122 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8123 target, unsignedp);
8124 return target;
8125
8126 case WIDEN_MULT_EXPR:
8127 /* If first operand is constant, swap them.
8128 Thus the following special case checks need only
8129 check the second operand. */
8130 if (TREE_CODE (treeop0) == INTEGER_CST)
8131 {
8132 tree t1 = treeop0;
8133 treeop0 = treeop1;
8134 treeop1 = t1;
8135 }
8136
8137 /* First, check if we have a multiplication of one signed and one
8138 unsigned operand. */
8139 if (TREE_CODE (treeop1) != INTEGER_CST
8140 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8141 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8142 {
8143 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8144 this_optab = usmul_widen_optab;
8145 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8146 != CODE_FOR_nothing)
8147 {
8148 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8149 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8150 EXPAND_NORMAL);
8151 else
8152 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8153 EXPAND_NORMAL);
8154 goto binop3;
8155 }
8156 }
8157 /* Check for a multiplication with matching signedness. */
8158 else if ((TREE_CODE (treeop1) == INTEGER_CST
8159 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8160 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8161 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8162 {
8163 tree op0type = TREE_TYPE (treeop0);
8164 enum machine_mode innermode = TYPE_MODE (op0type);
8165 bool zextend_p = TYPE_UNSIGNED (op0type);
8166 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8167 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8168
8169 if (TREE_CODE (treeop0) != INTEGER_CST)
8170 {
8171 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8172 != CODE_FOR_nothing)
8173 {
8174 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8175 EXPAND_NORMAL);
8176 temp = expand_widening_mult (mode, op0, op1, target,
8177 unsignedp, this_optab);
8178 return REDUCE_BIT_FIELD (temp);
8179 }
8180 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8181 != CODE_FOR_nothing
8182 && innermode == word_mode)
8183 {
8184 rtx htem, hipart;
8185 op0 = expand_normal (treeop0);
8186 if (TREE_CODE (treeop1) == INTEGER_CST)
8187 op1 = convert_modes (innermode, mode,
8188 expand_normal (treeop1), unsignedp);
8189 else
8190 op1 = expand_normal (treeop1);
8191 temp = expand_binop (mode, other_optab, op0, op1, target,
8192 unsignedp, OPTAB_LIB_WIDEN);
8193 hipart = gen_highpart (innermode, temp);
8194 htem = expand_mult_highpart_adjust (innermode, hipart,
8195 op0, op1, hipart,
8196 zextend_p);
8197 if (htem != hipart)
8198 emit_move_insn (hipart, htem);
8199 return REDUCE_BIT_FIELD (temp);
8200 }
8201 }
8202 }
8203 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8204 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8205 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8206 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8207
8208 case FMA_EXPR:
8209 {
8210 optab opt = fma_optab;
8211 gimple def0, def2;
8212
8213 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8214 call. */
8215 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8216 {
8217 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8218 tree call_expr;
8219
8220 gcc_assert (fn != NULL_TREE);
8221 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8222 return expand_builtin (call_expr, target, subtarget, mode, false);
8223 }
8224
8225 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8226 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8227
8228 op0 = op2 = NULL;
8229
8230 if (def0 && def2
8231 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8232 {
8233 opt = fnms_optab;
8234 op0 = expand_normal (gimple_assign_rhs1 (def0));
8235 op2 = expand_normal (gimple_assign_rhs1 (def2));
8236 }
8237 else if (def0
8238 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8239 {
8240 opt = fnma_optab;
8241 op0 = expand_normal (gimple_assign_rhs1 (def0));
8242 }
8243 else if (def2
8244 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8245 {
8246 opt = fms_optab;
8247 op2 = expand_normal (gimple_assign_rhs1 (def2));
8248 }
8249
8250 if (op0 == NULL)
8251 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8252 if (op2 == NULL)
8253 op2 = expand_normal (treeop2);
8254 op1 = expand_normal (treeop1);
8255
8256 return expand_ternary_op (TYPE_MODE (type), opt,
8257 op0, op1, op2, target, 0);
8258 }
8259
8260 case MULT_EXPR:
8261 /* If this is a fixed-point operation, then we cannot use the code
8262 below because "expand_mult" doesn't support sat/no-sat fixed-point
8263 multiplications. */
8264 if (ALL_FIXED_POINT_MODE_P (mode))
8265 goto binop;
8266
8267 /* If first operand is constant, swap them.
8268 Thus the following special case checks need only
8269 check the second operand. */
8270 if (TREE_CODE (treeop0) == INTEGER_CST)
8271 {
8272 tree t1 = treeop0;
8273 treeop0 = treeop1;
8274 treeop1 = t1;
8275 }
8276
8277 /* Attempt to return something suitable for generating an
8278 indexed address, for machines that support that. */
8279
8280 if (modifier == EXPAND_SUM && mode == ptr_mode
8281 && host_integerp (treeop1, 0))
8282 {
8283 tree exp1 = treeop1;
8284
8285 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8286 EXPAND_SUM);
8287
8288 if (!REG_P (op0))
8289 op0 = force_operand (op0, NULL_RTX);
8290 if (!REG_P (op0))
8291 op0 = copy_to_mode_reg (mode, op0);
8292
8293 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8294 gen_int_mode (tree_low_cst (exp1, 0),
8295 TYPE_MODE (TREE_TYPE (exp1)))));
8296 }
8297
8298 if (modifier == EXPAND_STACK_PARM)
8299 target = 0;
8300
8301 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8302 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8303
8304 case TRUNC_DIV_EXPR:
8305 case FLOOR_DIV_EXPR:
8306 case CEIL_DIV_EXPR:
8307 case ROUND_DIV_EXPR:
8308 case EXACT_DIV_EXPR:
8309 /* If this is a fixed-point operation, then we cannot use the code
8310 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8311 divisions. */
8312 if (ALL_FIXED_POINT_MODE_P (mode))
8313 goto binop;
8314
8315 if (modifier == EXPAND_STACK_PARM)
8316 target = 0;
8317 /* Possible optimization: compute the dividend with EXPAND_SUM
8318 then if the divisor is constant can optimize the case
8319 where some terms of the dividend have coeffs divisible by it. */
8320 expand_operands (treeop0, treeop1,
8321 subtarget, &op0, &op1, EXPAND_NORMAL);
8322 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8323
8324 case RDIV_EXPR:
8325 goto binop;
8326
8327 case TRUNC_MOD_EXPR:
8328 case FLOOR_MOD_EXPR:
8329 case CEIL_MOD_EXPR:
8330 case ROUND_MOD_EXPR:
8331 if (modifier == EXPAND_STACK_PARM)
8332 target = 0;
8333 expand_operands (treeop0, treeop1,
8334 subtarget, &op0, &op1, EXPAND_NORMAL);
8335 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8336
8337 case FIXED_CONVERT_EXPR:
8338 op0 = expand_normal (treeop0);
8339 if (target == 0 || modifier == EXPAND_STACK_PARM)
8340 target = gen_reg_rtx (mode);
8341
8342 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8343 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8344 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8345 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8346 else
8347 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8348 return target;
8349
8350 case FIX_TRUNC_EXPR:
8351 op0 = expand_normal (treeop0);
8352 if (target == 0 || modifier == EXPAND_STACK_PARM)
8353 target = gen_reg_rtx (mode);
8354 expand_fix (target, op0, unsignedp);
8355 return target;
8356
8357 case FLOAT_EXPR:
8358 op0 = expand_normal (treeop0);
8359 if (target == 0 || modifier == EXPAND_STACK_PARM)
8360 target = gen_reg_rtx (mode);
8361 /* expand_float can't figure out what to do if FROM has VOIDmode.
8362 So give it the correct mode. With -O, cse will optimize this. */
8363 if (GET_MODE (op0) == VOIDmode)
8364 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8365 op0);
8366 expand_float (target, op0,
8367 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8368 return target;
8369
8370 case NEGATE_EXPR:
8371 op0 = expand_expr (treeop0, subtarget,
8372 VOIDmode, EXPAND_NORMAL);
8373 if (modifier == EXPAND_STACK_PARM)
8374 target = 0;
8375 temp = expand_unop (mode,
8376 optab_for_tree_code (NEGATE_EXPR, type,
8377 optab_default),
8378 op0, target, 0);
8379 gcc_assert (temp);
8380 return REDUCE_BIT_FIELD (temp);
8381
8382 case ABS_EXPR:
8383 op0 = expand_expr (treeop0, subtarget,
8384 VOIDmode, EXPAND_NORMAL);
8385 if (modifier == EXPAND_STACK_PARM)
8386 target = 0;
8387
8388 /* ABS_EXPR is not valid for complex arguments. */
8389 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8390 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8391
8392 /* Unsigned abs is simply the operand. Testing here means we don't
8393 risk generating incorrect code below. */
8394 if (TYPE_UNSIGNED (type))
8395 return op0;
8396
8397 return expand_abs (mode, op0, target, unsignedp,
8398 safe_from_p (target, treeop0, 1));
8399
8400 case MAX_EXPR:
8401 case MIN_EXPR:
8402 target = original_target;
8403 if (target == 0
8404 || modifier == EXPAND_STACK_PARM
8405 || (MEM_P (target) && MEM_VOLATILE_P (target))
8406 || GET_MODE (target) != mode
8407 || (REG_P (target)
8408 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8409 target = gen_reg_rtx (mode);
8410 expand_operands (treeop0, treeop1,
8411 target, &op0, &op1, EXPAND_NORMAL);
8412
8413 /* First try to do it with a special MIN or MAX instruction.
8414 If that does not win, use a conditional jump to select the proper
8415 value. */
8416 this_optab = optab_for_tree_code (code, type, optab_default);
8417 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8418 OPTAB_WIDEN);
8419 if (temp != 0)
8420 return temp;
8421
8422 /* At this point, a MEM target is no longer useful; we will get better
8423 code without it. */
8424
8425 if (! REG_P (target))
8426 target = gen_reg_rtx (mode);
8427
8428 /* If op1 was placed in target, swap op0 and op1. */
8429 if (target != op0 && target == op1)
8430 {
8431 temp = op0;
8432 op0 = op1;
8433 op1 = temp;
8434 }
8435
8436 /* We generate better code and avoid problems with op1 mentioning
8437 target by forcing op1 into a pseudo if it isn't a constant. */
8438 if (! CONSTANT_P (op1))
8439 op1 = force_reg (mode, op1);
8440
8441 {
8442 enum rtx_code comparison_code;
8443 rtx cmpop1 = op1;
8444
8445 if (code == MAX_EXPR)
8446 comparison_code = unsignedp ? GEU : GE;
8447 else
8448 comparison_code = unsignedp ? LEU : LE;
8449
8450 /* Canonicalize to comparisons against 0. */
8451 if (op1 == const1_rtx)
8452 {
8453 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8454 or (a != 0 ? a : 1) for unsigned.
8455 For MIN we are safe converting (a <= 1 ? a : 1)
8456 into (a <= 0 ? a : 1) */
8457 cmpop1 = const0_rtx;
8458 if (code == MAX_EXPR)
8459 comparison_code = unsignedp ? NE : GT;
8460 }
8461 if (op1 == constm1_rtx && !unsignedp)
8462 {
8463 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8464 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8465 cmpop1 = const0_rtx;
8466 if (code == MIN_EXPR)
8467 comparison_code = LT;
8468 }
8469 #ifdef HAVE_conditional_move
8470 /* Use a conditional move if possible. */
8471 if (can_conditionally_move_p (mode))
8472 {
8473 rtx insn;
8474
8475 /* ??? Same problem as in expmed.c: emit_conditional_move
8476 forces a stack adjustment via compare_from_rtx, and we
8477 lose the stack adjustment if the sequence we are about
8478 to create is discarded. */
8479 do_pending_stack_adjust ();
8480
8481 start_sequence ();
8482
8483 /* Try to emit the conditional move. */
8484 insn = emit_conditional_move (target, comparison_code,
8485 op0, cmpop1, mode,
8486 op0, op1, mode,
8487 unsignedp);
8488
8489 /* If we could do the conditional move, emit the sequence,
8490 and return. */
8491 if (insn)
8492 {
8493 rtx seq = get_insns ();
8494 end_sequence ();
8495 emit_insn (seq);
8496 return target;
8497 }
8498
8499 /* Otherwise discard the sequence and fall back to code with
8500 branches. */
8501 end_sequence ();
8502 }
8503 #endif
8504 if (target != op0)
8505 emit_move_insn (target, op0);
8506
8507 temp = gen_label_rtx ();
8508 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8509 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8510 -1);
8511 }
8512 emit_move_insn (target, op1);
8513 emit_label (temp);
8514 return target;
8515
8516 case BIT_NOT_EXPR:
8517 op0 = expand_expr (treeop0, subtarget,
8518 VOIDmode, EXPAND_NORMAL);
8519 if (modifier == EXPAND_STACK_PARM)
8520 target = 0;
8521 /* In case we have to reduce the result to bitfield precision
8522 expand this as XOR with a proper constant instead. */
8523 if (reduce_bit_field)
8524 temp = expand_binop (mode, xor_optab, op0,
8525 immed_double_int_const
8526 (double_int_mask (TYPE_PRECISION (type)), mode),
8527 target, 1, OPTAB_LIB_WIDEN);
8528 else
8529 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8530 gcc_assert (temp);
8531 return temp;
8532
8533 /* ??? Can optimize bitwise operations with one arg constant.
8534 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8535 and (a bitwise1 b) bitwise2 b (etc)
8536 but that is probably not worth while. */
8537
8538 case BIT_AND_EXPR:
8539 case BIT_IOR_EXPR:
8540 case BIT_XOR_EXPR:
8541 goto binop;
8542
8543 case LROTATE_EXPR:
8544 case RROTATE_EXPR:
8545 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8546 || (GET_MODE_PRECISION (TYPE_MODE (type))
8547 == TYPE_PRECISION (type)));
8548 /* fall through */
8549
8550 case LSHIFT_EXPR:
8551 case RSHIFT_EXPR:
8552 /* If this is a fixed-point operation, then we cannot use the code
8553 below because "expand_shift" doesn't support sat/no-sat fixed-point
8554 shifts. */
8555 if (ALL_FIXED_POINT_MODE_P (mode))
8556 goto binop;
8557
8558 if (! safe_from_p (subtarget, treeop1, 1))
8559 subtarget = 0;
8560 if (modifier == EXPAND_STACK_PARM)
8561 target = 0;
8562 op0 = expand_expr (treeop0, subtarget,
8563 VOIDmode, EXPAND_NORMAL);
8564 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8565 unsignedp);
8566 if (code == LSHIFT_EXPR)
8567 temp = REDUCE_BIT_FIELD (temp);
8568 return temp;
8569
8570 /* Could determine the answer when only additive constants differ. Also,
8571 the addition of one can be handled by changing the condition. */
8572 case LT_EXPR:
8573 case LE_EXPR:
8574 case GT_EXPR:
8575 case GE_EXPR:
8576 case EQ_EXPR:
8577 case NE_EXPR:
8578 case UNORDERED_EXPR:
8579 case ORDERED_EXPR:
8580 case UNLT_EXPR:
8581 case UNLE_EXPR:
8582 case UNGT_EXPR:
8583 case UNGE_EXPR:
8584 case UNEQ_EXPR:
8585 case LTGT_EXPR:
8586 temp = do_store_flag (ops,
8587 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8588 tmode != VOIDmode ? tmode : mode);
8589 if (temp)
8590 return temp;
8591
8592 /* Use a compare and a jump for BLKmode comparisons, or for function
8593 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8594
8595 if ((target == 0
8596 || modifier == EXPAND_STACK_PARM
8597 || ! safe_from_p (target, treeop0, 1)
8598 || ! safe_from_p (target, treeop1, 1)
8599 /* Make sure we don't have a hard reg (such as function's return
8600 value) live across basic blocks, if not optimizing. */
8601 || (!optimize && REG_P (target)
8602 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8603 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8604
8605 emit_move_insn (target, const0_rtx);
8606
8607 op1 = gen_label_rtx ();
8608 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8609
8610 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8611 emit_move_insn (target, constm1_rtx);
8612 else
8613 emit_move_insn (target, const1_rtx);
8614
8615 emit_label (op1);
8616 return target;
8617
8618 case COMPLEX_EXPR:
8619 /* Get the rtx code of the operands. */
8620 op0 = expand_normal (treeop0);
8621 op1 = expand_normal (treeop1);
8622
8623 if (!target)
8624 target = gen_reg_rtx (TYPE_MODE (type));
8625
8626 /* Move the real (op0) and imaginary (op1) parts to their location. */
8627 write_complex_part (target, op0, false);
8628 write_complex_part (target, op1, true);
8629
8630 return target;
8631
8632 case WIDEN_SUM_EXPR:
8633 {
8634 tree oprnd0 = treeop0;
8635 tree oprnd1 = treeop1;
8636
8637 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8638 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8639 target, unsignedp);
8640 return target;
8641 }
8642
8643 case REDUC_MAX_EXPR:
8644 case REDUC_MIN_EXPR:
8645 case REDUC_PLUS_EXPR:
8646 {
8647 op0 = expand_normal (treeop0);
8648 this_optab = optab_for_tree_code (code, type, optab_default);
8649 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8650 gcc_assert (temp);
8651 return temp;
8652 }
8653
8654 case VEC_LSHIFT_EXPR:
8655 case VEC_RSHIFT_EXPR:
8656 {
8657 target = expand_vec_shift_expr (ops, target);
8658 return target;
8659 }
8660
8661 case VEC_UNPACK_HI_EXPR:
8662 case VEC_UNPACK_LO_EXPR:
8663 {
8664 op0 = expand_normal (treeop0);
8665 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8666 target, unsignedp);
8667 gcc_assert (temp);
8668 return temp;
8669 }
8670
8671 case VEC_UNPACK_FLOAT_HI_EXPR:
8672 case VEC_UNPACK_FLOAT_LO_EXPR:
8673 {
8674 op0 = expand_normal (treeop0);
8675 /* The signedness is determined from input operand. */
8676 temp = expand_widen_pattern_expr
8677 (ops, op0, NULL_RTX, NULL_RTX,
8678 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8679
8680 gcc_assert (temp);
8681 return temp;
8682 }
8683
8684 case VEC_WIDEN_MULT_HI_EXPR:
8685 case VEC_WIDEN_MULT_LO_EXPR:
8686 {
8687 tree oprnd0 = treeop0;
8688 tree oprnd1 = treeop1;
8689
8690 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8691 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8692 target, unsignedp);
8693 gcc_assert (target);
8694 return target;
8695 }
8696
8697 case VEC_WIDEN_LSHIFT_HI_EXPR:
8698 case VEC_WIDEN_LSHIFT_LO_EXPR:
8699 {
8700 tree oprnd0 = treeop0;
8701 tree oprnd1 = treeop1;
8702
8703 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8704 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8705 target, unsignedp);
8706 gcc_assert (target);
8707 return target;
8708 }
8709
8710 case VEC_PACK_TRUNC_EXPR:
8711 case VEC_PACK_SAT_EXPR:
8712 case VEC_PACK_FIX_TRUNC_EXPR:
8713 mode = TYPE_MODE (TREE_TYPE (treeop0));
8714 goto binop;
8715
8716 case VEC_PERM_EXPR:
8717 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
8718 op2 = expand_normal (treeop2);
8719
8720 /* Careful here: if the target doesn't support integral vector modes,
8721 a constant selection vector could wind up smooshed into a normal
8722 integral constant. */
8723 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
8724 {
8725 tree sel_type = TREE_TYPE (treeop2);
8726 enum machine_mode vmode
8727 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
8728 TYPE_VECTOR_SUBPARTS (sel_type));
8729 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
8730 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
8731 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
8732 }
8733 else
8734 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
8735
8736 temp = expand_vec_perm (mode, op0, op1, op2, target);
8737 gcc_assert (temp);
8738 return temp;
8739
8740 case DOT_PROD_EXPR:
8741 {
8742 tree oprnd0 = treeop0;
8743 tree oprnd1 = treeop1;
8744 tree oprnd2 = treeop2;
8745 rtx op2;
8746
8747 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8748 op2 = expand_normal (oprnd2);
8749 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8750 target, unsignedp);
8751 return target;
8752 }
8753
8754 case REALIGN_LOAD_EXPR:
8755 {
8756 tree oprnd0 = treeop0;
8757 tree oprnd1 = treeop1;
8758 tree oprnd2 = treeop2;
8759 rtx op2;
8760
8761 this_optab = optab_for_tree_code (code, type, optab_default);
8762 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8763 op2 = expand_normal (oprnd2);
8764 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8765 target, unsignedp);
8766 gcc_assert (temp);
8767 return temp;
8768 }
8769
8770 case COND_EXPR:
8771 /* A COND_EXPR with its type being VOID_TYPE represents a
8772 conditional jump and is handled in
8773 expand_gimple_cond_expr. */
8774 gcc_assert (!VOID_TYPE_P (type));
8775
8776 /* Note that COND_EXPRs whose type is a structure or union
8777 are required to be constructed to contain assignments of
8778 a temporary variable, so that we can evaluate them here
8779 for side effect only. If type is void, we must do likewise. */
8780
8781 gcc_assert (!TREE_ADDRESSABLE (type)
8782 && !ignore
8783 && TREE_TYPE (treeop1) != void_type_node
8784 && TREE_TYPE (treeop2) != void_type_node);
8785
8786 /* If we are not to produce a result, we have no target. Otherwise,
8787 if a target was specified use it; it will not be used as an
8788 intermediate target unless it is safe. If no target, use a
8789 temporary. */
8790
8791 if (modifier != EXPAND_STACK_PARM
8792 && original_target
8793 && safe_from_p (original_target, treeop0, 1)
8794 && GET_MODE (original_target) == mode
8795 #ifdef HAVE_conditional_move
8796 && (! can_conditionally_move_p (mode)
8797 || REG_P (original_target))
8798 #endif
8799 && !MEM_P (original_target))
8800 temp = original_target;
8801 else
8802 temp = assign_temp (type, 0, 0, 1);
8803
8804 do_pending_stack_adjust ();
8805 NO_DEFER_POP;
8806 op0 = gen_label_rtx ();
8807 op1 = gen_label_rtx ();
8808 jumpifnot (treeop0, op0, -1);
8809 store_expr (treeop1, temp,
8810 modifier == EXPAND_STACK_PARM,
8811 false);
8812
8813 emit_jump_insn (gen_jump (op1));
8814 emit_barrier ();
8815 emit_label (op0);
8816 store_expr (treeop2, temp,
8817 modifier == EXPAND_STACK_PARM,
8818 false);
8819
8820 emit_label (op1);
8821 OK_DEFER_POP;
8822 return temp;
8823
8824 case VEC_COND_EXPR:
8825 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
8826 return target;
8827
8828 default:
8829 gcc_unreachable ();
8830 }
8831
8832 /* Here to do an ordinary binary operator. */
8833 binop:
8834 expand_operands (treeop0, treeop1,
8835 subtarget, &op0, &op1, EXPAND_NORMAL);
8836 binop2:
8837 this_optab = optab_for_tree_code (code, type, optab_default);
8838 binop3:
8839 if (modifier == EXPAND_STACK_PARM)
8840 target = 0;
8841 temp = expand_binop (mode, this_optab, op0, op1, target,
8842 unsignedp, OPTAB_LIB_WIDEN);
8843 gcc_assert (temp);
8844 /* Bitwise operations do not need bitfield reduction as we expect their
8845 operands being properly truncated. */
8846 if (code == BIT_XOR_EXPR
8847 || code == BIT_AND_EXPR
8848 || code == BIT_IOR_EXPR)
8849 return temp;
8850 return REDUCE_BIT_FIELD (temp);
8851 }
8852 #undef REDUCE_BIT_FIELD
8853
8854 rtx
8855 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
8856 enum expand_modifier modifier, rtx *alt_rtl)
8857 {
8858 rtx op0, op1, temp, decl_rtl;
8859 tree type;
8860 int unsignedp;
8861 enum machine_mode mode;
8862 enum tree_code code = TREE_CODE (exp);
8863 rtx subtarget, original_target;
8864 int ignore;
8865 tree context;
8866 bool reduce_bit_field;
8867 location_t loc = EXPR_LOCATION (exp);
8868 struct separate_ops ops;
8869 tree treeop0, treeop1, treeop2;
8870 tree ssa_name = NULL_TREE;
8871 gimple g;
8872
8873 type = TREE_TYPE (exp);
8874 mode = TYPE_MODE (type);
8875 unsignedp = TYPE_UNSIGNED (type);
8876
8877 treeop0 = treeop1 = treeop2 = NULL_TREE;
8878 if (!VL_EXP_CLASS_P (exp))
8879 switch (TREE_CODE_LENGTH (code))
8880 {
8881 default:
8882 case 3: treeop2 = TREE_OPERAND (exp, 2);
8883 case 2: treeop1 = TREE_OPERAND (exp, 1);
8884 case 1: treeop0 = TREE_OPERAND (exp, 0);
8885 case 0: break;
8886 }
8887 ops.code = code;
8888 ops.type = type;
8889 ops.op0 = treeop0;
8890 ops.op1 = treeop1;
8891 ops.op2 = treeop2;
8892 ops.location = loc;
8893
8894 ignore = (target == const0_rtx
8895 || ((CONVERT_EXPR_CODE_P (code)
8896 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8897 && TREE_CODE (type) == VOID_TYPE));
8898
8899 /* An operation in what may be a bit-field type needs the
8900 result to be reduced to the precision of the bit-field type,
8901 which is narrower than that of the type's mode. */
8902 reduce_bit_field = (!ignore
8903 && INTEGRAL_TYPE_P (type)
8904 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8905
8906 /* If we are going to ignore this result, we need only do something
8907 if there is a side-effect somewhere in the expression. If there
8908 is, short-circuit the most common cases here. Note that we must
8909 not call expand_expr with anything but const0_rtx in case this
8910 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
8911
8912 if (ignore)
8913 {
8914 if (! TREE_SIDE_EFFECTS (exp))
8915 return const0_rtx;
8916
8917 /* Ensure we reference a volatile object even if value is ignored, but
8918 don't do this if all we are doing is taking its address. */
8919 if (TREE_THIS_VOLATILE (exp)
8920 && TREE_CODE (exp) != FUNCTION_DECL
8921 && mode != VOIDmode && mode != BLKmode
8922 && modifier != EXPAND_CONST_ADDRESS)
8923 {
8924 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
8925 if (MEM_P (temp))
8926 copy_to_reg (temp);
8927 return const0_rtx;
8928 }
8929
8930 if (TREE_CODE_CLASS (code) == tcc_unary
8931 || code == COMPONENT_REF || code == INDIRECT_REF)
8932 return expand_expr (treeop0, const0_rtx, VOIDmode,
8933 modifier);
8934
8935 else if (TREE_CODE_CLASS (code) == tcc_binary
8936 || TREE_CODE_CLASS (code) == tcc_comparison
8937 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
8938 {
8939 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8940 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8941 return const0_rtx;
8942 }
8943 else if (code == BIT_FIELD_REF)
8944 {
8945 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8946 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8947 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
8948 return const0_rtx;
8949 }
8950
8951 target = 0;
8952 }
8953
8954 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8955 target = 0;
8956
8957 /* Use subtarget as the target for operand 0 of a binary operation. */
8958 subtarget = get_subtarget (target);
8959 original_target = target;
8960
8961 switch (code)
8962 {
8963 case LABEL_DECL:
8964 {
8965 tree function = decl_function_context (exp);
8966
8967 temp = label_rtx (exp);
8968 temp = gen_rtx_LABEL_REF (Pmode, temp);
8969
8970 if (function != current_function_decl
8971 && function != 0)
8972 LABEL_REF_NONLOCAL_P (temp) = 1;
8973
8974 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
8975 return temp;
8976 }
8977
8978 case SSA_NAME:
8979 /* ??? ivopts calls expander, without any preparation from
8980 out-of-ssa. So fake instructions as if this was an access to the
8981 base variable. This unnecessarily allocates a pseudo, see how we can
8982 reuse it, if partition base vars have it set already. */
8983 if (!currently_expanding_to_rtl)
8984 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
8985 NULL);
8986
8987 g = get_gimple_for_ssa_name (exp);
8988 /* For EXPAND_INITIALIZER try harder to get something simpler. */
8989 if (g == NULL
8990 && modifier == EXPAND_INITIALIZER
8991 && !SSA_NAME_IS_DEFAULT_DEF (exp)
8992 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
8993 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
8994 g = SSA_NAME_DEF_STMT (exp);
8995 if (g)
8996 return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
8997 modifier, NULL);
8998
8999 ssa_name = exp;
9000 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9001 exp = SSA_NAME_VAR (ssa_name);
9002 goto expand_decl_rtl;
9003
9004 case PARM_DECL:
9005 case VAR_DECL:
9006 /* If a static var's type was incomplete when the decl was written,
9007 but the type is complete now, lay out the decl now. */
9008 if (DECL_SIZE (exp) == 0
9009 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9010 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9011 layout_decl (exp, 0);
9012
9013 /* ... fall through ... */
9014
9015 case FUNCTION_DECL:
9016 case RESULT_DECL:
9017 decl_rtl = DECL_RTL (exp);
9018 expand_decl_rtl:
9019 gcc_assert (decl_rtl);
9020 decl_rtl = copy_rtx (decl_rtl);
9021 /* Record writes to register variables. */
9022 if (modifier == EXPAND_WRITE
9023 && REG_P (decl_rtl)
9024 && HARD_REGISTER_P (decl_rtl))
9025 add_to_hard_reg_set (&crtl->asm_clobbers,
9026 GET_MODE (decl_rtl), REGNO (decl_rtl));
9027
9028 /* Ensure variable marked as used even if it doesn't go through
9029 a parser. If it hasn't be used yet, write out an external
9030 definition. */
9031 if (! TREE_USED (exp))
9032 {
9033 assemble_external (exp);
9034 TREE_USED (exp) = 1;
9035 }
9036
9037 /* Show we haven't gotten RTL for this yet. */
9038 temp = 0;
9039
9040 /* Variables inherited from containing functions should have
9041 been lowered by this point. */
9042 context = decl_function_context (exp);
9043 gcc_assert (!context
9044 || context == current_function_decl
9045 || TREE_STATIC (exp)
9046 || DECL_EXTERNAL (exp)
9047 /* ??? C++ creates functions that are not TREE_STATIC. */
9048 || TREE_CODE (exp) == FUNCTION_DECL);
9049
9050 /* This is the case of an array whose size is to be determined
9051 from its initializer, while the initializer is still being parsed.
9052 See expand_decl. */
9053
9054 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9055 temp = validize_mem (decl_rtl);
9056
9057 /* If DECL_RTL is memory, we are in the normal case and the
9058 address is not valid, get the address into a register. */
9059
9060 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9061 {
9062 if (alt_rtl)
9063 *alt_rtl = decl_rtl;
9064 decl_rtl = use_anchored_address (decl_rtl);
9065 if (modifier != EXPAND_CONST_ADDRESS
9066 && modifier != EXPAND_SUM
9067 && !memory_address_addr_space_p (DECL_MODE (exp),
9068 XEXP (decl_rtl, 0),
9069 MEM_ADDR_SPACE (decl_rtl)))
9070 temp = replace_equiv_address (decl_rtl,
9071 copy_rtx (XEXP (decl_rtl, 0)));
9072 }
9073
9074 /* If we got something, return it. But first, set the alignment
9075 if the address is a register. */
9076 if (temp != 0)
9077 {
9078 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9079 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9080
9081 return temp;
9082 }
9083
9084 /* If the mode of DECL_RTL does not match that of the decl,
9085 there are two cases: we are dealing with a BLKmode value
9086 that is returned in a register, or we are dealing with
9087 a promoted value. In the latter case, return a SUBREG
9088 of the wanted mode, but mark it so that we know that it
9089 was already extended. */
9090 if (REG_P (decl_rtl)
9091 && DECL_MODE (exp) != BLKmode
9092 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9093 {
9094 enum machine_mode pmode;
9095
9096 /* Get the signedness to be used for this variable. Ensure we get
9097 the same mode we got when the variable was declared. */
9098 if (code == SSA_NAME
9099 && (g = SSA_NAME_DEF_STMT (ssa_name))
9100 && gimple_code (g) == GIMPLE_CALL)
9101 {
9102 gcc_assert (!gimple_call_internal_p (g));
9103 pmode = promote_function_mode (type, mode, &unsignedp,
9104 gimple_call_fntype (g),
9105 2);
9106 }
9107 else
9108 pmode = promote_decl_mode (exp, &unsignedp);
9109 gcc_assert (GET_MODE (decl_rtl) == pmode);
9110
9111 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9112 SUBREG_PROMOTED_VAR_P (temp) = 1;
9113 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
9114 return temp;
9115 }
9116
9117 return decl_rtl;
9118
9119 case INTEGER_CST:
9120 temp = immed_double_const (TREE_INT_CST_LOW (exp),
9121 TREE_INT_CST_HIGH (exp), mode);
9122
9123 return temp;
9124
9125 case VECTOR_CST:
9126 {
9127 tree tmp = NULL_TREE;
9128 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9129 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9130 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9131 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9132 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9133 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9134 return const_vector_from_tree (exp);
9135 if (GET_MODE_CLASS (mode) == MODE_INT)
9136 {
9137 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9138 if (type_for_mode)
9139 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9140 }
9141 if (!tmp)
9142 tmp = build_constructor_from_list (type,
9143 TREE_VECTOR_CST_ELTS (exp));
9144 return expand_expr (tmp, ignore ? const0_rtx : target,
9145 tmode, modifier);
9146 }
9147
9148 case CONST_DECL:
9149 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9150
9151 case REAL_CST:
9152 /* If optimized, generate immediate CONST_DOUBLE
9153 which will be turned into memory by reload if necessary.
9154
9155 We used to force a register so that loop.c could see it. But
9156 this does not allow gen_* patterns to perform optimizations with
9157 the constants. It also produces two insns in cases like "x = 1.0;".
9158 On most machines, floating-point constants are not permitted in
9159 many insns, so we'd end up copying it to a register in any case.
9160
9161 Now, we do the copying in expand_binop, if appropriate. */
9162 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9163 TYPE_MODE (TREE_TYPE (exp)));
9164
9165 case FIXED_CST:
9166 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9167 TYPE_MODE (TREE_TYPE (exp)));
9168
9169 case COMPLEX_CST:
9170 /* Handle evaluating a complex constant in a CONCAT target. */
9171 if (original_target && GET_CODE (original_target) == CONCAT)
9172 {
9173 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9174 rtx rtarg, itarg;
9175
9176 rtarg = XEXP (original_target, 0);
9177 itarg = XEXP (original_target, 1);
9178
9179 /* Move the real and imaginary parts separately. */
9180 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9181 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9182
9183 if (op0 != rtarg)
9184 emit_move_insn (rtarg, op0);
9185 if (op1 != itarg)
9186 emit_move_insn (itarg, op1);
9187
9188 return original_target;
9189 }
9190
9191 /* ... fall through ... */
9192
9193 case STRING_CST:
9194 temp = expand_expr_constant (exp, 1, modifier);
9195
9196 /* temp contains a constant address.
9197 On RISC machines where a constant address isn't valid,
9198 make some insns to get that address into a register. */
9199 if (modifier != EXPAND_CONST_ADDRESS
9200 && modifier != EXPAND_INITIALIZER
9201 && modifier != EXPAND_SUM
9202 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9203 MEM_ADDR_SPACE (temp)))
9204 return replace_equiv_address (temp,
9205 copy_rtx (XEXP (temp, 0)));
9206 return temp;
9207
9208 case SAVE_EXPR:
9209 {
9210 tree val = treeop0;
9211 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
9212
9213 if (!SAVE_EXPR_RESOLVED_P (exp))
9214 {
9215 /* We can indeed still hit this case, typically via builtin
9216 expanders calling save_expr immediately before expanding
9217 something. Assume this means that we only have to deal
9218 with non-BLKmode values. */
9219 gcc_assert (GET_MODE (ret) != BLKmode);
9220
9221 val = build_decl (EXPR_LOCATION (exp),
9222 VAR_DECL, NULL, TREE_TYPE (exp));
9223 DECL_ARTIFICIAL (val) = 1;
9224 DECL_IGNORED_P (val) = 1;
9225 treeop0 = val;
9226 TREE_OPERAND (exp, 0) = treeop0;
9227 SAVE_EXPR_RESOLVED_P (exp) = 1;
9228
9229 if (!CONSTANT_P (ret))
9230 ret = copy_to_reg (ret);
9231 SET_DECL_RTL (val, ret);
9232 }
9233
9234 return ret;
9235 }
9236
9237
9238 case CONSTRUCTOR:
9239 /* If we don't need the result, just ensure we evaluate any
9240 subexpressions. */
9241 if (ignore)
9242 {
9243 unsigned HOST_WIDE_INT idx;
9244 tree value;
9245
9246 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9247 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9248
9249 return const0_rtx;
9250 }
9251
9252 return expand_constructor (exp, target, modifier, false);
9253
9254 case TARGET_MEM_REF:
9255 {
9256 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
9257 struct mem_address addr;
9258 enum insn_code icode;
9259 unsigned int align;
9260
9261 get_address_description (exp, &addr);
9262 op0 = addr_for_mem_ref (&addr, as, true);
9263 op0 = memory_address_addr_space (mode, op0, as);
9264 temp = gen_rtx_MEM (mode, op0);
9265 set_mem_attributes (temp, exp, 0);
9266 set_mem_addr_space (temp, as);
9267 align = get_object_or_type_alignment (exp);
9268 if (mode != BLKmode
9269 && align < GET_MODE_ALIGNMENT (mode)
9270 /* If the target does not have special handling for unaligned
9271 loads of mode then it can use regular moves for them. */
9272 && ((icode = optab_handler (movmisalign_optab, mode))
9273 != CODE_FOR_nothing))
9274 {
9275 struct expand_operand ops[2];
9276
9277 /* We've already validated the memory, and we're creating a
9278 new pseudo destination. The predicates really can't fail,
9279 nor can the generator. */
9280 create_output_operand (&ops[0], NULL_RTX, mode);
9281 create_fixed_operand (&ops[1], temp);
9282 expand_insn (icode, 2, ops);
9283 return ops[0].value;
9284 }
9285 return temp;
9286 }
9287
9288 case MEM_REF:
9289 {
9290 addr_space_t as
9291 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1))));
9292 enum machine_mode address_mode;
9293 tree base = TREE_OPERAND (exp, 0);
9294 gimple def_stmt;
9295 enum insn_code icode;
9296 unsigned align;
9297 /* Handle expansion of non-aliased memory with non-BLKmode. That
9298 might end up in a register. */
9299 if (TREE_CODE (base) == ADDR_EXPR)
9300 {
9301 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9302 tree bit_offset;
9303 base = TREE_OPERAND (base, 0);
9304 if (!DECL_P (base))
9305 {
9306 HOST_WIDE_INT off;
9307 base = get_addr_base_and_unit_offset (base, &off);
9308 gcc_assert (base);
9309 offset += off;
9310 }
9311 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
9312 decl we must use bitfield operations. */
9313 if (DECL_P (base)
9314 && !TREE_ADDRESSABLE (base)
9315 && DECL_MODE (base) != BLKmode
9316 && DECL_RTL_SET_P (base)
9317 && !MEM_P (DECL_RTL (base)))
9318 {
9319 tree bftype;
9320 if (offset == 0
9321 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9322 && (GET_MODE_BITSIZE (DECL_MODE (base))
9323 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9324 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9325 TREE_TYPE (exp), base),
9326 target, tmode, modifier);
9327 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9328 bftype = TREE_TYPE (base);
9329 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9330 bftype = TREE_TYPE (exp);
9331 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9332 base,
9333 TYPE_SIZE (TREE_TYPE (exp)),
9334 bit_offset),
9335 target, tmode, modifier);
9336 }
9337 }
9338 address_mode = targetm.addr_space.address_mode (as);
9339 base = TREE_OPERAND (exp, 0);
9340 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9341 {
9342 tree mask = gimple_assign_rhs2 (def_stmt);
9343 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9344 gimple_assign_rhs1 (def_stmt), mask);
9345 TREE_OPERAND (exp, 0) = base;
9346 }
9347 align = get_object_or_type_alignment (exp);
9348 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9349 op0 = memory_address_addr_space (address_mode, op0, as);
9350 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9351 {
9352 rtx off
9353 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9354 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9355 }
9356 op0 = memory_address_addr_space (mode, op0, as);
9357 temp = gen_rtx_MEM (mode, op0);
9358 set_mem_attributes (temp, exp, 0);
9359 set_mem_addr_space (temp, as);
9360 if (TREE_THIS_VOLATILE (exp))
9361 MEM_VOLATILE_P (temp) = 1;
9362 if (mode != BLKmode
9363 && align < GET_MODE_ALIGNMENT (mode)
9364 /* If the target does not have special handling for unaligned
9365 loads of mode then it can use regular moves for them. */
9366 && ((icode = optab_handler (movmisalign_optab, mode))
9367 != CODE_FOR_nothing))
9368 {
9369 struct expand_operand ops[2];
9370
9371 /* We've already validated the memory, and we're creating a
9372 new pseudo destination. The predicates really can't fail,
9373 nor can the generator. */
9374 create_output_operand (&ops[0], NULL_RTX, mode);
9375 create_fixed_operand (&ops[1], temp);
9376 expand_insn (icode, 2, ops);
9377 return ops[0].value;
9378 }
9379 return temp;
9380 }
9381
9382 case ARRAY_REF:
9383
9384 {
9385 tree array = treeop0;
9386 tree index = treeop1;
9387
9388 /* Fold an expression like: "foo"[2].
9389 This is not done in fold so it won't happen inside &.
9390 Don't fold if this is for wide characters since it's too
9391 difficult to do correctly and this is a very rare case. */
9392
9393 if (modifier != EXPAND_CONST_ADDRESS
9394 && modifier != EXPAND_INITIALIZER
9395 && modifier != EXPAND_MEMORY)
9396 {
9397 tree t = fold_read_from_constant_string (exp);
9398
9399 if (t)
9400 return expand_expr (t, target, tmode, modifier);
9401 }
9402
9403 /* If this is a constant index into a constant array,
9404 just get the value from the array. Handle both the cases when
9405 we have an explicit constructor and when our operand is a variable
9406 that was declared const. */
9407
9408 if (modifier != EXPAND_CONST_ADDRESS
9409 && modifier != EXPAND_INITIALIZER
9410 && modifier != EXPAND_MEMORY
9411 && TREE_CODE (array) == CONSTRUCTOR
9412 && ! TREE_SIDE_EFFECTS (array)
9413 && TREE_CODE (index) == INTEGER_CST)
9414 {
9415 unsigned HOST_WIDE_INT ix;
9416 tree field, value;
9417
9418 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9419 field, value)
9420 if (tree_int_cst_equal (field, index))
9421 {
9422 if (!TREE_SIDE_EFFECTS (value))
9423 return expand_expr (fold (value), target, tmode, modifier);
9424 break;
9425 }
9426 }
9427
9428 else if (optimize >= 1
9429 && modifier != EXPAND_CONST_ADDRESS
9430 && modifier != EXPAND_INITIALIZER
9431 && modifier != EXPAND_MEMORY
9432 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9433 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9434 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9435 && const_value_known_p (array))
9436 {
9437 if (TREE_CODE (index) == INTEGER_CST)
9438 {
9439 tree init = DECL_INITIAL (array);
9440
9441 if (TREE_CODE (init) == CONSTRUCTOR)
9442 {
9443 unsigned HOST_WIDE_INT ix;
9444 tree field, value;
9445
9446 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9447 field, value)
9448 if (tree_int_cst_equal (field, index))
9449 {
9450 if (TREE_SIDE_EFFECTS (value))
9451 break;
9452
9453 if (TREE_CODE (value) == CONSTRUCTOR)
9454 {
9455 /* If VALUE is a CONSTRUCTOR, this
9456 optimization is only useful if
9457 this doesn't store the CONSTRUCTOR
9458 into memory. If it does, it is more
9459 efficient to just load the data from
9460 the array directly. */
9461 rtx ret = expand_constructor (value, target,
9462 modifier, true);
9463 if (ret == NULL_RTX)
9464 break;
9465 }
9466
9467 return expand_expr (fold (value), target, tmode,
9468 modifier);
9469 }
9470 }
9471 else if(TREE_CODE (init) == STRING_CST)
9472 {
9473 tree index1 = index;
9474 tree low_bound = array_ref_low_bound (exp);
9475 index1 = fold_convert_loc (loc, sizetype,
9476 treeop1);
9477
9478 /* Optimize the special-case of a zero lower bound.
9479
9480 We convert the low_bound to sizetype to avoid some problems
9481 with constant folding. (E.g. suppose the lower bound is 1,
9482 and its mode is QI. Without the conversion,l (ARRAY
9483 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9484 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9485
9486 if (! integer_zerop (low_bound))
9487 index1 = size_diffop_loc (loc, index1,
9488 fold_convert_loc (loc, sizetype,
9489 low_bound));
9490
9491 if (0 > compare_tree_int (index1,
9492 TREE_STRING_LENGTH (init)))
9493 {
9494 tree type = TREE_TYPE (TREE_TYPE (init));
9495 enum machine_mode mode = TYPE_MODE (type);
9496
9497 if (GET_MODE_CLASS (mode) == MODE_INT
9498 && GET_MODE_SIZE (mode) == 1)
9499 return gen_int_mode (TREE_STRING_POINTER (init)
9500 [TREE_INT_CST_LOW (index1)],
9501 mode);
9502 }
9503 }
9504 }
9505 }
9506 }
9507 goto normal_inner_ref;
9508
9509 case COMPONENT_REF:
9510 /* If the operand is a CONSTRUCTOR, we can just extract the
9511 appropriate field if it is present. */
9512 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9513 {
9514 unsigned HOST_WIDE_INT idx;
9515 tree field, value;
9516
9517 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9518 idx, field, value)
9519 if (field == treeop1
9520 /* We can normally use the value of the field in the
9521 CONSTRUCTOR. However, if this is a bitfield in
9522 an integral mode that we can fit in a HOST_WIDE_INT,
9523 we must mask only the number of bits in the bitfield,
9524 since this is done implicitly by the constructor. If
9525 the bitfield does not meet either of those conditions,
9526 we can't do this optimization. */
9527 && (! DECL_BIT_FIELD (field)
9528 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9529 && (GET_MODE_PRECISION (DECL_MODE (field))
9530 <= HOST_BITS_PER_WIDE_INT))))
9531 {
9532 if (DECL_BIT_FIELD (field)
9533 && modifier == EXPAND_STACK_PARM)
9534 target = 0;
9535 op0 = expand_expr (value, target, tmode, modifier);
9536 if (DECL_BIT_FIELD (field))
9537 {
9538 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9539 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9540
9541 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9542 {
9543 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9544 op0 = expand_and (imode, op0, op1, target);
9545 }
9546 else
9547 {
9548 int count = GET_MODE_PRECISION (imode) - bitsize;
9549
9550 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9551 target, 0);
9552 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9553 target, 0);
9554 }
9555 }
9556
9557 return op0;
9558 }
9559 }
9560 goto normal_inner_ref;
9561
9562 case BIT_FIELD_REF:
9563 case ARRAY_RANGE_REF:
9564 normal_inner_ref:
9565 {
9566 enum machine_mode mode1, mode2;
9567 HOST_WIDE_INT bitsize, bitpos;
9568 tree offset;
9569 int volatilep = 0, must_force_mem;
9570 bool packedp = false;
9571 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9572 &mode1, &unsignedp, &volatilep, true);
9573 rtx orig_op0, memloc;
9574
9575 /* If we got back the original object, something is wrong. Perhaps
9576 we are evaluating an expression too early. In any event, don't
9577 infinitely recurse. */
9578 gcc_assert (tem != exp);
9579
9580 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9581 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9582 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9583 packedp = true;
9584
9585 /* If TEM's type is a union of variable size, pass TARGET to the inner
9586 computation, since it will need a temporary and TARGET is known
9587 to have to do. This occurs in unchecked conversion in Ada. */
9588 orig_op0 = op0
9589 = expand_expr (tem,
9590 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9591 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9592 != INTEGER_CST)
9593 && modifier != EXPAND_STACK_PARM
9594 ? target : NULL_RTX),
9595 VOIDmode,
9596 (modifier == EXPAND_INITIALIZER
9597 || modifier == EXPAND_CONST_ADDRESS
9598 || modifier == EXPAND_STACK_PARM)
9599 ? modifier : EXPAND_NORMAL);
9600
9601
9602 /* If the bitfield is volatile, we want to access it in the
9603 field's mode, not the computed mode.
9604 If a MEM has VOIDmode (external with incomplete type),
9605 use BLKmode for it instead. */
9606 if (MEM_P (op0))
9607 {
9608 if (volatilep && flag_strict_volatile_bitfields > 0)
9609 op0 = adjust_address (op0, mode1, 0);
9610 else if (GET_MODE (op0) == VOIDmode)
9611 op0 = adjust_address (op0, BLKmode, 0);
9612 }
9613
9614 mode2
9615 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9616
9617 /* If we have either an offset, a BLKmode result, or a reference
9618 outside the underlying object, we must force it to memory.
9619 Such a case can occur in Ada if we have unchecked conversion
9620 of an expression from a scalar type to an aggregate type or
9621 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9622 passed a partially uninitialized object or a view-conversion
9623 to a larger size. */
9624 must_force_mem = (offset
9625 || mode1 == BLKmode
9626 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9627
9628 /* Handle CONCAT first. */
9629 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9630 {
9631 if (bitpos == 0
9632 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9633 return op0;
9634 if (bitpos == 0
9635 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9636 && bitsize)
9637 {
9638 op0 = XEXP (op0, 0);
9639 mode2 = GET_MODE (op0);
9640 }
9641 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9642 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9643 && bitpos
9644 && bitsize)
9645 {
9646 op0 = XEXP (op0, 1);
9647 bitpos = 0;
9648 mode2 = GET_MODE (op0);
9649 }
9650 else
9651 /* Otherwise force into memory. */
9652 must_force_mem = 1;
9653 }
9654
9655 /* If this is a constant, put it in a register if it is a legitimate
9656 constant and we don't need a memory reference. */
9657 if (CONSTANT_P (op0)
9658 && mode2 != BLKmode
9659 && targetm.legitimate_constant_p (mode2, op0)
9660 && !must_force_mem)
9661 op0 = force_reg (mode2, op0);
9662
9663 /* Otherwise, if this is a constant, try to force it to the constant
9664 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9665 is a legitimate constant. */
9666 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9667 op0 = validize_mem (memloc);
9668
9669 /* Otherwise, if this is a constant or the object is not in memory
9670 and need be, put it there. */
9671 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9672 {
9673 tree nt = build_qualified_type (TREE_TYPE (tem),
9674 (TYPE_QUALS (TREE_TYPE (tem))
9675 | TYPE_QUAL_CONST));
9676 memloc = assign_temp (nt, 1, 1, 1);
9677 emit_move_insn (memloc, op0);
9678 op0 = memloc;
9679 }
9680
9681 if (offset)
9682 {
9683 enum machine_mode address_mode;
9684 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9685 EXPAND_SUM);
9686
9687 gcc_assert (MEM_P (op0));
9688
9689 address_mode
9690 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9691 if (GET_MODE (offset_rtx) != address_mode)
9692 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9693
9694 if (GET_MODE (op0) == BLKmode
9695 /* A constant address in OP0 can have VOIDmode, we must
9696 not try to call force_reg in that case. */
9697 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9698 && bitsize != 0
9699 && (bitpos % bitsize) == 0
9700 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9701 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9702 {
9703 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9704 bitpos = 0;
9705 }
9706
9707 op0 = offset_address (op0, offset_rtx,
9708 highest_pow2_factor (offset));
9709 }
9710
9711 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9712 record its alignment as BIGGEST_ALIGNMENT. */
9713 if (MEM_P (op0) && bitpos == 0 && offset != 0
9714 && is_aligning_offset (offset, tem))
9715 set_mem_align (op0, BIGGEST_ALIGNMENT);
9716
9717 /* Don't forget about volatility even if this is a bitfield. */
9718 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9719 {
9720 if (op0 == orig_op0)
9721 op0 = copy_rtx (op0);
9722
9723 MEM_VOLATILE_P (op0) = 1;
9724 }
9725
9726 /* In cases where an aligned union has an unaligned object
9727 as a field, we might be extracting a BLKmode value from
9728 an integer-mode (e.g., SImode) object. Handle this case
9729 by doing the extract into an object as wide as the field
9730 (which we know to be the width of a basic mode), then
9731 storing into memory, and changing the mode to BLKmode. */
9732 if (mode1 == VOIDmode
9733 || REG_P (op0) || GET_CODE (op0) == SUBREG
9734 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9735 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9736 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9737 && modifier != EXPAND_CONST_ADDRESS
9738 && modifier != EXPAND_INITIALIZER)
9739 /* If the field is volatile, we always want an aligned
9740 access. Do this in following two situations:
9741 1. the access is not already naturally
9742 aligned, otherwise "normal" (non-bitfield) volatile fields
9743 become non-addressable.
9744 2. the bitsize is narrower than the access size. Need
9745 to extract bitfields from the access. */
9746 || (volatilep && flag_strict_volatile_bitfields > 0
9747 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0
9748 || (mode1 != BLKmode
9749 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)))
9750 /* If the field isn't aligned enough to fetch as a memref,
9751 fetch it as a bit field. */
9752 || (mode1 != BLKmode
9753 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9754 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9755 || (MEM_P (op0)
9756 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9757 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9758 && ((modifier == EXPAND_CONST_ADDRESS
9759 || modifier == EXPAND_INITIALIZER)
9760 ? STRICT_ALIGNMENT
9761 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9762 || (bitpos % BITS_PER_UNIT != 0)))
9763 /* If the type and the field are a constant size and the
9764 size of the type isn't the same size as the bitfield,
9765 we must use bitfield operations. */
9766 || (bitsize >= 0
9767 && TYPE_SIZE (TREE_TYPE (exp))
9768 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9769 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9770 bitsize)))
9771 {
9772 enum machine_mode ext_mode = mode;
9773
9774 if (ext_mode == BLKmode
9775 && ! (target != 0 && MEM_P (op0)
9776 && MEM_P (target)
9777 && bitpos % BITS_PER_UNIT == 0))
9778 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9779
9780 if (ext_mode == BLKmode)
9781 {
9782 if (target == 0)
9783 target = assign_temp (type, 0, 1, 1);
9784
9785 if (bitsize == 0)
9786 return target;
9787
9788 /* In this case, BITPOS must start at a byte boundary and
9789 TARGET, if specified, must be a MEM. */
9790 gcc_assert (MEM_P (op0)
9791 && (!target || MEM_P (target))
9792 && !(bitpos % BITS_PER_UNIT));
9793
9794 emit_block_move (target,
9795 adjust_address (op0, VOIDmode,
9796 bitpos / BITS_PER_UNIT),
9797 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9798 / BITS_PER_UNIT),
9799 (modifier == EXPAND_STACK_PARM
9800 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9801
9802 return target;
9803 }
9804
9805 op0 = validize_mem (op0);
9806
9807 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9808 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9809
9810 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
9811 (modifier == EXPAND_STACK_PARM
9812 ? NULL_RTX : target),
9813 ext_mode, ext_mode);
9814
9815 /* If the result is a record type and BITSIZE is narrower than
9816 the mode of OP0, an integral mode, and this is a big endian
9817 machine, we must put the field into the high-order bits. */
9818 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
9819 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
9820 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
9821 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
9822 GET_MODE_BITSIZE (GET_MODE (op0))
9823 - bitsize, op0, 1);
9824
9825 /* If the result type is BLKmode, store the data into a temporary
9826 of the appropriate type, but with the mode corresponding to the
9827 mode for the data we have (op0's mode). It's tempting to make
9828 this a constant type, since we know it's only being stored once,
9829 but that can cause problems if we are taking the address of this
9830 COMPONENT_REF because the MEM of any reference via that address
9831 will have flags corresponding to the type, which will not
9832 necessarily be constant. */
9833 if (mode == BLKmode)
9834 {
9835 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
9836 rtx new_rtx;
9837
9838 /* If the reference doesn't use the alias set of its type,
9839 we cannot create the temporary using that type. */
9840 if (component_uses_parent_alias_set (exp))
9841 {
9842 new_rtx = assign_stack_local (ext_mode, size, 0);
9843 set_mem_alias_set (new_rtx, get_alias_set (exp));
9844 }
9845 else
9846 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
9847
9848 emit_move_insn (new_rtx, op0);
9849 op0 = copy_rtx (new_rtx);
9850 PUT_MODE (op0, BLKmode);
9851 set_mem_attributes (op0, exp, 1);
9852 }
9853
9854 return op0;
9855 }
9856
9857 /* If the result is BLKmode, use that to access the object
9858 now as well. */
9859 if (mode == BLKmode)
9860 mode1 = BLKmode;
9861
9862 /* Get a reference to just this component. */
9863 if (modifier == EXPAND_CONST_ADDRESS
9864 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
9865 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
9866 else
9867 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9868
9869 if (op0 == orig_op0)
9870 op0 = copy_rtx (op0);
9871
9872 set_mem_attributes (op0, exp, 0);
9873 if (REG_P (XEXP (op0, 0)))
9874 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9875
9876 MEM_VOLATILE_P (op0) |= volatilep;
9877 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
9878 || modifier == EXPAND_CONST_ADDRESS
9879 || modifier == EXPAND_INITIALIZER)
9880 return op0;
9881 else if (target == 0)
9882 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9883
9884 convert_move (target, op0, unsignedp);
9885 return target;
9886 }
9887
9888 case OBJ_TYPE_REF:
9889 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
9890
9891 case CALL_EXPR:
9892 /* All valid uses of __builtin_va_arg_pack () are removed during
9893 inlining. */
9894 if (CALL_EXPR_VA_ARG_PACK (exp))
9895 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
9896 {
9897 tree fndecl = get_callee_fndecl (exp), attr;
9898
9899 if (fndecl
9900 && (attr = lookup_attribute ("error",
9901 DECL_ATTRIBUTES (fndecl))) != NULL)
9902 error ("%Kcall to %qs declared with attribute error: %s",
9903 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9904 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9905 if (fndecl
9906 && (attr = lookup_attribute ("warning",
9907 DECL_ATTRIBUTES (fndecl))) != NULL)
9908 warning_at (tree_nonartificial_location (exp),
9909 0, "%Kcall to %qs declared with attribute warning: %s",
9910 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9911 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9912
9913 /* Check for a built-in function. */
9914 if (fndecl && DECL_BUILT_IN (fndecl))
9915 {
9916 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
9917 return expand_builtin (exp, target, subtarget, tmode, ignore);
9918 }
9919 }
9920 return expand_call (exp, target, ignore);
9921
9922 case VIEW_CONVERT_EXPR:
9923 op0 = NULL_RTX;
9924
9925 /* If we are converting to BLKmode, try to avoid an intermediate
9926 temporary by fetching an inner memory reference. */
9927 if (mode == BLKmode
9928 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9929 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
9930 && handled_component_p (treeop0))
9931 {
9932 enum machine_mode mode1;
9933 HOST_WIDE_INT bitsize, bitpos;
9934 tree offset;
9935 int unsignedp;
9936 int volatilep = 0;
9937 tree tem
9938 = get_inner_reference (treeop0, &bitsize, &bitpos,
9939 &offset, &mode1, &unsignedp, &volatilep,
9940 true);
9941 rtx orig_op0;
9942
9943 /* ??? We should work harder and deal with non-zero offsets. */
9944 if (!offset
9945 && (bitpos % BITS_PER_UNIT) == 0
9946 && bitsize >= 0
9947 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
9948 {
9949 /* See the normal_inner_ref case for the rationale. */
9950 orig_op0
9951 = expand_expr (tem,
9952 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9953 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9954 != INTEGER_CST)
9955 && modifier != EXPAND_STACK_PARM
9956 ? target : NULL_RTX),
9957 VOIDmode,
9958 (modifier == EXPAND_INITIALIZER
9959 || modifier == EXPAND_CONST_ADDRESS
9960 || modifier == EXPAND_STACK_PARM)
9961 ? modifier : EXPAND_NORMAL);
9962
9963 if (MEM_P (orig_op0))
9964 {
9965 op0 = orig_op0;
9966
9967 /* Get a reference to just this component. */
9968 if (modifier == EXPAND_CONST_ADDRESS
9969 || modifier == EXPAND_SUM
9970 || modifier == EXPAND_INITIALIZER)
9971 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
9972 else
9973 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
9974
9975 if (op0 == orig_op0)
9976 op0 = copy_rtx (op0);
9977
9978 set_mem_attributes (op0, treeop0, 0);
9979 if (REG_P (XEXP (op0, 0)))
9980 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9981
9982 MEM_VOLATILE_P (op0) |= volatilep;
9983 }
9984 }
9985 }
9986
9987 if (!op0)
9988 op0 = expand_expr (treeop0,
9989 NULL_RTX, VOIDmode, modifier);
9990
9991 /* If the input and output modes are both the same, we are done. */
9992 if (mode == GET_MODE (op0))
9993 ;
9994 /* If neither mode is BLKmode, and both modes are the same size
9995 then we can use gen_lowpart. */
9996 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
9997 && (GET_MODE_PRECISION (mode)
9998 == GET_MODE_PRECISION (GET_MODE (op0)))
9999 && !COMPLEX_MODE_P (GET_MODE (op0)))
10000 {
10001 if (GET_CODE (op0) == SUBREG)
10002 op0 = force_reg (GET_MODE (op0), op0);
10003 temp = gen_lowpart_common (mode, op0);
10004 if (temp)
10005 op0 = temp;
10006 else
10007 {
10008 if (!REG_P (op0) && !MEM_P (op0))
10009 op0 = force_reg (GET_MODE (op0), op0);
10010 op0 = gen_lowpart (mode, op0);
10011 }
10012 }
10013 /* If both types are integral, convert from one mode to the other. */
10014 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10015 op0 = convert_modes (mode, GET_MODE (op0), op0,
10016 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10017 /* As a last resort, spill op0 to memory, and reload it in a
10018 different mode. */
10019 else if (!MEM_P (op0))
10020 {
10021 /* If the operand is not a MEM, force it into memory. Since we
10022 are going to be changing the mode of the MEM, don't call
10023 force_const_mem for constants because we don't allow pool
10024 constants to change mode. */
10025 tree inner_type = TREE_TYPE (treeop0);
10026
10027 gcc_assert (!TREE_ADDRESSABLE (exp));
10028
10029 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10030 target
10031 = assign_stack_temp_for_type
10032 (TYPE_MODE (inner_type),
10033 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
10034
10035 emit_move_insn (target, op0);
10036 op0 = target;
10037 }
10038
10039 /* At this point, OP0 is in the correct mode. If the output type is
10040 such that the operand is known to be aligned, indicate that it is.
10041 Otherwise, we need only be concerned about alignment for non-BLKmode
10042 results. */
10043 if (MEM_P (op0))
10044 {
10045 op0 = copy_rtx (op0);
10046
10047 if (TYPE_ALIGN_OK (type))
10048 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10049 else if (STRICT_ALIGNMENT
10050 && mode != BLKmode
10051 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10052 {
10053 tree inner_type = TREE_TYPE (treeop0);
10054 HOST_WIDE_INT temp_size
10055 = MAX (int_size_in_bytes (inner_type),
10056 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10057 rtx new_rtx
10058 = assign_stack_temp_for_type (mode, temp_size, 0, type);
10059 rtx new_with_op0_mode
10060 = adjust_address (new_rtx, GET_MODE (op0), 0);
10061
10062 gcc_assert (!TREE_ADDRESSABLE (exp));
10063
10064 if (GET_MODE (op0) == BLKmode)
10065 emit_block_move (new_with_op0_mode, op0,
10066 GEN_INT (GET_MODE_SIZE (mode)),
10067 (modifier == EXPAND_STACK_PARM
10068 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10069 else
10070 emit_move_insn (new_with_op0_mode, op0);
10071
10072 op0 = new_rtx;
10073 }
10074
10075 op0 = adjust_address (op0, mode, 0);
10076 }
10077
10078 return op0;
10079
10080 case MODIFY_EXPR:
10081 {
10082 tree lhs = treeop0;
10083 tree rhs = treeop1;
10084 gcc_assert (ignore);
10085
10086 /* Check for |= or &= of a bitfield of size one into another bitfield
10087 of size 1. In this case, (unless we need the result of the
10088 assignment) we can do this more efficiently with a
10089 test followed by an assignment, if necessary.
10090
10091 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10092 things change so we do, this code should be enhanced to
10093 support it. */
10094 if (TREE_CODE (lhs) == COMPONENT_REF
10095 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10096 || TREE_CODE (rhs) == BIT_AND_EXPR)
10097 && TREE_OPERAND (rhs, 0) == lhs
10098 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10099 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10100 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10101 {
10102 rtx label = gen_label_rtx ();
10103 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10104 do_jump (TREE_OPERAND (rhs, 1),
10105 value ? label : 0,
10106 value ? 0 : label, -1);
10107 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10108 MOVE_NONTEMPORAL (exp));
10109 do_pending_stack_adjust ();
10110 emit_label (label);
10111 return const0_rtx;
10112 }
10113
10114 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
10115 return const0_rtx;
10116 }
10117
10118 case ADDR_EXPR:
10119 return expand_expr_addr_expr (exp, target, tmode, modifier);
10120
10121 case REALPART_EXPR:
10122 op0 = expand_normal (treeop0);
10123 return read_complex_part (op0, false);
10124
10125 case IMAGPART_EXPR:
10126 op0 = expand_normal (treeop0);
10127 return read_complex_part (op0, true);
10128
10129 case RETURN_EXPR:
10130 case LABEL_EXPR:
10131 case GOTO_EXPR:
10132 case SWITCH_EXPR:
10133 case ASM_EXPR:
10134 /* Expanded in cfgexpand.c. */
10135 gcc_unreachable ();
10136
10137 case TRY_CATCH_EXPR:
10138 case CATCH_EXPR:
10139 case EH_FILTER_EXPR:
10140 case TRY_FINALLY_EXPR:
10141 /* Lowered by tree-eh.c. */
10142 gcc_unreachable ();
10143
10144 case WITH_CLEANUP_EXPR:
10145 case CLEANUP_POINT_EXPR:
10146 case TARGET_EXPR:
10147 case CASE_LABEL_EXPR:
10148 case VA_ARG_EXPR:
10149 case BIND_EXPR:
10150 case INIT_EXPR:
10151 case CONJ_EXPR:
10152 case COMPOUND_EXPR:
10153 case PREINCREMENT_EXPR:
10154 case PREDECREMENT_EXPR:
10155 case POSTINCREMENT_EXPR:
10156 case POSTDECREMENT_EXPR:
10157 case LOOP_EXPR:
10158 case EXIT_EXPR:
10159 /* Lowered by gimplify.c. */
10160 gcc_unreachable ();
10161
10162 case FDESC_EXPR:
10163 /* Function descriptors are not valid except for as
10164 initialization constants, and should not be expanded. */
10165 gcc_unreachable ();
10166
10167 case WITH_SIZE_EXPR:
10168 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10169 have pulled out the size to use in whatever context it needed. */
10170 return expand_expr_real (treeop0, original_target, tmode,
10171 modifier, alt_rtl);
10172
10173 case COMPOUND_LITERAL_EXPR:
10174 {
10175 /* Initialize the anonymous variable declared in the compound
10176 literal, then return the variable. */
10177 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
10178
10179 /* Create RTL for this variable. */
10180 if (!DECL_RTL_SET_P (decl))
10181 {
10182 if (DECL_HARD_REGISTER (decl))
10183 /* The user specified an assembler name for this variable.
10184 Set that up now. */
10185 rest_of_decl_compilation (decl, 0, 0);
10186 else
10187 expand_decl (decl);
10188 }
10189
10190 return expand_expr_real (decl, original_target, tmode,
10191 modifier, alt_rtl);
10192 }
10193
10194 default:
10195 return expand_expr_real_2 (&ops, target, tmode, modifier);
10196 }
10197 }
10198 \f
10199 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10200 signedness of TYPE), possibly returning the result in TARGET. */
10201 static rtx
10202 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10203 {
10204 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10205 if (target && GET_MODE (target) != GET_MODE (exp))
10206 target = 0;
10207 /* For constant values, reduce using build_int_cst_type. */
10208 if (CONST_INT_P (exp))
10209 {
10210 HOST_WIDE_INT value = INTVAL (exp);
10211 tree t = build_int_cst_type (type, value);
10212 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10213 }
10214 else if (TYPE_UNSIGNED (type))
10215 {
10216 rtx mask = immed_double_int_const (double_int_mask (prec),
10217 GET_MODE (exp));
10218 return expand_and (GET_MODE (exp), exp, mask, target);
10219 }
10220 else
10221 {
10222 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10223 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10224 exp, count, target, 0);
10225 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10226 exp, count, target, 0);
10227 }
10228 }
10229 \f
10230 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10231 when applied to the address of EXP produces an address known to be
10232 aligned more than BIGGEST_ALIGNMENT. */
10233
10234 static int
10235 is_aligning_offset (const_tree offset, const_tree exp)
10236 {
10237 /* Strip off any conversions. */
10238 while (CONVERT_EXPR_P (offset))
10239 offset = TREE_OPERAND (offset, 0);
10240
10241 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10242 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10243 if (TREE_CODE (offset) != BIT_AND_EXPR
10244 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10245 || compare_tree_int (TREE_OPERAND (offset, 1),
10246 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10247 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10248 return 0;
10249
10250 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10251 It must be NEGATE_EXPR. Then strip any more conversions. */
10252 offset = TREE_OPERAND (offset, 0);
10253 while (CONVERT_EXPR_P (offset))
10254 offset = TREE_OPERAND (offset, 0);
10255
10256 if (TREE_CODE (offset) != NEGATE_EXPR)
10257 return 0;
10258
10259 offset = TREE_OPERAND (offset, 0);
10260 while (CONVERT_EXPR_P (offset))
10261 offset = TREE_OPERAND (offset, 0);
10262
10263 /* This must now be the address of EXP. */
10264 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10265 }
10266 \f
10267 /* Return the tree node if an ARG corresponds to a string constant or zero
10268 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10269 in bytes within the string that ARG is accessing. The type of the
10270 offset will be `sizetype'. */
10271
10272 tree
10273 string_constant (tree arg, tree *ptr_offset)
10274 {
10275 tree array, offset, lower_bound;
10276 STRIP_NOPS (arg);
10277
10278 if (TREE_CODE (arg) == ADDR_EXPR)
10279 {
10280 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10281 {
10282 *ptr_offset = size_zero_node;
10283 return TREE_OPERAND (arg, 0);
10284 }
10285 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10286 {
10287 array = TREE_OPERAND (arg, 0);
10288 offset = size_zero_node;
10289 }
10290 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10291 {
10292 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10293 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10294 if (TREE_CODE (array) != STRING_CST
10295 && TREE_CODE (array) != VAR_DECL)
10296 return 0;
10297
10298 /* Check if the array has a nonzero lower bound. */
10299 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10300 if (!integer_zerop (lower_bound))
10301 {
10302 /* If the offset and base aren't both constants, return 0. */
10303 if (TREE_CODE (lower_bound) != INTEGER_CST)
10304 return 0;
10305 if (TREE_CODE (offset) != INTEGER_CST)
10306 return 0;
10307 /* Adjust offset by the lower bound. */
10308 offset = size_diffop (fold_convert (sizetype, offset),
10309 fold_convert (sizetype, lower_bound));
10310 }
10311 }
10312 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10313 {
10314 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10315 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10316 if (TREE_CODE (array) != ADDR_EXPR)
10317 return 0;
10318 array = TREE_OPERAND (array, 0);
10319 if (TREE_CODE (array) != STRING_CST
10320 && TREE_CODE (array) != VAR_DECL)
10321 return 0;
10322 }
10323 else
10324 return 0;
10325 }
10326 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10327 {
10328 tree arg0 = TREE_OPERAND (arg, 0);
10329 tree arg1 = TREE_OPERAND (arg, 1);
10330
10331 STRIP_NOPS (arg0);
10332 STRIP_NOPS (arg1);
10333
10334 if (TREE_CODE (arg0) == ADDR_EXPR
10335 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10336 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10337 {
10338 array = TREE_OPERAND (arg0, 0);
10339 offset = arg1;
10340 }
10341 else if (TREE_CODE (arg1) == ADDR_EXPR
10342 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10343 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10344 {
10345 array = TREE_OPERAND (arg1, 0);
10346 offset = arg0;
10347 }
10348 else
10349 return 0;
10350 }
10351 else
10352 return 0;
10353
10354 if (TREE_CODE (array) == STRING_CST)
10355 {
10356 *ptr_offset = fold_convert (sizetype, offset);
10357 return array;
10358 }
10359 else if (TREE_CODE (array) == VAR_DECL
10360 || TREE_CODE (array) == CONST_DECL)
10361 {
10362 int length;
10363
10364 /* Variables initialized to string literals can be handled too. */
10365 if (!const_value_known_p (array)
10366 || !DECL_INITIAL (array)
10367 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10368 return 0;
10369
10370 /* Avoid const char foo[4] = "abcde"; */
10371 if (DECL_SIZE_UNIT (array) == NULL_TREE
10372 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10373 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10374 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10375 return 0;
10376
10377 /* If variable is bigger than the string literal, OFFSET must be constant
10378 and inside of the bounds of the string literal. */
10379 offset = fold_convert (sizetype, offset);
10380 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10381 && (! host_integerp (offset, 1)
10382 || compare_tree_int (offset, length) >= 0))
10383 return 0;
10384
10385 *ptr_offset = offset;
10386 return DECL_INITIAL (array);
10387 }
10388
10389 return 0;
10390 }
10391 \f
10392 /* Generate code to calculate OPS, and exploded expression
10393 using a store-flag instruction and return an rtx for the result.
10394 OPS reflects a comparison.
10395
10396 If TARGET is nonzero, store the result there if convenient.
10397
10398 Return zero if there is no suitable set-flag instruction
10399 available on this machine.
10400
10401 Once expand_expr has been called on the arguments of the comparison,
10402 we are committed to doing the store flag, since it is not safe to
10403 re-evaluate the expression. We emit the store-flag insn by calling
10404 emit_store_flag, but only expand the arguments if we have a reason
10405 to believe that emit_store_flag will be successful. If we think that
10406 it will, but it isn't, we have to simulate the store-flag with a
10407 set/jump/set sequence. */
10408
10409 static rtx
10410 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10411 {
10412 enum rtx_code code;
10413 tree arg0, arg1, type;
10414 tree tem;
10415 enum machine_mode operand_mode;
10416 int unsignedp;
10417 rtx op0, op1;
10418 rtx subtarget = target;
10419 location_t loc = ops->location;
10420
10421 arg0 = ops->op0;
10422 arg1 = ops->op1;
10423
10424 /* Don't crash if the comparison was erroneous. */
10425 if (arg0 == error_mark_node || arg1 == error_mark_node)
10426 return const0_rtx;
10427
10428 type = TREE_TYPE (arg0);
10429 operand_mode = TYPE_MODE (type);
10430 unsignedp = TYPE_UNSIGNED (type);
10431
10432 /* We won't bother with BLKmode store-flag operations because it would mean
10433 passing a lot of information to emit_store_flag. */
10434 if (operand_mode == BLKmode)
10435 return 0;
10436
10437 /* We won't bother with store-flag operations involving function pointers
10438 when function pointers must be canonicalized before comparisons. */
10439 #ifdef HAVE_canonicalize_funcptr_for_compare
10440 if (HAVE_canonicalize_funcptr_for_compare
10441 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10442 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10443 == FUNCTION_TYPE))
10444 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10445 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10446 == FUNCTION_TYPE))))
10447 return 0;
10448 #endif
10449
10450 STRIP_NOPS (arg0);
10451 STRIP_NOPS (arg1);
10452
10453 /* For vector typed comparisons emit code to generate the desired
10454 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10455 expander for this. */
10456 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10457 {
10458 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10459 tree if_true = constant_boolean_node (true, ops->type);
10460 tree if_false = constant_boolean_node (false, ops->type);
10461 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10462 }
10463
10464 /* For vector typed comparisons emit code to generate the desired
10465 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10466 expander for this. */
10467 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10468 {
10469 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10470 tree if_true = constant_boolean_node (true, ops->type);
10471 tree if_false = constant_boolean_node (false, ops->type);
10472 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10473 }
10474
10475 /* Get the rtx comparison code to use. We know that EXP is a comparison
10476 operation of some type. Some comparisons against 1 and -1 can be
10477 converted to comparisons with zero. Do so here so that the tests
10478 below will be aware that we have a comparison with zero. These
10479 tests will not catch constants in the first operand, but constants
10480 are rarely passed as the first operand. */
10481
10482 switch (ops->code)
10483 {
10484 case EQ_EXPR:
10485 code = EQ;
10486 break;
10487 case NE_EXPR:
10488 code = NE;
10489 break;
10490 case LT_EXPR:
10491 if (integer_onep (arg1))
10492 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10493 else
10494 code = unsignedp ? LTU : LT;
10495 break;
10496 case LE_EXPR:
10497 if (! unsignedp && integer_all_onesp (arg1))
10498 arg1 = integer_zero_node, code = LT;
10499 else
10500 code = unsignedp ? LEU : LE;
10501 break;
10502 case GT_EXPR:
10503 if (! unsignedp && integer_all_onesp (arg1))
10504 arg1 = integer_zero_node, code = GE;
10505 else
10506 code = unsignedp ? GTU : GT;
10507 break;
10508 case GE_EXPR:
10509 if (integer_onep (arg1))
10510 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10511 else
10512 code = unsignedp ? GEU : GE;
10513 break;
10514
10515 case UNORDERED_EXPR:
10516 code = UNORDERED;
10517 break;
10518 case ORDERED_EXPR:
10519 code = ORDERED;
10520 break;
10521 case UNLT_EXPR:
10522 code = UNLT;
10523 break;
10524 case UNLE_EXPR:
10525 code = UNLE;
10526 break;
10527 case UNGT_EXPR:
10528 code = UNGT;
10529 break;
10530 case UNGE_EXPR:
10531 code = UNGE;
10532 break;
10533 case UNEQ_EXPR:
10534 code = UNEQ;
10535 break;
10536 case LTGT_EXPR:
10537 code = LTGT;
10538 break;
10539
10540 default:
10541 gcc_unreachable ();
10542 }
10543
10544 /* Put a constant second. */
10545 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10546 || TREE_CODE (arg0) == FIXED_CST)
10547 {
10548 tem = arg0; arg0 = arg1; arg1 = tem;
10549 code = swap_condition (code);
10550 }
10551
10552 /* If this is an equality or inequality test of a single bit, we can
10553 do this by shifting the bit being tested to the low-order bit and
10554 masking the result with the constant 1. If the condition was EQ,
10555 we xor it with 1. This does not require an scc insn and is faster
10556 than an scc insn even if we have it.
10557
10558 The code to make this transformation was moved into fold_single_bit_test,
10559 so we just call into the folder and expand its result. */
10560
10561 if ((code == NE || code == EQ)
10562 && integer_zerop (arg1)
10563 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10564 {
10565 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
10566 if (srcstmt
10567 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
10568 {
10569 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
10570 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10571 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
10572 gimple_assign_rhs1 (srcstmt),
10573 gimple_assign_rhs2 (srcstmt));
10574 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
10575 if (temp)
10576 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
10577 }
10578 }
10579
10580 if (! get_subtarget (target)
10581 || GET_MODE (subtarget) != operand_mode)
10582 subtarget = 0;
10583
10584 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10585
10586 if (target == 0)
10587 target = gen_reg_rtx (mode);
10588
10589 /* Try a cstore if possible. */
10590 return emit_store_flag_force (target, code, op0, op1,
10591 operand_mode, unsignedp,
10592 (TYPE_PRECISION (ops->type) == 1
10593 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10594 }
10595 \f
10596
10597 /* Stubs in case we haven't got a casesi insn. */
10598 #ifndef HAVE_casesi
10599 # define HAVE_casesi 0
10600 # define gen_casesi(a, b, c, d, e) (0)
10601 # define CODE_FOR_casesi CODE_FOR_nothing
10602 #endif
10603
10604 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10605 0 otherwise (i.e. if there is no casesi instruction). */
10606 int
10607 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10608 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10609 rtx fallback_label ATTRIBUTE_UNUSED)
10610 {
10611 struct expand_operand ops[5];
10612 enum machine_mode index_mode = SImode;
10613 int index_bits = GET_MODE_BITSIZE (index_mode);
10614 rtx op1, op2, index;
10615
10616 if (! HAVE_casesi)
10617 return 0;
10618
10619 /* Convert the index to SImode. */
10620 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10621 {
10622 enum machine_mode omode = TYPE_MODE (index_type);
10623 rtx rangertx = expand_normal (range);
10624
10625 /* We must handle the endpoints in the original mode. */
10626 index_expr = build2 (MINUS_EXPR, index_type,
10627 index_expr, minval);
10628 minval = integer_zero_node;
10629 index = expand_normal (index_expr);
10630 if (default_label)
10631 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10632 omode, 1, default_label);
10633 /* Now we can safely truncate. */
10634 index = convert_to_mode (index_mode, index, 0);
10635 }
10636 else
10637 {
10638 if (TYPE_MODE (index_type) != index_mode)
10639 {
10640 index_type = lang_hooks.types.type_for_size (index_bits, 0);
10641 index_expr = fold_convert (index_type, index_expr);
10642 }
10643
10644 index = expand_normal (index_expr);
10645 }
10646
10647 do_pending_stack_adjust ();
10648
10649 op1 = expand_normal (minval);
10650 op2 = expand_normal (range);
10651
10652 create_input_operand (&ops[0], index, index_mode);
10653 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10654 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10655 create_fixed_operand (&ops[3], table_label);
10656 create_fixed_operand (&ops[4], (default_label
10657 ? default_label
10658 : fallback_label));
10659 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10660 return 1;
10661 }
10662
10663 /* Attempt to generate a tablejump instruction; same concept. */
10664 #ifndef HAVE_tablejump
10665 #define HAVE_tablejump 0
10666 #define gen_tablejump(x, y) (0)
10667 #endif
10668
10669 /* Subroutine of the next function.
10670
10671 INDEX is the value being switched on, with the lowest value
10672 in the table already subtracted.
10673 MODE is its expected mode (needed if INDEX is constant).
10674 RANGE is the length of the jump table.
10675 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10676
10677 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10678 index value is out of range. */
10679
10680 static void
10681 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10682 rtx default_label)
10683 {
10684 rtx temp, vector;
10685
10686 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10687 cfun->cfg->max_jumptable_ents = INTVAL (range);
10688
10689 /* Do an unsigned comparison (in the proper mode) between the index
10690 expression and the value which represents the length of the range.
10691 Since we just finished subtracting the lower bound of the range
10692 from the index expression, this comparison allows us to simultaneously
10693 check that the original index expression value is both greater than
10694 or equal to the minimum value of the range and less than or equal to
10695 the maximum value of the range. */
10696
10697 if (default_label)
10698 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10699 default_label);
10700
10701 /* If index is in range, it must fit in Pmode.
10702 Convert to Pmode so we can index with it. */
10703 if (mode != Pmode)
10704 index = convert_to_mode (Pmode, index, 1);
10705
10706 /* Don't let a MEM slip through, because then INDEX that comes
10707 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10708 and break_out_memory_refs will go to work on it and mess it up. */
10709 #ifdef PIC_CASE_VECTOR_ADDRESS
10710 if (flag_pic && !REG_P (index))
10711 index = copy_to_mode_reg (Pmode, index);
10712 #endif
10713
10714 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10715 GET_MODE_SIZE, because this indicates how large insns are. The other
10716 uses should all be Pmode, because they are addresses. This code
10717 could fail if addresses and insns are not the same size. */
10718 index = gen_rtx_PLUS (Pmode,
10719 gen_rtx_MULT (Pmode, index,
10720 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10721 gen_rtx_LABEL_REF (Pmode, table_label));
10722 #ifdef PIC_CASE_VECTOR_ADDRESS
10723 if (flag_pic)
10724 index = PIC_CASE_VECTOR_ADDRESS (index);
10725 else
10726 #endif
10727 index = memory_address (CASE_VECTOR_MODE, index);
10728 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10729 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10730 convert_move (temp, vector, 0);
10731
10732 emit_jump_insn (gen_tablejump (temp, table_label));
10733
10734 /* If we are generating PIC code or if the table is PC-relative, the
10735 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10736 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10737 emit_barrier ();
10738 }
10739
10740 int
10741 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10742 rtx table_label, rtx default_label)
10743 {
10744 rtx index;
10745
10746 if (! HAVE_tablejump)
10747 return 0;
10748
10749 index_expr = fold_build2 (MINUS_EXPR, index_type,
10750 fold_convert (index_type, index_expr),
10751 fold_convert (index_type, minval));
10752 index = expand_normal (index_expr);
10753 do_pending_stack_adjust ();
10754
10755 do_tablejump (index, TYPE_MODE (index_type),
10756 convert_modes (TYPE_MODE (index_type),
10757 TYPE_MODE (TREE_TYPE (range)),
10758 expand_normal (range),
10759 TYPE_UNSIGNED (TREE_TYPE (range))),
10760 table_label, default_label);
10761 return 1;
10762 }
10763
10764 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10765 static rtx
10766 const_vector_from_tree (tree exp)
10767 {
10768 rtvec v;
10769 int units, i;
10770 tree link, elt;
10771 enum machine_mode inner, mode;
10772
10773 mode = TYPE_MODE (TREE_TYPE (exp));
10774
10775 if (initializer_zerop (exp))
10776 return CONST0_RTX (mode);
10777
10778 units = GET_MODE_NUNITS (mode);
10779 inner = GET_MODE_INNER (mode);
10780
10781 v = rtvec_alloc (units);
10782
10783 link = TREE_VECTOR_CST_ELTS (exp);
10784 for (i = 0; link; link = TREE_CHAIN (link), ++i)
10785 {
10786 elt = TREE_VALUE (link);
10787
10788 if (TREE_CODE (elt) == REAL_CST)
10789 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10790 inner);
10791 else if (TREE_CODE (elt) == FIXED_CST)
10792 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10793 inner);
10794 else
10795 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10796 inner);
10797 }
10798
10799 /* Initialize remaining elements to 0. */
10800 for (; i < units; ++i)
10801 RTVEC_ELT (v, i) = CONST0_RTX (inner);
10802
10803 return gen_rtx_CONST_VECTOR (mode, v);
10804 }
10805
10806 /* Build a decl for a personality function given a language prefix. */
10807
10808 tree
10809 build_personality_function (const char *lang)
10810 {
10811 const char *unwind_and_version;
10812 tree decl, type;
10813 char *name;
10814
10815 switch (targetm_common.except_unwind_info (&global_options))
10816 {
10817 case UI_NONE:
10818 return NULL;
10819 case UI_SJLJ:
10820 unwind_and_version = "_sj0";
10821 break;
10822 case UI_DWARF2:
10823 case UI_TARGET:
10824 unwind_and_version = "_v0";
10825 break;
10826 default:
10827 gcc_unreachable ();
10828 }
10829
10830 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
10831
10832 type = build_function_type_list (integer_type_node, integer_type_node,
10833 long_long_unsigned_type_node,
10834 ptr_type_node, ptr_type_node, NULL_TREE);
10835 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
10836 get_identifier (name), type);
10837 DECL_ARTIFICIAL (decl) = 1;
10838 DECL_EXTERNAL (decl) = 1;
10839 TREE_PUBLIC (decl) = 1;
10840
10841 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
10842 are the flags assigned by targetm.encode_section_info. */
10843 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
10844
10845 return decl;
10846 }
10847
10848 /* Extracts the personality function of DECL and returns the corresponding
10849 libfunc. */
10850
10851 rtx
10852 get_personality_function (tree decl)
10853 {
10854 tree personality = DECL_FUNCTION_PERSONALITY (decl);
10855 enum eh_personality_kind pk;
10856
10857 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
10858 if (pk == eh_personality_none)
10859 return NULL;
10860
10861 if (!personality
10862 && pk == eh_personality_any)
10863 personality = lang_hooks.eh_personality ();
10864
10865 if (pk == eh_personality_lang)
10866 gcc_assert (personality != NULL_TREE);
10867
10868 return XEXP (DECL_RTL (personality), 0);
10869 }
10870
10871 #include "gt-expr.h"