rtl.texi (MEM_IN_STRUCT_P, [...]): Delete.
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
4 2012 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "common/common-target.h"
53 #include "timevar.h"
54 #include "df.h"
55 #include "diagnostic.h"
56 #include "ssaexpand.h"
57 #include "target-globals.h"
58 #include "params.h"
59
60 /* Decide whether a function's arguments should be processed
61 from first to last or from last to first.
62
63 They should if the stack and args grow in opposite directions, but
64 only if we have push insns. */
65
66 #ifdef PUSH_ROUNDING
67
68 #ifndef PUSH_ARGS_REVERSED
69 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
70 #define PUSH_ARGS_REVERSED /* If it's last to first. */
71 #endif
72 #endif
73
74 #endif
75
76 #ifndef STACK_PUSH_CODE
77 #ifdef STACK_GROWS_DOWNWARD
78 #define STACK_PUSH_CODE PRE_DEC
79 #else
80 #define STACK_PUSH_CODE PRE_INC
81 #endif
82 #endif
83
84
85 /* If this is nonzero, we do not bother generating VOLATILE
86 around volatile memory references, and we are willing to
87 output indirect addresses. If cse is to follow, we reject
88 indirect addresses so a useful potential cse is generated;
89 if it is used only once, instruction combination will produce
90 the same indirect address eventually. */
91 int cse_not_expected;
92
93 /* This structure is used by move_by_pieces to describe the move to
94 be performed. */
95 struct move_by_pieces_d
96 {
97 rtx to;
98 rtx to_addr;
99 int autinc_to;
100 int explicit_inc_to;
101 rtx from;
102 rtx from_addr;
103 int autinc_from;
104 int explicit_inc_from;
105 unsigned HOST_WIDE_INT len;
106 HOST_WIDE_INT offset;
107 int reverse;
108 };
109
110 /* This structure is used by store_by_pieces to describe the clear to
111 be performed. */
112
113 struct store_by_pieces_d
114 {
115 rtx to;
116 rtx to_addr;
117 int autinc_to;
118 int explicit_inc_to;
119 unsigned HOST_WIDE_INT len;
120 HOST_WIDE_INT offset;
121 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
122 void *constfundata;
123 int reverse;
124 };
125
126 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
127 struct move_by_pieces_d *);
128 static bool block_move_libcall_safe_for_call_parm (void);
129 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
130 static tree emit_block_move_libcall_fn (int);
131 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
132 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
133 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
134 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
135 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
136 struct store_by_pieces_d *);
137 static tree clear_storage_libcall_fn (int);
138 static rtx compress_float_constant (rtx, rtx);
139 static rtx get_subtarget (rtx);
140 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
141 HOST_WIDE_INT, enum machine_mode,
142 tree, tree, int, alias_set_type);
143 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
144 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
145 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
146 enum machine_mode,
147 tree, tree, alias_set_type, bool);
148
149 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
150
151 static int is_aligning_offset (const_tree, const_tree);
152 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
153 enum expand_modifier);
154 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
155 static rtx do_store_flag (sepops, rtx, enum machine_mode);
156 #ifdef PUSH_ROUNDING
157 static void emit_single_push_insn (enum machine_mode, rtx, tree);
158 #endif
159 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
160 static rtx const_vector_from_tree (tree);
161 static void write_complex_part (rtx, rtx, bool);
162
163 /* This macro is used to determine whether move_by_pieces should be called
164 to perform a structure copy. */
165 #ifndef MOVE_BY_PIECES_P
166 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
167 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
168 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
169 #endif
170
171 /* This macro is used to determine whether clear_by_pieces should be
172 called to clear storage. */
173 #ifndef CLEAR_BY_PIECES_P
174 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
175 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
176 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
177 #endif
178
179 /* This macro is used to determine whether store_by_pieces should be
180 called to "memset" storage with byte values other than zero. */
181 #ifndef SET_BY_PIECES_P
182 #define SET_BY_PIECES_P(SIZE, ALIGN) \
183 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
184 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
185 #endif
186
187 /* This macro is used to determine whether store_by_pieces should be
188 called to "memcpy" storage when the source is a constant string. */
189 #ifndef STORE_BY_PIECES_P
190 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
191 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
192 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
193 #endif
194
195 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
196
197 #ifndef SLOW_UNALIGNED_ACCESS
198 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
199 #endif
200 \f
201 /* This is run to set up which modes can be used
202 directly in memory and to initialize the block move optab. It is run
203 at the beginning of compilation and when the target is reinitialized. */
204
205 void
206 init_expr_target (void)
207 {
208 rtx insn, pat;
209 enum machine_mode mode;
210 int num_clobbers;
211 rtx mem, mem1;
212 rtx reg;
213
214 /* Try indexing by frame ptr and try by stack ptr.
215 It is known that on the Convex the stack ptr isn't a valid index.
216 With luck, one or the other is valid on any machine. */
217 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
218 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
219
220 /* A scratch register we can modify in-place below to avoid
221 useless RTL allocations. */
222 reg = gen_rtx_REG (VOIDmode, -1);
223
224 insn = rtx_alloc (INSN);
225 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
226 PATTERN (insn) = pat;
227
228 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
229 mode = (enum machine_mode) ((int) mode + 1))
230 {
231 int regno;
232
233 direct_load[(int) mode] = direct_store[(int) mode] = 0;
234 PUT_MODE (mem, mode);
235 PUT_MODE (mem1, mode);
236 PUT_MODE (reg, mode);
237
238 /* See if there is some register that can be used in this mode and
239 directly loaded or stored from memory. */
240
241 if (mode != VOIDmode && mode != BLKmode)
242 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
243 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
244 regno++)
245 {
246 if (! HARD_REGNO_MODE_OK (regno, mode))
247 continue;
248
249 SET_REGNO (reg, regno);
250
251 SET_SRC (pat) = mem;
252 SET_DEST (pat) = reg;
253 if (recog (pat, insn, &num_clobbers) >= 0)
254 direct_load[(int) mode] = 1;
255
256 SET_SRC (pat) = mem1;
257 SET_DEST (pat) = reg;
258 if (recog (pat, insn, &num_clobbers) >= 0)
259 direct_load[(int) mode] = 1;
260
261 SET_SRC (pat) = reg;
262 SET_DEST (pat) = mem;
263 if (recog (pat, insn, &num_clobbers) >= 0)
264 direct_store[(int) mode] = 1;
265
266 SET_SRC (pat) = reg;
267 SET_DEST (pat) = mem1;
268 if (recog (pat, insn, &num_clobbers) >= 0)
269 direct_store[(int) mode] = 1;
270 }
271 }
272
273 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
274
275 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
276 mode = GET_MODE_WIDER_MODE (mode))
277 {
278 enum machine_mode srcmode;
279 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
280 srcmode = GET_MODE_WIDER_MODE (srcmode))
281 {
282 enum insn_code ic;
283
284 ic = can_extend_p (mode, srcmode, 0);
285 if (ic == CODE_FOR_nothing)
286 continue;
287
288 PUT_MODE (mem, srcmode);
289
290 if (insn_operand_matches (ic, 1, mem))
291 float_extend_from_mem[mode][srcmode] = true;
292 }
293 }
294 }
295
296 /* This is run at the start of compiling a function. */
297
298 void
299 init_expr (void)
300 {
301 memset (&crtl->expr, 0, sizeof (crtl->expr));
302 }
303 \f
304 /* Copy data from FROM to TO, where the machine modes are not the same.
305 Both modes may be integer, or both may be floating, or both may be
306 fixed-point.
307 UNSIGNEDP should be nonzero if FROM is an unsigned type.
308 This causes zero-extension instead of sign-extension. */
309
310 void
311 convert_move (rtx to, rtx from, int unsignedp)
312 {
313 enum machine_mode to_mode = GET_MODE (to);
314 enum machine_mode from_mode = GET_MODE (from);
315 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
316 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
317 enum insn_code code;
318 rtx libcall;
319
320 /* rtx code for making an equivalent value. */
321 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
322 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
323
324
325 gcc_assert (to_real == from_real);
326 gcc_assert (to_mode != BLKmode);
327 gcc_assert (from_mode != BLKmode);
328
329 /* If the source and destination are already the same, then there's
330 nothing to do. */
331 if (to == from)
332 return;
333
334 /* If FROM is a SUBREG that indicates that we have already done at least
335 the required extension, strip it. We don't handle such SUBREGs as
336 TO here. */
337
338 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
339 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
340 >= GET_MODE_PRECISION (to_mode))
341 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
342 from = gen_lowpart (to_mode, from), from_mode = to_mode;
343
344 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
345
346 if (to_mode == from_mode
347 || (from_mode == VOIDmode && CONSTANT_P (from)))
348 {
349 emit_move_insn (to, from);
350 return;
351 }
352
353 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
354 {
355 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
356
357 if (VECTOR_MODE_P (to_mode))
358 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
359 else
360 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
361
362 emit_move_insn (to, from);
363 return;
364 }
365
366 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
367 {
368 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
369 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
370 return;
371 }
372
373 if (to_real)
374 {
375 rtx value, insns;
376 convert_optab tab;
377
378 gcc_assert ((GET_MODE_PRECISION (from_mode)
379 != GET_MODE_PRECISION (to_mode))
380 || (DECIMAL_FLOAT_MODE_P (from_mode)
381 != DECIMAL_FLOAT_MODE_P (to_mode)));
382
383 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
384 /* Conversion between decimal float and binary float, same size. */
385 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
386 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
387 tab = sext_optab;
388 else
389 tab = trunc_optab;
390
391 /* Try converting directly if the insn is supported. */
392
393 code = convert_optab_handler (tab, to_mode, from_mode);
394 if (code != CODE_FOR_nothing)
395 {
396 emit_unop_insn (code, to, from,
397 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
398 return;
399 }
400
401 /* Otherwise use a libcall. */
402 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
403
404 /* Is this conversion implemented yet? */
405 gcc_assert (libcall);
406
407 start_sequence ();
408 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
409 1, from, from_mode);
410 insns = get_insns ();
411 end_sequence ();
412 emit_libcall_block (insns, to, value,
413 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
414 from)
415 : gen_rtx_FLOAT_EXTEND (to_mode, from));
416 return;
417 }
418
419 /* Handle pointer conversion. */ /* SPEE 900220. */
420 /* Targets are expected to provide conversion insns between PxImode and
421 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
422 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
423 {
424 enum machine_mode full_mode
425 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
426
427 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
428 != CODE_FOR_nothing);
429
430 if (full_mode != from_mode)
431 from = convert_to_mode (full_mode, from, unsignedp);
432 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
433 to, from, UNKNOWN);
434 return;
435 }
436 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
437 {
438 rtx new_from;
439 enum machine_mode full_mode
440 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
441
442 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)
443 != CODE_FOR_nothing);
444
445 if (to_mode == full_mode)
446 {
447 emit_unop_insn (convert_optab_handler (sext_optab, full_mode,
448 from_mode),
449 to, from, UNKNOWN);
450 return;
451 }
452
453 new_from = gen_reg_rtx (full_mode);
454 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode),
455 new_from, from, UNKNOWN);
456
457 /* else proceed to integer conversions below. */
458 from_mode = full_mode;
459 from = new_from;
460 }
461
462 /* Make sure both are fixed-point modes or both are not. */
463 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
464 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
465 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
466 {
467 /* If we widen from_mode to to_mode and they are in the same class,
468 we won't saturate the result.
469 Otherwise, always saturate the result to play safe. */
470 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
471 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
472 expand_fixed_convert (to, from, 0, 0);
473 else
474 expand_fixed_convert (to, from, 0, 1);
475 return;
476 }
477
478 /* Now both modes are integers. */
479
480 /* Handle expanding beyond a word. */
481 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
482 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
483 {
484 rtx insns;
485 rtx lowpart;
486 rtx fill_value;
487 rtx lowfrom;
488 int i;
489 enum machine_mode lowpart_mode;
490 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
491
492 /* Try converting directly if the insn is supported. */
493 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
494 != CODE_FOR_nothing)
495 {
496 /* If FROM is a SUBREG, put it into a register. Do this
497 so that we always generate the same set of insns for
498 better cse'ing; if an intermediate assignment occurred,
499 we won't be doing the operation directly on the SUBREG. */
500 if (optimize > 0 && GET_CODE (from) == SUBREG)
501 from = force_reg (from_mode, from);
502 emit_unop_insn (code, to, from, equiv_code);
503 return;
504 }
505 /* Next, try converting via full word. */
506 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
507 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
508 != CODE_FOR_nothing))
509 {
510 rtx word_to = gen_reg_rtx (word_mode);
511 if (REG_P (to))
512 {
513 if (reg_overlap_mentioned_p (to, from))
514 from = force_reg (from_mode, from);
515 emit_clobber (to);
516 }
517 convert_move (word_to, from, unsignedp);
518 emit_unop_insn (code, to, word_to, equiv_code);
519 return;
520 }
521
522 /* No special multiword conversion insn; do it by hand. */
523 start_sequence ();
524
525 /* Since we will turn this into a no conflict block, we must ensure
526 that the source does not overlap the target. */
527
528 if (reg_overlap_mentioned_p (to, from))
529 from = force_reg (from_mode, from);
530
531 /* Get a copy of FROM widened to a word, if necessary. */
532 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
533 lowpart_mode = word_mode;
534 else
535 lowpart_mode = from_mode;
536
537 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
538
539 lowpart = gen_lowpart (lowpart_mode, to);
540 emit_move_insn (lowpart, lowfrom);
541
542 /* Compute the value to put in each remaining word. */
543 if (unsignedp)
544 fill_value = const0_rtx;
545 else
546 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
547 LT, lowfrom, const0_rtx,
548 VOIDmode, 0, -1);
549
550 /* Fill the remaining words. */
551 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
552 {
553 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
554 rtx subword = operand_subword (to, index, 1, to_mode);
555
556 gcc_assert (subword);
557
558 if (fill_value != subword)
559 emit_move_insn (subword, fill_value);
560 }
561
562 insns = get_insns ();
563 end_sequence ();
564
565 emit_insn (insns);
566 return;
567 }
568
569 /* Truncating multi-word to a word or less. */
570 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
571 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
572 {
573 if (!((MEM_P (from)
574 && ! MEM_VOLATILE_P (from)
575 && direct_load[(int) to_mode]
576 && ! mode_dependent_address_p (XEXP (from, 0)))
577 || REG_P (from)
578 || GET_CODE (from) == SUBREG))
579 from = force_reg (from_mode, from);
580 convert_move (to, gen_lowpart (word_mode, from), 0);
581 return;
582 }
583
584 /* Now follow all the conversions between integers
585 no more than a word long. */
586
587 /* For truncation, usually we can just refer to FROM in a narrower mode. */
588 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
589 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
590 {
591 if (!((MEM_P (from)
592 && ! MEM_VOLATILE_P (from)
593 && direct_load[(int) to_mode]
594 && ! mode_dependent_address_p (XEXP (from, 0)))
595 || REG_P (from)
596 || GET_CODE (from) == SUBREG))
597 from = force_reg (from_mode, from);
598 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
599 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
600 from = copy_to_reg (from);
601 emit_move_insn (to, gen_lowpart (to_mode, from));
602 return;
603 }
604
605 /* Handle extension. */
606 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
607 {
608 /* Convert directly if that works. */
609 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
610 != CODE_FOR_nothing)
611 {
612 emit_unop_insn (code, to, from, equiv_code);
613 return;
614 }
615 else
616 {
617 enum machine_mode intermediate;
618 rtx tmp;
619 int shift_amount;
620
621 /* Search for a mode to convert via. */
622 for (intermediate = from_mode; intermediate != VOIDmode;
623 intermediate = GET_MODE_WIDER_MODE (intermediate))
624 if (((can_extend_p (to_mode, intermediate, unsignedp)
625 != CODE_FOR_nothing)
626 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
627 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
628 && (can_extend_p (intermediate, from_mode, unsignedp)
629 != CODE_FOR_nothing))
630 {
631 convert_move (to, convert_to_mode (intermediate, from,
632 unsignedp), unsignedp);
633 return;
634 }
635
636 /* No suitable intermediate mode.
637 Generate what we need with shifts. */
638 shift_amount = (GET_MODE_PRECISION (to_mode)
639 - GET_MODE_PRECISION (from_mode));
640 from = gen_lowpart (to_mode, force_reg (from_mode, from));
641 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
642 to, unsignedp);
643 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
644 to, unsignedp);
645 if (tmp != to)
646 emit_move_insn (to, tmp);
647 return;
648 }
649 }
650
651 /* Support special truncate insns for certain modes. */
652 if (convert_optab_handler (trunc_optab, to_mode,
653 from_mode) != CODE_FOR_nothing)
654 {
655 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
656 to, from, UNKNOWN);
657 return;
658 }
659
660 /* Handle truncation of volatile memrefs, and so on;
661 the things that couldn't be truncated directly,
662 and for which there was no special instruction.
663
664 ??? Code above formerly short-circuited this, for most integer
665 mode pairs, with a force_reg in from_mode followed by a recursive
666 call to this routine. Appears always to have been wrong. */
667 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
668 {
669 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
670 emit_move_insn (to, temp);
671 return;
672 }
673
674 /* Mode combination is not recognized. */
675 gcc_unreachable ();
676 }
677
678 /* Return an rtx for a value that would result
679 from converting X to mode MODE.
680 Both X and MODE may be floating, or both integer.
681 UNSIGNEDP is nonzero if X is an unsigned value.
682 This can be done by referring to a part of X in place
683 or by copying to a new temporary with conversion. */
684
685 rtx
686 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
687 {
688 return convert_modes (mode, VOIDmode, x, unsignedp);
689 }
690
691 /* Return an rtx for a value that would result
692 from converting X from mode OLDMODE to mode MODE.
693 Both modes may be floating, or both integer.
694 UNSIGNEDP is nonzero if X is an unsigned value.
695
696 This can be done by referring to a part of X in place
697 or by copying to a new temporary with conversion.
698
699 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
700
701 rtx
702 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
703 {
704 rtx temp;
705
706 /* If FROM is a SUBREG that indicates that we have already done at least
707 the required extension, strip it. */
708
709 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
710 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
711 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
712 x = gen_lowpart (mode, x);
713
714 if (GET_MODE (x) != VOIDmode)
715 oldmode = GET_MODE (x);
716
717 if (mode == oldmode)
718 return x;
719
720 /* There is one case that we must handle specially: If we are converting
721 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
722 we are to interpret the constant as unsigned, gen_lowpart will do
723 the wrong if the constant appears negative. What we want to do is
724 make the high-order word of the constant zero, not all ones. */
725
726 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
727 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
728 && CONST_INT_P (x) && INTVAL (x) < 0)
729 {
730 double_int val = uhwi_to_double_int (INTVAL (x));
731
732 /* We need to zero extend VAL. */
733 if (oldmode != VOIDmode)
734 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
735
736 return immed_double_int_const (val, mode);
737 }
738
739 /* We can do this with a gen_lowpart if both desired and current modes
740 are integer, and this is either a constant integer, a register, or a
741 non-volatile MEM. Except for the constant case where MODE is no
742 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
743
744 if ((CONST_INT_P (x)
745 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
746 || (GET_MODE_CLASS (mode) == MODE_INT
747 && GET_MODE_CLASS (oldmode) == MODE_INT
748 && (GET_CODE (x) == CONST_DOUBLE
749 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
750 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
751 && direct_load[(int) mode])
752 || (REG_P (x)
753 && (! HARD_REGISTER_P (x)
754 || HARD_REGNO_MODE_OK (REGNO (x), mode))
755 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
756 GET_MODE (x))))))))
757 {
758 /* ?? If we don't know OLDMODE, we have to assume here that
759 X does not need sign- or zero-extension. This may not be
760 the case, but it's the best we can do. */
761 if (CONST_INT_P (x) && oldmode != VOIDmode
762 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
763 {
764 HOST_WIDE_INT val = INTVAL (x);
765
766 /* We must sign or zero-extend in this case. Start by
767 zero-extending, then sign extend if we need to. */
768 val &= GET_MODE_MASK (oldmode);
769 if (! unsignedp
770 && val_signbit_known_set_p (oldmode, val))
771 val |= ~GET_MODE_MASK (oldmode);
772
773 return gen_int_mode (val, mode);
774 }
775
776 return gen_lowpart (mode, x);
777 }
778
779 /* Converting from integer constant into mode is always equivalent to an
780 subreg operation. */
781 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
782 {
783 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
784 return simplify_gen_subreg (mode, x, oldmode, 0);
785 }
786
787 temp = gen_reg_rtx (mode);
788 convert_move (temp, x, unsignedp);
789 return temp;
790 }
791 \f
792 /* Return the largest alignment we can use for doing a move (or store)
793 of MAX_PIECES. ALIGN is the largest alignment we could use. */
794
795 static unsigned int
796 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
797 {
798 enum machine_mode tmode;
799
800 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
801 if (align >= GET_MODE_ALIGNMENT (tmode))
802 align = GET_MODE_ALIGNMENT (tmode);
803 else
804 {
805 enum machine_mode tmode, xmode;
806
807 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
808 tmode != VOIDmode;
809 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
810 if (GET_MODE_SIZE (tmode) > max_pieces
811 || SLOW_UNALIGNED_ACCESS (tmode, align))
812 break;
813
814 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
815 }
816
817 return align;
818 }
819
820 /* Return the widest integer mode no wider than SIZE. If no such mode
821 can be found, return VOIDmode. */
822
823 static enum machine_mode
824 widest_int_mode_for_size (unsigned int size)
825 {
826 enum machine_mode tmode, mode = VOIDmode;
827
828 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
829 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
830 if (GET_MODE_SIZE (tmode) < size)
831 mode = tmode;
832
833 return mode;
834 }
835
836 /* STORE_MAX_PIECES is the number of bytes at a time that we can
837 store efficiently. Due to internal GCC limitations, this is
838 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
839 for an immediate constant. */
840
841 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
842
843 /* Determine whether the LEN bytes can be moved by using several move
844 instructions. Return nonzero if a call to move_by_pieces should
845 succeed. */
846
847 int
848 can_move_by_pieces (unsigned HOST_WIDE_INT len,
849 unsigned int align ATTRIBUTE_UNUSED)
850 {
851 return MOVE_BY_PIECES_P (len, align);
852 }
853
854 /* Generate several move instructions to copy LEN bytes from block FROM to
855 block TO. (These are MEM rtx's with BLKmode).
856
857 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
858 used to push FROM to the stack.
859
860 ALIGN is maximum stack alignment we can assume.
861
862 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
863 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
864 stpcpy. */
865
866 rtx
867 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
868 unsigned int align, int endp)
869 {
870 struct move_by_pieces_d data;
871 enum machine_mode to_addr_mode, from_addr_mode
872 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
873 rtx to_addr, from_addr = XEXP (from, 0);
874 unsigned int max_size = MOVE_MAX_PIECES + 1;
875 enum insn_code icode;
876
877 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
878
879 data.offset = 0;
880 data.from_addr = from_addr;
881 if (to)
882 {
883 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
884 to_addr = XEXP (to, 0);
885 data.to = to;
886 data.autinc_to
887 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
888 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
889 data.reverse
890 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
891 }
892 else
893 {
894 to_addr_mode = VOIDmode;
895 to_addr = NULL_RTX;
896 data.to = NULL_RTX;
897 data.autinc_to = 1;
898 #ifdef STACK_GROWS_DOWNWARD
899 data.reverse = 1;
900 #else
901 data.reverse = 0;
902 #endif
903 }
904 data.to_addr = to_addr;
905 data.from = from;
906 data.autinc_from
907 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
908 || GET_CODE (from_addr) == POST_INC
909 || GET_CODE (from_addr) == POST_DEC);
910
911 data.explicit_inc_from = 0;
912 data.explicit_inc_to = 0;
913 if (data.reverse) data.offset = len;
914 data.len = len;
915
916 /* If copying requires more than two move insns,
917 copy addresses to registers (to make displacements shorter)
918 and use post-increment if available. */
919 if (!(data.autinc_from && data.autinc_to)
920 && move_by_pieces_ninsns (len, align, max_size) > 2)
921 {
922 /* Find the mode of the largest move...
923 MODE might not be used depending on the definitions of the
924 USE_* macros below. */
925 enum machine_mode mode ATTRIBUTE_UNUSED
926 = widest_int_mode_for_size (max_size);
927
928 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
929 {
930 data.from_addr = copy_to_mode_reg (from_addr_mode,
931 plus_constant (from_addr, len));
932 data.autinc_from = 1;
933 data.explicit_inc_from = -1;
934 }
935 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
936 {
937 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
938 data.autinc_from = 1;
939 data.explicit_inc_from = 1;
940 }
941 if (!data.autinc_from && CONSTANT_P (from_addr))
942 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
943 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
944 {
945 data.to_addr = copy_to_mode_reg (to_addr_mode,
946 plus_constant (to_addr, len));
947 data.autinc_to = 1;
948 data.explicit_inc_to = -1;
949 }
950 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
951 {
952 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
953 data.autinc_to = 1;
954 data.explicit_inc_to = 1;
955 }
956 if (!data.autinc_to && CONSTANT_P (to_addr))
957 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
958 }
959
960 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
961
962 /* First move what we can in the largest integer mode, then go to
963 successively smaller modes. */
964
965 while (max_size > 1)
966 {
967 enum machine_mode mode = widest_int_mode_for_size (max_size);
968
969 if (mode == VOIDmode)
970 break;
971
972 icode = optab_handler (mov_optab, mode);
973 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
974 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
975
976 max_size = GET_MODE_SIZE (mode);
977 }
978
979 /* The code above should have handled everything. */
980 gcc_assert (!data.len);
981
982 if (endp)
983 {
984 rtx to1;
985
986 gcc_assert (!data.reverse);
987 if (data.autinc_to)
988 {
989 if (endp == 2)
990 {
991 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
992 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
993 else
994 data.to_addr = copy_to_mode_reg (to_addr_mode,
995 plus_constant (data.to_addr,
996 -1));
997 }
998 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
999 data.offset);
1000 }
1001 else
1002 {
1003 if (endp == 2)
1004 --data.offset;
1005 to1 = adjust_address (data.to, QImode, data.offset);
1006 }
1007 return to1;
1008 }
1009 else
1010 return data.to;
1011 }
1012
1013 /* Return number of insns required to move L bytes by pieces.
1014 ALIGN (in bits) is maximum alignment we can assume. */
1015
1016 unsigned HOST_WIDE_INT
1017 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1018 unsigned int max_size)
1019 {
1020 unsigned HOST_WIDE_INT n_insns = 0;
1021
1022 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1023
1024 while (max_size > 1)
1025 {
1026 enum machine_mode mode;
1027 enum insn_code icode;
1028
1029 mode = widest_int_mode_for_size (max_size);
1030
1031 if (mode == VOIDmode)
1032 break;
1033
1034 icode = optab_handler (mov_optab, mode);
1035 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1036 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1037
1038 max_size = GET_MODE_SIZE (mode);
1039 }
1040
1041 gcc_assert (!l);
1042 return n_insns;
1043 }
1044
1045 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1046 with move instructions for mode MODE. GENFUN is the gen_... function
1047 to make a move insn for that mode. DATA has all the other info. */
1048
1049 static void
1050 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1051 struct move_by_pieces_d *data)
1052 {
1053 unsigned int size = GET_MODE_SIZE (mode);
1054 rtx to1 = NULL_RTX, from1;
1055
1056 while (data->len >= size)
1057 {
1058 if (data->reverse)
1059 data->offset -= size;
1060
1061 if (data->to)
1062 {
1063 if (data->autinc_to)
1064 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1065 data->offset);
1066 else
1067 to1 = adjust_address (data->to, mode, data->offset);
1068 }
1069
1070 if (data->autinc_from)
1071 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1072 data->offset);
1073 else
1074 from1 = adjust_address (data->from, mode, data->offset);
1075
1076 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1077 emit_insn (gen_add2_insn (data->to_addr,
1078 GEN_INT (-(HOST_WIDE_INT)size)));
1079 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1080 emit_insn (gen_add2_insn (data->from_addr,
1081 GEN_INT (-(HOST_WIDE_INT)size)));
1082
1083 if (data->to)
1084 emit_insn ((*genfun) (to1, from1));
1085 else
1086 {
1087 #ifdef PUSH_ROUNDING
1088 emit_single_push_insn (mode, from1, NULL);
1089 #else
1090 gcc_unreachable ();
1091 #endif
1092 }
1093
1094 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1095 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1096 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1097 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1098
1099 if (! data->reverse)
1100 data->offset += size;
1101
1102 data->len -= size;
1103 }
1104 }
1105 \f
1106 /* Emit code to move a block Y to a block X. This may be done with
1107 string-move instructions, with multiple scalar move instructions,
1108 or with a library call.
1109
1110 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1111 SIZE is an rtx that says how long they are.
1112 ALIGN is the maximum alignment we can assume they have.
1113 METHOD describes what kind of copy this is, and what mechanisms may be used.
1114
1115 Return the address of the new block, if memcpy is called and returns it,
1116 0 otherwise. */
1117
1118 rtx
1119 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1120 unsigned int expected_align, HOST_WIDE_INT expected_size)
1121 {
1122 bool may_use_call;
1123 rtx retval = 0;
1124 unsigned int align;
1125
1126 gcc_assert (size);
1127 if (CONST_INT_P (size)
1128 && INTVAL (size) == 0)
1129 return 0;
1130
1131 switch (method)
1132 {
1133 case BLOCK_OP_NORMAL:
1134 case BLOCK_OP_TAILCALL:
1135 may_use_call = true;
1136 break;
1137
1138 case BLOCK_OP_CALL_PARM:
1139 may_use_call = block_move_libcall_safe_for_call_parm ();
1140
1141 /* Make inhibit_defer_pop nonzero around the library call
1142 to force it to pop the arguments right away. */
1143 NO_DEFER_POP;
1144 break;
1145
1146 case BLOCK_OP_NO_LIBCALL:
1147 may_use_call = false;
1148 break;
1149
1150 default:
1151 gcc_unreachable ();
1152 }
1153
1154 gcc_assert (MEM_P (x) && MEM_P (y));
1155 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1156 gcc_assert (align >= BITS_PER_UNIT);
1157
1158 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1159 block copy is more efficient for other large modes, e.g. DCmode. */
1160 x = adjust_address (x, BLKmode, 0);
1161 y = adjust_address (y, BLKmode, 0);
1162
1163 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1164 can be incorrect is coming from __builtin_memcpy. */
1165 if (CONST_INT_P (size))
1166 {
1167 x = shallow_copy_rtx (x);
1168 y = shallow_copy_rtx (y);
1169 set_mem_size (x, INTVAL (size));
1170 set_mem_size (y, INTVAL (size));
1171 }
1172
1173 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1174 move_by_pieces (x, y, INTVAL (size), align, 0);
1175 else if (emit_block_move_via_movmem (x, y, size, align,
1176 expected_align, expected_size))
1177 ;
1178 else if (may_use_call
1179 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1180 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1181 {
1182 /* Since x and y are passed to a libcall, mark the corresponding
1183 tree EXPR as addressable. */
1184 tree y_expr = MEM_EXPR (y);
1185 tree x_expr = MEM_EXPR (x);
1186 if (y_expr)
1187 mark_addressable (y_expr);
1188 if (x_expr)
1189 mark_addressable (x_expr);
1190 retval = emit_block_move_via_libcall (x, y, size,
1191 method == BLOCK_OP_TAILCALL);
1192 }
1193
1194 else
1195 emit_block_move_via_loop (x, y, size, align);
1196
1197 if (method == BLOCK_OP_CALL_PARM)
1198 OK_DEFER_POP;
1199
1200 return retval;
1201 }
1202
1203 rtx
1204 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1205 {
1206 return emit_block_move_hints (x, y, size, method, 0, -1);
1207 }
1208
1209 /* A subroutine of emit_block_move. Returns true if calling the
1210 block move libcall will not clobber any parameters which may have
1211 already been placed on the stack. */
1212
1213 static bool
1214 block_move_libcall_safe_for_call_parm (void)
1215 {
1216 #if defined (REG_PARM_STACK_SPACE)
1217 tree fn;
1218 #endif
1219
1220 /* If arguments are pushed on the stack, then they're safe. */
1221 if (PUSH_ARGS)
1222 return true;
1223
1224 /* If registers go on the stack anyway, any argument is sure to clobber
1225 an outgoing argument. */
1226 #if defined (REG_PARM_STACK_SPACE)
1227 fn = emit_block_move_libcall_fn (false);
1228 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1229 depend on its argument. */
1230 (void) fn;
1231 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1232 && REG_PARM_STACK_SPACE (fn) != 0)
1233 return false;
1234 #endif
1235
1236 /* If any argument goes in memory, then it might clobber an outgoing
1237 argument. */
1238 {
1239 CUMULATIVE_ARGS args_so_far_v;
1240 cumulative_args_t args_so_far;
1241 tree fn, arg;
1242
1243 fn = emit_block_move_libcall_fn (false);
1244 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1245 args_so_far = pack_cumulative_args (&args_so_far_v);
1246
1247 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1248 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1249 {
1250 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1251 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1252 NULL_TREE, true);
1253 if (!tmp || !REG_P (tmp))
1254 return false;
1255 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1256 return false;
1257 targetm.calls.function_arg_advance (args_so_far, mode,
1258 NULL_TREE, true);
1259 }
1260 }
1261 return true;
1262 }
1263
1264 /* A subroutine of emit_block_move. Expand a movmem pattern;
1265 return true if successful. */
1266
1267 static bool
1268 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1269 unsigned int expected_align, HOST_WIDE_INT expected_size)
1270 {
1271 int save_volatile_ok = volatile_ok;
1272 enum machine_mode mode;
1273
1274 if (expected_align < align)
1275 expected_align = align;
1276
1277 /* Since this is a move insn, we don't care about volatility. */
1278 volatile_ok = 1;
1279
1280 /* Try the most limited insn first, because there's no point
1281 including more than one in the machine description unless
1282 the more limited one has some advantage. */
1283
1284 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1285 mode = GET_MODE_WIDER_MODE (mode))
1286 {
1287 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1288
1289 if (code != CODE_FOR_nothing
1290 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1291 here because if SIZE is less than the mode mask, as it is
1292 returned by the macro, it will definitely be less than the
1293 actual mode mask. */
1294 && ((CONST_INT_P (size)
1295 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1296 <= (GET_MODE_MASK (mode) >> 1)))
1297 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1298 {
1299 struct expand_operand ops[6];
1300 unsigned int nops;
1301
1302 /* ??? When called via emit_block_move_for_call, it'd be
1303 nice if there were some way to inform the backend, so
1304 that it doesn't fail the expansion because it thinks
1305 emitting the libcall would be more efficient. */
1306 nops = insn_data[(int) code].n_generator_args;
1307 gcc_assert (nops == 4 || nops == 6);
1308
1309 create_fixed_operand (&ops[0], x);
1310 create_fixed_operand (&ops[1], y);
1311 /* The check above guarantees that this size conversion is valid. */
1312 create_convert_operand_to (&ops[2], size, mode, true);
1313 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1314 if (nops == 6)
1315 {
1316 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1317 create_integer_operand (&ops[5], expected_size);
1318 }
1319 if (maybe_expand_insn (code, nops, ops))
1320 {
1321 volatile_ok = save_volatile_ok;
1322 return true;
1323 }
1324 }
1325 }
1326
1327 volatile_ok = save_volatile_ok;
1328 return false;
1329 }
1330
1331 /* A subroutine of emit_block_move. Expand a call to memcpy.
1332 Return the return value from memcpy, 0 otherwise. */
1333
1334 rtx
1335 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1336 {
1337 rtx dst_addr, src_addr;
1338 tree call_expr, fn, src_tree, dst_tree, size_tree;
1339 enum machine_mode size_mode;
1340 rtx retval;
1341
1342 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1343 pseudos. We can then place those new pseudos into a VAR_DECL and
1344 use them later. */
1345
1346 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1347 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1348
1349 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1350 src_addr = convert_memory_address (ptr_mode, src_addr);
1351
1352 dst_tree = make_tree (ptr_type_node, dst_addr);
1353 src_tree = make_tree (ptr_type_node, src_addr);
1354
1355 size_mode = TYPE_MODE (sizetype);
1356
1357 size = convert_to_mode (size_mode, size, 1);
1358 size = copy_to_mode_reg (size_mode, size);
1359
1360 /* It is incorrect to use the libcall calling conventions to call
1361 memcpy in this context. This could be a user call to memcpy and
1362 the user may wish to examine the return value from memcpy. For
1363 targets where libcalls and normal calls have different conventions
1364 for returning pointers, we could end up generating incorrect code. */
1365
1366 size_tree = make_tree (sizetype, size);
1367
1368 fn = emit_block_move_libcall_fn (true);
1369 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1370 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1371
1372 retval = expand_normal (call_expr);
1373
1374 return retval;
1375 }
1376
1377 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1378 for the function we use for block copies. The first time FOR_CALL
1379 is true, we call assemble_external. */
1380
1381 static GTY(()) tree block_move_fn;
1382
1383 void
1384 init_block_move_fn (const char *asmspec)
1385 {
1386 if (!block_move_fn)
1387 {
1388 tree args, fn;
1389
1390 fn = get_identifier ("memcpy");
1391 args = build_function_type_list (ptr_type_node, ptr_type_node,
1392 const_ptr_type_node, sizetype,
1393 NULL_TREE);
1394
1395 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1396 DECL_EXTERNAL (fn) = 1;
1397 TREE_PUBLIC (fn) = 1;
1398 DECL_ARTIFICIAL (fn) = 1;
1399 TREE_NOTHROW (fn) = 1;
1400 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1401 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1402
1403 block_move_fn = fn;
1404 }
1405
1406 if (asmspec)
1407 set_user_assembler_name (block_move_fn, asmspec);
1408 }
1409
1410 static tree
1411 emit_block_move_libcall_fn (int for_call)
1412 {
1413 static bool emitted_extern;
1414
1415 if (!block_move_fn)
1416 init_block_move_fn (NULL);
1417
1418 if (for_call && !emitted_extern)
1419 {
1420 emitted_extern = true;
1421 make_decl_rtl (block_move_fn);
1422 assemble_external (block_move_fn);
1423 }
1424
1425 return block_move_fn;
1426 }
1427
1428 /* A subroutine of emit_block_move. Copy the data via an explicit
1429 loop. This is used only when libcalls are forbidden. */
1430 /* ??? It'd be nice to copy in hunks larger than QImode. */
1431
1432 static void
1433 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1434 unsigned int align ATTRIBUTE_UNUSED)
1435 {
1436 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1437 enum machine_mode x_addr_mode
1438 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1439 enum machine_mode y_addr_mode
1440 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1441 enum machine_mode iter_mode;
1442
1443 iter_mode = GET_MODE (size);
1444 if (iter_mode == VOIDmode)
1445 iter_mode = word_mode;
1446
1447 top_label = gen_label_rtx ();
1448 cmp_label = gen_label_rtx ();
1449 iter = gen_reg_rtx (iter_mode);
1450
1451 emit_move_insn (iter, const0_rtx);
1452
1453 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1454 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1455 do_pending_stack_adjust ();
1456
1457 emit_jump (cmp_label);
1458 emit_label (top_label);
1459
1460 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1461 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1462
1463 if (x_addr_mode != y_addr_mode)
1464 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1465 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1466
1467 x = change_address (x, QImode, x_addr);
1468 y = change_address (y, QImode, y_addr);
1469
1470 emit_move_insn (x, y);
1471
1472 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1473 true, OPTAB_LIB_WIDEN);
1474 if (tmp != iter)
1475 emit_move_insn (iter, tmp);
1476
1477 emit_label (cmp_label);
1478
1479 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1480 true, top_label);
1481 }
1482 \f
1483 /* Copy all or part of a value X into registers starting at REGNO.
1484 The number of registers to be filled is NREGS. */
1485
1486 void
1487 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1488 {
1489 int i;
1490 #ifdef HAVE_load_multiple
1491 rtx pat;
1492 rtx last;
1493 #endif
1494
1495 if (nregs == 0)
1496 return;
1497
1498 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1499 x = validize_mem (force_const_mem (mode, x));
1500
1501 /* See if the machine can do this with a load multiple insn. */
1502 #ifdef HAVE_load_multiple
1503 if (HAVE_load_multiple)
1504 {
1505 last = get_last_insn ();
1506 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1507 GEN_INT (nregs));
1508 if (pat)
1509 {
1510 emit_insn (pat);
1511 return;
1512 }
1513 else
1514 delete_insns_since (last);
1515 }
1516 #endif
1517
1518 for (i = 0; i < nregs; i++)
1519 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1520 operand_subword_force (x, i, mode));
1521 }
1522
1523 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1524 The number of registers to be filled is NREGS. */
1525
1526 void
1527 move_block_from_reg (int regno, rtx x, int nregs)
1528 {
1529 int i;
1530
1531 if (nregs == 0)
1532 return;
1533
1534 /* See if the machine can do this with a store multiple insn. */
1535 #ifdef HAVE_store_multiple
1536 if (HAVE_store_multiple)
1537 {
1538 rtx last = get_last_insn ();
1539 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1540 GEN_INT (nregs));
1541 if (pat)
1542 {
1543 emit_insn (pat);
1544 return;
1545 }
1546 else
1547 delete_insns_since (last);
1548 }
1549 #endif
1550
1551 for (i = 0; i < nregs; i++)
1552 {
1553 rtx tem = operand_subword (x, i, 1, BLKmode);
1554
1555 gcc_assert (tem);
1556
1557 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1558 }
1559 }
1560
1561 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1562 ORIG, where ORIG is a non-consecutive group of registers represented by
1563 a PARALLEL. The clone is identical to the original except in that the
1564 original set of registers is replaced by a new set of pseudo registers.
1565 The new set has the same modes as the original set. */
1566
1567 rtx
1568 gen_group_rtx (rtx orig)
1569 {
1570 int i, length;
1571 rtx *tmps;
1572
1573 gcc_assert (GET_CODE (orig) == PARALLEL);
1574
1575 length = XVECLEN (orig, 0);
1576 tmps = XALLOCAVEC (rtx, length);
1577
1578 /* Skip a NULL entry in first slot. */
1579 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1580
1581 if (i)
1582 tmps[0] = 0;
1583
1584 for (; i < length; i++)
1585 {
1586 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1587 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1588
1589 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1590 }
1591
1592 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1593 }
1594
1595 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1596 except that values are placed in TMPS[i], and must later be moved
1597 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1598
1599 static void
1600 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1601 {
1602 rtx src;
1603 int start, i;
1604 enum machine_mode m = GET_MODE (orig_src);
1605
1606 gcc_assert (GET_CODE (dst) == PARALLEL);
1607
1608 if (m != VOIDmode
1609 && !SCALAR_INT_MODE_P (m)
1610 && !MEM_P (orig_src)
1611 && GET_CODE (orig_src) != CONCAT)
1612 {
1613 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1614 if (imode == BLKmode)
1615 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1616 else
1617 src = gen_reg_rtx (imode);
1618 if (imode != BLKmode)
1619 src = gen_lowpart (GET_MODE (orig_src), src);
1620 emit_move_insn (src, orig_src);
1621 /* ...and back again. */
1622 if (imode != BLKmode)
1623 src = gen_lowpart (imode, src);
1624 emit_group_load_1 (tmps, dst, src, type, ssize);
1625 return;
1626 }
1627
1628 /* Check for a NULL entry, used to indicate that the parameter goes
1629 both on the stack and in registers. */
1630 if (XEXP (XVECEXP (dst, 0, 0), 0))
1631 start = 0;
1632 else
1633 start = 1;
1634
1635 /* Process the pieces. */
1636 for (i = start; i < XVECLEN (dst, 0); i++)
1637 {
1638 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1639 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1640 unsigned int bytelen = GET_MODE_SIZE (mode);
1641 int shift = 0;
1642
1643 /* Handle trailing fragments that run over the size of the struct. */
1644 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1645 {
1646 /* Arrange to shift the fragment to where it belongs.
1647 extract_bit_field loads to the lsb of the reg. */
1648 if (
1649 #ifdef BLOCK_REG_PADDING
1650 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1651 == (BYTES_BIG_ENDIAN ? upward : downward)
1652 #else
1653 BYTES_BIG_ENDIAN
1654 #endif
1655 )
1656 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1657 bytelen = ssize - bytepos;
1658 gcc_assert (bytelen > 0);
1659 }
1660
1661 /* If we won't be loading directly from memory, protect the real source
1662 from strange tricks we might play; but make sure that the source can
1663 be loaded directly into the destination. */
1664 src = orig_src;
1665 if (!MEM_P (orig_src)
1666 && (!CONSTANT_P (orig_src)
1667 || (GET_MODE (orig_src) != mode
1668 && GET_MODE (orig_src) != VOIDmode)))
1669 {
1670 if (GET_MODE (orig_src) == VOIDmode)
1671 src = gen_reg_rtx (mode);
1672 else
1673 src = gen_reg_rtx (GET_MODE (orig_src));
1674
1675 emit_move_insn (src, orig_src);
1676 }
1677
1678 /* Optimize the access just a bit. */
1679 if (MEM_P (src)
1680 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1681 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1682 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1683 && bytelen == GET_MODE_SIZE (mode))
1684 {
1685 tmps[i] = gen_reg_rtx (mode);
1686 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1687 }
1688 else if (COMPLEX_MODE_P (mode)
1689 && GET_MODE (src) == mode
1690 && bytelen == GET_MODE_SIZE (mode))
1691 /* Let emit_move_complex do the bulk of the work. */
1692 tmps[i] = src;
1693 else if (GET_CODE (src) == CONCAT)
1694 {
1695 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1696 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1697
1698 if ((bytepos == 0 && bytelen == slen0)
1699 || (bytepos != 0 && bytepos + bytelen <= slen))
1700 {
1701 /* The following assumes that the concatenated objects all
1702 have the same size. In this case, a simple calculation
1703 can be used to determine the object and the bit field
1704 to be extracted. */
1705 tmps[i] = XEXP (src, bytepos / slen0);
1706 if (! CONSTANT_P (tmps[i])
1707 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1708 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1709 (bytepos % slen0) * BITS_PER_UNIT,
1710 1, false, NULL_RTX, mode, mode);
1711 }
1712 else
1713 {
1714 rtx mem;
1715
1716 gcc_assert (!bytepos);
1717 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1718 emit_move_insn (mem, src);
1719 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1720 0, 1, false, NULL_RTX, mode, mode);
1721 }
1722 }
1723 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1724 SIMD register, which is currently broken. While we get GCC
1725 to emit proper RTL for these cases, let's dump to memory. */
1726 else if (VECTOR_MODE_P (GET_MODE (dst))
1727 && REG_P (src))
1728 {
1729 int slen = GET_MODE_SIZE (GET_MODE (src));
1730 rtx mem;
1731
1732 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1733 emit_move_insn (mem, src);
1734 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1735 }
1736 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1737 && XVECLEN (dst, 0) > 1)
1738 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1739 else if (CONSTANT_P (src))
1740 {
1741 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1742
1743 if (len == ssize)
1744 tmps[i] = src;
1745 else
1746 {
1747 rtx first, second;
1748
1749 gcc_assert (2 * len == ssize);
1750 split_double (src, &first, &second);
1751 if (i)
1752 tmps[i] = second;
1753 else
1754 tmps[i] = first;
1755 }
1756 }
1757 else if (REG_P (src) && GET_MODE (src) == mode)
1758 tmps[i] = src;
1759 else
1760 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1761 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1762 mode, mode);
1763
1764 if (shift)
1765 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1766 shift, tmps[i], 0);
1767 }
1768 }
1769
1770 /* Emit code to move a block SRC of type TYPE to a block DST,
1771 where DST is non-consecutive registers represented by a PARALLEL.
1772 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1773 if not known. */
1774
1775 void
1776 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1777 {
1778 rtx *tmps;
1779 int i;
1780
1781 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1782 emit_group_load_1 (tmps, dst, src, type, ssize);
1783
1784 /* Copy the extracted pieces into the proper (probable) hard regs. */
1785 for (i = 0; i < XVECLEN (dst, 0); i++)
1786 {
1787 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1788 if (d == NULL)
1789 continue;
1790 emit_move_insn (d, tmps[i]);
1791 }
1792 }
1793
1794 /* Similar, but load SRC into new pseudos in a format that looks like
1795 PARALLEL. This can later be fed to emit_group_move to get things
1796 in the right place. */
1797
1798 rtx
1799 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1800 {
1801 rtvec vec;
1802 int i;
1803
1804 vec = rtvec_alloc (XVECLEN (parallel, 0));
1805 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1806
1807 /* Convert the vector to look just like the original PARALLEL, except
1808 with the computed values. */
1809 for (i = 0; i < XVECLEN (parallel, 0); i++)
1810 {
1811 rtx e = XVECEXP (parallel, 0, i);
1812 rtx d = XEXP (e, 0);
1813
1814 if (d)
1815 {
1816 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1817 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1818 }
1819 RTVEC_ELT (vec, i) = e;
1820 }
1821
1822 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1823 }
1824
1825 /* Emit code to move a block SRC to block DST, where SRC and DST are
1826 non-consecutive groups of registers, each represented by a PARALLEL. */
1827
1828 void
1829 emit_group_move (rtx dst, rtx src)
1830 {
1831 int i;
1832
1833 gcc_assert (GET_CODE (src) == PARALLEL
1834 && GET_CODE (dst) == PARALLEL
1835 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1836
1837 /* Skip first entry if NULL. */
1838 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1839 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1840 XEXP (XVECEXP (src, 0, i), 0));
1841 }
1842
1843 /* Move a group of registers represented by a PARALLEL into pseudos. */
1844
1845 rtx
1846 emit_group_move_into_temps (rtx src)
1847 {
1848 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1849 int i;
1850
1851 for (i = 0; i < XVECLEN (src, 0); i++)
1852 {
1853 rtx e = XVECEXP (src, 0, i);
1854 rtx d = XEXP (e, 0);
1855
1856 if (d)
1857 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1858 RTVEC_ELT (vec, i) = e;
1859 }
1860
1861 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1862 }
1863
1864 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1865 where SRC is non-consecutive registers represented by a PARALLEL.
1866 SSIZE represents the total size of block ORIG_DST, or -1 if not
1867 known. */
1868
1869 void
1870 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1871 {
1872 rtx *tmps, dst;
1873 int start, finish, i;
1874 enum machine_mode m = GET_MODE (orig_dst);
1875
1876 gcc_assert (GET_CODE (src) == PARALLEL);
1877
1878 if (!SCALAR_INT_MODE_P (m)
1879 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1880 {
1881 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1882 if (imode == BLKmode)
1883 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1884 else
1885 dst = gen_reg_rtx (imode);
1886 emit_group_store (dst, src, type, ssize);
1887 if (imode != BLKmode)
1888 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1889 emit_move_insn (orig_dst, dst);
1890 return;
1891 }
1892
1893 /* Check for a NULL entry, used to indicate that the parameter goes
1894 both on the stack and in registers. */
1895 if (XEXP (XVECEXP (src, 0, 0), 0))
1896 start = 0;
1897 else
1898 start = 1;
1899 finish = XVECLEN (src, 0);
1900
1901 tmps = XALLOCAVEC (rtx, finish);
1902
1903 /* Copy the (probable) hard regs into pseudos. */
1904 for (i = start; i < finish; i++)
1905 {
1906 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1907 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1908 {
1909 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1910 emit_move_insn (tmps[i], reg);
1911 }
1912 else
1913 tmps[i] = reg;
1914 }
1915
1916 /* If we won't be storing directly into memory, protect the real destination
1917 from strange tricks we might play. */
1918 dst = orig_dst;
1919 if (GET_CODE (dst) == PARALLEL)
1920 {
1921 rtx temp;
1922
1923 /* We can get a PARALLEL dst if there is a conditional expression in
1924 a return statement. In that case, the dst and src are the same,
1925 so no action is necessary. */
1926 if (rtx_equal_p (dst, src))
1927 return;
1928
1929 /* It is unclear if we can ever reach here, but we may as well handle
1930 it. Allocate a temporary, and split this into a store/load to/from
1931 the temporary. */
1932
1933 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1934 emit_group_store (temp, src, type, ssize);
1935 emit_group_load (dst, temp, type, ssize);
1936 return;
1937 }
1938 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1939 {
1940 enum machine_mode outer = GET_MODE (dst);
1941 enum machine_mode inner;
1942 HOST_WIDE_INT bytepos;
1943 bool done = false;
1944 rtx temp;
1945
1946 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1947 dst = gen_reg_rtx (outer);
1948
1949 /* Make life a bit easier for combine. */
1950 /* If the first element of the vector is the low part
1951 of the destination mode, use a paradoxical subreg to
1952 initialize the destination. */
1953 if (start < finish)
1954 {
1955 inner = GET_MODE (tmps[start]);
1956 bytepos = subreg_lowpart_offset (inner, outer);
1957 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1958 {
1959 temp = simplify_gen_subreg (outer, tmps[start],
1960 inner, 0);
1961 if (temp)
1962 {
1963 emit_move_insn (dst, temp);
1964 done = true;
1965 start++;
1966 }
1967 }
1968 }
1969
1970 /* If the first element wasn't the low part, try the last. */
1971 if (!done
1972 && start < finish - 1)
1973 {
1974 inner = GET_MODE (tmps[finish - 1]);
1975 bytepos = subreg_lowpart_offset (inner, outer);
1976 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1977 {
1978 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1979 inner, 0);
1980 if (temp)
1981 {
1982 emit_move_insn (dst, temp);
1983 done = true;
1984 finish--;
1985 }
1986 }
1987 }
1988
1989 /* Otherwise, simply initialize the result to zero. */
1990 if (!done)
1991 emit_move_insn (dst, CONST0_RTX (outer));
1992 }
1993
1994 /* Process the pieces. */
1995 for (i = start; i < finish; i++)
1996 {
1997 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
1998 enum machine_mode mode = GET_MODE (tmps[i]);
1999 unsigned int bytelen = GET_MODE_SIZE (mode);
2000 unsigned int adj_bytelen = bytelen;
2001 rtx dest = dst;
2002
2003 /* Handle trailing fragments that run over the size of the struct. */
2004 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2005 adj_bytelen = ssize - bytepos;
2006
2007 if (GET_CODE (dst) == CONCAT)
2008 {
2009 if (bytepos + adj_bytelen
2010 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2011 dest = XEXP (dst, 0);
2012 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2013 {
2014 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2015 dest = XEXP (dst, 1);
2016 }
2017 else
2018 {
2019 enum machine_mode dest_mode = GET_MODE (dest);
2020 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2021
2022 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2023
2024 if (GET_MODE_ALIGNMENT (dest_mode)
2025 >= GET_MODE_ALIGNMENT (tmp_mode))
2026 {
2027 dest = assign_stack_temp (dest_mode,
2028 GET_MODE_SIZE (dest_mode),
2029 0);
2030 emit_move_insn (adjust_address (dest,
2031 tmp_mode,
2032 bytepos),
2033 tmps[i]);
2034 dst = dest;
2035 }
2036 else
2037 {
2038 dest = assign_stack_temp (tmp_mode,
2039 GET_MODE_SIZE (tmp_mode),
2040 0);
2041 emit_move_insn (dest, tmps[i]);
2042 dst = adjust_address (dest, dest_mode, bytepos);
2043 }
2044 break;
2045 }
2046 }
2047
2048 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2049 {
2050 /* store_bit_field always takes its value from the lsb.
2051 Move the fragment to the lsb if it's not already there. */
2052 if (
2053 #ifdef BLOCK_REG_PADDING
2054 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2055 == (BYTES_BIG_ENDIAN ? upward : downward)
2056 #else
2057 BYTES_BIG_ENDIAN
2058 #endif
2059 )
2060 {
2061 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2062 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2063 shift, tmps[i], 0);
2064 }
2065 bytelen = adj_bytelen;
2066 }
2067
2068 /* Optimize the access just a bit. */
2069 if (MEM_P (dest)
2070 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2071 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2072 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2073 && bytelen == GET_MODE_SIZE (mode))
2074 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2075 else
2076 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2077 0, 0, mode, tmps[i]);
2078 }
2079
2080 /* Copy from the pseudo into the (probable) hard reg. */
2081 if (orig_dst != dst)
2082 emit_move_insn (orig_dst, dst);
2083 }
2084
2085 /* Generate code to copy a BLKmode object of TYPE out of a
2086 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2087 is null, a stack temporary is created. TGTBLK is returned.
2088
2089 The purpose of this routine is to handle functions that return
2090 BLKmode structures in registers. Some machines (the PA for example)
2091 want to return all small structures in registers regardless of the
2092 structure's alignment. */
2093
2094 rtx
2095 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2096 {
2097 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2098 rtx src = NULL, dst = NULL;
2099 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2100 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2101 enum machine_mode copy_mode;
2102
2103 if (tgtblk == 0)
2104 {
2105 tgtblk = assign_temp (build_qualified_type (type,
2106 (TYPE_QUALS (type)
2107 | TYPE_QUAL_CONST)),
2108 0, 1, 1);
2109 preserve_temp_slots (tgtblk);
2110 }
2111
2112 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2113 into a new pseudo which is a full word. */
2114
2115 if (GET_MODE (srcreg) != BLKmode
2116 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2117 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2118
2119 /* If the structure doesn't take up a whole number of words, see whether
2120 SRCREG is padded on the left or on the right. If it's on the left,
2121 set PADDING_CORRECTION to the number of bits to skip.
2122
2123 In most ABIs, the structure will be returned at the least end of
2124 the register, which translates to right padding on little-endian
2125 targets and left padding on big-endian targets. The opposite
2126 holds if the structure is returned at the most significant
2127 end of the register. */
2128 if (bytes % UNITS_PER_WORD != 0
2129 && (targetm.calls.return_in_msb (type)
2130 ? !BYTES_BIG_ENDIAN
2131 : BYTES_BIG_ENDIAN))
2132 padding_correction
2133 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2134
2135 /* Copy the structure BITSIZE bits at a time. If the target lives in
2136 memory, take care of not reading/writing past its end by selecting
2137 a copy mode suited to BITSIZE. This should always be possible given
2138 how it is computed.
2139
2140 We could probably emit more efficient code for machines which do not use
2141 strict alignment, but it doesn't seem worth the effort at the current
2142 time. */
2143
2144 copy_mode = word_mode;
2145 if (MEM_P (tgtblk))
2146 {
2147 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2148 if (mem_mode != BLKmode)
2149 copy_mode = mem_mode;
2150 }
2151
2152 for (bitpos = 0, xbitpos = padding_correction;
2153 bitpos < bytes * BITS_PER_UNIT;
2154 bitpos += bitsize, xbitpos += bitsize)
2155 {
2156 /* We need a new source operand each time xbitpos is on a
2157 word boundary and when xbitpos == padding_correction
2158 (the first time through). */
2159 if (xbitpos % BITS_PER_WORD == 0
2160 || xbitpos == padding_correction)
2161 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2162 GET_MODE (srcreg));
2163
2164 /* We need a new destination operand each time bitpos is on
2165 a word boundary. */
2166 if (bitpos % BITS_PER_WORD == 0)
2167 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2168
2169 /* Use xbitpos for the source extraction (right justified) and
2170 bitpos for the destination store (left justified). */
2171 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2172 extract_bit_field (src, bitsize,
2173 xbitpos % BITS_PER_WORD, 1, false,
2174 NULL_RTX, copy_mode, copy_mode));
2175 }
2176
2177 return tgtblk;
2178 }
2179
2180 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2181 register if it contains any data, otherwise return null.
2182
2183 This is used on targets that return BLKmode values in registers. */
2184
2185 rtx
2186 copy_blkmode_to_reg (enum machine_mode mode, tree src)
2187 {
2188 int i, n_regs;
2189 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2190 unsigned int bitsize;
2191 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2192 enum machine_mode dst_mode;
2193
2194 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2195
2196 x = expand_normal (src);
2197
2198 bytes = int_size_in_bytes (TREE_TYPE (src));
2199 if (bytes == 0)
2200 return NULL_RTX;
2201
2202 /* If the structure doesn't take up a whole number of words, see
2203 whether the register value should be padded on the left or on
2204 the right. Set PADDING_CORRECTION to the number of padding
2205 bits needed on the left side.
2206
2207 In most ABIs, the structure will be returned at the least end of
2208 the register, which translates to right padding on little-endian
2209 targets and left padding on big-endian targets. The opposite
2210 holds if the structure is returned at the most significant
2211 end of the register. */
2212 if (bytes % UNITS_PER_WORD != 0
2213 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2214 ? !BYTES_BIG_ENDIAN
2215 : BYTES_BIG_ENDIAN))
2216 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2217 * BITS_PER_UNIT));
2218
2219 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2220 dst_words = XALLOCAVEC (rtx, n_regs);
2221 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2222
2223 /* Copy the structure BITSIZE bits at a time. */
2224 for (bitpos = 0, xbitpos = padding_correction;
2225 bitpos < bytes * BITS_PER_UNIT;
2226 bitpos += bitsize, xbitpos += bitsize)
2227 {
2228 /* We need a new destination pseudo each time xbitpos is
2229 on a word boundary and when xbitpos == padding_correction
2230 (the first time through). */
2231 if (xbitpos % BITS_PER_WORD == 0
2232 || xbitpos == padding_correction)
2233 {
2234 /* Generate an appropriate register. */
2235 dst_word = gen_reg_rtx (word_mode);
2236 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2237
2238 /* Clear the destination before we move anything into it. */
2239 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2240 }
2241
2242 /* We need a new source operand each time bitpos is on a word
2243 boundary. */
2244 if (bitpos % BITS_PER_WORD == 0)
2245 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2246
2247 /* Use bitpos for the source extraction (left justified) and
2248 xbitpos for the destination store (right justified). */
2249 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2250 0, 0, word_mode,
2251 extract_bit_field (src_word, bitsize,
2252 bitpos % BITS_PER_WORD, 1, false,
2253 NULL_RTX, word_mode, word_mode));
2254 }
2255
2256 if (mode == BLKmode)
2257 {
2258 /* Find the smallest integer mode large enough to hold the
2259 entire structure. */
2260 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2261 mode != VOIDmode;
2262 mode = GET_MODE_WIDER_MODE (mode))
2263 /* Have we found a large enough mode? */
2264 if (GET_MODE_SIZE (mode) >= bytes)
2265 break;
2266
2267 /* A suitable mode should have been found. */
2268 gcc_assert (mode != VOIDmode);
2269 }
2270
2271 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2272 dst_mode = word_mode;
2273 else
2274 dst_mode = mode;
2275 dst = gen_reg_rtx (dst_mode);
2276
2277 for (i = 0; i < n_regs; i++)
2278 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2279
2280 if (mode != dst_mode)
2281 dst = gen_lowpart (mode, dst);
2282
2283 return dst;
2284 }
2285
2286 /* Add a USE expression for REG to the (possibly empty) list pointed
2287 to by CALL_FUSAGE. REG must denote a hard register. */
2288
2289 void
2290 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2291 {
2292 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2293
2294 *call_fusage
2295 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2296 }
2297
2298 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2299 starting at REGNO. All of these registers must be hard registers. */
2300
2301 void
2302 use_regs (rtx *call_fusage, int regno, int nregs)
2303 {
2304 int i;
2305
2306 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2307
2308 for (i = 0; i < nregs; i++)
2309 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2310 }
2311
2312 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2313 PARALLEL REGS. This is for calls that pass values in multiple
2314 non-contiguous locations. The Irix 6 ABI has examples of this. */
2315
2316 void
2317 use_group_regs (rtx *call_fusage, rtx regs)
2318 {
2319 int i;
2320
2321 for (i = 0; i < XVECLEN (regs, 0); i++)
2322 {
2323 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2324
2325 /* A NULL entry means the parameter goes both on the stack and in
2326 registers. This can also be a MEM for targets that pass values
2327 partially on the stack and partially in registers. */
2328 if (reg != 0 && REG_P (reg))
2329 use_reg (call_fusage, reg);
2330 }
2331 }
2332
2333 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2334 assigment and the code of the expresion on the RHS is CODE. Return
2335 NULL otherwise. */
2336
2337 static gimple
2338 get_def_for_expr (tree name, enum tree_code code)
2339 {
2340 gimple def_stmt;
2341
2342 if (TREE_CODE (name) != SSA_NAME)
2343 return NULL;
2344
2345 def_stmt = get_gimple_for_ssa_name (name);
2346 if (!def_stmt
2347 || gimple_assign_rhs_code (def_stmt) != code)
2348 return NULL;
2349
2350 return def_stmt;
2351 }
2352 \f
2353
2354 /* Determine whether the LEN bytes generated by CONSTFUN can be
2355 stored to memory using several move instructions. CONSTFUNDATA is
2356 a pointer which will be passed as argument in every CONSTFUN call.
2357 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2358 a memset operation and false if it's a copy of a constant string.
2359 Return nonzero if a call to store_by_pieces should succeed. */
2360
2361 int
2362 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2363 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2364 void *constfundata, unsigned int align, bool memsetp)
2365 {
2366 unsigned HOST_WIDE_INT l;
2367 unsigned int max_size;
2368 HOST_WIDE_INT offset = 0;
2369 enum machine_mode mode;
2370 enum insn_code icode;
2371 int reverse;
2372 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2373 rtx cst ATTRIBUTE_UNUSED;
2374
2375 if (len == 0)
2376 return 1;
2377
2378 if (! (memsetp
2379 ? SET_BY_PIECES_P (len, align)
2380 : STORE_BY_PIECES_P (len, align)))
2381 return 0;
2382
2383 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2384
2385 /* We would first store what we can in the largest integer mode, then go to
2386 successively smaller modes. */
2387
2388 for (reverse = 0;
2389 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2390 reverse++)
2391 {
2392 l = len;
2393 max_size = STORE_MAX_PIECES + 1;
2394 while (max_size > 1)
2395 {
2396 mode = widest_int_mode_for_size (max_size);
2397
2398 if (mode == VOIDmode)
2399 break;
2400
2401 icode = optab_handler (mov_optab, mode);
2402 if (icode != CODE_FOR_nothing
2403 && align >= GET_MODE_ALIGNMENT (mode))
2404 {
2405 unsigned int size = GET_MODE_SIZE (mode);
2406
2407 while (l >= size)
2408 {
2409 if (reverse)
2410 offset -= size;
2411
2412 cst = (*constfun) (constfundata, offset, mode);
2413 if (!targetm.legitimate_constant_p (mode, cst))
2414 return 0;
2415
2416 if (!reverse)
2417 offset += size;
2418
2419 l -= size;
2420 }
2421 }
2422
2423 max_size = GET_MODE_SIZE (mode);
2424 }
2425
2426 /* The code above should have handled everything. */
2427 gcc_assert (!l);
2428 }
2429
2430 return 1;
2431 }
2432
2433 /* Generate several move instructions to store LEN bytes generated by
2434 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2435 pointer which will be passed as argument in every CONSTFUN call.
2436 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2437 a memset operation and false if it's a copy of a constant string.
2438 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2439 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2440 stpcpy. */
2441
2442 rtx
2443 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2444 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2445 void *constfundata, unsigned int align, bool memsetp, int endp)
2446 {
2447 enum machine_mode to_addr_mode
2448 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2449 struct store_by_pieces_d data;
2450
2451 if (len == 0)
2452 {
2453 gcc_assert (endp != 2);
2454 return to;
2455 }
2456
2457 gcc_assert (memsetp
2458 ? SET_BY_PIECES_P (len, align)
2459 : STORE_BY_PIECES_P (len, align));
2460 data.constfun = constfun;
2461 data.constfundata = constfundata;
2462 data.len = len;
2463 data.to = to;
2464 store_by_pieces_1 (&data, align);
2465 if (endp)
2466 {
2467 rtx to1;
2468
2469 gcc_assert (!data.reverse);
2470 if (data.autinc_to)
2471 {
2472 if (endp == 2)
2473 {
2474 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2475 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2476 else
2477 data.to_addr = copy_to_mode_reg (to_addr_mode,
2478 plus_constant (data.to_addr,
2479 -1));
2480 }
2481 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2482 data.offset);
2483 }
2484 else
2485 {
2486 if (endp == 2)
2487 --data.offset;
2488 to1 = adjust_address (data.to, QImode, data.offset);
2489 }
2490 return to1;
2491 }
2492 else
2493 return data.to;
2494 }
2495
2496 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2497 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2498
2499 static void
2500 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2501 {
2502 struct store_by_pieces_d data;
2503
2504 if (len == 0)
2505 return;
2506
2507 data.constfun = clear_by_pieces_1;
2508 data.constfundata = NULL;
2509 data.len = len;
2510 data.to = to;
2511 store_by_pieces_1 (&data, align);
2512 }
2513
2514 /* Callback routine for clear_by_pieces.
2515 Return const0_rtx unconditionally. */
2516
2517 static rtx
2518 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2519 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2520 enum machine_mode mode ATTRIBUTE_UNUSED)
2521 {
2522 return const0_rtx;
2523 }
2524
2525 /* Subroutine of clear_by_pieces and store_by_pieces.
2526 Generate several move instructions to store LEN bytes of block TO. (A MEM
2527 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2528
2529 static void
2530 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2531 unsigned int align ATTRIBUTE_UNUSED)
2532 {
2533 enum machine_mode to_addr_mode
2534 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2535 rtx to_addr = XEXP (data->to, 0);
2536 unsigned int max_size = STORE_MAX_PIECES + 1;
2537 enum insn_code icode;
2538
2539 data->offset = 0;
2540 data->to_addr = to_addr;
2541 data->autinc_to
2542 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2543 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2544
2545 data->explicit_inc_to = 0;
2546 data->reverse
2547 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2548 if (data->reverse)
2549 data->offset = data->len;
2550
2551 /* If storing requires more than two move insns,
2552 copy addresses to registers (to make displacements shorter)
2553 and use post-increment if available. */
2554 if (!data->autinc_to
2555 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2556 {
2557 /* Determine the main mode we'll be using.
2558 MODE might not be used depending on the definitions of the
2559 USE_* macros below. */
2560 enum machine_mode mode ATTRIBUTE_UNUSED
2561 = widest_int_mode_for_size (max_size);
2562
2563 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2564 {
2565 data->to_addr = copy_to_mode_reg (to_addr_mode,
2566 plus_constant (to_addr, data->len));
2567 data->autinc_to = 1;
2568 data->explicit_inc_to = -1;
2569 }
2570
2571 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2572 && ! data->autinc_to)
2573 {
2574 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2575 data->autinc_to = 1;
2576 data->explicit_inc_to = 1;
2577 }
2578
2579 if ( !data->autinc_to && CONSTANT_P (to_addr))
2580 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2581 }
2582
2583 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2584
2585 /* First store what we can in the largest integer mode, then go to
2586 successively smaller modes. */
2587
2588 while (max_size > 1)
2589 {
2590 enum machine_mode mode = widest_int_mode_for_size (max_size);
2591
2592 if (mode == VOIDmode)
2593 break;
2594
2595 icode = optab_handler (mov_optab, mode);
2596 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2597 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2598
2599 max_size = GET_MODE_SIZE (mode);
2600 }
2601
2602 /* The code above should have handled everything. */
2603 gcc_assert (!data->len);
2604 }
2605
2606 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2607 with move instructions for mode MODE. GENFUN is the gen_... function
2608 to make a move insn for that mode. DATA has all the other info. */
2609
2610 static void
2611 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2612 struct store_by_pieces_d *data)
2613 {
2614 unsigned int size = GET_MODE_SIZE (mode);
2615 rtx to1, cst;
2616
2617 while (data->len >= size)
2618 {
2619 if (data->reverse)
2620 data->offset -= size;
2621
2622 if (data->autinc_to)
2623 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2624 data->offset);
2625 else
2626 to1 = adjust_address (data->to, mode, data->offset);
2627
2628 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2629 emit_insn (gen_add2_insn (data->to_addr,
2630 GEN_INT (-(HOST_WIDE_INT) size)));
2631
2632 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2633 emit_insn ((*genfun) (to1, cst));
2634
2635 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2636 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2637
2638 if (! data->reverse)
2639 data->offset += size;
2640
2641 data->len -= size;
2642 }
2643 }
2644 \f
2645 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2646 its length in bytes. */
2647
2648 rtx
2649 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2650 unsigned int expected_align, HOST_WIDE_INT expected_size)
2651 {
2652 enum machine_mode mode = GET_MODE (object);
2653 unsigned int align;
2654
2655 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2656
2657 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2658 just move a zero. Otherwise, do this a piece at a time. */
2659 if (mode != BLKmode
2660 && CONST_INT_P (size)
2661 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2662 {
2663 rtx zero = CONST0_RTX (mode);
2664 if (zero != NULL)
2665 {
2666 emit_move_insn (object, zero);
2667 return NULL;
2668 }
2669
2670 if (COMPLEX_MODE_P (mode))
2671 {
2672 zero = CONST0_RTX (GET_MODE_INNER (mode));
2673 if (zero != NULL)
2674 {
2675 write_complex_part (object, zero, 0);
2676 write_complex_part (object, zero, 1);
2677 return NULL;
2678 }
2679 }
2680 }
2681
2682 if (size == const0_rtx)
2683 return NULL;
2684
2685 align = MEM_ALIGN (object);
2686
2687 if (CONST_INT_P (size)
2688 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2689 clear_by_pieces (object, INTVAL (size), align);
2690 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2691 expected_align, expected_size))
2692 ;
2693 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2694 return set_storage_via_libcall (object, size, const0_rtx,
2695 method == BLOCK_OP_TAILCALL);
2696 else
2697 gcc_unreachable ();
2698
2699 return NULL;
2700 }
2701
2702 rtx
2703 clear_storage (rtx object, rtx size, enum block_op_methods method)
2704 {
2705 return clear_storage_hints (object, size, method, 0, -1);
2706 }
2707
2708
2709 /* A subroutine of clear_storage. Expand a call to memset.
2710 Return the return value of memset, 0 otherwise. */
2711
2712 rtx
2713 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2714 {
2715 tree call_expr, fn, object_tree, size_tree, val_tree;
2716 enum machine_mode size_mode;
2717 rtx retval;
2718
2719 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2720 place those into new pseudos into a VAR_DECL and use them later. */
2721
2722 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2723
2724 size_mode = TYPE_MODE (sizetype);
2725 size = convert_to_mode (size_mode, size, 1);
2726 size = copy_to_mode_reg (size_mode, size);
2727
2728 /* It is incorrect to use the libcall calling conventions to call
2729 memset in this context. This could be a user call to memset and
2730 the user may wish to examine the return value from memset. For
2731 targets where libcalls and normal calls have different conventions
2732 for returning pointers, we could end up generating incorrect code. */
2733
2734 object_tree = make_tree (ptr_type_node, object);
2735 if (!CONST_INT_P (val))
2736 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2737 size_tree = make_tree (sizetype, size);
2738 val_tree = make_tree (integer_type_node, val);
2739
2740 fn = clear_storage_libcall_fn (true);
2741 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2742 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2743
2744 retval = expand_normal (call_expr);
2745
2746 return retval;
2747 }
2748
2749 /* A subroutine of set_storage_via_libcall. Create the tree node
2750 for the function we use for block clears. The first time FOR_CALL
2751 is true, we call assemble_external. */
2752
2753 tree block_clear_fn;
2754
2755 void
2756 init_block_clear_fn (const char *asmspec)
2757 {
2758 if (!block_clear_fn)
2759 {
2760 tree fn, args;
2761
2762 fn = get_identifier ("memset");
2763 args = build_function_type_list (ptr_type_node, ptr_type_node,
2764 integer_type_node, sizetype,
2765 NULL_TREE);
2766
2767 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2768 DECL_EXTERNAL (fn) = 1;
2769 TREE_PUBLIC (fn) = 1;
2770 DECL_ARTIFICIAL (fn) = 1;
2771 TREE_NOTHROW (fn) = 1;
2772 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2773 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2774
2775 block_clear_fn = fn;
2776 }
2777
2778 if (asmspec)
2779 set_user_assembler_name (block_clear_fn, asmspec);
2780 }
2781
2782 static tree
2783 clear_storage_libcall_fn (int for_call)
2784 {
2785 static bool emitted_extern;
2786
2787 if (!block_clear_fn)
2788 init_block_clear_fn (NULL);
2789
2790 if (for_call && !emitted_extern)
2791 {
2792 emitted_extern = true;
2793 make_decl_rtl (block_clear_fn);
2794 assemble_external (block_clear_fn);
2795 }
2796
2797 return block_clear_fn;
2798 }
2799 \f
2800 /* Expand a setmem pattern; return true if successful. */
2801
2802 bool
2803 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2804 unsigned int expected_align, HOST_WIDE_INT expected_size)
2805 {
2806 /* Try the most limited insn first, because there's no point
2807 including more than one in the machine description unless
2808 the more limited one has some advantage. */
2809
2810 enum machine_mode mode;
2811
2812 if (expected_align < align)
2813 expected_align = align;
2814
2815 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2816 mode = GET_MODE_WIDER_MODE (mode))
2817 {
2818 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2819
2820 if (code != CODE_FOR_nothing
2821 /* We don't need MODE to be narrower than
2822 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2823 the mode mask, as it is returned by the macro, it will
2824 definitely be less than the actual mode mask. */
2825 && ((CONST_INT_P (size)
2826 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2827 <= (GET_MODE_MASK (mode) >> 1)))
2828 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2829 {
2830 struct expand_operand ops[6];
2831 unsigned int nops;
2832
2833 nops = insn_data[(int) code].n_generator_args;
2834 gcc_assert (nops == 4 || nops == 6);
2835
2836 create_fixed_operand (&ops[0], object);
2837 /* The check above guarantees that this size conversion is valid. */
2838 create_convert_operand_to (&ops[1], size, mode, true);
2839 create_convert_operand_from (&ops[2], val, byte_mode, true);
2840 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2841 if (nops == 6)
2842 {
2843 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2844 create_integer_operand (&ops[5], expected_size);
2845 }
2846 if (maybe_expand_insn (code, nops, ops))
2847 return true;
2848 }
2849 }
2850
2851 return false;
2852 }
2853
2854 \f
2855 /* Write to one of the components of the complex value CPLX. Write VAL to
2856 the real part if IMAG_P is false, and the imaginary part if its true. */
2857
2858 static void
2859 write_complex_part (rtx cplx, rtx val, bool imag_p)
2860 {
2861 enum machine_mode cmode;
2862 enum machine_mode imode;
2863 unsigned ibitsize;
2864
2865 if (GET_CODE (cplx) == CONCAT)
2866 {
2867 emit_move_insn (XEXP (cplx, imag_p), val);
2868 return;
2869 }
2870
2871 cmode = GET_MODE (cplx);
2872 imode = GET_MODE_INNER (cmode);
2873 ibitsize = GET_MODE_BITSIZE (imode);
2874
2875 /* For MEMs simplify_gen_subreg may generate an invalid new address
2876 because, e.g., the original address is considered mode-dependent
2877 by the target, which restricts simplify_subreg from invoking
2878 adjust_address_nv. Instead of preparing fallback support for an
2879 invalid address, we call adjust_address_nv directly. */
2880 if (MEM_P (cplx))
2881 {
2882 emit_move_insn (adjust_address_nv (cplx, imode,
2883 imag_p ? GET_MODE_SIZE (imode) : 0),
2884 val);
2885 return;
2886 }
2887
2888 /* If the sub-object is at least word sized, then we know that subregging
2889 will work. This special case is important, since store_bit_field
2890 wants to operate on integer modes, and there's rarely an OImode to
2891 correspond to TCmode. */
2892 if (ibitsize >= BITS_PER_WORD
2893 /* For hard regs we have exact predicates. Assume we can split
2894 the original object if it spans an even number of hard regs.
2895 This special case is important for SCmode on 64-bit platforms
2896 where the natural size of floating-point regs is 32-bit. */
2897 || (REG_P (cplx)
2898 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2899 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2900 {
2901 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2902 imag_p ? GET_MODE_SIZE (imode) : 0);
2903 if (part)
2904 {
2905 emit_move_insn (part, val);
2906 return;
2907 }
2908 else
2909 /* simplify_gen_subreg may fail for sub-word MEMs. */
2910 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2911 }
2912
2913 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2914 }
2915
2916 /* Extract one of the components of the complex value CPLX. Extract the
2917 real part if IMAG_P is false, and the imaginary part if it's true. */
2918
2919 static rtx
2920 read_complex_part (rtx cplx, bool imag_p)
2921 {
2922 enum machine_mode cmode, imode;
2923 unsigned ibitsize;
2924
2925 if (GET_CODE (cplx) == CONCAT)
2926 return XEXP (cplx, imag_p);
2927
2928 cmode = GET_MODE (cplx);
2929 imode = GET_MODE_INNER (cmode);
2930 ibitsize = GET_MODE_BITSIZE (imode);
2931
2932 /* Special case reads from complex constants that got spilled to memory. */
2933 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2934 {
2935 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2936 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2937 {
2938 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2939 if (CONSTANT_CLASS_P (part))
2940 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2941 }
2942 }
2943
2944 /* For MEMs simplify_gen_subreg may generate an invalid new address
2945 because, e.g., the original address is considered mode-dependent
2946 by the target, which restricts simplify_subreg from invoking
2947 adjust_address_nv. Instead of preparing fallback support for an
2948 invalid address, we call adjust_address_nv directly. */
2949 if (MEM_P (cplx))
2950 return adjust_address_nv (cplx, imode,
2951 imag_p ? GET_MODE_SIZE (imode) : 0);
2952
2953 /* If the sub-object is at least word sized, then we know that subregging
2954 will work. This special case is important, since extract_bit_field
2955 wants to operate on integer modes, and there's rarely an OImode to
2956 correspond to TCmode. */
2957 if (ibitsize >= BITS_PER_WORD
2958 /* For hard regs we have exact predicates. Assume we can split
2959 the original object if it spans an even number of hard regs.
2960 This special case is important for SCmode on 64-bit platforms
2961 where the natural size of floating-point regs is 32-bit. */
2962 || (REG_P (cplx)
2963 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2964 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2965 {
2966 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2967 imag_p ? GET_MODE_SIZE (imode) : 0);
2968 if (ret)
2969 return ret;
2970 else
2971 /* simplify_gen_subreg may fail for sub-word MEMs. */
2972 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2973 }
2974
2975 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2976 true, false, NULL_RTX, imode, imode);
2977 }
2978 \f
2979 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2980 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2981 represented in NEW_MODE. If FORCE is true, this will never happen, as
2982 we'll force-create a SUBREG if needed. */
2983
2984 static rtx
2985 emit_move_change_mode (enum machine_mode new_mode,
2986 enum machine_mode old_mode, rtx x, bool force)
2987 {
2988 rtx ret;
2989
2990 if (push_operand (x, GET_MODE (x)))
2991 {
2992 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2993 MEM_COPY_ATTRIBUTES (ret, x);
2994 }
2995 else if (MEM_P (x))
2996 {
2997 /* We don't have to worry about changing the address since the
2998 size in bytes is supposed to be the same. */
2999 if (reload_in_progress)
3000 {
3001 /* Copy the MEM to change the mode and move any
3002 substitutions from the old MEM to the new one. */
3003 ret = adjust_address_nv (x, new_mode, 0);
3004 copy_replacements (x, ret);
3005 }
3006 else
3007 ret = adjust_address (x, new_mode, 0);
3008 }
3009 else
3010 {
3011 /* Note that we do want simplify_subreg's behavior of validating
3012 that the new mode is ok for a hard register. If we were to use
3013 simplify_gen_subreg, we would create the subreg, but would
3014 probably run into the target not being able to implement it. */
3015 /* Except, of course, when FORCE is true, when this is exactly what
3016 we want. Which is needed for CCmodes on some targets. */
3017 if (force)
3018 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3019 else
3020 ret = simplify_subreg (new_mode, x, old_mode, 0);
3021 }
3022
3023 return ret;
3024 }
3025
3026 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3027 an integer mode of the same size as MODE. Returns the instruction
3028 emitted, or NULL if such a move could not be generated. */
3029
3030 static rtx
3031 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3032 {
3033 enum machine_mode imode;
3034 enum insn_code code;
3035
3036 /* There must exist a mode of the exact size we require. */
3037 imode = int_mode_for_mode (mode);
3038 if (imode == BLKmode)
3039 return NULL_RTX;
3040
3041 /* The target must support moves in this mode. */
3042 code = optab_handler (mov_optab, imode);
3043 if (code == CODE_FOR_nothing)
3044 return NULL_RTX;
3045
3046 x = emit_move_change_mode (imode, mode, x, force);
3047 if (x == NULL_RTX)
3048 return NULL_RTX;
3049 y = emit_move_change_mode (imode, mode, y, force);
3050 if (y == NULL_RTX)
3051 return NULL_RTX;
3052 return emit_insn (GEN_FCN (code) (x, y));
3053 }
3054
3055 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3056 Return an equivalent MEM that does not use an auto-increment. */
3057
3058 static rtx
3059 emit_move_resolve_push (enum machine_mode mode, rtx x)
3060 {
3061 enum rtx_code code = GET_CODE (XEXP (x, 0));
3062 HOST_WIDE_INT adjust;
3063 rtx temp;
3064
3065 adjust = GET_MODE_SIZE (mode);
3066 #ifdef PUSH_ROUNDING
3067 adjust = PUSH_ROUNDING (adjust);
3068 #endif
3069 if (code == PRE_DEC || code == POST_DEC)
3070 adjust = -adjust;
3071 else if (code == PRE_MODIFY || code == POST_MODIFY)
3072 {
3073 rtx expr = XEXP (XEXP (x, 0), 1);
3074 HOST_WIDE_INT val;
3075
3076 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3077 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3078 val = INTVAL (XEXP (expr, 1));
3079 if (GET_CODE (expr) == MINUS)
3080 val = -val;
3081 gcc_assert (adjust == val || adjust == -val);
3082 adjust = val;
3083 }
3084
3085 /* Do not use anti_adjust_stack, since we don't want to update
3086 stack_pointer_delta. */
3087 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3088 GEN_INT (adjust), stack_pointer_rtx,
3089 0, OPTAB_LIB_WIDEN);
3090 if (temp != stack_pointer_rtx)
3091 emit_move_insn (stack_pointer_rtx, temp);
3092
3093 switch (code)
3094 {
3095 case PRE_INC:
3096 case PRE_DEC:
3097 case PRE_MODIFY:
3098 temp = stack_pointer_rtx;
3099 break;
3100 case POST_INC:
3101 case POST_DEC:
3102 case POST_MODIFY:
3103 temp = plus_constant (stack_pointer_rtx, -adjust);
3104 break;
3105 default:
3106 gcc_unreachable ();
3107 }
3108
3109 return replace_equiv_address (x, temp);
3110 }
3111
3112 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3113 X is known to satisfy push_operand, and MODE is known to be complex.
3114 Returns the last instruction emitted. */
3115
3116 rtx
3117 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3118 {
3119 enum machine_mode submode = GET_MODE_INNER (mode);
3120 bool imag_first;
3121
3122 #ifdef PUSH_ROUNDING
3123 unsigned int submodesize = GET_MODE_SIZE (submode);
3124
3125 /* In case we output to the stack, but the size is smaller than the
3126 machine can push exactly, we need to use move instructions. */
3127 if (PUSH_ROUNDING (submodesize) != submodesize)
3128 {
3129 x = emit_move_resolve_push (mode, x);
3130 return emit_move_insn (x, y);
3131 }
3132 #endif
3133
3134 /* Note that the real part always precedes the imag part in memory
3135 regardless of machine's endianness. */
3136 switch (GET_CODE (XEXP (x, 0)))
3137 {
3138 case PRE_DEC:
3139 case POST_DEC:
3140 imag_first = true;
3141 break;
3142 case PRE_INC:
3143 case POST_INC:
3144 imag_first = false;
3145 break;
3146 default:
3147 gcc_unreachable ();
3148 }
3149
3150 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3151 read_complex_part (y, imag_first));
3152 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3153 read_complex_part (y, !imag_first));
3154 }
3155
3156 /* A subroutine of emit_move_complex. Perform the move from Y to X
3157 via two moves of the parts. Returns the last instruction emitted. */
3158
3159 rtx
3160 emit_move_complex_parts (rtx x, rtx y)
3161 {
3162 /* Show the output dies here. This is necessary for SUBREGs
3163 of pseudos since we cannot track their lifetimes correctly;
3164 hard regs shouldn't appear here except as return values. */
3165 if (!reload_completed && !reload_in_progress
3166 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3167 emit_clobber (x);
3168
3169 write_complex_part (x, read_complex_part (y, false), false);
3170 write_complex_part (x, read_complex_part (y, true), true);
3171
3172 return get_last_insn ();
3173 }
3174
3175 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3176 MODE is known to be complex. Returns the last instruction emitted. */
3177
3178 static rtx
3179 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3180 {
3181 bool try_int;
3182
3183 /* Need to take special care for pushes, to maintain proper ordering
3184 of the data, and possibly extra padding. */
3185 if (push_operand (x, mode))
3186 return emit_move_complex_push (mode, x, y);
3187
3188 /* See if we can coerce the target into moving both values at once. */
3189
3190 /* Move floating point as parts. */
3191 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3192 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3193 try_int = false;
3194 /* Not possible if the values are inherently not adjacent. */
3195 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3196 try_int = false;
3197 /* Is possible if both are registers (or subregs of registers). */
3198 else if (register_operand (x, mode) && register_operand (y, mode))
3199 try_int = true;
3200 /* If one of the operands is a memory, and alignment constraints
3201 are friendly enough, we may be able to do combined memory operations.
3202 We do not attempt this if Y is a constant because that combination is
3203 usually better with the by-parts thing below. */
3204 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3205 && (!STRICT_ALIGNMENT
3206 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3207 try_int = true;
3208 else
3209 try_int = false;
3210
3211 if (try_int)
3212 {
3213 rtx ret;
3214
3215 /* For memory to memory moves, optimal behavior can be had with the
3216 existing block move logic. */
3217 if (MEM_P (x) && MEM_P (y))
3218 {
3219 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3220 BLOCK_OP_NO_LIBCALL);
3221 return get_last_insn ();
3222 }
3223
3224 ret = emit_move_via_integer (mode, x, y, true);
3225 if (ret)
3226 return ret;
3227 }
3228
3229 return emit_move_complex_parts (x, y);
3230 }
3231
3232 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3233 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3234
3235 static rtx
3236 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3237 {
3238 rtx ret;
3239
3240 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3241 if (mode != CCmode)
3242 {
3243 enum insn_code code = optab_handler (mov_optab, CCmode);
3244 if (code != CODE_FOR_nothing)
3245 {
3246 x = emit_move_change_mode (CCmode, mode, x, true);
3247 y = emit_move_change_mode (CCmode, mode, y, true);
3248 return emit_insn (GEN_FCN (code) (x, y));
3249 }
3250 }
3251
3252 /* Otherwise, find the MODE_INT mode of the same width. */
3253 ret = emit_move_via_integer (mode, x, y, false);
3254 gcc_assert (ret != NULL);
3255 return ret;
3256 }
3257
3258 /* Return true if word I of OP lies entirely in the
3259 undefined bits of a paradoxical subreg. */
3260
3261 static bool
3262 undefined_operand_subword_p (const_rtx op, int i)
3263 {
3264 enum machine_mode innermode, innermostmode;
3265 int offset;
3266 if (GET_CODE (op) != SUBREG)
3267 return false;
3268 innermode = GET_MODE (op);
3269 innermostmode = GET_MODE (SUBREG_REG (op));
3270 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3271 /* The SUBREG_BYTE represents offset, as if the value were stored in
3272 memory, except for a paradoxical subreg where we define
3273 SUBREG_BYTE to be 0; undo this exception as in
3274 simplify_subreg. */
3275 if (SUBREG_BYTE (op) == 0
3276 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3277 {
3278 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3279 if (WORDS_BIG_ENDIAN)
3280 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3281 if (BYTES_BIG_ENDIAN)
3282 offset += difference % UNITS_PER_WORD;
3283 }
3284 if (offset >= GET_MODE_SIZE (innermostmode)
3285 || offset <= -GET_MODE_SIZE (word_mode))
3286 return true;
3287 return false;
3288 }
3289
3290 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3291 MODE is any multi-word or full-word mode that lacks a move_insn
3292 pattern. Note that you will get better code if you define such
3293 patterns, even if they must turn into multiple assembler instructions. */
3294
3295 static rtx
3296 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3297 {
3298 rtx last_insn = 0;
3299 rtx seq, inner;
3300 bool need_clobber;
3301 int i;
3302
3303 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3304
3305 /* If X is a push on the stack, do the push now and replace
3306 X with a reference to the stack pointer. */
3307 if (push_operand (x, mode))
3308 x = emit_move_resolve_push (mode, x);
3309
3310 /* If we are in reload, see if either operand is a MEM whose address
3311 is scheduled for replacement. */
3312 if (reload_in_progress && MEM_P (x)
3313 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3314 x = replace_equiv_address_nv (x, inner);
3315 if (reload_in_progress && MEM_P (y)
3316 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3317 y = replace_equiv_address_nv (y, inner);
3318
3319 start_sequence ();
3320
3321 need_clobber = false;
3322 for (i = 0;
3323 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3324 i++)
3325 {
3326 rtx xpart = operand_subword (x, i, 1, mode);
3327 rtx ypart;
3328
3329 /* Do not generate code for a move if it would come entirely
3330 from the undefined bits of a paradoxical subreg. */
3331 if (undefined_operand_subword_p (y, i))
3332 continue;
3333
3334 ypart = operand_subword (y, i, 1, mode);
3335
3336 /* If we can't get a part of Y, put Y into memory if it is a
3337 constant. Otherwise, force it into a register. Then we must
3338 be able to get a part of Y. */
3339 if (ypart == 0 && CONSTANT_P (y))
3340 {
3341 y = use_anchored_address (force_const_mem (mode, y));
3342 ypart = operand_subword (y, i, 1, mode);
3343 }
3344 else if (ypart == 0)
3345 ypart = operand_subword_force (y, i, mode);
3346
3347 gcc_assert (xpart && ypart);
3348
3349 need_clobber |= (GET_CODE (xpart) == SUBREG);
3350
3351 last_insn = emit_move_insn (xpart, ypart);
3352 }
3353
3354 seq = get_insns ();
3355 end_sequence ();
3356
3357 /* Show the output dies here. This is necessary for SUBREGs
3358 of pseudos since we cannot track their lifetimes correctly;
3359 hard regs shouldn't appear here except as return values.
3360 We never want to emit such a clobber after reload. */
3361 if (x != y
3362 && ! (reload_in_progress || reload_completed)
3363 && need_clobber != 0)
3364 emit_clobber (x);
3365
3366 emit_insn (seq);
3367
3368 return last_insn;
3369 }
3370
3371 /* Low level part of emit_move_insn.
3372 Called just like emit_move_insn, but assumes X and Y
3373 are basically valid. */
3374
3375 rtx
3376 emit_move_insn_1 (rtx x, rtx y)
3377 {
3378 enum machine_mode mode = GET_MODE (x);
3379 enum insn_code code;
3380
3381 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3382
3383 code = optab_handler (mov_optab, mode);
3384 if (code != CODE_FOR_nothing)
3385 return emit_insn (GEN_FCN (code) (x, y));
3386
3387 /* Expand complex moves by moving real part and imag part. */
3388 if (COMPLEX_MODE_P (mode))
3389 return emit_move_complex (mode, x, y);
3390
3391 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3392 || ALL_FIXED_POINT_MODE_P (mode))
3393 {
3394 rtx result = emit_move_via_integer (mode, x, y, true);
3395
3396 /* If we can't find an integer mode, use multi words. */
3397 if (result)
3398 return result;
3399 else
3400 return emit_move_multi_word (mode, x, y);
3401 }
3402
3403 if (GET_MODE_CLASS (mode) == MODE_CC)
3404 return emit_move_ccmode (mode, x, y);
3405
3406 /* Try using a move pattern for the corresponding integer mode. This is
3407 only safe when simplify_subreg can convert MODE constants into integer
3408 constants. At present, it can only do this reliably if the value
3409 fits within a HOST_WIDE_INT. */
3410 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3411 {
3412 rtx ret = emit_move_via_integer (mode, x, y, false);
3413 if (ret)
3414 return ret;
3415 }
3416
3417 return emit_move_multi_word (mode, x, y);
3418 }
3419
3420 /* Generate code to copy Y into X.
3421 Both Y and X must have the same mode, except that
3422 Y can be a constant with VOIDmode.
3423 This mode cannot be BLKmode; use emit_block_move for that.
3424
3425 Return the last instruction emitted. */
3426
3427 rtx
3428 emit_move_insn (rtx x, rtx y)
3429 {
3430 enum machine_mode mode = GET_MODE (x);
3431 rtx y_cst = NULL_RTX;
3432 rtx last_insn, set;
3433
3434 gcc_assert (mode != BLKmode
3435 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3436
3437 if (CONSTANT_P (y))
3438 {
3439 if (optimize
3440 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3441 && (last_insn = compress_float_constant (x, y)))
3442 return last_insn;
3443
3444 y_cst = y;
3445
3446 if (!targetm.legitimate_constant_p (mode, y))
3447 {
3448 y = force_const_mem (mode, y);
3449
3450 /* If the target's cannot_force_const_mem prevented the spill,
3451 assume that the target's move expanders will also take care
3452 of the non-legitimate constant. */
3453 if (!y)
3454 y = y_cst;
3455 else
3456 y = use_anchored_address (y);
3457 }
3458 }
3459
3460 /* If X or Y are memory references, verify that their addresses are valid
3461 for the machine. */
3462 if (MEM_P (x)
3463 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3464 MEM_ADDR_SPACE (x))
3465 && ! push_operand (x, GET_MODE (x))))
3466 x = validize_mem (x);
3467
3468 if (MEM_P (y)
3469 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3470 MEM_ADDR_SPACE (y)))
3471 y = validize_mem (y);
3472
3473 gcc_assert (mode != BLKmode);
3474
3475 last_insn = emit_move_insn_1 (x, y);
3476
3477 if (y_cst && REG_P (x)
3478 && (set = single_set (last_insn)) != NULL_RTX
3479 && SET_DEST (set) == x
3480 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3481 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3482
3483 return last_insn;
3484 }
3485
3486 /* If Y is representable exactly in a narrower mode, and the target can
3487 perform the extension directly from constant or memory, then emit the
3488 move as an extension. */
3489
3490 static rtx
3491 compress_float_constant (rtx x, rtx y)
3492 {
3493 enum machine_mode dstmode = GET_MODE (x);
3494 enum machine_mode orig_srcmode = GET_MODE (y);
3495 enum machine_mode srcmode;
3496 REAL_VALUE_TYPE r;
3497 int oldcost, newcost;
3498 bool speed = optimize_insn_for_speed_p ();
3499
3500 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3501
3502 if (targetm.legitimate_constant_p (dstmode, y))
3503 oldcost = set_src_cost (y, speed);
3504 else
3505 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3506
3507 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3508 srcmode != orig_srcmode;
3509 srcmode = GET_MODE_WIDER_MODE (srcmode))
3510 {
3511 enum insn_code ic;
3512 rtx trunc_y, last_insn;
3513
3514 /* Skip if the target can't extend this way. */
3515 ic = can_extend_p (dstmode, srcmode, 0);
3516 if (ic == CODE_FOR_nothing)
3517 continue;
3518
3519 /* Skip if the narrowed value isn't exact. */
3520 if (! exact_real_truncate (srcmode, &r))
3521 continue;
3522
3523 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3524
3525 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3526 {
3527 /* Skip if the target needs extra instructions to perform
3528 the extension. */
3529 if (!insn_operand_matches (ic, 1, trunc_y))
3530 continue;
3531 /* This is valid, but may not be cheaper than the original. */
3532 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3533 speed);
3534 if (oldcost < newcost)
3535 continue;
3536 }
3537 else if (float_extend_from_mem[dstmode][srcmode])
3538 {
3539 trunc_y = force_const_mem (srcmode, trunc_y);
3540 /* This is valid, but may not be cheaper than the original. */
3541 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3542 speed);
3543 if (oldcost < newcost)
3544 continue;
3545 trunc_y = validize_mem (trunc_y);
3546 }
3547 else
3548 continue;
3549
3550 /* For CSE's benefit, force the compressed constant pool entry
3551 into a new pseudo. This constant may be used in different modes,
3552 and if not, combine will put things back together for us. */
3553 trunc_y = force_reg (srcmode, trunc_y);
3554 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3555 last_insn = get_last_insn ();
3556
3557 if (REG_P (x))
3558 set_unique_reg_note (last_insn, REG_EQUAL, y);
3559
3560 return last_insn;
3561 }
3562
3563 return NULL_RTX;
3564 }
3565 \f
3566 /* Pushing data onto the stack. */
3567
3568 /* Push a block of length SIZE (perhaps variable)
3569 and return an rtx to address the beginning of the block.
3570 The value may be virtual_outgoing_args_rtx.
3571
3572 EXTRA is the number of bytes of padding to push in addition to SIZE.
3573 BELOW nonzero means this padding comes at low addresses;
3574 otherwise, the padding comes at high addresses. */
3575
3576 rtx
3577 push_block (rtx size, int extra, int below)
3578 {
3579 rtx temp;
3580
3581 size = convert_modes (Pmode, ptr_mode, size, 1);
3582 if (CONSTANT_P (size))
3583 anti_adjust_stack (plus_constant (size, extra));
3584 else if (REG_P (size) && extra == 0)
3585 anti_adjust_stack (size);
3586 else
3587 {
3588 temp = copy_to_mode_reg (Pmode, size);
3589 if (extra != 0)
3590 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3591 temp, 0, OPTAB_LIB_WIDEN);
3592 anti_adjust_stack (temp);
3593 }
3594
3595 #ifndef STACK_GROWS_DOWNWARD
3596 if (0)
3597 #else
3598 if (1)
3599 #endif
3600 {
3601 temp = virtual_outgoing_args_rtx;
3602 if (extra != 0 && below)
3603 temp = plus_constant (temp, extra);
3604 }
3605 else
3606 {
3607 if (CONST_INT_P (size))
3608 temp = plus_constant (virtual_outgoing_args_rtx,
3609 -INTVAL (size) - (below ? 0 : extra));
3610 else if (extra != 0 && !below)
3611 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3612 negate_rtx (Pmode, plus_constant (size, extra)));
3613 else
3614 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3615 negate_rtx (Pmode, size));
3616 }
3617
3618 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3619 }
3620
3621 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3622
3623 static rtx
3624 mem_autoinc_base (rtx mem)
3625 {
3626 if (MEM_P (mem))
3627 {
3628 rtx addr = XEXP (mem, 0);
3629 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3630 return XEXP (addr, 0);
3631 }
3632 return NULL;
3633 }
3634
3635 /* A utility routine used here, in reload, and in try_split. The insns
3636 after PREV up to and including LAST are known to adjust the stack,
3637 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3638 placing notes as appropriate. PREV may be NULL, indicating the
3639 entire insn sequence prior to LAST should be scanned.
3640
3641 The set of allowed stack pointer modifications is small:
3642 (1) One or more auto-inc style memory references (aka pushes),
3643 (2) One or more addition/subtraction with the SP as destination,
3644 (3) A single move insn with the SP as destination,
3645 (4) A call_pop insn,
3646 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3647
3648 Insns in the sequence that do not modify the SP are ignored,
3649 except for noreturn calls.
3650
3651 The return value is the amount of adjustment that can be trivially
3652 verified, via immediate operand or auto-inc. If the adjustment
3653 cannot be trivially extracted, the return value is INT_MIN. */
3654
3655 HOST_WIDE_INT
3656 find_args_size_adjust (rtx insn)
3657 {
3658 rtx dest, set, pat;
3659 int i;
3660
3661 pat = PATTERN (insn);
3662 set = NULL;
3663
3664 /* Look for a call_pop pattern. */
3665 if (CALL_P (insn))
3666 {
3667 /* We have to allow non-call_pop patterns for the case
3668 of emit_single_push_insn of a TLS address. */
3669 if (GET_CODE (pat) != PARALLEL)
3670 return 0;
3671
3672 /* All call_pop have a stack pointer adjust in the parallel.
3673 The call itself is always first, and the stack adjust is
3674 usually last, so search from the end. */
3675 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3676 {
3677 set = XVECEXP (pat, 0, i);
3678 if (GET_CODE (set) != SET)
3679 continue;
3680 dest = SET_DEST (set);
3681 if (dest == stack_pointer_rtx)
3682 break;
3683 }
3684 /* We'd better have found the stack pointer adjust. */
3685 if (i == 0)
3686 return 0;
3687 /* Fall through to process the extracted SET and DEST
3688 as if it was a standalone insn. */
3689 }
3690 else if (GET_CODE (pat) == SET)
3691 set = pat;
3692 else if ((set = single_set (insn)) != NULL)
3693 ;
3694 else if (GET_CODE (pat) == PARALLEL)
3695 {
3696 /* ??? Some older ports use a parallel with a stack adjust
3697 and a store for a PUSH_ROUNDING pattern, rather than a
3698 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3699 /* ??? See h8300 and m68k, pushqi1. */
3700 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3701 {
3702 set = XVECEXP (pat, 0, i);
3703 if (GET_CODE (set) != SET)
3704 continue;
3705 dest = SET_DEST (set);
3706 if (dest == stack_pointer_rtx)
3707 break;
3708
3709 /* We do not expect an auto-inc of the sp in the parallel. */
3710 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3711 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3712 != stack_pointer_rtx);
3713 }
3714 if (i < 0)
3715 return 0;
3716 }
3717 else
3718 return 0;
3719
3720 dest = SET_DEST (set);
3721
3722 /* Look for direct modifications of the stack pointer. */
3723 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3724 {
3725 /* Look for a trivial adjustment, otherwise assume nothing. */
3726 /* Note that the SPU restore_stack_block pattern refers to
3727 the stack pointer in V4SImode. Consider that non-trivial. */
3728 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3729 && GET_CODE (SET_SRC (set)) == PLUS
3730 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3731 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3732 return INTVAL (XEXP (SET_SRC (set), 1));
3733 /* ??? Reload can generate no-op moves, which will be cleaned
3734 up later. Recognize it and continue searching. */
3735 else if (rtx_equal_p (dest, SET_SRC (set)))
3736 return 0;
3737 else
3738 return HOST_WIDE_INT_MIN;
3739 }
3740 else
3741 {
3742 rtx mem, addr;
3743
3744 /* Otherwise only think about autoinc patterns. */
3745 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3746 {
3747 mem = dest;
3748 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3749 != stack_pointer_rtx);
3750 }
3751 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3752 mem = SET_SRC (set);
3753 else
3754 return 0;
3755
3756 addr = XEXP (mem, 0);
3757 switch (GET_CODE (addr))
3758 {
3759 case PRE_INC:
3760 case POST_INC:
3761 return GET_MODE_SIZE (GET_MODE (mem));
3762 case PRE_DEC:
3763 case POST_DEC:
3764 return -GET_MODE_SIZE (GET_MODE (mem));
3765 case PRE_MODIFY:
3766 case POST_MODIFY:
3767 addr = XEXP (addr, 1);
3768 gcc_assert (GET_CODE (addr) == PLUS);
3769 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3770 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3771 return INTVAL (XEXP (addr, 1));
3772 default:
3773 gcc_unreachable ();
3774 }
3775 }
3776 }
3777
3778 int
3779 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3780 {
3781 int args_size = end_args_size;
3782 bool saw_unknown = false;
3783 rtx insn;
3784
3785 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3786 {
3787 HOST_WIDE_INT this_delta;
3788
3789 if (!NONDEBUG_INSN_P (insn))
3790 continue;
3791
3792 this_delta = find_args_size_adjust (insn);
3793 if (this_delta == 0)
3794 {
3795 if (!CALL_P (insn)
3796 || ACCUMULATE_OUTGOING_ARGS
3797 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3798 continue;
3799 }
3800
3801 gcc_assert (!saw_unknown);
3802 if (this_delta == HOST_WIDE_INT_MIN)
3803 saw_unknown = true;
3804
3805 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3806 #ifdef STACK_GROWS_DOWNWARD
3807 this_delta = -this_delta;
3808 #endif
3809 args_size -= this_delta;
3810 }
3811
3812 return saw_unknown ? INT_MIN : args_size;
3813 }
3814
3815 #ifdef PUSH_ROUNDING
3816 /* Emit single push insn. */
3817
3818 static void
3819 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3820 {
3821 rtx dest_addr;
3822 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3823 rtx dest;
3824 enum insn_code icode;
3825
3826 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3827 /* If there is push pattern, use it. Otherwise try old way of throwing
3828 MEM representing push operation to move expander. */
3829 icode = optab_handler (push_optab, mode);
3830 if (icode != CODE_FOR_nothing)
3831 {
3832 struct expand_operand ops[1];
3833
3834 create_input_operand (&ops[0], x, mode);
3835 if (maybe_expand_insn (icode, 1, ops))
3836 return;
3837 }
3838 if (GET_MODE_SIZE (mode) == rounded_size)
3839 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3840 /* If we are to pad downward, adjust the stack pointer first and
3841 then store X into the stack location using an offset. This is
3842 because emit_move_insn does not know how to pad; it does not have
3843 access to type. */
3844 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3845 {
3846 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3847 HOST_WIDE_INT offset;
3848
3849 emit_move_insn (stack_pointer_rtx,
3850 expand_binop (Pmode,
3851 #ifdef STACK_GROWS_DOWNWARD
3852 sub_optab,
3853 #else
3854 add_optab,
3855 #endif
3856 stack_pointer_rtx,
3857 GEN_INT (rounded_size),
3858 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3859
3860 offset = (HOST_WIDE_INT) padding_size;
3861 #ifdef STACK_GROWS_DOWNWARD
3862 if (STACK_PUSH_CODE == POST_DEC)
3863 /* We have already decremented the stack pointer, so get the
3864 previous value. */
3865 offset += (HOST_WIDE_INT) rounded_size;
3866 #else
3867 if (STACK_PUSH_CODE == POST_INC)
3868 /* We have already incremented the stack pointer, so get the
3869 previous value. */
3870 offset -= (HOST_WIDE_INT) rounded_size;
3871 #endif
3872 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3873 }
3874 else
3875 {
3876 #ifdef STACK_GROWS_DOWNWARD
3877 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3878 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3879 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3880 #else
3881 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3882 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3883 GEN_INT (rounded_size));
3884 #endif
3885 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3886 }
3887
3888 dest = gen_rtx_MEM (mode, dest_addr);
3889
3890 if (type != 0)
3891 {
3892 set_mem_attributes (dest, type, 1);
3893
3894 if (flag_optimize_sibling_calls)
3895 /* Function incoming arguments may overlap with sibling call
3896 outgoing arguments and we cannot allow reordering of reads
3897 from function arguments with stores to outgoing arguments
3898 of sibling calls. */
3899 set_mem_alias_set (dest, 0);
3900 }
3901 emit_move_insn (dest, x);
3902 }
3903
3904 /* Emit and annotate a single push insn. */
3905
3906 static void
3907 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3908 {
3909 int delta, old_delta = stack_pointer_delta;
3910 rtx prev = get_last_insn ();
3911 rtx last;
3912
3913 emit_single_push_insn_1 (mode, x, type);
3914
3915 last = get_last_insn ();
3916
3917 /* Notice the common case where we emitted exactly one insn. */
3918 if (PREV_INSN (last) == prev)
3919 {
3920 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3921 return;
3922 }
3923
3924 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3925 gcc_assert (delta == INT_MIN || delta == old_delta);
3926 }
3927 #endif
3928
3929 /* Generate code to push X onto the stack, assuming it has mode MODE and
3930 type TYPE.
3931 MODE is redundant except when X is a CONST_INT (since they don't
3932 carry mode info).
3933 SIZE is an rtx for the size of data to be copied (in bytes),
3934 needed only if X is BLKmode.
3935
3936 ALIGN (in bits) is maximum alignment we can assume.
3937
3938 If PARTIAL and REG are both nonzero, then copy that many of the first
3939 bytes of X into registers starting with REG, and push the rest of X.
3940 The amount of space pushed is decreased by PARTIAL bytes.
3941 REG must be a hard register in this case.
3942 If REG is zero but PARTIAL is not, take any all others actions for an
3943 argument partially in registers, but do not actually load any
3944 registers.
3945
3946 EXTRA is the amount in bytes of extra space to leave next to this arg.
3947 This is ignored if an argument block has already been allocated.
3948
3949 On a machine that lacks real push insns, ARGS_ADDR is the address of
3950 the bottom of the argument block for this call. We use indexing off there
3951 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3952 argument block has not been preallocated.
3953
3954 ARGS_SO_FAR is the size of args previously pushed for this call.
3955
3956 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3957 for arguments passed in registers. If nonzero, it will be the number
3958 of bytes required. */
3959
3960 void
3961 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3962 unsigned int align, int partial, rtx reg, int extra,
3963 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3964 rtx alignment_pad)
3965 {
3966 rtx xinner;
3967 enum direction stack_direction
3968 #ifdef STACK_GROWS_DOWNWARD
3969 = downward;
3970 #else
3971 = upward;
3972 #endif
3973
3974 /* Decide where to pad the argument: `downward' for below,
3975 `upward' for above, or `none' for don't pad it.
3976 Default is below for small data on big-endian machines; else above. */
3977 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3978
3979 /* Invert direction if stack is post-decrement.
3980 FIXME: why? */
3981 if (STACK_PUSH_CODE == POST_DEC)
3982 if (where_pad != none)
3983 where_pad = (where_pad == downward ? upward : downward);
3984
3985 xinner = x;
3986
3987 if (mode == BLKmode
3988 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3989 {
3990 /* Copy a block into the stack, entirely or partially. */
3991
3992 rtx temp;
3993 int used;
3994 int offset;
3995 int skip;
3996
3997 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3998 used = partial - offset;
3999
4000 if (mode != BLKmode)
4001 {
4002 /* A value is to be stored in an insufficiently aligned
4003 stack slot; copy via a suitably aligned slot if
4004 necessary. */
4005 size = GEN_INT (GET_MODE_SIZE (mode));
4006 if (!MEM_P (xinner))
4007 {
4008 temp = assign_temp (type, 0, 1, 1);
4009 emit_move_insn (temp, xinner);
4010 xinner = temp;
4011 }
4012 }
4013
4014 gcc_assert (size);
4015
4016 /* USED is now the # of bytes we need not copy to the stack
4017 because registers will take care of them. */
4018
4019 if (partial != 0)
4020 xinner = adjust_address (xinner, BLKmode, used);
4021
4022 /* If the partial register-part of the arg counts in its stack size,
4023 skip the part of stack space corresponding to the registers.
4024 Otherwise, start copying to the beginning of the stack space,
4025 by setting SKIP to 0. */
4026 skip = (reg_parm_stack_space == 0) ? 0 : used;
4027
4028 #ifdef PUSH_ROUNDING
4029 /* Do it with several push insns if that doesn't take lots of insns
4030 and if there is no difficulty with push insns that skip bytes
4031 on the stack for alignment purposes. */
4032 if (args_addr == 0
4033 && PUSH_ARGS
4034 && CONST_INT_P (size)
4035 && skip == 0
4036 && MEM_ALIGN (xinner) >= align
4037 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
4038 /* Here we avoid the case of a structure whose weak alignment
4039 forces many pushes of a small amount of data,
4040 and such small pushes do rounding that causes trouble. */
4041 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4042 || align >= BIGGEST_ALIGNMENT
4043 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4044 == (align / BITS_PER_UNIT)))
4045 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4046 {
4047 /* Push padding now if padding above and stack grows down,
4048 or if padding below and stack grows up.
4049 But if space already allocated, this has already been done. */
4050 if (extra && args_addr == 0
4051 && where_pad != none && where_pad != stack_direction)
4052 anti_adjust_stack (GEN_INT (extra));
4053
4054 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4055 }
4056 else
4057 #endif /* PUSH_ROUNDING */
4058 {
4059 rtx target;
4060
4061 /* Otherwise make space on the stack and copy the data
4062 to the address of that space. */
4063
4064 /* Deduct words put into registers from the size we must copy. */
4065 if (partial != 0)
4066 {
4067 if (CONST_INT_P (size))
4068 size = GEN_INT (INTVAL (size) - used);
4069 else
4070 size = expand_binop (GET_MODE (size), sub_optab, size,
4071 GEN_INT (used), NULL_RTX, 0,
4072 OPTAB_LIB_WIDEN);
4073 }
4074
4075 /* Get the address of the stack space.
4076 In this case, we do not deal with EXTRA separately.
4077 A single stack adjust will do. */
4078 if (! args_addr)
4079 {
4080 temp = push_block (size, extra, where_pad == downward);
4081 extra = 0;
4082 }
4083 else if (CONST_INT_P (args_so_far))
4084 temp = memory_address (BLKmode,
4085 plus_constant (args_addr,
4086 skip + INTVAL (args_so_far)));
4087 else
4088 temp = memory_address (BLKmode,
4089 plus_constant (gen_rtx_PLUS (Pmode,
4090 args_addr,
4091 args_so_far),
4092 skip));
4093
4094 if (!ACCUMULATE_OUTGOING_ARGS)
4095 {
4096 /* If the source is referenced relative to the stack pointer,
4097 copy it to another register to stabilize it. We do not need
4098 to do this if we know that we won't be changing sp. */
4099
4100 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4101 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4102 temp = copy_to_reg (temp);
4103 }
4104
4105 target = gen_rtx_MEM (BLKmode, temp);
4106
4107 /* We do *not* set_mem_attributes here, because incoming arguments
4108 may overlap with sibling call outgoing arguments and we cannot
4109 allow reordering of reads from function arguments with stores
4110 to outgoing arguments of sibling calls. We do, however, want
4111 to record the alignment of the stack slot. */
4112 /* ALIGN may well be better aligned than TYPE, e.g. due to
4113 PARM_BOUNDARY. Assume the caller isn't lying. */
4114 set_mem_align (target, align);
4115
4116 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4117 }
4118 }
4119 else if (partial > 0)
4120 {
4121 /* Scalar partly in registers. */
4122
4123 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4124 int i;
4125 int not_stack;
4126 /* # bytes of start of argument
4127 that we must make space for but need not store. */
4128 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4129 int args_offset = INTVAL (args_so_far);
4130 int skip;
4131
4132 /* Push padding now if padding above and stack grows down,
4133 or if padding below and stack grows up.
4134 But if space already allocated, this has already been done. */
4135 if (extra && args_addr == 0
4136 && where_pad != none && where_pad != stack_direction)
4137 anti_adjust_stack (GEN_INT (extra));
4138
4139 /* If we make space by pushing it, we might as well push
4140 the real data. Otherwise, we can leave OFFSET nonzero
4141 and leave the space uninitialized. */
4142 if (args_addr == 0)
4143 offset = 0;
4144
4145 /* Now NOT_STACK gets the number of words that we don't need to
4146 allocate on the stack. Convert OFFSET to words too. */
4147 not_stack = (partial - offset) / UNITS_PER_WORD;
4148 offset /= UNITS_PER_WORD;
4149
4150 /* If the partial register-part of the arg counts in its stack size,
4151 skip the part of stack space corresponding to the registers.
4152 Otherwise, start copying to the beginning of the stack space,
4153 by setting SKIP to 0. */
4154 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4155
4156 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4157 x = validize_mem (force_const_mem (mode, x));
4158
4159 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4160 SUBREGs of such registers are not allowed. */
4161 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4162 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4163 x = copy_to_reg (x);
4164
4165 /* Loop over all the words allocated on the stack for this arg. */
4166 /* We can do it by words, because any scalar bigger than a word
4167 has a size a multiple of a word. */
4168 #ifndef PUSH_ARGS_REVERSED
4169 for (i = not_stack; i < size; i++)
4170 #else
4171 for (i = size - 1; i >= not_stack; i--)
4172 #endif
4173 if (i >= not_stack + offset)
4174 emit_push_insn (operand_subword_force (x, i, mode),
4175 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4176 0, args_addr,
4177 GEN_INT (args_offset + ((i - not_stack + skip)
4178 * UNITS_PER_WORD)),
4179 reg_parm_stack_space, alignment_pad);
4180 }
4181 else
4182 {
4183 rtx addr;
4184 rtx dest;
4185
4186 /* Push padding now if padding above and stack grows down,
4187 or if padding below and stack grows up.
4188 But if space already allocated, this has already been done. */
4189 if (extra && args_addr == 0
4190 && where_pad != none && where_pad != stack_direction)
4191 anti_adjust_stack (GEN_INT (extra));
4192
4193 #ifdef PUSH_ROUNDING
4194 if (args_addr == 0 && PUSH_ARGS)
4195 emit_single_push_insn (mode, x, type);
4196 else
4197 #endif
4198 {
4199 if (CONST_INT_P (args_so_far))
4200 addr
4201 = memory_address (mode,
4202 plus_constant (args_addr,
4203 INTVAL (args_so_far)));
4204 else
4205 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4206 args_so_far));
4207 dest = gen_rtx_MEM (mode, addr);
4208
4209 /* We do *not* set_mem_attributes here, because incoming arguments
4210 may overlap with sibling call outgoing arguments and we cannot
4211 allow reordering of reads from function arguments with stores
4212 to outgoing arguments of sibling calls. We do, however, want
4213 to record the alignment of the stack slot. */
4214 /* ALIGN may well be better aligned than TYPE, e.g. due to
4215 PARM_BOUNDARY. Assume the caller isn't lying. */
4216 set_mem_align (dest, align);
4217
4218 emit_move_insn (dest, x);
4219 }
4220 }
4221
4222 /* If part should go in registers, copy that part
4223 into the appropriate registers. Do this now, at the end,
4224 since mem-to-mem copies above may do function calls. */
4225 if (partial > 0 && reg != 0)
4226 {
4227 /* Handle calls that pass values in multiple non-contiguous locations.
4228 The Irix 6 ABI has examples of this. */
4229 if (GET_CODE (reg) == PARALLEL)
4230 emit_group_load (reg, x, type, -1);
4231 else
4232 {
4233 gcc_assert (partial % UNITS_PER_WORD == 0);
4234 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4235 }
4236 }
4237
4238 if (extra && args_addr == 0 && where_pad == stack_direction)
4239 anti_adjust_stack (GEN_INT (extra));
4240
4241 if (alignment_pad && args_addr == 0)
4242 anti_adjust_stack (alignment_pad);
4243 }
4244 \f
4245 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4246 operations. */
4247
4248 static rtx
4249 get_subtarget (rtx x)
4250 {
4251 return (optimize
4252 || x == 0
4253 /* Only registers can be subtargets. */
4254 || !REG_P (x)
4255 /* Don't use hard regs to avoid extending their life. */
4256 || REGNO (x) < FIRST_PSEUDO_REGISTER
4257 ? 0 : x);
4258 }
4259
4260 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4261 FIELD is a bitfield. Returns true if the optimization was successful,
4262 and there's nothing else to do. */
4263
4264 static bool
4265 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4266 unsigned HOST_WIDE_INT bitpos,
4267 unsigned HOST_WIDE_INT bitregion_start,
4268 unsigned HOST_WIDE_INT bitregion_end,
4269 enum machine_mode mode1, rtx str_rtx,
4270 tree to, tree src)
4271 {
4272 enum machine_mode str_mode = GET_MODE (str_rtx);
4273 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4274 tree op0, op1;
4275 rtx value, result;
4276 optab binop;
4277 gimple srcstmt;
4278 enum tree_code code;
4279
4280 if (mode1 != VOIDmode
4281 || bitsize >= BITS_PER_WORD
4282 || str_bitsize > BITS_PER_WORD
4283 || TREE_SIDE_EFFECTS (to)
4284 || TREE_THIS_VOLATILE (to))
4285 return false;
4286
4287 STRIP_NOPS (src);
4288 if (TREE_CODE (src) != SSA_NAME)
4289 return false;
4290 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4291 return false;
4292
4293 srcstmt = get_gimple_for_ssa_name (src);
4294 if (!srcstmt
4295 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4296 return false;
4297
4298 code = gimple_assign_rhs_code (srcstmt);
4299
4300 op0 = gimple_assign_rhs1 (srcstmt);
4301
4302 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4303 to find its initialization. Hopefully the initialization will
4304 be from a bitfield load. */
4305 if (TREE_CODE (op0) == SSA_NAME)
4306 {
4307 gimple op0stmt = get_gimple_for_ssa_name (op0);
4308
4309 /* We want to eventually have OP0 be the same as TO, which
4310 should be a bitfield. */
4311 if (!op0stmt
4312 || !is_gimple_assign (op0stmt)
4313 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4314 return false;
4315 op0 = gimple_assign_rhs1 (op0stmt);
4316 }
4317
4318 op1 = gimple_assign_rhs2 (srcstmt);
4319
4320 if (!operand_equal_p (to, op0, 0))
4321 return false;
4322
4323 if (MEM_P (str_rtx))
4324 {
4325 unsigned HOST_WIDE_INT offset1;
4326
4327 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4328 str_mode = word_mode;
4329 str_mode = get_best_mode (bitsize, bitpos,
4330 bitregion_start, bitregion_end,
4331 MEM_ALIGN (str_rtx), str_mode, 0);
4332 if (str_mode == VOIDmode)
4333 return false;
4334 str_bitsize = GET_MODE_BITSIZE (str_mode);
4335
4336 offset1 = bitpos;
4337 bitpos %= str_bitsize;
4338 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4339 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4340 }
4341 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4342 return false;
4343
4344 /* If the bit field covers the whole REG/MEM, store_field
4345 will likely generate better code. */
4346 if (bitsize >= str_bitsize)
4347 return false;
4348
4349 /* We can't handle fields split across multiple entities. */
4350 if (bitpos + bitsize > str_bitsize)
4351 return false;
4352
4353 if (BYTES_BIG_ENDIAN)
4354 bitpos = str_bitsize - bitpos - bitsize;
4355
4356 switch (code)
4357 {
4358 case PLUS_EXPR:
4359 case MINUS_EXPR:
4360 /* For now, just optimize the case of the topmost bitfield
4361 where we don't need to do any masking and also
4362 1 bit bitfields where xor can be used.
4363 We might win by one instruction for the other bitfields
4364 too if insv/extv instructions aren't used, so that
4365 can be added later. */
4366 if (bitpos + bitsize != str_bitsize
4367 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4368 break;
4369
4370 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4371 value = convert_modes (str_mode,
4372 TYPE_MODE (TREE_TYPE (op1)), value,
4373 TYPE_UNSIGNED (TREE_TYPE (op1)));
4374
4375 /* We may be accessing data outside the field, which means
4376 we can alias adjacent data. */
4377 if (MEM_P (str_rtx))
4378 {
4379 str_rtx = shallow_copy_rtx (str_rtx);
4380 set_mem_alias_set (str_rtx, 0);
4381 set_mem_expr (str_rtx, 0);
4382 }
4383
4384 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4385 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4386 {
4387 value = expand_and (str_mode, value, const1_rtx, NULL);
4388 binop = xor_optab;
4389 }
4390 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4391 bitpos, NULL_RTX, 1);
4392 result = expand_binop (str_mode, binop, str_rtx,
4393 value, str_rtx, 1, OPTAB_WIDEN);
4394 if (result != str_rtx)
4395 emit_move_insn (str_rtx, result);
4396 return true;
4397
4398 case BIT_IOR_EXPR:
4399 case BIT_XOR_EXPR:
4400 if (TREE_CODE (op1) != INTEGER_CST)
4401 break;
4402 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4403 value = convert_modes (GET_MODE (str_rtx),
4404 TYPE_MODE (TREE_TYPE (op1)), value,
4405 TYPE_UNSIGNED (TREE_TYPE (op1)));
4406
4407 /* We may be accessing data outside the field, which means
4408 we can alias adjacent data. */
4409 if (MEM_P (str_rtx))
4410 {
4411 str_rtx = shallow_copy_rtx (str_rtx);
4412 set_mem_alias_set (str_rtx, 0);
4413 set_mem_expr (str_rtx, 0);
4414 }
4415
4416 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4417 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4418 {
4419 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4420 - 1);
4421 value = expand_and (GET_MODE (str_rtx), value, mask,
4422 NULL_RTX);
4423 }
4424 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4425 bitpos, NULL_RTX, 1);
4426 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4427 value, str_rtx, 1, OPTAB_WIDEN);
4428 if (result != str_rtx)
4429 emit_move_insn (str_rtx, result);
4430 return true;
4431
4432 default:
4433 break;
4434 }
4435
4436 return false;
4437 }
4438
4439 /* In the C++ memory model, consecutive bit fields in a structure are
4440 considered one memory location.
4441
4442 Given a COMPONENT_REF, this function returns the bit range of
4443 consecutive bits in which this COMPONENT_REF belongs in. The
4444 values are returned in *BITSTART and *BITEND. If either the C++
4445 memory model is not activated, or this memory access is not thread
4446 visible, 0 is returned in *BITSTART and *BITEND.
4447
4448 EXP is the COMPONENT_REF.
4449 INNERDECL is the actual object being referenced.
4450 BITPOS is the position in bits where the bit starts within the structure.
4451 BITSIZE is size in bits of the field being referenced in EXP.
4452
4453 For example, while storing into FOO.A here...
4454
4455 struct {
4456 BIT 0:
4457 unsigned int a : 4;
4458 unsigned int b : 1;
4459 BIT 8:
4460 unsigned char c;
4461 unsigned int d : 6;
4462 } foo;
4463
4464 ...we are not allowed to store past <b>, so for the layout above, a
4465 range of 0..7 (because no one cares if we store into the
4466 padding). */
4467
4468 static void
4469 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4470 unsigned HOST_WIDE_INT *bitend,
4471 tree exp, tree innerdecl,
4472 HOST_WIDE_INT bitpos, HOST_WIDE_INT bitsize)
4473 {
4474 tree field, record_type, fld;
4475 bool found_field = false;
4476 bool prev_field_is_bitfield;
4477
4478 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4479
4480 /* If other threads can't see this value, no need to restrict stores. */
4481 if (ALLOW_STORE_DATA_RACES
4482 || ((TREE_CODE (innerdecl) == MEM_REF
4483 || TREE_CODE (innerdecl) == TARGET_MEM_REF)
4484 && !ptr_deref_may_alias_global_p (TREE_OPERAND (innerdecl, 0)))
4485 || (DECL_P (innerdecl)
4486 && ((TREE_CODE (innerdecl) == VAR_DECL
4487 && DECL_THREAD_LOCAL_P (innerdecl))
4488 || !TREE_STATIC (innerdecl))))
4489 {
4490 *bitstart = *bitend = 0;
4491 return;
4492 }
4493
4494 /* Bit field we're storing into. */
4495 field = TREE_OPERAND (exp, 1);
4496 record_type = DECL_FIELD_CONTEXT (field);
4497
4498 /* Count the contiguous bitfields for the memory location that
4499 contains FIELD. */
4500 *bitstart = 0;
4501 prev_field_is_bitfield = true;
4502 for (fld = TYPE_FIELDS (record_type); fld; fld = DECL_CHAIN (fld))
4503 {
4504 tree t, offset;
4505 enum machine_mode mode;
4506 int unsignedp, volatilep;
4507
4508 if (TREE_CODE (fld) != FIELD_DECL)
4509 continue;
4510
4511 t = build3 (COMPONENT_REF, TREE_TYPE (exp),
4512 unshare_expr (TREE_OPERAND (exp, 0)),
4513 fld, NULL_TREE);
4514 get_inner_reference (t, &bitsize, &bitpos, &offset,
4515 &mode, &unsignedp, &volatilep, true);
4516
4517 if (field == fld)
4518 found_field = true;
4519
4520 if (DECL_BIT_FIELD_TYPE (fld) && bitsize > 0)
4521 {
4522 if (prev_field_is_bitfield == false)
4523 {
4524 *bitstart = bitpos;
4525 prev_field_is_bitfield = true;
4526 }
4527 }
4528 else
4529 {
4530 prev_field_is_bitfield = false;
4531 if (found_field)
4532 break;
4533 }
4534 }
4535 gcc_assert (found_field);
4536
4537 if (fld)
4538 {
4539 /* We found the end of the bit field sequence. Include the
4540 padding up to the next field and be done. */
4541 *bitend = bitpos - 1;
4542 }
4543 else
4544 {
4545 /* If this is the last element in the structure, include the padding
4546 at the end of structure. */
4547 *bitend = TREE_INT_CST_LOW (TYPE_SIZE (record_type)) - 1;
4548 }
4549 }
4550
4551 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4552 is true, try generating a nontemporal store. */
4553
4554 void
4555 expand_assignment (tree to, tree from, bool nontemporal)
4556 {
4557 rtx to_rtx = 0;
4558 rtx result;
4559 enum machine_mode mode;
4560 unsigned int align;
4561 enum insn_code icode;
4562
4563 /* Don't crash if the lhs of the assignment was erroneous. */
4564 if (TREE_CODE (to) == ERROR_MARK)
4565 {
4566 expand_normal (from);
4567 return;
4568 }
4569
4570 /* Optimize away no-op moves without side-effects. */
4571 if (operand_equal_p (to, from, 0))
4572 return;
4573
4574 mode = TYPE_MODE (TREE_TYPE (to));
4575 if ((TREE_CODE (to) == MEM_REF
4576 || TREE_CODE (to) == TARGET_MEM_REF)
4577 && mode != BLKmode
4578 && ((align = get_object_or_type_alignment (to))
4579 < GET_MODE_ALIGNMENT (mode))
4580 && ((icode = optab_handler (movmisalign_optab, mode))
4581 != CODE_FOR_nothing))
4582 {
4583 struct expand_operand ops[2];
4584 enum machine_mode address_mode;
4585 rtx reg, op0, mem;
4586
4587 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4588 reg = force_not_mem (reg);
4589
4590 if (TREE_CODE (to) == MEM_REF)
4591 {
4592 addr_space_t as
4593 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (to, 0))));
4594 tree base = TREE_OPERAND (to, 0);
4595 address_mode = targetm.addr_space.address_mode (as);
4596 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4597 op0 = convert_memory_address_addr_space (address_mode, op0, as);
4598 if (!integer_zerop (TREE_OPERAND (to, 1)))
4599 {
4600 rtx off
4601 = immed_double_int_const (mem_ref_offset (to), address_mode);
4602 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
4603 }
4604 op0 = memory_address_addr_space (mode, op0, as);
4605 mem = gen_rtx_MEM (mode, op0);
4606 set_mem_attributes (mem, to, 0);
4607 set_mem_addr_space (mem, as);
4608 }
4609 else if (TREE_CODE (to) == TARGET_MEM_REF)
4610 {
4611 addr_space_t as
4612 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (to, 0))));
4613 struct mem_address addr;
4614
4615 get_address_description (to, &addr);
4616 op0 = addr_for_mem_ref (&addr, as, true);
4617 op0 = memory_address_addr_space (mode, op0, as);
4618 mem = gen_rtx_MEM (mode, op0);
4619 set_mem_attributes (mem, to, 0);
4620 set_mem_addr_space (mem, as);
4621 }
4622 else
4623 gcc_unreachable ();
4624 if (TREE_THIS_VOLATILE (to))
4625 MEM_VOLATILE_P (mem) = 1;
4626
4627 create_fixed_operand (&ops[0], mem);
4628 create_input_operand (&ops[1], reg, mode);
4629 /* The movmisalign<mode> pattern cannot fail, else the assignment would
4630 silently be omitted. */
4631 expand_insn (icode, 2, ops);
4632 return;
4633 }
4634
4635 /* Assignment of a structure component needs special treatment
4636 if the structure component's rtx is not simply a MEM.
4637 Assignment of an array element at a constant index, and assignment of
4638 an array element in an unaligned packed structure field, has the same
4639 problem. */
4640 if (handled_component_p (to)
4641 /* ??? We only need to handle MEM_REF here if the access is not
4642 a full access of the base object. */
4643 || (TREE_CODE (to) == MEM_REF
4644 && TREE_CODE (TREE_OPERAND (to, 0)) == ADDR_EXPR)
4645 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4646 {
4647 enum machine_mode mode1;
4648 HOST_WIDE_INT bitsize, bitpos;
4649 unsigned HOST_WIDE_INT bitregion_start = 0;
4650 unsigned HOST_WIDE_INT bitregion_end = 0;
4651 tree offset;
4652 int unsignedp;
4653 int volatilep = 0;
4654 tree tem;
4655
4656 push_temp_slots ();
4657 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4658 &unsignedp, &volatilep, true);
4659
4660 if (TREE_CODE (to) == COMPONENT_REF
4661 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4662 get_bit_range (&bitregion_start, &bitregion_end,
4663 to, tem, bitpos, bitsize);
4664
4665 /* If we are going to use store_bit_field and extract_bit_field,
4666 make sure to_rtx will be safe for multiple use. */
4667
4668 to_rtx = expand_normal (tem);
4669
4670 /* If the bitfield is volatile, we want to access it in the
4671 field's mode, not the computed mode.
4672 If a MEM has VOIDmode (external with incomplete type),
4673 use BLKmode for it instead. */
4674 if (MEM_P (to_rtx))
4675 {
4676 if (volatilep && flag_strict_volatile_bitfields > 0)
4677 to_rtx = adjust_address (to_rtx, mode1, 0);
4678 else if (GET_MODE (to_rtx) == VOIDmode)
4679 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4680 }
4681
4682 if (offset != 0)
4683 {
4684 enum machine_mode address_mode;
4685 rtx offset_rtx;
4686
4687 if (!MEM_P (to_rtx))
4688 {
4689 /* We can get constant negative offsets into arrays with broken
4690 user code. Translate this to a trap instead of ICEing. */
4691 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4692 expand_builtin_trap ();
4693 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4694 }
4695
4696 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4697 address_mode
4698 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4699 if (GET_MODE (offset_rtx) != address_mode)
4700 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4701
4702 /* A constant address in TO_RTX can have VOIDmode, we must not try
4703 to call force_reg for that case. Avoid that case. */
4704 if (MEM_P (to_rtx)
4705 && GET_MODE (to_rtx) == BLKmode
4706 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4707 && bitsize > 0
4708 && (bitpos % bitsize) == 0
4709 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4710 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4711 {
4712 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4713 bitpos = 0;
4714 }
4715
4716 to_rtx = offset_address (to_rtx, offset_rtx,
4717 highest_pow2_factor_for_target (to,
4718 offset));
4719 }
4720
4721 /* No action is needed if the target is not a memory and the field
4722 lies completely outside that target. This can occur if the source
4723 code contains an out-of-bounds access to a small array. */
4724 if (!MEM_P (to_rtx)
4725 && GET_MODE (to_rtx) != BLKmode
4726 && (unsigned HOST_WIDE_INT) bitpos
4727 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4728 {
4729 expand_normal (from);
4730 result = NULL;
4731 }
4732 /* Handle expand_expr of a complex value returning a CONCAT. */
4733 else if (GET_CODE (to_rtx) == CONCAT)
4734 {
4735 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4736 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4737 && bitpos == 0
4738 && bitsize == mode_bitsize)
4739 result = store_expr (from, to_rtx, false, nontemporal);
4740 else if (bitsize == mode_bitsize / 2
4741 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4742 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4743 nontemporal);
4744 else if (bitpos + bitsize <= mode_bitsize / 2)
4745 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4746 bitregion_start, bitregion_end,
4747 mode1, from, TREE_TYPE (tem),
4748 get_alias_set (to), nontemporal);
4749 else if (bitpos >= mode_bitsize / 2)
4750 result = store_field (XEXP (to_rtx, 1), bitsize,
4751 bitpos - mode_bitsize / 2,
4752 bitregion_start, bitregion_end,
4753 mode1, from,
4754 TREE_TYPE (tem), get_alias_set (to),
4755 nontemporal);
4756 else if (bitpos == 0 && bitsize == mode_bitsize)
4757 {
4758 rtx from_rtx;
4759 result = expand_normal (from);
4760 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4761 TYPE_MODE (TREE_TYPE (from)), 0);
4762 emit_move_insn (XEXP (to_rtx, 0),
4763 read_complex_part (from_rtx, false));
4764 emit_move_insn (XEXP (to_rtx, 1),
4765 read_complex_part (from_rtx, true));
4766 }
4767 else
4768 {
4769 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4770 GET_MODE_SIZE (GET_MODE (to_rtx)),
4771 0);
4772 write_complex_part (temp, XEXP (to_rtx, 0), false);
4773 write_complex_part (temp, XEXP (to_rtx, 1), true);
4774 result = store_field (temp, bitsize, bitpos,
4775 bitregion_start, bitregion_end,
4776 mode1, from,
4777 TREE_TYPE (tem), get_alias_set (to),
4778 nontemporal);
4779 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4780 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4781 }
4782 }
4783 else
4784 {
4785 if (MEM_P (to_rtx))
4786 {
4787 /* If the field is at offset zero, we could have been given the
4788 DECL_RTX of the parent struct. Don't munge it. */
4789 to_rtx = shallow_copy_rtx (to_rtx);
4790
4791 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4792
4793 /* Deal with volatile and readonly fields. The former is only
4794 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4795 if (volatilep)
4796 MEM_VOLATILE_P (to_rtx) = 1;
4797 if (component_uses_parent_alias_set (to))
4798 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4799 }
4800
4801 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4802 bitregion_start, bitregion_end,
4803 mode1,
4804 to_rtx, to, from))
4805 result = NULL;
4806 else
4807 result = store_field (to_rtx, bitsize, bitpos,
4808 bitregion_start, bitregion_end,
4809 mode1, from,
4810 TREE_TYPE (tem), get_alias_set (to),
4811 nontemporal);
4812 }
4813
4814 if (result)
4815 preserve_temp_slots (result);
4816 free_temp_slots ();
4817 pop_temp_slots ();
4818 return;
4819 }
4820
4821 /* If the rhs is a function call and its value is not an aggregate,
4822 call the function before we start to compute the lhs.
4823 This is needed for correct code for cases such as
4824 val = setjmp (buf) on machines where reference to val
4825 requires loading up part of an address in a separate insn.
4826
4827 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4828 since it might be a promoted variable where the zero- or sign- extension
4829 needs to be done. Handling this in the normal way is safe because no
4830 computation is done before the call. The same is true for SSA names. */
4831 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4832 && COMPLETE_TYPE_P (TREE_TYPE (from))
4833 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4834 && ! (((TREE_CODE (to) == VAR_DECL
4835 || TREE_CODE (to) == PARM_DECL
4836 || TREE_CODE (to) == RESULT_DECL)
4837 && REG_P (DECL_RTL (to)))
4838 || TREE_CODE (to) == SSA_NAME))
4839 {
4840 rtx value;
4841
4842 push_temp_slots ();
4843 value = expand_normal (from);
4844 if (to_rtx == 0)
4845 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4846
4847 /* Handle calls that return values in multiple non-contiguous locations.
4848 The Irix 6 ABI has examples of this. */
4849 if (GET_CODE (to_rtx) == PARALLEL)
4850 emit_group_load (to_rtx, value, TREE_TYPE (from),
4851 int_size_in_bytes (TREE_TYPE (from)));
4852 else if (GET_MODE (to_rtx) == BLKmode)
4853 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4854 else
4855 {
4856 if (POINTER_TYPE_P (TREE_TYPE (to)))
4857 value = convert_memory_address_addr_space
4858 (GET_MODE (to_rtx), value,
4859 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4860
4861 emit_move_insn (to_rtx, value);
4862 }
4863 preserve_temp_slots (to_rtx);
4864 free_temp_slots ();
4865 pop_temp_slots ();
4866 return;
4867 }
4868
4869 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
4870 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
4871
4872 if (to_rtx == 0)
4873 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4874
4875 /* Don't move directly into a return register. */
4876 if (TREE_CODE (to) == RESULT_DECL
4877 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4878 {
4879 rtx temp;
4880
4881 push_temp_slots ();
4882 if (REG_P (to_rtx) && TYPE_MODE (TREE_TYPE (from)) == BLKmode)
4883 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
4884 else
4885 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4886
4887 if (GET_CODE (to_rtx) == PARALLEL)
4888 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4889 int_size_in_bytes (TREE_TYPE (from)));
4890 else if (temp)
4891 emit_move_insn (to_rtx, temp);
4892
4893 preserve_temp_slots (to_rtx);
4894 free_temp_slots ();
4895 pop_temp_slots ();
4896 return;
4897 }
4898
4899 /* In case we are returning the contents of an object which overlaps
4900 the place the value is being stored, use a safe function when copying
4901 a value through a pointer into a structure value return block. */
4902 if (TREE_CODE (to) == RESULT_DECL
4903 && TREE_CODE (from) == INDIRECT_REF
4904 && ADDR_SPACE_GENERIC_P
4905 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4906 && refs_may_alias_p (to, from)
4907 && cfun->returns_struct
4908 && !cfun->returns_pcc_struct)
4909 {
4910 rtx from_rtx, size;
4911
4912 push_temp_slots ();
4913 size = expr_size (from);
4914 from_rtx = expand_normal (from);
4915
4916 emit_library_call (memmove_libfunc, LCT_NORMAL,
4917 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4918 XEXP (from_rtx, 0), Pmode,
4919 convert_to_mode (TYPE_MODE (sizetype),
4920 size, TYPE_UNSIGNED (sizetype)),
4921 TYPE_MODE (sizetype));
4922
4923 preserve_temp_slots (to_rtx);
4924 free_temp_slots ();
4925 pop_temp_slots ();
4926 return;
4927 }
4928
4929 /* Compute FROM and store the value in the rtx we got. */
4930
4931 push_temp_slots ();
4932 result = store_expr (from, to_rtx, 0, nontemporal);
4933 preserve_temp_slots (result);
4934 free_temp_slots ();
4935 pop_temp_slots ();
4936 return;
4937 }
4938
4939 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4940 succeeded, false otherwise. */
4941
4942 bool
4943 emit_storent_insn (rtx to, rtx from)
4944 {
4945 struct expand_operand ops[2];
4946 enum machine_mode mode = GET_MODE (to);
4947 enum insn_code code = optab_handler (storent_optab, mode);
4948
4949 if (code == CODE_FOR_nothing)
4950 return false;
4951
4952 create_fixed_operand (&ops[0], to);
4953 create_input_operand (&ops[1], from, mode);
4954 return maybe_expand_insn (code, 2, ops);
4955 }
4956
4957 /* Generate code for computing expression EXP,
4958 and storing the value into TARGET.
4959
4960 If the mode is BLKmode then we may return TARGET itself.
4961 It turns out that in BLKmode it doesn't cause a problem.
4962 because C has no operators that could combine two different
4963 assignments into the same BLKmode object with different values
4964 with no sequence point. Will other languages need this to
4965 be more thorough?
4966
4967 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4968 stack, and block moves may need to be treated specially.
4969
4970 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4971
4972 rtx
4973 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4974 {
4975 rtx temp;
4976 rtx alt_rtl = NULL_RTX;
4977 location_t loc = EXPR_LOCATION (exp);
4978
4979 if (VOID_TYPE_P (TREE_TYPE (exp)))
4980 {
4981 /* C++ can generate ?: expressions with a throw expression in one
4982 branch and an rvalue in the other. Here, we resolve attempts to
4983 store the throw expression's nonexistent result. */
4984 gcc_assert (!call_param_p);
4985 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4986 return NULL_RTX;
4987 }
4988 if (TREE_CODE (exp) == COMPOUND_EXPR)
4989 {
4990 /* Perform first part of compound expression, then assign from second
4991 part. */
4992 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4993 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4994 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4995 nontemporal);
4996 }
4997 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4998 {
4999 /* For conditional expression, get safe form of the target. Then
5000 test the condition, doing the appropriate assignment on either
5001 side. This avoids the creation of unnecessary temporaries.
5002 For non-BLKmode, it is more efficient not to do this. */
5003
5004 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
5005
5006 do_pending_stack_adjust ();
5007 NO_DEFER_POP;
5008 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5009 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5010 nontemporal);
5011 emit_jump_insn (gen_jump (lab2));
5012 emit_barrier ();
5013 emit_label (lab1);
5014 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5015 nontemporal);
5016 emit_label (lab2);
5017 OK_DEFER_POP;
5018
5019 return NULL_RTX;
5020 }
5021 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5022 /* If this is a scalar in a register that is stored in a wider mode
5023 than the declared mode, compute the result into its declared mode
5024 and then convert to the wider mode. Our value is the computed
5025 expression. */
5026 {
5027 rtx inner_target = 0;
5028
5029 /* We can do the conversion inside EXP, which will often result
5030 in some optimizations. Do the conversion in two steps: first
5031 change the signedness, if needed, then the extend. But don't
5032 do this if the type of EXP is a subtype of something else
5033 since then the conversion might involve more than just
5034 converting modes. */
5035 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5036 && TREE_TYPE (TREE_TYPE (exp)) == 0
5037 && GET_MODE_PRECISION (GET_MODE (target))
5038 == TYPE_PRECISION (TREE_TYPE (exp)))
5039 {
5040 if (TYPE_UNSIGNED (TREE_TYPE (exp))
5041 != SUBREG_PROMOTED_UNSIGNED_P (target))
5042 {
5043 /* Some types, e.g. Fortran's logical*4, won't have a signed
5044 version, so use the mode instead. */
5045 tree ntype
5046 = (signed_or_unsigned_type_for
5047 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
5048 if (ntype == NULL)
5049 ntype = lang_hooks.types.type_for_mode
5050 (TYPE_MODE (TREE_TYPE (exp)),
5051 SUBREG_PROMOTED_UNSIGNED_P (target));
5052
5053 exp = fold_convert_loc (loc, ntype, exp);
5054 }
5055
5056 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5057 (GET_MODE (SUBREG_REG (target)),
5058 SUBREG_PROMOTED_UNSIGNED_P (target)),
5059 exp);
5060
5061 inner_target = SUBREG_REG (target);
5062 }
5063
5064 temp = expand_expr (exp, inner_target, VOIDmode,
5065 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5066
5067 /* If TEMP is a VOIDmode constant, use convert_modes to make
5068 sure that we properly convert it. */
5069 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5070 {
5071 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5072 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
5073 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5074 GET_MODE (target), temp,
5075 SUBREG_PROMOTED_UNSIGNED_P (target));
5076 }
5077
5078 convert_move (SUBREG_REG (target), temp,
5079 SUBREG_PROMOTED_UNSIGNED_P (target));
5080
5081 return NULL_RTX;
5082 }
5083 else if ((TREE_CODE (exp) == STRING_CST
5084 || (TREE_CODE (exp) == MEM_REF
5085 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5086 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5087 == STRING_CST
5088 && integer_zerop (TREE_OPERAND (exp, 1))))
5089 && !nontemporal && !call_param_p
5090 && MEM_P (target))
5091 {
5092 /* Optimize initialization of an array with a STRING_CST. */
5093 HOST_WIDE_INT exp_len, str_copy_len;
5094 rtx dest_mem;
5095 tree str = TREE_CODE (exp) == STRING_CST
5096 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5097
5098 exp_len = int_expr_size (exp);
5099 if (exp_len <= 0)
5100 goto normal_expr;
5101
5102 if (TREE_STRING_LENGTH (str) <= 0)
5103 goto normal_expr;
5104
5105 str_copy_len = strlen (TREE_STRING_POINTER (str));
5106 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5107 goto normal_expr;
5108
5109 str_copy_len = TREE_STRING_LENGTH (str);
5110 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5111 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5112 {
5113 str_copy_len += STORE_MAX_PIECES - 1;
5114 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5115 }
5116 str_copy_len = MIN (str_copy_len, exp_len);
5117 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5118 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5119 MEM_ALIGN (target), false))
5120 goto normal_expr;
5121
5122 dest_mem = target;
5123
5124 dest_mem = store_by_pieces (dest_mem,
5125 str_copy_len, builtin_strncpy_read_str,
5126 CONST_CAST (char *,
5127 TREE_STRING_POINTER (str)),
5128 MEM_ALIGN (target), false,
5129 exp_len > str_copy_len ? 1 : 0);
5130 if (exp_len > str_copy_len)
5131 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5132 GEN_INT (exp_len - str_copy_len),
5133 BLOCK_OP_NORMAL);
5134 return NULL_RTX;
5135 }
5136 else
5137 {
5138 rtx tmp_target;
5139
5140 normal_expr:
5141 /* If we want to use a nontemporal store, force the value to
5142 register first. */
5143 tmp_target = nontemporal ? NULL_RTX : target;
5144 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5145 (call_param_p
5146 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5147 &alt_rtl);
5148 }
5149
5150 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5151 the same as that of TARGET, adjust the constant. This is needed, for
5152 example, in case it is a CONST_DOUBLE and we want only a word-sized
5153 value. */
5154 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5155 && TREE_CODE (exp) != ERROR_MARK
5156 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5157 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5158 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5159
5160 /* If value was not generated in the target, store it there.
5161 Convert the value to TARGET's type first if necessary and emit the
5162 pending incrementations that have been queued when expanding EXP.
5163 Note that we cannot emit the whole queue blindly because this will
5164 effectively disable the POST_INC optimization later.
5165
5166 If TEMP and TARGET compare equal according to rtx_equal_p, but
5167 one or both of them are volatile memory refs, we have to distinguish
5168 two cases:
5169 - expand_expr has used TARGET. In this case, we must not generate
5170 another copy. This can be detected by TARGET being equal according
5171 to == .
5172 - expand_expr has not used TARGET - that means that the source just
5173 happens to have the same RTX form. Since temp will have been created
5174 by expand_expr, it will compare unequal according to == .
5175 We must generate a copy in this case, to reach the correct number
5176 of volatile memory references. */
5177
5178 if ((! rtx_equal_p (temp, target)
5179 || (temp != target && (side_effects_p (temp)
5180 || side_effects_p (target))))
5181 && TREE_CODE (exp) != ERROR_MARK
5182 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5183 but TARGET is not valid memory reference, TEMP will differ
5184 from TARGET although it is really the same location. */
5185 && !(alt_rtl
5186 && rtx_equal_p (alt_rtl, target)
5187 && !side_effects_p (alt_rtl)
5188 && !side_effects_p (target))
5189 /* If there's nothing to copy, don't bother. Don't call
5190 expr_size unless necessary, because some front-ends (C++)
5191 expr_size-hook must not be given objects that are not
5192 supposed to be bit-copied or bit-initialized. */
5193 && expr_size (exp) != const0_rtx)
5194 {
5195 if (GET_MODE (temp) != GET_MODE (target)
5196 && GET_MODE (temp) != VOIDmode)
5197 {
5198 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5199 if (GET_MODE (target) == BLKmode
5200 && GET_MODE (temp) == BLKmode)
5201 emit_block_move (target, temp, expr_size (exp),
5202 (call_param_p
5203 ? BLOCK_OP_CALL_PARM
5204 : BLOCK_OP_NORMAL));
5205 else if (GET_MODE (target) == BLKmode)
5206 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5207 0, 0, 0, GET_MODE (temp), temp);
5208 else
5209 convert_move (target, temp, unsignedp);
5210 }
5211
5212 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5213 {
5214 /* Handle copying a string constant into an array. The string
5215 constant may be shorter than the array. So copy just the string's
5216 actual length, and clear the rest. First get the size of the data
5217 type of the string, which is actually the size of the target. */
5218 rtx size = expr_size (exp);
5219
5220 if (CONST_INT_P (size)
5221 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5222 emit_block_move (target, temp, size,
5223 (call_param_p
5224 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5225 else
5226 {
5227 enum machine_mode pointer_mode
5228 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5229 enum machine_mode address_mode
5230 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
5231
5232 /* Compute the size of the data to copy from the string. */
5233 tree copy_size
5234 = size_binop_loc (loc, MIN_EXPR,
5235 make_tree (sizetype, size),
5236 size_int (TREE_STRING_LENGTH (exp)));
5237 rtx copy_size_rtx
5238 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5239 (call_param_p
5240 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5241 rtx label = 0;
5242
5243 /* Copy that much. */
5244 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5245 TYPE_UNSIGNED (sizetype));
5246 emit_block_move (target, temp, copy_size_rtx,
5247 (call_param_p
5248 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5249
5250 /* Figure out how much is left in TARGET that we have to clear.
5251 Do all calculations in pointer_mode. */
5252 if (CONST_INT_P (copy_size_rtx))
5253 {
5254 size = plus_constant (size, -INTVAL (copy_size_rtx));
5255 target = adjust_address (target, BLKmode,
5256 INTVAL (copy_size_rtx));
5257 }
5258 else
5259 {
5260 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5261 copy_size_rtx, NULL_RTX, 0,
5262 OPTAB_LIB_WIDEN);
5263
5264 if (GET_MODE (copy_size_rtx) != address_mode)
5265 copy_size_rtx = convert_to_mode (address_mode,
5266 copy_size_rtx,
5267 TYPE_UNSIGNED (sizetype));
5268
5269 target = offset_address (target, copy_size_rtx,
5270 highest_pow2_factor (copy_size));
5271 label = gen_label_rtx ();
5272 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5273 GET_MODE (size), 0, label);
5274 }
5275
5276 if (size != const0_rtx)
5277 clear_storage (target, size, BLOCK_OP_NORMAL);
5278
5279 if (label)
5280 emit_label (label);
5281 }
5282 }
5283 /* Handle calls that return values in multiple non-contiguous locations.
5284 The Irix 6 ABI has examples of this. */
5285 else if (GET_CODE (target) == PARALLEL)
5286 emit_group_load (target, temp, TREE_TYPE (exp),
5287 int_size_in_bytes (TREE_TYPE (exp)));
5288 else if (GET_MODE (temp) == BLKmode)
5289 emit_block_move (target, temp, expr_size (exp),
5290 (call_param_p
5291 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5292 else if (nontemporal
5293 && emit_storent_insn (target, temp))
5294 /* If we managed to emit a nontemporal store, there is nothing else to
5295 do. */
5296 ;
5297 else
5298 {
5299 temp = force_operand (temp, target);
5300 if (temp != target)
5301 emit_move_insn (target, temp);
5302 }
5303 }
5304
5305 return NULL_RTX;
5306 }
5307 \f
5308 /* Return true if field F of structure TYPE is a flexible array. */
5309
5310 static bool
5311 flexible_array_member_p (const_tree f, const_tree type)
5312 {
5313 const_tree tf;
5314
5315 tf = TREE_TYPE (f);
5316 return (DECL_CHAIN (f) == NULL
5317 && TREE_CODE (tf) == ARRAY_TYPE
5318 && TYPE_DOMAIN (tf)
5319 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5320 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5321 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5322 && int_size_in_bytes (type) >= 0);
5323 }
5324
5325 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5326 must have in order for it to completely initialize a value of type TYPE.
5327 Return -1 if the number isn't known.
5328
5329 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5330
5331 static HOST_WIDE_INT
5332 count_type_elements (const_tree type, bool for_ctor_p)
5333 {
5334 switch (TREE_CODE (type))
5335 {
5336 case ARRAY_TYPE:
5337 {
5338 tree nelts;
5339
5340 nelts = array_type_nelts (type);
5341 if (nelts && host_integerp (nelts, 1))
5342 {
5343 unsigned HOST_WIDE_INT n;
5344
5345 n = tree_low_cst (nelts, 1) + 1;
5346 if (n == 0 || for_ctor_p)
5347 return n;
5348 else
5349 return n * count_type_elements (TREE_TYPE (type), false);
5350 }
5351 return for_ctor_p ? -1 : 1;
5352 }
5353
5354 case RECORD_TYPE:
5355 {
5356 unsigned HOST_WIDE_INT n;
5357 tree f;
5358
5359 n = 0;
5360 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5361 if (TREE_CODE (f) == FIELD_DECL)
5362 {
5363 if (!for_ctor_p)
5364 n += count_type_elements (TREE_TYPE (f), false);
5365 else if (!flexible_array_member_p (f, type))
5366 /* Don't count flexible arrays, which are not supposed
5367 to be initialized. */
5368 n += 1;
5369 }
5370
5371 return n;
5372 }
5373
5374 case UNION_TYPE:
5375 case QUAL_UNION_TYPE:
5376 {
5377 tree f;
5378 HOST_WIDE_INT n, m;
5379
5380 gcc_assert (!for_ctor_p);
5381 /* Estimate the number of scalars in each field and pick the
5382 maximum. Other estimates would do instead; the idea is simply
5383 to make sure that the estimate is not sensitive to the ordering
5384 of the fields. */
5385 n = 1;
5386 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5387 if (TREE_CODE (f) == FIELD_DECL)
5388 {
5389 m = count_type_elements (TREE_TYPE (f), false);
5390 /* If the field doesn't span the whole union, add an extra
5391 scalar for the rest. */
5392 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5393 TYPE_SIZE (type)) != 1)
5394 m++;
5395 if (n < m)
5396 n = m;
5397 }
5398 return n;
5399 }
5400
5401 case COMPLEX_TYPE:
5402 return 2;
5403
5404 case VECTOR_TYPE:
5405 return TYPE_VECTOR_SUBPARTS (type);
5406
5407 case INTEGER_TYPE:
5408 case REAL_TYPE:
5409 case FIXED_POINT_TYPE:
5410 case ENUMERAL_TYPE:
5411 case BOOLEAN_TYPE:
5412 case POINTER_TYPE:
5413 case OFFSET_TYPE:
5414 case REFERENCE_TYPE:
5415 case NULLPTR_TYPE:
5416 return 1;
5417
5418 case ERROR_MARK:
5419 return 0;
5420
5421 case VOID_TYPE:
5422 case METHOD_TYPE:
5423 case FUNCTION_TYPE:
5424 case LANG_TYPE:
5425 default:
5426 gcc_unreachable ();
5427 }
5428 }
5429
5430 /* Helper for categorize_ctor_elements. Identical interface. */
5431
5432 static bool
5433 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5434 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5435 {
5436 unsigned HOST_WIDE_INT idx;
5437 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5438 tree value, purpose, elt_type;
5439
5440 /* Whether CTOR is a valid constant initializer, in accordance with what
5441 initializer_constant_valid_p does. If inferred from the constructor
5442 elements, true until proven otherwise. */
5443 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5444 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5445
5446 nz_elts = 0;
5447 init_elts = 0;
5448 num_fields = 0;
5449 elt_type = NULL_TREE;
5450
5451 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5452 {
5453 HOST_WIDE_INT mult = 1;
5454
5455 if (TREE_CODE (purpose) == RANGE_EXPR)
5456 {
5457 tree lo_index = TREE_OPERAND (purpose, 0);
5458 tree hi_index = TREE_OPERAND (purpose, 1);
5459
5460 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5461 mult = (tree_low_cst (hi_index, 1)
5462 - tree_low_cst (lo_index, 1) + 1);
5463 }
5464 num_fields += mult;
5465 elt_type = TREE_TYPE (value);
5466
5467 switch (TREE_CODE (value))
5468 {
5469 case CONSTRUCTOR:
5470 {
5471 HOST_WIDE_INT nz = 0, ic = 0;
5472
5473 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5474 p_complete);
5475
5476 nz_elts += mult * nz;
5477 init_elts += mult * ic;
5478
5479 if (const_from_elts_p && const_p)
5480 const_p = const_elt_p;
5481 }
5482 break;
5483
5484 case INTEGER_CST:
5485 case REAL_CST:
5486 case FIXED_CST:
5487 if (!initializer_zerop (value))
5488 nz_elts += mult;
5489 init_elts += mult;
5490 break;
5491
5492 case STRING_CST:
5493 nz_elts += mult * TREE_STRING_LENGTH (value);
5494 init_elts += mult * TREE_STRING_LENGTH (value);
5495 break;
5496
5497 case COMPLEX_CST:
5498 if (!initializer_zerop (TREE_REALPART (value)))
5499 nz_elts += mult;
5500 if (!initializer_zerop (TREE_IMAGPART (value)))
5501 nz_elts += mult;
5502 init_elts += mult;
5503 break;
5504
5505 case VECTOR_CST:
5506 {
5507 tree v;
5508 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
5509 {
5510 if (!initializer_zerop (TREE_VALUE (v)))
5511 nz_elts += mult;
5512 init_elts += mult;
5513 }
5514 }
5515 break;
5516
5517 default:
5518 {
5519 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5520 nz_elts += mult * tc;
5521 init_elts += mult * tc;
5522
5523 if (const_from_elts_p && const_p)
5524 const_p = initializer_constant_valid_p (value, elt_type)
5525 != NULL_TREE;
5526 }
5527 break;
5528 }
5529 }
5530
5531 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5532 num_fields, elt_type))
5533 *p_complete = false;
5534
5535 *p_nz_elts += nz_elts;
5536 *p_init_elts += init_elts;
5537
5538 return const_p;
5539 }
5540
5541 /* Examine CTOR to discover:
5542 * how many scalar fields are set to nonzero values,
5543 and place it in *P_NZ_ELTS;
5544 * how many scalar fields in total are in CTOR,
5545 and place it in *P_ELT_COUNT.
5546 * whether the constructor is complete -- in the sense that every
5547 meaningful byte is explicitly given a value --
5548 and place it in *P_COMPLETE.
5549
5550 Return whether or not CTOR is a valid static constant initializer, the same
5551 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5552
5553 bool
5554 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5555 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5556 {
5557 *p_nz_elts = 0;
5558 *p_init_elts = 0;
5559 *p_complete = true;
5560
5561 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5562 }
5563
5564 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5565 of which had type LAST_TYPE. Each element was itself a complete
5566 initializer, in the sense that every meaningful byte was explicitly
5567 given a value. Return true if the same is true for the constructor
5568 as a whole. */
5569
5570 bool
5571 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5572 const_tree last_type)
5573 {
5574 if (TREE_CODE (type) == UNION_TYPE
5575 || TREE_CODE (type) == QUAL_UNION_TYPE)
5576 {
5577 if (num_elts == 0)
5578 return false;
5579
5580 gcc_assert (num_elts == 1 && last_type);
5581
5582 /* ??? We could look at each element of the union, and find the
5583 largest element. Which would avoid comparing the size of the
5584 initialized element against any tail padding in the union.
5585 Doesn't seem worth the effort... */
5586 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5587 }
5588
5589 return count_type_elements (type, true) == num_elts;
5590 }
5591
5592 /* Return 1 if EXP contains mostly (3/4) zeros. */
5593
5594 static int
5595 mostly_zeros_p (const_tree exp)
5596 {
5597 if (TREE_CODE (exp) == CONSTRUCTOR)
5598 {
5599 HOST_WIDE_INT nz_elts, init_elts;
5600 bool complete_p;
5601
5602 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5603 return !complete_p || nz_elts < init_elts / 4;
5604 }
5605
5606 return initializer_zerop (exp);
5607 }
5608
5609 /* Return 1 if EXP contains all zeros. */
5610
5611 static int
5612 all_zeros_p (const_tree exp)
5613 {
5614 if (TREE_CODE (exp) == CONSTRUCTOR)
5615 {
5616 HOST_WIDE_INT nz_elts, init_elts;
5617 bool complete_p;
5618
5619 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5620 return nz_elts == 0;
5621 }
5622
5623 return initializer_zerop (exp);
5624 }
5625 \f
5626 /* Helper function for store_constructor.
5627 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5628 TYPE is the type of the CONSTRUCTOR, not the element type.
5629 CLEARED is as for store_constructor.
5630 ALIAS_SET is the alias set to use for any stores.
5631
5632 This provides a recursive shortcut back to store_constructor when it isn't
5633 necessary to go through store_field. This is so that we can pass through
5634 the cleared field to let store_constructor know that we may not have to
5635 clear a substructure if the outer structure has already been cleared. */
5636
5637 static void
5638 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5639 HOST_WIDE_INT bitpos, enum machine_mode mode,
5640 tree exp, tree type, int cleared,
5641 alias_set_type alias_set)
5642 {
5643 if (TREE_CODE (exp) == CONSTRUCTOR
5644 /* We can only call store_constructor recursively if the size and
5645 bit position are on a byte boundary. */
5646 && bitpos % BITS_PER_UNIT == 0
5647 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5648 /* If we have a nonzero bitpos for a register target, then we just
5649 let store_field do the bitfield handling. This is unlikely to
5650 generate unnecessary clear instructions anyways. */
5651 && (bitpos == 0 || MEM_P (target)))
5652 {
5653 if (MEM_P (target))
5654 target
5655 = adjust_address (target,
5656 GET_MODE (target) == BLKmode
5657 || 0 != (bitpos
5658 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5659 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5660
5661
5662 /* Update the alias set, if required. */
5663 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5664 && MEM_ALIAS_SET (target) != 0)
5665 {
5666 target = copy_rtx (target);
5667 set_mem_alias_set (target, alias_set);
5668 }
5669
5670 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5671 }
5672 else
5673 store_field (target, bitsize, bitpos, 0, 0, mode, exp, type, alias_set,
5674 false);
5675 }
5676
5677 /* Store the value of constructor EXP into the rtx TARGET.
5678 TARGET is either a REG or a MEM; we know it cannot conflict, since
5679 safe_from_p has been called.
5680 CLEARED is true if TARGET is known to have been zero'd.
5681 SIZE is the number of bytes of TARGET we are allowed to modify: this
5682 may not be the same as the size of EXP if we are assigning to a field
5683 which has been packed to exclude padding bits. */
5684
5685 static void
5686 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5687 {
5688 tree type = TREE_TYPE (exp);
5689 #ifdef WORD_REGISTER_OPERATIONS
5690 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5691 #endif
5692
5693 switch (TREE_CODE (type))
5694 {
5695 case RECORD_TYPE:
5696 case UNION_TYPE:
5697 case QUAL_UNION_TYPE:
5698 {
5699 unsigned HOST_WIDE_INT idx;
5700 tree field, value;
5701
5702 /* If size is zero or the target is already cleared, do nothing. */
5703 if (size == 0 || cleared)
5704 cleared = 1;
5705 /* We either clear the aggregate or indicate the value is dead. */
5706 else if ((TREE_CODE (type) == UNION_TYPE
5707 || TREE_CODE (type) == QUAL_UNION_TYPE)
5708 && ! CONSTRUCTOR_ELTS (exp))
5709 /* If the constructor is empty, clear the union. */
5710 {
5711 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5712 cleared = 1;
5713 }
5714
5715 /* If we are building a static constructor into a register,
5716 set the initial value as zero so we can fold the value into
5717 a constant. But if more than one register is involved,
5718 this probably loses. */
5719 else if (REG_P (target) && TREE_STATIC (exp)
5720 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5721 {
5722 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5723 cleared = 1;
5724 }
5725
5726 /* If the constructor has fewer fields than the structure or
5727 if we are initializing the structure to mostly zeros, clear
5728 the whole structure first. Don't do this if TARGET is a
5729 register whose mode size isn't equal to SIZE since
5730 clear_storage can't handle this case. */
5731 else if (size > 0
5732 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5733 != fields_length (type))
5734 || mostly_zeros_p (exp))
5735 && (!REG_P (target)
5736 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5737 == size)))
5738 {
5739 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5740 cleared = 1;
5741 }
5742
5743 if (REG_P (target) && !cleared)
5744 emit_clobber (target);
5745
5746 /* Store each element of the constructor into the
5747 corresponding field of TARGET. */
5748 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5749 {
5750 enum machine_mode mode;
5751 HOST_WIDE_INT bitsize;
5752 HOST_WIDE_INT bitpos = 0;
5753 tree offset;
5754 rtx to_rtx = target;
5755
5756 /* Just ignore missing fields. We cleared the whole
5757 structure, above, if any fields are missing. */
5758 if (field == 0)
5759 continue;
5760
5761 if (cleared && initializer_zerop (value))
5762 continue;
5763
5764 if (host_integerp (DECL_SIZE (field), 1))
5765 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5766 else
5767 bitsize = -1;
5768
5769 mode = DECL_MODE (field);
5770 if (DECL_BIT_FIELD (field))
5771 mode = VOIDmode;
5772
5773 offset = DECL_FIELD_OFFSET (field);
5774 if (host_integerp (offset, 0)
5775 && host_integerp (bit_position (field), 0))
5776 {
5777 bitpos = int_bit_position (field);
5778 offset = 0;
5779 }
5780 else
5781 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5782
5783 if (offset)
5784 {
5785 enum machine_mode address_mode;
5786 rtx offset_rtx;
5787
5788 offset
5789 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5790 make_tree (TREE_TYPE (exp),
5791 target));
5792
5793 offset_rtx = expand_normal (offset);
5794 gcc_assert (MEM_P (to_rtx));
5795
5796 address_mode
5797 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5798 if (GET_MODE (offset_rtx) != address_mode)
5799 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5800
5801 to_rtx = offset_address (to_rtx, offset_rtx,
5802 highest_pow2_factor (offset));
5803 }
5804
5805 #ifdef WORD_REGISTER_OPERATIONS
5806 /* If this initializes a field that is smaller than a
5807 word, at the start of a word, try to widen it to a full
5808 word. This special case allows us to output C++ member
5809 function initializations in a form that the optimizers
5810 can understand. */
5811 if (REG_P (target)
5812 && bitsize < BITS_PER_WORD
5813 && bitpos % BITS_PER_WORD == 0
5814 && GET_MODE_CLASS (mode) == MODE_INT
5815 && TREE_CODE (value) == INTEGER_CST
5816 && exp_size >= 0
5817 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5818 {
5819 tree type = TREE_TYPE (value);
5820
5821 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5822 {
5823 type = lang_hooks.types.type_for_size
5824 (BITS_PER_WORD, TYPE_UNSIGNED (type));
5825 value = fold_convert (type, value);
5826 }
5827
5828 if (BYTES_BIG_ENDIAN)
5829 value
5830 = fold_build2 (LSHIFT_EXPR, type, value,
5831 build_int_cst (type,
5832 BITS_PER_WORD - bitsize));
5833 bitsize = BITS_PER_WORD;
5834 mode = word_mode;
5835 }
5836 #endif
5837
5838 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5839 && DECL_NONADDRESSABLE_P (field))
5840 {
5841 to_rtx = copy_rtx (to_rtx);
5842 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5843 }
5844
5845 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5846 value, type, cleared,
5847 get_alias_set (TREE_TYPE (field)));
5848 }
5849 break;
5850 }
5851 case ARRAY_TYPE:
5852 {
5853 tree value, index;
5854 unsigned HOST_WIDE_INT i;
5855 int need_to_clear;
5856 tree domain;
5857 tree elttype = TREE_TYPE (type);
5858 int const_bounds_p;
5859 HOST_WIDE_INT minelt = 0;
5860 HOST_WIDE_INT maxelt = 0;
5861
5862 domain = TYPE_DOMAIN (type);
5863 const_bounds_p = (TYPE_MIN_VALUE (domain)
5864 && TYPE_MAX_VALUE (domain)
5865 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5866 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5867
5868 /* If we have constant bounds for the range of the type, get them. */
5869 if (const_bounds_p)
5870 {
5871 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5872 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5873 }
5874
5875 /* If the constructor has fewer elements than the array, clear
5876 the whole array first. Similarly if this is static
5877 constructor of a non-BLKmode object. */
5878 if (cleared)
5879 need_to_clear = 0;
5880 else if (REG_P (target) && TREE_STATIC (exp))
5881 need_to_clear = 1;
5882 else
5883 {
5884 unsigned HOST_WIDE_INT idx;
5885 tree index, value;
5886 HOST_WIDE_INT count = 0, zero_count = 0;
5887 need_to_clear = ! const_bounds_p;
5888
5889 /* This loop is a more accurate version of the loop in
5890 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5891 is also needed to check for missing elements. */
5892 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5893 {
5894 HOST_WIDE_INT this_node_count;
5895
5896 if (need_to_clear)
5897 break;
5898
5899 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5900 {
5901 tree lo_index = TREE_OPERAND (index, 0);
5902 tree hi_index = TREE_OPERAND (index, 1);
5903
5904 if (! host_integerp (lo_index, 1)
5905 || ! host_integerp (hi_index, 1))
5906 {
5907 need_to_clear = 1;
5908 break;
5909 }
5910
5911 this_node_count = (tree_low_cst (hi_index, 1)
5912 - tree_low_cst (lo_index, 1) + 1);
5913 }
5914 else
5915 this_node_count = 1;
5916
5917 count += this_node_count;
5918 if (mostly_zeros_p (value))
5919 zero_count += this_node_count;
5920 }
5921
5922 /* Clear the entire array first if there are any missing
5923 elements, or if the incidence of zero elements is >=
5924 75%. */
5925 if (! need_to_clear
5926 && (count < maxelt - minelt + 1
5927 || 4 * zero_count >= 3 * count))
5928 need_to_clear = 1;
5929 }
5930
5931 if (need_to_clear && size > 0)
5932 {
5933 if (REG_P (target))
5934 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5935 else
5936 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5937 cleared = 1;
5938 }
5939
5940 if (!cleared && REG_P (target))
5941 /* Inform later passes that the old value is dead. */
5942 emit_clobber (target);
5943
5944 /* Store each element of the constructor into the
5945 corresponding element of TARGET, determined by counting the
5946 elements. */
5947 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5948 {
5949 enum machine_mode mode;
5950 HOST_WIDE_INT bitsize;
5951 HOST_WIDE_INT bitpos;
5952 rtx xtarget = target;
5953
5954 if (cleared && initializer_zerop (value))
5955 continue;
5956
5957 mode = TYPE_MODE (elttype);
5958 if (mode == BLKmode)
5959 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5960 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5961 : -1);
5962 else
5963 bitsize = GET_MODE_BITSIZE (mode);
5964
5965 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5966 {
5967 tree lo_index = TREE_OPERAND (index, 0);
5968 tree hi_index = TREE_OPERAND (index, 1);
5969 rtx index_r, pos_rtx;
5970 HOST_WIDE_INT lo, hi, count;
5971 tree position;
5972
5973 /* If the range is constant and "small", unroll the loop. */
5974 if (const_bounds_p
5975 && host_integerp (lo_index, 0)
5976 && host_integerp (hi_index, 0)
5977 && (lo = tree_low_cst (lo_index, 0),
5978 hi = tree_low_cst (hi_index, 0),
5979 count = hi - lo + 1,
5980 (!MEM_P (target)
5981 || count <= 2
5982 || (host_integerp (TYPE_SIZE (elttype), 1)
5983 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5984 <= 40 * 8)))))
5985 {
5986 lo -= minelt; hi -= minelt;
5987 for (; lo <= hi; lo++)
5988 {
5989 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
5990
5991 if (MEM_P (target)
5992 && !MEM_KEEP_ALIAS_SET_P (target)
5993 && TREE_CODE (type) == ARRAY_TYPE
5994 && TYPE_NONALIASED_COMPONENT (type))
5995 {
5996 target = copy_rtx (target);
5997 MEM_KEEP_ALIAS_SET_P (target) = 1;
5998 }
5999
6000 store_constructor_field
6001 (target, bitsize, bitpos, mode, value, type, cleared,
6002 get_alias_set (elttype));
6003 }
6004 }
6005 else
6006 {
6007 rtx loop_start = gen_label_rtx ();
6008 rtx loop_end = gen_label_rtx ();
6009 tree exit_cond;
6010
6011 expand_normal (hi_index);
6012
6013 index = build_decl (EXPR_LOCATION (exp),
6014 VAR_DECL, NULL_TREE, domain);
6015 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6016 SET_DECL_RTL (index, index_r);
6017 store_expr (lo_index, index_r, 0, false);
6018
6019 /* Build the head of the loop. */
6020 do_pending_stack_adjust ();
6021 emit_label (loop_start);
6022
6023 /* Assign value to element index. */
6024 position =
6025 fold_convert (ssizetype,
6026 fold_build2 (MINUS_EXPR,
6027 TREE_TYPE (index),
6028 index,
6029 TYPE_MIN_VALUE (domain)));
6030
6031 position =
6032 size_binop (MULT_EXPR, position,
6033 fold_convert (ssizetype,
6034 TYPE_SIZE_UNIT (elttype)));
6035
6036 pos_rtx = expand_normal (position);
6037 xtarget = offset_address (target, pos_rtx,
6038 highest_pow2_factor (position));
6039 xtarget = adjust_address (xtarget, mode, 0);
6040 if (TREE_CODE (value) == CONSTRUCTOR)
6041 store_constructor (value, xtarget, cleared,
6042 bitsize / BITS_PER_UNIT);
6043 else
6044 store_expr (value, xtarget, 0, false);
6045
6046 /* Generate a conditional jump to exit the loop. */
6047 exit_cond = build2 (LT_EXPR, integer_type_node,
6048 index, hi_index);
6049 jumpif (exit_cond, loop_end, -1);
6050
6051 /* Update the loop counter, and jump to the head of
6052 the loop. */
6053 expand_assignment (index,
6054 build2 (PLUS_EXPR, TREE_TYPE (index),
6055 index, integer_one_node),
6056 false);
6057
6058 emit_jump (loop_start);
6059
6060 /* Build the end of the loop. */
6061 emit_label (loop_end);
6062 }
6063 }
6064 else if ((index != 0 && ! host_integerp (index, 0))
6065 || ! host_integerp (TYPE_SIZE (elttype), 1))
6066 {
6067 tree position;
6068
6069 if (index == 0)
6070 index = ssize_int (1);
6071
6072 if (minelt)
6073 index = fold_convert (ssizetype,
6074 fold_build2 (MINUS_EXPR,
6075 TREE_TYPE (index),
6076 index,
6077 TYPE_MIN_VALUE (domain)));
6078
6079 position =
6080 size_binop (MULT_EXPR, index,
6081 fold_convert (ssizetype,
6082 TYPE_SIZE_UNIT (elttype)));
6083 xtarget = offset_address (target,
6084 expand_normal (position),
6085 highest_pow2_factor (position));
6086 xtarget = adjust_address (xtarget, mode, 0);
6087 store_expr (value, xtarget, 0, false);
6088 }
6089 else
6090 {
6091 if (index != 0)
6092 bitpos = ((tree_low_cst (index, 0) - minelt)
6093 * tree_low_cst (TYPE_SIZE (elttype), 1));
6094 else
6095 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
6096
6097 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6098 && TREE_CODE (type) == ARRAY_TYPE
6099 && TYPE_NONALIASED_COMPONENT (type))
6100 {
6101 target = copy_rtx (target);
6102 MEM_KEEP_ALIAS_SET_P (target) = 1;
6103 }
6104 store_constructor_field (target, bitsize, bitpos, mode, value,
6105 type, cleared, get_alias_set (elttype));
6106 }
6107 }
6108 break;
6109 }
6110
6111 case VECTOR_TYPE:
6112 {
6113 unsigned HOST_WIDE_INT idx;
6114 constructor_elt *ce;
6115 int i;
6116 int need_to_clear;
6117 int icode = 0;
6118 tree elttype = TREE_TYPE (type);
6119 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
6120 enum machine_mode eltmode = TYPE_MODE (elttype);
6121 HOST_WIDE_INT bitsize;
6122 HOST_WIDE_INT bitpos;
6123 rtvec vector = NULL;
6124 unsigned n_elts;
6125 alias_set_type alias;
6126
6127 gcc_assert (eltmode != BLKmode);
6128
6129 n_elts = TYPE_VECTOR_SUBPARTS (type);
6130 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6131 {
6132 enum machine_mode mode = GET_MODE (target);
6133
6134 icode = (int) optab_handler (vec_init_optab, mode);
6135 if (icode != CODE_FOR_nothing)
6136 {
6137 unsigned int i;
6138
6139 vector = rtvec_alloc (n_elts);
6140 for (i = 0; i < n_elts; i++)
6141 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6142 }
6143 }
6144
6145 /* If the constructor has fewer elements than the vector,
6146 clear the whole array first. Similarly if this is static
6147 constructor of a non-BLKmode object. */
6148 if (cleared)
6149 need_to_clear = 0;
6150 else if (REG_P (target) && TREE_STATIC (exp))
6151 need_to_clear = 1;
6152 else
6153 {
6154 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6155 tree value;
6156
6157 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6158 {
6159 int n_elts_here = tree_low_cst
6160 (int_const_binop (TRUNC_DIV_EXPR,
6161 TYPE_SIZE (TREE_TYPE (value)),
6162 TYPE_SIZE (elttype)), 1);
6163
6164 count += n_elts_here;
6165 if (mostly_zeros_p (value))
6166 zero_count += n_elts_here;
6167 }
6168
6169 /* Clear the entire vector first if there are any missing elements,
6170 or if the incidence of zero elements is >= 75%. */
6171 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6172 }
6173
6174 if (need_to_clear && size > 0 && !vector)
6175 {
6176 if (REG_P (target))
6177 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6178 else
6179 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6180 cleared = 1;
6181 }
6182
6183 /* Inform later passes that the old value is dead. */
6184 if (!cleared && !vector && REG_P (target))
6185 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6186
6187 if (MEM_P (target))
6188 alias = MEM_ALIAS_SET (target);
6189 else
6190 alias = get_alias_set (elttype);
6191
6192 /* Store each element of the constructor into the corresponding
6193 element of TARGET, determined by counting the elements. */
6194 for (idx = 0, i = 0;
6195 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6196 idx++, i += bitsize / elt_size)
6197 {
6198 HOST_WIDE_INT eltpos;
6199 tree value = ce->value;
6200
6201 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6202 if (cleared && initializer_zerop (value))
6203 continue;
6204
6205 if (ce->index)
6206 eltpos = tree_low_cst (ce->index, 1);
6207 else
6208 eltpos = i;
6209
6210 if (vector)
6211 {
6212 /* Vector CONSTRUCTORs should only be built from smaller
6213 vectors in the case of BLKmode vectors. */
6214 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6215 RTVEC_ELT (vector, eltpos)
6216 = expand_normal (value);
6217 }
6218 else
6219 {
6220 enum machine_mode value_mode =
6221 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6222 ? TYPE_MODE (TREE_TYPE (value))
6223 : eltmode;
6224 bitpos = eltpos * elt_size;
6225 store_constructor_field (target, bitsize, bitpos,
6226 value_mode, value, type,
6227 cleared, alias);
6228 }
6229 }
6230
6231 if (vector)
6232 emit_insn (GEN_FCN (icode)
6233 (target,
6234 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6235 break;
6236 }
6237
6238 default:
6239 gcc_unreachable ();
6240 }
6241 }
6242
6243 /* Store the value of EXP (an expression tree)
6244 into a subfield of TARGET which has mode MODE and occupies
6245 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6246 If MODE is VOIDmode, it means that we are storing into a bit-field.
6247
6248 BITREGION_START is bitpos of the first bitfield in this region.
6249 BITREGION_END is the bitpos of the ending bitfield in this region.
6250 These two fields are 0, if the C++ memory model does not apply,
6251 or we are not interested in keeping track of bitfield regions.
6252
6253 Always return const0_rtx unless we have something particular to
6254 return.
6255
6256 TYPE is the type of the underlying object,
6257
6258 ALIAS_SET is the alias set for the destination. This value will
6259 (in general) be different from that for TARGET, since TARGET is a
6260 reference to the containing structure.
6261
6262 If NONTEMPORAL is true, try generating a nontemporal store. */
6263
6264 static rtx
6265 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6266 unsigned HOST_WIDE_INT bitregion_start,
6267 unsigned HOST_WIDE_INT bitregion_end,
6268 enum machine_mode mode, tree exp, tree type,
6269 alias_set_type alias_set, bool nontemporal)
6270 {
6271 if (TREE_CODE (exp) == ERROR_MARK)
6272 return const0_rtx;
6273
6274 /* If we have nothing to store, do nothing unless the expression has
6275 side-effects. */
6276 if (bitsize == 0)
6277 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6278
6279 /* If we are storing into an unaligned field of an aligned union that is
6280 in a register, we may have the mode of TARGET being an integer mode but
6281 MODE == BLKmode. In that case, get an aligned object whose size and
6282 alignment are the same as TARGET and store TARGET into it (we can avoid
6283 the store if the field being stored is the entire width of TARGET). Then
6284 call ourselves recursively to store the field into a BLKmode version of
6285 that object. Finally, load from the object into TARGET. This is not
6286 very efficient in general, but should only be slightly more expensive
6287 than the otherwise-required unaligned accesses. Perhaps this can be
6288 cleaned up later. It's tempting to make OBJECT readonly, but it's set
6289 twice, once with emit_move_insn and once via store_field. */
6290
6291 if (mode == BLKmode
6292 && (REG_P (target) || GET_CODE (target) == SUBREG))
6293 {
6294 rtx object = assign_temp (type, 0, 1, 1);
6295 rtx blk_object = adjust_address (object, BLKmode, 0);
6296
6297 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
6298 emit_move_insn (object, target);
6299
6300 store_field (blk_object, bitsize, bitpos,
6301 bitregion_start, bitregion_end,
6302 mode, exp, type, alias_set, nontemporal);
6303
6304 emit_move_insn (target, object);
6305
6306 /* We want to return the BLKmode version of the data. */
6307 return blk_object;
6308 }
6309
6310 if (GET_CODE (target) == CONCAT)
6311 {
6312 /* We're storing into a struct containing a single __complex. */
6313
6314 gcc_assert (!bitpos);
6315 return store_expr (exp, target, 0, nontemporal);
6316 }
6317
6318 /* If the structure is in a register or if the component
6319 is a bit field, we cannot use addressing to access it.
6320 Use bit-field techniques or SUBREG to store in it. */
6321
6322 if (mode == VOIDmode
6323 || (mode != BLKmode && ! direct_store[(int) mode]
6324 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6325 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6326 || REG_P (target)
6327 || GET_CODE (target) == SUBREG
6328 /* If the field isn't aligned enough to store as an ordinary memref,
6329 store it as a bit field. */
6330 || (mode != BLKmode
6331 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6332 || bitpos % GET_MODE_ALIGNMENT (mode))
6333 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6334 || (bitpos % BITS_PER_UNIT != 0)))
6335 || (bitsize >= 0 && mode != BLKmode
6336 && GET_MODE_BITSIZE (mode) > bitsize)
6337 /* If the RHS and field are a constant size and the size of the
6338 RHS isn't the same size as the bitfield, we must use bitfield
6339 operations. */
6340 || (bitsize >= 0
6341 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6342 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6343 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6344 decl we must use bitfield operations. */
6345 || (bitsize >= 0
6346 && TREE_CODE (exp) == MEM_REF
6347 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6348 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6349 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6350 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6351 {
6352 rtx temp;
6353 gimple nop_def;
6354
6355 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6356 implies a mask operation. If the precision is the same size as
6357 the field we're storing into, that mask is redundant. This is
6358 particularly common with bit field assignments generated by the
6359 C front end. */
6360 nop_def = get_def_for_expr (exp, NOP_EXPR);
6361 if (nop_def)
6362 {
6363 tree type = TREE_TYPE (exp);
6364 if (INTEGRAL_TYPE_P (type)
6365 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6366 && bitsize == TYPE_PRECISION (type))
6367 {
6368 tree op = gimple_assign_rhs1 (nop_def);
6369 type = TREE_TYPE (op);
6370 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6371 exp = op;
6372 }
6373 }
6374
6375 temp = expand_normal (exp);
6376
6377 /* If BITSIZE is narrower than the size of the type of EXP
6378 we will be narrowing TEMP. Normally, what's wanted are the
6379 low-order bits. However, if EXP's type is a record and this is
6380 big-endian machine, we want the upper BITSIZE bits. */
6381 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6382 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6383 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6384 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6385 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6386 NULL_RTX, 1);
6387
6388 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
6389 MODE. */
6390 if (mode != VOIDmode && mode != BLKmode
6391 && mode != TYPE_MODE (TREE_TYPE (exp)))
6392 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6393
6394 /* If the modes of TEMP and TARGET are both BLKmode, both
6395 must be in memory and BITPOS must be aligned on a byte
6396 boundary. If so, we simply do a block copy. Likewise
6397 for a BLKmode-like TARGET. */
6398 if (GET_MODE (temp) == BLKmode
6399 && (GET_MODE (target) == BLKmode
6400 || (MEM_P (target)
6401 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6402 && (bitpos % BITS_PER_UNIT) == 0
6403 && (bitsize % BITS_PER_UNIT) == 0)))
6404 {
6405 gcc_assert (MEM_P (target) && MEM_P (temp)
6406 && (bitpos % BITS_PER_UNIT) == 0);
6407
6408 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6409 emit_block_move (target, temp,
6410 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6411 / BITS_PER_UNIT),
6412 BLOCK_OP_NORMAL);
6413
6414 return const0_rtx;
6415 }
6416
6417 /* Store the value in the bitfield. */
6418 store_bit_field (target, bitsize, bitpos,
6419 bitregion_start, bitregion_end,
6420 mode, temp);
6421
6422 return const0_rtx;
6423 }
6424 else
6425 {
6426 /* Now build a reference to just the desired component. */
6427 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6428
6429 if (to_rtx == target)
6430 to_rtx = copy_rtx (to_rtx);
6431
6432 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6433 set_mem_alias_set (to_rtx, alias_set);
6434
6435 return store_expr (exp, to_rtx, 0, nontemporal);
6436 }
6437 }
6438 \f
6439 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6440 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6441 codes and find the ultimate containing object, which we return.
6442
6443 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6444 bit position, and *PUNSIGNEDP to the signedness of the field.
6445 If the position of the field is variable, we store a tree
6446 giving the variable offset (in units) in *POFFSET.
6447 This offset is in addition to the bit position.
6448 If the position is not variable, we store 0 in *POFFSET.
6449
6450 If any of the extraction expressions is volatile,
6451 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6452
6453 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6454 Otherwise, it is a mode that can be used to access the field.
6455
6456 If the field describes a variable-sized object, *PMODE is set to
6457 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6458 this case, but the address of the object can be found.
6459
6460 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6461 look through nodes that serve as markers of a greater alignment than
6462 the one that can be deduced from the expression. These nodes make it
6463 possible for front-ends to prevent temporaries from being created by
6464 the middle-end on alignment considerations. For that purpose, the
6465 normal operating mode at high-level is to always pass FALSE so that
6466 the ultimate containing object is really returned; moreover, the
6467 associated predicate handled_component_p will always return TRUE
6468 on these nodes, thus indicating that they are essentially handled
6469 by get_inner_reference. TRUE should only be passed when the caller
6470 is scanning the expression in order to build another representation
6471 and specifically knows how to handle these nodes; as such, this is
6472 the normal operating mode in the RTL expanders. */
6473
6474 tree
6475 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6476 HOST_WIDE_INT *pbitpos, tree *poffset,
6477 enum machine_mode *pmode, int *punsignedp,
6478 int *pvolatilep, bool keep_aligning)
6479 {
6480 tree size_tree = 0;
6481 enum machine_mode mode = VOIDmode;
6482 bool blkmode_bitfield = false;
6483 tree offset = size_zero_node;
6484 double_int bit_offset = double_int_zero;
6485
6486 /* First get the mode, signedness, and size. We do this from just the
6487 outermost expression. */
6488 *pbitsize = -1;
6489 if (TREE_CODE (exp) == COMPONENT_REF)
6490 {
6491 tree field = TREE_OPERAND (exp, 1);
6492 size_tree = DECL_SIZE (field);
6493 if (!DECL_BIT_FIELD (field))
6494 mode = DECL_MODE (field);
6495 else if (DECL_MODE (field) == BLKmode)
6496 blkmode_bitfield = true;
6497 else if (TREE_THIS_VOLATILE (exp)
6498 && flag_strict_volatile_bitfields > 0)
6499 /* Volatile bitfields should be accessed in the mode of the
6500 field's type, not the mode computed based on the bit
6501 size. */
6502 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6503
6504 *punsignedp = DECL_UNSIGNED (field);
6505 }
6506 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6507 {
6508 size_tree = TREE_OPERAND (exp, 1);
6509 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6510 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6511
6512 /* For vector types, with the correct size of access, use the mode of
6513 inner type. */
6514 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6515 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6516 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6517 mode = TYPE_MODE (TREE_TYPE (exp));
6518 }
6519 else
6520 {
6521 mode = TYPE_MODE (TREE_TYPE (exp));
6522 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6523
6524 if (mode == BLKmode)
6525 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6526 else
6527 *pbitsize = GET_MODE_BITSIZE (mode);
6528 }
6529
6530 if (size_tree != 0)
6531 {
6532 if (! host_integerp (size_tree, 1))
6533 mode = BLKmode, *pbitsize = -1;
6534 else
6535 *pbitsize = tree_low_cst (size_tree, 1);
6536 }
6537
6538 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6539 and find the ultimate containing object. */
6540 while (1)
6541 {
6542 switch (TREE_CODE (exp))
6543 {
6544 case BIT_FIELD_REF:
6545 bit_offset
6546 = double_int_add (bit_offset,
6547 tree_to_double_int (TREE_OPERAND (exp, 2)));
6548 break;
6549
6550 case COMPONENT_REF:
6551 {
6552 tree field = TREE_OPERAND (exp, 1);
6553 tree this_offset = component_ref_field_offset (exp);
6554
6555 /* If this field hasn't been filled in yet, don't go past it.
6556 This should only happen when folding expressions made during
6557 type construction. */
6558 if (this_offset == 0)
6559 break;
6560
6561 offset = size_binop (PLUS_EXPR, offset, this_offset);
6562 bit_offset = double_int_add (bit_offset,
6563 tree_to_double_int
6564 (DECL_FIELD_BIT_OFFSET (field)));
6565
6566 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6567 }
6568 break;
6569
6570 case ARRAY_REF:
6571 case ARRAY_RANGE_REF:
6572 {
6573 tree index = TREE_OPERAND (exp, 1);
6574 tree low_bound = array_ref_low_bound (exp);
6575 tree unit_size = array_ref_element_size (exp);
6576
6577 /* We assume all arrays have sizes that are a multiple of a byte.
6578 First subtract the lower bound, if any, in the type of the
6579 index, then convert to sizetype and multiply by the size of
6580 the array element. */
6581 if (! integer_zerop (low_bound))
6582 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6583 index, low_bound);
6584
6585 offset = size_binop (PLUS_EXPR, offset,
6586 size_binop (MULT_EXPR,
6587 fold_convert (sizetype, index),
6588 unit_size));
6589 }
6590 break;
6591
6592 case REALPART_EXPR:
6593 break;
6594
6595 case IMAGPART_EXPR:
6596 bit_offset = double_int_add (bit_offset,
6597 uhwi_to_double_int (*pbitsize));
6598 break;
6599
6600 case VIEW_CONVERT_EXPR:
6601 if (keep_aligning && STRICT_ALIGNMENT
6602 && (TYPE_ALIGN (TREE_TYPE (exp))
6603 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6604 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6605 < BIGGEST_ALIGNMENT)
6606 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6607 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6608 goto done;
6609 break;
6610
6611 case MEM_REF:
6612 /* Hand back the decl for MEM[&decl, off]. */
6613 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6614 {
6615 tree off = TREE_OPERAND (exp, 1);
6616 if (!integer_zerop (off))
6617 {
6618 double_int boff, coff = mem_ref_offset (exp);
6619 boff = double_int_lshift (coff,
6620 BITS_PER_UNIT == 8
6621 ? 3 : exact_log2 (BITS_PER_UNIT),
6622 HOST_BITS_PER_DOUBLE_INT, true);
6623 bit_offset = double_int_add (bit_offset, boff);
6624 }
6625 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6626 }
6627 goto done;
6628
6629 default:
6630 goto done;
6631 }
6632
6633 /* If any reference in the chain is volatile, the effect is volatile. */
6634 if (TREE_THIS_VOLATILE (exp))
6635 *pvolatilep = 1;
6636
6637 exp = TREE_OPERAND (exp, 0);
6638 }
6639 done:
6640
6641 /* If OFFSET is constant, see if we can return the whole thing as a
6642 constant bit position. Make sure to handle overflow during
6643 this conversion. */
6644 if (TREE_CODE (offset) == INTEGER_CST)
6645 {
6646 double_int tem = tree_to_double_int (offset);
6647 tem = double_int_sext (tem, TYPE_PRECISION (sizetype));
6648 tem = double_int_lshift (tem,
6649 BITS_PER_UNIT == 8
6650 ? 3 : exact_log2 (BITS_PER_UNIT),
6651 HOST_BITS_PER_DOUBLE_INT, true);
6652 tem = double_int_add (tem, bit_offset);
6653 if (double_int_fits_in_shwi_p (tem))
6654 {
6655 *pbitpos = double_int_to_shwi (tem);
6656 *poffset = offset = NULL_TREE;
6657 }
6658 }
6659
6660 /* Otherwise, split it up. */
6661 if (offset)
6662 {
6663 *pbitpos = double_int_to_shwi (bit_offset);
6664 *poffset = offset;
6665 }
6666
6667 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6668 if (mode == VOIDmode
6669 && blkmode_bitfield
6670 && (*pbitpos % BITS_PER_UNIT) == 0
6671 && (*pbitsize % BITS_PER_UNIT) == 0)
6672 *pmode = BLKmode;
6673 else
6674 *pmode = mode;
6675
6676 return exp;
6677 }
6678
6679 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6680 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6681 EXP is marked as PACKED. */
6682
6683 bool
6684 contains_packed_reference (const_tree exp)
6685 {
6686 bool packed_p = false;
6687
6688 while (1)
6689 {
6690 switch (TREE_CODE (exp))
6691 {
6692 case COMPONENT_REF:
6693 {
6694 tree field = TREE_OPERAND (exp, 1);
6695 packed_p = DECL_PACKED (field)
6696 || TYPE_PACKED (TREE_TYPE (field))
6697 || TYPE_PACKED (TREE_TYPE (exp));
6698 if (packed_p)
6699 goto done;
6700 }
6701 break;
6702
6703 case BIT_FIELD_REF:
6704 case ARRAY_REF:
6705 case ARRAY_RANGE_REF:
6706 case REALPART_EXPR:
6707 case IMAGPART_EXPR:
6708 case VIEW_CONVERT_EXPR:
6709 break;
6710
6711 default:
6712 goto done;
6713 }
6714 exp = TREE_OPERAND (exp, 0);
6715 }
6716 done:
6717 return packed_p;
6718 }
6719
6720 /* Return a tree of sizetype representing the size, in bytes, of the element
6721 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6722
6723 tree
6724 array_ref_element_size (tree exp)
6725 {
6726 tree aligned_size = TREE_OPERAND (exp, 3);
6727 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6728 location_t loc = EXPR_LOCATION (exp);
6729
6730 /* If a size was specified in the ARRAY_REF, it's the size measured
6731 in alignment units of the element type. So multiply by that value. */
6732 if (aligned_size)
6733 {
6734 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6735 sizetype from another type of the same width and signedness. */
6736 if (TREE_TYPE (aligned_size) != sizetype)
6737 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6738 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6739 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6740 }
6741
6742 /* Otherwise, take the size from that of the element type. Substitute
6743 any PLACEHOLDER_EXPR that we have. */
6744 else
6745 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6746 }
6747
6748 /* Return a tree representing the lower bound of the array mentioned in
6749 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6750
6751 tree
6752 array_ref_low_bound (tree exp)
6753 {
6754 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6755
6756 /* If a lower bound is specified in EXP, use it. */
6757 if (TREE_OPERAND (exp, 2))
6758 return TREE_OPERAND (exp, 2);
6759
6760 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6761 substituting for a PLACEHOLDER_EXPR as needed. */
6762 if (domain_type && TYPE_MIN_VALUE (domain_type))
6763 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6764
6765 /* Otherwise, return a zero of the appropriate type. */
6766 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6767 }
6768
6769 /* Return a tree representing the upper bound of the array mentioned in
6770 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6771
6772 tree
6773 array_ref_up_bound (tree exp)
6774 {
6775 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6776
6777 /* If there is a domain type and it has an upper bound, use it, substituting
6778 for a PLACEHOLDER_EXPR as needed. */
6779 if (domain_type && TYPE_MAX_VALUE (domain_type))
6780 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6781
6782 /* Otherwise fail. */
6783 return NULL_TREE;
6784 }
6785
6786 /* Return a tree representing the offset, in bytes, of the field referenced
6787 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6788
6789 tree
6790 component_ref_field_offset (tree exp)
6791 {
6792 tree aligned_offset = TREE_OPERAND (exp, 2);
6793 tree field = TREE_OPERAND (exp, 1);
6794 location_t loc = EXPR_LOCATION (exp);
6795
6796 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6797 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6798 value. */
6799 if (aligned_offset)
6800 {
6801 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6802 sizetype from another type of the same width and signedness. */
6803 if (TREE_TYPE (aligned_offset) != sizetype)
6804 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6805 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6806 size_int (DECL_OFFSET_ALIGN (field)
6807 / BITS_PER_UNIT));
6808 }
6809
6810 /* Otherwise, take the offset from that of the field. Substitute
6811 any PLACEHOLDER_EXPR that we have. */
6812 else
6813 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6814 }
6815
6816 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6817
6818 static unsigned HOST_WIDE_INT
6819 target_align (const_tree target)
6820 {
6821 /* We might have a chain of nested references with intermediate misaligning
6822 bitfields components, so need to recurse to find out. */
6823
6824 unsigned HOST_WIDE_INT this_align, outer_align;
6825
6826 switch (TREE_CODE (target))
6827 {
6828 case BIT_FIELD_REF:
6829 return 1;
6830
6831 case COMPONENT_REF:
6832 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6833 outer_align = target_align (TREE_OPERAND (target, 0));
6834 return MIN (this_align, outer_align);
6835
6836 case ARRAY_REF:
6837 case ARRAY_RANGE_REF:
6838 this_align = TYPE_ALIGN (TREE_TYPE (target));
6839 outer_align = target_align (TREE_OPERAND (target, 0));
6840 return MIN (this_align, outer_align);
6841
6842 CASE_CONVERT:
6843 case NON_LVALUE_EXPR:
6844 case VIEW_CONVERT_EXPR:
6845 this_align = TYPE_ALIGN (TREE_TYPE (target));
6846 outer_align = target_align (TREE_OPERAND (target, 0));
6847 return MAX (this_align, outer_align);
6848
6849 default:
6850 return TYPE_ALIGN (TREE_TYPE (target));
6851 }
6852 }
6853
6854 \f
6855 /* Given an rtx VALUE that may contain additions and multiplications, return
6856 an equivalent value that just refers to a register, memory, or constant.
6857 This is done by generating instructions to perform the arithmetic and
6858 returning a pseudo-register containing the value.
6859
6860 The returned value may be a REG, SUBREG, MEM or constant. */
6861
6862 rtx
6863 force_operand (rtx value, rtx target)
6864 {
6865 rtx op1, op2;
6866 /* Use subtarget as the target for operand 0 of a binary operation. */
6867 rtx subtarget = get_subtarget (target);
6868 enum rtx_code code = GET_CODE (value);
6869
6870 /* Check for subreg applied to an expression produced by loop optimizer. */
6871 if (code == SUBREG
6872 && !REG_P (SUBREG_REG (value))
6873 && !MEM_P (SUBREG_REG (value)))
6874 {
6875 value
6876 = simplify_gen_subreg (GET_MODE (value),
6877 force_reg (GET_MODE (SUBREG_REG (value)),
6878 force_operand (SUBREG_REG (value),
6879 NULL_RTX)),
6880 GET_MODE (SUBREG_REG (value)),
6881 SUBREG_BYTE (value));
6882 code = GET_CODE (value);
6883 }
6884
6885 /* Check for a PIC address load. */
6886 if ((code == PLUS || code == MINUS)
6887 && XEXP (value, 0) == pic_offset_table_rtx
6888 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6889 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6890 || GET_CODE (XEXP (value, 1)) == CONST))
6891 {
6892 if (!subtarget)
6893 subtarget = gen_reg_rtx (GET_MODE (value));
6894 emit_move_insn (subtarget, value);
6895 return subtarget;
6896 }
6897
6898 if (ARITHMETIC_P (value))
6899 {
6900 op2 = XEXP (value, 1);
6901 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6902 subtarget = 0;
6903 if (code == MINUS && CONST_INT_P (op2))
6904 {
6905 code = PLUS;
6906 op2 = negate_rtx (GET_MODE (value), op2);
6907 }
6908
6909 /* Check for an addition with OP2 a constant integer and our first
6910 operand a PLUS of a virtual register and something else. In that
6911 case, we want to emit the sum of the virtual register and the
6912 constant first and then add the other value. This allows virtual
6913 register instantiation to simply modify the constant rather than
6914 creating another one around this addition. */
6915 if (code == PLUS && CONST_INT_P (op2)
6916 && GET_CODE (XEXP (value, 0)) == PLUS
6917 && REG_P (XEXP (XEXP (value, 0), 0))
6918 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6919 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6920 {
6921 rtx temp = expand_simple_binop (GET_MODE (value), code,
6922 XEXP (XEXP (value, 0), 0), op2,
6923 subtarget, 0, OPTAB_LIB_WIDEN);
6924 return expand_simple_binop (GET_MODE (value), code, temp,
6925 force_operand (XEXP (XEXP (value,
6926 0), 1), 0),
6927 target, 0, OPTAB_LIB_WIDEN);
6928 }
6929
6930 op1 = force_operand (XEXP (value, 0), subtarget);
6931 op2 = force_operand (op2, NULL_RTX);
6932 switch (code)
6933 {
6934 case MULT:
6935 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6936 case DIV:
6937 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6938 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6939 target, 1, OPTAB_LIB_WIDEN);
6940 else
6941 return expand_divmod (0,
6942 FLOAT_MODE_P (GET_MODE (value))
6943 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6944 GET_MODE (value), op1, op2, target, 0);
6945 case MOD:
6946 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6947 target, 0);
6948 case UDIV:
6949 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6950 target, 1);
6951 case UMOD:
6952 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6953 target, 1);
6954 case ASHIFTRT:
6955 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6956 target, 0, OPTAB_LIB_WIDEN);
6957 default:
6958 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6959 target, 1, OPTAB_LIB_WIDEN);
6960 }
6961 }
6962 if (UNARY_P (value))
6963 {
6964 if (!target)
6965 target = gen_reg_rtx (GET_MODE (value));
6966 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6967 switch (code)
6968 {
6969 case ZERO_EXTEND:
6970 case SIGN_EXTEND:
6971 case TRUNCATE:
6972 case FLOAT_EXTEND:
6973 case FLOAT_TRUNCATE:
6974 convert_move (target, op1, code == ZERO_EXTEND);
6975 return target;
6976
6977 case FIX:
6978 case UNSIGNED_FIX:
6979 expand_fix (target, op1, code == UNSIGNED_FIX);
6980 return target;
6981
6982 case FLOAT:
6983 case UNSIGNED_FLOAT:
6984 expand_float (target, op1, code == UNSIGNED_FLOAT);
6985 return target;
6986
6987 default:
6988 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
6989 }
6990 }
6991
6992 #ifdef INSN_SCHEDULING
6993 /* On machines that have insn scheduling, we want all memory reference to be
6994 explicit, so we need to deal with such paradoxical SUBREGs. */
6995 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
6996 value
6997 = simplify_gen_subreg (GET_MODE (value),
6998 force_reg (GET_MODE (SUBREG_REG (value)),
6999 force_operand (SUBREG_REG (value),
7000 NULL_RTX)),
7001 GET_MODE (SUBREG_REG (value)),
7002 SUBREG_BYTE (value));
7003 #endif
7004
7005 return value;
7006 }
7007 \f
7008 /* Subroutine of expand_expr: return nonzero iff there is no way that
7009 EXP can reference X, which is being modified. TOP_P is nonzero if this
7010 call is going to be used to determine whether we need a temporary
7011 for EXP, as opposed to a recursive call to this function.
7012
7013 It is always safe for this routine to return zero since it merely
7014 searches for optimization opportunities. */
7015
7016 int
7017 safe_from_p (const_rtx x, tree exp, int top_p)
7018 {
7019 rtx exp_rtl = 0;
7020 int i, nops;
7021
7022 if (x == 0
7023 /* If EXP has varying size, we MUST use a target since we currently
7024 have no way of allocating temporaries of variable size
7025 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7026 So we assume here that something at a higher level has prevented a
7027 clash. This is somewhat bogus, but the best we can do. Only
7028 do this when X is BLKmode and when we are at the top level. */
7029 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7030 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7031 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7032 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7033 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7034 != INTEGER_CST)
7035 && GET_MODE (x) == BLKmode)
7036 /* If X is in the outgoing argument area, it is always safe. */
7037 || (MEM_P (x)
7038 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7039 || (GET_CODE (XEXP (x, 0)) == PLUS
7040 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7041 return 1;
7042
7043 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7044 find the underlying pseudo. */
7045 if (GET_CODE (x) == SUBREG)
7046 {
7047 x = SUBREG_REG (x);
7048 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7049 return 0;
7050 }
7051
7052 /* Now look at our tree code and possibly recurse. */
7053 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7054 {
7055 case tcc_declaration:
7056 exp_rtl = DECL_RTL_IF_SET (exp);
7057 break;
7058
7059 case tcc_constant:
7060 return 1;
7061
7062 case tcc_exceptional:
7063 if (TREE_CODE (exp) == TREE_LIST)
7064 {
7065 while (1)
7066 {
7067 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7068 return 0;
7069 exp = TREE_CHAIN (exp);
7070 if (!exp)
7071 return 1;
7072 if (TREE_CODE (exp) != TREE_LIST)
7073 return safe_from_p (x, exp, 0);
7074 }
7075 }
7076 else if (TREE_CODE (exp) == CONSTRUCTOR)
7077 {
7078 constructor_elt *ce;
7079 unsigned HOST_WIDE_INT idx;
7080
7081 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
7082 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7083 || !safe_from_p (x, ce->value, 0))
7084 return 0;
7085 return 1;
7086 }
7087 else if (TREE_CODE (exp) == ERROR_MARK)
7088 return 1; /* An already-visited SAVE_EXPR? */
7089 else
7090 return 0;
7091
7092 case tcc_statement:
7093 /* The only case we look at here is the DECL_INITIAL inside a
7094 DECL_EXPR. */
7095 return (TREE_CODE (exp) != DECL_EXPR
7096 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7097 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7098 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7099
7100 case tcc_binary:
7101 case tcc_comparison:
7102 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7103 return 0;
7104 /* Fall through. */
7105
7106 case tcc_unary:
7107 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7108
7109 case tcc_expression:
7110 case tcc_reference:
7111 case tcc_vl_exp:
7112 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7113 the expression. If it is set, we conflict iff we are that rtx or
7114 both are in memory. Otherwise, we check all operands of the
7115 expression recursively. */
7116
7117 switch (TREE_CODE (exp))
7118 {
7119 case ADDR_EXPR:
7120 /* If the operand is static or we are static, we can't conflict.
7121 Likewise if we don't conflict with the operand at all. */
7122 if (staticp (TREE_OPERAND (exp, 0))
7123 || TREE_STATIC (exp)
7124 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7125 return 1;
7126
7127 /* Otherwise, the only way this can conflict is if we are taking
7128 the address of a DECL a that address if part of X, which is
7129 very rare. */
7130 exp = TREE_OPERAND (exp, 0);
7131 if (DECL_P (exp))
7132 {
7133 if (!DECL_RTL_SET_P (exp)
7134 || !MEM_P (DECL_RTL (exp)))
7135 return 0;
7136 else
7137 exp_rtl = XEXP (DECL_RTL (exp), 0);
7138 }
7139 break;
7140
7141 case MEM_REF:
7142 if (MEM_P (x)
7143 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7144 get_alias_set (exp)))
7145 return 0;
7146 break;
7147
7148 case CALL_EXPR:
7149 /* Assume that the call will clobber all hard registers and
7150 all of memory. */
7151 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7152 || MEM_P (x))
7153 return 0;
7154 break;
7155
7156 case WITH_CLEANUP_EXPR:
7157 case CLEANUP_POINT_EXPR:
7158 /* Lowered by gimplify.c. */
7159 gcc_unreachable ();
7160
7161 case SAVE_EXPR:
7162 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7163
7164 default:
7165 break;
7166 }
7167
7168 /* If we have an rtx, we do not need to scan our operands. */
7169 if (exp_rtl)
7170 break;
7171
7172 nops = TREE_OPERAND_LENGTH (exp);
7173 for (i = 0; i < nops; i++)
7174 if (TREE_OPERAND (exp, i) != 0
7175 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7176 return 0;
7177
7178 break;
7179
7180 case tcc_type:
7181 /* Should never get a type here. */
7182 gcc_unreachable ();
7183 }
7184
7185 /* If we have an rtl, find any enclosed object. Then see if we conflict
7186 with it. */
7187 if (exp_rtl)
7188 {
7189 if (GET_CODE (exp_rtl) == SUBREG)
7190 {
7191 exp_rtl = SUBREG_REG (exp_rtl);
7192 if (REG_P (exp_rtl)
7193 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7194 return 0;
7195 }
7196
7197 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7198 are memory and they conflict. */
7199 return ! (rtx_equal_p (x, exp_rtl)
7200 || (MEM_P (x) && MEM_P (exp_rtl)
7201 && true_dependence (exp_rtl, VOIDmode, x)));
7202 }
7203
7204 /* If we reach here, it is safe. */
7205 return 1;
7206 }
7207
7208 \f
7209 /* Return the highest power of two that EXP is known to be a multiple of.
7210 This is used in updating alignment of MEMs in array references. */
7211
7212 unsigned HOST_WIDE_INT
7213 highest_pow2_factor (const_tree exp)
7214 {
7215 unsigned HOST_WIDE_INT c0, c1;
7216
7217 switch (TREE_CODE (exp))
7218 {
7219 case INTEGER_CST:
7220 /* We can find the lowest bit that's a one. If the low
7221 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7222 We need to handle this case since we can find it in a COND_EXPR,
7223 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7224 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7225 later ICE. */
7226 if (TREE_OVERFLOW (exp))
7227 return BIGGEST_ALIGNMENT;
7228 else
7229 {
7230 /* Note: tree_low_cst is intentionally not used here,
7231 we don't care about the upper bits. */
7232 c0 = TREE_INT_CST_LOW (exp);
7233 c0 &= -c0;
7234 return c0 ? c0 : BIGGEST_ALIGNMENT;
7235 }
7236 break;
7237
7238 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7239 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7240 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7241 return MIN (c0, c1);
7242
7243 case MULT_EXPR:
7244 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7245 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7246 return c0 * c1;
7247
7248 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7249 case CEIL_DIV_EXPR:
7250 if (integer_pow2p (TREE_OPERAND (exp, 1))
7251 && host_integerp (TREE_OPERAND (exp, 1), 1))
7252 {
7253 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7254 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7255 return MAX (1, c0 / c1);
7256 }
7257 break;
7258
7259 case BIT_AND_EXPR:
7260 /* The highest power of two of a bit-and expression is the maximum of
7261 that of its operands. We typically get here for a complex LHS and
7262 a constant negative power of two on the RHS to force an explicit
7263 alignment, so don't bother looking at the LHS. */
7264 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7265
7266 CASE_CONVERT:
7267 case SAVE_EXPR:
7268 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7269
7270 case COMPOUND_EXPR:
7271 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7272
7273 case COND_EXPR:
7274 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7275 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7276 return MIN (c0, c1);
7277
7278 default:
7279 break;
7280 }
7281
7282 return 1;
7283 }
7284
7285 /* Similar, except that the alignment requirements of TARGET are
7286 taken into account. Assume it is at least as aligned as its
7287 type, unless it is a COMPONENT_REF in which case the layout of
7288 the structure gives the alignment. */
7289
7290 static unsigned HOST_WIDE_INT
7291 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7292 {
7293 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7294 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7295
7296 return MAX (factor, talign);
7297 }
7298 \f
7299 /* Subroutine of expand_expr. Expand the two operands of a binary
7300 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7301 The value may be stored in TARGET if TARGET is nonzero. The
7302 MODIFIER argument is as documented by expand_expr. */
7303
7304 static void
7305 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7306 enum expand_modifier modifier)
7307 {
7308 if (! safe_from_p (target, exp1, 1))
7309 target = 0;
7310 if (operand_equal_p (exp0, exp1, 0))
7311 {
7312 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7313 *op1 = copy_rtx (*op0);
7314 }
7315 else
7316 {
7317 /* If we need to preserve evaluation order, copy exp0 into its own
7318 temporary variable so that it can't be clobbered by exp1. */
7319 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7320 exp0 = save_expr (exp0);
7321 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7322 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7323 }
7324 }
7325
7326 \f
7327 /* Return a MEM that contains constant EXP. DEFER is as for
7328 output_constant_def and MODIFIER is as for expand_expr. */
7329
7330 static rtx
7331 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7332 {
7333 rtx mem;
7334
7335 mem = output_constant_def (exp, defer);
7336 if (modifier != EXPAND_INITIALIZER)
7337 mem = use_anchored_address (mem);
7338 return mem;
7339 }
7340
7341 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7342 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7343
7344 static rtx
7345 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7346 enum expand_modifier modifier, addr_space_t as)
7347 {
7348 rtx result, subtarget;
7349 tree inner, offset;
7350 HOST_WIDE_INT bitsize, bitpos;
7351 int volatilep, unsignedp;
7352 enum machine_mode mode1;
7353
7354 /* If we are taking the address of a constant and are at the top level,
7355 we have to use output_constant_def since we can't call force_const_mem
7356 at top level. */
7357 /* ??? This should be considered a front-end bug. We should not be
7358 generating ADDR_EXPR of something that isn't an LVALUE. The only
7359 exception here is STRING_CST. */
7360 if (CONSTANT_CLASS_P (exp))
7361 return XEXP (expand_expr_constant (exp, 0, modifier), 0);
7362
7363 /* Everything must be something allowed by is_gimple_addressable. */
7364 switch (TREE_CODE (exp))
7365 {
7366 case INDIRECT_REF:
7367 /* This case will happen via recursion for &a->b. */
7368 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7369
7370 case MEM_REF:
7371 {
7372 tree tem = TREE_OPERAND (exp, 0);
7373 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7374 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7375 return expand_expr (tem, target, tmode, modifier);
7376 }
7377
7378 case CONST_DECL:
7379 /* Expand the initializer like constants above. */
7380 return XEXP (expand_expr_constant (DECL_INITIAL (exp), 0, modifier), 0);
7381
7382 case REALPART_EXPR:
7383 /* The real part of the complex number is always first, therefore
7384 the address is the same as the address of the parent object. */
7385 offset = 0;
7386 bitpos = 0;
7387 inner = TREE_OPERAND (exp, 0);
7388 break;
7389
7390 case IMAGPART_EXPR:
7391 /* The imaginary part of the complex number is always second.
7392 The expression is therefore always offset by the size of the
7393 scalar type. */
7394 offset = 0;
7395 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7396 inner = TREE_OPERAND (exp, 0);
7397 break;
7398
7399 default:
7400 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7401 expand_expr, as that can have various side effects; LABEL_DECLs for
7402 example, may not have their DECL_RTL set yet. Expand the rtl of
7403 CONSTRUCTORs too, which should yield a memory reference for the
7404 constructor's contents. Assume language specific tree nodes can
7405 be expanded in some interesting way. */
7406 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7407 if (DECL_P (exp)
7408 || TREE_CODE (exp) == CONSTRUCTOR
7409 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7410 {
7411 result = expand_expr (exp, target, tmode,
7412 modifier == EXPAND_INITIALIZER
7413 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7414
7415 /* If the DECL isn't in memory, then the DECL wasn't properly
7416 marked TREE_ADDRESSABLE, which will be either a front-end
7417 or a tree optimizer bug. */
7418
7419 if (TREE_ADDRESSABLE (exp)
7420 && ! MEM_P (result)
7421 && ! targetm.calls.allocate_stack_slots_for_args())
7422 {
7423 error ("local frame unavailable (naked function?)");
7424 return result;
7425 }
7426 else
7427 gcc_assert (MEM_P (result));
7428 result = XEXP (result, 0);
7429
7430 /* ??? Is this needed anymore? */
7431 if (DECL_P (exp) && !TREE_USED (exp) == 0)
7432 {
7433 assemble_external (exp);
7434 TREE_USED (exp) = 1;
7435 }
7436
7437 if (modifier != EXPAND_INITIALIZER
7438 && modifier != EXPAND_CONST_ADDRESS
7439 && modifier != EXPAND_SUM)
7440 result = force_operand (result, target);
7441 return result;
7442 }
7443
7444 /* Pass FALSE as the last argument to get_inner_reference although
7445 we are expanding to RTL. The rationale is that we know how to
7446 handle "aligning nodes" here: we can just bypass them because
7447 they won't change the final object whose address will be returned
7448 (they actually exist only for that purpose). */
7449 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7450 &mode1, &unsignedp, &volatilep, false);
7451 break;
7452 }
7453
7454 /* We must have made progress. */
7455 gcc_assert (inner != exp);
7456
7457 subtarget = offset || bitpos ? NULL_RTX : target;
7458 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7459 inner alignment, force the inner to be sufficiently aligned. */
7460 if (CONSTANT_CLASS_P (inner)
7461 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7462 {
7463 inner = copy_node (inner);
7464 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7465 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7466 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7467 }
7468 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7469
7470 if (offset)
7471 {
7472 rtx tmp;
7473
7474 if (modifier != EXPAND_NORMAL)
7475 result = force_operand (result, NULL);
7476 tmp = expand_expr (offset, NULL_RTX, tmode,
7477 modifier == EXPAND_INITIALIZER
7478 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7479
7480 result = convert_memory_address_addr_space (tmode, result, as);
7481 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7482
7483 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7484 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7485 else
7486 {
7487 subtarget = bitpos ? NULL_RTX : target;
7488 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7489 1, OPTAB_LIB_WIDEN);
7490 }
7491 }
7492
7493 if (bitpos)
7494 {
7495 /* Someone beforehand should have rejected taking the address
7496 of such an object. */
7497 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7498
7499 result = plus_constant (result, bitpos / BITS_PER_UNIT);
7500 if (modifier < EXPAND_SUM)
7501 result = force_operand (result, target);
7502 }
7503
7504 return result;
7505 }
7506
7507 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7508 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7509
7510 static rtx
7511 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7512 enum expand_modifier modifier)
7513 {
7514 addr_space_t as = ADDR_SPACE_GENERIC;
7515 enum machine_mode address_mode = Pmode;
7516 enum machine_mode pointer_mode = ptr_mode;
7517 enum machine_mode rmode;
7518 rtx result;
7519
7520 /* Target mode of VOIDmode says "whatever's natural". */
7521 if (tmode == VOIDmode)
7522 tmode = TYPE_MODE (TREE_TYPE (exp));
7523
7524 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7525 {
7526 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7527 address_mode = targetm.addr_space.address_mode (as);
7528 pointer_mode = targetm.addr_space.pointer_mode (as);
7529 }
7530
7531 /* We can get called with some Weird Things if the user does silliness
7532 like "(short) &a". In that case, convert_memory_address won't do
7533 the right thing, so ignore the given target mode. */
7534 if (tmode != address_mode && tmode != pointer_mode)
7535 tmode = address_mode;
7536
7537 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7538 tmode, modifier, as);
7539
7540 /* Despite expand_expr claims concerning ignoring TMODE when not
7541 strictly convenient, stuff breaks if we don't honor it. Note
7542 that combined with the above, we only do this for pointer modes. */
7543 rmode = GET_MODE (result);
7544 if (rmode == VOIDmode)
7545 rmode = tmode;
7546 if (rmode != tmode)
7547 result = convert_memory_address_addr_space (tmode, result, as);
7548
7549 return result;
7550 }
7551
7552 /* Generate code for computing CONSTRUCTOR EXP.
7553 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7554 is TRUE, instead of creating a temporary variable in memory
7555 NULL is returned and the caller needs to handle it differently. */
7556
7557 static rtx
7558 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7559 bool avoid_temp_mem)
7560 {
7561 tree type = TREE_TYPE (exp);
7562 enum machine_mode mode = TYPE_MODE (type);
7563
7564 /* Try to avoid creating a temporary at all. This is possible
7565 if all of the initializer is zero.
7566 FIXME: try to handle all [0..255] initializers we can handle
7567 with memset. */
7568 if (TREE_STATIC (exp)
7569 && !TREE_ADDRESSABLE (exp)
7570 && target != 0 && mode == BLKmode
7571 && all_zeros_p (exp))
7572 {
7573 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7574 return target;
7575 }
7576
7577 /* All elts simple constants => refer to a constant in memory. But
7578 if this is a non-BLKmode mode, let it store a field at a time
7579 since that should make a CONST_INT or CONST_DOUBLE when we
7580 fold. Likewise, if we have a target we can use, it is best to
7581 store directly into the target unless the type is large enough
7582 that memcpy will be used. If we are making an initializer and
7583 all operands are constant, put it in memory as well.
7584
7585 FIXME: Avoid trying to fill vector constructors piece-meal.
7586 Output them with output_constant_def below unless we're sure
7587 they're zeros. This should go away when vector initializers
7588 are treated like VECTOR_CST instead of arrays. */
7589 if ((TREE_STATIC (exp)
7590 && ((mode == BLKmode
7591 && ! (target != 0 && safe_from_p (target, exp, 1)))
7592 || TREE_ADDRESSABLE (exp)
7593 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7594 && (! MOVE_BY_PIECES_P
7595 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7596 TYPE_ALIGN (type)))
7597 && ! mostly_zeros_p (exp))))
7598 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7599 && TREE_CONSTANT (exp)))
7600 {
7601 rtx constructor;
7602
7603 if (avoid_temp_mem)
7604 return NULL_RTX;
7605
7606 constructor = expand_expr_constant (exp, 1, modifier);
7607
7608 if (modifier != EXPAND_CONST_ADDRESS
7609 && modifier != EXPAND_INITIALIZER
7610 && modifier != EXPAND_SUM)
7611 constructor = validize_mem (constructor);
7612
7613 return constructor;
7614 }
7615
7616 /* Handle calls that pass values in multiple non-contiguous
7617 locations. The Irix 6 ABI has examples of this. */
7618 if (target == 0 || ! safe_from_p (target, exp, 1)
7619 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7620 {
7621 if (avoid_temp_mem)
7622 return NULL_RTX;
7623
7624 target
7625 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7626 | (TREE_READONLY (exp)
7627 * TYPE_QUAL_CONST))),
7628 0, TREE_ADDRESSABLE (exp), 1);
7629 }
7630
7631 store_constructor (exp, target, 0, int_expr_size (exp));
7632 return target;
7633 }
7634
7635
7636 /* expand_expr: generate code for computing expression EXP.
7637 An rtx for the computed value is returned. The value is never null.
7638 In the case of a void EXP, const0_rtx is returned.
7639
7640 The value may be stored in TARGET if TARGET is nonzero.
7641 TARGET is just a suggestion; callers must assume that
7642 the rtx returned may not be the same as TARGET.
7643
7644 If TARGET is CONST0_RTX, it means that the value will be ignored.
7645
7646 If TMODE is not VOIDmode, it suggests generating the
7647 result in mode TMODE. But this is done only when convenient.
7648 Otherwise, TMODE is ignored and the value generated in its natural mode.
7649 TMODE is just a suggestion; callers must assume that
7650 the rtx returned may not have mode TMODE.
7651
7652 Note that TARGET may have neither TMODE nor MODE. In that case, it
7653 probably will not be used.
7654
7655 If MODIFIER is EXPAND_SUM then when EXP is an addition
7656 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7657 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7658 products as above, or REG or MEM, or constant.
7659 Ordinarily in such cases we would output mul or add instructions
7660 and then return a pseudo reg containing the sum.
7661
7662 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7663 it also marks a label as absolutely required (it can't be dead).
7664 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7665 This is used for outputting expressions used in initializers.
7666
7667 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7668 with a constant address even if that address is not normally legitimate.
7669 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7670
7671 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7672 a call parameter. Such targets require special care as we haven't yet
7673 marked TARGET so that it's safe from being trashed by libcalls. We
7674 don't want to use TARGET for anything but the final result;
7675 Intermediate values must go elsewhere. Additionally, calls to
7676 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7677
7678 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7679 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7680 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7681 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7682 recursively. */
7683
7684 rtx
7685 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7686 enum expand_modifier modifier, rtx *alt_rtl)
7687 {
7688 rtx ret;
7689
7690 /* Handle ERROR_MARK before anybody tries to access its type. */
7691 if (TREE_CODE (exp) == ERROR_MARK
7692 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7693 {
7694 ret = CONST0_RTX (tmode);
7695 return ret ? ret : const0_rtx;
7696 }
7697
7698 /* If this is an expression of some kind and it has an associated line
7699 number, then emit the line number before expanding the expression.
7700
7701 We need to save and restore the file and line information so that
7702 errors discovered during expansion are emitted with the right
7703 information. It would be better of the diagnostic routines
7704 used the file/line information embedded in the tree nodes rather
7705 than globals. */
7706 if (cfun && EXPR_HAS_LOCATION (exp))
7707 {
7708 location_t saved_location = input_location;
7709 location_t saved_curr_loc = get_curr_insn_source_location ();
7710 tree saved_block = get_curr_insn_block ();
7711 input_location = EXPR_LOCATION (exp);
7712 set_curr_insn_source_location (input_location);
7713
7714 /* Record where the insns produced belong. */
7715 set_curr_insn_block (TREE_BLOCK (exp));
7716
7717 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7718
7719 input_location = saved_location;
7720 set_curr_insn_block (saved_block);
7721 set_curr_insn_source_location (saved_curr_loc);
7722 }
7723 else
7724 {
7725 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7726 }
7727
7728 return ret;
7729 }
7730
7731 rtx
7732 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7733 enum expand_modifier modifier)
7734 {
7735 rtx op0, op1, op2, temp;
7736 tree type;
7737 int unsignedp;
7738 enum machine_mode mode;
7739 enum tree_code code = ops->code;
7740 optab this_optab;
7741 rtx subtarget, original_target;
7742 int ignore;
7743 bool reduce_bit_field;
7744 location_t loc = ops->location;
7745 tree treeop0, treeop1, treeop2;
7746 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7747 ? reduce_to_bit_field_precision ((expr), \
7748 target, \
7749 type) \
7750 : (expr))
7751
7752 type = ops->type;
7753 mode = TYPE_MODE (type);
7754 unsignedp = TYPE_UNSIGNED (type);
7755
7756 treeop0 = ops->op0;
7757 treeop1 = ops->op1;
7758 treeop2 = ops->op2;
7759
7760 /* We should be called only on simple (binary or unary) expressions,
7761 exactly those that are valid in gimple expressions that aren't
7762 GIMPLE_SINGLE_RHS (or invalid). */
7763 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7764 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7765 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7766
7767 ignore = (target == const0_rtx
7768 || ((CONVERT_EXPR_CODE_P (code)
7769 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7770 && TREE_CODE (type) == VOID_TYPE));
7771
7772 /* We should be called only if we need the result. */
7773 gcc_assert (!ignore);
7774
7775 /* An operation in what may be a bit-field type needs the
7776 result to be reduced to the precision of the bit-field type,
7777 which is narrower than that of the type's mode. */
7778 reduce_bit_field = (INTEGRAL_TYPE_P (type)
7779 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7780
7781 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7782 target = 0;
7783
7784 /* Use subtarget as the target for operand 0 of a binary operation. */
7785 subtarget = get_subtarget (target);
7786 original_target = target;
7787
7788 switch (code)
7789 {
7790 case NON_LVALUE_EXPR:
7791 case PAREN_EXPR:
7792 CASE_CONVERT:
7793 if (treeop0 == error_mark_node)
7794 return const0_rtx;
7795
7796 if (TREE_CODE (type) == UNION_TYPE)
7797 {
7798 tree valtype = TREE_TYPE (treeop0);
7799
7800 /* If both input and output are BLKmode, this conversion isn't doing
7801 anything except possibly changing memory attribute. */
7802 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7803 {
7804 rtx result = expand_expr (treeop0, target, tmode,
7805 modifier);
7806
7807 result = copy_rtx (result);
7808 set_mem_attributes (result, type, 0);
7809 return result;
7810 }
7811
7812 if (target == 0)
7813 {
7814 if (TYPE_MODE (type) != BLKmode)
7815 target = gen_reg_rtx (TYPE_MODE (type));
7816 else
7817 target = assign_temp (type, 0, 1, 1);
7818 }
7819
7820 if (MEM_P (target))
7821 /* Store data into beginning of memory target. */
7822 store_expr (treeop0,
7823 adjust_address (target, TYPE_MODE (valtype), 0),
7824 modifier == EXPAND_STACK_PARM,
7825 false);
7826
7827 else
7828 {
7829 gcc_assert (REG_P (target));
7830
7831 /* Store this field into a union of the proper type. */
7832 store_field (target,
7833 MIN ((int_size_in_bytes (TREE_TYPE
7834 (treeop0))
7835 * BITS_PER_UNIT),
7836 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7837 0, 0, 0, TYPE_MODE (valtype), treeop0,
7838 type, 0, false);
7839 }
7840
7841 /* Return the entire union. */
7842 return target;
7843 }
7844
7845 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
7846 {
7847 op0 = expand_expr (treeop0, target, VOIDmode,
7848 modifier);
7849
7850 /* If the signedness of the conversion differs and OP0 is
7851 a promoted SUBREG, clear that indication since we now
7852 have to do the proper extension. */
7853 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
7854 && GET_CODE (op0) == SUBREG)
7855 SUBREG_PROMOTED_VAR_P (op0) = 0;
7856
7857 return REDUCE_BIT_FIELD (op0);
7858 }
7859
7860 op0 = expand_expr (treeop0, NULL_RTX, mode,
7861 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
7862 if (GET_MODE (op0) == mode)
7863 ;
7864
7865 /* If OP0 is a constant, just convert it into the proper mode. */
7866 else if (CONSTANT_P (op0))
7867 {
7868 tree inner_type = TREE_TYPE (treeop0);
7869 enum machine_mode inner_mode = GET_MODE (op0);
7870
7871 if (inner_mode == VOIDmode)
7872 inner_mode = TYPE_MODE (inner_type);
7873
7874 if (modifier == EXPAND_INITIALIZER)
7875 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7876 subreg_lowpart_offset (mode,
7877 inner_mode));
7878 else
7879 op0= convert_modes (mode, inner_mode, op0,
7880 TYPE_UNSIGNED (inner_type));
7881 }
7882
7883 else if (modifier == EXPAND_INITIALIZER)
7884 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7885
7886 else if (target == 0)
7887 op0 = convert_to_mode (mode, op0,
7888 TYPE_UNSIGNED (TREE_TYPE
7889 (treeop0)));
7890 else
7891 {
7892 convert_move (target, op0,
7893 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7894 op0 = target;
7895 }
7896
7897 return REDUCE_BIT_FIELD (op0);
7898
7899 case ADDR_SPACE_CONVERT_EXPR:
7900 {
7901 tree treeop0_type = TREE_TYPE (treeop0);
7902 addr_space_t as_to;
7903 addr_space_t as_from;
7904
7905 gcc_assert (POINTER_TYPE_P (type));
7906 gcc_assert (POINTER_TYPE_P (treeop0_type));
7907
7908 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
7909 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
7910
7911 /* Conversions between pointers to the same address space should
7912 have been implemented via CONVERT_EXPR / NOP_EXPR. */
7913 gcc_assert (as_to != as_from);
7914
7915 /* Ask target code to handle conversion between pointers
7916 to overlapping address spaces. */
7917 if (targetm.addr_space.subset_p (as_to, as_from)
7918 || targetm.addr_space.subset_p (as_from, as_to))
7919 {
7920 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
7921 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
7922 gcc_assert (op0);
7923 return op0;
7924 }
7925
7926 /* For disjoint address spaces, converting anything but
7927 a null pointer invokes undefined behaviour. We simply
7928 always return a null pointer here. */
7929 return CONST0_RTX (mode);
7930 }
7931
7932 case POINTER_PLUS_EXPR:
7933 /* Even though the sizetype mode and the pointer's mode can be different
7934 expand is able to handle this correctly and get the correct result out
7935 of the PLUS_EXPR code. */
7936 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
7937 if sizetype precision is smaller than pointer precision. */
7938 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
7939 treeop1 = fold_convert_loc (loc, type,
7940 fold_convert_loc (loc, ssizetype,
7941 treeop1));
7942 case PLUS_EXPR:
7943 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7944 something else, make sure we add the register to the constant and
7945 then to the other thing. This case can occur during strength
7946 reduction and doing it this way will produce better code if the
7947 frame pointer or argument pointer is eliminated.
7948
7949 fold-const.c will ensure that the constant is always in the inner
7950 PLUS_EXPR, so the only case we need to do anything about is if
7951 sp, ap, or fp is our second argument, in which case we must swap
7952 the innermost first argument and our second argument. */
7953
7954 if (TREE_CODE (treeop0) == PLUS_EXPR
7955 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
7956 && TREE_CODE (treeop1) == VAR_DECL
7957 && (DECL_RTL (treeop1) == frame_pointer_rtx
7958 || DECL_RTL (treeop1) == stack_pointer_rtx
7959 || DECL_RTL (treeop1) == arg_pointer_rtx))
7960 {
7961 tree t = treeop1;
7962
7963 treeop1 = TREE_OPERAND (treeop0, 0);
7964 TREE_OPERAND (treeop0, 0) = t;
7965 }
7966
7967 /* If the result is to be ptr_mode and we are adding an integer to
7968 something, we might be forming a constant. So try to use
7969 plus_constant. If it produces a sum and we can't accept it,
7970 use force_operand. This allows P = &ARR[const] to generate
7971 efficient code on machines where a SYMBOL_REF is not a valid
7972 address.
7973
7974 If this is an EXPAND_SUM call, always return the sum. */
7975 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7976 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
7977 {
7978 if (modifier == EXPAND_STACK_PARM)
7979 target = 0;
7980 if (TREE_CODE (treeop0) == INTEGER_CST
7981 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7982 && TREE_CONSTANT (treeop1))
7983 {
7984 rtx constant_part;
7985
7986 op1 = expand_expr (treeop1, subtarget, VOIDmode,
7987 EXPAND_SUM);
7988 /* Use immed_double_const to ensure that the constant is
7989 truncated according to the mode of OP1, then sign extended
7990 to a HOST_WIDE_INT. Using the constant directly can result
7991 in non-canonical RTL in a 64x32 cross compile. */
7992 constant_part
7993 = immed_double_const (TREE_INT_CST_LOW (treeop0),
7994 (HOST_WIDE_INT) 0,
7995 TYPE_MODE (TREE_TYPE (treeop1)));
7996 op1 = plus_constant (op1, INTVAL (constant_part));
7997 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7998 op1 = force_operand (op1, target);
7999 return REDUCE_BIT_FIELD (op1);
8000 }
8001
8002 else if (TREE_CODE (treeop1) == INTEGER_CST
8003 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8004 && TREE_CONSTANT (treeop0))
8005 {
8006 rtx constant_part;
8007
8008 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8009 (modifier == EXPAND_INITIALIZER
8010 ? EXPAND_INITIALIZER : EXPAND_SUM));
8011 if (! CONSTANT_P (op0))
8012 {
8013 op1 = expand_expr (treeop1, NULL_RTX,
8014 VOIDmode, modifier);
8015 /* Return a PLUS if modifier says it's OK. */
8016 if (modifier == EXPAND_SUM
8017 || modifier == EXPAND_INITIALIZER)
8018 return simplify_gen_binary (PLUS, mode, op0, op1);
8019 goto binop2;
8020 }
8021 /* Use immed_double_const to ensure that the constant is
8022 truncated according to the mode of OP1, then sign extended
8023 to a HOST_WIDE_INT. Using the constant directly can result
8024 in non-canonical RTL in a 64x32 cross compile. */
8025 constant_part
8026 = immed_double_const (TREE_INT_CST_LOW (treeop1),
8027 (HOST_WIDE_INT) 0,
8028 TYPE_MODE (TREE_TYPE (treeop0)));
8029 op0 = plus_constant (op0, INTVAL (constant_part));
8030 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8031 op0 = force_operand (op0, target);
8032 return REDUCE_BIT_FIELD (op0);
8033 }
8034 }
8035
8036 /* Use TER to expand pointer addition of a negated value
8037 as pointer subtraction. */
8038 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8039 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8040 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8041 && TREE_CODE (treeop1) == SSA_NAME
8042 && TYPE_MODE (TREE_TYPE (treeop0))
8043 == TYPE_MODE (TREE_TYPE (treeop1)))
8044 {
8045 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8046 if (def)
8047 {
8048 treeop1 = gimple_assign_rhs1 (def);
8049 code = MINUS_EXPR;
8050 goto do_minus;
8051 }
8052 }
8053
8054 /* No sense saving up arithmetic to be done
8055 if it's all in the wrong mode to form part of an address.
8056 And force_operand won't know whether to sign-extend or
8057 zero-extend. */
8058 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8059 || mode != ptr_mode)
8060 {
8061 expand_operands (treeop0, treeop1,
8062 subtarget, &op0, &op1, EXPAND_NORMAL);
8063 if (op0 == const0_rtx)
8064 return op1;
8065 if (op1 == const0_rtx)
8066 return op0;
8067 goto binop2;
8068 }
8069
8070 expand_operands (treeop0, treeop1,
8071 subtarget, &op0, &op1, modifier);
8072 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8073
8074 case MINUS_EXPR:
8075 do_minus:
8076 /* For initializers, we are allowed to return a MINUS of two
8077 symbolic constants. Here we handle all cases when both operands
8078 are constant. */
8079 /* Handle difference of two symbolic constants,
8080 for the sake of an initializer. */
8081 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8082 && really_constant_p (treeop0)
8083 && really_constant_p (treeop1))
8084 {
8085 expand_operands (treeop0, treeop1,
8086 NULL_RTX, &op0, &op1, modifier);
8087
8088 /* If the last operand is a CONST_INT, use plus_constant of
8089 the negated constant. Else make the MINUS. */
8090 if (CONST_INT_P (op1))
8091 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
8092 else
8093 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8094 }
8095
8096 /* No sense saving up arithmetic to be done
8097 if it's all in the wrong mode to form part of an address.
8098 And force_operand won't know whether to sign-extend or
8099 zero-extend. */
8100 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8101 || mode != ptr_mode)
8102 goto binop;
8103
8104 expand_operands (treeop0, treeop1,
8105 subtarget, &op0, &op1, modifier);
8106
8107 /* Convert A - const to A + (-const). */
8108 if (CONST_INT_P (op1))
8109 {
8110 op1 = negate_rtx (mode, op1);
8111 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8112 }
8113
8114 goto binop2;
8115
8116 case WIDEN_MULT_PLUS_EXPR:
8117 case WIDEN_MULT_MINUS_EXPR:
8118 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8119 op2 = expand_normal (treeop2);
8120 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8121 target, unsignedp);
8122 return target;
8123
8124 case WIDEN_MULT_EXPR:
8125 /* If first operand is constant, swap them.
8126 Thus the following special case checks need only
8127 check the second operand. */
8128 if (TREE_CODE (treeop0) == INTEGER_CST)
8129 {
8130 tree t1 = treeop0;
8131 treeop0 = treeop1;
8132 treeop1 = t1;
8133 }
8134
8135 /* First, check if we have a multiplication of one signed and one
8136 unsigned operand. */
8137 if (TREE_CODE (treeop1) != INTEGER_CST
8138 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8139 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8140 {
8141 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8142 this_optab = usmul_widen_optab;
8143 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8144 != CODE_FOR_nothing)
8145 {
8146 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8147 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8148 EXPAND_NORMAL);
8149 else
8150 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8151 EXPAND_NORMAL);
8152 goto binop3;
8153 }
8154 }
8155 /* Check for a multiplication with matching signedness. */
8156 else if ((TREE_CODE (treeop1) == INTEGER_CST
8157 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8158 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8159 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8160 {
8161 tree op0type = TREE_TYPE (treeop0);
8162 enum machine_mode innermode = TYPE_MODE (op0type);
8163 bool zextend_p = TYPE_UNSIGNED (op0type);
8164 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8165 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8166
8167 if (TREE_CODE (treeop0) != INTEGER_CST)
8168 {
8169 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8170 != CODE_FOR_nothing)
8171 {
8172 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8173 EXPAND_NORMAL);
8174 temp = expand_widening_mult (mode, op0, op1, target,
8175 unsignedp, this_optab);
8176 return REDUCE_BIT_FIELD (temp);
8177 }
8178 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8179 != CODE_FOR_nothing
8180 && innermode == word_mode)
8181 {
8182 rtx htem, hipart;
8183 op0 = expand_normal (treeop0);
8184 if (TREE_CODE (treeop1) == INTEGER_CST)
8185 op1 = convert_modes (innermode, mode,
8186 expand_normal (treeop1), unsignedp);
8187 else
8188 op1 = expand_normal (treeop1);
8189 temp = expand_binop (mode, other_optab, op0, op1, target,
8190 unsignedp, OPTAB_LIB_WIDEN);
8191 hipart = gen_highpart (innermode, temp);
8192 htem = expand_mult_highpart_adjust (innermode, hipart,
8193 op0, op1, hipart,
8194 zextend_p);
8195 if (htem != hipart)
8196 emit_move_insn (hipart, htem);
8197 return REDUCE_BIT_FIELD (temp);
8198 }
8199 }
8200 }
8201 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8202 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8203 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8204 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8205
8206 case FMA_EXPR:
8207 {
8208 optab opt = fma_optab;
8209 gimple def0, def2;
8210
8211 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8212 call. */
8213 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8214 {
8215 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8216 tree call_expr;
8217
8218 gcc_assert (fn != NULL_TREE);
8219 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8220 return expand_builtin (call_expr, target, subtarget, mode, false);
8221 }
8222
8223 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8224 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8225
8226 op0 = op2 = NULL;
8227
8228 if (def0 && def2
8229 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8230 {
8231 opt = fnms_optab;
8232 op0 = expand_normal (gimple_assign_rhs1 (def0));
8233 op2 = expand_normal (gimple_assign_rhs1 (def2));
8234 }
8235 else if (def0
8236 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8237 {
8238 opt = fnma_optab;
8239 op0 = expand_normal (gimple_assign_rhs1 (def0));
8240 }
8241 else if (def2
8242 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8243 {
8244 opt = fms_optab;
8245 op2 = expand_normal (gimple_assign_rhs1 (def2));
8246 }
8247
8248 if (op0 == NULL)
8249 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8250 if (op2 == NULL)
8251 op2 = expand_normal (treeop2);
8252 op1 = expand_normal (treeop1);
8253
8254 return expand_ternary_op (TYPE_MODE (type), opt,
8255 op0, op1, op2, target, 0);
8256 }
8257
8258 case MULT_EXPR:
8259 /* If this is a fixed-point operation, then we cannot use the code
8260 below because "expand_mult" doesn't support sat/no-sat fixed-point
8261 multiplications. */
8262 if (ALL_FIXED_POINT_MODE_P (mode))
8263 goto binop;
8264
8265 /* If first operand is constant, swap them.
8266 Thus the following special case checks need only
8267 check the second operand. */
8268 if (TREE_CODE (treeop0) == INTEGER_CST)
8269 {
8270 tree t1 = treeop0;
8271 treeop0 = treeop1;
8272 treeop1 = t1;
8273 }
8274
8275 /* Attempt to return something suitable for generating an
8276 indexed address, for machines that support that. */
8277
8278 if (modifier == EXPAND_SUM && mode == ptr_mode
8279 && host_integerp (treeop1, 0))
8280 {
8281 tree exp1 = treeop1;
8282
8283 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8284 EXPAND_SUM);
8285
8286 if (!REG_P (op0))
8287 op0 = force_operand (op0, NULL_RTX);
8288 if (!REG_P (op0))
8289 op0 = copy_to_mode_reg (mode, op0);
8290
8291 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8292 gen_int_mode (tree_low_cst (exp1, 0),
8293 TYPE_MODE (TREE_TYPE (exp1)))));
8294 }
8295
8296 if (modifier == EXPAND_STACK_PARM)
8297 target = 0;
8298
8299 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8300 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8301
8302 case TRUNC_DIV_EXPR:
8303 case FLOOR_DIV_EXPR:
8304 case CEIL_DIV_EXPR:
8305 case ROUND_DIV_EXPR:
8306 case EXACT_DIV_EXPR:
8307 /* If this is a fixed-point operation, then we cannot use the code
8308 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8309 divisions. */
8310 if (ALL_FIXED_POINT_MODE_P (mode))
8311 goto binop;
8312
8313 if (modifier == EXPAND_STACK_PARM)
8314 target = 0;
8315 /* Possible optimization: compute the dividend with EXPAND_SUM
8316 then if the divisor is constant can optimize the case
8317 where some terms of the dividend have coeffs divisible by it. */
8318 expand_operands (treeop0, treeop1,
8319 subtarget, &op0, &op1, EXPAND_NORMAL);
8320 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8321
8322 case RDIV_EXPR:
8323 goto binop;
8324
8325 case TRUNC_MOD_EXPR:
8326 case FLOOR_MOD_EXPR:
8327 case CEIL_MOD_EXPR:
8328 case ROUND_MOD_EXPR:
8329 if (modifier == EXPAND_STACK_PARM)
8330 target = 0;
8331 expand_operands (treeop0, treeop1,
8332 subtarget, &op0, &op1, EXPAND_NORMAL);
8333 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8334
8335 case FIXED_CONVERT_EXPR:
8336 op0 = expand_normal (treeop0);
8337 if (target == 0 || modifier == EXPAND_STACK_PARM)
8338 target = gen_reg_rtx (mode);
8339
8340 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8341 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8342 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8343 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8344 else
8345 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8346 return target;
8347
8348 case FIX_TRUNC_EXPR:
8349 op0 = expand_normal (treeop0);
8350 if (target == 0 || modifier == EXPAND_STACK_PARM)
8351 target = gen_reg_rtx (mode);
8352 expand_fix (target, op0, unsignedp);
8353 return target;
8354
8355 case FLOAT_EXPR:
8356 op0 = expand_normal (treeop0);
8357 if (target == 0 || modifier == EXPAND_STACK_PARM)
8358 target = gen_reg_rtx (mode);
8359 /* expand_float can't figure out what to do if FROM has VOIDmode.
8360 So give it the correct mode. With -O, cse will optimize this. */
8361 if (GET_MODE (op0) == VOIDmode)
8362 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8363 op0);
8364 expand_float (target, op0,
8365 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8366 return target;
8367
8368 case NEGATE_EXPR:
8369 op0 = expand_expr (treeop0, subtarget,
8370 VOIDmode, EXPAND_NORMAL);
8371 if (modifier == EXPAND_STACK_PARM)
8372 target = 0;
8373 temp = expand_unop (mode,
8374 optab_for_tree_code (NEGATE_EXPR, type,
8375 optab_default),
8376 op0, target, 0);
8377 gcc_assert (temp);
8378 return REDUCE_BIT_FIELD (temp);
8379
8380 case ABS_EXPR:
8381 op0 = expand_expr (treeop0, subtarget,
8382 VOIDmode, EXPAND_NORMAL);
8383 if (modifier == EXPAND_STACK_PARM)
8384 target = 0;
8385
8386 /* ABS_EXPR is not valid for complex arguments. */
8387 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8388 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8389
8390 /* Unsigned abs is simply the operand. Testing here means we don't
8391 risk generating incorrect code below. */
8392 if (TYPE_UNSIGNED (type))
8393 return op0;
8394
8395 return expand_abs (mode, op0, target, unsignedp,
8396 safe_from_p (target, treeop0, 1));
8397
8398 case MAX_EXPR:
8399 case MIN_EXPR:
8400 target = original_target;
8401 if (target == 0
8402 || modifier == EXPAND_STACK_PARM
8403 || (MEM_P (target) && MEM_VOLATILE_P (target))
8404 || GET_MODE (target) != mode
8405 || (REG_P (target)
8406 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8407 target = gen_reg_rtx (mode);
8408 expand_operands (treeop0, treeop1,
8409 target, &op0, &op1, EXPAND_NORMAL);
8410
8411 /* First try to do it with a special MIN or MAX instruction.
8412 If that does not win, use a conditional jump to select the proper
8413 value. */
8414 this_optab = optab_for_tree_code (code, type, optab_default);
8415 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8416 OPTAB_WIDEN);
8417 if (temp != 0)
8418 return temp;
8419
8420 /* At this point, a MEM target is no longer useful; we will get better
8421 code without it. */
8422
8423 if (! REG_P (target))
8424 target = gen_reg_rtx (mode);
8425
8426 /* If op1 was placed in target, swap op0 and op1. */
8427 if (target != op0 && target == op1)
8428 {
8429 temp = op0;
8430 op0 = op1;
8431 op1 = temp;
8432 }
8433
8434 /* We generate better code and avoid problems with op1 mentioning
8435 target by forcing op1 into a pseudo if it isn't a constant. */
8436 if (! CONSTANT_P (op1))
8437 op1 = force_reg (mode, op1);
8438
8439 {
8440 enum rtx_code comparison_code;
8441 rtx cmpop1 = op1;
8442
8443 if (code == MAX_EXPR)
8444 comparison_code = unsignedp ? GEU : GE;
8445 else
8446 comparison_code = unsignedp ? LEU : LE;
8447
8448 /* Canonicalize to comparisons against 0. */
8449 if (op1 == const1_rtx)
8450 {
8451 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8452 or (a != 0 ? a : 1) for unsigned.
8453 For MIN we are safe converting (a <= 1 ? a : 1)
8454 into (a <= 0 ? a : 1) */
8455 cmpop1 = const0_rtx;
8456 if (code == MAX_EXPR)
8457 comparison_code = unsignedp ? NE : GT;
8458 }
8459 if (op1 == constm1_rtx && !unsignedp)
8460 {
8461 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8462 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8463 cmpop1 = const0_rtx;
8464 if (code == MIN_EXPR)
8465 comparison_code = LT;
8466 }
8467 #ifdef HAVE_conditional_move
8468 /* Use a conditional move if possible. */
8469 if (can_conditionally_move_p (mode))
8470 {
8471 rtx insn;
8472
8473 /* ??? Same problem as in expmed.c: emit_conditional_move
8474 forces a stack adjustment via compare_from_rtx, and we
8475 lose the stack adjustment if the sequence we are about
8476 to create is discarded. */
8477 do_pending_stack_adjust ();
8478
8479 start_sequence ();
8480
8481 /* Try to emit the conditional move. */
8482 insn = emit_conditional_move (target, comparison_code,
8483 op0, cmpop1, mode,
8484 op0, op1, mode,
8485 unsignedp);
8486
8487 /* If we could do the conditional move, emit the sequence,
8488 and return. */
8489 if (insn)
8490 {
8491 rtx seq = get_insns ();
8492 end_sequence ();
8493 emit_insn (seq);
8494 return target;
8495 }
8496
8497 /* Otherwise discard the sequence and fall back to code with
8498 branches. */
8499 end_sequence ();
8500 }
8501 #endif
8502 if (target != op0)
8503 emit_move_insn (target, op0);
8504
8505 temp = gen_label_rtx ();
8506 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8507 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8508 -1);
8509 }
8510 emit_move_insn (target, op1);
8511 emit_label (temp);
8512 return target;
8513
8514 case BIT_NOT_EXPR:
8515 op0 = expand_expr (treeop0, subtarget,
8516 VOIDmode, EXPAND_NORMAL);
8517 if (modifier == EXPAND_STACK_PARM)
8518 target = 0;
8519 /* In case we have to reduce the result to bitfield precision
8520 expand this as XOR with a proper constant instead. */
8521 if (reduce_bit_field)
8522 temp = expand_binop (mode, xor_optab, op0,
8523 immed_double_int_const
8524 (double_int_mask (TYPE_PRECISION (type)), mode),
8525 target, 1, OPTAB_LIB_WIDEN);
8526 else
8527 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8528 gcc_assert (temp);
8529 return temp;
8530
8531 /* ??? Can optimize bitwise operations with one arg constant.
8532 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8533 and (a bitwise1 b) bitwise2 b (etc)
8534 but that is probably not worth while. */
8535
8536 case BIT_AND_EXPR:
8537 case BIT_IOR_EXPR:
8538 case BIT_XOR_EXPR:
8539 goto binop;
8540
8541 case LROTATE_EXPR:
8542 case RROTATE_EXPR:
8543 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8544 || (GET_MODE_PRECISION (TYPE_MODE (type))
8545 == TYPE_PRECISION (type)));
8546 /* fall through */
8547
8548 case LSHIFT_EXPR:
8549 case RSHIFT_EXPR:
8550 /* If this is a fixed-point operation, then we cannot use the code
8551 below because "expand_shift" doesn't support sat/no-sat fixed-point
8552 shifts. */
8553 if (ALL_FIXED_POINT_MODE_P (mode))
8554 goto binop;
8555
8556 if (! safe_from_p (subtarget, treeop1, 1))
8557 subtarget = 0;
8558 if (modifier == EXPAND_STACK_PARM)
8559 target = 0;
8560 op0 = expand_expr (treeop0, subtarget,
8561 VOIDmode, EXPAND_NORMAL);
8562 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8563 unsignedp);
8564 if (code == LSHIFT_EXPR)
8565 temp = REDUCE_BIT_FIELD (temp);
8566 return temp;
8567
8568 /* Could determine the answer when only additive constants differ. Also,
8569 the addition of one can be handled by changing the condition. */
8570 case LT_EXPR:
8571 case LE_EXPR:
8572 case GT_EXPR:
8573 case GE_EXPR:
8574 case EQ_EXPR:
8575 case NE_EXPR:
8576 case UNORDERED_EXPR:
8577 case ORDERED_EXPR:
8578 case UNLT_EXPR:
8579 case UNLE_EXPR:
8580 case UNGT_EXPR:
8581 case UNGE_EXPR:
8582 case UNEQ_EXPR:
8583 case LTGT_EXPR:
8584 temp = do_store_flag (ops,
8585 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8586 tmode != VOIDmode ? tmode : mode);
8587 if (temp)
8588 return temp;
8589
8590 /* Use a compare and a jump for BLKmode comparisons, or for function
8591 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8592
8593 if ((target == 0
8594 || modifier == EXPAND_STACK_PARM
8595 || ! safe_from_p (target, treeop0, 1)
8596 || ! safe_from_p (target, treeop1, 1)
8597 /* Make sure we don't have a hard reg (such as function's return
8598 value) live across basic blocks, if not optimizing. */
8599 || (!optimize && REG_P (target)
8600 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8601 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8602
8603 emit_move_insn (target, const0_rtx);
8604
8605 op1 = gen_label_rtx ();
8606 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8607
8608 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8609 emit_move_insn (target, constm1_rtx);
8610 else
8611 emit_move_insn (target, const1_rtx);
8612
8613 emit_label (op1);
8614 return target;
8615
8616 case COMPLEX_EXPR:
8617 /* Get the rtx code of the operands. */
8618 op0 = expand_normal (treeop0);
8619 op1 = expand_normal (treeop1);
8620
8621 if (!target)
8622 target = gen_reg_rtx (TYPE_MODE (type));
8623
8624 /* Move the real (op0) and imaginary (op1) parts to their location. */
8625 write_complex_part (target, op0, false);
8626 write_complex_part (target, op1, true);
8627
8628 return target;
8629
8630 case WIDEN_SUM_EXPR:
8631 {
8632 tree oprnd0 = treeop0;
8633 tree oprnd1 = treeop1;
8634
8635 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8636 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8637 target, unsignedp);
8638 return target;
8639 }
8640
8641 case REDUC_MAX_EXPR:
8642 case REDUC_MIN_EXPR:
8643 case REDUC_PLUS_EXPR:
8644 {
8645 op0 = expand_normal (treeop0);
8646 this_optab = optab_for_tree_code (code, type, optab_default);
8647 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8648 gcc_assert (temp);
8649 return temp;
8650 }
8651
8652 case VEC_LSHIFT_EXPR:
8653 case VEC_RSHIFT_EXPR:
8654 {
8655 target = expand_vec_shift_expr (ops, target);
8656 return target;
8657 }
8658
8659 case VEC_UNPACK_HI_EXPR:
8660 case VEC_UNPACK_LO_EXPR:
8661 {
8662 op0 = expand_normal (treeop0);
8663 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8664 target, unsignedp);
8665 gcc_assert (temp);
8666 return temp;
8667 }
8668
8669 case VEC_UNPACK_FLOAT_HI_EXPR:
8670 case VEC_UNPACK_FLOAT_LO_EXPR:
8671 {
8672 op0 = expand_normal (treeop0);
8673 /* The signedness is determined from input operand. */
8674 temp = expand_widen_pattern_expr
8675 (ops, op0, NULL_RTX, NULL_RTX,
8676 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8677
8678 gcc_assert (temp);
8679 return temp;
8680 }
8681
8682 case VEC_WIDEN_MULT_HI_EXPR:
8683 case VEC_WIDEN_MULT_LO_EXPR:
8684 {
8685 tree oprnd0 = treeop0;
8686 tree oprnd1 = treeop1;
8687
8688 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8689 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8690 target, unsignedp);
8691 gcc_assert (target);
8692 return target;
8693 }
8694
8695 case VEC_WIDEN_LSHIFT_HI_EXPR:
8696 case VEC_WIDEN_LSHIFT_LO_EXPR:
8697 {
8698 tree oprnd0 = treeop0;
8699 tree oprnd1 = treeop1;
8700
8701 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8702 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8703 target, unsignedp);
8704 gcc_assert (target);
8705 return target;
8706 }
8707
8708 case VEC_PACK_TRUNC_EXPR:
8709 case VEC_PACK_SAT_EXPR:
8710 case VEC_PACK_FIX_TRUNC_EXPR:
8711 mode = TYPE_MODE (TREE_TYPE (treeop0));
8712 goto binop;
8713
8714 case VEC_PERM_EXPR:
8715 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
8716 op2 = expand_normal (treeop2);
8717
8718 /* Careful here: if the target doesn't support integral vector modes,
8719 a constant selection vector could wind up smooshed into a normal
8720 integral constant. */
8721 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
8722 {
8723 tree sel_type = TREE_TYPE (treeop2);
8724 enum machine_mode vmode
8725 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
8726 TYPE_VECTOR_SUBPARTS (sel_type));
8727 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
8728 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
8729 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
8730 }
8731 else
8732 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
8733
8734 temp = expand_vec_perm (mode, op0, op1, op2, target);
8735 gcc_assert (temp);
8736 return temp;
8737
8738 case DOT_PROD_EXPR:
8739 {
8740 tree oprnd0 = treeop0;
8741 tree oprnd1 = treeop1;
8742 tree oprnd2 = treeop2;
8743 rtx op2;
8744
8745 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8746 op2 = expand_normal (oprnd2);
8747 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8748 target, unsignedp);
8749 return target;
8750 }
8751
8752 case REALIGN_LOAD_EXPR:
8753 {
8754 tree oprnd0 = treeop0;
8755 tree oprnd1 = treeop1;
8756 tree oprnd2 = treeop2;
8757 rtx op2;
8758
8759 this_optab = optab_for_tree_code (code, type, optab_default);
8760 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8761 op2 = expand_normal (oprnd2);
8762 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8763 target, unsignedp);
8764 gcc_assert (temp);
8765 return temp;
8766 }
8767
8768 case COND_EXPR:
8769 /* A COND_EXPR with its type being VOID_TYPE represents a
8770 conditional jump and is handled in
8771 expand_gimple_cond_expr. */
8772 gcc_assert (!VOID_TYPE_P (type));
8773
8774 /* Note that COND_EXPRs whose type is a structure or union
8775 are required to be constructed to contain assignments of
8776 a temporary variable, so that we can evaluate them here
8777 for side effect only. If type is void, we must do likewise. */
8778
8779 gcc_assert (!TREE_ADDRESSABLE (type)
8780 && !ignore
8781 && TREE_TYPE (treeop1) != void_type_node
8782 && TREE_TYPE (treeop2) != void_type_node);
8783
8784 /* If we are not to produce a result, we have no target. Otherwise,
8785 if a target was specified use it; it will not be used as an
8786 intermediate target unless it is safe. If no target, use a
8787 temporary. */
8788
8789 if (modifier != EXPAND_STACK_PARM
8790 && original_target
8791 && safe_from_p (original_target, treeop0, 1)
8792 && GET_MODE (original_target) == mode
8793 #ifdef HAVE_conditional_move
8794 && (! can_conditionally_move_p (mode)
8795 || REG_P (original_target))
8796 #endif
8797 && !MEM_P (original_target))
8798 temp = original_target;
8799 else
8800 temp = assign_temp (type, 0, 0, 1);
8801
8802 do_pending_stack_adjust ();
8803 NO_DEFER_POP;
8804 op0 = gen_label_rtx ();
8805 op1 = gen_label_rtx ();
8806 jumpifnot (treeop0, op0, -1);
8807 store_expr (treeop1, temp,
8808 modifier == EXPAND_STACK_PARM,
8809 false);
8810
8811 emit_jump_insn (gen_jump (op1));
8812 emit_barrier ();
8813 emit_label (op0);
8814 store_expr (treeop2, temp,
8815 modifier == EXPAND_STACK_PARM,
8816 false);
8817
8818 emit_label (op1);
8819 OK_DEFER_POP;
8820 return temp;
8821
8822 case VEC_COND_EXPR:
8823 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
8824 return target;
8825
8826 default:
8827 gcc_unreachable ();
8828 }
8829
8830 /* Here to do an ordinary binary operator. */
8831 binop:
8832 expand_operands (treeop0, treeop1,
8833 subtarget, &op0, &op1, EXPAND_NORMAL);
8834 binop2:
8835 this_optab = optab_for_tree_code (code, type, optab_default);
8836 binop3:
8837 if (modifier == EXPAND_STACK_PARM)
8838 target = 0;
8839 temp = expand_binop (mode, this_optab, op0, op1, target,
8840 unsignedp, OPTAB_LIB_WIDEN);
8841 gcc_assert (temp);
8842 /* Bitwise operations do not need bitfield reduction as we expect their
8843 operands being properly truncated. */
8844 if (code == BIT_XOR_EXPR
8845 || code == BIT_AND_EXPR
8846 || code == BIT_IOR_EXPR)
8847 return temp;
8848 return REDUCE_BIT_FIELD (temp);
8849 }
8850 #undef REDUCE_BIT_FIELD
8851
8852 rtx
8853 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
8854 enum expand_modifier modifier, rtx *alt_rtl)
8855 {
8856 rtx op0, op1, temp, decl_rtl;
8857 tree type;
8858 int unsignedp;
8859 enum machine_mode mode;
8860 enum tree_code code = TREE_CODE (exp);
8861 rtx subtarget, original_target;
8862 int ignore;
8863 tree context;
8864 bool reduce_bit_field;
8865 location_t loc = EXPR_LOCATION (exp);
8866 struct separate_ops ops;
8867 tree treeop0, treeop1, treeop2;
8868 tree ssa_name = NULL_TREE;
8869 gimple g;
8870
8871 type = TREE_TYPE (exp);
8872 mode = TYPE_MODE (type);
8873 unsignedp = TYPE_UNSIGNED (type);
8874
8875 treeop0 = treeop1 = treeop2 = NULL_TREE;
8876 if (!VL_EXP_CLASS_P (exp))
8877 switch (TREE_CODE_LENGTH (code))
8878 {
8879 default:
8880 case 3: treeop2 = TREE_OPERAND (exp, 2);
8881 case 2: treeop1 = TREE_OPERAND (exp, 1);
8882 case 1: treeop0 = TREE_OPERAND (exp, 0);
8883 case 0: break;
8884 }
8885 ops.code = code;
8886 ops.type = type;
8887 ops.op0 = treeop0;
8888 ops.op1 = treeop1;
8889 ops.op2 = treeop2;
8890 ops.location = loc;
8891
8892 ignore = (target == const0_rtx
8893 || ((CONVERT_EXPR_CODE_P (code)
8894 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8895 && TREE_CODE (type) == VOID_TYPE));
8896
8897 /* An operation in what may be a bit-field type needs the
8898 result to be reduced to the precision of the bit-field type,
8899 which is narrower than that of the type's mode. */
8900 reduce_bit_field = (!ignore
8901 && INTEGRAL_TYPE_P (type)
8902 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8903
8904 /* If we are going to ignore this result, we need only do something
8905 if there is a side-effect somewhere in the expression. If there
8906 is, short-circuit the most common cases here. Note that we must
8907 not call expand_expr with anything but const0_rtx in case this
8908 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
8909
8910 if (ignore)
8911 {
8912 if (! TREE_SIDE_EFFECTS (exp))
8913 return const0_rtx;
8914
8915 /* Ensure we reference a volatile object even if value is ignored, but
8916 don't do this if all we are doing is taking its address. */
8917 if (TREE_THIS_VOLATILE (exp)
8918 && TREE_CODE (exp) != FUNCTION_DECL
8919 && mode != VOIDmode && mode != BLKmode
8920 && modifier != EXPAND_CONST_ADDRESS)
8921 {
8922 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
8923 if (MEM_P (temp))
8924 copy_to_reg (temp);
8925 return const0_rtx;
8926 }
8927
8928 if (TREE_CODE_CLASS (code) == tcc_unary
8929 || code == COMPONENT_REF || code == INDIRECT_REF)
8930 return expand_expr (treeop0, const0_rtx, VOIDmode,
8931 modifier);
8932
8933 else if (TREE_CODE_CLASS (code) == tcc_binary
8934 || TREE_CODE_CLASS (code) == tcc_comparison
8935 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
8936 {
8937 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8938 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8939 return const0_rtx;
8940 }
8941 else if (code == BIT_FIELD_REF)
8942 {
8943 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8944 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8945 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
8946 return const0_rtx;
8947 }
8948
8949 target = 0;
8950 }
8951
8952 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8953 target = 0;
8954
8955 /* Use subtarget as the target for operand 0 of a binary operation. */
8956 subtarget = get_subtarget (target);
8957 original_target = target;
8958
8959 switch (code)
8960 {
8961 case LABEL_DECL:
8962 {
8963 tree function = decl_function_context (exp);
8964
8965 temp = label_rtx (exp);
8966 temp = gen_rtx_LABEL_REF (Pmode, temp);
8967
8968 if (function != current_function_decl
8969 && function != 0)
8970 LABEL_REF_NONLOCAL_P (temp) = 1;
8971
8972 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
8973 return temp;
8974 }
8975
8976 case SSA_NAME:
8977 /* ??? ivopts calls expander, without any preparation from
8978 out-of-ssa. So fake instructions as if this was an access to the
8979 base variable. This unnecessarily allocates a pseudo, see how we can
8980 reuse it, if partition base vars have it set already. */
8981 if (!currently_expanding_to_rtl)
8982 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
8983 NULL);
8984
8985 g = get_gimple_for_ssa_name (exp);
8986 /* For EXPAND_INITIALIZER try harder to get something simpler. */
8987 if (g == NULL
8988 && modifier == EXPAND_INITIALIZER
8989 && !SSA_NAME_IS_DEFAULT_DEF (exp)
8990 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
8991 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
8992 g = SSA_NAME_DEF_STMT (exp);
8993 if (g)
8994 return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
8995 modifier, NULL);
8996
8997 ssa_name = exp;
8998 decl_rtl = get_rtx_for_ssa_name (ssa_name);
8999 exp = SSA_NAME_VAR (ssa_name);
9000 goto expand_decl_rtl;
9001
9002 case PARM_DECL:
9003 case VAR_DECL:
9004 /* If a static var's type was incomplete when the decl was written,
9005 but the type is complete now, lay out the decl now. */
9006 if (DECL_SIZE (exp) == 0
9007 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9008 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9009 layout_decl (exp, 0);
9010
9011 /* ... fall through ... */
9012
9013 case FUNCTION_DECL:
9014 case RESULT_DECL:
9015 decl_rtl = DECL_RTL (exp);
9016 expand_decl_rtl:
9017 gcc_assert (decl_rtl);
9018 decl_rtl = copy_rtx (decl_rtl);
9019 /* Record writes to register variables. */
9020 if (modifier == EXPAND_WRITE
9021 && REG_P (decl_rtl)
9022 && HARD_REGISTER_P (decl_rtl))
9023 add_to_hard_reg_set (&crtl->asm_clobbers,
9024 GET_MODE (decl_rtl), REGNO (decl_rtl));
9025
9026 /* Ensure variable marked as used even if it doesn't go through
9027 a parser. If it hasn't be used yet, write out an external
9028 definition. */
9029 if (! TREE_USED (exp))
9030 {
9031 assemble_external (exp);
9032 TREE_USED (exp) = 1;
9033 }
9034
9035 /* Show we haven't gotten RTL for this yet. */
9036 temp = 0;
9037
9038 /* Variables inherited from containing functions should have
9039 been lowered by this point. */
9040 context = decl_function_context (exp);
9041 gcc_assert (!context
9042 || context == current_function_decl
9043 || TREE_STATIC (exp)
9044 || DECL_EXTERNAL (exp)
9045 /* ??? C++ creates functions that are not TREE_STATIC. */
9046 || TREE_CODE (exp) == FUNCTION_DECL);
9047
9048 /* This is the case of an array whose size is to be determined
9049 from its initializer, while the initializer is still being parsed.
9050 See expand_decl. */
9051
9052 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9053 temp = validize_mem (decl_rtl);
9054
9055 /* If DECL_RTL is memory, we are in the normal case and the
9056 address is not valid, get the address into a register. */
9057
9058 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9059 {
9060 if (alt_rtl)
9061 *alt_rtl = decl_rtl;
9062 decl_rtl = use_anchored_address (decl_rtl);
9063 if (modifier != EXPAND_CONST_ADDRESS
9064 && modifier != EXPAND_SUM
9065 && !memory_address_addr_space_p (DECL_MODE (exp),
9066 XEXP (decl_rtl, 0),
9067 MEM_ADDR_SPACE (decl_rtl)))
9068 temp = replace_equiv_address (decl_rtl,
9069 copy_rtx (XEXP (decl_rtl, 0)));
9070 }
9071
9072 /* If we got something, return it. But first, set the alignment
9073 if the address is a register. */
9074 if (temp != 0)
9075 {
9076 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9077 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9078
9079 return temp;
9080 }
9081
9082 /* If the mode of DECL_RTL does not match that of the decl,
9083 there are two cases: we are dealing with a BLKmode value
9084 that is returned in a register, or we are dealing with
9085 a promoted value. In the latter case, return a SUBREG
9086 of the wanted mode, but mark it so that we know that it
9087 was already extended. */
9088 if (REG_P (decl_rtl)
9089 && DECL_MODE (exp) != BLKmode
9090 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9091 {
9092 enum machine_mode pmode;
9093
9094 /* Get the signedness to be used for this variable. Ensure we get
9095 the same mode we got when the variable was declared. */
9096 if (code == SSA_NAME
9097 && (g = SSA_NAME_DEF_STMT (ssa_name))
9098 && gimple_code (g) == GIMPLE_CALL)
9099 {
9100 gcc_assert (!gimple_call_internal_p (g));
9101 pmode = promote_function_mode (type, mode, &unsignedp,
9102 gimple_call_fntype (g),
9103 2);
9104 }
9105 else
9106 pmode = promote_decl_mode (exp, &unsignedp);
9107 gcc_assert (GET_MODE (decl_rtl) == pmode);
9108
9109 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9110 SUBREG_PROMOTED_VAR_P (temp) = 1;
9111 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
9112 return temp;
9113 }
9114
9115 return decl_rtl;
9116
9117 case INTEGER_CST:
9118 temp = immed_double_const (TREE_INT_CST_LOW (exp),
9119 TREE_INT_CST_HIGH (exp), mode);
9120
9121 return temp;
9122
9123 case VECTOR_CST:
9124 {
9125 tree tmp = NULL_TREE;
9126 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9127 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9128 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9129 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9130 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9131 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9132 return const_vector_from_tree (exp);
9133 if (GET_MODE_CLASS (mode) == MODE_INT)
9134 {
9135 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9136 if (type_for_mode)
9137 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9138 }
9139 if (!tmp)
9140 tmp = build_constructor_from_list (type,
9141 TREE_VECTOR_CST_ELTS (exp));
9142 return expand_expr (tmp, ignore ? const0_rtx : target,
9143 tmode, modifier);
9144 }
9145
9146 case CONST_DECL:
9147 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9148
9149 case REAL_CST:
9150 /* If optimized, generate immediate CONST_DOUBLE
9151 which will be turned into memory by reload if necessary.
9152
9153 We used to force a register so that loop.c could see it. But
9154 this does not allow gen_* patterns to perform optimizations with
9155 the constants. It also produces two insns in cases like "x = 1.0;".
9156 On most machines, floating-point constants are not permitted in
9157 many insns, so we'd end up copying it to a register in any case.
9158
9159 Now, we do the copying in expand_binop, if appropriate. */
9160 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9161 TYPE_MODE (TREE_TYPE (exp)));
9162
9163 case FIXED_CST:
9164 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9165 TYPE_MODE (TREE_TYPE (exp)));
9166
9167 case COMPLEX_CST:
9168 /* Handle evaluating a complex constant in a CONCAT target. */
9169 if (original_target && GET_CODE (original_target) == CONCAT)
9170 {
9171 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9172 rtx rtarg, itarg;
9173
9174 rtarg = XEXP (original_target, 0);
9175 itarg = XEXP (original_target, 1);
9176
9177 /* Move the real and imaginary parts separately. */
9178 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9179 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9180
9181 if (op0 != rtarg)
9182 emit_move_insn (rtarg, op0);
9183 if (op1 != itarg)
9184 emit_move_insn (itarg, op1);
9185
9186 return original_target;
9187 }
9188
9189 /* ... fall through ... */
9190
9191 case STRING_CST:
9192 temp = expand_expr_constant (exp, 1, modifier);
9193
9194 /* temp contains a constant address.
9195 On RISC machines where a constant address isn't valid,
9196 make some insns to get that address into a register. */
9197 if (modifier != EXPAND_CONST_ADDRESS
9198 && modifier != EXPAND_INITIALIZER
9199 && modifier != EXPAND_SUM
9200 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9201 MEM_ADDR_SPACE (temp)))
9202 return replace_equiv_address (temp,
9203 copy_rtx (XEXP (temp, 0)));
9204 return temp;
9205
9206 case SAVE_EXPR:
9207 {
9208 tree val = treeop0;
9209 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
9210
9211 if (!SAVE_EXPR_RESOLVED_P (exp))
9212 {
9213 /* We can indeed still hit this case, typically via builtin
9214 expanders calling save_expr immediately before expanding
9215 something. Assume this means that we only have to deal
9216 with non-BLKmode values. */
9217 gcc_assert (GET_MODE (ret) != BLKmode);
9218
9219 val = build_decl (EXPR_LOCATION (exp),
9220 VAR_DECL, NULL, TREE_TYPE (exp));
9221 DECL_ARTIFICIAL (val) = 1;
9222 DECL_IGNORED_P (val) = 1;
9223 treeop0 = val;
9224 TREE_OPERAND (exp, 0) = treeop0;
9225 SAVE_EXPR_RESOLVED_P (exp) = 1;
9226
9227 if (!CONSTANT_P (ret))
9228 ret = copy_to_reg (ret);
9229 SET_DECL_RTL (val, ret);
9230 }
9231
9232 return ret;
9233 }
9234
9235
9236 case CONSTRUCTOR:
9237 /* If we don't need the result, just ensure we evaluate any
9238 subexpressions. */
9239 if (ignore)
9240 {
9241 unsigned HOST_WIDE_INT idx;
9242 tree value;
9243
9244 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9245 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9246
9247 return const0_rtx;
9248 }
9249
9250 return expand_constructor (exp, target, modifier, false);
9251
9252 case TARGET_MEM_REF:
9253 {
9254 addr_space_t as
9255 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9256 struct mem_address addr;
9257 enum insn_code icode;
9258 unsigned int align;
9259
9260 get_address_description (exp, &addr);
9261 op0 = addr_for_mem_ref (&addr, as, true);
9262 op0 = memory_address_addr_space (mode, op0, as);
9263 temp = gen_rtx_MEM (mode, op0);
9264 set_mem_attributes (temp, exp, 0);
9265 set_mem_addr_space (temp, as);
9266 align = get_object_or_type_alignment (exp);
9267 if (mode != BLKmode
9268 && align < GET_MODE_ALIGNMENT (mode)
9269 /* If the target does not have special handling for unaligned
9270 loads of mode then it can use regular moves for them. */
9271 && ((icode = optab_handler (movmisalign_optab, mode))
9272 != CODE_FOR_nothing))
9273 {
9274 struct expand_operand ops[2];
9275
9276 /* We've already validated the memory, and we're creating a
9277 new pseudo destination. The predicates really can't fail,
9278 nor can the generator. */
9279 create_output_operand (&ops[0], NULL_RTX, mode);
9280 create_fixed_operand (&ops[1], temp);
9281 expand_insn (icode, 2, ops);
9282 return ops[0].value;
9283 }
9284 return temp;
9285 }
9286
9287 case MEM_REF:
9288 {
9289 addr_space_t as
9290 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9291 enum machine_mode address_mode;
9292 tree base = TREE_OPERAND (exp, 0);
9293 gimple def_stmt;
9294 enum insn_code icode;
9295 unsigned align;
9296 /* Handle expansion of non-aliased memory with non-BLKmode. That
9297 might end up in a register. */
9298 if (TREE_CODE (base) == ADDR_EXPR)
9299 {
9300 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9301 tree bit_offset;
9302 base = TREE_OPERAND (base, 0);
9303 if (!DECL_P (base))
9304 {
9305 HOST_WIDE_INT off;
9306 base = get_addr_base_and_unit_offset (base, &off);
9307 gcc_assert (base);
9308 offset += off;
9309 }
9310 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
9311 decl we must use bitfield operations. */
9312 if (DECL_P (base)
9313 && !TREE_ADDRESSABLE (base)
9314 && DECL_MODE (base) != BLKmode
9315 && DECL_RTL_SET_P (base)
9316 && !MEM_P (DECL_RTL (base)))
9317 {
9318 tree bftype;
9319 if (offset == 0
9320 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9321 && (GET_MODE_BITSIZE (DECL_MODE (base))
9322 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9323 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9324 TREE_TYPE (exp), base),
9325 target, tmode, modifier);
9326 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9327 bftype = TREE_TYPE (base);
9328 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9329 bftype = TREE_TYPE (exp);
9330 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9331 base,
9332 TYPE_SIZE (TREE_TYPE (exp)),
9333 bit_offset),
9334 target, tmode, modifier);
9335 }
9336 }
9337 address_mode = targetm.addr_space.address_mode (as);
9338 base = TREE_OPERAND (exp, 0);
9339 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9340 {
9341 tree mask = gimple_assign_rhs2 (def_stmt);
9342 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9343 gimple_assign_rhs1 (def_stmt), mask);
9344 TREE_OPERAND (exp, 0) = base;
9345 }
9346 align = get_object_or_type_alignment (exp);
9347 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9348 op0 = memory_address_addr_space (address_mode, op0, as);
9349 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9350 {
9351 rtx off
9352 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9353 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9354 }
9355 op0 = memory_address_addr_space (mode, op0, as);
9356 temp = gen_rtx_MEM (mode, op0);
9357 set_mem_attributes (temp, exp, 0);
9358 set_mem_addr_space (temp, as);
9359 if (TREE_THIS_VOLATILE (exp))
9360 MEM_VOLATILE_P (temp) = 1;
9361 if (mode != BLKmode
9362 && align < GET_MODE_ALIGNMENT (mode)
9363 /* If the target does not have special handling for unaligned
9364 loads of mode then it can use regular moves for them. */
9365 && ((icode = optab_handler (movmisalign_optab, mode))
9366 != CODE_FOR_nothing))
9367 {
9368 struct expand_operand ops[2];
9369
9370 /* We've already validated the memory, and we're creating a
9371 new pseudo destination. The predicates really can't fail,
9372 nor can the generator. */
9373 create_output_operand (&ops[0], NULL_RTX, mode);
9374 create_fixed_operand (&ops[1], temp);
9375 expand_insn (icode, 2, ops);
9376 return ops[0].value;
9377 }
9378 return temp;
9379 }
9380
9381 case ARRAY_REF:
9382
9383 {
9384 tree array = treeop0;
9385 tree index = treeop1;
9386
9387 /* Fold an expression like: "foo"[2].
9388 This is not done in fold so it won't happen inside &.
9389 Don't fold if this is for wide characters since it's too
9390 difficult to do correctly and this is a very rare case. */
9391
9392 if (modifier != EXPAND_CONST_ADDRESS
9393 && modifier != EXPAND_INITIALIZER
9394 && modifier != EXPAND_MEMORY)
9395 {
9396 tree t = fold_read_from_constant_string (exp);
9397
9398 if (t)
9399 return expand_expr (t, target, tmode, modifier);
9400 }
9401
9402 /* If this is a constant index into a constant array,
9403 just get the value from the array. Handle both the cases when
9404 we have an explicit constructor and when our operand is a variable
9405 that was declared const. */
9406
9407 if (modifier != EXPAND_CONST_ADDRESS
9408 && modifier != EXPAND_INITIALIZER
9409 && modifier != EXPAND_MEMORY
9410 && TREE_CODE (array) == CONSTRUCTOR
9411 && ! TREE_SIDE_EFFECTS (array)
9412 && TREE_CODE (index) == INTEGER_CST)
9413 {
9414 unsigned HOST_WIDE_INT ix;
9415 tree field, value;
9416
9417 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9418 field, value)
9419 if (tree_int_cst_equal (field, index))
9420 {
9421 if (!TREE_SIDE_EFFECTS (value))
9422 return expand_expr (fold (value), target, tmode, modifier);
9423 break;
9424 }
9425 }
9426
9427 else if (optimize >= 1
9428 && modifier != EXPAND_CONST_ADDRESS
9429 && modifier != EXPAND_INITIALIZER
9430 && modifier != EXPAND_MEMORY
9431 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9432 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9433 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9434 && const_value_known_p (array))
9435 {
9436 if (TREE_CODE (index) == INTEGER_CST)
9437 {
9438 tree init = DECL_INITIAL (array);
9439
9440 if (TREE_CODE (init) == CONSTRUCTOR)
9441 {
9442 unsigned HOST_WIDE_INT ix;
9443 tree field, value;
9444
9445 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9446 field, value)
9447 if (tree_int_cst_equal (field, index))
9448 {
9449 if (TREE_SIDE_EFFECTS (value))
9450 break;
9451
9452 if (TREE_CODE (value) == CONSTRUCTOR)
9453 {
9454 /* If VALUE is a CONSTRUCTOR, this
9455 optimization is only useful if
9456 this doesn't store the CONSTRUCTOR
9457 into memory. If it does, it is more
9458 efficient to just load the data from
9459 the array directly. */
9460 rtx ret = expand_constructor (value, target,
9461 modifier, true);
9462 if (ret == NULL_RTX)
9463 break;
9464 }
9465
9466 return expand_expr (fold (value), target, tmode,
9467 modifier);
9468 }
9469 }
9470 else if(TREE_CODE (init) == STRING_CST)
9471 {
9472 tree index1 = index;
9473 tree low_bound = array_ref_low_bound (exp);
9474 index1 = fold_convert_loc (loc, sizetype,
9475 treeop1);
9476
9477 /* Optimize the special-case of a zero lower bound.
9478
9479 We convert the low_bound to sizetype to avoid some problems
9480 with constant folding. (E.g. suppose the lower bound is 1,
9481 and its mode is QI. Without the conversion,l (ARRAY
9482 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9483 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9484
9485 if (! integer_zerop (low_bound))
9486 index1 = size_diffop_loc (loc, index1,
9487 fold_convert_loc (loc, sizetype,
9488 low_bound));
9489
9490 if (0 > compare_tree_int (index1,
9491 TREE_STRING_LENGTH (init)))
9492 {
9493 tree type = TREE_TYPE (TREE_TYPE (init));
9494 enum machine_mode mode = TYPE_MODE (type);
9495
9496 if (GET_MODE_CLASS (mode) == MODE_INT
9497 && GET_MODE_SIZE (mode) == 1)
9498 return gen_int_mode (TREE_STRING_POINTER (init)
9499 [TREE_INT_CST_LOW (index1)],
9500 mode);
9501 }
9502 }
9503 }
9504 }
9505 }
9506 goto normal_inner_ref;
9507
9508 case COMPONENT_REF:
9509 /* If the operand is a CONSTRUCTOR, we can just extract the
9510 appropriate field if it is present. */
9511 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9512 {
9513 unsigned HOST_WIDE_INT idx;
9514 tree field, value;
9515
9516 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9517 idx, field, value)
9518 if (field == treeop1
9519 /* We can normally use the value of the field in the
9520 CONSTRUCTOR. However, if this is a bitfield in
9521 an integral mode that we can fit in a HOST_WIDE_INT,
9522 we must mask only the number of bits in the bitfield,
9523 since this is done implicitly by the constructor. If
9524 the bitfield does not meet either of those conditions,
9525 we can't do this optimization. */
9526 && (! DECL_BIT_FIELD (field)
9527 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9528 && (GET_MODE_PRECISION (DECL_MODE (field))
9529 <= HOST_BITS_PER_WIDE_INT))))
9530 {
9531 if (DECL_BIT_FIELD (field)
9532 && modifier == EXPAND_STACK_PARM)
9533 target = 0;
9534 op0 = expand_expr (value, target, tmode, modifier);
9535 if (DECL_BIT_FIELD (field))
9536 {
9537 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9538 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9539
9540 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9541 {
9542 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9543 op0 = expand_and (imode, op0, op1, target);
9544 }
9545 else
9546 {
9547 int count = GET_MODE_PRECISION (imode) - bitsize;
9548
9549 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9550 target, 0);
9551 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9552 target, 0);
9553 }
9554 }
9555
9556 return op0;
9557 }
9558 }
9559 goto normal_inner_ref;
9560
9561 case BIT_FIELD_REF:
9562 case ARRAY_RANGE_REF:
9563 normal_inner_ref:
9564 {
9565 enum machine_mode mode1, mode2;
9566 HOST_WIDE_INT bitsize, bitpos;
9567 tree offset;
9568 int volatilep = 0, must_force_mem;
9569 bool packedp = false;
9570 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9571 &mode1, &unsignedp, &volatilep, true);
9572 rtx orig_op0, memloc;
9573
9574 /* If we got back the original object, something is wrong. Perhaps
9575 we are evaluating an expression too early. In any event, don't
9576 infinitely recurse. */
9577 gcc_assert (tem != exp);
9578
9579 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9580 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9581 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9582 packedp = true;
9583
9584 /* If TEM's type is a union of variable size, pass TARGET to the inner
9585 computation, since it will need a temporary and TARGET is known
9586 to have to do. This occurs in unchecked conversion in Ada. */
9587 orig_op0 = op0
9588 = expand_expr (tem,
9589 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9590 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9591 != INTEGER_CST)
9592 && modifier != EXPAND_STACK_PARM
9593 ? target : NULL_RTX),
9594 VOIDmode,
9595 (modifier == EXPAND_INITIALIZER
9596 || modifier == EXPAND_CONST_ADDRESS
9597 || modifier == EXPAND_STACK_PARM)
9598 ? modifier : EXPAND_NORMAL);
9599
9600
9601 /* If the bitfield is volatile, we want to access it in the
9602 field's mode, not the computed mode.
9603 If a MEM has VOIDmode (external with incomplete type),
9604 use BLKmode for it instead. */
9605 if (MEM_P (op0))
9606 {
9607 if (volatilep && flag_strict_volatile_bitfields > 0)
9608 op0 = adjust_address (op0, mode1, 0);
9609 else if (GET_MODE (op0) == VOIDmode)
9610 op0 = adjust_address (op0, BLKmode, 0);
9611 }
9612
9613 mode2
9614 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9615
9616 /* If we have either an offset, a BLKmode result, or a reference
9617 outside the underlying object, we must force it to memory.
9618 Such a case can occur in Ada if we have unchecked conversion
9619 of an expression from a scalar type to an aggregate type or
9620 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9621 passed a partially uninitialized object or a view-conversion
9622 to a larger size. */
9623 must_force_mem = (offset
9624 || mode1 == BLKmode
9625 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9626
9627 /* Handle CONCAT first. */
9628 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9629 {
9630 if (bitpos == 0
9631 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9632 return op0;
9633 if (bitpos == 0
9634 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9635 && bitsize)
9636 {
9637 op0 = XEXP (op0, 0);
9638 mode2 = GET_MODE (op0);
9639 }
9640 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9641 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9642 && bitpos
9643 && bitsize)
9644 {
9645 op0 = XEXP (op0, 1);
9646 bitpos = 0;
9647 mode2 = GET_MODE (op0);
9648 }
9649 else
9650 /* Otherwise force into memory. */
9651 must_force_mem = 1;
9652 }
9653
9654 /* If this is a constant, put it in a register if it is a legitimate
9655 constant and we don't need a memory reference. */
9656 if (CONSTANT_P (op0)
9657 && mode2 != BLKmode
9658 && targetm.legitimate_constant_p (mode2, op0)
9659 && !must_force_mem)
9660 op0 = force_reg (mode2, op0);
9661
9662 /* Otherwise, if this is a constant, try to force it to the constant
9663 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9664 is a legitimate constant. */
9665 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9666 op0 = validize_mem (memloc);
9667
9668 /* Otherwise, if this is a constant or the object is not in memory
9669 and need be, put it there. */
9670 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9671 {
9672 tree nt = build_qualified_type (TREE_TYPE (tem),
9673 (TYPE_QUALS (TREE_TYPE (tem))
9674 | TYPE_QUAL_CONST));
9675 memloc = assign_temp (nt, 1, 1, 1);
9676 emit_move_insn (memloc, op0);
9677 op0 = memloc;
9678 }
9679
9680 if (offset)
9681 {
9682 enum machine_mode address_mode;
9683 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9684 EXPAND_SUM);
9685
9686 gcc_assert (MEM_P (op0));
9687
9688 address_mode
9689 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9690 if (GET_MODE (offset_rtx) != address_mode)
9691 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9692
9693 if (GET_MODE (op0) == BLKmode
9694 /* A constant address in OP0 can have VOIDmode, we must
9695 not try to call force_reg in that case. */
9696 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9697 && bitsize != 0
9698 && (bitpos % bitsize) == 0
9699 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9700 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9701 {
9702 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9703 bitpos = 0;
9704 }
9705
9706 op0 = offset_address (op0, offset_rtx,
9707 highest_pow2_factor (offset));
9708 }
9709
9710 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9711 record its alignment as BIGGEST_ALIGNMENT. */
9712 if (MEM_P (op0) && bitpos == 0 && offset != 0
9713 && is_aligning_offset (offset, tem))
9714 set_mem_align (op0, BIGGEST_ALIGNMENT);
9715
9716 /* Don't forget about volatility even if this is a bitfield. */
9717 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9718 {
9719 if (op0 == orig_op0)
9720 op0 = copy_rtx (op0);
9721
9722 MEM_VOLATILE_P (op0) = 1;
9723 }
9724
9725 /* In cases where an aligned union has an unaligned object
9726 as a field, we might be extracting a BLKmode value from
9727 an integer-mode (e.g., SImode) object. Handle this case
9728 by doing the extract into an object as wide as the field
9729 (which we know to be the width of a basic mode), then
9730 storing into memory, and changing the mode to BLKmode. */
9731 if (mode1 == VOIDmode
9732 || REG_P (op0) || GET_CODE (op0) == SUBREG
9733 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9734 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9735 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9736 && modifier != EXPAND_CONST_ADDRESS
9737 && modifier != EXPAND_INITIALIZER)
9738 /* If the field is volatile, we always want an aligned
9739 access. Do this in following two situations:
9740 1. the access is not already naturally
9741 aligned, otherwise "normal" (non-bitfield) volatile fields
9742 become non-addressable.
9743 2. the bitsize is narrower than the access size. Need
9744 to extract bitfields from the access. */
9745 || (volatilep && flag_strict_volatile_bitfields > 0
9746 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0
9747 || (mode1 != BLKmode
9748 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)))
9749 /* If the field isn't aligned enough to fetch as a memref,
9750 fetch it as a bit field. */
9751 || (mode1 != BLKmode
9752 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9753 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9754 || (MEM_P (op0)
9755 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9756 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9757 && ((modifier == EXPAND_CONST_ADDRESS
9758 || modifier == EXPAND_INITIALIZER)
9759 ? STRICT_ALIGNMENT
9760 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9761 || (bitpos % BITS_PER_UNIT != 0)))
9762 /* If the type and the field are a constant size and the
9763 size of the type isn't the same size as the bitfield,
9764 we must use bitfield operations. */
9765 || (bitsize >= 0
9766 && TYPE_SIZE (TREE_TYPE (exp))
9767 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9768 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9769 bitsize)))
9770 {
9771 enum machine_mode ext_mode = mode;
9772
9773 if (ext_mode == BLKmode
9774 && ! (target != 0 && MEM_P (op0)
9775 && MEM_P (target)
9776 && bitpos % BITS_PER_UNIT == 0))
9777 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9778
9779 if (ext_mode == BLKmode)
9780 {
9781 if (target == 0)
9782 target = assign_temp (type, 0, 1, 1);
9783
9784 if (bitsize == 0)
9785 return target;
9786
9787 /* In this case, BITPOS must start at a byte boundary and
9788 TARGET, if specified, must be a MEM. */
9789 gcc_assert (MEM_P (op0)
9790 && (!target || MEM_P (target))
9791 && !(bitpos % BITS_PER_UNIT));
9792
9793 emit_block_move (target,
9794 adjust_address (op0, VOIDmode,
9795 bitpos / BITS_PER_UNIT),
9796 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9797 / BITS_PER_UNIT),
9798 (modifier == EXPAND_STACK_PARM
9799 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9800
9801 return target;
9802 }
9803
9804 op0 = validize_mem (op0);
9805
9806 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9807 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9808
9809 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
9810 (modifier == EXPAND_STACK_PARM
9811 ? NULL_RTX : target),
9812 ext_mode, ext_mode);
9813
9814 /* If the result is a record type and BITSIZE is narrower than
9815 the mode of OP0, an integral mode, and this is a big endian
9816 machine, we must put the field into the high-order bits. */
9817 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
9818 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
9819 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
9820 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
9821 GET_MODE_BITSIZE (GET_MODE (op0))
9822 - bitsize, op0, 1);
9823
9824 /* If the result type is BLKmode, store the data into a temporary
9825 of the appropriate type, but with the mode corresponding to the
9826 mode for the data we have (op0's mode). It's tempting to make
9827 this a constant type, since we know it's only being stored once,
9828 but that can cause problems if we are taking the address of this
9829 COMPONENT_REF because the MEM of any reference via that address
9830 will have flags corresponding to the type, which will not
9831 necessarily be constant. */
9832 if (mode == BLKmode)
9833 {
9834 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
9835 rtx new_rtx;
9836
9837 /* If the reference doesn't use the alias set of its type,
9838 we cannot create the temporary using that type. */
9839 if (component_uses_parent_alias_set (exp))
9840 {
9841 new_rtx = assign_stack_local (ext_mode, size, 0);
9842 set_mem_alias_set (new_rtx, get_alias_set (exp));
9843 }
9844 else
9845 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
9846
9847 emit_move_insn (new_rtx, op0);
9848 op0 = copy_rtx (new_rtx);
9849 PUT_MODE (op0, BLKmode);
9850 set_mem_attributes (op0, exp, 1);
9851 }
9852
9853 return op0;
9854 }
9855
9856 /* If the result is BLKmode, use that to access the object
9857 now as well. */
9858 if (mode == BLKmode)
9859 mode1 = BLKmode;
9860
9861 /* Get a reference to just this component. */
9862 if (modifier == EXPAND_CONST_ADDRESS
9863 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
9864 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
9865 else
9866 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9867
9868 if (op0 == orig_op0)
9869 op0 = copy_rtx (op0);
9870
9871 set_mem_attributes (op0, exp, 0);
9872 if (REG_P (XEXP (op0, 0)))
9873 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9874
9875 MEM_VOLATILE_P (op0) |= volatilep;
9876 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
9877 || modifier == EXPAND_CONST_ADDRESS
9878 || modifier == EXPAND_INITIALIZER)
9879 return op0;
9880 else if (target == 0)
9881 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9882
9883 convert_move (target, op0, unsignedp);
9884 return target;
9885 }
9886
9887 case OBJ_TYPE_REF:
9888 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
9889
9890 case CALL_EXPR:
9891 /* All valid uses of __builtin_va_arg_pack () are removed during
9892 inlining. */
9893 if (CALL_EXPR_VA_ARG_PACK (exp))
9894 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
9895 {
9896 tree fndecl = get_callee_fndecl (exp), attr;
9897
9898 if (fndecl
9899 && (attr = lookup_attribute ("error",
9900 DECL_ATTRIBUTES (fndecl))) != NULL)
9901 error ("%Kcall to %qs declared with attribute error: %s",
9902 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9903 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9904 if (fndecl
9905 && (attr = lookup_attribute ("warning",
9906 DECL_ATTRIBUTES (fndecl))) != NULL)
9907 warning_at (tree_nonartificial_location (exp),
9908 0, "%Kcall to %qs declared with attribute warning: %s",
9909 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9910 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9911
9912 /* Check for a built-in function. */
9913 if (fndecl && DECL_BUILT_IN (fndecl))
9914 {
9915 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
9916 return expand_builtin (exp, target, subtarget, tmode, ignore);
9917 }
9918 }
9919 return expand_call (exp, target, ignore);
9920
9921 case VIEW_CONVERT_EXPR:
9922 op0 = NULL_RTX;
9923
9924 /* If we are converting to BLKmode, try to avoid an intermediate
9925 temporary by fetching an inner memory reference. */
9926 if (mode == BLKmode
9927 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9928 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
9929 && handled_component_p (treeop0))
9930 {
9931 enum machine_mode mode1;
9932 HOST_WIDE_INT bitsize, bitpos;
9933 tree offset;
9934 int unsignedp;
9935 int volatilep = 0;
9936 tree tem
9937 = get_inner_reference (treeop0, &bitsize, &bitpos,
9938 &offset, &mode1, &unsignedp, &volatilep,
9939 true);
9940 rtx orig_op0;
9941
9942 /* ??? We should work harder and deal with non-zero offsets. */
9943 if (!offset
9944 && (bitpos % BITS_PER_UNIT) == 0
9945 && bitsize >= 0
9946 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
9947 {
9948 /* See the normal_inner_ref case for the rationale. */
9949 orig_op0
9950 = expand_expr (tem,
9951 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9952 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9953 != INTEGER_CST)
9954 && modifier != EXPAND_STACK_PARM
9955 ? target : NULL_RTX),
9956 VOIDmode,
9957 (modifier == EXPAND_INITIALIZER
9958 || modifier == EXPAND_CONST_ADDRESS
9959 || modifier == EXPAND_STACK_PARM)
9960 ? modifier : EXPAND_NORMAL);
9961
9962 if (MEM_P (orig_op0))
9963 {
9964 op0 = orig_op0;
9965
9966 /* Get a reference to just this component. */
9967 if (modifier == EXPAND_CONST_ADDRESS
9968 || modifier == EXPAND_SUM
9969 || modifier == EXPAND_INITIALIZER)
9970 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
9971 else
9972 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
9973
9974 if (op0 == orig_op0)
9975 op0 = copy_rtx (op0);
9976
9977 set_mem_attributes (op0, treeop0, 0);
9978 if (REG_P (XEXP (op0, 0)))
9979 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9980
9981 MEM_VOLATILE_P (op0) |= volatilep;
9982 }
9983 }
9984 }
9985
9986 if (!op0)
9987 op0 = expand_expr (treeop0,
9988 NULL_RTX, VOIDmode, modifier);
9989
9990 /* If the input and output modes are both the same, we are done. */
9991 if (mode == GET_MODE (op0))
9992 ;
9993 /* If neither mode is BLKmode, and both modes are the same size
9994 then we can use gen_lowpart. */
9995 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
9996 && (GET_MODE_PRECISION (mode)
9997 == GET_MODE_PRECISION (GET_MODE (op0)))
9998 && !COMPLEX_MODE_P (GET_MODE (op0)))
9999 {
10000 if (GET_CODE (op0) == SUBREG)
10001 op0 = force_reg (GET_MODE (op0), op0);
10002 temp = gen_lowpart_common (mode, op0);
10003 if (temp)
10004 op0 = temp;
10005 else
10006 {
10007 if (!REG_P (op0) && !MEM_P (op0))
10008 op0 = force_reg (GET_MODE (op0), op0);
10009 op0 = gen_lowpart (mode, op0);
10010 }
10011 }
10012 /* If both types are integral, convert from one mode to the other. */
10013 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10014 op0 = convert_modes (mode, GET_MODE (op0), op0,
10015 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10016 /* As a last resort, spill op0 to memory, and reload it in a
10017 different mode. */
10018 else if (!MEM_P (op0))
10019 {
10020 /* If the operand is not a MEM, force it into memory. Since we
10021 are going to be changing the mode of the MEM, don't call
10022 force_const_mem for constants because we don't allow pool
10023 constants to change mode. */
10024 tree inner_type = TREE_TYPE (treeop0);
10025
10026 gcc_assert (!TREE_ADDRESSABLE (exp));
10027
10028 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10029 target
10030 = assign_stack_temp_for_type
10031 (TYPE_MODE (inner_type),
10032 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
10033
10034 emit_move_insn (target, op0);
10035 op0 = target;
10036 }
10037
10038 /* At this point, OP0 is in the correct mode. If the output type is
10039 such that the operand is known to be aligned, indicate that it is.
10040 Otherwise, we need only be concerned about alignment for non-BLKmode
10041 results. */
10042 if (MEM_P (op0))
10043 {
10044 enum insn_code icode;
10045
10046 op0 = copy_rtx (op0);
10047
10048 if (TYPE_ALIGN_OK (type))
10049 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10050 else if (mode != BLKmode
10051 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)
10052 /* If the target does have special handling for unaligned
10053 loads of mode then use them. */
10054 && ((icode = optab_handler (movmisalign_optab, mode))
10055 != CODE_FOR_nothing))
10056 {
10057 rtx reg, insn;
10058
10059 op0 = adjust_address (op0, mode, 0);
10060 /* We've already validated the memory, and we're creating a
10061 new pseudo destination. The predicates really can't
10062 fail. */
10063 reg = gen_reg_rtx (mode);
10064
10065 /* Nor can the insn generator. */
10066 insn = GEN_FCN (icode) (reg, op0);
10067 emit_insn (insn);
10068 return reg;
10069 }
10070 else if (STRICT_ALIGNMENT
10071 && mode != BLKmode
10072 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10073 {
10074 tree inner_type = TREE_TYPE (treeop0);
10075 HOST_WIDE_INT temp_size
10076 = MAX (int_size_in_bytes (inner_type),
10077 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10078 rtx new_rtx
10079 = assign_stack_temp_for_type (mode, temp_size, 0, type);
10080 rtx new_with_op0_mode
10081 = adjust_address (new_rtx, GET_MODE (op0), 0);
10082
10083 gcc_assert (!TREE_ADDRESSABLE (exp));
10084
10085 if (GET_MODE (op0) == BLKmode)
10086 emit_block_move (new_with_op0_mode, op0,
10087 GEN_INT (GET_MODE_SIZE (mode)),
10088 (modifier == EXPAND_STACK_PARM
10089 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10090 else
10091 emit_move_insn (new_with_op0_mode, op0);
10092
10093 op0 = new_rtx;
10094 }
10095
10096 op0 = adjust_address (op0, mode, 0);
10097 }
10098
10099 return op0;
10100
10101 case MODIFY_EXPR:
10102 {
10103 tree lhs = treeop0;
10104 tree rhs = treeop1;
10105 gcc_assert (ignore);
10106
10107 /* Check for |= or &= of a bitfield of size one into another bitfield
10108 of size 1. In this case, (unless we need the result of the
10109 assignment) we can do this more efficiently with a
10110 test followed by an assignment, if necessary.
10111
10112 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10113 things change so we do, this code should be enhanced to
10114 support it. */
10115 if (TREE_CODE (lhs) == COMPONENT_REF
10116 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10117 || TREE_CODE (rhs) == BIT_AND_EXPR)
10118 && TREE_OPERAND (rhs, 0) == lhs
10119 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10120 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10121 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10122 {
10123 rtx label = gen_label_rtx ();
10124 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10125 do_jump (TREE_OPERAND (rhs, 1),
10126 value ? label : 0,
10127 value ? 0 : label, -1);
10128 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10129 MOVE_NONTEMPORAL (exp));
10130 do_pending_stack_adjust ();
10131 emit_label (label);
10132 return const0_rtx;
10133 }
10134
10135 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
10136 return const0_rtx;
10137 }
10138
10139 case ADDR_EXPR:
10140 return expand_expr_addr_expr (exp, target, tmode, modifier);
10141
10142 case REALPART_EXPR:
10143 op0 = expand_normal (treeop0);
10144 return read_complex_part (op0, false);
10145
10146 case IMAGPART_EXPR:
10147 op0 = expand_normal (treeop0);
10148 return read_complex_part (op0, true);
10149
10150 case RETURN_EXPR:
10151 case LABEL_EXPR:
10152 case GOTO_EXPR:
10153 case SWITCH_EXPR:
10154 case ASM_EXPR:
10155 /* Expanded in cfgexpand.c. */
10156 gcc_unreachable ();
10157
10158 case TRY_CATCH_EXPR:
10159 case CATCH_EXPR:
10160 case EH_FILTER_EXPR:
10161 case TRY_FINALLY_EXPR:
10162 /* Lowered by tree-eh.c. */
10163 gcc_unreachable ();
10164
10165 case WITH_CLEANUP_EXPR:
10166 case CLEANUP_POINT_EXPR:
10167 case TARGET_EXPR:
10168 case CASE_LABEL_EXPR:
10169 case VA_ARG_EXPR:
10170 case BIND_EXPR:
10171 case INIT_EXPR:
10172 case CONJ_EXPR:
10173 case COMPOUND_EXPR:
10174 case PREINCREMENT_EXPR:
10175 case PREDECREMENT_EXPR:
10176 case POSTINCREMENT_EXPR:
10177 case POSTDECREMENT_EXPR:
10178 case LOOP_EXPR:
10179 case EXIT_EXPR:
10180 /* Lowered by gimplify.c. */
10181 gcc_unreachable ();
10182
10183 case FDESC_EXPR:
10184 /* Function descriptors are not valid except for as
10185 initialization constants, and should not be expanded. */
10186 gcc_unreachable ();
10187
10188 case WITH_SIZE_EXPR:
10189 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10190 have pulled out the size to use in whatever context it needed. */
10191 return expand_expr_real (treeop0, original_target, tmode,
10192 modifier, alt_rtl);
10193
10194 case COMPOUND_LITERAL_EXPR:
10195 {
10196 /* Initialize the anonymous variable declared in the compound
10197 literal, then return the variable. */
10198 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
10199
10200 /* Create RTL for this variable. */
10201 if (!DECL_RTL_SET_P (decl))
10202 {
10203 if (DECL_HARD_REGISTER (decl))
10204 /* The user specified an assembler name for this variable.
10205 Set that up now. */
10206 rest_of_decl_compilation (decl, 0, 0);
10207 else
10208 expand_decl (decl);
10209 }
10210
10211 return expand_expr_real (decl, original_target, tmode,
10212 modifier, alt_rtl);
10213 }
10214
10215 default:
10216 return expand_expr_real_2 (&ops, target, tmode, modifier);
10217 }
10218 }
10219 \f
10220 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10221 signedness of TYPE), possibly returning the result in TARGET. */
10222 static rtx
10223 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10224 {
10225 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10226 if (target && GET_MODE (target) != GET_MODE (exp))
10227 target = 0;
10228 /* For constant values, reduce using build_int_cst_type. */
10229 if (CONST_INT_P (exp))
10230 {
10231 HOST_WIDE_INT value = INTVAL (exp);
10232 tree t = build_int_cst_type (type, value);
10233 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10234 }
10235 else if (TYPE_UNSIGNED (type))
10236 {
10237 rtx mask = immed_double_int_const (double_int_mask (prec),
10238 GET_MODE (exp));
10239 return expand_and (GET_MODE (exp), exp, mask, target);
10240 }
10241 else
10242 {
10243 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10244 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10245 exp, count, target, 0);
10246 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10247 exp, count, target, 0);
10248 }
10249 }
10250 \f
10251 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10252 when applied to the address of EXP produces an address known to be
10253 aligned more than BIGGEST_ALIGNMENT. */
10254
10255 static int
10256 is_aligning_offset (const_tree offset, const_tree exp)
10257 {
10258 /* Strip off any conversions. */
10259 while (CONVERT_EXPR_P (offset))
10260 offset = TREE_OPERAND (offset, 0);
10261
10262 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10263 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10264 if (TREE_CODE (offset) != BIT_AND_EXPR
10265 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10266 || compare_tree_int (TREE_OPERAND (offset, 1),
10267 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10268 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10269 return 0;
10270
10271 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10272 It must be NEGATE_EXPR. Then strip any more conversions. */
10273 offset = TREE_OPERAND (offset, 0);
10274 while (CONVERT_EXPR_P (offset))
10275 offset = TREE_OPERAND (offset, 0);
10276
10277 if (TREE_CODE (offset) != NEGATE_EXPR)
10278 return 0;
10279
10280 offset = TREE_OPERAND (offset, 0);
10281 while (CONVERT_EXPR_P (offset))
10282 offset = TREE_OPERAND (offset, 0);
10283
10284 /* This must now be the address of EXP. */
10285 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10286 }
10287 \f
10288 /* Return the tree node if an ARG corresponds to a string constant or zero
10289 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10290 in bytes within the string that ARG is accessing. The type of the
10291 offset will be `sizetype'. */
10292
10293 tree
10294 string_constant (tree arg, tree *ptr_offset)
10295 {
10296 tree array, offset, lower_bound;
10297 STRIP_NOPS (arg);
10298
10299 if (TREE_CODE (arg) == ADDR_EXPR)
10300 {
10301 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10302 {
10303 *ptr_offset = size_zero_node;
10304 return TREE_OPERAND (arg, 0);
10305 }
10306 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10307 {
10308 array = TREE_OPERAND (arg, 0);
10309 offset = size_zero_node;
10310 }
10311 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10312 {
10313 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10314 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10315 if (TREE_CODE (array) != STRING_CST
10316 && TREE_CODE (array) != VAR_DECL)
10317 return 0;
10318
10319 /* Check if the array has a nonzero lower bound. */
10320 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10321 if (!integer_zerop (lower_bound))
10322 {
10323 /* If the offset and base aren't both constants, return 0. */
10324 if (TREE_CODE (lower_bound) != INTEGER_CST)
10325 return 0;
10326 if (TREE_CODE (offset) != INTEGER_CST)
10327 return 0;
10328 /* Adjust offset by the lower bound. */
10329 offset = size_diffop (fold_convert (sizetype, offset),
10330 fold_convert (sizetype, lower_bound));
10331 }
10332 }
10333 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10334 {
10335 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10336 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10337 if (TREE_CODE (array) != ADDR_EXPR)
10338 return 0;
10339 array = TREE_OPERAND (array, 0);
10340 if (TREE_CODE (array) != STRING_CST
10341 && TREE_CODE (array) != VAR_DECL)
10342 return 0;
10343 }
10344 else
10345 return 0;
10346 }
10347 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10348 {
10349 tree arg0 = TREE_OPERAND (arg, 0);
10350 tree arg1 = TREE_OPERAND (arg, 1);
10351
10352 STRIP_NOPS (arg0);
10353 STRIP_NOPS (arg1);
10354
10355 if (TREE_CODE (arg0) == ADDR_EXPR
10356 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10357 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10358 {
10359 array = TREE_OPERAND (arg0, 0);
10360 offset = arg1;
10361 }
10362 else if (TREE_CODE (arg1) == ADDR_EXPR
10363 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10364 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10365 {
10366 array = TREE_OPERAND (arg1, 0);
10367 offset = arg0;
10368 }
10369 else
10370 return 0;
10371 }
10372 else
10373 return 0;
10374
10375 if (TREE_CODE (array) == STRING_CST)
10376 {
10377 *ptr_offset = fold_convert (sizetype, offset);
10378 return array;
10379 }
10380 else if (TREE_CODE (array) == VAR_DECL
10381 || TREE_CODE (array) == CONST_DECL)
10382 {
10383 int length;
10384
10385 /* Variables initialized to string literals can be handled too. */
10386 if (!const_value_known_p (array)
10387 || !DECL_INITIAL (array)
10388 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10389 return 0;
10390
10391 /* Avoid const char foo[4] = "abcde"; */
10392 if (DECL_SIZE_UNIT (array) == NULL_TREE
10393 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10394 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10395 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10396 return 0;
10397
10398 /* If variable is bigger than the string literal, OFFSET must be constant
10399 and inside of the bounds of the string literal. */
10400 offset = fold_convert (sizetype, offset);
10401 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10402 && (! host_integerp (offset, 1)
10403 || compare_tree_int (offset, length) >= 0))
10404 return 0;
10405
10406 *ptr_offset = offset;
10407 return DECL_INITIAL (array);
10408 }
10409
10410 return 0;
10411 }
10412 \f
10413 /* Generate code to calculate OPS, and exploded expression
10414 using a store-flag instruction and return an rtx for the result.
10415 OPS reflects a comparison.
10416
10417 If TARGET is nonzero, store the result there if convenient.
10418
10419 Return zero if there is no suitable set-flag instruction
10420 available on this machine.
10421
10422 Once expand_expr has been called on the arguments of the comparison,
10423 we are committed to doing the store flag, since it is not safe to
10424 re-evaluate the expression. We emit the store-flag insn by calling
10425 emit_store_flag, but only expand the arguments if we have a reason
10426 to believe that emit_store_flag will be successful. If we think that
10427 it will, but it isn't, we have to simulate the store-flag with a
10428 set/jump/set sequence. */
10429
10430 static rtx
10431 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10432 {
10433 enum rtx_code code;
10434 tree arg0, arg1, type;
10435 tree tem;
10436 enum machine_mode operand_mode;
10437 int unsignedp;
10438 rtx op0, op1;
10439 rtx subtarget = target;
10440 location_t loc = ops->location;
10441
10442 arg0 = ops->op0;
10443 arg1 = ops->op1;
10444
10445 /* Don't crash if the comparison was erroneous. */
10446 if (arg0 == error_mark_node || arg1 == error_mark_node)
10447 return const0_rtx;
10448
10449 type = TREE_TYPE (arg0);
10450 operand_mode = TYPE_MODE (type);
10451 unsignedp = TYPE_UNSIGNED (type);
10452
10453 /* We won't bother with BLKmode store-flag operations because it would mean
10454 passing a lot of information to emit_store_flag. */
10455 if (operand_mode == BLKmode)
10456 return 0;
10457
10458 /* We won't bother with store-flag operations involving function pointers
10459 when function pointers must be canonicalized before comparisons. */
10460 #ifdef HAVE_canonicalize_funcptr_for_compare
10461 if (HAVE_canonicalize_funcptr_for_compare
10462 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10463 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10464 == FUNCTION_TYPE))
10465 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10466 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10467 == FUNCTION_TYPE))))
10468 return 0;
10469 #endif
10470
10471 STRIP_NOPS (arg0);
10472 STRIP_NOPS (arg1);
10473
10474 /* For vector typed comparisons emit code to generate the desired
10475 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10476 expander for this. */
10477 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10478 {
10479 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10480 tree if_true = constant_boolean_node (true, ops->type);
10481 tree if_false = constant_boolean_node (false, ops->type);
10482 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10483 }
10484
10485 /* For vector typed comparisons emit code to generate the desired
10486 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10487 expander for this. */
10488 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10489 {
10490 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10491 tree if_true = constant_boolean_node (true, ops->type);
10492 tree if_false = constant_boolean_node (false, ops->type);
10493 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10494 }
10495
10496 /* Get the rtx comparison code to use. We know that EXP is a comparison
10497 operation of some type. Some comparisons against 1 and -1 can be
10498 converted to comparisons with zero. Do so here so that the tests
10499 below will be aware that we have a comparison with zero. These
10500 tests will not catch constants in the first operand, but constants
10501 are rarely passed as the first operand. */
10502
10503 switch (ops->code)
10504 {
10505 case EQ_EXPR:
10506 code = EQ;
10507 break;
10508 case NE_EXPR:
10509 code = NE;
10510 break;
10511 case LT_EXPR:
10512 if (integer_onep (arg1))
10513 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10514 else
10515 code = unsignedp ? LTU : LT;
10516 break;
10517 case LE_EXPR:
10518 if (! unsignedp && integer_all_onesp (arg1))
10519 arg1 = integer_zero_node, code = LT;
10520 else
10521 code = unsignedp ? LEU : LE;
10522 break;
10523 case GT_EXPR:
10524 if (! unsignedp && integer_all_onesp (arg1))
10525 arg1 = integer_zero_node, code = GE;
10526 else
10527 code = unsignedp ? GTU : GT;
10528 break;
10529 case GE_EXPR:
10530 if (integer_onep (arg1))
10531 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10532 else
10533 code = unsignedp ? GEU : GE;
10534 break;
10535
10536 case UNORDERED_EXPR:
10537 code = UNORDERED;
10538 break;
10539 case ORDERED_EXPR:
10540 code = ORDERED;
10541 break;
10542 case UNLT_EXPR:
10543 code = UNLT;
10544 break;
10545 case UNLE_EXPR:
10546 code = UNLE;
10547 break;
10548 case UNGT_EXPR:
10549 code = UNGT;
10550 break;
10551 case UNGE_EXPR:
10552 code = UNGE;
10553 break;
10554 case UNEQ_EXPR:
10555 code = UNEQ;
10556 break;
10557 case LTGT_EXPR:
10558 code = LTGT;
10559 break;
10560
10561 default:
10562 gcc_unreachable ();
10563 }
10564
10565 /* Put a constant second. */
10566 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10567 || TREE_CODE (arg0) == FIXED_CST)
10568 {
10569 tem = arg0; arg0 = arg1; arg1 = tem;
10570 code = swap_condition (code);
10571 }
10572
10573 /* If this is an equality or inequality test of a single bit, we can
10574 do this by shifting the bit being tested to the low-order bit and
10575 masking the result with the constant 1. If the condition was EQ,
10576 we xor it with 1. This does not require an scc insn and is faster
10577 than an scc insn even if we have it.
10578
10579 The code to make this transformation was moved into fold_single_bit_test,
10580 so we just call into the folder and expand its result. */
10581
10582 if ((code == NE || code == EQ)
10583 && integer_zerop (arg1)
10584 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10585 {
10586 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
10587 if (srcstmt
10588 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
10589 {
10590 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
10591 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10592 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
10593 gimple_assign_rhs1 (srcstmt),
10594 gimple_assign_rhs2 (srcstmt));
10595 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
10596 if (temp)
10597 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
10598 }
10599 }
10600
10601 if (! get_subtarget (target)
10602 || GET_MODE (subtarget) != operand_mode)
10603 subtarget = 0;
10604
10605 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10606
10607 if (target == 0)
10608 target = gen_reg_rtx (mode);
10609
10610 /* Try a cstore if possible. */
10611 return emit_store_flag_force (target, code, op0, op1,
10612 operand_mode, unsignedp,
10613 (TYPE_PRECISION (ops->type) == 1
10614 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10615 }
10616 \f
10617
10618 /* Stubs in case we haven't got a casesi insn. */
10619 #ifndef HAVE_casesi
10620 # define HAVE_casesi 0
10621 # define gen_casesi(a, b, c, d, e) (0)
10622 # define CODE_FOR_casesi CODE_FOR_nothing
10623 #endif
10624
10625 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10626 0 otherwise (i.e. if there is no casesi instruction). */
10627 int
10628 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10629 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10630 rtx fallback_label ATTRIBUTE_UNUSED)
10631 {
10632 struct expand_operand ops[5];
10633 enum machine_mode index_mode = SImode;
10634 int index_bits = GET_MODE_BITSIZE (index_mode);
10635 rtx op1, op2, index;
10636
10637 if (! HAVE_casesi)
10638 return 0;
10639
10640 /* Convert the index to SImode. */
10641 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10642 {
10643 enum machine_mode omode = TYPE_MODE (index_type);
10644 rtx rangertx = expand_normal (range);
10645
10646 /* We must handle the endpoints in the original mode. */
10647 index_expr = build2 (MINUS_EXPR, index_type,
10648 index_expr, minval);
10649 minval = integer_zero_node;
10650 index = expand_normal (index_expr);
10651 if (default_label)
10652 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10653 omode, 1, default_label);
10654 /* Now we can safely truncate. */
10655 index = convert_to_mode (index_mode, index, 0);
10656 }
10657 else
10658 {
10659 if (TYPE_MODE (index_type) != index_mode)
10660 {
10661 index_type = lang_hooks.types.type_for_size (index_bits, 0);
10662 index_expr = fold_convert (index_type, index_expr);
10663 }
10664
10665 index = expand_normal (index_expr);
10666 }
10667
10668 do_pending_stack_adjust ();
10669
10670 op1 = expand_normal (minval);
10671 op2 = expand_normal (range);
10672
10673 create_input_operand (&ops[0], index, index_mode);
10674 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10675 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10676 create_fixed_operand (&ops[3], table_label);
10677 create_fixed_operand (&ops[4], (default_label
10678 ? default_label
10679 : fallback_label));
10680 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10681 return 1;
10682 }
10683
10684 /* Attempt to generate a tablejump instruction; same concept. */
10685 #ifndef HAVE_tablejump
10686 #define HAVE_tablejump 0
10687 #define gen_tablejump(x, y) (0)
10688 #endif
10689
10690 /* Subroutine of the next function.
10691
10692 INDEX is the value being switched on, with the lowest value
10693 in the table already subtracted.
10694 MODE is its expected mode (needed if INDEX is constant).
10695 RANGE is the length of the jump table.
10696 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10697
10698 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10699 index value is out of range. */
10700
10701 static void
10702 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10703 rtx default_label)
10704 {
10705 rtx temp, vector;
10706
10707 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10708 cfun->cfg->max_jumptable_ents = INTVAL (range);
10709
10710 /* Do an unsigned comparison (in the proper mode) between the index
10711 expression and the value which represents the length of the range.
10712 Since we just finished subtracting the lower bound of the range
10713 from the index expression, this comparison allows us to simultaneously
10714 check that the original index expression value is both greater than
10715 or equal to the minimum value of the range and less than or equal to
10716 the maximum value of the range. */
10717
10718 if (default_label)
10719 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10720 default_label);
10721
10722 /* If index is in range, it must fit in Pmode.
10723 Convert to Pmode so we can index with it. */
10724 if (mode != Pmode)
10725 index = convert_to_mode (Pmode, index, 1);
10726
10727 /* Don't let a MEM slip through, because then INDEX that comes
10728 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10729 and break_out_memory_refs will go to work on it and mess it up. */
10730 #ifdef PIC_CASE_VECTOR_ADDRESS
10731 if (flag_pic && !REG_P (index))
10732 index = copy_to_mode_reg (Pmode, index);
10733 #endif
10734
10735 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10736 GET_MODE_SIZE, because this indicates how large insns are. The other
10737 uses should all be Pmode, because they are addresses. This code
10738 could fail if addresses and insns are not the same size. */
10739 index = gen_rtx_PLUS (Pmode,
10740 gen_rtx_MULT (Pmode, index,
10741 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10742 gen_rtx_LABEL_REF (Pmode, table_label));
10743 #ifdef PIC_CASE_VECTOR_ADDRESS
10744 if (flag_pic)
10745 index = PIC_CASE_VECTOR_ADDRESS (index);
10746 else
10747 #endif
10748 index = memory_address (CASE_VECTOR_MODE, index);
10749 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10750 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10751 convert_move (temp, vector, 0);
10752
10753 emit_jump_insn (gen_tablejump (temp, table_label));
10754
10755 /* If we are generating PIC code or if the table is PC-relative, the
10756 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10757 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10758 emit_barrier ();
10759 }
10760
10761 int
10762 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10763 rtx table_label, rtx default_label)
10764 {
10765 rtx index;
10766
10767 if (! HAVE_tablejump)
10768 return 0;
10769
10770 index_expr = fold_build2 (MINUS_EXPR, index_type,
10771 fold_convert (index_type, index_expr),
10772 fold_convert (index_type, minval));
10773 index = expand_normal (index_expr);
10774 do_pending_stack_adjust ();
10775
10776 do_tablejump (index, TYPE_MODE (index_type),
10777 convert_modes (TYPE_MODE (index_type),
10778 TYPE_MODE (TREE_TYPE (range)),
10779 expand_normal (range),
10780 TYPE_UNSIGNED (TREE_TYPE (range))),
10781 table_label, default_label);
10782 return 1;
10783 }
10784
10785 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10786 static rtx
10787 const_vector_from_tree (tree exp)
10788 {
10789 rtvec v;
10790 int units, i;
10791 tree link, elt;
10792 enum machine_mode inner, mode;
10793
10794 mode = TYPE_MODE (TREE_TYPE (exp));
10795
10796 if (initializer_zerop (exp))
10797 return CONST0_RTX (mode);
10798
10799 units = GET_MODE_NUNITS (mode);
10800 inner = GET_MODE_INNER (mode);
10801
10802 v = rtvec_alloc (units);
10803
10804 link = TREE_VECTOR_CST_ELTS (exp);
10805 for (i = 0; link; link = TREE_CHAIN (link), ++i)
10806 {
10807 elt = TREE_VALUE (link);
10808
10809 if (TREE_CODE (elt) == REAL_CST)
10810 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10811 inner);
10812 else if (TREE_CODE (elt) == FIXED_CST)
10813 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10814 inner);
10815 else
10816 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10817 inner);
10818 }
10819
10820 /* Initialize remaining elements to 0. */
10821 for (; i < units; ++i)
10822 RTVEC_ELT (v, i) = CONST0_RTX (inner);
10823
10824 return gen_rtx_CONST_VECTOR (mode, v);
10825 }
10826
10827 /* Build a decl for a personality function given a language prefix. */
10828
10829 tree
10830 build_personality_function (const char *lang)
10831 {
10832 const char *unwind_and_version;
10833 tree decl, type;
10834 char *name;
10835
10836 switch (targetm_common.except_unwind_info (&global_options))
10837 {
10838 case UI_NONE:
10839 return NULL;
10840 case UI_SJLJ:
10841 unwind_and_version = "_sj0";
10842 break;
10843 case UI_DWARF2:
10844 case UI_TARGET:
10845 unwind_and_version = "_v0";
10846 break;
10847 default:
10848 gcc_unreachable ();
10849 }
10850
10851 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
10852
10853 type = build_function_type_list (integer_type_node, integer_type_node,
10854 long_long_unsigned_type_node,
10855 ptr_type_node, ptr_type_node, NULL_TREE);
10856 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
10857 get_identifier (name), type);
10858 DECL_ARTIFICIAL (decl) = 1;
10859 DECL_EXTERNAL (decl) = 1;
10860 TREE_PUBLIC (decl) = 1;
10861
10862 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
10863 are the flags assigned by targetm.encode_section_info. */
10864 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
10865
10866 return decl;
10867 }
10868
10869 /* Extracts the personality function of DECL and returns the corresponding
10870 libfunc. */
10871
10872 rtx
10873 get_personality_function (tree decl)
10874 {
10875 tree personality = DECL_FUNCTION_PERSONALITY (decl);
10876 enum eh_personality_kind pk;
10877
10878 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
10879 if (pk == eh_personality_none)
10880 return NULL;
10881
10882 if (!personality
10883 && pk == eh_personality_any)
10884 personality = lang_hooks.eh_personality ();
10885
10886 if (pk == eh_personality_lang)
10887 gcc_assert (personality != NULL_TREE);
10888
10889 return XEXP (DECL_RTL (personality), 0);
10890 }
10891
10892 #include "gt-expr.h"