expr.c (get_def_for_expr_class): New function.
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
4 2012 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "common/common-target.h"
53 #include "timevar.h"
54 #include "df.h"
55 #include "diagnostic.h"
56 #include "ssaexpand.h"
57 #include "target-globals.h"
58 #include "params.h"
59
60 /* Decide whether a function's arguments should be processed
61 from first to last or from last to first.
62
63 They should if the stack and args grow in opposite directions, but
64 only if we have push insns. */
65
66 #ifdef PUSH_ROUNDING
67
68 #ifndef PUSH_ARGS_REVERSED
69 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
70 #define PUSH_ARGS_REVERSED /* If it's last to first. */
71 #endif
72 #endif
73
74 #endif
75
76 #ifndef STACK_PUSH_CODE
77 #ifdef STACK_GROWS_DOWNWARD
78 #define STACK_PUSH_CODE PRE_DEC
79 #else
80 #define STACK_PUSH_CODE PRE_INC
81 #endif
82 #endif
83
84
85 /* If this is nonzero, we do not bother generating VOLATILE
86 around volatile memory references, and we are willing to
87 output indirect addresses. If cse is to follow, we reject
88 indirect addresses so a useful potential cse is generated;
89 if it is used only once, instruction combination will produce
90 the same indirect address eventually. */
91 int cse_not_expected;
92
93 /* This structure is used by move_by_pieces to describe the move to
94 be performed. */
95 struct move_by_pieces_d
96 {
97 rtx to;
98 rtx to_addr;
99 int autinc_to;
100 int explicit_inc_to;
101 rtx from;
102 rtx from_addr;
103 int autinc_from;
104 int explicit_inc_from;
105 unsigned HOST_WIDE_INT len;
106 HOST_WIDE_INT offset;
107 int reverse;
108 };
109
110 /* This structure is used by store_by_pieces to describe the clear to
111 be performed. */
112
113 struct store_by_pieces_d
114 {
115 rtx to;
116 rtx to_addr;
117 int autinc_to;
118 int explicit_inc_to;
119 unsigned HOST_WIDE_INT len;
120 HOST_WIDE_INT offset;
121 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
122 void *constfundata;
123 int reverse;
124 };
125
126 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
127 struct move_by_pieces_d *);
128 static bool block_move_libcall_safe_for_call_parm (void);
129 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
130 static tree emit_block_move_libcall_fn (int);
131 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
132 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
133 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
134 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
135 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
136 struct store_by_pieces_d *);
137 static tree clear_storage_libcall_fn (int);
138 static rtx compress_float_constant (rtx, rtx);
139 static rtx get_subtarget (rtx);
140 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
141 HOST_WIDE_INT, enum machine_mode,
142 tree, tree, int, alias_set_type);
143 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
144 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
145 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
146 enum machine_mode,
147 tree, tree, alias_set_type, bool);
148
149 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
150
151 static int is_aligning_offset (const_tree, const_tree);
152 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
153 enum expand_modifier);
154 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
155 static rtx do_store_flag (sepops, rtx, enum machine_mode);
156 #ifdef PUSH_ROUNDING
157 static void emit_single_push_insn (enum machine_mode, rtx, tree);
158 #endif
159 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
160 static rtx const_vector_from_tree (tree);
161 static void write_complex_part (rtx, rtx, bool);
162
163 /* This macro is used to determine whether move_by_pieces should be called
164 to perform a structure copy. */
165 #ifndef MOVE_BY_PIECES_P
166 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
167 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
168 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
169 #endif
170
171 /* This macro is used to determine whether clear_by_pieces should be
172 called to clear storage. */
173 #ifndef CLEAR_BY_PIECES_P
174 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
175 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
176 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
177 #endif
178
179 /* This macro is used to determine whether store_by_pieces should be
180 called to "memset" storage with byte values other than zero. */
181 #ifndef SET_BY_PIECES_P
182 #define SET_BY_PIECES_P(SIZE, ALIGN) \
183 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
184 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
185 #endif
186
187 /* This macro is used to determine whether store_by_pieces should be
188 called to "memcpy" storage when the source is a constant string. */
189 #ifndef STORE_BY_PIECES_P
190 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
191 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
192 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
193 #endif
194
195 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
196
197 #ifndef SLOW_UNALIGNED_ACCESS
198 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
199 #endif
200 \f
201 /* This is run to set up which modes can be used
202 directly in memory and to initialize the block move optab. It is run
203 at the beginning of compilation and when the target is reinitialized. */
204
205 void
206 init_expr_target (void)
207 {
208 rtx insn, pat;
209 enum machine_mode mode;
210 int num_clobbers;
211 rtx mem, mem1;
212 rtx reg;
213
214 /* Try indexing by frame ptr and try by stack ptr.
215 It is known that on the Convex the stack ptr isn't a valid index.
216 With luck, one or the other is valid on any machine. */
217 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
218 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
219
220 /* A scratch register we can modify in-place below to avoid
221 useless RTL allocations. */
222 reg = gen_rtx_REG (VOIDmode, -1);
223
224 insn = rtx_alloc (INSN);
225 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
226 PATTERN (insn) = pat;
227
228 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
229 mode = (enum machine_mode) ((int) mode + 1))
230 {
231 int regno;
232
233 direct_load[(int) mode] = direct_store[(int) mode] = 0;
234 PUT_MODE (mem, mode);
235 PUT_MODE (mem1, mode);
236 PUT_MODE (reg, mode);
237
238 /* See if there is some register that can be used in this mode and
239 directly loaded or stored from memory. */
240
241 if (mode != VOIDmode && mode != BLKmode)
242 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
243 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
244 regno++)
245 {
246 if (! HARD_REGNO_MODE_OK (regno, mode))
247 continue;
248
249 SET_REGNO (reg, regno);
250
251 SET_SRC (pat) = mem;
252 SET_DEST (pat) = reg;
253 if (recog (pat, insn, &num_clobbers) >= 0)
254 direct_load[(int) mode] = 1;
255
256 SET_SRC (pat) = mem1;
257 SET_DEST (pat) = reg;
258 if (recog (pat, insn, &num_clobbers) >= 0)
259 direct_load[(int) mode] = 1;
260
261 SET_SRC (pat) = reg;
262 SET_DEST (pat) = mem;
263 if (recog (pat, insn, &num_clobbers) >= 0)
264 direct_store[(int) mode] = 1;
265
266 SET_SRC (pat) = reg;
267 SET_DEST (pat) = mem1;
268 if (recog (pat, insn, &num_clobbers) >= 0)
269 direct_store[(int) mode] = 1;
270 }
271 }
272
273 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
274
275 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
276 mode = GET_MODE_WIDER_MODE (mode))
277 {
278 enum machine_mode srcmode;
279 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
280 srcmode = GET_MODE_WIDER_MODE (srcmode))
281 {
282 enum insn_code ic;
283
284 ic = can_extend_p (mode, srcmode, 0);
285 if (ic == CODE_FOR_nothing)
286 continue;
287
288 PUT_MODE (mem, srcmode);
289
290 if (insn_operand_matches (ic, 1, mem))
291 float_extend_from_mem[mode][srcmode] = true;
292 }
293 }
294 }
295
296 /* This is run at the start of compiling a function. */
297
298 void
299 init_expr (void)
300 {
301 memset (&crtl->expr, 0, sizeof (crtl->expr));
302 }
303 \f
304 /* Copy data from FROM to TO, where the machine modes are not the same.
305 Both modes may be integer, or both may be floating, or both may be
306 fixed-point.
307 UNSIGNEDP should be nonzero if FROM is an unsigned type.
308 This causes zero-extension instead of sign-extension. */
309
310 void
311 convert_move (rtx to, rtx from, int unsignedp)
312 {
313 enum machine_mode to_mode = GET_MODE (to);
314 enum machine_mode from_mode = GET_MODE (from);
315 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
316 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
317 enum insn_code code;
318 rtx libcall;
319
320 /* rtx code for making an equivalent value. */
321 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
322 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
323
324
325 gcc_assert (to_real == from_real);
326 gcc_assert (to_mode != BLKmode);
327 gcc_assert (from_mode != BLKmode);
328
329 /* If the source and destination are already the same, then there's
330 nothing to do. */
331 if (to == from)
332 return;
333
334 /* If FROM is a SUBREG that indicates that we have already done at least
335 the required extension, strip it. We don't handle such SUBREGs as
336 TO here. */
337
338 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
339 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
340 >= GET_MODE_PRECISION (to_mode))
341 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
342 from = gen_lowpart (to_mode, from), from_mode = to_mode;
343
344 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
345
346 if (to_mode == from_mode
347 || (from_mode == VOIDmode && CONSTANT_P (from)))
348 {
349 emit_move_insn (to, from);
350 return;
351 }
352
353 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
354 {
355 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
356
357 if (VECTOR_MODE_P (to_mode))
358 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
359 else
360 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
361
362 emit_move_insn (to, from);
363 return;
364 }
365
366 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
367 {
368 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
369 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
370 return;
371 }
372
373 if (to_real)
374 {
375 rtx value, insns;
376 convert_optab tab;
377
378 gcc_assert ((GET_MODE_PRECISION (from_mode)
379 != GET_MODE_PRECISION (to_mode))
380 || (DECIMAL_FLOAT_MODE_P (from_mode)
381 != DECIMAL_FLOAT_MODE_P (to_mode)));
382
383 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
384 /* Conversion between decimal float and binary float, same size. */
385 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
386 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
387 tab = sext_optab;
388 else
389 tab = trunc_optab;
390
391 /* Try converting directly if the insn is supported. */
392
393 code = convert_optab_handler (tab, to_mode, from_mode);
394 if (code != CODE_FOR_nothing)
395 {
396 emit_unop_insn (code, to, from,
397 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
398 return;
399 }
400
401 /* Otherwise use a libcall. */
402 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
403
404 /* Is this conversion implemented yet? */
405 gcc_assert (libcall);
406
407 start_sequence ();
408 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
409 1, from, from_mode);
410 insns = get_insns ();
411 end_sequence ();
412 emit_libcall_block (insns, to, value,
413 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
414 from)
415 : gen_rtx_FLOAT_EXTEND (to_mode, from));
416 return;
417 }
418
419 /* Handle pointer conversion. */ /* SPEE 900220. */
420 /* Targets are expected to provide conversion insns between PxImode and
421 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
422 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
423 {
424 enum machine_mode full_mode
425 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
426
427 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
428 != CODE_FOR_nothing);
429
430 if (full_mode != from_mode)
431 from = convert_to_mode (full_mode, from, unsignedp);
432 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
433 to, from, UNKNOWN);
434 return;
435 }
436 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
437 {
438 rtx new_from;
439 enum machine_mode full_mode
440 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
441 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
442 enum insn_code icode;
443
444 icode = convert_optab_handler (ctab, full_mode, from_mode);
445 gcc_assert (icode != CODE_FOR_nothing);
446
447 if (to_mode == full_mode)
448 {
449 emit_unop_insn (icode, to, from, UNKNOWN);
450 return;
451 }
452
453 new_from = gen_reg_rtx (full_mode);
454 emit_unop_insn (icode, new_from, from, UNKNOWN);
455
456 /* else proceed to integer conversions below. */
457 from_mode = full_mode;
458 from = new_from;
459 }
460
461 /* Make sure both are fixed-point modes or both are not. */
462 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
463 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
464 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
465 {
466 /* If we widen from_mode to to_mode and they are in the same class,
467 we won't saturate the result.
468 Otherwise, always saturate the result to play safe. */
469 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
470 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
471 expand_fixed_convert (to, from, 0, 0);
472 else
473 expand_fixed_convert (to, from, 0, 1);
474 return;
475 }
476
477 /* Now both modes are integers. */
478
479 /* Handle expanding beyond a word. */
480 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
481 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
482 {
483 rtx insns;
484 rtx lowpart;
485 rtx fill_value;
486 rtx lowfrom;
487 int i;
488 enum machine_mode lowpart_mode;
489 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
490
491 /* Try converting directly if the insn is supported. */
492 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
493 != CODE_FOR_nothing)
494 {
495 /* If FROM is a SUBREG, put it into a register. Do this
496 so that we always generate the same set of insns for
497 better cse'ing; if an intermediate assignment occurred,
498 we won't be doing the operation directly on the SUBREG. */
499 if (optimize > 0 && GET_CODE (from) == SUBREG)
500 from = force_reg (from_mode, from);
501 emit_unop_insn (code, to, from, equiv_code);
502 return;
503 }
504 /* Next, try converting via full word. */
505 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
506 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
507 != CODE_FOR_nothing))
508 {
509 rtx word_to = gen_reg_rtx (word_mode);
510 if (REG_P (to))
511 {
512 if (reg_overlap_mentioned_p (to, from))
513 from = force_reg (from_mode, from);
514 emit_clobber (to);
515 }
516 convert_move (word_to, from, unsignedp);
517 emit_unop_insn (code, to, word_to, equiv_code);
518 return;
519 }
520
521 /* No special multiword conversion insn; do it by hand. */
522 start_sequence ();
523
524 /* Since we will turn this into a no conflict block, we must ensure
525 that the source does not overlap the target. */
526
527 if (reg_overlap_mentioned_p (to, from))
528 from = force_reg (from_mode, from);
529
530 /* Get a copy of FROM widened to a word, if necessary. */
531 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
532 lowpart_mode = word_mode;
533 else
534 lowpart_mode = from_mode;
535
536 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
537
538 lowpart = gen_lowpart (lowpart_mode, to);
539 emit_move_insn (lowpart, lowfrom);
540
541 /* Compute the value to put in each remaining word. */
542 if (unsignedp)
543 fill_value = const0_rtx;
544 else
545 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
546 LT, lowfrom, const0_rtx,
547 VOIDmode, 0, -1);
548
549 /* Fill the remaining words. */
550 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
551 {
552 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
553 rtx subword = operand_subword (to, index, 1, to_mode);
554
555 gcc_assert (subword);
556
557 if (fill_value != subword)
558 emit_move_insn (subword, fill_value);
559 }
560
561 insns = get_insns ();
562 end_sequence ();
563
564 emit_insn (insns);
565 return;
566 }
567
568 /* Truncating multi-word to a word or less. */
569 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
570 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
571 {
572 if (!((MEM_P (from)
573 && ! MEM_VOLATILE_P (from)
574 && direct_load[(int) to_mode]
575 && ! mode_dependent_address_p (XEXP (from, 0)))
576 || REG_P (from)
577 || GET_CODE (from) == SUBREG))
578 from = force_reg (from_mode, from);
579 convert_move (to, gen_lowpart (word_mode, from), 0);
580 return;
581 }
582
583 /* Now follow all the conversions between integers
584 no more than a word long. */
585
586 /* For truncation, usually we can just refer to FROM in a narrower mode. */
587 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
588 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
589 {
590 if (!((MEM_P (from)
591 && ! MEM_VOLATILE_P (from)
592 && direct_load[(int) to_mode]
593 && ! mode_dependent_address_p (XEXP (from, 0)))
594 || REG_P (from)
595 || GET_CODE (from) == SUBREG))
596 from = force_reg (from_mode, from);
597 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
598 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
599 from = copy_to_reg (from);
600 emit_move_insn (to, gen_lowpart (to_mode, from));
601 return;
602 }
603
604 /* Handle extension. */
605 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
606 {
607 /* Convert directly if that works. */
608 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
609 != CODE_FOR_nothing)
610 {
611 emit_unop_insn (code, to, from, equiv_code);
612 return;
613 }
614 else
615 {
616 enum machine_mode intermediate;
617 rtx tmp;
618 int shift_amount;
619
620 /* Search for a mode to convert via. */
621 for (intermediate = from_mode; intermediate != VOIDmode;
622 intermediate = GET_MODE_WIDER_MODE (intermediate))
623 if (((can_extend_p (to_mode, intermediate, unsignedp)
624 != CODE_FOR_nothing)
625 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
626 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
627 && (can_extend_p (intermediate, from_mode, unsignedp)
628 != CODE_FOR_nothing))
629 {
630 convert_move (to, convert_to_mode (intermediate, from,
631 unsignedp), unsignedp);
632 return;
633 }
634
635 /* No suitable intermediate mode.
636 Generate what we need with shifts. */
637 shift_amount = (GET_MODE_PRECISION (to_mode)
638 - GET_MODE_PRECISION (from_mode));
639 from = gen_lowpart (to_mode, force_reg (from_mode, from));
640 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
641 to, unsignedp);
642 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
643 to, unsignedp);
644 if (tmp != to)
645 emit_move_insn (to, tmp);
646 return;
647 }
648 }
649
650 /* Support special truncate insns for certain modes. */
651 if (convert_optab_handler (trunc_optab, to_mode,
652 from_mode) != CODE_FOR_nothing)
653 {
654 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
655 to, from, UNKNOWN);
656 return;
657 }
658
659 /* Handle truncation of volatile memrefs, and so on;
660 the things that couldn't be truncated directly,
661 and for which there was no special instruction.
662
663 ??? Code above formerly short-circuited this, for most integer
664 mode pairs, with a force_reg in from_mode followed by a recursive
665 call to this routine. Appears always to have been wrong. */
666 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
667 {
668 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
669 emit_move_insn (to, temp);
670 return;
671 }
672
673 /* Mode combination is not recognized. */
674 gcc_unreachable ();
675 }
676
677 /* Return an rtx for a value that would result
678 from converting X to mode MODE.
679 Both X and MODE may be floating, or both integer.
680 UNSIGNEDP is nonzero if X is an unsigned value.
681 This can be done by referring to a part of X in place
682 or by copying to a new temporary with conversion. */
683
684 rtx
685 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
686 {
687 return convert_modes (mode, VOIDmode, x, unsignedp);
688 }
689
690 /* Return an rtx for a value that would result
691 from converting X from mode OLDMODE to mode MODE.
692 Both modes may be floating, or both integer.
693 UNSIGNEDP is nonzero if X is an unsigned value.
694
695 This can be done by referring to a part of X in place
696 or by copying to a new temporary with conversion.
697
698 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
699
700 rtx
701 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
702 {
703 rtx temp;
704
705 /* If FROM is a SUBREG that indicates that we have already done at least
706 the required extension, strip it. */
707
708 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
709 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
710 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
711 x = gen_lowpart (mode, x);
712
713 if (GET_MODE (x) != VOIDmode)
714 oldmode = GET_MODE (x);
715
716 if (mode == oldmode)
717 return x;
718
719 /* There is one case that we must handle specially: If we are converting
720 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
721 we are to interpret the constant as unsigned, gen_lowpart will do
722 the wrong if the constant appears negative. What we want to do is
723 make the high-order word of the constant zero, not all ones. */
724
725 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
726 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
727 && CONST_INT_P (x) && INTVAL (x) < 0)
728 {
729 double_int val = uhwi_to_double_int (INTVAL (x));
730
731 /* We need to zero extend VAL. */
732 if (oldmode != VOIDmode)
733 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
734
735 return immed_double_int_const (val, mode);
736 }
737
738 /* We can do this with a gen_lowpart if both desired and current modes
739 are integer, and this is either a constant integer, a register, or a
740 non-volatile MEM. Except for the constant case where MODE is no
741 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
742
743 if ((CONST_INT_P (x)
744 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
745 || (GET_MODE_CLASS (mode) == MODE_INT
746 && GET_MODE_CLASS (oldmode) == MODE_INT
747 && (GET_CODE (x) == CONST_DOUBLE
748 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
749 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
750 && direct_load[(int) mode])
751 || (REG_P (x)
752 && (! HARD_REGISTER_P (x)
753 || HARD_REGNO_MODE_OK (REGNO (x), mode))
754 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
755 GET_MODE (x))))))))
756 {
757 /* ?? If we don't know OLDMODE, we have to assume here that
758 X does not need sign- or zero-extension. This may not be
759 the case, but it's the best we can do. */
760 if (CONST_INT_P (x) && oldmode != VOIDmode
761 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
762 {
763 HOST_WIDE_INT val = INTVAL (x);
764
765 /* We must sign or zero-extend in this case. Start by
766 zero-extending, then sign extend if we need to. */
767 val &= GET_MODE_MASK (oldmode);
768 if (! unsignedp
769 && val_signbit_known_set_p (oldmode, val))
770 val |= ~GET_MODE_MASK (oldmode);
771
772 return gen_int_mode (val, mode);
773 }
774
775 return gen_lowpart (mode, x);
776 }
777
778 /* Converting from integer constant into mode is always equivalent to an
779 subreg operation. */
780 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
781 {
782 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
783 return simplify_gen_subreg (mode, x, oldmode, 0);
784 }
785
786 temp = gen_reg_rtx (mode);
787 convert_move (temp, x, unsignedp);
788 return temp;
789 }
790 \f
791 /* Return the largest alignment we can use for doing a move (or store)
792 of MAX_PIECES. ALIGN is the largest alignment we could use. */
793
794 static unsigned int
795 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
796 {
797 enum machine_mode tmode;
798
799 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
800 if (align >= GET_MODE_ALIGNMENT (tmode))
801 align = GET_MODE_ALIGNMENT (tmode);
802 else
803 {
804 enum machine_mode tmode, xmode;
805
806 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
807 tmode != VOIDmode;
808 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
809 if (GET_MODE_SIZE (tmode) > max_pieces
810 || SLOW_UNALIGNED_ACCESS (tmode, align))
811 break;
812
813 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
814 }
815
816 return align;
817 }
818
819 /* Return the widest integer mode no wider than SIZE. If no such mode
820 can be found, return VOIDmode. */
821
822 static enum machine_mode
823 widest_int_mode_for_size (unsigned int size)
824 {
825 enum machine_mode tmode, mode = VOIDmode;
826
827 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
828 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
829 if (GET_MODE_SIZE (tmode) < size)
830 mode = tmode;
831
832 return mode;
833 }
834
835 /* STORE_MAX_PIECES is the number of bytes at a time that we can
836 store efficiently. Due to internal GCC limitations, this is
837 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
838 for an immediate constant. */
839
840 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
841
842 /* Determine whether the LEN bytes can be moved by using several move
843 instructions. Return nonzero if a call to move_by_pieces should
844 succeed. */
845
846 int
847 can_move_by_pieces (unsigned HOST_WIDE_INT len,
848 unsigned int align ATTRIBUTE_UNUSED)
849 {
850 return MOVE_BY_PIECES_P (len, align);
851 }
852
853 /* Generate several move instructions to copy LEN bytes from block FROM to
854 block TO. (These are MEM rtx's with BLKmode).
855
856 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
857 used to push FROM to the stack.
858
859 ALIGN is maximum stack alignment we can assume.
860
861 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
862 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
863 stpcpy. */
864
865 rtx
866 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
867 unsigned int align, int endp)
868 {
869 struct move_by_pieces_d data;
870 enum machine_mode to_addr_mode, from_addr_mode
871 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
872 rtx to_addr, from_addr = XEXP (from, 0);
873 unsigned int max_size = MOVE_MAX_PIECES + 1;
874 enum insn_code icode;
875
876 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
877
878 data.offset = 0;
879 data.from_addr = from_addr;
880 if (to)
881 {
882 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
883 to_addr = XEXP (to, 0);
884 data.to = to;
885 data.autinc_to
886 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
887 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
888 data.reverse
889 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
890 }
891 else
892 {
893 to_addr_mode = VOIDmode;
894 to_addr = NULL_RTX;
895 data.to = NULL_RTX;
896 data.autinc_to = 1;
897 #ifdef STACK_GROWS_DOWNWARD
898 data.reverse = 1;
899 #else
900 data.reverse = 0;
901 #endif
902 }
903 data.to_addr = to_addr;
904 data.from = from;
905 data.autinc_from
906 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
907 || GET_CODE (from_addr) == POST_INC
908 || GET_CODE (from_addr) == POST_DEC);
909
910 data.explicit_inc_from = 0;
911 data.explicit_inc_to = 0;
912 if (data.reverse) data.offset = len;
913 data.len = len;
914
915 /* If copying requires more than two move insns,
916 copy addresses to registers (to make displacements shorter)
917 and use post-increment if available. */
918 if (!(data.autinc_from && data.autinc_to)
919 && move_by_pieces_ninsns (len, align, max_size) > 2)
920 {
921 /* Find the mode of the largest move...
922 MODE might not be used depending on the definitions of the
923 USE_* macros below. */
924 enum machine_mode mode ATTRIBUTE_UNUSED
925 = widest_int_mode_for_size (max_size);
926
927 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
928 {
929 data.from_addr = copy_to_mode_reg (from_addr_mode,
930 plus_constant (from_addr, len));
931 data.autinc_from = 1;
932 data.explicit_inc_from = -1;
933 }
934 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
935 {
936 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
937 data.autinc_from = 1;
938 data.explicit_inc_from = 1;
939 }
940 if (!data.autinc_from && CONSTANT_P (from_addr))
941 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
942 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
943 {
944 data.to_addr = copy_to_mode_reg (to_addr_mode,
945 plus_constant (to_addr, len));
946 data.autinc_to = 1;
947 data.explicit_inc_to = -1;
948 }
949 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
950 {
951 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
952 data.autinc_to = 1;
953 data.explicit_inc_to = 1;
954 }
955 if (!data.autinc_to && CONSTANT_P (to_addr))
956 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
957 }
958
959 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
960
961 /* First move what we can in the largest integer mode, then go to
962 successively smaller modes. */
963
964 while (max_size > 1)
965 {
966 enum machine_mode mode = widest_int_mode_for_size (max_size);
967
968 if (mode == VOIDmode)
969 break;
970
971 icode = optab_handler (mov_optab, mode);
972 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
973 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
974
975 max_size = GET_MODE_SIZE (mode);
976 }
977
978 /* The code above should have handled everything. */
979 gcc_assert (!data.len);
980
981 if (endp)
982 {
983 rtx to1;
984
985 gcc_assert (!data.reverse);
986 if (data.autinc_to)
987 {
988 if (endp == 2)
989 {
990 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
991 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
992 else
993 data.to_addr = copy_to_mode_reg (to_addr_mode,
994 plus_constant (data.to_addr,
995 -1));
996 }
997 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
998 data.offset);
999 }
1000 else
1001 {
1002 if (endp == 2)
1003 --data.offset;
1004 to1 = adjust_address (data.to, QImode, data.offset);
1005 }
1006 return to1;
1007 }
1008 else
1009 return data.to;
1010 }
1011
1012 /* Return number of insns required to move L bytes by pieces.
1013 ALIGN (in bits) is maximum alignment we can assume. */
1014
1015 unsigned HOST_WIDE_INT
1016 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1017 unsigned int max_size)
1018 {
1019 unsigned HOST_WIDE_INT n_insns = 0;
1020
1021 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1022
1023 while (max_size > 1)
1024 {
1025 enum machine_mode mode;
1026 enum insn_code icode;
1027
1028 mode = widest_int_mode_for_size (max_size);
1029
1030 if (mode == VOIDmode)
1031 break;
1032
1033 icode = optab_handler (mov_optab, mode);
1034 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1035 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1036
1037 max_size = GET_MODE_SIZE (mode);
1038 }
1039
1040 gcc_assert (!l);
1041 return n_insns;
1042 }
1043
1044 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1045 with move instructions for mode MODE. GENFUN is the gen_... function
1046 to make a move insn for that mode. DATA has all the other info. */
1047
1048 static void
1049 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1050 struct move_by_pieces_d *data)
1051 {
1052 unsigned int size = GET_MODE_SIZE (mode);
1053 rtx to1 = NULL_RTX, from1;
1054
1055 while (data->len >= size)
1056 {
1057 if (data->reverse)
1058 data->offset -= size;
1059
1060 if (data->to)
1061 {
1062 if (data->autinc_to)
1063 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1064 data->offset);
1065 else
1066 to1 = adjust_address (data->to, mode, data->offset);
1067 }
1068
1069 if (data->autinc_from)
1070 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1071 data->offset);
1072 else
1073 from1 = adjust_address (data->from, mode, data->offset);
1074
1075 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1076 emit_insn (gen_add2_insn (data->to_addr,
1077 GEN_INT (-(HOST_WIDE_INT)size)));
1078 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1079 emit_insn (gen_add2_insn (data->from_addr,
1080 GEN_INT (-(HOST_WIDE_INT)size)));
1081
1082 if (data->to)
1083 emit_insn ((*genfun) (to1, from1));
1084 else
1085 {
1086 #ifdef PUSH_ROUNDING
1087 emit_single_push_insn (mode, from1, NULL);
1088 #else
1089 gcc_unreachable ();
1090 #endif
1091 }
1092
1093 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1094 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1095 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1096 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1097
1098 if (! data->reverse)
1099 data->offset += size;
1100
1101 data->len -= size;
1102 }
1103 }
1104 \f
1105 /* Emit code to move a block Y to a block X. This may be done with
1106 string-move instructions, with multiple scalar move instructions,
1107 or with a library call.
1108
1109 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1110 SIZE is an rtx that says how long they are.
1111 ALIGN is the maximum alignment we can assume they have.
1112 METHOD describes what kind of copy this is, and what mechanisms may be used.
1113
1114 Return the address of the new block, if memcpy is called and returns it,
1115 0 otherwise. */
1116
1117 rtx
1118 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1119 unsigned int expected_align, HOST_WIDE_INT expected_size)
1120 {
1121 bool may_use_call;
1122 rtx retval = 0;
1123 unsigned int align;
1124
1125 gcc_assert (size);
1126 if (CONST_INT_P (size)
1127 && INTVAL (size) == 0)
1128 return 0;
1129
1130 switch (method)
1131 {
1132 case BLOCK_OP_NORMAL:
1133 case BLOCK_OP_TAILCALL:
1134 may_use_call = true;
1135 break;
1136
1137 case BLOCK_OP_CALL_PARM:
1138 may_use_call = block_move_libcall_safe_for_call_parm ();
1139
1140 /* Make inhibit_defer_pop nonzero around the library call
1141 to force it to pop the arguments right away. */
1142 NO_DEFER_POP;
1143 break;
1144
1145 case BLOCK_OP_NO_LIBCALL:
1146 may_use_call = false;
1147 break;
1148
1149 default:
1150 gcc_unreachable ();
1151 }
1152
1153 gcc_assert (MEM_P (x) && MEM_P (y));
1154 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1155 gcc_assert (align >= BITS_PER_UNIT);
1156
1157 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1158 block copy is more efficient for other large modes, e.g. DCmode. */
1159 x = adjust_address (x, BLKmode, 0);
1160 y = adjust_address (y, BLKmode, 0);
1161
1162 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1163 can be incorrect is coming from __builtin_memcpy. */
1164 if (CONST_INT_P (size))
1165 {
1166 x = shallow_copy_rtx (x);
1167 y = shallow_copy_rtx (y);
1168 set_mem_size (x, INTVAL (size));
1169 set_mem_size (y, INTVAL (size));
1170 }
1171
1172 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1173 move_by_pieces (x, y, INTVAL (size), align, 0);
1174 else if (emit_block_move_via_movmem (x, y, size, align,
1175 expected_align, expected_size))
1176 ;
1177 else if (may_use_call
1178 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1179 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1180 {
1181 /* Since x and y are passed to a libcall, mark the corresponding
1182 tree EXPR as addressable. */
1183 tree y_expr = MEM_EXPR (y);
1184 tree x_expr = MEM_EXPR (x);
1185 if (y_expr)
1186 mark_addressable (y_expr);
1187 if (x_expr)
1188 mark_addressable (x_expr);
1189 retval = emit_block_move_via_libcall (x, y, size,
1190 method == BLOCK_OP_TAILCALL);
1191 }
1192
1193 else
1194 emit_block_move_via_loop (x, y, size, align);
1195
1196 if (method == BLOCK_OP_CALL_PARM)
1197 OK_DEFER_POP;
1198
1199 return retval;
1200 }
1201
1202 rtx
1203 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1204 {
1205 return emit_block_move_hints (x, y, size, method, 0, -1);
1206 }
1207
1208 /* A subroutine of emit_block_move. Returns true if calling the
1209 block move libcall will not clobber any parameters which may have
1210 already been placed on the stack. */
1211
1212 static bool
1213 block_move_libcall_safe_for_call_parm (void)
1214 {
1215 #if defined (REG_PARM_STACK_SPACE)
1216 tree fn;
1217 #endif
1218
1219 /* If arguments are pushed on the stack, then they're safe. */
1220 if (PUSH_ARGS)
1221 return true;
1222
1223 /* If registers go on the stack anyway, any argument is sure to clobber
1224 an outgoing argument. */
1225 #if defined (REG_PARM_STACK_SPACE)
1226 fn = emit_block_move_libcall_fn (false);
1227 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1228 depend on its argument. */
1229 (void) fn;
1230 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1231 && REG_PARM_STACK_SPACE (fn) != 0)
1232 return false;
1233 #endif
1234
1235 /* If any argument goes in memory, then it might clobber an outgoing
1236 argument. */
1237 {
1238 CUMULATIVE_ARGS args_so_far_v;
1239 cumulative_args_t args_so_far;
1240 tree fn, arg;
1241
1242 fn = emit_block_move_libcall_fn (false);
1243 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1244 args_so_far = pack_cumulative_args (&args_so_far_v);
1245
1246 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1247 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1248 {
1249 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1250 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1251 NULL_TREE, true);
1252 if (!tmp || !REG_P (tmp))
1253 return false;
1254 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1255 return false;
1256 targetm.calls.function_arg_advance (args_so_far, mode,
1257 NULL_TREE, true);
1258 }
1259 }
1260 return true;
1261 }
1262
1263 /* A subroutine of emit_block_move. Expand a movmem pattern;
1264 return true if successful. */
1265
1266 static bool
1267 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1268 unsigned int expected_align, HOST_WIDE_INT expected_size)
1269 {
1270 int save_volatile_ok = volatile_ok;
1271 enum machine_mode mode;
1272
1273 if (expected_align < align)
1274 expected_align = align;
1275
1276 /* Since this is a move insn, we don't care about volatility. */
1277 volatile_ok = 1;
1278
1279 /* Try the most limited insn first, because there's no point
1280 including more than one in the machine description unless
1281 the more limited one has some advantage. */
1282
1283 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1284 mode = GET_MODE_WIDER_MODE (mode))
1285 {
1286 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1287
1288 if (code != CODE_FOR_nothing
1289 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1290 here because if SIZE is less than the mode mask, as it is
1291 returned by the macro, it will definitely be less than the
1292 actual mode mask. */
1293 && ((CONST_INT_P (size)
1294 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1295 <= (GET_MODE_MASK (mode) >> 1)))
1296 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1297 {
1298 struct expand_operand ops[6];
1299 unsigned int nops;
1300
1301 /* ??? When called via emit_block_move_for_call, it'd be
1302 nice if there were some way to inform the backend, so
1303 that it doesn't fail the expansion because it thinks
1304 emitting the libcall would be more efficient. */
1305 nops = insn_data[(int) code].n_generator_args;
1306 gcc_assert (nops == 4 || nops == 6);
1307
1308 create_fixed_operand (&ops[0], x);
1309 create_fixed_operand (&ops[1], y);
1310 /* The check above guarantees that this size conversion is valid. */
1311 create_convert_operand_to (&ops[2], size, mode, true);
1312 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1313 if (nops == 6)
1314 {
1315 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1316 create_integer_operand (&ops[5], expected_size);
1317 }
1318 if (maybe_expand_insn (code, nops, ops))
1319 {
1320 volatile_ok = save_volatile_ok;
1321 return true;
1322 }
1323 }
1324 }
1325
1326 volatile_ok = save_volatile_ok;
1327 return false;
1328 }
1329
1330 /* A subroutine of emit_block_move. Expand a call to memcpy.
1331 Return the return value from memcpy, 0 otherwise. */
1332
1333 rtx
1334 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1335 {
1336 rtx dst_addr, src_addr;
1337 tree call_expr, fn, src_tree, dst_tree, size_tree;
1338 enum machine_mode size_mode;
1339 rtx retval;
1340
1341 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1342 pseudos. We can then place those new pseudos into a VAR_DECL and
1343 use them later. */
1344
1345 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1346 src_addr = copy_addr_to_reg (XEXP (src, 0));
1347
1348 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1349 src_addr = convert_memory_address (ptr_mode, src_addr);
1350
1351 dst_tree = make_tree (ptr_type_node, dst_addr);
1352 src_tree = make_tree (ptr_type_node, src_addr);
1353
1354 size_mode = TYPE_MODE (sizetype);
1355
1356 size = convert_to_mode (size_mode, size, 1);
1357 size = copy_to_mode_reg (size_mode, size);
1358
1359 /* It is incorrect to use the libcall calling conventions to call
1360 memcpy in this context. This could be a user call to memcpy and
1361 the user may wish to examine the return value from memcpy. For
1362 targets where libcalls and normal calls have different conventions
1363 for returning pointers, we could end up generating incorrect code. */
1364
1365 size_tree = make_tree (sizetype, size);
1366
1367 fn = emit_block_move_libcall_fn (true);
1368 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1369 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1370
1371 retval = expand_normal (call_expr);
1372
1373 return retval;
1374 }
1375
1376 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1377 for the function we use for block copies. */
1378
1379 static GTY(()) tree block_move_fn;
1380
1381 void
1382 init_block_move_fn (const char *asmspec)
1383 {
1384 if (!block_move_fn)
1385 {
1386 tree args, fn;
1387
1388 fn = get_identifier ("memcpy");
1389 args = build_function_type_list (ptr_type_node, ptr_type_node,
1390 const_ptr_type_node, sizetype,
1391 NULL_TREE);
1392
1393 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1394 DECL_EXTERNAL (fn) = 1;
1395 TREE_PUBLIC (fn) = 1;
1396 DECL_ARTIFICIAL (fn) = 1;
1397 TREE_NOTHROW (fn) = 1;
1398 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1399 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1400
1401 block_move_fn = fn;
1402 }
1403
1404 if (asmspec)
1405 set_user_assembler_name (block_move_fn, asmspec);
1406 }
1407
1408 static tree
1409 emit_block_move_libcall_fn (int for_call)
1410 {
1411 static bool emitted_extern;
1412
1413 if (!block_move_fn)
1414 init_block_move_fn (NULL);
1415
1416 if (for_call && !emitted_extern)
1417 {
1418 emitted_extern = true;
1419 make_decl_rtl (block_move_fn);
1420 }
1421
1422 return block_move_fn;
1423 }
1424
1425 /* A subroutine of emit_block_move. Copy the data via an explicit
1426 loop. This is used only when libcalls are forbidden. */
1427 /* ??? It'd be nice to copy in hunks larger than QImode. */
1428
1429 static void
1430 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1431 unsigned int align ATTRIBUTE_UNUSED)
1432 {
1433 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1434 enum machine_mode x_addr_mode
1435 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1436 enum machine_mode y_addr_mode
1437 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1438 enum machine_mode iter_mode;
1439
1440 iter_mode = GET_MODE (size);
1441 if (iter_mode == VOIDmode)
1442 iter_mode = word_mode;
1443
1444 top_label = gen_label_rtx ();
1445 cmp_label = gen_label_rtx ();
1446 iter = gen_reg_rtx (iter_mode);
1447
1448 emit_move_insn (iter, const0_rtx);
1449
1450 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1451 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1452 do_pending_stack_adjust ();
1453
1454 emit_jump (cmp_label);
1455 emit_label (top_label);
1456
1457 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1458 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1459
1460 if (x_addr_mode != y_addr_mode)
1461 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1462 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1463
1464 x = change_address (x, QImode, x_addr);
1465 y = change_address (y, QImode, y_addr);
1466
1467 emit_move_insn (x, y);
1468
1469 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1470 true, OPTAB_LIB_WIDEN);
1471 if (tmp != iter)
1472 emit_move_insn (iter, tmp);
1473
1474 emit_label (cmp_label);
1475
1476 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1477 true, top_label);
1478 }
1479 \f
1480 /* Copy all or part of a value X into registers starting at REGNO.
1481 The number of registers to be filled is NREGS. */
1482
1483 void
1484 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1485 {
1486 int i;
1487 #ifdef HAVE_load_multiple
1488 rtx pat;
1489 rtx last;
1490 #endif
1491
1492 if (nregs == 0)
1493 return;
1494
1495 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1496 x = validize_mem (force_const_mem (mode, x));
1497
1498 /* See if the machine can do this with a load multiple insn. */
1499 #ifdef HAVE_load_multiple
1500 if (HAVE_load_multiple)
1501 {
1502 last = get_last_insn ();
1503 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1504 GEN_INT (nregs));
1505 if (pat)
1506 {
1507 emit_insn (pat);
1508 return;
1509 }
1510 else
1511 delete_insns_since (last);
1512 }
1513 #endif
1514
1515 for (i = 0; i < nregs; i++)
1516 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1517 operand_subword_force (x, i, mode));
1518 }
1519
1520 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1521 The number of registers to be filled is NREGS. */
1522
1523 void
1524 move_block_from_reg (int regno, rtx x, int nregs)
1525 {
1526 int i;
1527
1528 if (nregs == 0)
1529 return;
1530
1531 /* See if the machine can do this with a store multiple insn. */
1532 #ifdef HAVE_store_multiple
1533 if (HAVE_store_multiple)
1534 {
1535 rtx last = get_last_insn ();
1536 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1537 GEN_INT (nregs));
1538 if (pat)
1539 {
1540 emit_insn (pat);
1541 return;
1542 }
1543 else
1544 delete_insns_since (last);
1545 }
1546 #endif
1547
1548 for (i = 0; i < nregs; i++)
1549 {
1550 rtx tem = operand_subword (x, i, 1, BLKmode);
1551
1552 gcc_assert (tem);
1553
1554 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1555 }
1556 }
1557
1558 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1559 ORIG, where ORIG is a non-consecutive group of registers represented by
1560 a PARALLEL. The clone is identical to the original except in that the
1561 original set of registers is replaced by a new set of pseudo registers.
1562 The new set has the same modes as the original set. */
1563
1564 rtx
1565 gen_group_rtx (rtx orig)
1566 {
1567 int i, length;
1568 rtx *tmps;
1569
1570 gcc_assert (GET_CODE (orig) == PARALLEL);
1571
1572 length = XVECLEN (orig, 0);
1573 tmps = XALLOCAVEC (rtx, length);
1574
1575 /* Skip a NULL entry in first slot. */
1576 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1577
1578 if (i)
1579 tmps[0] = 0;
1580
1581 for (; i < length; i++)
1582 {
1583 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1584 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1585
1586 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1587 }
1588
1589 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1590 }
1591
1592 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1593 except that values are placed in TMPS[i], and must later be moved
1594 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1595
1596 static void
1597 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1598 {
1599 rtx src;
1600 int start, i;
1601 enum machine_mode m = GET_MODE (orig_src);
1602
1603 gcc_assert (GET_CODE (dst) == PARALLEL);
1604
1605 if (m != VOIDmode
1606 && !SCALAR_INT_MODE_P (m)
1607 && !MEM_P (orig_src)
1608 && GET_CODE (orig_src) != CONCAT)
1609 {
1610 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1611 if (imode == BLKmode)
1612 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1613 else
1614 src = gen_reg_rtx (imode);
1615 if (imode != BLKmode)
1616 src = gen_lowpart (GET_MODE (orig_src), src);
1617 emit_move_insn (src, orig_src);
1618 /* ...and back again. */
1619 if (imode != BLKmode)
1620 src = gen_lowpart (imode, src);
1621 emit_group_load_1 (tmps, dst, src, type, ssize);
1622 return;
1623 }
1624
1625 /* Check for a NULL entry, used to indicate that the parameter goes
1626 both on the stack and in registers. */
1627 if (XEXP (XVECEXP (dst, 0, 0), 0))
1628 start = 0;
1629 else
1630 start = 1;
1631
1632 /* Process the pieces. */
1633 for (i = start; i < XVECLEN (dst, 0); i++)
1634 {
1635 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1636 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1637 unsigned int bytelen = GET_MODE_SIZE (mode);
1638 int shift = 0;
1639
1640 /* Handle trailing fragments that run over the size of the struct. */
1641 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1642 {
1643 /* Arrange to shift the fragment to where it belongs.
1644 extract_bit_field loads to the lsb of the reg. */
1645 if (
1646 #ifdef BLOCK_REG_PADDING
1647 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1648 == (BYTES_BIG_ENDIAN ? upward : downward)
1649 #else
1650 BYTES_BIG_ENDIAN
1651 #endif
1652 )
1653 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1654 bytelen = ssize - bytepos;
1655 gcc_assert (bytelen > 0);
1656 }
1657
1658 /* If we won't be loading directly from memory, protect the real source
1659 from strange tricks we might play; but make sure that the source can
1660 be loaded directly into the destination. */
1661 src = orig_src;
1662 if (!MEM_P (orig_src)
1663 && (!CONSTANT_P (orig_src)
1664 || (GET_MODE (orig_src) != mode
1665 && GET_MODE (orig_src) != VOIDmode)))
1666 {
1667 if (GET_MODE (orig_src) == VOIDmode)
1668 src = gen_reg_rtx (mode);
1669 else
1670 src = gen_reg_rtx (GET_MODE (orig_src));
1671
1672 emit_move_insn (src, orig_src);
1673 }
1674
1675 /* Optimize the access just a bit. */
1676 if (MEM_P (src)
1677 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1678 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1679 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1680 && bytelen == GET_MODE_SIZE (mode))
1681 {
1682 tmps[i] = gen_reg_rtx (mode);
1683 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1684 }
1685 else if (COMPLEX_MODE_P (mode)
1686 && GET_MODE (src) == mode
1687 && bytelen == GET_MODE_SIZE (mode))
1688 /* Let emit_move_complex do the bulk of the work. */
1689 tmps[i] = src;
1690 else if (GET_CODE (src) == CONCAT)
1691 {
1692 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1693 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1694
1695 if ((bytepos == 0 && bytelen == slen0)
1696 || (bytepos != 0 && bytepos + bytelen <= slen))
1697 {
1698 /* The following assumes that the concatenated objects all
1699 have the same size. In this case, a simple calculation
1700 can be used to determine the object and the bit field
1701 to be extracted. */
1702 tmps[i] = XEXP (src, bytepos / slen0);
1703 if (! CONSTANT_P (tmps[i])
1704 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1705 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1706 (bytepos % slen0) * BITS_PER_UNIT,
1707 1, false, NULL_RTX, mode, mode);
1708 }
1709 else
1710 {
1711 rtx mem;
1712
1713 gcc_assert (!bytepos);
1714 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1715 emit_move_insn (mem, src);
1716 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1717 0, 1, false, NULL_RTX, mode, mode);
1718 }
1719 }
1720 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1721 SIMD register, which is currently broken. While we get GCC
1722 to emit proper RTL for these cases, let's dump to memory. */
1723 else if (VECTOR_MODE_P (GET_MODE (dst))
1724 && REG_P (src))
1725 {
1726 int slen = GET_MODE_SIZE (GET_MODE (src));
1727 rtx mem;
1728
1729 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1730 emit_move_insn (mem, src);
1731 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1732 }
1733 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1734 && XVECLEN (dst, 0) > 1)
1735 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1736 else if (CONSTANT_P (src))
1737 {
1738 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1739
1740 if (len == ssize)
1741 tmps[i] = src;
1742 else
1743 {
1744 rtx first, second;
1745
1746 gcc_assert (2 * len == ssize);
1747 split_double (src, &first, &second);
1748 if (i)
1749 tmps[i] = second;
1750 else
1751 tmps[i] = first;
1752 }
1753 }
1754 else if (REG_P (src) && GET_MODE (src) == mode)
1755 tmps[i] = src;
1756 else
1757 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1758 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1759 mode, mode);
1760
1761 if (shift)
1762 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1763 shift, tmps[i], 0);
1764 }
1765 }
1766
1767 /* Emit code to move a block SRC of type TYPE to a block DST,
1768 where DST is non-consecutive registers represented by a PARALLEL.
1769 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1770 if not known. */
1771
1772 void
1773 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1774 {
1775 rtx *tmps;
1776 int i;
1777
1778 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1779 emit_group_load_1 (tmps, dst, src, type, ssize);
1780
1781 /* Copy the extracted pieces into the proper (probable) hard regs. */
1782 for (i = 0; i < XVECLEN (dst, 0); i++)
1783 {
1784 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1785 if (d == NULL)
1786 continue;
1787 emit_move_insn (d, tmps[i]);
1788 }
1789 }
1790
1791 /* Similar, but load SRC into new pseudos in a format that looks like
1792 PARALLEL. This can later be fed to emit_group_move to get things
1793 in the right place. */
1794
1795 rtx
1796 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1797 {
1798 rtvec vec;
1799 int i;
1800
1801 vec = rtvec_alloc (XVECLEN (parallel, 0));
1802 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1803
1804 /* Convert the vector to look just like the original PARALLEL, except
1805 with the computed values. */
1806 for (i = 0; i < XVECLEN (parallel, 0); i++)
1807 {
1808 rtx e = XVECEXP (parallel, 0, i);
1809 rtx d = XEXP (e, 0);
1810
1811 if (d)
1812 {
1813 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1814 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1815 }
1816 RTVEC_ELT (vec, i) = e;
1817 }
1818
1819 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1820 }
1821
1822 /* Emit code to move a block SRC to block DST, where SRC and DST are
1823 non-consecutive groups of registers, each represented by a PARALLEL. */
1824
1825 void
1826 emit_group_move (rtx dst, rtx src)
1827 {
1828 int i;
1829
1830 gcc_assert (GET_CODE (src) == PARALLEL
1831 && GET_CODE (dst) == PARALLEL
1832 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1833
1834 /* Skip first entry if NULL. */
1835 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1836 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1837 XEXP (XVECEXP (src, 0, i), 0));
1838 }
1839
1840 /* Move a group of registers represented by a PARALLEL into pseudos. */
1841
1842 rtx
1843 emit_group_move_into_temps (rtx src)
1844 {
1845 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1846 int i;
1847
1848 for (i = 0; i < XVECLEN (src, 0); i++)
1849 {
1850 rtx e = XVECEXP (src, 0, i);
1851 rtx d = XEXP (e, 0);
1852
1853 if (d)
1854 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1855 RTVEC_ELT (vec, i) = e;
1856 }
1857
1858 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1859 }
1860
1861 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1862 where SRC is non-consecutive registers represented by a PARALLEL.
1863 SSIZE represents the total size of block ORIG_DST, or -1 if not
1864 known. */
1865
1866 void
1867 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1868 {
1869 rtx *tmps, dst;
1870 int start, finish, i;
1871 enum machine_mode m = GET_MODE (orig_dst);
1872
1873 gcc_assert (GET_CODE (src) == PARALLEL);
1874
1875 if (!SCALAR_INT_MODE_P (m)
1876 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1877 {
1878 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1879 if (imode == BLKmode)
1880 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1881 else
1882 dst = gen_reg_rtx (imode);
1883 emit_group_store (dst, src, type, ssize);
1884 if (imode != BLKmode)
1885 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1886 emit_move_insn (orig_dst, dst);
1887 return;
1888 }
1889
1890 /* Check for a NULL entry, used to indicate that the parameter goes
1891 both on the stack and in registers. */
1892 if (XEXP (XVECEXP (src, 0, 0), 0))
1893 start = 0;
1894 else
1895 start = 1;
1896 finish = XVECLEN (src, 0);
1897
1898 tmps = XALLOCAVEC (rtx, finish);
1899
1900 /* Copy the (probable) hard regs into pseudos. */
1901 for (i = start; i < finish; i++)
1902 {
1903 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1904 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1905 {
1906 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1907 emit_move_insn (tmps[i], reg);
1908 }
1909 else
1910 tmps[i] = reg;
1911 }
1912
1913 /* If we won't be storing directly into memory, protect the real destination
1914 from strange tricks we might play. */
1915 dst = orig_dst;
1916 if (GET_CODE (dst) == PARALLEL)
1917 {
1918 rtx temp;
1919
1920 /* We can get a PARALLEL dst if there is a conditional expression in
1921 a return statement. In that case, the dst and src are the same,
1922 so no action is necessary. */
1923 if (rtx_equal_p (dst, src))
1924 return;
1925
1926 /* It is unclear if we can ever reach here, but we may as well handle
1927 it. Allocate a temporary, and split this into a store/load to/from
1928 the temporary. */
1929
1930 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1931 emit_group_store (temp, src, type, ssize);
1932 emit_group_load (dst, temp, type, ssize);
1933 return;
1934 }
1935 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1936 {
1937 enum machine_mode outer = GET_MODE (dst);
1938 enum machine_mode inner;
1939 HOST_WIDE_INT bytepos;
1940 bool done = false;
1941 rtx temp;
1942
1943 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1944 dst = gen_reg_rtx (outer);
1945
1946 /* Make life a bit easier for combine. */
1947 /* If the first element of the vector is the low part
1948 of the destination mode, use a paradoxical subreg to
1949 initialize the destination. */
1950 if (start < finish)
1951 {
1952 inner = GET_MODE (tmps[start]);
1953 bytepos = subreg_lowpart_offset (inner, outer);
1954 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1955 {
1956 temp = simplify_gen_subreg (outer, tmps[start],
1957 inner, 0);
1958 if (temp)
1959 {
1960 emit_move_insn (dst, temp);
1961 done = true;
1962 start++;
1963 }
1964 }
1965 }
1966
1967 /* If the first element wasn't the low part, try the last. */
1968 if (!done
1969 && start < finish - 1)
1970 {
1971 inner = GET_MODE (tmps[finish - 1]);
1972 bytepos = subreg_lowpart_offset (inner, outer);
1973 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1974 {
1975 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1976 inner, 0);
1977 if (temp)
1978 {
1979 emit_move_insn (dst, temp);
1980 done = true;
1981 finish--;
1982 }
1983 }
1984 }
1985
1986 /* Otherwise, simply initialize the result to zero. */
1987 if (!done)
1988 emit_move_insn (dst, CONST0_RTX (outer));
1989 }
1990
1991 /* Process the pieces. */
1992 for (i = start; i < finish; i++)
1993 {
1994 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
1995 enum machine_mode mode = GET_MODE (tmps[i]);
1996 unsigned int bytelen = GET_MODE_SIZE (mode);
1997 unsigned int adj_bytelen = bytelen;
1998 rtx dest = dst;
1999
2000 /* Handle trailing fragments that run over the size of the struct. */
2001 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2002 adj_bytelen = ssize - bytepos;
2003
2004 if (GET_CODE (dst) == CONCAT)
2005 {
2006 if (bytepos + adj_bytelen
2007 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2008 dest = XEXP (dst, 0);
2009 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2010 {
2011 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2012 dest = XEXP (dst, 1);
2013 }
2014 else
2015 {
2016 enum machine_mode dest_mode = GET_MODE (dest);
2017 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2018
2019 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2020
2021 if (GET_MODE_ALIGNMENT (dest_mode)
2022 >= GET_MODE_ALIGNMENT (tmp_mode))
2023 {
2024 dest = assign_stack_temp (dest_mode,
2025 GET_MODE_SIZE (dest_mode),
2026 0);
2027 emit_move_insn (adjust_address (dest,
2028 tmp_mode,
2029 bytepos),
2030 tmps[i]);
2031 dst = dest;
2032 }
2033 else
2034 {
2035 dest = assign_stack_temp (tmp_mode,
2036 GET_MODE_SIZE (tmp_mode),
2037 0);
2038 emit_move_insn (dest, tmps[i]);
2039 dst = adjust_address (dest, dest_mode, bytepos);
2040 }
2041 break;
2042 }
2043 }
2044
2045 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2046 {
2047 /* store_bit_field always takes its value from the lsb.
2048 Move the fragment to the lsb if it's not already there. */
2049 if (
2050 #ifdef BLOCK_REG_PADDING
2051 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2052 == (BYTES_BIG_ENDIAN ? upward : downward)
2053 #else
2054 BYTES_BIG_ENDIAN
2055 #endif
2056 )
2057 {
2058 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2059 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2060 shift, tmps[i], 0);
2061 }
2062 bytelen = adj_bytelen;
2063 }
2064
2065 /* Optimize the access just a bit. */
2066 if (MEM_P (dest)
2067 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2068 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2069 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2070 && bytelen == GET_MODE_SIZE (mode))
2071 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2072 else
2073 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2074 0, 0, mode, tmps[i]);
2075 }
2076
2077 /* Copy from the pseudo into the (probable) hard reg. */
2078 if (orig_dst != dst)
2079 emit_move_insn (orig_dst, dst);
2080 }
2081
2082 /* Generate code to copy a BLKmode object of TYPE out of a
2083 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2084 is null, a stack temporary is created. TGTBLK is returned.
2085
2086 The purpose of this routine is to handle functions that return
2087 BLKmode structures in registers. Some machines (the PA for example)
2088 want to return all small structures in registers regardless of the
2089 structure's alignment. */
2090
2091 rtx
2092 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2093 {
2094 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2095 rtx src = NULL, dst = NULL;
2096 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2097 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2098 enum machine_mode copy_mode;
2099
2100 if (tgtblk == 0)
2101 {
2102 tgtblk = assign_temp (build_qualified_type (type,
2103 (TYPE_QUALS (type)
2104 | TYPE_QUAL_CONST)),
2105 0, 1, 1);
2106 preserve_temp_slots (tgtblk);
2107 }
2108
2109 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2110 into a new pseudo which is a full word. */
2111
2112 if (GET_MODE (srcreg) != BLKmode
2113 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2114 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2115
2116 /* If the structure doesn't take up a whole number of words, see whether
2117 SRCREG is padded on the left or on the right. If it's on the left,
2118 set PADDING_CORRECTION to the number of bits to skip.
2119
2120 In most ABIs, the structure will be returned at the least end of
2121 the register, which translates to right padding on little-endian
2122 targets and left padding on big-endian targets. The opposite
2123 holds if the structure is returned at the most significant
2124 end of the register. */
2125 if (bytes % UNITS_PER_WORD != 0
2126 && (targetm.calls.return_in_msb (type)
2127 ? !BYTES_BIG_ENDIAN
2128 : BYTES_BIG_ENDIAN))
2129 padding_correction
2130 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2131
2132 /* Copy the structure BITSIZE bits at a time. If the target lives in
2133 memory, take care of not reading/writing past its end by selecting
2134 a copy mode suited to BITSIZE. This should always be possible given
2135 how it is computed.
2136
2137 We could probably emit more efficient code for machines which do not use
2138 strict alignment, but it doesn't seem worth the effort at the current
2139 time. */
2140
2141 copy_mode = word_mode;
2142 if (MEM_P (tgtblk))
2143 {
2144 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2145 if (mem_mode != BLKmode)
2146 copy_mode = mem_mode;
2147 }
2148
2149 for (bitpos = 0, xbitpos = padding_correction;
2150 bitpos < bytes * BITS_PER_UNIT;
2151 bitpos += bitsize, xbitpos += bitsize)
2152 {
2153 /* We need a new source operand each time xbitpos is on a
2154 word boundary and when xbitpos == padding_correction
2155 (the first time through). */
2156 if (xbitpos % BITS_PER_WORD == 0
2157 || xbitpos == padding_correction)
2158 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2159 GET_MODE (srcreg));
2160
2161 /* We need a new destination operand each time bitpos is on
2162 a word boundary. */
2163 if (bitpos % BITS_PER_WORD == 0)
2164 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2165
2166 /* Use xbitpos for the source extraction (right justified) and
2167 bitpos for the destination store (left justified). */
2168 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2169 extract_bit_field (src, bitsize,
2170 xbitpos % BITS_PER_WORD, 1, false,
2171 NULL_RTX, copy_mode, copy_mode));
2172 }
2173
2174 return tgtblk;
2175 }
2176
2177 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2178 register if it contains any data, otherwise return null.
2179
2180 This is used on targets that return BLKmode values in registers. */
2181
2182 rtx
2183 copy_blkmode_to_reg (enum machine_mode mode, tree src)
2184 {
2185 int i, n_regs;
2186 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2187 unsigned int bitsize;
2188 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2189 enum machine_mode dst_mode;
2190
2191 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2192
2193 x = expand_normal (src);
2194
2195 bytes = int_size_in_bytes (TREE_TYPE (src));
2196 if (bytes == 0)
2197 return NULL_RTX;
2198
2199 /* If the structure doesn't take up a whole number of words, see
2200 whether the register value should be padded on the left or on
2201 the right. Set PADDING_CORRECTION to the number of padding
2202 bits needed on the left side.
2203
2204 In most ABIs, the structure will be returned at the least end of
2205 the register, which translates to right padding on little-endian
2206 targets and left padding on big-endian targets. The opposite
2207 holds if the structure is returned at the most significant
2208 end of the register. */
2209 if (bytes % UNITS_PER_WORD != 0
2210 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2211 ? !BYTES_BIG_ENDIAN
2212 : BYTES_BIG_ENDIAN))
2213 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2214 * BITS_PER_UNIT));
2215
2216 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2217 dst_words = XALLOCAVEC (rtx, n_regs);
2218 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2219
2220 /* Copy the structure BITSIZE bits at a time. */
2221 for (bitpos = 0, xbitpos = padding_correction;
2222 bitpos < bytes * BITS_PER_UNIT;
2223 bitpos += bitsize, xbitpos += bitsize)
2224 {
2225 /* We need a new destination pseudo each time xbitpos is
2226 on a word boundary and when xbitpos == padding_correction
2227 (the first time through). */
2228 if (xbitpos % BITS_PER_WORD == 0
2229 || xbitpos == padding_correction)
2230 {
2231 /* Generate an appropriate register. */
2232 dst_word = gen_reg_rtx (word_mode);
2233 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2234
2235 /* Clear the destination before we move anything into it. */
2236 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2237 }
2238
2239 /* We need a new source operand each time bitpos is on a word
2240 boundary. */
2241 if (bitpos % BITS_PER_WORD == 0)
2242 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2243
2244 /* Use bitpos for the source extraction (left justified) and
2245 xbitpos for the destination store (right justified). */
2246 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2247 0, 0, word_mode,
2248 extract_bit_field (src_word, bitsize,
2249 bitpos % BITS_PER_WORD, 1, false,
2250 NULL_RTX, word_mode, word_mode));
2251 }
2252
2253 if (mode == BLKmode)
2254 {
2255 /* Find the smallest integer mode large enough to hold the
2256 entire structure. */
2257 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2258 mode != VOIDmode;
2259 mode = GET_MODE_WIDER_MODE (mode))
2260 /* Have we found a large enough mode? */
2261 if (GET_MODE_SIZE (mode) >= bytes)
2262 break;
2263
2264 /* A suitable mode should have been found. */
2265 gcc_assert (mode != VOIDmode);
2266 }
2267
2268 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2269 dst_mode = word_mode;
2270 else
2271 dst_mode = mode;
2272 dst = gen_reg_rtx (dst_mode);
2273
2274 for (i = 0; i < n_regs; i++)
2275 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2276
2277 if (mode != dst_mode)
2278 dst = gen_lowpart (mode, dst);
2279
2280 return dst;
2281 }
2282
2283 /* Add a USE expression for REG to the (possibly empty) list pointed
2284 to by CALL_FUSAGE. REG must denote a hard register. */
2285
2286 void
2287 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2288 {
2289 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2290
2291 *call_fusage
2292 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2293 }
2294
2295 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2296 starting at REGNO. All of these registers must be hard registers. */
2297
2298 void
2299 use_regs (rtx *call_fusage, int regno, int nregs)
2300 {
2301 int i;
2302
2303 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2304
2305 for (i = 0; i < nregs; i++)
2306 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2307 }
2308
2309 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2310 PARALLEL REGS. This is for calls that pass values in multiple
2311 non-contiguous locations. The Irix 6 ABI has examples of this. */
2312
2313 void
2314 use_group_regs (rtx *call_fusage, rtx regs)
2315 {
2316 int i;
2317
2318 for (i = 0; i < XVECLEN (regs, 0); i++)
2319 {
2320 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2321
2322 /* A NULL entry means the parameter goes both on the stack and in
2323 registers. This can also be a MEM for targets that pass values
2324 partially on the stack and partially in registers. */
2325 if (reg != 0 && REG_P (reg))
2326 use_reg (call_fusage, reg);
2327 }
2328 }
2329
2330 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2331 assigment and the code of the expresion on the RHS is CODE. Return
2332 NULL otherwise. */
2333
2334 static gimple
2335 get_def_for_expr (tree name, enum tree_code code)
2336 {
2337 gimple def_stmt;
2338
2339 if (TREE_CODE (name) != SSA_NAME)
2340 return NULL;
2341
2342 def_stmt = get_gimple_for_ssa_name (name);
2343 if (!def_stmt
2344 || gimple_assign_rhs_code (def_stmt) != code)
2345 return NULL;
2346
2347 return def_stmt;
2348 }
2349
2350 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2351 assigment and the class of the expresion on the RHS is CLASS. Return
2352 NULL otherwise. */
2353
2354 static gimple
2355 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2356 {
2357 gimple def_stmt;
2358
2359 if (TREE_CODE (name) != SSA_NAME)
2360 return NULL;
2361
2362 def_stmt = get_gimple_for_ssa_name (name);
2363 if (!def_stmt
2364 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2365 return NULL;
2366
2367 return def_stmt;
2368 }
2369 \f
2370
2371 /* Determine whether the LEN bytes generated by CONSTFUN can be
2372 stored to memory using several move instructions. CONSTFUNDATA is
2373 a pointer which will be passed as argument in every CONSTFUN call.
2374 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2375 a memset operation and false if it's a copy of a constant string.
2376 Return nonzero if a call to store_by_pieces should succeed. */
2377
2378 int
2379 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2380 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2381 void *constfundata, unsigned int align, bool memsetp)
2382 {
2383 unsigned HOST_WIDE_INT l;
2384 unsigned int max_size;
2385 HOST_WIDE_INT offset = 0;
2386 enum machine_mode mode;
2387 enum insn_code icode;
2388 int reverse;
2389 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2390 rtx cst ATTRIBUTE_UNUSED;
2391
2392 if (len == 0)
2393 return 1;
2394
2395 if (! (memsetp
2396 ? SET_BY_PIECES_P (len, align)
2397 : STORE_BY_PIECES_P (len, align)))
2398 return 0;
2399
2400 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2401
2402 /* We would first store what we can in the largest integer mode, then go to
2403 successively smaller modes. */
2404
2405 for (reverse = 0;
2406 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2407 reverse++)
2408 {
2409 l = len;
2410 max_size = STORE_MAX_PIECES + 1;
2411 while (max_size > 1)
2412 {
2413 mode = widest_int_mode_for_size (max_size);
2414
2415 if (mode == VOIDmode)
2416 break;
2417
2418 icode = optab_handler (mov_optab, mode);
2419 if (icode != CODE_FOR_nothing
2420 && align >= GET_MODE_ALIGNMENT (mode))
2421 {
2422 unsigned int size = GET_MODE_SIZE (mode);
2423
2424 while (l >= size)
2425 {
2426 if (reverse)
2427 offset -= size;
2428
2429 cst = (*constfun) (constfundata, offset, mode);
2430 if (!targetm.legitimate_constant_p (mode, cst))
2431 return 0;
2432
2433 if (!reverse)
2434 offset += size;
2435
2436 l -= size;
2437 }
2438 }
2439
2440 max_size = GET_MODE_SIZE (mode);
2441 }
2442
2443 /* The code above should have handled everything. */
2444 gcc_assert (!l);
2445 }
2446
2447 return 1;
2448 }
2449
2450 /* Generate several move instructions to store LEN bytes generated by
2451 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2452 pointer which will be passed as argument in every CONSTFUN call.
2453 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2454 a memset operation and false if it's a copy of a constant string.
2455 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2456 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2457 stpcpy. */
2458
2459 rtx
2460 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2461 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2462 void *constfundata, unsigned int align, bool memsetp, int endp)
2463 {
2464 enum machine_mode to_addr_mode
2465 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2466 struct store_by_pieces_d data;
2467
2468 if (len == 0)
2469 {
2470 gcc_assert (endp != 2);
2471 return to;
2472 }
2473
2474 gcc_assert (memsetp
2475 ? SET_BY_PIECES_P (len, align)
2476 : STORE_BY_PIECES_P (len, align));
2477 data.constfun = constfun;
2478 data.constfundata = constfundata;
2479 data.len = len;
2480 data.to = to;
2481 store_by_pieces_1 (&data, align);
2482 if (endp)
2483 {
2484 rtx to1;
2485
2486 gcc_assert (!data.reverse);
2487 if (data.autinc_to)
2488 {
2489 if (endp == 2)
2490 {
2491 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2492 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2493 else
2494 data.to_addr = copy_to_mode_reg (to_addr_mode,
2495 plus_constant (data.to_addr,
2496 -1));
2497 }
2498 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2499 data.offset);
2500 }
2501 else
2502 {
2503 if (endp == 2)
2504 --data.offset;
2505 to1 = adjust_address (data.to, QImode, data.offset);
2506 }
2507 return to1;
2508 }
2509 else
2510 return data.to;
2511 }
2512
2513 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2514 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2515
2516 static void
2517 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2518 {
2519 struct store_by_pieces_d data;
2520
2521 if (len == 0)
2522 return;
2523
2524 data.constfun = clear_by_pieces_1;
2525 data.constfundata = NULL;
2526 data.len = len;
2527 data.to = to;
2528 store_by_pieces_1 (&data, align);
2529 }
2530
2531 /* Callback routine for clear_by_pieces.
2532 Return const0_rtx unconditionally. */
2533
2534 static rtx
2535 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2536 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2537 enum machine_mode mode ATTRIBUTE_UNUSED)
2538 {
2539 return const0_rtx;
2540 }
2541
2542 /* Subroutine of clear_by_pieces and store_by_pieces.
2543 Generate several move instructions to store LEN bytes of block TO. (A MEM
2544 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2545
2546 static void
2547 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2548 unsigned int align ATTRIBUTE_UNUSED)
2549 {
2550 enum machine_mode to_addr_mode
2551 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2552 rtx to_addr = XEXP (data->to, 0);
2553 unsigned int max_size = STORE_MAX_PIECES + 1;
2554 enum insn_code icode;
2555
2556 data->offset = 0;
2557 data->to_addr = to_addr;
2558 data->autinc_to
2559 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2560 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2561
2562 data->explicit_inc_to = 0;
2563 data->reverse
2564 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2565 if (data->reverse)
2566 data->offset = data->len;
2567
2568 /* If storing requires more than two move insns,
2569 copy addresses to registers (to make displacements shorter)
2570 and use post-increment if available. */
2571 if (!data->autinc_to
2572 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2573 {
2574 /* Determine the main mode we'll be using.
2575 MODE might not be used depending on the definitions of the
2576 USE_* macros below. */
2577 enum machine_mode mode ATTRIBUTE_UNUSED
2578 = widest_int_mode_for_size (max_size);
2579
2580 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2581 {
2582 data->to_addr = copy_to_mode_reg (to_addr_mode,
2583 plus_constant (to_addr, data->len));
2584 data->autinc_to = 1;
2585 data->explicit_inc_to = -1;
2586 }
2587
2588 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2589 && ! data->autinc_to)
2590 {
2591 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2592 data->autinc_to = 1;
2593 data->explicit_inc_to = 1;
2594 }
2595
2596 if ( !data->autinc_to && CONSTANT_P (to_addr))
2597 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2598 }
2599
2600 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2601
2602 /* First store what we can in the largest integer mode, then go to
2603 successively smaller modes. */
2604
2605 while (max_size > 1)
2606 {
2607 enum machine_mode mode = widest_int_mode_for_size (max_size);
2608
2609 if (mode == VOIDmode)
2610 break;
2611
2612 icode = optab_handler (mov_optab, mode);
2613 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2614 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2615
2616 max_size = GET_MODE_SIZE (mode);
2617 }
2618
2619 /* The code above should have handled everything. */
2620 gcc_assert (!data->len);
2621 }
2622
2623 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2624 with move instructions for mode MODE. GENFUN is the gen_... function
2625 to make a move insn for that mode. DATA has all the other info. */
2626
2627 static void
2628 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2629 struct store_by_pieces_d *data)
2630 {
2631 unsigned int size = GET_MODE_SIZE (mode);
2632 rtx to1, cst;
2633
2634 while (data->len >= size)
2635 {
2636 if (data->reverse)
2637 data->offset -= size;
2638
2639 if (data->autinc_to)
2640 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2641 data->offset);
2642 else
2643 to1 = adjust_address (data->to, mode, data->offset);
2644
2645 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2646 emit_insn (gen_add2_insn (data->to_addr,
2647 GEN_INT (-(HOST_WIDE_INT) size)));
2648
2649 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2650 emit_insn ((*genfun) (to1, cst));
2651
2652 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2653 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2654
2655 if (! data->reverse)
2656 data->offset += size;
2657
2658 data->len -= size;
2659 }
2660 }
2661 \f
2662 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2663 its length in bytes. */
2664
2665 rtx
2666 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2667 unsigned int expected_align, HOST_WIDE_INT expected_size)
2668 {
2669 enum machine_mode mode = GET_MODE (object);
2670 unsigned int align;
2671
2672 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2673
2674 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2675 just move a zero. Otherwise, do this a piece at a time. */
2676 if (mode != BLKmode
2677 && CONST_INT_P (size)
2678 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2679 {
2680 rtx zero = CONST0_RTX (mode);
2681 if (zero != NULL)
2682 {
2683 emit_move_insn (object, zero);
2684 return NULL;
2685 }
2686
2687 if (COMPLEX_MODE_P (mode))
2688 {
2689 zero = CONST0_RTX (GET_MODE_INNER (mode));
2690 if (zero != NULL)
2691 {
2692 write_complex_part (object, zero, 0);
2693 write_complex_part (object, zero, 1);
2694 return NULL;
2695 }
2696 }
2697 }
2698
2699 if (size == const0_rtx)
2700 return NULL;
2701
2702 align = MEM_ALIGN (object);
2703
2704 if (CONST_INT_P (size)
2705 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2706 clear_by_pieces (object, INTVAL (size), align);
2707 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2708 expected_align, expected_size))
2709 ;
2710 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2711 return set_storage_via_libcall (object, size, const0_rtx,
2712 method == BLOCK_OP_TAILCALL);
2713 else
2714 gcc_unreachable ();
2715
2716 return NULL;
2717 }
2718
2719 rtx
2720 clear_storage (rtx object, rtx size, enum block_op_methods method)
2721 {
2722 return clear_storage_hints (object, size, method, 0, -1);
2723 }
2724
2725
2726 /* A subroutine of clear_storage. Expand a call to memset.
2727 Return the return value of memset, 0 otherwise. */
2728
2729 rtx
2730 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2731 {
2732 tree call_expr, fn, object_tree, size_tree, val_tree;
2733 enum machine_mode size_mode;
2734 rtx retval;
2735
2736 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2737 place those into new pseudos into a VAR_DECL and use them later. */
2738
2739 object = copy_addr_to_reg (XEXP (object, 0));
2740
2741 size_mode = TYPE_MODE (sizetype);
2742 size = convert_to_mode (size_mode, size, 1);
2743 size = copy_to_mode_reg (size_mode, size);
2744
2745 /* It is incorrect to use the libcall calling conventions to call
2746 memset in this context. This could be a user call to memset and
2747 the user may wish to examine the return value from memset. For
2748 targets where libcalls and normal calls have different conventions
2749 for returning pointers, we could end up generating incorrect code. */
2750
2751 object_tree = make_tree (ptr_type_node, object);
2752 if (!CONST_INT_P (val))
2753 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2754 size_tree = make_tree (sizetype, size);
2755 val_tree = make_tree (integer_type_node, val);
2756
2757 fn = clear_storage_libcall_fn (true);
2758 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2759 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2760
2761 retval = expand_normal (call_expr);
2762
2763 return retval;
2764 }
2765
2766 /* A subroutine of set_storage_via_libcall. Create the tree node
2767 for the function we use for block clears. */
2768
2769 tree block_clear_fn;
2770
2771 void
2772 init_block_clear_fn (const char *asmspec)
2773 {
2774 if (!block_clear_fn)
2775 {
2776 tree fn, args;
2777
2778 fn = get_identifier ("memset");
2779 args = build_function_type_list (ptr_type_node, ptr_type_node,
2780 integer_type_node, sizetype,
2781 NULL_TREE);
2782
2783 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2784 DECL_EXTERNAL (fn) = 1;
2785 TREE_PUBLIC (fn) = 1;
2786 DECL_ARTIFICIAL (fn) = 1;
2787 TREE_NOTHROW (fn) = 1;
2788 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2789 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2790
2791 block_clear_fn = fn;
2792 }
2793
2794 if (asmspec)
2795 set_user_assembler_name (block_clear_fn, asmspec);
2796 }
2797
2798 static tree
2799 clear_storage_libcall_fn (int for_call)
2800 {
2801 static bool emitted_extern;
2802
2803 if (!block_clear_fn)
2804 init_block_clear_fn (NULL);
2805
2806 if (for_call && !emitted_extern)
2807 {
2808 emitted_extern = true;
2809 make_decl_rtl (block_clear_fn);
2810 }
2811
2812 return block_clear_fn;
2813 }
2814 \f
2815 /* Expand a setmem pattern; return true if successful. */
2816
2817 bool
2818 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2819 unsigned int expected_align, HOST_WIDE_INT expected_size)
2820 {
2821 /* Try the most limited insn first, because there's no point
2822 including more than one in the machine description unless
2823 the more limited one has some advantage. */
2824
2825 enum machine_mode mode;
2826
2827 if (expected_align < align)
2828 expected_align = align;
2829
2830 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2831 mode = GET_MODE_WIDER_MODE (mode))
2832 {
2833 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2834
2835 if (code != CODE_FOR_nothing
2836 /* We don't need MODE to be narrower than
2837 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2838 the mode mask, as it is returned by the macro, it will
2839 definitely be less than the actual mode mask. */
2840 && ((CONST_INT_P (size)
2841 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2842 <= (GET_MODE_MASK (mode) >> 1)))
2843 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2844 {
2845 struct expand_operand ops[6];
2846 unsigned int nops;
2847
2848 nops = insn_data[(int) code].n_generator_args;
2849 gcc_assert (nops == 4 || nops == 6);
2850
2851 create_fixed_operand (&ops[0], object);
2852 /* The check above guarantees that this size conversion is valid. */
2853 create_convert_operand_to (&ops[1], size, mode, true);
2854 create_convert_operand_from (&ops[2], val, byte_mode, true);
2855 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2856 if (nops == 6)
2857 {
2858 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2859 create_integer_operand (&ops[5], expected_size);
2860 }
2861 if (maybe_expand_insn (code, nops, ops))
2862 return true;
2863 }
2864 }
2865
2866 return false;
2867 }
2868
2869 \f
2870 /* Write to one of the components of the complex value CPLX. Write VAL to
2871 the real part if IMAG_P is false, and the imaginary part if its true. */
2872
2873 static void
2874 write_complex_part (rtx cplx, rtx val, bool imag_p)
2875 {
2876 enum machine_mode cmode;
2877 enum machine_mode imode;
2878 unsigned ibitsize;
2879
2880 if (GET_CODE (cplx) == CONCAT)
2881 {
2882 emit_move_insn (XEXP (cplx, imag_p), val);
2883 return;
2884 }
2885
2886 cmode = GET_MODE (cplx);
2887 imode = GET_MODE_INNER (cmode);
2888 ibitsize = GET_MODE_BITSIZE (imode);
2889
2890 /* For MEMs simplify_gen_subreg may generate an invalid new address
2891 because, e.g., the original address is considered mode-dependent
2892 by the target, which restricts simplify_subreg from invoking
2893 adjust_address_nv. Instead of preparing fallback support for an
2894 invalid address, we call adjust_address_nv directly. */
2895 if (MEM_P (cplx))
2896 {
2897 emit_move_insn (adjust_address_nv (cplx, imode,
2898 imag_p ? GET_MODE_SIZE (imode) : 0),
2899 val);
2900 return;
2901 }
2902
2903 /* If the sub-object is at least word sized, then we know that subregging
2904 will work. This special case is important, since store_bit_field
2905 wants to operate on integer modes, and there's rarely an OImode to
2906 correspond to TCmode. */
2907 if (ibitsize >= BITS_PER_WORD
2908 /* For hard regs we have exact predicates. Assume we can split
2909 the original object if it spans an even number of hard regs.
2910 This special case is important for SCmode on 64-bit platforms
2911 where the natural size of floating-point regs is 32-bit. */
2912 || (REG_P (cplx)
2913 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2914 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2915 {
2916 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2917 imag_p ? GET_MODE_SIZE (imode) : 0);
2918 if (part)
2919 {
2920 emit_move_insn (part, val);
2921 return;
2922 }
2923 else
2924 /* simplify_gen_subreg may fail for sub-word MEMs. */
2925 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2926 }
2927
2928 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2929 }
2930
2931 /* Extract one of the components of the complex value CPLX. Extract the
2932 real part if IMAG_P is false, and the imaginary part if it's true. */
2933
2934 static rtx
2935 read_complex_part (rtx cplx, bool imag_p)
2936 {
2937 enum machine_mode cmode, imode;
2938 unsigned ibitsize;
2939
2940 if (GET_CODE (cplx) == CONCAT)
2941 return XEXP (cplx, imag_p);
2942
2943 cmode = GET_MODE (cplx);
2944 imode = GET_MODE_INNER (cmode);
2945 ibitsize = GET_MODE_BITSIZE (imode);
2946
2947 /* Special case reads from complex constants that got spilled to memory. */
2948 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2949 {
2950 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2951 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2952 {
2953 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2954 if (CONSTANT_CLASS_P (part))
2955 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2956 }
2957 }
2958
2959 /* For MEMs simplify_gen_subreg may generate an invalid new address
2960 because, e.g., the original address is considered mode-dependent
2961 by the target, which restricts simplify_subreg from invoking
2962 adjust_address_nv. Instead of preparing fallback support for an
2963 invalid address, we call adjust_address_nv directly. */
2964 if (MEM_P (cplx))
2965 return adjust_address_nv (cplx, imode,
2966 imag_p ? GET_MODE_SIZE (imode) : 0);
2967
2968 /* If the sub-object is at least word sized, then we know that subregging
2969 will work. This special case is important, since extract_bit_field
2970 wants to operate on integer modes, and there's rarely an OImode to
2971 correspond to TCmode. */
2972 if (ibitsize >= BITS_PER_WORD
2973 /* For hard regs we have exact predicates. Assume we can split
2974 the original object if it spans an even number of hard regs.
2975 This special case is important for SCmode on 64-bit platforms
2976 where the natural size of floating-point regs is 32-bit. */
2977 || (REG_P (cplx)
2978 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2979 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2980 {
2981 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2982 imag_p ? GET_MODE_SIZE (imode) : 0);
2983 if (ret)
2984 return ret;
2985 else
2986 /* simplify_gen_subreg may fail for sub-word MEMs. */
2987 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2988 }
2989
2990 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2991 true, false, NULL_RTX, imode, imode);
2992 }
2993 \f
2994 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2995 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2996 represented in NEW_MODE. If FORCE is true, this will never happen, as
2997 we'll force-create a SUBREG if needed. */
2998
2999 static rtx
3000 emit_move_change_mode (enum machine_mode new_mode,
3001 enum machine_mode old_mode, rtx x, bool force)
3002 {
3003 rtx ret;
3004
3005 if (push_operand (x, GET_MODE (x)))
3006 {
3007 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3008 MEM_COPY_ATTRIBUTES (ret, x);
3009 }
3010 else if (MEM_P (x))
3011 {
3012 /* We don't have to worry about changing the address since the
3013 size in bytes is supposed to be the same. */
3014 if (reload_in_progress)
3015 {
3016 /* Copy the MEM to change the mode and move any
3017 substitutions from the old MEM to the new one. */
3018 ret = adjust_address_nv (x, new_mode, 0);
3019 copy_replacements (x, ret);
3020 }
3021 else
3022 ret = adjust_address (x, new_mode, 0);
3023 }
3024 else
3025 {
3026 /* Note that we do want simplify_subreg's behavior of validating
3027 that the new mode is ok for a hard register. If we were to use
3028 simplify_gen_subreg, we would create the subreg, but would
3029 probably run into the target not being able to implement it. */
3030 /* Except, of course, when FORCE is true, when this is exactly what
3031 we want. Which is needed for CCmodes on some targets. */
3032 if (force)
3033 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3034 else
3035 ret = simplify_subreg (new_mode, x, old_mode, 0);
3036 }
3037
3038 return ret;
3039 }
3040
3041 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3042 an integer mode of the same size as MODE. Returns the instruction
3043 emitted, or NULL if such a move could not be generated. */
3044
3045 static rtx
3046 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3047 {
3048 enum machine_mode imode;
3049 enum insn_code code;
3050
3051 /* There must exist a mode of the exact size we require. */
3052 imode = int_mode_for_mode (mode);
3053 if (imode == BLKmode)
3054 return NULL_RTX;
3055
3056 /* The target must support moves in this mode. */
3057 code = optab_handler (mov_optab, imode);
3058 if (code == CODE_FOR_nothing)
3059 return NULL_RTX;
3060
3061 x = emit_move_change_mode (imode, mode, x, force);
3062 if (x == NULL_RTX)
3063 return NULL_RTX;
3064 y = emit_move_change_mode (imode, mode, y, force);
3065 if (y == NULL_RTX)
3066 return NULL_RTX;
3067 return emit_insn (GEN_FCN (code) (x, y));
3068 }
3069
3070 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3071 Return an equivalent MEM that does not use an auto-increment. */
3072
3073 static rtx
3074 emit_move_resolve_push (enum machine_mode mode, rtx x)
3075 {
3076 enum rtx_code code = GET_CODE (XEXP (x, 0));
3077 HOST_WIDE_INT adjust;
3078 rtx temp;
3079
3080 adjust = GET_MODE_SIZE (mode);
3081 #ifdef PUSH_ROUNDING
3082 adjust = PUSH_ROUNDING (adjust);
3083 #endif
3084 if (code == PRE_DEC || code == POST_DEC)
3085 adjust = -adjust;
3086 else if (code == PRE_MODIFY || code == POST_MODIFY)
3087 {
3088 rtx expr = XEXP (XEXP (x, 0), 1);
3089 HOST_WIDE_INT val;
3090
3091 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3092 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3093 val = INTVAL (XEXP (expr, 1));
3094 if (GET_CODE (expr) == MINUS)
3095 val = -val;
3096 gcc_assert (adjust == val || adjust == -val);
3097 adjust = val;
3098 }
3099
3100 /* Do not use anti_adjust_stack, since we don't want to update
3101 stack_pointer_delta. */
3102 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3103 GEN_INT (adjust), stack_pointer_rtx,
3104 0, OPTAB_LIB_WIDEN);
3105 if (temp != stack_pointer_rtx)
3106 emit_move_insn (stack_pointer_rtx, temp);
3107
3108 switch (code)
3109 {
3110 case PRE_INC:
3111 case PRE_DEC:
3112 case PRE_MODIFY:
3113 temp = stack_pointer_rtx;
3114 break;
3115 case POST_INC:
3116 case POST_DEC:
3117 case POST_MODIFY:
3118 temp = plus_constant (stack_pointer_rtx, -adjust);
3119 break;
3120 default:
3121 gcc_unreachable ();
3122 }
3123
3124 return replace_equiv_address (x, temp);
3125 }
3126
3127 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3128 X is known to satisfy push_operand, and MODE is known to be complex.
3129 Returns the last instruction emitted. */
3130
3131 rtx
3132 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3133 {
3134 enum machine_mode submode = GET_MODE_INNER (mode);
3135 bool imag_first;
3136
3137 #ifdef PUSH_ROUNDING
3138 unsigned int submodesize = GET_MODE_SIZE (submode);
3139
3140 /* In case we output to the stack, but the size is smaller than the
3141 machine can push exactly, we need to use move instructions. */
3142 if (PUSH_ROUNDING (submodesize) != submodesize)
3143 {
3144 x = emit_move_resolve_push (mode, x);
3145 return emit_move_insn (x, y);
3146 }
3147 #endif
3148
3149 /* Note that the real part always precedes the imag part in memory
3150 regardless of machine's endianness. */
3151 switch (GET_CODE (XEXP (x, 0)))
3152 {
3153 case PRE_DEC:
3154 case POST_DEC:
3155 imag_first = true;
3156 break;
3157 case PRE_INC:
3158 case POST_INC:
3159 imag_first = false;
3160 break;
3161 default:
3162 gcc_unreachable ();
3163 }
3164
3165 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3166 read_complex_part (y, imag_first));
3167 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3168 read_complex_part (y, !imag_first));
3169 }
3170
3171 /* A subroutine of emit_move_complex. Perform the move from Y to X
3172 via two moves of the parts. Returns the last instruction emitted. */
3173
3174 rtx
3175 emit_move_complex_parts (rtx x, rtx y)
3176 {
3177 /* Show the output dies here. This is necessary for SUBREGs
3178 of pseudos since we cannot track their lifetimes correctly;
3179 hard regs shouldn't appear here except as return values. */
3180 if (!reload_completed && !reload_in_progress
3181 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3182 emit_clobber (x);
3183
3184 write_complex_part (x, read_complex_part (y, false), false);
3185 write_complex_part (x, read_complex_part (y, true), true);
3186
3187 return get_last_insn ();
3188 }
3189
3190 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3191 MODE is known to be complex. Returns the last instruction emitted. */
3192
3193 static rtx
3194 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3195 {
3196 bool try_int;
3197
3198 /* Need to take special care for pushes, to maintain proper ordering
3199 of the data, and possibly extra padding. */
3200 if (push_operand (x, mode))
3201 return emit_move_complex_push (mode, x, y);
3202
3203 /* See if we can coerce the target into moving both values at once. */
3204
3205 /* Move floating point as parts. */
3206 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3207 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3208 try_int = false;
3209 /* Not possible if the values are inherently not adjacent. */
3210 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3211 try_int = false;
3212 /* Is possible if both are registers (or subregs of registers). */
3213 else if (register_operand (x, mode) && register_operand (y, mode))
3214 try_int = true;
3215 /* If one of the operands is a memory, and alignment constraints
3216 are friendly enough, we may be able to do combined memory operations.
3217 We do not attempt this if Y is a constant because that combination is
3218 usually better with the by-parts thing below. */
3219 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3220 && (!STRICT_ALIGNMENT
3221 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3222 try_int = true;
3223 else
3224 try_int = false;
3225
3226 if (try_int)
3227 {
3228 rtx ret;
3229
3230 /* For memory to memory moves, optimal behavior can be had with the
3231 existing block move logic. */
3232 if (MEM_P (x) && MEM_P (y))
3233 {
3234 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3235 BLOCK_OP_NO_LIBCALL);
3236 return get_last_insn ();
3237 }
3238
3239 ret = emit_move_via_integer (mode, x, y, true);
3240 if (ret)
3241 return ret;
3242 }
3243
3244 return emit_move_complex_parts (x, y);
3245 }
3246
3247 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3248 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3249
3250 static rtx
3251 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3252 {
3253 rtx ret;
3254
3255 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3256 if (mode != CCmode)
3257 {
3258 enum insn_code code = optab_handler (mov_optab, CCmode);
3259 if (code != CODE_FOR_nothing)
3260 {
3261 x = emit_move_change_mode (CCmode, mode, x, true);
3262 y = emit_move_change_mode (CCmode, mode, y, true);
3263 return emit_insn (GEN_FCN (code) (x, y));
3264 }
3265 }
3266
3267 /* Otherwise, find the MODE_INT mode of the same width. */
3268 ret = emit_move_via_integer (mode, x, y, false);
3269 gcc_assert (ret != NULL);
3270 return ret;
3271 }
3272
3273 /* Return true if word I of OP lies entirely in the
3274 undefined bits of a paradoxical subreg. */
3275
3276 static bool
3277 undefined_operand_subword_p (const_rtx op, int i)
3278 {
3279 enum machine_mode innermode, innermostmode;
3280 int offset;
3281 if (GET_CODE (op) != SUBREG)
3282 return false;
3283 innermode = GET_MODE (op);
3284 innermostmode = GET_MODE (SUBREG_REG (op));
3285 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3286 /* The SUBREG_BYTE represents offset, as if the value were stored in
3287 memory, except for a paradoxical subreg where we define
3288 SUBREG_BYTE to be 0; undo this exception as in
3289 simplify_subreg. */
3290 if (SUBREG_BYTE (op) == 0
3291 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3292 {
3293 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3294 if (WORDS_BIG_ENDIAN)
3295 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3296 if (BYTES_BIG_ENDIAN)
3297 offset += difference % UNITS_PER_WORD;
3298 }
3299 if (offset >= GET_MODE_SIZE (innermostmode)
3300 || offset <= -GET_MODE_SIZE (word_mode))
3301 return true;
3302 return false;
3303 }
3304
3305 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3306 MODE is any multi-word or full-word mode that lacks a move_insn
3307 pattern. Note that you will get better code if you define such
3308 patterns, even if they must turn into multiple assembler instructions. */
3309
3310 static rtx
3311 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3312 {
3313 rtx last_insn = 0;
3314 rtx seq, inner;
3315 bool need_clobber;
3316 int i;
3317
3318 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3319
3320 /* If X is a push on the stack, do the push now and replace
3321 X with a reference to the stack pointer. */
3322 if (push_operand (x, mode))
3323 x = emit_move_resolve_push (mode, x);
3324
3325 /* If we are in reload, see if either operand is a MEM whose address
3326 is scheduled for replacement. */
3327 if (reload_in_progress && MEM_P (x)
3328 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3329 x = replace_equiv_address_nv (x, inner);
3330 if (reload_in_progress && MEM_P (y)
3331 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3332 y = replace_equiv_address_nv (y, inner);
3333
3334 start_sequence ();
3335
3336 need_clobber = false;
3337 for (i = 0;
3338 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3339 i++)
3340 {
3341 rtx xpart = operand_subword (x, i, 1, mode);
3342 rtx ypart;
3343
3344 /* Do not generate code for a move if it would come entirely
3345 from the undefined bits of a paradoxical subreg. */
3346 if (undefined_operand_subword_p (y, i))
3347 continue;
3348
3349 ypart = operand_subword (y, i, 1, mode);
3350
3351 /* If we can't get a part of Y, put Y into memory if it is a
3352 constant. Otherwise, force it into a register. Then we must
3353 be able to get a part of Y. */
3354 if (ypart == 0 && CONSTANT_P (y))
3355 {
3356 y = use_anchored_address (force_const_mem (mode, y));
3357 ypart = operand_subword (y, i, 1, mode);
3358 }
3359 else if (ypart == 0)
3360 ypart = operand_subword_force (y, i, mode);
3361
3362 gcc_assert (xpart && ypart);
3363
3364 need_clobber |= (GET_CODE (xpart) == SUBREG);
3365
3366 last_insn = emit_move_insn (xpart, ypart);
3367 }
3368
3369 seq = get_insns ();
3370 end_sequence ();
3371
3372 /* Show the output dies here. This is necessary for SUBREGs
3373 of pseudos since we cannot track their lifetimes correctly;
3374 hard regs shouldn't appear here except as return values.
3375 We never want to emit such a clobber after reload. */
3376 if (x != y
3377 && ! (reload_in_progress || reload_completed)
3378 && need_clobber != 0)
3379 emit_clobber (x);
3380
3381 emit_insn (seq);
3382
3383 return last_insn;
3384 }
3385
3386 /* Low level part of emit_move_insn.
3387 Called just like emit_move_insn, but assumes X and Y
3388 are basically valid. */
3389
3390 rtx
3391 emit_move_insn_1 (rtx x, rtx y)
3392 {
3393 enum machine_mode mode = GET_MODE (x);
3394 enum insn_code code;
3395
3396 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3397
3398 code = optab_handler (mov_optab, mode);
3399 if (code != CODE_FOR_nothing)
3400 return emit_insn (GEN_FCN (code) (x, y));
3401
3402 /* Expand complex moves by moving real part and imag part. */
3403 if (COMPLEX_MODE_P (mode))
3404 return emit_move_complex (mode, x, y);
3405
3406 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3407 || ALL_FIXED_POINT_MODE_P (mode))
3408 {
3409 rtx result = emit_move_via_integer (mode, x, y, true);
3410
3411 /* If we can't find an integer mode, use multi words. */
3412 if (result)
3413 return result;
3414 else
3415 return emit_move_multi_word (mode, x, y);
3416 }
3417
3418 if (GET_MODE_CLASS (mode) == MODE_CC)
3419 return emit_move_ccmode (mode, x, y);
3420
3421 /* Try using a move pattern for the corresponding integer mode. This is
3422 only safe when simplify_subreg can convert MODE constants into integer
3423 constants. At present, it can only do this reliably if the value
3424 fits within a HOST_WIDE_INT. */
3425 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3426 {
3427 rtx ret = emit_move_via_integer (mode, x, y, false);
3428 if (ret)
3429 return ret;
3430 }
3431
3432 return emit_move_multi_word (mode, x, y);
3433 }
3434
3435 /* Generate code to copy Y into X.
3436 Both Y and X must have the same mode, except that
3437 Y can be a constant with VOIDmode.
3438 This mode cannot be BLKmode; use emit_block_move for that.
3439
3440 Return the last instruction emitted. */
3441
3442 rtx
3443 emit_move_insn (rtx x, rtx y)
3444 {
3445 enum machine_mode mode = GET_MODE (x);
3446 rtx y_cst = NULL_RTX;
3447 rtx last_insn, set;
3448
3449 gcc_assert (mode != BLKmode
3450 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3451
3452 if (CONSTANT_P (y))
3453 {
3454 if (optimize
3455 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3456 && (last_insn = compress_float_constant (x, y)))
3457 return last_insn;
3458
3459 y_cst = y;
3460
3461 if (!targetm.legitimate_constant_p (mode, y))
3462 {
3463 y = force_const_mem (mode, y);
3464
3465 /* If the target's cannot_force_const_mem prevented the spill,
3466 assume that the target's move expanders will also take care
3467 of the non-legitimate constant. */
3468 if (!y)
3469 y = y_cst;
3470 else
3471 y = use_anchored_address (y);
3472 }
3473 }
3474
3475 /* If X or Y are memory references, verify that their addresses are valid
3476 for the machine. */
3477 if (MEM_P (x)
3478 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3479 MEM_ADDR_SPACE (x))
3480 && ! push_operand (x, GET_MODE (x))))
3481 x = validize_mem (x);
3482
3483 if (MEM_P (y)
3484 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3485 MEM_ADDR_SPACE (y)))
3486 y = validize_mem (y);
3487
3488 gcc_assert (mode != BLKmode);
3489
3490 last_insn = emit_move_insn_1 (x, y);
3491
3492 if (y_cst && REG_P (x)
3493 && (set = single_set (last_insn)) != NULL_RTX
3494 && SET_DEST (set) == x
3495 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3496 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3497
3498 return last_insn;
3499 }
3500
3501 /* If Y is representable exactly in a narrower mode, and the target can
3502 perform the extension directly from constant or memory, then emit the
3503 move as an extension. */
3504
3505 static rtx
3506 compress_float_constant (rtx x, rtx y)
3507 {
3508 enum machine_mode dstmode = GET_MODE (x);
3509 enum machine_mode orig_srcmode = GET_MODE (y);
3510 enum machine_mode srcmode;
3511 REAL_VALUE_TYPE r;
3512 int oldcost, newcost;
3513 bool speed = optimize_insn_for_speed_p ();
3514
3515 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3516
3517 if (targetm.legitimate_constant_p (dstmode, y))
3518 oldcost = set_src_cost (y, speed);
3519 else
3520 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3521
3522 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3523 srcmode != orig_srcmode;
3524 srcmode = GET_MODE_WIDER_MODE (srcmode))
3525 {
3526 enum insn_code ic;
3527 rtx trunc_y, last_insn;
3528
3529 /* Skip if the target can't extend this way. */
3530 ic = can_extend_p (dstmode, srcmode, 0);
3531 if (ic == CODE_FOR_nothing)
3532 continue;
3533
3534 /* Skip if the narrowed value isn't exact. */
3535 if (! exact_real_truncate (srcmode, &r))
3536 continue;
3537
3538 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3539
3540 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3541 {
3542 /* Skip if the target needs extra instructions to perform
3543 the extension. */
3544 if (!insn_operand_matches (ic, 1, trunc_y))
3545 continue;
3546 /* This is valid, but may not be cheaper than the original. */
3547 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3548 speed);
3549 if (oldcost < newcost)
3550 continue;
3551 }
3552 else if (float_extend_from_mem[dstmode][srcmode])
3553 {
3554 trunc_y = force_const_mem (srcmode, trunc_y);
3555 /* This is valid, but may not be cheaper than the original. */
3556 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3557 speed);
3558 if (oldcost < newcost)
3559 continue;
3560 trunc_y = validize_mem (trunc_y);
3561 }
3562 else
3563 continue;
3564
3565 /* For CSE's benefit, force the compressed constant pool entry
3566 into a new pseudo. This constant may be used in different modes,
3567 and if not, combine will put things back together for us. */
3568 trunc_y = force_reg (srcmode, trunc_y);
3569 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3570 last_insn = get_last_insn ();
3571
3572 if (REG_P (x))
3573 set_unique_reg_note (last_insn, REG_EQUAL, y);
3574
3575 return last_insn;
3576 }
3577
3578 return NULL_RTX;
3579 }
3580 \f
3581 /* Pushing data onto the stack. */
3582
3583 /* Push a block of length SIZE (perhaps variable)
3584 and return an rtx to address the beginning of the block.
3585 The value may be virtual_outgoing_args_rtx.
3586
3587 EXTRA is the number of bytes of padding to push in addition to SIZE.
3588 BELOW nonzero means this padding comes at low addresses;
3589 otherwise, the padding comes at high addresses. */
3590
3591 rtx
3592 push_block (rtx size, int extra, int below)
3593 {
3594 rtx temp;
3595
3596 size = convert_modes (Pmode, ptr_mode, size, 1);
3597 if (CONSTANT_P (size))
3598 anti_adjust_stack (plus_constant (size, extra));
3599 else if (REG_P (size) && extra == 0)
3600 anti_adjust_stack (size);
3601 else
3602 {
3603 temp = copy_to_mode_reg (Pmode, size);
3604 if (extra != 0)
3605 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3606 temp, 0, OPTAB_LIB_WIDEN);
3607 anti_adjust_stack (temp);
3608 }
3609
3610 #ifndef STACK_GROWS_DOWNWARD
3611 if (0)
3612 #else
3613 if (1)
3614 #endif
3615 {
3616 temp = virtual_outgoing_args_rtx;
3617 if (extra != 0 && below)
3618 temp = plus_constant (temp, extra);
3619 }
3620 else
3621 {
3622 if (CONST_INT_P (size))
3623 temp = plus_constant (virtual_outgoing_args_rtx,
3624 -INTVAL (size) - (below ? 0 : extra));
3625 else if (extra != 0 && !below)
3626 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3627 negate_rtx (Pmode, plus_constant (size, extra)));
3628 else
3629 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3630 negate_rtx (Pmode, size));
3631 }
3632
3633 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3634 }
3635
3636 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3637
3638 static rtx
3639 mem_autoinc_base (rtx mem)
3640 {
3641 if (MEM_P (mem))
3642 {
3643 rtx addr = XEXP (mem, 0);
3644 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3645 return XEXP (addr, 0);
3646 }
3647 return NULL;
3648 }
3649
3650 /* A utility routine used here, in reload, and in try_split. The insns
3651 after PREV up to and including LAST are known to adjust the stack,
3652 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3653 placing notes as appropriate. PREV may be NULL, indicating the
3654 entire insn sequence prior to LAST should be scanned.
3655
3656 The set of allowed stack pointer modifications is small:
3657 (1) One or more auto-inc style memory references (aka pushes),
3658 (2) One or more addition/subtraction with the SP as destination,
3659 (3) A single move insn with the SP as destination,
3660 (4) A call_pop insn,
3661 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3662
3663 Insns in the sequence that do not modify the SP are ignored,
3664 except for noreturn calls.
3665
3666 The return value is the amount of adjustment that can be trivially
3667 verified, via immediate operand or auto-inc. If the adjustment
3668 cannot be trivially extracted, the return value is INT_MIN. */
3669
3670 HOST_WIDE_INT
3671 find_args_size_adjust (rtx insn)
3672 {
3673 rtx dest, set, pat;
3674 int i;
3675
3676 pat = PATTERN (insn);
3677 set = NULL;
3678
3679 /* Look for a call_pop pattern. */
3680 if (CALL_P (insn))
3681 {
3682 /* We have to allow non-call_pop patterns for the case
3683 of emit_single_push_insn of a TLS address. */
3684 if (GET_CODE (pat) != PARALLEL)
3685 return 0;
3686
3687 /* All call_pop have a stack pointer adjust in the parallel.
3688 The call itself is always first, and the stack adjust is
3689 usually last, so search from the end. */
3690 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3691 {
3692 set = XVECEXP (pat, 0, i);
3693 if (GET_CODE (set) != SET)
3694 continue;
3695 dest = SET_DEST (set);
3696 if (dest == stack_pointer_rtx)
3697 break;
3698 }
3699 /* We'd better have found the stack pointer adjust. */
3700 if (i == 0)
3701 return 0;
3702 /* Fall through to process the extracted SET and DEST
3703 as if it was a standalone insn. */
3704 }
3705 else if (GET_CODE (pat) == SET)
3706 set = pat;
3707 else if ((set = single_set (insn)) != NULL)
3708 ;
3709 else if (GET_CODE (pat) == PARALLEL)
3710 {
3711 /* ??? Some older ports use a parallel with a stack adjust
3712 and a store for a PUSH_ROUNDING pattern, rather than a
3713 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3714 /* ??? See h8300 and m68k, pushqi1. */
3715 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3716 {
3717 set = XVECEXP (pat, 0, i);
3718 if (GET_CODE (set) != SET)
3719 continue;
3720 dest = SET_DEST (set);
3721 if (dest == stack_pointer_rtx)
3722 break;
3723
3724 /* We do not expect an auto-inc of the sp in the parallel. */
3725 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3726 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3727 != stack_pointer_rtx);
3728 }
3729 if (i < 0)
3730 return 0;
3731 }
3732 else
3733 return 0;
3734
3735 dest = SET_DEST (set);
3736
3737 /* Look for direct modifications of the stack pointer. */
3738 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3739 {
3740 /* Look for a trivial adjustment, otherwise assume nothing. */
3741 /* Note that the SPU restore_stack_block pattern refers to
3742 the stack pointer in V4SImode. Consider that non-trivial. */
3743 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3744 && GET_CODE (SET_SRC (set)) == PLUS
3745 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3746 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3747 return INTVAL (XEXP (SET_SRC (set), 1));
3748 /* ??? Reload can generate no-op moves, which will be cleaned
3749 up later. Recognize it and continue searching. */
3750 else if (rtx_equal_p (dest, SET_SRC (set)))
3751 return 0;
3752 else
3753 return HOST_WIDE_INT_MIN;
3754 }
3755 else
3756 {
3757 rtx mem, addr;
3758
3759 /* Otherwise only think about autoinc patterns. */
3760 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3761 {
3762 mem = dest;
3763 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3764 != stack_pointer_rtx);
3765 }
3766 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3767 mem = SET_SRC (set);
3768 else
3769 return 0;
3770
3771 addr = XEXP (mem, 0);
3772 switch (GET_CODE (addr))
3773 {
3774 case PRE_INC:
3775 case POST_INC:
3776 return GET_MODE_SIZE (GET_MODE (mem));
3777 case PRE_DEC:
3778 case POST_DEC:
3779 return -GET_MODE_SIZE (GET_MODE (mem));
3780 case PRE_MODIFY:
3781 case POST_MODIFY:
3782 addr = XEXP (addr, 1);
3783 gcc_assert (GET_CODE (addr) == PLUS);
3784 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3785 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3786 return INTVAL (XEXP (addr, 1));
3787 default:
3788 gcc_unreachable ();
3789 }
3790 }
3791 }
3792
3793 int
3794 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3795 {
3796 int args_size = end_args_size;
3797 bool saw_unknown = false;
3798 rtx insn;
3799
3800 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3801 {
3802 HOST_WIDE_INT this_delta;
3803
3804 if (!NONDEBUG_INSN_P (insn))
3805 continue;
3806
3807 this_delta = find_args_size_adjust (insn);
3808 if (this_delta == 0)
3809 {
3810 if (!CALL_P (insn)
3811 || ACCUMULATE_OUTGOING_ARGS
3812 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3813 continue;
3814 }
3815
3816 gcc_assert (!saw_unknown);
3817 if (this_delta == HOST_WIDE_INT_MIN)
3818 saw_unknown = true;
3819
3820 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3821 #ifdef STACK_GROWS_DOWNWARD
3822 this_delta = -this_delta;
3823 #endif
3824 args_size -= this_delta;
3825 }
3826
3827 return saw_unknown ? INT_MIN : args_size;
3828 }
3829
3830 #ifdef PUSH_ROUNDING
3831 /* Emit single push insn. */
3832
3833 static void
3834 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3835 {
3836 rtx dest_addr;
3837 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3838 rtx dest;
3839 enum insn_code icode;
3840
3841 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3842 /* If there is push pattern, use it. Otherwise try old way of throwing
3843 MEM representing push operation to move expander. */
3844 icode = optab_handler (push_optab, mode);
3845 if (icode != CODE_FOR_nothing)
3846 {
3847 struct expand_operand ops[1];
3848
3849 create_input_operand (&ops[0], x, mode);
3850 if (maybe_expand_insn (icode, 1, ops))
3851 return;
3852 }
3853 if (GET_MODE_SIZE (mode) == rounded_size)
3854 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3855 /* If we are to pad downward, adjust the stack pointer first and
3856 then store X into the stack location using an offset. This is
3857 because emit_move_insn does not know how to pad; it does not have
3858 access to type. */
3859 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3860 {
3861 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3862 HOST_WIDE_INT offset;
3863
3864 emit_move_insn (stack_pointer_rtx,
3865 expand_binop (Pmode,
3866 #ifdef STACK_GROWS_DOWNWARD
3867 sub_optab,
3868 #else
3869 add_optab,
3870 #endif
3871 stack_pointer_rtx,
3872 GEN_INT (rounded_size),
3873 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3874
3875 offset = (HOST_WIDE_INT) padding_size;
3876 #ifdef STACK_GROWS_DOWNWARD
3877 if (STACK_PUSH_CODE == POST_DEC)
3878 /* We have already decremented the stack pointer, so get the
3879 previous value. */
3880 offset += (HOST_WIDE_INT) rounded_size;
3881 #else
3882 if (STACK_PUSH_CODE == POST_INC)
3883 /* We have already incremented the stack pointer, so get the
3884 previous value. */
3885 offset -= (HOST_WIDE_INT) rounded_size;
3886 #endif
3887 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3888 }
3889 else
3890 {
3891 #ifdef STACK_GROWS_DOWNWARD
3892 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3893 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3894 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3895 #else
3896 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3897 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3898 GEN_INT (rounded_size));
3899 #endif
3900 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3901 }
3902
3903 dest = gen_rtx_MEM (mode, dest_addr);
3904
3905 if (type != 0)
3906 {
3907 set_mem_attributes (dest, type, 1);
3908
3909 if (flag_optimize_sibling_calls)
3910 /* Function incoming arguments may overlap with sibling call
3911 outgoing arguments and we cannot allow reordering of reads
3912 from function arguments with stores to outgoing arguments
3913 of sibling calls. */
3914 set_mem_alias_set (dest, 0);
3915 }
3916 emit_move_insn (dest, x);
3917 }
3918
3919 /* Emit and annotate a single push insn. */
3920
3921 static void
3922 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3923 {
3924 int delta, old_delta = stack_pointer_delta;
3925 rtx prev = get_last_insn ();
3926 rtx last;
3927
3928 emit_single_push_insn_1 (mode, x, type);
3929
3930 last = get_last_insn ();
3931
3932 /* Notice the common case where we emitted exactly one insn. */
3933 if (PREV_INSN (last) == prev)
3934 {
3935 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3936 return;
3937 }
3938
3939 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3940 gcc_assert (delta == INT_MIN || delta == old_delta);
3941 }
3942 #endif
3943
3944 /* Generate code to push X onto the stack, assuming it has mode MODE and
3945 type TYPE.
3946 MODE is redundant except when X is a CONST_INT (since they don't
3947 carry mode info).
3948 SIZE is an rtx for the size of data to be copied (in bytes),
3949 needed only if X is BLKmode.
3950
3951 ALIGN (in bits) is maximum alignment we can assume.
3952
3953 If PARTIAL and REG are both nonzero, then copy that many of the first
3954 bytes of X into registers starting with REG, and push the rest of X.
3955 The amount of space pushed is decreased by PARTIAL bytes.
3956 REG must be a hard register in this case.
3957 If REG is zero but PARTIAL is not, take any all others actions for an
3958 argument partially in registers, but do not actually load any
3959 registers.
3960
3961 EXTRA is the amount in bytes of extra space to leave next to this arg.
3962 This is ignored if an argument block has already been allocated.
3963
3964 On a machine that lacks real push insns, ARGS_ADDR is the address of
3965 the bottom of the argument block for this call. We use indexing off there
3966 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3967 argument block has not been preallocated.
3968
3969 ARGS_SO_FAR is the size of args previously pushed for this call.
3970
3971 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3972 for arguments passed in registers. If nonzero, it will be the number
3973 of bytes required. */
3974
3975 void
3976 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3977 unsigned int align, int partial, rtx reg, int extra,
3978 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3979 rtx alignment_pad)
3980 {
3981 rtx xinner;
3982 enum direction stack_direction
3983 #ifdef STACK_GROWS_DOWNWARD
3984 = downward;
3985 #else
3986 = upward;
3987 #endif
3988
3989 /* Decide where to pad the argument: `downward' for below,
3990 `upward' for above, or `none' for don't pad it.
3991 Default is below for small data on big-endian machines; else above. */
3992 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3993
3994 /* Invert direction if stack is post-decrement.
3995 FIXME: why? */
3996 if (STACK_PUSH_CODE == POST_DEC)
3997 if (where_pad != none)
3998 where_pad = (where_pad == downward ? upward : downward);
3999
4000 xinner = x;
4001
4002 if (mode == BLKmode
4003 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4004 {
4005 /* Copy a block into the stack, entirely or partially. */
4006
4007 rtx temp;
4008 int used;
4009 int offset;
4010 int skip;
4011
4012 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4013 used = partial - offset;
4014
4015 if (mode != BLKmode)
4016 {
4017 /* A value is to be stored in an insufficiently aligned
4018 stack slot; copy via a suitably aligned slot if
4019 necessary. */
4020 size = GEN_INT (GET_MODE_SIZE (mode));
4021 if (!MEM_P (xinner))
4022 {
4023 temp = assign_temp (type, 0, 1, 1);
4024 emit_move_insn (temp, xinner);
4025 xinner = temp;
4026 }
4027 }
4028
4029 gcc_assert (size);
4030
4031 /* USED is now the # of bytes we need not copy to the stack
4032 because registers will take care of them. */
4033
4034 if (partial != 0)
4035 xinner = adjust_address (xinner, BLKmode, used);
4036
4037 /* If the partial register-part of the arg counts in its stack size,
4038 skip the part of stack space corresponding to the registers.
4039 Otherwise, start copying to the beginning of the stack space,
4040 by setting SKIP to 0. */
4041 skip = (reg_parm_stack_space == 0) ? 0 : used;
4042
4043 #ifdef PUSH_ROUNDING
4044 /* Do it with several push insns if that doesn't take lots of insns
4045 and if there is no difficulty with push insns that skip bytes
4046 on the stack for alignment purposes. */
4047 if (args_addr == 0
4048 && PUSH_ARGS
4049 && CONST_INT_P (size)
4050 && skip == 0
4051 && MEM_ALIGN (xinner) >= align
4052 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
4053 /* Here we avoid the case of a structure whose weak alignment
4054 forces many pushes of a small amount of data,
4055 and such small pushes do rounding that causes trouble. */
4056 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4057 || align >= BIGGEST_ALIGNMENT
4058 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4059 == (align / BITS_PER_UNIT)))
4060 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4061 {
4062 /* Push padding now if padding above and stack grows down,
4063 or if padding below and stack grows up.
4064 But if space already allocated, this has already been done. */
4065 if (extra && args_addr == 0
4066 && where_pad != none && where_pad != stack_direction)
4067 anti_adjust_stack (GEN_INT (extra));
4068
4069 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4070 }
4071 else
4072 #endif /* PUSH_ROUNDING */
4073 {
4074 rtx target;
4075
4076 /* Otherwise make space on the stack and copy the data
4077 to the address of that space. */
4078
4079 /* Deduct words put into registers from the size we must copy. */
4080 if (partial != 0)
4081 {
4082 if (CONST_INT_P (size))
4083 size = GEN_INT (INTVAL (size) - used);
4084 else
4085 size = expand_binop (GET_MODE (size), sub_optab, size,
4086 GEN_INT (used), NULL_RTX, 0,
4087 OPTAB_LIB_WIDEN);
4088 }
4089
4090 /* Get the address of the stack space.
4091 In this case, we do not deal with EXTRA separately.
4092 A single stack adjust will do. */
4093 if (! args_addr)
4094 {
4095 temp = push_block (size, extra, where_pad == downward);
4096 extra = 0;
4097 }
4098 else if (CONST_INT_P (args_so_far))
4099 temp = memory_address (BLKmode,
4100 plus_constant (args_addr,
4101 skip + INTVAL (args_so_far)));
4102 else
4103 temp = memory_address (BLKmode,
4104 plus_constant (gen_rtx_PLUS (Pmode,
4105 args_addr,
4106 args_so_far),
4107 skip));
4108
4109 if (!ACCUMULATE_OUTGOING_ARGS)
4110 {
4111 /* If the source is referenced relative to the stack pointer,
4112 copy it to another register to stabilize it. We do not need
4113 to do this if we know that we won't be changing sp. */
4114
4115 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4116 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4117 temp = copy_to_reg (temp);
4118 }
4119
4120 target = gen_rtx_MEM (BLKmode, temp);
4121
4122 /* We do *not* set_mem_attributes here, because incoming arguments
4123 may overlap with sibling call outgoing arguments and we cannot
4124 allow reordering of reads from function arguments with stores
4125 to outgoing arguments of sibling calls. We do, however, want
4126 to record the alignment of the stack slot. */
4127 /* ALIGN may well be better aligned than TYPE, e.g. due to
4128 PARM_BOUNDARY. Assume the caller isn't lying. */
4129 set_mem_align (target, align);
4130
4131 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4132 }
4133 }
4134 else if (partial > 0)
4135 {
4136 /* Scalar partly in registers. */
4137
4138 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4139 int i;
4140 int not_stack;
4141 /* # bytes of start of argument
4142 that we must make space for but need not store. */
4143 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4144 int args_offset = INTVAL (args_so_far);
4145 int skip;
4146
4147 /* Push padding now if padding above and stack grows down,
4148 or if padding below and stack grows up.
4149 But if space already allocated, this has already been done. */
4150 if (extra && args_addr == 0
4151 && where_pad != none && where_pad != stack_direction)
4152 anti_adjust_stack (GEN_INT (extra));
4153
4154 /* If we make space by pushing it, we might as well push
4155 the real data. Otherwise, we can leave OFFSET nonzero
4156 and leave the space uninitialized. */
4157 if (args_addr == 0)
4158 offset = 0;
4159
4160 /* Now NOT_STACK gets the number of words that we don't need to
4161 allocate on the stack. Convert OFFSET to words too. */
4162 not_stack = (partial - offset) / UNITS_PER_WORD;
4163 offset /= UNITS_PER_WORD;
4164
4165 /* If the partial register-part of the arg counts in its stack size,
4166 skip the part of stack space corresponding to the registers.
4167 Otherwise, start copying to the beginning of the stack space,
4168 by setting SKIP to 0. */
4169 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4170
4171 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4172 x = validize_mem (force_const_mem (mode, x));
4173
4174 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4175 SUBREGs of such registers are not allowed. */
4176 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4177 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4178 x = copy_to_reg (x);
4179
4180 /* Loop over all the words allocated on the stack for this arg. */
4181 /* We can do it by words, because any scalar bigger than a word
4182 has a size a multiple of a word. */
4183 #ifndef PUSH_ARGS_REVERSED
4184 for (i = not_stack; i < size; i++)
4185 #else
4186 for (i = size - 1; i >= not_stack; i--)
4187 #endif
4188 if (i >= not_stack + offset)
4189 emit_push_insn (operand_subword_force (x, i, mode),
4190 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4191 0, args_addr,
4192 GEN_INT (args_offset + ((i - not_stack + skip)
4193 * UNITS_PER_WORD)),
4194 reg_parm_stack_space, alignment_pad);
4195 }
4196 else
4197 {
4198 rtx addr;
4199 rtx dest;
4200
4201 /* Push padding now if padding above and stack grows down,
4202 or if padding below and stack grows up.
4203 But if space already allocated, this has already been done. */
4204 if (extra && args_addr == 0
4205 && where_pad != none && where_pad != stack_direction)
4206 anti_adjust_stack (GEN_INT (extra));
4207
4208 #ifdef PUSH_ROUNDING
4209 if (args_addr == 0 && PUSH_ARGS)
4210 emit_single_push_insn (mode, x, type);
4211 else
4212 #endif
4213 {
4214 if (CONST_INT_P (args_so_far))
4215 addr
4216 = memory_address (mode,
4217 plus_constant (args_addr,
4218 INTVAL (args_so_far)));
4219 else
4220 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4221 args_so_far));
4222 dest = gen_rtx_MEM (mode, addr);
4223
4224 /* We do *not* set_mem_attributes here, because incoming arguments
4225 may overlap with sibling call outgoing arguments and we cannot
4226 allow reordering of reads from function arguments with stores
4227 to outgoing arguments of sibling calls. We do, however, want
4228 to record the alignment of the stack slot. */
4229 /* ALIGN may well be better aligned than TYPE, e.g. due to
4230 PARM_BOUNDARY. Assume the caller isn't lying. */
4231 set_mem_align (dest, align);
4232
4233 emit_move_insn (dest, x);
4234 }
4235 }
4236
4237 /* If part should go in registers, copy that part
4238 into the appropriate registers. Do this now, at the end,
4239 since mem-to-mem copies above may do function calls. */
4240 if (partial > 0 && reg != 0)
4241 {
4242 /* Handle calls that pass values in multiple non-contiguous locations.
4243 The Irix 6 ABI has examples of this. */
4244 if (GET_CODE (reg) == PARALLEL)
4245 emit_group_load (reg, x, type, -1);
4246 else
4247 {
4248 gcc_assert (partial % UNITS_PER_WORD == 0);
4249 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4250 }
4251 }
4252
4253 if (extra && args_addr == 0 && where_pad == stack_direction)
4254 anti_adjust_stack (GEN_INT (extra));
4255
4256 if (alignment_pad && args_addr == 0)
4257 anti_adjust_stack (alignment_pad);
4258 }
4259 \f
4260 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4261 operations. */
4262
4263 static rtx
4264 get_subtarget (rtx x)
4265 {
4266 return (optimize
4267 || x == 0
4268 /* Only registers can be subtargets. */
4269 || !REG_P (x)
4270 /* Don't use hard regs to avoid extending their life. */
4271 || REGNO (x) < FIRST_PSEUDO_REGISTER
4272 ? 0 : x);
4273 }
4274
4275 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4276 FIELD is a bitfield. Returns true if the optimization was successful,
4277 and there's nothing else to do. */
4278
4279 static bool
4280 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4281 unsigned HOST_WIDE_INT bitpos,
4282 unsigned HOST_WIDE_INT bitregion_start,
4283 unsigned HOST_WIDE_INT bitregion_end,
4284 enum machine_mode mode1, rtx str_rtx,
4285 tree to, tree src)
4286 {
4287 enum machine_mode str_mode = GET_MODE (str_rtx);
4288 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4289 tree op0, op1;
4290 rtx value, result;
4291 optab binop;
4292 gimple srcstmt;
4293 enum tree_code code;
4294
4295 if (mode1 != VOIDmode
4296 || bitsize >= BITS_PER_WORD
4297 || str_bitsize > BITS_PER_WORD
4298 || TREE_SIDE_EFFECTS (to)
4299 || TREE_THIS_VOLATILE (to))
4300 return false;
4301
4302 STRIP_NOPS (src);
4303 if (TREE_CODE (src) != SSA_NAME)
4304 return false;
4305 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4306 return false;
4307
4308 srcstmt = get_gimple_for_ssa_name (src);
4309 if (!srcstmt
4310 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4311 return false;
4312
4313 code = gimple_assign_rhs_code (srcstmt);
4314
4315 op0 = gimple_assign_rhs1 (srcstmt);
4316
4317 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4318 to find its initialization. Hopefully the initialization will
4319 be from a bitfield load. */
4320 if (TREE_CODE (op0) == SSA_NAME)
4321 {
4322 gimple op0stmt = get_gimple_for_ssa_name (op0);
4323
4324 /* We want to eventually have OP0 be the same as TO, which
4325 should be a bitfield. */
4326 if (!op0stmt
4327 || !is_gimple_assign (op0stmt)
4328 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4329 return false;
4330 op0 = gimple_assign_rhs1 (op0stmt);
4331 }
4332
4333 op1 = gimple_assign_rhs2 (srcstmt);
4334
4335 if (!operand_equal_p (to, op0, 0))
4336 return false;
4337
4338 if (MEM_P (str_rtx))
4339 {
4340 unsigned HOST_WIDE_INT offset1;
4341
4342 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4343 str_mode = word_mode;
4344 str_mode = get_best_mode (bitsize, bitpos,
4345 bitregion_start, bitregion_end,
4346 MEM_ALIGN (str_rtx), str_mode, 0);
4347 if (str_mode == VOIDmode)
4348 return false;
4349 str_bitsize = GET_MODE_BITSIZE (str_mode);
4350
4351 offset1 = bitpos;
4352 bitpos %= str_bitsize;
4353 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4354 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4355 }
4356 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4357 return false;
4358
4359 /* If the bit field covers the whole REG/MEM, store_field
4360 will likely generate better code. */
4361 if (bitsize >= str_bitsize)
4362 return false;
4363
4364 /* We can't handle fields split across multiple entities. */
4365 if (bitpos + bitsize > str_bitsize)
4366 return false;
4367
4368 if (BYTES_BIG_ENDIAN)
4369 bitpos = str_bitsize - bitpos - bitsize;
4370
4371 switch (code)
4372 {
4373 case PLUS_EXPR:
4374 case MINUS_EXPR:
4375 /* For now, just optimize the case of the topmost bitfield
4376 where we don't need to do any masking and also
4377 1 bit bitfields where xor can be used.
4378 We might win by one instruction for the other bitfields
4379 too if insv/extv instructions aren't used, so that
4380 can be added later. */
4381 if (bitpos + bitsize != str_bitsize
4382 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4383 break;
4384
4385 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4386 value = convert_modes (str_mode,
4387 TYPE_MODE (TREE_TYPE (op1)), value,
4388 TYPE_UNSIGNED (TREE_TYPE (op1)));
4389
4390 /* We may be accessing data outside the field, which means
4391 we can alias adjacent data. */
4392 if (MEM_P (str_rtx))
4393 {
4394 str_rtx = shallow_copy_rtx (str_rtx);
4395 set_mem_alias_set (str_rtx, 0);
4396 set_mem_expr (str_rtx, 0);
4397 }
4398
4399 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4400 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4401 {
4402 value = expand_and (str_mode, value, const1_rtx, NULL);
4403 binop = xor_optab;
4404 }
4405 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4406 result = expand_binop (str_mode, binop, str_rtx,
4407 value, str_rtx, 1, OPTAB_WIDEN);
4408 if (result != str_rtx)
4409 emit_move_insn (str_rtx, result);
4410 return true;
4411
4412 case BIT_IOR_EXPR:
4413 case BIT_XOR_EXPR:
4414 if (TREE_CODE (op1) != INTEGER_CST)
4415 break;
4416 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4417 value = convert_modes (str_mode,
4418 TYPE_MODE (TREE_TYPE (op1)), value,
4419 TYPE_UNSIGNED (TREE_TYPE (op1)));
4420
4421 /* We may be accessing data outside the field, which means
4422 we can alias adjacent data. */
4423 if (MEM_P (str_rtx))
4424 {
4425 str_rtx = shallow_copy_rtx (str_rtx);
4426 set_mem_alias_set (str_rtx, 0);
4427 set_mem_expr (str_rtx, 0);
4428 }
4429
4430 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4431 if (bitpos + bitsize != str_bitsize)
4432 {
4433 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1);
4434 value = expand_and (str_mode, value, mask, NULL_RTX);
4435 }
4436 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4437 result = expand_binop (str_mode, binop, str_rtx,
4438 value, str_rtx, 1, OPTAB_WIDEN);
4439 if (result != str_rtx)
4440 emit_move_insn (str_rtx, result);
4441 return true;
4442
4443 default:
4444 break;
4445 }
4446
4447 return false;
4448 }
4449
4450 /* In the C++ memory model, consecutive bit fields in a structure are
4451 considered one memory location.
4452
4453 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4454 returns the bit range of consecutive bits in which this COMPONENT_REF
4455 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4456 and *OFFSET may be adjusted in the process.
4457
4458 If the access does not need to be restricted, 0 is returned in both
4459 *BITSTART and *BITEND. */
4460
4461 static void
4462 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4463 unsigned HOST_WIDE_INT *bitend,
4464 tree exp,
4465 HOST_WIDE_INT *bitpos,
4466 tree *offset)
4467 {
4468 HOST_WIDE_INT bitoffset;
4469 tree field, repr;
4470
4471 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4472
4473 field = TREE_OPERAND (exp, 1);
4474 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4475 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4476 need to limit the range we can access. */
4477 if (!repr)
4478 {
4479 *bitstart = *bitend = 0;
4480 return;
4481 }
4482
4483 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4484 part of a larger bit field, then the representative does not serve any
4485 useful purpose. This can occur in Ada. */
4486 if (handled_component_p (TREE_OPERAND (exp, 0)))
4487 {
4488 enum machine_mode rmode;
4489 HOST_WIDE_INT rbitsize, rbitpos;
4490 tree roffset;
4491 int unsignedp;
4492 int volatilep = 0;
4493 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4494 &roffset, &rmode, &unsignedp, &volatilep, false);
4495 if ((rbitpos % BITS_PER_UNIT) != 0)
4496 {
4497 *bitstart = *bitend = 0;
4498 return;
4499 }
4500 }
4501
4502 /* Compute the adjustment to bitpos from the offset of the field
4503 relative to the representative. DECL_FIELD_OFFSET of field and
4504 repr are the same by construction if they are not constants,
4505 see finish_bitfield_layout. */
4506 if (host_integerp (DECL_FIELD_OFFSET (field), 1)
4507 && host_integerp (DECL_FIELD_OFFSET (repr), 1))
4508 bitoffset = (tree_low_cst (DECL_FIELD_OFFSET (field), 1)
4509 - tree_low_cst (DECL_FIELD_OFFSET (repr), 1)) * BITS_PER_UNIT;
4510 else
4511 bitoffset = 0;
4512 bitoffset += (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
4513 - tree_low_cst (DECL_FIELD_BIT_OFFSET (repr), 1));
4514
4515 /* If the adjustment is larger than bitpos, we would have a negative bit
4516 position for the lower bound and this may wreak havoc later. This can
4517 occur only if we have a non-null offset, so adjust offset and bitpos
4518 to make the lower bound non-negative. */
4519 if (bitoffset > *bitpos)
4520 {
4521 HOST_WIDE_INT adjust = bitoffset - *bitpos;
4522
4523 gcc_assert ((adjust % BITS_PER_UNIT) == 0);
4524 gcc_assert (*offset != NULL_TREE);
4525
4526 *bitpos += adjust;
4527 *offset
4528 = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));
4529 *bitstart = 0;
4530 }
4531 else
4532 *bitstart = *bitpos - bitoffset;
4533
4534 *bitend = *bitstart + tree_low_cst (DECL_SIZE (repr), 1) - 1;
4535 }
4536
4537 /* Returns true if the MEM_REF REF refers to an object that does not
4538 reside in memory and has non-BLKmode. */
4539
4540 static bool
4541 mem_ref_refers_to_non_mem_p (tree ref)
4542 {
4543 tree base = TREE_OPERAND (ref, 0);
4544 if (TREE_CODE (base) != ADDR_EXPR)
4545 return false;
4546 base = TREE_OPERAND (base, 0);
4547 return (DECL_P (base)
4548 && !TREE_ADDRESSABLE (base)
4549 && DECL_MODE (base) != BLKmode
4550 && DECL_RTL_SET_P (base)
4551 && !MEM_P (DECL_RTL (base)));
4552 }
4553
4554 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4555 is true, try generating a nontemporal store. */
4556
4557 void
4558 expand_assignment (tree to, tree from, bool nontemporal)
4559 {
4560 rtx to_rtx = 0;
4561 rtx result;
4562 enum machine_mode mode;
4563 unsigned int align;
4564 enum insn_code icode;
4565
4566 /* Don't crash if the lhs of the assignment was erroneous. */
4567 if (TREE_CODE (to) == ERROR_MARK)
4568 {
4569 expand_normal (from);
4570 return;
4571 }
4572
4573 /* Optimize away no-op moves without side-effects. */
4574 if (operand_equal_p (to, from, 0))
4575 return;
4576
4577 /* Handle misaligned stores. */
4578 mode = TYPE_MODE (TREE_TYPE (to));
4579 if ((TREE_CODE (to) == MEM_REF
4580 || TREE_CODE (to) == TARGET_MEM_REF)
4581 && mode != BLKmode
4582 && !mem_ref_refers_to_non_mem_p (to)
4583 && ((align = get_object_or_type_alignment (to))
4584 < GET_MODE_ALIGNMENT (mode))
4585 && (((icode = optab_handler (movmisalign_optab, mode))
4586 != CODE_FOR_nothing)
4587 || SLOW_UNALIGNED_ACCESS (mode, align)))
4588 {
4589 rtx reg, mem;
4590
4591 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4592 reg = force_not_mem (reg);
4593 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4594
4595 if (icode != CODE_FOR_nothing)
4596 {
4597 struct expand_operand ops[2];
4598
4599 create_fixed_operand (&ops[0], mem);
4600 create_input_operand (&ops[1], reg, mode);
4601 /* The movmisalign<mode> pattern cannot fail, else the assignment
4602 would silently be omitted. */
4603 expand_insn (icode, 2, ops);
4604 }
4605 else
4606 store_bit_field (mem, GET_MODE_BITSIZE (mode),
4607 0, 0, 0, mode, reg);
4608 return;
4609 }
4610
4611 /* Assignment of a structure component needs special treatment
4612 if the structure component's rtx is not simply a MEM.
4613 Assignment of an array element at a constant index, and assignment of
4614 an array element in an unaligned packed structure field, has the same
4615 problem. Same for (partially) storing into a non-memory object. */
4616 if (handled_component_p (to)
4617 || (TREE_CODE (to) == MEM_REF
4618 && mem_ref_refers_to_non_mem_p (to))
4619 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4620 {
4621 enum machine_mode mode1;
4622 HOST_WIDE_INT bitsize, bitpos;
4623 unsigned HOST_WIDE_INT bitregion_start = 0;
4624 unsigned HOST_WIDE_INT bitregion_end = 0;
4625 tree offset;
4626 int unsignedp;
4627 int volatilep = 0;
4628 tree tem;
4629 bool misalignp;
4630 rtx mem = NULL_RTX;
4631
4632 push_temp_slots ();
4633 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4634 &unsignedp, &volatilep, true);
4635
4636 if (TREE_CODE (to) == COMPONENT_REF
4637 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4638 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
4639
4640 /* If we are going to use store_bit_field and extract_bit_field,
4641 make sure to_rtx will be safe for multiple use. */
4642 mode = TYPE_MODE (TREE_TYPE (tem));
4643 if (TREE_CODE (tem) == MEM_REF
4644 && mode != BLKmode
4645 && ((align = get_object_or_type_alignment (tem))
4646 < GET_MODE_ALIGNMENT (mode))
4647 && ((icode = optab_handler (movmisalign_optab, mode))
4648 != CODE_FOR_nothing))
4649 {
4650 struct expand_operand ops[2];
4651
4652 misalignp = true;
4653 to_rtx = gen_reg_rtx (mode);
4654 mem = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4655
4656 /* If the misaligned store doesn't overwrite all bits, perform
4657 rmw cycle on MEM. */
4658 if (bitsize != GET_MODE_BITSIZE (mode))
4659 {
4660 create_input_operand (&ops[0], to_rtx, mode);
4661 create_fixed_operand (&ops[1], mem);
4662 /* The movmisalign<mode> pattern cannot fail, else the assignment
4663 would silently be omitted. */
4664 expand_insn (icode, 2, ops);
4665
4666 mem = copy_rtx (mem);
4667 }
4668 }
4669 else
4670 {
4671 misalignp = false;
4672 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4673 }
4674
4675 /* If the bitfield is volatile, we want to access it in the
4676 field's mode, not the computed mode.
4677 If a MEM has VOIDmode (external with incomplete type),
4678 use BLKmode for it instead. */
4679 if (MEM_P (to_rtx))
4680 {
4681 if (volatilep && flag_strict_volatile_bitfields > 0)
4682 to_rtx = adjust_address (to_rtx, mode1, 0);
4683 else if (GET_MODE (to_rtx) == VOIDmode)
4684 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4685 }
4686
4687 if (offset != 0)
4688 {
4689 enum machine_mode address_mode;
4690 rtx offset_rtx;
4691
4692 if (!MEM_P (to_rtx))
4693 {
4694 /* We can get constant negative offsets into arrays with broken
4695 user code. Translate this to a trap instead of ICEing. */
4696 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4697 expand_builtin_trap ();
4698 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4699 }
4700
4701 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4702 address_mode
4703 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4704 if (GET_MODE (offset_rtx) != address_mode)
4705 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4706
4707 /* A constant address in TO_RTX can have VOIDmode, we must not try
4708 to call force_reg for that case. Avoid that case. */
4709 if (MEM_P (to_rtx)
4710 && GET_MODE (to_rtx) == BLKmode
4711 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4712 && bitsize > 0
4713 && (bitpos % bitsize) == 0
4714 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4715 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4716 {
4717 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4718 bitpos = 0;
4719 }
4720
4721 to_rtx = offset_address (to_rtx, offset_rtx,
4722 highest_pow2_factor_for_target (to,
4723 offset));
4724 }
4725
4726 /* No action is needed if the target is not a memory and the field
4727 lies completely outside that target. This can occur if the source
4728 code contains an out-of-bounds access to a small array. */
4729 if (!MEM_P (to_rtx)
4730 && GET_MODE (to_rtx) != BLKmode
4731 && (unsigned HOST_WIDE_INT) bitpos
4732 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4733 {
4734 expand_normal (from);
4735 result = NULL;
4736 }
4737 /* Handle expand_expr of a complex value returning a CONCAT. */
4738 else if (GET_CODE (to_rtx) == CONCAT)
4739 {
4740 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4741 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4742 && bitpos == 0
4743 && bitsize == mode_bitsize)
4744 result = store_expr (from, to_rtx, false, nontemporal);
4745 else if (bitsize == mode_bitsize / 2
4746 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4747 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4748 nontemporal);
4749 else if (bitpos + bitsize <= mode_bitsize / 2)
4750 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4751 bitregion_start, bitregion_end,
4752 mode1, from, TREE_TYPE (tem),
4753 get_alias_set (to), nontemporal);
4754 else if (bitpos >= mode_bitsize / 2)
4755 result = store_field (XEXP (to_rtx, 1), bitsize,
4756 bitpos - mode_bitsize / 2,
4757 bitregion_start, bitregion_end,
4758 mode1, from,
4759 TREE_TYPE (tem), get_alias_set (to),
4760 nontemporal);
4761 else if (bitpos == 0 && bitsize == mode_bitsize)
4762 {
4763 rtx from_rtx;
4764 result = expand_normal (from);
4765 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4766 TYPE_MODE (TREE_TYPE (from)), 0);
4767 emit_move_insn (XEXP (to_rtx, 0),
4768 read_complex_part (from_rtx, false));
4769 emit_move_insn (XEXP (to_rtx, 1),
4770 read_complex_part (from_rtx, true));
4771 }
4772 else
4773 {
4774 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4775 GET_MODE_SIZE (GET_MODE (to_rtx)),
4776 0);
4777 write_complex_part (temp, XEXP (to_rtx, 0), false);
4778 write_complex_part (temp, XEXP (to_rtx, 1), true);
4779 result = store_field (temp, bitsize, bitpos,
4780 bitregion_start, bitregion_end,
4781 mode1, from,
4782 TREE_TYPE (tem), get_alias_set (to),
4783 nontemporal);
4784 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4785 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4786 }
4787 }
4788 else
4789 {
4790 if (MEM_P (to_rtx))
4791 {
4792 /* If the field is at offset zero, we could have been given the
4793 DECL_RTX of the parent struct. Don't munge it. */
4794 to_rtx = shallow_copy_rtx (to_rtx);
4795
4796 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4797
4798 /* Deal with volatile and readonly fields. The former is only
4799 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4800 if (volatilep)
4801 MEM_VOLATILE_P (to_rtx) = 1;
4802 if (component_uses_parent_alias_set (to))
4803 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4804 }
4805
4806 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4807 bitregion_start, bitregion_end,
4808 mode1,
4809 to_rtx, to, from))
4810 result = NULL;
4811 else
4812 result = store_field (to_rtx, bitsize, bitpos,
4813 bitregion_start, bitregion_end,
4814 mode1, from,
4815 TREE_TYPE (tem), get_alias_set (to),
4816 nontemporal);
4817 }
4818
4819 if (misalignp)
4820 {
4821 struct expand_operand ops[2];
4822
4823 create_fixed_operand (&ops[0], mem);
4824 create_input_operand (&ops[1], to_rtx, mode);
4825 /* The movmisalign<mode> pattern cannot fail, else the assignment
4826 would silently be omitted. */
4827 expand_insn (icode, 2, ops);
4828 }
4829
4830 if (result)
4831 preserve_temp_slots (result);
4832 free_temp_slots ();
4833 pop_temp_slots ();
4834 return;
4835 }
4836
4837 /* If the rhs is a function call and its value is not an aggregate,
4838 call the function before we start to compute the lhs.
4839 This is needed for correct code for cases such as
4840 val = setjmp (buf) on machines where reference to val
4841 requires loading up part of an address in a separate insn.
4842
4843 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4844 since it might be a promoted variable where the zero- or sign- extension
4845 needs to be done. Handling this in the normal way is safe because no
4846 computation is done before the call. The same is true for SSA names. */
4847 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4848 && COMPLETE_TYPE_P (TREE_TYPE (from))
4849 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4850 && ! (((TREE_CODE (to) == VAR_DECL
4851 || TREE_CODE (to) == PARM_DECL
4852 || TREE_CODE (to) == RESULT_DECL)
4853 && REG_P (DECL_RTL (to)))
4854 || TREE_CODE (to) == SSA_NAME))
4855 {
4856 rtx value;
4857
4858 push_temp_slots ();
4859 value = expand_normal (from);
4860 if (to_rtx == 0)
4861 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4862
4863 /* Handle calls that return values in multiple non-contiguous locations.
4864 The Irix 6 ABI has examples of this. */
4865 if (GET_CODE (to_rtx) == PARALLEL)
4866 emit_group_load (to_rtx, value, TREE_TYPE (from),
4867 int_size_in_bytes (TREE_TYPE (from)));
4868 else if (GET_MODE (to_rtx) == BLKmode)
4869 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4870 else
4871 {
4872 if (POINTER_TYPE_P (TREE_TYPE (to)))
4873 value = convert_memory_address_addr_space
4874 (GET_MODE (to_rtx), value,
4875 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4876
4877 emit_move_insn (to_rtx, value);
4878 }
4879 preserve_temp_slots (to_rtx);
4880 free_temp_slots ();
4881 pop_temp_slots ();
4882 return;
4883 }
4884
4885 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
4886 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4887
4888 /* Don't move directly into a return register. */
4889 if (TREE_CODE (to) == RESULT_DECL
4890 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4891 {
4892 rtx temp;
4893
4894 push_temp_slots ();
4895 if (REG_P (to_rtx) && TYPE_MODE (TREE_TYPE (from)) == BLKmode)
4896 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
4897 else
4898 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4899
4900 if (GET_CODE (to_rtx) == PARALLEL)
4901 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4902 int_size_in_bytes (TREE_TYPE (from)));
4903 else if (temp)
4904 emit_move_insn (to_rtx, temp);
4905
4906 preserve_temp_slots (to_rtx);
4907 free_temp_slots ();
4908 pop_temp_slots ();
4909 return;
4910 }
4911
4912 /* In case we are returning the contents of an object which overlaps
4913 the place the value is being stored, use a safe function when copying
4914 a value through a pointer into a structure value return block. */
4915 if (TREE_CODE (to) == RESULT_DECL
4916 && TREE_CODE (from) == INDIRECT_REF
4917 && ADDR_SPACE_GENERIC_P
4918 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4919 && refs_may_alias_p (to, from)
4920 && cfun->returns_struct
4921 && !cfun->returns_pcc_struct)
4922 {
4923 rtx from_rtx, size;
4924
4925 push_temp_slots ();
4926 size = expr_size (from);
4927 from_rtx = expand_normal (from);
4928
4929 emit_library_call (memmove_libfunc, LCT_NORMAL,
4930 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4931 XEXP (from_rtx, 0), Pmode,
4932 convert_to_mode (TYPE_MODE (sizetype),
4933 size, TYPE_UNSIGNED (sizetype)),
4934 TYPE_MODE (sizetype));
4935
4936 preserve_temp_slots (to_rtx);
4937 free_temp_slots ();
4938 pop_temp_slots ();
4939 return;
4940 }
4941
4942 /* Compute FROM and store the value in the rtx we got. */
4943
4944 push_temp_slots ();
4945 result = store_expr (from, to_rtx, 0, nontemporal);
4946 preserve_temp_slots (result);
4947 free_temp_slots ();
4948 pop_temp_slots ();
4949 return;
4950 }
4951
4952 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4953 succeeded, false otherwise. */
4954
4955 bool
4956 emit_storent_insn (rtx to, rtx from)
4957 {
4958 struct expand_operand ops[2];
4959 enum machine_mode mode = GET_MODE (to);
4960 enum insn_code code = optab_handler (storent_optab, mode);
4961
4962 if (code == CODE_FOR_nothing)
4963 return false;
4964
4965 create_fixed_operand (&ops[0], to);
4966 create_input_operand (&ops[1], from, mode);
4967 return maybe_expand_insn (code, 2, ops);
4968 }
4969
4970 /* Generate code for computing expression EXP,
4971 and storing the value into TARGET.
4972
4973 If the mode is BLKmode then we may return TARGET itself.
4974 It turns out that in BLKmode it doesn't cause a problem.
4975 because C has no operators that could combine two different
4976 assignments into the same BLKmode object with different values
4977 with no sequence point. Will other languages need this to
4978 be more thorough?
4979
4980 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4981 stack, and block moves may need to be treated specially.
4982
4983 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4984
4985 rtx
4986 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4987 {
4988 rtx temp;
4989 rtx alt_rtl = NULL_RTX;
4990 location_t loc = EXPR_LOCATION (exp);
4991
4992 if (VOID_TYPE_P (TREE_TYPE (exp)))
4993 {
4994 /* C++ can generate ?: expressions with a throw expression in one
4995 branch and an rvalue in the other. Here, we resolve attempts to
4996 store the throw expression's nonexistent result. */
4997 gcc_assert (!call_param_p);
4998 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4999 return NULL_RTX;
5000 }
5001 if (TREE_CODE (exp) == COMPOUND_EXPR)
5002 {
5003 /* Perform first part of compound expression, then assign from second
5004 part. */
5005 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5006 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5007 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5008 nontemporal);
5009 }
5010 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5011 {
5012 /* For conditional expression, get safe form of the target. Then
5013 test the condition, doing the appropriate assignment on either
5014 side. This avoids the creation of unnecessary temporaries.
5015 For non-BLKmode, it is more efficient not to do this. */
5016
5017 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
5018
5019 do_pending_stack_adjust ();
5020 NO_DEFER_POP;
5021 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5022 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5023 nontemporal);
5024 emit_jump_insn (gen_jump (lab2));
5025 emit_barrier ();
5026 emit_label (lab1);
5027 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5028 nontemporal);
5029 emit_label (lab2);
5030 OK_DEFER_POP;
5031
5032 return NULL_RTX;
5033 }
5034 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5035 /* If this is a scalar in a register that is stored in a wider mode
5036 than the declared mode, compute the result into its declared mode
5037 and then convert to the wider mode. Our value is the computed
5038 expression. */
5039 {
5040 rtx inner_target = 0;
5041
5042 /* We can do the conversion inside EXP, which will often result
5043 in some optimizations. Do the conversion in two steps: first
5044 change the signedness, if needed, then the extend. But don't
5045 do this if the type of EXP is a subtype of something else
5046 since then the conversion might involve more than just
5047 converting modes. */
5048 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5049 && TREE_TYPE (TREE_TYPE (exp)) == 0
5050 && GET_MODE_PRECISION (GET_MODE (target))
5051 == TYPE_PRECISION (TREE_TYPE (exp)))
5052 {
5053 if (TYPE_UNSIGNED (TREE_TYPE (exp))
5054 != SUBREG_PROMOTED_UNSIGNED_P (target))
5055 {
5056 /* Some types, e.g. Fortran's logical*4, won't have a signed
5057 version, so use the mode instead. */
5058 tree ntype
5059 = (signed_or_unsigned_type_for
5060 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
5061 if (ntype == NULL)
5062 ntype = lang_hooks.types.type_for_mode
5063 (TYPE_MODE (TREE_TYPE (exp)),
5064 SUBREG_PROMOTED_UNSIGNED_P (target));
5065
5066 exp = fold_convert_loc (loc, ntype, exp);
5067 }
5068
5069 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5070 (GET_MODE (SUBREG_REG (target)),
5071 SUBREG_PROMOTED_UNSIGNED_P (target)),
5072 exp);
5073
5074 inner_target = SUBREG_REG (target);
5075 }
5076
5077 temp = expand_expr (exp, inner_target, VOIDmode,
5078 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5079
5080 /* If TEMP is a VOIDmode constant, use convert_modes to make
5081 sure that we properly convert it. */
5082 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5083 {
5084 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5085 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
5086 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5087 GET_MODE (target), temp,
5088 SUBREG_PROMOTED_UNSIGNED_P (target));
5089 }
5090
5091 convert_move (SUBREG_REG (target), temp,
5092 SUBREG_PROMOTED_UNSIGNED_P (target));
5093
5094 return NULL_RTX;
5095 }
5096 else if ((TREE_CODE (exp) == STRING_CST
5097 || (TREE_CODE (exp) == MEM_REF
5098 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5099 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5100 == STRING_CST
5101 && integer_zerop (TREE_OPERAND (exp, 1))))
5102 && !nontemporal && !call_param_p
5103 && MEM_P (target))
5104 {
5105 /* Optimize initialization of an array with a STRING_CST. */
5106 HOST_WIDE_INT exp_len, str_copy_len;
5107 rtx dest_mem;
5108 tree str = TREE_CODE (exp) == STRING_CST
5109 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5110
5111 exp_len = int_expr_size (exp);
5112 if (exp_len <= 0)
5113 goto normal_expr;
5114
5115 if (TREE_STRING_LENGTH (str) <= 0)
5116 goto normal_expr;
5117
5118 str_copy_len = strlen (TREE_STRING_POINTER (str));
5119 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5120 goto normal_expr;
5121
5122 str_copy_len = TREE_STRING_LENGTH (str);
5123 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5124 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5125 {
5126 str_copy_len += STORE_MAX_PIECES - 1;
5127 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5128 }
5129 str_copy_len = MIN (str_copy_len, exp_len);
5130 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5131 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5132 MEM_ALIGN (target), false))
5133 goto normal_expr;
5134
5135 dest_mem = target;
5136
5137 dest_mem = store_by_pieces (dest_mem,
5138 str_copy_len, builtin_strncpy_read_str,
5139 CONST_CAST (char *,
5140 TREE_STRING_POINTER (str)),
5141 MEM_ALIGN (target), false,
5142 exp_len > str_copy_len ? 1 : 0);
5143 if (exp_len > str_copy_len)
5144 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5145 GEN_INT (exp_len - str_copy_len),
5146 BLOCK_OP_NORMAL);
5147 return NULL_RTX;
5148 }
5149 else
5150 {
5151 rtx tmp_target;
5152
5153 normal_expr:
5154 /* If we want to use a nontemporal store, force the value to
5155 register first. */
5156 tmp_target = nontemporal ? NULL_RTX : target;
5157 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5158 (call_param_p
5159 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5160 &alt_rtl);
5161 }
5162
5163 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5164 the same as that of TARGET, adjust the constant. This is needed, for
5165 example, in case it is a CONST_DOUBLE and we want only a word-sized
5166 value. */
5167 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5168 && TREE_CODE (exp) != ERROR_MARK
5169 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5170 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5171 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5172
5173 /* If value was not generated in the target, store it there.
5174 Convert the value to TARGET's type first if necessary and emit the
5175 pending incrementations that have been queued when expanding EXP.
5176 Note that we cannot emit the whole queue blindly because this will
5177 effectively disable the POST_INC optimization later.
5178
5179 If TEMP and TARGET compare equal according to rtx_equal_p, but
5180 one or both of them are volatile memory refs, we have to distinguish
5181 two cases:
5182 - expand_expr has used TARGET. In this case, we must not generate
5183 another copy. This can be detected by TARGET being equal according
5184 to == .
5185 - expand_expr has not used TARGET - that means that the source just
5186 happens to have the same RTX form. Since temp will have been created
5187 by expand_expr, it will compare unequal according to == .
5188 We must generate a copy in this case, to reach the correct number
5189 of volatile memory references. */
5190
5191 if ((! rtx_equal_p (temp, target)
5192 || (temp != target && (side_effects_p (temp)
5193 || side_effects_p (target))))
5194 && TREE_CODE (exp) != ERROR_MARK
5195 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5196 but TARGET is not valid memory reference, TEMP will differ
5197 from TARGET although it is really the same location. */
5198 && !(alt_rtl
5199 && rtx_equal_p (alt_rtl, target)
5200 && !side_effects_p (alt_rtl)
5201 && !side_effects_p (target))
5202 /* If there's nothing to copy, don't bother. Don't call
5203 expr_size unless necessary, because some front-ends (C++)
5204 expr_size-hook must not be given objects that are not
5205 supposed to be bit-copied or bit-initialized. */
5206 && expr_size (exp) != const0_rtx)
5207 {
5208 if (GET_MODE (temp) != GET_MODE (target)
5209 && GET_MODE (temp) != VOIDmode)
5210 {
5211 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5212 if (GET_MODE (target) == BLKmode
5213 && GET_MODE (temp) == BLKmode)
5214 emit_block_move (target, temp, expr_size (exp),
5215 (call_param_p
5216 ? BLOCK_OP_CALL_PARM
5217 : BLOCK_OP_NORMAL));
5218 else if (GET_MODE (target) == BLKmode)
5219 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5220 0, 0, 0, GET_MODE (temp), temp);
5221 else
5222 convert_move (target, temp, unsignedp);
5223 }
5224
5225 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5226 {
5227 /* Handle copying a string constant into an array. The string
5228 constant may be shorter than the array. So copy just the string's
5229 actual length, and clear the rest. First get the size of the data
5230 type of the string, which is actually the size of the target. */
5231 rtx size = expr_size (exp);
5232
5233 if (CONST_INT_P (size)
5234 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5235 emit_block_move (target, temp, size,
5236 (call_param_p
5237 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5238 else
5239 {
5240 enum machine_mode pointer_mode
5241 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5242 enum machine_mode address_mode
5243 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
5244
5245 /* Compute the size of the data to copy from the string. */
5246 tree copy_size
5247 = size_binop_loc (loc, MIN_EXPR,
5248 make_tree (sizetype, size),
5249 size_int (TREE_STRING_LENGTH (exp)));
5250 rtx copy_size_rtx
5251 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5252 (call_param_p
5253 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5254 rtx label = 0;
5255
5256 /* Copy that much. */
5257 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5258 TYPE_UNSIGNED (sizetype));
5259 emit_block_move (target, temp, copy_size_rtx,
5260 (call_param_p
5261 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5262
5263 /* Figure out how much is left in TARGET that we have to clear.
5264 Do all calculations in pointer_mode. */
5265 if (CONST_INT_P (copy_size_rtx))
5266 {
5267 size = plus_constant (size, -INTVAL (copy_size_rtx));
5268 target = adjust_address (target, BLKmode,
5269 INTVAL (copy_size_rtx));
5270 }
5271 else
5272 {
5273 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5274 copy_size_rtx, NULL_RTX, 0,
5275 OPTAB_LIB_WIDEN);
5276
5277 if (GET_MODE (copy_size_rtx) != address_mode)
5278 copy_size_rtx = convert_to_mode (address_mode,
5279 copy_size_rtx,
5280 TYPE_UNSIGNED (sizetype));
5281
5282 target = offset_address (target, copy_size_rtx,
5283 highest_pow2_factor (copy_size));
5284 label = gen_label_rtx ();
5285 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5286 GET_MODE (size), 0, label);
5287 }
5288
5289 if (size != const0_rtx)
5290 clear_storage (target, size, BLOCK_OP_NORMAL);
5291
5292 if (label)
5293 emit_label (label);
5294 }
5295 }
5296 /* Handle calls that return values in multiple non-contiguous locations.
5297 The Irix 6 ABI has examples of this. */
5298 else if (GET_CODE (target) == PARALLEL)
5299 emit_group_load (target, temp, TREE_TYPE (exp),
5300 int_size_in_bytes (TREE_TYPE (exp)));
5301 else if (GET_MODE (temp) == BLKmode)
5302 emit_block_move (target, temp, expr_size (exp),
5303 (call_param_p
5304 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5305 else if (nontemporal
5306 && emit_storent_insn (target, temp))
5307 /* If we managed to emit a nontemporal store, there is nothing else to
5308 do. */
5309 ;
5310 else
5311 {
5312 temp = force_operand (temp, target);
5313 if (temp != target)
5314 emit_move_insn (target, temp);
5315 }
5316 }
5317
5318 return NULL_RTX;
5319 }
5320 \f
5321 /* Return true if field F of structure TYPE is a flexible array. */
5322
5323 static bool
5324 flexible_array_member_p (const_tree f, const_tree type)
5325 {
5326 const_tree tf;
5327
5328 tf = TREE_TYPE (f);
5329 return (DECL_CHAIN (f) == NULL
5330 && TREE_CODE (tf) == ARRAY_TYPE
5331 && TYPE_DOMAIN (tf)
5332 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5333 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5334 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5335 && int_size_in_bytes (type) >= 0);
5336 }
5337
5338 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5339 must have in order for it to completely initialize a value of type TYPE.
5340 Return -1 if the number isn't known.
5341
5342 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5343
5344 static HOST_WIDE_INT
5345 count_type_elements (const_tree type, bool for_ctor_p)
5346 {
5347 switch (TREE_CODE (type))
5348 {
5349 case ARRAY_TYPE:
5350 {
5351 tree nelts;
5352
5353 nelts = array_type_nelts (type);
5354 if (nelts && host_integerp (nelts, 1))
5355 {
5356 unsigned HOST_WIDE_INT n;
5357
5358 n = tree_low_cst (nelts, 1) + 1;
5359 if (n == 0 || for_ctor_p)
5360 return n;
5361 else
5362 return n * count_type_elements (TREE_TYPE (type), false);
5363 }
5364 return for_ctor_p ? -1 : 1;
5365 }
5366
5367 case RECORD_TYPE:
5368 {
5369 unsigned HOST_WIDE_INT n;
5370 tree f;
5371
5372 n = 0;
5373 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5374 if (TREE_CODE (f) == FIELD_DECL)
5375 {
5376 if (!for_ctor_p)
5377 n += count_type_elements (TREE_TYPE (f), false);
5378 else if (!flexible_array_member_p (f, type))
5379 /* Don't count flexible arrays, which are not supposed
5380 to be initialized. */
5381 n += 1;
5382 }
5383
5384 return n;
5385 }
5386
5387 case UNION_TYPE:
5388 case QUAL_UNION_TYPE:
5389 {
5390 tree f;
5391 HOST_WIDE_INT n, m;
5392
5393 gcc_assert (!for_ctor_p);
5394 /* Estimate the number of scalars in each field and pick the
5395 maximum. Other estimates would do instead; the idea is simply
5396 to make sure that the estimate is not sensitive to the ordering
5397 of the fields. */
5398 n = 1;
5399 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5400 if (TREE_CODE (f) == FIELD_DECL)
5401 {
5402 m = count_type_elements (TREE_TYPE (f), false);
5403 /* If the field doesn't span the whole union, add an extra
5404 scalar for the rest. */
5405 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5406 TYPE_SIZE (type)) != 1)
5407 m++;
5408 if (n < m)
5409 n = m;
5410 }
5411 return n;
5412 }
5413
5414 case COMPLEX_TYPE:
5415 return 2;
5416
5417 case VECTOR_TYPE:
5418 return TYPE_VECTOR_SUBPARTS (type);
5419
5420 case INTEGER_TYPE:
5421 case REAL_TYPE:
5422 case FIXED_POINT_TYPE:
5423 case ENUMERAL_TYPE:
5424 case BOOLEAN_TYPE:
5425 case POINTER_TYPE:
5426 case OFFSET_TYPE:
5427 case REFERENCE_TYPE:
5428 case NULLPTR_TYPE:
5429 return 1;
5430
5431 case ERROR_MARK:
5432 return 0;
5433
5434 case VOID_TYPE:
5435 case METHOD_TYPE:
5436 case FUNCTION_TYPE:
5437 case LANG_TYPE:
5438 default:
5439 gcc_unreachable ();
5440 }
5441 }
5442
5443 /* Helper for categorize_ctor_elements. Identical interface. */
5444
5445 static bool
5446 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5447 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5448 {
5449 unsigned HOST_WIDE_INT idx;
5450 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5451 tree value, purpose, elt_type;
5452
5453 /* Whether CTOR is a valid constant initializer, in accordance with what
5454 initializer_constant_valid_p does. If inferred from the constructor
5455 elements, true until proven otherwise. */
5456 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5457 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5458
5459 nz_elts = 0;
5460 init_elts = 0;
5461 num_fields = 0;
5462 elt_type = NULL_TREE;
5463
5464 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5465 {
5466 HOST_WIDE_INT mult = 1;
5467
5468 if (TREE_CODE (purpose) == RANGE_EXPR)
5469 {
5470 tree lo_index = TREE_OPERAND (purpose, 0);
5471 tree hi_index = TREE_OPERAND (purpose, 1);
5472
5473 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5474 mult = (tree_low_cst (hi_index, 1)
5475 - tree_low_cst (lo_index, 1) + 1);
5476 }
5477 num_fields += mult;
5478 elt_type = TREE_TYPE (value);
5479
5480 switch (TREE_CODE (value))
5481 {
5482 case CONSTRUCTOR:
5483 {
5484 HOST_WIDE_INT nz = 0, ic = 0;
5485
5486 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5487 p_complete);
5488
5489 nz_elts += mult * nz;
5490 init_elts += mult * ic;
5491
5492 if (const_from_elts_p && const_p)
5493 const_p = const_elt_p;
5494 }
5495 break;
5496
5497 case INTEGER_CST:
5498 case REAL_CST:
5499 case FIXED_CST:
5500 if (!initializer_zerop (value))
5501 nz_elts += mult;
5502 init_elts += mult;
5503 break;
5504
5505 case STRING_CST:
5506 nz_elts += mult * TREE_STRING_LENGTH (value);
5507 init_elts += mult * TREE_STRING_LENGTH (value);
5508 break;
5509
5510 case COMPLEX_CST:
5511 if (!initializer_zerop (TREE_REALPART (value)))
5512 nz_elts += mult;
5513 if (!initializer_zerop (TREE_IMAGPART (value)))
5514 nz_elts += mult;
5515 init_elts += mult;
5516 break;
5517
5518 case VECTOR_CST:
5519 {
5520 unsigned i;
5521 for (i = 0; i < VECTOR_CST_NELTS (value); ++i)
5522 {
5523 tree v = VECTOR_CST_ELT (value, i);
5524 if (!initializer_zerop (v))
5525 nz_elts += mult;
5526 init_elts += mult;
5527 }
5528 }
5529 break;
5530
5531 default:
5532 {
5533 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5534 nz_elts += mult * tc;
5535 init_elts += mult * tc;
5536
5537 if (const_from_elts_p && const_p)
5538 const_p = initializer_constant_valid_p (value, elt_type)
5539 != NULL_TREE;
5540 }
5541 break;
5542 }
5543 }
5544
5545 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5546 num_fields, elt_type))
5547 *p_complete = false;
5548
5549 *p_nz_elts += nz_elts;
5550 *p_init_elts += init_elts;
5551
5552 return const_p;
5553 }
5554
5555 /* Examine CTOR to discover:
5556 * how many scalar fields are set to nonzero values,
5557 and place it in *P_NZ_ELTS;
5558 * how many scalar fields in total are in CTOR,
5559 and place it in *P_ELT_COUNT.
5560 * whether the constructor is complete -- in the sense that every
5561 meaningful byte is explicitly given a value --
5562 and place it in *P_COMPLETE.
5563
5564 Return whether or not CTOR is a valid static constant initializer, the same
5565 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5566
5567 bool
5568 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5569 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5570 {
5571 *p_nz_elts = 0;
5572 *p_init_elts = 0;
5573 *p_complete = true;
5574
5575 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5576 }
5577
5578 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5579 of which had type LAST_TYPE. Each element was itself a complete
5580 initializer, in the sense that every meaningful byte was explicitly
5581 given a value. Return true if the same is true for the constructor
5582 as a whole. */
5583
5584 bool
5585 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5586 const_tree last_type)
5587 {
5588 if (TREE_CODE (type) == UNION_TYPE
5589 || TREE_CODE (type) == QUAL_UNION_TYPE)
5590 {
5591 if (num_elts == 0)
5592 return false;
5593
5594 gcc_assert (num_elts == 1 && last_type);
5595
5596 /* ??? We could look at each element of the union, and find the
5597 largest element. Which would avoid comparing the size of the
5598 initialized element against any tail padding in the union.
5599 Doesn't seem worth the effort... */
5600 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5601 }
5602
5603 return count_type_elements (type, true) == num_elts;
5604 }
5605
5606 /* Return 1 if EXP contains mostly (3/4) zeros. */
5607
5608 static int
5609 mostly_zeros_p (const_tree exp)
5610 {
5611 if (TREE_CODE (exp) == CONSTRUCTOR)
5612 {
5613 HOST_WIDE_INT nz_elts, init_elts;
5614 bool complete_p;
5615
5616 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5617 return !complete_p || nz_elts < init_elts / 4;
5618 }
5619
5620 return initializer_zerop (exp);
5621 }
5622
5623 /* Return 1 if EXP contains all zeros. */
5624
5625 static int
5626 all_zeros_p (const_tree exp)
5627 {
5628 if (TREE_CODE (exp) == CONSTRUCTOR)
5629 {
5630 HOST_WIDE_INT nz_elts, init_elts;
5631 bool complete_p;
5632
5633 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5634 return nz_elts == 0;
5635 }
5636
5637 return initializer_zerop (exp);
5638 }
5639 \f
5640 /* Helper function for store_constructor.
5641 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5642 TYPE is the type of the CONSTRUCTOR, not the element type.
5643 CLEARED is as for store_constructor.
5644 ALIAS_SET is the alias set to use for any stores.
5645
5646 This provides a recursive shortcut back to store_constructor when it isn't
5647 necessary to go through store_field. This is so that we can pass through
5648 the cleared field to let store_constructor know that we may not have to
5649 clear a substructure if the outer structure has already been cleared. */
5650
5651 static void
5652 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5653 HOST_WIDE_INT bitpos, enum machine_mode mode,
5654 tree exp, tree type, int cleared,
5655 alias_set_type alias_set)
5656 {
5657 if (TREE_CODE (exp) == CONSTRUCTOR
5658 /* We can only call store_constructor recursively if the size and
5659 bit position are on a byte boundary. */
5660 && bitpos % BITS_PER_UNIT == 0
5661 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5662 /* If we have a nonzero bitpos for a register target, then we just
5663 let store_field do the bitfield handling. This is unlikely to
5664 generate unnecessary clear instructions anyways. */
5665 && (bitpos == 0 || MEM_P (target)))
5666 {
5667 if (MEM_P (target))
5668 target
5669 = adjust_address (target,
5670 GET_MODE (target) == BLKmode
5671 || 0 != (bitpos
5672 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5673 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5674
5675
5676 /* Update the alias set, if required. */
5677 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5678 && MEM_ALIAS_SET (target) != 0)
5679 {
5680 target = copy_rtx (target);
5681 set_mem_alias_set (target, alias_set);
5682 }
5683
5684 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5685 }
5686 else
5687 store_field (target, bitsize, bitpos, 0, 0, mode, exp, type, alias_set,
5688 false);
5689 }
5690
5691 /* Store the value of constructor EXP into the rtx TARGET.
5692 TARGET is either a REG or a MEM; we know it cannot conflict, since
5693 safe_from_p has been called.
5694 CLEARED is true if TARGET is known to have been zero'd.
5695 SIZE is the number of bytes of TARGET we are allowed to modify: this
5696 may not be the same as the size of EXP if we are assigning to a field
5697 which has been packed to exclude padding bits. */
5698
5699 static void
5700 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5701 {
5702 tree type = TREE_TYPE (exp);
5703 #ifdef WORD_REGISTER_OPERATIONS
5704 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5705 #endif
5706
5707 switch (TREE_CODE (type))
5708 {
5709 case RECORD_TYPE:
5710 case UNION_TYPE:
5711 case QUAL_UNION_TYPE:
5712 {
5713 unsigned HOST_WIDE_INT idx;
5714 tree field, value;
5715
5716 /* If size is zero or the target is already cleared, do nothing. */
5717 if (size == 0 || cleared)
5718 cleared = 1;
5719 /* We either clear the aggregate or indicate the value is dead. */
5720 else if ((TREE_CODE (type) == UNION_TYPE
5721 || TREE_CODE (type) == QUAL_UNION_TYPE)
5722 && ! CONSTRUCTOR_ELTS (exp))
5723 /* If the constructor is empty, clear the union. */
5724 {
5725 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5726 cleared = 1;
5727 }
5728
5729 /* If we are building a static constructor into a register,
5730 set the initial value as zero so we can fold the value into
5731 a constant. But if more than one register is involved,
5732 this probably loses. */
5733 else if (REG_P (target) && TREE_STATIC (exp)
5734 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5735 {
5736 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5737 cleared = 1;
5738 }
5739
5740 /* If the constructor has fewer fields than the structure or
5741 if we are initializing the structure to mostly zeros, clear
5742 the whole structure first. Don't do this if TARGET is a
5743 register whose mode size isn't equal to SIZE since
5744 clear_storage can't handle this case. */
5745 else if (size > 0
5746 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5747 != fields_length (type))
5748 || mostly_zeros_p (exp))
5749 && (!REG_P (target)
5750 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5751 == size)))
5752 {
5753 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5754 cleared = 1;
5755 }
5756
5757 if (REG_P (target) && !cleared)
5758 emit_clobber (target);
5759
5760 /* Store each element of the constructor into the
5761 corresponding field of TARGET. */
5762 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5763 {
5764 enum machine_mode mode;
5765 HOST_WIDE_INT bitsize;
5766 HOST_WIDE_INT bitpos = 0;
5767 tree offset;
5768 rtx to_rtx = target;
5769
5770 /* Just ignore missing fields. We cleared the whole
5771 structure, above, if any fields are missing. */
5772 if (field == 0)
5773 continue;
5774
5775 if (cleared && initializer_zerop (value))
5776 continue;
5777
5778 if (host_integerp (DECL_SIZE (field), 1))
5779 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5780 else
5781 bitsize = -1;
5782
5783 mode = DECL_MODE (field);
5784 if (DECL_BIT_FIELD (field))
5785 mode = VOIDmode;
5786
5787 offset = DECL_FIELD_OFFSET (field);
5788 if (host_integerp (offset, 0)
5789 && host_integerp (bit_position (field), 0))
5790 {
5791 bitpos = int_bit_position (field);
5792 offset = 0;
5793 }
5794 else
5795 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5796
5797 if (offset)
5798 {
5799 enum machine_mode address_mode;
5800 rtx offset_rtx;
5801
5802 offset
5803 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5804 make_tree (TREE_TYPE (exp),
5805 target));
5806
5807 offset_rtx = expand_normal (offset);
5808 gcc_assert (MEM_P (to_rtx));
5809
5810 address_mode
5811 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5812 if (GET_MODE (offset_rtx) != address_mode)
5813 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5814
5815 to_rtx = offset_address (to_rtx, offset_rtx,
5816 highest_pow2_factor (offset));
5817 }
5818
5819 #ifdef WORD_REGISTER_OPERATIONS
5820 /* If this initializes a field that is smaller than a
5821 word, at the start of a word, try to widen it to a full
5822 word. This special case allows us to output C++ member
5823 function initializations in a form that the optimizers
5824 can understand. */
5825 if (REG_P (target)
5826 && bitsize < BITS_PER_WORD
5827 && bitpos % BITS_PER_WORD == 0
5828 && GET_MODE_CLASS (mode) == MODE_INT
5829 && TREE_CODE (value) == INTEGER_CST
5830 && exp_size >= 0
5831 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5832 {
5833 tree type = TREE_TYPE (value);
5834
5835 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5836 {
5837 type = lang_hooks.types.type_for_mode
5838 (word_mode, TYPE_UNSIGNED (type));
5839 value = fold_convert (type, value);
5840 }
5841
5842 if (BYTES_BIG_ENDIAN)
5843 value
5844 = fold_build2 (LSHIFT_EXPR, type, value,
5845 build_int_cst (type,
5846 BITS_PER_WORD - bitsize));
5847 bitsize = BITS_PER_WORD;
5848 mode = word_mode;
5849 }
5850 #endif
5851
5852 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5853 && DECL_NONADDRESSABLE_P (field))
5854 {
5855 to_rtx = copy_rtx (to_rtx);
5856 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5857 }
5858
5859 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5860 value, type, cleared,
5861 get_alias_set (TREE_TYPE (field)));
5862 }
5863 break;
5864 }
5865 case ARRAY_TYPE:
5866 {
5867 tree value, index;
5868 unsigned HOST_WIDE_INT i;
5869 int need_to_clear;
5870 tree domain;
5871 tree elttype = TREE_TYPE (type);
5872 int const_bounds_p;
5873 HOST_WIDE_INT minelt = 0;
5874 HOST_WIDE_INT maxelt = 0;
5875
5876 domain = TYPE_DOMAIN (type);
5877 const_bounds_p = (TYPE_MIN_VALUE (domain)
5878 && TYPE_MAX_VALUE (domain)
5879 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5880 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5881
5882 /* If we have constant bounds for the range of the type, get them. */
5883 if (const_bounds_p)
5884 {
5885 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5886 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5887 }
5888
5889 /* If the constructor has fewer elements than the array, clear
5890 the whole array first. Similarly if this is static
5891 constructor of a non-BLKmode object. */
5892 if (cleared)
5893 need_to_clear = 0;
5894 else if (REG_P (target) && TREE_STATIC (exp))
5895 need_to_clear = 1;
5896 else
5897 {
5898 unsigned HOST_WIDE_INT idx;
5899 tree index, value;
5900 HOST_WIDE_INT count = 0, zero_count = 0;
5901 need_to_clear = ! const_bounds_p;
5902
5903 /* This loop is a more accurate version of the loop in
5904 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5905 is also needed to check for missing elements. */
5906 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5907 {
5908 HOST_WIDE_INT this_node_count;
5909
5910 if (need_to_clear)
5911 break;
5912
5913 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5914 {
5915 tree lo_index = TREE_OPERAND (index, 0);
5916 tree hi_index = TREE_OPERAND (index, 1);
5917
5918 if (! host_integerp (lo_index, 1)
5919 || ! host_integerp (hi_index, 1))
5920 {
5921 need_to_clear = 1;
5922 break;
5923 }
5924
5925 this_node_count = (tree_low_cst (hi_index, 1)
5926 - tree_low_cst (lo_index, 1) + 1);
5927 }
5928 else
5929 this_node_count = 1;
5930
5931 count += this_node_count;
5932 if (mostly_zeros_p (value))
5933 zero_count += this_node_count;
5934 }
5935
5936 /* Clear the entire array first if there are any missing
5937 elements, or if the incidence of zero elements is >=
5938 75%. */
5939 if (! need_to_clear
5940 && (count < maxelt - minelt + 1
5941 || 4 * zero_count >= 3 * count))
5942 need_to_clear = 1;
5943 }
5944
5945 if (need_to_clear && size > 0)
5946 {
5947 if (REG_P (target))
5948 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5949 else
5950 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5951 cleared = 1;
5952 }
5953
5954 if (!cleared && REG_P (target))
5955 /* Inform later passes that the old value is dead. */
5956 emit_clobber (target);
5957
5958 /* Store each element of the constructor into the
5959 corresponding element of TARGET, determined by counting the
5960 elements. */
5961 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5962 {
5963 enum machine_mode mode;
5964 HOST_WIDE_INT bitsize;
5965 HOST_WIDE_INT bitpos;
5966 rtx xtarget = target;
5967
5968 if (cleared && initializer_zerop (value))
5969 continue;
5970
5971 mode = TYPE_MODE (elttype);
5972 if (mode == BLKmode)
5973 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5974 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5975 : -1);
5976 else
5977 bitsize = GET_MODE_BITSIZE (mode);
5978
5979 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5980 {
5981 tree lo_index = TREE_OPERAND (index, 0);
5982 tree hi_index = TREE_OPERAND (index, 1);
5983 rtx index_r, pos_rtx;
5984 HOST_WIDE_INT lo, hi, count;
5985 tree position;
5986
5987 /* If the range is constant and "small", unroll the loop. */
5988 if (const_bounds_p
5989 && host_integerp (lo_index, 0)
5990 && host_integerp (hi_index, 0)
5991 && (lo = tree_low_cst (lo_index, 0),
5992 hi = tree_low_cst (hi_index, 0),
5993 count = hi - lo + 1,
5994 (!MEM_P (target)
5995 || count <= 2
5996 || (host_integerp (TYPE_SIZE (elttype), 1)
5997 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5998 <= 40 * 8)))))
5999 {
6000 lo -= minelt; hi -= minelt;
6001 for (; lo <= hi; lo++)
6002 {
6003 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
6004
6005 if (MEM_P (target)
6006 && !MEM_KEEP_ALIAS_SET_P (target)
6007 && TREE_CODE (type) == ARRAY_TYPE
6008 && TYPE_NONALIASED_COMPONENT (type))
6009 {
6010 target = copy_rtx (target);
6011 MEM_KEEP_ALIAS_SET_P (target) = 1;
6012 }
6013
6014 store_constructor_field
6015 (target, bitsize, bitpos, mode, value, type, cleared,
6016 get_alias_set (elttype));
6017 }
6018 }
6019 else
6020 {
6021 rtx loop_start = gen_label_rtx ();
6022 rtx loop_end = gen_label_rtx ();
6023 tree exit_cond;
6024
6025 expand_normal (hi_index);
6026
6027 index = build_decl (EXPR_LOCATION (exp),
6028 VAR_DECL, NULL_TREE, domain);
6029 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6030 SET_DECL_RTL (index, index_r);
6031 store_expr (lo_index, index_r, 0, false);
6032
6033 /* Build the head of the loop. */
6034 do_pending_stack_adjust ();
6035 emit_label (loop_start);
6036
6037 /* Assign value to element index. */
6038 position =
6039 fold_convert (ssizetype,
6040 fold_build2 (MINUS_EXPR,
6041 TREE_TYPE (index),
6042 index,
6043 TYPE_MIN_VALUE (domain)));
6044
6045 position =
6046 size_binop (MULT_EXPR, position,
6047 fold_convert (ssizetype,
6048 TYPE_SIZE_UNIT (elttype)));
6049
6050 pos_rtx = expand_normal (position);
6051 xtarget = offset_address (target, pos_rtx,
6052 highest_pow2_factor (position));
6053 xtarget = adjust_address (xtarget, mode, 0);
6054 if (TREE_CODE (value) == CONSTRUCTOR)
6055 store_constructor (value, xtarget, cleared,
6056 bitsize / BITS_PER_UNIT);
6057 else
6058 store_expr (value, xtarget, 0, false);
6059
6060 /* Generate a conditional jump to exit the loop. */
6061 exit_cond = build2 (LT_EXPR, integer_type_node,
6062 index, hi_index);
6063 jumpif (exit_cond, loop_end, -1);
6064
6065 /* Update the loop counter, and jump to the head of
6066 the loop. */
6067 expand_assignment (index,
6068 build2 (PLUS_EXPR, TREE_TYPE (index),
6069 index, integer_one_node),
6070 false);
6071
6072 emit_jump (loop_start);
6073
6074 /* Build the end of the loop. */
6075 emit_label (loop_end);
6076 }
6077 }
6078 else if ((index != 0 && ! host_integerp (index, 0))
6079 || ! host_integerp (TYPE_SIZE (elttype), 1))
6080 {
6081 tree position;
6082
6083 if (index == 0)
6084 index = ssize_int (1);
6085
6086 if (minelt)
6087 index = fold_convert (ssizetype,
6088 fold_build2 (MINUS_EXPR,
6089 TREE_TYPE (index),
6090 index,
6091 TYPE_MIN_VALUE (domain)));
6092
6093 position =
6094 size_binop (MULT_EXPR, index,
6095 fold_convert (ssizetype,
6096 TYPE_SIZE_UNIT (elttype)));
6097 xtarget = offset_address (target,
6098 expand_normal (position),
6099 highest_pow2_factor (position));
6100 xtarget = adjust_address (xtarget, mode, 0);
6101 store_expr (value, xtarget, 0, false);
6102 }
6103 else
6104 {
6105 if (index != 0)
6106 bitpos = ((tree_low_cst (index, 0) - minelt)
6107 * tree_low_cst (TYPE_SIZE (elttype), 1));
6108 else
6109 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
6110
6111 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6112 && TREE_CODE (type) == ARRAY_TYPE
6113 && TYPE_NONALIASED_COMPONENT (type))
6114 {
6115 target = copy_rtx (target);
6116 MEM_KEEP_ALIAS_SET_P (target) = 1;
6117 }
6118 store_constructor_field (target, bitsize, bitpos, mode, value,
6119 type, cleared, get_alias_set (elttype));
6120 }
6121 }
6122 break;
6123 }
6124
6125 case VECTOR_TYPE:
6126 {
6127 unsigned HOST_WIDE_INT idx;
6128 constructor_elt *ce;
6129 int i;
6130 int need_to_clear;
6131 int icode = 0;
6132 tree elttype = TREE_TYPE (type);
6133 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
6134 enum machine_mode eltmode = TYPE_MODE (elttype);
6135 HOST_WIDE_INT bitsize;
6136 HOST_WIDE_INT bitpos;
6137 rtvec vector = NULL;
6138 unsigned n_elts;
6139 alias_set_type alias;
6140
6141 gcc_assert (eltmode != BLKmode);
6142
6143 n_elts = TYPE_VECTOR_SUBPARTS (type);
6144 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6145 {
6146 enum machine_mode mode = GET_MODE (target);
6147
6148 icode = (int) optab_handler (vec_init_optab, mode);
6149 if (icode != CODE_FOR_nothing)
6150 {
6151 unsigned int i;
6152
6153 vector = rtvec_alloc (n_elts);
6154 for (i = 0; i < n_elts; i++)
6155 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6156 }
6157 }
6158
6159 /* If the constructor has fewer elements than the vector,
6160 clear the whole array first. Similarly if this is static
6161 constructor of a non-BLKmode object. */
6162 if (cleared)
6163 need_to_clear = 0;
6164 else if (REG_P (target) && TREE_STATIC (exp))
6165 need_to_clear = 1;
6166 else
6167 {
6168 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6169 tree value;
6170
6171 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6172 {
6173 int n_elts_here = tree_low_cst
6174 (int_const_binop (TRUNC_DIV_EXPR,
6175 TYPE_SIZE (TREE_TYPE (value)),
6176 TYPE_SIZE (elttype)), 1);
6177
6178 count += n_elts_here;
6179 if (mostly_zeros_p (value))
6180 zero_count += n_elts_here;
6181 }
6182
6183 /* Clear the entire vector first if there are any missing elements,
6184 or if the incidence of zero elements is >= 75%. */
6185 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6186 }
6187
6188 if (need_to_clear && size > 0 && !vector)
6189 {
6190 if (REG_P (target))
6191 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6192 else
6193 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6194 cleared = 1;
6195 }
6196
6197 /* Inform later passes that the old value is dead. */
6198 if (!cleared && !vector && REG_P (target))
6199 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6200
6201 if (MEM_P (target))
6202 alias = MEM_ALIAS_SET (target);
6203 else
6204 alias = get_alias_set (elttype);
6205
6206 /* Store each element of the constructor into the corresponding
6207 element of TARGET, determined by counting the elements. */
6208 for (idx = 0, i = 0;
6209 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6210 idx++, i += bitsize / elt_size)
6211 {
6212 HOST_WIDE_INT eltpos;
6213 tree value = ce->value;
6214
6215 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6216 if (cleared && initializer_zerop (value))
6217 continue;
6218
6219 if (ce->index)
6220 eltpos = tree_low_cst (ce->index, 1);
6221 else
6222 eltpos = i;
6223
6224 if (vector)
6225 {
6226 /* Vector CONSTRUCTORs should only be built from smaller
6227 vectors in the case of BLKmode vectors. */
6228 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6229 RTVEC_ELT (vector, eltpos)
6230 = expand_normal (value);
6231 }
6232 else
6233 {
6234 enum machine_mode value_mode =
6235 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6236 ? TYPE_MODE (TREE_TYPE (value))
6237 : eltmode;
6238 bitpos = eltpos * elt_size;
6239 store_constructor_field (target, bitsize, bitpos,
6240 value_mode, value, type,
6241 cleared, alias);
6242 }
6243 }
6244
6245 if (vector)
6246 emit_insn (GEN_FCN (icode)
6247 (target,
6248 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6249 break;
6250 }
6251
6252 default:
6253 gcc_unreachable ();
6254 }
6255 }
6256
6257 /* Store the value of EXP (an expression tree)
6258 into a subfield of TARGET which has mode MODE and occupies
6259 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6260 If MODE is VOIDmode, it means that we are storing into a bit-field.
6261
6262 BITREGION_START is bitpos of the first bitfield in this region.
6263 BITREGION_END is the bitpos of the ending bitfield in this region.
6264 These two fields are 0, if the C++ memory model does not apply,
6265 or we are not interested in keeping track of bitfield regions.
6266
6267 Always return const0_rtx unless we have something particular to
6268 return.
6269
6270 TYPE is the type of the underlying object,
6271
6272 ALIAS_SET is the alias set for the destination. This value will
6273 (in general) be different from that for TARGET, since TARGET is a
6274 reference to the containing structure.
6275
6276 If NONTEMPORAL is true, try generating a nontemporal store. */
6277
6278 static rtx
6279 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6280 unsigned HOST_WIDE_INT bitregion_start,
6281 unsigned HOST_WIDE_INT bitregion_end,
6282 enum machine_mode mode, tree exp, tree type,
6283 alias_set_type alias_set, bool nontemporal)
6284 {
6285 if (TREE_CODE (exp) == ERROR_MARK)
6286 return const0_rtx;
6287
6288 /* If we have nothing to store, do nothing unless the expression has
6289 side-effects. */
6290 if (bitsize == 0)
6291 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6292
6293 /* If we are storing into an unaligned field of an aligned union that is
6294 in a register, we may have the mode of TARGET being an integer mode but
6295 MODE == BLKmode. In that case, get an aligned object whose size and
6296 alignment are the same as TARGET and store TARGET into it (we can avoid
6297 the store if the field being stored is the entire width of TARGET). Then
6298 call ourselves recursively to store the field into a BLKmode version of
6299 that object. Finally, load from the object into TARGET. This is not
6300 very efficient in general, but should only be slightly more expensive
6301 than the otherwise-required unaligned accesses. Perhaps this can be
6302 cleaned up later. It's tempting to make OBJECT readonly, but it's set
6303 twice, once with emit_move_insn and once via store_field. */
6304
6305 if (mode == BLKmode
6306 && (REG_P (target) || GET_CODE (target) == SUBREG))
6307 {
6308 rtx object = assign_temp (type, 0, 1, 1);
6309 rtx blk_object = adjust_address (object, BLKmode, 0);
6310
6311 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
6312 emit_move_insn (object, target);
6313
6314 store_field (blk_object, bitsize, bitpos,
6315 bitregion_start, bitregion_end,
6316 mode, exp, type, MEM_ALIAS_SET (blk_object), nontemporal);
6317
6318 emit_move_insn (target, object);
6319
6320 /* We want to return the BLKmode version of the data. */
6321 return blk_object;
6322 }
6323
6324 if (GET_CODE (target) == CONCAT)
6325 {
6326 /* We're storing into a struct containing a single __complex. */
6327
6328 gcc_assert (!bitpos);
6329 return store_expr (exp, target, 0, nontemporal);
6330 }
6331
6332 /* If the structure is in a register or if the component
6333 is a bit field, we cannot use addressing to access it.
6334 Use bit-field techniques or SUBREG to store in it. */
6335
6336 if (mode == VOIDmode
6337 || (mode != BLKmode && ! direct_store[(int) mode]
6338 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6339 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6340 || REG_P (target)
6341 || GET_CODE (target) == SUBREG
6342 /* If the field isn't aligned enough to store as an ordinary memref,
6343 store it as a bit field. */
6344 || (mode != BLKmode
6345 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6346 || bitpos % GET_MODE_ALIGNMENT (mode))
6347 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6348 || (bitpos % BITS_PER_UNIT != 0)))
6349 || (bitsize >= 0 && mode != BLKmode
6350 && GET_MODE_BITSIZE (mode) > bitsize)
6351 /* If the RHS and field are a constant size and the size of the
6352 RHS isn't the same size as the bitfield, we must use bitfield
6353 operations. */
6354 || (bitsize >= 0
6355 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6356 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6357 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6358 decl we must use bitfield operations. */
6359 || (bitsize >= 0
6360 && TREE_CODE (exp) == MEM_REF
6361 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6362 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6363 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6364 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6365 {
6366 rtx temp;
6367 gimple nop_def;
6368
6369 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6370 implies a mask operation. If the precision is the same size as
6371 the field we're storing into, that mask is redundant. This is
6372 particularly common with bit field assignments generated by the
6373 C front end. */
6374 nop_def = get_def_for_expr (exp, NOP_EXPR);
6375 if (nop_def)
6376 {
6377 tree type = TREE_TYPE (exp);
6378 if (INTEGRAL_TYPE_P (type)
6379 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6380 && bitsize == TYPE_PRECISION (type))
6381 {
6382 tree op = gimple_assign_rhs1 (nop_def);
6383 type = TREE_TYPE (op);
6384 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6385 exp = op;
6386 }
6387 }
6388
6389 temp = expand_normal (exp);
6390
6391 /* If BITSIZE is narrower than the size of the type of EXP
6392 we will be narrowing TEMP. Normally, what's wanted are the
6393 low-order bits. However, if EXP's type is a record and this is
6394 big-endian machine, we want the upper BITSIZE bits. */
6395 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6396 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6397 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6398 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6399 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6400 NULL_RTX, 1);
6401
6402 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6403 if (mode != VOIDmode && mode != BLKmode
6404 && mode != TYPE_MODE (TREE_TYPE (exp)))
6405 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6406
6407 /* If the modes of TEMP and TARGET are both BLKmode, both
6408 must be in memory and BITPOS must be aligned on a byte
6409 boundary. If so, we simply do a block copy. Likewise
6410 for a BLKmode-like TARGET. */
6411 if (GET_MODE (temp) == BLKmode
6412 && (GET_MODE (target) == BLKmode
6413 || (MEM_P (target)
6414 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6415 && (bitpos % BITS_PER_UNIT) == 0
6416 && (bitsize % BITS_PER_UNIT) == 0)))
6417 {
6418 gcc_assert (MEM_P (target) && MEM_P (temp)
6419 && (bitpos % BITS_PER_UNIT) == 0);
6420
6421 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6422 emit_block_move (target, temp,
6423 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6424 / BITS_PER_UNIT),
6425 BLOCK_OP_NORMAL);
6426
6427 return const0_rtx;
6428 }
6429
6430 /* Store the value in the bitfield. */
6431 store_bit_field (target, bitsize, bitpos,
6432 bitregion_start, bitregion_end,
6433 mode, temp);
6434
6435 return const0_rtx;
6436 }
6437 else
6438 {
6439 /* Now build a reference to just the desired component. */
6440 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6441
6442 if (to_rtx == target)
6443 to_rtx = copy_rtx (to_rtx);
6444
6445 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6446 set_mem_alias_set (to_rtx, alias_set);
6447
6448 return store_expr (exp, to_rtx, 0, nontemporal);
6449 }
6450 }
6451 \f
6452 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6453 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6454 codes and find the ultimate containing object, which we return.
6455
6456 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6457 bit position, and *PUNSIGNEDP to the signedness of the field.
6458 If the position of the field is variable, we store a tree
6459 giving the variable offset (in units) in *POFFSET.
6460 This offset is in addition to the bit position.
6461 If the position is not variable, we store 0 in *POFFSET.
6462
6463 If any of the extraction expressions is volatile,
6464 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6465
6466 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6467 Otherwise, it is a mode that can be used to access the field.
6468
6469 If the field describes a variable-sized object, *PMODE is set to
6470 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6471 this case, but the address of the object can be found.
6472
6473 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6474 look through nodes that serve as markers of a greater alignment than
6475 the one that can be deduced from the expression. These nodes make it
6476 possible for front-ends to prevent temporaries from being created by
6477 the middle-end on alignment considerations. For that purpose, the
6478 normal operating mode at high-level is to always pass FALSE so that
6479 the ultimate containing object is really returned; moreover, the
6480 associated predicate handled_component_p will always return TRUE
6481 on these nodes, thus indicating that they are essentially handled
6482 by get_inner_reference. TRUE should only be passed when the caller
6483 is scanning the expression in order to build another representation
6484 and specifically knows how to handle these nodes; as such, this is
6485 the normal operating mode in the RTL expanders. */
6486
6487 tree
6488 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6489 HOST_WIDE_INT *pbitpos, tree *poffset,
6490 enum machine_mode *pmode, int *punsignedp,
6491 int *pvolatilep, bool keep_aligning)
6492 {
6493 tree size_tree = 0;
6494 enum machine_mode mode = VOIDmode;
6495 bool blkmode_bitfield = false;
6496 tree offset = size_zero_node;
6497 double_int bit_offset = double_int_zero;
6498
6499 /* First get the mode, signedness, and size. We do this from just the
6500 outermost expression. */
6501 *pbitsize = -1;
6502 if (TREE_CODE (exp) == COMPONENT_REF)
6503 {
6504 tree field = TREE_OPERAND (exp, 1);
6505 size_tree = DECL_SIZE (field);
6506 if (!DECL_BIT_FIELD (field))
6507 mode = DECL_MODE (field);
6508 else if (DECL_MODE (field) == BLKmode)
6509 blkmode_bitfield = true;
6510 else if (TREE_THIS_VOLATILE (exp)
6511 && flag_strict_volatile_bitfields > 0)
6512 /* Volatile bitfields should be accessed in the mode of the
6513 field's type, not the mode computed based on the bit
6514 size. */
6515 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6516
6517 *punsignedp = DECL_UNSIGNED (field);
6518 }
6519 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6520 {
6521 size_tree = TREE_OPERAND (exp, 1);
6522 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6523 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6524
6525 /* For vector types, with the correct size of access, use the mode of
6526 inner type. */
6527 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6528 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6529 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6530 mode = TYPE_MODE (TREE_TYPE (exp));
6531 }
6532 else
6533 {
6534 mode = TYPE_MODE (TREE_TYPE (exp));
6535 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6536
6537 if (mode == BLKmode)
6538 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6539 else
6540 *pbitsize = GET_MODE_BITSIZE (mode);
6541 }
6542
6543 if (size_tree != 0)
6544 {
6545 if (! host_integerp (size_tree, 1))
6546 mode = BLKmode, *pbitsize = -1;
6547 else
6548 *pbitsize = tree_low_cst (size_tree, 1);
6549 }
6550
6551 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6552 and find the ultimate containing object. */
6553 while (1)
6554 {
6555 switch (TREE_CODE (exp))
6556 {
6557 case BIT_FIELD_REF:
6558 bit_offset
6559 = double_int_add (bit_offset,
6560 tree_to_double_int (TREE_OPERAND (exp, 2)));
6561 break;
6562
6563 case COMPONENT_REF:
6564 {
6565 tree field = TREE_OPERAND (exp, 1);
6566 tree this_offset = component_ref_field_offset (exp);
6567
6568 /* If this field hasn't been filled in yet, don't go past it.
6569 This should only happen when folding expressions made during
6570 type construction. */
6571 if (this_offset == 0)
6572 break;
6573
6574 offset = size_binop (PLUS_EXPR, offset, this_offset);
6575 bit_offset = double_int_add (bit_offset,
6576 tree_to_double_int
6577 (DECL_FIELD_BIT_OFFSET (field)));
6578
6579 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6580 }
6581 break;
6582
6583 case ARRAY_REF:
6584 case ARRAY_RANGE_REF:
6585 {
6586 tree index = TREE_OPERAND (exp, 1);
6587 tree low_bound = array_ref_low_bound (exp);
6588 tree unit_size = array_ref_element_size (exp);
6589
6590 /* We assume all arrays have sizes that are a multiple of a byte.
6591 First subtract the lower bound, if any, in the type of the
6592 index, then convert to sizetype and multiply by the size of
6593 the array element. */
6594 if (! integer_zerop (low_bound))
6595 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6596 index, low_bound);
6597
6598 offset = size_binop (PLUS_EXPR, offset,
6599 size_binop (MULT_EXPR,
6600 fold_convert (sizetype, index),
6601 unit_size));
6602 }
6603 break;
6604
6605 case REALPART_EXPR:
6606 break;
6607
6608 case IMAGPART_EXPR:
6609 bit_offset = double_int_add (bit_offset,
6610 uhwi_to_double_int (*pbitsize));
6611 break;
6612
6613 case VIEW_CONVERT_EXPR:
6614 if (keep_aligning && STRICT_ALIGNMENT
6615 && (TYPE_ALIGN (TREE_TYPE (exp))
6616 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6617 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6618 < BIGGEST_ALIGNMENT)
6619 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6620 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6621 goto done;
6622 break;
6623
6624 case MEM_REF:
6625 /* Hand back the decl for MEM[&decl, off]. */
6626 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6627 {
6628 tree off = TREE_OPERAND (exp, 1);
6629 if (!integer_zerop (off))
6630 {
6631 double_int boff, coff = mem_ref_offset (exp);
6632 boff = double_int_lshift (coff,
6633 BITS_PER_UNIT == 8
6634 ? 3 : exact_log2 (BITS_PER_UNIT),
6635 HOST_BITS_PER_DOUBLE_INT, true);
6636 bit_offset = double_int_add (bit_offset, boff);
6637 }
6638 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6639 }
6640 goto done;
6641
6642 default:
6643 goto done;
6644 }
6645
6646 /* If any reference in the chain is volatile, the effect is volatile. */
6647 if (TREE_THIS_VOLATILE (exp))
6648 *pvolatilep = 1;
6649
6650 exp = TREE_OPERAND (exp, 0);
6651 }
6652 done:
6653
6654 /* If OFFSET is constant, see if we can return the whole thing as a
6655 constant bit position. Make sure to handle overflow during
6656 this conversion. */
6657 if (TREE_CODE (offset) == INTEGER_CST)
6658 {
6659 double_int tem = tree_to_double_int (offset);
6660 tem = double_int_sext (tem, TYPE_PRECISION (sizetype));
6661 tem = double_int_lshift (tem,
6662 BITS_PER_UNIT == 8
6663 ? 3 : exact_log2 (BITS_PER_UNIT),
6664 HOST_BITS_PER_DOUBLE_INT, true);
6665 tem = double_int_add (tem, bit_offset);
6666 if (double_int_fits_in_shwi_p (tem))
6667 {
6668 *pbitpos = double_int_to_shwi (tem);
6669 *poffset = offset = NULL_TREE;
6670 }
6671 }
6672
6673 /* Otherwise, split it up. */
6674 if (offset)
6675 {
6676 /* Avoid returning a negative bitpos as this may wreak havoc later. */
6677 if (double_int_negative_p (bit_offset))
6678 {
6679 double_int mask
6680 = double_int_mask (BITS_PER_UNIT == 8
6681 ? 3 : exact_log2 (BITS_PER_UNIT));
6682 double_int tem = double_int_and_not (bit_offset, mask);
6683 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
6684 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
6685 bit_offset = double_int_sub (bit_offset, tem);
6686 tem = double_int_rshift (tem,
6687 BITS_PER_UNIT == 8
6688 ? 3 : exact_log2 (BITS_PER_UNIT),
6689 HOST_BITS_PER_DOUBLE_INT, true);
6690 offset = size_binop (PLUS_EXPR, offset,
6691 double_int_to_tree (sizetype, tem));
6692 }
6693
6694 *pbitpos = double_int_to_shwi (bit_offset);
6695 *poffset = offset;
6696 }
6697
6698 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6699 if (mode == VOIDmode
6700 && blkmode_bitfield
6701 && (*pbitpos % BITS_PER_UNIT) == 0
6702 && (*pbitsize % BITS_PER_UNIT) == 0)
6703 *pmode = BLKmode;
6704 else
6705 *pmode = mode;
6706
6707 return exp;
6708 }
6709
6710 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6711 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6712 EXP is marked as PACKED. */
6713
6714 bool
6715 contains_packed_reference (const_tree exp)
6716 {
6717 bool packed_p = false;
6718
6719 while (1)
6720 {
6721 switch (TREE_CODE (exp))
6722 {
6723 case COMPONENT_REF:
6724 {
6725 tree field = TREE_OPERAND (exp, 1);
6726 packed_p = DECL_PACKED (field)
6727 || TYPE_PACKED (TREE_TYPE (field))
6728 || TYPE_PACKED (TREE_TYPE (exp));
6729 if (packed_p)
6730 goto done;
6731 }
6732 break;
6733
6734 case BIT_FIELD_REF:
6735 case ARRAY_REF:
6736 case ARRAY_RANGE_REF:
6737 case REALPART_EXPR:
6738 case IMAGPART_EXPR:
6739 case VIEW_CONVERT_EXPR:
6740 break;
6741
6742 default:
6743 goto done;
6744 }
6745 exp = TREE_OPERAND (exp, 0);
6746 }
6747 done:
6748 return packed_p;
6749 }
6750
6751 /* Return a tree of sizetype representing the size, in bytes, of the element
6752 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6753
6754 tree
6755 array_ref_element_size (tree exp)
6756 {
6757 tree aligned_size = TREE_OPERAND (exp, 3);
6758 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6759 location_t loc = EXPR_LOCATION (exp);
6760
6761 /* If a size was specified in the ARRAY_REF, it's the size measured
6762 in alignment units of the element type. So multiply by that value. */
6763 if (aligned_size)
6764 {
6765 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6766 sizetype from another type of the same width and signedness. */
6767 if (TREE_TYPE (aligned_size) != sizetype)
6768 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6769 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6770 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6771 }
6772
6773 /* Otherwise, take the size from that of the element type. Substitute
6774 any PLACEHOLDER_EXPR that we have. */
6775 else
6776 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6777 }
6778
6779 /* Return a tree representing the lower bound of the array mentioned in
6780 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6781
6782 tree
6783 array_ref_low_bound (tree exp)
6784 {
6785 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6786
6787 /* If a lower bound is specified in EXP, use it. */
6788 if (TREE_OPERAND (exp, 2))
6789 return TREE_OPERAND (exp, 2);
6790
6791 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6792 substituting for a PLACEHOLDER_EXPR as needed. */
6793 if (domain_type && TYPE_MIN_VALUE (domain_type))
6794 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6795
6796 /* Otherwise, return a zero of the appropriate type. */
6797 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6798 }
6799
6800 /* Returns true if REF is an array reference to an array at the end of
6801 a structure. If this is the case, the array may be allocated larger
6802 than its upper bound implies. */
6803
6804 bool
6805 array_at_struct_end_p (tree ref)
6806 {
6807 if (TREE_CODE (ref) != ARRAY_REF
6808 && TREE_CODE (ref) != ARRAY_RANGE_REF)
6809 return false;
6810
6811 while (handled_component_p (ref))
6812 {
6813 /* If the reference chain contains a component reference to a
6814 non-union type and there follows another field the reference
6815 is not at the end of a structure. */
6816 if (TREE_CODE (ref) == COMPONENT_REF
6817 && TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == RECORD_TYPE)
6818 {
6819 tree nextf = DECL_CHAIN (TREE_OPERAND (ref, 1));
6820 while (nextf && TREE_CODE (nextf) != FIELD_DECL)
6821 nextf = DECL_CHAIN (nextf);
6822 if (nextf)
6823 return false;
6824 }
6825
6826 ref = TREE_OPERAND (ref, 0);
6827 }
6828
6829 /* If the reference is based on a declared entity, the size of the array
6830 is constrained by its given domain. */
6831 if (DECL_P (ref))
6832 return false;
6833
6834 return true;
6835 }
6836
6837 /* Return a tree representing the upper bound of the array mentioned in
6838 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6839
6840 tree
6841 array_ref_up_bound (tree exp)
6842 {
6843 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6844
6845 /* If there is a domain type and it has an upper bound, use it, substituting
6846 for a PLACEHOLDER_EXPR as needed. */
6847 if (domain_type && TYPE_MAX_VALUE (domain_type))
6848 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6849
6850 /* Otherwise fail. */
6851 return NULL_TREE;
6852 }
6853
6854 /* Return a tree representing the offset, in bytes, of the field referenced
6855 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6856
6857 tree
6858 component_ref_field_offset (tree exp)
6859 {
6860 tree aligned_offset = TREE_OPERAND (exp, 2);
6861 tree field = TREE_OPERAND (exp, 1);
6862 location_t loc = EXPR_LOCATION (exp);
6863
6864 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6865 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6866 value. */
6867 if (aligned_offset)
6868 {
6869 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6870 sizetype from another type of the same width and signedness. */
6871 if (TREE_TYPE (aligned_offset) != sizetype)
6872 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6873 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6874 size_int (DECL_OFFSET_ALIGN (field)
6875 / BITS_PER_UNIT));
6876 }
6877
6878 /* Otherwise, take the offset from that of the field. Substitute
6879 any PLACEHOLDER_EXPR that we have. */
6880 else
6881 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6882 }
6883
6884 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6885
6886 static unsigned HOST_WIDE_INT
6887 target_align (const_tree target)
6888 {
6889 /* We might have a chain of nested references with intermediate misaligning
6890 bitfields components, so need to recurse to find out. */
6891
6892 unsigned HOST_WIDE_INT this_align, outer_align;
6893
6894 switch (TREE_CODE (target))
6895 {
6896 case BIT_FIELD_REF:
6897 return 1;
6898
6899 case COMPONENT_REF:
6900 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6901 outer_align = target_align (TREE_OPERAND (target, 0));
6902 return MIN (this_align, outer_align);
6903
6904 case ARRAY_REF:
6905 case ARRAY_RANGE_REF:
6906 this_align = TYPE_ALIGN (TREE_TYPE (target));
6907 outer_align = target_align (TREE_OPERAND (target, 0));
6908 return MIN (this_align, outer_align);
6909
6910 CASE_CONVERT:
6911 case NON_LVALUE_EXPR:
6912 case VIEW_CONVERT_EXPR:
6913 this_align = TYPE_ALIGN (TREE_TYPE (target));
6914 outer_align = target_align (TREE_OPERAND (target, 0));
6915 return MAX (this_align, outer_align);
6916
6917 default:
6918 return TYPE_ALIGN (TREE_TYPE (target));
6919 }
6920 }
6921
6922 \f
6923 /* Given an rtx VALUE that may contain additions and multiplications, return
6924 an equivalent value that just refers to a register, memory, or constant.
6925 This is done by generating instructions to perform the arithmetic and
6926 returning a pseudo-register containing the value.
6927
6928 The returned value may be a REG, SUBREG, MEM or constant. */
6929
6930 rtx
6931 force_operand (rtx value, rtx target)
6932 {
6933 rtx op1, op2;
6934 /* Use subtarget as the target for operand 0 of a binary operation. */
6935 rtx subtarget = get_subtarget (target);
6936 enum rtx_code code = GET_CODE (value);
6937
6938 /* Check for subreg applied to an expression produced by loop optimizer. */
6939 if (code == SUBREG
6940 && !REG_P (SUBREG_REG (value))
6941 && !MEM_P (SUBREG_REG (value)))
6942 {
6943 value
6944 = simplify_gen_subreg (GET_MODE (value),
6945 force_reg (GET_MODE (SUBREG_REG (value)),
6946 force_operand (SUBREG_REG (value),
6947 NULL_RTX)),
6948 GET_MODE (SUBREG_REG (value)),
6949 SUBREG_BYTE (value));
6950 code = GET_CODE (value);
6951 }
6952
6953 /* Check for a PIC address load. */
6954 if ((code == PLUS || code == MINUS)
6955 && XEXP (value, 0) == pic_offset_table_rtx
6956 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6957 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6958 || GET_CODE (XEXP (value, 1)) == CONST))
6959 {
6960 if (!subtarget)
6961 subtarget = gen_reg_rtx (GET_MODE (value));
6962 emit_move_insn (subtarget, value);
6963 return subtarget;
6964 }
6965
6966 if (ARITHMETIC_P (value))
6967 {
6968 op2 = XEXP (value, 1);
6969 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6970 subtarget = 0;
6971 if (code == MINUS && CONST_INT_P (op2))
6972 {
6973 code = PLUS;
6974 op2 = negate_rtx (GET_MODE (value), op2);
6975 }
6976
6977 /* Check for an addition with OP2 a constant integer and our first
6978 operand a PLUS of a virtual register and something else. In that
6979 case, we want to emit the sum of the virtual register and the
6980 constant first and then add the other value. This allows virtual
6981 register instantiation to simply modify the constant rather than
6982 creating another one around this addition. */
6983 if (code == PLUS && CONST_INT_P (op2)
6984 && GET_CODE (XEXP (value, 0)) == PLUS
6985 && REG_P (XEXP (XEXP (value, 0), 0))
6986 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6987 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6988 {
6989 rtx temp = expand_simple_binop (GET_MODE (value), code,
6990 XEXP (XEXP (value, 0), 0), op2,
6991 subtarget, 0, OPTAB_LIB_WIDEN);
6992 return expand_simple_binop (GET_MODE (value), code, temp,
6993 force_operand (XEXP (XEXP (value,
6994 0), 1), 0),
6995 target, 0, OPTAB_LIB_WIDEN);
6996 }
6997
6998 op1 = force_operand (XEXP (value, 0), subtarget);
6999 op2 = force_operand (op2, NULL_RTX);
7000 switch (code)
7001 {
7002 case MULT:
7003 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7004 case DIV:
7005 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7006 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7007 target, 1, OPTAB_LIB_WIDEN);
7008 else
7009 return expand_divmod (0,
7010 FLOAT_MODE_P (GET_MODE (value))
7011 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7012 GET_MODE (value), op1, op2, target, 0);
7013 case MOD:
7014 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7015 target, 0);
7016 case UDIV:
7017 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7018 target, 1);
7019 case UMOD:
7020 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7021 target, 1);
7022 case ASHIFTRT:
7023 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7024 target, 0, OPTAB_LIB_WIDEN);
7025 default:
7026 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7027 target, 1, OPTAB_LIB_WIDEN);
7028 }
7029 }
7030 if (UNARY_P (value))
7031 {
7032 if (!target)
7033 target = gen_reg_rtx (GET_MODE (value));
7034 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7035 switch (code)
7036 {
7037 case ZERO_EXTEND:
7038 case SIGN_EXTEND:
7039 case TRUNCATE:
7040 case FLOAT_EXTEND:
7041 case FLOAT_TRUNCATE:
7042 convert_move (target, op1, code == ZERO_EXTEND);
7043 return target;
7044
7045 case FIX:
7046 case UNSIGNED_FIX:
7047 expand_fix (target, op1, code == UNSIGNED_FIX);
7048 return target;
7049
7050 case FLOAT:
7051 case UNSIGNED_FLOAT:
7052 expand_float (target, op1, code == UNSIGNED_FLOAT);
7053 return target;
7054
7055 default:
7056 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7057 }
7058 }
7059
7060 #ifdef INSN_SCHEDULING
7061 /* On machines that have insn scheduling, we want all memory reference to be
7062 explicit, so we need to deal with such paradoxical SUBREGs. */
7063 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7064 value
7065 = simplify_gen_subreg (GET_MODE (value),
7066 force_reg (GET_MODE (SUBREG_REG (value)),
7067 force_operand (SUBREG_REG (value),
7068 NULL_RTX)),
7069 GET_MODE (SUBREG_REG (value)),
7070 SUBREG_BYTE (value));
7071 #endif
7072
7073 return value;
7074 }
7075 \f
7076 /* Subroutine of expand_expr: return nonzero iff there is no way that
7077 EXP can reference X, which is being modified. TOP_P is nonzero if this
7078 call is going to be used to determine whether we need a temporary
7079 for EXP, as opposed to a recursive call to this function.
7080
7081 It is always safe for this routine to return zero since it merely
7082 searches for optimization opportunities. */
7083
7084 int
7085 safe_from_p (const_rtx x, tree exp, int top_p)
7086 {
7087 rtx exp_rtl = 0;
7088 int i, nops;
7089
7090 if (x == 0
7091 /* If EXP has varying size, we MUST use a target since we currently
7092 have no way of allocating temporaries of variable size
7093 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7094 So we assume here that something at a higher level has prevented a
7095 clash. This is somewhat bogus, but the best we can do. Only
7096 do this when X is BLKmode and when we are at the top level. */
7097 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7098 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7099 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7100 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7101 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7102 != INTEGER_CST)
7103 && GET_MODE (x) == BLKmode)
7104 /* If X is in the outgoing argument area, it is always safe. */
7105 || (MEM_P (x)
7106 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7107 || (GET_CODE (XEXP (x, 0)) == PLUS
7108 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7109 return 1;
7110
7111 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7112 find the underlying pseudo. */
7113 if (GET_CODE (x) == SUBREG)
7114 {
7115 x = SUBREG_REG (x);
7116 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7117 return 0;
7118 }
7119
7120 /* Now look at our tree code and possibly recurse. */
7121 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7122 {
7123 case tcc_declaration:
7124 exp_rtl = DECL_RTL_IF_SET (exp);
7125 break;
7126
7127 case tcc_constant:
7128 return 1;
7129
7130 case tcc_exceptional:
7131 if (TREE_CODE (exp) == TREE_LIST)
7132 {
7133 while (1)
7134 {
7135 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7136 return 0;
7137 exp = TREE_CHAIN (exp);
7138 if (!exp)
7139 return 1;
7140 if (TREE_CODE (exp) != TREE_LIST)
7141 return safe_from_p (x, exp, 0);
7142 }
7143 }
7144 else if (TREE_CODE (exp) == CONSTRUCTOR)
7145 {
7146 constructor_elt *ce;
7147 unsigned HOST_WIDE_INT idx;
7148
7149 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
7150 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7151 || !safe_from_p (x, ce->value, 0))
7152 return 0;
7153 return 1;
7154 }
7155 else if (TREE_CODE (exp) == ERROR_MARK)
7156 return 1; /* An already-visited SAVE_EXPR? */
7157 else
7158 return 0;
7159
7160 case tcc_statement:
7161 /* The only case we look at here is the DECL_INITIAL inside a
7162 DECL_EXPR. */
7163 return (TREE_CODE (exp) != DECL_EXPR
7164 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7165 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7166 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7167
7168 case tcc_binary:
7169 case tcc_comparison:
7170 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7171 return 0;
7172 /* Fall through. */
7173
7174 case tcc_unary:
7175 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7176
7177 case tcc_expression:
7178 case tcc_reference:
7179 case tcc_vl_exp:
7180 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7181 the expression. If it is set, we conflict iff we are that rtx or
7182 both are in memory. Otherwise, we check all operands of the
7183 expression recursively. */
7184
7185 switch (TREE_CODE (exp))
7186 {
7187 case ADDR_EXPR:
7188 /* If the operand is static or we are static, we can't conflict.
7189 Likewise if we don't conflict with the operand at all. */
7190 if (staticp (TREE_OPERAND (exp, 0))
7191 || TREE_STATIC (exp)
7192 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7193 return 1;
7194
7195 /* Otherwise, the only way this can conflict is if we are taking
7196 the address of a DECL a that address if part of X, which is
7197 very rare. */
7198 exp = TREE_OPERAND (exp, 0);
7199 if (DECL_P (exp))
7200 {
7201 if (!DECL_RTL_SET_P (exp)
7202 || !MEM_P (DECL_RTL (exp)))
7203 return 0;
7204 else
7205 exp_rtl = XEXP (DECL_RTL (exp), 0);
7206 }
7207 break;
7208
7209 case MEM_REF:
7210 if (MEM_P (x)
7211 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7212 get_alias_set (exp)))
7213 return 0;
7214 break;
7215
7216 case CALL_EXPR:
7217 /* Assume that the call will clobber all hard registers and
7218 all of memory. */
7219 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7220 || MEM_P (x))
7221 return 0;
7222 break;
7223
7224 case WITH_CLEANUP_EXPR:
7225 case CLEANUP_POINT_EXPR:
7226 /* Lowered by gimplify.c. */
7227 gcc_unreachable ();
7228
7229 case SAVE_EXPR:
7230 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7231
7232 default:
7233 break;
7234 }
7235
7236 /* If we have an rtx, we do not need to scan our operands. */
7237 if (exp_rtl)
7238 break;
7239
7240 nops = TREE_OPERAND_LENGTH (exp);
7241 for (i = 0; i < nops; i++)
7242 if (TREE_OPERAND (exp, i) != 0
7243 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7244 return 0;
7245
7246 break;
7247
7248 case tcc_type:
7249 /* Should never get a type here. */
7250 gcc_unreachable ();
7251 }
7252
7253 /* If we have an rtl, find any enclosed object. Then see if we conflict
7254 with it. */
7255 if (exp_rtl)
7256 {
7257 if (GET_CODE (exp_rtl) == SUBREG)
7258 {
7259 exp_rtl = SUBREG_REG (exp_rtl);
7260 if (REG_P (exp_rtl)
7261 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7262 return 0;
7263 }
7264
7265 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7266 are memory and they conflict. */
7267 return ! (rtx_equal_p (x, exp_rtl)
7268 || (MEM_P (x) && MEM_P (exp_rtl)
7269 && true_dependence (exp_rtl, VOIDmode, x)));
7270 }
7271
7272 /* If we reach here, it is safe. */
7273 return 1;
7274 }
7275
7276 \f
7277 /* Return the highest power of two that EXP is known to be a multiple of.
7278 This is used in updating alignment of MEMs in array references. */
7279
7280 unsigned HOST_WIDE_INT
7281 highest_pow2_factor (const_tree exp)
7282 {
7283 unsigned HOST_WIDE_INT c0, c1;
7284
7285 switch (TREE_CODE (exp))
7286 {
7287 case INTEGER_CST:
7288 /* We can find the lowest bit that's a one. If the low
7289 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7290 We need to handle this case since we can find it in a COND_EXPR,
7291 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7292 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7293 later ICE. */
7294 if (TREE_OVERFLOW (exp))
7295 return BIGGEST_ALIGNMENT;
7296 else
7297 {
7298 /* Note: tree_low_cst is intentionally not used here,
7299 we don't care about the upper bits. */
7300 c0 = TREE_INT_CST_LOW (exp);
7301 c0 &= -c0;
7302 return c0 ? c0 : BIGGEST_ALIGNMENT;
7303 }
7304 break;
7305
7306 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7307 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7308 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7309 return MIN (c0, c1);
7310
7311 case MULT_EXPR:
7312 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7313 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7314 return c0 * c1;
7315
7316 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7317 case CEIL_DIV_EXPR:
7318 if (integer_pow2p (TREE_OPERAND (exp, 1))
7319 && host_integerp (TREE_OPERAND (exp, 1), 1))
7320 {
7321 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7322 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7323 return MAX (1, c0 / c1);
7324 }
7325 break;
7326
7327 case BIT_AND_EXPR:
7328 /* The highest power of two of a bit-and expression is the maximum of
7329 that of its operands. We typically get here for a complex LHS and
7330 a constant negative power of two on the RHS to force an explicit
7331 alignment, so don't bother looking at the LHS. */
7332 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7333
7334 CASE_CONVERT:
7335 case SAVE_EXPR:
7336 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7337
7338 case COMPOUND_EXPR:
7339 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7340
7341 case COND_EXPR:
7342 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7343 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7344 return MIN (c0, c1);
7345
7346 default:
7347 break;
7348 }
7349
7350 return 1;
7351 }
7352
7353 /* Similar, except that the alignment requirements of TARGET are
7354 taken into account. Assume it is at least as aligned as its
7355 type, unless it is a COMPONENT_REF in which case the layout of
7356 the structure gives the alignment. */
7357
7358 static unsigned HOST_WIDE_INT
7359 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7360 {
7361 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7362 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7363
7364 return MAX (factor, talign);
7365 }
7366 \f
7367 /* Convert the tree comparision code TCODE to the rtl one where the
7368 signedness is UNSIGNEDP. */
7369
7370 static enum rtx_code
7371 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7372 {
7373 enum rtx_code code;
7374 switch (tcode)
7375 {
7376 case EQ_EXPR:
7377 code = EQ;
7378 break;
7379 case NE_EXPR:
7380 code = NE;
7381 break;
7382 case LT_EXPR:
7383 code = unsignedp ? LTU : LT;
7384 break;
7385 case LE_EXPR:
7386 code = unsignedp ? LEU : LE;
7387 break;
7388 case GT_EXPR:
7389 code = unsignedp ? GTU : GT;
7390 break;
7391 case GE_EXPR:
7392 code = unsignedp ? GEU : GE;
7393 break;
7394 case UNORDERED_EXPR:
7395 code = UNORDERED;
7396 break;
7397 case ORDERED_EXPR:
7398 code = ORDERED;
7399 break;
7400 case UNLT_EXPR:
7401 code = UNLT;
7402 break;
7403 case UNLE_EXPR:
7404 code = UNLE;
7405 break;
7406 case UNGT_EXPR:
7407 code = UNGT;
7408 break;
7409 case UNGE_EXPR:
7410 code = UNGE;
7411 break;
7412 case UNEQ_EXPR:
7413 code = UNEQ;
7414 break;
7415 case LTGT_EXPR:
7416 code = LTGT;
7417 break;
7418
7419 default:
7420 gcc_unreachable ();
7421 }
7422 return code;
7423 }
7424
7425 /* Subroutine of expand_expr. Expand the two operands of a binary
7426 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7427 The value may be stored in TARGET if TARGET is nonzero. The
7428 MODIFIER argument is as documented by expand_expr. */
7429
7430 static void
7431 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7432 enum expand_modifier modifier)
7433 {
7434 if (! safe_from_p (target, exp1, 1))
7435 target = 0;
7436 if (operand_equal_p (exp0, exp1, 0))
7437 {
7438 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7439 *op1 = copy_rtx (*op0);
7440 }
7441 else
7442 {
7443 /* If we need to preserve evaluation order, copy exp0 into its own
7444 temporary variable so that it can't be clobbered by exp1. */
7445 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7446 exp0 = save_expr (exp0);
7447 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7448 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7449 }
7450 }
7451
7452 \f
7453 /* Return a MEM that contains constant EXP. DEFER is as for
7454 output_constant_def and MODIFIER is as for expand_expr. */
7455
7456 static rtx
7457 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7458 {
7459 rtx mem;
7460
7461 mem = output_constant_def (exp, defer);
7462 if (modifier != EXPAND_INITIALIZER)
7463 mem = use_anchored_address (mem);
7464 return mem;
7465 }
7466
7467 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7468 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7469
7470 static rtx
7471 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7472 enum expand_modifier modifier, addr_space_t as)
7473 {
7474 rtx result, subtarget;
7475 tree inner, offset;
7476 HOST_WIDE_INT bitsize, bitpos;
7477 int volatilep, unsignedp;
7478 enum machine_mode mode1;
7479
7480 /* If we are taking the address of a constant and are at the top level,
7481 we have to use output_constant_def since we can't call force_const_mem
7482 at top level. */
7483 /* ??? This should be considered a front-end bug. We should not be
7484 generating ADDR_EXPR of something that isn't an LVALUE. The only
7485 exception here is STRING_CST. */
7486 if (CONSTANT_CLASS_P (exp))
7487 {
7488 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7489 if (modifier < EXPAND_SUM)
7490 result = force_operand (result, target);
7491 return result;
7492 }
7493
7494 /* Everything must be something allowed by is_gimple_addressable. */
7495 switch (TREE_CODE (exp))
7496 {
7497 case INDIRECT_REF:
7498 /* This case will happen via recursion for &a->b. */
7499 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7500
7501 case MEM_REF:
7502 {
7503 tree tem = TREE_OPERAND (exp, 0);
7504 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7505 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7506 return expand_expr (tem, target, tmode, modifier);
7507 }
7508
7509 case CONST_DECL:
7510 /* Expand the initializer like constants above. */
7511 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7512 0, modifier), 0);
7513 if (modifier < EXPAND_SUM)
7514 result = force_operand (result, target);
7515 return result;
7516
7517 case REALPART_EXPR:
7518 /* The real part of the complex number is always first, therefore
7519 the address is the same as the address of the parent object. */
7520 offset = 0;
7521 bitpos = 0;
7522 inner = TREE_OPERAND (exp, 0);
7523 break;
7524
7525 case IMAGPART_EXPR:
7526 /* The imaginary part of the complex number is always second.
7527 The expression is therefore always offset by the size of the
7528 scalar type. */
7529 offset = 0;
7530 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7531 inner = TREE_OPERAND (exp, 0);
7532 break;
7533
7534 default:
7535 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7536 expand_expr, as that can have various side effects; LABEL_DECLs for
7537 example, may not have their DECL_RTL set yet. Expand the rtl of
7538 CONSTRUCTORs too, which should yield a memory reference for the
7539 constructor's contents. Assume language specific tree nodes can
7540 be expanded in some interesting way. */
7541 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7542 if (DECL_P (exp)
7543 || TREE_CODE (exp) == CONSTRUCTOR
7544 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7545 {
7546 result = expand_expr (exp, target, tmode,
7547 modifier == EXPAND_INITIALIZER
7548 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7549
7550 /* If the DECL isn't in memory, then the DECL wasn't properly
7551 marked TREE_ADDRESSABLE, which will be either a front-end
7552 or a tree optimizer bug. */
7553
7554 if (TREE_ADDRESSABLE (exp)
7555 && ! MEM_P (result)
7556 && ! targetm.calls.allocate_stack_slots_for_args())
7557 {
7558 error ("local frame unavailable (naked function?)");
7559 return result;
7560 }
7561 else
7562 gcc_assert (MEM_P (result));
7563 result = XEXP (result, 0);
7564
7565 /* ??? Is this needed anymore? */
7566 if (DECL_P (exp))
7567 TREE_USED (exp) = 1;
7568
7569 if (modifier != EXPAND_INITIALIZER
7570 && modifier != EXPAND_CONST_ADDRESS
7571 && modifier != EXPAND_SUM)
7572 result = force_operand (result, target);
7573 return result;
7574 }
7575
7576 /* Pass FALSE as the last argument to get_inner_reference although
7577 we are expanding to RTL. The rationale is that we know how to
7578 handle "aligning nodes" here: we can just bypass them because
7579 they won't change the final object whose address will be returned
7580 (they actually exist only for that purpose). */
7581 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7582 &mode1, &unsignedp, &volatilep, false);
7583 break;
7584 }
7585
7586 /* We must have made progress. */
7587 gcc_assert (inner != exp);
7588
7589 subtarget = offset || bitpos ? NULL_RTX : target;
7590 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7591 inner alignment, force the inner to be sufficiently aligned. */
7592 if (CONSTANT_CLASS_P (inner)
7593 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7594 {
7595 inner = copy_node (inner);
7596 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7597 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7598 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7599 }
7600 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7601
7602 if (offset)
7603 {
7604 rtx tmp;
7605
7606 if (modifier != EXPAND_NORMAL)
7607 result = force_operand (result, NULL);
7608 tmp = expand_expr (offset, NULL_RTX, tmode,
7609 modifier == EXPAND_INITIALIZER
7610 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7611
7612 result = convert_memory_address_addr_space (tmode, result, as);
7613 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7614
7615 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7616 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7617 else
7618 {
7619 subtarget = bitpos ? NULL_RTX : target;
7620 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7621 1, OPTAB_LIB_WIDEN);
7622 }
7623 }
7624
7625 if (bitpos)
7626 {
7627 /* Someone beforehand should have rejected taking the address
7628 of such an object. */
7629 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7630
7631 result = plus_constant (result, bitpos / BITS_PER_UNIT);
7632 if (modifier < EXPAND_SUM)
7633 result = force_operand (result, target);
7634 }
7635
7636 return result;
7637 }
7638
7639 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7640 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7641
7642 static rtx
7643 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7644 enum expand_modifier modifier)
7645 {
7646 addr_space_t as = ADDR_SPACE_GENERIC;
7647 enum machine_mode address_mode = Pmode;
7648 enum machine_mode pointer_mode = ptr_mode;
7649 enum machine_mode rmode;
7650 rtx result;
7651
7652 /* Target mode of VOIDmode says "whatever's natural". */
7653 if (tmode == VOIDmode)
7654 tmode = TYPE_MODE (TREE_TYPE (exp));
7655
7656 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7657 {
7658 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7659 address_mode = targetm.addr_space.address_mode (as);
7660 pointer_mode = targetm.addr_space.pointer_mode (as);
7661 }
7662
7663 /* We can get called with some Weird Things if the user does silliness
7664 like "(short) &a". In that case, convert_memory_address won't do
7665 the right thing, so ignore the given target mode. */
7666 if (tmode != address_mode && tmode != pointer_mode)
7667 tmode = address_mode;
7668
7669 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7670 tmode, modifier, as);
7671
7672 /* Despite expand_expr claims concerning ignoring TMODE when not
7673 strictly convenient, stuff breaks if we don't honor it. Note
7674 that combined with the above, we only do this for pointer modes. */
7675 rmode = GET_MODE (result);
7676 if (rmode == VOIDmode)
7677 rmode = tmode;
7678 if (rmode != tmode)
7679 result = convert_memory_address_addr_space (tmode, result, as);
7680
7681 return result;
7682 }
7683
7684 /* Generate code for computing CONSTRUCTOR EXP.
7685 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7686 is TRUE, instead of creating a temporary variable in memory
7687 NULL is returned and the caller needs to handle it differently. */
7688
7689 static rtx
7690 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7691 bool avoid_temp_mem)
7692 {
7693 tree type = TREE_TYPE (exp);
7694 enum machine_mode mode = TYPE_MODE (type);
7695
7696 /* Try to avoid creating a temporary at all. This is possible
7697 if all of the initializer is zero.
7698 FIXME: try to handle all [0..255] initializers we can handle
7699 with memset. */
7700 if (TREE_STATIC (exp)
7701 && !TREE_ADDRESSABLE (exp)
7702 && target != 0 && mode == BLKmode
7703 && all_zeros_p (exp))
7704 {
7705 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7706 return target;
7707 }
7708
7709 /* All elts simple constants => refer to a constant in memory. But
7710 if this is a non-BLKmode mode, let it store a field at a time
7711 since that should make a CONST_INT or CONST_DOUBLE when we
7712 fold. Likewise, if we have a target we can use, it is best to
7713 store directly into the target unless the type is large enough
7714 that memcpy will be used. If we are making an initializer and
7715 all operands are constant, put it in memory as well.
7716
7717 FIXME: Avoid trying to fill vector constructors piece-meal.
7718 Output them with output_constant_def below unless we're sure
7719 they're zeros. This should go away when vector initializers
7720 are treated like VECTOR_CST instead of arrays. */
7721 if ((TREE_STATIC (exp)
7722 && ((mode == BLKmode
7723 && ! (target != 0 && safe_from_p (target, exp, 1)))
7724 || TREE_ADDRESSABLE (exp)
7725 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7726 && (! MOVE_BY_PIECES_P
7727 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7728 TYPE_ALIGN (type)))
7729 && ! mostly_zeros_p (exp))))
7730 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7731 && TREE_CONSTANT (exp)))
7732 {
7733 rtx constructor;
7734
7735 if (avoid_temp_mem)
7736 return NULL_RTX;
7737
7738 constructor = expand_expr_constant (exp, 1, modifier);
7739
7740 if (modifier != EXPAND_CONST_ADDRESS
7741 && modifier != EXPAND_INITIALIZER
7742 && modifier != EXPAND_SUM)
7743 constructor = validize_mem (constructor);
7744
7745 return constructor;
7746 }
7747
7748 /* Handle calls that pass values in multiple non-contiguous
7749 locations. The Irix 6 ABI has examples of this. */
7750 if (target == 0 || ! safe_from_p (target, exp, 1)
7751 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7752 {
7753 if (avoid_temp_mem)
7754 return NULL_RTX;
7755
7756 target
7757 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7758 | (TREE_READONLY (exp)
7759 * TYPE_QUAL_CONST))),
7760 0, TREE_ADDRESSABLE (exp), 1);
7761 }
7762
7763 store_constructor (exp, target, 0, int_expr_size (exp));
7764 return target;
7765 }
7766
7767
7768 /* expand_expr: generate code for computing expression EXP.
7769 An rtx for the computed value is returned. The value is never null.
7770 In the case of a void EXP, const0_rtx is returned.
7771
7772 The value may be stored in TARGET if TARGET is nonzero.
7773 TARGET is just a suggestion; callers must assume that
7774 the rtx returned may not be the same as TARGET.
7775
7776 If TARGET is CONST0_RTX, it means that the value will be ignored.
7777
7778 If TMODE is not VOIDmode, it suggests generating the
7779 result in mode TMODE. But this is done only when convenient.
7780 Otherwise, TMODE is ignored and the value generated in its natural mode.
7781 TMODE is just a suggestion; callers must assume that
7782 the rtx returned may not have mode TMODE.
7783
7784 Note that TARGET may have neither TMODE nor MODE. In that case, it
7785 probably will not be used.
7786
7787 If MODIFIER is EXPAND_SUM then when EXP is an addition
7788 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7789 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7790 products as above, or REG or MEM, or constant.
7791 Ordinarily in such cases we would output mul or add instructions
7792 and then return a pseudo reg containing the sum.
7793
7794 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7795 it also marks a label as absolutely required (it can't be dead).
7796 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7797 This is used for outputting expressions used in initializers.
7798
7799 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7800 with a constant address even if that address is not normally legitimate.
7801 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7802
7803 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7804 a call parameter. Such targets require special care as we haven't yet
7805 marked TARGET so that it's safe from being trashed by libcalls. We
7806 don't want to use TARGET for anything but the final result;
7807 Intermediate values must go elsewhere. Additionally, calls to
7808 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7809
7810 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7811 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7812 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7813 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7814 recursively. */
7815
7816 rtx
7817 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7818 enum expand_modifier modifier, rtx *alt_rtl)
7819 {
7820 rtx ret;
7821
7822 /* Handle ERROR_MARK before anybody tries to access its type. */
7823 if (TREE_CODE (exp) == ERROR_MARK
7824 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7825 {
7826 ret = CONST0_RTX (tmode);
7827 return ret ? ret : const0_rtx;
7828 }
7829
7830 /* If this is an expression of some kind and it has an associated line
7831 number, then emit the line number before expanding the expression.
7832
7833 We need to save and restore the file and line information so that
7834 errors discovered during expansion are emitted with the right
7835 information. It would be better of the diagnostic routines
7836 used the file/line information embedded in the tree nodes rather
7837 than globals. */
7838 if (cfun && EXPR_HAS_LOCATION (exp))
7839 {
7840 location_t saved_location = input_location;
7841 location_t saved_curr_loc = get_curr_insn_source_location ();
7842 tree saved_block = get_curr_insn_block ();
7843 input_location = EXPR_LOCATION (exp);
7844 set_curr_insn_source_location (input_location);
7845
7846 /* Record where the insns produced belong. */
7847 set_curr_insn_block (TREE_BLOCK (exp));
7848
7849 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7850
7851 input_location = saved_location;
7852 set_curr_insn_block (saved_block);
7853 set_curr_insn_source_location (saved_curr_loc);
7854 }
7855 else
7856 {
7857 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7858 }
7859
7860 return ret;
7861 }
7862
7863 /* Try to expand the conditional expression which is represented by
7864 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If succeseds
7865 return the rtl reg which repsents the result. Otherwise return
7866 NULL_RTL. */
7867
7868 static rtx
7869 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
7870 tree treeop1 ATTRIBUTE_UNUSED,
7871 tree treeop2 ATTRIBUTE_UNUSED)
7872 {
7873 #ifdef HAVE_conditional_move
7874 rtx insn;
7875 rtx op00, op01, op1, op2;
7876 enum rtx_code comparison_code;
7877 enum machine_mode comparison_mode;
7878 gimple srcstmt;
7879 rtx temp;
7880 tree type = TREE_TYPE (treeop1);
7881 int unsignedp = TYPE_UNSIGNED (type);
7882 enum machine_mode mode = TYPE_MODE (type);
7883
7884 temp = assign_temp (type, 0, 0, 1);
7885
7886 /* If we cannot do a conditional move on the mode, try doing it
7887 with the promoted mode. */
7888 if (!can_conditionally_move_p (mode))
7889 mode = promote_mode (type, mode, &unsignedp);
7890
7891 if (!can_conditionally_move_p (mode))
7892 return NULL_RTX;
7893
7894 start_sequence ();
7895 expand_operands (treeop1, treeop2,
7896 temp, &op1, &op2, EXPAND_NORMAL);
7897
7898 if (TREE_CODE (treeop0) == SSA_NAME
7899 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
7900 {
7901 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
7902 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
7903 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
7904 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
7905 comparison_mode = TYPE_MODE (type);
7906 unsignedp = TYPE_UNSIGNED (type);
7907 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7908 }
7909 else if (TREE_CODE_CLASS (TREE_CODE (treeop0)) == tcc_comparison)
7910 {
7911 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
7912 enum tree_code cmpcode = TREE_CODE (treeop0);
7913 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
7914 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
7915 unsignedp = TYPE_UNSIGNED (type);
7916 comparison_mode = TYPE_MODE (type);
7917 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7918 }
7919 else
7920 {
7921 op00 = expand_normal (treeop0);
7922 op01 = const0_rtx;
7923 comparison_code = NE;
7924 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
7925 }
7926
7927 if (GET_MODE (op1) != mode)
7928 op1 = gen_lowpart (mode, op1);
7929
7930 if (GET_MODE (op2) != mode)
7931 op2 = gen_lowpart (mode, op2);
7932
7933 /* Try to emit the conditional move. */
7934 insn = emit_conditional_move (temp, comparison_code,
7935 op00, op01, comparison_mode,
7936 op1, op2, mode,
7937 unsignedp);
7938
7939 /* If we could do the conditional move, emit the sequence,
7940 and return. */
7941 if (insn)
7942 {
7943 rtx seq = get_insns ();
7944 end_sequence ();
7945 emit_insn (seq);
7946 return temp;
7947 }
7948
7949 /* Otherwise discard the sequence and fall back to code with
7950 branches. */
7951 end_sequence ();
7952 #endif
7953 return NULL_RTX;
7954 }
7955
7956 rtx
7957 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7958 enum expand_modifier modifier)
7959 {
7960 rtx op0, op1, op2, temp;
7961 tree type;
7962 int unsignedp;
7963 enum machine_mode mode;
7964 enum tree_code code = ops->code;
7965 optab this_optab;
7966 rtx subtarget, original_target;
7967 int ignore;
7968 bool reduce_bit_field;
7969 location_t loc = ops->location;
7970 tree treeop0, treeop1, treeop2;
7971 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7972 ? reduce_to_bit_field_precision ((expr), \
7973 target, \
7974 type) \
7975 : (expr))
7976
7977 type = ops->type;
7978 mode = TYPE_MODE (type);
7979 unsignedp = TYPE_UNSIGNED (type);
7980
7981 treeop0 = ops->op0;
7982 treeop1 = ops->op1;
7983 treeop2 = ops->op2;
7984
7985 /* We should be called only on simple (binary or unary) expressions,
7986 exactly those that are valid in gimple expressions that aren't
7987 GIMPLE_SINGLE_RHS (or invalid). */
7988 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7989 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7990 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7991
7992 ignore = (target == const0_rtx
7993 || ((CONVERT_EXPR_CODE_P (code)
7994 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7995 && TREE_CODE (type) == VOID_TYPE));
7996
7997 /* We should be called only if we need the result. */
7998 gcc_assert (!ignore);
7999
8000 /* An operation in what may be a bit-field type needs the
8001 result to be reduced to the precision of the bit-field type,
8002 which is narrower than that of the type's mode. */
8003 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8004 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8005
8006 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8007 target = 0;
8008
8009 /* Use subtarget as the target for operand 0 of a binary operation. */
8010 subtarget = get_subtarget (target);
8011 original_target = target;
8012
8013 switch (code)
8014 {
8015 case NON_LVALUE_EXPR:
8016 case PAREN_EXPR:
8017 CASE_CONVERT:
8018 if (treeop0 == error_mark_node)
8019 return const0_rtx;
8020
8021 if (TREE_CODE (type) == UNION_TYPE)
8022 {
8023 tree valtype = TREE_TYPE (treeop0);
8024
8025 /* If both input and output are BLKmode, this conversion isn't doing
8026 anything except possibly changing memory attribute. */
8027 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8028 {
8029 rtx result = expand_expr (treeop0, target, tmode,
8030 modifier);
8031
8032 result = copy_rtx (result);
8033 set_mem_attributes (result, type, 0);
8034 return result;
8035 }
8036
8037 if (target == 0)
8038 {
8039 if (TYPE_MODE (type) != BLKmode)
8040 target = gen_reg_rtx (TYPE_MODE (type));
8041 else
8042 target = assign_temp (type, 0, 1, 1);
8043 }
8044
8045 if (MEM_P (target))
8046 /* Store data into beginning of memory target. */
8047 store_expr (treeop0,
8048 adjust_address (target, TYPE_MODE (valtype), 0),
8049 modifier == EXPAND_STACK_PARM,
8050 false);
8051
8052 else
8053 {
8054 gcc_assert (REG_P (target));
8055
8056 /* Store this field into a union of the proper type. */
8057 store_field (target,
8058 MIN ((int_size_in_bytes (TREE_TYPE
8059 (treeop0))
8060 * BITS_PER_UNIT),
8061 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
8062 0, 0, 0, TYPE_MODE (valtype), treeop0,
8063 type, 0, false);
8064 }
8065
8066 /* Return the entire union. */
8067 return target;
8068 }
8069
8070 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8071 {
8072 op0 = expand_expr (treeop0, target, VOIDmode,
8073 modifier);
8074
8075 /* If the signedness of the conversion differs and OP0 is
8076 a promoted SUBREG, clear that indication since we now
8077 have to do the proper extension. */
8078 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8079 && GET_CODE (op0) == SUBREG)
8080 SUBREG_PROMOTED_VAR_P (op0) = 0;
8081
8082 return REDUCE_BIT_FIELD (op0);
8083 }
8084
8085 op0 = expand_expr (treeop0, NULL_RTX, mode,
8086 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8087 if (GET_MODE (op0) == mode)
8088 ;
8089
8090 /* If OP0 is a constant, just convert it into the proper mode. */
8091 else if (CONSTANT_P (op0))
8092 {
8093 tree inner_type = TREE_TYPE (treeop0);
8094 enum machine_mode inner_mode = GET_MODE (op0);
8095
8096 if (inner_mode == VOIDmode)
8097 inner_mode = TYPE_MODE (inner_type);
8098
8099 if (modifier == EXPAND_INITIALIZER)
8100 op0 = simplify_gen_subreg (mode, op0, inner_mode,
8101 subreg_lowpart_offset (mode,
8102 inner_mode));
8103 else
8104 op0= convert_modes (mode, inner_mode, op0,
8105 TYPE_UNSIGNED (inner_type));
8106 }
8107
8108 else if (modifier == EXPAND_INITIALIZER)
8109 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8110
8111 else if (target == 0)
8112 op0 = convert_to_mode (mode, op0,
8113 TYPE_UNSIGNED (TREE_TYPE
8114 (treeop0)));
8115 else
8116 {
8117 convert_move (target, op0,
8118 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8119 op0 = target;
8120 }
8121
8122 return REDUCE_BIT_FIELD (op0);
8123
8124 case ADDR_SPACE_CONVERT_EXPR:
8125 {
8126 tree treeop0_type = TREE_TYPE (treeop0);
8127 addr_space_t as_to;
8128 addr_space_t as_from;
8129
8130 gcc_assert (POINTER_TYPE_P (type));
8131 gcc_assert (POINTER_TYPE_P (treeop0_type));
8132
8133 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8134 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8135
8136 /* Conversions between pointers to the same address space should
8137 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8138 gcc_assert (as_to != as_from);
8139
8140 /* Ask target code to handle conversion between pointers
8141 to overlapping address spaces. */
8142 if (targetm.addr_space.subset_p (as_to, as_from)
8143 || targetm.addr_space.subset_p (as_from, as_to))
8144 {
8145 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8146 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8147 gcc_assert (op0);
8148 return op0;
8149 }
8150
8151 /* For disjoint address spaces, converting anything but
8152 a null pointer invokes undefined behaviour. We simply
8153 always return a null pointer here. */
8154 return CONST0_RTX (mode);
8155 }
8156
8157 case POINTER_PLUS_EXPR:
8158 /* Even though the sizetype mode and the pointer's mode can be different
8159 expand is able to handle this correctly and get the correct result out
8160 of the PLUS_EXPR code. */
8161 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8162 if sizetype precision is smaller than pointer precision. */
8163 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8164 treeop1 = fold_convert_loc (loc, type,
8165 fold_convert_loc (loc, ssizetype,
8166 treeop1));
8167 /* If sizetype precision is larger than pointer precision, truncate the
8168 offset to have matching modes. */
8169 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8170 treeop1 = fold_convert_loc (loc, type, treeop1);
8171
8172 case PLUS_EXPR:
8173 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8174 something else, make sure we add the register to the constant and
8175 then to the other thing. This case can occur during strength
8176 reduction and doing it this way will produce better code if the
8177 frame pointer or argument pointer is eliminated.
8178
8179 fold-const.c will ensure that the constant is always in the inner
8180 PLUS_EXPR, so the only case we need to do anything about is if
8181 sp, ap, or fp is our second argument, in which case we must swap
8182 the innermost first argument and our second argument. */
8183
8184 if (TREE_CODE (treeop0) == PLUS_EXPR
8185 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8186 && TREE_CODE (treeop1) == VAR_DECL
8187 && (DECL_RTL (treeop1) == frame_pointer_rtx
8188 || DECL_RTL (treeop1) == stack_pointer_rtx
8189 || DECL_RTL (treeop1) == arg_pointer_rtx))
8190 {
8191 tree t = treeop1;
8192
8193 treeop1 = TREE_OPERAND (treeop0, 0);
8194 TREE_OPERAND (treeop0, 0) = t;
8195 }
8196
8197 /* If the result is to be ptr_mode and we are adding an integer to
8198 something, we might be forming a constant. So try to use
8199 plus_constant. If it produces a sum and we can't accept it,
8200 use force_operand. This allows P = &ARR[const] to generate
8201 efficient code on machines where a SYMBOL_REF is not a valid
8202 address.
8203
8204 If this is an EXPAND_SUM call, always return the sum. */
8205 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8206 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8207 {
8208 if (modifier == EXPAND_STACK_PARM)
8209 target = 0;
8210 if (TREE_CODE (treeop0) == INTEGER_CST
8211 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8212 && TREE_CONSTANT (treeop1))
8213 {
8214 rtx constant_part;
8215
8216 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8217 EXPAND_SUM);
8218 /* Use immed_double_const to ensure that the constant is
8219 truncated according to the mode of OP1, then sign extended
8220 to a HOST_WIDE_INT. Using the constant directly can result
8221 in non-canonical RTL in a 64x32 cross compile. */
8222 constant_part
8223 = immed_double_const (TREE_INT_CST_LOW (treeop0),
8224 (HOST_WIDE_INT) 0,
8225 TYPE_MODE (TREE_TYPE (treeop1)));
8226 op1 = plus_constant (op1, INTVAL (constant_part));
8227 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8228 op1 = force_operand (op1, target);
8229 return REDUCE_BIT_FIELD (op1);
8230 }
8231
8232 else if (TREE_CODE (treeop1) == INTEGER_CST
8233 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8234 && TREE_CONSTANT (treeop0))
8235 {
8236 rtx constant_part;
8237
8238 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8239 (modifier == EXPAND_INITIALIZER
8240 ? EXPAND_INITIALIZER : EXPAND_SUM));
8241 if (! CONSTANT_P (op0))
8242 {
8243 op1 = expand_expr (treeop1, NULL_RTX,
8244 VOIDmode, modifier);
8245 /* Return a PLUS if modifier says it's OK. */
8246 if (modifier == EXPAND_SUM
8247 || modifier == EXPAND_INITIALIZER)
8248 return simplify_gen_binary (PLUS, mode, op0, op1);
8249 goto binop2;
8250 }
8251 /* Use immed_double_const to ensure that the constant is
8252 truncated according to the mode of OP1, then sign extended
8253 to a HOST_WIDE_INT. Using the constant directly can result
8254 in non-canonical RTL in a 64x32 cross compile. */
8255 constant_part
8256 = immed_double_const (TREE_INT_CST_LOW (treeop1),
8257 (HOST_WIDE_INT) 0,
8258 TYPE_MODE (TREE_TYPE (treeop0)));
8259 op0 = plus_constant (op0, INTVAL (constant_part));
8260 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8261 op0 = force_operand (op0, target);
8262 return REDUCE_BIT_FIELD (op0);
8263 }
8264 }
8265
8266 /* Use TER to expand pointer addition of a negated value
8267 as pointer subtraction. */
8268 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8269 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8270 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8271 && TREE_CODE (treeop1) == SSA_NAME
8272 && TYPE_MODE (TREE_TYPE (treeop0))
8273 == TYPE_MODE (TREE_TYPE (treeop1)))
8274 {
8275 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8276 if (def)
8277 {
8278 treeop1 = gimple_assign_rhs1 (def);
8279 code = MINUS_EXPR;
8280 goto do_minus;
8281 }
8282 }
8283
8284 /* No sense saving up arithmetic to be done
8285 if it's all in the wrong mode to form part of an address.
8286 And force_operand won't know whether to sign-extend or
8287 zero-extend. */
8288 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8289 || mode != ptr_mode)
8290 {
8291 expand_operands (treeop0, treeop1,
8292 subtarget, &op0, &op1, EXPAND_NORMAL);
8293 if (op0 == const0_rtx)
8294 return op1;
8295 if (op1 == const0_rtx)
8296 return op0;
8297 goto binop2;
8298 }
8299
8300 expand_operands (treeop0, treeop1,
8301 subtarget, &op0, &op1, modifier);
8302 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8303
8304 case MINUS_EXPR:
8305 do_minus:
8306 /* For initializers, we are allowed to return a MINUS of two
8307 symbolic constants. Here we handle all cases when both operands
8308 are constant. */
8309 /* Handle difference of two symbolic constants,
8310 for the sake of an initializer. */
8311 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8312 && really_constant_p (treeop0)
8313 && really_constant_p (treeop1))
8314 {
8315 expand_operands (treeop0, treeop1,
8316 NULL_RTX, &op0, &op1, modifier);
8317
8318 /* If the last operand is a CONST_INT, use plus_constant of
8319 the negated constant. Else make the MINUS. */
8320 if (CONST_INT_P (op1))
8321 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
8322 else
8323 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8324 }
8325
8326 /* No sense saving up arithmetic to be done
8327 if it's all in the wrong mode to form part of an address.
8328 And force_operand won't know whether to sign-extend or
8329 zero-extend. */
8330 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8331 || mode != ptr_mode)
8332 goto binop;
8333
8334 expand_operands (treeop0, treeop1,
8335 subtarget, &op0, &op1, modifier);
8336
8337 /* Convert A - const to A + (-const). */
8338 if (CONST_INT_P (op1))
8339 {
8340 op1 = negate_rtx (mode, op1);
8341 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8342 }
8343
8344 goto binop2;
8345
8346 case WIDEN_MULT_PLUS_EXPR:
8347 case WIDEN_MULT_MINUS_EXPR:
8348 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8349 op2 = expand_normal (treeop2);
8350 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8351 target, unsignedp);
8352 return target;
8353
8354 case WIDEN_MULT_EXPR:
8355 /* If first operand is constant, swap them.
8356 Thus the following special case checks need only
8357 check the second operand. */
8358 if (TREE_CODE (treeop0) == INTEGER_CST)
8359 {
8360 tree t1 = treeop0;
8361 treeop0 = treeop1;
8362 treeop1 = t1;
8363 }
8364
8365 /* First, check if we have a multiplication of one signed and one
8366 unsigned operand. */
8367 if (TREE_CODE (treeop1) != INTEGER_CST
8368 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8369 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8370 {
8371 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8372 this_optab = usmul_widen_optab;
8373 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8374 != CODE_FOR_nothing)
8375 {
8376 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8377 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8378 EXPAND_NORMAL);
8379 else
8380 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8381 EXPAND_NORMAL);
8382 goto binop3;
8383 }
8384 }
8385 /* Check for a multiplication with matching signedness. */
8386 else if ((TREE_CODE (treeop1) == INTEGER_CST
8387 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8388 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8389 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8390 {
8391 tree op0type = TREE_TYPE (treeop0);
8392 enum machine_mode innermode = TYPE_MODE (op0type);
8393 bool zextend_p = TYPE_UNSIGNED (op0type);
8394 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8395 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8396
8397 if (TREE_CODE (treeop0) != INTEGER_CST)
8398 {
8399 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8400 != CODE_FOR_nothing)
8401 {
8402 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8403 EXPAND_NORMAL);
8404 temp = expand_widening_mult (mode, op0, op1, target,
8405 unsignedp, this_optab);
8406 return REDUCE_BIT_FIELD (temp);
8407 }
8408 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8409 != CODE_FOR_nothing
8410 && innermode == word_mode)
8411 {
8412 rtx htem, hipart;
8413 op0 = expand_normal (treeop0);
8414 if (TREE_CODE (treeop1) == INTEGER_CST)
8415 op1 = convert_modes (innermode, mode,
8416 expand_normal (treeop1), unsignedp);
8417 else
8418 op1 = expand_normal (treeop1);
8419 temp = expand_binop (mode, other_optab, op0, op1, target,
8420 unsignedp, OPTAB_LIB_WIDEN);
8421 hipart = gen_highpart (innermode, temp);
8422 htem = expand_mult_highpart_adjust (innermode, hipart,
8423 op0, op1, hipart,
8424 zextend_p);
8425 if (htem != hipart)
8426 emit_move_insn (hipart, htem);
8427 return REDUCE_BIT_FIELD (temp);
8428 }
8429 }
8430 }
8431 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8432 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8433 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8434 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8435
8436 case FMA_EXPR:
8437 {
8438 optab opt = fma_optab;
8439 gimple def0, def2;
8440
8441 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8442 call. */
8443 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8444 {
8445 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8446 tree call_expr;
8447
8448 gcc_assert (fn != NULL_TREE);
8449 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8450 return expand_builtin (call_expr, target, subtarget, mode, false);
8451 }
8452
8453 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8454 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8455
8456 op0 = op2 = NULL;
8457
8458 if (def0 && def2
8459 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8460 {
8461 opt = fnms_optab;
8462 op0 = expand_normal (gimple_assign_rhs1 (def0));
8463 op2 = expand_normal (gimple_assign_rhs1 (def2));
8464 }
8465 else if (def0
8466 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8467 {
8468 opt = fnma_optab;
8469 op0 = expand_normal (gimple_assign_rhs1 (def0));
8470 }
8471 else if (def2
8472 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8473 {
8474 opt = fms_optab;
8475 op2 = expand_normal (gimple_assign_rhs1 (def2));
8476 }
8477
8478 if (op0 == NULL)
8479 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8480 if (op2 == NULL)
8481 op2 = expand_normal (treeop2);
8482 op1 = expand_normal (treeop1);
8483
8484 return expand_ternary_op (TYPE_MODE (type), opt,
8485 op0, op1, op2, target, 0);
8486 }
8487
8488 case MULT_EXPR:
8489 /* If this is a fixed-point operation, then we cannot use the code
8490 below because "expand_mult" doesn't support sat/no-sat fixed-point
8491 multiplications. */
8492 if (ALL_FIXED_POINT_MODE_P (mode))
8493 goto binop;
8494
8495 /* If first operand is constant, swap them.
8496 Thus the following special case checks need only
8497 check the second operand. */
8498 if (TREE_CODE (treeop0) == INTEGER_CST)
8499 {
8500 tree t1 = treeop0;
8501 treeop0 = treeop1;
8502 treeop1 = t1;
8503 }
8504
8505 /* Attempt to return something suitable for generating an
8506 indexed address, for machines that support that. */
8507
8508 if (modifier == EXPAND_SUM && mode == ptr_mode
8509 && host_integerp (treeop1, 0))
8510 {
8511 tree exp1 = treeop1;
8512
8513 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8514 EXPAND_SUM);
8515
8516 if (!REG_P (op0))
8517 op0 = force_operand (op0, NULL_RTX);
8518 if (!REG_P (op0))
8519 op0 = copy_to_mode_reg (mode, op0);
8520
8521 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8522 gen_int_mode (tree_low_cst (exp1, 0),
8523 TYPE_MODE (TREE_TYPE (exp1)))));
8524 }
8525
8526 if (modifier == EXPAND_STACK_PARM)
8527 target = 0;
8528
8529 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8530 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8531
8532 case TRUNC_DIV_EXPR:
8533 case FLOOR_DIV_EXPR:
8534 case CEIL_DIV_EXPR:
8535 case ROUND_DIV_EXPR:
8536 case EXACT_DIV_EXPR:
8537 /* If this is a fixed-point operation, then we cannot use the code
8538 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8539 divisions. */
8540 if (ALL_FIXED_POINT_MODE_P (mode))
8541 goto binop;
8542
8543 if (modifier == EXPAND_STACK_PARM)
8544 target = 0;
8545 /* Possible optimization: compute the dividend with EXPAND_SUM
8546 then if the divisor is constant can optimize the case
8547 where some terms of the dividend have coeffs divisible by it. */
8548 expand_operands (treeop0, treeop1,
8549 subtarget, &op0, &op1, EXPAND_NORMAL);
8550 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8551
8552 case RDIV_EXPR:
8553 goto binop;
8554
8555 case TRUNC_MOD_EXPR:
8556 case FLOOR_MOD_EXPR:
8557 case CEIL_MOD_EXPR:
8558 case ROUND_MOD_EXPR:
8559 if (modifier == EXPAND_STACK_PARM)
8560 target = 0;
8561 expand_operands (treeop0, treeop1,
8562 subtarget, &op0, &op1, EXPAND_NORMAL);
8563 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8564
8565 case FIXED_CONVERT_EXPR:
8566 op0 = expand_normal (treeop0);
8567 if (target == 0 || modifier == EXPAND_STACK_PARM)
8568 target = gen_reg_rtx (mode);
8569
8570 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8571 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8572 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8573 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8574 else
8575 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8576 return target;
8577
8578 case FIX_TRUNC_EXPR:
8579 op0 = expand_normal (treeop0);
8580 if (target == 0 || modifier == EXPAND_STACK_PARM)
8581 target = gen_reg_rtx (mode);
8582 expand_fix (target, op0, unsignedp);
8583 return target;
8584
8585 case FLOAT_EXPR:
8586 op0 = expand_normal (treeop0);
8587 if (target == 0 || modifier == EXPAND_STACK_PARM)
8588 target = gen_reg_rtx (mode);
8589 /* expand_float can't figure out what to do if FROM has VOIDmode.
8590 So give it the correct mode. With -O, cse will optimize this. */
8591 if (GET_MODE (op0) == VOIDmode)
8592 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8593 op0);
8594 expand_float (target, op0,
8595 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8596 return target;
8597
8598 case NEGATE_EXPR:
8599 op0 = expand_expr (treeop0, subtarget,
8600 VOIDmode, EXPAND_NORMAL);
8601 if (modifier == EXPAND_STACK_PARM)
8602 target = 0;
8603 temp = expand_unop (mode,
8604 optab_for_tree_code (NEGATE_EXPR, type,
8605 optab_default),
8606 op0, target, 0);
8607 gcc_assert (temp);
8608 return REDUCE_BIT_FIELD (temp);
8609
8610 case ABS_EXPR:
8611 op0 = expand_expr (treeop0, subtarget,
8612 VOIDmode, EXPAND_NORMAL);
8613 if (modifier == EXPAND_STACK_PARM)
8614 target = 0;
8615
8616 /* ABS_EXPR is not valid for complex arguments. */
8617 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8618 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8619
8620 /* Unsigned abs is simply the operand. Testing here means we don't
8621 risk generating incorrect code below. */
8622 if (TYPE_UNSIGNED (type))
8623 return op0;
8624
8625 return expand_abs (mode, op0, target, unsignedp,
8626 safe_from_p (target, treeop0, 1));
8627
8628 case MAX_EXPR:
8629 case MIN_EXPR:
8630 target = original_target;
8631 if (target == 0
8632 || modifier == EXPAND_STACK_PARM
8633 || (MEM_P (target) && MEM_VOLATILE_P (target))
8634 || GET_MODE (target) != mode
8635 || (REG_P (target)
8636 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8637 target = gen_reg_rtx (mode);
8638 expand_operands (treeop0, treeop1,
8639 target, &op0, &op1, EXPAND_NORMAL);
8640
8641 /* First try to do it with a special MIN or MAX instruction.
8642 If that does not win, use a conditional jump to select the proper
8643 value. */
8644 this_optab = optab_for_tree_code (code, type, optab_default);
8645 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8646 OPTAB_WIDEN);
8647 if (temp != 0)
8648 return temp;
8649
8650 /* At this point, a MEM target is no longer useful; we will get better
8651 code without it. */
8652
8653 if (! REG_P (target))
8654 target = gen_reg_rtx (mode);
8655
8656 /* If op1 was placed in target, swap op0 and op1. */
8657 if (target != op0 && target == op1)
8658 {
8659 temp = op0;
8660 op0 = op1;
8661 op1 = temp;
8662 }
8663
8664 /* We generate better code and avoid problems with op1 mentioning
8665 target by forcing op1 into a pseudo if it isn't a constant. */
8666 if (! CONSTANT_P (op1))
8667 op1 = force_reg (mode, op1);
8668
8669 {
8670 enum rtx_code comparison_code;
8671 rtx cmpop1 = op1;
8672
8673 if (code == MAX_EXPR)
8674 comparison_code = unsignedp ? GEU : GE;
8675 else
8676 comparison_code = unsignedp ? LEU : LE;
8677
8678 /* Canonicalize to comparisons against 0. */
8679 if (op1 == const1_rtx)
8680 {
8681 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8682 or (a != 0 ? a : 1) for unsigned.
8683 For MIN we are safe converting (a <= 1 ? a : 1)
8684 into (a <= 0 ? a : 1) */
8685 cmpop1 = const0_rtx;
8686 if (code == MAX_EXPR)
8687 comparison_code = unsignedp ? NE : GT;
8688 }
8689 if (op1 == constm1_rtx && !unsignedp)
8690 {
8691 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8692 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8693 cmpop1 = const0_rtx;
8694 if (code == MIN_EXPR)
8695 comparison_code = LT;
8696 }
8697 #ifdef HAVE_conditional_move
8698 /* Use a conditional move if possible. */
8699 if (can_conditionally_move_p (mode))
8700 {
8701 rtx insn;
8702
8703 /* ??? Same problem as in expmed.c: emit_conditional_move
8704 forces a stack adjustment via compare_from_rtx, and we
8705 lose the stack adjustment if the sequence we are about
8706 to create is discarded. */
8707 do_pending_stack_adjust ();
8708
8709 start_sequence ();
8710
8711 /* Try to emit the conditional move. */
8712 insn = emit_conditional_move (target, comparison_code,
8713 op0, cmpop1, mode,
8714 op0, op1, mode,
8715 unsignedp);
8716
8717 /* If we could do the conditional move, emit the sequence,
8718 and return. */
8719 if (insn)
8720 {
8721 rtx seq = get_insns ();
8722 end_sequence ();
8723 emit_insn (seq);
8724 return target;
8725 }
8726
8727 /* Otherwise discard the sequence and fall back to code with
8728 branches. */
8729 end_sequence ();
8730 }
8731 #endif
8732 if (target != op0)
8733 emit_move_insn (target, op0);
8734
8735 temp = gen_label_rtx ();
8736 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8737 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8738 -1);
8739 }
8740 emit_move_insn (target, op1);
8741 emit_label (temp);
8742 return target;
8743
8744 case BIT_NOT_EXPR:
8745 op0 = expand_expr (treeop0, subtarget,
8746 VOIDmode, EXPAND_NORMAL);
8747 if (modifier == EXPAND_STACK_PARM)
8748 target = 0;
8749 /* In case we have to reduce the result to bitfield precision
8750 for unsigned bitfield expand this as XOR with a proper constant
8751 instead. */
8752 if (reduce_bit_field && TYPE_UNSIGNED (type))
8753 temp = expand_binop (mode, xor_optab, op0,
8754 immed_double_int_const
8755 (double_int_mask (TYPE_PRECISION (type)), mode),
8756 target, 1, OPTAB_LIB_WIDEN);
8757 else
8758 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8759 gcc_assert (temp);
8760 return temp;
8761
8762 /* ??? Can optimize bitwise operations with one arg constant.
8763 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8764 and (a bitwise1 b) bitwise2 b (etc)
8765 but that is probably not worth while. */
8766
8767 case BIT_AND_EXPR:
8768 case BIT_IOR_EXPR:
8769 case BIT_XOR_EXPR:
8770 goto binop;
8771
8772 case LROTATE_EXPR:
8773 case RROTATE_EXPR:
8774 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8775 || (GET_MODE_PRECISION (TYPE_MODE (type))
8776 == TYPE_PRECISION (type)));
8777 /* fall through */
8778
8779 case LSHIFT_EXPR:
8780 case RSHIFT_EXPR:
8781 /* If this is a fixed-point operation, then we cannot use the code
8782 below because "expand_shift" doesn't support sat/no-sat fixed-point
8783 shifts. */
8784 if (ALL_FIXED_POINT_MODE_P (mode))
8785 goto binop;
8786
8787 if (! safe_from_p (subtarget, treeop1, 1))
8788 subtarget = 0;
8789 if (modifier == EXPAND_STACK_PARM)
8790 target = 0;
8791 op0 = expand_expr (treeop0, subtarget,
8792 VOIDmode, EXPAND_NORMAL);
8793 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8794 unsignedp);
8795 if (code == LSHIFT_EXPR)
8796 temp = REDUCE_BIT_FIELD (temp);
8797 return temp;
8798
8799 /* Could determine the answer when only additive constants differ. Also,
8800 the addition of one can be handled by changing the condition. */
8801 case LT_EXPR:
8802 case LE_EXPR:
8803 case GT_EXPR:
8804 case GE_EXPR:
8805 case EQ_EXPR:
8806 case NE_EXPR:
8807 case UNORDERED_EXPR:
8808 case ORDERED_EXPR:
8809 case UNLT_EXPR:
8810 case UNLE_EXPR:
8811 case UNGT_EXPR:
8812 case UNGE_EXPR:
8813 case UNEQ_EXPR:
8814 case LTGT_EXPR:
8815 temp = do_store_flag (ops,
8816 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8817 tmode != VOIDmode ? tmode : mode);
8818 if (temp)
8819 return temp;
8820
8821 /* Use a compare and a jump for BLKmode comparisons, or for function
8822 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8823
8824 if ((target == 0
8825 || modifier == EXPAND_STACK_PARM
8826 || ! safe_from_p (target, treeop0, 1)
8827 || ! safe_from_p (target, treeop1, 1)
8828 /* Make sure we don't have a hard reg (such as function's return
8829 value) live across basic blocks, if not optimizing. */
8830 || (!optimize && REG_P (target)
8831 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8832 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8833
8834 emit_move_insn (target, const0_rtx);
8835
8836 op1 = gen_label_rtx ();
8837 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8838
8839 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8840 emit_move_insn (target, constm1_rtx);
8841 else
8842 emit_move_insn (target, const1_rtx);
8843
8844 emit_label (op1);
8845 return target;
8846
8847 case COMPLEX_EXPR:
8848 /* Get the rtx code of the operands. */
8849 op0 = expand_normal (treeop0);
8850 op1 = expand_normal (treeop1);
8851
8852 if (!target)
8853 target = gen_reg_rtx (TYPE_MODE (type));
8854
8855 /* Move the real (op0) and imaginary (op1) parts to their location. */
8856 write_complex_part (target, op0, false);
8857 write_complex_part (target, op1, true);
8858
8859 return target;
8860
8861 case WIDEN_SUM_EXPR:
8862 {
8863 tree oprnd0 = treeop0;
8864 tree oprnd1 = treeop1;
8865
8866 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8867 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8868 target, unsignedp);
8869 return target;
8870 }
8871
8872 case REDUC_MAX_EXPR:
8873 case REDUC_MIN_EXPR:
8874 case REDUC_PLUS_EXPR:
8875 {
8876 op0 = expand_normal (treeop0);
8877 this_optab = optab_for_tree_code (code, type, optab_default);
8878 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8879 gcc_assert (temp);
8880 return temp;
8881 }
8882
8883 case VEC_LSHIFT_EXPR:
8884 case VEC_RSHIFT_EXPR:
8885 {
8886 target = expand_vec_shift_expr (ops, target);
8887 return target;
8888 }
8889
8890 case VEC_UNPACK_HI_EXPR:
8891 case VEC_UNPACK_LO_EXPR:
8892 {
8893 op0 = expand_normal (treeop0);
8894 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8895 target, unsignedp);
8896 gcc_assert (temp);
8897 return temp;
8898 }
8899
8900 case VEC_UNPACK_FLOAT_HI_EXPR:
8901 case VEC_UNPACK_FLOAT_LO_EXPR:
8902 {
8903 op0 = expand_normal (treeop0);
8904 /* The signedness is determined from input operand. */
8905 temp = expand_widen_pattern_expr
8906 (ops, op0, NULL_RTX, NULL_RTX,
8907 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8908
8909 gcc_assert (temp);
8910 return temp;
8911 }
8912
8913 case VEC_WIDEN_MULT_HI_EXPR:
8914 case VEC_WIDEN_MULT_LO_EXPR:
8915 {
8916 tree oprnd0 = treeop0;
8917 tree oprnd1 = treeop1;
8918
8919 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8920 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8921 target, unsignedp);
8922 gcc_assert (target);
8923 return target;
8924 }
8925
8926 case VEC_WIDEN_LSHIFT_HI_EXPR:
8927 case VEC_WIDEN_LSHIFT_LO_EXPR:
8928 {
8929 tree oprnd0 = treeop0;
8930 tree oprnd1 = treeop1;
8931
8932 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8933 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8934 target, unsignedp);
8935 gcc_assert (target);
8936 return target;
8937 }
8938
8939 case VEC_PACK_TRUNC_EXPR:
8940 case VEC_PACK_SAT_EXPR:
8941 case VEC_PACK_FIX_TRUNC_EXPR:
8942 mode = TYPE_MODE (TREE_TYPE (treeop0));
8943 goto binop;
8944
8945 case VEC_PERM_EXPR:
8946 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
8947 op2 = expand_normal (treeop2);
8948
8949 /* Careful here: if the target doesn't support integral vector modes,
8950 a constant selection vector could wind up smooshed into a normal
8951 integral constant. */
8952 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
8953 {
8954 tree sel_type = TREE_TYPE (treeop2);
8955 enum machine_mode vmode
8956 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
8957 TYPE_VECTOR_SUBPARTS (sel_type));
8958 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
8959 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
8960 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
8961 }
8962 else
8963 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
8964
8965 temp = expand_vec_perm (mode, op0, op1, op2, target);
8966 gcc_assert (temp);
8967 return temp;
8968
8969 case DOT_PROD_EXPR:
8970 {
8971 tree oprnd0 = treeop0;
8972 tree oprnd1 = treeop1;
8973 tree oprnd2 = treeop2;
8974 rtx op2;
8975
8976 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8977 op2 = expand_normal (oprnd2);
8978 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8979 target, unsignedp);
8980 return target;
8981 }
8982
8983 case REALIGN_LOAD_EXPR:
8984 {
8985 tree oprnd0 = treeop0;
8986 tree oprnd1 = treeop1;
8987 tree oprnd2 = treeop2;
8988 rtx op2;
8989
8990 this_optab = optab_for_tree_code (code, type, optab_default);
8991 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8992 op2 = expand_normal (oprnd2);
8993 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8994 target, unsignedp);
8995 gcc_assert (temp);
8996 return temp;
8997 }
8998
8999 case COND_EXPR:
9000 /* A COND_EXPR with its type being VOID_TYPE represents a
9001 conditional jump and is handled in
9002 expand_gimple_cond_expr. */
9003 gcc_assert (!VOID_TYPE_P (type));
9004
9005 /* Note that COND_EXPRs whose type is a structure or union
9006 are required to be constructed to contain assignments of
9007 a temporary variable, so that we can evaluate them here
9008 for side effect only. If type is void, we must do likewise. */
9009
9010 gcc_assert (!TREE_ADDRESSABLE (type)
9011 && !ignore
9012 && TREE_TYPE (treeop1) != void_type_node
9013 && TREE_TYPE (treeop2) != void_type_node);
9014
9015 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9016 if (temp)
9017 return temp;
9018
9019 /* If we are not to produce a result, we have no target. Otherwise,
9020 if a target was specified use it; it will not be used as an
9021 intermediate target unless it is safe. If no target, use a
9022 temporary. */
9023
9024 if (modifier != EXPAND_STACK_PARM
9025 && original_target
9026 && safe_from_p (original_target, treeop0, 1)
9027 && GET_MODE (original_target) == mode
9028 && !MEM_P (original_target))
9029 temp = original_target;
9030 else
9031 temp = assign_temp (type, 0, 0, 1);
9032
9033 do_pending_stack_adjust ();
9034 NO_DEFER_POP;
9035 op0 = gen_label_rtx ();
9036 op1 = gen_label_rtx ();
9037 jumpifnot (treeop0, op0, -1);
9038 store_expr (treeop1, temp,
9039 modifier == EXPAND_STACK_PARM,
9040 false);
9041
9042 emit_jump_insn (gen_jump (op1));
9043 emit_barrier ();
9044 emit_label (op0);
9045 store_expr (treeop2, temp,
9046 modifier == EXPAND_STACK_PARM,
9047 false);
9048
9049 emit_label (op1);
9050 OK_DEFER_POP;
9051 return temp;
9052
9053 case VEC_COND_EXPR:
9054 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9055 return target;
9056
9057 default:
9058 gcc_unreachable ();
9059 }
9060
9061 /* Here to do an ordinary binary operator. */
9062 binop:
9063 expand_operands (treeop0, treeop1,
9064 subtarget, &op0, &op1, EXPAND_NORMAL);
9065 binop2:
9066 this_optab = optab_for_tree_code (code, type, optab_default);
9067 binop3:
9068 if (modifier == EXPAND_STACK_PARM)
9069 target = 0;
9070 temp = expand_binop (mode, this_optab, op0, op1, target,
9071 unsignedp, OPTAB_LIB_WIDEN);
9072 gcc_assert (temp);
9073 /* Bitwise operations do not need bitfield reduction as we expect their
9074 operands being properly truncated. */
9075 if (code == BIT_XOR_EXPR
9076 || code == BIT_AND_EXPR
9077 || code == BIT_IOR_EXPR)
9078 return temp;
9079 return REDUCE_BIT_FIELD (temp);
9080 }
9081 #undef REDUCE_BIT_FIELD
9082
9083 rtx
9084 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
9085 enum expand_modifier modifier, rtx *alt_rtl)
9086 {
9087 rtx op0, op1, temp, decl_rtl;
9088 tree type;
9089 int unsignedp;
9090 enum machine_mode mode;
9091 enum tree_code code = TREE_CODE (exp);
9092 rtx subtarget, original_target;
9093 int ignore;
9094 tree context;
9095 bool reduce_bit_field;
9096 location_t loc = EXPR_LOCATION (exp);
9097 struct separate_ops ops;
9098 tree treeop0, treeop1, treeop2;
9099 tree ssa_name = NULL_TREE;
9100 gimple g;
9101
9102 type = TREE_TYPE (exp);
9103 mode = TYPE_MODE (type);
9104 unsignedp = TYPE_UNSIGNED (type);
9105
9106 treeop0 = treeop1 = treeop2 = NULL_TREE;
9107 if (!VL_EXP_CLASS_P (exp))
9108 switch (TREE_CODE_LENGTH (code))
9109 {
9110 default:
9111 case 3: treeop2 = TREE_OPERAND (exp, 2);
9112 case 2: treeop1 = TREE_OPERAND (exp, 1);
9113 case 1: treeop0 = TREE_OPERAND (exp, 0);
9114 case 0: break;
9115 }
9116 ops.code = code;
9117 ops.type = type;
9118 ops.op0 = treeop0;
9119 ops.op1 = treeop1;
9120 ops.op2 = treeop2;
9121 ops.location = loc;
9122
9123 ignore = (target == const0_rtx
9124 || ((CONVERT_EXPR_CODE_P (code)
9125 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9126 && TREE_CODE (type) == VOID_TYPE));
9127
9128 /* An operation in what may be a bit-field type needs the
9129 result to be reduced to the precision of the bit-field type,
9130 which is narrower than that of the type's mode. */
9131 reduce_bit_field = (!ignore
9132 && INTEGRAL_TYPE_P (type)
9133 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
9134
9135 /* If we are going to ignore this result, we need only do something
9136 if there is a side-effect somewhere in the expression. If there
9137 is, short-circuit the most common cases here. Note that we must
9138 not call expand_expr with anything but const0_rtx in case this
9139 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9140
9141 if (ignore)
9142 {
9143 if (! TREE_SIDE_EFFECTS (exp))
9144 return const0_rtx;
9145
9146 /* Ensure we reference a volatile object even if value is ignored, but
9147 don't do this if all we are doing is taking its address. */
9148 if (TREE_THIS_VOLATILE (exp)
9149 && TREE_CODE (exp) != FUNCTION_DECL
9150 && mode != VOIDmode && mode != BLKmode
9151 && modifier != EXPAND_CONST_ADDRESS)
9152 {
9153 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9154 if (MEM_P (temp))
9155 copy_to_reg (temp);
9156 return const0_rtx;
9157 }
9158
9159 if (TREE_CODE_CLASS (code) == tcc_unary
9160 || code == COMPONENT_REF || code == INDIRECT_REF)
9161 return expand_expr (treeop0, const0_rtx, VOIDmode,
9162 modifier);
9163
9164 else if (TREE_CODE_CLASS (code) == tcc_binary
9165 || TREE_CODE_CLASS (code) == tcc_comparison
9166 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9167 {
9168 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9169 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9170 return const0_rtx;
9171 }
9172 else if (code == BIT_FIELD_REF)
9173 {
9174 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9175 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9176 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
9177 return const0_rtx;
9178 }
9179
9180 target = 0;
9181 }
9182
9183 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9184 target = 0;
9185
9186 /* Use subtarget as the target for operand 0 of a binary operation. */
9187 subtarget = get_subtarget (target);
9188 original_target = target;
9189
9190 switch (code)
9191 {
9192 case LABEL_DECL:
9193 {
9194 tree function = decl_function_context (exp);
9195
9196 temp = label_rtx (exp);
9197 temp = gen_rtx_LABEL_REF (Pmode, temp);
9198
9199 if (function != current_function_decl
9200 && function != 0)
9201 LABEL_REF_NONLOCAL_P (temp) = 1;
9202
9203 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9204 return temp;
9205 }
9206
9207 case SSA_NAME:
9208 /* ??? ivopts calls expander, without any preparation from
9209 out-of-ssa. So fake instructions as if this was an access to the
9210 base variable. This unnecessarily allocates a pseudo, see how we can
9211 reuse it, if partition base vars have it set already. */
9212 if (!currently_expanding_to_rtl)
9213 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
9214 NULL);
9215
9216 g = get_gimple_for_ssa_name (exp);
9217 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9218 if (g == NULL
9219 && modifier == EXPAND_INITIALIZER
9220 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9221 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9222 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9223 g = SSA_NAME_DEF_STMT (exp);
9224 if (g)
9225 {
9226 rtx r = expand_expr_real (gimple_assign_rhs_to_tree (g), target,
9227 tmode, modifier, NULL);
9228 if (REG_P (r) && !REG_EXPR (r))
9229 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9230 return r;
9231 }
9232
9233 ssa_name = exp;
9234 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9235 exp = SSA_NAME_VAR (ssa_name);
9236 goto expand_decl_rtl;
9237
9238 case PARM_DECL:
9239 case VAR_DECL:
9240 /* If a static var's type was incomplete when the decl was written,
9241 but the type is complete now, lay out the decl now. */
9242 if (DECL_SIZE (exp) == 0
9243 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9244 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9245 layout_decl (exp, 0);
9246
9247 /* ... fall through ... */
9248
9249 case FUNCTION_DECL:
9250 case RESULT_DECL:
9251 decl_rtl = DECL_RTL (exp);
9252 expand_decl_rtl:
9253 gcc_assert (decl_rtl);
9254 decl_rtl = copy_rtx (decl_rtl);
9255 /* Record writes to register variables. */
9256 if (modifier == EXPAND_WRITE
9257 && REG_P (decl_rtl)
9258 && HARD_REGISTER_P (decl_rtl))
9259 add_to_hard_reg_set (&crtl->asm_clobbers,
9260 GET_MODE (decl_rtl), REGNO (decl_rtl));
9261
9262 /* Ensure variable marked as used even if it doesn't go through
9263 a parser. If it hasn't be used yet, write out an external
9264 definition. */
9265 TREE_USED (exp) = 1;
9266
9267 /* Show we haven't gotten RTL for this yet. */
9268 temp = 0;
9269
9270 /* Variables inherited from containing functions should have
9271 been lowered by this point. */
9272 context = decl_function_context (exp);
9273 gcc_assert (!context
9274 || context == current_function_decl
9275 || TREE_STATIC (exp)
9276 || DECL_EXTERNAL (exp)
9277 /* ??? C++ creates functions that are not TREE_STATIC. */
9278 || TREE_CODE (exp) == FUNCTION_DECL);
9279
9280 /* This is the case of an array whose size is to be determined
9281 from its initializer, while the initializer is still being parsed.
9282 See expand_decl. */
9283
9284 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9285 temp = validize_mem (decl_rtl);
9286
9287 /* If DECL_RTL is memory, we are in the normal case and the
9288 address is not valid, get the address into a register. */
9289
9290 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9291 {
9292 if (alt_rtl)
9293 *alt_rtl = decl_rtl;
9294 decl_rtl = use_anchored_address (decl_rtl);
9295 if (modifier != EXPAND_CONST_ADDRESS
9296 && modifier != EXPAND_SUM
9297 && !memory_address_addr_space_p (DECL_MODE (exp),
9298 XEXP (decl_rtl, 0),
9299 MEM_ADDR_SPACE (decl_rtl)))
9300 temp = replace_equiv_address (decl_rtl,
9301 copy_rtx (XEXP (decl_rtl, 0)));
9302 }
9303
9304 /* If we got something, return it. But first, set the alignment
9305 if the address is a register. */
9306 if (temp != 0)
9307 {
9308 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9309 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9310
9311 return temp;
9312 }
9313
9314 /* If the mode of DECL_RTL does not match that of the decl,
9315 there are two cases: we are dealing with a BLKmode value
9316 that is returned in a register, or we are dealing with
9317 a promoted value. In the latter case, return a SUBREG
9318 of the wanted mode, but mark it so that we know that it
9319 was already extended. */
9320 if (REG_P (decl_rtl)
9321 && DECL_MODE (exp) != BLKmode
9322 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9323 {
9324 enum machine_mode pmode;
9325
9326 /* Get the signedness to be used for this variable. Ensure we get
9327 the same mode we got when the variable was declared. */
9328 if (code == SSA_NAME
9329 && (g = SSA_NAME_DEF_STMT (ssa_name))
9330 && gimple_code (g) == GIMPLE_CALL)
9331 {
9332 gcc_assert (!gimple_call_internal_p (g));
9333 pmode = promote_function_mode (type, mode, &unsignedp,
9334 gimple_call_fntype (g),
9335 2);
9336 }
9337 else
9338 pmode = promote_decl_mode (exp, &unsignedp);
9339 gcc_assert (GET_MODE (decl_rtl) == pmode);
9340
9341 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9342 SUBREG_PROMOTED_VAR_P (temp) = 1;
9343 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
9344 return temp;
9345 }
9346
9347 return decl_rtl;
9348
9349 case INTEGER_CST:
9350 temp = immed_double_const (TREE_INT_CST_LOW (exp),
9351 TREE_INT_CST_HIGH (exp), mode);
9352
9353 return temp;
9354
9355 case VECTOR_CST:
9356 {
9357 tree tmp = NULL_TREE;
9358 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9359 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9360 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9361 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9362 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9363 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9364 return const_vector_from_tree (exp);
9365 if (GET_MODE_CLASS (mode) == MODE_INT)
9366 {
9367 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9368 if (type_for_mode)
9369 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9370 }
9371 if (!tmp)
9372 {
9373 VEC(constructor_elt,gc) *v;
9374 unsigned i;
9375 v = VEC_alloc (constructor_elt, gc, VECTOR_CST_NELTS (exp));
9376 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
9377 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
9378 tmp = build_constructor (type, v);
9379 }
9380 return expand_expr (tmp, ignore ? const0_rtx : target,
9381 tmode, modifier);
9382 }
9383
9384 case CONST_DECL:
9385 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9386
9387 case REAL_CST:
9388 /* If optimized, generate immediate CONST_DOUBLE
9389 which will be turned into memory by reload if necessary.
9390
9391 We used to force a register so that loop.c could see it. But
9392 this does not allow gen_* patterns to perform optimizations with
9393 the constants. It also produces two insns in cases like "x = 1.0;".
9394 On most machines, floating-point constants are not permitted in
9395 many insns, so we'd end up copying it to a register in any case.
9396
9397 Now, we do the copying in expand_binop, if appropriate. */
9398 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9399 TYPE_MODE (TREE_TYPE (exp)));
9400
9401 case FIXED_CST:
9402 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9403 TYPE_MODE (TREE_TYPE (exp)));
9404
9405 case COMPLEX_CST:
9406 /* Handle evaluating a complex constant in a CONCAT target. */
9407 if (original_target && GET_CODE (original_target) == CONCAT)
9408 {
9409 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9410 rtx rtarg, itarg;
9411
9412 rtarg = XEXP (original_target, 0);
9413 itarg = XEXP (original_target, 1);
9414
9415 /* Move the real and imaginary parts separately. */
9416 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9417 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9418
9419 if (op0 != rtarg)
9420 emit_move_insn (rtarg, op0);
9421 if (op1 != itarg)
9422 emit_move_insn (itarg, op1);
9423
9424 return original_target;
9425 }
9426
9427 /* ... fall through ... */
9428
9429 case STRING_CST:
9430 temp = expand_expr_constant (exp, 1, modifier);
9431
9432 /* temp contains a constant address.
9433 On RISC machines where a constant address isn't valid,
9434 make some insns to get that address into a register. */
9435 if (modifier != EXPAND_CONST_ADDRESS
9436 && modifier != EXPAND_INITIALIZER
9437 && modifier != EXPAND_SUM
9438 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9439 MEM_ADDR_SPACE (temp)))
9440 return replace_equiv_address (temp,
9441 copy_rtx (XEXP (temp, 0)));
9442 return temp;
9443
9444 case SAVE_EXPR:
9445 {
9446 tree val = treeop0;
9447 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
9448
9449 if (!SAVE_EXPR_RESOLVED_P (exp))
9450 {
9451 /* We can indeed still hit this case, typically via builtin
9452 expanders calling save_expr immediately before expanding
9453 something. Assume this means that we only have to deal
9454 with non-BLKmode values. */
9455 gcc_assert (GET_MODE (ret) != BLKmode);
9456
9457 val = build_decl (EXPR_LOCATION (exp),
9458 VAR_DECL, NULL, TREE_TYPE (exp));
9459 DECL_ARTIFICIAL (val) = 1;
9460 DECL_IGNORED_P (val) = 1;
9461 treeop0 = val;
9462 TREE_OPERAND (exp, 0) = treeop0;
9463 SAVE_EXPR_RESOLVED_P (exp) = 1;
9464
9465 if (!CONSTANT_P (ret))
9466 ret = copy_to_reg (ret);
9467 SET_DECL_RTL (val, ret);
9468 }
9469
9470 return ret;
9471 }
9472
9473
9474 case CONSTRUCTOR:
9475 /* If we don't need the result, just ensure we evaluate any
9476 subexpressions. */
9477 if (ignore)
9478 {
9479 unsigned HOST_WIDE_INT idx;
9480 tree value;
9481
9482 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9483 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9484
9485 return const0_rtx;
9486 }
9487
9488 return expand_constructor (exp, target, modifier, false);
9489
9490 case TARGET_MEM_REF:
9491 {
9492 addr_space_t as
9493 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9494 struct mem_address addr;
9495 enum insn_code icode;
9496 unsigned int align;
9497
9498 get_address_description (exp, &addr);
9499 op0 = addr_for_mem_ref (&addr, as, true);
9500 op0 = memory_address_addr_space (mode, op0, as);
9501 temp = gen_rtx_MEM (mode, op0);
9502 set_mem_attributes (temp, exp, 0);
9503 set_mem_addr_space (temp, as);
9504 align = get_object_or_type_alignment (exp);
9505 if (modifier != EXPAND_WRITE
9506 && mode != BLKmode
9507 && align < GET_MODE_ALIGNMENT (mode)
9508 /* If the target does not have special handling for unaligned
9509 loads of mode then it can use regular moves for them. */
9510 && ((icode = optab_handler (movmisalign_optab, mode))
9511 != CODE_FOR_nothing))
9512 {
9513 struct expand_operand ops[2];
9514
9515 /* We've already validated the memory, and we're creating a
9516 new pseudo destination. The predicates really can't fail,
9517 nor can the generator. */
9518 create_output_operand (&ops[0], NULL_RTX, mode);
9519 create_fixed_operand (&ops[1], temp);
9520 expand_insn (icode, 2, ops);
9521 return ops[0].value;
9522 }
9523 return temp;
9524 }
9525
9526 case MEM_REF:
9527 {
9528 addr_space_t as
9529 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9530 enum machine_mode address_mode;
9531 tree base = TREE_OPERAND (exp, 0);
9532 gimple def_stmt;
9533 enum insn_code icode;
9534 unsigned align;
9535 /* Handle expansion of non-aliased memory with non-BLKmode. That
9536 might end up in a register. */
9537 if (mem_ref_refers_to_non_mem_p (exp))
9538 {
9539 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9540 tree bit_offset;
9541 tree bftype;
9542 base = TREE_OPERAND (base, 0);
9543 if (offset == 0
9544 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9545 && (GET_MODE_BITSIZE (DECL_MODE (base))
9546 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9547 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9548 TREE_TYPE (exp), base),
9549 target, tmode, modifier);
9550 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9551 bftype = TREE_TYPE (base);
9552 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9553 bftype = TREE_TYPE (exp);
9554 else
9555 {
9556 temp = assign_stack_temp (DECL_MODE (base),
9557 GET_MODE_SIZE (DECL_MODE (base)),
9558 0);
9559 store_expr (base, temp, 0, false);
9560 temp = adjust_address (temp, BLKmode, offset);
9561 set_mem_size (temp, int_size_in_bytes (TREE_TYPE (exp)));
9562 return temp;
9563 }
9564 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9565 base,
9566 TYPE_SIZE (TREE_TYPE (exp)),
9567 bit_offset),
9568 target, tmode, modifier);
9569 }
9570 address_mode = targetm.addr_space.address_mode (as);
9571 base = TREE_OPERAND (exp, 0);
9572 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9573 {
9574 tree mask = gimple_assign_rhs2 (def_stmt);
9575 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9576 gimple_assign_rhs1 (def_stmt), mask);
9577 TREE_OPERAND (exp, 0) = base;
9578 }
9579 align = get_object_or_type_alignment (exp);
9580 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9581 op0 = memory_address_addr_space (address_mode, op0, as);
9582 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9583 {
9584 rtx off
9585 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9586 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9587 }
9588 op0 = memory_address_addr_space (mode, op0, as);
9589 temp = gen_rtx_MEM (mode, op0);
9590 set_mem_attributes (temp, exp, 0);
9591 set_mem_addr_space (temp, as);
9592 if (TREE_THIS_VOLATILE (exp))
9593 MEM_VOLATILE_P (temp) = 1;
9594 if (modifier != EXPAND_WRITE
9595 && mode != BLKmode
9596 && align < GET_MODE_ALIGNMENT (mode))
9597 {
9598 if ((icode = optab_handler (movmisalign_optab, mode))
9599 != CODE_FOR_nothing)
9600 {
9601 struct expand_operand ops[2];
9602
9603 /* We've already validated the memory, and we're creating a
9604 new pseudo destination. The predicates really can't fail,
9605 nor can the generator. */
9606 create_output_operand (&ops[0], NULL_RTX, mode);
9607 create_fixed_operand (&ops[1], temp);
9608 expand_insn (icode, 2, ops);
9609 return ops[0].value;
9610 }
9611 else if (SLOW_UNALIGNED_ACCESS (mode, align))
9612 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
9613 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
9614 true, (modifier == EXPAND_STACK_PARM
9615 ? NULL_RTX : target),
9616 mode, mode);
9617 }
9618 return temp;
9619 }
9620
9621 case ARRAY_REF:
9622
9623 {
9624 tree array = treeop0;
9625 tree index = treeop1;
9626
9627 /* Fold an expression like: "foo"[2].
9628 This is not done in fold so it won't happen inside &.
9629 Don't fold if this is for wide characters since it's too
9630 difficult to do correctly and this is a very rare case. */
9631
9632 if (modifier != EXPAND_CONST_ADDRESS
9633 && modifier != EXPAND_INITIALIZER
9634 && modifier != EXPAND_MEMORY)
9635 {
9636 tree t = fold_read_from_constant_string (exp);
9637
9638 if (t)
9639 return expand_expr (t, target, tmode, modifier);
9640 }
9641
9642 /* If this is a constant index into a constant array,
9643 just get the value from the array. Handle both the cases when
9644 we have an explicit constructor and when our operand is a variable
9645 that was declared const. */
9646
9647 if (modifier != EXPAND_CONST_ADDRESS
9648 && modifier != EXPAND_INITIALIZER
9649 && modifier != EXPAND_MEMORY
9650 && TREE_CODE (array) == CONSTRUCTOR
9651 && ! TREE_SIDE_EFFECTS (array)
9652 && TREE_CODE (index) == INTEGER_CST)
9653 {
9654 unsigned HOST_WIDE_INT ix;
9655 tree field, value;
9656
9657 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9658 field, value)
9659 if (tree_int_cst_equal (field, index))
9660 {
9661 if (!TREE_SIDE_EFFECTS (value))
9662 return expand_expr (fold (value), target, tmode, modifier);
9663 break;
9664 }
9665 }
9666
9667 else if (optimize >= 1
9668 && modifier != EXPAND_CONST_ADDRESS
9669 && modifier != EXPAND_INITIALIZER
9670 && modifier != EXPAND_MEMORY
9671 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9672 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9673 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9674 && const_value_known_p (array))
9675 {
9676 if (TREE_CODE (index) == INTEGER_CST)
9677 {
9678 tree init = DECL_INITIAL (array);
9679
9680 if (TREE_CODE (init) == CONSTRUCTOR)
9681 {
9682 unsigned HOST_WIDE_INT ix;
9683 tree field, value;
9684
9685 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9686 field, value)
9687 if (tree_int_cst_equal (field, index))
9688 {
9689 if (TREE_SIDE_EFFECTS (value))
9690 break;
9691
9692 if (TREE_CODE (value) == CONSTRUCTOR)
9693 {
9694 /* If VALUE is a CONSTRUCTOR, this
9695 optimization is only useful if
9696 this doesn't store the CONSTRUCTOR
9697 into memory. If it does, it is more
9698 efficient to just load the data from
9699 the array directly. */
9700 rtx ret = expand_constructor (value, target,
9701 modifier, true);
9702 if (ret == NULL_RTX)
9703 break;
9704 }
9705
9706 return expand_expr (fold (value), target, tmode,
9707 modifier);
9708 }
9709 }
9710 else if(TREE_CODE (init) == STRING_CST)
9711 {
9712 tree index1 = index;
9713 tree low_bound = array_ref_low_bound (exp);
9714 index1 = fold_convert_loc (loc, sizetype,
9715 treeop1);
9716
9717 /* Optimize the special-case of a zero lower bound.
9718
9719 We convert the low_bound to sizetype to avoid some problems
9720 with constant folding. (E.g. suppose the lower bound is 1,
9721 and its mode is QI. Without the conversion,l (ARRAY
9722 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9723 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9724
9725 if (! integer_zerop (low_bound))
9726 index1 = size_diffop_loc (loc, index1,
9727 fold_convert_loc (loc, sizetype,
9728 low_bound));
9729
9730 if (0 > compare_tree_int (index1,
9731 TREE_STRING_LENGTH (init)))
9732 {
9733 tree type = TREE_TYPE (TREE_TYPE (init));
9734 enum machine_mode mode = TYPE_MODE (type);
9735
9736 if (GET_MODE_CLASS (mode) == MODE_INT
9737 && GET_MODE_SIZE (mode) == 1)
9738 return gen_int_mode (TREE_STRING_POINTER (init)
9739 [TREE_INT_CST_LOW (index1)],
9740 mode);
9741 }
9742 }
9743 }
9744 }
9745 }
9746 goto normal_inner_ref;
9747
9748 case COMPONENT_REF:
9749 /* If the operand is a CONSTRUCTOR, we can just extract the
9750 appropriate field if it is present. */
9751 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9752 {
9753 unsigned HOST_WIDE_INT idx;
9754 tree field, value;
9755
9756 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9757 idx, field, value)
9758 if (field == treeop1
9759 /* We can normally use the value of the field in the
9760 CONSTRUCTOR. However, if this is a bitfield in
9761 an integral mode that we can fit in a HOST_WIDE_INT,
9762 we must mask only the number of bits in the bitfield,
9763 since this is done implicitly by the constructor. If
9764 the bitfield does not meet either of those conditions,
9765 we can't do this optimization. */
9766 && (! DECL_BIT_FIELD (field)
9767 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9768 && (GET_MODE_PRECISION (DECL_MODE (field))
9769 <= HOST_BITS_PER_WIDE_INT))))
9770 {
9771 if (DECL_BIT_FIELD (field)
9772 && modifier == EXPAND_STACK_PARM)
9773 target = 0;
9774 op0 = expand_expr (value, target, tmode, modifier);
9775 if (DECL_BIT_FIELD (field))
9776 {
9777 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9778 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9779
9780 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9781 {
9782 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9783 op0 = expand_and (imode, op0, op1, target);
9784 }
9785 else
9786 {
9787 int count = GET_MODE_PRECISION (imode) - bitsize;
9788
9789 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9790 target, 0);
9791 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9792 target, 0);
9793 }
9794 }
9795
9796 return op0;
9797 }
9798 }
9799 goto normal_inner_ref;
9800
9801 case BIT_FIELD_REF:
9802 case ARRAY_RANGE_REF:
9803 normal_inner_ref:
9804 {
9805 enum machine_mode mode1, mode2;
9806 HOST_WIDE_INT bitsize, bitpos;
9807 tree offset;
9808 int volatilep = 0, must_force_mem;
9809 bool packedp = false;
9810 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9811 &mode1, &unsignedp, &volatilep, true);
9812 rtx orig_op0, memloc;
9813 bool mem_attrs_from_type = false;
9814
9815 /* If we got back the original object, something is wrong. Perhaps
9816 we are evaluating an expression too early. In any event, don't
9817 infinitely recurse. */
9818 gcc_assert (tem != exp);
9819
9820 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9821 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9822 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9823 packedp = true;
9824
9825 /* If TEM's type is a union of variable size, pass TARGET to the inner
9826 computation, since it will need a temporary and TARGET is known
9827 to have to do. This occurs in unchecked conversion in Ada. */
9828 orig_op0 = op0
9829 = expand_expr (tem,
9830 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9831 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9832 != INTEGER_CST)
9833 && modifier != EXPAND_STACK_PARM
9834 ? target : NULL_RTX),
9835 VOIDmode,
9836 (modifier == EXPAND_INITIALIZER
9837 || modifier == EXPAND_CONST_ADDRESS
9838 || modifier == EXPAND_STACK_PARM)
9839 ? modifier : EXPAND_NORMAL);
9840
9841
9842 /* If the bitfield is volatile, we want to access it in the
9843 field's mode, not the computed mode.
9844 If a MEM has VOIDmode (external with incomplete type),
9845 use BLKmode for it instead. */
9846 if (MEM_P (op0))
9847 {
9848 if (volatilep && flag_strict_volatile_bitfields > 0)
9849 op0 = adjust_address (op0, mode1, 0);
9850 else if (GET_MODE (op0) == VOIDmode)
9851 op0 = adjust_address (op0, BLKmode, 0);
9852 }
9853
9854 mode2
9855 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9856
9857 /* If we have either an offset, a BLKmode result, or a reference
9858 outside the underlying object, we must force it to memory.
9859 Such a case can occur in Ada if we have unchecked conversion
9860 of an expression from a scalar type to an aggregate type or
9861 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9862 passed a partially uninitialized object or a view-conversion
9863 to a larger size. */
9864 must_force_mem = (offset
9865 || mode1 == BLKmode
9866 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9867
9868 /* Handle CONCAT first. */
9869 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9870 {
9871 if (bitpos == 0
9872 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9873 return op0;
9874 if (bitpos == 0
9875 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9876 && bitsize)
9877 {
9878 op0 = XEXP (op0, 0);
9879 mode2 = GET_MODE (op0);
9880 }
9881 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9882 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9883 && bitpos
9884 && bitsize)
9885 {
9886 op0 = XEXP (op0, 1);
9887 bitpos = 0;
9888 mode2 = GET_MODE (op0);
9889 }
9890 else
9891 /* Otherwise force into memory. */
9892 must_force_mem = 1;
9893 }
9894
9895 /* If this is a constant, put it in a register if it is a legitimate
9896 constant and we don't need a memory reference. */
9897 if (CONSTANT_P (op0)
9898 && mode2 != BLKmode
9899 && targetm.legitimate_constant_p (mode2, op0)
9900 && !must_force_mem)
9901 op0 = force_reg (mode2, op0);
9902
9903 /* Otherwise, if this is a constant, try to force it to the constant
9904 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9905 is a legitimate constant. */
9906 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9907 op0 = validize_mem (memloc);
9908
9909 /* Otherwise, if this is a constant or the object is not in memory
9910 and need be, put it there. */
9911 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9912 {
9913 tree nt = build_qualified_type (TREE_TYPE (tem),
9914 (TYPE_QUALS (TREE_TYPE (tem))
9915 | TYPE_QUAL_CONST));
9916 memloc = assign_temp (nt, 1, 1, 1);
9917 emit_move_insn (memloc, op0);
9918 op0 = memloc;
9919 mem_attrs_from_type = true;
9920 }
9921
9922 if (offset)
9923 {
9924 enum machine_mode address_mode;
9925 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9926 EXPAND_SUM);
9927
9928 gcc_assert (MEM_P (op0));
9929
9930 address_mode
9931 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9932 if (GET_MODE (offset_rtx) != address_mode)
9933 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9934
9935 if (GET_MODE (op0) == BLKmode
9936 /* A constant address in OP0 can have VOIDmode, we must
9937 not try to call force_reg in that case. */
9938 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9939 && bitsize != 0
9940 && (bitpos % bitsize) == 0
9941 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9942 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9943 {
9944 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9945 bitpos = 0;
9946 }
9947
9948 op0 = offset_address (op0, offset_rtx,
9949 highest_pow2_factor (offset));
9950 }
9951
9952 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9953 record its alignment as BIGGEST_ALIGNMENT. */
9954 if (MEM_P (op0) && bitpos == 0 && offset != 0
9955 && is_aligning_offset (offset, tem))
9956 set_mem_align (op0, BIGGEST_ALIGNMENT);
9957
9958 /* Don't forget about volatility even if this is a bitfield. */
9959 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9960 {
9961 if (op0 == orig_op0)
9962 op0 = copy_rtx (op0);
9963
9964 MEM_VOLATILE_P (op0) = 1;
9965 }
9966
9967 /* In cases where an aligned union has an unaligned object
9968 as a field, we might be extracting a BLKmode value from
9969 an integer-mode (e.g., SImode) object. Handle this case
9970 by doing the extract into an object as wide as the field
9971 (which we know to be the width of a basic mode), then
9972 storing into memory, and changing the mode to BLKmode. */
9973 if (mode1 == VOIDmode
9974 || REG_P (op0) || GET_CODE (op0) == SUBREG
9975 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9976 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9977 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9978 && modifier != EXPAND_CONST_ADDRESS
9979 && modifier != EXPAND_INITIALIZER)
9980 /* If the field is volatile, we always want an aligned
9981 access. Do this in following two situations:
9982 1. the access is not already naturally
9983 aligned, otherwise "normal" (non-bitfield) volatile fields
9984 become non-addressable.
9985 2. the bitsize is narrower than the access size. Need
9986 to extract bitfields from the access. */
9987 || (volatilep && flag_strict_volatile_bitfields > 0
9988 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0
9989 || (mode1 != BLKmode
9990 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)))
9991 /* If the field isn't aligned enough to fetch as a memref,
9992 fetch it as a bit field. */
9993 || (mode1 != BLKmode
9994 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9995 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9996 || (MEM_P (op0)
9997 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9998 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9999 && ((modifier == EXPAND_CONST_ADDRESS
10000 || modifier == EXPAND_INITIALIZER)
10001 ? STRICT_ALIGNMENT
10002 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
10003 || (bitpos % BITS_PER_UNIT != 0)))
10004 /* If the type and the field are a constant size and the
10005 size of the type isn't the same size as the bitfield,
10006 we must use bitfield operations. */
10007 || (bitsize >= 0
10008 && TYPE_SIZE (TREE_TYPE (exp))
10009 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10010 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
10011 bitsize)))
10012 {
10013 enum machine_mode ext_mode = mode;
10014
10015 if (ext_mode == BLKmode
10016 && ! (target != 0 && MEM_P (op0)
10017 && MEM_P (target)
10018 && bitpos % BITS_PER_UNIT == 0))
10019 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
10020
10021 if (ext_mode == BLKmode)
10022 {
10023 if (target == 0)
10024 target = assign_temp (type, 0, 1, 1);
10025
10026 if (bitsize == 0)
10027 return target;
10028
10029 /* In this case, BITPOS must start at a byte boundary and
10030 TARGET, if specified, must be a MEM. */
10031 gcc_assert (MEM_P (op0)
10032 && (!target || MEM_P (target))
10033 && !(bitpos % BITS_PER_UNIT));
10034
10035 emit_block_move (target,
10036 adjust_address (op0, VOIDmode,
10037 bitpos / BITS_PER_UNIT),
10038 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
10039 / BITS_PER_UNIT),
10040 (modifier == EXPAND_STACK_PARM
10041 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10042
10043 return target;
10044 }
10045
10046 op0 = validize_mem (op0);
10047
10048 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10049 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10050
10051 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
10052 (modifier == EXPAND_STACK_PARM
10053 ? NULL_RTX : target),
10054 ext_mode, ext_mode);
10055
10056 /* If the result is a record type and BITSIZE is narrower than
10057 the mode of OP0, an integral mode, and this is a big endian
10058 machine, we must put the field into the high-order bits. */
10059 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
10060 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
10061 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
10062 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
10063 GET_MODE_BITSIZE (GET_MODE (op0))
10064 - bitsize, op0, 1);
10065
10066 /* If the result type is BLKmode, store the data into a temporary
10067 of the appropriate type, but with the mode corresponding to the
10068 mode for the data we have (op0's mode). It's tempting to make
10069 this a constant type, since we know it's only being stored once,
10070 but that can cause problems if we are taking the address of this
10071 COMPONENT_REF because the MEM of any reference via that address
10072 will have flags corresponding to the type, which will not
10073 necessarily be constant. */
10074 if (mode == BLKmode)
10075 {
10076 rtx new_rtx;
10077
10078 new_rtx = assign_stack_temp_for_type (ext_mode,
10079 GET_MODE_BITSIZE (ext_mode),
10080 0, type);
10081 emit_move_insn (new_rtx, op0);
10082 op0 = copy_rtx (new_rtx);
10083 PUT_MODE (op0, BLKmode);
10084 }
10085
10086 return op0;
10087 }
10088
10089 /* If the result is BLKmode, use that to access the object
10090 now as well. */
10091 if (mode == BLKmode)
10092 mode1 = BLKmode;
10093
10094 /* Get a reference to just this component. */
10095 if (modifier == EXPAND_CONST_ADDRESS
10096 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10097 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
10098 else
10099 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10100
10101 if (op0 == orig_op0)
10102 op0 = copy_rtx (op0);
10103
10104 /* If op0 is a temporary because of forcing to memory, pass only the
10105 type to set_mem_attributes so that the original expression is never
10106 marked as ADDRESSABLE through MEM_EXPR of the temporary. */
10107 if (mem_attrs_from_type)
10108 set_mem_attributes (op0, type, 0);
10109 else
10110 set_mem_attributes (op0, exp, 0);
10111
10112 if (REG_P (XEXP (op0, 0)))
10113 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10114
10115 MEM_VOLATILE_P (op0) |= volatilep;
10116 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
10117 || modifier == EXPAND_CONST_ADDRESS
10118 || modifier == EXPAND_INITIALIZER)
10119 return op0;
10120 else if (target == 0)
10121 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
10122
10123 convert_move (target, op0, unsignedp);
10124 return target;
10125 }
10126
10127 case OBJ_TYPE_REF:
10128 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
10129
10130 case CALL_EXPR:
10131 /* All valid uses of __builtin_va_arg_pack () are removed during
10132 inlining. */
10133 if (CALL_EXPR_VA_ARG_PACK (exp))
10134 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
10135 {
10136 tree fndecl = get_callee_fndecl (exp), attr;
10137
10138 if (fndecl
10139 && (attr = lookup_attribute ("error",
10140 DECL_ATTRIBUTES (fndecl))) != NULL)
10141 error ("%Kcall to %qs declared with attribute error: %s",
10142 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10143 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10144 if (fndecl
10145 && (attr = lookup_attribute ("warning",
10146 DECL_ATTRIBUTES (fndecl))) != NULL)
10147 warning_at (tree_nonartificial_location (exp),
10148 0, "%Kcall to %qs declared with attribute warning: %s",
10149 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10150 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10151
10152 /* Check for a built-in function. */
10153 if (fndecl && DECL_BUILT_IN (fndecl))
10154 {
10155 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
10156 return expand_builtin (exp, target, subtarget, tmode, ignore);
10157 }
10158 }
10159 return expand_call (exp, target, ignore);
10160
10161 case VIEW_CONVERT_EXPR:
10162 op0 = NULL_RTX;
10163
10164 /* If we are converting to BLKmode, try to avoid an intermediate
10165 temporary by fetching an inner memory reference. */
10166 if (mode == BLKmode
10167 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10168 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10169 && handled_component_p (treeop0))
10170 {
10171 enum machine_mode mode1;
10172 HOST_WIDE_INT bitsize, bitpos;
10173 tree offset;
10174 int unsignedp;
10175 int volatilep = 0;
10176 tree tem
10177 = get_inner_reference (treeop0, &bitsize, &bitpos,
10178 &offset, &mode1, &unsignedp, &volatilep,
10179 true);
10180 rtx orig_op0;
10181
10182 /* ??? We should work harder and deal with non-zero offsets. */
10183 if (!offset
10184 && (bitpos % BITS_PER_UNIT) == 0
10185 && bitsize >= 0
10186 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
10187 {
10188 /* See the normal_inner_ref case for the rationale. */
10189 orig_op0
10190 = expand_expr (tem,
10191 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10192 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10193 != INTEGER_CST)
10194 && modifier != EXPAND_STACK_PARM
10195 ? target : NULL_RTX),
10196 VOIDmode,
10197 (modifier == EXPAND_INITIALIZER
10198 || modifier == EXPAND_CONST_ADDRESS
10199 || modifier == EXPAND_STACK_PARM)
10200 ? modifier : EXPAND_NORMAL);
10201
10202 if (MEM_P (orig_op0))
10203 {
10204 op0 = orig_op0;
10205
10206 /* Get a reference to just this component. */
10207 if (modifier == EXPAND_CONST_ADDRESS
10208 || modifier == EXPAND_SUM
10209 || modifier == EXPAND_INITIALIZER)
10210 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
10211 else
10212 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10213
10214 if (op0 == orig_op0)
10215 op0 = copy_rtx (op0);
10216
10217 set_mem_attributes (op0, treeop0, 0);
10218 if (REG_P (XEXP (op0, 0)))
10219 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10220
10221 MEM_VOLATILE_P (op0) |= volatilep;
10222 }
10223 }
10224 }
10225
10226 if (!op0)
10227 op0 = expand_expr (treeop0,
10228 NULL_RTX, VOIDmode, modifier);
10229
10230 /* If the input and output modes are both the same, we are done. */
10231 if (mode == GET_MODE (op0))
10232 ;
10233 /* If neither mode is BLKmode, and both modes are the same size
10234 then we can use gen_lowpart. */
10235 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10236 && (GET_MODE_PRECISION (mode)
10237 == GET_MODE_PRECISION (GET_MODE (op0)))
10238 && !COMPLEX_MODE_P (GET_MODE (op0)))
10239 {
10240 if (GET_CODE (op0) == SUBREG)
10241 op0 = force_reg (GET_MODE (op0), op0);
10242 temp = gen_lowpart_common (mode, op0);
10243 if (temp)
10244 op0 = temp;
10245 else
10246 {
10247 if (!REG_P (op0) && !MEM_P (op0))
10248 op0 = force_reg (GET_MODE (op0), op0);
10249 op0 = gen_lowpart (mode, op0);
10250 }
10251 }
10252 /* If both types are integral, convert from one mode to the other. */
10253 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10254 op0 = convert_modes (mode, GET_MODE (op0), op0,
10255 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10256 /* As a last resort, spill op0 to memory, and reload it in a
10257 different mode. */
10258 else if (!MEM_P (op0))
10259 {
10260 /* If the operand is not a MEM, force it into memory. Since we
10261 are going to be changing the mode of the MEM, don't call
10262 force_const_mem for constants because we don't allow pool
10263 constants to change mode. */
10264 tree inner_type = TREE_TYPE (treeop0);
10265
10266 gcc_assert (!TREE_ADDRESSABLE (exp));
10267
10268 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10269 target
10270 = assign_stack_temp_for_type
10271 (TYPE_MODE (inner_type),
10272 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
10273
10274 emit_move_insn (target, op0);
10275 op0 = target;
10276 }
10277
10278 /* At this point, OP0 is in the correct mode. If the output type is
10279 such that the operand is known to be aligned, indicate that it is.
10280 Otherwise, we need only be concerned about alignment for non-BLKmode
10281 results. */
10282 if (MEM_P (op0))
10283 {
10284 enum insn_code icode;
10285
10286 op0 = copy_rtx (op0);
10287
10288 if (TYPE_ALIGN_OK (type))
10289 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10290 else if (mode != BLKmode
10291 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)
10292 /* If the target does have special handling for unaligned
10293 loads of mode then use them. */
10294 && ((icode = optab_handler (movmisalign_optab, mode))
10295 != CODE_FOR_nothing))
10296 {
10297 rtx reg, insn;
10298
10299 op0 = adjust_address (op0, mode, 0);
10300 /* We've already validated the memory, and we're creating a
10301 new pseudo destination. The predicates really can't
10302 fail. */
10303 reg = gen_reg_rtx (mode);
10304
10305 /* Nor can the insn generator. */
10306 insn = GEN_FCN (icode) (reg, op0);
10307 emit_insn (insn);
10308 return reg;
10309 }
10310 else if (STRICT_ALIGNMENT
10311 && mode != BLKmode
10312 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10313 {
10314 tree inner_type = TREE_TYPE (treeop0);
10315 HOST_WIDE_INT temp_size
10316 = MAX (int_size_in_bytes (inner_type),
10317 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10318 rtx new_rtx
10319 = assign_stack_temp_for_type (mode, temp_size, 0, type);
10320 rtx new_with_op0_mode
10321 = adjust_address (new_rtx, GET_MODE (op0), 0);
10322
10323 gcc_assert (!TREE_ADDRESSABLE (exp));
10324
10325 if (GET_MODE (op0) == BLKmode)
10326 emit_block_move (new_with_op0_mode, op0,
10327 GEN_INT (GET_MODE_SIZE (mode)),
10328 (modifier == EXPAND_STACK_PARM
10329 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10330 else
10331 emit_move_insn (new_with_op0_mode, op0);
10332
10333 op0 = new_rtx;
10334 }
10335
10336 op0 = adjust_address (op0, mode, 0);
10337 }
10338
10339 return op0;
10340
10341 case MODIFY_EXPR:
10342 {
10343 tree lhs = treeop0;
10344 tree rhs = treeop1;
10345 gcc_assert (ignore);
10346
10347 /* Check for |= or &= of a bitfield of size one into another bitfield
10348 of size 1. In this case, (unless we need the result of the
10349 assignment) we can do this more efficiently with a
10350 test followed by an assignment, if necessary.
10351
10352 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10353 things change so we do, this code should be enhanced to
10354 support it. */
10355 if (TREE_CODE (lhs) == COMPONENT_REF
10356 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10357 || TREE_CODE (rhs) == BIT_AND_EXPR)
10358 && TREE_OPERAND (rhs, 0) == lhs
10359 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10360 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10361 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10362 {
10363 rtx label = gen_label_rtx ();
10364 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10365 do_jump (TREE_OPERAND (rhs, 1),
10366 value ? label : 0,
10367 value ? 0 : label, -1);
10368 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10369 MOVE_NONTEMPORAL (exp));
10370 do_pending_stack_adjust ();
10371 emit_label (label);
10372 return const0_rtx;
10373 }
10374
10375 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
10376 return const0_rtx;
10377 }
10378
10379 case ADDR_EXPR:
10380 return expand_expr_addr_expr (exp, target, tmode, modifier);
10381
10382 case REALPART_EXPR:
10383 op0 = expand_normal (treeop0);
10384 return read_complex_part (op0, false);
10385
10386 case IMAGPART_EXPR:
10387 op0 = expand_normal (treeop0);
10388 return read_complex_part (op0, true);
10389
10390 case RETURN_EXPR:
10391 case LABEL_EXPR:
10392 case GOTO_EXPR:
10393 case SWITCH_EXPR:
10394 case ASM_EXPR:
10395 /* Expanded in cfgexpand.c. */
10396 gcc_unreachable ();
10397
10398 case TRY_CATCH_EXPR:
10399 case CATCH_EXPR:
10400 case EH_FILTER_EXPR:
10401 case TRY_FINALLY_EXPR:
10402 /* Lowered by tree-eh.c. */
10403 gcc_unreachable ();
10404
10405 case WITH_CLEANUP_EXPR:
10406 case CLEANUP_POINT_EXPR:
10407 case TARGET_EXPR:
10408 case CASE_LABEL_EXPR:
10409 case VA_ARG_EXPR:
10410 case BIND_EXPR:
10411 case INIT_EXPR:
10412 case CONJ_EXPR:
10413 case COMPOUND_EXPR:
10414 case PREINCREMENT_EXPR:
10415 case PREDECREMENT_EXPR:
10416 case POSTINCREMENT_EXPR:
10417 case POSTDECREMENT_EXPR:
10418 case LOOP_EXPR:
10419 case EXIT_EXPR:
10420 /* Lowered by gimplify.c. */
10421 gcc_unreachable ();
10422
10423 case FDESC_EXPR:
10424 /* Function descriptors are not valid except for as
10425 initialization constants, and should not be expanded. */
10426 gcc_unreachable ();
10427
10428 case WITH_SIZE_EXPR:
10429 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10430 have pulled out the size to use in whatever context it needed. */
10431 return expand_expr_real (treeop0, original_target, tmode,
10432 modifier, alt_rtl);
10433
10434 case COMPOUND_LITERAL_EXPR:
10435 {
10436 /* Initialize the anonymous variable declared in the compound
10437 literal, then return the variable. */
10438 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
10439
10440 /* Create RTL for this variable. */
10441 if (!DECL_RTL_SET_P (decl))
10442 {
10443 if (DECL_HARD_REGISTER (decl))
10444 /* The user specified an assembler name for this variable.
10445 Set that up now. */
10446 rest_of_decl_compilation (decl, 0, 0);
10447 else
10448 expand_decl (decl);
10449 }
10450
10451 return expand_expr_real (decl, original_target, tmode,
10452 modifier, alt_rtl);
10453 }
10454
10455 default:
10456 return expand_expr_real_2 (&ops, target, tmode, modifier);
10457 }
10458 }
10459 \f
10460 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10461 signedness of TYPE), possibly returning the result in TARGET. */
10462 static rtx
10463 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10464 {
10465 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10466 if (target && GET_MODE (target) != GET_MODE (exp))
10467 target = 0;
10468 /* For constant values, reduce using build_int_cst_type. */
10469 if (CONST_INT_P (exp))
10470 {
10471 HOST_WIDE_INT value = INTVAL (exp);
10472 tree t = build_int_cst_type (type, value);
10473 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10474 }
10475 else if (TYPE_UNSIGNED (type))
10476 {
10477 rtx mask = immed_double_int_const (double_int_mask (prec),
10478 GET_MODE (exp));
10479 return expand_and (GET_MODE (exp), exp, mask, target);
10480 }
10481 else
10482 {
10483 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10484 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10485 exp, count, target, 0);
10486 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10487 exp, count, target, 0);
10488 }
10489 }
10490 \f
10491 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10492 when applied to the address of EXP produces an address known to be
10493 aligned more than BIGGEST_ALIGNMENT. */
10494
10495 static int
10496 is_aligning_offset (const_tree offset, const_tree exp)
10497 {
10498 /* Strip off any conversions. */
10499 while (CONVERT_EXPR_P (offset))
10500 offset = TREE_OPERAND (offset, 0);
10501
10502 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10503 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10504 if (TREE_CODE (offset) != BIT_AND_EXPR
10505 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10506 || compare_tree_int (TREE_OPERAND (offset, 1),
10507 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10508 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10509 return 0;
10510
10511 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10512 It must be NEGATE_EXPR. Then strip any more conversions. */
10513 offset = TREE_OPERAND (offset, 0);
10514 while (CONVERT_EXPR_P (offset))
10515 offset = TREE_OPERAND (offset, 0);
10516
10517 if (TREE_CODE (offset) != NEGATE_EXPR)
10518 return 0;
10519
10520 offset = TREE_OPERAND (offset, 0);
10521 while (CONVERT_EXPR_P (offset))
10522 offset = TREE_OPERAND (offset, 0);
10523
10524 /* This must now be the address of EXP. */
10525 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10526 }
10527 \f
10528 /* Return the tree node if an ARG corresponds to a string constant or zero
10529 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10530 in bytes within the string that ARG is accessing. The type of the
10531 offset will be `sizetype'. */
10532
10533 tree
10534 string_constant (tree arg, tree *ptr_offset)
10535 {
10536 tree array, offset, lower_bound;
10537 STRIP_NOPS (arg);
10538
10539 if (TREE_CODE (arg) == ADDR_EXPR)
10540 {
10541 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10542 {
10543 *ptr_offset = size_zero_node;
10544 return TREE_OPERAND (arg, 0);
10545 }
10546 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10547 {
10548 array = TREE_OPERAND (arg, 0);
10549 offset = size_zero_node;
10550 }
10551 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10552 {
10553 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10554 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10555 if (TREE_CODE (array) != STRING_CST
10556 && TREE_CODE (array) != VAR_DECL)
10557 return 0;
10558
10559 /* Check if the array has a nonzero lower bound. */
10560 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10561 if (!integer_zerop (lower_bound))
10562 {
10563 /* If the offset and base aren't both constants, return 0. */
10564 if (TREE_CODE (lower_bound) != INTEGER_CST)
10565 return 0;
10566 if (TREE_CODE (offset) != INTEGER_CST)
10567 return 0;
10568 /* Adjust offset by the lower bound. */
10569 offset = size_diffop (fold_convert (sizetype, offset),
10570 fold_convert (sizetype, lower_bound));
10571 }
10572 }
10573 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10574 {
10575 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10576 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10577 if (TREE_CODE (array) != ADDR_EXPR)
10578 return 0;
10579 array = TREE_OPERAND (array, 0);
10580 if (TREE_CODE (array) != STRING_CST
10581 && TREE_CODE (array) != VAR_DECL)
10582 return 0;
10583 }
10584 else
10585 return 0;
10586 }
10587 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10588 {
10589 tree arg0 = TREE_OPERAND (arg, 0);
10590 tree arg1 = TREE_OPERAND (arg, 1);
10591
10592 STRIP_NOPS (arg0);
10593 STRIP_NOPS (arg1);
10594
10595 if (TREE_CODE (arg0) == ADDR_EXPR
10596 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10597 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10598 {
10599 array = TREE_OPERAND (arg0, 0);
10600 offset = arg1;
10601 }
10602 else if (TREE_CODE (arg1) == ADDR_EXPR
10603 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10604 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10605 {
10606 array = TREE_OPERAND (arg1, 0);
10607 offset = arg0;
10608 }
10609 else
10610 return 0;
10611 }
10612 else
10613 return 0;
10614
10615 if (TREE_CODE (array) == STRING_CST)
10616 {
10617 *ptr_offset = fold_convert (sizetype, offset);
10618 return array;
10619 }
10620 else if (TREE_CODE (array) == VAR_DECL
10621 || TREE_CODE (array) == CONST_DECL)
10622 {
10623 int length;
10624
10625 /* Variables initialized to string literals can be handled too. */
10626 if (!const_value_known_p (array)
10627 || !DECL_INITIAL (array)
10628 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10629 return 0;
10630
10631 /* Avoid const char foo[4] = "abcde"; */
10632 if (DECL_SIZE_UNIT (array) == NULL_TREE
10633 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10634 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10635 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10636 return 0;
10637
10638 /* If variable is bigger than the string literal, OFFSET must be constant
10639 and inside of the bounds of the string literal. */
10640 offset = fold_convert (sizetype, offset);
10641 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10642 && (! host_integerp (offset, 1)
10643 || compare_tree_int (offset, length) >= 0))
10644 return 0;
10645
10646 *ptr_offset = offset;
10647 return DECL_INITIAL (array);
10648 }
10649
10650 return 0;
10651 }
10652 \f
10653 /* Generate code to calculate OPS, and exploded expression
10654 using a store-flag instruction and return an rtx for the result.
10655 OPS reflects a comparison.
10656
10657 If TARGET is nonzero, store the result there if convenient.
10658
10659 Return zero if there is no suitable set-flag instruction
10660 available on this machine.
10661
10662 Once expand_expr has been called on the arguments of the comparison,
10663 we are committed to doing the store flag, since it is not safe to
10664 re-evaluate the expression. We emit the store-flag insn by calling
10665 emit_store_flag, but only expand the arguments if we have a reason
10666 to believe that emit_store_flag will be successful. If we think that
10667 it will, but it isn't, we have to simulate the store-flag with a
10668 set/jump/set sequence. */
10669
10670 static rtx
10671 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10672 {
10673 enum rtx_code code;
10674 tree arg0, arg1, type;
10675 tree tem;
10676 enum machine_mode operand_mode;
10677 int unsignedp;
10678 rtx op0, op1;
10679 rtx subtarget = target;
10680 location_t loc = ops->location;
10681
10682 arg0 = ops->op0;
10683 arg1 = ops->op1;
10684
10685 /* Don't crash if the comparison was erroneous. */
10686 if (arg0 == error_mark_node || arg1 == error_mark_node)
10687 return const0_rtx;
10688
10689 type = TREE_TYPE (arg0);
10690 operand_mode = TYPE_MODE (type);
10691 unsignedp = TYPE_UNSIGNED (type);
10692
10693 /* We won't bother with BLKmode store-flag operations because it would mean
10694 passing a lot of information to emit_store_flag. */
10695 if (operand_mode == BLKmode)
10696 return 0;
10697
10698 /* We won't bother with store-flag operations involving function pointers
10699 when function pointers must be canonicalized before comparisons. */
10700 #ifdef HAVE_canonicalize_funcptr_for_compare
10701 if (HAVE_canonicalize_funcptr_for_compare
10702 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10703 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10704 == FUNCTION_TYPE))
10705 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10706 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10707 == FUNCTION_TYPE))))
10708 return 0;
10709 #endif
10710
10711 STRIP_NOPS (arg0);
10712 STRIP_NOPS (arg1);
10713
10714 /* For vector typed comparisons emit code to generate the desired
10715 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10716 expander for this. */
10717 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10718 {
10719 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10720 tree if_true = constant_boolean_node (true, ops->type);
10721 tree if_false = constant_boolean_node (false, ops->type);
10722 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10723 }
10724
10725 /* For vector typed comparisons emit code to generate the desired
10726 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10727 expander for this. */
10728 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10729 {
10730 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10731 tree if_true = constant_boolean_node (true, ops->type);
10732 tree if_false = constant_boolean_node (false, ops->type);
10733 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10734 }
10735
10736 /* Get the rtx comparison code to use. We know that EXP is a comparison
10737 operation of some type. Some comparisons against 1 and -1 can be
10738 converted to comparisons with zero. Do so here so that the tests
10739 below will be aware that we have a comparison with zero. These
10740 tests will not catch constants in the first operand, but constants
10741 are rarely passed as the first operand. */
10742
10743 switch (ops->code)
10744 {
10745 case EQ_EXPR:
10746 code = EQ;
10747 break;
10748 case NE_EXPR:
10749 code = NE;
10750 break;
10751 case LT_EXPR:
10752 if (integer_onep (arg1))
10753 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10754 else
10755 code = unsignedp ? LTU : LT;
10756 break;
10757 case LE_EXPR:
10758 if (! unsignedp && integer_all_onesp (arg1))
10759 arg1 = integer_zero_node, code = LT;
10760 else
10761 code = unsignedp ? LEU : LE;
10762 break;
10763 case GT_EXPR:
10764 if (! unsignedp && integer_all_onesp (arg1))
10765 arg1 = integer_zero_node, code = GE;
10766 else
10767 code = unsignedp ? GTU : GT;
10768 break;
10769 case GE_EXPR:
10770 if (integer_onep (arg1))
10771 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10772 else
10773 code = unsignedp ? GEU : GE;
10774 break;
10775
10776 case UNORDERED_EXPR:
10777 code = UNORDERED;
10778 break;
10779 case ORDERED_EXPR:
10780 code = ORDERED;
10781 break;
10782 case UNLT_EXPR:
10783 code = UNLT;
10784 break;
10785 case UNLE_EXPR:
10786 code = UNLE;
10787 break;
10788 case UNGT_EXPR:
10789 code = UNGT;
10790 break;
10791 case UNGE_EXPR:
10792 code = UNGE;
10793 break;
10794 case UNEQ_EXPR:
10795 code = UNEQ;
10796 break;
10797 case LTGT_EXPR:
10798 code = LTGT;
10799 break;
10800
10801 default:
10802 gcc_unreachable ();
10803 }
10804
10805 /* Put a constant second. */
10806 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10807 || TREE_CODE (arg0) == FIXED_CST)
10808 {
10809 tem = arg0; arg0 = arg1; arg1 = tem;
10810 code = swap_condition (code);
10811 }
10812
10813 /* If this is an equality or inequality test of a single bit, we can
10814 do this by shifting the bit being tested to the low-order bit and
10815 masking the result with the constant 1. If the condition was EQ,
10816 we xor it with 1. This does not require an scc insn and is faster
10817 than an scc insn even if we have it.
10818
10819 The code to make this transformation was moved into fold_single_bit_test,
10820 so we just call into the folder and expand its result. */
10821
10822 if ((code == NE || code == EQ)
10823 && integer_zerop (arg1)
10824 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10825 {
10826 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
10827 if (srcstmt
10828 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
10829 {
10830 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
10831 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10832 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
10833 gimple_assign_rhs1 (srcstmt),
10834 gimple_assign_rhs2 (srcstmt));
10835 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
10836 if (temp)
10837 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
10838 }
10839 }
10840
10841 if (! get_subtarget (target)
10842 || GET_MODE (subtarget) != operand_mode)
10843 subtarget = 0;
10844
10845 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10846
10847 if (target == 0)
10848 target = gen_reg_rtx (mode);
10849
10850 /* Try a cstore if possible. */
10851 return emit_store_flag_force (target, code, op0, op1,
10852 operand_mode, unsignedp,
10853 (TYPE_PRECISION (ops->type) == 1
10854 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10855 }
10856 \f
10857
10858 /* Stubs in case we haven't got a casesi insn. */
10859 #ifndef HAVE_casesi
10860 # define HAVE_casesi 0
10861 # define gen_casesi(a, b, c, d, e) (0)
10862 # define CODE_FOR_casesi CODE_FOR_nothing
10863 #endif
10864
10865 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10866 0 otherwise (i.e. if there is no casesi instruction). */
10867 int
10868 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10869 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10870 rtx fallback_label ATTRIBUTE_UNUSED)
10871 {
10872 struct expand_operand ops[5];
10873 enum machine_mode index_mode = SImode;
10874 rtx op1, op2, index;
10875
10876 if (! HAVE_casesi)
10877 return 0;
10878
10879 /* Convert the index to SImode. */
10880 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10881 {
10882 enum machine_mode omode = TYPE_MODE (index_type);
10883 rtx rangertx = expand_normal (range);
10884
10885 /* We must handle the endpoints in the original mode. */
10886 index_expr = build2 (MINUS_EXPR, index_type,
10887 index_expr, minval);
10888 minval = integer_zero_node;
10889 index = expand_normal (index_expr);
10890 if (default_label)
10891 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10892 omode, 1, default_label);
10893 /* Now we can safely truncate. */
10894 index = convert_to_mode (index_mode, index, 0);
10895 }
10896 else
10897 {
10898 if (TYPE_MODE (index_type) != index_mode)
10899 {
10900 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
10901 index_expr = fold_convert (index_type, index_expr);
10902 }
10903
10904 index = expand_normal (index_expr);
10905 }
10906
10907 do_pending_stack_adjust ();
10908
10909 op1 = expand_normal (minval);
10910 op2 = expand_normal (range);
10911
10912 create_input_operand (&ops[0], index, index_mode);
10913 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10914 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10915 create_fixed_operand (&ops[3], table_label);
10916 create_fixed_operand (&ops[4], (default_label
10917 ? default_label
10918 : fallback_label));
10919 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10920 return 1;
10921 }
10922
10923 /* Attempt to generate a tablejump instruction; same concept. */
10924 #ifndef HAVE_tablejump
10925 #define HAVE_tablejump 0
10926 #define gen_tablejump(x, y) (0)
10927 #endif
10928
10929 /* Subroutine of the next function.
10930
10931 INDEX is the value being switched on, with the lowest value
10932 in the table already subtracted.
10933 MODE is its expected mode (needed if INDEX is constant).
10934 RANGE is the length of the jump table.
10935 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10936
10937 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10938 index value is out of range. */
10939
10940 static void
10941 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10942 rtx default_label)
10943 {
10944 rtx temp, vector;
10945
10946 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10947 cfun->cfg->max_jumptable_ents = INTVAL (range);
10948
10949 /* Do an unsigned comparison (in the proper mode) between the index
10950 expression and the value which represents the length of the range.
10951 Since we just finished subtracting the lower bound of the range
10952 from the index expression, this comparison allows us to simultaneously
10953 check that the original index expression value is both greater than
10954 or equal to the minimum value of the range and less than or equal to
10955 the maximum value of the range. */
10956
10957 if (default_label)
10958 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10959 default_label);
10960
10961 /* If index is in range, it must fit in Pmode.
10962 Convert to Pmode so we can index with it. */
10963 if (mode != Pmode)
10964 index = convert_to_mode (Pmode, index, 1);
10965
10966 /* Don't let a MEM slip through, because then INDEX that comes
10967 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10968 and break_out_memory_refs will go to work on it and mess it up. */
10969 #ifdef PIC_CASE_VECTOR_ADDRESS
10970 if (flag_pic && !REG_P (index))
10971 index = copy_to_mode_reg (Pmode, index);
10972 #endif
10973
10974 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10975 GET_MODE_SIZE, because this indicates how large insns are. The other
10976 uses should all be Pmode, because they are addresses. This code
10977 could fail if addresses and insns are not the same size. */
10978 index = gen_rtx_PLUS (Pmode,
10979 gen_rtx_MULT (Pmode, index,
10980 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10981 gen_rtx_LABEL_REF (Pmode, table_label));
10982 #ifdef PIC_CASE_VECTOR_ADDRESS
10983 if (flag_pic)
10984 index = PIC_CASE_VECTOR_ADDRESS (index);
10985 else
10986 #endif
10987 index = memory_address (CASE_VECTOR_MODE, index);
10988 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10989 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10990 convert_move (temp, vector, 0);
10991
10992 emit_jump_insn (gen_tablejump (temp, table_label));
10993
10994 /* If we are generating PIC code or if the table is PC-relative, the
10995 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10996 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10997 emit_barrier ();
10998 }
10999
11000 int
11001 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
11002 rtx table_label, rtx default_label)
11003 {
11004 rtx index;
11005
11006 if (! HAVE_tablejump)
11007 return 0;
11008
11009 index_expr = fold_build2 (MINUS_EXPR, index_type,
11010 fold_convert (index_type, index_expr),
11011 fold_convert (index_type, minval));
11012 index = expand_normal (index_expr);
11013 do_pending_stack_adjust ();
11014
11015 do_tablejump (index, TYPE_MODE (index_type),
11016 convert_modes (TYPE_MODE (index_type),
11017 TYPE_MODE (TREE_TYPE (range)),
11018 expand_normal (range),
11019 TYPE_UNSIGNED (TREE_TYPE (range))),
11020 table_label, default_label);
11021 return 1;
11022 }
11023
11024 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11025 static rtx
11026 const_vector_from_tree (tree exp)
11027 {
11028 rtvec v;
11029 unsigned i;
11030 int units;
11031 tree elt;
11032 enum machine_mode inner, mode;
11033
11034 mode = TYPE_MODE (TREE_TYPE (exp));
11035
11036 if (initializer_zerop (exp))
11037 return CONST0_RTX (mode);
11038
11039 units = GET_MODE_NUNITS (mode);
11040 inner = GET_MODE_INNER (mode);
11041
11042 v = rtvec_alloc (units);
11043
11044 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
11045 {
11046 elt = VECTOR_CST_ELT (exp, i);
11047
11048 if (TREE_CODE (elt) == REAL_CST)
11049 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
11050 inner);
11051 else if (TREE_CODE (elt) == FIXED_CST)
11052 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
11053 inner);
11054 else
11055 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
11056 inner);
11057 }
11058
11059 return gen_rtx_CONST_VECTOR (mode, v);
11060 }
11061
11062 /* Build a decl for a personality function given a language prefix. */
11063
11064 tree
11065 build_personality_function (const char *lang)
11066 {
11067 const char *unwind_and_version;
11068 tree decl, type;
11069 char *name;
11070
11071 switch (targetm_common.except_unwind_info (&global_options))
11072 {
11073 case UI_NONE:
11074 return NULL;
11075 case UI_SJLJ:
11076 unwind_and_version = "_sj0";
11077 break;
11078 case UI_DWARF2:
11079 case UI_TARGET:
11080 unwind_and_version = "_v0";
11081 break;
11082 default:
11083 gcc_unreachable ();
11084 }
11085
11086 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
11087
11088 type = build_function_type_list (integer_type_node, integer_type_node,
11089 long_long_unsigned_type_node,
11090 ptr_type_node, ptr_type_node, NULL_TREE);
11091 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
11092 get_identifier (name), type);
11093 DECL_ARTIFICIAL (decl) = 1;
11094 DECL_EXTERNAL (decl) = 1;
11095 TREE_PUBLIC (decl) = 1;
11096
11097 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11098 are the flags assigned by targetm.encode_section_info. */
11099 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
11100
11101 return decl;
11102 }
11103
11104 /* Extracts the personality function of DECL and returns the corresponding
11105 libfunc. */
11106
11107 rtx
11108 get_personality_function (tree decl)
11109 {
11110 tree personality = DECL_FUNCTION_PERSONALITY (decl);
11111 enum eh_personality_kind pk;
11112
11113 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
11114 if (pk == eh_personality_none)
11115 return NULL;
11116
11117 if (!personality
11118 && pk == eh_personality_any)
11119 personality = lang_hooks.eh_personality ();
11120
11121 if (pk == eh_personality_lang)
11122 gcc_assert (personality != NULL_TREE);
11123
11124 return XEXP (DECL_RTL (personality), 0);
11125 }
11126
11127 #include "gt-expr.h"