expr.c: Use rtx_insn and rtx_code_label
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2014 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "machmode.h"
25 #include "rtl.h"
26 #include "tree.h"
27 #include "stringpool.h"
28 #include "stor-layout.h"
29 #include "attribs.h"
30 #include "varasm.h"
31 #include "flags.h"
32 #include "regs.h"
33 #include "hard-reg-set.h"
34 #include "except.h"
35 #include "function.h"
36 #include "insn-config.h"
37 #include "insn-attr.h"
38 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
39 #include "expr.h"
40 #include "optabs.h"
41 #include "libfuncs.h"
42 #include "recog.h"
43 #include "reload.h"
44 #include "typeclass.h"
45 #include "toplev.h"
46 #include "langhooks.h"
47 #include "intl.h"
48 #include "tm_p.h"
49 #include "tree-iterator.h"
50 #include "basic-block.h"
51 #include "tree-ssa-alias.h"
52 #include "internal-fn.h"
53 #include "gimple-expr.h"
54 #include "is-a.h"
55 #include "gimple.h"
56 #include "gimple-ssa.h"
57 #include "cgraph.h"
58 #include "tree-ssanames.h"
59 #include "target.h"
60 #include "common/common-target.h"
61 #include "timevar.h"
62 #include "df.h"
63 #include "diagnostic.h"
64 #include "tree-ssa-live.h"
65 #include "tree-outof-ssa.h"
66 #include "target-globals.h"
67 #include "params.h"
68 #include "tree-ssa-address.h"
69 #include "cfgexpand.h"
70 #include "builtins.h"
71 #include "tree-ssa.h"
72
73 #ifndef STACK_PUSH_CODE
74 #ifdef STACK_GROWS_DOWNWARD
75 #define STACK_PUSH_CODE PRE_DEC
76 #else
77 #define STACK_PUSH_CODE PRE_INC
78 #endif
79 #endif
80
81
82 /* If this is nonzero, we do not bother generating VOLATILE
83 around volatile memory references, and we are willing to
84 output indirect addresses. If cse is to follow, we reject
85 indirect addresses so a useful potential cse is generated;
86 if it is used only once, instruction combination will produce
87 the same indirect address eventually. */
88 int cse_not_expected;
89
90 /* This structure is used by move_by_pieces to describe the move to
91 be performed. */
92 struct move_by_pieces_d
93 {
94 rtx to;
95 rtx to_addr;
96 int autinc_to;
97 int explicit_inc_to;
98 rtx from;
99 rtx from_addr;
100 int autinc_from;
101 int explicit_inc_from;
102 unsigned HOST_WIDE_INT len;
103 HOST_WIDE_INT offset;
104 int reverse;
105 };
106
107 /* This structure is used by store_by_pieces to describe the clear to
108 be performed. */
109
110 struct store_by_pieces_d
111 {
112 rtx to;
113 rtx to_addr;
114 int autinc_to;
115 int explicit_inc_to;
116 unsigned HOST_WIDE_INT len;
117 HOST_WIDE_INT offset;
118 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
119 void *constfundata;
120 int reverse;
121 };
122
123 static void move_by_pieces_1 (insn_gen_fn, machine_mode,
124 struct move_by_pieces_d *);
125 static bool block_move_libcall_safe_for_call_parm (void);
126 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT,
127 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
128 unsigned HOST_WIDE_INT);
129 static tree emit_block_move_libcall_fn (int);
130 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
131 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
132 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
133 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
134 static void store_by_pieces_2 (insn_gen_fn, machine_mode,
135 struct store_by_pieces_d *);
136 static tree clear_storage_libcall_fn (int);
137 static rtx_insn *compress_float_constant (rtx, rtx);
138 static rtx get_subtarget (rtx);
139 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
140 HOST_WIDE_INT, enum machine_mode,
141 tree, int, alias_set_type);
142 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
143 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
144 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
145 enum machine_mode, tree, alias_set_type, bool);
146
147 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
148
149 static int is_aligning_offset (const_tree, const_tree);
150 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
151 enum expand_modifier);
152 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
153 static rtx do_store_flag (sepops, rtx, enum machine_mode);
154 #ifdef PUSH_ROUNDING
155 static void emit_single_push_insn (enum machine_mode, rtx, tree);
156 #endif
157 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx, int);
158 static rtx const_vector_from_tree (tree);
159 static void write_complex_part (rtx, rtx, bool);
160
161 /* This macro is used to determine whether move_by_pieces should be called
162 to perform a structure copy. */
163 #ifndef MOVE_BY_PIECES_P
164 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
165 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
166 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
167 #endif
168
169 /* This macro is used to determine whether clear_by_pieces should be
170 called to clear storage. */
171 #ifndef CLEAR_BY_PIECES_P
172 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
173 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
174 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
175 #endif
176
177 /* This macro is used to determine whether store_by_pieces should be
178 called to "memset" storage with byte values other than zero. */
179 #ifndef SET_BY_PIECES_P
180 #define SET_BY_PIECES_P(SIZE, ALIGN) \
181 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
182 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
183 #endif
184
185 /* This macro is used to determine whether store_by_pieces should be
186 called to "memcpy" storage when the source is a constant string. */
187 #ifndef STORE_BY_PIECES_P
188 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
189 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
190 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
191 #endif
192 \f
193 /* This is run to set up which modes can be used
194 directly in memory and to initialize the block move optab. It is run
195 at the beginning of compilation and when the target is reinitialized. */
196
197 void
198 init_expr_target (void)
199 {
200 rtx insn, pat;
201 enum machine_mode mode;
202 int num_clobbers;
203 rtx mem, mem1;
204 rtx reg;
205
206 /* Try indexing by frame ptr and try by stack ptr.
207 It is known that on the Convex the stack ptr isn't a valid index.
208 With luck, one or the other is valid on any machine. */
209 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
210 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
211
212 /* A scratch register we can modify in-place below to avoid
213 useless RTL allocations. */
214 reg = gen_rtx_REG (VOIDmode, -1);
215
216 insn = rtx_alloc (INSN);
217 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
218 PATTERN (insn) = pat;
219
220 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
221 mode = (enum machine_mode) ((int) mode + 1))
222 {
223 int regno;
224
225 direct_load[(int) mode] = direct_store[(int) mode] = 0;
226 PUT_MODE (mem, mode);
227 PUT_MODE (mem1, mode);
228 PUT_MODE (reg, mode);
229
230 /* See if there is some register that can be used in this mode and
231 directly loaded or stored from memory. */
232
233 if (mode != VOIDmode && mode != BLKmode)
234 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
235 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
236 regno++)
237 {
238 if (! HARD_REGNO_MODE_OK (regno, mode))
239 continue;
240
241 SET_REGNO (reg, regno);
242
243 SET_SRC (pat) = mem;
244 SET_DEST (pat) = reg;
245 if (recog (pat, insn, &num_clobbers) >= 0)
246 direct_load[(int) mode] = 1;
247
248 SET_SRC (pat) = mem1;
249 SET_DEST (pat) = reg;
250 if (recog (pat, insn, &num_clobbers) >= 0)
251 direct_load[(int) mode] = 1;
252
253 SET_SRC (pat) = reg;
254 SET_DEST (pat) = mem;
255 if (recog (pat, insn, &num_clobbers) >= 0)
256 direct_store[(int) mode] = 1;
257
258 SET_SRC (pat) = reg;
259 SET_DEST (pat) = mem1;
260 if (recog (pat, insn, &num_clobbers) >= 0)
261 direct_store[(int) mode] = 1;
262 }
263 }
264
265 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
266
267 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
268 mode = GET_MODE_WIDER_MODE (mode))
269 {
270 enum machine_mode srcmode;
271 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
272 srcmode = GET_MODE_WIDER_MODE (srcmode))
273 {
274 enum insn_code ic;
275
276 ic = can_extend_p (mode, srcmode, 0);
277 if (ic == CODE_FOR_nothing)
278 continue;
279
280 PUT_MODE (mem, srcmode);
281
282 if (insn_operand_matches (ic, 1, mem))
283 float_extend_from_mem[mode][srcmode] = true;
284 }
285 }
286 }
287
288 /* This is run at the start of compiling a function. */
289
290 void
291 init_expr (void)
292 {
293 memset (&crtl->expr, 0, sizeof (crtl->expr));
294 }
295 \f
296 /* Copy data from FROM to TO, where the machine modes are not the same.
297 Both modes may be integer, or both may be floating, or both may be
298 fixed-point.
299 UNSIGNEDP should be nonzero if FROM is an unsigned type.
300 This causes zero-extension instead of sign-extension. */
301
302 void
303 convert_move (rtx to, rtx from, int unsignedp)
304 {
305 enum machine_mode to_mode = GET_MODE (to);
306 enum machine_mode from_mode = GET_MODE (from);
307 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
308 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
309 enum insn_code code;
310 rtx libcall;
311
312 /* rtx code for making an equivalent value. */
313 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
314 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
315
316
317 gcc_assert (to_real == from_real);
318 gcc_assert (to_mode != BLKmode);
319 gcc_assert (from_mode != BLKmode);
320
321 /* If the source and destination are already the same, then there's
322 nothing to do. */
323 if (to == from)
324 return;
325
326 /* If FROM is a SUBREG that indicates that we have already done at least
327 the required extension, strip it. We don't handle such SUBREGs as
328 TO here. */
329
330 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
331 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
332 >= GET_MODE_PRECISION (to_mode))
333 && SUBREG_CHECK_PROMOTED_SIGN (from, unsignedp))
334 from = gen_lowpart (to_mode, from), from_mode = to_mode;
335
336 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
337
338 if (to_mode == from_mode
339 || (from_mode == VOIDmode && CONSTANT_P (from)))
340 {
341 emit_move_insn (to, from);
342 return;
343 }
344
345 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
346 {
347 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
348
349 if (VECTOR_MODE_P (to_mode))
350 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
351 else
352 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
353
354 emit_move_insn (to, from);
355 return;
356 }
357
358 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
359 {
360 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
361 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
362 return;
363 }
364
365 if (to_real)
366 {
367 rtx value;
368 rtx_insn *insns;
369 convert_optab tab;
370
371 gcc_assert ((GET_MODE_PRECISION (from_mode)
372 != GET_MODE_PRECISION (to_mode))
373 || (DECIMAL_FLOAT_MODE_P (from_mode)
374 != DECIMAL_FLOAT_MODE_P (to_mode)));
375
376 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
377 /* Conversion between decimal float and binary float, same size. */
378 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
379 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
380 tab = sext_optab;
381 else
382 tab = trunc_optab;
383
384 /* Try converting directly if the insn is supported. */
385
386 code = convert_optab_handler (tab, to_mode, from_mode);
387 if (code != CODE_FOR_nothing)
388 {
389 emit_unop_insn (code, to, from,
390 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
391 return;
392 }
393
394 /* Otherwise use a libcall. */
395 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
396
397 /* Is this conversion implemented yet? */
398 gcc_assert (libcall);
399
400 start_sequence ();
401 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
402 1, from, from_mode);
403 insns = get_insns ();
404 end_sequence ();
405 emit_libcall_block (insns, to, value,
406 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
407 from)
408 : gen_rtx_FLOAT_EXTEND (to_mode, from));
409 return;
410 }
411
412 /* Handle pointer conversion. */ /* SPEE 900220. */
413 /* Targets are expected to provide conversion insns between PxImode and
414 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
415 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
416 {
417 enum machine_mode full_mode
418 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
419
420 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
421 != CODE_FOR_nothing);
422
423 if (full_mode != from_mode)
424 from = convert_to_mode (full_mode, from, unsignedp);
425 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
426 to, from, UNKNOWN);
427 return;
428 }
429 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
430 {
431 rtx new_from;
432 enum machine_mode full_mode
433 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
434 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
435 enum insn_code icode;
436
437 icode = convert_optab_handler (ctab, full_mode, from_mode);
438 gcc_assert (icode != CODE_FOR_nothing);
439
440 if (to_mode == full_mode)
441 {
442 emit_unop_insn (icode, to, from, UNKNOWN);
443 return;
444 }
445
446 new_from = gen_reg_rtx (full_mode);
447 emit_unop_insn (icode, new_from, from, UNKNOWN);
448
449 /* else proceed to integer conversions below. */
450 from_mode = full_mode;
451 from = new_from;
452 }
453
454 /* Make sure both are fixed-point modes or both are not. */
455 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
456 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
457 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
458 {
459 /* If we widen from_mode to to_mode and they are in the same class,
460 we won't saturate the result.
461 Otherwise, always saturate the result to play safe. */
462 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
463 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
464 expand_fixed_convert (to, from, 0, 0);
465 else
466 expand_fixed_convert (to, from, 0, 1);
467 return;
468 }
469
470 /* Now both modes are integers. */
471
472 /* Handle expanding beyond a word. */
473 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
474 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
475 {
476 rtx_insn *insns;
477 rtx lowpart;
478 rtx fill_value;
479 rtx lowfrom;
480 int i;
481 enum machine_mode lowpart_mode;
482 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
483
484 /* Try converting directly if the insn is supported. */
485 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
486 != CODE_FOR_nothing)
487 {
488 /* If FROM is a SUBREG, put it into a register. Do this
489 so that we always generate the same set of insns for
490 better cse'ing; if an intermediate assignment occurred,
491 we won't be doing the operation directly on the SUBREG. */
492 if (optimize > 0 && GET_CODE (from) == SUBREG)
493 from = force_reg (from_mode, from);
494 emit_unop_insn (code, to, from, equiv_code);
495 return;
496 }
497 /* Next, try converting via full word. */
498 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
499 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
500 != CODE_FOR_nothing))
501 {
502 rtx word_to = gen_reg_rtx (word_mode);
503 if (REG_P (to))
504 {
505 if (reg_overlap_mentioned_p (to, from))
506 from = force_reg (from_mode, from);
507 emit_clobber (to);
508 }
509 convert_move (word_to, from, unsignedp);
510 emit_unop_insn (code, to, word_to, equiv_code);
511 return;
512 }
513
514 /* No special multiword conversion insn; do it by hand. */
515 start_sequence ();
516
517 /* Since we will turn this into a no conflict block, we must ensure the
518 the source does not overlap the target so force it into an isolated
519 register when maybe so. Likewise for any MEM input, since the
520 conversion sequence might require several references to it and we
521 must ensure we're getting the same value every time. */
522
523 if (MEM_P (from) || reg_overlap_mentioned_p (to, from))
524 from = force_reg (from_mode, from);
525
526 /* Get a copy of FROM widened to a word, if necessary. */
527 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
528 lowpart_mode = word_mode;
529 else
530 lowpart_mode = from_mode;
531
532 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
533
534 lowpart = gen_lowpart (lowpart_mode, to);
535 emit_move_insn (lowpart, lowfrom);
536
537 /* Compute the value to put in each remaining word. */
538 if (unsignedp)
539 fill_value = const0_rtx;
540 else
541 fill_value = emit_store_flag_force (gen_reg_rtx (word_mode),
542 LT, lowfrom, const0_rtx,
543 lowpart_mode, 0, -1);
544
545 /* Fill the remaining words. */
546 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
547 {
548 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
549 rtx subword = operand_subword (to, index, 1, to_mode);
550
551 gcc_assert (subword);
552
553 if (fill_value != subword)
554 emit_move_insn (subword, fill_value);
555 }
556
557 insns = get_insns ();
558 end_sequence ();
559
560 emit_insn (insns);
561 return;
562 }
563
564 /* Truncating multi-word to a word or less. */
565 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
566 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
567 {
568 if (!((MEM_P (from)
569 && ! MEM_VOLATILE_P (from)
570 && direct_load[(int) to_mode]
571 && ! mode_dependent_address_p (XEXP (from, 0),
572 MEM_ADDR_SPACE (from)))
573 || REG_P (from)
574 || GET_CODE (from) == SUBREG))
575 from = force_reg (from_mode, from);
576 convert_move (to, gen_lowpart (word_mode, from), 0);
577 return;
578 }
579
580 /* Now follow all the conversions between integers
581 no more than a word long. */
582
583 /* For truncation, usually we can just refer to FROM in a narrower mode. */
584 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
585 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
586 {
587 if (!((MEM_P (from)
588 && ! MEM_VOLATILE_P (from)
589 && direct_load[(int) to_mode]
590 && ! mode_dependent_address_p (XEXP (from, 0),
591 MEM_ADDR_SPACE (from)))
592 || REG_P (from)
593 || GET_CODE (from) == SUBREG))
594 from = force_reg (from_mode, from);
595 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
596 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
597 from = copy_to_reg (from);
598 emit_move_insn (to, gen_lowpart (to_mode, from));
599 return;
600 }
601
602 /* Handle extension. */
603 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
604 {
605 /* Convert directly if that works. */
606 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
607 != CODE_FOR_nothing)
608 {
609 emit_unop_insn (code, to, from, equiv_code);
610 return;
611 }
612 else
613 {
614 enum machine_mode intermediate;
615 rtx tmp;
616 int shift_amount;
617
618 /* Search for a mode to convert via. */
619 for (intermediate = from_mode; intermediate != VOIDmode;
620 intermediate = GET_MODE_WIDER_MODE (intermediate))
621 if (((can_extend_p (to_mode, intermediate, unsignedp)
622 != CODE_FOR_nothing)
623 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
624 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
625 && (can_extend_p (intermediate, from_mode, unsignedp)
626 != CODE_FOR_nothing))
627 {
628 convert_move (to, convert_to_mode (intermediate, from,
629 unsignedp), unsignedp);
630 return;
631 }
632
633 /* No suitable intermediate mode.
634 Generate what we need with shifts. */
635 shift_amount = (GET_MODE_PRECISION (to_mode)
636 - GET_MODE_PRECISION (from_mode));
637 from = gen_lowpart (to_mode, force_reg (from_mode, from));
638 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
639 to, unsignedp);
640 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
641 to, unsignedp);
642 if (tmp != to)
643 emit_move_insn (to, tmp);
644 return;
645 }
646 }
647
648 /* Support special truncate insns for certain modes. */
649 if (convert_optab_handler (trunc_optab, to_mode,
650 from_mode) != CODE_FOR_nothing)
651 {
652 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
653 to, from, UNKNOWN);
654 return;
655 }
656
657 /* Handle truncation of volatile memrefs, and so on;
658 the things that couldn't be truncated directly,
659 and for which there was no special instruction.
660
661 ??? Code above formerly short-circuited this, for most integer
662 mode pairs, with a force_reg in from_mode followed by a recursive
663 call to this routine. Appears always to have been wrong. */
664 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
665 {
666 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
667 emit_move_insn (to, temp);
668 return;
669 }
670
671 /* Mode combination is not recognized. */
672 gcc_unreachable ();
673 }
674
675 /* Return an rtx for a value that would result
676 from converting X to mode MODE.
677 Both X and MODE may be floating, or both integer.
678 UNSIGNEDP is nonzero if X is an unsigned value.
679 This can be done by referring to a part of X in place
680 or by copying to a new temporary with conversion. */
681
682 rtx
683 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
684 {
685 return convert_modes (mode, VOIDmode, x, unsignedp);
686 }
687
688 /* Return an rtx for a value that would result
689 from converting X from mode OLDMODE to mode MODE.
690 Both modes may be floating, or both integer.
691 UNSIGNEDP is nonzero if X is an unsigned value.
692
693 This can be done by referring to a part of X in place
694 or by copying to a new temporary with conversion.
695
696 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
697
698 rtx
699 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
700 {
701 rtx temp;
702
703 /* If FROM is a SUBREG that indicates that we have already done at least
704 the required extension, strip it. */
705
706 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
707 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
708 && SUBREG_CHECK_PROMOTED_SIGN (x, unsignedp))
709 x = gen_lowpart (mode, SUBREG_REG (x));
710
711 if (GET_MODE (x) != VOIDmode)
712 oldmode = GET_MODE (x);
713
714 if (mode == oldmode)
715 return x;
716
717 if (CONST_SCALAR_INT_P (x) && GET_MODE_CLASS (mode) == MODE_INT)
718 {
719 /* If the caller did not tell us the old mode, then there is not
720 much to do with respect to canonicalization. We have to
721 assume that all the bits are significant. */
722 if (GET_MODE_CLASS (oldmode) != MODE_INT)
723 oldmode = MAX_MODE_INT;
724 wide_int w = wide_int::from (std::make_pair (x, oldmode),
725 GET_MODE_PRECISION (mode),
726 unsignedp ? UNSIGNED : SIGNED);
727 return immed_wide_int_const (w, mode);
728 }
729
730 /* We can do this with a gen_lowpart if both desired and current modes
731 are integer, and this is either a constant integer, a register, or a
732 non-volatile MEM. */
733 if (GET_MODE_CLASS (mode) == MODE_INT
734 && GET_MODE_CLASS (oldmode) == MODE_INT
735 && GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
736 && ((MEM_P (x) && !MEM_VOLATILE_P (x) && direct_load[(int) mode])
737 || (REG_P (x)
738 && (!HARD_REGISTER_P (x)
739 || HARD_REGNO_MODE_OK (REGNO (x), mode))
740 && TRULY_NOOP_TRUNCATION_MODES_P (mode, GET_MODE (x)))))
741
742 return gen_lowpart (mode, x);
743
744 /* Converting from integer constant into mode is always equivalent to an
745 subreg operation. */
746 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
747 {
748 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
749 return simplify_gen_subreg (mode, x, oldmode, 0);
750 }
751
752 temp = gen_reg_rtx (mode);
753 convert_move (temp, x, unsignedp);
754 return temp;
755 }
756 \f
757 /* Return the largest alignment we can use for doing a move (or store)
758 of MAX_PIECES. ALIGN is the largest alignment we could use. */
759
760 static unsigned int
761 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
762 {
763 enum machine_mode tmode;
764
765 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
766 if (align >= GET_MODE_ALIGNMENT (tmode))
767 align = GET_MODE_ALIGNMENT (tmode);
768 else
769 {
770 enum machine_mode tmode, xmode;
771
772 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
773 tmode != VOIDmode;
774 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
775 if (GET_MODE_SIZE (tmode) > max_pieces
776 || SLOW_UNALIGNED_ACCESS (tmode, align))
777 break;
778
779 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
780 }
781
782 return align;
783 }
784
785 /* Return the widest integer mode no wider than SIZE. If no such mode
786 can be found, return VOIDmode. */
787
788 static enum machine_mode
789 widest_int_mode_for_size (unsigned int size)
790 {
791 enum machine_mode tmode, mode = VOIDmode;
792
793 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
794 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
795 if (GET_MODE_SIZE (tmode) < size)
796 mode = tmode;
797
798 return mode;
799 }
800
801 /* STORE_MAX_PIECES is the number of bytes at a time that we can
802 store efficiently. Due to internal GCC limitations, this is
803 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
804 for an immediate constant. */
805
806 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
807
808 /* Determine whether the LEN bytes can be moved by using several move
809 instructions. Return nonzero if a call to move_by_pieces should
810 succeed. */
811
812 int
813 can_move_by_pieces (unsigned HOST_WIDE_INT len ATTRIBUTE_UNUSED,
814 unsigned int align ATTRIBUTE_UNUSED)
815 {
816 return MOVE_BY_PIECES_P (len, align);
817 }
818
819 /* Generate several move instructions to copy LEN bytes from block FROM to
820 block TO. (These are MEM rtx's with BLKmode).
821
822 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
823 used to push FROM to the stack.
824
825 ALIGN is maximum stack alignment we can assume.
826
827 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
828 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
829 stpcpy. */
830
831 rtx
832 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
833 unsigned int align, int endp)
834 {
835 struct move_by_pieces_d data;
836 enum machine_mode to_addr_mode;
837 enum machine_mode from_addr_mode = get_address_mode (from);
838 rtx to_addr, from_addr = XEXP (from, 0);
839 unsigned int max_size = MOVE_MAX_PIECES + 1;
840 enum insn_code icode;
841
842 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
843
844 data.offset = 0;
845 data.from_addr = from_addr;
846 if (to)
847 {
848 to_addr_mode = get_address_mode (to);
849 to_addr = XEXP (to, 0);
850 data.to = to;
851 data.autinc_to
852 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
853 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
854 data.reverse
855 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
856 }
857 else
858 {
859 to_addr_mode = VOIDmode;
860 to_addr = NULL_RTX;
861 data.to = NULL_RTX;
862 data.autinc_to = 1;
863 #ifdef STACK_GROWS_DOWNWARD
864 data.reverse = 1;
865 #else
866 data.reverse = 0;
867 #endif
868 }
869 data.to_addr = to_addr;
870 data.from = from;
871 data.autinc_from
872 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
873 || GET_CODE (from_addr) == POST_INC
874 || GET_CODE (from_addr) == POST_DEC);
875
876 data.explicit_inc_from = 0;
877 data.explicit_inc_to = 0;
878 if (data.reverse) data.offset = len;
879 data.len = len;
880
881 /* If copying requires more than two move insns,
882 copy addresses to registers (to make displacements shorter)
883 and use post-increment if available. */
884 if (!(data.autinc_from && data.autinc_to)
885 && move_by_pieces_ninsns (len, align, max_size) > 2)
886 {
887 /* Find the mode of the largest move...
888 MODE might not be used depending on the definitions of the
889 USE_* macros below. */
890 enum machine_mode mode ATTRIBUTE_UNUSED
891 = widest_int_mode_for_size (max_size);
892
893 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
894 {
895 data.from_addr = copy_to_mode_reg (from_addr_mode,
896 plus_constant (from_addr_mode,
897 from_addr, len));
898 data.autinc_from = 1;
899 data.explicit_inc_from = -1;
900 }
901 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
902 {
903 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
904 data.autinc_from = 1;
905 data.explicit_inc_from = 1;
906 }
907 if (!data.autinc_from && CONSTANT_P (from_addr))
908 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
909 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
910 {
911 data.to_addr = copy_to_mode_reg (to_addr_mode,
912 plus_constant (to_addr_mode,
913 to_addr, len));
914 data.autinc_to = 1;
915 data.explicit_inc_to = -1;
916 }
917 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
918 {
919 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
920 data.autinc_to = 1;
921 data.explicit_inc_to = 1;
922 }
923 if (!data.autinc_to && CONSTANT_P (to_addr))
924 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
925 }
926
927 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
928
929 /* First move what we can in the largest integer mode, then go to
930 successively smaller modes. */
931
932 while (max_size > 1 && data.len > 0)
933 {
934 enum machine_mode mode = widest_int_mode_for_size (max_size);
935
936 if (mode == VOIDmode)
937 break;
938
939 icode = optab_handler (mov_optab, mode);
940 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
941 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
942
943 max_size = GET_MODE_SIZE (mode);
944 }
945
946 /* The code above should have handled everything. */
947 gcc_assert (!data.len);
948
949 if (endp)
950 {
951 rtx to1;
952
953 gcc_assert (!data.reverse);
954 if (data.autinc_to)
955 {
956 if (endp == 2)
957 {
958 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
959 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
960 else
961 data.to_addr = copy_to_mode_reg (to_addr_mode,
962 plus_constant (to_addr_mode,
963 data.to_addr,
964 -1));
965 }
966 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
967 data.offset);
968 }
969 else
970 {
971 if (endp == 2)
972 --data.offset;
973 to1 = adjust_address (data.to, QImode, data.offset);
974 }
975 return to1;
976 }
977 else
978 return data.to;
979 }
980
981 /* Return number of insns required to move L bytes by pieces.
982 ALIGN (in bits) is maximum alignment we can assume. */
983
984 unsigned HOST_WIDE_INT
985 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
986 unsigned int max_size)
987 {
988 unsigned HOST_WIDE_INT n_insns = 0;
989
990 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
991
992 while (max_size > 1 && l > 0)
993 {
994 enum machine_mode mode;
995 enum insn_code icode;
996
997 mode = widest_int_mode_for_size (max_size);
998
999 if (mode == VOIDmode)
1000 break;
1001
1002 icode = optab_handler (mov_optab, mode);
1003 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1004 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1005
1006 max_size = GET_MODE_SIZE (mode);
1007 }
1008
1009 gcc_assert (!l);
1010 return n_insns;
1011 }
1012
1013 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1014 with move instructions for mode MODE. GENFUN is the gen_... function
1015 to make a move insn for that mode. DATA has all the other info. */
1016
1017 static void
1018 move_by_pieces_1 (insn_gen_fn genfun, machine_mode mode,
1019 struct move_by_pieces_d *data)
1020 {
1021 unsigned int size = GET_MODE_SIZE (mode);
1022 rtx to1 = NULL_RTX, from1;
1023
1024 while (data->len >= size)
1025 {
1026 if (data->reverse)
1027 data->offset -= size;
1028
1029 if (data->to)
1030 {
1031 if (data->autinc_to)
1032 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1033 data->offset);
1034 else
1035 to1 = adjust_address (data->to, mode, data->offset);
1036 }
1037
1038 if (data->autinc_from)
1039 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1040 data->offset);
1041 else
1042 from1 = adjust_address (data->from, mode, data->offset);
1043
1044 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1045 emit_insn (gen_add2_insn (data->to_addr,
1046 gen_int_mode (-(HOST_WIDE_INT) size,
1047 GET_MODE (data->to_addr))));
1048 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1049 emit_insn (gen_add2_insn (data->from_addr,
1050 gen_int_mode (-(HOST_WIDE_INT) size,
1051 GET_MODE (data->from_addr))));
1052
1053 if (data->to)
1054 emit_insn ((*genfun) (to1, from1));
1055 else
1056 {
1057 #ifdef PUSH_ROUNDING
1058 emit_single_push_insn (mode, from1, NULL);
1059 #else
1060 gcc_unreachable ();
1061 #endif
1062 }
1063
1064 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1065 emit_insn (gen_add2_insn (data->to_addr,
1066 gen_int_mode (size,
1067 GET_MODE (data->to_addr))));
1068 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1069 emit_insn (gen_add2_insn (data->from_addr,
1070 gen_int_mode (size,
1071 GET_MODE (data->from_addr))));
1072
1073 if (! data->reverse)
1074 data->offset += size;
1075
1076 data->len -= size;
1077 }
1078 }
1079 \f
1080 /* Emit code to move a block Y to a block X. This may be done with
1081 string-move instructions, with multiple scalar move instructions,
1082 or with a library call.
1083
1084 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1085 SIZE is an rtx that says how long they are.
1086 ALIGN is the maximum alignment we can assume they have.
1087 METHOD describes what kind of copy this is, and what mechanisms may be used.
1088 MIN_SIZE is the minimal size of block to move
1089 MAX_SIZE is the maximal size of block to move, if it can not be represented
1090 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1091
1092 Return the address of the new block, if memcpy is called and returns it,
1093 0 otherwise. */
1094
1095 rtx
1096 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1097 unsigned int expected_align, HOST_WIDE_INT expected_size,
1098 unsigned HOST_WIDE_INT min_size,
1099 unsigned HOST_WIDE_INT max_size,
1100 unsigned HOST_WIDE_INT probable_max_size)
1101 {
1102 bool may_use_call;
1103 rtx retval = 0;
1104 unsigned int align;
1105
1106 gcc_assert (size);
1107 if (CONST_INT_P (size)
1108 && INTVAL (size) == 0)
1109 return 0;
1110
1111 switch (method)
1112 {
1113 case BLOCK_OP_NORMAL:
1114 case BLOCK_OP_TAILCALL:
1115 may_use_call = true;
1116 break;
1117
1118 case BLOCK_OP_CALL_PARM:
1119 may_use_call = block_move_libcall_safe_for_call_parm ();
1120
1121 /* Make inhibit_defer_pop nonzero around the library call
1122 to force it to pop the arguments right away. */
1123 NO_DEFER_POP;
1124 break;
1125
1126 case BLOCK_OP_NO_LIBCALL:
1127 may_use_call = false;
1128 break;
1129
1130 default:
1131 gcc_unreachable ();
1132 }
1133
1134 gcc_assert (MEM_P (x) && MEM_P (y));
1135 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1136 gcc_assert (align >= BITS_PER_UNIT);
1137
1138 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1139 block copy is more efficient for other large modes, e.g. DCmode. */
1140 x = adjust_address (x, BLKmode, 0);
1141 y = adjust_address (y, BLKmode, 0);
1142
1143 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1144 can be incorrect is coming from __builtin_memcpy. */
1145 if (CONST_INT_P (size))
1146 {
1147 x = shallow_copy_rtx (x);
1148 y = shallow_copy_rtx (y);
1149 set_mem_size (x, INTVAL (size));
1150 set_mem_size (y, INTVAL (size));
1151 }
1152
1153 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1154 move_by_pieces (x, y, INTVAL (size), align, 0);
1155 else if (emit_block_move_via_movmem (x, y, size, align,
1156 expected_align, expected_size,
1157 min_size, max_size, probable_max_size))
1158 ;
1159 else if (may_use_call
1160 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1161 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1162 {
1163 /* Since x and y are passed to a libcall, mark the corresponding
1164 tree EXPR as addressable. */
1165 tree y_expr = MEM_EXPR (y);
1166 tree x_expr = MEM_EXPR (x);
1167 if (y_expr)
1168 mark_addressable (y_expr);
1169 if (x_expr)
1170 mark_addressable (x_expr);
1171 retval = emit_block_move_via_libcall (x, y, size,
1172 method == BLOCK_OP_TAILCALL);
1173 }
1174
1175 else
1176 emit_block_move_via_loop (x, y, size, align);
1177
1178 if (method == BLOCK_OP_CALL_PARM)
1179 OK_DEFER_POP;
1180
1181 return retval;
1182 }
1183
1184 rtx
1185 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1186 {
1187 unsigned HOST_WIDE_INT max, min = 0;
1188 if (GET_CODE (size) == CONST_INT)
1189 min = max = UINTVAL (size);
1190 else
1191 max = GET_MODE_MASK (GET_MODE (size));
1192 return emit_block_move_hints (x, y, size, method, 0, -1,
1193 min, max, max);
1194 }
1195
1196 /* A subroutine of emit_block_move. Returns true if calling the
1197 block move libcall will not clobber any parameters which may have
1198 already been placed on the stack. */
1199
1200 static bool
1201 block_move_libcall_safe_for_call_parm (void)
1202 {
1203 #if defined (REG_PARM_STACK_SPACE)
1204 tree fn;
1205 #endif
1206
1207 /* If arguments are pushed on the stack, then they're safe. */
1208 if (PUSH_ARGS)
1209 return true;
1210
1211 /* If registers go on the stack anyway, any argument is sure to clobber
1212 an outgoing argument. */
1213 #if defined (REG_PARM_STACK_SPACE)
1214 fn = emit_block_move_libcall_fn (false);
1215 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1216 depend on its argument. */
1217 (void) fn;
1218 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1219 && REG_PARM_STACK_SPACE (fn) != 0)
1220 return false;
1221 #endif
1222
1223 /* If any argument goes in memory, then it might clobber an outgoing
1224 argument. */
1225 {
1226 CUMULATIVE_ARGS args_so_far_v;
1227 cumulative_args_t args_so_far;
1228 tree fn, arg;
1229
1230 fn = emit_block_move_libcall_fn (false);
1231 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1232 args_so_far = pack_cumulative_args (&args_so_far_v);
1233
1234 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1235 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1236 {
1237 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1238 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1239 NULL_TREE, true);
1240 if (!tmp || !REG_P (tmp))
1241 return false;
1242 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1243 return false;
1244 targetm.calls.function_arg_advance (args_so_far, mode,
1245 NULL_TREE, true);
1246 }
1247 }
1248 return true;
1249 }
1250
1251 /* A subroutine of emit_block_move. Expand a movmem pattern;
1252 return true if successful. */
1253
1254 static bool
1255 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1256 unsigned int expected_align, HOST_WIDE_INT expected_size,
1257 unsigned HOST_WIDE_INT min_size,
1258 unsigned HOST_WIDE_INT max_size,
1259 unsigned HOST_WIDE_INT probable_max_size)
1260 {
1261 int save_volatile_ok = volatile_ok;
1262 enum machine_mode mode;
1263
1264 if (expected_align < align)
1265 expected_align = align;
1266 if (expected_size != -1)
1267 {
1268 if ((unsigned HOST_WIDE_INT)expected_size > probable_max_size)
1269 expected_size = probable_max_size;
1270 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
1271 expected_size = min_size;
1272 }
1273
1274 /* Since this is a move insn, we don't care about volatility. */
1275 volatile_ok = 1;
1276
1277 /* Try the most limited insn first, because there's no point
1278 including more than one in the machine description unless
1279 the more limited one has some advantage. */
1280
1281 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1282 mode = GET_MODE_WIDER_MODE (mode))
1283 {
1284 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1285
1286 if (code != CODE_FOR_nothing
1287 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1288 here because if SIZE is less than the mode mask, as it is
1289 returned by the macro, it will definitely be less than the
1290 actual mode mask. Since SIZE is within the Pmode address
1291 space, we limit MODE to Pmode. */
1292 && ((CONST_INT_P (size)
1293 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1294 <= (GET_MODE_MASK (mode) >> 1)))
1295 || max_size <= (GET_MODE_MASK (mode) >> 1)
1296 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
1297 {
1298 struct expand_operand ops[9];
1299 unsigned int nops;
1300
1301 /* ??? When called via emit_block_move_for_call, it'd be
1302 nice if there were some way to inform the backend, so
1303 that it doesn't fail the expansion because it thinks
1304 emitting the libcall would be more efficient. */
1305 nops = insn_data[(int) code].n_generator_args;
1306 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
1307
1308 create_fixed_operand (&ops[0], x);
1309 create_fixed_operand (&ops[1], y);
1310 /* The check above guarantees that this size conversion is valid. */
1311 create_convert_operand_to (&ops[2], size, mode, true);
1312 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1313 if (nops >= 6)
1314 {
1315 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1316 create_integer_operand (&ops[5], expected_size);
1317 }
1318 if (nops >= 8)
1319 {
1320 create_integer_operand (&ops[6], min_size);
1321 /* If we can not represent the maximal size,
1322 make parameter NULL. */
1323 if ((HOST_WIDE_INT) max_size != -1)
1324 create_integer_operand (&ops[7], max_size);
1325 else
1326 create_fixed_operand (&ops[7], NULL);
1327 }
1328 if (nops == 9)
1329 {
1330 /* If we can not represent the maximal size,
1331 make parameter NULL. */
1332 if ((HOST_WIDE_INT) probable_max_size != -1)
1333 create_integer_operand (&ops[8], probable_max_size);
1334 else
1335 create_fixed_operand (&ops[8], NULL);
1336 }
1337 if (maybe_expand_insn (code, nops, ops))
1338 {
1339 volatile_ok = save_volatile_ok;
1340 return true;
1341 }
1342 }
1343 }
1344
1345 volatile_ok = save_volatile_ok;
1346 return false;
1347 }
1348
1349 /* A subroutine of emit_block_move. Expand a call to memcpy.
1350 Return the return value from memcpy, 0 otherwise. */
1351
1352 rtx
1353 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1354 {
1355 rtx dst_addr, src_addr;
1356 tree call_expr, fn, src_tree, dst_tree, size_tree;
1357 enum machine_mode size_mode;
1358 rtx retval;
1359
1360 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1361 pseudos. We can then place those new pseudos into a VAR_DECL and
1362 use them later. */
1363
1364 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1365 src_addr = copy_addr_to_reg (XEXP (src, 0));
1366
1367 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1368 src_addr = convert_memory_address (ptr_mode, src_addr);
1369
1370 dst_tree = make_tree (ptr_type_node, dst_addr);
1371 src_tree = make_tree (ptr_type_node, src_addr);
1372
1373 size_mode = TYPE_MODE (sizetype);
1374
1375 size = convert_to_mode (size_mode, size, 1);
1376 size = copy_to_mode_reg (size_mode, size);
1377
1378 /* It is incorrect to use the libcall calling conventions to call
1379 memcpy in this context. This could be a user call to memcpy and
1380 the user may wish to examine the return value from memcpy. For
1381 targets where libcalls and normal calls have different conventions
1382 for returning pointers, we could end up generating incorrect code. */
1383
1384 size_tree = make_tree (sizetype, size);
1385
1386 fn = emit_block_move_libcall_fn (true);
1387 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1388 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1389
1390 retval = expand_normal (call_expr);
1391
1392 return retval;
1393 }
1394
1395 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1396 for the function we use for block copies. */
1397
1398 static GTY(()) tree block_move_fn;
1399
1400 void
1401 init_block_move_fn (const char *asmspec)
1402 {
1403 if (!block_move_fn)
1404 {
1405 tree args, fn, attrs, attr_args;
1406
1407 fn = get_identifier ("memcpy");
1408 args = build_function_type_list (ptr_type_node, ptr_type_node,
1409 const_ptr_type_node, sizetype,
1410 NULL_TREE);
1411
1412 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1413 DECL_EXTERNAL (fn) = 1;
1414 TREE_PUBLIC (fn) = 1;
1415 DECL_ARTIFICIAL (fn) = 1;
1416 TREE_NOTHROW (fn) = 1;
1417 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1418 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1419
1420 attr_args = build_tree_list (NULL_TREE, build_string (1, "1"));
1421 attrs = tree_cons (get_identifier ("fn spec"), attr_args, NULL);
1422
1423 decl_attributes (&fn, attrs, ATTR_FLAG_BUILT_IN);
1424
1425 block_move_fn = fn;
1426 }
1427
1428 if (asmspec)
1429 set_user_assembler_name (block_move_fn, asmspec);
1430 }
1431
1432 static tree
1433 emit_block_move_libcall_fn (int for_call)
1434 {
1435 static bool emitted_extern;
1436
1437 if (!block_move_fn)
1438 init_block_move_fn (NULL);
1439
1440 if (for_call && !emitted_extern)
1441 {
1442 emitted_extern = true;
1443 make_decl_rtl (block_move_fn);
1444 }
1445
1446 return block_move_fn;
1447 }
1448
1449 /* A subroutine of emit_block_move. Copy the data via an explicit
1450 loop. This is used only when libcalls are forbidden. */
1451 /* ??? It'd be nice to copy in hunks larger than QImode. */
1452
1453 static void
1454 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1455 unsigned int align ATTRIBUTE_UNUSED)
1456 {
1457 rtx_code_label *cmp_label, *top_label;
1458 rtx iter, x_addr, y_addr, tmp;
1459 enum machine_mode x_addr_mode = get_address_mode (x);
1460 enum machine_mode y_addr_mode = get_address_mode (y);
1461 enum machine_mode iter_mode;
1462
1463 iter_mode = GET_MODE (size);
1464 if (iter_mode == VOIDmode)
1465 iter_mode = word_mode;
1466
1467 top_label = gen_label_rtx ();
1468 cmp_label = gen_label_rtx ();
1469 iter = gen_reg_rtx (iter_mode);
1470
1471 emit_move_insn (iter, const0_rtx);
1472
1473 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1474 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1475 do_pending_stack_adjust ();
1476
1477 emit_jump (cmp_label);
1478 emit_label (top_label);
1479
1480 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1481 x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp);
1482
1483 if (x_addr_mode != y_addr_mode)
1484 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1485 y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp);
1486
1487 x = change_address (x, QImode, x_addr);
1488 y = change_address (y, QImode, y_addr);
1489
1490 emit_move_insn (x, y);
1491
1492 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1493 true, OPTAB_LIB_WIDEN);
1494 if (tmp != iter)
1495 emit_move_insn (iter, tmp);
1496
1497 emit_label (cmp_label);
1498
1499 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1500 true, top_label, REG_BR_PROB_BASE * 90 / 100);
1501 }
1502 \f
1503 /* Copy all or part of a value X into registers starting at REGNO.
1504 The number of registers to be filled is NREGS. */
1505
1506 void
1507 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1508 {
1509 int i;
1510 #ifdef HAVE_load_multiple
1511 rtx pat;
1512 rtx_insn *last;
1513 #endif
1514
1515 if (nregs == 0)
1516 return;
1517
1518 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1519 x = validize_mem (force_const_mem (mode, x));
1520
1521 /* See if the machine can do this with a load multiple insn. */
1522 #ifdef HAVE_load_multiple
1523 if (HAVE_load_multiple)
1524 {
1525 last = get_last_insn ();
1526 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1527 GEN_INT (nregs));
1528 if (pat)
1529 {
1530 emit_insn (pat);
1531 return;
1532 }
1533 else
1534 delete_insns_since (last);
1535 }
1536 #endif
1537
1538 for (i = 0; i < nregs; i++)
1539 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1540 operand_subword_force (x, i, mode));
1541 }
1542
1543 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1544 The number of registers to be filled is NREGS. */
1545
1546 void
1547 move_block_from_reg (int regno, rtx x, int nregs)
1548 {
1549 int i;
1550
1551 if (nregs == 0)
1552 return;
1553
1554 /* See if the machine can do this with a store multiple insn. */
1555 #ifdef HAVE_store_multiple
1556 if (HAVE_store_multiple)
1557 {
1558 rtx_insn *last = get_last_insn ();
1559 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1560 GEN_INT (nregs));
1561 if (pat)
1562 {
1563 emit_insn (pat);
1564 return;
1565 }
1566 else
1567 delete_insns_since (last);
1568 }
1569 #endif
1570
1571 for (i = 0; i < nregs; i++)
1572 {
1573 rtx tem = operand_subword (x, i, 1, BLKmode);
1574
1575 gcc_assert (tem);
1576
1577 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1578 }
1579 }
1580
1581 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1582 ORIG, where ORIG is a non-consecutive group of registers represented by
1583 a PARALLEL. The clone is identical to the original except in that the
1584 original set of registers is replaced by a new set of pseudo registers.
1585 The new set has the same modes as the original set. */
1586
1587 rtx
1588 gen_group_rtx (rtx orig)
1589 {
1590 int i, length;
1591 rtx *tmps;
1592
1593 gcc_assert (GET_CODE (orig) == PARALLEL);
1594
1595 length = XVECLEN (orig, 0);
1596 tmps = XALLOCAVEC (rtx, length);
1597
1598 /* Skip a NULL entry in first slot. */
1599 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1600
1601 if (i)
1602 tmps[0] = 0;
1603
1604 for (; i < length; i++)
1605 {
1606 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1607 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1608
1609 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1610 }
1611
1612 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1613 }
1614
1615 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1616 except that values are placed in TMPS[i], and must later be moved
1617 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1618
1619 static void
1620 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1621 {
1622 rtx src;
1623 int start, i;
1624 enum machine_mode m = GET_MODE (orig_src);
1625
1626 gcc_assert (GET_CODE (dst) == PARALLEL);
1627
1628 if (m != VOIDmode
1629 && !SCALAR_INT_MODE_P (m)
1630 && !MEM_P (orig_src)
1631 && GET_CODE (orig_src) != CONCAT)
1632 {
1633 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1634 if (imode == BLKmode)
1635 src = assign_stack_temp (GET_MODE (orig_src), ssize);
1636 else
1637 src = gen_reg_rtx (imode);
1638 if (imode != BLKmode)
1639 src = gen_lowpart (GET_MODE (orig_src), src);
1640 emit_move_insn (src, orig_src);
1641 /* ...and back again. */
1642 if (imode != BLKmode)
1643 src = gen_lowpart (imode, src);
1644 emit_group_load_1 (tmps, dst, src, type, ssize);
1645 return;
1646 }
1647
1648 /* Check for a NULL entry, used to indicate that the parameter goes
1649 both on the stack and in registers. */
1650 if (XEXP (XVECEXP (dst, 0, 0), 0))
1651 start = 0;
1652 else
1653 start = 1;
1654
1655 /* Process the pieces. */
1656 for (i = start; i < XVECLEN (dst, 0); i++)
1657 {
1658 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1659 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1660 unsigned int bytelen = GET_MODE_SIZE (mode);
1661 int shift = 0;
1662
1663 /* Handle trailing fragments that run over the size of the struct. */
1664 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1665 {
1666 /* Arrange to shift the fragment to where it belongs.
1667 extract_bit_field loads to the lsb of the reg. */
1668 if (
1669 #ifdef BLOCK_REG_PADDING
1670 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1671 == (BYTES_BIG_ENDIAN ? upward : downward)
1672 #else
1673 BYTES_BIG_ENDIAN
1674 #endif
1675 )
1676 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1677 bytelen = ssize - bytepos;
1678 gcc_assert (bytelen > 0);
1679 }
1680
1681 /* If we won't be loading directly from memory, protect the real source
1682 from strange tricks we might play; but make sure that the source can
1683 be loaded directly into the destination. */
1684 src = orig_src;
1685 if (!MEM_P (orig_src)
1686 && (!CONSTANT_P (orig_src)
1687 || (GET_MODE (orig_src) != mode
1688 && GET_MODE (orig_src) != VOIDmode)))
1689 {
1690 if (GET_MODE (orig_src) == VOIDmode)
1691 src = gen_reg_rtx (mode);
1692 else
1693 src = gen_reg_rtx (GET_MODE (orig_src));
1694
1695 emit_move_insn (src, orig_src);
1696 }
1697
1698 /* Optimize the access just a bit. */
1699 if (MEM_P (src)
1700 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1701 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1702 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1703 && bytelen == GET_MODE_SIZE (mode))
1704 {
1705 tmps[i] = gen_reg_rtx (mode);
1706 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1707 }
1708 else if (COMPLEX_MODE_P (mode)
1709 && GET_MODE (src) == mode
1710 && bytelen == GET_MODE_SIZE (mode))
1711 /* Let emit_move_complex do the bulk of the work. */
1712 tmps[i] = src;
1713 else if (GET_CODE (src) == CONCAT)
1714 {
1715 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1716 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1717
1718 if ((bytepos == 0 && bytelen == slen0)
1719 || (bytepos != 0 && bytepos + bytelen <= slen))
1720 {
1721 /* The following assumes that the concatenated objects all
1722 have the same size. In this case, a simple calculation
1723 can be used to determine the object and the bit field
1724 to be extracted. */
1725 tmps[i] = XEXP (src, bytepos / slen0);
1726 if (! CONSTANT_P (tmps[i])
1727 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1728 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1729 (bytepos % slen0) * BITS_PER_UNIT,
1730 1, NULL_RTX, mode, mode);
1731 }
1732 else
1733 {
1734 rtx mem;
1735
1736 gcc_assert (!bytepos);
1737 mem = assign_stack_temp (GET_MODE (src), slen);
1738 emit_move_insn (mem, src);
1739 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1740 0, 1, NULL_RTX, mode, mode);
1741 }
1742 }
1743 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1744 SIMD register, which is currently broken. While we get GCC
1745 to emit proper RTL for these cases, let's dump to memory. */
1746 else if (VECTOR_MODE_P (GET_MODE (dst))
1747 && REG_P (src))
1748 {
1749 int slen = GET_MODE_SIZE (GET_MODE (src));
1750 rtx mem;
1751
1752 mem = assign_stack_temp (GET_MODE (src), slen);
1753 emit_move_insn (mem, src);
1754 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1755 }
1756 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1757 && XVECLEN (dst, 0) > 1)
1758 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE (dst), bytepos);
1759 else if (CONSTANT_P (src))
1760 {
1761 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1762
1763 if (len == ssize)
1764 tmps[i] = src;
1765 else
1766 {
1767 rtx first, second;
1768
1769 /* TODO: const_wide_int can have sizes other than this... */
1770 gcc_assert (2 * len == ssize);
1771 split_double (src, &first, &second);
1772 if (i)
1773 tmps[i] = second;
1774 else
1775 tmps[i] = first;
1776 }
1777 }
1778 else if (REG_P (src) && GET_MODE (src) == mode)
1779 tmps[i] = src;
1780 else
1781 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1782 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
1783 mode, mode);
1784
1785 if (shift)
1786 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1787 shift, tmps[i], 0);
1788 }
1789 }
1790
1791 /* Emit code to move a block SRC of type TYPE to a block DST,
1792 where DST is non-consecutive registers represented by a PARALLEL.
1793 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1794 if not known. */
1795
1796 void
1797 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1798 {
1799 rtx *tmps;
1800 int i;
1801
1802 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1803 emit_group_load_1 (tmps, dst, src, type, ssize);
1804
1805 /* Copy the extracted pieces into the proper (probable) hard regs. */
1806 for (i = 0; i < XVECLEN (dst, 0); i++)
1807 {
1808 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1809 if (d == NULL)
1810 continue;
1811 emit_move_insn (d, tmps[i]);
1812 }
1813 }
1814
1815 /* Similar, but load SRC into new pseudos in a format that looks like
1816 PARALLEL. This can later be fed to emit_group_move to get things
1817 in the right place. */
1818
1819 rtx
1820 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1821 {
1822 rtvec vec;
1823 int i;
1824
1825 vec = rtvec_alloc (XVECLEN (parallel, 0));
1826 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1827
1828 /* Convert the vector to look just like the original PARALLEL, except
1829 with the computed values. */
1830 for (i = 0; i < XVECLEN (parallel, 0); i++)
1831 {
1832 rtx e = XVECEXP (parallel, 0, i);
1833 rtx d = XEXP (e, 0);
1834
1835 if (d)
1836 {
1837 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1838 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1839 }
1840 RTVEC_ELT (vec, i) = e;
1841 }
1842
1843 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1844 }
1845
1846 /* Emit code to move a block SRC to block DST, where SRC and DST are
1847 non-consecutive groups of registers, each represented by a PARALLEL. */
1848
1849 void
1850 emit_group_move (rtx dst, rtx src)
1851 {
1852 int i;
1853
1854 gcc_assert (GET_CODE (src) == PARALLEL
1855 && GET_CODE (dst) == PARALLEL
1856 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1857
1858 /* Skip first entry if NULL. */
1859 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1860 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1861 XEXP (XVECEXP (src, 0, i), 0));
1862 }
1863
1864 /* Move a group of registers represented by a PARALLEL into pseudos. */
1865
1866 rtx
1867 emit_group_move_into_temps (rtx src)
1868 {
1869 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1870 int i;
1871
1872 for (i = 0; i < XVECLEN (src, 0); i++)
1873 {
1874 rtx e = XVECEXP (src, 0, i);
1875 rtx d = XEXP (e, 0);
1876
1877 if (d)
1878 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1879 RTVEC_ELT (vec, i) = e;
1880 }
1881
1882 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1883 }
1884
1885 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1886 where SRC is non-consecutive registers represented by a PARALLEL.
1887 SSIZE represents the total size of block ORIG_DST, or -1 if not
1888 known. */
1889
1890 void
1891 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1892 {
1893 rtx *tmps, dst;
1894 int start, finish, i;
1895 enum machine_mode m = GET_MODE (orig_dst);
1896
1897 gcc_assert (GET_CODE (src) == PARALLEL);
1898
1899 if (!SCALAR_INT_MODE_P (m)
1900 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1901 {
1902 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1903 if (imode == BLKmode)
1904 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
1905 else
1906 dst = gen_reg_rtx (imode);
1907 emit_group_store (dst, src, type, ssize);
1908 if (imode != BLKmode)
1909 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1910 emit_move_insn (orig_dst, dst);
1911 return;
1912 }
1913
1914 /* Check for a NULL entry, used to indicate that the parameter goes
1915 both on the stack and in registers. */
1916 if (XEXP (XVECEXP (src, 0, 0), 0))
1917 start = 0;
1918 else
1919 start = 1;
1920 finish = XVECLEN (src, 0);
1921
1922 tmps = XALLOCAVEC (rtx, finish);
1923
1924 /* Copy the (probable) hard regs into pseudos. */
1925 for (i = start; i < finish; i++)
1926 {
1927 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1928 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1929 {
1930 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1931 emit_move_insn (tmps[i], reg);
1932 }
1933 else
1934 tmps[i] = reg;
1935 }
1936
1937 /* If we won't be storing directly into memory, protect the real destination
1938 from strange tricks we might play. */
1939 dst = orig_dst;
1940 if (GET_CODE (dst) == PARALLEL)
1941 {
1942 rtx temp;
1943
1944 /* We can get a PARALLEL dst if there is a conditional expression in
1945 a return statement. In that case, the dst and src are the same,
1946 so no action is necessary. */
1947 if (rtx_equal_p (dst, src))
1948 return;
1949
1950 /* It is unclear if we can ever reach here, but we may as well handle
1951 it. Allocate a temporary, and split this into a store/load to/from
1952 the temporary. */
1953 temp = assign_stack_temp (GET_MODE (dst), ssize);
1954 emit_group_store (temp, src, type, ssize);
1955 emit_group_load (dst, temp, type, ssize);
1956 return;
1957 }
1958 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1959 {
1960 enum machine_mode outer = GET_MODE (dst);
1961 enum machine_mode inner;
1962 HOST_WIDE_INT bytepos;
1963 bool done = false;
1964 rtx temp;
1965
1966 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1967 dst = gen_reg_rtx (outer);
1968
1969 /* Make life a bit easier for combine. */
1970 /* If the first element of the vector is the low part
1971 of the destination mode, use a paradoxical subreg to
1972 initialize the destination. */
1973 if (start < finish)
1974 {
1975 inner = GET_MODE (tmps[start]);
1976 bytepos = subreg_lowpart_offset (inner, outer);
1977 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1978 {
1979 temp = simplify_gen_subreg (outer, tmps[start],
1980 inner, 0);
1981 if (temp)
1982 {
1983 emit_move_insn (dst, temp);
1984 done = true;
1985 start++;
1986 }
1987 }
1988 }
1989
1990 /* If the first element wasn't the low part, try the last. */
1991 if (!done
1992 && start < finish - 1)
1993 {
1994 inner = GET_MODE (tmps[finish - 1]);
1995 bytepos = subreg_lowpart_offset (inner, outer);
1996 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1997 {
1998 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1999 inner, 0);
2000 if (temp)
2001 {
2002 emit_move_insn (dst, temp);
2003 done = true;
2004 finish--;
2005 }
2006 }
2007 }
2008
2009 /* Otherwise, simply initialize the result to zero. */
2010 if (!done)
2011 emit_move_insn (dst, CONST0_RTX (outer));
2012 }
2013
2014 /* Process the pieces. */
2015 for (i = start; i < finish; i++)
2016 {
2017 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2018 enum machine_mode mode = GET_MODE (tmps[i]);
2019 unsigned int bytelen = GET_MODE_SIZE (mode);
2020 unsigned int adj_bytelen;
2021 rtx dest = dst;
2022
2023 /* Handle trailing fragments that run over the size of the struct. */
2024 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2025 adj_bytelen = ssize - bytepos;
2026 else
2027 adj_bytelen = bytelen;
2028
2029 if (GET_CODE (dst) == CONCAT)
2030 {
2031 if (bytepos + adj_bytelen
2032 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2033 dest = XEXP (dst, 0);
2034 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2035 {
2036 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2037 dest = XEXP (dst, 1);
2038 }
2039 else
2040 {
2041 enum machine_mode dest_mode = GET_MODE (dest);
2042 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2043
2044 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2045
2046 if (GET_MODE_ALIGNMENT (dest_mode)
2047 >= GET_MODE_ALIGNMENT (tmp_mode))
2048 {
2049 dest = assign_stack_temp (dest_mode,
2050 GET_MODE_SIZE (dest_mode));
2051 emit_move_insn (adjust_address (dest,
2052 tmp_mode,
2053 bytepos),
2054 tmps[i]);
2055 dst = dest;
2056 }
2057 else
2058 {
2059 dest = assign_stack_temp (tmp_mode,
2060 GET_MODE_SIZE (tmp_mode));
2061 emit_move_insn (dest, tmps[i]);
2062 dst = adjust_address (dest, dest_mode, bytepos);
2063 }
2064 break;
2065 }
2066 }
2067
2068 /* Handle trailing fragments that run over the size of the struct. */
2069 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2070 {
2071 /* store_bit_field always takes its value from the lsb.
2072 Move the fragment to the lsb if it's not already there. */
2073 if (
2074 #ifdef BLOCK_REG_PADDING
2075 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2076 == (BYTES_BIG_ENDIAN ? upward : downward)
2077 #else
2078 BYTES_BIG_ENDIAN
2079 #endif
2080 )
2081 {
2082 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2083 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2084 shift, tmps[i], 0);
2085 }
2086
2087 /* Make sure not to write past the end of the struct. */
2088 store_bit_field (dest,
2089 adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2090 bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1,
2091 VOIDmode, tmps[i]);
2092 }
2093
2094 /* Optimize the access just a bit. */
2095 else if (MEM_P (dest)
2096 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2097 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2098 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2099 && bytelen == GET_MODE_SIZE (mode))
2100 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2101
2102 else
2103 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2104 0, 0, mode, tmps[i]);
2105 }
2106
2107 /* Copy from the pseudo into the (probable) hard reg. */
2108 if (orig_dst != dst)
2109 emit_move_insn (orig_dst, dst);
2110 }
2111
2112 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2113 of the value stored in X. */
2114
2115 rtx
2116 maybe_emit_group_store (rtx x, tree type)
2117 {
2118 enum machine_mode mode = TYPE_MODE (type);
2119 gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode);
2120 if (GET_CODE (x) == PARALLEL)
2121 {
2122 rtx result = gen_reg_rtx (mode);
2123 emit_group_store (result, x, type, int_size_in_bytes (type));
2124 return result;
2125 }
2126 return x;
2127 }
2128
2129 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2130
2131 This is used on targets that return BLKmode values in registers. */
2132
2133 void
2134 copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
2135 {
2136 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2137 rtx src = NULL, dst = NULL;
2138 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2139 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2140 enum machine_mode mode = GET_MODE (srcreg);
2141 enum machine_mode tmode = GET_MODE (target);
2142 enum machine_mode copy_mode;
2143
2144 /* BLKmode registers created in the back-end shouldn't have survived. */
2145 gcc_assert (mode != BLKmode);
2146
2147 /* If the structure doesn't take up a whole number of words, see whether
2148 SRCREG is padded on the left or on the right. If it's on the left,
2149 set PADDING_CORRECTION to the number of bits to skip.
2150
2151 In most ABIs, the structure will be returned at the least end of
2152 the register, which translates to right padding on little-endian
2153 targets and left padding on big-endian targets. The opposite
2154 holds if the structure is returned at the most significant
2155 end of the register. */
2156 if (bytes % UNITS_PER_WORD != 0
2157 && (targetm.calls.return_in_msb (type)
2158 ? !BYTES_BIG_ENDIAN
2159 : BYTES_BIG_ENDIAN))
2160 padding_correction
2161 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2162
2163 /* We can use a single move if we have an exact mode for the size. */
2164 else if (MEM_P (target)
2165 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target))
2166 || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode))
2167 && bytes == GET_MODE_SIZE (mode))
2168 {
2169 emit_move_insn (adjust_address (target, mode, 0), srcreg);
2170 return;
2171 }
2172
2173 /* And if we additionally have the same mode for a register. */
2174 else if (REG_P (target)
2175 && GET_MODE (target) == mode
2176 && bytes == GET_MODE_SIZE (mode))
2177 {
2178 emit_move_insn (target, srcreg);
2179 return;
2180 }
2181
2182 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2183 into a new pseudo which is a full word. */
2184 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
2185 {
2186 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2187 mode = word_mode;
2188 }
2189
2190 /* Copy the structure BITSIZE bits at a time. If the target lives in
2191 memory, take care of not reading/writing past its end by selecting
2192 a copy mode suited to BITSIZE. This should always be possible given
2193 how it is computed.
2194
2195 If the target lives in register, make sure not to select a copy mode
2196 larger than the mode of the register.
2197
2198 We could probably emit more efficient code for machines which do not use
2199 strict alignment, but it doesn't seem worth the effort at the current
2200 time. */
2201
2202 copy_mode = word_mode;
2203 if (MEM_P (target))
2204 {
2205 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2206 if (mem_mode != BLKmode)
2207 copy_mode = mem_mode;
2208 }
2209 else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2210 copy_mode = tmode;
2211
2212 for (bitpos = 0, xbitpos = padding_correction;
2213 bitpos < bytes * BITS_PER_UNIT;
2214 bitpos += bitsize, xbitpos += bitsize)
2215 {
2216 /* We need a new source operand each time xbitpos is on a
2217 word boundary and when xbitpos == padding_correction
2218 (the first time through). */
2219 if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction)
2220 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode);
2221
2222 /* We need a new destination operand each time bitpos is on
2223 a word boundary. */
2224 if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2225 dst = target;
2226 else if (bitpos % BITS_PER_WORD == 0)
2227 dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode);
2228
2229 /* Use xbitpos for the source extraction (right justified) and
2230 bitpos for the destination store (left justified). */
2231 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2232 extract_bit_field (src, bitsize,
2233 xbitpos % BITS_PER_WORD, 1,
2234 NULL_RTX, copy_mode, copy_mode));
2235 }
2236 }
2237
2238 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2239 register if it contains any data, otherwise return null.
2240
2241 This is used on targets that return BLKmode values in registers. */
2242
2243 rtx
2244 copy_blkmode_to_reg (enum machine_mode mode, tree src)
2245 {
2246 int i, n_regs;
2247 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2248 unsigned int bitsize;
2249 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2250 enum machine_mode dst_mode;
2251
2252 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2253
2254 x = expand_normal (src);
2255
2256 bytes = int_size_in_bytes (TREE_TYPE (src));
2257 if (bytes == 0)
2258 return NULL_RTX;
2259
2260 /* If the structure doesn't take up a whole number of words, see
2261 whether the register value should be padded on the left or on
2262 the right. Set PADDING_CORRECTION to the number of padding
2263 bits needed on the left side.
2264
2265 In most ABIs, the structure will be returned at the least end of
2266 the register, which translates to right padding on little-endian
2267 targets and left padding on big-endian targets. The opposite
2268 holds if the structure is returned at the most significant
2269 end of the register. */
2270 if (bytes % UNITS_PER_WORD != 0
2271 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2272 ? !BYTES_BIG_ENDIAN
2273 : BYTES_BIG_ENDIAN))
2274 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2275 * BITS_PER_UNIT));
2276
2277 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2278 dst_words = XALLOCAVEC (rtx, n_regs);
2279 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2280
2281 /* Copy the structure BITSIZE bits at a time. */
2282 for (bitpos = 0, xbitpos = padding_correction;
2283 bitpos < bytes * BITS_PER_UNIT;
2284 bitpos += bitsize, xbitpos += bitsize)
2285 {
2286 /* We need a new destination pseudo each time xbitpos is
2287 on a word boundary and when xbitpos == padding_correction
2288 (the first time through). */
2289 if (xbitpos % BITS_PER_WORD == 0
2290 || xbitpos == padding_correction)
2291 {
2292 /* Generate an appropriate register. */
2293 dst_word = gen_reg_rtx (word_mode);
2294 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2295
2296 /* Clear the destination before we move anything into it. */
2297 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2298 }
2299
2300 /* We need a new source operand each time bitpos is on a word
2301 boundary. */
2302 if (bitpos % BITS_PER_WORD == 0)
2303 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2304
2305 /* Use bitpos for the source extraction (left justified) and
2306 xbitpos for the destination store (right justified). */
2307 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2308 0, 0, word_mode,
2309 extract_bit_field (src_word, bitsize,
2310 bitpos % BITS_PER_WORD, 1,
2311 NULL_RTX, word_mode, word_mode));
2312 }
2313
2314 if (mode == BLKmode)
2315 {
2316 /* Find the smallest integer mode large enough to hold the
2317 entire structure. */
2318 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2319 mode != VOIDmode;
2320 mode = GET_MODE_WIDER_MODE (mode))
2321 /* Have we found a large enough mode? */
2322 if (GET_MODE_SIZE (mode) >= bytes)
2323 break;
2324
2325 /* A suitable mode should have been found. */
2326 gcc_assert (mode != VOIDmode);
2327 }
2328
2329 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2330 dst_mode = word_mode;
2331 else
2332 dst_mode = mode;
2333 dst = gen_reg_rtx (dst_mode);
2334
2335 for (i = 0; i < n_regs; i++)
2336 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2337
2338 if (mode != dst_mode)
2339 dst = gen_lowpart (mode, dst);
2340
2341 return dst;
2342 }
2343
2344 /* Add a USE expression for REG to the (possibly empty) list pointed
2345 to by CALL_FUSAGE. REG must denote a hard register. */
2346
2347 void
2348 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2349 {
2350 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2351
2352 *call_fusage
2353 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2354 }
2355
2356 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2357 to by CALL_FUSAGE. REG must denote a hard register. */
2358
2359 void
2360 clobber_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2361 {
2362 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2363
2364 *call_fusage
2365 = gen_rtx_EXPR_LIST (mode, gen_rtx_CLOBBER (VOIDmode, reg), *call_fusage);
2366 }
2367
2368 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2369 starting at REGNO. All of these registers must be hard registers. */
2370
2371 void
2372 use_regs (rtx *call_fusage, int regno, int nregs)
2373 {
2374 int i;
2375
2376 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2377
2378 for (i = 0; i < nregs; i++)
2379 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2380 }
2381
2382 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2383 PARALLEL REGS. This is for calls that pass values in multiple
2384 non-contiguous locations. The Irix 6 ABI has examples of this. */
2385
2386 void
2387 use_group_regs (rtx *call_fusage, rtx regs)
2388 {
2389 int i;
2390
2391 for (i = 0; i < XVECLEN (regs, 0); i++)
2392 {
2393 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2394
2395 /* A NULL entry means the parameter goes both on the stack and in
2396 registers. This can also be a MEM for targets that pass values
2397 partially on the stack and partially in registers. */
2398 if (reg != 0 && REG_P (reg))
2399 use_reg (call_fusage, reg);
2400 }
2401 }
2402
2403 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2404 assigment and the code of the expresion on the RHS is CODE. Return
2405 NULL otherwise. */
2406
2407 static gimple
2408 get_def_for_expr (tree name, enum tree_code code)
2409 {
2410 gimple def_stmt;
2411
2412 if (TREE_CODE (name) != SSA_NAME)
2413 return NULL;
2414
2415 def_stmt = get_gimple_for_ssa_name (name);
2416 if (!def_stmt
2417 || gimple_assign_rhs_code (def_stmt) != code)
2418 return NULL;
2419
2420 return def_stmt;
2421 }
2422
2423 #ifdef HAVE_conditional_move
2424 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2425 assigment and the class of the expresion on the RHS is CLASS. Return
2426 NULL otherwise. */
2427
2428 static gimple
2429 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2430 {
2431 gimple def_stmt;
2432
2433 if (TREE_CODE (name) != SSA_NAME)
2434 return NULL;
2435
2436 def_stmt = get_gimple_for_ssa_name (name);
2437 if (!def_stmt
2438 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2439 return NULL;
2440
2441 return def_stmt;
2442 }
2443 #endif
2444 \f
2445
2446 /* Determine whether the LEN bytes generated by CONSTFUN can be
2447 stored to memory using several move instructions. CONSTFUNDATA is
2448 a pointer which will be passed as argument in every CONSTFUN call.
2449 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2450 a memset operation and false if it's a copy of a constant string.
2451 Return nonzero if a call to store_by_pieces should succeed. */
2452
2453 int
2454 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2455 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2456 void *constfundata, unsigned int align, bool memsetp)
2457 {
2458 unsigned HOST_WIDE_INT l;
2459 unsigned int max_size;
2460 HOST_WIDE_INT offset = 0;
2461 enum machine_mode mode;
2462 enum insn_code icode;
2463 int reverse;
2464 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2465 rtx cst ATTRIBUTE_UNUSED;
2466
2467 if (len == 0)
2468 return 1;
2469
2470 if (! (memsetp
2471 ? SET_BY_PIECES_P (len, align)
2472 : STORE_BY_PIECES_P (len, align)))
2473 return 0;
2474
2475 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2476
2477 /* We would first store what we can in the largest integer mode, then go to
2478 successively smaller modes. */
2479
2480 for (reverse = 0;
2481 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2482 reverse++)
2483 {
2484 l = len;
2485 max_size = STORE_MAX_PIECES + 1;
2486 while (max_size > 1 && l > 0)
2487 {
2488 mode = widest_int_mode_for_size (max_size);
2489
2490 if (mode == VOIDmode)
2491 break;
2492
2493 icode = optab_handler (mov_optab, mode);
2494 if (icode != CODE_FOR_nothing
2495 && align >= GET_MODE_ALIGNMENT (mode))
2496 {
2497 unsigned int size = GET_MODE_SIZE (mode);
2498
2499 while (l >= size)
2500 {
2501 if (reverse)
2502 offset -= size;
2503
2504 cst = (*constfun) (constfundata, offset, mode);
2505 if (!targetm.legitimate_constant_p (mode, cst))
2506 return 0;
2507
2508 if (!reverse)
2509 offset += size;
2510
2511 l -= size;
2512 }
2513 }
2514
2515 max_size = GET_MODE_SIZE (mode);
2516 }
2517
2518 /* The code above should have handled everything. */
2519 gcc_assert (!l);
2520 }
2521
2522 return 1;
2523 }
2524
2525 /* Generate several move instructions to store LEN bytes generated by
2526 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2527 pointer which will be passed as argument in every CONSTFUN call.
2528 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2529 a memset operation and false if it's a copy of a constant string.
2530 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2531 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2532 stpcpy. */
2533
2534 rtx
2535 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2536 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2537 void *constfundata, unsigned int align, bool memsetp, int endp)
2538 {
2539 enum machine_mode to_addr_mode = get_address_mode (to);
2540 struct store_by_pieces_d data;
2541
2542 if (len == 0)
2543 {
2544 gcc_assert (endp != 2);
2545 return to;
2546 }
2547
2548 gcc_assert (memsetp
2549 ? SET_BY_PIECES_P (len, align)
2550 : STORE_BY_PIECES_P (len, align));
2551 data.constfun = constfun;
2552 data.constfundata = constfundata;
2553 data.len = len;
2554 data.to = to;
2555 store_by_pieces_1 (&data, align);
2556 if (endp)
2557 {
2558 rtx to1;
2559
2560 gcc_assert (!data.reverse);
2561 if (data.autinc_to)
2562 {
2563 if (endp == 2)
2564 {
2565 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2566 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2567 else
2568 data.to_addr = copy_to_mode_reg (to_addr_mode,
2569 plus_constant (to_addr_mode,
2570 data.to_addr,
2571 -1));
2572 }
2573 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2574 data.offset);
2575 }
2576 else
2577 {
2578 if (endp == 2)
2579 --data.offset;
2580 to1 = adjust_address (data.to, QImode, data.offset);
2581 }
2582 return to1;
2583 }
2584 else
2585 return data.to;
2586 }
2587
2588 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2589 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2590
2591 static void
2592 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2593 {
2594 struct store_by_pieces_d data;
2595
2596 if (len == 0)
2597 return;
2598
2599 data.constfun = clear_by_pieces_1;
2600 data.constfundata = NULL;
2601 data.len = len;
2602 data.to = to;
2603 store_by_pieces_1 (&data, align);
2604 }
2605
2606 /* Callback routine for clear_by_pieces.
2607 Return const0_rtx unconditionally. */
2608
2609 static rtx
2610 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2611 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2612 enum machine_mode mode ATTRIBUTE_UNUSED)
2613 {
2614 return const0_rtx;
2615 }
2616
2617 /* Subroutine of clear_by_pieces and store_by_pieces.
2618 Generate several move instructions to store LEN bytes of block TO. (A MEM
2619 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2620
2621 static void
2622 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2623 unsigned int align ATTRIBUTE_UNUSED)
2624 {
2625 enum machine_mode to_addr_mode = get_address_mode (data->to);
2626 rtx to_addr = XEXP (data->to, 0);
2627 unsigned int max_size = STORE_MAX_PIECES + 1;
2628 enum insn_code icode;
2629
2630 data->offset = 0;
2631 data->to_addr = to_addr;
2632 data->autinc_to
2633 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2634 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2635
2636 data->explicit_inc_to = 0;
2637 data->reverse
2638 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2639 if (data->reverse)
2640 data->offset = data->len;
2641
2642 /* If storing requires more than two move insns,
2643 copy addresses to registers (to make displacements shorter)
2644 and use post-increment if available. */
2645 if (!data->autinc_to
2646 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2647 {
2648 /* Determine the main mode we'll be using.
2649 MODE might not be used depending on the definitions of the
2650 USE_* macros below. */
2651 enum machine_mode mode ATTRIBUTE_UNUSED
2652 = widest_int_mode_for_size (max_size);
2653
2654 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2655 {
2656 data->to_addr = copy_to_mode_reg (to_addr_mode,
2657 plus_constant (to_addr_mode,
2658 to_addr,
2659 data->len));
2660 data->autinc_to = 1;
2661 data->explicit_inc_to = -1;
2662 }
2663
2664 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2665 && ! data->autinc_to)
2666 {
2667 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2668 data->autinc_to = 1;
2669 data->explicit_inc_to = 1;
2670 }
2671
2672 if ( !data->autinc_to && CONSTANT_P (to_addr))
2673 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2674 }
2675
2676 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2677
2678 /* First store what we can in the largest integer mode, then go to
2679 successively smaller modes. */
2680
2681 while (max_size > 1 && data->len > 0)
2682 {
2683 enum machine_mode mode = widest_int_mode_for_size (max_size);
2684
2685 if (mode == VOIDmode)
2686 break;
2687
2688 icode = optab_handler (mov_optab, mode);
2689 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2690 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2691
2692 max_size = GET_MODE_SIZE (mode);
2693 }
2694
2695 /* The code above should have handled everything. */
2696 gcc_assert (!data->len);
2697 }
2698
2699 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2700 with move instructions for mode MODE. GENFUN is the gen_... function
2701 to make a move insn for that mode. DATA has all the other info. */
2702
2703 static void
2704 store_by_pieces_2 (insn_gen_fn genfun, machine_mode mode,
2705 struct store_by_pieces_d *data)
2706 {
2707 unsigned int size = GET_MODE_SIZE (mode);
2708 rtx to1, cst;
2709
2710 while (data->len >= size)
2711 {
2712 if (data->reverse)
2713 data->offset -= size;
2714
2715 if (data->autinc_to)
2716 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2717 data->offset);
2718 else
2719 to1 = adjust_address (data->to, mode, data->offset);
2720
2721 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2722 emit_insn (gen_add2_insn (data->to_addr,
2723 gen_int_mode (-(HOST_WIDE_INT) size,
2724 GET_MODE (data->to_addr))));
2725
2726 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2727 emit_insn ((*genfun) (to1, cst));
2728
2729 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2730 emit_insn (gen_add2_insn (data->to_addr,
2731 gen_int_mode (size,
2732 GET_MODE (data->to_addr))));
2733
2734 if (! data->reverse)
2735 data->offset += size;
2736
2737 data->len -= size;
2738 }
2739 }
2740 \f
2741 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2742 its length in bytes. */
2743
2744 rtx
2745 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2746 unsigned int expected_align, HOST_WIDE_INT expected_size,
2747 unsigned HOST_WIDE_INT min_size,
2748 unsigned HOST_WIDE_INT max_size,
2749 unsigned HOST_WIDE_INT probable_max_size)
2750 {
2751 enum machine_mode mode = GET_MODE (object);
2752 unsigned int align;
2753
2754 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2755
2756 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2757 just move a zero. Otherwise, do this a piece at a time. */
2758 if (mode != BLKmode
2759 && CONST_INT_P (size)
2760 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2761 {
2762 rtx zero = CONST0_RTX (mode);
2763 if (zero != NULL)
2764 {
2765 emit_move_insn (object, zero);
2766 return NULL;
2767 }
2768
2769 if (COMPLEX_MODE_P (mode))
2770 {
2771 zero = CONST0_RTX (GET_MODE_INNER (mode));
2772 if (zero != NULL)
2773 {
2774 write_complex_part (object, zero, 0);
2775 write_complex_part (object, zero, 1);
2776 return NULL;
2777 }
2778 }
2779 }
2780
2781 if (size == const0_rtx)
2782 return NULL;
2783
2784 align = MEM_ALIGN (object);
2785
2786 if (CONST_INT_P (size)
2787 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2788 clear_by_pieces (object, INTVAL (size), align);
2789 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2790 expected_align, expected_size,
2791 min_size, max_size, probable_max_size))
2792 ;
2793 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2794 return set_storage_via_libcall (object, size, const0_rtx,
2795 method == BLOCK_OP_TAILCALL);
2796 else
2797 gcc_unreachable ();
2798
2799 return NULL;
2800 }
2801
2802 rtx
2803 clear_storage (rtx object, rtx size, enum block_op_methods method)
2804 {
2805 unsigned HOST_WIDE_INT max, min = 0;
2806 if (GET_CODE (size) == CONST_INT)
2807 min = max = UINTVAL (size);
2808 else
2809 max = GET_MODE_MASK (GET_MODE (size));
2810 return clear_storage_hints (object, size, method, 0, -1, min, max, max);
2811 }
2812
2813
2814 /* A subroutine of clear_storage. Expand a call to memset.
2815 Return the return value of memset, 0 otherwise. */
2816
2817 rtx
2818 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2819 {
2820 tree call_expr, fn, object_tree, size_tree, val_tree;
2821 enum machine_mode size_mode;
2822 rtx retval;
2823
2824 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2825 place those into new pseudos into a VAR_DECL and use them later. */
2826
2827 object = copy_addr_to_reg (XEXP (object, 0));
2828
2829 size_mode = TYPE_MODE (sizetype);
2830 size = convert_to_mode (size_mode, size, 1);
2831 size = copy_to_mode_reg (size_mode, size);
2832
2833 /* It is incorrect to use the libcall calling conventions to call
2834 memset in this context. This could be a user call to memset and
2835 the user may wish to examine the return value from memset. For
2836 targets where libcalls and normal calls have different conventions
2837 for returning pointers, we could end up generating incorrect code. */
2838
2839 object_tree = make_tree (ptr_type_node, object);
2840 if (!CONST_INT_P (val))
2841 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2842 size_tree = make_tree (sizetype, size);
2843 val_tree = make_tree (integer_type_node, val);
2844
2845 fn = clear_storage_libcall_fn (true);
2846 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2847 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2848
2849 retval = expand_normal (call_expr);
2850
2851 return retval;
2852 }
2853
2854 /* A subroutine of set_storage_via_libcall. Create the tree node
2855 for the function we use for block clears. */
2856
2857 tree block_clear_fn;
2858
2859 void
2860 init_block_clear_fn (const char *asmspec)
2861 {
2862 if (!block_clear_fn)
2863 {
2864 tree fn, args;
2865
2866 fn = get_identifier ("memset");
2867 args = build_function_type_list (ptr_type_node, ptr_type_node,
2868 integer_type_node, sizetype,
2869 NULL_TREE);
2870
2871 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2872 DECL_EXTERNAL (fn) = 1;
2873 TREE_PUBLIC (fn) = 1;
2874 DECL_ARTIFICIAL (fn) = 1;
2875 TREE_NOTHROW (fn) = 1;
2876 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2877 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2878
2879 block_clear_fn = fn;
2880 }
2881
2882 if (asmspec)
2883 set_user_assembler_name (block_clear_fn, asmspec);
2884 }
2885
2886 static tree
2887 clear_storage_libcall_fn (int for_call)
2888 {
2889 static bool emitted_extern;
2890
2891 if (!block_clear_fn)
2892 init_block_clear_fn (NULL);
2893
2894 if (for_call && !emitted_extern)
2895 {
2896 emitted_extern = true;
2897 make_decl_rtl (block_clear_fn);
2898 }
2899
2900 return block_clear_fn;
2901 }
2902 \f
2903 /* Expand a setmem pattern; return true if successful. */
2904
2905 bool
2906 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2907 unsigned int expected_align, HOST_WIDE_INT expected_size,
2908 unsigned HOST_WIDE_INT min_size,
2909 unsigned HOST_WIDE_INT max_size,
2910 unsigned HOST_WIDE_INT probable_max_size)
2911 {
2912 /* Try the most limited insn first, because there's no point
2913 including more than one in the machine description unless
2914 the more limited one has some advantage. */
2915
2916 enum machine_mode mode;
2917
2918 if (expected_align < align)
2919 expected_align = align;
2920 if (expected_size != -1)
2921 {
2922 if ((unsigned HOST_WIDE_INT)expected_size > max_size)
2923 expected_size = max_size;
2924 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
2925 expected_size = min_size;
2926 }
2927
2928 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2929 mode = GET_MODE_WIDER_MODE (mode))
2930 {
2931 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2932
2933 if (code != CODE_FOR_nothing
2934 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
2935 here because if SIZE is less than the mode mask, as it is
2936 returned by the macro, it will definitely be less than the
2937 actual mode mask. Since SIZE is within the Pmode address
2938 space, we limit MODE to Pmode. */
2939 && ((CONST_INT_P (size)
2940 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2941 <= (GET_MODE_MASK (mode) >> 1)))
2942 || max_size <= (GET_MODE_MASK (mode) >> 1)
2943 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
2944 {
2945 struct expand_operand ops[9];
2946 unsigned int nops;
2947
2948 nops = insn_data[(int) code].n_generator_args;
2949 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
2950
2951 create_fixed_operand (&ops[0], object);
2952 /* The check above guarantees that this size conversion is valid. */
2953 create_convert_operand_to (&ops[1], size, mode, true);
2954 create_convert_operand_from (&ops[2], val, byte_mode, true);
2955 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2956 if (nops >= 6)
2957 {
2958 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2959 create_integer_operand (&ops[5], expected_size);
2960 }
2961 if (nops >= 8)
2962 {
2963 create_integer_operand (&ops[6], min_size);
2964 /* If we can not represent the maximal size,
2965 make parameter NULL. */
2966 if ((HOST_WIDE_INT) max_size != -1)
2967 create_integer_operand (&ops[7], max_size);
2968 else
2969 create_fixed_operand (&ops[7], NULL);
2970 }
2971 if (nops == 9)
2972 {
2973 /* If we can not represent the maximal size,
2974 make parameter NULL. */
2975 if ((HOST_WIDE_INT) probable_max_size != -1)
2976 create_integer_operand (&ops[8], probable_max_size);
2977 else
2978 create_fixed_operand (&ops[8], NULL);
2979 }
2980 if (maybe_expand_insn (code, nops, ops))
2981 return true;
2982 }
2983 }
2984
2985 return false;
2986 }
2987
2988 \f
2989 /* Write to one of the components of the complex value CPLX. Write VAL to
2990 the real part if IMAG_P is false, and the imaginary part if its true. */
2991
2992 static void
2993 write_complex_part (rtx cplx, rtx val, bool imag_p)
2994 {
2995 enum machine_mode cmode;
2996 enum machine_mode imode;
2997 unsigned ibitsize;
2998
2999 if (GET_CODE (cplx) == CONCAT)
3000 {
3001 emit_move_insn (XEXP (cplx, imag_p), val);
3002 return;
3003 }
3004
3005 cmode = GET_MODE (cplx);
3006 imode = GET_MODE_INNER (cmode);
3007 ibitsize = GET_MODE_BITSIZE (imode);
3008
3009 /* For MEMs simplify_gen_subreg may generate an invalid new address
3010 because, e.g., the original address is considered mode-dependent
3011 by the target, which restricts simplify_subreg from invoking
3012 adjust_address_nv. Instead of preparing fallback support for an
3013 invalid address, we call adjust_address_nv directly. */
3014 if (MEM_P (cplx))
3015 {
3016 emit_move_insn (adjust_address_nv (cplx, imode,
3017 imag_p ? GET_MODE_SIZE (imode) : 0),
3018 val);
3019 return;
3020 }
3021
3022 /* If the sub-object is at least word sized, then we know that subregging
3023 will work. This special case is important, since store_bit_field
3024 wants to operate on integer modes, and there's rarely an OImode to
3025 correspond to TCmode. */
3026 if (ibitsize >= BITS_PER_WORD
3027 /* For hard regs we have exact predicates. Assume we can split
3028 the original object if it spans an even number of hard regs.
3029 This special case is important for SCmode on 64-bit platforms
3030 where the natural size of floating-point regs is 32-bit. */
3031 || (REG_P (cplx)
3032 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3033 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
3034 {
3035 rtx part = simplify_gen_subreg (imode, cplx, cmode,
3036 imag_p ? GET_MODE_SIZE (imode) : 0);
3037 if (part)
3038 {
3039 emit_move_insn (part, val);
3040 return;
3041 }
3042 else
3043 /* simplify_gen_subreg may fail for sub-word MEMs. */
3044 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3045 }
3046
3047 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
3048 }
3049
3050 /* Extract one of the components of the complex value CPLX. Extract the
3051 real part if IMAG_P is false, and the imaginary part if it's true. */
3052
3053 static rtx
3054 read_complex_part (rtx cplx, bool imag_p)
3055 {
3056 enum machine_mode cmode, imode;
3057 unsigned ibitsize;
3058
3059 if (GET_CODE (cplx) == CONCAT)
3060 return XEXP (cplx, imag_p);
3061
3062 cmode = GET_MODE (cplx);
3063 imode = GET_MODE_INNER (cmode);
3064 ibitsize = GET_MODE_BITSIZE (imode);
3065
3066 /* Special case reads from complex constants that got spilled to memory. */
3067 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
3068 {
3069 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
3070 if (decl && TREE_CODE (decl) == COMPLEX_CST)
3071 {
3072 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
3073 if (CONSTANT_CLASS_P (part))
3074 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
3075 }
3076 }
3077
3078 /* For MEMs simplify_gen_subreg may generate an invalid new address
3079 because, e.g., the original address is considered mode-dependent
3080 by the target, which restricts simplify_subreg from invoking
3081 adjust_address_nv. Instead of preparing fallback support for an
3082 invalid address, we call adjust_address_nv directly. */
3083 if (MEM_P (cplx))
3084 return adjust_address_nv (cplx, imode,
3085 imag_p ? GET_MODE_SIZE (imode) : 0);
3086
3087 /* If the sub-object is at least word sized, then we know that subregging
3088 will work. This special case is important, since extract_bit_field
3089 wants to operate on integer modes, and there's rarely an OImode to
3090 correspond to TCmode. */
3091 if (ibitsize >= BITS_PER_WORD
3092 /* For hard regs we have exact predicates. Assume we can split
3093 the original object if it spans an even number of hard regs.
3094 This special case is important for SCmode on 64-bit platforms
3095 where the natural size of floating-point regs is 32-bit. */
3096 || (REG_P (cplx)
3097 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3098 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
3099 {
3100 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
3101 imag_p ? GET_MODE_SIZE (imode) : 0);
3102 if (ret)
3103 return ret;
3104 else
3105 /* simplify_gen_subreg may fail for sub-word MEMs. */
3106 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3107 }
3108
3109 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
3110 true, NULL_RTX, imode, imode);
3111 }
3112 \f
3113 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3114 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3115 represented in NEW_MODE. If FORCE is true, this will never happen, as
3116 we'll force-create a SUBREG if needed. */
3117
3118 static rtx
3119 emit_move_change_mode (enum machine_mode new_mode,
3120 enum machine_mode old_mode, rtx x, bool force)
3121 {
3122 rtx ret;
3123
3124 if (push_operand (x, GET_MODE (x)))
3125 {
3126 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3127 MEM_COPY_ATTRIBUTES (ret, x);
3128 }
3129 else if (MEM_P (x))
3130 {
3131 /* We don't have to worry about changing the address since the
3132 size in bytes is supposed to be the same. */
3133 if (reload_in_progress)
3134 {
3135 /* Copy the MEM to change the mode and move any
3136 substitutions from the old MEM to the new one. */
3137 ret = adjust_address_nv (x, new_mode, 0);
3138 copy_replacements (x, ret);
3139 }
3140 else
3141 ret = adjust_address (x, new_mode, 0);
3142 }
3143 else
3144 {
3145 /* Note that we do want simplify_subreg's behavior of validating
3146 that the new mode is ok for a hard register. If we were to use
3147 simplify_gen_subreg, we would create the subreg, but would
3148 probably run into the target not being able to implement it. */
3149 /* Except, of course, when FORCE is true, when this is exactly what
3150 we want. Which is needed for CCmodes on some targets. */
3151 if (force)
3152 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3153 else
3154 ret = simplify_subreg (new_mode, x, old_mode, 0);
3155 }
3156
3157 return ret;
3158 }
3159
3160 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3161 an integer mode of the same size as MODE. Returns the instruction
3162 emitted, or NULL if such a move could not be generated. */
3163
3164 static rtx_insn *
3165 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3166 {
3167 enum machine_mode imode;
3168 enum insn_code code;
3169
3170 /* There must exist a mode of the exact size we require. */
3171 imode = int_mode_for_mode (mode);
3172 if (imode == BLKmode)
3173 return NULL;
3174
3175 /* The target must support moves in this mode. */
3176 code = optab_handler (mov_optab, imode);
3177 if (code == CODE_FOR_nothing)
3178 return NULL;
3179
3180 x = emit_move_change_mode (imode, mode, x, force);
3181 if (x == NULL_RTX)
3182 return NULL;
3183 y = emit_move_change_mode (imode, mode, y, force);
3184 if (y == NULL_RTX)
3185 return NULL;
3186 return emit_insn (GEN_FCN (code) (x, y));
3187 }
3188
3189 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3190 Return an equivalent MEM that does not use an auto-increment. */
3191
3192 rtx
3193 emit_move_resolve_push (enum machine_mode mode, rtx x)
3194 {
3195 enum rtx_code code = GET_CODE (XEXP (x, 0));
3196 HOST_WIDE_INT adjust;
3197 rtx temp;
3198
3199 adjust = GET_MODE_SIZE (mode);
3200 #ifdef PUSH_ROUNDING
3201 adjust = PUSH_ROUNDING (adjust);
3202 #endif
3203 if (code == PRE_DEC || code == POST_DEC)
3204 adjust = -adjust;
3205 else if (code == PRE_MODIFY || code == POST_MODIFY)
3206 {
3207 rtx expr = XEXP (XEXP (x, 0), 1);
3208 HOST_WIDE_INT val;
3209
3210 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3211 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3212 val = INTVAL (XEXP (expr, 1));
3213 if (GET_CODE (expr) == MINUS)
3214 val = -val;
3215 gcc_assert (adjust == val || adjust == -val);
3216 adjust = val;
3217 }
3218
3219 /* Do not use anti_adjust_stack, since we don't want to update
3220 stack_pointer_delta. */
3221 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3222 gen_int_mode (adjust, Pmode), stack_pointer_rtx,
3223 0, OPTAB_LIB_WIDEN);
3224 if (temp != stack_pointer_rtx)
3225 emit_move_insn (stack_pointer_rtx, temp);
3226
3227 switch (code)
3228 {
3229 case PRE_INC:
3230 case PRE_DEC:
3231 case PRE_MODIFY:
3232 temp = stack_pointer_rtx;
3233 break;
3234 case POST_INC:
3235 case POST_DEC:
3236 case POST_MODIFY:
3237 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3238 break;
3239 default:
3240 gcc_unreachable ();
3241 }
3242
3243 return replace_equiv_address (x, temp);
3244 }
3245
3246 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3247 X is known to satisfy push_operand, and MODE is known to be complex.
3248 Returns the last instruction emitted. */
3249
3250 rtx_insn *
3251 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3252 {
3253 enum machine_mode submode = GET_MODE_INNER (mode);
3254 bool imag_first;
3255
3256 #ifdef PUSH_ROUNDING
3257 unsigned int submodesize = GET_MODE_SIZE (submode);
3258
3259 /* In case we output to the stack, but the size is smaller than the
3260 machine can push exactly, we need to use move instructions. */
3261 if (PUSH_ROUNDING (submodesize) != submodesize)
3262 {
3263 x = emit_move_resolve_push (mode, x);
3264 return emit_move_insn (x, y);
3265 }
3266 #endif
3267
3268 /* Note that the real part always precedes the imag part in memory
3269 regardless of machine's endianness. */
3270 switch (GET_CODE (XEXP (x, 0)))
3271 {
3272 case PRE_DEC:
3273 case POST_DEC:
3274 imag_first = true;
3275 break;
3276 case PRE_INC:
3277 case POST_INC:
3278 imag_first = false;
3279 break;
3280 default:
3281 gcc_unreachable ();
3282 }
3283
3284 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3285 read_complex_part (y, imag_first));
3286 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3287 read_complex_part (y, !imag_first));
3288 }
3289
3290 /* A subroutine of emit_move_complex. Perform the move from Y to X
3291 via two moves of the parts. Returns the last instruction emitted. */
3292
3293 rtx_insn *
3294 emit_move_complex_parts (rtx x, rtx y)
3295 {
3296 /* Show the output dies here. This is necessary for SUBREGs
3297 of pseudos since we cannot track their lifetimes correctly;
3298 hard regs shouldn't appear here except as return values. */
3299 if (!reload_completed && !reload_in_progress
3300 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3301 emit_clobber (x);
3302
3303 write_complex_part (x, read_complex_part (y, false), false);
3304 write_complex_part (x, read_complex_part (y, true), true);
3305
3306 return get_last_insn ();
3307 }
3308
3309 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3310 MODE is known to be complex. Returns the last instruction emitted. */
3311
3312 static rtx_insn *
3313 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3314 {
3315 bool try_int;
3316
3317 /* Need to take special care for pushes, to maintain proper ordering
3318 of the data, and possibly extra padding. */
3319 if (push_operand (x, mode))
3320 return emit_move_complex_push (mode, x, y);
3321
3322 /* See if we can coerce the target into moving both values at once, except
3323 for floating point where we favor moving as parts if this is easy. */
3324 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3325 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing
3326 && !(REG_P (x)
3327 && HARD_REGISTER_P (x)
3328 && hard_regno_nregs[REGNO (x)][mode] == 1)
3329 && !(REG_P (y)
3330 && HARD_REGISTER_P (y)
3331 && hard_regno_nregs[REGNO (y)][mode] == 1))
3332 try_int = false;
3333 /* Not possible if the values are inherently not adjacent. */
3334 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3335 try_int = false;
3336 /* Is possible if both are registers (or subregs of registers). */
3337 else if (register_operand (x, mode) && register_operand (y, mode))
3338 try_int = true;
3339 /* If one of the operands is a memory, and alignment constraints
3340 are friendly enough, we may be able to do combined memory operations.
3341 We do not attempt this if Y is a constant because that combination is
3342 usually better with the by-parts thing below. */
3343 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3344 && (!STRICT_ALIGNMENT
3345 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3346 try_int = true;
3347 else
3348 try_int = false;
3349
3350 if (try_int)
3351 {
3352 rtx_insn *ret;
3353
3354 /* For memory to memory moves, optimal behavior can be had with the
3355 existing block move logic. */
3356 if (MEM_P (x) && MEM_P (y))
3357 {
3358 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3359 BLOCK_OP_NO_LIBCALL);
3360 return get_last_insn ();
3361 }
3362
3363 ret = emit_move_via_integer (mode, x, y, true);
3364 if (ret)
3365 return ret;
3366 }
3367
3368 return emit_move_complex_parts (x, y);
3369 }
3370
3371 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3372 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3373
3374 static rtx_insn *
3375 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3376 {
3377 rtx_insn *ret;
3378
3379 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3380 if (mode != CCmode)
3381 {
3382 enum insn_code code = optab_handler (mov_optab, CCmode);
3383 if (code != CODE_FOR_nothing)
3384 {
3385 x = emit_move_change_mode (CCmode, mode, x, true);
3386 y = emit_move_change_mode (CCmode, mode, y, true);
3387 return emit_insn (GEN_FCN (code) (x, y));
3388 }
3389 }
3390
3391 /* Otherwise, find the MODE_INT mode of the same width. */
3392 ret = emit_move_via_integer (mode, x, y, false);
3393 gcc_assert (ret != NULL);
3394 return ret;
3395 }
3396
3397 /* Return true if word I of OP lies entirely in the
3398 undefined bits of a paradoxical subreg. */
3399
3400 static bool
3401 undefined_operand_subword_p (const_rtx op, int i)
3402 {
3403 enum machine_mode innermode, innermostmode;
3404 int offset;
3405 if (GET_CODE (op) != SUBREG)
3406 return false;
3407 innermode = GET_MODE (op);
3408 innermostmode = GET_MODE (SUBREG_REG (op));
3409 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3410 /* The SUBREG_BYTE represents offset, as if the value were stored in
3411 memory, except for a paradoxical subreg where we define
3412 SUBREG_BYTE to be 0; undo this exception as in
3413 simplify_subreg. */
3414 if (SUBREG_BYTE (op) == 0
3415 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3416 {
3417 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3418 if (WORDS_BIG_ENDIAN)
3419 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3420 if (BYTES_BIG_ENDIAN)
3421 offset += difference % UNITS_PER_WORD;
3422 }
3423 if (offset >= GET_MODE_SIZE (innermostmode)
3424 || offset <= -GET_MODE_SIZE (word_mode))
3425 return true;
3426 return false;
3427 }
3428
3429 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3430 MODE is any multi-word or full-word mode that lacks a move_insn
3431 pattern. Note that you will get better code if you define such
3432 patterns, even if they must turn into multiple assembler instructions. */
3433
3434 static rtx_insn *
3435 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3436 {
3437 rtx_insn *last_insn = 0;
3438 rtx_insn *seq;
3439 rtx inner;
3440 bool need_clobber;
3441 int i;
3442
3443 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3444
3445 /* If X is a push on the stack, do the push now and replace
3446 X with a reference to the stack pointer. */
3447 if (push_operand (x, mode))
3448 x = emit_move_resolve_push (mode, x);
3449
3450 /* If we are in reload, see if either operand is a MEM whose address
3451 is scheduled for replacement. */
3452 if (reload_in_progress && MEM_P (x)
3453 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3454 x = replace_equiv_address_nv (x, inner);
3455 if (reload_in_progress && MEM_P (y)
3456 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3457 y = replace_equiv_address_nv (y, inner);
3458
3459 start_sequence ();
3460
3461 need_clobber = false;
3462 for (i = 0;
3463 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3464 i++)
3465 {
3466 rtx xpart = operand_subword (x, i, 1, mode);
3467 rtx ypart;
3468
3469 /* Do not generate code for a move if it would come entirely
3470 from the undefined bits of a paradoxical subreg. */
3471 if (undefined_operand_subword_p (y, i))
3472 continue;
3473
3474 ypart = operand_subword (y, i, 1, mode);
3475
3476 /* If we can't get a part of Y, put Y into memory if it is a
3477 constant. Otherwise, force it into a register. Then we must
3478 be able to get a part of Y. */
3479 if (ypart == 0 && CONSTANT_P (y))
3480 {
3481 y = use_anchored_address (force_const_mem (mode, y));
3482 ypart = operand_subword (y, i, 1, mode);
3483 }
3484 else if (ypart == 0)
3485 ypart = operand_subword_force (y, i, mode);
3486
3487 gcc_assert (xpart && ypart);
3488
3489 need_clobber |= (GET_CODE (xpart) == SUBREG);
3490
3491 last_insn = emit_move_insn (xpart, ypart);
3492 }
3493
3494 seq = get_insns ();
3495 end_sequence ();
3496
3497 /* Show the output dies here. This is necessary for SUBREGs
3498 of pseudos since we cannot track their lifetimes correctly;
3499 hard regs shouldn't appear here except as return values.
3500 We never want to emit such a clobber after reload. */
3501 if (x != y
3502 && ! (reload_in_progress || reload_completed)
3503 && need_clobber != 0)
3504 emit_clobber (x);
3505
3506 emit_insn (seq);
3507
3508 return last_insn;
3509 }
3510
3511 /* Low level part of emit_move_insn.
3512 Called just like emit_move_insn, but assumes X and Y
3513 are basically valid. */
3514
3515 rtx_insn *
3516 emit_move_insn_1 (rtx x, rtx y)
3517 {
3518 enum machine_mode mode = GET_MODE (x);
3519 enum insn_code code;
3520
3521 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3522
3523 code = optab_handler (mov_optab, mode);
3524 if (code != CODE_FOR_nothing)
3525 return emit_insn (GEN_FCN (code) (x, y));
3526
3527 /* Expand complex moves by moving real part and imag part. */
3528 if (COMPLEX_MODE_P (mode))
3529 return emit_move_complex (mode, x, y);
3530
3531 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3532 || ALL_FIXED_POINT_MODE_P (mode))
3533 {
3534 rtx_insn *result = emit_move_via_integer (mode, x, y, true);
3535
3536 /* If we can't find an integer mode, use multi words. */
3537 if (result)
3538 return result;
3539 else
3540 return emit_move_multi_word (mode, x, y);
3541 }
3542
3543 if (GET_MODE_CLASS (mode) == MODE_CC)
3544 return emit_move_ccmode (mode, x, y);
3545
3546 /* Try using a move pattern for the corresponding integer mode. This is
3547 only safe when simplify_subreg can convert MODE constants into integer
3548 constants. At present, it can only do this reliably if the value
3549 fits within a HOST_WIDE_INT. */
3550 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3551 {
3552 rtx_insn *ret = emit_move_via_integer (mode, x, y, lra_in_progress);
3553
3554 if (ret)
3555 {
3556 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0)
3557 return ret;
3558 }
3559 }
3560
3561 return emit_move_multi_word (mode, x, y);
3562 }
3563
3564 /* Generate code to copy Y into X.
3565 Both Y and X must have the same mode, except that
3566 Y can be a constant with VOIDmode.
3567 This mode cannot be BLKmode; use emit_block_move for that.
3568
3569 Return the last instruction emitted. */
3570
3571 rtx_insn *
3572 emit_move_insn (rtx x, rtx y)
3573 {
3574 enum machine_mode mode = GET_MODE (x);
3575 rtx y_cst = NULL_RTX;
3576 rtx_insn *last_insn;
3577 rtx set;
3578
3579 gcc_assert (mode != BLKmode
3580 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3581
3582 if (CONSTANT_P (y))
3583 {
3584 if (optimize
3585 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3586 && (last_insn = compress_float_constant (x, y)))
3587 return last_insn;
3588
3589 y_cst = y;
3590
3591 if (!targetm.legitimate_constant_p (mode, y))
3592 {
3593 y = force_const_mem (mode, y);
3594
3595 /* If the target's cannot_force_const_mem prevented the spill,
3596 assume that the target's move expanders will also take care
3597 of the non-legitimate constant. */
3598 if (!y)
3599 y = y_cst;
3600 else
3601 y = use_anchored_address (y);
3602 }
3603 }
3604
3605 /* If X or Y are memory references, verify that their addresses are valid
3606 for the machine. */
3607 if (MEM_P (x)
3608 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3609 MEM_ADDR_SPACE (x))
3610 && ! push_operand (x, GET_MODE (x))))
3611 x = validize_mem (x);
3612
3613 if (MEM_P (y)
3614 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3615 MEM_ADDR_SPACE (y)))
3616 y = validize_mem (y);
3617
3618 gcc_assert (mode != BLKmode);
3619
3620 last_insn = emit_move_insn_1 (x, y);
3621
3622 if (y_cst && REG_P (x)
3623 && (set = single_set (last_insn)) != NULL_RTX
3624 && SET_DEST (set) == x
3625 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3626 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3627
3628 return last_insn;
3629 }
3630
3631 /* If Y is representable exactly in a narrower mode, and the target can
3632 perform the extension directly from constant or memory, then emit the
3633 move as an extension. */
3634
3635 static rtx_insn *
3636 compress_float_constant (rtx x, rtx y)
3637 {
3638 enum machine_mode dstmode = GET_MODE (x);
3639 enum machine_mode orig_srcmode = GET_MODE (y);
3640 enum machine_mode srcmode;
3641 REAL_VALUE_TYPE r;
3642 int oldcost, newcost;
3643 bool speed = optimize_insn_for_speed_p ();
3644
3645 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3646
3647 if (targetm.legitimate_constant_p (dstmode, y))
3648 oldcost = set_src_cost (y, speed);
3649 else
3650 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3651
3652 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3653 srcmode != orig_srcmode;
3654 srcmode = GET_MODE_WIDER_MODE (srcmode))
3655 {
3656 enum insn_code ic;
3657 rtx trunc_y;
3658 rtx_insn *last_insn;
3659
3660 /* Skip if the target can't extend this way. */
3661 ic = can_extend_p (dstmode, srcmode, 0);
3662 if (ic == CODE_FOR_nothing)
3663 continue;
3664
3665 /* Skip if the narrowed value isn't exact. */
3666 if (! exact_real_truncate (srcmode, &r))
3667 continue;
3668
3669 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3670
3671 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3672 {
3673 /* Skip if the target needs extra instructions to perform
3674 the extension. */
3675 if (!insn_operand_matches (ic, 1, trunc_y))
3676 continue;
3677 /* This is valid, but may not be cheaper than the original. */
3678 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3679 speed);
3680 if (oldcost < newcost)
3681 continue;
3682 }
3683 else if (float_extend_from_mem[dstmode][srcmode])
3684 {
3685 trunc_y = force_const_mem (srcmode, trunc_y);
3686 /* This is valid, but may not be cheaper than the original. */
3687 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3688 speed);
3689 if (oldcost < newcost)
3690 continue;
3691 trunc_y = validize_mem (trunc_y);
3692 }
3693 else
3694 continue;
3695
3696 /* For CSE's benefit, force the compressed constant pool entry
3697 into a new pseudo. This constant may be used in different modes,
3698 and if not, combine will put things back together for us. */
3699 trunc_y = force_reg (srcmode, trunc_y);
3700
3701 /* If x is a hard register, perform the extension into a pseudo,
3702 so that e.g. stack realignment code is aware of it. */
3703 rtx target = x;
3704 if (REG_P (x) && HARD_REGISTER_P (x))
3705 target = gen_reg_rtx (dstmode);
3706
3707 emit_unop_insn (ic, target, trunc_y, UNKNOWN);
3708 last_insn = get_last_insn ();
3709
3710 if (REG_P (target))
3711 set_unique_reg_note (last_insn, REG_EQUAL, y);
3712
3713 if (target != x)
3714 return emit_move_insn (x, target);
3715 return last_insn;
3716 }
3717
3718 return NULL;
3719 }
3720 \f
3721 /* Pushing data onto the stack. */
3722
3723 /* Push a block of length SIZE (perhaps variable)
3724 and return an rtx to address the beginning of the block.
3725 The value may be virtual_outgoing_args_rtx.
3726
3727 EXTRA is the number of bytes of padding to push in addition to SIZE.
3728 BELOW nonzero means this padding comes at low addresses;
3729 otherwise, the padding comes at high addresses. */
3730
3731 rtx
3732 push_block (rtx size, int extra, int below)
3733 {
3734 rtx temp;
3735
3736 size = convert_modes (Pmode, ptr_mode, size, 1);
3737 if (CONSTANT_P (size))
3738 anti_adjust_stack (plus_constant (Pmode, size, extra));
3739 else if (REG_P (size) && extra == 0)
3740 anti_adjust_stack (size);
3741 else
3742 {
3743 temp = copy_to_mode_reg (Pmode, size);
3744 if (extra != 0)
3745 temp = expand_binop (Pmode, add_optab, temp,
3746 gen_int_mode (extra, Pmode),
3747 temp, 0, OPTAB_LIB_WIDEN);
3748 anti_adjust_stack (temp);
3749 }
3750
3751 #ifndef STACK_GROWS_DOWNWARD
3752 if (0)
3753 #else
3754 if (1)
3755 #endif
3756 {
3757 temp = virtual_outgoing_args_rtx;
3758 if (extra != 0 && below)
3759 temp = plus_constant (Pmode, temp, extra);
3760 }
3761 else
3762 {
3763 if (CONST_INT_P (size))
3764 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
3765 -INTVAL (size) - (below ? 0 : extra));
3766 else if (extra != 0 && !below)
3767 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3768 negate_rtx (Pmode, plus_constant (Pmode, size,
3769 extra)));
3770 else
3771 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3772 negate_rtx (Pmode, size));
3773 }
3774
3775 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3776 }
3777
3778 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3779
3780 static rtx
3781 mem_autoinc_base (rtx mem)
3782 {
3783 if (MEM_P (mem))
3784 {
3785 rtx addr = XEXP (mem, 0);
3786 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3787 return XEXP (addr, 0);
3788 }
3789 return NULL;
3790 }
3791
3792 /* A utility routine used here, in reload, and in try_split. The insns
3793 after PREV up to and including LAST are known to adjust the stack,
3794 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3795 placing notes as appropriate. PREV may be NULL, indicating the
3796 entire insn sequence prior to LAST should be scanned.
3797
3798 The set of allowed stack pointer modifications is small:
3799 (1) One or more auto-inc style memory references (aka pushes),
3800 (2) One or more addition/subtraction with the SP as destination,
3801 (3) A single move insn with the SP as destination,
3802 (4) A call_pop insn,
3803 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3804
3805 Insns in the sequence that do not modify the SP are ignored,
3806 except for noreturn calls.
3807
3808 The return value is the amount of adjustment that can be trivially
3809 verified, via immediate operand or auto-inc. If the adjustment
3810 cannot be trivially extracted, the return value is INT_MIN. */
3811
3812 HOST_WIDE_INT
3813 find_args_size_adjust (rtx insn)
3814 {
3815 rtx dest, set, pat;
3816 int i;
3817
3818 pat = PATTERN (insn);
3819 set = NULL;
3820
3821 /* Look for a call_pop pattern. */
3822 if (CALL_P (insn))
3823 {
3824 /* We have to allow non-call_pop patterns for the case
3825 of emit_single_push_insn of a TLS address. */
3826 if (GET_CODE (pat) != PARALLEL)
3827 return 0;
3828
3829 /* All call_pop have a stack pointer adjust in the parallel.
3830 The call itself is always first, and the stack adjust is
3831 usually last, so search from the end. */
3832 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3833 {
3834 set = XVECEXP (pat, 0, i);
3835 if (GET_CODE (set) != SET)
3836 continue;
3837 dest = SET_DEST (set);
3838 if (dest == stack_pointer_rtx)
3839 break;
3840 }
3841 /* We'd better have found the stack pointer adjust. */
3842 if (i == 0)
3843 return 0;
3844 /* Fall through to process the extracted SET and DEST
3845 as if it was a standalone insn. */
3846 }
3847 else if (GET_CODE (pat) == SET)
3848 set = pat;
3849 else if ((set = single_set (insn)) != NULL)
3850 ;
3851 else if (GET_CODE (pat) == PARALLEL)
3852 {
3853 /* ??? Some older ports use a parallel with a stack adjust
3854 and a store for a PUSH_ROUNDING pattern, rather than a
3855 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3856 /* ??? See h8300 and m68k, pushqi1. */
3857 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3858 {
3859 set = XVECEXP (pat, 0, i);
3860 if (GET_CODE (set) != SET)
3861 continue;
3862 dest = SET_DEST (set);
3863 if (dest == stack_pointer_rtx)
3864 break;
3865
3866 /* We do not expect an auto-inc of the sp in the parallel. */
3867 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3868 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3869 != stack_pointer_rtx);
3870 }
3871 if (i < 0)
3872 return 0;
3873 }
3874 else
3875 return 0;
3876
3877 dest = SET_DEST (set);
3878
3879 /* Look for direct modifications of the stack pointer. */
3880 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3881 {
3882 /* Look for a trivial adjustment, otherwise assume nothing. */
3883 /* Note that the SPU restore_stack_block pattern refers to
3884 the stack pointer in V4SImode. Consider that non-trivial. */
3885 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3886 && GET_CODE (SET_SRC (set)) == PLUS
3887 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3888 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3889 return INTVAL (XEXP (SET_SRC (set), 1));
3890 /* ??? Reload can generate no-op moves, which will be cleaned
3891 up later. Recognize it and continue searching. */
3892 else if (rtx_equal_p (dest, SET_SRC (set)))
3893 return 0;
3894 else
3895 return HOST_WIDE_INT_MIN;
3896 }
3897 else
3898 {
3899 rtx mem, addr;
3900
3901 /* Otherwise only think about autoinc patterns. */
3902 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3903 {
3904 mem = dest;
3905 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3906 != stack_pointer_rtx);
3907 }
3908 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3909 mem = SET_SRC (set);
3910 else
3911 return 0;
3912
3913 addr = XEXP (mem, 0);
3914 switch (GET_CODE (addr))
3915 {
3916 case PRE_INC:
3917 case POST_INC:
3918 return GET_MODE_SIZE (GET_MODE (mem));
3919 case PRE_DEC:
3920 case POST_DEC:
3921 return -GET_MODE_SIZE (GET_MODE (mem));
3922 case PRE_MODIFY:
3923 case POST_MODIFY:
3924 addr = XEXP (addr, 1);
3925 gcc_assert (GET_CODE (addr) == PLUS);
3926 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3927 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3928 return INTVAL (XEXP (addr, 1));
3929 default:
3930 gcc_unreachable ();
3931 }
3932 }
3933 }
3934
3935 int
3936 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3937 {
3938 int args_size = end_args_size;
3939 bool saw_unknown = false;
3940 rtx insn;
3941
3942 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3943 {
3944 HOST_WIDE_INT this_delta;
3945
3946 if (!NONDEBUG_INSN_P (insn))
3947 continue;
3948
3949 this_delta = find_args_size_adjust (insn);
3950 if (this_delta == 0)
3951 {
3952 if (!CALL_P (insn)
3953 || ACCUMULATE_OUTGOING_ARGS
3954 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3955 continue;
3956 }
3957
3958 gcc_assert (!saw_unknown);
3959 if (this_delta == HOST_WIDE_INT_MIN)
3960 saw_unknown = true;
3961
3962 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3963 #ifdef STACK_GROWS_DOWNWARD
3964 this_delta = -(unsigned HOST_WIDE_INT) this_delta;
3965 #endif
3966 args_size -= this_delta;
3967 }
3968
3969 return saw_unknown ? INT_MIN : args_size;
3970 }
3971
3972 #ifdef PUSH_ROUNDING
3973 /* Emit single push insn. */
3974
3975 static void
3976 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3977 {
3978 rtx dest_addr;
3979 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3980 rtx dest;
3981 enum insn_code icode;
3982
3983 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3984 /* If there is push pattern, use it. Otherwise try old way of throwing
3985 MEM representing push operation to move expander. */
3986 icode = optab_handler (push_optab, mode);
3987 if (icode != CODE_FOR_nothing)
3988 {
3989 struct expand_operand ops[1];
3990
3991 create_input_operand (&ops[0], x, mode);
3992 if (maybe_expand_insn (icode, 1, ops))
3993 return;
3994 }
3995 if (GET_MODE_SIZE (mode) == rounded_size)
3996 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3997 /* If we are to pad downward, adjust the stack pointer first and
3998 then store X into the stack location using an offset. This is
3999 because emit_move_insn does not know how to pad; it does not have
4000 access to type. */
4001 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
4002 {
4003 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
4004 HOST_WIDE_INT offset;
4005
4006 emit_move_insn (stack_pointer_rtx,
4007 expand_binop (Pmode,
4008 #ifdef STACK_GROWS_DOWNWARD
4009 sub_optab,
4010 #else
4011 add_optab,
4012 #endif
4013 stack_pointer_rtx,
4014 gen_int_mode (rounded_size, Pmode),
4015 NULL_RTX, 0, OPTAB_LIB_WIDEN));
4016
4017 offset = (HOST_WIDE_INT) padding_size;
4018 #ifdef STACK_GROWS_DOWNWARD
4019 if (STACK_PUSH_CODE == POST_DEC)
4020 /* We have already decremented the stack pointer, so get the
4021 previous value. */
4022 offset += (HOST_WIDE_INT) rounded_size;
4023 #else
4024 if (STACK_PUSH_CODE == POST_INC)
4025 /* We have already incremented the stack pointer, so get the
4026 previous value. */
4027 offset -= (HOST_WIDE_INT) rounded_size;
4028 #endif
4029 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4030 gen_int_mode (offset, Pmode));
4031 }
4032 else
4033 {
4034 #ifdef STACK_GROWS_DOWNWARD
4035 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4036 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4037 gen_int_mode (-(HOST_WIDE_INT) rounded_size,
4038 Pmode));
4039 #else
4040 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4041 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4042 gen_int_mode (rounded_size, Pmode));
4043 #endif
4044 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
4045 }
4046
4047 dest = gen_rtx_MEM (mode, dest_addr);
4048
4049 if (type != 0)
4050 {
4051 set_mem_attributes (dest, type, 1);
4052
4053 if (cfun->tail_call_marked)
4054 /* Function incoming arguments may overlap with sibling call
4055 outgoing arguments and we cannot allow reordering of reads
4056 from function arguments with stores to outgoing arguments
4057 of sibling calls. */
4058 set_mem_alias_set (dest, 0);
4059 }
4060 emit_move_insn (dest, x);
4061 }
4062
4063 /* Emit and annotate a single push insn. */
4064
4065 static void
4066 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
4067 {
4068 int delta, old_delta = stack_pointer_delta;
4069 rtx_insn *prev = get_last_insn ();
4070 rtx_insn *last;
4071
4072 emit_single_push_insn_1 (mode, x, type);
4073
4074 last = get_last_insn ();
4075
4076 /* Notice the common case where we emitted exactly one insn. */
4077 if (PREV_INSN (last) == prev)
4078 {
4079 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
4080 return;
4081 }
4082
4083 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
4084 gcc_assert (delta == INT_MIN || delta == old_delta);
4085 }
4086 #endif
4087
4088 /* Generate code to push X onto the stack, assuming it has mode MODE and
4089 type TYPE.
4090 MODE is redundant except when X is a CONST_INT (since they don't
4091 carry mode info).
4092 SIZE is an rtx for the size of data to be copied (in bytes),
4093 needed only if X is BLKmode.
4094
4095 ALIGN (in bits) is maximum alignment we can assume.
4096
4097 If PARTIAL and REG are both nonzero, then copy that many of the first
4098 bytes of X into registers starting with REG, and push the rest of X.
4099 The amount of space pushed is decreased by PARTIAL bytes.
4100 REG must be a hard register in this case.
4101 If REG is zero but PARTIAL is not, take any all others actions for an
4102 argument partially in registers, but do not actually load any
4103 registers.
4104
4105 EXTRA is the amount in bytes of extra space to leave next to this arg.
4106 This is ignored if an argument block has already been allocated.
4107
4108 On a machine that lacks real push insns, ARGS_ADDR is the address of
4109 the bottom of the argument block for this call. We use indexing off there
4110 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4111 argument block has not been preallocated.
4112
4113 ARGS_SO_FAR is the size of args previously pushed for this call.
4114
4115 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4116 for arguments passed in registers. If nonzero, it will be the number
4117 of bytes required. */
4118
4119 void
4120 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
4121 unsigned int align, int partial, rtx reg, int extra,
4122 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
4123 rtx alignment_pad)
4124 {
4125 rtx xinner;
4126 enum direction stack_direction
4127 #ifdef STACK_GROWS_DOWNWARD
4128 = downward;
4129 #else
4130 = upward;
4131 #endif
4132
4133 /* Decide where to pad the argument: `downward' for below,
4134 `upward' for above, or `none' for don't pad it.
4135 Default is below for small data on big-endian machines; else above. */
4136 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
4137
4138 /* Invert direction if stack is post-decrement.
4139 FIXME: why? */
4140 if (STACK_PUSH_CODE == POST_DEC)
4141 if (where_pad != none)
4142 where_pad = (where_pad == downward ? upward : downward);
4143
4144 xinner = x;
4145
4146 if (mode == BLKmode
4147 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4148 {
4149 /* Copy a block into the stack, entirely or partially. */
4150
4151 rtx temp;
4152 int used;
4153 int offset;
4154 int skip;
4155
4156 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4157 used = partial - offset;
4158
4159 if (mode != BLKmode)
4160 {
4161 /* A value is to be stored in an insufficiently aligned
4162 stack slot; copy via a suitably aligned slot if
4163 necessary. */
4164 size = GEN_INT (GET_MODE_SIZE (mode));
4165 if (!MEM_P (xinner))
4166 {
4167 temp = assign_temp (type, 1, 1);
4168 emit_move_insn (temp, xinner);
4169 xinner = temp;
4170 }
4171 }
4172
4173 gcc_assert (size);
4174
4175 /* USED is now the # of bytes we need not copy to the stack
4176 because registers will take care of them. */
4177
4178 if (partial != 0)
4179 xinner = adjust_address (xinner, BLKmode, used);
4180
4181 /* If the partial register-part of the arg counts in its stack size,
4182 skip the part of stack space corresponding to the registers.
4183 Otherwise, start copying to the beginning of the stack space,
4184 by setting SKIP to 0. */
4185 skip = (reg_parm_stack_space == 0) ? 0 : used;
4186
4187 #ifdef PUSH_ROUNDING
4188 /* Do it with several push insns if that doesn't take lots of insns
4189 and if there is no difficulty with push insns that skip bytes
4190 on the stack for alignment purposes. */
4191 if (args_addr == 0
4192 && PUSH_ARGS
4193 && CONST_INT_P (size)
4194 && skip == 0
4195 && MEM_ALIGN (xinner) >= align
4196 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
4197 /* Here we avoid the case of a structure whose weak alignment
4198 forces many pushes of a small amount of data,
4199 and such small pushes do rounding that causes trouble. */
4200 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4201 || align >= BIGGEST_ALIGNMENT
4202 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4203 == (align / BITS_PER_UNIT)))
4204 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4205 {
4206 /* Push padding now if padding above and stack grows down,
4207 or if padding below and stack grows up.
4208 But if space already allocated, this has already been done. */
4209 if (extra && args_addr == 0
4210 && where_pad != none && where_pad != stack_direction)
4211 anti_adjust_stack (GEN_INT (extra));
4212
4213 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4214 }
4215 else
4216 #endif /* PUSH_ROUNDING */
4217 {
4218 rtx target;
4219
4220 /* Otherwise make space on the stack and copy the data
4221 to the address of that space. */
4222
4223 /* Deduct words put into registers from the size we must copy. */
4224 if (partial != 0)
4225 {
4226 if (CONST_INT_P (size))
4227 size = GEN_INT (INTVAL (size) - used);
4228 else
4229 size = expand_binop (GET_MODE (size), sub_optab, size,
4230 gen_int_mode (used, GET_MODE (size)),
4231 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4232 }
4233
4234 /* Get the address of the stack space.
4235 In this case, we do not deal with EXTRA separately.
4236 A single stack adjust will do. */
4237 if (! args_addr)
4238 {
4239 temp = push_block (size, extra, where_pad == downward);
4240 extra = 0;
4241 }
4242 else if (CONST_INT_P (args_so_far))
4243 temp = memory_address (BLKmode,
4244 plus_constant (Pmode, args_addr,
4245 skip + INTVAL (args_so_far)));
4246 else
4247 temp = memory_address (BLKmode,
4248 plus_constant (Pmode,
4249 gen_rtx_PLUS (Pmode,
4250 args_addr,
4251 args_so_far),
4252 skip));
4253
4254 if (!ACCUMULATE_OUTGOING_ARGS)
4255 {
4256 /* If the source is referenced relative to the stack pointer,
4257 copy it to another register to stabilize it. We do not need
4258 to do this if we know that we won't be changing sp. */
4259
4260 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4261 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4262 temp = copy_to_reg (temp);
4263 }
4264
4265 target = gen_rtx_MEM (BLKmode, temp);
4266
4267 /* We do *not* set_mem_attributes here, because incoming arguments
4268 may overlap with sibling call outgoing arguments and we cannot
4269 allow reordering of reads from function arguments with stores
4270 to outgoing arguments of sibling calls. We do, however, want
4271 to record the alignment of the stack slot. */
4272 /* ALIGN may well be better aligned than TYPE, e.g. due to
4273 PARM_BOUNDARY. Assume the caller isn't lying. */
4274 set_mem_align (target, align);
4275
4276 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4277 }
4278 }
4279 else if (partial > 0)
4280 {
4281 /* Scalar partly in registers. */
4282
4283 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4284 int i;
4285 int not_stack;
4286 /* # bytes of start of argument
4287 that we must make space for but need not store. */
4288 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4289 int args_offset = INTVAL (args_so_far);
4290 int skip;
4291
4292 /* Push padding now if padding above and stack grows down,
4293 or if padding below and stack grows up.
4294 But if space already allocated, this has already been done. */
4295 if (extra && args_addr == 0
4296 && where_pad != none && where_pad != stack_direction)
4297 anti_adjust_stack (GEN_INT (extra));
4298
4299 /* If we make space by pushing it, we might as well push
4300 the real data. Otherwise, we can leave OFFSET nonzero
4301 and leave the space uninitialized. */
4302 if (args_addr == 0)
4303 offset = 0;
4304
4305 /* Now NOT_STACK gets the number of words that we don't need to
4306 allocate on the stack. Convert OFFSET to words too. */
4307 not_stack = (partial - offset) / UNITS_PER_WORD;
4308 offset /= UNITS_PER_WORD;
4309
4310 /* If the partial register-part of the arg counts in its stack size,
4311 skip the part of stack space corresponding to the registers.
4312 Otherwise, start copying to the beginning of the stack space,
4313 by setting SKIP to 0. */
4314 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4315
4316 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4317 x = validize_mem (force_const_mem (mode, x));
4318
4319 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4320 SUBREGs of such registers are not allowed. */
4321 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4322 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4323 x = copy_to_reg (x);
4324
4325 /* Loop over all the words allocated on the stack for this arg. */
4326 /* We can do it by words, because any scalar bigger than a word
4327 has a size a multiple of a word. */
4328 for (i = size - 1; i >= not_stack; i--)
4329 if (i >= not_stack + offset)
4330 emit_push_insn (operand_subword_force (x, i, mode),
4331 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4332 0, args_addr,
4333 GEN_INT (args_offset + ((i - not_stack + skip)
4334 * UNITS_PER_WORD)),
4335 reg_parm_stack_space, alignment_pad);
4336 }
4337 else
4338 {
4339 rtx addr;
4340 rtx dest;
4341
4342 /* Push padding now if padding above and stack grows down,
4343 or if padding below and stack grows up.
4344 But if space already allocated, this has already been done. */
4345 if (extra && args_addr == 0
4346 && where_pad != none && where_pad != stack_direction)
4347 anti_adjust_stack (GEN_INT (extra));
4348
4349 #ifdef PUSH_ROUNDING
4350 if (args_addr == 0 && PUSH_ARGS)
4351 emit_single_push_insn (mode, x, type);
4352 else
4353 #endif
4354 {
4355 if (CONST_INT_P (args_so_far))
4356 addr
4357 = memory_address (mode,
4358 plus_constant (Pmode, args_addr,
4359 INTVAL (args_so_far)));
4360 else
4361 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4362 args_so_far));
4363 dest = gen_rtx_MEM (mode, addr);
4364
4365 /* We do *not* set_mem_attributes here, because incoming arguments
4366 may overlap with sibling call outgoing arguments and we cannot
4367 allow reordering of reads from function arguments with stores
4368 to outgoing arguments of sibling calls. We do, however, want
4369 to record the alignment of the stack slot. */
4370 /* ALIGN may well be better aligned than TYPE, e.g. due to
4371 PARM_BOUNDARY. Assume the caller isn't lying. */
4372 set_mem_align (dest, align);
4373
4374 emit_move_insn (dest, x);
4375 }
4376 }
4377
4378 /* If part should go in registers, copy that part
4379 into the appropriate registers. Do this now, at the end,
4380 since mem-to-mem copies above may do function calls. */
4381 if (partial > 0 && reg != 0)
4382 {
4383 /* Handle calls that pass values in multiple non-contiguous locations.
4384 The Irix 6 ABI has examples of this. */
4385 if (GET_CODE (reg) == PARALLEL)
4386 emit_group_load (reg, x, type, -1);
4387 else
4388 {
4389 gcc_assert (partial % UNITS_PER_WORD == 0);
4390 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4391 }
4392 }
4393
4394 if (extra && args_addr == 0 && where_pad == stack_direction)
4395 anti_adjust_stack (GEN_INT (extra));
4396
4397 if (alignment_pad && args_addr == 0)
4398 anti_adjust_stack (alignment_pad);
4399 }
4400 \f
4401 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4402 operations. */
4403
4404 static rtx
4405 get_subtarget (rtx x)
4406 {
4407 return (optimize
4408 || x == 0
4409 /* Only registers can be subtargets. */
4410 || !REG_P (x)
4411 /* Don't use hard regs to avoid extending their life. */
4412 || REGNO (x) < FIRST_PSEUDO_REGISTER
4413 ? 0 : x);
4414 }
4415
4416 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4417 FIELD is a bitfield. Returns true if the optimization was successful,
4418 and there's nothing else to do. */
4419
4420 static bool
4421 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4422 unsigned HOST_WIDE_INT bitpos,
4423 unsigned HOST_WIDE_INT bitregion_start,
4424 unsigned HOST_WIDE_INT bitregion_end,
4425 enum machine_mode mode1, rtx str_rtx,
4426 tree to, tree src)
4427 {
4428 enum machine_mode str_mode = GET_MODE (str_rtx);
4429 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4430 tree op0, op1;
4431 rtx value, result;
4432 optab binop;
4433 gimple srcstmt;
4434 enum tree_code code;
4435
4436 if (mode1 != VOIDmode
4437 || bitsize >= BITS_PER_WORD
4438 || str_bitsize > BITS_PER_WORD
4439 || TREE_SIDE_EFFECTS (to)
4440 || TREE_THIS_VOLATILE (to))
4441 return false;
4442
4443 STRIP_NOPS (src);
4444 if (TREE_CODE (src) != SSA_NAME)
4445 return false;
4446 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4447 return false;
4448
4449 srcstmt = get_gimple_for_ssa_name (src);
4450 if (!srcstmt
4451 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4452 return false;
4453
4454 code = gimple_assign_rhs_code (srcstmt);
4455
4456 op0 = gimple_assign_rhs1 (srcstmt);
4457
4458 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4459 to find its initialization. Hopefully the initialization will
4460 be from a bitfield load. */
4461 if (TREE_CODE (op0) == SSA_NAME)
4462 {
4463 gimple op0stmt = get_gimple_for_ssa_name (op0);
4464
4465 /* We want to eventually have OP0 be the same as TO, which
4466 should be a bitfield. */
4467 if (!op0stmt
4468 || !is_gimple_assign (op0stmt)
4469 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4470 return false;
4471 op0 = gimple_assign_rhs1 (op0stmt);
4472 }
4473
4474 op1 = gimple_assign_rhs2 (srcstmt);
4475
4476 if (!operand_equal_p (to, op0, 0))
4477 return false;
4478
4479 if (MEM_P (str_rtx))
4480 {
4481 unsigned HOST_WIDE_INT offset1;
4482
4483 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4484 str_mode = word_mode;
4485 str_mode = get_best_mode (bitsize, bitpos,
4486 bitregion_start, bitregion_end,
4487 MEM_ALIGN (str_rtx), str_mode, 0);
4488 if (str_mode == VOIDmode)
4489 return false;
4490 str_bitsize = GET_MODE_BITSIZE (str_mode);
4491
4492 offset1 = bitpos;
4493 bitpos %= str_bitsize;
4494 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4495 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4496 }
4497 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4498 return false;
4499
4500 /* If the bit field covers the whole REG/MEM, store_field
4501 will likely generate better code. */
4502 if (bitsize >= str_bitsize)
4503 return false;
4504
4505 /* We can't handle fields split across multiple entities. */
4506 if (bitpos + bitsize > str_bitsize)
4507 return false;
4508
4509 if (BYTES_BIG_ENDIAN)
4510 bitpos = str_bitsize - bitpos - bitsize;
4511
4512 switch (code)
4513 {
4514 case PLUS_EXPR:
4515 case MINUS_EXPR:
4516 /* For now, just optimize the case of the topmost bitfield
4517 where we don't need to do any masking and also
4518 1 bit bitfields where xor can be used.
4519 We might win by one instruction for the other bitfields
4520 too if insv/extv instructions aren't used, so that
4521 can be added later. */
4522 if (bitpos + bitsize != str_bitsize
4523 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4524 break;
4525
4526 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4527 value = convert_modes (str_mode,
4528 TYPE_MODE (TREE_TYPE (op1)), value,
4529 TYPE_UNSIGNED (TREE_TYPE (op1)));
4530
4531 /* We may be accessing data outside the field, which means
4532 we can alias adjacent data. */
4533 if (MEM_P (str_rtx))
4534 {
4535 str_rtx = shallow_copy_rtx (str_rtx);
4536 set_mem_alias_set (str_rtx, 0);
4537 set_mem_expr (str_rtx, 0);
4538 }
4539
4540 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4541 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4542 {
4543 value = expand_and (str_mode, value, const1_rtx, NULL);
4544 binop = xor_optab;
4545 }
4546 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4547 result = expand_binop (str_mode, binop, str_rtx,
4548 value, str_rtx, 1, OPTAB_WIDEN);
4549 if (result != str_rtx)
4550 emit_move_insn (str_rtx, result);
4551 return true;
4552
4553 case BIT_IOR_EXPR:
4554 case BIT_XOR_EXPR:
4555 if (TREE_CODE (op1) != INTEGER_CST)
4556 break;
4557 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4558 value = convert_modes (str_mode,
4559 TYPE_MODE (TREE_TYPE (op1)), value,
4560 TYPE_UNSIGNED (TREE_TYPE (op1)));
4561
4562 /* We may be accessing data outside the field, which means
4563 we can alias adjacent data. */
4564 if (MEM_P (str_rtx))
4565 {
4566 str_rtx = shallow_copy_rtx (str_rtx);
4567 set_mem_alias_set (str_rtx, 0);
4568 set_mem_expr (str_rtx, 0);
4569 }
4570
4571 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4572 if (bitpos + bitsize != str_bitsize)
4573 {
4574 rtx mask = gen_int_mode (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1,
4575 str_mode);
4576 value = expand_and (str_mode, value, mask, NULL_RTX);
4577 }
4578 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4579 result = expand_binop (str_mode, binop, str_rtx,
4580 value, str_rtx, 1, OPTAB_WIDEN);
4581 if (result != str_rtx)
4582 emit_move_insn (str_rtx, result);
4583 return true;
4584
4585 default:
4586 break;
4587 }
4588
4589 return false;
4590 }
4591
4592 /* In the C++ memory model, consecutive bit fields in a structure are
4593 considered one memory location.
4594
4595 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4596 returns the bit range of consecutive bits in which this COMPONENT_REF
4597 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4598 and *OFFSET may be adjusted in the process.
4599
4600 If the access does not need to be restricted, 0 is returned in both
4601 *BITSTART and *BITEND. */
4602
4603 static void
4604 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4605 unsigned HOST_WIDE_INT *bitend,
4606 tree exp,
4607 HOST_WIDE_INT *bitpos,
4608 tree *offset)
4609 {
4610 HOST_WIDE_INT bitoffset;
4611 tree field, repr;
4612
4613 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4614
4615 field = TREE_OPERAND (exp, 1);
4616 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4617 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4618 need to limit the range we can access. */
4619 if (!repr)
4620 {
4621 *bitstart = *bitend = 0;
4622 return;
4623 }
4624
4625 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4626 part of a larger bit field, then the representative does not serve any
4627 useful purpose. This can occur in Ada. */
4628 if (handled_component_p (TREE_OPERAND (exp, 0)))
4629 {
4630 enum machine_mode rmode;
4631 HOST_WIDE_INT rbitsize, rbitpos;
4632 tree roffset;
4633 int unsignedp;
4634 int volatilep = 0;
4635 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4636 &roffset, &rmode, &unsignedp, &volatilep, false);
4637 if ((rbitpos % BITS_PER_UNIT) != 0)
4638 {
4639 *bitstart = *bitend = 0;
4640 return;
4641 }
4642 }
4643
4644 /* Compute the adjustment to bitpos from the offset of the field
4645 relative to the representative. DECL_FIELD_OFFSET of field and
4646 repr are the same by construction if they are not constants,
4647 see finish_bitfield_layout. */
4648 if (tree_fits_uhwi_p (DECL_FIELD_OFFSET (field))
4649 && tree_fits_uhwi_p (DECL_FIELD_OFFSET (repr)))
4650 bitoffset = (tree_to_uhwi (DECL_FIELD_OFFSET (field))
4651 - tree_to_uhwi (DECL_FIELD_OFFSET (repr))) * BITS_PER_UNIT;
4652 else
4653 bitoffset = 0;
4654 bitoffset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
4655 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr)));
4656
4657 /* If the adjustment is larger than bitpos, we would have a negative bit
4658 position for the lower bound and this may wreak havoc later. Adjust
4659 offset and bitpos to make the lower bound non-negative in that case. */
4660 if (bitoffset > *bitpos)
4661 {
4662 HOST_WIDE_INT adjust = bitoffset - *bitpos;
4663 gcc_assert ((adjust % BITS_PER_UNIT) == 0);
4664
4665 *bitpos += adjust;
4666 if (*offset == NULL_TREE)
4667 *offset = size_int (-adjust / BITS_PER_UNIT);
4668 else
4669 *offset
4670 = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));
4671 *bitstart = 0;
4672 }
4673 else
4674 *bitstart = *bitpos - bitoffset;
4675
4676 *bitend = *bitstart + tree_to_uhwi (DECL_SIZE (repr)) - 1;
4677 }
4678
4679 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4680 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4681 DECL_RTL was not set yet, return NORTL. */
4682
4683 static inline bool
4684 addr_expr_of_non_mem_decl_p_1 (tree addr, bool nortl)
4685 {
4686 if (TREE_CODE (addr) != ADDR_EXPR)
4687 return false;
4688
4689 tree base = TREE_OPERAND (addr, 0);
4690
4691 if (!DECL_P (base)
4692 || TREE_ADDRESSABLE (base)
4693 || DECL_MODE (base) == BLKmode)
4694 return false;
4695
4696 if (!DECL_RTL_SET_P (base))
4697 return nortl;
4698
4699 return (!MEM_P (DECL_RTL (base)));
4700 }
4701
4702 /* Returns true if the MEM_REF REF refers to an object that does not
4703 reside in memory and has non-BLKmode. */
4704
4705 static inline bool
4706 mem_ref_refers_to_non_mem_p (tree ref)
4707 {
4708 tree base = TREE_OPERAND (ref, 0);
4709 return addr_expr_of_non_mem_decl_p_1 (base, false);
4710 }
4711
4712 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4713 is true, try generating a nontemporal store. */
4714
4715 void
4716 expand_assignment (tree to, tree from, bool nontemporal)
4717 {
4718 rtx to_rtx = 0;
4719 rtx result;
4720 enum machine_mode mode;
4721 unsigned int align;
4722 enum insn_code icode;
4723
4724 /* Don't crash if the lhs of the assignment was erroneous. */
4725 if (TREE_CODE (to) == ERROR_MARK)
4726 {
4727 expand_normal (from);
4728 return;
4729 }
4730
4731 /* Optimize away no-op moves without side-effects. */
4732 if (operand_equal_p (to, from, 0))
4733 return;
4734
4735 /* Handle misaligned stores. */
4736 mode = TYPE_MODE (TREE_TYPE (to));
4737 if ((TREE_CODE (to) == MEM_REF
4738 || TREE_CODE (to) == TARGET_MEM_REF)
4739 && mode != BLKmode
4740 && !mem_ref_refers_to_non_mem_p (to)
4741 && ((align = get_object_alignment (to))
4742 < GET_MODE_ALIGNMENT (mode))
4743 && (((icode = optab_handler (movmisalign_optab, mode))
4744 != CODE_FOR_nothing)
4745 || SLOW_UNALIGNED_ACCESS (mode, align)))
4746 {
4747 rtx reg, mem;
4748
4749 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4750 reg = force_not_mem (reg);
4751 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4752
4753 if (icode != CODE_FOR_nothing)
4754 {
4755 struct expand_operand ops[2];
4756
4757 create_fixed_operand (&ops[0], mem);
4758 create_input_operand (&ops[1], reg, mode);
4759 /* The movmisalign<mode> pattern cannot fail, else the assignment
4760 would silently be omitted. */
4761 expand_insn (icode, 2, ops);
4762 }
4763 else
4764 store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg);
4765 return;
4766 }
4767
4768 /* Assignment of a structure component needs special treatment
4769 if the structure component's rtx is not simply a MEM.
4770 Assignment of an array element at a constant index, and assignment of
4771 an array element in an unaligned packed structure field, has the same
4772 problem. Same for (partially) storing into a non-memory object. */
4773 if (handled_component_p (to)
4774 || (TREE_CODE (to) == MEM_REF
4775 && mem_ref_refers_to_non_mem_p (to))
4776 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4777 {
4778 enum machine_mode mode1;
4779 HOST_WIDE_INT bitsize, bitpos;
4780 unsigned HOST_WIDE_INT bitregion_start = 0;
4781 unsigned HOST_WIDE_INT bitregion_end = 0;
4782 tree offset;
4783 int unsignedp;
4784 int volatilep = 0;
4785 tree tem;
4786
4787 push_temp_slots ();
4788 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4789 &unsignedp, &volatilep, true);
4790
4791 /* Make sure bitpos is not negative, it can wreak havoc later. */
4792 if (bitpos < 0)
4793 {
4794 gcc_assert (offset == NULL_TREE);
4795 offset = size_int (bitpos >> (BITS_PER_UNIT == 8
4796 ? 3 : exact_log2 (BITS_PER_UNIT)));
4797 bitpos &= BITS_PER_UNIT - 1;
4798 }
4799
4800 if (TREE_CODE (to) == COMPONENT_REF
4801 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4802 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
4803 /* The C++ memory model naturally applies to byte-aligned fields.
4804 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
4805 BITSIZE are not byte-aligned, there is no need to limit the range
4806 we can access. This can occur with packed structures in Ada. */
4807 else if (bitsize > 0
4808 && bitsize % BITS_PER_UNIT == 0
4809 && bitpos % BITS_PER_UNIT == 0)
4810 {
4811 bitregion_start = bitpos;
4812 bitregion_end = bitpos + bitsize - 1;
4813 }
4814
4815 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4816
4817 /* If the field has a mode, we want to access it in the
4818 field's mode, not the computed mode.
4819 If a MEM has VOIDmode (external with incomplete type),
4820 use BLKmode for it instead. */
4821 if (MEM_P (to_rtx))
4822 {
4823 if (mode1 != VOIDmode)
4824 to_rtx = adjust_address (to_rtx, mode1, 0);
4825 else if (GET_MODE (to_rtx) == VOIDmode)
4826 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4827 }
4828
4829 if (offset != 0)
4830 {
4831 enum machine_mode address_mode;
4832 rtx offset_rtx;
4833
4834 if (!MEM_P (to_rtx))
4835 {
4836 /* We can get constant negative offsets into arrays with broken
4837 user code. Translate this to a trap instead of ICEing. */
4838 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4839 expand_builtin_trap ();
4840 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4841 }
4842
4843 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4844 address_mode = get_address_mode (to_rtx);
4845 if (GET_MODE (offset_rtx) != address_mode)
4846 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4847
4848 /* If we have an expression in OFFSET_RTX and a non-zero
4849 byte offset in BITPOS, adding the byte offset before the
4850 OFFSET_RTX results in better intermediate code, which makes
4851 later rtl optimization passes perform better.
4852
4853 We prefer intermediate code like this:
4854
4855 r124:DI=r123:DI+0x18
4856 [r124:DI]=r121:DI
4857
4858 ... instead of ...
4859
4860 r124:DI=r123:DI+0x10
4861 [r124:DI+0x8]=r121:DI
4862
4863 This is only done for aligned data values, as these can
4864 be expected to result in single move instructions. */
4865 if (mode1 != VOIDmode
4866 && bitpos != 0
4867 && bitsize > 0
4868 && (bitpos % bitsize) == 0
4869 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4870 && MEM_ALIGN (to_rtx) >= GET_MODE_ALIGNMENT (mode1))
4871 {
4872 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4873 bitregion_start = 0;
4874 if (bitregion_end >= (unsigned HOST_WIDE_INT) bitpos)
4875 bitregion_end -= bitpos;
4876 bitpos = 0;
4877 }
4878
4879 to_rtx = offset_address (to_rtx, offset_rtx,
4880 highest_pow2_factor_for_target (to,
4881 offset));
4882 }
4883
4884 /* No action is needed if the target is not a memory and the field
4885 lies completely outside that target. This can occur if the source
4886 code contains an out-of-bounds access to a small array. */
4887 if (!MEM_P (to_rtx)
4888 && GET_MODE (to_rtx) != BLKmode
4889 && (unsigned HOST_WIDE_INT) bitpos
4890 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4891 {
4892 expand_normal (from);
4893 result = NULL;
4894 }
4895 /* Handle expand_expr of a complex value returning a CONCAT. */
4896 else if (GET_CODE (to_rtx) == CONCAT)
4897 {
4898 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4899 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4900 && bitpos == 0
4901 && bitsize == mode_bitsize)
4902 result = store_expr (from, to_rtx, false, nontemporal);
4903 else if (bitsize == mode_bitsize / 2
4904 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4905 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4906 nontemporal);
4907 else if (bitpos + bitsize <= mode_bitsize / 2)
4908 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4909 bitregion_start, bitregion_end,
4910 mode1, from,
4911 get_alias_set (to), nontemporal);
4912 else if (bitpos >= mode_bitsize / 2)
4913 result = store_field (XEXP (to_rtx, 1), bitsize,
4914 bitpos - mode_bitsize / 2,
4915 bitregion_start, bitregion_end,
4916 mode1, from,
4917 get_alias_set (to), nontemporal);
4918 else if (bitpos == 0 && bitsize == mode_bitsize)
4919 {
4920 rtx from_rtx;
4921 result = expand_normal (from);
4922 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4923 TYPE_MODE (TREE_TYPE (from)), 0);
4924 emit_move_insn (XEXP (to_rtx, 0),
4925 read_complex_part (from_rtx, false));
4926 emit_move_insn (XEXP (to_rtx, 1),
4927 read_complex_part (from_rtx, true));
4928 }
4929 else
4930 {
4931 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4932 GET_MODE_SIZE (GET_MODE (to_rtx)));
4933 write_complex_part (temp, XEXP (to_rtx, 0), false);
4934 write_complex_part (temp, XEXP (to_rtx, 1), true);
4935 result = store_field (temp, bitsize, bitpos,
4936 bitregion_start, bitregion_end,
4937 mode1, from,
4938 get_alias_set (to), nontemporal);
4939 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4940 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4941 }
4942 }
4943 else
4944 {
4945 if (MEM_P (to_rtx))
4946 {
4947 /* If the field is at offset zero, we could have been given the
4948 DECL_RTX of the parent struct. Don't munge it. */
4949 to_rtx = shallow_copy_rtx (to_rtx);
4950 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4951 if (volatilep)
4952 MEM_VOLATILE_P (to_rtx) = 1;
4953 }
4954
4955 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4956 bitregion_start, bitregion_end,
4957 mode1,
4958 to_rtx, to, from))
4959 result = NULL;
4960 else
4961 result = store_field (to_rtx, bitsize, bitpos,
4962 bitregion_start, bitregion_end,
4963 mode1, from,
4964 get_alias_set (to), nontemporal);
4965 }
4966
4967 if (result)
4968 preserve_temp_slots (result);
4969 pop_temp_slots ();
4970 return;
4971 }
4972
4973 /* If the rhs is a function call and its value is not an aggregate,
4974 call the function before we start to compute the lhs.
4975 This is needed for correct code for cases such as
4976 val = setjmp (buf) on machines where reference to val
4977 requires loading up part of an address in a separate insn.
4978
4979 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4980 since it might be a promoted variable where the zero- or sign- extension
4981 needs to be done. Handling this in the normal way is safe because no
4982 computation is done before the call. The same is true for SSA names. */
4983 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4984 && COMPLETE_TYPE_P (TREE_TYPE (from))
4985 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4986 && ! (((TREE_CODE (to) == VAR_DECL
4987 || TREE_CODE (to) == PARM_DECL
4988 || TREE_CODE (to) == RESULT_DECL)
4989 && REG_P (DECL_RTL (to)))
4990 || TREE_CODE (to) == SSA_NAME))
4991 {
4992 rtx value;
4993
4994 push_temp_slots ();
4995 value = expand_normal (from);
4996 if (to_rtx == 0)
4997 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4998
4999 /* Handle calls that return values in multiple non-contiguous locations.
5000 The Irix 6 ABI has examples of this. */
5001 if (GET_CODE (to_rtx) == PARALLEL)
5002 {
5003 if (GET_CODE (value) == PARALLEL)
5004 emit_group_move (to_rtx, value);
5005 else
5006 emit_group_load (to_rtx, value, TREE_TYPE (from),
5007 int_size_in_bytes (TREE_TYPE (from)));
5008 }
5009 else if (GET_CODE (value) == PARALLEL)
5010 emit_group_store (to_rtx, value, TREE_TYPE (from),
5011 int_size_in_bytes (TREE_TYPE (from)));
5012 else if (GET_MODE (to_rtx) == BLKmode)
5013 {
5014 /* Handle calls that return BLKmode values in registers. */
5015 if (REG_P (value))
5016 copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from));
5017 else
5018 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
5019 }
5020 else
5021 {
5022 if (POINTER_TYPE_P (TREE_TYPE (to)))
5023 value = convert_memory_address_addr_space
5024 (GET_MODE (to_rtx), value,
5025 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
5026
5027 emit_move_insn (to_rtx, value);
5028 }
5029 preserve_temp_slots (to_rtx);
5030 pop_temp_slots ();
5031 return;
5032 }
5033
5034 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5035 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5036
5037 /* Don't move directly into a return register. */
5038 if (TREE_CODE (to) == RESULT_DECL
5039 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
5040 {
5041 rtx temp;
5042
5043 push_temp_slots ();
5044
5045 /* If the source is itself a return value, it still is in a pseudo at
5046 this point so we can move it back to the return register directly. */
5047 if (REG_P (to_rtx)
5048 && TYPE_MODE (TREE_TYPE (from)) == BLKmode
5049 && TREE_CODE (from) != CALL_EXPR)
5050 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
5051 else
5052 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
5053
5054 /* Handle calls that return values in multiple non-contiguous locations.
5055 The Irix 6 ABI has examples of this. */
5056 if (GET_CODE (to_rtx) == PARALLEL)
5057 {
5058 if (GET_CODE (temp) == PARALLEL)
5059 emit_group_move (to_rtx, temp);
5060 else
5061 emit_group_load (to_rtx, temp, TREE_TYPE (from),
5062 int_size_in_bytes (TREE_TYPE (from)));
5063 }
5064 else if (temp)
5065 emit_move_insn (to_rtx, temp);
5066
5067 preserve_temp_slots (to_rtx);
5068 pop_temp_slots ();
5069 return;
5070 }
5071
5072 /* In case we are returning the contents of an object which overlaps
5073 the place the value is being stored, use a safe function when copying
5074 a value through a pointer into a structure value return block. */
5075 if (TREE_CODE (to) == RESULT_DECL
5076 && TREE_CODE (from) == INDIRECT_REF
5077 && ADDR_SPACE_GENERIC_P
5078 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
5079 && refs_may_alias_p (to, from)
5080 && cfun->returns_struct
5081 && !cfun->returns_pcc_struct)
5082 {
5083 rtx from_rtx, size;
5084
5085 push_temp_slots ();
5086 size = expr_size (from);
5087 from_rtx = expand_normal (from);
5088
5089 emit_library_call (memmove_libfunc, LCT_NORMAL,
5090 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
5091 XEXP (from_rtx, 0), Pmode,
5092 convert_to_mode (TYPE_MODE (sizetype),
5093 size, TYPE_UNSIGNED (sizetype)),
5094 TYPE_MODE (sizetype));
5095
5096 preserve_temp_slots (to_rtx);
5097 pop_temp_slots ();
5098 return;
5099 }
5100
5101 /* Compute FROM and store the value in the rtx we got. */
5102
5103 push_temp_slots ();
5104 result = store_expr (from, to_rtx, 0, nontemporal);
5105 preserve_temp_slots (result);
5106 pop_temp_slots ();
5107 return;
5108 }
5109
5110 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5111 succeeded, false otherwise. */
5112
5113 bool
5114 emit_storent_insn (rtx to, rtx from)
5115 {
5116 struct expand_operand ops[2];
5117 enum machine_mode mode = GET_MODE (to);
5118 enum insn_code code = optab_handler (storent_optab, mode);
5119
5120 if (code == CODE_FOR_nothing)
5121 return false;
5122
5123 create_fixed_operand (&ops[0], to);
5124 create_input_operand (&ops[1], from, mode);
5125 return maybe_expand_insn (code, 2, ops);
5126 }
5127
5128 /* Generate code for computing expression EXP,
5129 and storing the value into TARGET.
5130
5131 If the mode is BLKmode then we may return TARGET itself.
5132 It turns out that in BLKmode it doesn't cause a problem.
5133 because C has no operators that could combine two different
5134 assignments into the same BLKmode object with different values
5135 with no sequence point. Will other languages need this to
5136 be more thorough?
5137
5138 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5139 stack, and block moves may need to be treated specially.
5140
5141 If NONTEMPORAL is true, try using a nontemporal store instruction. */
5142
5143 rtx
5144 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
5145 {
5146 rtx temp;
5147 rtx alt_rtl = NULL_RTX;
5148 location_t loc = curr_insn_location ();
5149
5150 if (VOID_TYPE_P (TREE_TYPE (exp)))
5151 {
5152 /* C++ can generate ?: expressions with a throw expression in one
5153 branch and an rvalue in the other. Here, we resolve attempts to
5154 store the throw expression's nonexistent result. */
5155 gcc_assert (!call_param_p);
5156 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5157 return NULL_RTX;
5158 }
5159 if (TREE_CODE (exp) == COMPOUND_EXPR)
5160 {
5161 /* Perform first part of compound expression, then assign from second
5162 part. */
5163 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5164 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5165 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5166 nontemporal);
5167 }
5168 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5169 {
5170 /* For conditional expression, get safe form of the target. Then
5171 test the condition, doing the appropriate assignment on either
5172 side. This avoids the creation of unnecessary temporaries.
5173 For non-BLKmode, it is more efficient not to do this. */
5174
5175 rtx_code_label *lab1 = gen_label_rtx (), *lab2 = gen_label_rtx ();
5176
5177 do_pending_stack_adjust ();
5178 NO_DEFER_POP;
5179 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5180 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5181 nontemporal);
5182 emit_jump_insn (gen_jump (lab2));
5183 emit_barrier ();
5184 emit_label (lab1);
5185 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5186 nontemporal);
5187 emit_label (lab2);
5188 OK_DEFER_POP;
5189
5190 return NULL_RTX;
5191 }
5192 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5193 /* If this is a scalar in a register that is stored in a wider mode
5194 than the declared mode, compute the result into its declared mode
5195 and then convert to the wider mode. Our value is the computed
5196 expression. */
5197 {
5198 rtx inner_target = 0;
5199
5200 /* We can do the conversion inside EXP, which will often result
5201 in some optimizations. Do the conversion in two steps: first
5202 change the signedness, if needed, then the extend. But don't
5203 do this if the type of EXP is a subtype of something else
5204 since then the conversion might involve more than just
5205 converting modes. */
5206 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5207 && TREE_TYPE (TREE_TYPE (exp)) == 0
5208 && GET_MODE_PRECISION (GET_MODE (target))
5209 == TYPE_PRECISION (TREE_TYPE (exp)))
5210 {
5211 if (!SUBREG_CHECK_PROMOTED_SIGN (target,
5212 TYPE_UNSIGNED (TREE_TYPE (exp))))
5213 {
5214 /* Some types, e.g. Fortran's logical*4, won't have a signed
5215 version, so use the mode instead. */
5216 tree ntype
5217 = (signed_or_unsigned_type_for
5218 (SUBREG_PROMOTED_SIGN (target), TREE_TYPE (exp)));
5219 if (ntype == NULL)
5220 ntype = lang_hooks.types.type_for_mode
5221 (TYPE_MODE (TREE_TYPE (exp)),
5222 SUBREG_PROMOTED_SIGN (target));
5223
5224 exp = fold_convert_loc (loc, ntype, exp);
5225 }
5226
5227 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5228 (GET_MODE (SUBREG_REG (target)),
5229 SUBREG_PROMOTED_SIGN (target)),
5230 exp);
5231
5232 inner_target = SUBREG_REG (target);
5233 }
5234
5235 temp = expand_expr (exp, inner_target, VOIDmode,
5236 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5237
5238 /* If TEMP is a VOIDmode constant, use convert_modes to make
5239 sure that we properly convert it. */
5240 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5241 {
5242 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5243 temp, SUBREG_PROMOTED_SIGN (target));
5244 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5245 GET_MODE (target), temp,
5246 SUBREG_PROMOTED_SIGN (target));
5247 }
5248
5249 convert_move (SUBREG_REG (target), temp,
5250 SUBREG_PROMOTED_SIGN (target));
5251
5252 return NULL_RTX;
5253 }
5254 else if ((TREE_CODE (exp) == STRING_CST
5255 || (TREE_CODE (exp) == MEM_REF
5256 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5257 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5258 == STRING_CST
5259 && integer_zerop (TREE_OPERAND (exp, 1))))
5260 && !nontemporal && !call_param_p
5261 && MEM_P (target))
5262 {
5263 /* Optimize initialization of an array with a STRING_CST. */
5264 HOST_WIDE_INT exp_len, str_copy_len;
5265 rtx dest_mem;
5266 tree str = TREE_CODE (exp) == STRING_CST
5267 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5268
5269 exp_len = int_expr_size (exp);
5270 if (exp_len <= 0)
5271 goto normal_expr;
5272
5273 if (TREE_STRING_LENGTH (str) <= 0)
5274 goto normal_expr;
5275
5276 str_copy_len = strlen (TREE_STRING_POINTER (str));
5277 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5278 goto normal_expr;
5279
5280 str_copy_len = TREE_STRING_LENGTH (str);
5281 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5282 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5283 {
5284 str_copy_len += STORE_MAX_PIECES - 1;
5285 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5286 }
5287 str_copy_len = MIN (str_copy_len, exp_len);
5288 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5289 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5290 MEM_ALIGN (target), false))
5291 goto normal_expr;
5292
5293 dest_mem = target;
5294
5295 dest_mem = store_by_pieces (dest_mem,
5296 str_copy_len, builtin_strncpy_read_str,
5297 CONST_CAST (char *,
5298 TREE_STRING_POINTER (str)),
5299 MEM_ALIGN (target), false,
5300 exp_len > str_copy_len ? 1 : 0);
5301 if (exp_len > str_copy_len)
5302 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5303 GEN_INT (exp_len - str_copy_len),
5304 BLOCK_OP_NORMAL);
5305 return NULL_RTX;
5306 }
5307 else
5308 {
5309 rtx tmp_target;
5310
5311 normal_expr:
5312 /* If we want to use a nontemporal store, force the value to
5313 register first. */
5314 tmp_target = nontemporal ? NULL_RTX : target;
5315 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5316 (call_param_p
5317 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5318 &alt_rtl, false);
5319 }
5320
5321 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5322 the same as that of TARGET, adjust the constant. This is needed, for
5323 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5324 only a word-sized value. */
5325 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5326 && TREE_CODE (exp) != ERROR_MARK
5327 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5328 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5329 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5330
5331 /* If value was not generated in the target, store it there.
5332 Convert the value to TARGET's type first if necessary and emit the
5333 pending incrementations that have been queued when expanding EXP.
5334 Note that we cannot emit the whole queue blindly because this will
5335 effectively disable the POST_INC optimization later.
5336
5337 If TEMP and TARGET compare equal according to rtx_equal_p, but
5338 one or both of them are volatile memory refs, we have to distinguish
5339 two cases:
5340 - expand_expr has used TARGET. In this case, we must not generate
5341 another copy. This can be detected by TARGET being equal according
5342 to == .
5343 - expand_expr has not used TARGET - that means that the source just
5344 happens to have the same RTX form. Since temp will have been created
5345 by expand_expr, it will compare unequal according to == .
5346 We must generate a copy in this case, to reach the correct number
5347 of volatile memory references. */
5348
5349 if ((! rtx_equal_p (temp, target)
5350 || (temp != target && (side_effects_p (temp)
5351 || side_effects_p (target))))
5352 && TREE_CODE (exp) != ERROR_MARK
5353 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5354 but TARGET is not valid memory reference, TEMP will differ
5355 from TARGET although it is really the same location. */
5356 && !(alt_rtl
5357 && rtx_equal_p (alt_rtl, target)
5358 && !side_effects_p (alt_rtl)
5359 && !side_effects_p (target))
5360 /* If there's nothing to copy, don't bother. Don't call
5361 expr_size unless necessary, because some front-ends (C++)
5362 expr_size-hook must not be given objects that are not
5363 supposed to be bit-copied or bit-initialized. */
5364 && expr_size (exp) != const0_rtx)
5365 {
5366 if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode)
5367 {
5368 if (GET_MODE (target) == BLKmode)
5369 {
5370 /* Handle calls that return BLKmode values in registers. */
5371 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
5372 copy_blkmode_from_reg (target, temp, TREE_TYPE (exp));
5373 else
5374 store_bit_field (target,
5375 INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5376 0, 0, 0, GET_MODE (temp), temp);
5377 }
5378 else
5379 convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5380 }
5381
5382 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5383 {
5384 /* Handle copying a string constant into an array. The string
5385 constant may be shorter than the array. So copy just the string's
5386 actual length, and clear the rest. First get the size of the data
5387 type of the string, which is actually the size of the target. */
5388 rtx size = expr_size (exp);
5389
5390 if (CONST_INT_P (size)
5391 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5392 emit_block_move (target, temp, size,
5393 (call_param_p
5394 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5395 else
5396 {
5397 enum machine_mode pointer_mode
5398 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5399 enum machine_mode address_mode = get_address_mode (target);
5400
5401 /* Compute the size of the data to copy from the string. */
5402 tree copy_size
5403 = size_binop_loc (loc, MIN_EXPR,
5404 make_tree (sizetype, size),
5405 size_int (TREE_STRING_LENGTH (exp)));
5406 rtx copy_size_rtx
5407 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5408 (call_param_p
5409 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5410 rtx_code_label *label = 0;
5411
5412 /* Copy that much. */
5413 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5414 TYPE_UNSIGNED (sizetype));
5415 emit_block_move (target, temp, copy_size_rtx,
5416 (call_param_p
5417 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5418
5419 /* Figure out how much is left in TARGET that we have to clear.
5420 Do all calculations in pointer_mode. */
5421 if (CONST_INT_P (copy_size_rtx))
5422 {
5423 size = plus_constant (address_mode, size,
5424 -INTVAL (copy_size_rtx));
5425 target = adjust_address (target, BLKmode,
5426 INTVAL (copy_size_rtx));
5427 }
5428 else
5429 {
5430 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5431 copy_size_rtx, NULL_RTX, 0,
5432 OPTAB_LIB_WIDEN);
5433
5434 if (GET_MODE (copy_size_rtx) != address_mode)
5435 copy_size_rtx = convert_to_mode (address_mode,
5436 copy_size_rtx,
5437 TYPE_UNSIGNED (sizetype));
5438
5439 target = offset_address (target, copy_size_rtx,
5440 highest_pow2_factor (copy_size));
5441 label = gen_label_rtx ();
5442 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5443 GET_MODE (size), 0, label);
5444 }
5445
5446 if (size != const0_rtx)
5447 clear_storage (target, size, BLOCK_OP_NORMAL);
5448
5449 if (label)
5450 emit_label (label);
5451 }
5452 }
5453 /* Handle calls that return values in multiple non-contiguous locations.
5454 The Irix 6 ABI has examples of this. */
5455 else if (GET_CODE (target) == PARALLEL)
5456 {
5457 if (GET_CODE (temp) == PARALLEL)
5458 emit_group_move (target, temp);
5459 else
5460 emit_group_load (target, temp, TREE_TYPE (exp),
5461 int_size_in_bytes (TREE_TYPE (exp)));
5462 }
5463 else if (GET_CODE (temp) == PARALLEL)
5464 emit_group_store (target, temp, TREE_TYPE (exp),
5465 int_size_in_bytes (TREE_TYPE (exp)));
5466 else if (GET_MODE (temp) == BLKmode)
5467 emit_block_move (target, temp, expr_size (exp),
5468 (call_param_p
5469 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5470 /* If we emit a nontemporal store, there is nothing else to do. */
5471 else if (nontemporal && emit_storent_insn (target, temp))
5472 ;
5473 else
5474 {
5475 temp = force_operand (temp, target);
5476 if (temp != target)
5477 emit_move_insn (target, temp);
5478 }
5479 }
5480
5481 return NULL_RTX;
5482 }
5483 \f
5484 /* Return true if field F of structure TYPE is a flexible array. */
5485
5486 static bool
5487 flexible_array_member_p (const_tree f, const_tree type)
5488 {
5489 const_tree tf;
5490
5491 tf = TREE_TYPE (f);
5492 return (DECL_CHAIN (f) == NULL
5493 && TREE_CODE (tf) == ARRAY_TYPE
5494 && TYPE_DOMAIN (tf)
5495 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5496 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5497 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5498 && int_size_in_bytes (type) >= 0);
5499 }
5500
5501 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5502 must have in order for it to completely initialize a value of type TYPE.
5503 Return -1 if the number isn't known.
5504
5505 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5506
5507 static HOST_WIDE_INT
5508 count_type_elements (const_tree type, bool for_ctor_p)
5509 {
5510 switch (TREE_CODE (type))
5511 {
5512 case ARRAY_TYPE:
5513 {
5514 tree nelts;
5515
5516 nelts = array_type_nelts (type);
5517 if (nelts && tree_fits_uhwi_p (nelts))
5518 {
5519 unsigned HOST_WIDE_INT n;
5520
5521 n = tree_to_uhwi (nelts) + 1;
5522 if (n == 0 || for_ctor_p)
5523 return n;
5524 else
5525 return n * count_type_elements (TREE_TYPE (type), false);
5526 }
5527 return for_ctor_p ? -1 : 1;
5528 }
5529
5530 case RECORD_TYPE:
5531 {
5532 unsigned HOST_WIDE_INT n;
5533 tree f;
5534
5535 n = 0;
5536 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5537 if (TREE_CODE (f) == FIELD_DECL)
5538 {
5539 if (!for_ctor_p)
5540 n += count_type_elements (TREE_TYPE (f), false);
5541 else if (!flexible_array_member_p (f, type))
5542 /* Don't count flexible arrays, which are not supposed
5543 to be initialized. */
5544 n += 1;
5545 }
5546
5547 return n;
5548 }
5549
5550 case UNION_TYPE:
5551 case QUAL_UNION_TYPE:
5552 {
5553 tree f;
5554 HOST_WIDE_INT n, m;
5555
5556 gcc_assert (!for_ctor_p);
5557 /* Estimate the number of scalars in each field and pick the
5558 maximum. Other estimates would do instead; the idea is simply
5559 to make sure that the estimate is not sensitive to the ordering
5560 of the fields. */
5561 n = 1;
5562 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5563 if (TREE_CODE (f) == FIELD_DECL)
5564 {
5565 m = count_type_elements (TREE_TYPE (f), false);
5566 /* If the field doesn't span the whole union, add an extra
5567 scalar for the rest. */
5568 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5569 TYPE_SIZE (type)) != 1)
5570 m++;
5571 if (n < m)
5572 n = m;
5573 }
5574 return n;
5575 }
5576
5577 case COMPLEX_TYPE:
5578 return 2;
5579
5580 case VECTOR_TYPE:
5581 return TYPE_VECTOR_SUBPARTS (type);
5582
5583 case INTEGER_TYPE:
5584 case REAL_TYPE:
5585 case FIXED_POINT_TYPE:
5586 case ENUMERAL_TYPE:
5587 case BOOLEAN_TYPE:
5588 case POINTER_TYPE:
5589 case OFFSET_TYPE:
5590 case REFERENCE_TYPE:
5591 case NULLPTR_TYPE:
5592 return 1;
5593
5594 case ERROR_MARK:
5595 return 0;
5596
5597 case VOID_TYPE:
5598 case METHOD_TYPE:
5599 case FUNCTION_TYPE:
5600 case LANG_TYPE:
5601 default:
5602 gcc_unreachable ();
5603 }
5604 }
5605
5606 /* Helper for categorize_ctor_elements. Identical interface. */
5607
5608 static bool
5609 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5610 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5611 {
5612 unsigned HOST_WIDE_INT idx;
5613 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5614 tree value, purpose, elt_type;
5615
5616 /* Whether CTOR is a valid constant initializer, in accordance with what
5617 initializer_constant_valid_p does. If inferred from the constructor
5618 elements, true until proven otherwise. */
5619 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5620 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5621
5622 nz_elts = 0;
5623 init_elts = 0;
5624 num_fields = 0;
5625 elt_type = NULL_TREE;
5626
5627 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5628 {
5629 HOST_WIDE_INT mult = 1;
5630
5631 if (purpose && TREE_CODE (purpose) == RANGE_EXPR)
5632 {
5633 tree lo_index = TREE_OPERAND (purpose, 0);
5634 tree hi_index = TREE_OPERAND (purpose, 1);
5635
5636 if (tree_fits_uhwi_p (lo_index) && tree_fits_uhwi_p (hi_index))
5637 mult = (tree_to_uhwi (hi_index)
5638 - tree_to_uhwi (lo_index) + 1);
5639 }
5640 num_fields += mult;
5641 elt_type = TREE_TYPE (value);
5642
5643 switch (TREE_CODE (value))
5644 {
5645 case CONSTRUCTOR:
5646 {
5647 HOST_WIDE_INT nz = 0, ic = 0;
5648
5649 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5650 p_complete);
5651
5652 nz_elts += mult * nz;
5653 init_elts += mult * ic;
5654
5655 if (const_from_elts_p && const_p)
5656 const_p = const_elt_p;
5657 }
5658 break;
5659
5660 case INTEGER_CST:
5661 case REAL_CST:
5662 case FIXED_CST:
5663 if (!initializer_zerop (value))
5664 nz_elts += mult;
5665 init_elts += mult;
5666 break;
5667
5668 case STRING_CST:
5669 nz_elts += mult * TREE_STRING_LENGTH (value);
5670 init_elts += mult * TREE_STRING_LENGTH (value);
5671 break;
5672
5673 case COMPLEX_CST:
5674 if (!initializer_zerop (TREE_REALPART (value)))
5675 nz_elts += mult;
5676 if (!initializer_zerop (TREE_IMAGPART (value)))
5677 nz_elts += mult;
5678 init_elts += mult;
5679 break;
5680
5681 case VECTOR_CST:
5682 {
5683 unsigned i;
5684 for (i = 0; i < VECTOR_CST_NELTS (value); ++i)
5685 {
5686 tree v = VECTOR_CST_ELT (value, i);
5687 if (!initializer_zerop (v))
5688 nz_elts += mult;
5689 init_elts += mult;
5690 }
5691 }
5692 break;
5693
5694 default:
5695 {
5696 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5697 nz_elts += mult * tc;
5698 init_elts += mult * tc;
5699
5700 if (const_from_elts_p && const_p)
5701 const_p = initializer_constant_valid_p (value, elt_type)
5702 != NULL_TREE;
5703 }
5704 break;
5705 }
5706 }
5707
5708 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5709 num_fields, elt_type))
5710 *p_complete = false;
5711
5712 *p_nz_elts += nz_elts;
5713 *p_init_elts += init_elts;
5714
5715 return const_p;
5716 }
5717
5718 /* Examine CTOR to discover:
5719 * how many scalar fields are set to nonzero values,
5720 and place it in *P_NZ_ELTS;
5721 * how many scalar fields in total are in CTOR,
5722 and place it in *P_ELT_COUNT.
5723 * whether the constructor is complete -- in the sense that every
5724 meaningful byte is explicitly given a value --
5725 and place it in *P_COMPLETE.
5726
5727 Return whether or not CTOR is a valid static constant initializer, the same
5728 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5729
5730 bool
5731 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5732 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5733 {
5734 *p_nz_elts = 0;
5735 *p_init_elts = 0;
5736 *p_complete = true;
5737
5738 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5739 }
5740
5741 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5742 of which had type LAST_TYPE. Each element was itself a complete
5743 initializer, in the sense that every meaningful byte was explicitly
5744 given a value. Return true if the same is true for the constructor
5745 as a whole. */
5746
5747 bool
5748 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5749 const_tree last_type)
5750 {
5751 if (TREE_CODE (type) == UNION_TYPE
5752 || TREE_CODE (type) == QUAL_UNION_TYPE)
5753 {
5754 if (num_elts == 0)
5755 return false;
5756
5757 gcc_assert (num_elts == 1 && last_type);
5758
5759 /* ??? We could look at each element of the union, and find the
5760 largest element. Which would avoid comparing the size of the
5761 initialized element against any tail padding in the union.
5762 Doesn't seem worth the effort... */
5763 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5764 }
5765
5766 return count_type_elements (type, true) == num_elts;
5767 }
5768
5769 /* Return 1 if EXP contains mostly (3/4) zeros. */
5770
5771 static int
5772 mostly_zeros_p (const_tree exp)
5773 {
5774 if (TREE_CODE (exp) == CONSTRUCTOR)
5775 {
5776 HOST_WIDE_INT nz_elts, init_elts;
5777 bool complete_p;
5778
5779 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5780 return !complete_p || nz_elts < init_elts / 4;
5781 }
5782
5783 return initializer_zerop (exp);
5784 }
5785
5786 /* Return 1 if EXP contains all zeros. */
5787
5788 static int
5789 all_zeros_p (const_tree exp)
5790 {
5791 if (TREE_CODE (exp) == CONSTRUCTOR)
5792 {
5793 HOST_WIDE_INT nz_elts, init_elts;
5794 bool complete_p;
5795
5796 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5797 return nz_elts == 0;
5798 }
5799
5800 return initializer_zerop (exp);
5801 }
5802 \f
5803 /* Helper function for store_constructor.
5804 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5805 CLEARED is as for store_constructor.
5806 ALIAS_SET is the alias set to use for any stores.
5807
5808 This provides a recursive shortcut back to store_constructor when it isn't
5809 necessary to go through store_field. This is so that we can pass through
5810 the cleared field to let store_constructor know that we may not have to
5811 clear a substructure if the outer structure has already been cleared. */
5812
5813 static void
5814 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5815 HOST_WIDE_INT bitpos, enum machine_mode mode,
5816 tree exp, int cleared, alias_set_type alias_set)
5817 {
5818 if (TREE_CODE (exp) == CONSTRUCTOR
5819 /* We can only call store_constructor recursively if the size and
5820 bit position are on a byte boundary. */
5821 && bitpos % BITS_PER_UNIT == 0
5822 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5823 /* If we have a nonzero bitpos for a register target, then we just
5824 let store_field do the bitfield handling. This is unlikely to
5825 generate unnecessary clear instructions anyways. */
5826 && (bitpos == 0 || MEM_P (target)))
5827 {
5828 if (MEM_P (target))
5829 target
5830 = adjust_address (target,
5831 GET_MODE (target) == BLKmode
5832 || 0 != (bitpos
5833 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5834 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5835
5836
5837 /* Update the alias set, if required. */
5838 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5839 && MEM_ALIAS_SET (target) != 0)
5840 {
5841 target = copy_rtx (target);
5842 set_mem_alias_set (target, alias_set);
5843 }
5844
5845 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5846 }
5847 else
5848 store_field (target, bitsize, bitpos, 0, 0, mode, exp, alias_set, false);
5849 }
5850
5851
5852 /* Returns the number of FIELD_DECLs in TYPE. */
5853
5854 static int
5855 fields_length (const_tree type)
5856 {
5857 tree t = TYPE_FIELDS (type);
5858 int count = 0;
5859
5860 for (; t; t = DECL_CHAIN (t))
5861 if (TREE_CODE (t) == FIELD_DECL)
5862 ++count;
5863
5864 return count;
5865 }
5866
5867
5868 /* Store the value of constructor EXP into the rtx TARGET.
5869 TARGET is either a REG or a MEM; we know it cannot conflict, since
5870 safe_from_p has been called.
5871 CLEARED is true if TARGET is known to have been zero'd.
5872 SIZE is the number of bytes of TARGET we are allowed to modify: this
5873 may not be the same as the size of EXP if we are assigning to a field
5874 which has been packed to exclude padding bits. */
5875
5876 static void
5877 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5878 {
5879 tree type = TREE_TYPE (exp);
5880 #ifdef WORD_REGISTER_OPERATIONS
5881 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5882 #endif
5883
5884 switch (TREE_CODE (type))
5885 {
5886 case RECORD_TYPE:
5887 case UNION_TYPE:
5888 case QUAL_UNION_TYPE:
5889 {
5890 unsigned HOST_WIDE_INT idx;
5891 tree field, value;
5892
5893 /* If size is zero or the target is already cleared, do nothing. */
5894 if (size == 0 || cleared)
5895 cleared = 1;
5896 /* We either clear the aggregate or indicate the value is dead. */
5897 else if ((TREE_CODE (type) == UNION_TYPE
5898 || TREE_CODE (type) == QUAL_UNION_TYPE)
5899 && ! CONSTRUCTOR_ELTS (exp))
5900 /* If the constructor is empty, clear the union. */
5901 {
5902 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5903 cleared = 1;
5904 }
5905
5906 /* If we are building a static constructor into a register,
5907 set the initial value as zero so we can fold the value into
5908 a constant. But if more than one register is involved,
5909 this probably loses. */
5910 else if (REG_P (target) && TREE_STATIC (exp)
5911 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5912 {
5913 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5914 cleared = 1;
5915 }
5916
5917 /* If the constructor has fewer fields than the structure or
5918 if we are initializing the structure to mostly zeros, clear
5919 the whole structure first. Don't do this if TARGET is a
5920 register whose mode size isn't equal to SIZE since
5921 clear_storage can't handle this case. */
5922 else if (size > 0
5923 && (((int)vec_safe_length (CONSTRUCTOR_ELTS (exp))
5924 != fields_length (type))
5925 || mostly_zeros_p (exp))
5926 && (!REG_P (target)
5927 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5928 == size)))
5929 {
5930 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5931 cleared = 1;
5932 }
5933
5934 if (REG_P (target) && !cleared)
5935 emit_clobber (target);
5936
5937 /* Store each element of the constructor into the
5938 corresponding field of TARGET. */
5939 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5940 {
5941 enum machine_mode mode;
5942 HOST_WIDE_INT bitsize;
5943 HOST_WIDE_INT bitpos = 0;
5944 tree offset;
5945 rtx to_rtx = target;
5946
5947 /* Just ignore missing fields. We cleared the whole
5948 structure, above, if any fields are missing. */
5949 if (field == 0)
5950 continue;
5951
5952 if (cleared && initializer_zerop (value))
5953 continue;
5954
5955 if (tree_fits_uhwi_p (DECL_SIZE (field)))
5956 bitsize = tree_to_uhwi (DECL_SIZE (field));
5957 else
5958 bitsize = -1;
5959
5960 mode = DECL_MODE (field);
5961 if (DECL_BIT_FIELD (field))
5962 mode = VOIDmode;
5963
5964 offset = DECL_FIELD_OFFSET (field);
5965 if (tree_fits_shwi_p (offset)
5966 && tree_fits_shwi_p (bit_position (field)))
5967 {
5968 bitpos = int_bit_position (field);
5969 offset = 0;
5970 }
5971 else
5972 bitpos = tree_to_shwi (DECL_FIELD_BIT_OFFSET (field));
5973
5974 if (offset)
5975 {
5976 enum machine_mode address_mode;
5977 rtx offset_rtx;
5978
5979 offset
5980 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5981 make_tree (TREE_TYPE (exp),
5982 target));
5983
5984 offset_rtx = expand_normal (offset);
5985 gcc_assert (MEM_P (to_rtx));
5986
5987 address_mode = get_address_mode (to_rtx);
5988 if (GET_MODE (offset_rtx) != address_mode)
5989 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5990
5991 to_rtx = offset_address (to_rtx, offset_rtx,
5992 highest_pow2_factor (offset));
5993 }
5994
5995 #ifdef WORD_REGISTER_OPERATIONS
5996 /* If this initializes a field that is smaller than a
5997 word, at the start of a word, try to widen it to a full
5998 word. This special case allows us to output C++ member
5999 function initializations in a form that the optimizers
6000 can understand. */
6001 if (REG_P (target)
6002 && bitsize < BITS_PER_WORD
6003 && bitpos % BITS_PER_WORD == 0
6004 && GET_MODE_CLASS (mode) == MODE_INT
6005 && TREE_CODE (value) == INTEGER_CST
6006 && exp_size >= 0
6007 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
6008 {
6009 tree type = TREE_TYPE (value);
6010
6011 if (TYPE_PRECISION (type) < BITS_PER_WORD)
6012 {
6013 type = lang_hooks.types.type_for_mode
6014 (word_mode, TYPE_UNSIGNED (type));
6015 value = fold_convert (type, value);
6016 }
6017
6018 if (BYTES_BIG_ENDIAN)
6019 value
6020 = fold_build2 (LSHIFT_EXPR, type, value,
6021 build_int_cst (type,
6022 BITS_PER_WORD - bitsize));
6023 bitsize = BITS_PER_WORD;
6024 mode = word_mode;
6025 }
6026 #endif
6027
6028 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
6029 && DECL_NONADDRESSABLE_P (field))
6030 {
6031 to_rtx = copy_rtx (to_rtx);
6032 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
6033 }
6034
6035 store_constructor_field (to_rtx, bitsize, bitpos, mode,
6036 value, cleared,
6037 get_alias_set (TREE_TYPE (field)));
6038 }
6039 break;
6040 }
6041 case ARRAY_TYPE:
6042 {
6043 tree value, index;
6044 unsigned HOST_WIDE_INT i;
6045 int need_to_clear;
6046 tree domain;
6047 tree elttype = TREE_TYPE (type);
6048 int const_bounds_p;
6049 HOST_WIDE_INT minelt = 0;
6050 HOST_WIDE_INT maxelt = 0;
6051
6052 domain = TYPE_DOMAIN (type);
6053 const_bounds_p = (TYPE_MIN_VALUE (domain)
6054 && TYPE_MAX_VALUE (domain)
6055 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain))
6056 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain)));
6057
6058 /* If we have constant bounds for the range of the type, get them. */
6059 if (const_bounds_p)
6060 {
6061 minelt = tree_to_shwi (TYPE_MIN_VALUE (domain));
6062 maxelt = tree_to_shwi (TYPE_MAX_VALUE (domain));
6063 }
6064
6065 /* If the constructor has fewer elements than the array, clear
6066 the whole array first. Similarly if this is static
6067 constructor of a non-BLKmode object. */
6068 if (cleared)
6069 need_to_clear = 0;
6070 else if (REG_P (target) && TREE_STATIC (exp))
6071 need_to_clear = 1;
6072 else
6073 {
6074 unsigned HOST_WIDE_INT idx;
6075 tree index, value;
6076 HOST_WIDE_INT count = 0, zero_count = 0;
6077 need_to_clear = ! const_bounds_p;
6078
6079 /* This loop is a more accurate version of the loop in
6080 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6081 is also needed to check for missing elements. */
6082 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
6083 {
6084 HOST_WIDE_INT this_node_count;
6085
6086 if (need_to_clear)
6087 break;
6088
6089 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6090 {
6091 tree lo_index = TREE_OPERAND (index, 0);
6092 tree hi_index = TREE_OPERAND (index, 1);
6093
6094 if (! tree_fits_uhwi_p (lo_index)
6095 || ! tree_fits_uhwi_p (hi_index))
6096 {
6097 need_to_clear = 1;
6098 break;
6099 }
6100
6101 this_node_count = (tree_to_uhwi (hi_index)
6102 - tree_to_uhwi (lo_index) + 1);
6103 }
6104 else
6105 this_node_count = 1;
6106
6107 count += this_node_count;
6108 if (mostly_zeros_p (value))
6109 zero_count += this_node_count;
6110 }
6111
6112 /* Clear the entire array first if there are any missing
6113 elements, or if the incidence of zero elements is >=
6114 75%. */
6115 if (! need_to_clear
6116 && (count < maxelt - minelt + 1
6117 || 4 * zero_count >= 3 * count))
6118 need_to_clear = 1;
6119 }
6120
6121 if (need_to_clear && size > 0)
6122 {
6123 if (REG_P (target))
6124 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6125 else
6126 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6127 cleared = 1;
6128 }
6129
6130 if (!cleared && REG_P (target))
6131 /* Inform later passes that the old value is dead. */
6132 emit_clobber (target);
6133
6134 /* Store each element of the constructor into the
6135 corresponding element of TARGET, determined by counting the
6136 elements. */
6137 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
6138 {
6139 enum machine_mode mode;
6140 HOST_WIDE_INT bitsize;
6141 HOST_WIDE_INT bitpos;
6142 rtx xtarget = target;
6143
6144 if (cleared && initializer_zerop (value))
6145 continue;
6146
6147 mode = TYPE_MODE (elttype);
6148 if (mode == BLKmode)
6149 bitsize = (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6150 ? tree_to_uhwi (TYPE_SIZE (elttype))
6151 : -1);
6152 else
6153 bitsize = GET_MODE_BITSIZE (mode);
6154
6155 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6156 {
6157 tree lo_index = TREE_OPERAND (index, 0);
6158 tree hi_index = TREE_OPERAND (index, 1);
6159 rtx index_r, pos_rtx;
6160 HOST_WIDE_INT lo, hi, count;
6161 tree position;
6162
6163 /* If the range is constant and "small", unroll the loop. */
6164 if (const_bounds_p
6165 && tree_fits_shwi_p (lo_index)
6166 && tree_fits_shwi_p (hi_index)
6167 && (lo = tree_to_shwi (lo_index),
6168 hi = tree_to_shwi (hi_index),
6169 count = hi - lo + 1,
6170 (!MEM_P (target)
6171 || count <= 2
6172 || (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6173 && (tree_to_uhwi (TYPE_SIZE (elttype)) * count
6174 <= 40 * 8)))))
6175 {
6176 lo -= minelt; hi -= minelt;
6177 for (; lo <= hi; lo++)
6178 {
6179 bitpos = lo * tree_to_shwi (TYPE_SIZE (elttype));
6180
6181 if (MEM_P (target)
6182 && !MEM_KEEP_ALIAS_SET_P (target)
6183 && TREE_CODE (type) == ARRAY_TYPE
6184 && TYPE_NONALIASED_COMPONENT (type))
6185 {
6186 target = copy_rtx (target);
6187 MEM_KEEP_ALIAS_SET_P (target) = 1;
6188 }
6189
6190 store_constructor_field
6191 (target, bitsize, bitpos, mode, value, cleared,
6192 get_alias_set (elttype));
6193 }
6194 }
6195 else
6196 {
6197 rtx_code_label *loop_start = gen_label_rtx ();
6198 rtx_code_label *loop_end = gen_label_rtx ();
6199 tree exit_cond;
6200
6201 expand_normal (hi_index);
6202
6203 index = build_decl (EXPR_LOCATION (exp),
6204 VAR_DECL, NULL_TREE, domain);
6205 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6206 SET_DECL_RTL (index, index_r);
6207 store_expr (lo_index, index_r, 0, false);
6208
6209 /* Build the head of the loop. */
6210 do_pending_stack_adjust ();
6211 emit_label (loop_start);
6212
6213 /* Assign value to element index. */
6214 position =
6215 fold_convert (ssizetype,
6216 fold_build2 (MINUS_EXPR,
6217 TREE_TYPE (index),
6218 index,
6219 TYPE_MIN_VALUE (domain)));
6220
6221 position =
6222 size_binop (MULT_EXPR, position,
6223 fold_convert (ssizetype,
6224 TYPE_SIZE_UNIT (elttype)));
6225
6226 pos_rtx = expand_normal (position);
6227 xtarget = offset_address (target, pos_rtx,
6228 highest_pow2_factor (position));
6229 xtarget = adjust_address (xtarget, mode, 0);
6230 if (TREE_CODE (value) == CONSTRUCTOR)
6231 store_constructor (value, xtarget, cleared,
6232 bitsize / BITS_PER_UNIT);
6233 else
6234 store_expr (value, xtarget, 0, false);
6235
6236 /* Generate a conditional jump to exit the loop. */
6237 exit_cond = build2 (LT_EXPR, integer_type_node,
6238 index, hi_index);
6239 jumpif (exit_cond, loop_end, -1);
6240
6241 /* Update the loop counter, and jump to the head of
6242 the loop. */
6243 expand_assignment (index,
6244 build2 (PLUS_EXPR, TREE_TYPE (index),
6245 index, integer_one_node),
6246 false);
6247
6248 emit_jump (loop_start);
6249
6250 /* Build the end of the loop. */
6251 emit_label (loop_end);
6252 }
6253 }
6254 else if ((index != 0 && ! tree_fits_shwi_p (index))
6255 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype)))
6256 {
6257 tree position;
6258
6259 if (index == 0)
6260 index = ssize_int (1);
6261
6262 if (minelt)
6263 index = fold_convert (ssizetype,
6264 fold_build2 (MINUS_EXPR,
6265 TREE_TYPE (index),
6266 index,
6267 TYPE_MIN_VALUE (domain)));
6268
6269 position =
6270 size_binop (MULT_EXPR, index,
6271 fold_convert (ssizetype,
6272 TYPE_SIZE_UNIT (elttype)));
6273 xtarget = offset_address (target,
6274 expand_normal (position),
6275 highest_pow2_factor (position));
6276 xtarget = adjust_address (xtarget, mode, 0);
6277 store_expr (value, xtarget, 0, false);
6278 }
6279 else
6280 {
6281 if (index != 0)
6282 bitpos = ((tree_to_shwi (index) - minelt)
6283 * tree_to_uhwi (TYPE_SIZE (elttype)));
6284 else
6285 bitpos = (i * tree_to_uhwi (TYPE_SIZE (elttype)));
6286
6287 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6288 && TREE_CODE (type) == ARRAY_TYPE
6289 && TYPE_NONALIASED_COMPONENT (type))
6290 {
6291 target = copy_rtx (target);
6292 MEM_KEEP_ALIAS_SET_P (target) = 1;
6293 }
6294 store_constructor_field (target, bitsize, bitpos, mode, value,
6295 cleared, get_alias_set (elttype));
6296 }
6297 }
6298 break;
6299 }
6300
6301 case VECTOR_TYPE:
6302 {
6303 unsigned HOST_WIDE_INT idx;
6304 constructor_elt *ce;
6305 int i;
6306 int need_to_clear;
6307 int icode = CODE_FOR_nothing;
6308 tree elttype = TREE_TYPE (type);
6309 int elt_size = tree_to_uhwi (TYPE_SIZE (elttype));
6310 enum machine_mode eltmode = TYPE_MODE (elttype);
6311 HOST_WIDE_INT bitsize;
6312 HOST_WIDE_INT bitpos;
6313 rtvec vector = NULL;
6314 unsigned n_elts;
6315 alias_set_type alias;
6316
6317 gcc_assert (eltmode != BLKmode);
6318
6319 n_elts = TYPE_VECTOR_SUBPARTS (type);
6320 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6321 {
6322 enum machine_mode mode = GET_MODE (target);
6323
6324 icode = (int) optab_handler (vec_init_optab, mode);
6325 /* Don't use vec_init<mode> if some elements have VECTOR_TYPE. */
6326 if (icode != CODE_FOR_nothing)
6327 {
6328 tree value;
6329
6330 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6331 if (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE)
6332 {
6333 icode = CODE_FOR_nothing;
6334 break;
6335 }
6336 }
6337 if (icode != CODE_FOR_nothing)
6338 {
6339 unsigned int i;
6340
6341 vector = rtvec_alloc (n_elts);
6342 for (i = 0; i < n_elts; i++)
6343 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6344 }
6345 }
6346
6347 /* If the constructor has fewer elements than the vector,
6348 clear the whole array first. Similarly if this is static
6349 constructor of a non-BLKmode object. */
6350 if (cleared)
6351 need_to_clear = 0;
6352 else if (REG_P (target) && TREE_STATIC (exp))
6353 need_to_clear = 1;
6354 else
6355 {
6356 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6357 tree value;
6358
6359 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6360 {
6361 int n_elts_here = tree_to_uhwi
6362 (int_const_binop (TRUNC_DIV_EXPR,
6363 TYPE_SIZE (TREE_TYPE (value)),
6364 TYPE_SIZE (elttype)));
6365
6366 count += n_elts_here;
6367 if (mostly_zeros_p (value))
6368 zero_count += n_elts_here;
6369 }
6370
6371 /* Clear the entire vector first if there are any missing elements,
6372 or if the incidence of zero elements is >= 75%. */
6373 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6374 }
6375
6376 if (need_to_clear && size > 0 && !vector)
6377 {
6378 if (REG_P (target))
6379 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6380 else
6381 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6382 cleared = 1;
6383 }
6384
6385 /* Inform later passes that the old value is dead. */
6386 if (!cleared && !vector && REG_P (target))
6387 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6388
6389 if (MEM_P (target))
6390 alias = MEM_ALIAS_SET (target);
6391 else
6392 alias = get_alias_set (elttype);
6393
6394 /* Store each element of the constructor into the corresponding
6395 element of TARGET, determined by counting the elements. */
6396 for (idx = 0, i = 0;
6397 vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce);
6398 idx++, i += bitsize / elt_size)
6399 {
6400 HOST_WIDE_INT eltpos;
6401 tree value = ce->value;
6402
6403 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value)));
6404 if (cleared && initializer_zerop (value))
6405 continue;
6406
6407 if (ce->index)
6408 eltpos = tree_to_uhwi (ce->index);
6409 else
6410 eltpos = i;
6411
6412 if (vector)
6413 {
6414 /* vec_init<mode> should not be used if there are VECTOR_TYPE
6415 elements. */
6416 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6417 RTVEC_ELT (vector, eltpos)
6418 = expand_normal (value);
6419 }
6420 else
6421 {
6422 enum machine_mode value_mode =
6423 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6424 ? TYPE_MODE (TREE_TYPE (value))
6425 : eltmode;
6426 bitpos = eltpos * elt_size;
6427 store_constructor_field (target, bitsize, bitpos, value_mode,
6428 value, cleared, alias);
6429 }
6430 }
6431
6432 if (vector)
6433 emit_insn (GEN_FCN (icode)
6434 (target,
6435 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6436 break;
6437 }
6438
6439 default:
6440 gcc_unreachable ();
6441 }
6442 }
6443
6444 /* Store the value of EXP (an expression tree)
6445 into a subfield of TARGET which has mode MODE and occupies
6446 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6447 If MODE is VOIDmode, it means that we are storing into a bit-field.
6448
6449 BITREGION_START is bitpos of the first bitfield in this region.
6450 BITREGION_END is the bitpos of the ending bitfield in this region.
6451 These two fields are 0, if the C++ memory model does not apply,
6452 or we are not interested in keeping track of bitfield regions.
6453
6454 Always return const0_rtx unless we have something particular to
6455 return.
6456
6457 ALIAS_SET is the alias set for the destination. This value will
6458 (in general) be different from that for TARGET, since TARGET is a
6459 reference to the containing structure.
6460
6461 If NONTEMPORAL is true, try generating a nontemporal store. */
6462
6463 static rtx
6464 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6465 unsigned HOST_WIDE_INT bitregion_start,
6466 unsigned HOST_WIDE_INT bitregion_end,
6467 enum machine_mode mode, tree exp,
6468 alias_set_type alias_set, bool nontemporal)
6469 {
6470 if (TREE_CODE (exp) == ERROR_MARK)
6471 return const0_rtx;
6472
6473 /* If we have nothing to store, do nothing unless the expression has
6474 side-effects. */
6475 if (bitsize == 0)
6476 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6477
6478 if (GET_CODE (target) == CONCAT)
6479 {
6480 /* We're storing into a struct containing a single __complex. */
6481
6482 gcc_assert (!bitpos);
6483 return store_expr (exp, target, 0, nontemporal);
6484 }
6485
6486 /* If the structure is in a register or if the component
6487 is a bit field, we cannot use addressing to access it.
6488 Use bit-field techniques or SUBREG to store in it. */
6489
6490 if (mode == VOIDmode
6491 || (mode != BLKmode && ! direct_store[(int) mode]
6492 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6493 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6494 || REG_P (target)
6495 || GET_CODE (target) == SUBREG
6496 /* If the field isn't aligned enough to store as an ordinary memref,
6497 store it as a bit field. */
6498 || (mode != BLKmode
6499 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6500 || bitpos % GET_MODE_ALIGNMENT (mode))
6501 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6502 || (bitpos % BITS_PER_UNIT != 0)))
6503 || (bitsize >= 0 && mode != BLKmode
6504 && GET_MODE_BITSIZE (mode) > bitsize)
6505 /* If the RHS and field are a constant size and the size of the
6506 RHS isn't the same size as the bitfield, we must use bitfield
6507 operations. */
6508 || (bitsize >= 0
6509 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6510 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6511 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6512 decl we must use bitfield operations. */
6513 || (bitsize >= 0
6514 && TREE_CODE (exp) == MEM_REF
6515 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6516 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6517 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6518 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6519 {
6520 rtx temp;
6521 gimple nop_def;
6522
6523 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6524 implies a mask operation. If the precision is the same size as
6525 the field we're storing into, that mask is redundant. This is
6526 particularly common with bit field assignments generated by the
6527 C front end. */
6528 nop_def = get_def_for_expr (exp, NOP_EXPR);
6529 if (nop_def)
6530 {
6531 tree type = TREE_TYPE (exp);
6532 if (INTEGRAL_TYPE_P (type)
6533 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6534 && bitsize == TYPE_PRECISION (type))
6535 {
6536 tree op = gimple_assign_rhs1 (nop_def);
6537 type = TREE_TYPE (op);
6538 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6539 exp = op;
6540 }
6541 }
6542
6543 temp = expand_normal (exp);
6544
6545 /* If BITSIZE is narrower than the size of the type of EXP
6546 we will be narrowing TEMP. Normally, what's wanted are the
6547 low-order bits. However, if EXP's type is a record and this is
6548 big-endian machine, we want the upper BITSIZE bits. */
6549 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6550 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6551 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6552 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6553 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6554 NULL_RTX, 1);
6555
6556 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6557 if (mode != VOIDmode && mode != BLKmode
6558 && mode != TYPE_MODE (TREE_TYPE (exp)))
6559 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6560
6561 /* If the modes of TEMP and TARGET are both BLKmode, both
6562 must be in memory and BITPOS must be aligned on a byte
6563 boundary. If so, we simply do a block copy. Likewise
6564 for a BLKmode-like TARGET. */
6565 if (GET_MODE (temp) == BLKmode
6566 && (GET_MODE (target) == BLKmode
6567 || (MEM_P (target)
6568 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6569 && (bitpos % BITS_PER_UNIT) == 0
6570 && (bitsize % BITS_PER_UNIT) == 0)))
6571 {
6572 gcc_assert (MEM_P (target) && MEM_P (temp)
6573 && (bitpos % BITS_PER_UNIT) == 0);
6574
6575 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6576 emit_block_move (target, temp,
6577 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6578 / BITS_PER_UNIT),
6579 BLOCK_OP_NORMAL);
6580
6581 return const0_rtx;
6582 }
6583
6584 /* Handle calls that return values in multiple non-contiguous locations.
6585 The Irix 6 ABI has examples of this. */
6586 if (GET_CODE (temp) == PARALLEL)
6587 {
6588 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6589 rtx temp_target;
6590 if (mode == BLKmode || mode == VOIDmode)
6591 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6592 temp_target = gen_reg_rtx (mode);
6593 emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
6594 temp = temp_target;
6595 }
6596 else if (mode == BLKmode)
6597 {
6598 /* Handle calls that return BLKmode values in registers. */
6599 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
6600 {
6601 rtx temp_target = gen_reg_rtx (GET_MODE (temp));
6602 copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp));
6603 temp = temp_target;
6604 }
6605 else
6606 {
6607 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6608 rtx temp_target;
6609 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6610 temp_target = gen_reg_rtx (mode);
6611 temp_target
6612 = extract_bit_field (temp, size * BITS_PER_UNIT, 0, 1,
6613 temp_target, mode, mode);
6614 temp = temp_target;
6615 }
6616 }
6617
6618 /* Store the value in the bitfield. */
6619 store_bit_field (target, bitsize, bitpos,
6620 bitregion_start, bitregion_end,
6621 mode, temp);
6622
6623 return const0_rtx;
6624 }
6625 else
6626 {
6627 /* Now build a reference to just the desired component. */
6628 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6629
6630 if (to_rtx == target)
6631 to_rtx = copy_rtx (to_rtx);
6632
6633 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6634 set_mem_alias_set (to_rtx, alias_set);
6635
6636 return store_expr (exp, to_rtx, 0, nontemporal);
6637 }
6638 }
6639 \f
6640 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6641 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6642 codes and find the ultimate containing object, which we return.
6643
6644 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6645 bit position, and *PUNSIGNEDP to the signedness of the field.
6646 If the position of the field is variable, we store a tree
6647 giving the variable offset (in units) in *POFFSET.
6648 This offset is in addition to the bit position.
6649 If the position is not variable, we store 0 in *POFFSET.
6650
6651 If any of the extraction expressions is volatile,
6652 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6653
6654 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6655 Otherwise, it is a mode that can be used to access the field.
6656
6657 If the field describes a variable-sized object, *PMODE is set to
6658 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6659 this case, but the address of the object can be found.
6660
6661 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6662 look through nodes that serve as markers of a greater alignment than
6663 the one that can be deduced from the expression. These nodes make it
6664 possible for front-ends to prevent temporaries from being created by
6665 the middle-end on alignment considerations. For that purpose, the
6666 normal operating mode at high-level is to always pass FALSE so that
6667 the ultimate containing object is really returned; moreover, the
6668 associated predicate handled_component_p will always return TRUE
6669 on these nodes, thus indicating that they are essentially handled
6670 by get_inner_reference. TRUE should only be passed when the caller
6671 is scanning the expression in order to build another representation
6672 and specifically knows how to handle these nodes; as such, this is
6673 the normal operating mode in the RTL expanders. */
6674
6675 tree
6676 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6677 HOST_WIDE_INT *pbitpos, tree *poffset,
6678 enum machine_mode *pmode, int *punsignedp,
6679 int *pvolatilep, bool keep_aligning)
6680 {
6681 tree size_tree = 0;
6682 enum machine_mode mode = VOIDmode;
6683 bool blkmode_bitfield = false;
6684 tree offset = size_zero_node;
6685 offset_int bit_offset = 0;
6686
6687 /* First get the mode, signedness, and size. We do this from just the
6688 outermost expression. */
6689 *pbitsize = -1;
6690 if (TREE_CODE (exp) == COMPONENT_REF)
6691 {
6692 tree field = TREE_OPERAND (exp, 1);
6693 size_tree = DECL_SIZE (field);
6694 if (flag_strict_volatile_bitfields > 0
6695 && TREE_THIS_VOLATILE (exp)
6696 && DECL_BIT_FIELD_TYPE (field)
6697 && DECL_MODE (field) != BLKmode)
6698 /* Volatile bitfields should be accessed in the mode of the
6699 field's type, not the mode computed based on the bit
6700 size. */
6701 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6702 else if (!DECL_BIT_FIELD (field))
6703 mode = DECL_MODE (field);
6704 else if (DECL_MODE (field) == BLKmode)
6705 blkmode_bitfield = true;
6706
6707 *punsignedp = DECL_UNSIGNED (field);
6708 }
6709 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6710 {
6711 size_tree = TREE_OPERAND (exp, 1);
6712 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6713 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6714
6715 /* For vector types, with the correct size of access, use the mode of
6716 inner type. */
6717 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6718 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6719 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6720 mode = TYPE_MODE (TREE_TYPE (exp));
6721 }
6722 else
6723 {
6724 mode = TYPE_MODE (TREE_TYPE (exp));
6725 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6726
6727 if (mode == BLKmode)
6728 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6729 else
6730 *pbitsize = GET_MODE_BITSIZE (mode);
6731 }
6732
6733 if (size_tree != 0)
6734 {
6735 if (! tree_fits_uhwi_p (size_tree))
6736 mode = BLKmode, *pbitsize = -1;
6737 else
6738 *pbitsize = tree_to_uhwi (size_tree);
6739 }
6740
6741 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6742 and find the ultimate containing object. */
6743 while (1)
6744 {
6745 switch (TREE_CODE (exp))
6746 {
6747 case BIT_FIELD_REF:
6748 bit_offset += wi::to_offset (TREE_OPERAND (exp, 2));
6749 break;
6750
6751 case COMPONENT_REF:
6752 {
6753 tree field = TREE_OPERAND (exp, 1);
6754 tree this_offset = component_ref_field_offset (exp);
6755
6756 /* If this field hasn't been filled in yet, don't go past it.
6757 This should only happen when folding expressions made during
6758 type construction. */
6759 if (this_offset == 0)
6760 break;
6761
6762 offset = size_binop (PLUS_EXPR, offset, this_offset);
6763 bit_offset += wi::to_offset (DECL_FIELD_BIT_OFFSET (field));
6764
6765 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6766 }
6767 break;
6768
6769 case ARRAY_REF:
6770 case ARRAY_RANGE_REF:
6771 {
6772 tree index = TREE_OPERAND (exp, 1);
6773 tree low_bound = array_ref_low_bound (exp);
6774 tree unit_size = array_ref_element_size (exp);
6775
6776 /* We assume all arrays have sizes that are a multiple of a byte.
6777 First subtract the lower bound, if any, in the type of the
6778 index, then convert to sizetype and multiply by the size of
6779 the array element. */
6780 if (! integer_zerop (low_bound))
6781 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6782 index, low_bound);
6783
6784 offset = size_binop (PLUS_EXPR, offset,
6785 size_binop (MULT_EXPR,
6786 fold_convert (sizetype, index),
6787 unit_size));
6788 }
6789 break;
6790
6791 case REALPART_EXPR:
6792 break;
6793
6794 case IMAGPART_EXPR:
6795 bit_offset += *pbitsize;
6796 break;
6797
6798 case VIEW_CONVERT_EXPR:
6799 if (keep_aligning && STRICT_ALIGNMENT
6800 && (TYPE_ALIGN (TREE_TYPE (exp))
6801 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6802 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6803 < BIGGEST_ALIGNMENT)
6804 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6805 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6806 goto done;
6807 break;
6808
6809 case MEM_REF:
6810 /* Hand back the decl for MEM[&decl, off]. */
6811 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6812 {
6813 tree off = TREE_OPERAND (exp, 1);
6814 if (!integer_zerop (off))
6815 {
6816 offset_int boff, coff = mem_ref_offset (exp);
6817 boff = wi::lshift (coff, LOG2_BITS_PER_UNIT);
6818 bit_offset += boff;
6819 }
6820 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6821 }
6822 goto done;
6823
6824 default:
6825 goto done;
6826 }
6827
6828 /* If any reference in the chain is volatile, the effect is volatile. */
6829 if (TREE_THIS_VOLATILE (exp))
6830 *pvolatilep = 1;
6831
6832 exp = TREE_OPERAND (exp, 0);
6833 }
6834 done:
6835
6836 /* If OFFSET is constant, see if we can return the whole thing as a
6837 constant bit position. Make sure to handle overflow during
6838 this conversion. */
6839 if (TREE_CODE (offset) == INTEGER_CST)
6840 {
6841 offset_int tem = wi::sext (wi::to_offset (offset),
6842 TYPE_PRECISION (sizetype));
6843 tem = wi::lshift (tem, LOG2_BITS_PER_UNIT);
6844 tem += bit_offset;
6845 if (wi::fits_shwi_p (tem))
6846 {
6847 *pbitpos = tem.to_shwi ();
6848 *poffset = offset = NULL_TREE;
6849 }
6850 }
6851
6852 /* Otherwise, split it up. */
6853 if (offset)
6854 {
6855 /* Avoid returning a negative bitpos as this may wreak havoc later. */
6856 if (wi::neg_p (bit_offset))
6857 {
6858 offset_int mask = wi::mask <offset_int> (LOG2_BITS_PER_UNIT, false);
6859 offset_int tem = bit_offset.and_not (mask);
6860 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
6861 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
6862 bit_offset -= tem;
6863 tem = wi::arshift (tem, LOG2_BITS_PER_UNIT);
6864 offset = size_binop (PLUS_EXPR, offset,
6865 wide_int_to_tree (sizetype, tem));
6866 }
6867
6868 *pbitpos = bit_offset.to_shwi ();
6869 *poffset = offset;
6870 }
6871
6872 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6873 if (mode == VOIDmode
6874 && blkmode_bitfield
6875 && (*pbitpos % BITS_PER_UNIT) == 0
6876 && (*pbitsize % BITS_PER_UNIT) == 0)
6877 *pmode = BLKmode;
6878 else
6879 *pmode = mode;
6880
6881 return exp;
6882 }
6883
6884 /* Return a tree of sizetype representing the size, in bytes, of the element
6885 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6886
6887 tree
6888 array_ref_element_size (tree exp)
6889 {
6890 tree aligned_size = TREE_OPERAND (exp, 3);
6891 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6892 location_t loc = EXPR_LOCATION (exp);
6893
6894 /* If a size was specified in the ARRAY_REF, it's the size measured
6895 in alignment units of the element type. So multiply by that value. */
6896 if (aligned_size)
6897 {
6898 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6899 sizetype from another type of the same width and signedness. */
6900 if (TREE_TYPE (aligned_size) != sizetype)
6901 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6902 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6903 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6904 }
6905
6906 /* Otherwise, take the size from that of the element type. Substitute
6907 any PLACEHOLDER_EXPR that we have. */
6908 else
6909 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6910 }
6911
6912 /* Return a tree representing the lower bound of the array mentioned in
6913 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6914
6915 tree
6916 array_ref_low_bound (tree exp)
6917 {
6918 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6919
6920 /* If a lower bound is specified in EXP, use it. */
6921 if (TREE_OPERAND (exp, 2))
6922 return TREE_OPERAND (exp, 2);
6923
6924 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6925 substituting for a PLACEHOLDER_EXPR as needed. */
6926 if (domain_type && TYPE_MIN_VALUE (domain_type))
6927 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6928
6929 /* Otherwise, return a zero of the appropriate type. */
6930 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6931 }
6932
6933 /* Returns true if REF is an array reference to an array at the end of
6934 a structure. If this is the case, the array may be allocated larger
6935 than its upper bound implies. */
6936
6937 bool
6938 array_at_struct_end_p (tree ref)
6939 {
6940 if (TREE_CODE (ref) != ARRAY_REF
6941 && TREE_CODE (ref) != ARRAY_RANGE_REF)
6942 return false;
6943
6944 while (handled_component_p (ref))
6945 {
6946 /* If the reference chain contains a component reference to a
6947 non-union type and there follows another field the reference
6948 is not at the end of a structure. */
6949 if (TREE_CODE (ref) == COMPONENT_REF
6950 && TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == RECORD_TYPE)
6951 {
6952 tree nextf = DECL_CHAIN (TREE_OPERAND (ref, 1));
6953 while (nextf && TREE_CODE (nextf) != FIELD_DECL)
6954 nextf = DECL_CHAIN (nextf);
6955 if (nextf)
6956 return false;
6957 }
6958
6959 ref = TREE_OPERAND (ref, 0);
6960 }
6961
6962 /* If the reference is based on a declared entity, the size of the array
6963 is constrained by its given domain. */
6964 if (DECL_P (ref))
6965 return false;
6966
6967 return true;
6968 }
6969
6970 /* Return a tree representing the upper bound of the array mentioned in
6971 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6972
6973 tree
6974 array_ref_up_bound (tree exp)
6975 {
6976 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6977
6978 /* If there is a domain type and it has an upper bound, use it, substituting
6979 for a PLACEHOLDER_EXPR as needed. */
6980 if (domain_type && TYPE_MAX_VALUE (domain_type))
6981 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6982
6983 /* Otherwise fail. */
6984 return NULL_TREE;
6985 }
6986
6987 /* Return a tree representing the offset, in bytes, of the field referenced
6988 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6989
6990 tree
6991 component_ref_field_offset (tree exp)
6992 {
6993 tree aligned_offset = TREE_OPERAND (exp, 2);
6994 tree field = TREE_OPERAND (exp, 1);
6995 location_t loc = EXPR_LOCATION (exp);
6996
6997 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6998 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6999 value. */
7000 if (aligned_offset)
7001 {
7002 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
7003 sizetype from another type of the same width and signedness. */
7004 if (TREE_TYPE (aligned_offset) != sizetype)
7005 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
7006 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
7007 size_int (DECL_OFFSET_ALIGN (field)
7008 / BITS_PER_UNIT));
7009 }
7010
7011 /* Otherwise, take the offset from that of the field. Substitute
7012 any PLACEHOLDER_EXPR that we have. */
7013 else
7014 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
7015 }
7016
7017 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7018
7019 static unsigned HOST_WIDE_INT
7020 target_align (const_tree target)
7021 {
7022 /* We might have a chain of nested references with intermediate misaligning
7023 bitfields components, so need to recurse to find out. */
7024
7025 unsigned HOST_WIDE_INT this_align, outer_align;
7026
7027 switch (TREE_CODE (target))
7028 {
7029 case BIT_FIELD_REF:
7030 return 1;
7031
7032 case COMPONENT_REF:
7033 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
7034 outer_align = target_align (TREE_OPERAND (target, 0));
7035 return MIN (this_align, outer_align);
7036
7037 case ARRAY_REF:
7038 case ARRAY_RANGE_REF:
7039 this_align = TYPE_ALIGN (TREE_TYPE (target));
7040 outer_align = target_align (TREE_OPERAND (target, 0));
7041 return MIN (this_align, outer_align);
7042
7043 CASE_CONVERT:
7044 case NON_LVALUE_EXPR:
7045 case VIEW_CONVERT_EXPR:
7046 this_align = TYPE_ALIGN (TREE_TYPE (target));
7047 outer_align = target_align (TREE_OPERAND (target, 0));
7048 return MAX (this_align, outer_align);
7049
7050 default:
7051 return TYPE_ALIGN (TREE_TYPE (target));
7052 }
7053 }
7054
7055 \f
7056 /* Given an rtx VALUE that may contain additions and multiplications, return
7057 an equivalent value that just refers to a register, memory, or constant.
7058 This is done by generating instructions to perform the arithmetic and
7059 returning a pseudo-register containing the value.
7060
7061 The returned value may be a REG, SUBREG, MEM or constant. */
7062
7063 rtx
7064 force_operand (rtx value, rtx target)
7065 {
7066 rtx op1, op2;
7067 /* Use subtarget as the target for operand 0 of a binary operation. */
7068 rtx subtarget = get_subtarget (target);
7069 enum rtx_code code = GET_CODE (value);
7070
7071 /* Check for subreg applied to an expression produced by loop optimizer. */
7072 if (code == SUBREG
7073 && !REG_P (SUBREG_REG (value))
7074 && !MEM_P (SUBREG_REG (value)))
7075 {
7076 value
7077 = simplify_gen_subreg (GET_MODE (value),
7078 force_reg (GET_MODE (SUBREG_REG (value)),
7079 force_operand (SUBREG_REG (value),
7080 NULL_RTX)),
7081 GET_MODE (SUBREG_REG (value)),
7082 SUBREG_BYTE (value));
7083 code = GET_CODE (value);
7084 }
7085
7086 /* Check for a PIC address load. */
7087 if ((code == PLUS || code == MINUS)
7088 && XEXP (value, 0) == pic_offset_table_rtx
7089 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
7090 || GET_CODE (XEXP (value, 1)) == LABEL_REF
7091 || GET_CODE (XEXP (value, 1)) == CONST))
7092 {
7093 if (!subtarget)
7094 subtarget = gen_reg_rtx (GET_MODE (value));
7095 emit_move_insn (subtarget, value);
7096 return subtarget;
7097 }
7098
7099 if (ARITHMETIC_P (value))
7100 {
7101 op2 = XEXP (value, 1);
7102 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
7103 subtarget = 0;
7104 if (code == MINUS && CONST_INT_P (op2))
7105 {
7106 code = PLUS;
7107 op2 = negate_rtx (GET_MODE (value), op2);
7108 }
7109
7110 /* Check for an addition with OP2 a constant integer and our first
7111 operand a PLUS of a virtual register and something else. In that
7112 case, we want to emit the sum of the virtual register and the
7113 constant first and then add the other value. This allows virtual
7114 register instantiation to simply modify the constant rather than
7115 creating another one around this addition. */
7116 if (code == PLUS && CONST_INT_P (op2)
7117 && GET_CODE (XEXP (value, 0)) == PLUS
7118 && REG_P (XEXP (XEXP (value, 0), 0))
7119 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7120 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
7121 {
7122 rtx temp = expand_simple_binop (GET_MODE (value), code,
7123 XEXP (XEXP (value, 0), 0), op2,
7124 subtarget, 0, OPTAB_LIB_WIDEN);
7125 return expand_simple_binop (GET_MODE (value), code, temp,
7126 force_operand (XEXP (XEXP (value,
7127 0), 1), 0),
7128 target, 0, OPTAB_LIB_WIDEN);
7129 }
7130
7131 op1 = force_operand (XEXP (value, 0), subtarget);
7132 op2 = force_operand (op2, NULL_RTX);
7133 switch (code)
7134 {
7135 case MULT:
7136 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7137 case DIV:
7138 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7139 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7140 target, 1, OPTAB_LIB_WIDEN);
7141 else
7142 return expand_divmod (0,
7143 FLOAT_MODE_P (GET_MODE (value))
7144 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7145 GET_MODE (value), op1, op2, target, 0);
7146 case MOD:
7147 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7148 target, 0);
7149 case UDIV:
7150 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7151 target, 1);
7152 case UMOD:
7153 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7154 target, 1);
7155 case ASHIFTRT:
7156 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7157 target, 0, OPTAB_LIB_WIDEN);
7158 default:
7159 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7160 target, 1, OPTAB_LIB_WIDEN);
7161 }
7162 }
7163 if (UNARY_P (value))
7164 {
7165 if (!target)
7166 target = gen_reg_rtx (GET_MODE (value));
7167 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7168 switch (code)
7169 {
7170 case ZERO_EXTEND:
7171 case SIGN_EXTEND:
7172 case TRUNCATE:
7173 case FLOAT_EXTEND:
7174 case FLOAT_TRUNCATE:
7175 convert_move (target, op1, code == ZERO_EXTEND);
7176 return target;
7177
7178 case FIX:
7179 case UNSIGNED_FIX:
7180 expand_fix (target, op1, code == UNSIGNED_FIX);
7181 return target;
7182
7183 case FLOAT:
7184 case UNSIGNED_FLOAT:
7185 expand_float (target, op1, code == UNSIGNED_FLOAT);
7186 return target;
7187
7188 default:
7189 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7190 }
7191 }
7192
7193 #ifdef INSN_SCHEDULING
7194 /* On machines that have insn scheduling, we want all memory reference to be
7195 explicit, so we need to deal with such paradoxical SUBREGs. */
7196 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7197 value
7198 = simplify_gen_subreg (GET_MODE (value),
7199 force_reg (GET_MODE (SUBREG_REG (value)),
7200 force_operand (SUBREG_REG (value),
7201 NULL_RTX)),
7202 GET_MODE (SUBREG_REG (value)),
7203 SUBREG_BYTE (value));
7204 #endif
7205
7206 return value;
7207 }
7208 \f
7209 /* Subroutine of expand_expr: return nonzero iff there is no way that
7210 EXP can reference X, which is being modified. TOP_P is nonzero if this
7211 call is going to be used to determine whether we need a temporary
7212 for EXP, as opposed to a recursive call to this function.
7213
7214 It is always safe for this routine to return zero since it merely
7215 searches for optimization opportunities. */
7216
7217 int
7218 safe_from_p (const_rtx x, tree exp, int top_p)
7219 {
7220 rtx exp_rtl = 0;
7221 int i, nops;
7222
7223 if (x == 0
7224 /* If EXP has varying size, we MUST use a target since we currently
7225 have no way of allocating temporaries of variable size
7226 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7227 So we assume here that something at a higher level has prevented a
7228 clash. This is somewhat bogus, but the best we can do. Only
7229 do this when X is BLKmode and when we are at the top level. */
7230 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7231 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7232 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7233 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7234 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7235 != INTEGER_CST)
7236 && GET_MODE (x) == BLKmode)
7237 /* If X is in the outgoing argument area, it is always safe. */
7238 || (MEM_P (x)
7239 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7240 || (GET_CODE (XEXP (x, 0)) == PLUS
7241 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7242 return 1;
7243
7244 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7245 find the underlying pseudo. */
7246 if (GET_CODE (x) == SUBREG)
7247 {
7248 x = SUBREG_REG (x);
7249 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7250 return 0;
7251 }
7252
7253 /* Now look at our tree code and possibly recurse. */
7254 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7255 {
7256 case tcc_declaration:
7257 exp_rtl = DECL_RTL_IF_SET (exp);
7258 break;
7259
7260 case tcc_constant:
7261 return 1;
7262
7263 case tcc_exceptional:
7264 if (TREE_CODE (exp) == TREE_LIST)
7265 {
7266 while (1)
7267 {
7268 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7269 return 0;
7270 exp = TREE_CHAIN (exp);
7271 if (!exp)
7272 return 1;
7273 if (TREE_CODE (exp) != TREE_LIST)
7274 return safe_from_p (x, exp, 0);
7275 }
7276 }
7277 else if (TREE_CODE (exp) == CONSTRUCTOR)
7278 {
7279 constructor_elt *ce;
7280 unsigned HOST_WIDE_INT idx;
7281
7282 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce)
7283 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7284 || !safe_from_p (x, ce->value, 0))
7285 return 0;
7286 return 1;
7287 }
7288 else if (TREE_CODE (exp) == ERROR_MARK)
7289 return 1; /* An already-visited SAVE_EXPR? */
7290 else
7291 return 0;
7292
7293 case tcc_statement:
7294 /* The only case we look at here is the DECL_INITIAL inside a
7295 DECL_EXPR. */
7296 return (TREE_CODE (exp) != DECL_EXPR
7297 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7298 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7299 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7300
7301 case tcc_binary:
7302 case tcc_comparison:
7303 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7304 return 0;
7305 /* Fall through. */
7306
7307 case tcc_unary:
7308 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7309
7310 case tcc_expression:
7311 case tcc_reference:
7312 case tcc_vl_exp:
7313 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7314 the expression. If it is set, we conflict iff we are that rtx or
7315 both are in memory. Otherwise, we check all operands of the
7316 expression recursively. */
7317
7318 switch (TREE_CODE (exp))
7319 {
7320 case ADDR_EXPR:
7321 /* If the operand is static or we are static, we can't conflict.
7322 Likewise if we don't conflict with the operand at all. */
7323 if (staticp (TREE_OPERAND (exp, 0))
7324 || TREE_STATIC (exp)
7325 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7326 return 1;
7327
7328 /* Otherwise, the only way this can conflict is if we are taking
7329 the address of a DECL a that address if part of X, which is
7330 very rare. */
7331 exp = TREE_OPERAND (exp, 0);
7332 if (DECL_P (exp))
7333 {
7334 if (!DECL_RTL_SET_P (exp)
7335 || !MEM_P (DECL_RTL (exp)))
7336 return 0;
7337 else
7338 exp_rtl = XEXP (DECL_RTL (exp), 0);
7339 }
7340 break;
7341
7342 case MEM_REF:
7343 if (MEM_P (x)
7344 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7345 get_alias_set (exp)))
7346 return 0;
7347 break;
7348
7349 case CALL_EXPR:
7350 /* Assume that the call will clobber all hard registers and
7351 all of memory. */
7352 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7353 || MEM_P (x))
7354 return 0;
7355 break;
7356
7357 case WITH_CLEANUP_EXPR:
7358 case CLEANUP_POINT_EXPR:
7359 /* Lowered by gimplify.c. */
7360 gcc_unreachable ();
7361
7362 case SAVE_EXPR:
7363 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7364
7365 default:
7366 break;
7367 }
7368
7369 /* If we have an rtx, we do not need to scan our operands. */
7370 if (exp_rtl)
7371 break;
7372
7373 nops = TREE_OPERAND_LENGTH (exp);
7374 for (i = 0; i < nops; i++)
7375 if (TREE_OPERAND (exp, i) != 0
7376 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7377 return 0;
7378
7379 break;
7380
7381 case tcc_type:
7382 /* Should never get a type here. */
7383 gcc_unreachable ();
7384 }
7385
7386 /* If we have an rtl, find any enclosed object. Then see if we conflict
7387 with it. */
7388 if (exp_rtl)
7389 {
7390 if (GET_CODE (exp_rtl) == SUBREG)
7391 {
7392 exp_rtl = SUBREG_REG (exp_rtl);
7393 if (REG_P (exp_rtl)
7394 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7395 return 0;
7396 }
7397
7398 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7399 are memory and they conflict. */
7400 return ! (rtx_equal_p (x, exp_rtl)
7401 || (MEM_P (x) && MEM_P (exp_rtl)
7402 && true_dependence (exp_rtl, VOIDmode, x)));
7403 }
7404
7405 /* If we reach here, it is safe. */
7406 return 1;
7407 }
7408
7409 \f
7410 /* Return the highest power of two that EXP is known to be a multiple of.
7411 This is used in updating alignment of MEMs in array references. */
7412
7413 unsigned HOST_WIDE_INT
7414 highest_pow2_factor (const_tree exp)
7415 {
7416 unsigned HOST_WIDE_INT ret;
7417 int trailing_zeros = tree_ctz (exp);
7418 if (trailing_zeros >= HOST_BITS_PER_WIDE_INT)
7419 return BIGGEST_ALIGNMENT;
7420 ret = (unsigned HOST_WIDE_INT) 1 << trailing_zeros;
7421 if (ret > BIGGEST_ALIGNMENT)
7422 return BIGGEST_ALIGNMENT;
7423 return ret;
7424 }
7425
7426 /* Similar, except that the alignment requirements of TARGET are
7427 taken into account. Assume it is at least as aligned as its
7428 type, unless it is a COMPONENT_REF in which case the layout of
7429 the structure gives the alignment. */
7430
7431 static unsigned HOST_WIDE_INT
7432 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7433 {
7434 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7435 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7436
7437 return MAX (factor, talign);
7438 }
7439 \f
7440 #ifdef HAVE_conditional_move
7441 /* Convert the tree comparison code TCODE to the rtl one where the
7442 signedness is UNSIGNEDP. */
7443
7444 static enum rtx_code
7445 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7446 {
7447 enum rtx_code code;
7448 switch (tcode)
7449 {
7450 case EQ_EXPR:
7451 code = EQ;
7452 break;
7453 case NE_EXPR:
7454 code = NE;
7455 break;
7456 case LT_EXPR:
7457 code = unsignedp ? LTU : LT;
7458 break;
7459 case LE_EXPR:
7460 code = unsignedp ? LEU : LE;
7461 break;
7462 case GT_EXPR:
7463 code = unsignedp ? GTU : GT;
7464 break;
7465 case GE_EXPR:
7466 code = unsignedp ? GEU : GE;
7467 break;
7468 case UNORDERED_EXPR:
7469 code = UNORDERED;
7470 break;
7471 case ORDERED_EXPR:
7472 code = ORDERED;
7473 break;
7474 case UNLT_EXPR:
7475 code = UNLT;
7476 break;
7477 case UNLE_EXPR:
7478 code = UNLE;
7479 break;
7480 case UNGT_EXPR:
7481 code = UNGT;
7482 break;
7483 case UNGE_EXPR:
7484 code = UNGE;
7485 break;
7486 case UNEQ_EXPR:
7487 code = UNEQ;
7488 break;
7489 case LTGT_EXPR:
7490 code = LTGT;
7491 break;
7492
7493 default:
7494 gcc_unreachable ();
7495 }
7496 return code;
7497 }
7498 #endif
7499
7500 /* Subroutine of expand_expr. Expand the two operands of a binary
7501 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7502 The value may be stored in TARGET if TARGET is nonzero. The
7503 MODIFIER argument is as documented by expand_expr. */
7504
7505 static void
7506 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7507 enum expand_modifier modifier)
7508 {
7509 if (! safe_from_p (target, exp1, 1))
7510 target = 0;
7511 if (operand_equal_p (exp0, exp1, 0))
7512 {
7513 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7514 *op1 = copy_rtx (*op0);
7515 }
7516 else
7517 {
7518 /* If we need to preserve evaluation order, copy exp0 into its own
7519 temporary variable so that it can't be clobbered by exp1. */
7520 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7521 exp0 = save_expr (exp0);
7522 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7523 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7524 }
7525 }
7526
7527 \f
7528 /* Return a MEM that contains constant EXP. DEFER is as for
7529 output_constant_def and MODIFIER is as for expand_expr. */
7530
7531 static rtx
7532 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7533 {
7534 rtx mem;
7535
7536 mem = output_constant_def (exp, defer);
7537 if (modifier != EXPAND_INITIALIZER)
7538 mem = use_anchored_address (mem);
7539 return mem;
7540 }
7541
7542 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7543 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7544
7545 static rtx
7546 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7547 enum expand_modifier modifier, addr_space_t as)
7548 {
7549 rtx result, subtarget;
7550 tree inner, offset;
7551 HOST_WIDE_INT bitsize, bitpos;
7552 int volatilep, unsignedp;
7553 enum machine_mode mode1;
7554
7555 /* If we are taking the address of a constant and are at the top level,
7556 we have to use output_constant_def since we can't call force_const_mem
7557 at top level. */
7558 /* ??? This should be considered a front-end bug. We should not be
7559 generating ADDR_EXPR of something that isn't an LVALUE. The only
7560 exception here is STRING_CST. */
7561 if (CONSTANT_CLASS_P (exp))
7562 {
7563 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7564 if (modifier < EXPAND_SUM)
7565 result = force_operand (result, target);
7566 return result;
7567 }
7568
7569 /* Everything must be something allowed by is_gimple_addressable. */
7570 switch (TREE_CODE (exp))
7571 {
7572 case INDIRECT_REF:
7573 /* This case will happen via recursion for &a->b. */
7574 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7575
7576 case MEM_REF:
7577 {
7578 tree tem = TREE_OPERAND (exp, 0);
7579 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7580 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7581 return expand_expr (tem, target, tmode, modifier);
7582 }
7583
7584 case CONST_DECL:
7585 /* Expand the initializer like constants above. */
7586 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7587 0, modifier), 0);
7588 if (modifier < EXPAND_SUM)
7589 result = force_operand (result, target);
7590 return result;
7591
7592 case REALPART_EXPR:
7593 /* The real part of the complex number is always first, therefore
7594 the address is the same as the address of the parent object. */
7595 offset = 0;
7596 bitpos = 0;
7597 inner = TREE_OPERAND (exp, 0);
7598 break;
7599
7600 case IMAGPART_EXPR:
7601 /* The imaginary part of the complex number is always second.
7602 The expression is therefore always offset by the size of the
7603 scalar type. */
7604 offset = 0;
7605 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7606 inner = TREE_OPERAND (exp, 0);
7607 break;
7608
7609 case COMPOUND_LITERAL_EXPR:
7610 /* Allow COMPOUND_LITERAL_EXPR in initializers, if e.g.
7611 rtl_for_decl_init is called on DECL_INITIAL with
7612 COMPOUNT_LITERAL_EXPRs in it, they aren't gimplified. */
7613 if (modifier == EXPAND_INITIALIZER
7614 && COMPOUND_LITERAL_EXPR_DECL (exp))
7615 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp),
7616 target, tmode, modifier, as);
7617 /* FALLTHRU */
7618 default:
7619 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7620 expand_expr, as that can have various side effects; LABEL_DECLs for
7621 example, may not have their DECL_RTL set yet. Expand the rtl of
7622 CONSTRUCTORs too, which should yield a memory reference for the
7623 constructor's contents. Assume language specific tree nodes can
7624 be expanded in some interesting way. */
7625 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7626 if (DECL_P (exp)
7627 || TREE_CODE (exp) == CONSTRUCTOR
7628 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7629 {
7630 result = expand_expr (exp, target, tmode,
7631 modifier == EXPAND_INITIALIZER
7632 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7633
7634 /* If the DECL isn't in memory, then the DECL wasn't properly
7635 marked TREE_ADDRESSABLE, which will be either a front-end
7636 or a tree optimizer bug. */
7637
7638 if (TREE_ADDRESSABLE (exp)
7639 && ! MEM_P (result)
7640 && ! targetm.calls.allocate_stack_slots_for_args ())
7641 {
7642 error ("local frame unavailable (naked function?)");
7643 return result;
7644 }
7645 else
7646 gcc_assert (MEM_P (result));
7647 result = XEXP (result, 0);
7648
7649 /* ??? Is this needed anymore? */
7650 if (DECL_P (exp))
7651 TREE_USED (exp) = 1;
7652
7653 if (modifier != EXPAND_INITIALIZER
7654 && modifier != EXPAND_CONST_ADDRESS
7655 && modifier != EXPAND_SUM)
7656 result = force_operand (result, target);
7657 return result;
7658 }
7659
7660 /* Pass FALSE as the last argument to get_inner_reference although
7661 we are expanding to RTL. The rationale is that we know how to
7662 handle "aligning nodes" here: we can just bypass them because
7663 they won't change the final object whose address will be returned
7664 (they actually exist only for that purpose). */
7665 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7666 &mode1, &unsignedp, &volatilep, false);
7667 break;
7668 }
7669
7670 /* We must have made progress. */
7671 gcc_assert (inner != exp);
7672
7673 subtarget = offset || bitpos ? NULL_RTX : target;
7674 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7675 inner alignment, force the inner to be sufficiently aligned. */
7676 if (CONSTANT_CLASS_P (inner)
7677 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7678 {
7679 inner = copy_node (inner);
7680 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7681 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7682 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7683 }
7684 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7685
7686 if (offset)
7687 {
7688 rtx tmp;
7689
7690 if (modifier != EXPAND_NORMAL)
7691 result = force_operand (result, NULL);
7692 tmp = expand_expr (offset, NULL_RTX, tmode,
7693 modifier == EXPAND_INITIALIZER
7694 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7695
7696 /* expand_expr is allowed to return an object in a mode other
7697 than TMODE. If it did, we need to convert. */
7698 if (GET_MODE (tmp) != VOIDmode && tmode != GET_MODE (tmp))
7699 tmp = convert_modes (tmode, GET_MODE (tmp),
7700 tmp, TYPE_UNSIGNED (TREE_TYPE (offset)));
7701 result = convert_memory_address_addr_space (tmode, result, as);
7702 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7703
7704 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7705 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7706 else
7707 {
7708 subtarget = bitpos ? NULL_RTX : target;
7709 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7710 1, OPTAB_LIB_WIDEN);
7711 }
7712 }
7713
7714 if (bitpos)
7715 {
7716 /* Someone beforehand should have rejected taking the address
7717 of such an object. */
7718 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7719
7720 result = convert_memory_address_addr_space (tmode, result, as);
7721 result = plus_constant (tmode, result, bitpos / BITS_PER_UNIT);
7722 if (modifier < EXPAND_SUM)
7723 result = force_operand (result, target);
7724 }
7725
7726 return result;
7727 }
7728
7729 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7730 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7731
7732 static rtx
7733 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7734 enum expand_modifier modifier)
7735 {
7736 addr_space_t as = ADDR_SPACE_GENERIC;
7737 enum machine_mode address_mode = Pmode;
7738 enum machine_mode pointer_mode = ptr_mode;
7739 enum machine_mode rmode;
7740 rtx result;
7741
7742 /* Target mode of VOIDmode says "whatever's natural". */
7743 if (tmode == VOIDmode)
7744 tmode = TYPE_MODE (TREE_TYPE (exp));
7745
7746 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7747 {
7748 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7749 address_mode = targetm.addr_space.address_mode (as);
7750 pointer_mode = targetm.addr_space.pointer_mode (as);
7751 }
7752
7753 /* We can get called with some Weird Things if the user does silliness
7754 like "(short) &a". In that case, convert_memory_address won't do
7755 the right thing, so ignore the given target mode. */
7756 if (tmode != address_mode && tmode != pointer_mode)
7757 tmode = address_mode;
7758
7759 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7760 tmode, modifier, as);
7761
7762 /* Despite expand_expr claims concerning ignoring TMODE when not
7763 strictly convenient, stuff breaks if we don't honor it. Note
7764 that combined with the above, we only do this for pointer modes. */
7765 rmode = GET_MODE (result);
7766 if (rmode == VOIDmode)
7767 rmode = tmode;
7768 if (rmode != tmode)
7769 result = convert_memory_address_addr_space (tmode, result, as);
7770
7771 return result;
7772 }
7773
7774 /* Generate code for computing CONSTRUCTOR EXP.
7775 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7776 is TRUE, instead of creating a temporary variable in memory
7777 NULL is returned and the caller needs to handle it differently. */
7778
7779 static rtx
7780 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7781 bool avoid_temp_mem)
7782 {
7783 tree type = TREE_TYPE (exp);
7784 enum machine_mode mode = TYPE_MODE (type);
7785
7786 /* Try to avoid creating a temporary at all. This is possible
7787 if all of the initializer is zero.
7788 FIXME: try to handle all [0..255] initializers we can handle
7789 with memset. */
7790 if (TREE_STATIC (exp)
7791 && !TREE_ADDRESSABLE (exp)
7792 && target != 0 && mode == BLKmode
7793 && all_zeros_p (exp))
7794 {
7795 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7796 return target;
7797 }
7798
7799 /* All elts simple constants => refer to a constant in memory. But
7800 if this is a non-BLKmode mode, let it store a field at a time
7801 since that should make a CONST_INT, CONST_WIDE_INT or
7802 CONST_DOUBLE when we fold. Likewise, if we have a target we can
7803 use, it is best to store directly into the target unless the type
7804 is large enough that memcpy will be used. If we are making an
7805 initializer and all operands are constant, put it in memory as
7806 well.
7807
7808 FIXME: Avoid trying to fill vector constructors piece-meal.
7809 Output them with output_constant_def below unless we're sure
7810 they're zeros. This should go away when vector initializers
7811 are treated like VECTOR_CST instead of arrays. */
7812 if ((TREE_STATIC (exp)
7813 && ((mode == BLKmode
7814 && ! (target != 0 && safe_from_p (target, exp, 1)))
7815 || TREE_ADDRESSABLE (exp)
7816 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type))
7817 && (! MOVE_BY_PIECES_P
7818 (tree_to_uhwi (TYPE_SIZE_UNIT (type)),
7819 TYPE_ALIGN (type)))
7820 && ! mostly_zeros_p (exp))))
7821 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7822 && TREE_CONSTANT (exp)))
7823 {
7824 rtx constructor;
7825
7826 if (avoid_temp_mem)
7827 return NULL_RTX;
7828
7829 constructor = expand_expr_constant (exp, 1, modifier);
7830
7831 if (modifier != EXPAND_CONST_ADDRESS
7832 && modifier != EXPAND_INITIALIZER
7833 && modifier != EXPAND_SUM)
7834 constructor = validize_mem (constructor);
7835
7836 return constructor;
7837 }
7838
7839 /* Handle calls that pass values in multiple non-contiguous
7840 locations. The Irix 6 ABI has examples of this. */
7841 if (target == 0 || ! safe_from_p (target, exp, 1)
7842 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7843 {
7844 if (avoid_temp_mem)
7845 return NULL_RTX;
7846
7847 target = assign_temp (type, TREE_ADDRESSABLE (exp), 1);
7848 }
7849
7850 store_constructor (exp, target, 0, int_expr_size (exp));
7851 return target;
7852 }
7853
7854
7855 /* expand_expr: generate code for computing expression EXP.
7856 An rtx for the computed value is returned. The value is never null.
7857 In the case of a void EXP, const0_rtx is returned.
7858
7859 The value may be stored in TARGET if TARGET is nonzero.
7860 TARGET is just a suggestion; callers must assume that
7861 the rtx returned may not be the same as TARGET.
7862
7863 If TARGET is CONST0_RTX, it means that the value will be ignored.
7864
7865 If TMODE is not VOIDmode, it suggests generating the
7866 result in mode TMODE. But this is done only when convenient.
7867 Otherwise, TMODE is ignored and the value generated in its natural mode.
7868 TMODE is just a suggestion; callers must assume that
7869 the rtx returned may not have mode TMODE.
7870
7871 Note that TARGET may have neither TMODE nor MODE. In that case, it
7872 probably will not be used.
7873
7874 If MODIFIER is EXPAND_SUM then when EXP is an addition
7875 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7876 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7877 products as above, or REG or MEM, or constant.
7878 Ordinarily in such cases we would output mul or add instructions
7879 and then return a pseudo reg containing the sum.
7880
7881 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7882 it also marks a label as absolutely required (it can't be dead).
7883 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7884 This is used for outputting expressions used in initializers.
7885
7886 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7887 with a constant address even if that address is not normally legitimate.
7888 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7889
7890 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7891 a call parameter. Such targets require special care as we haven't yet
7892 marked TARGET so that it's safe from being trashed by libcalls. We
7893 don't want to use TARGET for anything but the final result;
7894 Intermediate values must go elsewhere. Additionally, calls to
7895 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7896
7897 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7898 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7899 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7900 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7901 recursively.
7902
7903 If INNER_REFERENCE_P is true, we are expanding an inner reference.
7904 In this case, we don't adjust a returned MEM rtx that wouldn't be
7905 sufficiently aligned for its mode; instead, it's up to the caller
7906 to deal with it afterwards. This is used to make sure that unaligned
7907 base objects for which out-of-bounds accesses are supported, for
7908 example record types with trailing arrays, aren't realigned behind
7909 the back of the caller.
7910 The normal operating mode is to pass FALSE for this parameter. */
7911
7912 rtx
7913 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7914 enum expand_modifier modifier, rtx *alt_rtl,
7915 bool inner_reference_p)
7916 {
7917 rtx ret;
7918
7919 /* Handle ERROR_MARK before anybody tries to access its type. */
7920 if (TREE_CODE (exp) == ERROR_MARK
7921 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7922 {
7923 ret = CONST0_RTX (tmode);
7924 return ret ? ret : const0_rtx;
7925 }
7926
7927 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl,
7928 inner_reference_p);
7929 return ret;
7930 }
7931
7932 /* Try to expand the conditional expression which is represented by
7933 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If succeseds
7934 return the rtl reg which repsents the result. Otherwise return
7935 NULL_RTL. */
7936
7937 static rtx
7938 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
7939 tree treeop1 ATTRIBUTE_UNUSED,
7940 tree treeop2 ATTRIBUTE_UNUSED)
7941 {
7942 #ifdef HAVE_conditional_move
7943 rtx insn;
7944 rtx op00, op01, op1, op2;
7945 enum rtx_code comparison_code;
7946 enum machine_mode comparison_mode;
7947 gimple srcstmt;
7948 rtx temp;
7949 tree type = TREE_TYPE (treeop1);
7950 int unsignedp = TYPE_UNSIGNED (type);
7951 enum machine_mode mode = TYPE_MODE (type);
7952 enum machine_mode orig_mode = mode;
7953
7954 /* If we cannot do a conditional move on the mode, try doing it
7955 with the promoted mode. */
7956 if (!can_conditionally_move_p (mode))
7957 {
7958 mode = promote_mode (type, mode, &unsignedp);
7959 if (!can_conditionally_move_p (mode))
7960 return NULL_RTX;
7961 temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */
7962 }
7963 else
7964 temp = assign_temp (type, 0, 1);
7965
7966 start_sequence ();
7967 expand_operands (treeop1, treeop2,
7968 temp, &op1, &op2, EXPAND_NORMAL);
7969
7970 if (TREE_CODE (treeop0) == SSA_NAME
7971 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
7972 {
7973 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
7974 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
7975 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
7976 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
7977 comparison_mode = TYPE_MODE (type);
7978 unsignedp = TYPE_UNSIGNED (type);
7979 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7980 }
7981 else if (TREE_CODE_CLASS (TREE_CODE (treeop0)) == tcc_comparison)
7982 {
7983 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
7984 enum tree_code cmpcode = TREE_CODE (treeop0);
7985 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
7986 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
7987 unsignedp = TYPE_UNSIGNED (type);
7988 comparison_mode = TYPE_MODE (type);
7989 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7990 }
7991 else
7992 {
7993 op00 = expand_normal (treeop0);
7994 op01 = const0_rtx;
7995 comparison_code = NE;
7996 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
7997 }
7998
7999 if (GET_MODE (op1) != mode)
8000 op1 = gen_lowpart (mode, op1);
8001
8002 if (GET_MODE (op2) != mode)
8003 op2 = gen_lowpart (mode, op2);
8004
8005 /* Try to emit the conditional move. */
8006 insn = emit_conditional_move (temp, comparison_code,
8007 op00, op01, comparison_mode,
8008 op1, op2, mode,
8009 unsignedp);
8010
8011 /* If we could do the conditional move, emit the sequence,
8012 and return. */
8013 if (insn)
8014 {
8015 rtx_insn *seq = get_insns ();
8016 end_sequence ();
8017 emit_insn (seq);
8018 return convert_modes (orig_mode, mode, temp, 0);
8019 }
8020
8021 /* Otherwise discard the sequence and fall back to code with
8022 branches. */
8023 end_sequence ();
8024 #endif
8025 return NULL_RTX;
8026 }
8027
8028 rtx
8029 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
8030 enum expand_modifier modifier)
8031 {
8032 rtx op0, op1, op2, temp;
8033 tree type;
8034 int unsignedp;
8035 enum machine_mode mode;
8036 enum tree_code code = ops->code;
8037 optab this_optab;
8038 rtx subtarget, original_target;
8039 int ignore;
8040 bool reduce_bit_field;
8041 location_t loc = ops->location;
8042 tree treeop0, treeop1, treeop2;
8043 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8044 ? reduce_to_bit_field_precision ((expr), \
8045 target, \
8046 type) \
8047 : (expr))
8048
8049 type = ops->type;
8050 mode = TYPE_MODE (type);
8051 unsignedp = TYPE_UNSIGNED (type);
8052
8053 treeop0 = ops->op0;
8054 treeop1 = ops->op1;
8055 treeop2 = ops->op2;
8056
8057 /* We should be called only on simple (binary or unary) expressions,
8058 exactly those that are valid in gimple expressions that aren't
8059 GIMPLE_SINGLE_RHS (or invalid). */
8060 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
8061 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
8062 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
8063
8064 ignore = (target == const0_rtx
8065 || ((CONVERT_EXPR_CODE_P (code)
8066 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8067 && TREE_CODE (type) == VOID_TYPE));
8068
8069 /* We should be called only if we need the result. */
8070 gcc_assert (!ignore);
8071
8072 /* An operation in what may be a bit-field type needs the
8073 result to be reduced to the precision of the bit-field type,
8074 which is narrower than that of the type's mode. */
8075 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8076 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8077
8078 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8079 target = 0;
8080
8081 /* Use subtarget as the target for operand 0 of a binary operation. */
8082 subtarget = get_subtarget (target);
8083 original_target = target;
8084
8085 switch (code)
8086 {
8087 case NON_LVALUE_EXPR:
8088 case PAREN_EXPR:
8089 CASE_CONVERT:
8090 if (treeop0 == error_mark_node)
8091 return const0_rtx;
8092
8093 if (TREE_CODE (type) == UNION_TYPE)
8094 {
8095 tree valtype = TREE_TYPE (treeop0);
8096
8097 /* If both input and output are BLKmode, this conversion isn't doing
8098 anything except possibly changing memory attribute. */
8099 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8100 {
8101 rtx result = expand_expr (treeop0, target, tmode,
8102 modifier);
8103
8104 result = copy_rtx (result);
8105 set_mem_attributes (result, type, 0);
8106 return result;
8107 }
8108
8109 if (target == 0)
8110 {
8111 if (TYPE_MODE (type) != BLKmode)
8112 target = gen_reg_rtx (TYPE_MODE (type));
8113 else
8114 target = assign_temp (type, 1, 1);
8115 }
8116
8117 if (MEM_P (target))
8118 /* Store data into beginning of memory target. */
8119 store_expr (treeop0,
8120 adjust_address (target, TYPE_MODE (valtype), 0),
8121 modifier == EXPAND_STACK_PARM,
8122 false);
8123
8124 else
8125 {
8126 gcc_assert (REG_P (target));
8127
8128 /* Store this field into a union of the proper type. */
8129 store_field (target,
8130 MIN ((int_size_in_bytes (TREE_TYPE
8131 (treeop0))
8132 * BITS_PER_UNIT),
8133 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
8134 0, 0, 0, TYPE_MODE (valtype), treeop0, 0, false);
8135 }
8136
8137 /* Return the entire union. */
8138 return target;
8139 }
8140
8141 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8142 {
8143 op0 = expand_expr (treeop0, target, VOIDmode,
8144 modifier);
8145
8146 /* If the signedness of the conversion differs and OP0 is
8147 a promoted SUBREG, clear that indication since we now
8148 have to do the proper extension. */
8149 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8150 && GET_CODE (op0) == SUBREG)
8151 SUBREG_PROMOTED_VAR_P (op0) = 0;
8152
8153 return REDUCE_BIT_FIELD (op0);
8154 }
8155
8156 op0 = expand_expr (treeop0, NULL_RTX, mode,
8157 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8158 if (GET_MODE (op0) == mode)
8159 ;
8160
8161 /* If OP0 is a constant, just convert it into the proper mode. */
8162 else if (CONSTANT_P (op0))
8163 {
8164 tree inner_type = TREE_TYPE (treeop0);
8165 enum machine_mode inner_mode = GET_MODE (op0);
8166
8167 if (inner_mode == VOIDmode)
8168 inner_mode = TYPE_MODE (inner_type);
8169
8170 if (modifier == EXPAND_INITIALIZER)
8171 op0 = simplify_gen_subreg (mode, op0, inner_mode,
8172 subreg_lowpart_offset (mode,
8173 inner_mode));
8174 else
8175 op0= convert_modes (mode, inner_mode, op0,
8176 TYPE_UNSIGNED (inner_type));
8177 }
8178
8179 else if (modifier == EXPAND_INITIALIZER)
8180 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8181
8182 else if (target == 0)
8183 op0 = convert_to_mode (mode, op0,
8184 TYPE_UNSIGNED (TREE_TYPE
8185 (treeop0)));
8186 else
8187 {
8188 convert_move (target, op0,
8189 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8190 op0 = target;
8191 }
8192
8193 return REDUCE_BIT_FIELD (op0);
8194
8195 case ADDR_SPACE_CONVERT_EXPR:
8196 {
8197 tree treeop0_type = TREE_TYPE (treeop0);
8198 addr_space_t as_to;
8199 addr_space_t as_from;
8200
8201 gcc_assert (POINTER_TYPE_P (type));
8202 gcc_assert (POINTER_TYPE_P (treeop0_type));
8203
8204 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8205 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8206
8207 /* Conversions between pointers to the same address space should
8208 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8209 gcc_assert (as_to != as_from);
8210
8211 /* Ask target code to handle conversion between pointers
8212 to overlapping address spaces. */
8213 if (targetm.addr_space.subset_p (as_to, as_from)
8214 || targetm.addr_space.subset_p (as_from, as_to))
8215 {
8216 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8217 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8218 gcc_assert (op0);
8219 return op0;
8220 }
8221
8222 /* For disjoint address spaces, converting anything but
8223 a null pointer invokes undefined behaviour. We simply
8224 always return a null pointer here. */
8225 return CONST0_RTX (mode);
8226 }
8227
8228 case POINTER_PLUS_EXPR:
8229 /* Even though the sizetype mode and the pointer's mode can be different
8230 expand is able to handle this correctly and get the correct result out
8231 of the PLUS_EXPR code. */
8232 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8233 if sizetype precision is smaller than pointer precision. */
8234 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8235 treeop1 = fold_convert_loc (loc, type,
8236 fold_convert_loc (loc, ssizetype,
8237 treeop1));
8238 /* If sizetype precision is larger than pointer precision, truncate the
8239 offset to have matching modes. */
8240 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8241 treeop1 = fold_convert_loc (loc, type, treeop1);
8242
8243 case PLUS_EXPR:
8244 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8245 something else, make sure we add the register to the constant and
8246 then to the other thing. This case can occur during strength
8247 reduction and doing it this way will produce better code if the
8248 frame pointer or argument pointer is eliminated.
8249
8250 fold-const.c will ensure that the constant is always in the inner
8251 PLUS_EXPR, so the only case we need to do anything about is if
8252 sp, ap, or fp is our second argument, in which case we must swap
8253 the innermost first argument and our second argument. */
8254
8255 if (TREE_CODE (treeop0) == PLUS_EXPR
8256 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8257 && TREE_CODE (treeop1) == VAR_DECL
8258 && (DECL_RTL (treeop1) == frame_pointer_rtx
8259 || DECL_RTL (treeop1) == stack_pointer_rtx
8260 || DECL_RTL (treeop1) == arg_pointer_rtx))
8261 {
8262 gcc_unreachable ();
8263 }
8264
8265 /* If the result is to be ptr_mode and we are adding an integer to
8266 something, we might be forming a constant. So try to use
8267 plus_constant. If it produces a sum and we can't accept it,
8268 use force_operand. This allows P = &ARR[const] to generate
8269 efficient code on machines where a SYMBOL_REF is not a valid
8270 address.
8271
8272 If this is an EXPAND_SUM call, always return the sum. */
8273 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8274 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8275 {
8276 if (modifier == EXPAND_STACK_PARM)
8277 target = 0;
8278 if (TREE_CODE (treeop0) == INTEGER_CST
8279 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8280 && TREE_CONSTANT (treeop1))
8281 {
8282 rtx constant_part;
8283 HOST_WIDE_INT wc;
8284 enum machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop1));
8285
8286 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8287 EXPAND_SUM);
8288 /* Use wi::shwi to ensure that the constant is
8289 truncated according to the mode of OP1, then sign extended
8290 to a HOST_WIDE_INT. Using the constant directly can result
8291 in non-canonical RTL in a 64x32 cross compile. */
8292 wc = TREE_INT_CST_LOW (treeop0);
8293 constant_part =
8294 immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8295 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8296 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8297 op1 = force_operand (op1, target);
8298 return REDUCE_BIT_FIELD (op1);
8299 }
8300
8301 else if (TREE_CODE (treeop1) == INTEGER_CST
8302 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8303 && TREE_CONSTANT (treeop0))
8304 {
8305 rtx constant_part;
8306 HOST_WIDE_INT wc;
8307 enum machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop0));
8308
8309 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8310 (modifier == EXPAND_INITIALIZER
8311 ? EXPAND_INITIALIZER : EXPAND_SUM));
8312 if (! CONSTANT_P (op0))
8313 {
8314 op1 = expand_expr (treeop1, NULL_RTX,
8315 VOIDmode, modifier);
8316 /* Return a PLUS if modifier says it's OK. */
8317 if (modifier == EXPAND_SUM
8318 || modifier == EXPAND_INITIALIZER)
8319 return simplify_gen_binary (PLUS, mode, op0, op1);
8320 goto binop2;
8321 }
8322 /* Use wi::shwi to ensure that the constant is
8323 truncated according to the mode of OP1, then sign extended
8324 to a HOST_WIDE_INT. Using the constant directly can result
8325 in non-canonical RTL in a 64x32 cross compile. */
8326 wc = TREE_INT_CST_LOW (treeop1);
8327 constant_part
8328 = immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8329 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8330 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8331 op0 = force_operand (op0, target);
8332 return REDUCE_BIT_FIELD (op0);
8333 }
8334 }
8335
8336 /* Use TER to expand pointer addition of a negated value
8337 as pointer subtraction. */
8338 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8339 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8340 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8341 && TREE_CODE (treeop1) == SSA_NAME
8342 && TYPE_MODE (TREE_TYPE (treeop0))
8343 == TYPE_MODE (TREE_TYPE (treeop1)))
8344 {
8345 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8346 if (def)
8347 {
8348 treeop1 = gimple_assign_rhs1 (def);
8349 code = MINUS_EXPR;
8350 goto do_minus;
8351 }
8352 }
8353
8354 /* No sense saving up arithmetic to be done
8355 if it's all in the wrong mode to form part of an address.
8356 And force_operand won't know whether to sign-extend or
8357 zero-extend. */
8358 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8359 || mode != ptr_mode)
8360 {
8361 expand_operands (treeop0, treeop1,
8362 subtarget, &op0, &op1, EXPAND_NORMAL);
8363 if (op0 == const0_rtx)
8364 return op1;
8365 if (op1 == const0_rtx)
8366 return op0;
8367 goto binop2;
8368 }
8369
8370 expand_operands (treeop0, treeop1,
8371 subtarget, &op0, &op1, modifier);
8372 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8373
8374 case MINUS_EXPR:
8375 do_minus:
8376 /* For initializers, we are allowed to return a MINUS of two
8377 symbolic constants. Here we handle all cases when both operands
8378 are constant. */
8379 /* Handle difference of two symbolic constants,
8380 for the sake of an initializer. */
8381 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8382 && really_constant_p (treeop0)
8383 && really_constant_p (treeop1))
8384 {
8385 expand_operands (treeop0, treeop1,
8386 NULL_RTX, &op0, &op1, modifier);
8387
8388 /* If the last operand is a CONST_INT, use plus_constant of
8389 the negated constant. Else make the MINUS. */
8390 if (CONST_INT_P (op1))
8391 return REDUCE_BIT_FIELD (plus_constant (mode, op0,
8392 -INTVAL (op1)));
8393 else
8394 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8395 }
8396
8397 /* No sense saving up arithmetic to be done
8398 if it's all in the wrong mode to form part of an address.
8399 And force_operand won't know whether to sign-extend or
8400 zero-extend. */
8401 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8402 || mode != ptr_mode)
8403 goto binop;
8404
8405 expand_operands (treeop0, treeop1,
8406 subtarget, &op0, &op1, modifier);
8407
8408 /* Convert A - const to A + (-const). */
8409 if (CONST_INT_P (op1))
8410 {
8411 op1 = negate_rtx (mode, op1);
8412 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8413 }
8414
8415 goto binop2;
8416
8417 case WIDEN_MULT_PLUS_EXPR:
8418 case WIDEN_MULT_MINUS_EXPR:
8419 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8420 op2 = expand_normal (treeop2);
8421 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8422 target, unsignedp);
8423 return target;
8424
8425 case WIDEN_MULT_EXPR:
8426 /* If first operand is constant, swap them.
8427 Thus the following special case checks need only
8428 check the second operand. */
8429 if (TREE_CODE (treeop0) == INTEGER_CST)
8430 {
8431 tree t1 = treeop0;
8432 treeop0 = treeop1;
8433 treeop1 = t1;
8434 }
8435
8436 /* First, check if we have a multiplication of one signed and one
8437 unsigned operand. */
8438 if (TREE_CODE (treeop1) != INTEGER_CST
8439 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8440 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8441 {
8442 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8443 this_optab = usmul_widen_optab;
8444 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8445 != CODE_FOR_nothing)
8446 {
8447 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8448 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8449 EXPAND_NORMAL);
8450 else
8451 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8452 EXPAND_NORMAL);
8453 /* op0 and op1 might still be constant, despite the above
8454 != INTEGER_CST check. Handle it. */
8455 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8456 {
8457 op0 = convert_modes (innermode, mode, op0, true);
8458 op1 = convert_modes (innermode, mode, op1, false);
8459 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8460 target, unsignedp));
8461 }
8462 goto binop3;
8463 }
8464 }
8465 /* Check for a multiplication with matching signedness. */
8466 else if ((TREE_CODE (treeop1) == INTEGER_CST
8467 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8468 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8469 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8470 {
8471 tree op0type = TREE_TYPE (treeop0);
8472 enum machine_mode innermode = TYPE_MODE (op0type);
8473 bool zextend_p = TYPE_UNSIGNED (op0type);
8474 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8475 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8476
8477 if (TREE_CODE (treeop0) != INTEGER_CST)
8478 {
8479 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8480 != CODE_FOR_nothing)
8481 {
8482 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8483 EXPAND_NORMAL);
8484 /* op0 and op1 might still be constant, despite the above
8485 != INTEGER_CST check. Handle it. */
8486 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8487 {
8488 widen_mult_const:
8489 op0 = convert_modes (innermode, mode, op0, zextend_p);
8490 op1
8491 = convert_modes (innermode, mode, op1,
8492 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8493 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8494 target,
8495 unsignedp));
8496 }
8497 temp = expand_widening_mult (mode, op0, op1, target,
8498 unsignedp, this_optab);
8499 return REDUCE_BIT_FIELD (temp);
8500 }
8501 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8502 != CODE_FOR_nothing
8503 && innermode == word_mode)
8504 {
8505 rtx htem, hipart;
8506 op0 = expand_normal (treeop0);
8507 if (TREE_CODE (treeop1) == INTEGER_CST)
8508 op1 = convert_modes (innermode, mode,
8509 expand_normal (treeop1),
8510 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8511 else
8512 op1 = expand_normal (treeop1);
8513 /* op0 and op1 might still be constant, despite the above
8514 != INTEGER_CST check. Handle it. */
8515 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8516 goto widen_mult_const;
8517 temp = expand_binop (mode, other_optab, op0, op1, target,
8518 unsignedp, OPTAB_LIB_WIDEN);
8519 hipart = gen_highpart (innermode, temp);
8520 htem = expand_mult_highpart_adjust (innermode, hipart,
8521 op0, op1, hipart,
8522 zextend_p);
8523 if (htem != hipart)
8524 emit_move_insn (hipart, htem);
8525 return REDUCE_BIT_FIELD (temp);
8526 }
8527 }
8528 }
8529 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8530 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8531 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8532 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8533
8534 case FMA_EXPR:
8535 {
8536 optab opt = fma_optab;
8537 gimple def0, def2;
8538
8539 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8540 call. */
8541 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8542 {
8543 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8544 tree call_expr;
8545
8546 gcc_assert (fn != NULL_TREE);
8547 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8548 return expand_builtin (call_expr, target, subtarget, mode, false);
8549 }
8550
8551 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8552 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8553
8554 op0 = op2 = NULL;
8555
8556 if (def0 && def2
8557 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8558 {
8559 opt = fnms_optab;
8560 op0 = expand_normal (gimple_assign_rhs1 (def0));
8561 op2 = expand_normal (gimple_assign_rhs1 (def2));
8562 }
8563 else if (def0
8564 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8565 {
8566 opt = fnma_optab;
8567 op0 = expand_normal (gimple_assign_rhs1 (def0));
8568 }
8569 else if (def2
8570 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8571 {
8572 opt = fms_optab;
8573 op2 = expand_normal (gimple_assign_rhs1 (def2));
8574 }
8575
8576 if (op0 == NULL)
8577 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8578 if (op2 == NULL)
8579 op2 = expand_normal (treeop2);
8580 op1 = expand_normal (treeop1);
8581
8582 return expand_ternary_op (TYPE_MODE (type), opt,
8583 op0, op1, op2, target, 0);
8584 }
8585
8586 case MULT_EXPR:
8587 /* If this is a fixed-point operation, then we cannot use the code
8588 below because "expand_mult" doesn't support sat/no-sat fixed-point
8589 multiplications. */
8590 if (ALL_FIXED_POINT_MODE_P (mode))
8591 goto binop;
8592
8593 /* If first operand is constant, swap them.
8594 Thus the following special case checks need only
8595 check the second operand. */
8596 if (TREE_CODE (treeop0) == INTEGER_CST)
8597 {
8598 tree t1 = treeop0;
8599 treeop0 = treeop1;
8600 treeop1 = t1;
8601 }
8602
8603 /* Attempt to return something suitable for generating an
8604 indexed address, for machines that support that. */
8605
8606 if (modifier == EXPAND_SUM && mode == ptr_mode
8607 && tree_fits_shwi_p (treeop1))
8608 {
8609 tree exp1 = treeop1;
8610
8611 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8612 EXPAND_SUM);
8613
8614 if (!REG_P (op0))
8615 op0 = force_operand (op0, NULL_RTX);
8616 if (!REG_P (op0))
8617 op0 = copy_to_mode_reg (mode, op0);
8618
8619 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8620 gen_int_mode (tree_to_shwi (exp1),
8621 TYPE_MODE (TREE_TYPE (exp1)))));
8622 }
8623
8624 if (modifier == EXPAND_STACK_PARM)
8625 target = 0;
8626
8627 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8628 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8629
8630 case TRUNC_DIV_EXPR:
8631 case FLOOR_DIV_EXPR:
8632 case CEIL_DIV_EXPR:
8633 case ROUND_DIV_EXPR:
8634 case EXACT_DIV_EXPR:
8635 /* If this is a fixed-point operation, then we cannot use the code
8636 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8637 divisions. */
8638 if (ALL_FIXED_POINT_MODE_P (mode))
8639 goto binop;
8640
8641 if (modifier == EXPAND_STACK_PARM)
8642 target = 0;
8643 /* Possible optimization: compute the dividend with EXPAND_SUM
8644 then if the divisor is constant can optimize the case
8645 where some terms of the dividend have coeffs divisible by it. */
8646 expand_operands (treeop0, treeop1,
8647 subtarget, &op0, &op1, EXPAND_NORMAL);
8648 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8649
8650 case RDIV_EXPR:
8651 goto binop;
8652
8653 case MULT_HIGHPART_EXPR:
8654 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8655 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp);
8656 gcc_assert (temp);
8657 return temp;
8658
8659 case TRUNC_MOD_EXPR:
8660 case FLOOR_MOD_EXPR:
8661 case CEIL_MOD_EXPR:
8662 case ROUND_MOD_EXPR:
8663 if (modifier == EXPAND_STACK_PARM)
8664 target = 0;
8665 expand_operands (treeop0, treeop1,
8666 subtarget, &op0, &op1, EXPAND_NORMAL);
8667 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8668
8669 case FIXED_CONVERT_EXPR:
8670 op0 = expand_normal (treeop0);
8671 if (target == 0 || modifier == EXPAND_STACK_PARM)
8672 target = gen_reg_rtx (mode);
8673
8674 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8675 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8676 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8677 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8678 else
8679 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8680 return target;
8681
8682 case FIX_TRUNC_EXPR:
8683 op0 = expand_normal (treeop0);
8684 if (target == 0 || modifier == EXPAND_STACK_PARM)
8685 target = gen_reg_rtx (mode);
8686 expand_fix (target, op0, unsignedp);
8687 return target;
8688
8689 case FLOAT_EXPR:
8690 op0 = expand_normal (treeop0);
8691 if (target == 0 || modifier == EXPAND_STACK_PARM)
8692 target = gen_reg_rtx (mode);
8693 /* expand_float can't figure out what to do if FROM has VOIDmode.
8694 So give it the correct mode. With -O, cse will optimize this. */
8695 if (GET_MODE (op0) == VOIDmode)
8696 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8697 op0);
8698 expand_float (target, op0,
8699 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8700 return target;
8701
8702 case NEGATE_EXPR:
8703 op0 = expand_expr (treeop0, subtarget,
8704 VOIDmode, EXPAND_NORMAL);
8705 if (modifier == EXPAND_STACK_PARM)
8706 target = 0;
8707 temp = expand_unop (mode,
8708 optab_for_tree_code (NEGATE_EXPR, type,
8709 optab_default),
8710 op0, target, 0);
8711 gcc_assert (temp);
8712 return REDUCE_BIT_FIELD (temp);
8713
8714 case ABS_EXPR:
8715 op0 = expand_expr (treeop0, subtarget,
8716 VOIDmode, EXPAND_NORMAL);
8717 if (modifier == EXPAND_STACK_PARM)
8718 target = 0;
8719
8720 /* ABS_EXPR is not valid for complex arguments. */
8721 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8722 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8723
8724 /* Unsigned abs is simply the operand. Testing here means we don't
8725 risk generating incorrect code below. */
8726 if (TYPE_UNSIGNED (type))
8727 return op0;
8728
8729 return expand_abs (mode, op0, target, unsignedp,
8730 safe_from_p (target, treeop0, 1));
8731
8732 case MAX_EXPR:
8733 case MIN_EXPR:
8734 target = original_target;
8735 if (target == 0
8736 || modifier == EXPAND_STACK_PARM
8737 || (MEM_P (target) && MEM_VOLATILE_P (target))
8738 || GET_MODE (target) != mode
8739 || (REG_P (target)
8740 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8741 target = gen_reg_rtx (mode);
8742 expand_operands (treeop0, treeop1,
8743 target, &op0, &op1, EXPAND_NORMAL);
8744
8745 /* First try to do it with a special MIN or MAX instruction.
8746 If that does not win, use a conditional jump to select the proper
8747 value. */
8748 this_optab = optab_for_tree_code (code, type, optab_default);
8749 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8750 OPTAB_WIDEN);
8751 if (temp != 0)
8752 return temp;
8753
8754 /* At this point, a MEM target is no longer useful; we will get better
8755 code without it. */
8756
8757 if (! REG_P (target))
8758 target = gen_reg_rtx (mode);
8759
8760 /* If op1 was placed in target, swap op0 and op1. */
8761 if (target != op0 && target == op1)
8762 {
8763 temp = op0;
8764 op0 = op1;
8765 op1 = temp;
8766 }
8767
8768 /* We generate better code and avoid problems with op1 mentioning
8769 target by forcing op1 into a pseudo if it isn't a constant. */
8770 if (! CONSTANT_P (op1))
8771 op1 = force_reg (mode, op1);
8772
8773 {
8774 enum rtx_code comparison_code;
8775 rtx cmpop1 = op1;
8776
8777 if (code == MAX_EXPR)
8778 comparison_code = unsignedp ? GEU : GE;
8779 else
8780 comparison_code = unsignedp ? LEU : LE;
8781
8782 /* Canonicalize to comparisons against 0. */
8783 if (op1 == const1_rtx)
8784 {
8785 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8786 or (a != 0 ? a : 1) for unsigned.
8787 For MIN we are safe converting (a <= 1 ? a : 1)
8788 into (a <= 0 ? a : 1) */
8789 cmpop1 = const0_rtx;
8790 if (code == MAX_EXPR)
8791 comparison_code = unsignedp ? NE : GT;
8792 }
8793 if (op1 == constm1_rtx && !unsignedp)
8794 {
8795 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8796 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8797 cmpop1 = const0_rtx;
8798 if (code == MIN_EXPR)
8799 comparison_code = LT;
8800 }
8801 #ifdef HAVE_conditional_move
8802 /* Use a conditional move if possible. */
8803 if (can_conditionally_move_p (mode))
8804 {
8805 rtx insn;
8806
8807 start_sequence ();
8808
8809 /* Try to emit the conditional move. */
8810 insn = emit_conditional_move (target, comparison_code,
8811 op0, cmpop1, mode,
8812 op0, op1, mode,
8813 unsignedp);
8814
8815 /* If we could do the conditional move, emit the sequence,
8816 and return. */
8817 if (insn)
8818 {
8819 rtx_insn *seq = get_insns ();
8820 end_sequence ();
8821 emit_insn (seq);
8822 return target;
8823 }
8824
8825 /* Otherwise discard the sequence and fall back to code with
8826 branches. */
8827 end_sequence ();
8828 }
8829 #endif
8830 if (target != op0)
8831 emit_move_insn (target, op0);
8832
8833 temp = gen_label_rtx ();
8834 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8835 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8836 -1);
8837 }
8838 emit_move_insn (target, op1);
8839 emit_label (temp);
8840 return target;
8841
8842 case BIT_NOT_EXPR:
8843 op0 = expand_expr (treeop0, subtarget,
8844 VOIDmode, EXPAND_NORMAL);
8845 if (modifier == EXPAND_STACK_PARM)
8846 target = 0;
8847 /* In case we have to reduce the result to bitfield precision
8848 for unsigned bitfield expand this as XOR with a proper constant
8849 instead. */
8850 if (reduce_bit_field && TYPE_UNSIGNED (type))
8851 {
8852 wide_int mask = wi::mask (TYPE_PRECISION (type),
8853 false, GET_MODE_PRECISION (mode));
8854
8855 temp = expand_binop (mode, xor_optab, op0,
8856 immed_wide_int_const (mask, mode),
8857 target, 1, OPTAB_LIB_WIDEN);
8858 }
8859 else
8860 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8861 gcc_assert (temp);
8862 return temp;
8863
8864 /* ??? Can optimize bitwise operations with one arg constant.
8865 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8866 and (a bitwise1 b) bitwise2 b (etc)
8867 but that is probably not worth while. */
8868
8869 case BIT_AND_EXPR:
8870 case BIT_IOR_EXPR:
8871 case BIT_XOR_EXPR:
8872 goto binop;
8873
8874 case LROTATE_EXPR:
8875 case RROTATE_EXPR:
8876 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8877 || (GET_MODE_PRECISION (TYPE_MODE (type))
8878 == TYPE_PRECISION (type)));
8879 /* fall through */
8880
8881 case LSHIFT_EXPR:
8882 case RSHIFT_EXPR:
8883 /* If this is a fixed-point operation, then we cannot use the code
8884 below because "expand_shift" doesn't support sat/no-sat fixed-point
8885 shifts. */
8886 if (ALL_FIXED_POINT_MODE_P (mode))
8887 goto binop;
8888
8889 if (! safe_from_p (subtarget, treeop1, 1))
8890 subtarget = 0;
8891 if (modifier == EXPAND_STACK_PARM)
8892 target = 0;
8893 op0 = expand_expr (treeop0, subtarget,
8894 VOIDmode, EXPAND_NORMAL);
8895 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8896 unsignedp);
8897 if (code == LSHIFT_EXPR)
8898 temp = REDUCE_BIT_FIELD (temp);
8899 return temp;
8900
8901 /* Could determine the answer when only additive constants differ. Also,
8902 the addition of one can be handled by changing the condition. */
8903 case LT_EXPR:
8904 case LE_EXPR:
8905 case GT_EXPR:
8906 case GE_EXPR:
8907 case EQ_EXPR:
8908 case NE_EXPR:
8909 case UNORDERED_EXPR:
8910 case ORDERED_EXPR:
8911 case UNLT_EXPR:
8912 case UNLE_EXPR:
8913 case UNGT_EXPR:
8914 case UNGE_EXPR:
8915 case UNEQ_EXPR:
8916 case LTGT_EXPR:
8917 temp = do_store_flag (ops,
8918 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8919 tmode != VOIDmode ? tmode : mode);
8920 if (temp)
8921 return temp;
8922
8923 /* Use a compare and a jump for BLKmode comparisons, or for function
8924 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8925
8926 if ((target == 0
8927 || modifier == EXPAND_STACK_PARM
8928 || ! safe_from_p (target, treeop0, 1)
8929 || ! safe_from_p (target, treeop1, 1)
8930 /* Make sure we don't have a hard reg (such as function's return
8931 value) live across basic blocks, if not optimizing. */
8932 || (!optimize && REG_P (target)
8933 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8934 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8935
8936 emit_move_insn (target, const0_rtx);
8937
8938 op1 = gen_label_rtx ();
8939 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8940
8941 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8942 emit_move_insn (target, constm1_rtx);
8943 else
8944 emit_move_insn (target, const1_rtx);
8945
8946 emit_label (op1);
8947 return target;
8948
8949 case COMPLEX_EXPR:
8950 /* Get the rtx code of the operands. */
8951 op0 = expand_normal (treeop0);
8952 op1 = expand_normal (treeop1);
8953
8954 if (!target)
8955 target = gen_reg_rtx (TYPE_MODE (type));
8956 else
8957 /* If target overlaps with op1, then either we need to force
8958 op1 into a pseudo (if target also overlaps with op0),
8959 or write the complex parts in reverse order. */
8960 switch (GET_CODE (target))
8961 {
8962 case CONCAT:
8963 if (reg_overlap_mentioned_p (XEXP (target, 0), op1))
8964 {
8965 if (reg_overlap_mentioned_p (XEXP (target, 1), op0))
8966 {
8967 complex_expr_force_op1:
8968 temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target)));
8969 emit_move_insn (temp, op1);
8970 op1 = temp;
8971 break;
8972 }
8973 complex_expr_swap_order:
8974 /* Move the imaginary (op1) and real (op0) parts to their
8975 location. */
8976 write_complex_part (target, op1, true);
8977 write_complex_part (target, op0, false);
8978
8979 return target;
8980 }
8981 break;
8982 case MEM:
8983 temp = adjust_address_nv (target,
8984 GET_MODE_INNER (GET_MODE (target)), 0);
8985 if (reg_overlap_mentioned_p (temp, op1))
8986 {
8987 enum machine_mode imode = GET_MODE_INNER (GET_MODE (target));
8988 temp = adjust_address_nv (target, imode,
8989 GET_MODE_SIZE (imode));
8990 if (reg_overlap_mentioned_p (temp, op0))
8991 goto complex_expr_force_op1;
8992 goto complex_expr_swap_order;
8993 }
8994 break;
8995 default:
8996 if (reg_overlap_mentioned_p (target, op1))
8997 {
8998 if (reg_overlap_mentioned_p (target, op0))
8999 goto complex_expr_force_op1;
9000 goto complex_expr_swap_order;
9001 }
9002 break;
9003 }
9004
9005 /* Move the real (op0) and imaginary (op1) parts to their location. */
9006 write_complex_part (target, op0, false);
9007 write_complex_part (target, op1, true);
9008
9009 return target;
9010
9011 case WIDEN_SUM_EXPR:
9012 {
9013 tree oprnd0 = treeop0;
9014 tree oprnd1 = treeop1;
9015
9016 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9017 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
9018 target, unsignedp);
9019 return target;
9020 }
9021
9022 case REDUC_MAX_EXPR:
9023 case REDUC_MIN_EXPR:
9024 case REDUC_PLUS_EXPR:
9025 {
9026 op0 = expand_normal (treeop0);
9027 this_optab = optab_for_tree_code (code, type, optab_default);
9028 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
9029 gcc_assert (temp);
9030 return temp;
9031 }
9032
9033 case VEC_LSHIFT_EXPR:
9034 case VEC_RSHIFT_EXPR:
9035 {
9036 target = expand_vec_shift_expr (ops, target);
9037 return target;
9038 }
9039
9040 case VEC_UNPACK_HI_EXPR:
9041 case VEC_UNPACK_LO_EXPR:
9042 {
9043 op0 = expand_normal (treeop0);
9044 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
9045 target, unsignedp);
9046 gcc_assert (temp);
9047 return temp;
9048 }
9049
9050 case VEC_UNPACK_FLOAT_HI_EXPR:
9051 case VEC_UNPACK_FLOAT_LO_EXPR:
9052 {
9053 op0 = expand_normal (treeop0);
9054 /* The signedness is determined from input operand. */
9055 temp = expand_widen_pattern_expr
9056 (ops, op0, NULL_RTX, NULL_RTX,
9057 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9058
9059 gcc_assert (temp);
9060 return temp;
9061 }
9062
9063 case VEC_WIDEN_MULT_HI_EXPR:
9064 case VEC_WIDEN_MULT_LO_EXPR:
9065 case VEC_WIDEN_MULT_EVEN_EXPR:
9066 case VEC_WIDEN_MULT_ODD_EXPR:
9067 case VEC_WIDEN_LSHIFT_HI_EXPR:
9068 case VEC_WIDEN_LSHIFT_LO_EXPR:
9069 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9070 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
9071 target, unsignedp);
9072 gcc_assert (target);
9073 return target;
9074
9075 case VEC_PACK_TRUNC_EXPR:
9076 case VEC_PACK_SAT_EXPR:
9077 case VEC_PACK_FIX_TRUNC_EXPR:
9078 mode = TYPE_MODE (TREE_TYPE (treeop0));
9079 goto binop;
9080
9081 case VEC_PERM_EXPR:
9082 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
9083 op2 = expand_normal (treeop2);
9084
9085 /* Careful here: if the target doesn't support integral vector modes,
9086 a constant selection vector could wind up smooshed into a normal
9087 integral constant. */
9088 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
9089 {
9090 tree sel_type = TREE_TYPE (treeop2);
9091 enum machine_mode vmode
9092 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
9093 TYPE_VECTOR_SUBPARTS (sel_type));
9094 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
9095 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
9096 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
9097 }
9098 else
9099 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
9100
9101 temp = expand_vec_perm (mode, op0, op1, op2, target);
9102 gcc_assert (temp);
9103 return temp;
9104
9105 case DOT_PROD_EXPR:
9106 {
9107 tree oprnd0 = treeop0;
9108 tree oprnd1 = treeop1;
9109 tree oprnd2 = treeop2;
9110 rtx op2;
9111
9112 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9113 op2 = expand_normal (oprnd2);
9114 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9115 target, unsignedp);
9116 return target;
9117 }
9118
9119 case SAD_EXPR:
9120 {
9121 tree oprnd0 = treeop0;
9122 tree oprnd1 = treeop1;
9123 tree oprnd2 = treeop2;
9124 rtx op2;
9125
9126 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9127 op2 = expand_normal (oprnd2);
9128 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9129 target, unsignedp);
9130 return target;
9131 }
9132
9133 case REALIGN_LOAD_EXPR:
9134 {
9135 tree oprnd0 = treeop0;
9136 tree oprnd1 = treeop1;
9137 tree oprnd2 = treeop2;
9138 rtx op2;
9139
9140 this_optab = optab_for_tree_code (code, type, optab_default);
9141 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9142 op2 = expand_normal (oprnd2);
9143 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9144 target, unsignedp);
9145 gcc_assert (temp);
9146 return temp;
9147 }
9148
9149 case COND_EXPR:
9150 /* A COND_EXPR with its type being VOID_TYPE represents a
9151 conditional jump and is handled in
9152 expand_gimple_cond_expr. */
9153 gcc_assert (!VOID_TYPE_P (type));
9154
9155 /* Note that COND_EXPRs whose type is a structure or union
9156 are required to be constructed to contain assignments of
9157 a temporary variable, so that we can evaluate them here
9158 for side effect only. If type is void, we must do likewise. */
9159
9160 gcc_assert (!TREE_ADDRESSABLE (type)
9161 && !ignore
9162 && TREE_TYPE (treeop1) != void_type_node
9163 && TREE_TYPE (treeop2) != void_type_node);
9164
9165 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9166 if (temp)
9167 return temp;
9168
9169 /* If we are not to produce a result, we have no target. Otherwise,
9170 if a target was specified use it; it will not be used as an
9171 intermediate target unless it is safe. If no target, use a
9172 temporary. */
9173
9174 if (modifier != EXPAND_STACK_PARM
9175 && original_target
9176 && safe_from_p (original_target, treeop0, 1)
9177 && GET_MODE (original_target) == mode
9178 && !MEM_P (original_target))
9179 temp = original_target;
9180 else
9181 temp = assign_temp (type, 0, 1);
9182
9183 do_pending_stack_adjust ();
9184 NO_DEFER_POP;
9185 op0 = gen_label_rtx ();
9186 op1 = gen_label_rtx ();
9187 jumpifnot (treeop0, op0, -1);
9188 store_expr (treeop1, temp,
9189 modifier == EXPAND_STACK_PARM,
9190 false);
9191
9192 emit_jump_insn (gen_jump (op1));
9193 emit_barrier ();
9194 emit_label (op0);
9195 store_expr (treeop2, temp,
9196 modifier == EXPAND_STACK_PARM,
9197 false);
9198
9199 emit_label (op1);
9200 OK_DEFER_POP;
9201 return temp;
9202
9203 case VEC_COND_EXPR:
9204 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9205 return target;
9206
9207 default:
9208 gcc_unreachable ();
9209 }
9210
9211 /* Here to do an ordinary binary operator. */
9212 binop:
9213 expand_operands (treeop0, treeop1,
9214 subtarget, &op0, &op1, EXPAND_NORMAL);
9215 binop2:
9216 this_optab = optab_for_tree_code (code, type, optab_default);
9217 binop3:
9218 if (modifier == EXPAND_STACK_PARM)
9219 target = 0;
9220 temp = expand_binop (mode, this_optab, op0, op1, target,
9221 unsignedp, OPTAB_LIB_WIDEN);
9222 gcc_assert (temp);
9223 /* Bitwise operations do not need bitfield reduction as we expect their
9224 operands being properly truncated. */
9225 if (code == BIT_XOR_EXPR
9226 || code == BIT_AND_EXPR
9227 || code == BIT_IOR_EXPR)
9228 return temp;
9229 return REDUCE_BIT_FIELD (temp);
9230 }
9231 #undef REDUCE_BIT_FIELD
9232
9233 /* Return TRUE if value in SSA is zero and sign extended for wider mode MODE
9234 using value range information stored. Return FALSE otherwise.
9235
9236 This is used to check if SUBREG is zero and sign extended and to set
9237 promoted mode SRP_SIGNED_AND_UNSIGNED to SUBREG. */
9238
9239 bool
9240 promoted_for_signed_and_unsigned_p (tree ssa, enum machine_mode mode)
9241 {
9242 wide_int min, max;
9243
9244 if (ssa == NULL_TREE
9245 || TREE_CODE (ssa) != SSA_NAME
9246 || !INTEGRAL_TYPE_P (TREE_TYPE (ssa))
9247 || (TYPE_PRECISION (TREE_TYPE (ssa)) != GET_MODE_PRECISION (mode)))
9248 return false;
9249
9250 /* Return FALSE if value_range is not recorded for SSA. */
9251 if (get_range_info (ssa, &min, &max) != VR_RANGE)
9252 return false;
9253
9254 /* Return true (to set SRP_SIGNED_AND_UNSIGNED to SUBREG) if MSB of the
9255 smaller mode is not set (i.e. MSB of ssa is not set). */
9256 if (!wi::neg_p (min, SIGNED) && !wi::neg_p(max, SIGNED))
9257 return true;
9258 else
9259 return false;
9260
9261 }
9262
9263 /* Return TRUE if expression STMT is suitable for replacement.
9264 Never consider memory loads as replaceable, because those don't ever lead
9265 into constant expressions. */
9266
9267 static bool
9268 stmt_is_replaceable_p (gimple stmt)
9269 {
9270 if (ssa_is_replaceable_p (stmt))
9271 {
9272 /* Don't move around loads. */
9273 if (!gimple_assign_single_p (stmt)
9274 || is_gimple_val (gimple_assign_rhs1 (stmt)))
9275 return true;
9276 }
9277 return false;
9278 }
9279
9280 rtx
9281 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
9282 enum expand_modifier modifier, rtx *alt_rtl,
9283 bool inner_reference_p)
9284 {
9285 rtx op0, op1, temp, decl_rtl;
9286 tree type;
9287 int unsignedp;
9288 enum machine_mode mode;
9289 enum tree_code code = TREE_CODE (exp);
9290 rtx subtarget, original_target;
9291 int ignore;
9292 tree context;
9293 bool reduce_bit_field;
9294 location_t loc = EXPR_LOCATION (exp);
9295 struct separate_ops ops;
9296 tree treeop0, treeop1, treeop2;
9297 tree ssa_name = NULL_TREE;
9298 gimple g;
9299
9300 type = TREE_TYPE (exp);
9301 mode = TYPE_MODE (type);
9302 unsignedp = TYPE_UNSIGNED (type);
9303
9304 treeop0 = treeop1 = treeop2 = NULL_TREE;
9305 if (!VL_EXP_CLASS_P (exp))
9306 switch (TREE_CODE_LENGTH (code))
9307 {
9308 default:
9309 case 3: treeop2 = TREE_OPERAND (exp, 2);
9310 case 2: treeop1 = TREE_OPERAND (exp, 1);
9311 case 1: treeop0 = TREE_OPERAND (exp, 0);
9312 case 0: break;
9313 }
9314 ops.code = code;
9315 ops.type = type;
9316 ops.op0 = treeop0;
9317 ops.op1 = treeop1;
9318 ops.op2 = treeop2;
9319 ops.location = loc;
9320
9321 ignore = (target == const0_rtx
9322 || ((CONVERT_EXPR_CODE_P (code)
9323 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9324 && TREE_CODE (type) == VOID_TYPE));
9325
9326 /* An operation in what may be a bit-field type needs the
9327 result to be reduced to the precision of the bit-field type,
9328 which is narrower than that of the type's mode. */
9329 reduce_bit_field = (!ignore
9330 && INTEGRAL_TYPE_P (type)
9331 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
9332
9333 /* If we are going to ignore this result, we need only do something
9334 if there is a side-effect somewhere in the expression. If there
9335 is, short-circuit the most common cases here. Note that we must
9336 not call expand_expr with anything but const0_rtx in case this
9337 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9338
9339 if (ignore)
9340 {
9341 if (! TREE_SIDE_EFFECTS (exp))
9342 return const0_rtx;
9343
9344 /* Ensure we reference a volatile object even if value is ignored, but
9345 don't do this if all we are doing is taking its address. */
9346 if (TREE_THIS_VOLATILE (exp)
9347 && TREE_CODE (exp) != FUNCTION_DECL
9348 && mode != VOIDmode && mode != BLKmode
9349 && modifier != EXPAND_CONST_ADDRESS)
9350 {
9351 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9352 if (MEM_P (temp))
9353 copy_to_reg (temp);
9354 return const0_rtx;
9355 }
9356
9357 if (TREE_CODE_CLASS (code) == tcc_unary
9358 || code == BIT_FIELD_REF
9359 || code == COMPONENT_REF
9360 || code == INDIRECT_REF)
9361 return expand_expr (treeop0, const0_rtx, VOIDmode,
9362 modifier);
9363
9364 else if (TREE_CODE_CLASS (code) == tcc_binary
9365 || TREE_CODE_CLASS (code) == tcc_comparison
9366 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9367 {
9368 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9369 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9370 return const0_rtx;
9371 }
9372
9373 target = 0;
9374 }
9375
9376 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9377 target = 0;
9378
9379 /* Use subtarget as the target for operand 0 of a binary operation. */
9380 subtarget = get_subtarget (target);
9381 original_target = target;
9382
9383 switch (code)
9384 {
9385 case LABEL_DECL:
9386 {
9387 tree function = decl_function_context (exp);
9388
9389 temp = label_rtx (exp);
9390 temp = gen_rtx_LABEL_REF (Pmode, temp);
9391
9392 if (function != current_function_decl
9393 && function != 0)
9394 LABEL_REF_NONLOCAL_P (temp) = 1;
9395
9396 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9397 return temp;
9398 }
9399
9400 case SSA_NAME:
9401 /* ??? ivopts calls expander, without any preparation from
9402 out-of-ssa. So fake instructions as if this was an access to the
9403 base variable. This unnecessarily allocates a pseudo, see how we can
9404 reuse it, if partition base vars have it set already. */
9405 if (!currently_expanding_to_rtl)
9406 {
9407 tree var = SSA_NAME_VAR (exp);
9408 if (var && DECL_RTL_SET_P (var))
9409 return DECL_RTL (var);
9410 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)),
9411 LAST_VIRTUAL_REGISTER + 1);
9412 }
9413
9414 g = get_gimple_for_ssa_name (exp);
9415 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9416 if (g == NULL
9417 && modifier == EXPAND_INITIALIZER
9418 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9419 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9420 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9421 g = SSA_NAME_DEF_STMT (exp);
9422 if (g)
9423 {
9424 rtx r;
9425 ops.code = gimple_assign_rhs_code (g);
9426 switch (get_gimple_rhs_class (ops.code))
9427 {
9428 case GIMPLE_TERNARY_RHS:
9429 ops.op2 = gimple_assign_rhs3 (g);
9430 /* Fallthru */
9431 case GIMPLE_BINARY_RHS:
9432 ops.op1 = gimple_assign_rhs2 (g);
9433 /* Fallthru */
9434 case GIMPLE_UNARY_RHS:
9435 ops.op0 = gimple_assign_rhs1 (g);
9436 ops.type = TREE_TYPE (gimple_assign_lhs (g));
9437 ops.location = gimple_location (g);
9438 r = expand_expr_real_2 (&ops, target, tmode, modifier);
9439 break;
9440 case GIMPLE_SINGLE_RHS:
9441 {
9442 location_t saved_loc = curr_insn_location ();
9443 set_curr_insn_location (gimple_location (g));
9444 r = expand_expr_real (gimple_assign_rhs1 (g), target,
9445 tmode, modifier, NULL, inner_reference_p);
9446 set_curr_insn_location (saved_loc);
9447 break;
9448 }
9449 default:
9450 gcc_unreachable ();
9451 }
9452 if (REG_P (r) && !REG_EXPR (r))
9453 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9454 return r;
9455 }
9456
9457 ssa_name = exp;
9458 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9459 exp = SSA_NAME_VAR (ssa_name);
9460 goto expand_decl_rtl;
9461
9462 case PARM_DECL:
9463 case VAR_DECL:
9464 /* If a static var's type was incomplete when the decl was written,
9465 but the type is complete now, lay out the decl now. */
9466 if (DECL_SIZE (exp) == 0
9467 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9468 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9469 layout_decl (exp, 0);
9470
9471 /* ... fall through ... */
9472
9473 case FUNCTION_DECL:
9474 case RESULT_DECL:
9475 decl_rtl = DECL_RTL (exp);
9476 expand_decl_rtl:
9477 gcc_assert (decl_rtl);
9478 decl_rtl = copy_rtx (decl_rtl);
9479 /* Record writes to register variables. */
9480 if (modifier == EXPAND_WRITE
9481 && REG_P (decl_rtl)
9482 && HARD_REGISTER_P (decl_rtl))
9483 add_to_hard_reg_set (&crtl->asm_clobbers,
9484 GET_MODE (decl_rtl), REGNO (decl_rtl));
9485
9486 /* Ensure variable marked as used even if it doesn't go through
9487 a parser. If it hasn't be used yet, write out an external
9488 definition. */
9489 TREE_USED (exp) = 1;
9490
9491 /* Show we haven't gotten RTL for this yet. */
9492 temp = 0;
9493
9494 /* Variables inherited from containing functions should have
9495 been lowered by this point. */
9496 context = decl_function_context (exp);
9497 gcc_assert (SCOPE_FILE_SCOPE_P (context)
9498 || context == current_function_decl
9499 || TREE_STATIC (exp)
9500 || DECL_EXTERNAL (exp)
9501 /* ??? C++ creates functions that are not TREE_STATIC. */
9502 || TREE_CODE (exp) == FUNCTION_DECL);
9503
9504 /* This is the case of an array whose size is to be determined
9505 from its initializer, while the initializer is still being parsed.
9506 ??? We aren't parsing while expanding anymore. */
9507
9508 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9509 temp = validize_mem (decl_rtl);
9510
9511 /* If DECL_RTL is memory, we are in the normal case and the
9512 address is not valid, get the address into a register. */
9513
9514 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9515 {
9516 if (alt_rtl)
9517 *alt_rtl = decl_rtl;
9518 decl_rtl = use_anchored_address (decl_rtl);
9519 if (modifier != EXPAND_CONST_ADDRESS
9520 && modifier != EXPAND_SUM
9521 && !memory_address_addr_space_p (DECL_MODE (exp),
9522 XEXP (decl_rtl, 0),
9523 MEM_ADDR_SPACE (decl_rtl)))
9524 temp = replace_equiv_address (decl_rtl,
9525 copy_rtx (XEXP (decl_rtl, 0)));
9526 }
9527
9528 /* If we got something, return it. But first, set the alignment
9529 if the address is a register. */
9530 if (temp != 0)
9531 {
9532 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9533 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9534
9535 return temp;
9536 }
9537
9538 /* If the mode of DECL_RTL does not match that of the decl,
9539 there are two cases: we are dealing with a BLKmode value
9540 that is returned in a register, or we are dealing with
9541 a promoted value. In the latter case, return a SUBREG
9542 of the wanted mode, but mark it so that we know that it
9543 was already extended. */
9544 if (REG_P (decl_rtl)
9545 && DECL_MODE (exp) != BLKmode
9546 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9547 {
9548 enum machine_mode pmode;
9549
9550 /* Get the signedness to be used for this variable. Ensure we get
9551 the same mode we got when the variable was declared. */
9552 if (code == SSA_NAME
9553 && (g = SSA_NAME_DEF_STMT (ssa_name))
9554 && gimple_code (g) == GIMPLE_CALL
9555 && !gimple_call_internal_p (g))
9556 pmode = promote_function_mode (type, mode, &unsignedp,
9557 gimple_call_fntype (g),
9558 2);
9559 else
9560 pmode = promote_decl_mode (exp, &unsignedp);
9561 gcc_assert (GET_MODE (decl_rtl) == pmode);
9562
9563 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9564 SUBREG_PROMOTED_VAR_P (temp) = 1;
9565 if (promoted_for_signed_and_unsigned_p (ssa_name, mode))
9566 SUBREG_PROMOTED_SET (temp, SRP_SIGNED_AND_UNSIGNED);
9567 else
9568 SUBREG_PROMOTED_SET (temp, unsignedp);
9569 return temp;
9570 }
9571
9572 return decl_rtl;
9573
9574 case INTEGER_CST:
9575 /* Given that TYPE_PRECISION (type) is not always equal to
9576 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
9577 the former to the latter according to the signedness of the
9578 type. */
9579 temp = immed_wide_int_const (wide_int::from
9580 (exp,
9581 GET_MODE_PRECISION (TYPE_MODE (type)),
9582 TYPE_SIGN (type)),
9583 TYPE_MODE (type));
9584 return temp;
9585
9586 case VECTOR_CST:
9587 {
9588 tree tmp = NULL_TREE;
9589 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9590 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9591 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9592 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9593 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9594 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9595 return const_vector_from_tree (exp);
9596 if (GET_MODE_CLASS (mode) == MODE_INT)
9597 {
9598 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9599 if (type_for_mode)
9600 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9601 }
9602 if (!tmp)
9603 {
9604 vec<constructor_elt, va_gc> *v;
9605 unsigned i;
9606 vec_alloc (v, VECTOR_CST_NELTS (exp));
9607 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
9608 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
9609 tmp = build_constructor (type, v);
9610 }
9611 return expand_expr (tmp, ignore ? const0_rtx : target,
9612 tmode, modifier);
9613 }
9614
9615 case CONST_DECL:
9616 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9617
9618 case REAL_CST:
9619 /* If optimized, generate immediate CONST_DOUBLE
9620 which will be turned into memory by reload if necessary.
9621
9622 We used to force a register so that loop.c could see it. But
9623 this does not allow gen_* patterns to perform optimizations with
9624 the constants. It also produces two insns in cases like "x = 1.0;".
9625 On most machines, floating-point constants are not permitted in
9626 many insns, so we'd end up copying it to a register in any case.
9627
9628 Now, we do the copying in expand_binop, if appropriate. */
9629 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9630 TYPE_MODE (TREE_TYPE (exp)));
9631
9632 case FIXED_CST:
9633 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9634 TYPE_MODE (TREE_TYPE (exp)));
9635
9636 case COMPLEX_CST:
9637 /* Handle evaluating a complex constant in a CONCAT target. */
9638 if (original_target && GET_CODE (original_target) == CONCAT)
9639 {
9640 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9641 rtx rtarg, itarg;
9642
9643 rtarg = XEXP (original_target, 0);
9644 itarg = XEXP (original_target, 1);
9645
9646 /* Move the real and imaginary parts separately. */
9647 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9648 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9649
9650 if (op0 != rtarg)
9651 emit_move_insn (rtarg, op0);
9652 if (op1 != itarg)
9653 emit_move_insn (itarg, op1);
9654
9655 return original_target;
9656 }
9657
9658 /* ... fall through ... */
9659
9660 case STRING_CST:
9661 temp = expand_expr_constant (exp, 1, modifier);
9662
9663 /* temp contains a constant address.
9664 On RISC machines where a constant address isn't valid,
9665 make some insns to get that address into a register. */
9666 if (modifier != EXPAND_CONST_ADDRESS
9667 && modifier != EXPAND_INITIALIZER
9668 && modifier != EXPAND_SUM
9669 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9670 MEM_ADDR_SPACE (temp)))
9671 return replace_equiv_address (temp,
9672 copy_rtx (XEXP (temp, 0)));
9673 return temp;
9674
9675 case SAVE_EXPR:
9676 {
9677 tree val = treeop0;
9678 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl,
9679 inner_reference_p);
9680
9681 if (!SAVE_EXPR_RESOLVED_P (exp))
9682 {
9683 /* We can indeed still hit this case, typically via builtin
9684 expanders calling save_expr immediately before expanding
9685 something. Assume this means that we only have to deal
9686 with non-BLKmode values. */
9687 gcc_assert (GET_MODE (ret) != BLKmode);
9688
9689 val = build_decl (curr_insn_location (),
9690 VAR_DECL, NULL, TREE_TYPE (exp));
9691 DECL_ARTIFICIAL (val) = 1;
9692 DECL_IGNORED_P (val) = 1;
9693 treeop0 = val;
9694 TREE_OPERAND (exp, 0) = treeop0;
9695 SAVE_EXPR_RESOLVED_P (exp) = 1;
9696
9697 if (!CONSTANT_P (ret))
9698 ret = copy_to_reg (ret);
9699 SET_DECL_RTL (val, ret);
9700 }
9701
9702 return ret;
9703 }
9704
9705
9706 case CONSTRUCTOR:
9707 /* If we don't need the result, just ensure we evaluate any
9708 subexpressions. */
9709 if (ignore)
9710 {
9711 unsigned HOST_WIDE_INT idx;
9712 tree value;
9713
9714 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9715 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9716
9717 return const0_rtx;
9718 }
9719
9720 return expand_constructor (exp, target, modifier, false);
9721
9722 case TARGET_MEM_REF:
9723 {
9724 addr_space_t as
9725 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9726 enum insn_code icode;
9727 unsigned int align;
9728
9729 op0 = addr_for_mem_ref (exp, as, true);
9730 op0 = memory_address_addr_space (mode, op0, as);
9731 temp = gen_rtx_MEM (mode, op0);
9732 set_mem_attributes (temp, exp, 0);
9733 set_mem_addr_space (temp, as);
9734 align = get_object_alignment (exp);
9735 if (modifier != EXPAND_WRITE
9736 && modifier != EXPAND_MEMORY
9737 && mode != BLKmode
9738 && align < GET_MODE_ALIGNMENT (mode)
9739 /* If the target does not have special handling for unaligned
9740 loads of mode then it can use regular moves for them. */
9741 && ((icode = optab_handler (movmisalign_optab, mode))
9742 != CODE_FOR_nothing))
9743 {
9744 struct expand_operand ops[2];
9745
9746 /* We've already validated the memory, and we're creating a
9747 new pseudo destination. The predicates really can't fail,
9748 nor can the generator. */
9749 create_output_operand (&ops[0], NULL_RTX, mode);
9750 create_fixed_operand (&ops[1], temp);
9751 expand_insn (icode, 2, ops);
9752 temp = ops[0].value;
9753 }
9754 return temp;
9755 }
9756
9757 case MEM_REF:
9758 {
9759 addr_space_t as
9760 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9761 enum machine_mode address_mode;
9762 tree base = TREE_OPERAND (exp, 0);
9763 gimple def_stmt;
9764 enum insn_code icode;
9765 unsigned align;
9766 /* Handle expansion of non-aliased memory with non-BLKmode. That
9767 might end up in a register. */
9768 if (mem_ref_refers_to_non_mem_p (exp))
9769 {
9770 HOST_WIDE_INT offset = mem_ref_offset (exp).to_short_addr ();
9771 base = TREE_OPERAND (base, 0);
9772 if (offset == 0
9773 && tree_fits_uhwi_p (TYPE_SIZE (type))
9774 && (GET_MODE_BITSIZE (DECL_MODE (base))
9775 == tree_to_uhwi (TYPE_SIZE (type))))
9776 return expand_expr (build1 (VIEW_CONVERT_EXPR, type, base),
9777 target, tmode, modifier);
9778 if (TYPE_MODE (type) == BLKmode)
9779 {
9780 temp = assign_stack_temp (DECL_MODE (base),
9781 GET_MODE_SIZE (DECL_MODE (base)));
9782 store_expr (base, temp, 0, false);
9783 temp = adjust_address (temp, BLKmode, offset);
9784 set_mem_size (temp, int_size_in_bytes (type));
9785 return temp;
9786 }
9787 exp = build3 (BIT_FIELD_REF, type, base, TYPE_SIZE (type),
9788 bitsize_int (offset * BITS_PER_UNIT));
9789 return expand_expr (exp, target, tmode, modifier);
9790 }
9791 address_mode = targetm.addr_space.address_mode (as);
9792 base = TREE_OPERAND (exp, 0);
9793 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9794 {
9795 tree mask = gimple_assign_rhs2 (def_stmt);
9796 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9797 gimple_assign_rhs1 (def_stmt), mask);
9798 TREE_OPERAND (exp, 0) = base;
9799 }
9800 align = get_object_alignment (exp);
9801 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9802 op0 = memory_address_addr_space (mode, op0, as);
9803 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9804 {
9805 rtx off = immed_wide_int_const (mem_ref_offset (exp), address_mode);
9806 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9807 op0 = memory_address_addr_space (mode, op0, as);
9808 }
9809 temp = gen_rtx_MEM (mode, op0);
9810 set_mem_attributes (temp, exp, 0);
9811 set_mem_addr_space (temp, as);
9812 if (TREE_THIS_VOLATILE (exp))
9813 MEM_VOLATILE_P (temp) = 1;
9814 if (modifier != EXPAND_WRITE
9815 && modifier != EXPAND_MEMORY
9816 && !inner_reference_p
9817 && mode != BLKmode
9818 && align < GET_MODE_ALIGNMENT (mode))
9819 {
9820 if ((icode = optab_handler (movmisalign_optab, mode))
9821 != CODE_FOR_nothing)
9822 {
9823 struct expand_operand ops[2];
9824
9825 /* We've already validated the memory, and we're creating a
9826 new pseudo destination. The predicates really can't fail,
9827 nor can the generator. */
9828 create_output_operand (&ops[0], NULL_RTX, mode);
9829 create_fixed_operand (&ops[1], temp);
9830 expand_insn (icode, 2, ops);
9831 temp = ops[0].value;
9832 }
9833 else if (SLOW_UNALIGNED_ACCESS (mode, align))
9834 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
9835 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
9836 (modifier == EXPAND_STACK_PARM
9837 ? NULL_RTX : target),
9838 mode, mode);
9839 }
9840 return temp;
9841 }
9842
9843 case ARRAY_REF:
9844
9845 {
9846 tree array = treeop0;
9847 tree index = treeop1;
9848 tree init;
9849
9850 /* Fold an expression like: "foo"[2].
9851 This is not done in fold so it won't happen inside &.
9852 Don't fold if this is for wide characters since it's too
9853 difficult to do correctly and this is a very rare case. */
9854
9855 if (modifier != EXPAND_CONST_ADDRESS
9856 && modifier != EXPAND_INITIALIZER
9857 && modifier != EXPAND_MEMORY)
9858 {
9859 tree t = fold_read_from_constant_string (exp);
9860
9861 if (t)
9862 return expand_expr (t, target, tmode, modifier);
9863 }
9864
9865 /* If this is a constant index into a constant array,
9866 just get the value from the array. Handle both the cases when
9867 we have an explicit constructor and when our operand is a variable
9868 that was declared const. */
9869
9870 if (modifier != EXPAND_CONST_ADDRESS
9871 && modifier != EXPAND_INITIALIZER
9872 && modifier != EXPAND_MEMORY
9873 && TREE_CODE (array) == CONSTRUCTOR
9874 && ! TREE_SIDE_EFFECTS (array)
9875 && TREE_CODE (index) == INTEGER_CST)
9876 {
9877 unsigned HOST_WIDE_INT ix;
9878 tree field, value;
9879
9880 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9881 field, value)
9882 if (tree_int_cst_equal (field, index))
9883 {
9884 if (!TREE_SIDE_EFFECTS (value))
9885 return expand_expr (fold (value), target, tmode, modifier);
9886 break;
9887 }
9888 }
9889
9890 else if (optimize >= 1
9891 && modifier != EXPAND_CONST_ADDRESS
9892 && modifier != EXPAND_INITIALIZER
9893 && modifier != EXPAND_MEMORY
9894 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9895 && TREE_CODE (index) == INTEGER_CST
9896 && (TREE_CODE (array) == VAR_DECL
9897 || TREE_CODE (array) == CONST_DECL)
9898 && (init = ctor_for_folding (array)) != error_mark_node)
9899 {
9900 if (init == NULL_TREE)
9901 {
9902 tree value = build_zero_cst (type);
9903 if (TREE_CODE (value) == CONSTRUCTOR)
9904 {
9905 /* If VALUE is a CONSTRUCTOR, this optimization is only
9906 useful if this doesn't store the CONSTRUCTOR into
9907 memory. If it does, it is more efficient to just
9908 load the data from the array directly. */
9909 rtx ret = expand_constructor (value, target,
9910 modifier, true);
9911 if (ret == NULL_RTX)
9912 value = NULL_TREE;
9913 }
9914
9915 if (value)
9916 return expand_expr (value, target, tmode, modifier);
9917 }
9918 else if (TREE_CODE (init) == CONSTRUCTOR)
9919 {
9920 unsigned HOST_WIDE_INT ix;
9921 tree field, value;
9922
9923 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9924 field, value)
9925 if (tree_int_cst_equal (field, index))
9926 {
9927 if (TREE_SIDE_EFFECTS (value))
9928 break;
9929
9930 if (TREE_CODE (value) == CONSTRUCTOR)
9931 {
9932 /* If VALUE is a CONSTRUCTOR, this
9933 optimization is only useful if
9934 this doesn't store the CONSTRUCTOR
9935 into memory. If it does, it is more
9936 efficient to just load the data from
9937 the array directly. */
9938 rtx ret = expand_constructor (value, target,
9939 modifier, true);
9940 if (ret == NULL_RTX)
9941 break;
9942 }
9943
9944 return
9945 expand_expr (fold (value), target, tmode, modifier);
9946 }
9947 }
9948 else if (TREE_CODE (init) == STRING_CST)
9949 {
9950 tree low_bound = array_ref_low_bound (exp);
9951 tree index1 = fold_convert_loc (loc, sizetype, treeop1);
9952
9953 /* Optimize the special case of a zero lower bound.
9954
9955 We convert the lower bound to sizetype to avoid problems
9956 with constant folding. E.g. suppose the lower bound is
9957 1 and its mode is QI. Without the conversion
9958 (ARRAY + (INDEX - (unsigned char)1))
9959 becomes
9960 (ARRAY + (-(unsigned char)1) + INDEX)
9961 which becomes
9962 (ARRAY + 255 + INDEX). Oops! */
9963 if (!integer_zerop (low_bound))
9964 index1 = size_diffop_loc (loc, index1,
9965 fold_convert_loc (loc, sizetype,
9966 low_bound));
9967
9968 if (compare_tree_int (index1, TREE_STRING_LENGTH (init)) < 0)
9969 {
9970 tree type = TREE_TYPE (TREE_TYPE (init));
9971 enum machine_mode mode = TYPE_MODE (type);
9972
9973 if (GET_MODE_CLASS (mode) == MODE_INT
9974 && GET_MODE_SIZE (mode) == 1)
9975 return gen_int_mode (TREE_STRING_POINTER (init)
9976 [TREE_INT_CST_LOW (index1)],
9977 mode);
9978 }
9979 }
9980 }
9981 }
9982 goto normal_inner_ref;
9983
9984 case COMPONENT_REF:
9985 /* If the operand is a CONSTRUCTOR, we can just extract the
9986 appropriate field if it is present. */
9987 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9988 {
9989 unsigned HOST_WIDE_INT idx;
9990 tree field, value;
9991
9992 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9993 idx, field, value)
9994 if (field == treeop1
9995 /* We can normally use the value of the field in the
9996 CONSTRUCTOR. However, if this is a bitfield in
9997 an integral mode that we can fit in a HOST_WIDE_INT,
9998 we must mask only the number of bits in the bitfield,
9999 since this is done implicitly by the constructor. If
10000 the bitfield does not meet either of those conditions,
10001 we can't do this optimization. */
10002 && (! DECL_BIT_FIELD (field)
10003 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
10004 && (GET_MODE_PRECISION (DECL_MODE (field))
10005 <= HOST_BITS_PER_WIDE_INT))))
10006 {
10007 if (DECL_BIT_FIELD (field)
10008 && modifier == EXPAND_STACK_PARM)
10009 target = 0;
10010 op0 = expand_expr (value, target, tmode, modifier);
10011 if (DECL_BIT_FIELD (field))
10012 {
10013 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
10014 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
10015
10016 if (TYPE_UNSIGNED (TREE_TYPE (field)))
10017 {
10018 op1 = gen_int_mode (((HOST_WIDE_INT) 1 << bitsize) - 1,
10019 imode);
10020 op0 = expand_and (imode, op0, op1, target);
10021 }
10022 else
10023 {
10024 int count = GET_MODE_PRECISION (imode) - bitsize;
10025
10026 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
10027 target, 0);
10028 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
10029 target, 0);
10030 }
10031 }
10032
10033 return op0;
10034 }
10035 }
10036 goto normal_inner_ref;
10037
10038 case BIT_FIELD_REF:
10039 case ARRAY_RANGE_REF:
10040 normal_inner_ref:
10041 {
10042 enum machine_mode mode1, mode2;
10043 HOST_WIDE_INT bitsize, bitpos;
10044 tree offset;
10045 int volatilep = 0, must_force_mem;
10046 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
10047 &mode1, &unsignedp, &volatilep, true);
10048 rtx orig_op0, memloc;
10049 bool mem_attrs_from_type = false;
10050
10051 /* If we got back the original object, something is wrong. Perhaps
10052 we are evaluating an expression too early. In any event, don't
10053 infinitely recurse. */
10054 gcc_assert (tem != exp);
10055
10056 /* If TEM's type is a union of variable size, pass TARGET to the inner
10057 computation, since it will need a temporary and TARGET is known
10058 to have to do. This occurs in unchecked conversion in Ada. */
10059 orig_op0 = op0
10060 = expand_expr_real (tem,
10061 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10062 && COMPLETE_TYPE_P (TREE_TYPE (tem))
10063 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10064 != INTEGER_CST)
10065 && modifier != EXPAND_STACK_PARM
10066 ? target : NULL_RTX),
10067 VOIDmode,
10068 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10069 NULL, true);
10070
10071 /* If the field has a mode, we want to access it in the
10072 field's mode, not the computed mode.
10073 If a MEM has VOIDmode (external with incomplete type),
10074 use BLKmode for it instead. */
10075 if (MEM_P (op0))
10076 {
10077 if (mode1 != VOIDmode)
10078 op0 = adjust_address (op0, mode1, 0);
10079 else if (GET_MODE (op0) == VOIDmode)
10080 op0 = adjust_address (op0, BLKmode, 0);
10081 }
10082
10083 mode2
10084 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
10085
10086 /* If we have either an offset, a BLKmode result, or a reference
10087 outside the underlying object, we must force it to memory.
10088 Such a case can occur in Ada if we have unchecked conversion
10089 of an expression from a scalar type to an aggregate type or
10090 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10091 passed a partially uninitialized object or a view-conversion
10092 to a larger size. */
10093 must_force_mem = (offset
10094 || mode1 == BLKmode
10095 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
10096
10097 /* Handle CONCAT first. */
10098 if (GET_CODE (op0) == CONCAT && !must_force_mem)
10099 {
10100 if (bitpos == 0
10101 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
10102 return op0;
10103 if (bitpos == 0
10104 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
10105 && bitsize)
10106 {
10107 op0 = XEXP (op0, 0);
10108 mode2 = GET_MODE (op0);
10109 }
10110 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
10111 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
10112 && bitpos
10113 && bitsize)
10114 {
10115 op0 = XEXP (op0, 1);
10116 bitpos = 0;
10117 mode2 = GET_MODE (op0);
10118 }
10119 else
10120 /* Otherwise force into memory. */
10121 must_force_mem = 1;
10122 }
10123
10124 /* If this is a constant, put it in a register if it is a legitimate
10125 constant and we don't need a memory reference. */
10126 if (CONSTANT_P (op0)
10127 && mode2 != BLKmode
10128 && targetm.legitimate_constant_p (mode2, op0)
10129 && !must_force_mem)
10130 op0 = force_reg (mode2, op0);
10131
10132 /* Otherwise, if this is a constant, try to force it to the constant
10133 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10134 is a legitimate constant. */
10135 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
10136 op0 = validize_mem (memloc);
10137
10138 /* Otherwise, if this is a constant or the object is not in memory
10139 and need be, put it there. */
10140 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
10141 {
10142 memloc = assign_temp (TREE_TYPE (tem), 1, 1);
10143 emit_move_insn (memloc, op0);
10144 op0 = memloc;
10145 mem_attrs_from_type = true;
10146 }
10147
10148 if (offset)
10149 {
10150 enum machine_mode address_mode;
10151 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
10152 EXPAND_SUM);
10153
10154 gcc_assert (MEM_P (op0));
10155
10156 address_mode = get_address_mode (op0);
10157 if (GET_MODE (offset_rtx) != address_mode)
10158 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
10159
10160 /* See the comment in expand_assignment for the rationale. */
10161 if (mode1 != VOIDmode
10162 && bitpos != 0
10163 && bitsize > 0
10164 && (bitpos % bitsize) == 0
10165 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
10166 && MEM_ALIGN (op0) >= GET_MODE_ALIGNMENT (mode1))
10167 {
10168 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10169 bitpos = 0;
10170 }
10171
10172 op0 = offset_address (op0, offset_rtx,
10173 highest_pow2_factor (offset));
10174 }
10175
10176 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10177 record its alignment as BIGGEST_ALIGNMENT. */
10178 if (MEM_P (op0) && bitpos == 0 && offset != 0
10179 && is_aligning_offset (offset, tem))
10180 set_mem_align (op0, BIGGEST_ALIGNMENT);
10181
10182 /* Don't forget about volatility even if this is a bitfield. */
10183 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
10184 {
10185 if (op0 == orig_op0)
10186 op0 = copy_rtx (op0);
10187
10188 MEM_VOLATILE_P (op0) = 1;
10189 }
10190
10191 /* In cases where an aligned union has an unaligned object
10192 as a field, we might be extracting a BLKmode value from
10193 an integer-mode (e.g., SImode) object. Handle this case
10194 by doing the extract into an object as wide as the field
10195 (which we know to be the width of a basic mode), then
10196 storing into memory, and changing the mode to BLKmode. */
10197 if (mode1 == VOIDmode
10198 || REG_P (op0) || GET_CODE (op0) == SUBREG
10199 || (mode1 != BLKmode && ! direct_load[(int) mode1]
10200 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
10201 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
10202 && modifier != EXPAND_CONST_ADDRESS
10203 && modifier != EXPAND_INITIALIZER
10204 && modifier != EXPAND_MEMORY)
10205 /* If the bitfield is volatile and the bitsize
10206 is narrower than the access size of the bitfield,
10207 we need to extract bitfields from the access. */
10208 || (volatilep && TREE_CODE (exp) == COMPONENT_REF
10209 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp, 1))
10210 && mode1 != BLKmode
10211 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)
10212 /* If the field isn't aligned enough to fetch as a memref,
10213 fetch it as a bit field. */
10214 || (mode1 != BLKmode
10215 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
10216 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
10217 || (MEM_P (op0)
10218 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
10219 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
10220 && modifier != EXPAND_MEMORY
10221 && ((modifier == EXPAND_CONST_ADDRESS
10222 || modifier == EXPAND_INITIALIZER)
10223 ? STRICT_ALIGNMENT
10224 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
10225 || (bitpos % BITS_PER_UNIT != 0)))
10226 /* If the type and the field are a constant size and the
10227 size of the type isn't the same size as the bitfield,
10228 we must use bitfield operations. */
10229 || (bitsize >= 0
10230 && TYPE_SIZE (TREE_TYPE (exp))
10231 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10232 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
10233 bitsize)))
10234 {
10235 enum machine_mode ext_mode = mode;
10236
10237 if (ext_mode == BLKmode
10238 && ! (target != 0 && MEM_P (op0)
10239 && MEM_P (target)
10240 && bitpos % BITS_PER_UNIT == 0))
10241 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
10242
10243 if (ext_mode == BLKmode)
10244 {
10245 if (target == 0)
10246 target = assign_temp (type, 1, 1);
10247
10248 /* ??? Unlike the similar test a few lines below, this one is
10249 very likely obsolete. */
10250 if (bitsize == 0)
10251 return target;
10252
10253 /* In this case, BITPOS must start at a byte boundary and
10254 TARGET, if specified, must be a MEM. */
10255 gcc_assert (MEM_P (op0)
10256 && (!target || MEM_P (target))
10257 && !(bitpos % BITS_PER_UNIT));
10258
10259 emit_block_move (target,
10260 adjust_address (op0, VOIDmode,
10261 bitpos / BITS_PER_UNIT),
10262 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
10263 / BITS_PER_UNIT),
10264 (modifier == EXPAND_STACK_PARM
10265 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10266
10267 return target;
10268 }
10269
10270 /* If we have nothing to extract, the result will be 0 for targets
10271 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10272 return 0 for the sake of consistency, as reading a zero-sized
10273 bitfield is valid in Ada and the value is fully specified. */
10274 if (bitsize == 0)
10275 return const0_rtx;
10276
10277 op0 = validize_mem (op0);
10278
10279 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10280 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10281
10282 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
10283 (modifier == EXPAND_STACK_PARM
10284 ? NULL_RTX : target),
10285 ext_mode, ext_mode);
10286
10287 /* If the result is a record type and BITSIZE is narrower than
10288 the mode of OP0, an integral mode, and this is a big endian
10289 machine, we must put the field into the high-order bits. */
10290 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
10291 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
10292 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
10293 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
10294 GET_MODE_BITSIZE (GET_MODE (op0))
10295 - bitsize, op0, 1);
10296
10297 /* If the result type is BLKmode, store the data into a temporary
10298 of the appropriate type, but with the mode corresponding to the
10299 mode for the data we have (op0's mode). */
10300 if (mode == BLKmode)
10301 {
10302 rtx new_rtx
10303 = assign_stack_temp_for_type (ext_mode,
10304 GET_MODE_BITSIZE (ext_mode),
10305 type);
10306 emit_move_insn (new_rtx, op0);
10307 op0 = copy_rtx (new_rtx);
10308 PUT_MODE (op0, BLKmode);
10309 }
10310
10311 return op0;
10312 }
10313
10314 /* If the result is BLKmode, use that to access the object
10315 now as well. */
10316 if (mode == BLKmode)
10317 mode1 = BLKmode;
10318
10319 /* Get a reference to just this component. */
10320 if (modifier == EXPAND_CONST_ADDRESS
10321 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10322 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
10323 else
10324 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10325
10326 if (op0 == orig_op0)
10327 op0 = copy_rtx (op0);
10328
10329 /* If op0 is a temporary because of forcing to memory, pass only the
10330 type to set_mem_attributes so that the original expression is never
10331 marked as ADDRESSABLE through MEM_EXPR of the temporary. */
10332 if (mem_attrs_from_type)
10333 set_mem_attributes (op0, type, 0);
10334 else
10335 set_mem_attributes (op0, exp, 0);
10336
10337 if (REG_P (XEXP (op0, 0)))
10338 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10339
10340 MEM_VOLATILE_P (op0) |= volatilep;
10341 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
10342 || modifier == EXPAND_CONST_ADDRESS
10343 || modifier == EXPAND_INITIALIZER)
10344 return op0;
10345
10346 if (target == 0)
10347 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
10348
10349 convert_move (target, op0, unsignedp);
10350 return target;
10351 }
10352
10353 case OBJ_TYPE_REF:
10354 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
10355
10356 case CALL_EXPR:
10357 /* All valid uses of __builtin_va_arg_pack () are removed during
10358 inlining. */
10359 if (CALL_EXPR_VA_ARG_PACK (exp))
10360 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
10361 {
10362 tree fndecl = get_callee_fndecl (exp), attr;
10363
10364 if (fndecl
10365 && (attr = lookup_attribute ("error",
10366 DECL_ATTRIBUTES (fndecl))) != NULL)
10367 error ("%Kcall to %qs declared with attribute error: %s",
10368 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10369 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10370 if (fndecl
10371 && (attr = lookup_attribute ("warning",
10372 DECL_ATTRIBUTES (fndecl))) != NULL)
10373 warning_at (tree_nonartificial_location (exp),
10374 0, "%Kcall to %qs declared with attribute warning: %s",
10375 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10376 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10377
10378 /* Check for a built-in function. */
10379 if (fndecl && DECL_BUILT_IN (fndecl))
10380 {
10381 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
10382 return expand_builtin (exp, target, subtarget, tmode, ignore);
10383 }
10384 }
10385 return expand_call (exp, target, ignore);
10386
10387 case VIEW_CONVERT_EXPR:
10388 op0 = NULL_RTX;
10389
10390 /* If we are converting to BLKmode, try to avoid an intermediate
10391 temporary by fetching an inner memory reference. */
10392 if (mode == BLKmode
10393 && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
10394 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10395 && handled_component_p (treeop0))
10396 {
10397 enum machine_mode mode1;
10398 HOST_WIDE_INT bitsize, bitpos;
10399 tree offset;
10400 int unsignedp;
10401 int volatilep = 0;
10402 tree tem
10403 = get_inner_reference (treeop0, &bitsize, &bitpos,
10404 &offset, &mode1, &unsignedp, &volatilep,
10405 true);
10406 rtx orig_op0;
10407
10408 /* ??? We should work harder and deal with non-zero offsets. */
10409 if (!offset
10410 && (bitpos % BITS_PER_UNIT) == 0
10411 && bitsize >= 0
10412 && compare_tree_int (TYPE_SIZE (type), bitsize) == 0)
10413 {
10414 /* See the normal_inner_ref case for the rationale. */
10415 orig_op0
10416 = expand_expr_real (tem,
10417 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10418 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10419 != INTEGER_CST)
10420 && modifier != EXPAND_STACK_PARM
10421 ? target : NULL_RTX),
10422 VOIDmode,
10423 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10424 NULL, true);
10425
10426 if (MEM_P (orig_op0))
10427 {
10428 op0 = orig_op0;
10429
10430 /* Get a reference to just this component. */
10431 if (modifier == EXPAND_CONST_ADDRESS
10432 || modifier == EXPAND_SUM
10433 || modifier == EXPAND_INITIALIZER)
10434 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
10435 else
10436 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10437
10438 if (op0 == orig_op0)
10439 op0 = copy_rtx (op0);
10440
10441 set_mem_attributes (op0, treeop0, 0);
10442 if (REG_P (XEXP (op0, 0)))
10443 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10444
10445 MEM_VOLATILE_P (op0) |= volatilep;
10446 }
10447 }
10448 }
10449
10450 if (!op0)
10451 op0 = expand_expr_real (treeop0, NULL_RTX, VOIDmode, modifier,
10452 NULL, inner_reference_p);
10453
10454 /* If the input and output modes are both the same, we are done. */
10455 if (mode == GET_MODE (op0))
10456 ;
10457 /* If neither mode is BLKmode, and both modes are the same size
10458 then we can use gen_lowpart. */
10459 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10460 && (GET_MODE_PRECISION (mode)
10461 == GET_MODE_PRECISION (GET_MODE (op0)))
10462 && !COMPLEX_MODE_P (GET_MODE (op0)))
10463 {
10464 if (GET_CODE (op0) == SUBREG)
10465 op0 = force_reg (GET_MODE (op0), op0);
10466 temp = gen_lowpart_common (mode, op0);
10467 if (temp)
10468 op0 = temp;
10469 else
10470 {
10471 if (!REG_P (op0) && !MEM_P (op0))
10472 op0 = force_reg (GET_MODE (op0), op0);
10473 op0 = gen_lowpart (mode, op0);
10474 }
10475 }
10476 /* If both types are integral, convert from one mode to the other. */
10477 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10478 op0 = convert_modes (mode, GET_MODE (op0), op0,
10479 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10480 /* If the output type is a bit-field type, do an extraction. */
10481 else if (reduce_bit_field)
10482 return extract_bit_field (op0, TYPE_PRECISION (type), 0,
10483 TYPE_UNSIGNED (type), NULL_RTX,
10484 mode, mode);
10485 /* As a last resort, spill op0 to memory, and reload it in a
10486 different mode. */
10487 else if (!MEM_P (op0))
10488 {
10489 /* If the operand is not a MEM, force it into memory. Since we
10490 are going to be changing the mode of the MEM, don't call
10491 force_const_mem for constants because we don't allow pool
10492 constants to change mode. */
10493 tree inner_type = TREE_TYPE (treeop0);
10494
10495 gcc_assert (!TREE_ADDRESSABLE (exp));
10496
10497 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10498 target
10499 = assign_stack_temp_for_type
10500 (TYPE_MODE (inner_type),
10501 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
10502
10503 emit_move_insn (target, op0);
10504 op0 = target;
10505 }
10506
10507 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
10508 output type is such that the operand is known to be aligned, indicate
10509 that it is. Otherwise, we need only be concerned about alignment for
10510 non-BLKmode results. */
10511 if (MEM_P (op0))
10512 {
10513 enum insn_code icode;
10514
10515 if (TYPE_ALIGN_OK (type))
10516 {
10517 /* ??? Copying the MEM without substantially changing it might
10518 run afoul of the code handling volatile memory references in
10519 store_expr, which assumes that TARGET is returned unmodified
10520 if it has been used. */
10521 op0 = copy_rtx (op0);
10522 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10523 }
10524 else if (modifier != EXPAND_WRITE
10525 && modifier != EXPAND_MEMORY
10526 && !inner_reference_p
10527 && mode != BLKmode
10528 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10529 {
10530 /* If the target does have special handling for unaligned
10531 loads of mode then use them. */
10532 if ((icode = optab_handler (movmisalign_optab, mode))
10533 != CODE_FOR_nothing)
10534 {
10535 rtx reg, insn;
10536
10537 op0 = adjust_address (op0, mode, 0);
10538 /* We've already validated the memory, and we're creating a
10539 new pseudo destination. The predicates really can't
10540 fail. */
10541 reg = gen_reg_rtx (mode);
10542
10543 /* Nor can the insn generator. */
10544 insn = GEN_FCN (icode) (reg, op0);
10545 emit_insn (insn);
10546 return reg;
10547 }
10548 else if (STRICT_ALIGNMENT)
10549 {
10550 tree inner_type = TREE_TYPE (treeop0);
10551 HOST_WIDE_INT temp_size
10552 = MAX (int_size_in_bytes (inner_type),
10553 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10554 rtx new_rtx
10555 = assign_stack_temp_for_type (mode, temp_size, type);
10556 rtx new_with_op0_mode
10557 = adjust_address (new_rtx, GET_MODE (op0), 0);
10558
10559 gcc_assert (!TREE_ADDRESSABLE (exp));
10560
10561 if (GET_MODE (op0) == BLKmode)
10562 emit_block_move (new_with_op0_mode, op0,
10563 GEN_INT (GET_MODE_SIZE (mode)),
10564 (modifier == EXPAND_STACK_PARM
10565 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10566 else
10567 emit_move_insn (new_with_op0_mode, op0);
10568
10569 op0 = new_rtx;
10570 }
10571 }
10572
10573 op0 = adjust_address (op0, mode, 0);
10574 }
10575
10576 return op0;
10577
10578 case MODIFY_EXPR:
10579 {
10580 tree lhs = treeop0;
10581 tree rhs = treeop1;
10582 gcc_assert (ignore);
10583
10584 /* Check for |= or &= of a bitfield of size one into another bitfield
10585 of size 1. In this case, (unless we need the result of the
10586 assignment) we can do this more efficiently with a
10587 test followed by an assignment, if necessary.
10588
10589 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10590 things change so we do, this code should be enhanced to
10591 support it. */
10592 if (TREE_CODE (lhs) == COMPONENT_REF
10593 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10594 || TREE_CODE (rhs) == BIT_AND_EXPR)
10595 && TREE_OPERAND (rhs, 0) == lhs
10596 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10597 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10598 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10599 {
10600 rtx_code_label *label = gen_label_rtx ();
10601 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10602 do_jump (TREE_OPERAND (rhs, 1),
10603 value ? label : 0,
10604 value ? 0 : label, -1);
10605 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10606 false);
10607 do_pending_stack_adjust ();
10608 emit_label (label);
10609 return const0_rtx;
10610 }
10611
10612 expand_assignment (lhs, rhs, false);
10613 return const0_rtx;
10614 }
10615
10616 case ADDR_EXPR:
10617 return expand_expr_addr_expr (exp, target, tmode, modifier);
10618
10619 case REALPART_EXPR:
10620 op0 = expand_normal (treeop0);
10621 return read_complex_part (op0, false);
10622
10623 case IMAGPART_EXPR:
10624 op0 = expand_normal (treeop0);
10625 return read_complex_part (op0, true);
10626
10627 case RETURN_EXPR:
10628 case LABEL_EXPR:
10629 case GOTO_EXPR:
10630 case SWITCH_EXPR:
10631 case ASM_EXPR:
10632 /* Expanded in cfgexpand.c. */
10633 gcc_unreachable ();
10634
10635 case TRY_CATCH_EXPR:
10636 case CATCH_EXPR:
10637 case EH_FILTER_EXPR:
10638 case TRY_FINALLY_EXPR:
10639 /* Lowered by tree-eh.c. */
10640 gcc_unreachable ();
10641
10642 case WITH_CLEANUP_EXPR:
10643 case CLEANUP_POINT_EXPR:
10644 case TARGET_EXPR:
10645 case CASE_LABEL_EXPR:
10646 case VA_ARG_EXPR:
10647 case BIND_EXPR:
10648 case INIT_EXPR:
10649 case CONJ_EXPR:
10650 case COMPOUND_EXPR:
10651 case PREINCREMENT_EXPR:
10652 case PREDECREMENT_EXPR:
10653 case POSTINCREMENT_EXPR:
10654 case POSTDECREMENT_EXPR:
10655 case LOOP_EXPR:
10656 case EXIT_EXPR:
10657 case COMPOUND_LITERAL_EXPR:
10658 /* Lowered by gimplify.c. */
10659 gcc_unreachable ();
10660
10661 case FDESC_EXPR:
10662 /* Function descriptors are not valid except for as
10663 initialization constants, and should not be expanded. */
10664 gcc_unreachable ();
10665
10666 case WITH_SIZE_EXPR:
10667 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10668 have pulled out the size to use in whatever context it needed. */
10669 return expand_expr_real (treeop0, original_target, tmode,
10670 modifier, alt_rtl, inner_reference_p);
10671
10672 default:
10673 return expand_expr_real_2 (&ops, target, tmode, modifier);
10674 }
10675 }
10676 \f
10677 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10678 signedness of TYPE), possibly returning the result in TARGET. */
10679 static rtx
10680 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10681 {
10682 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10683 if (target && GET_MODE (target) != GET_MODE (exp))
10684 target = 0;
10685 /* For constant values, reduce using build_int_cst_type. */
10686 if (CONST_INT_P (exp))
10687 {
10688 HOST_WIDE_INT value = INTVAL (exp);
10689 tree t = build_int_cst_type (type, value);
10690 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10691 }
10692 else if (TYPE_UNSIGNED (type))
10693 {
10694 enum machine_mode mode = GET_MODE (exp);
10695 rtx mask = immed_wide_int_const
10696 (wi::mask (prec, false, GET_MODE_PRECISION (mode)), mode);
10697 return expand_and (mode, exp, mask, target);
10698 }
10699 else
10700 {
10701 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10702 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10703 exp, count, target, 0);
10704 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10705 exp, count, target, 0);
10706 }
10707 }
10708 \f
10709 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10710 when applied to the address of EXP produces an address known to be
10711 aligned more than BIGGEST_ALIGNMENT. */
10712
10713 static int
10714 is_aligning_offset (const_tree offset, const_tree exp)
10715 {
10716 /* Strip off any conversions. */
10717 while (CONVERT_EXPR_P (offset))
10718 offset = TREE_OPERAND (offset, 0);
10719
10720 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10721 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10722 if (TREE_CODE (offset) != BIT_AND_EXPR
10723 || !tree_fits_uhwi_p (TREE_OPERAND (offset, 1))
10724 || compare_tree_int (TREE_OPERAND (offset, 1),
10725 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10726 || !exact_log2 (tree_to_uhwi (TREE_OPERAND (offset, 1)) + 1) < 0)
10727 return 0;
10728
10729 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10730 It must be NEGATE_EXPR. Then strip any more conversions. */
10731 offset = TREE_OPERAND (offset, 0);
10732 while (CONVERT_EXPR_P (offset))
10733 offset = TREE_OPERAND (offset, 0);
10734
10735 if (TREE_CODE (offset) != NEGATE_EXPR)
10736 return 0;
10737
10738 offset = TREE_OPERAND (offset, 0);
10739 while (CONVERT_EXPR_P (offset))
10740 offset = TREE_OPERAND (offset, 0);
10741
10742 /* This must now be the address of EXP. */
10743 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10744 }
10745 \f
10746 /* Return the tree node if an ARG corresponds to a string constant or zero
10747 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10748 in bytes within the string that ARG is accessing. The type of the
10749 offset will be `sizetype'. */
10750
10751 tree
10752 string_constant (tree arg, tree *ptr_offset)
10753 {
10754 tree array, offset, lower_bound;
10755 STRIP_NOPS (arg);
10756
10757 if (TREE_CODE (arg) == ADDR_EXPR)
10758 {
10759 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10760 {
10761 *ptr_offset = size_zero_node;
10762 return TREE_OPERAND (arg, 0);
10763 }
10764 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10765 {
10766 array = TREE_OPERAND (arg, 0);
10767 offset = size_zero_node;
10768 }
10769 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10770 {
10771 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10772 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10773 if (TREE_CODE (array) != STRING_CST
10774 && TREE_CODE (array) != VAR_DECL)
10775 return 0;
10776
10777 /* Check if the array has a nonzero lower bound. */
10778 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10779 if (!integer_zerop (lower_bound))
10780 {
10781 /* If the offset and base aren't both constants, return 0. */
10782 if (TREE_CODE (lower_bound) != INTEGER_CST)
10783 return 0;
10784 if (TREE_CODE (offset) != INTEGER_CST)
10785 return 0;
10786 /* Adjust offset by the lower bound. */
10787 offset = size_diffop (fold_convert (sizetype, offset),
10788 fold_convert (sizetype, lower_bound));
10789 }
10790 }
10791 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10792 {
10793 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10794 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10795 if (TREE_CODE (array) != ADDR_EXPR)
10796 return 0;
10797 array = TREE_OPERAND (array, 0);
10798 if (TREE_CODE (array) != STRING_CST
10799 && TREE_CODE (array) != VAR_DECL)
10800 return 0;
10801 }
10802 else
10803 return 0;
10804 }
10805 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10806 {
10807 tree arg0 = TREE_OPERAND (arg, 0);
10808 tree arg1 = TREE_OPERAND (arg, 1);
10809
10810 STRIP_NOPS (arg0);
10811 STRIP_NOPS (arg1);
10812
10813 if (TREE_CODE (arg0) == ADDR_EXPR
10814 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10815 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10816 {
10817 array = TREE_OPERAND (arg0, 0);
10818 offset = arg1;
10819 }
10820 else if (TREE_CODE (arg1) == ADDR_EXPR
10821 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10822 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10823 {
10824 array = TREE_OPERAND (arg1, 0);
10825 offset = arg0;
10826 }
10827 else
10828 return 0;
10829 }
10830 else
10831 return 0;
10832
10833 if (TREE_CODE (array) == STRING_CST)
10834 {
10835 *ptr_offset = fold_convert (sizetype, offset);
10836 return array;
10837 }
10838 else if (TREE_CODE (array) == VAR_DECL
10839 || TREE_CODE (array) == CONST_DECL)
10840 {
10841 int length;
10842 tree init = ctor_for_folding (array);
10843
10844 /* Variables initialized to string literals can be handled too. */
10845 if (init == error_mark_node
10846 || !init
10847 || TREE_CODE (init) != STRING_CST)
10848 return 0;
10849
10850 /* Avoid const char foo[4] = "abcde"; */
10851 if (DECL_SIZE_UNIT (array) == NULL_TREE
10852 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10853 || (length = TREE_STRING_LENGTH (init)) <= 0
10854 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10855 return 0;
10856
10857 /* If variable is bigger than the string literal, OFFSET must be constant
10858 and inside of the bounds of the string literal. */
10859 offset = fold_convert (sizetype, offset);
10860 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10861 && (! tree_fits_uhwi_p (offset)
10862 || compare_tree_int (offset, length) >= 0))
10863 return 0;
10864
10865 *ptr_offset = offset;
10866 return init;
10867 }
10868
10869 return 0;
10870 }
10871 \f
10872 /* Generate code to calculate OPS, and exploded expression
10873 using a store-flag instruction and return an rtx for the result.
10874 OPS reflects a comparison.
10875
10876 If TARGET is nonzero, store the result there if convenient.
10877
10878 Return zero if there is no suitable set-flag instruction
10879 available on this machine.
10880
10881 Once expand_expr has been called on the arguments of the comparison,
10882 we are committed to doing the store flag, since it is not safe to
10883 re-evaluate the expression. We emit the store-flag insn by calling
10884 emit_store_flag, but only expand the arguments if we have a reason
10885 to believe that emit_store_flag will be successful. If we think that
10886 it will, but it isn't, we have to simulate the store-flag with a
10887 set/jump/set sequence. */
10888
10889 static rtx
10890 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10891 {
10892 enum rtx_code code;
10893 tree arg0, arg1, type;
10894 tree tem;
10895 enum machine_mode operand_mode;
10896 int unsignedp;
10897 rtx op0, op1;
10898 rtx subtarget = target;
10899 location_t loc = ops->location;
10900
10901 arg0 = ops->op0;
10902 arg1 = ops->op1;
10903
10904 /* Don't crash if the comparison was erroneous. */
10905 if (arg0 == error_mark_node || arg1 == error_mark_node)
10906 return const0_rtx;
10907
10908 type = TREE_TYPE (arg0);
10909 operand_mode = TYPE_MODE (type);
10910 unsignedp = TYPE_UNSIGNED (type);
10911
10912 /* We won't bother with BLKmode store-flag operations because it would mean
10913 passing a lot of information to emit_store_flag. */
10914 if (operand_mode == BLKmode)
10915 return 0;
10916
10917 /* We won't bother with store-flag operations involving function pointers
10918 when function pointers must be canonicalized before comparisons. */
10919 #ifdef HAVE_canonicalize_funcptr_for_compare
10920 if (HAVE_canonicalize_funcptr_for_compare
10921 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10922 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10923 == FUNCTION_TYPE))
10924 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10925 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10926 == FUNCTION_TYPE))))
10927 return 0;
10928 #endif
10929
10930 STRIP_NOPS (arg0);
10931 STRIP_NOPS (arg1);
10932
10933 /* For vector typed comparisons emit code to generate the desired
10934 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10935 expander for this. */
10936 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10937 {
10938 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10939 tree if_true = constant_boolean_node (true, ops->type);
10940 tree if_false = constant_boolean_node (false, ops->type);
10941 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10942 }
10943
10944 /* Get the rtx comparison code to use. We know that EXP is a comparison
10945 operation of some type. Some comparisons against 1 and -1 can be
10946 converted to comparisons with zero. Do so here so that the tests
10947 below will be aware that we have a comparison with zero. These
10948 tests will not catch constants in the first operand, but constants
10949 are rarely passed as the first operand. */
10950
10951 switch (ops->code)
10952 {
10953 case EQ_EXPR:
10954 code = EQ;
10955 break;
10956 case NE_EXPR:
10957 code = NE;
10958 break;
10959 case LT_EXPR:
10960 if (integer_onep (arg1))
10961 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10962 else
10963 code = unsignedp ? LTU : LT;
10964 break;
10965 case LE_EXPR:
10966 if (! unsignedp && integer_all_onesp (arg1))
10967 arg1 = integer_zero_node, code = LT;
10968 else
10969 code = unsignedp ? LEU : LE;
10970 break;
10971 case GT_EXPR:
10972 if (! unsignedp && integer_all_onesp (arg1))
10973 arg1 = integer_zero_node, code = GE;
10974 else
10975 code = unsignedp ? GTU : GT;
10976 break;
10977 case GE_EXPR:
10978 if (integer_onep (arg1))
10979 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10980 else
10981 code = unsignedp ? GEU : GE;
10982 break;
10983
10984 case UNORDERED_EXPR:
10985 code = UNORDERED;
10986 break;
10987 case ORDERED_EXPR:
10988 code = ORDERED;
10989 break;
10990 case UNLT_EXPR:
10991 code = UNLT;
10992 break;
10993 case UNLE_EXPR:
10994 code = UNLE;
10995 break;
10996 case UNGT_EXPR:
10997 code = UNGT;
10998 break;
10999 case UNGE_EXPR:
11000 code = UNGE;
11001 break;
11002 case UNEQ_EXPR:
11003 code = UNEQ;
11004 break;
11005 case LTGT_EXPR:
11006 code = LTGT;
11007 break;
11008
11009 default:
11010 gcc_unreachable ();
11011 }
11012
11013 /* Put a constant second. */
11014 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
11015 || TREE_CODE (arg0) == FIXED_CST)
11016 {
11017 tem = arg0; arg0 = arg1; arg1 = tem;
11018 code = swap_condition (code);
11019 }
11020
11021 /* If this is an equality or inequality test of a single bit, we can
11022 do this by shifting the bit being tested to the low-order bit and
11023 masking the result with the constant 1. If the condition was EQ,
11024 we xor it with 1. This does not require an scc insn and is faster
11025 than an scc insn even if we have it.
11026
11027 The code to make this transformation was moved into fold_single_bit_test,
11028 so we just call into the folder and expand its result. */
11029
11030 if ((code == NE || code == EQ)
11031 && integer_zerop (arg1)
11032 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
11033 {
11034 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
11035 if (srcstmt
11036 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
11037 {
11038 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
11039 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
11040 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
11041 gimple_assign_rhs1 (srcstmt),
11042 gimple_assign_rhs2 (srcstmt));
11043 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
11044 if (temp)
11045 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
11046 }
11047 }
11048
11049 if (! get_subtarget (target)
11050 || GET_MODE (subtarget) != operand_mode)
11051 subtarget = 0;
11052
11053 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
11054
11055 if (target == 0)
11056 target = gen_reg_rtx (mode);
11057
11058 /* Try a cstore if possible. */
11059 return emit_store_flag_force (target, code, op0, op1,
11060 operand_mode, unsignedp,
11061 (TYPE_PRECISION (ops->type) == 1
11062 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
11063 }
11064 \f
11065
11066 /* Stubs in case we haven't got a casesi insn. */
11067 #ifndef HAVE_casesi
11068 # define HAVE_casesi 0
11069 # define gen_casesi(a, b, c, d, e) (0)
11070 # define CODE_FOR_casesi CODE_FOR_nothing
11071 #endif
11072
11073 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11074 0 otherwise (i.e. if there is no casesi instruction).
11075
11076 DEFAULT_PROBABILITY is the probability of jumping to the default
11077 label. */
11078 int
11079 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
11080 rtx table_label, rtx default_label, rtx fallback_label,
11081 int default_probability)
11082 {
11083 struct expand_operand ops[5];
11084 enum machine_mode index_mode = SImode;
11085 rtx op1, op2, index;
11086
11087 if (! HAVE_casesi)
11088 return 0;
11089
11090 /* Convert the index to SImode. */
11091 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
11092 {
11093 enum machine_mode omode = TYPE_MODE (index_type);
11094 rtx rangertx = expand_normal (range);
11095
11096 /* We must handle the endpoints in the original mode. */
11097 index_expr = build2 (MINUS_EXPR, index_type,
11098 index_expr, minval);
11099 minval = integer_zero_node;
11100 index = expand_normal (index_expr);
11101 if (default_label)
11102 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
11103 omode, 1, default_label,
11104 default_probability);
11105 /* Now we can safely truncate. */
11106 index = convert_to_mode (index_mode, index, 0);
11107 }
11108 else
11109 {
11110 if (TYPE_MODE (index_type) != index_mode)
11111 {
11112 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
11113 index_expr = fold_convert (index_type, index_expr);
11114 }
11115
11116 index = expand_normal (index_expr);
11117 }
11118
11119 do_pending_stack_adjust ();
11120
11121 op1 = expand_normal (minval);
11122 op2 = expand_normal (range);
11123
11124 create_input_operand (&ops[0], index, index_mode);
11125 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
11126 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
11127 create_fixed_operand (&ops[3], table_label);
11128 create_fixed_operand (&ops[4], (default_label
11129 ? default_label
11130 : fallback_label));
11131 expand_jump_insn (CODE_FOR_casesi, 5, ops);
11132 return 1;
11133 }
11134
11135 /* Attempt to generate a tablejump instruction; same concept. */
11136 #ifndef HAVE_tablejump
11137 #define HAVE_tablejump 0
11138 #define gen_tablejump(x, y) (0)
11139 #endif
11140
11141 /* Subroutine of the next function.
11142
11143 INDEX is the value being switched on, with the lowest value
11144 in the table already subtracted.
11145 MODE is its expected mode (needed if INDEX is constant).
11146 RANGE is the length of the jump table.
11147 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11148
11149 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11150 index value is out of range.
11151 DEFAULT_PROBABILITY is the probability of jumping to
11152 the default label. */
11153
11154 static void
11155 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
11156 rtx default_label, int default_probability)
11157 {
11158 rtx temp, vector;
11159
11160 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
11161 cfun->cfg->max_jumptable_ents = INTVAL (range);
11162
11163 /* Do an unsigned comparison (in the proper mode) between the index
11164 expression and the value which represents the length of the range.
11165 Since we just finished subtracting the lower bound of the range
11166 from the index expression, this comparison allows us to simultaneously
11167 check that the original index expression value is both greater than
11168 or equal to the minimum value of the range and less than or equal to
11169 the maximum value of the range. */
11170
11171 if (default_label)
11172 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
11173 default_label, default_probability);
11174
11175
11176 /* If index is in range, it must fit in Pmode.
11177 Convert to Pmode so we can index with it. */
11178 if (mode != Pmode)
11179 index = convert_to_mode (Pmode, index, 1);
11180
11181 /* Don't let a MEM slip through, because then INDEX that comes
11182 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11183 and break_out_memory_refs will go to work on it and mess it up. */
11184 #ifdef PIC_CASE_VECTOR_ADDRESS
11185 if (flag_pic && !REG_P (index))
11186 index = copy_to_mode_reg (Pmode, index);
11187 #endif
11188
11189 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11190 GET_MODE_SIZE, because this indicates how large insns are. The other
11191 uses should all be Pmode, because they are addresses. This code
11192 could fail if addresses and insns are not the same size. */
11193 index = simplify_gen_binary (MULT, Pmode, index,
11194 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE),
11195 Pmode));
11196 index = simplify_gen_binary (PLUS, Pmode, index,
11197 gen_rtx_LABEL_REF (Pmode, table_label));
11198
11199 #ifdef PIC_CASE_VECTOR_ADDRESS
11200 if (flag_pic)
11201 index = PIC_CASE_VECTOR_ADDRESS (index);
11202 else
11203 #endif
11204 index = memory_address (CASE_VECTOR_MODE, index);
11205 temp = gen_reg_rtx (CASE_VECTOR_MODE);
11206 vector = gen_const_mem (CASE_VECTOR_MODE, index);
11207 convert_move (temp, vector, 0);
11208
11209 emit_jump_insn (gen_tablejump (temp, table_label));
11210
11211 /* If we are generating PIC code or if the table is PC-relative, the
11212 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11213 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
11214 emit_barrier ();
11215 }
11216
11217 int
11218 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
11219 rtx table_label, rtx default_label, int default_probability)
11220 {
11221 rtx index;
11222
11223 if (! HAVE_tablejump)
11224 return 0;
11225
11226 index_expr = fold_build2 (MINUS_EXPR, index_type,
11227 fold_convert (index_type, index_expr),
11228 fold_convert (index_type, minval));
11229 index = expand_normal (index_expr);
11230 do_pending_stack_adjust ();
11231
11232 do_tablejump (index, TYPE_MODE (index_type),
11233 convert_modes (TYPE_MODE (index_type),
11234 TYPE_MODE (TREE_TYPE (range)),
11235 expand_normal (range),
11236 TYPE_UNSIGNED (TREE_TYPE (range))),
11237 table_label, default_label, default_probability);
11238 return 1;
11239 }
11240
11241 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11242 static rtx
11243 const_vector_from_tree (tree exp)
11244 {
11245 rtvec v;
11246 unsigned i;
11247 int units;
11248 tree elt;
11249 enum machine_mode inner, mode;
11250
11251 mode = TYPE_MODE (TREE_TYPE (exp));
11252
11253 if (initializer_zerop (exp))
11254 return CONST0_RTX (mode);
11255
11256 units = GET_MODE_NUNITS (mode);
11257 inner = GET_MODE_INNER (mode);
11258
11259 v = rtvec_alloc (units);
11260
11261 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
11262 {
11263 elt = VECTOR_CST_ELT (exp, i);
11264
11265 if (TREE_CODE (elt) == REAL_CST)
11266 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
11267 inner);
11268 else if (TREE_CODE (elt) == FIXED_CST)
11269 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
11270 inner);
11271 else
11272 RTVEC_ELT (v, i) = immed_wide_int_const (elt, inner);
11273 }
11274
11275 return gen_rtx_CONST_VECTOR (mode, v);
11276 }
11277
11278 /* Build a decl for a personality function given a language prefix. */
11279
11280 tree
11281 build_personality_function (const char *lang)
11282 {
11283 const char *unwind_and_version;
11284 tree decl, type;
11285 char *name;
11286
11287 switch (targetm_common.except_unwind_info (&global_options))
11288 {
11289 case UI_NONE:
11290 return NULL;
11291 case UI_SJLJ:
11292 unwind_and_version = "_sj0";
11293 break;
11294 case UI_DWARF2:
11295 case UI_TARGET:
11296 unwind_and_version = "_v0";
11297 break;
11298 case UI_SEH:
11299 unwind_and_version = "_seh0";
11300 break;
11301 default:
11302 gcc_unreachable ();
11303 }
11304
11305 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
11306
11307 type = build_function_type_list (integer_type_node, integer_type_node,
11308 long_long_unsigned_type_node,
11309 ptr_type_node, ptr_type_node, NULL_TREE);
11310 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
11311 get_identifier (name), type);
11312 DECL_ARTIFICIAL (decl) = 1;
11313 DECL_EXTERNAL (decl) = 1;
11314 TREE_PUBLIC (decl) = 1;
11315
11316 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11317 are the flags assigned by targetm.encode_section_info. */
11318 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
11319
11320 return decl;
11321 }
11322
11323 /* Extracts the personality function of DECL and returns the corresponding
11324 libfunc. */
11325
11326 rtx
11327 get_personality_function (tree decl)
11328 {
11329 tree personality = DECL_FUNCTION_PERSONALITY (decl);
11330 enum eh_personality_kind pk;
11331
11332 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
11333 if (pk == eh_personality_none)
11334 return NULL;
11335
11336 if (!personality
11337 && pk == eh_personality_any)
11338 personality = lang_hooks.eh_personality ();
11339
11340 if (pk == eh_personality_lang)
11341 gcc_assert (personality != NULL_TREE);
11342
11343 return XEXP (DECL_RTL (personality), 0);
11344 }
11345
11346 #include "gt-expr.h"