re PR rtl-optimization/49982 (ICE in fixup_args_size_notes, at expr.c:3625)
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "common/common-target.h"
53 #include "timevar.h"
54 #include "df.h"
55 #include "diagnostic.h"
56 #include "ssaexpand.h"
57 #include "target-globals.h"
58 #include "params.h"
59
60 /* Decide whether a function's arguments should be processed
61 from first to last or from last to first.
62
63 They should if the stack and args grow in opposite directions, but
64 only if we have push insns. */
65
66 #ifdef PUSH_ROUNDING
67
68 #ifndef PUSH_ARGS_REVERSED
69 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
70 #define PUSH_ARGS_REVERSED /* If it's last to first. */
71 #endif
72 #endif
73
74 #endif
75
76 #ifndef STACK_PUSH_CODE
77 #ifdef STACK_GROWS_DOWNWARD
78 #define STACK_PUSH_CODE PRE_DEC
79 #else
80 #define STACK_PUSH_CODE PRE_INC
81 #endif
82 #endif
83
84
85 /* If this is nonzero, we do not bother generating VOLATILE
86 around volatile memory references, and we are willing to
87 output indirect addresses. If cse is to follow, we reject
88 indirect addresses so a useful potential cse is generated;
89 if it is used only once, instruction combination will produce
90 the same indirect address eventually. */
91 int cse_not_expected;
92
93 /* This structure is used by move_by_pieces to describe the move to
94 be performed. */
95 struct move_by_pieces_d
96 {
97 rtx to;
98 rtx to_addr;
99 int autinc_to;
100 int explicit_inc_to;
101 rtx from;
102 rtx from_addr;
103 int autinc_from;
104 int explicit_inc_from;
105 unsigned HOST_WIDE_INT len;
106 HOST_WIDE_INT offset;
107 int reverse;
108 };
109
110 /* This structure is used by store_by_pieces to describe the clear to
111 be performed. */
112
113 struct store_by_pieces_d
114 {
115 rtx to;
116 rtx to_addr;
117 int autinc_to;
118 int explicit_inc_to;
119 unsigned HOST_WIDE_INT len;
120 HOST_WIDE_INT offset;
121 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
122 void *constfundata;
123 int reverse;
124 };
125
126 static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT,
127 unsigned int,
128 unsigned int);
129 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
130 struct move_by_pieces_d *);
131 static bool block_move_libcall_safe_for_call_parm (void);
132 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
133 static tree emit_block_move_libcall_fn (int);
134 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
135 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
136 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
137 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
138 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
139 struct store_by_pieces_d *);
140 static tree clear_storage_libcall_fn (int);
141 static rtx compress_float_constant (rtx, rtx);
142 static rtx get_subtarget (rtx);
143 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
144 HOST_WIDE_INT, enum machine_mode,
145 tree, tree, int, alias_set_type);
146 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
147 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
148 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
149 enum machine_mode,
150 tree, tree, alias_set_type, bool);
151
152 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
153
154 static int is_aligning_offset (const_tree, const_tree);
155 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
156 enum expand_modifier);
157 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
158 static rtx do_store_flag (sepops, rtx, enum machine_mode);
159 #ifdef PUSH_ROUNDING
160 static void emit_single_push_insn (enum machine_mode, rtx, tree);
161 #endif
162 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
163 static rtx const_vector_from_tree (tree);
164 static void write_complex_part (rtx, rtx, bool);
165
166 /* This macro is used to determine whether move_by_pieces should be called
167 to perform a structure copy. */
168 #ifndef MOVE_BY_PIECES_P
169 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
170 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
171 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
172 #endif
173
174 /* This macro is used to determine whether clear_by_pieces should be
175 called to clear storage. */
176 #ifndef CLEAR_BY_PIECES_P
177 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
178 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
179 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
180 #endif
181
182 /* This macro is used to determine whether store_by_pieces should be
183 called to "memset" storage with byte values other than zero. */
184 #ifndef SET_BY_PIECES_P
185 #define SET_BY_PIECES_P(SIZE, ALIGN) \
186 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
187 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
188 #endif
189
190 /* This macro is used to determine whether store_by_pieces should be
191 called to "memcpy" storage when the source is a constant string. */
192 #ifndef STORE_BY_PIECES_P
193 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
194 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
195 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
196 #endif
197
198 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
199
200 #ifndef SLOW_UNALIGNED_ACCESS
201 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
202 #endif
203 \f
204 /* This is run to set up which modes can be used
205 directly in memory and to initialize the block move optab. It is run
206 at the beginning of compilation and when the target is reinitialized. */
207
208 void
209 init_expr_target (void)
210 {
211 rtx insn, pat;
212 enum machine_mode mode;
213 int num_clobbers;
214 rtx mem, mem1;
215 rtx reg;
216
217 /* Try indexing by frame ptr and try by stack ptr.
218 It is known that on the Convex the stack ptr isn't a valid index.
219 With luck, one or the other is valid on any machine. */
220 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
221 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
222
223 /* A scratch register we can modify in-place below to avoid
224 useless RTL allocations. */
225 reg = gen_rtx_REG (VOIDmode, -1);
226
227 insn = rtx_alloc (INSN);
228 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
229 PATTERN (insn) = pat;
230
231 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
232 mode = (enum machine_mode) ((int) mode + 1))
233 {
234 int regno;
235
236 direct_load[(int) mode] = direct_store[(int) mode] = 0;
237 PUT_MODE (mem, mode);
238 PUT_MODE (mem1, mode);
239 PUT_MODE (reg, mode);
240
241 /* See if there is some register that can be used in this mode and
242 directly loaded or stored from memory. */
243
244 if (mode != VOIDmode && mode != BLKmode)
245 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
246 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
247 regno++)
248 {
249 if (! HARD_REGNO_MODE_OK (regno, mode))
250 continue;
251
252 SET_REGNO (reg, regno);
253
254 SET_SRC (pat) = mem;
255 SET_DEST (pat) = reg;
256 if (recog (pat, insn, &num_clobbers) >= 0)
257 direct_load[(int) mode] = 1;
258
259 SET_SRC (pat) = mem1;
260 SET_DEST (pat) = reg;
261 if (recog (pat, insn, &num_clobbers) >= 0)
262 direct_load[(int) mode] = 1;
263
264 SET_SRC (pat) = reg;
265 SET_DEST (pat) = mem;
266 if (recog (pat, insn, &num_clobbers) >= 0)
267 direct_store[(int) mode] = 1;
268
269 SET_SRC (pat) = reg;
270 SET_DEST (pat) = mem1;
271 if (recog (pat, insn, &num_clobbers) >= 0)
272 direct_store[(int) mode] = 1;
273 }
274 }
275
276 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
277
278 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
279 mode = GET_MODE_WIDER_MODE (mode))
280 {
281 enum machine_mode srcmode;
282 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
283 srcmode = GET_MODE_WIDER_MODE (srcmode))
284 {
285 enum insn_code ic;
286
287 ic = can_extend_p (mode, srcmode, 0);
288 if (ic == CODE_FOR_nothing)
289 continue;
290
291 PUT_MODE (mem, srcmode);
292
293 if (insn_operand_matches (ic, 1, mem))
294 float_extend_from_mem[mode][srcmode] = true;
295 }
296 }
297 }
298
299 /* This is run at the start of compiling a function. */
300
301 void
302 init_expr (void)
303 {
304 memset (&crtl->expr, 0, sizeof (crtl->expr));
305 }
306 \f
307 /* Copy data from FROM to TO, where the machine modes are not the same.
308 Both modes may be integer, or both may be floating, or both may be
309 fixed-point.
310 UNSIGNEDP should be nonzero if FROM is an unsigned type.
311 This causes zero-extension instead of sign-extension. */
312
313 void
314 convert_move (rtx to, rtx from, int unsignedp)
315 {
316 enum machine_mode to_mode = GET_MODE (to);
317 enum machine_mode from_mode = GET_MODE (from);
318 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
319 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
320 enum insn_code code;
321 rtx libcall;
322
323 /* rtx code for making an equivalent value. */
324 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
325 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
326
327
328 gcc_assert (to_real == from_real);
329 gcc_assert (to_mode != BLKmode);
330 gcc_assert (from_mode != BLKmode);
331
332 /* If the source and destination are already the same, then there's
333 nothing to do. */
334 if (to == from)
335 return;
336
337 /* If FROM is a SUBREG that indicates that we have already done at least
338 the required extension, strip it. We don't handle such SUBREGs as
339 TO here. */
340
341 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
342 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
343 >= GET_MODE_PRECISION (to_mode))
344 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
345 from = gen_lowpart (to_mode, from), from_mode = to_mode;
346
347 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
348
349 if (to_mode == from_mode
350 || (from_mode == VOIDmode && CONSTANT_P (from)))
351 {
352 emit_move_insn (to, from);
353 return;
354 }
355
356 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
357 {
358 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
359
360 if (VECTOR_MODE_P (to_mode))
361 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
362 else
363 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
364
365 emit_move_insn (to, from);
366 return;
367 }
368
369 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
370 {
371 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
372 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
373 return;
374 }
375
376 if (to_real)
377 {
378 rtx value, insns;
379 convert_optab tab;
380
381 gcc_assert ((GET_MODE_PRECISION (from_mode)
382 != GET_MODE_PRECISION (to_mode))
383 || (DECIMAL_FLOAT_MODE_P (from_mode)
384 != DECIMAL_FLOAT_MODE_P (to_mode)));
385
386 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
387 /* Conversion between decimal float and binary float, same size. */
388 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
389 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
390 tab = sext_optab;
391 else
392 tab = trunc_optab;
393
394 /* Try converting directly if the insn is supported. */
395
396 code = convert_optab_handler (tab, to_mode, from_mode);
397 if (code != CODE_FOR_nothing)
398 {
399 emit_unop_insn (code, to, from,
400 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
401 return;
402 }
403
404 /* Otherwise use a libcall. */
405 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
406
407 /* Is this conversion implemented yet? */
408 gcc_assert (libcall);
409
410 start_sequence ();
411 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
412 1, from, from_mode);
413 insns = get_insns ();
414 end_sequence ();
415 emit_libcall_block (insns, to, value,
416 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
417 from)
418 : gen_rtx_FLOAT_EXTEND (to_mode, from));
419 return;
420 }
421
422 /* Handle pointer conversion. */ /* SPEE 900220. */
423 /* Targets are expected to provide conversion insns between PxImode and
424 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
425 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
426 {
427 enum machine_mode full_mode
428 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
429
430 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
431 != CODE_FOR_nothing);
432
433 if (full_mode != from_mode)
434 from = convert_to_mode (full_mode, from, unsignedp);
435 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
436 to, from, UNKNOWN);
437 return;
438 }
439 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
440 {
441 rtx new_from;
442 enum machine_mode full_mode
443 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
444
445 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)
446 != CODE_FOR_nothing);
447
448 if (to_mode == full_mode)
449 {
450 emit_unop_insn (convert_optab_handler (sext_optab, full_mode,
451 from_mode),
452 to, from, UNKNOWN);
453 return;
454 }
455
456 new_from = gen_reg_rtx (full_mode);
457 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode),
458 new_from, from, UNKNOWN);
459
460 /* else proceed to integer conversions below. */
461 from_mode = full_mode;
462 from = new_from;
463 }
464
465 /* Make sure both are fixed-point modes or both are not. */
466 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
467 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
468 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
469 {
470 /* If we widen from_mode to to_mode and they are in the same class,
471 we won't saturate the result.
472 Otherwise, always saturate the result to play safe. */
473 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
474 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
475 expand_fixed_convert (to, from, 0, 0);
476 else
477 expand_fixed_convert (to, from, 0, 1);
478 return;
479 }
480
481 /* Now both modes are integers. */
482
483 /* Handle expanding beyond a word. */
484 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
485 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
486 {
487 rtx insns;
488 rtx lowpart;
489 rtx fill_value;
490 rtx lowfrom;
491 int i;
492 enum machine_mode lowpart_mode;
493 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
494
495 /* Try converting directly if the insn is supported. */
496 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
497 != CODE_FOR_nothing)
498 {
499 /* If FROM is a SUBREG, put it into a register. Do this
500 so that we always generate the same set of insns for
501 better cse'ing; if an intermediate assignment occurred,
502 we won't be doing the operation directly on the SUBREG. */
503 if (optimize > 0 && GET_CODE (from) == SUBREG)
504 from = force_reg (from_mode, from);
505 emit_unop_insn (code, to, from, equiv_code);
506 return;
507 }
508 /* Next, try converting via full word. */
509 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
510 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
511 != CODE_FOR_nothing))
512 {
513 rtx word_to = gen_reg_rtx (word_mode);
514 if (REG_P (to))
515 {
516 if (reg_overlap_mentioned_p (to, from))
517 from = force_reg (from_mode, from);
518 emit_clobber (to);
519 }
520 convert_move (word_to, from, unsignedp);
521 emit_unop_insn (code, to, word_to, equiv_code);
522 return;
523 }
524
525 /* No special multiword conversion insn; do it by hand. */
526 start_sequence ();
527
528 /* Since we will turn this into a no conflict block, we must ensure
529 that the source does not overlap the target. */
530
531 if (reg_overlap_mentioned_p (to, from))
532 from = force_reg (from_mode, from);
533
534 /* Get a copy of FROM widened to a word, if necessary. */
535 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
536 lowpart_mode = word_mode;
537 else
538 lowpart_mode = from_mode;
539
540 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
541
542 lowpart = gen_lowpart (lowpart_mode, to);
543 emit_move_insn (lowpart, lowfrom);
544
545 /* Compute the value to put in each remaining word. */
546 if (unsignedp)
547 fill_value = const0_rtx;
548 else
549 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
550 LT, lowfrom, const0_rtx,
551 VOIDmode, 0, -1);
552
553 /* Fill the remaining words. */
554 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
555 {
556 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
557 rtx subword = operand_subword (to, index, 1, to_mode);
558
559 gcc_assert (subword);
560
561 if (fill_value != subword)
562 emit_move_insn (subword, fill_value);
563 }
564
565 insns = get_insns ();
566 end_sequence ();
567
568 emit_insn (insns);
569 return;
570 }
571
572 /* Truncating multi-word to a word or less. */
573 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
574 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
575 {
576 if (!((MEM_P (from)
577 && ! MEM_VOLATILE_P (from)
578 && direct_load[(int) to_mode]
579 && ! mode_dependent_address_p (XEXP (from, 0)))
580 || REG_P (from)
581 || GET_CODE (from) == SUBREG))
582 from = force_reg (from_mode, from);
583 convert_move (to, gen_lowpart (word_mode, from), 0);
584 return;
585 }
586
587 /* Now follow all the conversions between integers
588 no more than a word long. */
589
590 /* For truncation, usually we can just refer to FROM in a narrower mode. */
591 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
592 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
593 {
594 if (!((MEM_P (from)
595 && ! MEM_VOLATILE_P (from)
596 && direct_load[(int) to_mode]
597 && ! mode_dependent_address_p (XEXP (from, 0)))
598 || REG_P (from)
599 || GET_CODE (from) == SUBREG))
600 from = force_reg (from_mode, from);
601 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
602 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
603 from = copy_to_reg (from);
604 emit_move_insn (to, gen_lowpart (to_mode, from));
605 return;
606 }
607
608 /* Handle extension. */
609 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
610 {
611 /* Convert directly if that works. */
612 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
613 != CODE_FOR_nothing)
614 {
615 emit_unop_insn (code, to, from, equiv_code);
616 return;
617 }
618 else
619 {
620 enum machine_mode intermediate;
621 rtx tmp;
622 int shift_amount;
623
624 /* Search for a mode to convert via. */
625 for (intermediate = from_mode; intermediate != VOIDmode;
626 intermediate = GET_MODE_WIDER_MODE (intermediate))
627 if (((can_extend_p (to_mode, intermediate, unsignedp)
628 != CODE_FOR_nothing)
629 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
630 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
631 && (can_extend_p (intermediate, from_mode, unsignedp)
632 != CODE_FOR_nothing))
633 {
634 convert_move (to, convert_to_mode (intermediate, from,
635 unsignedp), unsignedp);
636 return;
637 }
638
639 /* No suitable intermediate mode.
640 Generate what we need with shifts. */
641 shift_amount = (GET_MODE_PRECISION (to_mode)
642 - GET_MODE_PRECISION (from_mode));
643 from = gen_lowpart (to_mode, force_reg (from_mode, from));
644 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
645 to, unsignedp);
646 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
647 to, unsignedp);
648 if (tmp != to)
649 emit_move_insn (to, tmp);
650 return;
651 }
652 }
653
654 /* Support special truncate insns for certain modes. */
655 if (convert_optab_handler (trunc_optab, to_mode,
656 from_mode) != CODE_FOR_nothing)
657 {
658 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
659 to, from, UNKNOWN);
660 return;
661 }
662
663 /* Handle truncation of volatile memrefs, and so on;
664 the things that couldn't be truncated directly,
665 and for which there was no special instruction.
666
667 ??? Code above formerly short-circuited this, for most integer
668 mode pairs, with a force_reg in from_mode followed by a recursive
669 call to this routine. Appears always to have been wrong. */
670 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
671 {
672 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
673 emit_move_insn (to, temp);
674 return;
675 }
676
677 /* Mode combination is not recognized. */
678 gcc_unreachable ();
679 }
680
681 /* Return an rtx for a value that would result
682 from converting X to mode MODE.
683 Both X and MODE may be floating, or both integer.
684 UNSIGNEDP is nonzero if X is an unsigned value.
685 This can be done by referring to a part of X in place
686 or by copying to a new temporary with conversion. */
687
688 rtx
689 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
690 {
691 return convert_modes (mode, VOIDmode, x, unsignedp);
692 }
693
694 /* Return an rtx for a value that would result
695 from converting X from mode OLDMODE to mode MODE.
696 Both modes may be floating, or both integer.
697 UNSIGNEDP is nonzero if X is an unsigned value.
698
699 This can be done by referring to a part of X in place
700 or by copying to a new temporary with conversion.
701
702 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
703
704 rtx
705 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
706 {
707 rtx temp;
708
709 /* If FROM is a SUBREG that indicates that we have already done at least
710 the required extension, strip it. */
711
712 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
713 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
714 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
715 x = gen_lowpart (mode, x);
716
717 if (GET_MODE (x) != VOIDmode)
718 oldmode = GET_MODE (x);
719
720 if (mode == oldmode)
721 return x;
722
723 /* There is one case that we must handle specially: If we are converting
724 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
725 we are to interpret the constant as unsigned, gen_lowpart will do
726 the wrong if the constant appears negative. What we want to do is
727 make the high-order word of the constant zero, not all ones. */
728
729 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
730 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
731 && CONST_INT_P (x) && INTVAL (x) < 0)
732 {
733 double_int val = uhwi_to_double_int (INTVAL (x));
734
735 /* We need to zero extend VAL. */
736 if (oldmode != VOIDmode)
737 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
738
739 return immed_double_int_const (val, mode);
740 }
741
742 /* We can do this with a gen_lowpart if both desired and current modes
743 are integer, and this is either a constant integer, a register, or a
744 non-volatile MEM. Except for the constant case where MODE is no
745 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
746
747 if ((CONST_INT_P (x)
748 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
749 || (GET_MODE_CLASS (mode) == MODE_INT
750 && GET_MODE_CLASS (oldmode) == MODE_INT
751 && (GET_CODE (x) == CONST_DOUBLE
752 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
753 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
754 && direct_load[(int) mode])
755 || (REG_P (x)
756 && (! HARD_REGISTER_P (x)
757 || HARD_REGNO_MODE_OK (REGNO (x), mode))
758 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
759 GET_MODE (x))))))))
760 {
761 /* ?? If we don't know OLDMODE, we have to assume here that
762 X does not need sign- or zero-extension. This may not be
763 the case, but it's the best we can do. */
764 if (CONST_INT_P (x) && oldmode != VOIDmode
765 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
766 {
767 HOST_WIDE_INT val = INTVAL (x);
768
769 /* We must sign or zero-extend in this case. Start by
770 zero-extending, then sign extend if we need to. */
771 val &= GET_MODE_MASK (oldmode);
772 if (! unsignedp
773 && val_signbit_known_set_p (oldmode, val))
774 val |= ~GET_MODE_MASK (oldmode);
775
776 return gen_int_mode (val, mode);
777 }
778
779 return gen_lowpart (mode, x);
780 }
781
782 /* Converting from integer constant into mode is always equivalent to an
783 subreg operation. */
784 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
785 {
786 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
787 return simplify_gen_subreg (mode, x, oldmode, 0);
788 }
789
790 temp = gen_reg_rtx (mode);
791 convert_move (temp, x, unsignedp);
792 return temp;
793 }
794 \f
795 /* Return the largest alignment we can use for doing a move (or store)
796 of MAX_PIECES. ALIGN is the largest alignment we could use. */
797
798 static unsigned int
799 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
800 {
801 enum machine_mode tmode;
802
803 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
804 if (align >= GET_MODE_ALIGNMENT (tmode))
805 align = GET_MODE_ALIGNMENT (tmode);
806 else
807 {
808 enum machine_mode tmode, xmode;
809
810 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
811 tmode != VOIDmode;
812 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
813 if (GET_MODE_SIZE (tmode) > max_pieces
814 || SLOW_UNALIGNED_ACCESS (tmode, align))
815 break;
816
817 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
818 }
819
820 return align;
821 }
822
823 /* Return the widest integer mode no wider than SIZE. If no such mode
824 can be found, return VOIDmode. */
825
826 static enum machine_mode
827 widest_int_mode_for_size (unsigned int size)
828 {
829 enum machine_mode tmode, mode = VOIDmode;
830
831 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
832 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
833 if (GET_MODE_SIZE (tmode) < size)
834 mode = tmode;
835
836 return mode;
837 }
838
839 /* STORE_MAX_PIECES is the number of bytes at a time that we can
840 store efficiently. Due to internal GCC limitations, this is
841 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
842 for an immediate constant. */
843
844 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
845
846 /* Determine whether the LEN bytes can be moved by using several move
847 instructions. Return nonzero if a call to move_by_pieces should
848 succeed. */
849
850 int
851 can_move_by_pieces (unsigned HOST_WIDE_INT len,
852 unsigned int align ATTRIBUTE_UNUSED)
853 {
854 return MOVE_BY_PIECES_P (len, align);
855 }
856
857 /* Generate several move instructions to copy LEN bytes from block FROM to
858 block TO. (These are MEM rtx's with BLKmode).
859
860 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
861 used to push FROM to the stack.
862
863 ALIGN is maximum stack alignment we can assume.
864
865 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
866 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
867 stpcpy. */
868
869 rtx
870 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
871 unsigned int align, int endp)
872 {
873 struct move_by_pieces_d data;
874 enum machine_mode to_addr_mode, from_addr_mode
875 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
876 rtx to_addr, from_addr = XEXP (from, 0);
877 unsigned int max_size = MOVE_MAX_PIECES + 1;
878 enum insn_code icode;
879
880 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
881
882 data.offset = 0;
883 data.from_addr = from_addr;
884 if (to)
885 {
886 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
887 to_addr = XEXP (to, 0);
888 data.to = to;
889 data.autinc_to
890 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
891 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
892 data.reverse
893 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
894 }
895 else
896 {
897 to_addr_mode = VOIDmode;
898 to_addr = NULL_RTX;
899 data.to = NULL_RTX;
900 data.autinc_to = 1;
901 #ifdef STACK_GROWS_DOWNWARD
902 data.reverse = 1;
903 #else
904 data.reverse = 0;
905 #endif
906 }
907 data.to_addr = to_addr;
908 data.from = from;
909 data.autinc_from
910 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
911 || GET_CODE (from_addr) == POST_INC
912 || GET_CODE (from_addr) == POST_DEC);
913
914 data.explicit_inc_from = 0;
915 data.explicit_inc_to = 0;
916 if (data.reverse) data.offset = len;
917 data.len = len;
918
919 /* If copying requires more than two move insns,
920 copy addresses to registers (to make displacements shorter)
921 and use post-increment if available. */
922 if (!(data.autinc_from && data.autinc_to)
923 && move_by_pieces_ninsns (len, align, max_size) > 2)
924 {
925 /* Find the mode of the largest move...
926 MODE might not be used depending on the definitions of the
927 USE_* macros below. */
928 enum machine_mode mode ATTRIBUTE_UNUSED
929 = widest_int_mode_for_size (max_size);
930
931 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
932 {
933 data.from_addr = copy_to_mode_reg (from_addr_mode,
934 plus_constant (from_addr, len));
935 data.autinc_from = 1;
936 data.explicit_inc_from = -1;
937 }
938 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
939 {
940 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
941 data.autinc_from = 1;
942 data.explicit_inc_from = 1;
943 }
944 if (!data.autinc_from && CONSTANT_P (from_addr))
945 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
946 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
947 {
948 data.to_addr = copy_to_mode_reg (to_addr_mode,
949 plus_constant (to_addr, len));
950 data.autinc_to = 1;
951 data.explicit_inc_to = -1;
952 }
953 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
954 {
955 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
956 data.autinc_to = 1;
957 data.explicit_inc_to = 1;
958 }
959 if (!data.autinc_to && CONSTANT_P (to_addr))
960 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
961 }
962
963 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
964
965 /* First move what we can in the largest integer mode, then go to
966 successively smaller modes. */
967
968 while (max_size > 1)
969 {
970 enum machine_mode mode = widest_int_mode_for_size (max_size);
971
972 if (mode == VOIDmode)
973 break;
974
975 icode = optab_handler (mov_optab, mode);
976 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
977 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
978
979 max_size = GET_MODE_SIZE (mode);
980 }
981
982 /* The code above should have handled everything. */
983 gcc_assert (!data.len);
984
985 if (endp)
986 {
987 rtx to1;
988
989 gcc_assert (!data.reverse);
990 if (data.autinc_to)
991 {
992 if (endp == 2)
993 {
994 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
995 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
996 else
997 data.to_addr = copy_to_mode_reg (to_addr_mode,
998 plus_constant (data.to_addr,
999 -1));
1000 }
1001 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
1002 data.offset);
1003 }
1004 else
1005 {
1006 if (endp == 2)
1007 --data.offset;
1008 to1 = adjust_address (data.to, QImode, data.offset);
1009 }
1010 return to1;
1011 }
1012 else
1013 return data.to;
1014 }
1015
1016 /* Return number of insns required to move L bytes by pieces.
1017 ALIGN (in bits) is maximum alignment we can assume. */
1018
1019 static unsigned HOST_WIDE_INT
1020 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1021 unsigned int max_size)
1022 {
1023 unsigned HOST_WIDE_INT n_insns = 0;
1024
1025 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1026
1027 while (max_size > 1)
1028 {
1029 enum machine_mode mode;
1030 enum insn_code icode;
1031
1032 mode = widest_int_mode_for_size (max_size);
1033
1034 if (mode == VOIDmode)
1035 break;
1036
1037 icode = optab_handler (mov_optab, mode);
1038 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1039 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1040
1041 max_size = GET_MODE_SIZE (mode);
1042 }
1043
1044 gcc_assert (!l);
1045 return n_insns;
1046 }
1047
1048 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1049 with move instructions for mode MODE. GENFUN is the gen_... function
1050 to make a move insn for that mode. DATA has all the other info. */
1051
1052 static void
1053 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1054 struct move_by_pieces_d *data)
1055 {
1056 unsigned int size = GET_MODE_SIZE (mode);
1057 rtx to1 = NULL_RTX, from1;
1058
1059 while (data->len >= size)
1060 {
1061 if (data->reverse)
1062 data->offset -= size;
1063
1064 if (data->to)
1065 {
1066 if (data->autinc_to)
1067 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1068 data->offset);
1069 else
1070 to1 = adjust_address (data->to, mode, data->offset);
1071 }
1072
1073 if (data->autinc_from)
1074 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1075 data->offset);
1076 else
1077 from1 = adjust_address (data->from, mode, data->offset);
1078
1079 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1080 emit_insn (gen_add2_insn (data->to_addr,
1081 GEN_INT (-(HOST_WIDE_INT)size)));
1082 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1083 emit_insn (gen_add2_insn (data->from_addr,
1084 GEN_INT (-(HOST_WIDE_INT)size)));
1085
1086 if (data->to)
1087 emit_insn ((*genfun) (to1, from1));
1088 else
1089 {
1090 #ifdef PUSH_ROUNDING
1091 emit_single_push_insn (mode, from1, NULL);
1092 #else
1093 gcc_unreachable ();
1094 #endif
1095 }
1096
1097 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1098 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1099 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1100 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1101
1102 if (! data->reverse)
1103 data->offset += size;
1104
1105 data->len -= size;
1106 }
1107 }
1108 \f
1109 /* Emit code to move a block Y to a block X. This may be done with
1110 string-move instructions, with multiple scalar move instructions,
1111 or with a library call.
1112
1113 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1114 SIZE is an rtx that says how long they are.
1115 ALIGN is the maximum alignment we can assume they have.
1116 METHOD describes what kind of copy this is, and what mechanisms may be used.
1117
1118 Return the address of the new block, if memcpy is called and returns it,
1119 0 otherwise. */
1120
1121 rtx
1122 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1123 unsigned int expected_align, HOST_WIDE_INT expected_size)
1124 {
1125 bool may_use_call;
1126 rtx retval = 0;
1127 unsigned int align;
1128
1129 gcc_assert (size);
1130 if (CONST_INT_P (size)
1131 && INTVAL (size) == 0)
1132 return 0;
1133
1134 switch (method)
1135 {
1136 case BLOCK_OP_NORMAL:
1137 case BLOCK_OP_TAILCALL:
1138 may_use_call = true;
1139 break;
1140
1141 case BLOCK_OP_CALL_PARM:
1142 may_use_call = block_move_libcall_safe_for_call_parm ();
1143
1144 /* Make inhibit_defer_pop nonzero around the library call
1145 to force it to pop the arguments right away. */
1146 NO_DEFER_POP;
1147 break;
1148
1149 case BLOCK_OP_NO_LIBCALL:
1150 may_use_call = false;
1151 break;
1152
1153 default:
1154 gcc_unreachable ();
1155 }
1156
1157 gcc_assert (MEM_P (x) && MEM_P (y));
1158 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1159 gcc_assert (align >= BITS_PER_UNIT);
1160
1161 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1162 block copy is more efficient for other large modes, e.g. DCmode. */
1163 x = adjust_address (x, BLKmode, 0);
1164 y = adjust_address (y, BLKmode, 0);
1165
1166 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1167 can be incorrect is coming from __builtin_memcpy. */
1168 if (CONST_INT_P (size))
1169 {
1170 x = shallow_copy_rtx (x);
1171 y = shallow_copy_rtx (y);
1172 set_mem_size (x, INTVAL (size));
1173 set_mem_size (y, INTVAL (size));
1174 }
1175
1176 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1177 move_by_pieces (x, y, INTVAL (size), align, 0);
1178 else if (emit_block_move_via_movmem (x, y, size, align,
1179 expected_align, expected_size))
1180 ;
1181 else if (may_use_call
1182 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1183 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1184 {
1185 /* Since x and y are passed to a libcall, mark the corresponding
1186 tree EXPR as addressable. */
1187 tree y_expr = MEM_EXPR (y);
1188 tree x_expr = MEM_EXPR (x);
1189 if (y_expr)
1190 mark_addressable (y_expr);
1191 if (x_expr)
1192 mark_addressable (x_expr);
1193 retval = emit_block_move_via_libcall (x, y, size,
1194 method == BLOCK_OP_TAILCALL);
1195 }
1196
1197 else
1198 emit_block_move_via_loop (x, y, size, align);
1199
1200 if (method == BLOCK_OP_CALL_PARM)
1201 OK_DEFER_POP;
1202
1203 return retval;
1204 }
1205
1206 rtx
1207 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1208 {
1209 return emit_block_move_hints (x, y, size, method, 0, -1);
1210 }
1211
1212 /* A subroutine of emit_block_move. Returns true if calling the
1213 block move libcall will not clobber any parameters which may have
1214 already been placed on the stack. */
1215
1216 static bool
1217 block_move_libcall_safe_for_call_parm (void)
1218 {
1219 #if defined (REG_PARM_STACK_SPACE)
1220 tree fn;
1221 #endif
1222
1223 /* If arguments are pushed on the stack, then they're safe. */
1224 if (PUSH_ARGS)
1225 return true;
1226
1227 /* If registers go on the stack anyway, any argument is sure to clobber
1228 an outgoing argument. */
1229 #if defined (REG_PARM_STACK_SPACE)
1230 fn = emit_block_move_libcall_fn (false);
1231 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1232 depend on its argument. */
1233 (void) fn;
1234 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1235 && REG_PARM_STACK_SPACE (fn) != 0)
1236 return false;
1237 #endif
1238
1239 /* If any argument goes in memory, then it might clobber an outgoing
1240 argument. */
1241 {
1242 CUMULATIVE_ARGS args_so_far_v;
1243 cumulative_args_t args_so_far;
1244 tree fn, arg;
1245
1246 fn = emit_block_move_libcall_fn (false);
1247 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1248 args_so_far = pack_cumulative_args (&args_so_far_v);
1249
1250 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1251 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1252 {
1253 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1254 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1255 NULL_TREE, true);
1256 if (!tmp || !REG_P (tmp))
1257 return false;
1258 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1259 return false;
1260 targetm.calls.function_arg_advance (args_so_far, mode,
1261 NULL_TREE, true);
1262 }
1263 }
1264 return true;
1265 }
1266
1267 /* A subroutine of emit_block_move. Expand a movmem pattern;
1268 return true if successful. */
1269
1270 static bool
1271 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1272 unsigned int expected_align, HOST_WIDE_INT expected_size)
1273 {
1274 int save_volatile_ok = volatile_ok;
1275 enum machine_mode mode;
1276
1277 if (expected_align < align)
1278 expected_align = align;
1279
1280 /* Since this is a move insn, we don't care about volatility. */
1281 volatile_ok = 1;
1282
1283 /* Try the most limited insn first, because there's no point
1284 including more than one in the machine description unless
1285 the more limited one has some advantage. */
1286
1287 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1288 mode = GET_MODE_WIDER_MODE (mode))
1289 {
1290 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1291
1292 if (code != CODE_FOR_nothing
1293 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1294 here because if SIZE is less than the mode mask, as it is
1295 returned by the macro, it will definitely be less than the
1296 actual mode mask. */
1297 && ((CONST_INT_P (size)
1298 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1299 <= (GET_MODE_MASK (mode) >> 1)))
1300 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1301 {
1302 struct expand_operand ops[6];
1303 unsigned int nops;
1304
1305 /* ??? When called via emit_block_move_for_call, it'd be
1306 nice if there were some way to inform the backend, so
1307 that it doesn't fail the expansion because it thinks
1308 emitting the libcall would be more efficient. */
1309 nops = insn_data[(int) code].n_generator_args;
1310 gcc_assert (nops == 4 || nops == 6);
1311
1312 create_fixed_operand (&ops[0], x);
1313 create_fixed_operand (&ops[1], y);
1314 /* The check above guarantees that this size conversion is valid. */
1315 create_convert_operand_to (&ops[2], size, mode, true);
1316 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1317 if (nops == 6)
1318 {
1319 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1320 create_integer_operand (&ops[5], expected_size);
1321 }
1322 if (maybe_expand_insn (code, nops, ops))
1323 {
1324 volatile_ok = save_volatile_ok;
1325 return true;
1326 }
1327 }
1328 }
1329
1330 volatile_ok = save_volatile_ok;
1331 return false;
1332 }
1333
1334 /* A subroutine of emit_block_move. Expand a call to memcpy.
1335 Return the return value from memcpy, 0 otherwise. */
1336
1337 rtx
1338 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1339 {
1340 rtx dst_addr, src_addr;
1341 tree call_expr, fn, src_tree, dst_tree, size_tree;
1342 enum machine_mode size_mode;
1343 rtx retval;
1344
1345 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1346 pseudos. We can then place those new pseudos into a VAR_DECL and
1347 use them later. */
1348
1349 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1350 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1351
1352 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1353 src_addr = convert_memory_address (ptr_mode, src_addr);
1354
1355 dst_tree = make_tree (ptr_type_node, dst_addr);
1356 src_tree = make_tree (ptr_type_node, src_addr);
1357
1358 size_mode = TYPE_MODE (sizetype);
1359
1360 size = convert_to_mode (size_mode, size, 1);
1361 size = copy_to_mode_reg (size_mode, size);
1362
1363 /* It is incorrect to use the libcall calling conventions to call
1364 memcpy in this context. This could be a user call to memcpy and
1365 the user may wish to examine the return value from memcpy. For
1366 targets where libcalls and normal calls have different conventions
1367 for returning pointers, we could end up generating incorrect code. */
1368
1369 size_tree = make_tree (sizetype, size);
1370
1371 fn = emit_block_move_libcall_fn (true);
1372 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1373 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1374
1375 retval = expand_normal (call_expr);
1376
1377 return retval;
1378 }
1379
1380 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1381 for the function we use for block copies. The first time FOR_CALL
1382 is true, we call assemble_external. */
1383
1384 static GTY(()) tree block_move_fn;
1385
1386 void
1387 init_block_move_fn (const char *asmspec)
1388 {
1389 if (!block_move_fn)
1390 {
1391 tree args, fn;
1392
1393 fn = get_identifier ("memcpy");
1394 args = build_function_type_list (ptr_type_node, ptr_type_node,
1395 const_ptr_type_node, sizetype,
1396 NULL_TREE);
1397
1398 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1399 DECL_EXTERNAL (fn) = 1;
1400 TREE_PUBLIC (fn) = 1;
1401 DECL_ARTIFICIAL (fn) = 1;
1402 TREE_NOTHROW (fn) = 1;
1403 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1404 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1405
1406 block_move_fn = fn;
1407 }
1408
1409 if (asmspec)
1410 set_user_assembler_name (block_move_fn, asmspec);
1411 }
1412
1413 static tree
1414 emit_block_move_libcall_fn (int for_call)
1415 {
1416 static bool emitted_extern;
1417
1418 if (!block_move_fn)
1419 init_block_move_fn (NULL);
1420
1421 if (for_call && !emitted_extern)
1422 {
1423 emitted_extern = true;
1424 make_decl_rtl (block_move_fn);
1425 assemble_external (block_move_fn);
1426 }
1427
1428 return block_move_fn;
1429 }
1430
1431 /* A subroutine of emit_block_move. Copy the data via an explicit
1432 loop. This is used only when libcalls are forbidden. */
1433 /* ??? It'd be nice to copy in hunks larger than QImode. */
1434
1435 static void
1436 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1437 unsigned int align ATTRIBUTE_UNUSED)
1438 {
1439 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1440 enum machine_mode x_addr_mode
1441 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1442 enum machine_mode y_addr_mode
1443 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1444 enum machine_mode iter_mode;
1445
1446 iter_mode = GET_MODE (size);
1447 if (iter_mode == VOIDmode)
1448 iter_mode = word_mode;
1449
1450 top_label = gen_label_rtx ();
1451 cmp_label = gen_label_rtx ();
1452 iter = gen_reg_rtx (iter_mode);
1453
1454 emit_move_insn (iter, const0_rtx);
1455
1456 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1457 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1458 do_pending_stack_adjust ();
1459
1460 emit_jump (cmp_label);
1461 emit_label (top_label);
1462
1463 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1464 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1465
1466 if (x_addr_mode != y_addr_mode)
1467 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1468 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1469
1470 x = change_address (x, QImode, x_addr);
1471 y = change_address (y, QImode, y_addr);
1472
1473 emit_move_insn (x, y);
1474
1475 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1476 true, OPTAB_LIB_WIDEN);
1477 if (tmp != iter)
1478 emit_move_insn (iter, tmp);
1479
1480 emit_label (cmp_label);
1481
1482 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1483 true, top_label);
1484 }
1485 \f
1486 /* Copy all or part of a value X into registers starting at REGNO.
1487 The number of registers to be filled is NREGS. */
1488
1489 void
1490 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1491 {
1492 int i;
1493 #ifdef HAVE_load_multiple
1494 rtx pat;
1495 rtx last;
1496 #endif
1497
1498 if (nregs == 0)
1499 return;
1500
1501 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1502 x = validize_mem (force_const_mem (mode, x));
1503
1504 /* See if the machine can do this with a load multiple insn. */
1505 #ifdef HAVE_load_multiple
1506 if (HAVE_load_multiple)
1507 {
1508 last = get_last_insn ();
1509 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1510 GEN_INT (nregs));
1511 if (pat)
1512 {
1513 emit_insn (pat);
1514 return;
1515 }
1516 else
1517 delete_insns_since (last);
1518 }
1519 #endif
1520
1521 for (i = 0; i < nregs; i++)
1522 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1523 operand_subword_force (x, i, mode));
1524 }
1525
1526 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1527 The number of registers to be filled is NREGS. */
1528
1529 void
1530 move_block_from_reg (int regno, rtx x, int nregs)
1531 {
1532 int i;
1533
1534 if (nregs == 0)
1535 return;
1536
1537 /* See if the machine can do this with a store multiple insn. */
1538 #ifdef HAVE_store_multiple
1539 if (HAVE_store_multiple)
1540 {
1541 rtx last = get_last_insn ();
1542 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1543 GEN_INT (nregs));
1544 if (pat)
1545 {
1546 emit_insn (pat);
1547 return;
1548 }
1549 else
1550 delete_insns_since (last);
1551 }
1552 #endif
1553
1554 for (i = 0; i < nregs; i++)
1555 {
1556 rtx tem = operand_subword (x, i, 1, BLKmode);
1557
1558 gcc_assert (tem);
1559
1560 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1561 }
1562 }
1563
1564 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1565 ORIG, where ORIG is a non-consecutive group of registers represented by
1566 a PARALLEL. The clone is identical to the original except in that the
1567 original set of registers is replaced by a new set of pseudo registers.
1568 The new set has the same modes as the original set. */
1569
1570 rtx
1571 gen_group_rtx (rtx orig)
1572 {
1573 int i, length;
1574 rtx *tmps;
1575
1576 gcc_assert (GET_CODE (orig) == PARALLEL);
1577
1578 length = XVECLEN (orig, 0);
1579 tmps = XALLOCAVEC (rtx, length);
1580
1581 /* Skip a NULL entry in first slot. */
1582 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1583
1584 if (i)
1585 tmps[0] = 0;
1586
1587 for (; i < length; i++)
1588 {
1589 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1590 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1591
1592 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1593 }
1594
1595 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1596 }
1597
1598 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1599 except that values are placed in TMPS[i], and must later be moved
1600 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1601
1602 static void
1603 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1604 {
1605 rtx src;
1606 int start, i;
1607 enum machine_mode m = GET_MODE (orig_src);
1608
1609 gcc_assert (GET_CODE (dst) == PARALLEL);
1610
1611 if (m != VOIDmode
1612 && !SCALAR_INT_MODE_P (m)
1613 && !MEM_P (orig_src)
1614 && GET_CODE (orig_src) != CONCAT)
1615 {
1616 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1617 if (imode == BLKmode)
1618 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1619 else
1620 src = gen_reg_rtx (imode);
1621 if (imode != BLKmode)
1622 src = gen_lowpart (GET_MODE (orig_src), src);
1623 emit_move_insn (src, orig_src);
1624 /* ...and back again. */
1625 if (imode != BLKmode)
1626 src = gen_lowpart (imode, src);
1627 emit_group_load_1 (tmps, dst, src, type, ssize);
1628 return;
1629 }
1630
1631 /* Check for a NULL entry, used to indicate that the parameter goes
1632 both on the stack and in registers. */
1633 if (XEXP (XVECEXP (dst, 0, 0), 0))
1634 start = 0;
1635 else
1636 start = 1;
1637
1638 /* Process the pieces. */
1639 for (i = start; i < XVECLEN (dst, 0); i++)
1640 {
1641 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1642 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1643 unsigned int bytelen = GET_MODE_SIZE (mode);
1644 int shift = 0;
1645
1646 /* Handle trailing fragments that run over the size of the struct. */
1647 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1648 {
1649 /* Arrange to shift the fragment to where it belongs.
1650 extract_bit_field loads to the lsb of the reg. */
1651 if (
1652 #ifdef BLOCK_REG_PADDING
1653 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1654 == (BYTES_BIG_ENDIAN ? upward : downward)
1655 #else
1656 BYTES_BIG_ENDIAN
1657 #endif
1658 )
1659 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1660 bytelen = ssize - bytepos;
1661 gcc_assert (bytelen > 0);
1662 }
1663
1664 /* If we won't be loading directly from memory, protect the real source
1665 from strange tricks we might play; but make sure that the source can
1666 be loaded directly into the destination. */
1667 src = orig_src;
1668 if (!MEM_P (orig_src)
1669 && (!CONSTANT_P (orig_src)
1670 || (GET_MODE (orig_src) != mode
1671 && GET_MODE (orig_src) != VOIDmode)))
1672 {
1673 if (GET_MODE (orig_src) == VOIDmode)
1674 src = gen_reg_rtx (mode);
1675 else
1676 src = gen_reg_rtx (GET_MODE (orig_src));
1677
1678 emit_move_insn (src, orig_src);
1679 }
1680
1681 /* Optimize the access just a bit. */
1682 if (MEM_P (src)
1683 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1684 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1685 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1686 && bytelen == GET_MODE_SIZE (mode))
1687 {
1688 tmps[i] = gen_reg_rtx (mode);
1689 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1690 }
1691 else if (COMPLEX_MODE_P (mode)
1692 && GET_MODE (src) == mode
1693 && bytelen == GET_MODE_SIZE (mode))
1694 /* Let emit_move_complex do the bulk of the work. */
1695 tmps[i] = src;
1696 else if (GET_CODE (src) == CONCAT)
1697 {
1698 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1699 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1700
1701 if ((bytepos == 0 && bytelen == slen0)
1702 || (bytepos != 0 && bytepos + bytelen <= slen))
1703 {
1704 /* The following assumes that the concatenated objects all
1705 have the same size. In this case, a simple calculation
1706 can be used to determine the object and the bit field
1707 to be extracted. */
1708 tmps[i] = XEXP (src, bytepos / slen0);
1709 if (! CONSTANT_P (tmps[i])
1710 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1711 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1712 (bytepos % slen0) * BITS_PER_UNIT,
1713 1, false, NULL_RTX, mode, mode);
1714 }
1715 else
1716 {
1717 rtx mem;
1718
1719 gcc_assert (!bytepos);
1720 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1721 emit_move_insn (mem, src);
1722 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1723 0, 1, false, NULL_RTX, mode, mode);
1724 }
1725 }
1726 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1727 SIMD register, which is currently broken. While we get GCC
1728 to emit proper RTL for these cases, let's dump to memory. */
1729 else if (VECTOR_MODE_P (GET_MODE (dst))
1730 && REG_P (src))
1731 {
1732 int slen = GET_MODE_SIZE (GET_MODE (src));
1733 rtx mem;
1734
1735 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1736 emit_move_insn (mem, src);
1737 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1738 }
1739 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1740 && XVECLEN (dst, 0) > 1)
1741 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1742 else if (CONSTANT_P (src))
1743 {
1744 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1745
1746 if (len == ssize)
1747 tmps[i] = src;
1748 else
1749 {
1750 rtx first, second;
1751
1752 gcc_assert (2 * len == ssize);
1753 split_double (src, &first, &second);
1754 if (i)
1755 tmps[i] = second;
1756 else
1757 tmps[i] = first;
1758 }
1759 }
1760 else if (REG_P (src) && GET_MODE (src) == mode)
1761 tmps[i] = src;
1762 else
1763 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1764 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1765 mode, mode);
1766
1767 if (shift)
1768 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1769 shift, tmps[i], 0);
1770 }
1771 }
1772
1773 /* Emit code to move a block SRC of type TYPE to a block DST,
1774 where DST is non-consecutive registers represented by a PARALLEL.
1775 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1776 if not known. */
1777
1778 void
1779 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1780 {
1781 rtx *tmps;
1782 int i;
1783
1784 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1785 emit_group_load_1 (tmps, dst, src, type, ssize);
1786
1787 /* Copy the extracted pieces into the proper (probable) hard regs. */
1788 for (i = 0; i < XVECLEN (dst, 0); i++)
1789 {
1790 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1791 if (d == NULL)
1792 continue;
1793 emit_move_insn (d, tmps[i]);
1794 }
1795 }
1796
1797 /* Similar, but load SRC into new pseudos in a format that looks like
1798 PARALLEL. This can later be fed to emit_group_move to get things
1799 in the right place. */
1800
1801 rtx
1802 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1803 {
1804 rtvec vec;
1805 int i;
1806
1807 vec = rtvec_alloc (XVECLEN (parallel, 0));
1808 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1809
1810 /* Convert the vector to look just like the original PARALLEL, except
1811 with the computed values. */
1812 for (i = 0; i < XVECLEN (parallel, 0); i++)
1813 {
1814 rtx e = XVECEXP (parallel, 0, i);
1815 rtx d = XEXP (e, 0);
1816
1817 if (d)
1818 {
1819 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1820 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1821 }
1822 RTVEC_ELT (vec, i) = e;
1823 }
1824
1825 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1826 }
1827
1828 /* Emit code to move a block SRC to block DST, where SRC and DST are
1829 non-consecutive groups of registers, each represented by a PARALLEL. */
1830
1831 void
1832 emit_group_move (rtx dst, rtx src)
1833 {
1834 int i;
1835
1836 gcc_assert (GET_CODE (src) == PARALLEL
1837 && GET_CODE (dst) == PARALLEL
1838 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1839
1840 /* Skip first entry if NULL. */
1841 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1842 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1843 XEXP (XVECEXP (src, 0, i), 0));
1844 }
1845
1846 /* Move a group of registers represented by a PARALLEL into pseudos. */
1847
1848 rtx
1849 emit_group_move_into_temps (rtx src)
1850 {
1851 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1852 int i;
1853
1854 for (i = 0; i < XVECLEN (src, 0); i++)
1855 {
1856 rtx e = XVECEXP (src, 0, i);
1857 rtx d = XEXP (e, 0);
1858
1859 if (d)
1860 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1861 RTVEC_ELT (vec, i) = e;
1862 }
1863
1864 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1865 }
1866
1867 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1868 where SRC is non-consecutive registers represented by a PARALLEL.
1869 SSIZE represents the total size of block ORIG_DST, or -1 if not
1870 known. */
1871
1872 void
1873 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1874 {
1875 rtx *tmps, dst;
1876 int start, finish, i;
1877 enum machine_mode m = GET_MODE (orig_dst);
1878
1879 gcc_assert (GET_CODE (src) == PARALLEL);
1880
1881 if (!SCALAR_INT_MODE_P (m)
1882 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1883 {
1884 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1885 if (imode == BLKmode)
1886 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1887 else
1888 dst = gen_reg_rtx (imode);
1889 emit_group_store (dst, src, type, ssize);
1890 if (imode != BLKmode)
1891 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1892 emit_move_insn (orig_dst, dst);
1893 return;
1894 }
1895
1896 /* Check for a NULL entry, used to indicate that the parameter goes
1897 both on the stack and in registers. */
1898 if (XEXP (XVECEXP (src, 0, 0), 0))
1899 start = 0;
1900 else
1901 start = 1;
1902 finish = XVECLEN (src, 0);
1903
1904 tmps = XALLOCAVEC (rtx, finish);
1905
1906 /* Copy the (probable) hard regs into pseudos. */
1907 for (i = start; i < finish; i++)
1908 {
1909 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1910 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1911 {
1912 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1913 emit_move_insn (tmps[i], reg);
1914 }
1915 else
1916 tmps[i] = reg;
1917 }
1918
1919 /* If we won't be storing directly into memory, protect the real destination
1920 from strange tricks we might play. */
1921 dst = orig_dst;
1922 if (GET_CODE (dst) == PARALLEL)
1923 {
1924 rtx temp;
1925
1926 /* We can get a PARALLEL dst if there is a conditional expression in
1927 a return statement. In that case, the dst and src are the same,
1928 so no action is necessary. */
1929 if (rtx_equal_p (dst, src))
1930 return;
1931
1932 /* It is unclear if we can ever reach here, but we may as well handle
1933 it. Allocate a temporary, and split this into a store/load to/from
1934 the temporary. */
1935
1936 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1937 emit_group_store (temp, src, type, ssize);
1938 emit_group_load (dst, temp, type, ssize);
1939 return;
1940 }
1941 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1942 {
1943 enum machine_mode outer = GET_MODE (dst);
1944 enum machine_mode inner;
1945 HOST_WIDE_INT bytepos;
1946 bool done = false;
1947 rtx temp;
1948
1949 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1950 dst = gen_reg_rtx (outer);
1951
1952 /* Make life a bit easier for combine. */
1953 /* If the first element of the vector is the low part
1954 of the destination mode, use a paradoxical subreg to
1955 initialize the destination. */
1956 if (start < finish)
1957 {
1958 inner = GET_MODE (tmps[start]);
1959 bytepos = subreg_lowpart_offset (inner, outer);
1960 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1961 {
1962 temp = simplify_gen_subreg (outer, tmps[start],
1963 inner, 0);
1964 if (temp)
1965 {
1966 emit_move_insn (dst, temp);
1967 done = true;
1968 start++;
1969 }
1970 }
1971 }
1972
1973 /* If the first element wasn't the low part, try the last. */
1974 if (!done
1975 && start < finish - 1)
1976 {
1977 inner = GET_MODE (tmps[finish - 1]);
1978 bytepos = subreg_lowpart_offset (inner, outer);
1979 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1980 {
1981 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1982 inner, 0);
1983 if (temp)
1984 {
1985 emit_move_insn (dst, temp);
1986 done = true;
1987 finish--;
1988 }
1989 }
1990 }
1991
1992 /* Otherwise, simply initialize the result to zero. */
1993 if (!done)
1994 emit_move_insn (dst, CONST0_RTX (outer));
1995 }
1996
1997 /* Process the pieces. */
1998 for (i = start; i < finish; i++)
1999 {
2000 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2001 enum machine_mode mode = GET_MODE (tmps[i]);
2002 unsigned int bytelen = GET_MODE_SIZE (mode);
2003 unsigned int adj_bytelen = bytelen;
2004 rtx dest = dst;
2005
2006 /* Handle trailing fragments that run over the size of the struct. */
2007 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2008 adj_bytelen = ssize - bytepos;
2009
2010 if (GET_CODE (dst) == CONCAT)
2011 {
2012 if (bytepos + adj_bytelen
2013 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2014 dest = XEXP (dst, 0);
2015 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2016 {
2017 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2018 dest = XEXP (dst, 1);
2019 }
2020 else
2021 {
2022 enum machine_mode dest_mode = GET_MODE (dest);
2023 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2024
2025 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2026
2027 if (GET_MODE_ALIGNMENT (dest_mode)
2028 >= GET_MODE_ALIGNMENT (tmp_mode))
2029 {
2030 dest = assign_stack_temp (dest_mode,
2031 GET_MODE_SIZE (dest_mode),
2032 0);
2033 emit_move_insn (adjust_address (dest,
2034 tmp_mode,
2035 bytepos),
2036 tmps[i]);
2037 dst = dest;
2038 }
2039 else
2040 {
2041 dest = assign_stack_temp (tmp_mode,
2042 GET_MODE_SIZE (tmp_mode),
2043 0);
2044 emit_move_insn (dest, tmps[i]);
2045 dst = adjust_address (dest, dest_mode, bytepos);
2046 }
2047 break;
2048 }
2049 }
2050
2051 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2052 {
2053 /* store_bit_field always takes its value from the lsb.
2054 Move the fragment to the lsb if it's not already there. */
2055 if (
2056 #ifdef BLOCK_REG_PADDING
2057 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2058 == (BYTES_BIG_ENDIAN ? upward : downward)
2059 #else
2060 BYTES_BIG_ENDIAN
2061 #endif
2062 )
2063 {
2064 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2065 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2066 shift, tmps[i], 0);
2067 }
2068 bytelen = adj_bytelen;
2069 }
2070
2071 /* Optimize the access just a bit. */
2072 if (MEM_P (dest)
2073 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2074 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2075 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2076 && bytelen == GET_MODE_SIZE (mode))
2077 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2078 else
2079 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2080 0, 0, mode, tmps[i]);
2081 }
2082
2083 /* Copy from the pseudo into the (probable) hard reg. */
2084 if (orig_dst != dst)
2085 emit_move_insn (orig_dst, dst);
2086 }
2087
2088 /* Generate code to copy a BLKmode object of TYPE out of a
2089 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2090 is null, a stack temporary is created. TGTBLK is returned.
2091
2092 The purpose of this routine is to handle functions that return
2093 BLKmode structures in registers. Some machines (the PA for example)
2094 want to return all small structures in registers regardless of the
2095 structure's alignment. */
2096
2097 rtx
2098 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2099 {
2100 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2101 rtx src = NULL, dst = NULL;
2102 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2103 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2104 enum machine_mode copy_mode;
2105
2106 if (tgtblk == 0)
2107 {
2108 tgtblk = assign_temp (build_qualified_type (type,
2109 (TYPE_QUALS (type)
2110 | TYPE_QUAL_CONST)),
2111 0, 1, 1);
2112 preserve_temp_slots (tgtblk);
2113 }
2114
2115 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2116 into a new pseudo which is a full word. */
2117
2118 if (GET_MODE (srcreg) != BLKmode
2119 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2120 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2121
2122 /* If the structure doesn't take up a whole number of words, see whether
2123 SRCREG is padded on the left or on the right. If it's on the left,
2124 set PADDING_CORRECTION to the number of bits to skip.
2125
2126 In most ABIs, the structure will be returned at the least end of
2127 the register, which translates to right padding on little-endian
2128 targets and left padding on big-endian targets. The opposite
2129 holds if the structure is returned at the most significant
2130 end of the register. */
2131 if (bytes % UNITS_PER_WORD != 0
2132 && (targetm.calls.return_in_msb (type)
2133 ? !BYTES_BIG_ENDIAN
2134 : BYTES_BIG_ENDIAN))
2135 padding_correction
2136 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2137
2138 /* Copy the structure BITSIZE bits at a time. If the target lives in
2139 memory, take care of not reading/writing past its end by selecting
2140 a copy mode suited to BITSIZE. This should always be possible given
2141 how it is computed.
2142
2143 We could probably emit more efficient code for machines which do not use
2144 strict alignment, but it doesn't seem worth the effort at the current
2145 time. */
2146
2147 copy_mode = word_mode;
2148 if (MEM_P (tgtblk))
2149 {
2150 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2151 if (mem_mode != BLKmode)
2152 copy_mode = mem_mode;
2153 }
2154
2155 for (bitpos = 0, xbitpos = padding_correction;
2156 bitpos < bytes * BITS_PER_UNIT;
2157 bitpos += bitsize, xbitpos += bitsize)
2158 {
2159 /* We need a new source operand each time xbitpos is on a
2160 word boundary and when xbitpos == padding_correction
2161 (the first time through). */
2162 if (xbitpos % BITS_PER_WORD == 0
2163 || xbitpos == padding_correction)
2164 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2165 GET_MODE (srcreg));
2166
2167 /* We need a new destination operand each time bitpos is on
2168 a word boundary. */
2169 if (bitpos % BITS_PER_WORD == 0)
2170 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2171
2172 /* Use xbitpos for the source extraction (right justified) and
2173 bitpos for the destination store (left justified). */
2174 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2175 extract_bit_field (src, bitsize,
2176 xbitpos % BITS_PER_WORD, 1, false,
2177 NULL_RTX, copy_mode, copy_mode));
2178 }
2179
2180 return tgtblk;
2181 }
2182
2183 /* Add a USE expression for REG to the (possibly empty) list pointed
2184 to by CALL_FUSAGE. REG must denote a hard register. */
2185
2186 void
2187 use_reg (rtx *call_fusage, rtx reg)
2188 {
2189 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2190
2191 *call_fusage
2192 = gen_rtx_EXPR_LIST (VOIDmode,
2193 gen_rtx_USE (VOIDmode, reg), *call_fusage);
2194 }
2195
2196 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2197 starting at REGNO. All of these registers must be hard registers. */
2198
2199 void
2200 use_regs (rtx *call_fusage, int regno, int nregs)
2201 {
2202 int i;
2203
2204 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2205
2206 for (i = 0; i < nregs; i++)
2207 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2208 }
2209
2210 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2211 PARALLEL REGS. This is for calls that pass values in multiple
2212 non-contiguous locations. The Irix 6 ABI has examples of this. */
2213
2214 void
2215 use_group_regs (rtx *call_fusage, rtx regs)
2216 {
2217 int i;
2218
2219 for (i = 0; i < XVECLEN (regs, 0); i++)
2220 {
2221 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2222
2223 /* A NULL entry means the parameter goes both on the stack and in
2224 registers. This can also be a MEM for targets that pass values
2225 partially on the stack and partially in registers. */
2226 if (reg != 0 && REG_P (reg))
2227 use_reg (call_fusage, reg);
2228 }
2229 }
2230
2231 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2232 assigment and the code of the expresion on the RHS is CODE. Return
2233 NULL otherwise. */
2234
2235 static gimple
2236 get_def_for_expr (tree name, enum tree_code code)
2237 {
2238 gimple def_stmt;
2239
2240 if (TREE_CODE (name) != SSA_NAME)
2241 return NULL;
2242
2243 def_stmt = get_gimple_for_ssa_name (name);
2244 if (!def_stmt
2245 || gimple_assign_rhs_code (def_stmt) != code)
2246 return NULL;
2247
2248 return def_stmt;
2249 }
2250 \f
2251
2252 /* Determine whether the LEN bytes generated by CONSTFUN can be
2253 stored to memory using several move instructions. CONSTFUNDATA is
2254 a pointer which will be passed as argument in every CONSTFUN call.
2255 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2256 a memset operation and false if it's a copy of a constant string.
2257 Return nonzero if a call to store_by_pieces should succeed. */
2258
2259 int
2260 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2261 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2262 void *constfundata, unsigned int align, bool memsetp)
2263 {
2264 unsigned HOST_WIDE_INT l;
2265 unsigned int max_size;
2266 HOST_WIDE_INT offset = 0;
2267 enum machine_mode mode;
2268 enum insn_code icode;
2269 int reverse;
2270 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2271 rtx cst ATTRIBUTE_UNUSED;
2272
2273 if (len == 0)
2274 return 1;
2275
2276 if (! (memsetp
2277 ? SET_BY_PIECES_P (len, align)
2278 : STORE_BY_PIECES_P (len, align)))
2279 return 0;
2280
2281 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2282
2283 /* We would first store what we can in the largest integer mode, then go to
2284 successively smaller modes. */
2285
2286 for (reverse = 0;
2287 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2288 reverse++)
2289 {
2290 l = len;
2291 max_size = STORE_MAX_PIECES + 1;
2292 while (max_size > 1)
2293 {
2294 mode = widest_int_mode_for_size (max_size);
2295
2296 if (mode == VOIDmode)
2297 break;
2298
2299 icode = optab_handler (mov_optab, mode);
2300 if (icode != CODE_FOR_nothing
2301 && align >= GET_MODE_ALIGNMENT (mode))
2302 {
2303 unsigned int size = GET_MODE_SIZE (mode);
2304
2305 while (l >= size)
2306 {
2307 if (reverse)
2308 offset -= size;
2309
2310 cst = (*constfun) (constfundata, offset, mode);
2311 if (!targetm.legitimate_constant_p (mode, cst))
2312 return 0;
2313
2314 if (!reverse)
2315 offset += size;
2316
2317 l -= size;
2318 }
2319 }
2320
2321 max_size = GET_MODE_SIZE (mode);
2322 }
2323
2324 /* The code above should have handled everything. */
2325 gcc_assert (!l);
2326 }
2327
2328 return 1;
2329 }
2330
2331 /* Generate several move instructions to store LEN bytes generated by
2332 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2333 pointer which will be passed as argument in every CONSTFUN call.
2334 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2335 a memset operation and false if it's a copy of a constant string.
2336 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2337 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2338 stpcpy. */
2339
2340 rtx
2341 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2342 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2343 void *constfundata, unsigned int align, bool memsetp, int endp)
2344 {
2345 enum machine_mode to_addr_mode
2346 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2347 struct store_by_pieces_d data;
2348
2349 if (len == 0)
2350 {
2351 gcc_assert (endp != 2);
2352 return to;
2353 }
2354
2355 gcc_assert (memsetp
2356 ? SET_BY_PIECES_P (len, align)
2357 : STORE_BY_PIECES_P (len, align));
2358 data.constfun = constfun;
2359 data.constfundata = constfundata;
2360 data.len = len;
2361 data.to = to;
2362 store_by_pieces_1 (&data, align);
2363 if (endp)
2364 {
2365 rtx to1;
2366
2367 gcc_assert (!data.reverse);
2368 if (data.autinc_to)
2369 {
2370 if (endp == 2)
2371 {
2372 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2373 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2374 else
2375 data.to_addr = copy_to_mode_reg (to_addr_mode,
2376 plus_constant (data.to_addr,
2377 -1));
2378 }
2379 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2380 data.offset);
2381 }
2382 else
2383 {
2384 if (endp == 2)
2385 --data.offset;
2386 to1 = adjust_address (data.to, QImode, data.offset);
2387 }
2388 return to1;
2389 }
2390 else
2391 return data.to;
2392 }
2393
2394 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2395 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2396
2397 static void
2398 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2399 {
2400 struct store_by_pieces_d data;
2401
2402 if (len == 0)
2403 return;
2404
2405 data.constfun = clear_by_pieces_1;
2406 data.constfundata = NULL;
2407 data.len = len;
2408 data.to = to;
2409 store_by_pieces_1 (&data, align);
2410 }
2411
2412 /* Callback routine for clear_by_pieces.
2413 Return const0_rtx unconditionally. */
2414
2415 static rtx
2416 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2417 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2418 enum machine_mode mode ATTRIBUTE_UNUSED)
2419 {
2420 return const0_rtx;
2421 }
2422
2423 /* Subroutine of clear_by_pieces and store_by_pieces.
2424 Generate several move instructions to store LEN bytes of block TO. (A MEM
2425 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2426
2427 static void
2428 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2429 unsigned int align ATTRIBUTE_UNUSED)
2430 {
2431 enum machine_mode to_addr_mode
2432 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2433 rtx to_addr = XEXP (data->to, 0);
2434 unsigned int max_size = STORE_MAX_PIECES + 1;
2435 enum insn_code icode;
2436
2437 data->offset = 0;
2438 data->to_addr = to_addr;
2439 data->autinc_to
2440 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2441 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2442
2443 data->explicit_inc_to = 0;
2444 data->reverse
2445 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2446 if (data->reverse)
2447 data->offset = data->len;
2448
2449 /* If storing requires more than two move insns,
2450 copy addresses to registers (to make displacements shorter)
2451 and use post-increment if available. */
2452 if (!data->autinc_to
2453 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2454 {
2455 /* Determine the main mode we'll be using.
2456 MODE might not be used depending on the definitions of the
2457 USE_* macros below. */
2458 enum machine_mode mode ATTRIBUTE_UNUSED
2459 = widest_int_mode_for_size (max_size);
2460
2461 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2462 {
2463 data->to_addr = copy_to_mode_reg (to_addr_mode,
2464 plus_constant (to_addr, data->len));
2465 data->autinc_to = 1;
2466 data->explicit_inc_to = -1;
2467 }
2468
2469 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2470 && ! data->autinc_to)
2471 {
2472 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2473 data->autinc_to = 1;
2474 data->explicit_inc_to = 1;
2475 }
2476
2477 if ( !data->autinc_to && CONSTANT_P (to_addr))
2478 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2479 }
2480
2481 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2482
2483 /* First store what we can in the largest integer mode, then go to
2484 successively smaller modes. */
2485
2486 while (max_size > 1)
2487 {
2488 enum machine_mode mode = widest_int_mode_for_size (max_size);
2489
2490 if (mode == VOIDmode)
2491 break;
2492
2493 icode = optab_handler (mov_optab, mode);
2494 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2495 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2496
2497 max_size = GET_MODE_SIZE (mode);
2498 }
2499
2500 /* The code above should have handled everything. */
2501 gcc_assert (!data->len);
2502 }
2503
2504 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2505 with move instructions for mode MODE. GENFUN is the gen_... function
2506 to make a move insn for that mode. DATA has all the other info. */
2507
2508 static void
2509 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2510 struct store_by_pieces_d *data)
2511 {
2512 unsigned int size = GET_MODE_SIZE (mode);
2513 rtx to1, cst;
2514
2515 while (data->len >= size)
2516 {
2517 if (data->reverse)
2518 data->offset -= size;
2519
2520 if (data->autinc_to)
2521 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2522 data->offset);
2523 else
2524 to1 = adjust_address (data->to, mode, data->offset);
2525
2526 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2527 emit_insn (gen_add2_insn (data->to_addr,
2528 GEN_INT (-(HOST_WIDE_INT) size)));
2529
2530 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2531 emit_insn ((*genfun) (to1, cst));
2532
2533 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2534 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2535
2536 if (! data->reverse)
2537 data->offset += size;
2538
2539 data->len -= size;
2540 }
2541 }
2542 \f
2543 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2544 its length in bytes. */
2545
2546 rtx
2547 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2548 unsigned int expected_align, HOST_WIDE_INT expected_size)
2549 {
2550 enum machine_mode mode = GET_MODE (object);
2551 unsigned int align;
2552
2553 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2554
2555 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2556 just move a zero. Otherwise, do this a piece at a time. */
2557 if (mode != BLKmode
2558 && CONST_INT_P (size)
2559 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2560 {
2561 rtx zero = CONST0_RTX (mode);
2562 if (zero != NULL)
2563 {
2564 emit_move_insn (object, zero);
2565 return NULL;
2566 }
2567
2568 if (COMPLEX_MODE_P (mode))
2569 {
2570 zero = CONST0_RTX (GET_MODE_INNER (mode));
2571 if (zero != NULL)
2572 {
2573 write_complex_part (object, zero, 0);
2574 write_complex_part (object, zero, 1);
2575 return NULL;
2576 }
2577 }
2578 }
2579
2580 if (size == const0_rtx)
2581 return NULL;
2582
2583 align = MEM_ALIGN (object);
2584
2585 if (CONST_INT_P (size)
2586 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2587 clear_by_pieces (object, INTVAL (size), align);
2588 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2589 expected_align, expected_size))
2590 ;
2591 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2592 return set_storage_via_libcall (object, size, const0_rtx,
2593 method == BLOCK_OP_TAILCALL);
2594 else
2595 gcc_unreachable ();
2596
2597 return NULL;
2598 }
2599
2600 rtx
2601 clear_storage (rtx object, rtx size, enum block_op_methods method)
2602 {
2603 return clear_storage_hints (object, size, method, 0, -1);
2604 }
2605
2606
2607 /* A subroutine of clear_storage. Expand a call to memset.
2608 Return the return value of memset, 0 otherwise. */
2609
2610 rtx
2611 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2612 {
2613 tree call_expr, fn, object_tree, size_tree, val_tree;
2614 enum machine_mode size_mode;
2615 rtx retval;
2616
2617 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2618 place those into new pseudos into a VAR_DECL and use them later. */
2619
2620 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2621
2622 size_mode = TYPE_MODE (sizetype);
2623 size = convert_to_mode (size_mode, size, 1);
2624 size = copy_to_mode_reg (size_mode, size);
2625
2626 /* It is incorrect to use the libcall calling conventions to call
2627 memset in this context. This could be a user call to memset and
2628 the user may wish to examine the return value from memset. For
2629 targets where libcalls and normal calls have different conventions
2630 for returning pointers, we could end up generating incorrect code. */
2631
2632 object_tree = make_tree (ptr_type_node, object);
2633 if (!CONST_INT_P (val))
2634 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2635 size_tree = make_tree (sizetype, size);
2636 val_tree = make_tree (integer_type_node, val);
2637
2638 fn = clear_storage_libcall_fn (true);
2639 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2640 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2641
2642 retval = expand_normal (call_expr);
2643
2644 return retval;
2645 }
2646
2647 /* A subroutine of set_storage_via_libcall. Create the tree node
2648 for the function we use for block clears. The first time FOR_CALL
2649 is true, we call assemble_external. */
2650
2651 tree block_clear_fn;
2652
2653 void
2654 init_block_clear_fn (const char *asmspec)
2655 {
2656 if (!block_clear_fn)
2657 {
2658 tree fn, args;
2659
2660 fn = get_identifier ("memset");
2661 args = build_function_type_list (ptr_type_node, ptr_type_node,
2662 integer_type_node, sizetype,
2663 NULL_TREE);
2664
2665 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2666 DECL_EXTERNAL (fn) = 1;
2667 TREE_PUBLIC (fn) = 1;
2668 DECL_ARTIFICIAL (fn) = 1;
2669 TREE_NOTHROW (fn) = 1;
2670 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2671 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2672
2673 block_clear_fn = fn;
2674 }
2675
2676 if (asmspec)
2677 set_user_assembler_name (block_clear_fn, asmspec);
2678 }
2679
2680 static tree
2681 clear_storage_libcall_fn (int for_call)
2682 {
2683 static bool emitted_extern;
2684
2685 if (!block_clear_fn)
2686 init_block_clear_fn (NULL);
2687
2688 if (for_call && !emitted_extern)
2689 {
2690 emitted_extern = true;
2691 make_decl_rtl (block_clear_fn);
2692 assemble_external (block_clear_fn);
2693 }
2694
2695 return block_clear_fn;
2696 }
2697 \f
2698 /* Expand a setmem pattern; return true if successful. */
2699
2700 bool
2701 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2702 unsigned int expected_align, HOST_WIDE_INT expected_size)
2703 {
2704 /* Try the most limited insn first, because there's no point
2705 including more than one in the machine description unless
2706 the more limited one has some advantage. */
2707
2708 enum machine_mode mode;
2709
2710 if (expected_align < align)
2711 expected_align = align;
2712
2713 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2714 mode = GET_MODE_WIDER_MODE (mode))
2715 {
2716 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2717
2718 if (code != CODE_FOR_nothing
2719 /* We don't need MODE to be narrower than
2720 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2721 the mode mask, as it is returned by the macro, it will
2722 definitely be less than the actual mode mask. */
2723 && ((CONST_INT_P (size)
2724 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2725 <= (GET_MODE_MASK (mode) >> 1)))
2726 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2727 {
2728 struct expand_operand ops[6];
2729 unsigned int nops;
2730
2731 nops = insn_data[(int) code].n_generator_args;
2732 gcc_assert (nops == 4 || nops == 6);
2733
2734 create_fixed_operand (&ops[0], object);
2735 /* The check above guarantees that this size conversion is valid. */
2736 create_convert_operand_to (&ops[1], size, mode, true);
2737 create_convert_operand_from (&ops[2], val, byte_mode, true);
2738 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2739 if (nops == 6)
2740 {
2741 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2742 create_integer_operand (&ops[5], expected_size);
2743 }
2744 if (maybe_expand_insn (code, nops, ops))
2745 return true;
2746 }
2747 }
2748
2749 return false;
2750 }
2751
2752 \f
2753 /* Write to one of the components of the complex value CPLX. Write VAL to
2754 the real part if IMAG_P is false, and the imaginary part if its true. */
2755
2756 static void
2757 write_complex_part (rtx cplx, rtx val, bool imag_p)
2758 {
2759 enum machine_mode cmode;
2760 enum machine_mode imode;
2761 unsigned ibitsize;
2762
2763 if (GET_CODE (cplx) == CONCAT)
2764 {
2765 emit_move_insn (XEXP (cplx, imag_p), val);
2766 return;
2767 }
2768
2769 cmode = GET_MODE (cplx);
2770 imode = GET_MODE_INNER (cmode);
2771 ibitsize = GET_MODE_BITSIZE (imode);
2772
2773 /* For MEMs simplify_gen_subreg may generate an invalid new address
2774 because, e.g., the original address is considered mode-dependent
2775 by the target, which restricts simplify_subreg from invoking
2776 adjust_address_nv. Instead of preparing fallback support for an
2777 invalid address, we call adjust_address_nv directly. */
2778 if (MEM_P (cplx))
2779 {
2780 emit_move_insn (adjust_address_nv (cplx, imode,
2781 imag_p ? GET_MODE_SIZE (imode) : 0),
2782 val);
2783 return;
2784 }
2785
2786 /* If the sub-object is at least word sized, then we know that subregging
2787 will work. This special case is important, since store_bit_field
2788 wants to operate on integer modes, and there's rarely an OImode to
2789 correspond to TCmode. */
2790 if (ibitsize >= BITS_PER_WORD
2791 /* For hard regs we have exact predicates. Assume we can split
2792 the original object if it spans an even number of hard regs.
2793 This special case is important for SCmode on 64-bit platforms
2794 where the natural size of floating-point regs is 32-bit. */
2795 || (REG_P (cplx)
2796 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2797 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2798 {
2799 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2800 imag_p ? GET_MODE_SIZE (imode) : 0);
2801 if (part)
2802 {
2803 emit_move_insn (part, val);
2804 return;
2805 }
2806 else
2807 /* simplify_gen_subreg may fail for sub-word MEMs. */
2808 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2809 }
2810
2811 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2812 }
2813
2814 /* Extract one of the components of the complex value CPLX. Extract the
2815 real part if IMAG_P is false, and the imaginary part if it's true. */
2816
2817 static rtx
2818 read_complex_part (rtx cplx, bool imag_p)
2819 {
2820 enum machine_mode cmode, imode;
2821 unsigned ibitsize;
2822
2823 if (GET_CODE (cplx) == CONCAT)
2824 return XEXP (cplx, imag_p);
2825
2826 cmode = GET_MODE (cplx);
2827 imode = GET_MODE_INNER (cmode);
2828 ibitsize = GET_MODE_BITSIZE (imode);
2829
2830 /* Special case reads from complex constants that got spilled to memory. */
2831 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2832 {
2833 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2834 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2835 {
2836 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2837 if (CONSTANT_CLASS_P (part))
2838 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2839 }
2840 }
2841
2842 /* For MEMs simplify_gen_subreg may generate an invalid new address
2843 because, e.g., the original address is considered mode-dependent
2844 by the target, which restricts simplify_subreg from invoking
2845 adjust_address_nv. Instead of preparing fallback support for an
2846 invalid address, we call adjust_address_nv directly. */
2847 if (MEM_P (cplx))
2848 return adjust_address_nv (cplx, imode,
2849 imag_p ? GET_MODE_SIZE (imode) : 0);
2850
2851 /* If the sub-object is at least word sized, then we know that subregging
2852 will work. This special case is important, since extract_bit_field
2853 wants to operate on integer modes, and there's rarely an OImode to
2854 correspond to TCmode. */
2855 if (ibitsize >= BITS_PER_WORD
2856 /* For hard regs we have exact predicates. Assume we can split
2857 the original object if it spans an even number of hard regs.
2858 This special case is important for SCmode on 64-bit platforms
2859 where the natural size of floating-point regs is 32-bit. */
2860 || (REG_P (cplx)
2861 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2862 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2863 {
2864 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2865 imag_p ? GET_MODE_SIZE (imode) : 0);
2866 if (ret)
2867 return ret;
2868 else
2869 /* simplify_gen_subreg may fail for sub-word MEMs. */
2870 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2871 }
2872
2873 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2874 true, false, NULL_RTX, imode, imode);
2875 }
2876 \f
2877 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2878 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2879 represented in NEW_MODE. If FORCE is true, this will never happen, as
2880 we'll force-create a SUBREG if needed. */
2881
2882 static rtx
2883 emit_move_change_mode (enum machine_mode new_mode,
2884 enum machine_mode old_mode, rtx x, bool force)
2885 {
2886 rtx ret;
2887
2888 if (push_operand (x, GET_MODE (x)))
2889 {
2890 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2891 MEM_COPY_ATTRIBUTES (ret, x);
2892 }
2893 else if (MEM_P (x))
2894 {
2895 /* We don't have to worry about changing the address since the
2896 size in bytes is supposed to be the same. */
2897 if (reload_in_progress)
2898 {
2899 /* Copy the MEM to change the mode and move any
2900 substitutions from the old MEM to the new one. */
2901 ret = adjust_address_nv (x, new_mode, 0);
2902 copy_replacements (x, ret);
2903 }
2904 else
2905 ret = adjust_address (x, new_mode, 0);
2906 }
2907 else
2908 {
2909 /* Note that we do want simplify_subreg's behavior of validating
2910 that the new mode is ok for a hard register. If we were to use
2911 simplify_gen_subreg, we would create the subreg, but would
2912 probably run into the target not being able to implement it. */
2913 /* Except, of course, when FORCE is true, when this is exactly what
2914 we want. Which is needed for CCmodes on some targets. */
2915 if (force)
2916 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
2917 else
2918 ret = simplify_subreg (new_mode, x, old_mode, 0);
2919 }
2920
2921 return ret;
2922 }
2923
2924 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
2925 an integer mode of the same size as MODE. Returns the instruction
2926 emitted, or NULL if such a move could not be generated. */
2927
2928 static rtx
2929 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
2930 {
2931 enum machine_mode imode;
2932 enum insn_code code;
2933
2934 /* There must exist a mode of the exact size we require. */
2935 imode = int_mode_for_mode (mode);
2936 if (imode == BLKmode)
2937 return NULL_RTX;
2938
2939 /* The target must support moves in this mode. */
2940 code = optab_handler (mov_optab, imode);
2941 if (code == CODE_FOR_nothing)
2942 return NULL_RTX;
2943
2944 x = emit_move_change_mode (imode, mode, x, force);
2945 if (x == NULL_RTX)
2946 return NULL_RTX;
2947 y = emit_move_change_mode (imode, mode, y, force);
2948 if (y == NULL_RTX)
2949 return NULL_RTX;
2950 return emit_insn (GEN_FCN (code) (x, y));
2951 }
2952
2953 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
2954 Return an equivalent MEM that does not use an auto-increment. */
2955
2956 static rtx
2957 emit_move_resolve_push (enum machine_mode mode, rtx x)
2958 {
2959 enum rtx_code code = GET_CODE (XEXP (x, 0));
2960 HOST_WIDE_INT adjust;
2961 rtx temp;
2962
2963 adjust = GET_MODE_SIZE (mode);
2964 #ifdef PUSH_ROUNDING
2965 adjust = PUSH_ROUNDING (adjust);
2966 #endif
2967 if (code == PRE_DEC || code == POST_DEC)
2968 adjust = -adjust;
2969 else if (code == PRE_MODIFY || code == POST_MODIFY)
2970 {
2971 rtx expr = XEXP (XEXP (x, 0), 1);
2972 HOST_WIDE_INT val;
2973
2974 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
2975 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
2976 val = INTVAL (XEXP (expr, 1));
2977 if (GET_CODE (expr) == MINUS)
2978 val = -val;
2979 gcc_assert (adjust == val || adjust == -val);
2980 adjust = val;
2981 }
2982
2983 /* Do not use anti_adjust_stack, since we don't want to update
2984 stack_pointer_delta. */
2985 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
2986 GEN_INT (adjust), stack_pointer_rtx,
2987 0, OPTAB_LIB_WIDEN);
2988 if (temp != stack_pointer_rtx)
2989 emit_move_insn (stack_pointer_rtx, temp);
2990
2991 switch (code)
2992 {
2993 case PRE_INC:
2994 case PRE_DEC:
2995 case PRE_MODIFY:
2996 temp = stack_pointer_rtx;
2997 break;
2998 case POST_INC:
2999 case POST_DEC:
3000 case POST_MODIFY:
3001 temp = plus_constant (stack_pointer_rtx, -adjust);
3002 break;
3003 default:
3004 gcc_unreachable ();
3005 }
3006
3007 return replace_equiv_address (x, temp);
3008 }
3009
3010 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3011 X is known to satisfy push_operand, and MODE is known to be complex.
3012 Returns the last instruction emitted. */
3013
3014 rtx
3015 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3016 {
3017 enum machine_mode submode = GET_MODE_INNER (mode);
3018 bool imag_first;
3019
3020 #ifdef PUSH_ROUNDING
3021 unsigned int submodesize = GET_MODE_SIZE (submode);
3022
3023 /* In case we output to the stack, but the size is smaller than the
3024 machine can push exactly, we need to use move instructions. */
3025 if (PUSH_ROUNDING (submodesize) != submodesize)
3026 {
3027 x = emit_move_resolve_push (mode, x);
3028 return emit_move_insn (x, y);
3029 }
3030 #endif
3031
3032 /* Note that the real part always precedes the imag part in memory
3033 regardless of machine's endianness. */
3034 switch (GET_CODE (XEXP (x, 0)))
3035 {
3036 case PRE_DEC:
3037 case POST_DEC:
3038 imag_first = true;
3039 break;
3040 case PRE_INC:
3041 case POST_INC:
3042 imag_first = false;
3043 break;
3044 default:
3045 gcc_unreachable ();
3046 }
3047
3048 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3049 read_complex_part (y, imag_first));
3050 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3051 read_complex_part (y, !imag_first));
3052 }
3053
3054 /* A subroutine of emit_move_complex. Perform the move from Y to X
3055 via two moves of the parts. Returns the last instruction emitted. */
3056
3057 rtx
3058 emit_move_complex_parts (rtx x, rtx y)
3059 {
3060 /* Show the output dies here. This is necessary for SUBREGs
3061 of pseudos since we cannot track their lifetimes correctly;
3062 hard regs shouldn't appear here except as return values. */
3063 if (!reload_completed && !reload_in_progress
3064 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3065 emit_clobber (x);
3066
3067 write_complex_part (x, read_complex_part (y, false), false);
3068 write_complex_part (x, read_complex_part (y, true), true);
3069
3070 return get_last_insn ();
3071 }
3072
3073 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3074 MODE is known to be complex. Returns the last instruction emitted. */
3075
3076 static rtx
3077 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3078 {
3079 bool try_int;
3080
3081 /* Need to take special care for pushes, to maintain proper ordering
3082 of the data, and possibly extra padding. */
3083 if (push_operand (x, mode))
3084 return emit_move_complex_push (mode, x, y);
3085
3086 /* See if we can coerce the target into moving both values at once. */
3087
3088 /* Move floating point as parts. */
3089 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3090 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3091 try_int = false;
3092 /* Not possible if the values are inherently not adjacent. */
3093 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3094 try_int = false;
3095 /* Is possible if both are registers (or subregs of registers). */
3096 else if (register_operand (x, mode) && register_operand (y, mode))
3097 try_int = true;
3098 /* If one of the operands is a memory, and alignment constraints
3099 are friendly enough, we may be able to do combined memory operations.
3100 We do not attempt this if Y is a constant because that combination is
3101 usually better with the by-parts thing below. */
3102 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3103 && (!STRICT_ALIGNMENT
3104 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3105 try_int = true;
3106 else
3107 try_int = false;
3108
3109 if (try_int)
3110 {
3111 rtx ret;
3112
3113 /* For memory to memory moves, optimal behavior can be had with the
3114 existing block move logic. */
3115 if (MEM_P (x) && MEM_P (y))
3116 {
3117 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3118 BLOCK_OP_NO_LIBCALL);
3119 return get_last_insn ();
3120 }
3121
3122 ret = emit_move_via_integer (mode, x, y, true);
3123 if (ret)
3124 return ret;
3125 }
3126
3127 return emit_move_complex_parts (x, y);
3128 }
3129
3130 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3131 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3132
3133 static rtx
3134 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3135 {
3136 rtx ret;
3137
3138 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3139 if (mode != CCmode)
3140 {
3141 enum insn_code code = optab_handler (mov_optab, CCmode);
3142 if (code != CODE_FOR_nothing)
3143 {
3144 x = emit_move_change_mode (CCmode, mode, x, true);
3145 y = emit_move_change_mode (CCmode, mode, y, true);
3146 return emit_insn (GEN_FCN (code) (x, y));
3147 }
3148 }
3149
3150 /* Otherwise, find the MODE_INT mode of the same width. */
3151 ret = emit_move_via_integer (mode, x, y, false);
3152 gcc_assert (ret != NULL);
3153 return ret;
3154 }
3155
3156 /* Return true if word I of OP lies entirely in the
3157 undefined bits of a paradoxical subreg. */
3158
3159 static bool
3160 undefined_operand_subword_p (const_rtx op, int i)
3161 {
3162 enum machine_mode innermode, innermostmode;
3163 int offset;
3164 if (GET_CODE (op) != SUBREG)
3165 return false;
3166 innermode = GET_MODE (op);
3167 innermostmode = GET_MODE (SUBREG_REG (op));
3168 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3169 /* The SUBREG_BYTE represents offset, as if the value were stored in
3170 memory, except for a paradoxical subreg where we define
3171 SUBREG_BYTE to be 0; undo this exception as in
3172 simplify_subreg. */
3173 if (SUBREG_BYTE (op) == 0
3174 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3175 {
3176 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3177 if (WORDS_BIG_ENDIAN)
3178 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3179 if (BYTES_BIG_ENDIAN)
3180 offset += difference % UNITS_PER_WORD;
3181 }
3182 if (offset >= GET_MODE_SIZE (innermostmode)
3183 || offset <= -GET_MODE_SIZE (word_mode))
3184 return true;
3185 return false;
3186 }
3187
3188 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3189 MODE is any multi-word or full-word mode that lacks a move_insn
3190 pattern. Note that you will get better code if you define such
3191 patterns, even if they must turn into multiple assembler instructions. */
3192
3193 static rtx
3194 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3195 {
3196 rtx last_insn = 0;
3197 rtx seq, inner;
3198 bool need_clobber;
3199 int i;
3200
3201 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3202
3203 /* If X is a push on the stack, do the push now and replace
3204 X with a reference to the stack pointer. */
3205 if (push_operand (x, mode))
3206 x = emit_move_resolve_push (mode, x);
3207
3208 /* If we are in reload, see if either operand is a MEM whose address
3209 is scheduled for replacement. */
3210 if (reload_in_progress && MEM_P (x)
3211 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3212 x = replace_equiv_address_nv (x, inner);
3213 if (reload_in_progress && MEM_P (y)
3214 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3215 y = replace_equiv_address_nv (y, inner);
3216
3217 start_sequence ();
3218
3219 need_clobber = false;
3220 for (i = 0;
3221 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3222 i++)
3223 {
3224 rtx xpart = operand_subword (x, i, 1, mode);
3225 rtx ypart;
3226
3227 /* Do not generate code for a move if it would come entirely
3228 from the undefined bits of a paradoxical subreg. */
3229 if (undefined_operand_subword_p (y, i))
3230 continue;
3231
3232 ypart = operand_subword (y, i, 1, mode);
3233
3234 /* If we can't get a part of Y, put Y into memory if it is a
3235 constant. Otherwise, force it into a register. Then we must
3236 be able to get a part of Y. */
3237 if (ypart == 0 && CONSTANT_P (y))
3238 {
3239 y = use_anchored_address (force_const_mem (mode, y));
3240 ypart = operand_subword (y, i, 1, mode);
3241 }
3242 else if (ypart == 0)
3243 ypart = operand_subword_force (y, i, mode);
3244
3245 gcc_assert (xpart && ypart);
3246
3247 need_clobber |= (GET_CODE (xpart) == SUBREG);
3248
3249 last_insn = emit_move_insn (xpart, ypart);
3250 }
3251
3252 seq = get_insns ();
3253 end_sequence ();
3254
3255 /* Show the output dies here. This is necessary for SUBREGs
3256 of pseudos since we cannot track their lifetimes correctly;
3257 hard regs shouldn't appear here except as return values.
3258 We never want to emit such a clobber after reload. */
3259 if (x != y
3260 && ! (reload_in_progress || reload_completed)
3261 && need_clobber != 0)
3262 emit_clobber (x);
3263
3264 emit_insn (seq);
3265
3266 return last_insn;
3267 }
3268
3269 /* Low level part of emit_move_insn.
3270 Called just like emit_move_insn, but assumes X and Y
3271 are basically valid. */
3272
3273 rtx
3274 emit_move_insn_1 (rtx x, rtx y)
3275 {
3276 enum machine_mode mode = GET_MODE (x);
3277 enum insn_code code;
3278
3279 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3280
3281 code = optab_handler (mov_optab, mode);
3282 if (code != CODE_FOR_nothing)
3283 return emit_insn (GEN_FCN (code) (x, y));
3284
3285 /* Expand complex moves by moving real part and imag part. */
3286 if (COMPLEX_MODE_P (mode))
3287 return emit_move_complex (mode, x, y);
3288
3289 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3290 || ALL_FIXED_POINT_MODE_P (mode))
3291 {
3292 rtx result = emit_move_via_integer (mode, x, y, true);
3293
3294 /* If we can't find an integer mode, use multi words. */
3295 if (result)
3296 return result;
3297 else
3298 return emit_move_multi_word (mode, x, y);
3299 }
3300
3301 if (GET_MODE_CLASS (mode) == MODE_CC)
3302 return emit_move_ccmode (mode, x, y);
3303
3304 /* Try using a move pattern for the corresponding integer mode. This is
3305 only safe when simplify_subreg can convert MODE constants into integer
3306 constants. At present, it can only do this reliably if the value
3307 fits within a HOST_WIDE_INT. */
3308 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3309 {
3310 rtx ret = emit_move_via_integer (mode, x, y, false);
3311 if (ret)
3312 return ret;
3313 }
3314
3315 return emit_move_multi_word (mode, x, y);
3316 }
3317
3318 /* Generate code to copy Y into X.
3319 Both Y and X must have the same mode, except that
3320 Y can be a constant with VOIDmode.
3321 This mode cannot be BLKmode; use emit_block_move for that.
3322
3323 Return the last instruction emitted. */
3324
3325 rtx
3326 emit_move_insn (rtx x, rtx y)
3327 {
3328 enum machine_mode mode = GET_MODE (x);
3329 rtx y_cst = NULL_RTX;
3330 rtx last_insn, set;
3331
3332 gcc_assert (mode != BLKmode
3333 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3334
3335 if (CONSTANT_P (y))
3336 {
3337 if (optimize
3338 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3339 && (last_insn = compress_float_constant (x, y)))
3340 return last_insn;
3341
3342 y_cst = y;
3343
3344 if (!targetm.legitimate_constant_p (mode, y))
3345 {
3346 y = force_const_mem (mode, y);
3347
3348 /* If the target's cannot_force_const_mem prevented the spill,
3349 assume that the target's move expanders will also take care
3350 of the non-legitimate constant. */
3351 if (!y)
3352 y = y_cst;
3353 else
3354 y = use_anchored_address (y);
3355 }
3356 }
3357
3358 /* If X or Y are memory references, verify that their addresses are valid
3359 for the machine. */
3360 if (MEM_P (x)
3361 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3362 MEM_ADDR_SPACE (x))
3363 && ! push_operand (x, GET_MODE (x))))
3364 x = validize_mem (x);
3365
3366 if (MEM_P (y)
3367 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3368 MEM_ADDR_SPACE (y)))
3369 y = validize_mem (y);
3370
3371 gcc_assert (mode != BLKmode);
3372
3373 last_insn = emit_move_insn_1 (x, y);
3374
3375 if (y_cst && REG_P (x)
3376 && (set = single_set (last_insn)) != NULL_RTX
3377 && SET_DEST (set) == x
3378 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3379 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3380
3381 return last_insn;
3382 }
3383
3384 /* If Y is representable exactly in a narrower mode, and the target can
3385 perform the extension directly from constant or memory, then emit the
3386 move as an extension. */
3387
3388 static rtx
3389 compress_float_constant (rtx x, rtx y)
3390 {
3391 enum machine_mode dstmode = GET_MODE (x);
3392 enum machine_mode orig_srcmode = GET_MODE (y);
3393 enum machine_mode srcmode;
3394 REAL_VALUE_TYPE r;
3395 int oldcost, newcost;
3396 bool speed = optimize_insn_for_speed_p ();
3397
3398 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3399
3400 if (targetm.legitimate_constant_p (dstmode, y))
3401 oldcost = rtx_cost (y, SET, speed);
3402 else
3403 oldcost = rtx_cost (force_const_mem (dstmode, y), SET, speed);
3404
3405 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3406 srcmode != orig_srcmode;
3407 srcmode = GET_MODE_WIDER_MODE (srcmode))
3408 {
3409 enum insn_code ic;
3410 rtx trunc_y, last_insn;
3411
3412 /* Skip if the target can't extend this way. */
3413 ic = can_extend_p (dstmode, srcmode, 0);
3414 if (ic == CODE_FOR_nothing)
3415 continue;
3416
3417 /* Skip if the narrowed value isn't exact. */
3418 if (! exact_real_truncate (srcmode, &r))
3419 continue;
3420
3421 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3422
3423 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3424 {
3425 /* Skip if the target needs extra instructions to perform
3426 the extension. */
3427 if (!insn_operand_matches (ic, 1, trunc_y))
3428 continue;
3429 /* This is valid, but may not be cheaper than the original. */
3430 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3431 if (oldcost < newcost)
3432 continue;
3433 }
3434 else if (float_extend_from_mem[dstmode][srcmode])
3435 {
3436 trunc_y = force_const_mem (srcmode, trunc_y);
3437 /* This is valid, but may not be cheaper than the original. */
3438 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3439 if (oldcost < newcost)
3440 continue;
3441 trunc_y = validize_mem (trunc_y);
3442 }
3443 else
3444 continue;
3445
3446 /* For CSE's benefit, force the compressed constant pool entry
3447 into a new pseudo. This constant may be used in different modes,
3448 and if not, combine will put things back together for us. */
3449 trunc_y = force_reg (srcmode, trunc_y);
3450 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3451 last_insn = get_last_insn ();
3452
3453 if (REG_P (x))
3454 set_unique_reg_note (last_insn, REG_EQUAL, y);
3455
3456 return last_insn;
3457 }
3458
3459 return NULL_RTX;
3460 }
3461 \f
3462 /* Pushing data onto the stack. */
3463
3464 /* Push a block of length SIZE (perhaps variable)
3465 and return an rtx to address the beginning of the block.
3466 The value may be virtual_outgoing_args_rtx.
3467
3468 EXTRA is the number of bytes of padding to push in addition to SIZE.
3469 BELOW nonzero means this padding comes at low addresses;
3470 otherwise, the padding comes at high addresses. */
3471
3472 rtx
3473 push_block (rtx size, int extra, int below)
3474 {
3475 rtx temp;
3476
3477 size = convert_modes (Pmode, ptr_mode, size, 1);
3478 if (CONSTANT_P (size))
3479 anti_adjust_stack (plus_constant (size, extra));
3480 else if (REG_P (size) && extra == 0)
3481 anti_adjust_stack (size);
3482 else
3483 {
3484 temp = copy_to_mode_reg (Pmode, size);
3485 if (extra != 0)
3486 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3487 temp, 0, OPTAB_LIB_WIDEN);
3488 anti_adjust_stack (temp);
3489 }
3490
3491 #ifndef STACK_GROWS_DOWNWARD
3492 if (0)
3493 #else
3494 if (1)
3495 #endif
3496 {
3497 temp = virtual_outgoing_args_rtx;
3498 if (extra != 0 && below)
3499 temp = plus_constant (temp, extra);
3500 }
3501 else
3502 {
3503 if (CONST_INT_P (size))
3504 temp = plus_constant (virtual_outgoing_args_rtx,
3505 -INTVAL (size) - (below ? 0 : extra));
3506 else if (extra != 0 && !below)
3507 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3508 negate_rtx (Pmode, plus_constant (size, extra)));
3509 else
3510 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3511 negate_rtx (Pmode, size));
3512 }
3513
3514 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3515 }
3516
3517 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3518
3519 static rtx
3520 mem_autoinc_base (rtx mem)
3521 {
3522 if (MEM_P (mem))
3523 {
3524 rtx addr = XEXP (mem, 0);
3525 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3526 return XEXP (addr, 0);
3527 }
3528 return NULL;
3529 }
3530
3531 /* A utility routine used here, in reload, and in try_split. The insns
3532 after PREV up to and including LAST are known to adjust the stack,
3533 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3534 placing notes as appropriate. PREV may be NULL, indicating the
3535 entire insn sequence prior to LAST should be scanned.
3536
3537 The set of allowed stack pointer modifications is small:
3538 (1) One or more auto-inc style memory references (aka pushes),
3539 (2) One or more addition/subtraction with the SP as destination,
3540 (3) A single move insn with the SP as destination,
3541 (4) A call_pop insn.
3542
3543 Insns in the sequence that do not modify the SP are ignored.
3544
3545 The return value is the amount of adjustment that can be trivially
3546 verified, via immediate operand or auto-inc. If the adjustment
3547 cannot be trivially extracted, the return value is INT_MIN. */
3548
3549 int
3550 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3551 {
3552 int args_size = end_args_size;
3553 bool saw_unknown = false;
3554 rtx insn;
3555
3556 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3557 {
3558 rtx dest, set, pat;
3559 HOST_WIDE_INT this_delta = 0;
3560 int i;
3561
3562 if (!NONDEBUG_INSN_P (insn))
3563 continue;
3564 pat = PATTERN (insn);
3565 set = NULL;
3566
3567 /* Look for a call_pop pattern. */
3568 if (CALL_P (insn))
3569 {
3570 /* We're not supposed to see non-pop call patterns here. */
3571 gcc_assert (GET_CODE (pat) == PARALLEL);
3572
3573 /* All call_pop have a stack pointer adjust in the parallel.
3574 The call itself is always first, and the stack adjust is
3575 usually last, so search from the end. */
3576 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3577 {
3578 set = XVECEXP (pat, 0, i);
3579 if (GET_CODE (set) != SET)
3580 continue;
3581 dest = SET_DEST (set);
3582 if (dest == stack_pointer_rtx)
3583 break;
3584 }
3585 /* We'd better have found the stack pointer adjust. */
3586 gcc_assert (i > 0);
3587 /* Fall through to process the extracted SET and DEST
3588 as if it was a standalone insn. */
3589 }
3590 else if (GET_CODE (pat) == SET)
3591 set = pat;
3592 else if ((set = single_set (insn)) != NULL)
3593 ;
3594 else if (GET_CODE (pat) == PARALLEL)
3595 {
3596 /* ??? Some older ports use a parallel with a stack adjust
3597 and a store for a PUSH_ROUNDING pattern, rather than a
3598 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3599 /* ??? See h8300 and m68k, pushqi1. */
3600 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3601 {
3602 set = XVECEXP (pat, 0, i);
3603 if (GET_CODE (set) != SET)
3604 continue;
3605 dest = SET_DEST (set);
3606 if (dest == stack_pointer_rtx)
3607 break;
3608
3609 /* We do not expect an auto-inc of the sp in the parallel. */
3610 gcc_checking_assert (mem_autoinc_base (dest)
3611 != stack_pointer_rtx);
3612 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3613 != stack_pointer_rtx);
3614 }
3615 if (i < 0)
3616 continue;
3617 }
3618 else
3619 continue;
3620 dest = SET_DEST (set);
3621
3622 /* Look for direct modifications of the stack pointer. */
3623 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3624 {
3625 gcc_assert (!saw_unknown);
3626 /* Look for a trivial adjustment, otherwise assume nothing. */
3627 /* Note that the SPU restore_stack_block pattern refers to
3628 the stack pointer in V4SImode. Consider that non-trivial. */
3629 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3630 && GET_CODE (SET_SRC (set)) == PLUS
3631 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3632 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3633 this_delta = INTVAL (XEXP (SET_SRC (set), 1));
3634 /* ??? Reload can generate no-op moves, which will be cleaned
3635 up later. Recognize it and continue searching. */
3636 else if (rtx_equal_p (dest, SET_SRC (set)))
3637 this_delta = 0;
3638 else
3639 saw_unknown = true;
3640 }
3641 /* Otherwise only think about autoinc patterns. */
3642 else if (mem_autoinc_base (dest) == stack_pointer_rtx)
3643 {
3644 rtx addr = XEXP (dest, 0);
3645 gcc_assert (!saw_unknown);
3646 switch (GET_CODE (addr))
3647 {
3648 case PRE_INC:
3649 case POST_INC:
3650 this_delta = GET_MODE_SIZE (GET_MODE (dest));
3651 break;
3652 case PRE_DEC:
3653 case POST_DEC:
3654 this_delta = -GET_MODE_SIZE (GET_MODE (dest));
3655 break;
3656 case PRE_MODIFY:
3657 case POST_MODIFY:
3658 addr = XEXP (addr, 1);
3659 gcc_assert (GET_CODE (addr) == PLUS);
3660 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3661 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3662 this_delta = INTVAL (XEXP (addr, 1));
3663 break;
3664 default:
3665 gcc_unreachable ();
3666 }
3667 }
3668 else
3669 continue;
3670
3671 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3672 #ifdef STACK_GROWS_DOWNWARD
3673 this_delta = -this_delta;
3674 #endif
3675 args_size -= this_delta;
3676 }
3677
3678 return saw_unknown ? INT_MIN : args_size;
3679 }
3680
3681 #ifdef PUSH_ROUNDING
3682 /* Emit single push insn. */
3683
3684 static void
3685 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3686 {
3687 rtx dest_addr;
3688 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3689 rtx dest;
3690 enum insn_code icode;
3691
3692 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3693 /* If there is push pattern, use it. Otherwise try old way of throwing
3694 MEM representing push operation to move expander. */
3695 icode = optab_handler (push_optab, mode);
3696 if (icode != CODE_FOR_nothing)
3697 {
3698 struct expand_operand ops[1];
3699
3700 create_input_operand (&ops[0], x, mode);
3701 if (maybe_expand_insn (icode, 1, ops))
3702 return;
3703 }
3704 if (GET_MODE_SIZE (mode) == rounded_size)
3705 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3706 /* If we are to pad downward, adjust the stack pointer first and
3707 then store X into the stack location using an offset. This is
3708 because emit_move_insn does not know how to pad; it does not have
3709 access to type. */
3710 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3711 {
3712 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3713 HOST_WIDE_INT offset;
3714
3715 emit_move_insn (stack_pointer_rtx,
3716 expand_binop (Pmode,
3717 #ifdef STACK_GROWS_DOWNWARD
3718 sub_optab,
3719 #else
3720 add_optab,
3721 #endif
3722 stack_pointer_rtx,
3723 GEN_INT (rounded_size),
3724 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3725
3726 offset = (HOST_WIDE_INT) padding_size;
3727 #ifdef STACK_GROWS_DOWNWARD
3728 if (STACK_PUSH_CODE == POST_DEC)
3729 /* We have already decremented the stack pointer, so get the
3730 previous value. */
3731 offset += (HOST_WIDE_INT) rounded_size;
3732 #else
3733 if (STACK_PUSH_CODE == POST_INC)
3734 /* We have already incremented the stack pointer, so get the
3735 previous value. */
3736 offset -= (HOST_WIDE_INT) rounded_size;
3737 #endif
3738 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3739 }
3740 else
3741 {
3742 #ifdef STACK_GROWS_DOWNWARD
3743 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3744 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3745 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3746 #else
3747 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3748 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3749 GEN_INT (rounded_size));
3750 #endif
3751 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3752 }
3753
3754 dest = gen_rtx_MEM (mode, dest_addr);
3755
3756 if (type != 0)
3757 {
3758 set_mem_attributes (dest, type, 1);
3759
3760 if (flag_optimize_sibling_calls)
3761 /* Function incoming arguments may overlap with sibling call
3762 outgoing arguments and we cannot allow reordering of reads
3763 from function arguments with stores to outgoing arguments
3764 of sibling calls. */
3765 set_mem_alias_set (dest, 0);
3766 }
3767 emit_move_insn (dest, x);
3768 }
3769
3770 /* Emit and annotate a single push insn. */
3771
3772 static void
3773 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3774 {
3775 int delta, old_delta = stack_pointer_delta;
3776 rtx prev = get_last_insn ();
3777 rtx last;
3778
3779 emit_single_push_insn_1 (mode, x, type);
3780
3781 last = get_last_insn ();
3782
3783 /* Notice the common case where we emitted exactly one insn. */
3784 if (PREV_INSN (last) == prev)
3785 {
3786 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3787 return;
3788 }
3789
3790 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3791 gcc_assert (delta == INT_MIN || delta == old_delta);
3792 }
3793 #endif
3794
3795 /* Generate code to push X onto the stack, assuming it has mode MODE and
3796 type TYPE.
3797 MODE is redundant except when X is a CONST_INT (since they don't
3798 carry mode info).
3799 SIZE is an rtx for the size of data to be copied (in bytes),
3800 needed only if X is BLKmode.
3801
3802 ALIGN (in bits) is maximum alignment we can assume.
3803
3804 If PARTIAL and REG are both nonzero, then copy that many of the first
3805 bytes of X into registers starting with REG, and push the rest of X.
3806 The amount of space pushed is decreased by PARTIAL bytes.
3807 REG must be a hard register in this case.
3808 If REG is zero but PARTIAL is not, take any all others actions for an
3809 argument partially in registers, but do not actually load any
3810 registers.
3811
3812 EXTRA is the amount in bytes of extra space to leave next to this arg.
3813 This is ignored if an argument block has already been allocated.
3814
3815 On a machine that lacks real push insns, ARGS_ADDR is the address of
3816 the bottom of the argument block for this call. We use indexing off there
3817 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3818 argument block has not been preallocated.
3819
3820 ARGS_SO_FAR is the size of args previously pushed for this call.
3821
3822 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3823 for arguments passed in registers. If nonzero, it will be the number
3824 of bytes required. */
3825
3826 void
3827 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3828 unsigned int align, int partial, rtx reg, int extra,
3829 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3830 rtx alignment_pad)
3831 {
3832 rtx xinner;
3833 enum direction stack_direction
3834 #ifdef STACK_GROWS_DOWNWARD
3835 = downward;
3836 #else
3837 = upward;
3838 #endif
3839
3840 /* Decide where to pad the argument: `downward' for below,
3841 `upward' for above, or `none' for don't pad it.
3842 Default is below for small data on big-endian machines; else above. */
3843 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3844
3845 /* Invert direction if stack is post-decrement.
3846 FIXME: why? */
3847 if (STACK_PUSH_CODE == POST_DEC)
3848 if (where_pad != none)
3849 where_pad = (where_pad == downward ? upward : downward);
3850
3851 xinner = x;
3852
3853 if (mode == BLKmode
3854 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3855 {
3856 /* Copy a block into the stack, entirely or partially. */
3857
3858 rtx temp;
3859 int used;
3860 int offset;
3861 int skip;
3862
3863 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3864 used = partial - offset;
3865
3866 if (mode != BLKmode)
3867 {
3868 /* A value is to be stored in an insufficiently aligned
3869 stack slot; copy via a suitably aligned slot if
3870 necessary. */
3871 size = GEN_INT (GET_MODE_SIZE (mode));
3872 if (!MEM_P (xinner))
3873 {
3874 temp = assign_temp (type, 0, 1, 1);
3875 emit_move_insn (temp, xinner);
3876 xinner = temp;
3877 }
3878 }
3879
3880 gcc_assert (size);
3881
3882 /* USED is now the # of bytes we need not copy to the stack
3883 because registers will take care of them. */
3884
3885 if (partial != 0)
3886 xinner = adjust_address (xinner, BLKmode, used);
3887
3888 /* If the partial register-part of the arg counts in its stack size,
3889 skip the part of stack space corresponding to the registers.
3890 Otherwise, start copying to the beginning of the stack space,
3891 by setting SKIP to 0. */
3892 skip = (reg_parm_stack_space == 0) ? 0 : used;
3893
3894 #ifdef PUSH_ROUNDING
3895 /* Do it with several push insns if that doesn't take lots of insns
3896 and if there is no difficulty with push insns that skip bytes
3897 on the stack for alignment purposes. */
3898 if (args_addr == 0
3899 && PUSH_ARGS
3900 && CONST_INT_P (size)
3901 && skip == 0
3902 && MEM_ALIGN (xinner) >= align
3903 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
3904 /* Here we avoid the case of a structure whose weak alignment
3905 forces many pushes of a small amount of data,
3906 and such small pushes do rounding that causes trouble. */
3907 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
3908 || align >= BIGGEST_ALIGNMENT
3909 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
3910 == (align / BITS_PER_UNIT)))
3911 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
3912 {
3913 /* Push padding now if padding above and stack grows down,
3914 or if padding below and stack grows up.
3915 But if space already allocated, this has already been done. */
3916 if (extra && args_addr == 0
3917 && where_pad != none && where_pad != stack_direction)
3918 anti_adjust_stack (GEN_INT (extra));
3919
3920 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
3921 }
3922 else
3923 #endif /* PUSH_ROUNDING */
3924 {
3925 rtx target;
3926
3927 /* Otherwise make space on the stack and copy the data
3928 to the address of that space. */
3929
3930 /* Deduct words put into registers from the size we must copy. */
3931 if (partial != 0)
3932 {
3933 if (CONST_INT_P (size))
3934 size = GEN_INT (INTVAL (size) - used);
3935 else
3936 size = expand_binop (GET_MODE (size), sub_optab, size,
3937 GEN_INT (used), NULL_RTX, 0,
3938 OPTAB_LIB_WIDEN);
3939 }
3940
3941 /* Get the address of the stack space.
3942 In this case, we do not deal with EXTRA separately.
3943 A single stack adjust will do. */
3944 if (! args_addr)
3945 {
3946 temp = push_block (size, extra, where_pad == downward);
3947 extra = 0;
3948 }
3949 else if (CONST_INT_P (args_so_far))
3950 temp = memory_address (BLKmode,
3951 plus_constant (args_addr,
3952 skip + INTVAL (args_so_far)));
3953 else
3954 temp = memory_address (BLKmode,
3955 plus_constant (gen_rtx_PLUS (Pmode,
3956 args_addr,
3957 args_so_far),
3958 skip));
3959
3960 if (!ACCUMULATE_OUTGOING_ARGS)
3961 {
3962 /* If the source is referenced relative to the stack pointer,
3963 copy it to another register to stabilize it. We do not need
3964 to do this if we know that we won't be changing sp. */
3965
3966 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
3967 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
3968 temp = copy_to_reg (temp);
3969 }
3970
3971 target = gen_rtx_MEM (BLKmode, temp);
3972
3973 /* We do *not* set_mem_attributes here, because incoming arguments
3974 may overlap with sibling call outgoing arguments and we cannot
3975 allow reordering of reads from function arguments with stores
3976 to outgoing arguments of sibling calls. We do, however, want
3977 to record the alignment of the stack slot. */
3978 /* ALIGN may well be better aligned than TYPE, e.g. due to
3979 PARM_BOUNDARY. Assume the caller isn't lying. */
3980 set_mem_align (target, align);
3981
3982 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
3983 }
3984 }
3985 else if (partial > 0)
3986 {
3987 /* Scalar partly in registers. */
3988
3989 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
3990 int i;
3991 int not_stack;
3992 /* # bytes of start of argument
3993 that we must make space for but need not store. */
3994 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3995 int args_offset = INTVAL (args_so_far);
3996 int skip;
3997
3998 /* Push padding now if padding above and stack grows down,
3999 or if padding below and stack grows up.
4000 But if space already allocated, this has already been done. */
4001 if (extra && args_addr == 0
4002 && where_pad != none && where_pad != stack_direction)
4003 anti_adjust_stack (GEN_INT (extra));
4004
4005 /* If we make space by pushing it, we might as well push
4006 the real data. Otherwise, we can leave OFFSET nonzero
4007 and leave the space uninitialized. */
4008 if (args_addr == 0)
4009 offset = 0;
4010
4011 /* Now NOT_STACK gets the number of words that we don't need to
4012 allocate on the stack. Convert OFFSET to words too. */
4013 not_stack = (partial - offset) / UNITS_PER_WORD;
4014 offset /= UNITS_PER_WORD;
4015
4016 /* If the partial register-part of the arg counts in its stack size,
4017 skip the part of stack space corresponding to the registers.
4018 Otherwise, start copying to the beginning of the stack space,
4019 by setting SKIP to 0. */
4020 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4021
4022 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4023 x = validize_mem (force_const_mem (mode, x));
4024
4025 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4026 SUBREGs of such registers are not allowed. */
4027 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4028 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4029 x = copy_to_reg (x);
4030
4031 /* Loop over all the words allocated on the stack for this arg. */
4032 /* We can do it by words, because any scalar bigger than a word
4033 has a size a multiple of a word. */
4034 #ifndef PUSH_ARGS_REVERSED
4035 for (i = not_stack; i < size; i++)
4036 #else
4037 for (i = size - 1; i >= not_stack; i--)
4038 #endif
4039 if (i >= not_stack + offset)
4040 emit_push_insn (operand_subword_force (x, i, mode),
4041 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4042 0, args_addr,
4043 GEN_INT (args_offset + ((i - not_stack + skip)
4044 * UNITS_PER_WORD)),
4045 reg_parm_stack_space, alignment_pad);
4046 }
4047 else
4048 {
4049 rtx addr;
4050 rtx dest;
4051
4052 /* Push padding now if padding above and stack grows down,
4053 or if padding below and stack grows up.
4054 But if space already allocated, this has already been done. */
4055 if (extra && args_addr == 0
4056 && where_pad != none && where_pad != stack_direction)
4057 anti_adjust_stack (GEN_INT (extra));
4058
4059 #ifdef PUSH_ROUNDING
4060 if (args_addr == 0 && PUSH_ARGS)
4061 emit_single_push_insn (mode, x, type);
4062 else
4063 #endif
4064 {
4065 if (CONST_INT_P (args_so_far))
4066 addr
4067 = memory_address (mode,
4068 plus_constant (args_addr,
4069 INTVAL (args_so_far)));
4070 else
4071 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4072 args_so_far));
4073 dest = gen_rtx_MEM (mode, addr);
4074
4075 /* We do *not* set_mem_attributes here, because incoming arguments
4076 may overlap with sibling call outgoing arguments and we cannot
4077 allow reordering of reads from function arguments with stores
4078 to outgoing arguments of sibling calls. We do, however, want
4079 to record the alignment of the stack slot. */
4080 /* ALIGN may well be better aligned than TYPE, e.g. due to
4081 PARM_BOUNDARY. Assume the caller isn't lying. */
4082 set_mem_align (dest, align);
4083
4084 emit_move_insn (dest, x);
4085 }
4086 }
4087
4088 /* If part should go in registers, copy that part
4089 into the appropriate registers. Do this now, at the end,
4090 since mem-to-mem copies above may do function calls. */
4091 if (partial > 0 && reg != 0)
4092 {
4093 /* Handle calls that pass values in multiple non-contiguous locations.
4094 The Irix 6 ABI has examples of this. */
4095 if (GET_CODE (reg) == PARALLEL)
4096 emit_group_load (reg, x, type, -1);
4097 else
4098 {
4099 gcc_assert (partial % UNITS_PER_WORD == 0);
4100 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4101 }
4102 }
4103
4104 if (extra && args_addr == 0 && where_pad == stack_direction)
4105 anti_adjust_stack (GEN_INT (extra));
4106
4107 if (alignment_pad && args_addr == 0)
4108 anti_adjust_stack (alignment_pad);
4109 }
4110 \f
4111 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4112 operations. */
4113
4114 static rtx
4115 get_subtarget (rtx x)
4116 {
4117 return (optimize
4118 || x == 0
4119 /* Only registers can be subtargets. */
4120 || !REG_P (x)
4121 /* Don't use hard regs to avoid extending their life. */
4122 || REGNO (x) < FIRST_PSEUDO_REGISTER
4123 ? 0 : x);
4124 }
4125
4126 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4127 FIELD is a bitfield. Returns true if the optimization was successful,
4128 and there's nothing else to do. */
4129
4130 static bool
4131 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4132 unsigned HOST_WIDE_INT bitpos,
4133 unsigned HOST_WIDE_INT bitregion_start,
4134 unsigned HOST_WIDE_INT bitregion_end,
4135 enum machine_mode mode1, rtx str_rtx,
4136 tree to, tree src)
4137 {
4138 enum machine_mode str_mode = GET_MODE (str_rtx);
4139 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4140 tree op0, op1;
4141 rtx value, result;
4142 optab binop;
4143 gimple srcstmt;
4144 enum tree_code code;
4145
4146 if (mode1 != VOIDmode
4147 || bitsize >= BITS_PER_WORD
4148 || str_bitsize > BITS_PER_WORD
4149 || TREE_SIDE_EFFECTS (to)
4150 || TREE_THIS_VOLATILE (to))
4151 return false;
4152
4153 STRIP_NOPS (src);
4154 if (TREE_CODE (src) != SSA_NAME)
4155 return false;
4156 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4157 return false;
4158
4159 srcstmt = get_gimple_for_ssa_name (src);
4160 if (!srcstmt
4161 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4162 return false;
4163
4164 code = gimple_assign_rhs_code (srcstmt);
4165
4166 op0 = gimple_assign_rhs1 (srcstmt);
4167
4168 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4169 to find its initialization. Hopefully the initialization will
4170 be from a bitfield load. */
4171 if (TREE_CODE (op0) == SSA_NAME)
4172 {
4173 gimple op0stmt = get_gimple_for_ssa_name (op0);
4174
4175 /* We want to eventually have OP0 be the same as TO, which
4176 should be a bitfield. */
4177 if (!op0stmt
4178 || !is_gimple_assign (op0stmt)
4179 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4180 return false;
4181 op0 = gimple_assign_rhs1 (op0stmt);
4182 }
4183
4184 op1 = gimple_assign_rhs2 (srcstmt);
4185
4186 if (!operand_equal_p (to, op0, 0))
4187 return false;
4188
4189 if (MEM_P (str_rtx))
4190 {
4191 unsigned HOST_WIDE_INT offset1;
4192
4193 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4194 str_mode = word_mode;
4195 str_mode = get_best_mode (bitsize, bitpos,
4196 bitregion_start, bitregion_end,
4197 MEM_ALIGN (str_rtx), str_mode, 0);
4198 if (str_mode == VOIDmode)
4199 return false;
4200 str_bitsize = GET_MODE_BITSIZE (str_mode);
4201
4202 offset1 = bitpos;
4203 bitpos %= str_bitsize;
4204 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4205 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4206 }
4207 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4208 return false;
4209
4210 /* If the bit field covers the whole REG/MEM, store_field
4211 will likely generate better code. */
4212 if (bitsize >= str_bitsize)
4213 return false;
4214
4215 /* We can't handle fields split across multiple entities. */
4216 if (bitpos + bitsize > str_bitsize)
4217 return false;
4218
4219 if (BYTES_BIG_ENDIAN)
4220 bitpos = str_bitsize - bitpos - bitsize;
4221
4222 switch (code)
4223 {
4224 case PLUS_EXPR:
4225 case MINUS_EXPR:
4226 /* For now, just optimize the case of the topmost bitfield
4227 where we don't need to do any masking and also
4228 1 bit bitfields where xor can be used.
4229 We might win by one instruction for the other bitfields
4230 too if insv/extv instructions aren't used, so that
4231 can be added later. */
4232 if (bitpos + bitsize != str_bitsize
4233 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4234 break;
4235
4236 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4237 value = convert_modes (str_mode,
4238 TYPE_MODE (TREE_TYPE (op1)), value,
4239 TYPE_UNSIGNED (TREE_TYPE (op1)));
4240
4241 /* We may be accessing data outside the field, which means
4242 we can alias adjacent data. */
4243 if (MEM_P (str_rtx))
4244 {
4245 str_rtx = shallow_copy_rtx (str_rtx);
4246 set_mem_alias_set (str_rtx, 0);
4247 set_mem_expr (str_rtx, 0);
4248 }
4249
4250 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4251 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4252 {
4253 value = expand_and (str_mode, value, const1_rtx, NULL);
4254 binop = xor_optab;
4255 }
4256 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4257 bitpos, NULL_RTX, 1);
4258 result = expand_binop (str_mode, binop, str_rtx,
4259 value, str_rtx, 1, OPTAB_WIDEN);
4260 if (result != str_rtx)
4261 emit_move_insn (str_rtx, result);
4262 return true;
4263
4264 case BIT_IOR_EXPR:
4265 case BIT_XOR_EXPR:
4266 if (TREE_CODE (op1) != INTEGER_CST)
4267 break;
4268 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4269 value = convert_modes (GET_MODE (str_rtx),
4270 TYPE_MODE (TREE_TYPE (op1)), value,
4271 TYPE_UNSIGNED (TREE_TYPE (op1)));
4272
4273 /* We may be accessing data outside the field, which means
4274 we can alias adjacent data. */
4275 if (MEM_P (str_rtx))
4276 {
4277 str_rtx = shallow_copy_rtx (str_rtx);
4278 set_mem_alias_set (str_rtx, 0);
4279 set_mem_expr (str_rtx, 0);
4280 }
4281
4282 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4283 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4284 {
4285 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4286 - 1);
4287 value = expand_and (GET_MODE (str_rtx), value, mask,
4288 NULL_RTX);
4289 }
4290 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4291 bitpos, NULL_RTX, 1);
4292 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4293 value, str_rtx, 1, OPTAB_WIDEN);
4294 if (result != str_rtx)
4295 emit_move_insn (str_rtx, result);
4296 return true;
4297
4298 default:
4299 break;
4300 }
4301
4302 return false;
4303 }
4304
4305 /* In the C++ memory model, consecutive bit fields in a structure are
4306 considered one memory location.
4307
4308 Given a COMPONENT_REF, this function returns the bit range of
4309 consecutive bits in which this COMPONENT_REF belongs in. The
4310 values are returned in *BITSTART and *BITEND. If either the C++
4311 memory model is not activated, or this memory access is not thread
4312 visible, 0 is returned in *BITSTART and *BITEND.
4313
4314 EXP is the COMPONENT_REF.
4315 INNERDECL is the actual object being referenced.
4316 BITPOS is the position in bits where the bit starts within the structure.
4317 BITSIZE is size in bits of the field being referenced in EXP.
4318
4319 For example, while storing into FOO.A here...
4320
4321 struct {
4322 BIT 0:
4323 unsigned int a : 4;
4324 unsigned int b : 1;
4325 BIT 8:
4326 unsigned char c;
4327 unsigned int d : 6;
4328 } foo;
4329
4330 ...we are not allowed to store past <b>, so for the layout above, a
4331 range of 0..7 (because no one cares if we store into the
4332 padding). */
4333
4334 static void
4335 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4336 unsigned HOST_WIDE_INT *bitend,
4337 tree exp, tree innerdecl,
4338 HOST_WIDE_INT bitpos, HOST_WIDE_INT bitsize)
4339 {
4340 tree field, record_type, fld;
4341 bool found_field = false;
4342 bool prev_field_is_bitfield;
4343
4344 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4345
4346 /* If other threads can't see this value, no need to restrict stores. */
4347 if (ALLOW_STORE_DATA_RACES
4348 || ((TREE_CODE (innerdecl) == MEM_REF
4349 || TREE_CODE (innerdecl) == TARGET_MEM_REF)
4350 && !ptr_deref_may_alias_global_p (TREE_OPERAND (innerdecl, 0)))
4351 || (DECL_P (innerdecl)
4352 && (DECL_THREAD_LOCAL_P (innerdecl)
4353 || !TREE_STATIC (innerdecl))))
4354 {
4355 *bitstart = *bitend = 0;
4356 return;
4357 }
4358
4359 /* Bit field we're storing into. */
4360 field = TREE_OPERAND (exp, 1);
4361 record_type = DECL_FIELD_CONTEXT (field);
4362
4363 /* Count the contiguous bitfields for the memory location that
4364 contains FIELD. */
4365 *bitstart = 0;
4366 prev_field_is_bitfield = true;
4367 for (fld = TYPE_FIELDS (record_type); fld; fld = DECL_CHAIN (fld))
4368 {
4369 tree t, offset;
4370 enum machine_mode mode;
4371 int unsignedp, volatilep;
4372
4373 if (TREE_CODE (fld) != FIELD_DECL)
4374 continue;
4375
4376 t = build3 (COMPONENT_REF, TREE_TYPE (exp),
4377 unshare_expr (TREE_OPERAND (exp, 0)),
4378 fld, NULL_TREE);
4379 get_inner_reference (t, &bitsize, &bitpos, &offset,
4380 &mode, &unsignedp, &volatilep, true);
4381
4382 if (field == fld)
4383 found_field = true;
4384
4385 if (DECL_BIT_FIELD_TYPE (fld) && bitsize > 0)
4386 {
4387 if (prev_field_is_bitfield == false)
4388 {
4389 *bitstart = bitpos;
4390 prev_field_is_bitfield = true;
4391 }
4392 }
4393 else
4394 {
4395 prev_field_is_bitfield = false;
4396 if (found_field)
4397 break;
4398 }
4399 }
4400 gcc_assert (found_field);
4401
4402 if (fld)
4403 {
4404 /* We found the end of the bit field sequence. Include the
4405 padding up to the next field and be done. */
4406 *bitend = bitpos - 1;
4407 }
4408 else
4409 {
4410 /* If this is the last element in the structure, include the padding
4411 at the end of structure. */
4412 *bitend = TREE_INT_CST_LOW (TYPE_SIZE (record_type)) - 1;
4413 }
4414 }
4415
4416 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4417 is true, try generating a nontemporal store. */
4418
4419 void
4420 expand_assignment (tree to, tree from, bool nontemporal)
4421 {
4422 rtx to_rtx = 0;
4423 rtx result;
4424 enum machine_mode mode;
4425 int align;
4426 enum insn_code icode;
4427
4428 /* Don't crash if the lhs of the assignment was erroneous. */
4429 if (TREE_CODE (to) == ERROR_MARK)
4430 {
4431 expand_normal (from);
4432 return;
4433 }
4434
4435 /* Optimize away no-op moves without side-effects. */
4436 if (operand_equal_p (to, from, 0))
4437 return;
4438
4439 mode = TYPE_MODE (TREE_TYPE (to));
4440 if ((TREE_CODE (to) == MEM_REF
4441 || TREE_CODE (to) == TARGET_MEM_REF)
4442 && mode != BLKmode
4443 && ((align = MAX (TYPE_ALIGN (TREE_TYPE (to)),
4444 get_object_alignment (to, BIGGEST_ALIGNMENT)))
4445 < (signed) GET_MODE_ALIGNMENT (mode))
4446 && ((icode = optab_handler (movmisalign_optab, mode))
4447 != CODE_FOR_nothing))
4448 {
4449 struct expand_operand ops[2];
4450 enum machine_mode address_mode;
4451 rtx reg, op0, mem;
4452
4453 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4454 reg = force_not_mem (reg);
4455
4456 if (TREE_CODE (to) == MEM_REF)
4457 {
4458 addr_space_t as
4459 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (to, 1))));
4460 tree base = TREE_OPERAND (to, 0);
4461 address_mode = targetm.addr_space.address_mode (as);
4462 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4463 op0 = convert_memory_address_addr_space (address_mode, op0, as);
4464 if (!integer_zerop (TREE_OPERAND (to, 1)))
4465 {
4466 rtx off
4467 = immed_double_int_const (mem_ref_offset (to), address_mode);
4468 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
4469 }
4470 op0 = memory_address_addr_space (mode, op0, as);
4471 mem = gen_rtx_MEM (mode, op0);
4472 set_mem_attributes (mem, to, 0);
4473 set_mem_addr_space (mem, as);
4474 }
4475 else if (TREE_CODE (to) == TARGET_MEM_REF)
4476 {
4477 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (to));
4478 struct mem_address addr;
4479
4480 get_address_description (to, &addr);
4481 op0 = addr_for_mem_ref (&addr, as, true);
4482 op0 = memory_address_addr_space (mode, op0, as);
4483 mem = gen_rtx_MEM (mode, op0);
4484 set_mem_attributes (mem, to, 0);
4485 set_mem_addr_space (mem, as);
4486 }
4487 else
4488 gcc_unreachable ();
4489 if (TREE_THIS_VOLATILE (to))
4490 MEM_VOLATILE_P (mem) = 1;
4491
4492 create_fixed_operand (&ops[0], mem);
4493 create_input_operand (&ops[1], reg, mode);
4494 /* The movmisalign<mode> pattern cannot fail, else the assignment would
4495 silently be omitted. */
4496 expand_insn (icode, 2, ops);
4497 return;
4498 }
4499
4500 /* Assignment of a structure component needs special treatment
4501 if the structure component's rtx is not simply a MEM.
4502 Assignment of an array element at a constant index, and assignment of
4503 an array element in an unaligned packed structure field, has the same
4504 problem. */
4505 if (handled_component_p (to)
4506 /* ??? We only need to handle MEM_REF here if the access is not
4507 a full access of the base object. */
4508 || (TREE_CODE (to) == MEM_REF
4509 && TREE_CODE (TREE_OPERAND (to, 0)) == ADDR_EXPR)
4510 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4511 {
4512 enum machine_mode mode1;
4513 HOST_WIDE_INT bitsize, bitpos;
4514 unsigned HOST_WIDE_INT bitregion_start = 0;
4515 unsigned HOST_WIDE_INT bitregion_end = 0;
4516 tree offset;
4517 int unsignedp;
4518 int volatilep = 0;
4519 tree tem;
4520
4521 push_temp_slots ();
4522 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4523 &unsignedp, &volatilep, true);
4524
4525 if (TREE_CODE (to) == COMPONENT_REF
4526 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4527 get_bit_range (&bitregion_start, &bitregion_end,
4528 to, tem, bitpos, bitsize);
4529
4530 /* If we are going to use store_bit_field and extract_bit_field,
4531 make sure to_rtx will be safe for multiple use. */
4532
4533 to_rtx = expand_normal (tem);
4534
4535 /* If the bitfield is volatile, we want to access it in the
4536 field's mode, not the computed mode.
4537 If a MEM has VOIDmode (external with incomplete type),
4538 use BLKmode for it instead. */
4539 if (MEM_P (to_rtx))
4540 {
4541 if (volatilep && flag_strict_volatile_bitfields > 0)
4542 to_rtx = adjust_address (to_rtx, mode1, 0);
4543 else if (GET_MODE (to_rtx) == VOIDmode)
4544 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4545 }
4546
4547 if (offset != 0)
4548 {
4549 enum machine_mode address_mode;
4550 rtx offset_rtx;
4551
4552 if (!MEM_P (to_rtx))
4553 {
4554 /* We can get constant negative offsets into arrays with broken
4555 user code. Translate this to a trap instead of ICEing. */
4556 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4557 expand_builtin_trap ();
4558 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4559 }
4560
4561 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4562 address_mode
4563 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4564 if (GET_MODE (offset_rtx) != address_mode)
4565 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4566
4567 /* A constant address in TO_RTX can have VOIDmode, we must not try
4568 to call force_reg for that case. Avoid that case. */
4569 if (MEM_P (to_rtx)
4570 && GET_MODE (to_rtx) == BLKmode
4571 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4572 && bitsize > 0
4573 && (bitpos % bitsize) == 0
4574 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4575 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4576 {
4577 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4578 bitpos = 0;
4579 }
4580
4581 to_rtx = offset_address (to_rtx, offset_rtx,
4582 highest_pow2_factor_for_target (to,
4583 offset));
4584 }
4585
4586 /* No action is needed if the target is not a memory and the field
4587 lies completely outside that target. This can occur if the source
4588 code contains an out-of-bounds access to a small array. */
4589 if (!MEM_P (to_rtx)
4590 && GET_MODE (to_rtx) != BLKmode
4591 && (unsigned HOST_WIDE_INT) bitpos
4592 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4593 {
4594 expand_normal (from);
4595 result = NULL;
4596 }
4597 /* Handle expand_expr of a complex value returning a CONCAT. */
4598 else if (GET_CODE (to_rtx) == CONCAT)
4599 {
4600 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4601 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4602 && bitpos == 0
4603 && bitsize == mode_bitsize)
4604 result = store_expr (from, to_rtx, false, nontemporal);
4605 else if (bitsize == mode_bitsize / 2
4606 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4607 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4608 nontemporal);
4609 else if (bitpos + bitsize <= mode_bitsize / 2)
4610 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4611 bitregion_start, bitregion_end,
4612 mode1, from, TREE_TYPE (tem),
4613 get_alias_set (to), nontemporal);
4614 else if (bitpos >= mode_bitsize / 2)
4615 result = store_field (XEXP (to_rtx, 1), bitsize,
4616 bitpos - mode_bitsize / 2,
4617 bitregion_start, bitregion_end,
4618 mode1, from,
4619 TREE_TYPE (tem), get_alias_set (to),
4620 nontemporal);
4621 else if (bitpos == 0 && bitsize == mode_bitsize)
4622 {
4623 rtx from_rtx;
4624 result = expand_normal (from);
4625 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4626 TYPE_MODE (TREE_TYPE (from)), 0);
4627 emit_move_insn (XEXP (to_rtx, 0),
4628 read_complex_part (from_rtx, false));
4629 emit_move_insn (XEXP (to_rtx, 1),
4630 read_complex_part (from_rtx, true));
4631 }
4632 else
4633 {
4634 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4635 GET_MODE_SIZE (GET_MODE (to_rtx)),
4636 0);
4637 write_complex_part (temp, XEXP (to_rtx, 0), false);
4638 write_complex_part (temp, XEXP (to_rtx, 1), true);
4639 result = store_field (temp, bitsize, bitpos,
4640 bitregion_start, bitregion_end,
4641 mode1, from,
4642 TREE_TYPE (tem), get_alias_set (to),
4643 nontemporal);
4644 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4645 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4646 }
4647 }
4648 else
4649 {
4650 if (MEM_P (to_rtx))
4651 {
4652 /* If the field is at offset zero, we could have been given the
4653 DECL_RTX of the parent struct. Don't munge it. */
4654 to_rtx = shallow_copy_rtx (to_rtx);
4655
4656 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4657
4658 /* Deal with volatile and readonly fields. The former is only
4659 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4660 if (volatilep)
4661 MEM_VOLATILE_P (to_rtx) = 1;
4662 if (component_uses_parent_alias_set (to))
4663 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4664 }
4665
4666 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4667 bitregion_start, bitregion_end,
4668 mode1,
4669 to_rtx, to, from))
4670 result = NULL;
4671 else
4672 result = store_field (to_rtx, bitsize, bitpos,
4673 bitregion_start, bitregion_end,
4674 mode1, from,
4675 TREE_TYPE (tem), get_alias_set (to),
4676 nontemporal);
4677 }
4678
4679 if (result)
4680 preserve_temp_slots (result);
4681 free_temp_slots ();
4682 pop_temp_slots ();
4683 return;
4684 }
4685
4686 /* If the rhs is a function call and its value is not an aggregate,
4687 call the function before we start to compute the lhs.
4688 This is needed for correct code for cases such as
4689 val = setjmp (buf) on machines where reference to val
4690 requires loading up part of an address in a separate insn.
4691
4692 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4693 since it might be a promoted variable where the zero- or sign- extension
4694 needs to be done. Handling this in the normal way is safe because no
4695 computation is done before the call. The same is true for SSA names. */
4696 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4697 && COMPLETE_TYPE_P (TREE_TYPE (from))
4698 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4699 && ! (((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
4700 && REG_P (DECL_RTL (to)))
4701 || TREE_CODE (to) == SSA_NAME))
4702 {
4703 rtx value;
4704
4705 push_temp_slots ();
4706 value = expand_normal (from);
4707 if (to_rtx == 0)
4708 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4709
4710 /* Handle calls that return values in multiple non-contiguous locations.
4711 The Irix 6 ABI has examples of this. */
4712 if (GET_CODE (to_rtx) == PARALLEL)
4713 emit_group_load (to_rtx, value, TREE_TYPE (from),
4714 int_size_in_bytes (TREE_TYPE (from)));
4715 else if (GET_MODE (to_rtx) == BLKmode)
4716 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4717 else
4718 {
4719 if (POINTER_TYPE_P (TREE_TYPE (to)))
4720 value = convert_memory_address_addr_space
4721 (GET_MODE (to_rtx), value,
4722 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4723
4724 emit_move_insn (to_rtx, value);
4725 }
4726 preserve_temp_slots (to_rtx);
4727 free_temp_slots ();
4728 pop_temp_slots ();
4729 return;
4730 }
4731
4732 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
4733 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
4734
4735 if (to_rtx == 0)
4736 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4737
4738 /* Don't move directly into a return register. */
4739 if (TREE_CODE (to) == RESULT_DECL
4740 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4741 {
4742 rtx temp;
4743
4744 push_temp_slots ();
4745 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4746
4747 if (GET_CODE (to_rtx) == PARALLEL)
4748 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4749 int_size_in_bytes (TREE_TYPE (from)));
4750 else
4751 emit_move_insn (to_rtx, temp);
4752
4753 preserve_temp_slots (to_rtx);
4754 free_temp_slots ();
4755 pop_temp_slots ();
4756 return;
4757 }
4758
4759 /* In case we are returning the contents of an object which overlaps
4760 the place the value is being stored, use a safe function when copying
4761 a value through a pointer into a structure value return block. */
4762 if (TREE_CODE (to) == RESULT_DECL
4763 && TREE_CODE (from) == INDIRECT_REF
4764 && ADDR_SPACE_GENERIC_P
4765 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4766 && refs_may_alias_p (to, from)
4767 && cfun->returns_struct
4768 && !cfun->returns_pcc_struct)
4769 {
4770 rtx from_rtx, size;
4771
4772 push_temp_slots ();
4773 size = expr_size (from);
4774 from_rtx = expand_normal (from);
4775
4776 emit_library_call (memmove_libfunc, LCT_NORMAL,
4777 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4778 XEXP (from_rtx, 0), Pmode,
4779 convert_to_mode (TYPE_MODE (sizetype),
4780 size, TYPE_UNSIGNED (sizetype)),
4781 TYPE_MODE (sizetype));
4782
4783 preserve_temp_slots (to_rtx);
4784 free_temp_slots ();
4785 pop_temp_slots ();
4786 return;
4787 }
4788
4789 /* Compute FROM and store the value in the rtx we got. */
4790
4791 push_temp_slots ();
4792 result = store_expr (from, to_rtx, 0, nontemporal);
4793 preserve_temp_slots (result);
4794 free_temp_slots ();
4795 pop_temp_slots ();
4796 return;
4797 }
4798
4799 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4800 succeeded, false otherwise. */
4801
4802 bool
4803 emit_storent_insn (rtx to, rtx from)
4804 {
4805 struct expand_operand ops[2];
4806 enum machine_mode mode = GET_MODE (to);
4807 enum insn_code code = optab_handler (storent_optab, mode);
4808
4809 if (code == CODE_FOR_nothing)
4810 return false;
4811
4812 create_fixed_operand (&ops[0], to);
4813 create_input_operand (&ops[1], from, mode);
4814 return maybe_expand_insn (code, 2, ops);
4815 }
4816
4817 /* Generate code for computing expression EXP,
4818 and storing the value into TARGET.
4819
4820 If the mode is BLKmode then we may return TARGET itself.
4821 It turns out that in BLKmode it doesn't cause a problem.
4822 because C has no operators that could combine two different
4823 assignments into the same BLKmode object with different values
4824 with no sequence point. Will other languages need this to
4825 be more thorough?
4826
4827 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4828 stack, and block moves may need to be treated specially.
4829
4830 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4831
4832 rtx
4833 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4834 {
4835 rtx temp;
4836 rtx alt_rtl = NULL_RTX;
4837 location_t loc = EXPR_LOCATION (exp);
4838
4839 if (VOID_TYPE_P (TREE_TYPE (exp)))
4840 {
4841 /* C++ can generate ?: expressions with a throw expression in one
4842 branch and an rvalue in the other. Here, we resolve attempts to
4843 store the throw expression's nonexistent result. */
4844 gcc_assert (!call_param_p);
4845 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4846 return NULL_RTX;
4847 }
4848 if (TREE_CODE (exp) == COMPOUND_EXPR)
4849 {
4850 /* Perform first part of compound expression, then assign from second
4851 part. */
4852 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4853 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4854 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4855 nontemporal);
4856 }
4857 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4858 {
4859 /* For conditional expression, get safe form of the target. Then
4860 test the condition, doing the appropriate assignment on either
4861 side. This avoids the creation of unnecessary temporaries.
4862 For non-BLKmode, it is more efficient not to do this. */
4863
4864 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
4865
4866 do_pending_stack_adjust ();
4867 NO_DEFER_POP;
4868 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
4869 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4870 nontemporal);
4871 emit_jump_insn (gen_jump (lab2));
4872 emit_barrier ();
4873 emit_label (lab1);
4874 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
4875 nontemporal);
4876 emit_label (lab2);
4877 OK_DEFER_POP;
4878
4879 return NULL_RTX;
4880 }
4881 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
4882 /* If this is a scalar in a register that is stored in a wider mode
4883 than the declared mode, compute the result into its declared mode
4884 and then convert to the wider mode. Our value is the computed
4885 expression. */
4886 {
4887 rtx inner_target = 0;
4888
4889 /* We can do the conversion inside EXP, which will often result
4890 in some optimizations. Do the conversion in two steps: first
4891 change the signedness, if needed, then the extend. But don't
4892 do this if the type of EXP is a subtype of something else
4893 since then the conversion might involve more than just
4894 converting modes. */
4895 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
4896 && TREE_TYPE (TREE_TYPE (exp)) == 0
4897 && GET_MODE_PRECISION (GET_MODE (target))
4898 == TYPE_PRECISION (TREE_TYPE (exp)))
4899 {
4900 if (TYPE_UNSIGNED (TREE_TYPE (exp))
4901 != SUBREG_PROMOTED_UNSIGNED_P (target))
4902 {
4903 /* Some types, e.g. Fortran's logical*4, won't have a signed
4904 version, so use the mode instead. */
4905 tree ntype
4906 = (signed_or_unsigned_type_for
4907 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
4908 if (ntype == NULL)
4909 ntype = lang_hooks.types.type_for_mode
4910 (TYPE_MODE (TREE_TYPE (exp)),
4911 SUBREG_PROMOTED_UNSIGNED_P (target));
4912
4913 exp = fold_convert_loc (loc, ntype, exp);
4914 }
4915
4916 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
4917 (GET_MODE (SUBREG_REG (target)),
4918 SUBREG_PROMOTED_UNSIGNED_P (target)),
4919 exp);
4920
4921 inner_target = SUBREG_REG (target);
4922 }
4923
4924 temp = expand_expr (exp, inner_target, VOIDmode,
4925 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4926
4927 /* If TEMP is a VOIDmode constant, use convert_modes to make
4928 sure that we properly convert it. */
4929 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
4930 {
4931 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4932 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
4933 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
4934 GET_MODE (target), temp,
4935 SUBREG_PROMOTED_UNSIGNED_P (target));
4936 }
4937
4938 convert_move (SUBREG_REG (target), temp,
4939 SUBREG_PROMOTED_UNSIGNED_P (target));
4940
4941 return NULL_RTX;
4942 }
4943 else if ((TREE_CODE (exp) == STRING_CST
4944 || (TREE_CODE (exp) == MEM_REF
4945 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
4946 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
4947 == STRING_CST
4948 && integer_zerop (TREE_OPERAND (exp, 1))))
4949 && !nontemporal && !call_param_p
4950 && MEM_P (target))
4951 {
4952 /* Optimize initialization of an array with a STRING_CST. */
4953 HOST_WIDE_INT exp_len, str_copy_len;
4954 rtx dest_mem;
4955 tree str = TREE_CODE (exp) == STRING_CST
4956 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
4957
4958 exp_len = int_expr_size (exp);
4959 if (exp_len <= 0)
4960 goto normal_expr;
4961
4962 if (TREE_STRING_LENGTH (str) <= 0)
4963 goto normal_expr;
4964
4965 str_copy_len = strlen (TREE_STRING_POINTER (str));
4966 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
4967 goto normal_expr;
4968
4969 str_copy_len = TREE_STRING_LENGTH (str);
4970 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
4971 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
4972 {
4973 str_copy_len += STORE_MAX_PIECES - 1;
4974 str_copy_len &= ~(STORE_MAX_PIECES - 1);
4975 }
4976 str_copy_len = MIN (str_copy_len, exp_len);
4977 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
4978 CONST_CAST (char *, TREE_STRING_POINTER (str)),
4979 MEM_ALIGN (target), false))
4980 goto normal_expr;
4981
4982 dest_mem = target;
4983
4984 dest_mem = store_by_pieces (dest_mem,
4985 str_copy_len, builtin_strncpy_read_str,
4986 CONST_CAST (char *,
4987 TREE_STRING_POINTER (str)),
4988 MEM_ALIGN (target), false,
4989 exp_len > str_copy_len ? 1 : 0);
4990 if (exp_len > str_copy_len)
4991 clear_storage (adjust_address (dest_mem, BLKmode, 0),
4992 GEN_INT (exp_len - str_copy_len),
4993 BLOCK_OP_NORMAL);
4994 return NULL_RTX;
4995 }
4996 else
4997 {
4998 rtx tmp_target;
4999
5000 normal_expr:
5001 /* If we want to use a nontemporal store, force the value to
5002 register first. */
5003 tmp_target = nontemporal ? NULL_RTX : target;
5004 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5005 (call_param_p
5006 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5007 &alt_rtl);
5008 }
5009
5010 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5011 the same as that of TARGET, adjust the constant. This is needed, for
5012 example, in case it is a CONST_DOUBLE and we want only a word-sized
5013 value. */
5014 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5015 && TREE_CODE (exp) != ERROR_MARK
5016 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5017 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5018 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5019
5020 /* If value was not generated in the target, store it there.
5021 Convert the value to TARGET's type first if necessary and emit the
5022 pending incrementations that have been queued when expanding EXP.
5023 Note that we cannot emit the whole queue blindly because this will
5024 effectively disable the POST_INC optimization later.
5025
5026 If TEMP and TARGET compare equal according to rtx_equal_p, but
5027 one or both of them are volatile memory refs, we have to distinguish
5028 two cases:
5029 - expand_expr has used TARGET. In this case, we must not generate
5030 another copy. This can be detected by TARGET being equal according
5031 to == .
5032 - expand_expr has not used TARGET - that means that the source just
5033 happens to have the same RTX form. Since temp will have been created
5034 by expand_expr, it will compare unequal according to == .
5035 We must generate a copy in this case, to reach the correct number
5036 of volatile memory references. */
5037
5038 if ((! rtx_equal_p (temp, target)
5039 || (temp != target && (side_effects_p (temp)
5040 || side_effects_p (target))))
5041 && TREE_CODE (exp) != ERROR_MARK
5042 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5043 but TARGET is not valid memory reference, TEMP will differ
5044 from TARGET although it is really the same location. */
5045 && !(alt_rtl
5046 && rtx_equal_p (alt_rtl, target)
5047 && !side_effects_p (alt_rtl)
5048 && !side_effects_p (target))
5049 /* If there's nothing to copy, don't bother. Don't call
5050 expr_size unless necessary, because some front-ends (C++)
5051 expr_size-hook must not be given objects that are not
5052 supposed to be bit-copied or bit-initialized. */
5053 && expr_size (exp) != const0_rtx)
5054 {
5055 if (GET_MODE (temp) != GET_MODE (target)
5056 && GET_MODE (temp) != VOIDmode)
5057 {
5058 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5059 if (GET_MODE (target) == BLKmode
5060 && GET_MODE (temp) == BLKmode)
5061 emit_block_move (target, temp, expr_size (exp),
5062 (call_param_p
5063 ? BLOCK_OP_CALL_PARM
5064 : BLOCK_OP_NORMAL));
5065 else if (GET_MODE (target) == BLKmode)
5066 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5067 0, 0, 0, GET_MODE (temp), temp);
5068 else
5069 convert_move (target, temp, unsignedp);
5070 }
5071
5072 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5073 {
5074 /* Handle copying a string constant into an array. The string
5075 constant may be shorter than the array. So copy just the string's
5076 actual length, and clear the rest. First get the size of the data
5077 type of the string, which is actually the size of the target. */
5078 rtx size = expr_size (exp);
5079
5080 if (CONST_INT_P (size)
5081 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5082 emit_block_move (target, temp, size,
5083 (call_param_p
5084 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5085 else
5086 {
5087 enum machine_mode pointer_mode
5088 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5089 enum machine_mode address_mode
5090 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
5091
5092 /* Compute the size of the data to copy from the string. */
5093 tree copy_size
5094 = size_binop_loc (loc, MIN_EXPR,
5095 make_tree (sizetype, size),
5096 size_int (TREE_STRING_LENGTH (exp)));
5097 rtx copy_size_rtx
5098 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5099 (call_param_p
5100 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5101 rtx label = 0;
5102
5103 /* Copy that much. */
5104 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5105 TYPE_UNSIGNED (sizetype));
5106 emit_block_move (target, temp, copy_size_rtx,
5107 (call_param_p
5108 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5109
5110 /* Figure out how much is left in TARGET that we have to clear.
5111 Do all calculations in pointer_mode. */
5112 if (CONST_INT_P (copy_size_rtx))
5113 {
5114 size = plus_constant (size, -INTVAL (copy_size_rtx));
5115 target = adjust_address (target, BLKmode,
5116 INTVAL (copy_size_rtx));
5117 }
5118 else
5119 {
5120 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5121 copy_size_rtx, NULL_RTX, 0,
5122 OPTAB_LIB_WIDEN);
5123
5124 if (GET_MODE (copy_size_rtx) != address_mode)
5125 copy_size_rtx = convert_to_mode (address_mode,
5126 copy_size_rtx,
5127 TYPE_UNSIGNED (sizetype));
5128
5129 target = offset_address (target, copy_size_rtx,
5130 highest_pow2_factor (copy_size));
5131 label = gen_label_rtx ();
5132 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5133 GET_MODE (size), 0, label);
5134 }
5135
5136 if (size != const0_rtx)
5137 clear_storage (target, size, BLOCK_OP_NORMAL);
5138
5139 if (label)
5140 emit_label (label);
5141 }
5142 }
5143 /* Handle calls that return values in multiple non-contiguous locations.
5144 The Irix 6 ABI has examples of this. */
5145 else if (GET_CODE (target) == PARALLEL)
5146 emit_group_load (target, temp, TREE_TYPE (exp),
5147 int_size_in_bytes (TREE_TYPE (exp)));
5148 else if (GET_MODE (temp) == BLKmode)
5149 emit_block_move (target, temp, expr_size (exp),
5150 (call_param_p
5151 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5152 else if (nontemporal
5153 && emit_storent_insn (target, temp))
5154 /* If we managed to emit a nontemporal store, there is nothing else to
5155 do. */
5156 ;
5157 else
5158 {
5159 temp = force_operand (temp, target);
5160 if (temp != target)
5161 emit_move_insn (target, temp);
5162 }
5163 }
5164
5165 return NULL_RTX;
5166 }
5167 \f
5168 /* Return true if field F of structure TYPE is a flexible array. */
5169
5170 static bool
5171 flexible_array_member_p (const_tree f, const_tree type)
5172 {
5173 const_tree tf;
5174
5175 tf = TREE_TYPE (f);
5176 return (DECL_CHAIN (f) == NULL
5177 && TREE_CODE (tf) == ARRAY_TYPE
5178 && TYPE_DOMAIN (tf)
5179 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5180 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5181 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5182 && int_size_in_bytes (type) >= 0);
5183 }
5184
5185 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5186 must have in order for it to completely initialize a value of type TYPE.
5187 Return -1 if the number isn't known.
5188
5189 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5190
5191 static HOST_WIDE_INT
5192 count_type_elements (const_tree type, bool for_ctor_p)
5193 {
5194 switch (TREE_CODE (type))
5195 {
5196 case ARRAY_TYPE:
5197 {
5198 tree nelts;
5199
5200 nelts = array_type_nelts (type);
5201 if (nelts && host_integerp (nelts, 1))
5202 {
5203 unsigned HOST_WIDE_INT n;
5204
5205 n = tree_low_cst (nelts, 1) + 1;
5206 if (n == 0 || for_ctor_p)
5207 return n;
5208 else
5209 return n * count_type_elements (TREE_TYPE (type), false);
5210 }
5211 return for_ctor_p ? -1 : 1;
5212 }
5213
5214 case RECORD_TYPE:
5215 {
5216 unsigned HOST_WIDE_INT n;
5217 tree f;
5218
5219 n = 0;
5220 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5221 if (TREE_CODE (f) == FIELD_DECL)
5222 {
5223 if (!for_ctor_p)
5224 n += count_type_elements (TREE_TYPE (f), false);
5225 else if (!flexible_array_member_p (f, type))
5226 /* Don't count flexible arrays, which are not supposed
5227 to be initialized. */
5228 n += 1;
5229 }
5230
5231 return n;
5232 }
5233
5234 case UNION_TYPE:
5235 case QUAL_UNION_TYPE:
5236 {
5237 tree f;
5238 HOST_WIDE_INT n, m;
5239
5240 gcc_assert (!for_ctor_p);
5241 /* Estimate the number of scalars in each field and pick the
5242 maximum. Other estimates would do instead; the idea is simply
5243 to make sure that the estimate is not sensitive to the ordering
5244 of the fields. */
5245 n = 1;
5246 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5247 if (TREE_CODE (f) == FIELD_DECL)
5248 {
5249 m = count_type_elements (TREE_TYPE (f), false);
5250 /* If the field doesn't span the whole union, add an extra
5251 scalar for the rest. */
5252 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5253 TYPE_SIZE (type)) != 1)
5254 m++;
5255 if (n < m)
5256 n = m;
5257 }
5258 return n;
5259 }
5260
5261 case COMPLEX_TYPE:
5262 return 2;
5263
5264 case VECTOR_TYPE:
5265 return TYPE_VECTOR_SUBPARTS (type);
5266
5267 case INTEGER_TYPE:
5268 case REAL_TYPE:
5269 case FIXED_POINT_TYPE:
5270 case ENUMERAL_TYPE:
5271 case BOOLEAN_TYPE:
5272 case POINTER_TYPE:
5273 case OFFSET_TYPE:
5274 case REFERENCE_TYPE:
5275 return 1;
5276
5277 case ERROR_MARK:
5278 return 0;
5279
5280 case VOID_TYPE:
5281 case METHOD_TYPE:
5282 case FUNCTION_TYPE:
5283 case LANG_TYPE:
5284 default:
5285 gcc_unreachable ();
5286 }
5287 }
5288
5289 /* Helper for categorize_ctor_elements. Identical interface. */
5290
5291 static bool
5292 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5293 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5294 {
5295 unsigned HOST_WIDE_INT idx;
5296 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5297 tree value, purpose, elt_type;
5298
5299 /* Whether CTOR is a valid constant initializer, in accordance with what
5300 initializer_constant_valid_p does. If inferred from the constructor
5301 elements, true until proven otherwise. */
5302 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5303 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5304
5305 nz_elts = 0;
5306 init_elts = 0;
5307 num_fields = 0;
5308 elt_type = NULL_TREE;
5309
5310 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5311 {
5312 HOST_WIDE_INT mult = 1;
5313
5314 if (TREE_CODE (purpose) == RANGE_EXPR)
5315 {
5316 tree lo_index = TREE_OPERAND (purpose, 0);
5317 tree hi_index = TREE_OPERAND (purpose, 1);
5318
5319 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5320 mult = (tree_low_cst (hi_index, 1)
5321 - tree_low_cst (lo_index, 1) + 1);
5322 }
5323 num_fields += mult;
5324 elt_type = TREE_TYPE (value);
5325
5326 switch (TREE_CODE (value))
5327 {
5328 case CONSTRUCTOR:
5329 {
5330 HOST_WIDE_INT nz = 0, ic = 0;
5331
5332 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5333 p_complete);
5334
5335 nz_elts += mult * nz;
5336 init_elts += mult * ic;
5337
5338 if (const_from_elts_p && const_p)
5339 const_p = const_elt_p;
5340 }
5341 break;
5342
5343 case INTEGER_CST:
5344 case REAL_CST:
5345 case FIXED_CST:
5346 if (!initializer_zerop (value))
5347 nz_elts += mult;
5348 init_elts += mult;
5349 break;
5350
5351 case STRING_CST:
5352 nz_elts += mult * TREE_STRING_LENGTH (value);
5353 init_elts += mult * TREE_STRING_LENGTH (value);
5354 break;
5355
5356 case COMPLEX_CST:
5357 if (!initializer_zerop (TREE_REALPART (value)))
5358 nz_elts += mult;
5359 if (!initializer_zerop (TREE_IMAGPART (value)))
5360 nz_elts += mult;
5361 init_elts += mult;
5362 break;
5363
5364 case VECTOR_CST:
5365 {
5366 tree v;
5367 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
5368 {
5369 if (!initializer_zerop (TREE_VALUE (v)))
5370 nz_elts += mult;
5371 init_elts += mult;
5372 }
5373 }
5374 break;
5375
5376 default:
5377 {
5378 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5379 nz_elts += mult * tc;
5380 init_elts += mult * tc;
5381
5382 if (const_from_elts_p && const_p)
5383 const_p = initializer_constant_valid_p (value, elt_type)
5384 != NULL_TREE;
5385 }
5386 break;
5387 }
5388 }
5389
5390 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5391 num_fields, elt_type))
5392 *p_complete = false;
5393
5394 *p_nz_elts += nz_elts;
5395 *p_init_elts += init_elts;
5396
5397 return const_p;
5398 }
5399
5400 /* Examine CTOR to discover:
5401 * how many scalar fields are set to nonzero values,
5402 and place it in *P_NZ_ELTS;
5403 * how many scalar fields in total are in CTOR,
5404 and place it in *P_ELT_COUNT.
5405 * whether the constructor is complete -- in the sense that every
5406 meaningful byte is explicitly given a value --
5407 and place it in *P_COMPLETE.
5408
5409 Return whether or not CTOR is a valid static constant initializer, the same
5410 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5411
5412 bool
5413 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5414 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5415 {
5416 *p_nz_elts = 0;
5417 *p_init_elts = 0;
5418 *p_complete = true;
5419
5420 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5421 }
5422
5423 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5424 of which had type LAST_TYPE. Each element was itself a complete
5425 initializer, in the sense that every meaningful byte was explicitly
5426 given a value. Return true if the same is true for the constructor
5427 as a whole. */
5428
5429 bool
5430 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5431 const_tree last_type)
5432 {
5433 if (TREE_CODE (type) == UNION_TYPE
5434 || TREE_CODE (type) == QUAL_UNION_TYPE)
5435 {
5436 if (num_elts == 0)
5437 return false;
5438
5439 gcc_assert (num_elts == 1 && last_type);
5440
5441 /* ??? We could look at each element of the union, and find the
5442 largest element. Which would avoid comparing the size of the
5443 initialized element against any tail padding in the union.
5444 Doesn't seem worth the effort... */
5445 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5446 }
5447
5448 return count_type_elements (type, true) == num_elts;
5449 }
5450
5451 /* Return 1 if EXP contains mostly (3/4) zeros. */
5452
5453 static int
5454 mostly_zeros_p (const_tree exp)
5455 {
5456 if (TREE_CODE (exp) == CONSTRUCTOR)
5457 {
5458 HOST_WIDE_INT nz_elts, init_elts;
5459 bool complete_p;
5460
5461 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5462 return !complete_p || nz_elts < init_elts / 4;
5463 }
5464
5465 return initializer_zerop (exp);
5466 }
5467
5468 /* Return 1 if EXP contains all zeros. */
5469
5470 static int
5471 all_zeros_p (const_tree exp)
5472 {
5473 if (TREE_CODE (exp) == CONSTRUCTOR)
5474 {
5475 HOST_WIDE_INT nz_elts, init_elts;
5476 bool complete_p;
5477
5478 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5479 return nz_elts == 0;
5480 }
5481
5482 return initializer_zerop (exp);
5483 }
5484 \f
5485 /* Helper function for store_constructor.
5486 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5487 TYPE is the type of the CONSTRUCTOR, not the element type.
5488 CLEARED is as for store_constructor.
5489 ALIAS_SET is the alias set to use for any stores.
5490
5491 This provides a recursive shortcut back to store_constructor when it isn't
5492 necessary to go through store_field. This is so that we can pass through
5493 the cleared field to let store_constructor know that we may not have to
5494 clear a substructure if the outer structure has already been cleared. */
5495
5496 static void
5497 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5498 HOST_WIDE_INT bitpos, enum machine_mode mode,
5499 tree exp, tree type, int cleared,
5500 alias_set_type alias_set)
5501 {
5502 if (TREE_CODE (exp) == CONSTRUCTOR
5503 /* We can only call store_constructor recursively if the size and
5504 bit position are on a byte boundary. */
5505 && bitpos % BITS_PER_UNIT == 0
5506 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5507 /* If we have a nonzero bitpos for a register target, then we just
5508 let store_field do the bitfield handling. This is unlikely to
5509 generate unnecessary clear instructions anyways. */
5510 && (bitpos == 0 || MEM_P (target)))
5511 {
5512 if (MEM_P (target))
5513 target
5514 = adjust_address (target,
5515 GET_MODE (target) == BLKmode
5516 || 0 != (bitpos
5517 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5518 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5519
5520
5521 /* Update the alias set, if required. */
5522 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5523 && MEM_ALIAS_SET (target) != 0)
5524 {
5525 target = copy_rtx (target);
5526 set_mem_alias_set (target, alias_set);
5527 }
5528
5529 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5530 }
5531 else
5532 store_field (target, bitsize, bitpos, 0, 0, mode, exp, type, alias_set,
5533 false);
5534 }
5535
5536 /* Store the value of constructor EXP into the rtx TARGET.
5537 TARGET is either a REG or a MEM; we know it cannot conflict, since
5538 safe_from_p has been called.
5539 CLEARED is true if TARGET is known to have been zero'd.
5540 SIZE is the number of bytes of TARGET we are allowed to modify: this
5541 may not be the same as the size of EXP if we are assigning to a field
5542 which has been packed to exclude padding bits. */
5543
5544 static void
5545 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5546 {
5547 tree type = TREE_TYPE (exp);
5548 #ifdef WORD_REGISTER_OPERATIONS
5549 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5550 #endif
5551
5552 switch (TREE_CODE (type))
5553 {
5554 case RECORD_TYPE:
5555 case UNION_TYPE:
5556 case QUAL_UNION_TYPE:
5557 {
5558 unsigned HOST_WIDE_INT idx;
5559 tree field, value;
5560
5561 /* If size is zero or the target is already cleared, do nothing. */
5562 if (size == 0 || cleared)
5563 cleared = 1;
5564 /* We either clear the aggregate or indicate the value is dead. */
5565 else if ((TREE_CODE (type) == UNION_TYPE
5566 || TREE_CODE (type) == QUAL_UNION_TYPE)
5567 && ! CONSTRUCTOR_ELTS (exp))
5568 /* If the constructor is empty, clear the union. */
5569 {
5570 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5571 cleared = 1;
5572 }
5573
5574 /* If we are building a static constructor into a register,
5575 set the initial value as zero so we can fold the value into
5576 a constant. But if more than one register is involved,
5577 this probably loses. */
5578 else if (REG_P (target) && TREE_STATIC (exp)
5579 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5580 {
5581 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5582 cleared = 1;
5583 }
5584
5585 /* If the constructor has fewer fields than the structure or
5586 if we are initializing the structure to mostly zeros, clear
5587 the whole structure first. Don't do this if TARGET is a
5588 register whose mode size isn't equal to SIZE since
5589 clear_storage can't handle this case. */
5590 else if (size > 0
5591 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5592 != fields_length (type))
5593 || mostly_zeros_p (exp))
5594 && (!REG_P (target)
5595 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5596 == size)))
5597 {
5598 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5599 cleared = 1;
5600 }
5601
5602 if (REG_P (target) && !cleared)
5603 emit_clobber (target);
5604
5605 /* Store each element of the constructor into the
5606 corresponding field of TARGET. */
5607 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5608 {
5609 enum machine_mode mode;
5610 HOST_WIDE_INT bitsize;
5611 HOST_WIDE_INT bitpos = 0;
5612 tree offset;
5613 rtx to_rtx = target;
5614
5615 /* Just ignore missing fields. We cleared the whole
5616 structure, above, if any fields are missing. */
5617 if (field == 0)
5618 continue;
5619
5620 if (cleared && initializer_zerop (value))
5621 continue;
5622
5623 if (host_integerp (DECL_SIZE (field), 1))
5624 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5625 else
5626 bitsize = -1;
5627
5628 mode = DECL_MODE (field);
5629 if (DECL_BIT_FIELD (field))
5630 mode = VOIDmode;
5631
5632 offset = DECL_FIELD_OFFSET (field);
5633 if (host_integerp (offset, 0)
5634 && host_integerp (bit_position (field), 0))
5635 {
5636 bitpos = int_bit_position (field);
5637 offset = 0;
5638 }
5639 else
5640 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5641
5642 if (offset)
5643 {
5644 enum machine_mode address_mode;
5645 rtx offset_rtx;
5646
5647 offset
5648 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5649 make_tree (TREE_TYPE (exp),
5650 target));
5651
5652 offset_rtx = expand_normal (offset);
5653 gcc_assert (MEM_P (to_rtx));
5654
5655 address_mode
5656 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5657 if (GET_MODE (offset_rtx) != address_mode)
5658 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5659
5660 to_rtx = offset_address (to_rtx, offset_rtx,
5661 highest_pow2_factor (offset));
5662 }
5663
5664 #ifdef WORD_REGISTER_OPERATIONS
5665 /* If this initializes a field that is smaller than a
5666 word, at the start of a word, try to widen it to a full
5667 word. This special case allows us to output C++ member
5668 function initializations in a form that the optimizers
5669 can understand. */
5670 if (REG_P (target)
5671 && bitsize < BITS_PER_WORD
5672 && bitpos % BITS_PER_WORD == 0
5673 && GET_MODE_CLASS (mode) == MODE_INT
5674 && TREE_CODE (value) == INTEGER_CST
5675 && exp_size >= 0
5676 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5677 {
5678 tree type = TREE_TYPE (value);
5679
5680 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5681 {
5682 type = lang_hooks.types.type_for_size
5683 (BITS_PER_WORD, TYPE_UNSIGNED (type));
5684 value = fold_convert (type, value);
5685 }
5686
5687 if (BYTES_BIG_ENDIAN)
5688 value
5689 = fold_build2 (LSHIFT_EXPR, type, value,
5690 build_int_cst (type,
5691 BITS_PER_WORD - bitsize));
5692 bitsize = BITS_PER_WORD;
5693 mode = word_mode;
5694 }
5695 #endif
5696
5697 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5698 && DECL_NONADDRESSABLE_P (field))
5699 {
5700 to_rtx = copy_rtx (to_rtx);
5701 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5702 }
5703
5704 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5705 value, type, cleared,
5706 get_alias_set (TREE_TYPE (field)));
5707 }
5708 break;
5709 }
5710 case ARRAY_TYPE:
5711 {
5712 tree value, index;
5713 unsigned HOST_WIDE_INT i;
5714 int need_to_clear;
5715 tree domain;
5716 tree elttype = TREE_TYPE (type);
5717 int const_bounds_p;
5718 HOST_WIDE_INT minelt = 0;
5719 HOST_WIDE_INT maxelt = 0;
5720
5721 domain = TYPE_DOMAIN (type);
5722 const_bounds_p = (TYPE_MIN_VALUE (domain)
5723 && TYPE_MAX_VALUE (domain)
5724 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5725 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5726
5727 /* If we have constant bounds for the range of the type, get them. */
5728 if (const_bounds_p)
5729 {
5730 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5731 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5732 }
5733
5734 /* If the constructor has fewer elements than the array, clear
5735 the whole array first. Similarly if this is static
5736 constructor of a non-BLKmode object. */
5737 if (cleared)
5738 need_to_clear = 0;
5739 else if (REG_P (target) && TREE_STATIC (exp))
5740 need_to_clear = 1;
5741 else
5742 {
5743 unsigned HOST_WIDE_INT idx;
5744 tree index, value;
5745 HOST_WIDE_INT count = 0, zero_count = 0;
5746 need_to_clear = ! const_bounds_p;
5747
5748 /* This loop is a more accurate version of the loop in
5749 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5750 is also needed to check for missing elements. */
5751 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5752 {
5753 HOST_WIDE_INT this_node_count;
5754
5755 if (need_to_clear)
5756 break;
5757
5758 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5759 {
5760 tree lo_index = TREE_OPERAND (index, 0);
5761 tree hi_index = TREE_OPERAND (index, 1);
5762
5763 if (! host_integerp (lo_index, 1)
5764 || ! host_integerp (hi_index, 1))
5765 {
5766 need_to_clear = 1;
5767 break;
5768 }
5769
5770 this_node_count = (tree_low_cst (hi_index, 1)
5771 - tree_low_cst (lo_index, 1) + 1);
5772 }
5773 else
5774 this_node_count = 1;
5775
5776 count += this_node_count;
5777 if (mostly_zeros_p (value))
5778 zero_count += this_node_count;
5779 }
5780
5781 /* Clear the entire array first if there are any missing
5782 elements, or if the incidence of zero elements is >=
5783 75%. */
5784 if (! need_to_clear
5785 && (count < maxelt - minelt + 1
5786 || 4 * zero_count >= 3 * count))
5787 need_to_clear = 1;
5788 }
5789
5790 if (need_to_clear && size > 0)
5791 {
5792 if (REG_P (target))
5793 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5794 else
5795 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5796 cleared = 1;
5797 }
5798
5799 if (!cleared && REG_P (target))
5800 /* Inform later passes that the old value is dead. */
5801 emit_clobber (target);
5802
5803 /* Store each element of the constructor into the
5804 corresponding element of TARGET, determined by counting the
5805 elements. */
5806 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5807 {
5808 enum machine_mode mode;
5809 HOST_WIDE_INT bitsize;
5810 HOST_WIDE_INT bitpos;
5811 rtx xtarget = target;
5812
5813 if (cleared && initializer_zerop (value))
5814 continue;
5815
5816 mode = TYPE_MODE (elttype);
5817 if (mode == BLKmode)
5818 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5819 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5820 : -1);
5821 else
5822 bitsize = GET_MODE_BITSIZE (mode);
5823
5824 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5825 {
5826 tree lo_index = TREE_OPERAND (index, 0);
5827 tree hi_index = TREE_OPERAND (index, 1);
5828 rtx index_r, pos_rtx;
5829 HOST_WIDE_INT lo, hi, count;
5830 tree position;
5831
5832 /* If the range is constant and "small", unroll the loop. */
5833 if (const_bounds_p
5834 && host_integerp (lo_index, 0)
5835 && host_integerp (hi_index, 0)
5836 && (lo = tree_low_cst (lo_index, 0),
5837 hi = tree_low_cst (hi_index, 0),
5838 count = hi - lo + 1,
5839 (!MEM_P (target)
5840 || count <= 2
5841 || (host_integerp (TYPE_SIZE (elttype), 1)
5842 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5843 <= 40 * 8)))))
5844 {
5845 lo -= minelt; hi -= minelt;
5846 for (; lo <= hi; lo++)
5847 {
5848 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
5849
5850 if (MEM_P (target)
5851 && !MEM_KEEP_ALIAS_SET_P (target)
5852 && TREE_CODE (type) == ARRAY_TYPE
5853 && TYPE_NONALIASED_COMPONENT (type))
5854 {
5855 target = copy_rtx (target);
5856 MEM_KEEP_ALIAS_SET_P (target) = 1;
5857 }
5858
5859 store_constructor_field
5860 (target, bitsize, bitpos, mode, value, type, cleared,
5861 get_alias_set (elttype));
5862 }
5863 }
5864 else
5865 {
5866 rtx loop_start = gen_label_rtx ();
5867 rtx loop_end = gen_label_rtx ();
5868 tree exit_cond;
5869
5870 expand_normal (hi_index);
5871
5872 index = build_decl (EXPR_LOCATION (exp),
5873 VAR_DECL, NULL_TREE, domain);
5874 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
5875 SET_DECL_RTL (index, index_r);
5876 store_expr (lo_index, index_r, 0, false);
5877
5878 /* Build the head of the loop. */
5879 do_pending_stack_adjust ();
5880 emit_label (loop_start);
5881
5882 /* Assign value to element index. */
5883 position =
5884 fold_convert (ssizetype,
5885 fold_build2 (MINUS_EXPR,
5886 TREE_TYPE (index),
5887 index,
5888 TYPE_MIN_VALUE (domain)));
5889
5890 position =
5891 size_binop (MULT_EXPR, position,
5892 fold_convert (ssizetype,
5893 TYPE_SIZE_UNIT (elttype)));
5894
5895 pos_rtx = expand_normal (position);
5896 xtarget = offset_address (target, pos_rtx,
5897 highest_pow2_factor (position));
5898 xtarget = adjust_address (xtarget, mode, 0);
5899 if (TREE_CODE (value) == CONSTRUCTOR)
5900 store_constructor (value, xtarget, cleared,
5901 bitsize / BITS_PER_UNIT);
5902 else
5903 store_expr (value, xtarget, 0, false);
5904
5905 /* Generate a conditional jump to exit the loop. */
5906 exit_cond = build2 (LT_EXPR, integer_type_node,
5907 index, hi_index);
5908 jumpif (exit_cond, loop_end, -1);
5909
5910 /* Update the loop counter, and jump to the head of
5911 the loop. */
5912 expand_assignment (index,
5913 build2 (PLUS_EXPR, TREE_TYPE (index),
5914 index, integer_one_node),
5915 false);
5916
5917 emit_jump (loop_start);
5918
5919 /* Build the end of the loop. */
5920 emit_label (loop_end);
5921 }
5922 }
5923 else if ((index != 0 && ! host_integerp (index, 0))
5924 || ! host_integerp (TYPE_SIZE (elttype), 1))
5925 {
5926 tree position;
5927
5928 if (index == 0)
5929 index = ssize_int (1);
5930
5931 if (minelt)
5932 index = fold_convert (ssizetype,
5933 fold_build2 (MINUS_EXPR,
5934 TREE_TYPE (index),
5935 index,
5936 TYPE_MIN_VALUE (domain)));
5937
5938 position =
5939 size_binop (MULT_EXPR, index,
5940 fold_convert (ssizetype,
5941 TYPE_SIZE_UNIT (elttype)));
5942 xtarget = offset_address (target,
5943 expand_normal (position),
5944 highest_pow2_factor (position));
5945 xtarget = adjust_address (xtarget, mode, 0);
5946 store_expr (value, xtarget, 0, false);
5947 }
5948 else
5949 {
5950 if (index != 0)
5951 bitpos = ((tree_low_cst (index, 0) - minelt)
5952 * tree_low_cst (TYPE_SIZE (elttype), 1));
5953 else
5954 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
5955
5956 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
5957 && TREE_CODE (type) == ARRAY_TYPE
5958 && TYPE_NONALIASED_COMPONENT (type))
5959 {
5960 target = copy_rtx (target);
5961 MEM_KEEP_ALIAS_SET_P (target) = 1;
5962 }
5963 store_constructor_field (target, bitsize, bitpos, mode, value,
5964 type, cleared, get_alias_set (elttype));
5965 }
5966 }
5967 break;
5968 }
5969
5970 case VECTOR_TYPE:
5971 {
5972 unsigned HOST_WIDE_INT idx;
5973 constructor_elt *ce;
5974 int i;
5975 int need_to_clear;
5976 int icode = 0;
5977 tree elttype = TREE_TYPE (type);
5978 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
5979 enum machine_mode eltmode = TYPE_MODE (elttype);
5980 HOST_WIDE_INT bitsize;
5981 HOST_WIDE_INT bitpos;
5982 rtvec vector = NULL;
5983 unsigned n_elts;
5984 alias_set_type alias;
5985
5986 gcc_assert (eltmode != BLKmode);
5987
5988 n_elts = TYPE_VECTOR_SUBPARTS (type);
5989 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
5990 {
5991 enum machine_mode mode = GET_MODE (target);
5992
5993 icode = (int) optab_handler (vec_init_optab, mode);
5994 if (icode != CODE_FOR_nothing)
5995 {
5996 unsigned int i;
5997
5998 vector = rtvec_alloc (n_elts);
5999 for (i = 0; i < n_elts; i++)
6000 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6001 }
6002 }
6003
6004 /* If the constructor has fewer elements than the vector,
6005 clear the whole array first. Similarly if this is static
6006 constructor of a non-BLKmode object. */
6007 if (cleared)
6008 need_to_clear = 0;
6009 else if (REG_P (target) && TREE_STATIC (exp))
6010 need_to_clear = 1;
6011 else
6012 {
6013 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6014 tree value;
6015
6016 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6017 {
6018 int n_elts_here = tree_low_cst
6019 (int_const_binop (TRUNC_DIV_EXPR,
6020 TYPE_SIZE (TREE_TYPE (value)),
6021 TYPE_SIZE (elttype)), 1);
6022
6023 count += n_elts_here;
6024 if (mostly_zeros_p (value))
6025 zero_count += n_elts_here;
6026 }
6027
6028 /* Clear the entire vector first if there are any missing elements,
6029 or if the incidence of zero elements is >= 75%. */
6030 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6031 }
6032
6033 if (need_to_clear && size > 0 && !vector)
6034 {
6035 if (REG_P (target))
6036 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6037 else
6038 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6039 cleared = 1;
6040 }
6041
6042 /* Inform later passes that the old value is dead. */
6043 if (!cleared && !vector && REG_P (target))
6044 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6045
6046 if (MEM_P (target))
6047 alias = MEM_ALIAS_SET (target);
6048 else
6049 alias = get_alias_set (elttype);
6050
6051 /* Store each element of the constructor into the corresponding
6052 element of TARGET, determined by counting the elements. */
6053 for (idx = 0, i = 0;
6054 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6055 idx++, i += bitsize / elt_size)
6056 {
6057 HOST_WIDE_INT eltpos;
6058 tree value = ce->value;
6059
6060 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6061 if (cleared && initializer_zerop (value))
6062 continue;
6063
6064 if (ce->index)
6065 eltpos = tree_low_cst (ce->index, 1);
6066 else
6067 eltpos = i;
6068
6069 if (vector)
6070 {
6071 /* Vector CONSTRUCTORs should only be built from smaller
6072 vectors in the case of BLKmode vectors. */
6073 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6074 RTVEC_ELT (vector, eltpos)
6075 = expand_normal (value);
6076 }
6077 else
6078 {
6079 enum machine_mode value_mode =
6080 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6081 ? TYPE_MODE (TREE_TYPE (value))
6082 : eltmode;
6083 bitpos = eltpos * elt_size;
6084 store_constructor_field (target, bitsize, bitpos,
6085 value_mode, value, type,
6086 cleared, alias);
6087 }
6088 }
6089
6090 if (vector)
6091 emit_insn (GEN_FCN (icode)
6092 (target,
6093 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6094 break;
6095 }
6096
6097 default:
6098 gcc_unreachable ();
6099 }
6100 }
6101
6102 /* Store the value of EXP (an expression tree)
6103 into a subfield of TARGET which has mode MODE and occupies
6104 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6105 If MODE is VOIDmode, it means that we are storing into a bit-field.
6106
6107 BITREGION_START is bitpos of the first bitfield in this region.
6108 BITREGION_END is the bitpos of the ending bitfield in this region.
6109 These two fields are 0, if the C++ memory model does not apply,
6110 or we are not interested in keeping track of bitfield regions.
6111
6112 Always return const0_rtx unless we have something particular to
6113 return.
6114
6115 TYPE is the type of the underlying object,
6116
6117 ALIAS_SET is the alias set for the destination. This value will
6118 (in general) be different from that for TARGET, since TARGET is a
6119 reference to the containing structure.
6120
6121 If NONTEMPORAL is true, try generating a nontemporal store. */
6122
6123 static rtx
6124 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6125 unsigned HOST_WIDE_INT bitregion_start,
6126 unsigned HOST_WIDE_INT bitregion_end,
6127 enum machine_mode mode, tree exp, tree type,
6128 alias_set_type alias_set, bool nontemporal)
6129 {
6130 if (TREE_CODE (exp) == ERROR_MARK)
6131 return const0_rtx;
6132
6133 /* If we have nothing to store, do nothing unless the expression has
6134 side-effects. */
6135 if (bitsize == 0)
6136 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6137
6138 /* If we are storing into an unaligned field of an aligned union that is
6139 in a register, we may have the mode of TARGET being an integer mode but
6140 MODE == BLKmode. In that case, get an aligned object whose size and
6141 alignment are the same as TARGET and store TARGET into it (we can avoid
6142 the store if the field being stored is the entire width of TARGET). Then
6143 call ourselves recursively to store the field into a BLKmode version of
6144 that object. Finally, load from the object into TARGET. This is not
6145 very efficient in general, but should only be slightly more expensive
6146 than the otherwise-required unaligned accesses. Perhaps this can be
6147 cleaned up later. It's tempting to make OBJECT readonly, but it's set
6148 twice, once with emit_move_insn and once via store_field. */
6149
6150 if (mode == BLKmode
6151 && (REG_P (target) || GET_CODE (target) == SUBREG))
6152 {
6153 rtx object = assign_temp (type, 0, 1, 1);
6154 rtx blk_object = adjust_address (object, BLKmode, 0);
6155
6156 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
6157 emit_move_insn (object, target);
6158
6159 store_field (blk_object, bitsize, bitpos,
6160 bitregion_start, bitregion_end,
6161 mode, exp, type, alias_set, nontemporal);
6162
6163 emit_move_insn (target, object);
6164
6165 /* We want to return the BLKmode version of the data. */
6166 return blk_object;
6167 }
6168
6169 if (GET_CODE (target) == CONCAT)
6170 {
6171 /* We're storing into a struct containing a single __complex. */
6172
6173 gcc_assert (!bitpos);
6174 return store_expr (exp, target, 0, nontemporal);
6175 }
6176
6177 /* If the structure is in a register or if the component
6178 is a bit field, we cannot use addressing to access it.
6179 Use bit-field techniques or SUBREG to store in it. */
6180
6181 if (mode == VOIDmode
6182 || (mode != BLKmode && ! direct_store[(int) mode]
6183 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6184 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6185 || REG_P (target)
6186 || GET_CODE (target) == SUBREG
6187 /* If the field isn't aligned enough to store as an ordinary memref,
6188 store it as a bit field. */
6189 || (mode != BLKmode
6190 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6191 || bitpos % GET_MODE_ALIGNMENT (mode))
6192 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6193 || (bitpos % BITS_PER_UNIT != 0)))
6194 /* If the RHS and field are a constant size and the size of the
6195 RHS isn't the same size as the bitfield, we must use bitfield
6196 operations. */
6197 || (bitsize >= 0
6198 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6199 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6200 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6201 decl we must use bitfield operations. */
6202 || (bitsize >= 0
6203 && TREE_CODE (exp) == MEM_REF
6204 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6205 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6206 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6207 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6208 {
6209 rtx temp;
6210 gimple nop_def;
6211
6212 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6213 implies a mask operation. If the precision is the same size as
6214 the field we're storing into, that mask is redundant. This is
6215 particularly common with bit field assignments generated by the
6216 C front end. */
6217 nop_def = get_def_for_expr (exp, NOP_EXPR);
6218 if (nop_def)
6219 {
6220 tree type = TREE_TYPE (exp);
6221 if (INTEGRAL_TYPE_P (type)
6222 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6223 && bitsize == TYPE_PRECISION (type))
6224 {
6225 tree op = gimple_assign_rhs1 (nop_def);
6226 type = TREE_TYPE (op);
6227 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6228 exp = op;
6229 }
6230 }
6231
6232 temp = expand_normal (exp);
6233
6234 /* If BITSIZE is narrower than the size of the type of EXP
6235 we will be narrowing TEMP. Normally, what's wanted are the
6236 low-order bits. However, if EXP's type is a record and this is
6237 big-endian machine, we want the upper BITSIZE bits. */
6238 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6239 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6240 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6241 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6242 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6243 NULL_RTX, 1);
6244
6245 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
6246 MODE. */
6247 if (mode != VOIDmode && mode != BLKmode
6248 && mode != TYPE_MODE (TREE_TYPE (exp)))
6249 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6250
6251 /* If the modes of TEMP and TARGET are both BLKmode, both
6252 must be in memory and BITPOS must be aligned on a byte
6253 boundary. If so, we simply do a block copy. Likewise
6254 for a BLKmode-like TARGET. */
6255 if (GET_MODE (temp) == BLKmode
6256 && (GET_MODE (target) == BLKmode
6257 || (MEM_P (target)
6258 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6259 && (bitpos % BITS_PER_UNIT) == 0
6260 && (bitsize % BITS_PER_UNIT) == 0)))
6261 {
6262 gcc_assert (MEM_P (target) && MEM_P (temp)
6263 && (bitpos % BITS_PER_UNIT) == 0);
6264
6265 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6266 emit_block_move (target, temp,
6267 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6268 / BITS_PER_UNIT),
6269 BLOCK_OP_NORMAL);
6270
6271 return const0_rtx;
6272 }
6273
6274 /* Store the value in the bitfield. */
6275 store_bit_field (target, bitsize, bitpos,
6276 bitregion_start, bitregion_end,
6277 mode, temp);
6278
6279 return const0_rtx;
6280 }
6281 else
6282 {
6283 /* Now build a reference to just the desired component. */
6284 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6285
6286 if (to_rtx == target)
6287 to_rtx = copy_rtx (to_rtx);
6288
6289 if (!MEM_SCALAR_P (to_rtx))
6290 MEM_IN_STRUCT_P (to_rtx) = 1;
6291 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6292 set_mem_alias_set (to_rtx, alias_set);
6293
6294 return store_expr (exp, to_rtx, 0, nontemporal);
6295 }
6296 }
6297 \f
6298 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6299 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6300 codes and find the ultimate containing object, which we return.
6301
6302 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6303 bit position, and *PUNSIGNEDP to the signedness of the field.
6304 If the position of the field is variable, we store a tree
6305 giving the variable offset (in units) in *POFFSET.
6306 This offset is in addition to the bit position.
6307 If the position is not variable, we store 0 in *POFFSET.
6308
6309 If any of the extraction expressions is volatile,
6310 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6311
6312 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6313 Otherwise, it is a mode that can be used to access the field.
6314
6315 If the field describes a variable-sized object, *PMODE is set to
6316 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6317 this case, but the address of the object can be found.
6318
6319 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6320 look through nodes that serve as markers of a greater alignment than
6321 the one that can be deduced from the expression. These nodes make it
6322 possible for front-ends to prevent temporaries from being created by
6323 the middle-end on alignment considerations. For that purpose, the
6324 normal operating mode at high-level is to always pass FALSE so that
6325 the ultimate containing object is really returned; moreover, the
6326 associated predicate handled_component_p will always return TRUE
6327 on these nodes, thus indicating that they are essentially handled
6328 by get_inner_reference. TRUE should only be passed when the caller
6329 is scanning the expression in order to build another representation
6330 and specifically knows how to handle these nodes; as such, this is
6331 the normal operating mode in the RTL expanders. */
6332
6333 tree
6334 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6335 HOST_WIDE_INT *pbitpos, tree *poffset,
6336 enum machine_mode *pmode, int *punsignedp,
6337 int *pvolatilep, bool keep_aligning)
6338 {
6339 tree size_tree = 0;
6340 enum machine_mode mode = VOIDmode;
6341 bool blkmode_bitfield = false;
6342 tree offset = size_zero_node;
6343 double_int bit_offset = double_int_zero;
6344
6345 /* First get the mode, signedness, and size. We do this from just the
6346 outermost expression. */
6347 *pbitsize = -1;
6348 if (TREE_CODE (exp) == COMPONENT_REF)
6349 {
6350 tree field = TREE_OPERAND (exp, 1);
6351 size_tree = DECL_SIZE (field);
6352 if (!DECL_BIT_FIELD (field))
6353 mode = DECL_MODE (field);
6354 else if (DECL_MODE (field) == BLKmode)
6355 blkmode_bitfield = true;
6356 else if (TREE_THIS_VOLATILE (exp)
6357 && flag_strict_volatile_bitfields > 0)
6358 /* Volatile bitfields should be accessed in the mode of the
6359 field's type, not the mode computed based on the bit
6360 size. */
6361 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6362
6363 *punsignedp = DECL_UNSIGNED (field);
6364 }
6365 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6366 {
6367 size_tree = TREE_OPERAND (exp, 1);
6368 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6369 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6370
6371 /* For vector types, with the correct size of access, use the mode of
6372 inner type. */
6373 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6374 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6375 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6376 mode = TYPE_MODE (TREE_TYPE (exp));
6377 }
6378 else
6379 {
6380 mode = TYPE_MODE (TREE_TYPE (exp));
6381 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6382
6383 if (mode == BLKmode)
6384 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6385 else
6386 *pbitsize = GET_MODE_BITSIZE (mode);
6387 }
6388
6389 if (size_tree != 0)
6390 {
6391 if (! host_integerp (size_tree, 1))
6392 mode = BLKmode, *pbitsize = -1;
6393 else
6394 *pbitsize = tree_low_cst (size_tree, 1);
6395 }
6396
6397 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6398 and find the ultimate containing object. */
6399 while (1)
6400 {
6401 switch (TREE_CODE (exp))
6402 {
6403 case BIT_FIELD_REF:
6404 bit_offset
6405 = double_int_add (bit_offset,
6406 tree_to_double_int (TREE_OPERAND (exp, 2)));
6407 break;
6408
6409 case COMPONENT_REF:
6410 {
6411 tree field = TREE_OPERAND (exp, 1);
6412 tree this_offset = component_ref_field_offset (exp);
6413
6414 /* If this field hasn't been filled in yet, don't go past it.
6415 This should only happen when folding expressions made during
6416 type construction. */
6417 if (this_offset == 0)
6418 break;
6419
6420 offset = size_binop (PLUS_EXPR, offset, this_offset);
6421 bit_offset = double_int_add (bit_offset,
6422 tree_to_double_int
6423 (DECL_FIELD_BIT_OFFSET (field)));
6424
6425 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6426 }
6427 break;
6428
6429 case ARRAY_REF:
6430 case ARRAY_RANGE_REF:
6431 {
6432 tree index = TREE_OPERAND (exp, 1);
6433 tree low_bound = array_ref_low_bound (exp);
6434 tree unit_size = array_ref_element_size (exp);
6435
6436 /* We assume all arrays have sizes that are a multiple of a byte.
6437 First subtract the lower bound, if any, in the type of the
6438 index, then convert to sizetype and multiply by the size of
6439 the array element. */
6440 if (! integer_zerop (low_bound))
6441 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6442 index, low_bound);
6443
6444 offset = size_binop (PLUS_EXPR, offset,
6445 size_binop (MULT_EXPR,
6446 fold_convert (sizetype, index),
6447 unit_size));
6448 }
6449 break;
6450
6451 case REALPART_EXPR:
6452 break;
6453
6454 case IMAGPART_EXPR:
6455 bit_offset = double_int_add (bit_offset,
6456 uhwi_to_double_int (*pbitsize));
6457 break;
6458
6459 case VIEW_CONVERT_EXPR:
6460 if (keep_aligning && STRICT_ALIGNMENT
6461 && (TYPE_ALIGN (TREE_TYPE (exp))
6462 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6463 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6464 < BIGGEST_ALIGNMENT)
6465 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6466 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6467 goto done;
6468 break;
6469
6470 case MEM_REF:
6471 /* Hand back the decl for MEM[&decl, off]. */
6472 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6473 {
6474 tree off = TREE_OPERAND (exp, 1);
6475 if (!integer_zerop (off))
6476 {
6477 double_int boff, coff = mem_ref_offset (exp);
6478 boff = double_int_lshift (coff,
6479 BITS_PER_UNIT == 8
6480 ? 3 : exact_log2 (BITS_PER_UNIT),
6481 HOST_BITS_PER_DOUBLE_INT, true);
6482 bit_offset = double_int_add (bit_offset, boff);
6483 }
6484 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6485 }
6486 goto done;
6487
6488 default:
6489 goto done;
6490 }
6491
6492 /* If any reference in the chain is volatile, the effect is volatile. */
6493 if (TREE_THIS_VOLATILE (exp))
6494 *pvolatilep = 1;
6495
6496 exp = TREE_OPERAND (exp, 0);
6497 }
6498 done:
6499
6500 /* If OFFSET is constant, see if we can return the whole thing as a
6501 constant bit position. Make sure to handle overflow during
6502 this conversion. */
6503 if (host_integerp (offset, 0))
6504 {
6505 double_int tem = double_int_lshift (tree_to_double_int (offset),
6506 BITS_PER_UNIT == 8
6507 ? 3 : exact_log2 (BITS_PER_UNIT),
6508 HOST_BITS_PER_DOUBLE_INT, true);
6509 tem = double_int_add (tem, bit_offset);
6510 if (double_int_fits_in_shwi_p (tem))
6511 {
6512 *pbitpos = double_int_to_shwi (tem);
6513 *poffset = offset = NULL_TREE;
6514 }
6515 }
6516
6517 /* Otherwise, split it up. */
6518 if (offset)
6519 {
6520 *pbitpos = double_int_to_shwi (bit_offset);
6521 *poffset = offset;
6522 }
6523
6524 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6525 if (mode == VOIDmode
6526 && blkmode_bitfield
6527 && (*pbitpos % BITS_PER_UNIT) == 0
6528 && (*pbitsize % BITS_PER_UNIT) == 0)
6529 *pmode = BLKmode;
6530 else
6531 *pmode = mode;
6532
6533 return exp;
6534 }
6535
6536 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6537 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6538 EXP is marked as PACKED. */
6539
6540 bool
6541 contains_packed_reference (const_tree exp)
6542 {
6543 bool packed_p = false;
6544
6545 while (1)
6546 {
6547 switch (TREE_CODE (exp))
6548 {
6549 case COMPONENT_REF:
6550 {
6551 tree field = TREE_OPERAND (exp, 1);
6552 packed_p = DECL_PACKED (field)
6553 || TYPE_PACKED (TREE_TYPE (field))
6554 || TYPE_PACKED (TREE_TYPE (exp));
6555 if (packed_p)
6556 goto done;
6557 }
6558 break;
6559
6560 case BIT_FIELD_REF:
6561 case ARRAY_REF:
6562 case ARRAY_RANGE_REF:
6563 case REALPART_EXPR:
6564 case IMAGPART_EXPR:
6565 case VIEW_CONVERT_EXPR:
6566 break;
6567
6568 default:
6569 goto done;
6570 }
6571 exp = TREE_OPERAND (exp, 0);
6572 }
6573 done:
6574 return packed_p;
6575 }
6576
6577 /* Return a tree of sizetype representing the size, in bytes, of the element
6578 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6579
6580 tree
6581 array_ref_element_size (tree exp)
6582 {
6583 tree aligned_size = TREE_OPERAND (exp, 3);
6584 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6585 location_t loc = EXPR_LOCATION (exp);
6586
6587 /* If a size was specified in the ARRAY_REF, it's the size measured
6588 in alignment units of the element type. So multiply by that value. */
6589 if (aligned_size)
6590 {
6591 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6592 sizetype from another type of the same width and signedness. */
6593 if (TREE_TYPE (aligned_size) != sizetype)
6594 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6595 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6596 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6597 }
6598
6599 /* Otherwise, take the size from that of the element type. Substitute
6600 any PLACEHOLDER_EXPR that we have. */
6601 else
6602 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6603 }
6604
6605 /* Return a tree representing the lower bound of the array mentioned in
6606 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6607
6608 tree
6609 array_ref_low_bound (tree exp)
6610 {
6611 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6612
6613 /* If a lower bound is specified in EXP, use it. */
6614 if (TREE_OPERAND (exp, 2))
6615 return TREE_OPERAND (exp, 2);
6616
6617 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6618 substituting for a PLACEHOLDER_EXPR as needed. */
6619 if (domain_type && TYPE_MIN_VALUE (domain_type))
6620 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6621
6622 /* Otherwise, return a zero of the appropriate type. */
6623 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6624 }
6625
6626 /* Return a tree representing the upper bound of the array mentioned in
6627 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6628
6629 tree
6630 array_ref_up_bound (tree exp)
6631 {
6632 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6633
6634 /* If there is a domain type and it has an upper bound, use it, substituting
6635 for a PLACEHOLDER_EXPR as needed. */
6636 if (domain_type && TYPE_MAX_VALUE (domain_type))
6637 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6638
6639 /* Otherwise fail. */
6640 return NULL_TREE;
6641 }
6642
6643 /* Return a tree representing the offset, in bytes, of the field referenced
6644 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6645
6646 tree
6647 component_ref_field_offset (tree exp)
6648 {
6649 tree aligned_offset = TREE_OPERAND (exp, 2);
6650 tree field = TREE_OPERAND (exp, 1);
6651 location_t loc = EXPR_LOCATION (exp);
6652
6653 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6654 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6655 value. */
6656 if (aligned_offset)
6657 {
6658 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6659 sizetype from another type of the same width and signedness. */
6660 if (TREE_TYPE (aligned_offset) != sizetype)
6661 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6662 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6663 size_int (DECL_OFFSET_ALIGN (field)
6664 / BITS_PER_UNIT));
6665 }
6666
6667 /* Otherwise, take the offset from that of the field. Substitute
6668 any PLACEHOLDER_EXPR that we have. */
6669 else
6670 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6671 }
6672
6673 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6674
6675 static unsigned HOST_WIDE_INT
6676 target_align (const_tree target)
6677 {
6678 /* We might have a chain of nested references with intermediate misaligning
6679 bitfields components, so need to recurse to find out. */
6680
6681 unsigned HOST_WIDE_INT this_align, outer_align;
6682
6683 switch (TREE_CODE (target))
6684 {
6685 case BIT_FIELD_REF:
6686 return 1;
6687
6688 case COMPONENT_REF:
6689 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6690 outer_align = target_align (TREE_OPERAND (target, 0));
6691 return MIN (this_align, outer_align);
6692
6693 case ARRAY_REF:
6694 case ARRAY_RANGE_REF:
6695 this_align = TYPE_ALIGN (TREE_TYPE (target));
6696 outer_align = target_align (TREE_OPERAND (target, 0));
6697 return MIN (this_align, outer_align);
6698
6699 CASE_CONVERT:
6700 case NON_LVALUE_EXPR:
6701 case VIEW_CONVERT_EXPR:
6702 this_align = TYPE_ALIGN (TREE_TYPE (target));
6703 outer_align = target_align (TREE_OPERAND (target, 0));
6704 return MAX (this_align, outer_align);
6705
6706 default:
6707 return TYPE_ALIGN (TREE_TYPE (target));
6708 }
6709 }
6710
6711 \f
6712 /* Given an rtx VALUE that may contain additions and multiplications, return
6713 an equivalent value that just refers to a register, memory, or constant.
6714 This is done by generating instructions to perform the arithmetic and
6715 returning a pseudo-register containing the value.
6716
6717 The returned value may be a REG, SUBREG, MEM or constant. */
6718
6719 rtx
6720 force_operand (rtx value, rtx target)
6721 {
6722 rtx op1, op2;
6723 /* Use subtarget as the target for operand 0 of a binary operation. */
6724 rtx subtarget = get_subtarget (target);
6725 enum rtx_code code = GET_CODE (value);
6726
6727 /* Check for subreg applied to an expression produced by loop optimizer. */
6728 if (code == SUBREG
6729 && !REG_P (SUBREG_REG (value))
6730 && !MEM_P (SUBREG_REG (value)))
6731 {
6732 value
6733 = simplify_gen_subreg (GET_MODE (value),
6734 force_reg (GET_MODE (SUBREG_REG (value)),
6735 force_operand (SUBREG_REG (value),
6736 NULL_RTX)),
6737 GET_MODE (SUBREG_REG (value)),
6738 SUBREG_BYTE (value));
6739 code = GET_CODE (value);
6740 }
6741
6742 /* Check for a PIC address load. */
6743 if ((code == PLUS || code == MINUS)
6744 && XEXP (value, 0) == pic_offset_table_rtx
6745 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6746 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6747 || GET_CODE (XEXP (value, 1)) == CONST))
6748 {
6749 if (!subtarget)
6750 subtarget = gen_reg_rtx (GET_MODE (value));
6751 emit_move_insn (subtarget, value);
6752 return subtarget;
6753 }
6754
6755 if (ARITHMETIC_P (value))
6756 {
6757 op2 = XEXP (value, 1);
6758 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6759 subtarget = 0;
6760 if (code == MINUS && CONST_INT_P (op2))
6761 {
6762 code = PLUS;
6763 op2 = negate_rtx (GET_MODE (value), op2);
6764 }
6765
6766 /* Check for an addition with OP2 a constant integer and our first
6767 operand a PLUS of a virtual register and something else. In that
6768 case, we want to emit the sum of the virtual register and the
6769 constant first and then add the other value. This allows virtual
6770 register instantiation to simply modify the constant rather than
6771 creating another one around this addition. */
6772 if (code == PLUS && CONST_INT_P (op2)
6773 && GET_CODE (XEXP (value, 0)) == PLUS
6774 && REG_P (XEXP (XEXP (value, 0), 0))
6775 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6776 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6777 {
6778 rtx temp = expand_simple_binop (GET_MODE (value), code,
6779 XEXP (XEXP (value, 0), 0), op2,
6780 subtarget, 0, OPTAB_LIB_WIDEN);
6781 return expand_simple_binop (GET_MODE (value), code, temp,
6782 force_operand (XEXP (XEXP (value,
6783 0), 1), 0),
6784 target, 0, OPTAB_LIB_WIDEN);
6785 }
6786
6787 op1 = force_operand (XEXP (value, 0), subtarget);
6788 op2 = force_operand (op2, NULL_RTX);
6789 switch (code)
6790 {
6791 case MULT:
6792 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6793 case DIV:
6794 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6795 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6796 target, 1, OPTAB_LIB_WIDEN);
6797 else
6798 return expand_divmod (0,
6799 FLOAT_MODE_P (GET_MODE (value))
6800 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6801 GET_MODE (value), op1, op2, target, 0);
6802 case MOD:
6803 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6804 target, 0);
6805 case UDIV:
6806 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6807 target, 1);
6808 case UMOD:
6809 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6810 target, 1);
6811 case ASHIFTRT:
6812 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6813 target, 0, OPTAB_LIB_WIDEN);
6814 default:
6815 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6816 target, 1, OPTAB_LIB_WIDEN);
6817 }
6818 }
6819 if (UNARY_P (value))
6820 {
6821 if (!target)
6822 target = gen_reg_rtx (GET_MODE (value));
6823 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6824 switch (code)
6825 {
6826 case ZERO_EXTEND:
6827 case SIGN_EXTEND:
6828 case TRUNCATE:
6829 case FLOAT_EXTEND:
6830 case FLOAT_TRUNCATE:
6831 convert_move (target, op1, code == ZERO_EXTEND);
6832 return target;
6833
6834 case FIX:
6835 case UNSIGNED_FIX:
6836 expand_fix (target, op1, code == UNSIGNED_FIX);
6837 return target;
6838
6839 case FLOAT:
6840 case UNSIGNED_FLOAT:
6841 expand_float (target, op1, code == UNSIGNED_FLOAT);
6842 return target;
6843
6844 default:
6845 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
6846 }
6847 }
6848
6849 #ifdef INSN_SCHEDULING
6850 /* On machines that have insn scheduling, we want all memory reference to be
6851 explicit, so we need to deal with such paradoxical SUBREGs. */
6852 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
6853 value
6854 = simplify_gen_subreg (GET_MODE (value),
6855 force_reg (GET_MODE (SUBREG_REG (value)),
6856 force_operand (SUBREG_REG (value),
6857 NULL_RTX)),
6858 GET_MODE (SUBREG_REG (value)),
6859 SUBREG_BYTE (value));
6860 #endif
6861
6862 return value;
6863 }
6864 \f
6865 /* Subroutine of expand_expr: return nonzero iff there is no way that
6866 EXP can reference X, which is being modified. TOP_P is nonzero if this
6867 call is going to be used to determine whether we need a temporary
6868 for EXP, as opposed to a recursive call to this function.
6869
6870 It is always safe for this routine to return zero since it merely
6871 searches for optimization opportunities. */
6872
6873 int
6874 safe_from_p (const_rtx x, tree exp, int top_p)
6875 {
6876 rtx exp_rtl = 0;
6877 int i, nops;
6878
6879 if (x == 0
6880 /* If EXP has varying size, we MUST use a target since we currently
6881 have no way of allocating temporaries of variable size
6882 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
6883 So we assume here that something at a higher level has prevented a
6884 clash. This is somewhat bogus, but the best we can do. Only
6885 do this when X is BLKmode and when we are at the top level. */
6886 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
6887 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
6888 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
6889 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
6890 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
6891 != INTEGER_CST)
6892 && GET_MODE (x) == BLKmode)
6893 /* If X is in the outgoing argument area, it is always safe. */
6894 || (MEM_P (x)
6895 && (XEXP (x, 0) == virtual_outgoing_args_rtx
6896 || (GET_CODE (XEXP (x, 0)) == PLUS
6897 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
6898 return 1;
6899
6900 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
6901 find the underlying pseudo. */
6902 if (GET_CODE (x) == SUBREG)
6903 {
6904 x = SUBREG_REG (x);
6905 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6906 return 0;
6907 }
6908
6909 /* Now look at our tree code and possibly recurse. */
6910 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
6911 {
6912 case tcc_declaration:
6913 exp_rtl = DECL_RTL_IF_SET (exp);
6914 break;
6915
6916 case tcc_constant:
6917 return 1;
6918
6919 case tcc_exceptional:
6920 if (TREE_CODE (exp) == TREE_LIST)
6921 {
6922 while (1)
6923 {
6924 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
6925 return 0;
6926 exp = TREE_CHAIN (exp);
6927 if (!exp)
6928 return 1;
6929 if (TREE_CODE (exp) != TREE_LIST)
6930 return safe_from_p (x, exp, 0);
6931 }
6932 }
6933 else if (TREE_CODE (exp) == CONSTRUCTOR)
6934 {
6935 constructor_elt *ce;
6936 unsigned HOST_WIDE_INT idx;
6937
6938 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
6939 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
6940 || !safe_from_p (x, ce->value, 0))
6941 return 0;
6942 return 1;
6943 }
6944 else if (TREE_CODE (exp) == ERROR_MARK)
6945 return 1; /* An already-visited SAVE_EXPR? */
6946 else
6947 return 0;
6948
6949 case tcc_statement:
6950 /* The only case we look at here is the DECL_INITIAL inside a
6951 DECL_EXPR. */
6952 return (TREE_CODE (exp) != DECL_EXPR
6953 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
6954 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
6955 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
6956
6957 case tcc_binary:
6958 case tcc_comparison:
6959 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
6960 return 0;
6961 /* Fall through. */
6962
6963 case tcc_unary:
6964 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6965
6966 case tcc_expression:
6967 case tcc_reference:
6968 case tcc_vl_exp:
6969 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
6970 the expression. If it is set, we conflict iff we are that rtx or
6971 both are in memory. Otherwise, we check all operands of the
6972 expression recursively. */
6973
6974 switch (TREE_CODE (exp))
6975 {
6976 case ADDR_EXPR:
6977 /* If the operand is static or we are static, we can't conflict.
6978 Likewise if we don't conflict with the operand at all. */
6979 if (staticp (TREE_OPERAND (exp, 0))
6980 || TREE_STATIC (exp)
6981 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
6982 return 1;
6983
6984 /* Otherwise, the only way this can conflict is if we are taking
6985 the address of a DECL a that address if part of X, which is
6986 very rare. */
6987 exp = TREE_OPERAND (exp, 0);
6988 if (DECL_P (exp))
6989 {
6990 if (!DECL_RTL_SET_P (exp)
6991 || !MEM_P (DECL_RTL (exp)))
6992 return 0;
6993 else
6994 exp_rtl = XEXP (DECL_RTL (exp), 0);
6995 }
6996 break;
6997
6998 case MEM_REF:
6999 if (MEM_P (x)
7000 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7001 get_alias_set (exp)))
7002 return 0;
7003 break;
7004
7005 case CALL_EXPR:
7006 /* Assume that the call will clobber all hard registers and
7007 all of memory. */
7008 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7009 || MEM_P (x))
7010 return 0;
7011 break;
7012
7013 case WITH_CLEANUP_EXPR:
7014 case CLEANUP_POINT_EXPR:
7015 /* Lowered by gimplify.c. */
7016 gcc_unreachable ();
7017
7018 case SAVE_EXPR:
7019 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7020
7021 default:
7022 break;
7023 }
7024
7025 /* If we have an rtx, we do not need to scan our operands. */
7026 if (exp_rtl)
7027 break;
7028
7029 nops = TREE_OPERAND_LENGTH (exp);
7030 for (i = 0; i < nops; i++)
7031 if (TREE_OPERAND (exp, i) != 0
7032 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7033 return 0;
7034
7035 break;
7036
7037 case tcc_type:
7038 /* Should never get a type here. */
7039 gcc_unreachable ();
7040 }
7041
7042 /* If we have an rtl, find any enclosed object. Then see if we conflict
7043 with it. */
7044 if (exp_rtl)
7045 {
7046 if (GET_CODE (exp_rtl) == SUBREG)
7047 {
7048 exp_rtl = SUBREG_REG (exp_rtl);
7049 if (REG_P (exp_rtl)
7050 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7051 return 0;
7052 }
7053
7054 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7055 are memory and they conflict. */
7056 return ! (rtx_equal_p (x, exp_rtl)
7057 || (MEM_P (x) && MEM_P (exp_rtl)
7058 && true_dependence (exp_rtl, VOIDmode, x,
7059 rtx_addr_varies_p)));
7060 }
7061
7062 /* If we reach here, it is safe. */
7063 return 1;
7064 }
7065
7066 \f
7067 /* Return the highest power of two that EXP is known to be a multiple of.
7068 This is used in updating alignment of MEMs in array references. */
7069
7070 unsigned HOST_WIDE_INT
7071 highest_pow2_factor (const_tree exp)
7072 {
7073 unsigned HOST_WIDE_INT c0, c1;
7074
7075 switch (TREE_CODE (exp))
7076 {
7077 case INTEGER_CST:
7078 /* We can find the lowest bit that's a one. If the low
7079 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7080 We need to handle this case since we can find it in a COND_EXPR,
7081 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7082 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7083 later ICE. */
7084 if (TREE_OVERFLOW (exp))
7085 return BIGGEST_ALIGNMENT;
7086 else
7087 {
7088 /* Note: tree_low_cst is intentionally not used here,
7089 we don't care about the upper bits. */
7090 c0 = TREE_INT_CST_LOW (exp);
7091 c0 &= -c0;
7092 return c0 ? c0 : BIGGEST_ALIGNMENT;
7093 }
7094 break;
7095
7096 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7097 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7098 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7099 return MIN (c0, c1);
7100
7101 case MULT_EXPR:
7102 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7103 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7104 return c0 * c1;
7105
7106 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7107 case CEIL_DIV_EXPR:
7108 if (integer_pow2p (TREE_OPERAND (exp, 1))
7109 && host_integerp (TREE_OPERAND (exp, 1), 1))
7110 {
7111 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7112 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7113 return MAX (1, c0 / c1);
7114 }
7115 break;
7116
7117 case BIT_AND_EXPR:
7118 /* The highest power of two of a bit-and expression is the maximum of
7119 that of its operands. We typically get here for a complex LHS and
7120 a constant negative power of two on the RHS to force an explicit
7121 alignment, so don't bother looking at the LHS. */
7122 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7123
7124 CASE_CONVERT:
7125 case SAVE_EXPR:
7126 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7127
7128 case COMPOUND_EXPR:
7129 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7130
7131 case COND_EXPR:
7132 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7133 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7134 return MIN (c0, c1);
7135
7136 default:
7137 break;
7138 }
7139
7140 return 1;
7141 }
7142
7143 /* Similar, except that the alignment requirements of TARGET are
7144 taken into account. Assume it is at least as aligned as its
7145 type, unless it is a COMPONENT_REF in which case the layout of
7146 the structure gives the alignment. */
7147
7148 static unsigned HOST_WIDE_INT
7149 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7150 {
7151 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7152 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7153
7154 return MAX (factor, talign);
7155 }
7156 \f
7157 /* Subroutine of expand_expr. Expand the two operands of a binary
7158 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7159 The value may be stored in TARGET if TARGET is nonzero. The
7160 MODIFIER argument is as documented by expand_expr. */
7161
7162 static void
7163 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7164 enum expand_modifier modifier)
7165 {
7166 if (! safe_from_p (target, exp1, 1))
7167 target = 0;
7168 if (operand_equal_p (exp0, exp1, 0))
7169 {
7170 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7171 *op1 = copy_rtx (*op0);
7172 }
7173 else
7174 {
7175 /* If we need to preserve evaluation order, copy exp0 into its own
7176 temporary variable so that it can't be clobbered by exp1. */
7177 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7178 exp0 = save_expr (exp0);
7179 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7180 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7181 }
7182 }
7183
7184 \f
7185 /* Return a MEM that contains constant EXP. DEFER is as for
7186 output_constant_def and MODIFIER is as for expand_expr. */
7187
7188 static rtx
7189 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7190 {
7191 rtx mem;
7192
7193 mem = output_constant_def (exp, defer);
7194 if (modifier != EXPAND_INITIALIZER)
7195 mem = use_anchored_address (mem);
7196 return mem;
7197 }
7198
7199 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7200 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7201
7202 static rtx
7203 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7204 enum expand_modifier modifier, addr_space_t as)
7205 {
7206 rtx result, subtarget;
7207 tree inner, offset;
7208 HOST_WIDE_INT bitsize, bitpos;
7209 int volatilep, unsignedp;
7210 enum machine_mode mode1;
7211
7212 /* If we are taking the address of a constant and are at the top level,
7213 we have to use output_constant_def since we can't call force_const_mem
7214 at top level. */
7215 /* ??? This should be considered a front-end bug. We should not be
7216 generating ADDR_EXPR of something that isn't an LVALUE. The only
7217 exception here is STRING_CST. */
7218 if (CONSTANT_CLASS_P (exp))
7219 return XEXP (expand_expr_constant (exp, 0, modifier), 0);
7220
7221 /* Everything must be something allowed by is_gimple_addressable. */
7222 switch (TREE_CODE (exp))
7223 {
7224 case INDIRECT_REF:
7225 /* This case will happen via recursion for &a->b. */
7226 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7227
7228 case MEM_REF:
7229 {
7230 tree tem = TREE_OPERAND (exp, 0);
7231 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7232 tem = build2 (POINTER_PLUS_EXPR, TREE_TYPE (TREE_OPERAND (exp, 1)),
7233 tem,
7234 double_int_to_tree (sizetype, mem_ref_offset (exp)));
7235 return expand_expr (tem, target, tmode, modifier);
7236 }
7237
7238 case CONST_DECL:
7239 /* Expand the initializer like constants above. */
7240 return XEXP (expand_expr_constant (DECL_INITIAL (exp), 0, modifier), 0);
7241
7242 case REALPART_EXPR:
7243 /* The real part of the complex number is always first, therefore
7244 the address is the same as the address of the parent object. */
7245 offset = 0;
7246 bitpos = 0;
7247 inner = TREE_OPERAND (exp, 0);
7248 break;
7249
7250 case IMAGPART_EXPR:
7251 /* The imaginary part of the complex number is always second.
7252 The expression is therefore always offset by the size of the
7253 scalar type. */
7254 offset = 0;
7255 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7256 inner = TREE_OPERAND (exp, 0);
7257 break;
7258
7259 default:
7260 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7261 expand_expr, as that can have various side effects; LABEL_DECLs for
7262 example, may not have their DECL_RTL set yet. Expand the rtl of
7263 CONSTRUCTORs too, which should yield a memory reference for the
7264 constructor's contents. Assume language specific tree nodes can
7265 be expanded in some interesting way. */
7266 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7267 if (DECL_P (exp)
7268 || TREE_CODE (exp) == CONSTRUCTOR
7269 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7270 {
7271 result = expand_expr (exp, target, tmode,
7272 modifier == EXPAND_INITIALIZER
7273 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7274
7275 /* If the DECL isn't in memory, then the DECL wasn't properly
7276 marked TREE_ADDRESSABLE, which will be either a front-end
7277 or a tree optimizer bug. */
7278
7279 if (TREE_ADDRESSABLE (exp)
7280 && ! MEM_P (result)
7281 && ! targetm.calls.allocate_stack_slots_for_args())
7282 {
7283 error ("local frame unavailable (naked function?)");
7284 return result;
7285 }
7286 else
7287 gcc_assert (MEM_P (result));
7288 result = XEXP (result, 0);
7289
7290 /* ??? Is this needed anymore? */
7291 if (DECL_P (exp) && !TREE_USED (exp) == 0)
7292 {
7293 assemble_external (exp);
7294 TREE_USED (exp) = 1;
7295 }
7296
7297 if (modifier != EXPAND_INITIALIZER
7298 && modifier != EXPAND_CONST_ADDRESS)
7299 result = force_operand (result, target);
7300 return result;
7301 }
7302
7303 /* Pass FALSE as the last argument to get_inner_reference although
7304 we are expanding to RTL. The rationale is that we know how to
7305 handle "aligning nodes" here: we can just bypass them because
7306 they won't change the final object whose address will be returned
7307 (they actually exist only for that purpose). */
7308 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7309 &mode1, &unsignedp, &volatilep, false);
7310 break;
7311 }
7312
7313 /* We must have made progress. */
7314 gcc_assert (inner != exp);
7315
7316 subtarget = offset || bitpos ? NULL_RTX : target;
7317 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7318 inner alignment, force the inner to be sufficiently aligned. */
7319 if (CONSTANT_CLASS_P (inner)
7320 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7321 {
7322 inner = copy_node (inner);
7323 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7324 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7325 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7326 }
7327 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7328
7329 if (offset)
7330 {
7331 rtx tmp;
7332
7333 if (modifier != EXPAND_NORMAL)
7334 result = force_operand (result, NULL);
7335 tmp = expand_expr (offset, NULL_RTX, tmode,
7336 modifier == EXPAND_INITIALIZER
7337 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7338
7339 result = convert_memory_address_addr_space (tmode, result, as);
7340 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7341
7342 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7343 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7344 else
7345 {
7346 subtarget = bitpos ? NULL_RTX : target;
7347 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7348 1, OPTAB_LIB_WIDEN);
7349 }
7350 }
7351
7352 if (bitpos)
7353 {
7354 /* Someone beforehand should have rejected taking the address
7355 of such an object. */
7356 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7357
7358 result = plus_constant (result, bitpos / BITS_PER_UNIT);
7359 if (modifier < EXPAND_SUM)
7360 result = force_operand (result, target);
7361 }
7362
7363 return result;
7364 }
7365
7366 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7367 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7368
7369 static rtx
7370 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7371 enum expand_modifier modifier)
7372 {
7373 addr_space_t as = ADDR_SPACE_GENERIC;
7374 enum machine_mode address_mode = Pmode;
7375 enum machine_mode pointer_mode = ptr_mode;
7376 enum machine_mode rmode;
7377 rtx result;
7378
7379 /* Target mode of VOIDmode says "whatever's natural". */
7380 if (tmode == VOIDmode)
7381 tmode = TYPE_MODE (TREE_TYPE (exp));
7382
7383 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7384 {
7385 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7386 address_mode = targetm.addr_space.address_mode (as);
7387 pointer_mode = targetm.addr_space.pointer_mode (as);
7388 }
7389
7390 /* We can get called with some Weird Things if the user does silliness
7391 like "(short) &a". In that case, convert_memory_address won't do
7392 the right thing, so ignore the given target mode. */
7393 if (tmode != address_mode && tmode != pointer_mode)
7394 tmode = address_mode;
7395
7396 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7397 tmode, modifier, as);
7398
7399 /* Despite expand_expr claims concerning ignoring TMODE when not
7400 strictly convenient, stuff breaks if we don't honor it. Note
7401 that combined with the above, we only do this for pointer modes. */
7402 rmode = GET_MODE (result);
7403 if (rmode == VOIDmode)
7404 rmode = tmode;
7405 if (rmode != tmode)
7406 result = convert_memory_address_addr_space (tmode, result, as);
7407
7408 return result;
7409 }
7410
7411 /* Generate code for computing CONSTRUCTOR EXP.
7412 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7413 is TRUE, instead of creating a temporary variable in memory
7414 NULL is returned and the caller needs to handle it differently. */
7415
7416 static rtx
7417 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7418 bool avoid_temp_mem)
7419 {
7420 tree type = TREE_TYPE (exp);
7421 enum machine_mode mode = TYPE_MODE (type);
7422
7423 /* Try to avoid creating a temporary at all. This is possible
7424 if all of the initializer is zero.
7425 FIXME: try to handle all [0..255] initializers we can handle
7426 with memset. */
7427 if (TREE_STATIC (exp)
7428 && !TREE_ADDRESSABLE (exp)
7429 && target != 0 && mode == BLKmode
7430 && all_zeros_p (exp))
7431 {
7432 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7433 return target;
7434 }
7435
7436 /* All elts simple constants => refer to a constant in memory. But
7437 if this is a non-BLKmode mode, let it store a field at a time
7438 since that should make a CONST_INT or CONST_DOUBLE when we
7439 fold. Likewise, if we have a target we can use, it is best to
7440 store directly into the target unless the type is large enough
7441 that memcpy will be used. If we are making an initializer and
7442 all operands are constant, put it in memory as well.
7443
7444 FIXME: Avoid trying to fill vector constructors piece-meal.
7445 Output them with output_constant_def below unless we're sure
7446 they're zeros. This should go away when vector initializers
7447 are treated like VECTOR_CST instead of arrays. */
7448 if ((TREE_STATIC (exp)
7449 && ((mode == BLKmode
7450 && ! (target != 0 && safe_from_p (target, exp, 1)))
7451 || TREE_ADDRESSABLE (exp)
7452 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7453 && (! MOVE_BY_PIECES_P
7454 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7455 TYPE_ALIGN (type)))
7456 && ! mostly_zeros_p (exp))))
7457 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7458 && TREE_CONSTANT (exp)))
7459 {
7460 rtx constructor;
7461
7462 if (avoid_temp_mem)
7463 return NULL_RTX;
7464
7465 constructor = expand_expr_constant (exp, 1, modifier);
7466
7467 if (modifier != EXPAND_CONST_ADDRESS
7468 && modifier != EXPAND_INITIALIZER
7469 && modifier != EXPAND_SUM)
7470 constructor = validize_mem (constructor);
7471
7472 return constructor;
7473 }
7474
7475 /* Handle calls that pass values in multiple non-contiguous
7476 locations. The Irix 6 ABI has examples of this. */
7477 if (target == 0 || ! safe_from_p (target, exp, 1)
7478 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7479 {
7480 if (avoid_temp_mem)
7481 return NULL_RTX;
7482
7483 target
7484 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7485 | (TREE_READONLY (exp)
7486 * TYPE_QUAL_CONST))),
7487 0, TREE_ADDRESSABLE (exp), 1);
7488 }
7489
7490 store_constructor (exp, target, 0, int_expr_size (exp));
7491 return target;
7492 }
7493
7494
7495 /* expand_expr: generate code for computing expression EXP.
7496 An rtx for the computed value is returned. The value is never null.
7497 In the case of a void EXP, const0_rtx is returned.
7498
7499 The value may be stored in TARGET if TARGET is nonzero.
7500 TARGET is just a suggestion; callers must assume that
7501 the rtx returned may not be the same as TARGET.
7502
7503 If TARGET is CONST0_RTX, it means that the value will be ignored.
7504
7505 If TMODE is not VOIDmode, it suggests generating the
7506 result in mode TMODE. But this is done only when convenient.
7507 Otherwise, TMODE is ignored and the value generated in its natural mode.
7508 TMODE is just a suggestion; callers must assume that
7509 the rtx returned may not have mode TMODE.
7510
7511 Note that TARGET may have neither TMODE nor MODE. In that case, it
7512 probably will not be used.
7513
7514 If MODIFIER is EXPAND_SUM then when EXP is an addition
7515 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7516 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7517 products as above, or REG or MEM, or constant.
7518 Ordinarily in such cases we would output mul or add instructions
7519 and then return a pseudo reg containing the sum.
7520
7521 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7522 it also marks a label as absolutely required (it can't be dead).
7523 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7524 This is used for outputting expressions used in initializers.
7525
7526 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7527 with a constant address even if that address is not normally legitimate.
7528 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7529
7530 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7531 a call parameter. Such targets require special care as we haven't yet
7532 marked TARGET so that it's safe from being trashed by libcalls. We
7533 don't want to use TARGET for anything but the final result;
7534 Intermediate values must go elsewhere. Additionally, calls to
7535 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7536
7537 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7538 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7539 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7540 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7541 recursively. */
7542
7543 rtx
7544 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7545 enum expand_modifier modifier, rtx *alt_rtl)
7546 {
7547 rtx ret;
7548
7549 /* Handle ERROR_MARK before anybody tries to access its type. */
7550 if (TREE_CODE (exp) == ERROR_MARK
7551 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7552 {
7553 ret = CONST0_RTX (tmode);
7554 return ret ? ret : const0_rtx;
7555 }
7556
7557 /* If this is an expression of some kind and it has an associated line
7558 number, then emit the line number before expanding the expression.
7559
7560 We need to save and restore the file and line information so that
7561 errors discovered during expansion are emitted with the right
7562 information. It would be better of the diagnostic routines
7563 used the file/line information embedded in the tree nodes rather
7564 than globals. */
7565 if (cfun && EXPR_HAS_LOCATION (exp))
7566 {
7567 location_t saved_location = input_location;
7568 location_t saved_curr_loc = get_curr_insn_source_location ();
7569 tree saved_block = get_curr_insn_block ();
7570 input_location = EXPR_LOCATION (exp);
7571 set_curr_insn_source_location (input_location);
7572
7573 /* Record where the insns produced belong. */
7574 set_curr_insn_block (TREE_BLOCK (exp));
7575
7576 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7577
7578 input_location = saved_location;
7579 set_curr_insn_block (saved_block);
7580 set_curr_insn_source_location (saved_curr_loc);
7581 }
7582 else
7583 {
7584 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7585 }
7586
7587 return ret;
7588 }
7589
7590 rtx
7591 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7592 enum expand_modifier modifier)
7593 {
7594 rtx op0, op1, op2, temp;
7595 tree type;
7596 int unsignedp;
7597 enum machine_mode mode;
7598 enum tree_code code = ops->code;
7599 optab this_optab;
7600 rtx subtarget, original_target;
7601 int ignore;
7602 bool reduce_bit_field;
7603 location_t loc = ops->location;
7604 tree treeop0, treeop1, treeop2;
7605 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7606 ? reduce_to_bit_field_precision ((expr), \
7607 target, \
7608 type) \
7609 : (expr))
7610
7611 type = ops->type;
7612 mode = TYPE_MODE (type);
7613 unsignedp = TYPE_UNSIGNED (type);
7614
7615 treeop0 = ops->op0;
7616 treeop1 = ops->op1;
7617 treeop2 = ops->op2;
7618
7619 /* We should be called only on simple (binary or unary) expressions,
7620 exactly those that are valid in gimple expressions that aren't
7621 GIMPLE_SINGLE_RHS (or invalid). */
7622 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7623 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7624 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7625
7626 ignore = (target == const0_rtx
7627 || ((CONVERT_EXPR_CODE_P (code)
7628 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7629 && TREE_CODE (type) == VOID_TYPE));
7630
7631 /* We should be called only if we need the result. */
7632 gcc_assert (!ignore);
7633
7634 /* An operation in what may be a bit-field type needs the
7635 result to be reduced to the precision of the bit-field type,
7636 which is narrower than that of the type's mode. */
7637 reduce_bit_field = (INTEGRAL_TYPE_P (type)
7638 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7639
7640 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7641 target = 0;
7642
7643 /* Use subtarget as the target for operand 0 of a binary operation. */
7644 subtarget = get_subtarget (target);
7645 original_target = target;
7646
7647 switch (code)
7648 {
7649 case NON_LVALUE_EXPR:
7650 case PAREN_EXPR:
7651 CASE_CONVERT:
7652 if (treeop0 == error_mark_node)
7653 return const0_rtx;
7654
7655 if (TREE_CODE (type) == UNION_TYPE)
7656 {
7657 tree valtype = TREE_TYPE (treeop0);
7658
7659 /* If both input and output are BLKmode, this conversion isn't doing
7660 anything except possibly changing memory attribute. */
7661 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7662 {
7663 rtx result = expand_expr (treeop0, target, tmode,
7664 modifier);
7665
7666 result = copy_rtx (result);
7667 set_mem_attributes (result, type, 0);
7668 return result;
7669 }
7670
7671 if (target == 0)
7672 {
7673 if (TYPE_MODE (type) != BLKmode)
7674 target = gen_reg_rtx (TYPE_MODE (type));
7675 else
7676 target = assign_temp (type, 0, 1, 1);
7677 }
7678
7679 if (MEM_P (target))
7680 /* Store data into beginning of memory target. */
7681 store_expr (treeop0,
7682 adjust_address (target, TYPE_MODE (valtype), 0),
7683 modifier == EXPAND_STACK_PARM,
7684 false);
7685
7686 else
7687 {
7688 gcc_assert (REG_P (target));
7689
7690 /* Store this field into a union of the proper type. */
7691 store_field (target,
7692 MIN ((int_size_in_bytes (TREE_TYPE
7693 (treeop0))
7694 * BITS_PER_UNIT),
7695 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7696 0, 0, 0, TYPE_MODE (valtype), treeop0,
7697 type, 0, false);
7698 }
7699
7700 /* Return the entire union. */
7701 return target;
7702 }
7703
7704 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
7705 {
7706 op0 = expand_expr (treeop0, target, VOIDmode,
7707 modifier);
7708
7709 /* If the signedness of the conversion differs and OP0 is
7710 a promoted SUBREG, clear that indication since we now
7711 have to do the proper extension. */
7712 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
7713 && GET_CODE (op0) == SUBREG)
7714 SUBREG_PROMOTED_VAR_P (op0) = 0;
7715
7716 return REDUCE_BIT_FIELD (op0);
7717 }
7718
7719 op0 = expand_expr (treeop0, NULL_RTX, mode,
7720 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
7721 if (GET_MODE (op0) == mode)
7722 ;
7723
7724 /* If OP0 is a constant, just convert it into the proper mode. */
7725 else if (CONSTANT_P (op0))
7726 {
7727 tree inner_type = TREE_TYPE (treeop0);
7728 enum machine_mode inner_mode = GET_MODE (op0);
7729
7730 if (inner_mode == VOIDmode)
7731 inner_mode = TYPE_MODE (inner_type);
7732
7733 if (modifier == EXPAND_INITIALIZER)
7734 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7735 subreg_lowpart_offset (mode,
7736 inner_mode));
7737 else
7738 op0= convert_modes (mode, inner_mode, op0,
7739 TYPE_UNSIGNED (inner_type));
7740 }
7741
7742 else if (modifier == EXPAND_INITIALIZER)
7743 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7744
7745 else if (target == 0)
7746 op0 = convert_to_mode (mode, op0,
7747 TYPE_UNSIGNED (TREE_TYPE
7748 (treeop0)));
7749 else
7750 {
7751 convert_move (target, op0,
7752 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7753 op0 = target;
7754 }
7755
7756 return REDUCE_BIT_FIELD (op0);
7757
7758 case ADDR_SPACE_CONVERT_EXPR:
7759 {
7760 tree treeop0_type = TREE_TYPE (treeop0);
7761 addr_space_t as_to;
7762 addr_space_t as_from;
7763
7764 gcc_assert (POINTER_TYPE_P (type));
7765 gcc_assert (POINTER_TYPE_P (treeop0_type));
7766
7767 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
7768 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
7769
7770 /* Conversions between pointers to the same address space should
7771 have been implemented via CONVERT_EXPR / NOP_EXPR. */
7772 gcc_assert (as_to != as_from);
7773
7774 /* Ask target code to handle conversion between pointers
7775 to overlapping address spaces. */
7776 if (targetm.addr_space.subset_p (as_to, as_from)
7777 || targetm.addr_space.subset_p (as_from, as_to))
7778 {
7779 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
7780 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
7781 gcc_assert (op0);
7782 return op0;
7783 }
7784
7785 /* For disjoint address spaces, converting anything but
7786 a null pointer invokes undefined behaviour. We simply
7787 always return a null pointer here. */
7788 return CONST0_RTX (mode);
7789 }
7790
7791 case POINTER_PLUS_EXPR:
7792 /* Even though the sizetype mode and the pointer's mode can be different
7793 expand is able to handle this correctly and get the correct result out
7794 of the PLUS_EXPR code. */
7795 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
7796 if sizetype precision is smaller than pointer precision. */
7797 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
7798 treeop1 = fold_convert_loc (loc, type,
7799 fold_convert_loc (loc, ssizetype,
7800 treeop1));
7801 case PLUS_EXPR:
7802 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7803 something else, make sure we add the register to the constant and
7804 then to the other thing. This case can occur during strength
7805 reduction and doing it this way will produce better code if the
7806 frame pointer or argument pointer is eliminated.
7807
7808 fold-const.c will ensure that the constant is always in the inner
7809 PLUS_EXPR, so the only case we need to do anything about is if
7810 sp, ap, or fp is our second argument, in which case we must swap
7811 the innermost first argument and our second argument. */
7812
7813 if (TREE_CODE (treeop0) == PLUS_EXPR
7814 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
7815 && TREE_CODE (treeop1) == VAR_DECL
7816 && (DECL_RTL (treeop1) == frame_pointer_rtx
7817 || DECL_RTL (treeop1) == stack_pointer_rtx
7818 || DECL_RTL (treeop1) == arg_pointer_rtx))
7819 {
7820 tree t = treeop1;
7821
7822 treeop1 = TREE_OPERAND (treeop0, 0);
7823 TREE_OPERAND (treeop0, 0) = t;
7824 }
7825
7826 /* If the result is to be ptr_mode and we are adding an integer to
7827 something, we might be forming a constant. So try to use
7828 plus_constant. If it produces a sum and we can't accept it,
7829 use force_operand. This allows P = &ARR[const] to generate
7830 efficient code on machines where a SYMBOL_REF is not a valid
7831 address.
7832
7833 If this is an EXPAND_SUM call, always return the sum. */
7834 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7835 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
7836 {
7837 if (modifier == EXPAND_STACK_PARM)
7838 target = 0;
7839 if (TREE_CODE (treeop0) == INTEGER_CST
7840 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7841 && TREE_CONSTANT (treeop1))
7842 {
7843 rtx constant_part;
7844
7845 op1 = expand_expr (treeop1, subtarget, VOIDmode,
7846 EXPAND_SUM);
7847 /* Use immed_double_const to ensure that the constant is
7848 truncated according to the mode of OP1, then sign extended
7849 to a HOST_WIDE_INT. Using the constant directly can result
7850 in non-canonical RTL in a 64x32 cross compile. */
7851 constant_part
7852 = immed_double_const (TREE_INT_CST_LOW (treeop0),
7853 (HOST_WIDE_INT) 0,
7854 TYPE_MODE (TREE_TYPE (treeop1)));
7855 op1 = plus_constant (op1, INTVAL (constant_part));
7856 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7857 op1 = force_operand (op1, target);
7858 return REDUCE_BIT_FIELD (op1);
7859 }
7860
7861 else if (TREE_CODE (treeop1) == INTEGER_CST
7862 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7863 && TREE_CONSTANT (treeop0))
7864 {
7865 rtx constant_part;
7866
7867 op0 = expand_expr (treeop0, subtarget, VOIDmode,
7868 (modifier == EXPAND_INITIALIZER
7869 ? EXPAND_INITIALIZER : EXPAND_SUM));
7870 if (! CONSTANT_P (op0))
7871 {
7872 op1 = expand_expr (treeop1, NULL_RTX,
7873 VOIDmode, modifier);
7874 /* Return a PLUS if modifier says it's OK. */
7875 if (modifier == EXPAND_SUM
7876 || modifier == EXPAND_INITIALIZER)
7877 return simplify_gen_binary (PLUS, mode, op0, op1);
7878 goto binop2;
7879 }
7880 /* Use immed_double_const to ensure that the constant is
7881 truncated according to the mode of OP1, then sign extended
7882 to a HOST_WIDE_INT. Using the constant directly can result
7883 in non-canonical RTL in a 64x32 cross compile. */
7884 constant_part
7885 = immed_double_const (TREE_INT_CST_LOW (treeop1),
7886 (HOST_WIDE_INT) 0,
7887 TYPE_MODE (TREE_TYPE (treeop0)));
7888 op0 = plus_constant (op0, INTVAL (constant_part));
7889 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7890 op0 = force_operand (op0, target);
7891 return REDUCE_BIT_FIELD (op0);
7892 }
7893 }
7894
7895 /* Use TER to expand pointer addition of a negated value
7896 as pointer subtraction. */
7897 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
7898 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
7899 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
7900 && TREE_CODE (treeop1) == SSA_NAME
7901 && TYPE_MODE (TREE_TYPE (treeop0))
7902 == TYPE_MODE (TREE_TYPE (treeop1)))
7903 {
7904 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
7905 if (def)
7906 {
7907 treeop1 = gimple_assign_rhs1 (def);
7908 code = MINUS_EXPR;
7909 goto do_minus;
7910 }
7911 }
7912
7913 /* No sense saving up arithmetic to be done
7914 if it's all in the wrong mode to form part of an address.
7915 And force_operand won't know whether to sign-extend or
7916 zero-extend. */
7917 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7918 || mode != ptr_mode)
7919 {
7920 expand_operands (treeop0, treeop1,
7921 subtarget, &op0, &op1, EXPAND_NORMAL);
7922 if (op0 == const0_rtx)
7923 return op1;
7924 if (op1 == const0_rtx)
7925 return op0;
7926 goto binop2;
7927 }
7928
7929 expand_operands (treeop0, treeop1,
7930 subtarget, &op0, &op1, modifier);
7931 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7932
7933 case MINUS_EXPR:
7934 do_minus:
7935 /* For initializers, we are allowed to return a MINUS of two
7936 symbolic constants. Here we handle all cases when both operands
7937 are constant. */
7938 /* Handle difference of two symbolic constants,
7939 for the sake of an initializer. */
7940 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7941 && really_constant_p (treeop0)
7942 && really_constant_p (treeop1))
7943 {
7944 expand_operands (treeop0, treeop1,
7945 NULL_RTX, &op0, &op1, modifier);
7946
7947 /* If the last operand is a CONST_INT, use plus_constant of
7948 the negated constant. Else make the MINUS. */
7949 if (CONST_INT_P (op1))
7950 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
7951 else
7952 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
7953 }
7954
7955 /* No sense saving up arithmetic to be done
7956 if it's all in the wrong mode to form part of an address.
7957 And force_operand won't know whether to sign-extend or
7958 zero-extend. */
7959 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7960 || mode != ptr_mode)
7961 goto binop;
7962
7963 expand_operands (treeop0, treeop1,
7964 subtarget, &op0, &op1, modifier);
7965
7966 /* Convert A - const to A + (-const). */
7967 if (CONST_INT_P (op1))
7968 {
7969 op1 = negate_rtx (mode, op1);
7970 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7971 }
7972
7973 goto binop2;
7974
7975 case WIDEN_MULT_PLUS_EXPR:
7976 case WIDEN_MULT_MINUS_EXPR:
7977 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
7978 op2 = expand_normal (treeop2);
7979 target = expand_widen_pattern_expr (ops, op0, op1, op2,
7980 target, unsignedp);
7981 return target;
7982
7983 case WIDEN_MULT_EXPR:
7984 /* If first operand is constant, swap them.
7985 Thus the following special case checks need only
7986 check the second operand. */
7987 if (TREE_CODE (treeop0) == INTEGER_CST)
7988 {
7989 tree t1 = treeop0;
7990 treeop0 = treeop1;
7991 treeop1 = t1;
7992 }
7993
7994 /* First, check if we have a multiplication of one signed and one
7995 unsigned operand. */
7996 if (TREE_CODE (treeop1) != INTEGER_CST
7997 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
7998 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
7999 {
8000 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8001 this_optab = usmul_widen_optab;
8002 if (mode == GET_MODE_2XWIDER_MODE (innermode))
8003 {
8004 if (optab_handler (this_optab, mode) != CODE_FOR_nothing)
8005 {
8006 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8007 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8008 EXPAND_NORMAL);
8009 else
8010 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8011 EXPAND_NORMAL);
8012 goto binop3;
8013 }
8014 }
8015 }
8016 /* Check for a multiplication with matching signedness. */
8017 else if ((TREE_CODE (treeop1) == INTEGER_CST
8018 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8019 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8020 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8021 {
8022 tree op0type = TREE_TYPE (treeop0);
8023 enum machine_mode innermode = TYPE_MODE (op0type);
8024 bool zextend_p = TYPE_UNSIGNED (op0type);
8025 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8026 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8027
8028 if (mode == GET_MODE_2XWIDER_MODE (innermode)
8029 && TREE_CODE (treeop0) != INTEGER_CST)
8030 {
8031 if (optab_handler (this_optab, mode) != CODE_FOR_nothing)
8032 {
8033 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8034 EXPAND_NORMAL);
8035 temp = expand_widening_mult (mode, op0, op1, target,
8036 unsignedp, this_optab);
8037 return REDUCE_BIT_FIELD (temp);
8038 }
8039 if (optab_handler (other_optab, mode) != CODE_FOR_nothing
8040 && innermode == word_mode)
8041 {
8042 rtx htem, hipart;
8043 op0 = expand_normal (treeop0);
8044 if (TREE_CODE (treeop1) == INTEGER_CST)
8045 op1 = convert_modes (innermode, mode,
8046 expand_normal (treeop1), unsignedp);
8047 else
8048 op1 = expand_normal (treeop1);
8049 temp = expand_binop (mode, other_optab, op0, op1, target,
8050 unsignedp, OPTAB_LIB_WIDEN);
8051 hipart = gen_highpart (innermode, temp);
8052 htem = expand_mult_highpart_adjust (innermode, hipart,
8053 op0, op1, hipart,
8054 zextend_p);
8055 if (htem != hipart)
8056 emit_move_insn (hipart, htem);
8057 return REDUCE_BIT_FIELD (temp);
8058 }
8059 }
8060 }
8061 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8062 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8063 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8064 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8065
8066 case FMA_EXPR:
8067 {
8068 optab opt = fma_optab;
8069 gimple def0, def2;
8070
8071 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8072 call. */
8073 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8074 {
8075 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8076 tree call_expr;
8077
8078 gcc_assert (fn != NULL_TREE);
8079 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8080 return expand_builtin (call_expr, target, subtarget, mode, false);
8081 }
8082
8083 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8084 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8085
8086 op0 = op2 = NULL;
8087
8088 if (def0 && def2
8089 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8090 {
8091 opt = fnms_optab;
8092 op0 = expand_normal (gimple_assign_rhs1 (def0));
8093 op2 = expand_normal (gimple_assign_rhs1 (def2));
8094 }
8095 else if (def0
8096 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8097 {
8098 opt = fnma_optab;
8099 op0 = expand_normal (gimple_assign_rhs1 (def0));
8100 }
8101 else if (def2
8102 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8103 {
8104 opt = fms_optab;
8105 op2 = expand_normal (gimple_assign_rhs1 (def2));
8106 }
8107
8108 if (op0 == NULL)
8109 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8110 if (op2 == NULL)
8111 op2 = expand_normal (treeop2);
8112 op1 = expand_normal (treeop1);
8113
8114 return expand_ternary_op (TYPE_MODE (type), opt,
8115 op0, op1, op2, target, 0);
8116 }
8117
8118 case MULT_EXPR:
8119 /* If this is a fixed-point operation, then we cannot use the code
8120 below because "expand_mult" doesn't support sat/no-sat fixed-point
8121 multiplications. */
8122 if (ALL_FIXED_POINT_MODE_P (mode))
8123 goto binop;
8124
8125 /* If first operand is constant, swap them.
8126 Thus the following special case checks need only
8127 check the second operand. */
8128 if (TREE_CODE (treeop0) == INTEGER_CST)
8129 {
8130 tree t1 = treeop0;
8131 treeop0 = treeop1;
8132 treeop1 = t1;
8133 }
8134
8135 /* Attempt to return something suitable for generating an
8136 indexed address, for machines that support that. */
8137
8138 if (modifier == EXPAND_SUM && mode == ptr_mode
8139 && host_integerp (treeop1, 0))
8140 {
8141 tree exp1 = treeop1;
8142
8143 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8144 EXPAND_SUM);
8145
8146 if (!REG_P (op0))
8147 op0 = force_operand (op0, NULL_RTX);
8148 if (!REG_P (op0))
8149 op0 = copy_to_mode_reg (mode, op0);
8150
8151 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8152 gen_int_mode (tree_low_cst (exp1, 0),
8153 TYPE_MODE (TREE_TYPE (exp1)))));
8154 }
8155
8156 if (modifier == EXPAND_STACK_PARM)
8157 target = 0;
8158
8159 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8160 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8161
8162 case TRUNC_DIV_EXPR:
8163 case FLOOR_DIV_EXPR:
8164 case CEIL_DIV_EXPR:
8165 case ROUND_DIV_EXPR:
8166 case EXACT_DIV_EXPR:
8167 /* If this is a fixed-point operation, then we cannot use the code
8168 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8169 divisions. */
8170 if (ALL_FIXED_POINT_MODE_P (mode))
8171 goto binop;
8172
8173 if (modifier == EXPAND_STACK_PARM)
8174 target = 0;
8175 /* Possible optimization: compute the dividend with EXPAND_SUM
8176 then if the divisor is constant can optimize the case
8177 where some terms of the dividend have coeffs divisible by it. */
8178 expand_operands (treeop0, treeop1,
8179 subtarget, &op0, &op1, EXPAND_NORMAL);
8180 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8181
8182 case RDIV_EXPR:
8183 goto binop;
8184
8185 case TRUNC_MOD_EXPR:
8186 case FLOOR_MOD_EXPR:
8187 case CEIL_MOD_EXPR:
8188 case ROUND_MOD_EXPR:
8189 if (modifier == EXPAND_STACK_PARM)
8190 target = 0;
8191 expand_operands (treeop0, treeop1,
8192 subtarget, &op0, &op1, EXPAND_NORMAL);
8193 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8194
8195 case FIXED_CONVERT_EXPR:
8196 op0 = expand_normal (treeop0);
8197 if (target == 0 || modifier == EXPAND_STACK_PARM)
8198 target = gen_reg_rtx (mode);
8199
8200 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8201 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8202 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8203 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8204 else
8205 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8206 return target;
8207
8208 case FIX_TRUNC_EXPR:
8209 op0 = expand_normal (treeop0);
8210 if (target == 0 || modifier == EXPAND_STACK_PARM)
8211 target = gen_reg_rtx (mode);
8212 expand_fix (target, op0, unsignedp);
8213 return target;
8214
8215 case FLOAT_EXPR:
8216 op0 = expand_normal (treeop0);
8217 if (target == 0 || modifier == EXPAND_STACK_PARM)
8218 target = gen_reg_rtx (mode);
8219 /* expand_float can't figure out what to do if FROM has VOIDmode.
8220 So give it the correct mode. With -O, cse will optimize this. */
8221 if (GET_MODE (op0) == VOIDmode)
8222 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8223 op0);
8224 expand_float (target, op0,
8225 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8226 return target;
8227
8228 case NEGATE_EXPR:
8229 op0 = expand_expr (treeop0, subtarget,
8230 VOIDmode, EXPAND_NORMAL);
8231 if (modifier == EXPAND_STACK_PARM)
8232 target = 0;
8233 temp = expand_unop (mode,
8234 optab_for_tree_code (NEGATE_EXPR, type,
8235 optab_default),
8236 op0, target, 0);
8237 gcc_assert (temp);
8238 return REDUCE_BIT_FIELD (temp);
8239
8240 case ABS_EXPR:
8241 op0 = expand_expr (treeop0, subtarget,
8242 VOIDmode, EXPAND_NORMAL);
8243 if (modifier == EXPAND_STACK_PARM)
8244 target = 0;
8245
8246 /* ABS_EXPR is not valid for complex arguments. */
8247 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8248 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8249
8250 /* Unsigned abs is simply the operand. Testing here means we don't
8251 risk generating incorrect code below. */
8252 if (TYPE_UNSIGNED (type))
8253 return op0;
8254
8255 return expand_abs (mode, op0, target, unsignedp,
8256 safe_from_p (target, treeop0, 1));
8257
8258 case MAX_EXPR:
8259 case MIN_EXPR:
8260 target = original_target;
8261 if (target == 0
8262 || modifier == EXPAND_STACK_PARM
8263 || (MEM_P (target) && MEM_VOLATILE_P (target))
8264 || GET_MODE (target) != mode
8265 || (REG_P (target)
8266 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8267 target = gen_reg_rtx (mode);
8268 expand_operands (treeop0, treeop1,
8269 target, &op0, &op1, EXPAND_NORMAL);
8270
8271 /* First try to do it with a special MIN or MAX instruction.
8272 If that does not win, use a conditional jump to select the proper
8273 value. */
8274 this_optab = optab_for_tree_code (code, type, optab_default);
8275 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8276 OPTAB_WIDEN);
8277 if (temp != 0)
8278 return temp;
8279
8280 /* At this point, a MEM target is no longer useful; we will get better
8281 code without it. */
8282
8283 if (! REG_P (target))
8284 target = gen_reg_rtx (mode);
8285
8286 /* If op1 was placed in target, swap op0 and op1. */
8287 if (target != op0 && target == op1)
8288 {
8289 temp = op0;
8290 op0 = op1;
8291 op1 = temp;
8292 }
8293
8294 /* We generate better code and avoid problems with op1 mentioning
8295 target by forcing op1 into a pseudo if it isn't a constant. */
8296 if (! CONSTANT_P (op1))
8297 op1 = force_reg (mode, op1);
8298
8299 {
8300 enum rtx_code comparison_code;
8301 rtx cmpop1 = op1;
8302
8303 if (code == MAX_EXPR)
8304 comparison_code = unsignedp ? GEU : GE;
8305 else
8306 comparison_code = unsignedp ? LEU : LE;
8307
8308 /* Canonicalize to comparisons against 0. */
8309 if (op1 == const1_rtx)
8310 {
8311 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8312 or (a != 0 ? a : 1) for unsigned.
8313 For MIN we are safe converting (a <= 1 ? a : 1)
8314 into (a <= 0 ? a : 1) */
8315 cmpop1 = const0_rtx;
8316 if (code == MAX_EXPR)
8317 comparison_code = unsignedp ? NE : GT;
8318 }
8319 if (op1 == constm1_rtx && !unsignedp)
8320 {
8321 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8322 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8323 cmpop1 = const0_rtx;
8324 if (code == MIN_EXPR)
8325 comparison_code = LT;
8326 }
8327 #ifdef HAVE_conditional_move
8328 /* Use a conditional move if possible. */
8329 if (can_conditionally_move_p (mode))
8330 {
8331 rtx insn;
8332
8333 /* ??? Same problem as in expmed.c: emit_conditional_move
8334 forces a stack adjustment via compare_from_rtx, and we
8335 lose the stack adjustment if the sequence we are about
8336 to create is discarded. */
8337 do_pending_stack_adjust ();
8338
8339 start_sequence ();
8340
8341 /* Try to emit the conditional move. */
8342 insn = emit_conditional_move (target, comparison_code,
8343 op0, cmpop1, mode,
8344 op0, op1, mode,
8345 unsignedp);
8346
8347 /* If we could do the conditional move, emit the sequence,
8348 and return. */
8349 if (insn)
8350 {
8351 rtx seq = get_insns ();
8352 end_sequence ();
8353 emit_insn (seq);
8354 return target;
8355 }
8356
8357 /* Otherwise discard the sequence and fall back to code with
8358 branches. */
8359 end_sequence ();
8360 }
8361 #endif
8362 if (target != op0)
8363 emit_move_insn (target, op0);
8364
8365 temp = gen_label_rtx ();
8366 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8367 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8368 -1);
8369 }
8370 emit_move_insn (target, op1);
8371 emit_label (temp);
8372 return target;
8373
8374 case BIT_NOT_EXPR:
8375 op0 = expand_expr (treeop0, subtarget,
8376 VOIDmode, EXPAND_NORMAL);
8377 if (modifier == EXPAND_STACK_PARM)
8378 target = 0;
8379 /* In case we have to reduce the result to bitfield precision
8380 expand this as XOR with a proper constant instead. */
8381 if (reduce_bit_field)
8382 temp = expand_binop (mode, xor_optab, op0,
8383 immed_double_int_const
8384 (double_int_mask (TYPE_PRECISION (type)), mode),
8385 target, 1, OPTAB_LIB_WIDEN);
8386 else
8387 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8388 gcc_assert (temp);
8389 return temp;
8390
8391 /* ??? Can optimize bitwise operations with one arg constant.
8392 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8393 and (a bitwise1 b) bitwise2 b (etc)
8394 but that is probably not worth while. */
8395
8396 case BIT_AND_EXPR:
8397 case BIT_IOR_EXPR:
8398 case BIT_XOR_EXPR:
8399 goto binop;
8400
8401 case LROTATE_EXPR:
8402 case RROTATE_EXPR:
8403 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8404 || (GET_MODE_PRECISION (TYPE_MODE (type))
8405 == TYPE_PRECISION (type)));
8406 /* fall through */
8407
8408 case LSHIFT_EXPR:
8409 case RSHIFT_EXPR:
8410 /* If this is a fixed-point operation, then we cannot use the code
8411 below because "expand_shift" doesn't support sat/no-sat fixed-point
8412 shifts. */
8413 if (ALL_FIXED_POINT_MODE_P (mode))
8414 goto binop;
8415
8416 if (! safe_from_p (subtarget, treeop1, 1))
8417 subtarget = 0;
8418 if (modifier == EXPAND_STACK_PARM)
8419 target = 0;
8420 op0 = expand_expr (treeop0, subtarget,
8421 VOIDmode, EXPAND_NORMAL);
8422 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8423 unsignedp);
8424 if (code == LSHIFT_EXPR)
8425 temp = REDUCE_BIT_FIELD (temp);
8426 return temp;
8427
8428 /* Could determine the answer when only additive constants differ. Also,
8429 the addition of one can be handled by changing the condition. */
8430 case LT_EXPR:
8431 case LE_EXPR:
8432 case GT_EXPR:
8433 case GE_EXPR:
8434 case EQ_EXPR:
8435 case NE_EXPR:
8436 case UNORDERED_EXPR:
8437 case ORDERED_EXPR:
8438 case UNLT_EXPR:
8439 case UNLE_EXPR:
8440 case UNGT_EXPR:
8441 case UNGE_EXPR:
8442 case UNEQ_EXPR:
8443 case LTGT_EXPR:
8444 temp = do_store_flag (ops,
8445 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8446 tmode != VOIDmode ? tmode : mode);
8447 if (temp)
8448 return temp;
8449
8450 /* Use a compare and a jump for BLKmode comparisons, or for function
8451 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8452
8453 if ((target == 0
8454 || modifier == EXPAND_STACK_PARM
8455 || ! safe_from_p (target, treeop0, 1)
8456 || ! safe_from_p (target, treeop1, 1)
8457 /* Make sure we don't have a hard reg (such as function's return
8458 value) live across basic blocks, if not optimizing. */
8459 || (!optimize && REG_P (target)
8460 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8461 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8462
8463 emit_move_insn (target, const0_rtx);
8464
8465 op1 = gen_label_rtx ();
8466 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8467
8468 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8469 emit_move_insn (target, constm1_rtx);
8470 else
8471 emit_move_insn (target, const1_rtx);
8472
8473 emit_label (op1);
8474 return target;
8475
8476 case COMPLEX_EXPR:
8477 /* Get the rtx code of the operands. */
8478 op0 = expand_normal (treeop0);
8479 op1 = expand_normal (treeop1);
8480
8481 if (!target)
8482 target = gen_reg_rtx (TYPE_MODE (type));
8483
8484 /* Move the real (op0) and imaginary (op1) parts to their location. */
8485 write_complex_part (target, op0, false);
8486 write_complex_part (target, op1, true);
8487
8488 return target;
8489
8490 case WIDEN_SUM_EXPR:
8491 {
8492 tree oprnd0 = treeop0;
8493 tree oprnd1 = treeop1;
8494
8495 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8496 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8497 target, unsignedp);
8498 return target;
8499 }
8500
8501 case REDUC_MAX_EXPR:
8502 case REDUC_MIN_EXPR:
8503 case REDUC_PLUS_EXPR:
8504 {
8505 op0 = expand_normal (treeop0);
8506 this_optab = optab_for_tree_code (code, type, optab_default);
8507 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8508 gcc_assert (temp);
8509 return temp;
8510 }
8511
8512 case VEC_EXTRACT_EVEN_EXPR:
8513 case VEC_EXTRACT_ODD_EXPR:
8514 {
8515 expand_operands (treeop0, treeop1,
8516 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8517 this_optab = optab_for_tree_code (code, type, optab_default);
8518 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8519 OPTAB_WIDEN);
8520 gcc_assert (temp);
8521 return temp;
8522 }
8523
8524 case VEC_INTERLEAVE_HIGH_EXPR:
8525 case VEC_INTERLEAVE_LOW_EXPR:
8526 {
8527 expand_operands (treeop0, treeop1,
8528 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8529 this_optab = optab_for_tree_code (code, type, optab_default);
8530 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8531 OPTAB_WIDEN);
8532 gcc_assert (temp);
8533 return temp;
8534 }
8535
8536 case VEC_LSHIFT_EXPR:
8537 case VEC_RSHIFT_EXPR:
8538 {
8539 target = expand_vec_shift_expr (ops, target);
8540 return target;
8541 }
8542
8543 case VEC_UNPACK_HI_EXPR:
8544 case VEC_UNPACK_LO_EXPR:
8545 {
8546 op0 = expand_normal (treeop0);
8547 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8548 target, unsignedp);
8549 gcc_assert (temp);
8550 return temp;
8551 }
8552
8553 case VEC_UNPACK_FLOAT_HI_EXPR:
8554 case VEC_UNPACK_FLOAT_LO_EXPR:
8555 {
8556 op0 = expand_normal (treeop0);
8557 /* The signedness is determined from input operand. */
8558 temp = expand_widen_pattern_expr
8559 (ops, op0, NULL_RTX, NULL_RTX,
8560 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8561
8562 gcc_assert (temp);
8563 return temp;
8564 }
8565
8566 case VEC_WIDEN_MULT_HI_EXPR:
8567 case VEC_WIDEN_MULT_LO_EXPR:
8568 {
8569 tree oprnd0 = treeop0;
8570 tree oprnd1 = treeop1;
8571
8572 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8573 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8574 target, unsignedp);
8575 gcc_assert (target);
8576 return target;
8577 }
8578
8579 case VEC_PACK_TRUNC_EXPR:
8580 case VEC_PACK_SAT_EXPR:
8581 case VEC_PACK_FIX_TRUNC_EXPR:
8582 mode = TYPE_MODE (TREE_TYPE (treeop0));
8583 goto binop;
8584
8585 case DOT_PROD_EXPR:
8586 {
8587 tree oprnd0 = treeop0;
8588 tree oprnd1 = treeop1;
8589 tree oprnd2 = treeop2;
8590 rtx op2;
8591
8592 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8593 op2 = expand_normal (oprnd2);
8594 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8595 target, unsignedp);
8596 return target;
8597 }
8598
8599 case REALIGN_LOAD_EXPR:
8600 {
8601 tree oprnd0 = treeop0;
8602 tree oprnd1 = treeop1;
8603 tree oprnd2 = treeop2;
8604 rtx op2;
8605
8606 this_optab = optab_for_tree_code (code, type, optab_default);
8607 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8608 op2 = expand_normal (oprnd2);
8609 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8610 target, unsignedp);
8611 gcc_assert (temp);
8612 return temp;
8613 }
8614
8615 default:
8616 gcc_unreachable ();
8617 }
8618
8619 /* Here to do an ordinary binary operator. */
8620 binop:
8621 expand_operands (treeop0, treeop1,
8622 subtarget, &op0, &op1, EXPAND_NORMAL);
8623 binop2:
8624 this_optab = optab_for_tree_code (code, type, optab_default);
8625 binop3:
8626 if (modifier == EXPAND_STACK_PARM)
8627 target = 0;
8628 temp = expand_binop (mode, this_optab, op0, op1, target,
8629 unsignedp, OPTAB_LIB_WIDEN);
8630 gcc_assert (temp);
8631 /* Bitwise operations do not need bitfield reduction as we expect their
8632 operands being properly truncated. */
8633 if (code == BIT_XOR_EXPR
8634 || code == BIT_AND_EXPR
8635 || code == BIT_IOR_EXPR)
8636 return temp;
8637 return REDUCE_BIT_FIELD (temp);
8638 }
8639 #undef REDUCE_BIT_FIELD
8640
8641 rtx
8642 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
8643 enum expand_modifier modifier, rtx *alt_rtl)
8644 {
8645 rtx op0, op1, temp, decl_rtl;
8646 tree type;
8647 int unsignedp;
8648 enum machine_mode mode;
8649 enum tree_code code = TREE_CODE (exp);
8650 rtx subtarget, original_target;
8651 int ignore;
8652 tree context;
8653 bool reduce_bit_field;
8654 location_t loc = EXPR_LOCATION (exp);
8655 struct separate_ops ops;
8656 tree treeop0, treeop1, treeop2;
8657 tree ssa_name = NULL_TREE;
8658 gimple g;
8659
8660 type = TREE_TYPE (exp);
8661 mode = TYPE_MODE (type);
8662 unsignedp = TYPE_UNSIGNED (type);
8663
8664 treeop0 = treeop1 = treeop2 = NULL_TREE;
8665 if (!VL_EXP_CLASS_P (exp))
8666 switch (TREE_CODE_LENGTH (code))
8667 {
8668 default:
8669 case 3: treeop2 = TREE_OPERAND (exp, 2);
8670 case 2: treeop1 = TREE_OPERAND (exp, 1);
8671 case 1: treeop0 = TREE_OPERAND (exp, 0);
8672 case 0: break;
8673 }
8674 ops.code = code;
8675 ops.type = type;
8676 ops.op0 = treeop0;
8677 ops.op1 = treeop1;
8678 ops.op2 = treeop2;
8679 ops.location = loc;
8680
8681 ignore = (target == const0_rtx
8682 || ((CONVERT_EXPR_CODE_P (code)
8683 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8684 && TREE_CODE (type) == VOID_TYPE));
8685
8686 /* An operation in what may be a bit-field type needs the
8687 result to be reduced to the precision of the bit-field type,
8688 which is narrower than that of the type's mode. */
8689 reduce_bit_field = (!ignore
8690 && INTEGRAL_TYPE_P (type)
8691 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8692
8693 /* If we are going to ignore this result, we need only do something
8694 if there is a side-effect somewhere in the expression. If there
8695 is, short-circuit the most common cases here. Note that we must
8696 not call expand_expr with anything but const0_rtx in case this
8697 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
8698
8699 if (ignore)
8700 {
8701 if (! TREE_SIDE_EFFECTS (exp))
8702 return const0_rtx;
8703
8704 /* Ensure we reference a volatile object even if value is ignored, but
8705 don't do this if all we are doing is taking its address. */
8706 if (TREE_THIS_VOLATILE (exp)
8707 && TREE_CODE (exp) != FUNCTION_DECL
8708 && mode != VOIDmode && mode != BLKmode
8709 && modifier != EXPAND_CONST_ADDRESS)
8710 {
8711 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
8712 if (MEM_P (temp))
8713 copy_to_reg (temp);
8714 return const0_rtx;
8715 }
8716
8717 if (TREE_CODE_CLASS (code) == tcc_unary
8718 || code == COMPONENT_REF || code == INDIRECT_REF)
8719 return expand_expr (treeop0, const0_rtx, VOIDmode,
8720 modifier);
8721
8722 else if (TREE_CODE_CLASS (code) == tcc_binary
8723 || TREE_CODE_CLASS (code) == tcc_comparison
8724 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
8725 {
8726 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8727 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8728 return const0_rtx;
8729 }
8730 else if (code == BIT_FIELD_REF)
8731 {
8732 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8733 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8734 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
8735 return const0_rtx;
8736 }
8737
8738 target = 0;
8739 }
8740
8741 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8742 target = 0;
8743
8744 /* Use subtarget as the target for operand 0 of a binary operation. */
8745 subtarget = get_subtarget (target);
8746 original_target = target;
8747
8748 switch (code)
8749 {
8750 case LABEL_DECL:
8751 {
8752 tree function = decl_function_context (exp);
8753
8754 temp = label_rtx (exp);
8755 temp = gen_rtx_LABEL_REF (Pmode, temp);
8756
8757 if (function != current_function_decl
8758 && function != 0)
8759 LABEL_REF_NONLOCAL_P (temp) = 1;
8760
8761 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
8762 return temp;
8763 }
8764
8765 case SSA_NAME:
8766 /* ??? ivopts calls expander, without any preparation from
8767 out-of-ssa. So fake instructions as if this was an access to the
8768 base variable. This unnecessarily allocates a pseudo, see how we can
8769 reuse it, if partition base vars have it set already. */
8770 if (!currently_expanding_to_rtl)
8771 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
8772 NULL);
8773
8774 g = get_gimple_for_ssa_name (exp);
8775 /* For EXPAND_INITIALIZER try harder to get something simpler. */
8776 if (g == NULL
8777 && modifier == EXPAND_INITIALIZER
8778 && !SSA_NAME_IS_DEFAULT_DEF (exp)
8779 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
8780 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
8781 g = SSA_NAME_DEF_STMT (exp);
8782 if (g)
8783 return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
8784 modifier, NULL);
8785
8786 ssa_name = exp;
8787 decl_rtl = get_rtx_for_ssa_name (ssa_name);
8788 exp = SSA_NAME_VAR (ssa_name);
8789 goto expand_decl_rtl;
8790
8791 case PARM_DECL:
8792 case VAR_DECL:
8793 /* If a static var's type was incomplete when the decl was written,
8794 but the type is complete now, lay out the decl now. */
8795 if (DECL_SIZE (exp) == 0
8796 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
8797 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
8798 layout_decl (exp, 0);
8799
8800 /* ... fall through ... */
8801
8802 case FUNCTION_DECL:
8803 case RESULT_DECL:
8804 decl_rtl = DECL_RTL (exp);
8805 expand_decl_rtl:
8806 gcc_assert (decl_rtl);
8807 decl_rtl = copy_rtx (decl_rtl);
8808 /* Record writes to register variables. */
8809 if (modifier == EXPAND_WRITE
8810 && REG_P (decl_rtl)
8811 && HARD_REGISTER_P (decl_rtl))
8812 add_to_hard_reg_set (&crtl->asm_clobbers,
8813 GET_MODE (decl_rtl), REGNO (decl_rtl));
8814
8815 /* Ensure variable marked as used even if it doesn't go through
8816 a parser. If it hasn't be used yet, write out an external
8817 definition. */
8818 if (! TREE_USED (exp))
8819 {
8820 assemble_external (exp);
8821 TREE_USED (exp) = 1;
8822 }
8823
8824 /* Show we haven't gotten RTL for this yet. */
8825 temp = 0;
8826
8827 /* Variables inherited from containing functions should have
8828 been lowered by this point. */
8829 context = decl_function_context (exp);
8830 gcc_assert (!context
8831 || context == current_function_decl
8832 || TREE_STATIC (exp)
8833 || DECL_EXTERNAL (exp)
8834 /* ??? C++ creates functions that are not TREE_STATIC. */
8835 || TREE_CODE (exp) == FUNCTION_DECL);
8836
8837 /* This is the case of an array whose size is to be determined
8838 from its initializer, while the initializer is still being parsed.
8839 See expand_decl. */
8840
8841 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
8842 temp = validize_mem (decl_rtl);
8843
8844 /* If DECL_RTL is memory, we are in the normal case and the
8845 address is not valid, get the address into a register. */
8846
8847 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
8848 {
8849 if (alt_rtl)
8850 *alt_rtl = decl_rtl;
8851 decl_rtl = use_anchored_address (decl_rtl);
8852 if (modifier != EXPAND_CONST_ADDRESS
8853 && modifier != EXPAND_SUM
8854 && !memory_address_addr_space_p (DECL_MODE (exp),
8855 XEXP (decl_rtl, 0),
8856 MEM_ADDR_SPACE (decl_rtl)))
8857 temp = replace_equiv_address (decl_rtl,
8858 copy_rtx (XEXP (decl_rtl, 0)));
8859 }
8860
8861 /* If we got something, return it. But first, set the alignment
8862 if the address is a register. */
8863 if (temp != 0)
8864 {
8865 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
8866 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
8867
8868 return temp;
8869 }
8870
8871 /* If the mode of DECL_RTL does not match that of the decl, it
8872 must be a promoted value. We return a SUBREG of the wanted mode,
8873 but mark it so that we know that it was already extended. */
8874 if (REG_P (decl_rtl) && GET_MODE (decl_rtl) != DECL_MODE (exp))
8875 {
8876 enum machine_mode pmode;
8877
8878 /* Get the signedness to be used for this variable. Ensure we get
8879 the same mode we got when the variable was declared. */
8880 if (code == SSA_NAME
8881 && (g = SSA_NAME_DEF_STMT (ssa_name))
8882 && gimple_code (g) == GIMPLE_CALL)
8883 {
8884 gcc_assert (!gimple_call_internal_p (g));
8885 pmode = promote_function_mode (type, mode, &unsignedp,
8886 gimple_call_fntype (g),
8887 2);
8888 }
8889 else
8890 pmode = promote_decl_mode (exp, &unsignedp);
8891 gcc_assert (GET_MODE (decl_rtl) == pmode);
8892
8893 temp = gen_lowpart_SUBREG (mode, decl_rtl);
8894 SUBREG_PROMOTED_VAR_P (temp) = 1;
8895 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
8896 return temp;
8897 }
8898
8899 return decl_rtl;
8900
8901 case INTEGER_CST:
8902 temp = immed_double_const (TREE_INT_CST_LOW (exp),
8903 TREE_INT_CST_HIGH (exp), mode);
8904
8905 return temp;
8906
8907 case VECTOR_CST:
8908 {
8909 tree tmp = NULL_TREE;
8910 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
8911 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
8912 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
8913 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
8914 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
8915 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
8916 return const_vector_from_tree (exp);
8917 if (GET_MODE_CLASS (mode) == MODE_INT)
8918 {
8919 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
8920 if (type_for_mode)
8921 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
8922 }
8923 if (!tmp)
8924 tmp = build_constructor_from_list (type,
8925 TREE_VECTOR_CST_ELTS (exp));
8926 return expand_expr (tmp, ignore ? const0_rtx : target,
8927 tmode, modifier);
8928 }
8929
8930 case CONST_DECL:
8931 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
8932
8933 case REAL_CST:
8934 /* If optimized, generate immediate CONST_DOUBLE
8935 which will be turned into memory by reload if necessary.
8936
8937 We used to force a register so that loop.c could see it. But
8938 this does not allow gen_* patterns to perform optimizations with
8939 the constants. It also produces two insns in cases like "x = 1.0;".
8940 On most machines, floating-point constants are not permitted in
8941 many insns, so we'd end up copying it to a register in any case.
8942
8943 Now, we do the copying in expand_binop, if appropriate. */
8944 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
8945 TYPE_MODE (TREE_TYPE (exp)));
8946
8947 case FIXED_CST:
8948 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
8949 TYPE_MODE (TREE_TYPE (exp)));
8950
8951 case COMPLEX_CST:
8952 /* Handle evaluating a complex constant in a CONCAT target. */
8953 if (original_target && GET_CODE (original_target) == CONCAT)
8954 {
8955 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
8956 rtx rtarg, itarg;
8957
8958 rtarg = XEXP (original_target, 0);
8959 itarg = XEXP (original_target, 1);
8960
8961 /* Move the real and imaginary parts separately. */
8962 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
8963 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
8964
8965 if (op0 != rtarg)
8966 emit_move_insn (rtarg, op0);
8967 if (op1 != itarg)
8968 emit_move_insn (itarg, op1);
8969
8970 return original_target;
8971 }
8972
8973 /* ... fall through ... */
8974
8975 case STRING_CST:
8976 temp = expand_expr_constant (exp, 1, modifier);
8977
8978 /* temp contains a constant address.
8979 On RISC machines where a constant address isn't valid,
8980 make some insns to get that address into a register. */
8981 if (modifier != EXPAND_CONST_ADDRESS
8982 && modifier != EXPAND_INITIALIZER
8983 && modifier != EXPAND_SUM
8984 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
8985 MEM_ADDR_SPACE (temp)))
8986 return replace_equiv_address (temp,
8987 copy_rtx (XEXP (temp, 0)));
8988 return temp;
8989
8990 case SAVE_EXPR:
8991 {
8992 tree val = treeop0;
8993 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
8994
8995 if (!SAVE_EXPR_RESOLVED_P (exp))
8996 {
8997 /* We can indeed still hit this case, typically via builtin
8998 expanders calling save_expr immediately before expanding
8999 something. Assume this means that we only have to deal
9000 with non-BLKmode values. */
9001 gcc_assert (GET_MODE (ret) != BLKmode);
9002
9003 val = build_decl (EXPR_LOCATION (exp),
9004 VAR_DECL, NULL, TREE_TYPE (exp));
9005 DECL_ARTIFICIAL (val) = 1;
9006 DECL_IGNORED_P (val) = 1;
9007 treeop0 = val;
9008 TREE_OPERAND (exp, 0) = treeop0;
9009 SAVE_EXPR_RESOLVED_P (exp) = 1;
9010
9011 if (!CONSTANT_P (ret))
9012 ret = copy_to_reg (ret);
9013 SET_DECL_RTL (val, ret);
9014 }
9015
9016 return ret;
9017 }
9018
9019
9020 case CONSTRUCTOR:
9021 /* If we don't need the result, just ensure we evaluate any
9022 subexpressions. */
9023 if (ignore)
9024 {
9025 unsigned HOST_WIDE_INT idx;
9026 tree value;
9027
9028 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9029 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9030
9031 return const0_rtx;
9032 }
9033
9034 return expand_constructor (exp, target, modifier, false);
9035
9036 case TARGET_MEM_REF:
9037 {
9038 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
9039 struct mem_address addr;
9040 enum insn_code icode;
9041 int align;
9042
9043 get_address_description (exp, &addr);
9044 op0 = addr_for_mem_ref (&addr, as, true);
9045 op0 = memory_address_addr_space (mode, op0, as);
9046 temp = gen_rtx_MEM (mode, op0);
9047 set_mem_attributes (temp, exp, 0);
9048 set_mem_addr_space (temp, as);
9049 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)),
9050 get_object_alignment (exp, BIGGEST_ALIGNMENT));
9051 if (mode != BLKmode
9052 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
9053 /* If the target does not have special handling for unaligned
9054 loads of mode then it can use regular moves for them. */
9055 && ((icode = optab_handler (movmisalign_optab, mode))
9056 != CODE_FOR_nothing))
9057 {
9058 struct expand_operand ops[2];
9059
9060 /* We've already validated the memory, and we're creating a
9061 new pseudo destination. The predicates really can't fail,
9062 nor can the generator. */
9063 create_output_operand (&ops[0], NULL_RTX, mode);
9064 create_fixed_operand (&ops[1], temp);
9065 expand_insn (icode, 2, ops);
9066 return ops[0].value;
9067 }
9068 return temp;
9069 }
9070
9071 case MEM_REF:
9072 {
9073 addr_space_t as
9074 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1))));
9075 enum machine_mode address_mode;
9076 tree base = TREE_OPERAND (exp, 0);
9077 gimple def_stmt;
9078 enum insn_code icode;
9079 int align;
9080 /* Handle expansion of non-aliased memory with non-BLKmode. That
9081 might end up in a register. */
9082 if (TREE_CODE (base) == ADDR_EXPR)
9083 {
9084 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9085 tree bit_offset;
9086 base = TREE_OPERAND (base, 0);
9087 if (!DECL_P (base))
9088 {
9089 HOST_WIDE_INT off;
9090 base = get_addr_base_and_unit_offset (base, &off);
9091 gcc_assert (base);
9092 offset += off;
9093 }
9094 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
9095 decl we must use bitfield operations. */
9096 if (DECL_P (base)
9097 && !TREE_ADDRESSABLE (base)
9098 && DECL_MODE (base) != BLKmode
9099 && DECL_RTL_SET_P (base)
9100 && !MEM_P (DECL_RTL (base)))
9101 {
9102 tree bftype;
9103 if (offset == 0
9104 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9105 && (GET_MODE_BITSIZE (DECL_MODE (base))
9106 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9107 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9108 TREE_TYPE (exp), base),
9109 target, tmode, modifier);
9110 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9111 bftype = TREE_TYPE (base);
9112 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9113 bftype = TREE_TYPE (exp);
9114 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9115 base,
9116 TYPE_SIZE (TREE_TYPE (exp)),
9117 bit_offset),
9118 target, tmode, modifier);
9119 }
9120 }
9121 address_mode = targetm.addr_space.address_mode (as);
9122 base = TREE_OPERAND (exp, 0);
9123 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9124 {
9125 tree mask = gimple_assign_rhs2 (def_stmt);
9126 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9127 gimple_assign_rhs1 (def_stmt), mask);
9128 TREE_OPERAND (exp, 0) = base;
9129 }
9130 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)),
9131 get_object_alignment (exp, BIGGEST_ALIGNMENT));
9132 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9133 op0 = memory_address_addr_space (address_mode, op0, as);
9134 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9135 {
9136 rtx off
9137 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9138 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9139 }
9140 op0 = memory_address_addr_space (mode, op0, as);
9141 temp = gen_rtx_MEM (mode, op0);
9142 set_mem_attributes (temp, exp, 0);
9143 set_mem_addr_space (temp, as);
9144 if (TREE_THIS_VOLATILE (exp))
9145 MEM_VOLATILE_P (temp) = 1;
9146 if (mode != BLKmode
9147 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
9148 /* If the target does not have special handling for unaligned
9149 loads of mode then it can use regular moves for them. */
9150 && ((icode = optab_handler (movmisalign_optab, mode))
9151 != CODE_FOR_nothing))
9152 {
9153 struct expand_operand ops[2];
9154
9155 /* We've already validated the memory, and we're creating a
9156 new pseudo destination. The predicates really can't fail,
9157 nor can the generator. */
9158 create_output_operand (&ops[0], NULL_RTX, mode);
9159 create_fixed_operand (&ops[1], temp);
9160 expand_insn (icode, 2, ops);
9161 return ops[0].value;
9162 }
9163 return temp;
9164 }
9165
9166 case ARRAY_REF:
9167
9168 {
9169 tree array = treeop0;
9170 tree index = treeop1;
9171
9172 /* Fold an expression like: "foo"[2].
9173 This is not done in fold so it won't happen inside &.
9174 Don't fold if this is for wide characters since it's too
9175 difficult to do correctly and this is a very rare case. */
9176
9177 if (modifier != EXPAND_CONST_ADDRESS
9178 && modifier != EXPAND_INITIALIZER
9179 && modifier != EXPAND_MEMORY)
9180 {
9181 tree t = fold_read_from_constant_string (exp);
9182
9183 if (t)
9184 return expand_expr (t, target, tmode, modifier);
9185 }
9186
9187 /* If this is a constant index into a constant array,
9188 just get the value from the array. Handle both the cases when
9189 we have an explicit constructor and when our operand is a variable
9190 that was declared const. */
9191
9192 if (modifier != EXPAND_CONST_ADDRESS
9193 && modifier != EXPAND_INITIALIZER
9194 && modifier != EXPAND_MEMORY
9195 && TREE_CODE (array) == CONSTRUCTOR
9196 && ! TREE_SIDE_EFFECTS (array)
9197 && TREE_CODE (index) == INTEGER_CST)
9198 {
9199 unsigned HOST_WIDE_INT ix;
9200 tree field, value;
9201
9202 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9203 field, value)
9204 if (tree_int_cst_equal (field, index))
9205 {
9206 if (!TREE_SIDE_EFFECTS (value))
9207 return expand_expr (fold (value), target, tmode, modifier);
9208 break;
9209 }
9210 }
9211
9212 else if (optimize >= 1
9213 && modifier != EXPAND_CONST_ADDRESS
9214 && modifier != EXPAND_INITIALIZER
9215 && modifier != EXPAND_MEMORY
9216 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9217 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9218 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9219 && const_value_known_p (array))
9220 {
9221 if (TREE_CODE (index) == INTEGER_CST)
9222 {
9223 tree init = DECL_INITIAL (array);
9224
9225 if (TREE_CODE (init) == CONSTRUCTOR)
9226 {
9227 unsigned HOST_WIDE_INT ix;
9228 tree field, value;
9229
9230 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9231 field, value)
9232 if (tree_int_cst_equal (field, index))
9233 {
9234 if (TREE_SIDE_EFFECTS (value))
9235 break;
9236
9237 if (TREE_CODE (value) == CONSTRUCTOR)
9238 {
9239 /* If VALUE is a CONSTRUCTOR, this
9240 optimization is only useful if
9241 this doesn't store the CONSTRUCTOR
9242 into memory. If it does, it is more
9243 efficient to just load the data from
9244 the array directly. */
9245 rtx ret = expand_constructor (value, target,
9246 modifier, true);
9247 if (ret == NULL_RTX)
9248 break;
9249 }
9250
9251 return expand_expr (fold (value), target, tmode,
9252 modifier);
9253 }
9254 }
9255 else if(TREE_CODE (init) == STRING_CST)
9256 {
9257 tree index1 = index;
9258 tree low_bound = array_ref_low_bound (exp);
9259 index1 = fold_convert_loc (loc, sizetype,
9260 treeop1);
9261
9262 /* Optimize the special-case of a zero lower bound.
9263
9264 We convert the low_bound to sizetype to avoid some problems
9265 with constant folding. (E.g. suppose the lower bound is 1,
9266 and its mode is QI. Without the conversion,l (ARRAY
9267 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9268 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9269
9270 if (! integer_zerop (low_bound))
9271 index1 = size_diffop_loc (loc, index1,
9272 fold_convert_loc (loc, sizetype,
9273 low_bound));
9274
9275 if (0 > compare_tree_int (index1,
9276 TREE_STRING_LENGTH (init)))
9277 {
9278 tree type = TREE_TYPE (TREE_TYPE (init));
9279 enum machine_mode mode = TYPE_MODE (type);
9280
9281 if (GET_MODE_CLASS (mode) == MODE_INT
9282 && GET_MODE_SIZE (mode) == 1)
9283 return gen_int_mode (TREE_STRING_POINTER (init)
9284 [TREE_INT_CST_LOW (index1)],
9285 mode);
9286 }
9287 }
9288 }
9289 }
9290 }
9291 goto normal_inner_ref;
9292
9293 case COMPONENT_REF:
9294 /* If the operand is a CONSTRUCTOR, we can just extract the
9295 appropriate field if it is present. */
9296 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9297 {
9298 unsigned HOST_WIDE_INT idx;
9299 tree field, value;
9300
9301 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9302 idx, field, value)
9303 if (field == treeop1
9304 /* We can normally use the value of the field in the
9305 CONSTRUCTOR. However, if this is a bitfield in
9306 an integral mode that we can fit in a HOST_WIDE_INT,
9307 we must mask only the number of bits in the bitfield,
9308 since this is done implicitly by the constructor. If
9309 the bitfield does not meet either of those conditions,
9310 we can't do this optimization. */
9311 && (! DECL_BIT_FIELD (field)
9312 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9313 && (GET_MODE_PRECISION (DECL_MODE (field))
9314 <= HOST_BITS_PER_WIDE_INT))))
9315 {
9316 if (DECL_BIT_FIELD (field)
9317 && modifier == EXPAND_STACK_PARM)
9318 target = 0;
9319 op0 = expand_expr (value, target, tmode, modifier);
9320 if (DECL_BIT_FIELD (field))
9321 {
9322 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9323 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9324
9325 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9326 {
9327 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9328 op0 = expand_and (imode, op0, op1, target);
9329 }
9330 else
9331 {
9332 int count = GET_MODE_PRECISION (imode) - bitsize;
9333
9334 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9335 target, 0);
9336 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9337 target, 0);
9338 }
9339 }
9340
9341 return op0;
9342 }
9343 }
9344 goto normal_inner_ref;
9345
9346 case BIT_FIELD_REF:
9347 case ARRAY_RANGE_REF:
9348 normal_inner_ref:
9349 {
9350 enum machine_mode mode1, mode2;
9351 HOST_WIDE_INT bitsize, bitpos;
9352 tree offset;
9353 int volatilep = 0, must_force_mem;
9354 bool packedp = false;
9355 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9356 &mode1, &unsignedp, &volatilep, true);
9357 rtx orig_op0, memloc;
9358
9359 /* If we got back the original object, something is wrong. Perhaps
9360 we are evaluating an expression too early. In any event, don't
9361 infinitely recurse. */
9362 gcc_assert (tem != exp);
9363
9364 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9365 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9366 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9367 packedp = true;
9368
9369 /* If TEM's type is a union of variable size, pass TARGET to the inner
9370 computation, since it will need a temporary and TARGET is known
9371 to have to do. This occurs in unchecked conversion in Ada. */
9372 orig_op0 = op0
9373 = expand_expr (tem,
9374 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9375 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9376 != INTEGER_CST)
9377 && modifier != EXPAND_STACK_PARM
9378 ? target : NULL_RTX),
9379 VOIDmode,
9380 (modifier == EXPAND_INITIALIZER
9381 || modifier == EXPAND_CONST_ADDRESS
9382 || modifier == EXPAND_STACK_PARM)
9383 ? modifier : EXPAND_NORMAL);
9384
9385
9386 /* If the bitfield is volatile, we want to access it in the
9387 field's mode, not the computed mode.
9388 If a MEM has VOIDmode (external with incomplete type),
9389 use BLKmode for it instead. */
9390 if (MEM_P (op0))
9391 {
9392 if (volatilep && flag_strict_volatile_bitfields > 0)
9393 op0 = adjust_address (op0, mode1, 0);
9394 else if (GET_MODE (op0) == VOIDmode)
9395 op0 = adjust_address (op0, BLKmode, 0);
9396 }
9397
9398 mode2
9399 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9400
9401 /* If we have either an offset, a BLKmode result, or a reference
9402 outside the underlying object, we must force it to memory.
9403 Such a case can occur in Ada if we have unchecked conversion
9404 of an expression from a scalar type to an aggregate type or
9405 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9406 passed a partially uninitialized object or a view-conversion
9407 to a larger size. */
9408 must_force_mem = (offset
9409 || mode1 == BLKmode
9410 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9411
9412 /* Handle CONCAT first. */
9413 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9414 {
9415 if (bitpos == 0
9416 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9417 return op0;
9418 if (bitpos == 0
9419 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9420 && bitsize)
9421 {
9422 op0 = XEXP (op0, 0);
9423 mode2 = GET_MODE (op0);
9424 }
9425 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9426 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9427 && bitpos
9428 && bitsize)
9429 {
9430 op0 = XEXP (op0, 1);
9431 bitpos = 0;
9432 mode2 = GET_MODE (op0);
9433 }
9434 else
9435 /* Otherwise force into memory. */
9436 must_force_mem = 1;
9437 }
9438
9439 /* If this is a constant, put it in a register if it is a legitimate
9440 constant and we don't need a memory reference. */
9441 if (CONSTANT_P (op0)
9442 && mode2 != BLKmode
9443 && targetm.legitimate_constant_p (mode2, op0)
9444 && !must_force_mem)
9445 op0 = force_reg (mode2, op0);
9446
9447 /* Otherwise, if this is a constant, try to force it to the constant
9448 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9449 is a legitimate constant. */
9450 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9451 op0 = validize_mem (memloc);
9452
9453 /* Otherwise, if this is a constant or the object is not in memory
9454 and need be, put it there. */
9455 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9456 {
9457 tree nt = build_qualified_type (TREE_TYPE (tem),
9458 (TYPE_QUALS (TREE_TYPE (tem))
9459 | TYPE_QUAL_CONST));
9460 memloc = assign_temp (nt, 1, 1, 1);
9461 emit_move_insn (memloc, op0);
9462 op0 = memloc;
9463 }
9464
9465 if (offset)
9466 {
9467 enum machine_mode address_mode;
9468 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9469 EXPAND_SUM);
9470
9471 gcc_assert (MEM_P (op0));
9472
9473 address_mode
9474 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9475 if (GET_MODE (offset_rtx) != address_mode)
9476 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9477
9478 if (GET_MODE (op0) == BLKmode
9479 /* A constant address in OP0 can have VOIDmode, we must
9480 not try to call force_reg in that case. */
9481 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9482 && bitsize != 0
9483 && (bitpos % bitsize) == 0
9484 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9485 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9486 {
9487 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9488 bitpos = 0;
9489 }
9490
9491 op0 = offset_address (op0, offset_rtx,
9492 highest_pow2_factor (offset));
9493 }
9494
9495 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9496 record its alignment as BIGGEST_ALIGNMENT. */
9497 if (MEM_P (op0) && bitpos == 0 && offset != 0
9498 && is_aligning_offset (offset, tem))
9499 set_mem_align (op0, BIGGEST_ALIGNMENT);
9500
9501 /* Don't forget about volatility even if this is a bitfield. */
9502 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9503 {
9504 if (op0 == orig_op0)
9505 op0 = copy_rtx (op0);
9506
9507 MEM_VOLATILE_P (op0) = 1;
9508 }
9509
9510 /* In cases where an aligned union has an unaligned object
9511 as a field, we might be extracting a BLKmode value from
9512 an integer-mode (e.g., SImode) object. Handle this case
9513 by doing the extract into an object as wide as the field
9514 (which we know to be the width of a basic mode), then
9515 storing into memory, and changing the mode to BLKmode. */
9516 if (mode1 == VOIDmode
9517 || REG_P (op0) || GET_CODE (op0) == SUBREG
9518 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9519 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9520 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9521 && modifier != EXPAND_CONST_ADDRESS
9522 && modifier != EXPAND_INITIALIZER)
9523 /* If the field is volatile, we always want an aligned
9524 access. Only do this if the access is not already naturally
9525 aligned, otherwise "normal" (non-bitfield) volatile fields
9526 become non-addressable. */
9527 || (volatilep && flag_strict_volatile_bitfields > 0
9528 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0))
9529 /* If the field isn't aligned enough to fetch as a memref,
9530 fetch it as a bit field. */
9531 || (mode1 != BLKmode
9532 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9533 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9534 || (MEM_P (op0)
9535 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9536 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9537 && ((modifier == EXPAND_CONST_ADDRESS
9538 || modifier == EXPAND_INITIALIZER)
9539 ? STRICT_ALIGNMENT
9540 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9541 || (bitpos % BITS_PER_UNIT != 0)))
9542 /* If the type and the field are a constant size and the
9543 size of the type isn't the same size as the bitfield,
9544 we must use bitfield operations. */
9545 || (bitsize >= 0
9546 && TYPE_SIZE (TREE_TYPE (exp))
9547 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9548 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9549 bitsize)))
9550 {
9551 enum machine_mode ext_mode = mode;
9552
9553 if (ext_mode == BLKmode
9554 && ! (target != 0 && MEM_P (op0)
9555 && MEM_P (target)
9556 && bitpos % BITS_PER_UNIT == 0))
9557 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9558
9559 if (ext_mode == BLKmode)
9560 {
9561 if (target == 0)
9562 target = assign_temp (type, 0, 1, 1);
9563
9564 if (bitsize == 0)
9565 return target;
9566
9567 /* In this case, BITPOS must start at a byte boundary and
9568 TARGET, if specified, must be a MEM. */
9569 gcc_assert (MEM_P (op0)
9570 && (!target || MEM_P (target))
9571 && !(bitpos % BITS_PER_UNIT));
9572
9573 emit_block_move (target,
9574 adjust_address (op0, VOIDmode,
9575 bitpos / BITS_PER_UNIT),
9576 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9577 / BITS_PER_UNIT),
9578 (modifier == EXPAND_STACK_PARM
9579 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9580
9581 return target;
9582 }
9583
9584 op0 = validize_mem (op0);
9585
9586 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9587 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9588
9589 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
9590 (modifier == EXPAND_STACK_PARM
9591 ? NULL_RTX : target),
9592 ext_mode, ext_mode);
9593
9594 /* If the result is a record type and BITSIZE is narrower than
9595 the mode of OP0, an integral mode, and this is a big endian
9596 machine, we must put the field into the high-order bits. */
9597 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
9598 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
9599 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
9600 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
9601 GET_MODE_BITSIZE (GET_MODE (op0))
9602 - bitsize, op0, 1);
9603
9604 /* If the result type is BLKmode, store the data into a temporary
9605 of the appropriate type, but with the mode corresponding to the
9606 mode for the data we have (op0's mode). It's tempting to make
9607 this a constant type, since we know it's only being stored once,
9608 but that can cause problems if we are taking the address of this
9609 COMPONENT_REF because the MEM of any reference via that address
9610 will have flags corresponding to the type, which will not
9611 necessarily be constant. */
9612 if (mode == BLKmode)
9613 {
9614 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
9615 rtx new_rtx;
9616
9617 /* If the reference doesn't use the alias set of its type,
9618 we cannot create the temporary using that type. */
9619 if (component_uses_parent_alias_set (exp))
9620 {
9621 new_rtx = assign_stack_local (ext_mode, size, 0);
9622 set_mem_alias_set (new_rtx, get_alias_set (exp));
9623 }
9624 else
9625 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
9626
9627 emit_move_insn (new_rtx, op0);
9628 op0 = copy_rtx (new_rtx);
9629 PUT_MODE (op0, BLKmode);
9630 set_mem_attributes (op0, exp, 1);
9631 }
9632
9633 return op0;
9634 }
9635
9636 /* If the result is BLKmode, use that to access the object
9637 now as well. */
9638 if (mode == BLKmode)
9639 mode1 = BLKmode;
9640
9641 /* Get a reference to just this component. */
9642 if (modifier == EXPAND_CONST_ADDRESS
9643 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
9644 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
9645 else
9646 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9647
9648 if (op0 == orig_op0)
9649 op0 = copy_rtx (op0);
9650
9651 set_mem_attributes (op0, exp, 0);
9652 if (REG_P (XEXP (op0, 0)))
9653 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9654
9655 MEM_VOLATILE_P (op0) |= volatilep;
9656 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
9657 || modifier == EXPAND_CONST_ADDRESS
9658 || modifier == EXPAND_INITIALIZER)
9659 return op0;
9660 else if (target == 0)
9661 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9662
9663 convert_move (target, op0, unsignedp);
9664 return target;
9665 }
9666
9667 case OBJ_TYPE_REF:
9668 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
9669
9670 case CALL_EXPR:
9671 /* All valid uses of __builtin_va_arg_pack () are removed during
9672 inlining. */
9673 if (CALL_EXPR_VA_ARG_PACK (exp))
9674 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
9675 {
9676 tree fndecl = get_callee_fndecl (exp), attr;
9677
9678 if (fndecl
9679 && (attr = lookup_attribute ("error",
9680 DECL_ATTRIBUTES (fndecl))) != NULL)
9681 error ("%Kcall to %qs declared with attribute error: %s",
9682 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9683 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9684 if (fndecl
9685 && (attr = lookup_attribute ("warning",
9686 DECL_ATTRIBUTES (fndecl))) != NULL)
9687 warning_at (tree_nonartificial_location (exp),
9688 0, "%Kcall to %qs declared with attribute warning: %s",
9689 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9690 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9691
9692 /* Check for a built-in function. */
9693 if (fndecl && DECL_BUILT_IN (fndecl))
9694 {
9695 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
9696 return expand_builtin (exp, target, subtarget, tmode, ignore);
9697 }
9698 }
9699 return expand_call (exp, target, ignore);
9700
9701 case VIEW_CONVERT_EXPR:
9702 op0 = NULL_RTX;
9703
9704 /* If we are converting to BLKmode, try to avoid an intermediate
9705 temporary by fetching an inner memory reference. */
9706 if (mode == BLKmode
9707 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9708 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
9709 && handled_component_p (treeop0))
9710 {
9711 enum machine_mode mode1;
9712 HOST_WIDE_INT bitsize, bitpos;
9713 tree offset;
9714 int unsignedp;
9715 int volatilep = 0;
9716 tree tem
9717 = get_inner_reference (treeop0, &bitsize, &bitpos,
9718 &offset, &mode1, &unsignedp, &volatilep,
9719 true);
9720 rtx orig_op0;
9721
9722 /* ??? We should work harder and deal with non-zero offsets. */
9723 if (!offset
9724 && (bitpos % BITS_PER_UNIT) == 0
9725 && bitsize >= 0
9726 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
9727 {
9728 /* See the normal_inner_ref case for the rationale. */
9729 orig_op0
9730 = expand_expr (tem,
9731 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9732 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9733 != INTEGER_CST)
9734 && modifier != EXPAND_STACK_PARM
9735 ? target : NULL_RTX),
9736 VOIDmode,
9737 (modifier == EXPAND_INITIALIZER
9738 || modifier == EXPAND_CONST_ADDRESS
9739 || modifier == EXPAND_STACK_PARM)
9740 ? modifier : EXPAND_NORMAL);
9741
9742 if (MEM_P (orig_op0))
9743 {
9744 op0 = orig_op0;
9745
9746 /* Get a reference to just this component. */
9747 if (modifier == EXPAND_CONST_ADDRESS
9748 || modifier == EXPAND_SUM
9749 || modifier == EXPAND_INITIALIZER)
9750 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
9751 else
9752 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
9753
9754 if (op0 == orig_op0)
9755 op0 = copy_rtx (op0);
9756
9757 set_mem_attributes (op0, treeop0, 0);
9758 if (REG_P (XEXP (op0, 0)))
9759 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9760
9761 MEM_VOLATILE_P (op0) |= volatilep;
9762 }
9763 }
9764 }
9765
9766 if (!op0)
9767 op0 = expand_expr (treeop0,
9768 NULL_RTX, VOIDmode, modifier);
9769
9770 /* If the input and output modes are both the same, we are done. */
9771 if (mode == GET_MODE (op0))
9772 ;
9773 /* If neither mode is BLKmode, and both modes are the same size
9774 then we can use gen_lowpart. */
9775 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
9776 && (GET_MODE_PRECISION (mode)
9777 == GET_MODE_PRECISION (GET_MODE (op0)))
9778 && !COMPLEX_MODE_P (GET_MODE (op0)))
9779 {
9780 if (GET_CODE (op0) == SUBREG)
9781 op0 = force_reg (GET_MODE (op0), op0);
9782 temp = gen_lowpart_common (mode, op0);
9783 if (temp)
9784 op0 = temp;
9785 else
9786 {
9787 if (!REG_P (op0) && !MEM_P (op0))
9788 op0 = force_reg (GET_MODE (op0), op0);
9789 op0 = gen_lowpart (mode, op0);
9790 }
9791 }
9792 /* If both types are integral, convert from one mode to the other. */
9793 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
9794 op0 = convert_modes (mode, GET_MODE (op0), op0,
9795 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9796 /* As a last resort, spill op0 to memory, and reload it in a
9797 different mode. */
9798 else if (!MEM_P (op0))
9799 {
9800 /* If the operand is not a MEM, force it into memory. Since we
9801 are going to be changing the mode of the MEM, don't call
9802 force_const_mem for constants because we don't allow pool
9803 constants to change mode. */
9804 tree inner_type = TREE_TYPE (treeop0);
9805
9806 gcc_assert (!TREE_ADDRESSABLE (exp));
9807
9808 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
9809 target
9810 = assign_stack_temp_for_type
9811 (TYPE_MODE (inner_type),
9812 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
9813
9814 emit_move_insn (target, op0);
9815 op0 = target;
9816 }
9817
9818 /* At this point, OP0 is in the correct mode. If the output type is
9819 such that the operand is known to be aligned, indicate that it is.
9820 Otherwise, we need only be concerned about alignment for non-BLKmode
9821 results. */
9822 if (MEM_P (op0))
9823 {
9824 op0 = copy_rtx (op0);
9825
9826 if (TYPE_ALIGN_OK (type))
9827 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
9828 else if (STRICT_ALIGNMENT
9829 && mode != BLKmode
9830 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
9831 {
9832 tree inner_type = TREE_TYPE (treeop0);
9833 HOST_WIDE_INT temp_size
9834 = MAX (int_size_in_bytes (inner_type),
9835 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
9836 rtx new_rtx
9837 = assign_stack_temp_for_type (mode, temp_size, 0, type);
9838 rtx new_with_op0_mode
9839 = adjust_address (new_rtx, GET_MODE (op0), 0);
9840
9841 gcc_assert (!TREE_ADDRESSABLE (exp));
9842
9843 if (GET_MODE (op0) == BLKmode)
9844 emit_block_move (new_with_op0_mode, op0,
9845 GEN_INT (GET_MODE_SIZE (mode)),
9846 (modifier == EXPAND_STACK_PARM
9847 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9848 else
9849 emit_move_insn (new_with_op0_mode, op0);
9850
9851 op0 = new_rtx;
9852 }
9853
9854 op0 = adjust_address (op0, mode, 0);
9855 }
9856
9857 return op0;
9858
9859 case COND_EXPR:
9860 /* A COND_EXPR with its type being VOID_TYPE represents a
9861 conditional jump and is handled in
9862 expand_gimple_cond_expr. */
9863 gcc_assert (!VOID_TYPE_P (type));
9864
9865 /* Note that COND_EXPRs whose type is a structure or union
9866 are required to be constructed to contain assignments of
9867 a temporary variable, so that we can evaluate them here
9868 for side effect only. If type is void, we must do likewise. */
9869
9870 gcc_assert (!TREE_ADDRESSABLE (type)
9871 && !ignore
9872 && TREE_TYPE (treeop1) != void_type_node
9873 && TREE_TYPE (treeop2) != void_type_node);
9874
9875 /* If we are not to produce a result, we have no target. Otherwise,
9876 if a target was specified use it; it will not be used as an
9877 intermediate target unless it is safe. If no target, use a
9878 temporary. */
9879
9880 if (modifier != EXPAND_STACK_PARM
9881 && original_target
9882 && safe_from_p (original_target, treeop0, 1)
9883 && GET_MODE (original_target) == mode
9884 #ifdef HAVE_conditional_move
9885 && (! can_conditionally_move_p (mode)
9886 || REG_P (original_target))
9887 #endif
9888 && !MEM_P (original_target))
9889 temp = original_target;
9890 else
9891 temp = assign_temp (type, 0, 0, 1);
9892
9893 do_pending_stack_adjust ();
9894 NO_DEFER_POP;
9895 op0 = gen_label_rtx ();
9896 op1 = gen_label_rtx ();
9897 jumpifnot (treeop0, op0, -1);
9898 store_expr (treeop1, temp,
9899 modifier == EXPAND_STACK_PARM,
9900 false);
9901
9902 emit_jump_insn (gen_jump (op1));
9903 emit_barrier ();
9904 emit_label (op0);
9905 store_expr (treeop2, temp,
9906 modifier == EXPAND_STACK_PARM,
9907 false);
9908
9909 emit_label (op1);
9910 OK_DEFER_POP;
9911 return temp;
9912
9913 case VEC_COND_EXPR:
9914 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9915 return target;
9916
9917 case MODIFY_EXPR:
9918 {
9919 tree lhs = treeop0;
9920 tree rhs = treeop1;
9921 gcc_assert (ignore);
9922
9923 /* Check for |= or &= of a bitfield of size one into another bitfield
9924 of size 1. In this case, (unless we need the result of the
9925 assignment) we can do this more efficiently with a
9926 test followed by an assignment, if necessary.
9927
9928 ??? At this point, we can't get a BIT_FIELD_REF here. But if
9929 things change so we do, this code should be enhanced to
9930 support it. */
9931 if (TREE_CODE (lhs) == COMPONENT_REF
9932 && (TREE_CODE (rhs) == BIT_IOR_EXPR
9933 || TREE_CODE (rhs) == BIT_AND_EXPR)
9934 && TREE_OPERAND (rhs, 0) == lhs
9935 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
9936 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
9937 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
9938 {
9939 rtx label = gen_label_rtx ();
9940 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
9941 do_jump (TREE_OPERAND (rhs, 1),
9942 value ? label : 0,
9943 value ? 0 : label, -1);
9944 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
9945 MOVE_NONTEMPORAL (exp));
9946 do_pending_stack_adjust ();
9947 emit_label (label);
9948 return const0_rtx;
9949 }
9950
9951 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
9952 return const0_rtx;
9953 }
9954
9955 case ADDR_EXPR:
9956 return expand_expr_addr_expr (exp, target, tmode, modifier);
9957
9958 case REALPART_EXPR:
9959 op0 = expand_normal (treeop0);
9960 return read_complex_part (op0, false);
9961
9962 case IMAGPART_EXPR:
9963 op0 = expand_normal (treeop0);
9964 return read_complex_part (op0, true);
9965
9966 case RETURN_EXPR:
9967 case LABEL_EXPR:
9968 case GOTO_EXPR:
9969 case SWITCH_EXPR:
9970 case ASM_EXPR:
9971 /* Expanded in cfgexpand.c. */
9972 gcc_unreachable ();
9973
9974 case TRY_CATCH_EXPR:
9975 case CATCH_EXPR:
9976 case EH_FILTER_EXPR:
9977 case TRY_FINALLY_EXPR:
9978 /* Lowered by tree-eh.c. */
9979 gcc_unreachable ();
9980
9981 case WITH_CLEANUP_EXPR:
9982 case CLEANUP_POINT_EXPR:
9983 case TARGET_EXPR:
9984 case CASE_LABEL_EXPR:
9985 case VA_ARG_EXPR:
9986 case BIND_EXPR:
9987 case INIT_EXPR:
9988 case CONJ_EXPR:
9989 case COMPOUND_EXPR:
9990 case PREINCREMENT_EXPR:
9991 case PREDECREMENT_EXPR:
9992 case POSTINCREMENT_EXPR:
9993 case POSTDECREMENT_EXPR:
9994 case LOOP_EXPR:
9995 case EXIT_EXPR:
9996 /* Lowered by gimplify.c. */
9997 gcc_unreachable ();
9998
9999 case FDESC_EXPR:
10000 /* Function descriptors are not valid except for as
10001 initialization constants, and should not be expanded. */
10002 gcc_unreachable ();
10003
10004 case WITH_SIZE_EXPR:
10005 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10006 have pulled out the size to use in whatever context it needed. */
10007 return expand_expr_real (treeop0, original_target, tmode,
10008 modifier, alt_rtl);
10009
10010 case COMPOUND_LITERAL_EXPR:
10011 {
10012 /* Initialize the anonymous variable declared in the compound
10013 literal, then return the variable. */
10014 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
10015
10016 /* Create RTL for this variable. */
10017 if (!DECL_RTL_SET_P (decl))
10018 {
10019 if (DECL_HARD_REGISTER (decl))
10020 /* The user specified an assembler name for this variable.
10021 Set that up now. */
10022 rest_of_decl_compilation (decl, 0, 0);
10023 else
10024 expand_decl (decl);
10025 }
10026
10027 return expand_expr_real (decl, original_target, tmode,
10028 modifier, alt_rtl);
10029 }
10030
10031 default:
10032 return expand_expr_real_2 (&ops, target, tmode, modifier);
10033 }
10034 }
10035 \f
10036 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10037 signedness of TYPE), possibly returning the result in TARGET. */
10038 static rtx
10039 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10040 {
10041 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10042 if (target && GET_MODE (target) != GET_MODE (exp))
10043 target = 0;
10044 /* For constant values, reduce using build_int_cst_type. */
10045 if (CONST_INT_P (exp))
10046 {
10047 HOST_WIDE_INT value = INTVAL (exp);
10048 tree t = build_int_cst_type (type, value);
10049 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10050 }
10051 else if (TYPE_UNSIGNED (type))
10052 {
10053 rtx mask = immed_double_int_const (double_int_mask (prec),
10054 GET_MODE (exp));
10055 return expand_and (GET_MODE (exp), exp, mask, target);
10056 }
10057 else
10058 {
10059 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10060 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10061 exp, count, target, 0);
10062 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10063 exp, count, target, 0);
10064 }
10065 }
10066 \f
10067 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10068 when applied to the address of EXP produces an address known to be
10069 aligned more than BIGGEST_ALIGNMENT. */
10070
10071 static int
10072 is_aligning_offset (const_tree offset, const_tree exp)
10073 {
10074 /* Strip off any conversions. */
10075 while (CONVERT_EXPR_P (offset))
10076 offset = TREE_OPERAND (offset, 0);
10077
10078 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10079 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10080 if (TREE_CODE (offset) != BIT_AND_EXPR
10081 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10082 || compare_tree_int (TREE_OPERAND (offset, 1),
10083 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10084 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10085 return 0;
10086
10087 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10088 It must be NEGATE_EXPR. Then strip any more conversions. */
10089 offset = TREE_OPERAND (offset, 0);
10090 while (CONVERT_EXPR_P (offset))
10091 offset = TREE_OPERAND (offset, 0);
10092
10093 if (TREE_CODE (offset) != NEGATE_EXPR)
10094 return 0;
10095
10096 offset = TREE_OPERAND (offset, 0);
10097 while (CONVERT_EXPR_P (offset))
10098 offset = TREE_OPERAND (offset, 0);
10099
10100 /* This must now be the address of EXP. */
10101 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10102 }
10103 \f
10104 /* Return the tree node if an ARG corresponds to a string constant or zero
10105 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10106 in bytes within the string that ARG is accessing. The type of the
10107 offset will be `sizetype'. */
10108
10109 tree
10110 string_constant (tree arg, tree *ptr_offset)
10111 {
10112 tree array, offset, lower_bound;
10113 STRIP_NOPS (arg);
10114
10115 if (TREE_CODE (arg) == ADDR_EXPR)
10116 {
10117 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10118 {
10119 *ptr_offset = size_zero_node;
10120 return TREE_OPERAND (arg, 0);
10121 }
10122 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10123 {
10124 array = TREE_OPERAND (arg, 0);
10125 offset = size_zero_node;
10126 }
10127 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10128 {
10129 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10130 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10131 if (TREE_CODE (array) != STRING_CST
10132 && TREE_CODE (array) != VAR_DECL)
10133 return 0;
10134
10135 /* Check if the array has a nonzero lower bound. */
10136 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10137 if (!integer_zerop (lower_bound))
10138 {
10139 /* If the offset and base aren't both constants, return 0. */
10140 if (TREE_CODE (lower_bound) != INTEGER_CST)
10141 return 0;
10142 if (TREE_CODE (offset) != INTEGER_CST)
10143 return 0;
10144 /* Adjust offset by the lower bound. */
10145 offset = size_diffop (fold_convert (sizetype, offset),
10146 fold_convert (sizetype, lower_bound));
10147 }
10148 }
10149 else
10150 return 0;
10151 }
10152 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10153 {
10154 tree arg0 = TREE_OPERAND (arg, 0);
10155 tree arg1 = TREE_OPERAND (arg, 1);
10156
10157 STRIP_NOPS (arg0);
10158 STRIP_NOPS (arg1);
10159
10160 if (TREE_CODE (arg0) == ADDR_EXPR
10161 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10162 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10163 {
10164 array = TREE_OPERAND (arg0, 0);
10165 offset = arg1;
10166 }
10167 else if (TREE_CODE (arg1) == ADDR_EXPR
10168 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10169 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10170 {
10171 array = TREE_OPERAND (arg1, 0);
10172 offset = arg0;
10173 }
10174 else
10175 return 0;
10176 }
10177 else
10178 return 0;
10179
10180 if (TREE_CODE (array) == STRING_CST)
10181 {
10182 *ptr_offset = fold_convert (sizetype, offset);
10183 return array;
10184 }
10185 else if (TREE_CODE (array) == VAR_DECL
10186 || TREE_CODE (array) == CONST_DECL)
10187 {
10188 int length;
10189
10190 /* Variables initialized to string literals can be handled too. */
10191 if (!const_value_known_p (array)
10192 || !DECL_INITIAL (array)
10193 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10194 return 0;
10195
10196 /* Avoid const char foo[4] = "abcde"; */
10197 if (DECL_SIZE_UNIT (array) == NULL_TREE
10198 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10199 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10200 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10201 return 0;
10202
10203 /* If variable is bigger than the string literal, OFFSET must be constant
10204 and inside of the bounds of the string literal. */
10205 offset = fold_convert (sizetype, offset);
10206 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10207 && (! host_integerp (offset, 1)
10208 || compare_tree_int (offset, length) >= 0))
10209 return 0;
10210
10211 *ptr_offset = offset;
10212 return DECL_INITIAL (array);
10213 }
10214
10215 return 0;
10216 }
10217 \f
10218 /* Generate code to calculate OPS, and exploded expression
10219 using a store-flag instruction and return an rtx for the result.
10220 OPS reflects a comparison.
10221
10222 If TARGET is nonzero, store the result there if convenient.
10223
10224 Return zero if there is no suitable set-flag instruction
10225 available on this machine.
10226
10227 Once expand_expr has been called on the arguments of the comparison,
10228 we are committed to doing the store flag, since it is not safe to
10229 re-evaluate the expression. We emit the store-flag insn by calling
10230 emit_store_flag, but only expand the arguments if we have a reason
10231 to believe that emit_store_flag will be successful. If we think that
10232 it will, but it isn't, we have to simulate the store-flag with a
10233 set/jump/set sequence. */
10234
10235 static rtx
10236 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10237 {
10238 enum rtx_code code;
10239 tree arg0, arg1, type;
10240 tree tem;
10241 enum machine_mode operand_mode;
10242 int unsignedp;
10243 rtx op0, op1;
10244 rtx subtarget = target;
10245 location_t loc = ops->location;
10246
10247 arg0 = ops->op0;
10248 arg1 = ops->op1;
10249
10250 /* Don't crash if the comparison was erroneous. */
10251 if (arg0 == error_mark_node || arg1 == error_mark_node)
10252 return const0_rtx;
10253
10254 type = TREE_TYPE (arg0);
10255 operand_mode = TYPE_MODE (type);
10256 unsignedp = TYPE_UNSIGNED (type);
10257
10258 /* We won't bother with BLKmode store-flag operations because it would mean
10259 passing a lot of information to emit_store_flag. */
10260 if (operand_mode == BLKmode)
10261 return 0;
10262
10263 /* We won't bother with store-flag operations involving function pointers
10264 when function pointers must be canonicalized before comparisons. */
10265 #ifdef HAVE_canonicalize_funcptr_for_compare
10266 if (HAVE_canonicalize_funcptr_for_compare
10267 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10268 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10269 == FUNCTION_TYPE))
10270 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10271 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10272 == FUNCTION_TYPE))))
10273 return 0;
10274 #endif
10275
10276 STRIP_NOPS (arg0);
10277 STRIP_NOPS (arg1);
10278
10279 /* Get the rtx comparison code to use. We know that EXP is a comparison
10280 operation of some type. Some comparisons against 1 and -1 can be
10281 converted to comparisons with zero. Do so here so that the tests
10282 below will be aware that we have a comparison with zero. These
10283 tests will not catch constants in the first operand, but constants
10284 are rarely passed as the first operand. */
10285
10286 switch (ops->code)
10287 {
10288 case EQ_EXPR:
10289 code = EQ;
10290 break;
10291 case NE_EXPR:
10292 code = NE;
10293 break;
10294 case LT_EXPR:
10295 if (integer_onep (arg1))
10296 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10297 else
10298 code = unsignedp ? LTU : LT;
10299 break;
10300 case LE_EXPR:
10301 if (! unsignedp && integer_all_onesp (arg1))
10302 arg1 = integer_zero_node, code = LT;
10303 else
10304 code = unsignedp ? LEU : LE;
10305 break;
10306 case GT_EXPR:
10307 if (! unsignedp && integer_all_onesp (arg1))
10308 arg1 = integer_zero_node, code = GE;
10309 else
10310 code = unsignedp ? GTU : GT;
10311 break;
10312 case GE_EXPR:
10313 if (integer_onep (arg1))
10314 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10315 else
10316 code = unsignedp ? GEU : GE;
10317 break;
10318
10319 case UNORDERED_EXPR:
10320 code = UNORDERED;
10321 break;
10322 case ORDERED_EXPR:
10323 code = ORDERED;
10324 break;
10325 case UNLT_EXPR:
10326 code = UNLT;
10327 break;
10328 case UNLE_EXPR:
10329 code = UNLE;
10330 break;
10331 case UNGT_EXPR:
10332 code = UNGT;
10333 break;
10334 case UNGE_EXPR:
10335 code = UNGE;
10336 break;
10337 case UNEQ_EXPR:
10338 code = UNEQ;
10339 break;
10340 case LTGT_EXPR:
10341 code = LTGT;
10342 break;
10343
10344 default:
10345 gcc_unreachable ();
10346 }
10347
10348 /* Put a constant second. */
10349 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10350 || TREE_CODE (arg0) == FIXED_CST)
10351 {
10352 tem = arg0; arg0 = arg1; arg1 = tem;
10353 code = swap_condition (code);
10354 }
10355
10356 /* If this is an equality or inequality test of a single bit, we can
10357 do this by shifting the bit being tested to the low-order bit and
10358 masking the result with the constant 1. If the condition was EQ,
10359 we xor it with 1. This does not require an scc insn and is faster
10360 than an scc insn even if we have it.
10361
10362 The code to make this transformation was moved into fold_single_bit_test,
10363 so we just call into the folder and expand its result. */
10364
10365 if ((code == NE || code == EQ)
10366 && TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1)
10367 && integer_pow2p (TREE_OPERAND (arg0, 1))
10368 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10369 {
10370 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10371 return expand_expr (fold_single_bit_test (loc,
10372 code == NE ? NE_EXPR : EQ_EXPR,
10373 arg0, arg1, type),
10374 target, VOIDmode, EXPAND_NORMAL);
10375 }
10376
10377 if (! get_subtarget (target)
10378 || GET_MODE (subtarget) != operand_mode)
10379 subtarget = 0;
10380
10381 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10382
10383 if (target == 0)
10384 target = gen_reg_rtx (mode);
10385
10386 /* Try a cstore if possible. */
10387 return emit_store_flag_force (target, code, op0, op1,
10388 operand_mode, unsignedp,
10389 (TYPE_PRECISION (ops->type) == 1
10390 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10391 }
10392 \f
10393
10394 /* Stubs in case we haven't got a casesi insn. */
10395 #ifndef HAVE_casesi
10396 # define HAVE_casesi 0
10397 # define gen_casesi(a, b, c, d, e) (0)
10398 # define CODE_FOR_casesi CODE_FOR_nothing
10399 #endif
10400
10401 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10402 0 otherwise (i.e. if there is no casesi instruction). */
10403 int
10404 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10405 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10406 rtx fallback_label ATTRIBUTE_UNUSED)
10407 {
10408 struct expand_operand ops[5];
10409 enum machine_mode index_mode = SImode;
10410 int index_bits = GET_MODE_BITSIZE (index_mode);
10411 rtx op1, op2, index;
10412
10413 if (! HAVE_casesi)
10414 return 0;
10415
10416 /* Convert the index to SImode. */
10417 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10418 {
10419 enum machine_mode omode = TYPE_MODE (index_type);
10420 rtx rangertx = expand_normal (range);
10421
10422 /* We must handle the endpoints in the original mode. */
10423 index_expr = build2 (MINUS_EXPR, index_type,
10424 index_expr, minval);
10425 minval = integer_zero_node;
10426 index = expand_normal (index_expr);
10427 if (default_label)
10428 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10429 omode, 1, default_label);
10430 /* Now we can safely truncate. */
10431 index = convert_to_mode (index_mode, index, 0);
10432 }
10433 else
10434 {
10435 if (TYPE_MODE (index_type) != index_mode)
10436 {
10437 index_type = lang_hooks.types.type_for_size (index_bits, 0);
10438 index_expr = fold_convert (index_type, index_expr);
10439 }
10440
10441 index = expand_normal (index_expr);
10442 }
10443
10444 do_pending_stack_adjust ();
10445
10446 op1 = expand_normal (minval);
10447 op2 = expand_normal (range);
10448
10449 create_input_operand (&ops[0], index, index_mode);
10450 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10451 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10452 create_fixed_operand (&ops[3], table_label);
10453 create_fixed_operand (&ops[4], (default_label
10454 ? default_label
10455 : fallback_label));
10456 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10457 return 1;
10458 }
10459
10460 /* Attempt to generate a tablejump instruction; same concept. */
10461 #ifndef HAVE_tablejump
10462 #define HAVE_tablejump 0
10463 #define gen_tablejump(x, y) (0)
10464 #endif
10465
10466 /* Subroutine of the next function.
10467
10468 INDEX is the value being switched on, with the lowest value
10469 in the table already subtracted.
10470 MODE is its expected mode (needed if INDEX is constant).
10471 RANGE is the length of the jump table.
10472 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10473
10474 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10475 index value is out of range. */
10476
10477 static void
10478 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10479 rtx default_label)
10480 {
10481 rtx temp, vector;
10482
10483 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10484 cfun->cfg->max_jumptable_ents = INTVAL (range);
10485
10486 /* Do an unsigned comparison (in the proper mode) between the index
10487 expression and the value which represents the length of the range.
10488 Since we just finished subtracting the lower bound of the range
10489 from the index expression, this comparison allows us to simultaneously
10490 check that the original index expression value is both greater than
10491 or equal to the minimum value of the range and less than or equal to
10492 the maximum value of the range. */
10493
10494 if (default_label)
10495 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10496 default_label);
10497
10498 /* If index is in range, it must fit in Pmode.
10499 Convert to Pmode so we can index with it. */
10500 if (mode != Pmode)
10501 index = convert_to_mode (Pmode, index, 1);
10502
10503 /* Don't let a MEM slip through, because then INDEX that comes
10504 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10505 and break_out_memory_refs will go to work on it and mess it up. */
10506 #ifdef PIC_CASE_VECTOR_ADDRESS
10507 if (flag_pic && !REG_P (index))
10508 index = copy_to_mode_reg (Pmode, index);
10509 #endif
10510
10511 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10512 GET_MODE_SIZE, because this indicates how large insns are. The other
10513 uses should all be Pmode, because they are addresses. This code
10514 could fail if addresses and insns are not the same size. */
10515 index = gen_rtx_PLUS (Pmode,
10516 gen_rtx_MULT (Pmode, index,
10517 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10518 gen_rtx_LABEL_REF (Pmode, table_label));
10519 #ifdef PIC_CASE_VECTOR_ADDRESS
10520 if (flag_pic)
10521 index = PIC_CASE_VECTOR_ADDRESS (index);
10522 else
10523 #endif
10524 index = memory_address (CASE_VECTOR_MODE, index);
10525 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10526 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10527 convert_move (temp, vector, 0);
10528
10529 emit_jump_insn (gen_tablejump (temp, table_label));
10530
10531 /* If we are generating PIC code or if the table is PC-relative, the
10532 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10533 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10534 emit_barrier ();
10535 }
10536
10537 int
10538 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10539 rtx table_label, rtx default_label)
10540 {
10541 rtx index;
10542
10543 if (! HAVE_tablejump)
10544 return 0;
10545
10546 index_expr = fold_build2 (MINUS_EXPR, index_type,
10547 fold_convert (index_type, index_expr),
10548 fold_convert (index_type, minval));
10549 index = expand_normal (index_expr);
10550 do_pending_stack_adjust ();
10551
10552 do_tablejump (index, TYPE_MODE (index_type),
10553 convert_modes (TYPE_MODE (index_type),
10554 TYPE_MODE (TREE_TYPE (range)),
10555 expand_normal (range),
10556 TYPE_UNSIGNED (TREE_TYPE (range))),
10557 table_label, default_label);
10558 return 1;
10559 }
10560
10561 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10562 static rtx
10563 const_vector_from_tree (tree exp)
10564 {
10565 rtvec v;
10566 int units, i;
10567 tree link, elt;
10568 enum machine_mode inner, mode;
10569
10570 mode = TYPE_MODE (TREE_TYPE (exp));
10571
10572 if (initializer_zerop (exp))
10573 return CONST0_RTX (mode);
10574
10575 units = GET_MODE_NUNITS (mode);
10576 inner = GET_MODE_INNER (mode);
10577
10578 v = rtvec_alloc (units);
10579
10580 link = TREE_VECTOR_CST_ELTS (exp);
10581 for (i = 0; link; link = TREE_CHAIN (link), ++i)
10582 {
10583 elt = TREE_VALUE (link);
10584
10585 if (TREE_CODE (elt) == REAL_CST)
10586 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10587 inner);
10588 else if (TREE_CODE (elt) == FIXED_CST)
10589 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10590 inner);
10591 else
10592 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10593 inner);
10594 }
10595
10596 /* Initialize remaining elements to 0. */
10597 for (; i < units; ++i)
10598 RTVEC_ELT (v, i) = CONST0_RTX (inner);
10599
10600 return gen_rtx_CONST_VECTOR (mode, v);
10601 }
10602
10603 /* Build a decl for a personality function given a language prefix. */
10604
10605 tree
10606 build_personality_function (const char *lang)
10607 {
10608 const char *unwind_and_version;
10609 tree decl, type;
10610 char *name;
10611
10612 switch (targetm_common.except_unwind_info (&global_options))
10613 {
10614 case UI_NONE:
10615 return NULL;
10616 case UI_SJLJ:
10617 unwind_and_version = "_sj0";
10618 break;
10619 case UI_DWARF2:
10620 case UI_TARGET:
10621 unwind_and_version = "_v0";
10622 break;
10623 default:
10624 gcc_unreachable ();
10625 }
10626
10627 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
10628
10629 type = build_function_type_list (integer_type_node, integer_type_node,
10630 long_long_unsigned_type_node,
10631 ptr_type_node, ptr_type_node, NULL_TREE);
10632 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
10633 get_identifier (name), type);
10634 DECL_ARTIFICIAL (decl) = 1;
10635 DECL_EXTERNAL (decl) = 1;
10636 TREE_PUBLIC (decl) = 1;
10637
10638 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
10639 are the flags assigned by targetm.encode_section_info. */
10640 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
10641
10642 return decl;
10643 }
10644
10645 /* Extracts the personality function of DECL and returns the corresponding
10646 libfunc. */
10647
10648 rtx
10649 get_personality_function (tree decl)
10650 {
10651 tree personality = DECL_FUNCTION_PERSONALITY (decl);
10652 enum eh_personality_kind pk;
10653
10654 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
10655 if (pk == eh_personality_none)
10656 return NULL;
10657
10658 if (!personality
10659 && pk == eh_personality_any)
10660 personality = lang_hooks.eh_personality ();
10661
10662 if (pk == eh_personality_lang)
10663 gcc_assert (personality != NULL_TREE);
10664
10665 return XEXP (DECL_RTL (personality), 0);
10666 }
10667
10668 #include "gt-expr.h"