expr.c (expand_expr_real_2): Handle larger sizetype in POINTER_PLUS_EXPR.
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
4 2012 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "common/common-target.h"
53 #include "timevar.h"
54 #include "df.h"
55 #include "diagnostic.h"
56 #include "ssaexpand.h"
57 #include "target-globals.h"
58 #include "params.h"
59
60 /* Decide whether a function's arguments should be processed
61 from first to last or from last to first.
62
63 They should if the stack and args grow in opposite directions, but
64 only if we have push insns. */
65
66 #ifdef PUSH_ROUNDING
67
68 #ifndef PUSH_ARGS_REVERSED
69 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
70 #define PUSH_ARGS_REVERSED /* If it's last to first. */
71 #endif
72 #endif
73
74 #endif
75
76 #ifndef STACK_PUSH_CODE
77 #ifdef STACK_GROWS_DOWNWARD
78 #define STACK_PUSH_CODE PRE_DEC
79 #else
80 #define STACK_PUSH_CODE PRE_INC
81 #endif
82 #endif
83
84
85 /* If this is nonzero, we do not bother generating VOLATILE
86 around volatile memory references, and we are willing to
87 output indirect addresses. If cse is to follow, we reject
88 indirect addresses so a useful potential cse is generated;
89 if it is used only once, instruction combination will produce
90 the same indirect address eventually. */
91 int cse_not_expected;
92
93 /* This structure is used by move_by_pieces to describe the move to
94 be performed. */
95 struct move_by_pieces_d
96 {
97 rtx to;
98 rtx to_addr;
99 int autinc_to;
100 int explicit_inc_to;
101 rtx from;
102 rtx from_addr;
103 int autinc_from;
104 int explicit_inc_from;
105 unsigned HOST_WIDE_INT len;
106 HOST_WIDE_INT offset;
107 int reverse;
108 };
109
110 /* This structure is used by store_by_pieces to describe the clear to
111 be performed. */
112
113 struct store_by_pieces_d
114 {
115 rtx to;
116 rtx to_addr;
117 int autinc_to;
118 int explicit_inc_to;
119 unsigned HOST_WIDE_INT len;
120 HOST_WIDE_INT offset;
121 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
122 void *constfundata;
123 int reverse;
124 };
125
126 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
127 struct move_by_pieces_d *);
128 static bool block_move_libcall_safe_for_call_parm (void);
129 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
130 static tree emit_block_move_libcall_fn (int);
131 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
132 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
133 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
134 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
135 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
136 struct store_by_pieces_d *);
137 static tree clear_storage_libcall_fn (int);
138 static rtx compress_float_constant (rtx, rtx);
139 static rtx get_subtarget (rtx);
140 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
141 HOST_WIDE_INT, enum machine_mode,
142 tree, tree, int, alias_set_type);
143 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
144 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
145 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
146 enum machine_mode,
147 tree, tree, alias_set_type, bool);
148
149 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
150
151 static int is_aligning_offset (const_tree, const_tree);
152 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
153 enum expand_modifier);
154 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
155 static rtx do_store_flag (sepops, rtx, enum machine_mode);
156 #ifdef PUSH_ROUNDING
157 static void emit_single_push_insn (enum machine_mode, rtx, tree);
158 #endif
159 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
160 static rtx const_vector_from_tree (tree);
161 static void write_complex_part (rtx, rtx, bool);
162
163 /* This macro is used to determine whether move_by_pieces should be called
164 to perform a structure copy. */
165 #ifndef MOVE_BY_PIECES_P
166 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
167 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
168 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
169 #endif
170
171 /* This macro is used to determine whether clear_by_pieces should be
172 called to clear storage. */
173 #ifndef CLEAR_BY_PIECES_P
174 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
175 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
176 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
177 #endif
178
179 /* This macro is used to determine whether store_by_pieces should be
180 called to "memset" storage with byte values other than zero. */
181 #ifndef SET_BY_PIECES_P
182 #define SET_BY_PIECES_P(SIZE, ALIGN) \
183 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
184 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
185 #endif
186
187 /* This macro is used to determine whether store_by_pieces should be
188 called to "memcpy" storage when the source is a constant string. */
189 #ifndef STORE_BY_PIECES_P
190 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
191 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
192 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
193 #endif
194
195 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
196
197 #ifndef SLOW_UNALIGNED_ACCESS
198 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
199 #endif
200 \f
201 /* This is run to set up which modes can be used
202 directly in memory and to initialize the block move optab. It is run
203 at the beginning of compilation and when the target is reinitialized. */
204
205 void
206 init_expr_target (void)
207 {
208 rtx insn, pat;
209 enum machine_mode mode;
210 int num_clobbers;
211 rtx mem, mem1;
212 rtx reg;
213
214 /* Try indexing by frame ptr and try by stack ptr.
215 It is known that on the Convex the stack ptr isn't a valid index.
216 With luck, one or the other is valid on any machine. */
217 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
218 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
219
220 /* A scratch register we can modify in-place below to avoid
221 useless RTL allocations. */
222 reg = gen_rtx_REG (VOIDmode, -1);
223
224 insn = rtx_alloc (INSN);
225 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
226 PATTERN (insn) = pat;
227
228 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
229 mode = (enum machine_mode) ((int) mode + 1))
230 {
231 int regno;
232
233 direct_load[(int) mode] = direct_store[(int) mode] = 0;
234 PUT_MODE (mem, mode);
235 PUT_MODE (mem1, mode);
236 PUT_MODE (reg, mode);
237
238 /* See if there is some register that can be used in this mode and
239 directly loaded or stored from memory. */
240
241 if (mode != VOIDmode && mode != BLKmode)
242 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
243 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
244 regno++)
245 {
246 if (! HARD_REGNO_MODE_OK (regno, mode))
247 continue;
248
249 SET_REGNO (reg, regno);
250
251 SET_SRC (pat) = mem;
252 SET_DEST (pat) = reg;
253 if (recog (pat, insn, &num_clobbers) >= 0)
254 direct_load[(int) mode] = 1;
255
256 SET_SRC (pat) = mem1;
257 SET_DEST (pat) = reg;
258 if (recog (pat, insn, &num_clobbers) >= 0)
259 direct_load[(int) mode] = 1;
260
261 SET_SRC (pat) = reg;
262 SET_DEST (pat) = mem;
263 if (recog (pat, insn, &num_clobbers) >= 0)
264 direct_store[(int) mode] = 1;
265
266 SET_SRC (pat) = reg;
267 SET_DEST (pat) = mem1;
268 if (recog (pat, insn, &num_clobbers) >= 0)
269 direct_store[(int) mode] = 1;
270 }
271 }
272
273 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
274
275 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
276 mode = GET_MODE_WIDER_MODE (mode))
277 {
278 enum machine_mode srcmode;
279 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
280 srcmode = GET_MODE_WIDER_MODE (srcmode))
281 {
282 enum insn_code ic;
283
284 ic = can_extend_p (mode, srcmode, 0);
285 if (ic == CODE_FOR_nothing)
286 continue;
287
288 PUT_MODE (mem, srcmode);
289
290 if (insn_operand_matches (ic, 1, mem))
291 float_extend_from_mem[mode][srcmode] = true;
292 }
293 }
294 }
295
296 /* This is run at the start of compiling a function. */
297
298 void
299 init_expr (void)
300 {
301 memset (&crtl->expr, 0, sizeof (crtl->expr));
302 }
303 \f
304 /* Copy data from FROM to TO, where the machine modes are not the same.
305 Both modes may be integer, or both may be floating, or both may be
306 fixed-point.
307 UNSIGNEDP should be nonzero if FROM is an unsigned type.
308 This causes zero-extension instead of sign-extension. */
309
310 void
311 convert_move (rtx to, rtx from, int unsignedp)
312 {
313 enum machine_mode to_mode = GET_MODE (to);
314 enum machine_mode from_mode = GET_MODE (from);
315 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
316 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
317 enum insn_code code;
318 rtx libcall;
319
320 /* rtx code for making an equivalent value. */
321 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
322 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
323
324
325 gcc_assert (to_real == from_real);
326 gcc_assert (to_mode != BLKmode);
327 gcc_assert (from_mode != BLKmode);
328
329 /* If the source and destination are already the same, then there's
330 nothing to do. */
331 if (to == from)
332 return;
333
334 /* If FROM is a SUBREG that indicates that we have already done at least
335 the required extension, strip it. We don't handle such SUBREGs as
336 TO here. */
337
338 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
339 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
340 >= GET_MODE_PRECISION (to_mode))
341 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
342 from = gen_lowpart (to_mode, from), from_mode = to_mode;
343
344 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
345
346 if (to_mode == from_mode
347 || (from_mode == VOIDmode && CONSTANT_P (from)))
348 {
349 emit_move_insn (to, from);
350 return;
351 }
352
353 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
354 {
355 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
356
357 if (VECTOR_MODE_P (to_mode))
358 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
359 else
360 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
361
362 emit_move_insn (to, from);
363 return;
364 }
365
366 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
367 {
368 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
369 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
370 return;
371 }
372
373 if (to_real)
374 {
375 rtx value, insns;
376 convert_optab tab;
377
378 gcc_assert ((GET_MODE_PRECISION (from_mode)
379 != GET_MODE_PRECISION (to_mode))
380 || (DECIMAL_FLOAT_MODE_P (from_mode)
381 != DECIMAL_FLOAT_MODE_P (to_mode)));
382
383 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
384 /* Conversion between decimal float and binary float, same size. */
385 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
386 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
387 tab = sext_optab;
388 else
389 tab = trunc_optab;
390
391 /* Try converting directly if the insn is supported. */
392
393 code = convert_optab_handler (tab, to_mode, from_mode);
394 if (code != CODE_FOR_nothing)
395 {
396 emit_unop_insn (code, to, from,
397 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
398 return;
399 }
400
401 /* Otherwise use a libcall. */
402 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
403
404 /* Is this conversion implemented yet? */
405 gcc_assert (libcall);
406
407 start_sequence ();
408 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
409 1, from, from_mode);
410 insns = get_insns ();
411 end_sequence ();
412 emit_libcall_block (insns, to, value,
413 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
414 from)
415 : gen_rtx_FLOAT_EXTEND (to_mode, from));
416 return;
417 }
418
419 /* Handle pointer conversion. */ /* SPEE 900220. */
420 /* Targets are expected to provide conversion insns between PxImode and
421 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
422 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
423 {
424 enum machine_mode full_mode
425 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
426
427 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
428 != CODE_FOR_nothing);
429
430 if (full_mode != from_mode)
431 from = convert_to_mode (full_mode, from, unsignedp);
432 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
433 to, from, UNKNOWN);
434 return;
435 }
436 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
437 {
438 rtx new_from;
439 enum machine_mode full_mode
440 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
441
442 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)
443 != CODE_FOR_nothing);
444
445 if (to_mode == full_mode)
446 {
447 emit_unop_insn (convert_optab_handler (sext_optab, full_mode,
448 from_mode),
449 to, from, UNKNOWN);
450 return;
451 }
452
453 new_from = gen_reg_rtx (full_mode);
454 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode),
455 new_from, from, UNKNOWN);
456
457 /* else proceed to integer conversions below. */
458 from_mode = full_mode;
459 from = new_from;
460 }
461
462 /* Make sure both are fixed-point modes or both are not. */
463 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
464 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
465 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
466 {
467 /* If we widen from_mode to to_mode and they are in the same class,
468 we won't saturate the result.
469 Otherwise, always saturate the result to play safe. */
470 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
471 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
472 expand_fixed_convert (to, from, 0, 0);
473 else
474 expand_fixed_convert (to, from, 0, 1);
475 return;
476 }
477
478 /* Now both modes are integers. */
479
480 /* Handle expanding beyond a word. */
481 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
482 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
483 {
484 rtx insns;
485 rtx lowpart;
486 rtx fill_value;
487 rtx lowfrom;
488 int i;
489 enum machine_mode lowpart_mode;
490 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
491
492 /* Try converting directly if the insn is supported. */
493 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
494 != CODE_FOR_nothing)
495 {
496 /* If FROM is a SUBREG, put it into a register. Do this
497 so that we always generate the same set of insns for
498 better cse'ing; if an intermediate assignment occurred,
499 we won't be doing the operation directly on the SUBREG. */
500 if (optimize > 0 && GET_CODE (from) == SUBREG)
501 from = force_reg (from_mode, from);
502 emit_unop_insn (code, to, from, equiv_code);
503 return;
504 }
505 /* Next, try converting via full word. */
506 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
507 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
508 != CODE_FOR_nothing))
509 {
510 rtx word_to = gen_reg_rtx (word_mode);
511 if (REG_P (to))
512 {
513 if (reg_overlap_mentioned_p (to, from))
514 from = force_reg (from_mode, from);
515 emit_clobber (to);
516 }
517 convert_move (word_to, from, unsignedp);
518 emit_unop_insn (code, to, word_to, equiv_code);
519 return;
520 }
521
522 /* No special multiword conversion insn; do it by hand. */
523 start_sequence ();
524
525 /* Since we will turn this into a no conflict block, we must ensure
526 that the source does not overlap the target. */
527
528 if (reg_overlap_mentioned_p (to, from))
529 from = force_reg (from_mode, from);
530
531 /* Get a copy of FROM widened to a word, if necessary. */
532 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
533 lowpart_mode = word_mode;
534 else
535 lowpart_mode = from_mode;
536
537 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
538
539 lowpart = gen_lowpart (lowpart_mode, to);
540 emit_move_insn (lowpart, lowfrom);
541
542 /* Compute the value to put in each remaining word. */
543 if (unsignedp)
544 fill_value = const0_rtx;
545 else
546 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
547 LT, lowfrom, const0_rtx,
548 VOIDmode, 0, -1);
549
550 /* Fill the remaining words. */
551 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
552 {
553 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
554 rtx subword = operand_subword (to, index, 1, to_mode);
555
556 gcc_assert (subword);
557
558 if (fill_value != subword)
559 emit_move_insn (subword, fill_value);
560 }
561
562 insns = get_insns ();
563 end_sequence ();
564
565 emit_insn (insns);
566 return;
567 }
568
569 /* Truncating multi-word to a word or less. */
570 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
571 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
572 {
573 if (!((MEM_P (from)
574 && ! MEM_VOLATILE_P (from)
575 && direct_load[(int) to_mode]
576 && ! mode_dependent_address_p (XEXP (from, 0)))
577 || REG_P (from)
578 || GET_CODE (from) == SUBREG))
579 from = force_reg (from_mode, from);
580 convert_move (to, gen_lowpart (word_mode, from), 0);
581 return;
582 }
583
584 /* Now follow all the conversions between integers
585 no more than a word long. */
586
587 /* For truncation, usually we can just refer to FROM in a narrower mode. */
588 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
589 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
590 {
591 if (!((MEM_P (from)
592 && ! MEM_VOLATILE_P (from)
593 && direct_load[(int) to_mode]
594 && ! mode_dependent_address_p (XEXP (from, 0)))
595 || REG_P (from)
596 || GET_CODE (from) == SUBREG))
597 from = force_reg (from_mode, from);
598 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
599 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
600 from = copy_to_reg (from);
601 emit_move_insn (to, gen_lowpart (to_mode, from));
602 return;
603 }
604
605 /* Handle extension. */
606 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
607 {
608 /* Convert directly if that works. */
609 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
610 != CODE_FOR_nothing)
611 {
612 emit_unop_insn (code, to, from, equiv_code);
613 return;
614 }
615 else
616 {
617 enum machine_mode intermediate;
618 rtx tmp;
619 int shift_amount;
620
621 /* Search for a mode to convert via. */
622 for (intermediate = from_mode; intermediate != VOIDmode;
623 intermediate = GET_MODE_WIDER_MODE (intermediate))
624 if (((can_extend_p (to_mode, intermediate, unsignedp)
625 != CODE_FOR_nothing)
626 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
627 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
628 && (can_extend_p (intermediate, from_mode, unsignedp)
629 != CODE_FOR_nothing))
630 {
631 convert_move (to, convert_to_mode (intermediate, from,
632 unsignedp), unsignedp);
633 return;
634 }
635
636 /* No suitable intermediate mode.
637 Generate what we need with shifts. */
638 shift_amount = (GET_MODE_PRECISION (to_mode)
639 - GET_MODE_PRECISION (from_mode));
640 from = gen_lowpart (to_mode, force_reg (from_mode, from));
641 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
642 to, unsignedp);
643 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
644 to, unsignedp);
645 if (tmp != to)
646 emit_move_insn (to, tmp);
647 return;
648 }
649 }
650
651 /* Support special truncate insns for certain modes. */
652 if (convert_optab_handler (trunc_optab, to_mode,
653 from_mode) != CODE_FOR_nothing)
654 {
655 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
656 to, from, UNKNOWN);
657 return;
658 }
659
660 /* Handle truncation of volatile memrefs, and so on;
661 the things that couldn't be truncated directly,
662 and for which there was no special instruction.
663
664 ??? Code above formerly short-circuited this, for most integer
665 mode pairs, with a force_reg in from_mode followed by a recursive
666 call to this routine. Appears always to have been wrong. */
667 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
668 {
669 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
670 emit_move_insn (to, temp);
671 return;
672 }
673
674 /* Mode combination is not recognized. */
675 gcc_unreachable ();
676 }
677
678 /* Return an rtx for a value that would result
679 from converting X to mode MODE.
680 Both X and MODE may be floating, or both integer.
681 UNSIGNEDP is nonzero if X is an unsigned value.
682 This can be done by referring to a part of X in place
683 or by copying to a new temporary with conversion. */
684
685 rtx
686 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
687 {
688 return convert_modes (mode, VOIDmode, x, unsignedp);
689 }
690
691 /* Return an rtx for a value that would result
692 from converting X from mode OLDMODE to mode MODE.
693 Both modes may be floating, or both integer.
694 UNSIGNEDP is nonzero if X is an unsigned value.
695
696 This can be done by referring to a part of X in place
697 or by copying to a new temporary with conversion.
698
699 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
700
701 rtx
702 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
703 {
704 rtx temp;
705
706 /* If FROM is a SUBREG that indicates that we have already done at least
707 the required extension, strip it. */
708
709 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
710 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
711 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
712 x = gen_lowpart (mode, x);
713
714 if (GET_MODE (x) != VOIDmode)
715 oldmode = GET_MODE (x);
716
717 if (mode == oldmode)
718 return x;
719
720 /* There is one case that we must handle specially: If we are converting
721 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
722 we are to interpret the constant as unsigned, gen_lowpart will do
723 the wrong if the constant appears negative. What we want to do is
724 make the high-order word of the constant zero, not all ones. */
725
726 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
727 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
728 && CONST_INT_P (x) && INTVAL (x) < 0)
729 {
730 double_int val = uhwi_to_double_int (INTVAL (x));
731
732 /* We need to zero extend VAL. */
733 if (oldmode != VOIDmode)
734 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
735
736 return immed_double_int_const (val, mode);
737 }
738
739 /* We can do this with a gen_lowpart if both desired and current modes
740 are integer, and this is either a constant integer, a register, or a
741 non-volatile MEM. Except for the constant case where MODE is no
742 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
743
744 if ((CONST_INT_P (x)
745 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
746 || (GET_MODE_CLASS (mode) == MODE_INT
747 && GET_MODE_CLASS (oldmode) == MODE_INT
748 && (GET_CODE (x) == CONST_DOUBLE
749 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
750 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
751 && direct_load[(int) mode])
752 || (REG_P (x)
753 && (! HARD_REGISTER_P (x)
754 || HARD_REGNO_MODE_OK (REGNO (x), mode))
755 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
756 GET_MODE (x))))))))
757 {
758 /* ?? If we don't know OLDMODE, we have to assume here that
759 X does not need sign- or zero-extension. This may not be
760 the case, but it's the best we can do. */
761 if (CONST_INT_P (x) && oldmode != VOIDmode
762 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
763 {
764 HOST_WIDE_INT val = INTVAL (x);
765
766 /* We must sign or zero-extend in this case. Start by
767 zero-extending, then sign extend if we need to. */
768 val &= GET_MODE_MASK (oldmode);
769 if (! unsignedp
770 && val_signbit_known_set_p (oldmode, val))
771 val |= ~GET_MODE_MASK (oldmode);
772
773 return gen_int_mode (val, mode);
774 }
775
776 return gen_lowpart (mode, x);
777 }
778
779 /* Converting from integer constant into mode is always equivalent to an
780 subreg operation. */
781 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
782 {
783 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
784 return simplify_gen_subreg (mode, x, oldmode, 0);
785 }
786
787 temp = gen_reg_rtx (mode);
788 convert_move (temp, x, unsignedp);
789 return temp;
790 }
791 \f
792 /* Return the largest alignment we can use for doing a move (or store)
793 of MAX_PIECES. ALIGN is the largest alignment we could use. */
794
795 static unsigned int
796 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
797 {
798 enum machine_mode tmode;
799
800 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
801 if (align >= GET_MODE_ALIGNMENT (tmode))
802 align = GET_MODE_ALIGNMENT (tmode);
803 else
804 {
805 enum machine_mode tmode, xmode;
806
807 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
808 tmode != VOIDmode;
809 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
810 if (GET_MODE_SIZE (tmode) > max_pieces
811 || SLOW_UNALIGNED_ACCESS (tmode, align))
812 break;
813
814 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
815 }
816
817 return align;
818 }
819
820 /* Return the widest integer mode no wider than SIZE. If no such mode
821 can be found, return VOIDmode. */
822
823 static enum machine_mode
824 widest_int_mode_for_size (unsigned int size)
825 {
826 enum machine_mode tmode, mode = VOIDmode;
827
828 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
829 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
830 if (GET_MODE_SIZE (tmode) < size)
831 mode = tmode;
832
833 return mode;
834 }
835
836 /* STORE_MAX_PIECES is the number of bytes at a time that we can
837 store efficiently. Due to internal GCC limitations, this is
838 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
839 for an immediate constant. */
840
841 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
842
843 /* Determine whether the LEN bytes can be moved by using several move
844 instructions. Return nonzero if a call to move_by_pieces should
845 succeed. */
846
847 int
848 can_move_by_pieces (unsigned HOST_WIDE_INT len,
849 unsigned int align ATTRIBUTE_UNUSED)
850 {
851 return MOVE_BY_PIECES_P (len, align);
852 }
853
854 /* Generate several move instructions to copy LEN bytes from block FROM to
855 block TO. (These are MEM rtx's with BLKmode).
856
857 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
858 used to push FROM to the stack.
859
860 ALIGN is maximum stack alignment we can assume.
861
862 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
863 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
864 stpcpy. */
865
866 rtx
867 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
868 unsigned int align, int endp)
869 {
870 struct move_by_pieces_d data;
871 enum machine_mode to_addr_mode, from_addr_mode
872 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
873 rtx to_addr, from_addr = XEXP (from, 0);
874 unsigned int max_size = MOVE_MAX_PIECES + 1;
875 enum insn_code icode;
876
877 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
878
879 data.offset = 0;
880 data.from_addr = from_addr;
881 if (to)
882 {
883 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
884 to_addr = XEXP (to, 0);
885 data.to = to;
886 data.autinc_to
887 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
888 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
889 data.reverse
890 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
891 }
892 else
893 {
894 to_addr_mode = VOIDmode;
895 to_addr = NULL_RTX;
896 data.to = NULL_RTX;
897 data.autinc_to = 1;
898 #ifdef STACK_GROWS_DOWNWARD
899 data.reverse = 1;
900 #else
901 data.reverse = 0;
902 #endif
903 }
904 data.to_addr = to_addr;
905 data.from = from;
906 data.autinc_from
907 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
908 || GET_CODE (from_addr) == POST_INC
909 || GET_CODE (from_addr) == POST_DEC);
910
911 data.explicit_inc_from = 0;
912 data.explicit_inc_to = 0;
913 if (data.reverse) data.offset = len;
914 data.len = len;
915
916 /* If copying requires more than two move insns,
917 copy addresses to registers (to make displacements shorter)
918 and use post-increment if available. */
919 if (!(data.autinc_from && data.autinc_to)
920 && move_by_pieces_ninsns (len, align, max_size) > 2)
921 {
922 /* Find the mode of the largest move...
923 MODE might not be used depending on the definitions of the
924 USE_* macros below. */
925 enum machine_mode mode ATTRIBUTE_UNUSED
926 = widest_int_mode_for_size (max_size);
927
928 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
929 {
930 data.from_addr = copy_to_mode_reg (from_addr_mode,
931 plus_constant (from_addr, len));
932 data.autinc_from = 1;
933 data.explicit_inc_from = -1;
934 }
935 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
936 {
937 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
938 data.autinc_from = 1;
939 data.explicit_inc_from = 1;
940 }
941 if (!data.autinc_from && CONSTANT_P (from_addr))
942 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
943 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
944 {
945 data.to_addr = copy_to_mode_reg (to_addr_mode,
946 plus_constant (to_addr, len));
947 data.autinc_to = 1;
948 data.explicit_inc_to = -1;
949 }
950 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
951 {
952 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
953 data.autinc_to = 1;
954 data.explicit_inc_to = 1;
955 }
956 if (!data.autinc_to && CONSTANT_P (to_addr))
957 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
958 }
959
960 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
961
962 /* First move what we can in the largest integer mode, then go to
963 successively smaller modes. */
964
965 while (max_size > 1)
966 {
967 enum machine_mode mode = widest_int_mode_for_size (max_size);
968
969 if (mode == VOIDmode)
970 break;
971
972 icode = optab_handler (mov_optab, mode);
973 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
974 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
975
976 max_size = GET_MODE_SIZE (mode);
977 }
978
979 /* The code above should have handled everything. */
980 gcc_assert (!data.len);
981
982 if (endp)
983 {
984 rtx to1;
985
986 gcc_assert (!data.reverse);
987 if (data.autinc_to)
988 {
989 if (endp == 2)
990 {
991 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
992 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
993 else
994 data.to_addr = copy_to_mode_reg (to_addr_mode,
995 plus_constant (data.to_addr,
996 -1));
997 }
998 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
999 data.offset);
1000 }
1001 else
1002 {
1003 if (endp == 2)
1004 --data.offset;
1005 to1 = adjust_address (data.to, QImode, data.offset);
1006 }
1007 return to1;
1008 }
1009 else
1010 return data.to;
1011 }
1012
1013 /* Return number of insns required to move L bytes by pieces.
1014 ALIGN (in bits) is maximum alignment we can assume. */
1015
1016 unsigned HOST_WIDE_INT
1017 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1018 unsigned int max_size)
1019 {
1020 unsigned HOST_WIDE_INT n_insns = 0;
1021
1022 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1023
1024 while (max_size > 1)
1025 {
1026 enum machine_mode mode;
1027 enum insn_code icode;
1028
1029 mode = widest_int_mode_for_size (max_size);
1030
1031 if (mode == VOIDmode)
1032 break;
1033
1034 icode = optab_handler (mov_optab, mode);
1035 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1036 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1037
1038 max_size = GET_MODE_SIZE (mode);
1039 }
1040
1041 gcc_assert (!l);
1042 return n_insns;
1043 }
1044
1045 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1046 with move instructions for mode MODE. GENFUN is the gen_... function
1047 to make a move insn for that mode. DATA has all the other info. */
1048
1049 static void
1050 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1051 struct move_by_pieces_d *data)
1052 {
1053 unsigned int size = GET_MODE_SIZE (mode);
1054 rtx to1 = NULL_RTX, from1;
1055
1056 while (data->len >= size)
1057 {
1058 if (data->reverse)
1059 data->offset -= size;
1060
1061 if (data->to)
1062 {
1063 if (data->autinc_to)
1064 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1065 data->offset);
1066 else
1067 to1 = adjust_address (data->to, mode, data->offset);
1068 }
1069
1070 if (data->autinc_from)
1071 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1072 data->offset);
1073 else
1074 from1 = adjust_address (data->from, mode, data->offset);
1075
1076 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1077 emit_insn (gen_add2_insn (data->to_addr,
1078 GEN_INT (-(HOST_WIDE_INT)size)));
1079 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1080 emit_insn (gen_add2_insn (data->from_addr,
1081 GEN_INT (-(HOST_WIDE_INT)size)));
1082
1083 if (data->to)
1084 emit_insn ((*genfun) (to1, from1));
1085 else
1086 {
1087 #ifdef PUSH_ROUNDING
1088 emit_single_push_insn (mode, from1, NULL);
1089 #else
1090 gcc_unreachable ();
1091 #endif
1092 }
1093
1094 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1095 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1096 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1097 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1098
1099 if (! data->reverse)
1100 data->offset += size;
1101
1102 data->len -= size;
1103 }
1104 }
1105 \f
1106 /* Emit code to move a block Y to a block X. This may be done with
1107 string-move instructions, with multiple scalar move instructions,
1108 or with a library call.
1109
1110 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1111 SIZE is an rtx that says how long they are.
1112 ALIGN is the maximum alignment we can assume they have.
1113 METHOD describes what kind of copy this is, and what mechanisms may be used.
1114
1115 Return the address of the new block, if memcpy is called and returns it,
1116 0 otherwise. */
1117
1118 rtx
1119 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1120 unsigned int expected_align, HOST_WIDE_INT expected_size)
1121 {
1122 bool may_use_call;
1123 rtx retval = 0;
1124 unsigned int align;
1125
1126 gcc_assert (size);
1127 if (CONST_INT_P (size)
1128 && INTVAL (size) == 0)
1129 return 0;
1130
1131 switch (method)
1132 {
1133 case BLOCK_OP_NORMAL:
1134 case BLOCK_OP_TAILCALL:
1135 may_use_call = true;
1136 break;
1137
1138 case BLOCK_OP_CALL_PARM:
1139 may_use_call = block_move_libcall_safe_for_call_parm ();
1140
1141 /* Make inhibit_defer_pop nonzero around the library call
1142 to force it to pop the arguments right away. */
1143 NO_DEFER_POP;
1144 break;
1145
1146 case BLOCK_OP_NO_LIBCALL:
1147 may_use_call = false;
1148 break;
1149
1150 default:
1151 gcc_unreachable ();
1152 }
1153
1154 gcc_assert (MEM_P (x) && MEM_P (y));
1155 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1156 gcc_assert (align >= BITS_PER_UNIT);
1157
1158 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1159 block copy is more efficient for other large modes, e.g. DCmode. */
1160 x = adjust_address (x, BLKmode, 0);
1161 y = adjust_address (y, BLKmode, 0);
1162
1163 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1164 can be incorrect is coming from __builtin_memcpy. */
1165 if (CONST_INT_P (size))
1166 {
1167 x = shallow_copy_rtx (x);
1168 y = shallow_copy_rtx (y);
1169 set_mem_size (x, INTVAL (size));
1170 set_mem_size (y, INTVAL (size));
1171 }
1172
1173 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1174 move_by_pieces (x, y, INTVAL (size), align, 0);
1175 else if (emit_block_move_via_movmem (x, y, size, align,
1176 expected_align, expected_size))
1177 ;
1178 else if (may_use_call
1179 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1180 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1181 {
1182 /* Since x and y are passed to a libcall, mark the corresponding
1183 tree EXPR as addressable. */
1184 tree y_expr = MEM_EXPR (y);
1185 tree x_expr = MEM_EXPR (x);
1186 if (y_expr)
1187 mark_addressable (y_expr);
1188 if (x_expr)
1189 mark_addressable (x_expr);
1190 retval = emit_block_move_via_libcall (x, y, size,
1191 method == BLOCK_OP_TAILCALL);
1192 }
1193
1194 else
1195 emit_block_move_via_loop (x, y, size, align);
1196
1197 if (method == BLOCK_OP_CALL_PARM)
1198 OK_DEFER_POP;
1199
1200 return retval;
1201 }
1202
1203 rtx
1204 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1205 {
1206 return emit_block_move_hints (x, y, size, method, 0, -1);
1207 }
1208
1209 /* A subroutine of emit_block_move. Returns true if calling the
1210 block move libcall will not clobber any parameters which may have
1211 already been placed on the stack. */
1212
1213 static bool
1214 block_move_libcall_safe_for_call_parm (void)
1215 {
1216 #if defined (REG_PARM_STACK_SPACE)
1217 tree fn;
1218 #endif
1219
1220 /* If arguments are pushed on the stack, then they're safe. */
1221 if (PUSH_ARGS)
1222 return true;
1223
1224 /* If registers go on the stack anyway, any argument is sure to clobber
1225 an outgoing argument. */
1226 #if defined (REG_PARM_STACK_SPACE)
1227 fn = emit_block_move_libcall_fn (false);
1228 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1229 depend on its argument. */
1230 (void) fn;
1231 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1232 && REG_PARM_STACK_SPACE (fn) != 0)
1233 return false;
1234 #endif
1235
1236 /* If any argument goes in memory, then it might clobber an outgoing
1237 argument. */
1238 {
1239 CUMULATIVE_ARGS args_so_far_v;
1240 cumulative_args_t args_so_far;
1241 tree fn, arg;
1242
1243 fn = emit_block_move_libcall_fn (false);
1244 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1245 args_so_far = pack_cumulative_args (&args_so_far_v);
1246
1247 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1248 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1249 {
1250 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1251 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1252 NULL_TREE, true);
1253 if (!tmp || !REG_P (tmp))
1254 return false;
1255 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1256 return false;
1257 targetm.calls.function_arg_advance (args_so_far, mode,
1258 NULL_TREE, true);
1259 }
1260 }
1261 return true;
1262 }
1263
1264 /* A subroutine of emit_block_move. Expand a movmem pattern;
1265 return true if successful. */
1266
1267 static bool
1268 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1269 unsigned int expected_align, HOST_WIDE_INT expected_size)
1270 {
1271 int save_volatile_ok = volatile_ok;
1272 enum machine_mode mode;
1273
1274 if (expected_align < align)
1275 expected_align = align;
1276
1277 /* Since this is a move insn, we don't care about volatility. */
1278 volatile_ok = 1;
1279
1280 /* Try the most limited insn first, because there's no point
1281 including more than one in the machine description unless
1282 the more limited one has some advantage. */
1283
1284 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1285 mode = GET_MODE_WIDER_MODE (mode))
1286 {
1287 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1288
1289 if (code != CODE_FOR_nothing
1290 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1291 here because if SIZE is less than the mode mask, as it is
1292 returned by the macro, it will definitely be less than the
1293 actual mode mask. */
1294 && ((CONST_INT_P (size)
1295 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1296 <= (GET_MODE_MASK (mode) >> 1)))
1297 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1298 {
1299 struct expand_operand ops[6];
1300 unsigned int nops;
1301
1302 /* ??? When called via emit_block_move_for_call, it'd be
1303 nice if there were some way to inform the backend, so
1304 that it doesn't fail the expansion because it thinks
1305 emitting the libcall would be more efficient. */
1306 nops = insn_data[(int) code].n_generator_args;
1307 gcc_assert (nops == 4 || nops == 6);
1308
1309 create_fixed_operand (&ops[0], x);
1310 create_fixed_operand (&ops[1], y);
1311 /* The check above guarantees that this size conversion is valid. */
1312 create_convert_operand_to (&ops[2], size, mode, true);
1313 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1314 if (nops == 6)
1315 {
1316 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1317 create_integer_operand (&ops[5], expected_size);
1318 }
1319 if (maybe_expand_insn (code, nops, ops))
1320 {
1321 volatile_ok = save_volatile_ok;
1322 return true;
1323 }
1324 }
1325 }
1326
1327 volatile_ok = save_volatile_ok;
1328 return false;
1329 }
1330
1331 /* A subroutine of emit_block_move. Expand a call to memcpy.
1332 Return the return value from memcpy, 0 otherwise. */
1333
1334 rtx
1335 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1336 {
1337 rtx dst_addr, src_addr;
1338 tree call_expr, fn, src_tree, dst_tree, size_tree;
1339 enum machine_mode size_mode;
1340 rtx retval;
1341
1342 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1343 pseudos. We can then place those new pseudos into a VAR_DECL and
1344 use them later. */
1345
1346 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1347 src_addr = copy_addr_to_reg (XEXP (src, 0));
1348
1349 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1350 src_addr = convert_memory_address (ptr_mode, src_addr);
1351
1352 dst_tree = make_tree (ptr_type_node, dst_addr);
1353 src_tree = make_tree (ptr_type_node, src_addr);
1354
1355 size_mode = TYPE_MODE (sizetype);
1356
1357 size = convert_to_mode (size_mode, size, 1);
1358 size = copy_to_mode_reg (size_mode, size);
1359
1360 /* It is incorrect to use the libcall calling conventions to call
1361 memcpy in this context. This could be a user call to memcpy and
1362 the user may wish to examine the return value from memcpy. For
1363 targets where libcalls and normal calls have different conventions
1364 for returning pointers, we could end up generating incorrect code. */
1365
1366 size_tree = make_tree (sizetype, size);
1367
1368 fn = emit_block_move_libcall_fn (true);
1369 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1370 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1371
1372 retval = expand_normal (call_expr);
1373
1374 return retval;
1375 }
1376
1377 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1378 for the function we use for block copies. */
1379
1380 static GTY(()) tree block_move_fn;
1381
1382 void
1383 init_block_move_fn (const char *asmspec)
1384 {
1385 if (!block_move_fn)
1386 {
1387 tree args, fn;
1388
1389 fn = get_identifier ("memcpy");
1390 args = build_function_type_list (ptr_type_node, ptr_type_node,
1391 const_ptr_type_node, sizetype,
1392 NULL_TREE);
1393
1394 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1395 DECL_EXTERNAL (fn) = 1;
1396 TREE_PUBLIC (fn) = 1;
1397 DECL_ARTIFICIAL (fn) = 1;
1398 TREE_NOTHROW (fn) = 1;
1399 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1400 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1401
1402 block_move_fn = fn;
1403 }
1404
1405 if (asmspec)
1406 set_user_assembler_name (block_move_fn, asmspec);
1407 }
1408
1409 static tree
1410 emit_block_move_libcall_fn (int for_call)
1411 {
1412 static bool emitted_extern;
1413
1414 if (!block_move_fn)
1415 init_block_move_fn (NULL);
1416
1417 if (for_call && !emitted_extern)
1418 {
1419 emitted_extern = true;
1420 make_decl_rtl (block_move_fn);
1421 }
1422
1423 return block_move_fn;
1424 }
1425
1426 /* A subroutine of emit_block_move. Copy the data via an explicit
1427 loop. This is used only when libcalls are forbidden. */
1428 /* ??? It'd be nice to copy in hunks larger than QImode. */
1429
1430 static void
1431 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1432 unsigned int align ATTRIBUTE_UNUSED)
1433 {
1434 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1435 enum machine_mode x_addr_mode
1436 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1437 enum machine_mode y_addr_mode
1438 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1439 enum machine_mode iter_mode;
1440
1441 iter_mode = GET_MODE (size);
1442 if (iter_mode == VOIDmode)
1443 iter_mode = word_mode;
1444
1445 top_label = gen_label_rtx ();
1446 cmp_label = gen_label_rtx ();
1447 iter = gen_reg_rtx (iter_mode);
1448
1449 emit_move_insn (iter, const0_rtx);
1450
1451 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1452 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1453 do_pending_stack_adjust ();
1454
1455 emit_jump (cmp_label);
1456 emit_label (top_label);
1457
1458 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1459 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1460
1461 if (x_addr_mode != y_addr_mode)
1462 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1463 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1464
1465 x = change_address (x, QImode, x_addr);
1466 y = change_address (y, QImode, y_addr);
1467
1468 emit_move_insn (x, y);
1469
1470 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1471 true, OPTAB_LIB_WIDEN);
1472 if (tmp != iter)
1473 emit_move_insn (iter, tmp);
1474
1475 emit_label (cmp_label);
1476
1477 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1478 true, top_label);
1479 }
1480 \f
1481 /* Copy all or part of a value X into registers starting at REGNO.
1482 The number of registers to be filled is NREGS. */
1483
1484 void
1485 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1486 {
1487 int i;
1488 #ifdef HAVE_load_multiple
1489 rtx pat;
1490 rtx last;
1491 #endif
1492
1493 if (nregs == 0)
1494 return;
1495
1496 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1497 x = validize_mem (force_const_mem (mode, x));
1498
1499 /* See if the machine can do this with a load multiple insn. */
1500 #ifdef HAVE_load_multiple
1501 if (HAVE_load_multiple)
1502 {
1503 last = get_last_insn ();
1504 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1505 GEN_INT (nregs));
1506 if (pat)
1507 {
1508 emit_insn (pat);
1509 return;
1510 }
1511 else
1512 delete_insns_since (last);
1513 }
1514 #endif
1515
1516 for (i = 0; i < nregs; i++)
1517 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1518 operand_subword_force (x, i, mode));
1519 }
1520
1521 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1522 The number of registers to be filled is NREGS. */
1523
1524 void
1525 move_block_from_reg (int regno, rtx x, int nregs)
1526 {
1527 int i;
1528
1529 if (nregs == 0)
1530 return;
1531
1532 /* See if the machine can do this with a store multiple insn. */
1533 #ifdef HAVE_store_multiple
1534 if (HAVE_store_multiple)
1535 {
1536 rtx last = get_last_insn ();
1537 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1538 GEN_INT (nregs));
1539 if (pat)
1540 {
1541 emit_insn (pat);
1542 return;
1543 }
1544 else
1545 delete_insns_since (last);
1546 }
1547 #endif
1548
1549 for (i = 0; i < nregs; i++)
1550 {
1551 rtx tem = operand_subword (x, i, 1, BLKmode);
1552
1553 gcc_assert (tem);
1554
1555 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1556 }
1557 }
1558
1559 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1560 ORIG, where ORIG is a non-consecutive group of registers represented by
1561 a PARALLEL. The clone is identical to the original except in that the
1562 original set of registers is replaced by a new set of pseudo registers.
1563 The new set has the same modes as the original set. */
1564
1565 rtx
1566 gen_group_rtx (rtx orig)
1567 {
1568 int i, length;
1569 rtx *tmps;
1570
1571 gcc_assert (GET_CODE (orig) == PARALLEL);
1572
1573 length = XVECLEN (orig, 0);
1574 tmps = XALLOCAVEC (rtx, length);
1575
1576 /* Skip a NULL entry in first slot. */
1577 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1578
1579 if (i)
1580 tmps[0] = 0;
1581
1582 for (; i < length; i++)
1583 {
1584 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1585 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1586
1587 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1588 }
1589
1590 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1591 }
1592
1593 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1594 except that values are placed in TMPS[i], and must later be moved
1595 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1596
1597 static void
1598 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1599 {
1600 rtx src;
1601 int start, i;
1602 enum machine_mode m = GET_MODE (orig_src);
1603
1604 gcc_assert (GET_CODE (dst) == PARALLEL);
1605
1606 if (m != VOIDmode
1607 && !SCALAR_INT_MODE_P (m)
1608 && !MEM_P (orig_src)
1609 && GET_CODE (orig_src) != CONCAT)
1610 {
1611 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1612 if (imode == BLKmode)
1613 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1614 else
1615 src = gen_reg_rtx (imode);
1616 if (imode != BLKmode)
1617 src = gen_lowpart (GET_MODE (orig_src), src);
1618 emit_move_insn (src, orig_src);
1619 /* ...and back again. */
1620 if (imode != BLKmode)
1621 src = gen_lowpart (imode, src);
1622 emit_group_load_1 (tmps, dst, src, type, ssize);
1623 return;
1624 }
1625
1626 /* Check for a NULL entry, used to indicate that the parameter goes
1627 both on the stack and in registers. */
1628 if (XEXP (XVECEXP (dst, 0, 0), 0))
1629 start = 0;
1630 else
1631 start = 1;
1632
1633 /* Process the pieces. */
1634 for (i = start; i < XVECLEN (dst, 0); i++)
1635 {
1636 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1637 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1638 unsigned int bytelen = GET_MODE_SIZE (mode);
1639 int shift = 0;
1640
1641 /* Handle trailing fragments that run over the size of the struct. */
1642 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1643 {
1644 /* Arrange to shift the fragment to where it belongs.
1645 extract_bit_field loads to the lsb of the reg. */
1646 if (
1647 #ifdef BLOCK_REG_PADDING
1648 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1649 == (BYTES_BIG_ENDIAN ? upward : downward)
1650 #else
1651 BYTES_BIG_ENDIAN
1652 #endif
1653 )
1654 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1655 bytelen = ssize - bytepos;
1656 gcc_assert (bytelen > 0);
1657 }
1658
1659 /* If we won't be loading directly from memory, protect the real source
1660 from strange tricks we might play; but make sure that the source can
1661 be loaded directly into the destination. */
1662 src = orig_src;
1663 if (!MEM_P (orig_src)
1664 && (!CONSTANT_P (orig_src)
1665 || (GET_MODE (orig_src) != mode
1666 && GET_MODE (orig_src) != VOIDmode)))
1667 {
1668 if (GET_MODE (orig_src) == VOIDmode)
1669 src = gen_reg_rtx (mode);
1670 else
1671 src = gen_reg_rtx (GET_MODE (orig_src));
1672
1673 emit_move_insn (src, orig_src);
1674 }
1675
1676 /* Optimize the access just a bit. */
1677 if (MEM_P (src)
1678 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1679 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1680 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1681 && bytelen == GET_MODE_SIZE (mode))
1682 {
1683 tmps[i] = gen_reg_rtx (mode);
1684 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1685 }
1686 else if (COMPLEX_MODE_P (mode)
1687 && GET_MODE (src) == mode
1688 && bytelen == GET_MODE_SIZE (mode))
1689 /* Let emit_move_complex do the bulk of the work. */
1690 tmps[i] = src;
1691 else if (GET_CODE (src) == CONCAT)
1692 {
1693 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1694 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1695
1696 if ((bytepos == 0 && bytelen == slen0)
1697 || (bytepos != 0 && bytepos + bytelen <= slen))
1698 {
1699 /* The following assumes that the concatenated objects all
1700 have the same size. In this case, a simple calculation
1701 can be used to determine the object and the bit field
1702 to be extracted. */
1703 tmps[i] = XEXP (src, bytepos / slen0);
1704 if (! CONSTANT_P (tmps[i])
1705 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1706 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1707 (bytepos % slen0) * BITS_PER_UNIT,
1708 1, false, NULL_RTX, mode, mode);
1709 }
1710 else
1711 {
1712 rtx mem;
1713
1714 gcc_assert (!bytepos);
1715 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1716 emit_move_insn (mem, src);
1717 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1718 0, 1, false, NULL_RTX, mode, mode);
1719 }
1720 }
1721 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1722 SIMD register, which is currently broken. While we get GCC
1723 to emit proper RTL for these cases, let's dump to memory. */
1724 else if (VECTOR_MODE_P (GET_MODE (dst))
1725 && REG_P (src))
1726 {
1727 int slen = GET_MODE_SIZE (GET_MODE (src));
1728 rtx mem;
1729
1730 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1731 emit_move_insn (mem, src);
1732 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1733 }
1734 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1735 && XVECLEN (dst, 0) > 1)
1736 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1737 else if (CONSTANT_P (src))
1738 {
1739 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1740
1741 if (len == ssize)
1742 tmps[i] = src;
1743 else
1744 {
1745 rtx first, second;
1746
1747 gcc_assert (2 * len == ssize);
1748 split_double (src, &first, &second);
1749 if (i)
1750 tmps[i] = second;
1751 else
1752 tmps[i] = first;
1753 }
1754 }
1755 else if (REG_P (src) && GET_MODE (src) == mode)
1756 tmps[i] = src;
1757 else
1758 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1759 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1760 mode, mode);
1761
1762 if (shift)
1763 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1764 shift, tmps[i], 0);
1765 }
1766 }
1767
1768 /* Emit code to move a block SRC of type TYPE to a block DST,
1769 where DST is non-consecutive registers represented by a PARALLEL.
1770 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1771 if not known. */
1772
1773 void
1774 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1775 {
1776 rtx *tmps;
1777 int i;
1778
1779 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1780 emit_group_load_1 (tmps, dst, src, type, ssize);
1781
1782 /* Copy the extracted pieces into the proper (probable) hard regs. */
1783 for (i = 0; i < XVECLEN (dst, 0); i++)
1784 {
1785 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1786 if (d == NULL)
1787 continue;
1788 emit_move_insn (d, tmps[i]);
1789 }
1790 }
1791
1792 /* Similar, but load SRC into new pseudos in a format that looks like
1793 PARALLEL. This can later be fed to emit_group_move to get things
1794 in the right place. */
1795
1796 rtx
1797 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1798 {
1799 rtvec vec;
1800 int i;
1801
1802 vec = rtvec_alloc (XVECLEN (parallel, 0));
1803 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1804
1805 /* Convert the vector to look just like the original PARALLEL, except
1806 with the computed values. */
1807 for (i = 0; i < XVECLEN (parallel, 0); i++)
1808 {
1809 rtx e = XVECEXP (parallel, 0, i);
1810 rtx d = XEXP (e, 0);
1811
1812 if (d)
1813 {
1814 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1815 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1816 }
1817 RTVEC_ELT (vec, i) = e;
1818 }
1819
1820 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1821 }
1822
1823 /* Emit code to move a block SRC to block DST, where SRC and DST are
1824 non-consecutive groups of registers, each represented by a PARALLEL. */
1825
1826 void
1827 emit_group_move (rtx dst, rtx src)
1828 {
1829 int i;
1830
1831 gcc_assert (GET_CODE (src) == PARALLEL
1832 && GET_CODE (dst) == PARALLEL
1833 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1834
1835 /* Skip first entry if NULL. */
1836 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1837 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1838 XEXP (XVECEXP (src, 0, i), 0));
1839 }
1840
1841 /* Move a group of registers represented by a PARALLEL into pseudos. */
1842
1843 rtx
1844 emit_group_move_into_temps (rtx src)
1845 {
1846 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1847 int i;
1848
1849 for (i = 0; i < XVECLEN (src, 0); i++)
1850 {
1851 rtx e = XVECEXP (src, 0, i);
1852 rtx d = XEXP (e, 0);
1853
1854 if (d)
1855 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1856 RTVEC_ELT (vec, i) = e;
1857 }
1858
1859 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1860 }
1861
1862 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1863 where SRC is non-consecutive registers represented by a PARALLEL.
1864 SSIZE represents the total size of block ORIG_DST, or -1 if not
1865 known. */
1866
1867 void
1868 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1869 {
1870 rtx *tmps, dst;
1871 int start, finish, i;
1872 enum machine_mode m = GET_MODE (orig_dst);
1873
1874 gcc_assert (GET_CODE (src) == PARALLEL);
1875
1876 if (!SCALAR_INT_MODE_P (m)
1877 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1878 {
1879 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1880 if (imode == BLKmode)
1881 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1882 else
1883 dst = gen_reg_rtx (imode);
1884 emit_group_store (dst, src, type, ssize);
1885 if (imode != BLKmode)
1886 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1887 emit_move_insn (orig_dst, dst);
1888 return;
1889 }
1890
1891 /* Check for a NULL entry, used to indicate that the parameter goes
1892 both on the stack and in registers. */
1893 if (XEXP (XVECEXP (src, 0, 0), 0))
1894 start = 0;
1895 else
1896 start = 1;
1897 finish = XVECLEN (src, 0);
1898
1899 tmps = XALLOCAVEC (rtx, finish);
1900
1901 /* Copy the (probable) hard regs into pseudos. */
1902 for (i = start; i < finish; i++)
1903 {
1904 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1905 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1906 {
1907 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1908 emit_move_insn (tmps[i], reg);
1909 }
1910 else
1911 tmps[i] = reg;
1912 }
1913
1914 /* If we won't be storing directly into memory, protect the real destination
1915 from strange tricks we might play. */
1916 dst = orig_dst;
1917 if (GET_CODE (dst) == PARALLEL)
1918 {
1919 rtx temp;
1920
1921 /* We can get a PARALLEL dst if there is a conditional expression in
1922 a return statement. In that case, the dst and src are the same,
1923 so no action is necessary. */
1924 if (rtx_equal_p (dst, src))
1925 return;
1926
1927 /* It is unclear if we can ever reach here, but we may as well handle
1928 it. Allocate a temporary, and split this into a store/load to/from
1929 the temporary. */
1930
1931 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1932 emit_group_store (temp, src, type, ssize);
1933 emit_group_load (dst, temp, type, ssize);
1934 return;
1935 }
1936 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1937 {
1938 enum machine_mode outer = GET_MODE (dst);
1939 enum machine_mode inner;
1940 HOST_WIDE_INT bytepos;
1941 bool done = false;
1942 rtx temp;
1943
1944 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1945 dst = gen_reg_rtx (outer);
1946
1947 /* Make life a bit easier for combine. */
1948 /* If the first element of the vector is the low part
1949 of the destination mode, use a paradoxical subreg to
1950 initialize the destination. */
1951 if (start < finish)
1952 {
1953 inner = GET_MODE (tmps[start]);
1954 bytepos = subreg_lowpart_offset (inner, outer);
1955 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1956 {
1957 temp = simplify_gen_subreg (outer, tmps[start],
1958 inner, 0);
1959 if (temp)
1960 {
1961 emit_move_insn (dst, temp);
1962 done = true;
1963 start++;
1964 }
1965 }
1966 }
1967
1968 /* If the first element wasn't the low part, try the last. */
1969 if (!done
1970 && start < finish - 1)
1971 {
1972 inner = GET_MODE (tmps[finish - 1]);
1973 bytepos = subreg_lowpart_offset (inner, outer);
1974 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1975 {
1976 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1977 inner, 0);
1978 if (temp)
1979 {
1980 emit_move_insn (dst, temp);
1981 done = true;
1982 finish--;
1983 }
1984 }
1985 }
1986
1987 /* Otherwise, simply initialize the result to zero. */
1988 if (!done)
1989 emit_move_insn (dst, CONST0_RTX (outer));
1990 }
1991
1992 /* Process the pieces. */
1993 for (i = start; i < finish; i++)
1994 {
1995 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
1996 enum machine_mode mode = GET_MODE (tmps[i]);
1997 unsigned int bytelen = GET_MODE_SIZE (mode);
1998 unsigned int adj_bytelen = bytelen;
1999 rtx dest = dst;
2000
2001 /* Handle trailing fragments that run over the size of the struct. */
2002 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2003 adj_bytelen = ssize - bytepos;
2004
2005 if (GET_CODE (dst) == CONCAT)
2006 {
2007 if (bytepos + adj_bytelen
2008 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2009 dest = XEXP (dst, 0);
2010 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2011 {
2012 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2013 dest = XEXP (dst, 1);
2014 }
2015 else
2016 {
2017 enum machine_mode dest_mode = GET_MODE (dest);
2018 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2019
2020 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2021
2022 if (GET_MODE_ALIGNMENT (dest_mode)
2023 >= GET_MODE_ALIGNMENT (tmp_mode))
2024 {
2025 dest = assign_stack_temp (dest_mode,
2026 GET_MODE_SIZE (dest_mode),
2027 0);
2028 emit_move_insn (adjust_address (dest,
2029 tmp_mode,
2030 bytepos),
2031 tmps[i]);
2032 dst = dest;
2033 }
2034 else
2035 {
2036 dest = assign_stack_temp (tmp_mode,
2037 GET_MODE_SIZE (tmp_mode),
2038 0);
2039 emit_move_insn (dest, tmps[i]);
2040 dst = adjust_address (dest, dest_mode, bytepos);
2041 }
2042 break;
2043 }
2044 }
2045
2046 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2047 {
2048 /* store_bit_field always takes its value from the lsb.
2049 Move the fragment to the lsb if it's not already there. */
2050 if (
2051 #ifdef BLOCK_REG_PADDING
2052 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2053 == (BYTES_BIG_ENDIAN ? upward : downward)
2054 #else
2055 BYTES_BIG_ENDIAN
2056 #endif
2057 )
2058 {
2059 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2060 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2061 shift, tmps[i], 0);
2062 }
2063 bytelen = adj_bytelen;
2064 }
2065
2066 /* Optimize the access just a bit. */
2067 if (MEM_P (dest)
2068 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2069 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2070 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2071 && bytelen == GET_MODE_SIZE (mode))
2072 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2073 else
2074 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2075 0, 0, mode, tmps[i]);
2076 }
2077
2078 /* Copy from the pseudo into the (probable) hard reg. */
2079 if (orig_dst != dst)
2080 emit_move_insn (orig_dst, dst);
2081 }
2082
2083 /* Generate code to copy a BLKmode object of TYPE out of a
2084 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2085 is null, a stack temporary is created. TGTBLK is returned.
2086
2087 The purpose of this routine is to handle functions that return
2088 BLKmode structures in registers. Some machines (the PA for example)
2089 want to return all small structures in registers regardless of the
2090 structure's alignment. */
2091
2092 rtx
2093 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2094 {
2095 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2096 rtx src = NULL, dst = NULL;
2097 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2098 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2099 enum machine_mode copy_mode;
2100
2101 if (tgtblk == 0)
2102 {
2103 tgtblk = assign_temp (build_qualified_type (type,
2104 (TYPE_QUALS (type)
2105 | TYPE_QUAL_CONST)),
2106 0, 1, 1);
2107 preserve_temp_slots (tgtblk);
2108 }
2109
2110 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2111 into a new pseudo which is a full word. */
2112
2113 if (GET_MODE (srcreg) != BLKmode
2114 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2115 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2116
2117 /* If the structure doesn't take up a whole number of words, see whether
2118 SRCREG is padded on the left or on the right. If it's on the left,
2119 set PADDING_CORRECTION to the number of bits to skip.
2120
2121 In most ABIs, the structure will be returned at the least end of
2122 the register, which translates to right padding on little-endian
2123 targets and left padding on big-endian targets. The opposite
2124 holds if the structure is returned at the most significant
2125 end of the register. */
2126 if (bytes % UNITS_PER_WORD != 0
2127 && (targetm.calls.return_in_msb (type)
2128 ? !BYTES_BIG_ENDIAN
2129 : BYTES_BIG_ENDIAN))
2130 padding_correction
2131 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2132
2133 /* Copy the structure BITSIZE bits at a time. If the target lives in
2134 memory, take care of not reading/writing past its end by selecting
2135 a copy mode suited to BITSIZE. This should always be possible given
2136 how it is computed.
2137
2138 We could probably emit more efficient code for machines which do not use
2139 strict alignment, but it doesn't seem worth the effort at the current
2140 time. */
2141
2142 copy_mode = word_mode;
2143 if (MEM_P (tgtblk))
2144 {
2145 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2146 if (mem_mode != BLKmode)
2147 copy_mode = mem_mode;
2148 }
2149
2150 for (bitpos = 0, xbitpos = padding_correction;
2151 bitpos < bytes * BITS_PER_UNIT;
2152 bitpos += bitsize, xbitpos += bitsize)
2153 {
2154 /* We need a new source operand each time xbitpos is on a
2155 word boundary and when xbitpos == padding_correction
2156 (the first time through). */
2157 if (xbitpos % BITS_PER_WORD == 0
2158 || xbitpos == padding_correction)
2159 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2160 GET_MODE (srcreg));
2161
2162 /* We need a new destination operand each time bitpos is on
2163 a word boundary. */
2164 if (bitpos % BITS_PER_WORD == 0)
2165 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2166
2167 /* Use xbitpos for the source extraction (right justified) and
2168 bitpos for the destination store (left justified). */
2169 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2170 extract_bit_field (src, bitsize,
2171 xbitpos % BITS_PER_WORD, 1, false,
2172 NULL_RTX, copy_mode, copy_mode));
2173 }
2174
2175 return tgtblk;
2176 }
2177
2178 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2179 register if it contains any data, otherwise return null.
2180
2181 This is used on targets that return BLKmode values in registers. */
2182
2183 rtx
2184 copy_blkmode_to_reg (enum machine_mode mode, tree src)
2185 {
2186 int i, n_regs;
2187 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2188 unsigned int bitsize;
2189 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2190 enum machine_mode dst_mode;
2191
2192 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2193
2194 x = expand_normal (src);
2195
2196 bytes = int_size_in_bytes (TREE_TYPE (src));
2197 if (bytes == 0)
2198 return NULL_RTX;
2199
2200 /* If the structure doesn't take up a whole number of words, see
2201 whether the register value should be padded on the left or on
2202 the right. Set PADDING_CORRECTION to the number of padding
2203 bits needed on the left side.
2204
2205 In most ABIs, the structure will be returned at the least end of
2206 the register, which translates to right padding on little-endian
2207 targets and left padding on big-endian targets. The opposite
2208 holds if the structure is returned at the most significant
2209 end of the register. */
2210 if (bytes % UNITS_PER_WORD != 0
2211 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2212 ? !BYTES_BIG_ENDIAN
2213 : BYTES_BIG_ENDIAN))
2214 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2215 * BITS_PER_UNIT));
2216
2217 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2218 dst_words = XALLOCAVEC (rtx, n_regs);
2219 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2220
2221 /* Copy the structure BITSIZE bits at a time. */
2222 for (bitpos = 0, xbitpos = padding_correction;
2223 bitpos < bytes * BITS_PER_UNIT;
2224 bitpos += bitsize, xbitpos += bitsize)
2225 {
2226 /* We need a new destination pseudo each time xbitpos is
2227 on a word boundary and when xbitpos == padding_correction
2228 (the first time through). */
2229 if (xbitpos % BITS_PER_WORD == 0
2230 || xbitpos == padding_correction)
2231 {
2232 /* Generate an appropriate register. */
2233 dst_word = gen_reg_rtx (word_mode);
2234 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2235
2236 /* Clear the destination before we move anything into it. */
2237 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2238 }
2239
2240 /* We need a new source operand each time bitpos is on a word
2241 boundary. */
2242 if (bitpos % BITS_PER_WORD == 0)
2243 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2244
2245 /* Use bitpos for the source extraction (left justified) and
2246 xbitpos for the destination store (right justified). */
2247 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2248 0, 0, word_mode,
2249 extract_bit_field (src_word, bitsize,
2250 bitpos % BITS_PER_WORD, 1, false,
2251 NULL_RTX, word_mode, word_mode));
2252 }
2253
2254 if (mode == BLKmode)
2255 {
2256 /* Find the smallest integer mode large enough to hold the
2257 entire structure. */
2258 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2259 mode != VOIDmode;
2260 mode = GET_MODE_WIDER_MODE (mode))
2261 /* Have we found a large enough mode? */
2262 if (GET_MODE_SIZE (mode) >= bytes)
2263 break;
2264
2265 /* A suitable mode should have been found. */
2266 gcc_assert (mode != VOIDmode);
2267 }
2268
2269 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2270 dst_mode = word_mode;
2271 else
2272 dst_mode = mode;
2273 dst = gen_reg_rtx (dst_mode);
2274
2275 for (i = 0; i < n_regs; i++)
2276 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2277
2278 if (mode != dst_mode)
2279 dst = gen_lowpart (mode, dst);
2280
2281 return dst;
2282 }
2283
2284 /* Add a USE expression for REG to the (possibly empty) list pointed
2285 to by CALL_FUSAGE. REG must denote a hard register. */
2286
2287 void
2288 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2289 {
2290 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2291
2292 *call_fusage
2293 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2294 }
2295
2296 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2297 starting at REGNO. All of these registers must be hard registers. */
2298
2299 void
2300 use_regs (rtx *call_fusage, int regno, int nregs)
2301 {
2302 int i;
2303
2304 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2305
2306 for (i = 0; i < nregs; i++)
2307 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2308 }
2309
2310 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2311 PARALLEL REGS. This is for calls that pass values in multiple
2312 non-contiguous locations. The Irix 6 ABI has examples of this. */
2313
2314 void
2315 use_group_regs (rtx *call_fusage, rtx regs)
2316 {
2317 int i;
2318
2319 for (i = 0; i < XVECLEN (regs, 0); i++)
2320 {
2321 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2322
2323 /* A NULL entry means the parameter goes both on the stack and in
2324 registers. This can also be a MEM for targets that pass values
2325 partially on the stack and partially in registers. */
2326 if (reg != 0 && REG_P (reg))
2327 use_reg (call_fusage, reg);
2328 }
2329 }
2330
2331 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2332 assigment and the code of the expresion on the RHS is CODE. Return
2333 NULL otherwise. */
2334
2335 static gimple
2336 get_def_for_expr (tree name, enum tree_code code)
2337 {
2338 gimple def_stmt;
2339
2340 if (TREE_CODE (name) != SSA_NAME)
2341 return NULL;
2342
2343 def_stmt = get_gimple_for_ssa_name (name);
2344 if (!def_stmt
2345 || gimple_assign_rhs_code (def_stmt) != code)
2346 return NULL;
2347
2348 return def_stmt;
2349 }
2350 \f
2351
2352 /* Determine whether the LEN bytes generated by CONSTFUN can be
2353 stored to memory using several move instructions. CONSTFUNDATA is
2354 a pointer which will be passed as argument in every CONSTFUN call.
2355 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2356 a memset operation and false if it's a copy of a constant string.
2357 Return nonzero if a call to store_by_pieces should succeed. */
2358
2359 int
2360 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2361 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2362 void *constfundata, unsigned int align, bool memsetp)
2363 {
2364 unsigned HOST_WIDE_INT l;
2365 unsigned int max_size;
2366 HOST_WIDE_INT offset = 0;
2367 enum machine_mode mode;
2368 enum insn_code icode;
2369 int reverse;
2370 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2371 rtx cst ATTRIBUTE_UNUSED;
2372
2373 if (len == 0)
2374 return 1;
2375
2376 if (! (memsetp
2377 ? SET_BY_PIECES_P (len, align)
2378 : STORE_BY_PIECES_P (len, align)))
2379 return 0;
2380
2381 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2382
2383 /* We would first store what we can in the largest integer mode, then go to
2384 successively smaller modes. */
2385
2386 for (reverse = 0;
2387 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2388 reverse++)
2389 {
2390 l = len;
2391 max_size = STORE_MAX_PIECES + 1;
2392 while (max_size > 1)
2393 {
2394 mode = widest_int_mode_for_size (max_size);
2395
2396 if (mode == VOIDmode)
2397 break;
2398
2399 icode = optab_handler (mov_optab, mode);
2400 if (icode != CODE_FOR_nothing
2401 && align >= GET_MODE_ALIGNMENT (mode))
2402 {
2403 unsigned int size = GET_MODE_SIZE (mode);
2404
2405 while (l >= size)
2406 {
2407 if (reverse)
2408 offset -= size;
2409
2410 cst = (*constfun) (constfundata, offset, mode);
2411 if (!targetm.legitimate_constant_p (mode, cst))
2412 return 0;
2413
2414 if (!reverse)
2415 offset += size;
2416
2417 l -= size;
2418 }
2419 }
2420
2421 max_size = GET_MODE_SIZE (mode);
2422 }
2423
2424 /* The code above should have handled everything. */
2425 gcc_assert (!l);
2426 }
2427
2428 return 1;
2429 }
2430
2431 /* Generate several move instructions to store LEN bytes generated by
2432 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2433 pointer which will be passed as argument in every CONSTFUN call.
2434 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2435 a memset operation and false if it's a copy of a constant string.
2436 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2437 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2438 stpcpy. */
2439
2440 rtx
2441 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2442 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2443 void *constfundata, unsigned int align, bool memsetp, int endp)
2444 {
2445 enum machine_mode to_addr_mode
2446 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2447 struct store_by_pieces_d data;
2448
2449 if (len == 0)
2450 {
2451 gcc_assert (endp != 2);
2452 return to;
2453 }
2454
2455 gcc_assert (memsetp
2456 ? SET_BY_PIECES_P (len, align)
2457 : STORE_BY_PIECES_P (len, align));
2458 data.constfun = constfun;
2459 data.constfundata = constfundata;
2460 data.len = len;
2461 data.to = to;
2462 store_by_pieces_1 (&data, align);
2463 if (endp)
2464 {
2465 rtx to1;
2466
2467 gcc_assert (!data.reverse);
2468 if (data.autinc_to)
2469 {
2470 if (endp == 2)
2471 {
2472 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2473 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2474 else
2475 data.to_addr = copy_to_mode_reg (to_addr_mode,
2476 plus_constant (data.to_addr,
2477 -1));
2478 }
2479 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2480 data.offset);
2481 }
2482 else
2483 {
2484 if (endp == 2)
2485 --data.offset;
2486 to1 = adjust_address (data.to, QImode, data.offset);
2487 }
2488 return to1;
2489 }
2490 else
2491 return data.to;
2492 }
2493
2494 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2495 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2496
2497 static void
2498 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2499 {
2500 struct store_by_pieces_d data;
2501
2502 if (len == 0)
2503 return;
2504
2505 data.constfun = clear_by_pieces_1;
2506 data.constfundata = NULL;
2507 data.len = len;
2508 data.to = to;
2509 store_by_pieces_1 (&data, align);
2510 }
2511
2512 /* Callback routine for clear_by_pieces.
2513 Return const0_rtx unconditionally. */
2514
2515 static rtx
2516 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2517 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2518 enum machine_mode mode ATTRIBUTE_UNUSED)
2519 {
2520 return const0_rtx;
2521 }
2522
2523 /* Subroutine of clear_by_pieces and store_by_pieces.
2524 Generate several move instructions to store LEN bytes of block TO. (A MEM
2525 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2526
2527 static void
2528 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2529 unsigned int align ATTRIBUTE_UNUSED)
2530 {
2531 enum machine_mode to_addr_mode
2532 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2533 rtx to_addr = XEXP (data->to, 0);
2534 unsigned int max_size = STORE_MAX_PIECES + 1;
2535 enum insn_code icode;
2536
2537 data->offset = 0;
2538 data->to_addr = to_addr;
2539 data->autinc_to
2540 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2541 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2542
2543 data->explicit_inc_to = 0;
2544 data->reverse
2545 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2546 if (data->reverse)
2547 data->offset = data->len;
2548
2549 /* If storing requires more than two move insns,
2550 copy addresses to registers (to make displacements shorter)
2551 and use post-increment if available. */
2552 if (!data->autinc_to
2553 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2554 {
2555 /* Determine the main mode we'll be using.
2556 MODE might not be used depending on the definitions of the
2557 USE_* macros below. */
2558 enum machine_mode mode ATTRIBUTE_UNUSED
2559 = widest_int_mode_for_size (max_size);
2560
2561 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2562 {
2563 data->to_addr = copy_to_mode_reg (to_addr_mode,
2564 plus_constant (to_addr, data->len));
2565 data->autinc_to = 1;
2566 data->explicit_inc_to = -1;
2567 }
2568
2569 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2570 && ! data->autinc_to)
2571 {
2572 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2573 data->autinc_to = 1;
2574 data->explicit_inc_to = 1;
2575 }
2576
2577 if ( !data->autinc_to && CONSTANT_P (to_addr))
2578 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2579 }
2580
2581 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2582
2583 /* First store what we can in the largest integer mode, then go to
2584 successively smaller modes. */
2585
2586 while (max_size > 1)
2587 {
2588 enum machine_mode mode = widest_int_mode_for_size (max_size);
2589
2590 if (mode == VOIDmode)
2591 break;
2592
2593 icode = optab_handler (mov_optab, mode);
2594 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2595 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2596
2597 max_size = GET_MODE_SIZE (mode);
2598 }
2599
2600 /* The code above should have handled everything. */
2601 gcc_assert (!data->len);
2602 }
2603
2604 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2605 with move instructions for mode MODE. GENFUN is the gen_... function
2606 to make a move insn for that mode. DATA has all the other info. */
2607
2608 static void
2609 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2610 struct store_by_pieces_d *data)
2611 {
2612 unsigned int size = GET_MODE_SIZE (mode);
2613 rtx to1, cst;
2614
2615 while (data->len >= size)
2616 {
2617 if (data->reverse)
2618 data->offset -= size;
2619
2620 if (data->autinc_to)
2621 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2622 data->offset);
2623 else
2624 to1 = adjust_address (data->to, mode, data->offset);
2625
2626 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2627 emit_insn (gen_add2_insn (data->to_addr,
2628 GEN_INT (-(HOST_WIDE_INT) size)));
2629
2630 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2631 emit_insn ((*genfun) (to1, cst));
2632
2633 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2634 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2635
2636 if (! data->reverse)
2637 data->offset += size;
2638
2639 data->len -= size;
2640 }
2641 }
2642 \f
2643 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2644 its length in bytes. */
2645
2646 rtx
2647 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2648 unsigned int expected_align, HOST_WIDE_INT expected_size)
2649 {
2650 enum machine_mode mode = GET_MODE (object);
2651 unsigned int align;
2652
2653 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2654
2655 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2656 just move a zero. Otherwise, do this a piece at a time. */
2657 if (mode != BLKmode
2658 && CONST_INT_P (size)
2659 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2660 {
2661 rtx zero = CONST0_RTX (mode);
2662 if (zero != NULL)
2663 {
2664 emit_move_insn (object, zero);
2665 return NULL;
2666 }
2667
2668 if (COMPLEX_MODE_P (mode))
2669 {
2670 zero = CONST0_RTX (GET_MODE_INNER (mode));
2671 if (zero != NULL)
2672 {
2673 write_complex_part (object, zero, 0);
2674 write_complex_part (object, zero, 1);
2675 return NULL;
2676 }
2677 }
2678 }
2679
2680 if (size == const0_rtx)
2681 return NULL;
2682
2683 align = MEM_ALIGN (object);
2684
2685 if (CONST_INT_P (size)
2686 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2687 clear_by_pieces (object, INTVAL (size), align);
2688 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2689 expected_align, expected_size))
2690 ;
2691 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2692 return set_storage_via_libcall (object, size, const0_rtx,
2693 method == BLOCK_OP_TAILCALL);
2694 else
2695 gcc_unreachable ();
2696
2697 return NULL;
2698 }
2699
2700 rtx
2701 clear_storage (rtx object, rtx size, enum block_op_methods method)
2702 {
2703 return clear_storage_hints (object, size, method, 0, -1);
2704 }
2705
2706
2707 /* A subroutine of clear_storage. Expand a call to memset.
2708 Return the return value of memset, 0 otherwise. */
2709
2710 rtx
2711 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2712 {
2713 tree call_expr, fn, object_tree, size_tree, val_tree;
2714 enum machine_mode size_mode;
2715 rtx retval;
2716
2717 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2718 place those into new pseudos into a VAR_DECL and use them later. */
2719
2720 object = copy_addr_to_reg (XEXP (object, 0));
2721
2722 size_mode = TYPE_MODE (sizetype);
2723 size = convert_to_mode (size_mode, size, 1);
2724 size = copy_to_mode_reg (size_mode, size);
2725
2726 /* It is incorrect to use the libcall calling conventions to call
2727 memset in this context. This could be a user call to memset and
2728 the user may wish to examine the return value from memset. For
2729 targets where libcalls and normal calls have different conventions
2730 for returning pointers, we could end up generating incorrect code. */
2731
2732 object_tree = make_tree (ptr_type_node, object);
2733 if (!CONST_INT_P (val))
2734 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2735 size_tree = make_tree (sizetype, size);
2736 val_tree = make_tree (integer_type_node, val);
2737
2738 fn = clear_storage_libcall_fn (true);
2739 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2740 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2741
2742 retval = expand_normal (call_expr);
2743
2744 return retval;
2745 }
2746
2747 /* A subroutine of set_storage_via_libcall. Create the tree node
2748 for the function we use for block clears. */
2749
2750 tree block_clear_fn;
2751
2752 void
2753 init_block_clear_fn (const char *asmspec)
2754 {
2755 if (!block_clear_fn)
2756 {
2757 tree fn, args;
2758
2759 fn = get_identifier ("memset");
2760 args = build_function_type_list (ptr_type_node, ptr_type_node,
2761 integer_type_node, sizetype,
2762 NULL_TREE);
2763
2764 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2765 DECL_EXTERNAL (fn) = 1;
2766 TREE_PUBLIC (fn) = 1;
2767 DECL_ARTIFICIAL (fn) = 1;
2768 TREE_NOTHROW (fn) = 1;
2769 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2770 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2771
2772 block_clear_fn = fn;
2773 }
2774
2775 if (asmspec)
2776 set_user_assembler_name (block_clear_fn, asmspec);
2777 }
2778
2779 static tree
2780 clear_storage_libcall_fn (int for_call)
2781 {
2782 static bool emitted_extern;
2783
2784 if (!block_clear_fn)
2785 init_block_clear_fn (NULL);
2786
2787 if (for_call && !emitted_extern)
2788 {
2789 emitted_extern = true;
2790 make_decl_rtl (block_clear_fn);
2791 }
2792
2793 return block_clear_fn;
2794 }
2795 \f
2796 /* Expand a setmem pattern; return true if successful. */
2797
2798 bool
2799 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2800 unsigned int expected_align, HOST_WIDE_INT expected_size)
2801 {
2802 /* Try the most limited insn first, because there's no point
2803 including more than one in the machine description unless
2804 the more limited one has some advantage. */
2805
2806 enum machine_mode mode;
2807
2808 if (expected_align < align)
2809 expected_align = align;
2810
2811 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2812 mode = GET_MODE_WIDER_MODE (mode))
2813 {
2814 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2815
2816 if (code != CODE_FOR_nothing
2817 /* We don't need MODE to be narrower than
2818 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2819 the mode mask, as it is returned by the macro, it will
2820 definitely be less than the actual mode mask. */
2821 && ((CONST_INT_P (size)
2822 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2823 <= (GET_MODE_MASK (mode) >> 1)))
2824 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2825 {
2826 struct expand_operand ops[6];
2827 unsigned int nops;
2828
2829 nops = insn_data[(int) code].n_generator_args;
2830 gcc_assert (nops == 4 || nops == 6);
2831
2832 create_fixed_operand (&ops[0], object);
2833 /* The check above guarantees that this size conversion is valid. */
2834 create_convert_operand_to (&ops[1], size, mode, true);
2835 create_convert_operand_from (&ops[2], val, byte_mode, true);
2836 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2837 if (nops == 6)
2838 {
2839 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2840 create_integer_operand (&ops[5], expected_size);
2841 }
2842 if (maybe_expand_insn (code, nops, ops))
2843 return true;
2844 }
2845 }
2846
2847 return false;
2848 }
2849
2850 \f
2851 /* Write to one of the components of the complex value CPLX. Write VAL to
2852 the real part if IMAG_P is false, and the imaginary part if its true. */
2853
2854 static void
2855 write_complex_part (rtx cplx, rtx val, bool imag_p)
2856 {
2857 enum machine_mode cmode;
2858 enum machine_mode imode;
2859 unsigned ibitsize;
2860
2861 if (GET_CODE (cplx) == CONCAT)
2862 {
2863 emit_move_insn (XEXP (cplx, imag_p), val);
2864 return;
2865 }
2866
2867 cmode = GET_MODE (cplx);
2868 imode = GET_MODE_INNER (cmode);
2869 ibitsize = GET_MODE_BITSIZE (imode);
2870
2871 /* For MEMs simplify_gen_subreg may generate an invalid new address
2872 because, e.g., the original address is considered mode-dependent
2873 by the target, which restricts simplify_subreg from invoking
2874 adjust_address_nv. Instead of preparing fallback support for an
2875 invalid address, we call adjust_address_nv directly. */
2876 if (MEM_P (cplx))
2877 {
2878 emit_move_insn (adjust_address_nv (cplx, imode,
2879 imag_p ? GET_MODE_SIZE (imode) : 0),
2880 val);
2881 return;
2882 }
2883
2884 /* If the sub-object is at least word sized, then we know that subregging
2885 will work. This special case is important, since store_bit_field
2886 wants to operate on integer modes, and there's rarely an OImode to
2887 correspond to TCmode. */
2888 if (ibitsize >= BITS_PER_WORD
2889 /* For hard regs we have exact predicates. Assume we can split
2890 the original object if it spans an even number of hard regs.
2891 This special case is important for SCmode on 64-bit platforms
2892 where the natural size of floating-point regs is 32-bit. */
2893 || (REG_P (cplx)
2894 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2895 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2896 {
2897 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2898 imag_p ? GET_MODE_SIZE (imode) : 0);
2899 if (part)
2900 {
2901 emit_move_insn (part, val);
2902 return;
2903 }
2904 else
2905 /* simplify_gen_subreg may fail for sub-word MEMs. */
2906 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2907 }
2908
2909 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2910 }
2911
2912 /* Extract one of the components of the complex value CPLX. Extract the
2913 real part if IMAG_P is false, and the imaginary part if it's true. */
2914
2915 static rtx
2916 read_complex_part (rtx cplx, bool imag_p)
2917 {
2918 enum machine_mode cmode, imode;
2919 unsigned ibitsize;
2920
2921 if (GET_CODE (cplx) == CONCAT)
2922 return XEXP (cplx, imag_p);
2923
2924 cmode = GET_MODE (cplx);
2925 imode = GET_MODE_INNER (cmode);
2926 ibitsize = GET_MODE_BITSIZE (imode);
2927
2928 /* Special case reads from complex constants that got spilled to memory. */
2929 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2930 {
2931 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2932 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2933 {
2934 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2935 if (CONSTANT_CLASS_P (part))
2936 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2937 }
2938 }
2939
2940 /* For MEMs simplify_gen_subreg may generate an invalid new address
2941 because, e.g., the original address is considered mode-dependent
2942 by the target, which restricts simplify_subreg from invoking
2943 adjust_address_nv. Instead of preparing fallback support for an
2944 invalid address, we call adjust_address_nv directly. */
2945 if (MEM_P (cplx))
2946 return adjust_address_nv (cplx, imode,
2947 imag_p ? GET_MODE_SIZE (imode) : 0);
2948
2949 /* If the sub-object is at least word sized, then we know that subregging
2950 will work. This special case is important, since extract_bit_field
2951 wants to operate on integer modes, and there's rarely an OImode to
2952 correspond to TCmode. */
2953 if (ibitsize >= BITS_PER_WORD
2954 /* For hard regs we have exact predicates. Assume we can split
2955 the original object if it spans an even number of hard regs.
2956 This special case is important for SCmode on 64-bit platforms
2957 where the natural size of floating-point regs is 32-bit. */
2958 || (REG_P (cplx)
2959 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2960 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2961 {
2962 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2963 imag_p ? GET_MODE_SIZE (imode) : 0);
2964 if (ret)
2965 return ret;
2966 else
2967 /* simplify_gen_subreg may fail for sub-word MEMs. */
2968 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2969 }
2970
2971 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2972 true, false, NULL_RTX, imode, imode);
2973 }
2974 \f
2975 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2976 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2977 represented in NEW_MODE. If FORCE is true, this will never happen, as
2978 we'll force-create a SUBREG if needed. */
2979
2980 static rtx
2981 emit_move_change_mode (enum machine_mode new_mode,
2982 enum machine_mode old_mode, rtx x, bool force)
2983 {
2984 rtx ret;
2985
2986 if (push_operand (x, GET_MODE (x)))
2987 {
2988 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2989 MEM_COPY_ATTRIBUTES (ret, x);
2990 }
2991 else if (MEM_P (x))
2992 {
2993 /* We don't have to worry about changing the address since the
2994 size in bytes is supposed to be the same. */
2995 if (reload_in_progress)
2996 {
2997 /* Copy the MEM to change the mode and move any
2998 substitutions from the old MEM to the new one. */
2999 ret = adjust_address_nv (x, new_mode, 0);
3000 copy_replacements (x, ret);
3001 }
3002 else
3003 ret = adjust_address (x, new_mode, 0);
3004 }
3005 else
3006 {
3007 /* Note that we do want simplify_subreg's behavior of validating
3008 that the new mode is ok for a hard register. If we were to use
3009 simplify_gen_subreg, we would create the subreg, but would
3010 probably run into the target not being able to implement it. */
3011 /* Except, of course, when FORCE is true, when this is exactly what
3012 we want. Which is needed for CCmodes on some targets. */
3013 if (force)
3014 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3015 else
3016 ret = simplify_subreg (new_mode, x, old_mode, 0);
3017 }
3018
3019 return ret;
3020 }
3021
3022 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3023 an integer mode of the same size as MODE. Returns the instruction
3024 emitted, or NULL if such a move could not be generated. */
3025
3026 static rtx
3027 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3028 {
3029 enum machine_mode imode;
3030 enum insn_code code;
3031
3032 /* There must exist a mode of the exact size we require. */
3033 imode = int_mode_for_mode (mode);
3034 if (imode == BLKmode)
3035 return NULL_RTX;
3036
3037 /* The target must support moves in this mode. */
3038 code = optab_handler (mov_optab, imode);
3039 if (code == CODE_FOR_nothing)
3040 return NULL_RTX;
3041
3042 x = emit_move_change_mode (imode, mode, x, force);
3043 if (x == NULL_RTX)
3044 return NULL_RTX;
3045 y = emit_move_change_mode (imode, mode, y, force);
3046 if (y == NULL_RTX)
3047 return NULL_RTX;
3048 return emit_insn (GEN_FCN (code) (x, y));
3049 }
3050
3051 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3052 Return an equivalent MEM that does not use an auto-increment. */
3053
3054 static rtx
3055 emit_move_resolve_push (enum machine_mode mode, rtx x)
3056 {
3057 enum rtx_code code = GET_CODE (XEXP (x, 0));
3058 HOST_WIDE_INT adjust;
3059 rtx temp;
3060
3061 adjust = GET_MODE_SIZE (mode);
3062 #ifdef PUSH_ROUNDING
3063 adjust = PUSH_ROUNDING (adjust);
3064 #endif
3065 if (code == PRE_DEC || code == POST_DEC)
3066 adjust = -adjust;
3067 else if (code == PRE_MODIFY || code == POST_MODIFY)
3068 {
3069 rtx expr = XEXP (XEXP (x, 0), 1);
3070 HOST_WIDE_INT val;
3071
3072 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3073 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3074 val = INTVAL (XEXP (expr, 1));
3075 if (GET_CODE (expr) == MINUS)
3076 val = -val;
3077 gcc_assert (adjust == val || adjust == -val);
3078 adjust = val;
3079 }
3080
3081 /* Do not use anti_adjust_stack, since we don't want to update
3082 stack_pointer_delta. */
3083 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3084 GEN_INT (adjust), stack_pointer_rtx,
3085 0, OPTAB_LIB_WIDEN);
3086 if (temp != stack_pointer_rtx)
3087 emit_move_insn (stack_pointer_rtx, temp);
3088
3089 switch (code)
3090 {
3091 case PRE_INC:
3092 case PRE_DEC:
3093 case PRE_MODIFY:
3094 temp = stack_pointer_rtx;
3095 break;
3096 case POST_INC:
3097 case POST_DEC:
3098 case POST_MODIFY:
3099 temp = plus_constant (stack_pointer_rtx, -adjust);
3100 break;
3101 default:
3102 gcc_unreachable ();
3103 }
3104
3105 return replace_equiv_address (x, temp);
3106 }
3107
3108 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3109 X is known to satisfy push_operand, and MODE is known to be complex.
3110 Returns the last instruction emitted. */
3111
3112 rtx
3113 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3114 {
3115 enum machine_mode submode = GET_MODE_INNER (mode);
3116 bool imag_first;
3117
3118 #ifdef PUSH_ROUNDING
3119 unsigned int submodesize = GET_MODE_SIZE (submode);
3120
3121 /* In case we output to the stack, but the size is smaller than the
3122 machine can push exactly, we need to use move instructions. */
3123 if (PUSH_ROUNDING (submodesize) != submodesize)
3124 {
3125 x = emit_move_resolve_push (mode, x);
3126 return emit_move_insn (x, y);
3127 }
3128 #endif
3129
3130 /* Note that the real part always precedes the imag part in memory
3131 regardless of machine's endianness. */
3132 switch (GET_CODE (XEXP (x, 0)))
3133 {
3134 case PRE_DEC:
3135 case POST_DEC:
3136 imag_first = true;
3137 break;
3138 case PRE_INC:
3139 case POST_INC:
3140 imag_first = false;
3141 break;
3142 default:
3143 gcc_unreachable ();
3144 }
3145
3146 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3147 read_complex_part (y, imag_first));
3148 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3149 read_complex_part (y, !imag_first));
3150 }
3151
3152 /* A subroutine of emit_move_complex. Perform the move from Y to X
3153 via two moves of the parts. Returns the last instruction emitted. */
3154
3155 rtx
3156 emit_move_complex_parts (rtx x, rtx y)
3157 {
3158 /* Show the output dies here. This is necessary for SUBREGs
3159 of pseudos since we cannot track their lifetimes correctly;
3160 hard regs shouldn't appear here except as return values. */
3161 if (!reload_completed && !reload_in_progress
3162 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3163 emit_clobber (x);
3164
3165 write_complex_part (x, read_complex_part (y, false), false);
3166 write_complex_part (x, read_complex_part (y, true), true);
3167
3168 return get_last_insn ();
3169 }
3170
3171 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3172 MODE is known to be complex. Returns the last instruction emitted. */
3173
3174 static rtx
3175 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3176 {
3177 bool try_int;
3178
3179 /* Need to take special care for pushes, to maintain proper ordering
3180 of the data, and possibly extra padding. */
3181 if (push_operand (x, mode))
3182 return emit_move_complex_push (mode, x, y);
3183
3184 /* See if we can coerce the target into moving both values at once. */
3185
3186 /* Move floating point as parts. */
3187 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3188 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3189 try_int = false;
3190 /* Not possible if the values are inherently not adjacent. */
3191 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3192 try_int = false;
3193 /* Is possible if both are registers (or subregs of registers). */
3194 else if (register_operand (x, mode) && register_operand (y, mode))
3195 try_int = true;
3196 /* If one of the operands is a memory, and alignment constraints
3197 are friendly enough, we may be able to do combined memory operations.
3198 We do not attempt this if Y is a constant because that combination is
3199 usually better with the by-parts thing below. */
3200 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3201 && (!STRICT_ALIGNMENT
3202 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3203 try_int = true;
3204 else
3205 try_int = false;
3206
3207 if (try_int)
3208 {
3209 rtx ret;
3210
3211 /* For memory to memory moves, optimal behavior can be had with the
3212 existing block move logic. */
3213 if (MEM_P (x) && MEM_P (y))
3214 {
3215 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3216 BLOCK_OP_NO_LIBCALL);
3217 return get_last_insn ();
3218 }
3219
3220 ret = emit_move_via_integer (mode, x, y, true);
3221 if (ret)
3222 return ret;
3223 }
3224
3225 return emit_move_complex_parts (x, y);
3226 }
3227
3228 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3229 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3230
3231 static rtx
3232 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3233 {
3234 rtx ret;
3235
3236 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3237 if (mode != CCmode)
3238 {
3239 enum insn_code code = optab_handler (mov_optab, CCmode);
3240 if (code != CODE_FOR_nothing)
3241 {
3242 x = emit_move_change_mode (CCmode, mode, x, true);
3243 y = emit_move_change_mode (CCmode, mode, y, true);
3244 return emit_insn (GEN_FCN (code) (x, y));
3245 }
3246 }
3247
3248 /* Otherwise, find the MODE_INT mode of the same width. */
3249 ret = emit_move_via_integer (mode, x, y, false);
3250 gcc_assert (ret != NULL);
3251 return ret;
3252 }
3253
3254 /* Return true if word I of OP lies entirely in the
3255 undefined bits of a paradoxical subreg. */
3256
3257 static bool
3258 undefined_operand_subword_p (const_rtx op, int i)
3259 {
3260 enum machine_mode innermode, innermostmode;
3261 int offset;
3262 if (GET_CODE (op) != SUBREG)
3263 return false;
3264 innermode = GET_MODE (op);
3265 innermostmode = GET_MODE (SUBREG_REG (op));
3266 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3267 /* The SUBREG_BYTE represents offset, as if the value were stored in
3268 memory, except for a paradoxical subreg where we define
3269 SUBREG_BYTE to be 0; undo this exception as in
3270 simplify_subreg. */
3271 if (SUBREG_BYTE (op) == 0
3272 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3273 {
3274 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3275 if (WORDS_BIG_ENDIAN)
3276 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3277 if (BYTES_BIG_ENDIAN)
3278 offset += difference % UNITS_PER_WORD;
3279 }
3280 if (offset >= GET_MODE_SIZE (innermostmode)
3281 || offset <= -GET_MODE_SIZE (word_mode))
3282 return true;
3283 return false;
3284 }
3285
3286 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3287 MODE is any multi-word or full-word mode that lacks a move_insn
3288 pattern. Note that you will get better code if you define such
3289 patterns, even if they must turn into multiple assembler instructions. */
3290
3291 static rtx
3292 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3293 {
3294 rtx last_insn = 0;
3295 rtx seq, inner;
3296 bool need_clobber;
3297 int i;
3298
3299 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3300
3301 /* If X is a push on the stack, do the push now and replace
3302 X with a reference to the stack pointer. */
3303 if (push_operand (x, mode))
3304 x = emit_move_resolve_push (mode, x);
3305
3306 /* If we are in reload, see if either operand is a MEM whose address
3307 is scheduled for replacement. */
3308 if (reload_in_progress && MEM_P (x)
3309 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3310 x = replace_equiv_address_nv (x, inner);
3311 if (reload_in_progress && MEM_P (y)
3312 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3313 y = replace_equiv_address_nv (y, inner);
3314
3315 start_sequence ();
3316
3317 need_clobber = false;
3318 for (i = 0;
3319 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3320 i++)
3321 {
3322 rtx xpart = operand_subword (x, i, 1, mode);
3323 rtx ypart;
3324
3325 /* Do not generate code for a move if it would come entirely
3326 from the undefined bits of a paradoxical subreg. */
3327 if (undefined_operand_subword_p (y, i))
3328 continue;
3329
3330 ypart = operand_subword (y, i, 1, mode);
3331
3332 /* If we can't get a part of Y, put Y into memory if it is a
3333 constant. Otherwise, force it into a register. Then we must
3334 be able to get a part of Y. */
3335 if (ypart == 0 && CONSTANT_P (y))
3336 {
3337 y = use_anchored_address (force_const_mem (mode, y));
3338 ypart = operand_subword (y, i, 1, mode);
3339 }
3340 else if (ypart == 0)
3341 ypart = operand_subword_force (y, i, mode);
3342
3343 gcc_assert (xpart && ypart);
3344
3345 need_clobber |= (GET_CODE (xpart) == SUBREG);
3346
3347 last_insn = emit_move_insn (xpart, ypart);
3348 }
3349
3350 seq = get_insns ();
3351 end_sequence ();
3352
3353 /* Show the output dies here. This is necessary for SUBREGs
3354 of pseudos since we cannot track their lifetimes correctly;
3355 hard regs shouldn't appear here except as return values.
3356 We never want to emit such a clobber after reload. */
3357 if (x != y
3358 && ! (reload_in_progress || reload_completed)
3359 && need_clobber != 0)
3360 emit_clobber (x);
3361
3362 emit_insn (seq);
3363
3364 return last_insn;
3365 }
3366
3367 /* Low level part of emit_move_insn.
3368 Called just like emit_move_insn, but assumes X and Y
3369 are basically valid. */
3370
3371 rtx
3372 emit_move_insn_1 (rtx x, rtx y)
3373 {
3374 enum machine_mode mode = GET_MODE (x);
3375 enum insn_code code;
3376
3377 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3378
3379 code = optab_handler (mov_optab, mode);
3380 if (code != CODE_FOR_nothing)
3381 return emit_insn (GEN_FCN (code) (x, y));
3382
3383 /* Expand complex moves by moving real part and imag part. */
3384 if (COMPLEX_MODE_P (mode))
3385 return emit_move_complex (mode, x, y);
3386
3387 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3388 || ALL_FIXED_POINT_MODE_P (mode))
3389 {
3390 rtx result = emit_move_via_integer (mode, x, y, true);
3391
3392 /* If we can't find an integer mode, use multi words. */
3393 if (result)
3394 return result;
3395 else
3396 return emit_move_multi_word (mode, x, y);
3397 }
3398
3399 if (GET_MODE_CLASS (mode) == MODE_CC)
3400 return emit_move_ccmode (mode, x, y);
3401
3402 /* Try using a move pattern for the corresponding integer mode. This is
3403 only safe when simplify_subreg can convert MODE constants into integer
3404 constants. At present, it can only do this reliably if the value
3405 fits within a HOST_WIDE_INT. */
3406 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3407 {
3408 rtx ret = emit_move_via_integer (mode, x, y, false);
3409 if (ret)
3410 return ret;
3411 }
3412
3413 return emit_move_multi_word (mode, x, y);
3414 }
3415
3416 /* Generate code to copy Y into X.
3417 Both Y and X must have the same mode, except that
3418 Y can be a constant with VOIDmode.
3419 This mode cannot be BLKmode; use emit_block_move for that.
3420
3421 Return the last instruction emitted. */
3422
3423 rtx
3424 emit_move_insn (rtx x, rtx y)
3425 {
3426 enum machine_mode mode = GET_MODE (x);
3427 rtx y_cst = NULL_RTX;
3428 rtx last_insn, set;
3429
3430 gcc_assert (mode != BLKmode
3431 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3432
3433 if (CONSTANT_P (y))
3434 {
3435 if (optimize
3436 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3437 && (last_insn = compress_float_constant (x, y)))
3438 return last_insn;
3439
3440 y_cst = y;
3441
3442 if (!targetm.legitimate_constant_p (mode, y))
3443 {
3444 y = force_const_mem (mode, y);
3445
3446 /* If the target's cannot_force_const_mem prevented the spill,
3447 assume that the target's move expanders will also take care
3448 of the non-legitimate constant. */
3449 if (!y)
3450 y = y_cst;
3451 else
3452 y = use_anchored_address (y);
3453 }
3454 }
3455
3456 /* If X or Y are memory references, verify that their addresses are valid
3457 for the machine. */
3458 if (MEM_P (x)
3459 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3460 MEM_ADDR_SPACE (x))
3461 && ! push_operand (x, GET_MODE (x))))
3462 x = validize_mem (x);
3463
3464 if (MEM_P (y)
3465 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3466 MEM_ADDR_SPACE (y)))
3467 y = validize_mem (y);
3468
3469 gcc_assert (mode != BLKmode);
3470
3471 last_insn = emit_move_insn_1 (x, y);
3472
3473 if (y_cst && REG_P (x)
3474 && (set = single_set (last_insn)) != NULL_RTX
3475 && SET_DEST (set) == x
3476 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3477 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3478
3479 return last_insn;
3480 }
3481
3482 /* If Y is representable exactly in a narrower mode, and the target can
3483 perform the extension directly from constant or memory, then emit the
3484 move as an extension. */
3485
3486 static rtx
3487 compress_float_constant (rtx x, rtx y)
3488 {
3489 enum machine_mode dstmode = GET_MODE (x);
3490 enum machine_mode orig_srcmode = GET_MODE (y);
3491 enum machine_mode srcmode;
3492 REAL_VALUE_TYPE r;
3493 int oldcost, newcost;
3494 bool speed = optimize_insn_for_speed_p ();
3495
3496 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3497
3498 if (targetm.legitimate_constant_p (dstmode, y))
3499 oldcost = set_src_cost (y, speed);
3500 else
3501 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3502
3503 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3504 srcmode != orig_srcmode;
3505 srcmode = GET_MODE_WIDER_MODE (srcmode))
3506 {
3507 enum insn_code ic;
3508 rtx trunc_y, last_insn;
3509
3510 /* Skip if the target can't extend this way. */
3511 ic = can_extend_p (dstmode, srcmode, 0);
3512 if (ic == CODE_FOR_nothing)
3513 continue;
3514
3515 /* Skip if the narrowed value isn't exact. */
3516 if (! exact_real_truncate (srcmode, &r))
3517 continue;
3518
3519 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3520
3521 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3522 {
3523 /* Skip if the target needs extra instructions to perform
3524 the extension. */
3525 if (!insn_operand_matches (ic, 1, trunc_y))
3526 continue;
3527 /* This is valid, but may not be cheaper than the original. */
3528 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3529 speed);
3530 if (oldcost < newcost)
3531 continue;
3532 }
3533 else if (float_extend_from_mem[dstmode][srcmode])
3534 {
3535 trunc_y = force_const_mem (srcmode, trunc_y);
3536 /* This is valid, but may not be cheaper than the original. */
3537 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3538 speed);
3539 if (oldcost < newcost)
3540 continue;
3541 trunc_y = validize_mem (trunc_y);
3542 }
3543 else
3544 continue;
3545
3546 /* For CSE's benefit, force the compressed constant pool entry
3547 into a new pseudo. This constant may be used in different modes,
3548 and if not, combine will put things back together for us. */
3549 trunc_y = force_reg (srcmode, trunc_y);
3550 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3551 last_insn = get_last_insn ();
3552
3553 if (REG_P (x))
3554 set_unique_reg_note (last_insn, REG_EQUAL, y);
3555
3556 return last_insn;
3557 }
3558
3559 return NULL_RTX;
3560 }
3561 \f
3562 /* Pushing data onto the stack. */
3563
3564 /* Push a block of length SIZE (perhaps variable)
3565 and return an rtx to address the beginning of the block.
3566 The value may be virtual_outgoing_args_rtx.
3567
3568 EXTRA is the number of bytes of padding to push in addition to SIZE.
3569 BELOW nonzero means this padding comes at low addresses;
3570 otherwise, the padding comes at high addresses. */
3571
3572 rtx
3573 push_block (rtx size, int extra, int below)
3574 {
3575 rtx temp;
3576
3577 size = convert_modes (Pmode, ptr_mode, size, 1);
3578 if (CONSTANT_P (size))
3579 anti_adjust_stack (plus_constant (size, extra));
3580 else if (REG_P (size) && extra == 0)
3581 anti_adjust_stack (size);
3582 else
3583 {
3584 temp = copy_to_mode_reg (Pmode, size);
3585 if (extra != 0)
3586 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3587 temp, 0, OPTAB_LIB_WIDEN);
3588 anti_adjust_stack (temp);
3589 }
3590
3591 #ifndef STACK_GROWS_DOWNWARD
3592 if (0)
3593 #else
3594 if (1)
3595 #endif
3596 {
3597 temp = virtual_outgoing_args_rtx;
3598 if (extra != 0 && below)
3599 temp = plus_constant (temp, extra);
3600 }
3601 else
3602 {
3603 if (CONST_INT_P (size))
3604 temp = plus_constant (virtual_outgoing_args_rtx,
3605 -INTVAL (size) - (below ? 0 : extra));
3606 else if (extra != 0 && !below)
3607 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3608 negate_rtx (Pmode, plus_constant (size, extra)));
3609 else
3610 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3611 negate_rtx (Pmode, size));
3612 }
3613
3614 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3615 }
3616
3617 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3618
3619 static rtx
3620 mem_autoinc_base (rtx mem)
3621 {
3622 if (MEM_P (mem))
3623 {
3624 rtx addr = XEXP (mem, 0);
3625 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3626 return XEXP (addr, 0);
3627 }
3628 return NULL;
3629 }
3630
3631 /* A utility routine used here, in reload, and in try_split. The insns
3632 after PREV up to and including LAST are known to adjust the stack,
3633 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3634 placing notes as appropriate. PREV may be NULL, indicating the
3635 entire insn sequence prior to LAST should be scanned.
3636
3637 The set of allowed stack pointer modifications is small:
3638 (1) One or more auto-inc style memory references (aka pushes),
3639 (2) One or more addition/subtraction with the SP as destination,
3640 (3) A single move insn with the SP as destination,
3641 (4) A call_pop insn,
3642 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3643
3644 Insns in the sequence that do not modify the SP are ignored,
3645 except for noreturn calls.
3646
3647 The return value is the amount of adjustment that can be trivially
3648 verified, via immediate operand or auto-inc. If the adjustment
3649 cannot be trivially extracted, the return value is INT_MIN. */
3650
3651 HOST_WIDE_INT
3652 find_args_size_adjust (rtx insn)
3653 {
3654 rtx dest, set, pat;
3655 int i;
3656
3657 pat = PATTERN (insn);
3658 set = NULL;
3659
3660 /* Look for a call_pop pattern. */
3661 if (CALL_P (insn))
3662 {
3663 /* We have to allow non-call_pop patterns for the case
3664 of emit_single_push_insn of a TLS address. */
3665 if (GET_CODE (pat) != PARALLEL)
3666 return 0;
3667
3668 /* All call_pop have a stack pointer adjust in the parallel.
3669 The call itself is always first, and the stack adjust is
3670 usually last, so search from the end. */
3671 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3672 {
3673 set = XVECEXP (pat, 0, i);
3674 if (GET_CODE (set) != SET)
3675 continue;
3676 dest = SET_DEST (set);
3677 if (dest == stack_pointer_rtx)
3678 break;
3679 }
3680 /* We'd better have found the stack pointer adjust. */
3681 if (i == 0)
3682 return 0;
3683 /* Fall through to process the extracted SET and DEST
3684 as if it was a standalone insn. */
3685 }
3686 else if (GET_CODE (pat) == SET)
3687 set = pat;
3688 else if ((set = single_set (insn)) != NULL)
3689 ;
3690 else if (GET_CODE (pat) == PARALLEL)
3691 {
3692 /* ??? Some older ports use a parallel with a stack adjust
3693 and a store for a PUSH_ROUNDING pattern, rather than a
3694 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3695 /* ??? See h8300 and m68k, pushqi1. */
3696 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3697 {
3698 set = XVECEXP (pat, 0, i);
3699 if (GET_CODE (set) != SET)
3700 continue;
3701 dest = SET_DEST (set);
3702 if (dest == stack_pointer_rtx)
3703 break;
3704
3705 /* We do not expect an auto-inc of the sp in the parallel. */
3706 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3707 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3708 != stack_pointer_rtx);
3709 }
3710 if (i < 0)
3711 return 0;
3712 }
3713 else
3714 return 0;
3715
3716 dest = SET_DEST (set);
3717
3718 /* Look for direct modifications of the stack pointer. */
3719 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3720 {
3721 /* Look for a trivial adjustment, otherwise assume nothing. */
3722 /* Note that the SPU restore_stack_block pattern refers to
3723 the stack pointer in V4SImode. Consider that non-trivial. */
3724 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3725 && GET_CODE (SET_SRC (set)) == PLUS
3726 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3727 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3728 return INTVAL (XEXP (SET_SRC (set), 1));
3729 /* ??? Reload can generate no-op moves, which will be cleaned
3730 up later. Recognize it and continue searching. */
3731 else if (rtx_equal_p (dest, SET_SRC (set)))
3732 return 0;
3733 else
3734 return HOST_WIDE_INT_MIN;
3735 }
3736 else
3737 {
3738 rtx mem, addr;
3739
3740 /* Otherwise only think about autoinc patterns. */
3741 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3742 {
3743 mem = dest;
3744 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3745 != stack_pointer_rtx);
3746 }
3747 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3748 mem = SET_SRC (set);
3749 else
3750 return 0;
3751
3752 addr = XEXP (mem, 0);
3753 switch (GET_CODE (addr))
3754 {
3755 case PRE_INC:
3756 case POST_INC:
3757 return GET_MODE_SIZE (GET_MODE (mem));
3758 case PRE_DEC:
3759 case POST_DEC:
3760 return -GET_MODE_SIZE (GET_MODE (mem));
3761 case PRE_MODIFY:
3762 case POST_MODIFY:
3763 addr = XEXP (addr, 1);
3764 gcc_assert (GET_CODE (addr) == PLUS);
3765 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3766 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3767 return INTVAL (XEXP (addr, 1));
3768 default:
3769 gcc_unreachable ();
3770 }
3771 }
3772 }
3773
3774 int
3775 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3776 {
3777 int args_size = end_args_size;
3778 bool saw_unknown = false;
3779 rtx insn;
3780
3781 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3782 {
3783 HOST_WIDE_INT this_delta;
3784
3785 if (!NONDEBUG_INSN_P (insn))
3786 continue;
3787
3788 this_delta = find_args_size_adjust (insn);
3789 if (this_delta == 0)
3790 {
3791 if (!CALL_P (insn)
3792 || ACCUMULATE_OUTGOING_ARGS
3793 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3794 continue;
3795 }
3796
3797 gcc_assert (!saw_unknown);
3798 if (this_delta == HOST_WIDE_INT_MIN)
3799 saw_unknown = true;
3800
3801 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3802 #ifdef STACK_GROWS_DOWNWARD
3803 this_delta = -this_delta;
3804 #endif
3805 args_size -= this_delta;
3806 }
3807
3808 return saw_unknown ? INT_MIN : args_size;
3809 }
3810
3811 #ifdef PUSH_ROUNDING
3812 /* Emit single push insn. */
3813
3814 static void
3815 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3816 {
3817 rtx dest_addr;
3818 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3819 rtx dest;
3820 enum insn_code icode;
3821
3822 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3823 /* If there is push pattern, use it. Otherwise try old way of throwing
3824 MEM representing push operation to move expander. */
3825 icode = optab_handler (push_optab, mode);
3826 if (icode != CODE_FOR_nothing)
3827 {
3828 struct expand_operand ops[1];
3829
3830 create_input_operand (&ops[0], x, mode);
3831 if (maybe_expand_insn (icode, 1, ops))
3832 return;
3833 }
3834 if (GET_MODE_SIZE (mode) == rounded_size)
3835 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3836 /* If we are to pad downward, adjust the stack pointer first and
3837 then store X into the stack location using an offset. This is
3838 because emit_move_insn does not know how to pad; it does not have
3839 access to type. */
3840 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3841 {
3842 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3843 HOST_WIDE_INT offset;
3844
3845 emit_move_insn (stack_pointer_rtx,
3846 expand_binop (Pmode,
3847 #ifdef STACK_GROWS_DOWNWARD
3848 sub_optab,
3849 #else
3850 add_optab,
3851 #endif
3852 stack_pointer_rtx,
3853 GEN_INT (rounded_size),
3854 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3855
3856 offset = (HOST_WIDE_INT) padding_size;
3857 #ifdef STACK_GROWS_DOWNWARD
3858 if (STACK_PUSH_CODE == POST_DEC)
3859 /* We have already decremented the stack pointer, so get the
3860 previous value. */
3861 offset += (HOST_WIDE_INT) rounded_size;
3862 #else
3863 if (STACK_PUSH_CODE == POST_INC)
3864 /* We have already incremented the stack pointer, so get the
3865 previous value. */
3866 offset -= (HOST_WIDE_INT) rounded_size;
3867 #endif
3868 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3869 }
3870 else
3871 {
3872 #ifdef STACK_GROWS_DOWNWARD
3873 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3874 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3875 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3876 #else
3877 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3878 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3879 GEN_INT (rounded_size));
3880 #endif
3881 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3882 }
3883
3884 dest = gen_rtx_MEM (mode, dest_addr);
3885
3886 if (type != 0)
3887 {
3888 set_mem_attributes (dest, type, 1);
3889
3890 if (flag_optimize_sibling_calls)
3891 /* Function incoming arguments may overlap with sibling call
3892 outgoing arguments and we cannot allow reordering of reads
3893 from function arguments with stores to outgoing arguments
3894 of sibling calls. */
3895 set_mem_alias_set (dest, 0);
3896 }
3897 emit_move_insn (dest, x);
3898 }
3899
3900 /* Emit and annotate a single push insn. */
3901
3902 static void
3903 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3904 {
3905 int delta, old_delta = stack_pointer_delta;
3906 rtx prev = get_last_insn ();
3907 rtx last;
3908
3909 emit_single_push_insn_1 (mode, x, type);
3910
3911 last = get_last_insn ();
3912
3913 /* Notice the common case where we emitted exactly one insn. */
3914 if (PREV_INSN (last) == prev)
3915 {
3916 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3917 return;
3918 }
3919
3920 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3921 gcc_assert (delta == INT_MIN || delta == old_delta);
3922 }
3923 #endif
3924
3925 /* Generate code to push X onto the stack, assuming it has mode MODE and
3926 type TYPE.
3927 MODE is redundant except when X is a CONST_INT (since they don't
3928 carry mode info).
3929 SIZE is an rtx for the size of data to be copied (in bytes),
3930 needed only if X is BLKmode.
3931
3932 ALIGN (in bits) is maximum alignment we can assume.
3933
3934 If PARTIAL and REG are both nonzero, then copy that many of the first
3935 bytes of X into registers starting with REG, and push the rest of X.
3936 The amount of space pushed is decreased by PARTIAL bytes.
3937 REG must be a hard register in this case.
3938 If REG is zero but PARTIAL is not, take any all others actions for an
3939 argument partially in registers, but do not actually load any
3940 registers.
3941
3942 EXTRA is the amount in bytes of extra space to leave next to this arg.
3943 This is ignored if an argument block has already been allocated.
3944
3945 On a machine that lacks real push insns, ARGS_ADDR is the address of
3946 the bottom of the argument block for this call. We use indexing off there
3947 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3948 argument block has not been preallocated.
3949
3950 ARGS_SO_FAR is the size of args previously pushed for this call.
3951
3952 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3953 for arguments passed in registers. If nonzero, it will be the number
3954 of bytes required. */
3955
3956 void
3957 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3958 unsigned int align, int partial, rtx reg, int extra,
3959 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3960 rtx alignment_pad)
3961 {
3962 rtx xinner;
3963 enum direction stack_direction
3964 #ifdef STACK_GROWS_DOWNWARD
3965 = downward;
3966 #else
3967 = upward;
3968 #endif
3969
3970 /* Decide where to pad the argument: `downward' for below,
3971 `upward' for above, or `none' for don't pad it.
3972 Default is below for small data on big-endian machines; else above. */
3973 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3974
3975 /* Invert direction if stack is post-decrement.
3976 FIXME: why? */
3977 if (STACK_PUSH_CODE == POST_DEC)
3978 if (where_pad != none)
3979 where_pad = (where_pad == downward ? upward : downward);
3980
3981 xinner = x;
3982
3983 if (mode == BLKmode
3984 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3985 {
3986 /* Copy a block into the stack, entirely or partially. */
3987
3988 rtx temp;
3989 int used;
3990 int offset;
3991 int skip;
3992
3993 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3994 used = partial - offset;
3995
3996 if (mode != BLKmode)
3997 {
3998 /* A value is to be stored in an insufficiently aligned
3999 stack slot; copy via a suitably aligned slot if
4000 necessary. */
4001 size = GEN_INT (GET_MODE_SIZE (mode));
4002 if (!MEM_P (xinner))
4003 {
4004 temp = assign_temp (type, 0, 1, 1);
4005 emit_move_insn (temp, xinner);
4006 xinner = temp;
4007 }
4008 }
4009
4010 gcc_assert (size);
4011
4012 /* USED is now the # of bytes we need not copy to the stack
4013 because registers will take care of them. */
4014
4015 if (partial != 0)
4016 xinner = adjust_address (xinner, BLKmode, used);
4017
4018 /* If the partial register-part of the arg counts in its stack size,
4019 skip the part of stack space corresponding to the registers.
4020 Otherwise, start copying to the beginning of the stack space,
4021 by setting SKIP to 0. */
4022 skip = (reg_parm_stack_space == 0) ? 0 : used;
4023
4024 #ifdef PUSH_ROUNDING
4025 /* Do it with several push insns if that doesn't take lots of insns
4026 and if there is no difficulty with push insns that skip bytes
4027 on the stack for alignment purposes. */
4028 if (args_addr == 0
4029 && PUSH_ARGS
4030 && CONST_INT_P (size)
4031 && skip == 0
4032 && MEM_ALIGN (xinner) >= align
4033 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
4034 /* Here we avoid the case of a structure whose weak alignment
4035 forces many pushes of a small amount of data,
4036 and such small pushes do rounding that causes trouble. */
4037 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4038 || align >= BIGGEST_ALIGNMENT
4039 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4040 == (align / BITS_PER_UNIT)))
4041 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4042 {
4043 /* Push padding now if padding above and stack grows down,
4044 or if padding below and stack grows up.
4045 But if space already allocated, this has already been done. */
4046 if (extra && args_addr == 0
4047 && where_pad != none && where_pad != stack_direction)
4048 anti_adjust_stack (GEN_INT (extra));
4049
4050 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4051 }
4052 else
4053 #endif /* PUSH_ROUNDING */
4054 {
4055 rtx target;
4056
4057 /* Otherwise make space on the stack and copy the data
4058 to the address of that space. */
4059
4060 /* Deduct words put into registers from the size we must copy. */
4061 if (partial != 0)
4062 {
4063 if (CONST_INT_P (size))
4064 size = GEN_INT (INTVAL (size) - used);
4065 else
4066 size = expand_binop (GET_MODE (size), sub_optab, size,
4067 GEN_INT (used), NULL_RTX, 0,
4068 OPTAB_LIB_WIDEN);
4069 }
4070
4071 /* Get the address of the stack space.
4072 In this case, we do not deal with EXTRA separately.
4073 A single stack adjust will do. */
4074 if (! args_addr)
4075 {
4076 temp = push_block (size, extra, where_pad == downward);
4077 extra = 0;
4078 }
4079 else if (CONST_INT_P (args_so_far))
4080 temp = memory_address (BLKmode,
4081 plus_constant (args_addr,
4082 skip + INTVAL (args_so_far)));
4083 else
4084 temp = memory_address (BLKmode,
4085 plus_constant (gen_rtx_PLUS (Pmode,
4086 args_addr,
4087 args_so_far),
4088 skip));
4089
4090 if (!ACCUMULATE_OUTGOING_ARGS)
4091 {
4092 /* If the source is referenced relative to the stack pointer,
4093 copy it to another register to stabilize it. We do not need
4094 to do this if we know that we won't be changing sp. */
4095
4096 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4097 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4098 temp = copy_to_reg (temp);
4099 }
4100
4101 target = gen_rtx_MEM (BLKmode, temp);
4102
4103 /* We do *not* set_mem_attributes here, because incoming arguments
4104 may overlap with sibling call outgoing arguments and we cannot
4105 allow reordering of reads from function arguments with stores
4106 to outgoing arguments of sibling calls. We do, however, want
4107 to record the alignment of the stack slot. */
4108 /* ALIGN may well be better aligned than TYPE, e.g. due to
4109 PARM_BOUNDARY. Assume the caller isn't lying. */
4110 set_mem_align (target, align);
4111
4112 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4113 }
4114 }
4115 else if (partial > 0)
4116 {
4117 /* Scalar partly in registers. */
4118
4119 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4120 int i;
4121 int not_stack;
4122 /* # bytes of start of argument
4123 that we must make space for but need not store. */
4124 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4125 int args_offset = INTVAL (args_so_far);
4126 int skip;
4127
4128 /* Push padding now if padding above and stack grows down,
4129 or if padding below and stack grows up.
4130 But if space already allocated, this has already been done. */
4131 if (extra && args_addr == 0
4132 && where_pad != none && where_pad != stack_direction)
4133 anti_adjust_stack (GEN_INT (extra));
4134
4135 /* If we make space by pushing it, we might as well push
4136 the real data. Otherwise, we can leave OFFSET nonzero
4137 and leave the space uninitialized. */
4138 if (args_addr == 0)
4139 offset = 0;
4140
4141 /* Now NOT_STACK gets the number of words that we don't need to
4142 allocate on the stack. Convert OFFSET to words too. */
4143 not_stack = (partial - offset) / UNITS_PER_WORD;
4144 offset /= UNITS_PER_WORD;
4145
4146 /* If the partial register-part of the arg counts in its stack size,
4147 skip the part of stack space corresponding to the registers.
4148 Otherwise, start copying to the beginning of the stack space,
4149 by setting SKIP to 0. */
4150 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4151
4152 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4153 x = validize_mem (force_const_mem (mode, x));
4154
4155 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4156 SUBREGs of such registers are not allowed. */
4157 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4158 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4159 x = copy_to_reg (x);
4160
4161 /* Loop over all the words allocated on the stack for this arg. */
4162 /* We can do it by words, because any scalar bigger than a word
4163 has a size a multiple of a word. */
4164 #ifndef PUSH_ARGS_REVERSED
4165 for (i = not_stack; i < size; i++)
4166 #else
4167 for (i = size - 1; i >= not_stack; i--)
4168 #endif
4169 if (i >= not_stack + offset)
4170 emit_push_insn (operand_subword_force (x, i, mode),
4171 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4172 0, args_addr,
4173 GEN_INT (args_offset + ((i - not_stack + skip)
4174 * UNITS_PER_WORD)),
4175 reg_parm_stack_space, alignment_pad);
4176 }
4177 else
4178 {
4179 rtx addr;
4180 rtx dest;
4181
4182 /* Push padding now if padding above and stack grows down,
4183 or if padding below and stack grows up.
4184 But if space already allocated, this has already been done. */
4185 if (extra && args_addr == 0
4186 && where_pad != none && where_pad != stack_direction)
4187 anti_adjust_stack (GEN_INT (extra));
4188
4189 #ifdef PUSH_ROUNDING
4190 if (args_addr == 0 && PUSH_ARGS)
4191 emit_single_push_insn (mode, x, type);
4192 else
4193 #endif
4194 {
4195 if (CONST_INT_P (args_so_far))
4196 addr
4197 = memory_address (mode,
4198 plus_constant (args_addr,
4199 INTVAL (args_so_far)));
4200 else
4201 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4202 args_so_far));
4203 dest = gen_rtx_MEM (mode, addr);
4204
4205 /* We do *not* set_mem_attributes here, because incoming arguments
4206 may overlap with sibling call outgoing arguments and we cannot
4207 allow reordering of reads from function arguments with stores
4208 to outgoing arguments of sibling calls. We do, however, want
4209 to record the alignment of the stack slot. */
4210 /* ALIGN may well be better aligned than TYPE, e.g. due to
4211 PARM_BOUNDARY. Assume the caller isn't lying. */
4212 set_mem_align (dest, align);
4213
4214 emit_move_insn (dest, x);
4215 }
4216 }
4217
4218 /* If part should go in registers, copy that part
4219 into the appropriate registers. Do this now, at the end,
4220 since mem-to-mem copies above may do function calls. */
4221 if (partial > 0 && reg != 0)
4222 {
4223 /* Handle calls that pass values in multiple non-contiguous locations.
4224 The Irix 6 ABI has examples of this. */
4225 if (GET_CODE (reg) == PARALLEL)
4226 emit_group_load (reg, x, type, -1);
4227 else
4228 {
4229 gcc_assert (partial % UNITS_PER_WORD == 0);
4230 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4231 }
4232 }
4233
4234 if (extra && args_addr == 0 && where_pad == stack_direction)
4235 anti_adjust_stack (GEN_INT (extra));
4236
4237 if (alignment_pad && args_addr == 0)
4238 anti_adjust_stack (alignment_pad);
4239 }
4240 \f
4241 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4242 operations. */
4243
4244 static rtx
4245 get_subtarget (rtx x)
4246 {
4247 return (optimize
4248 || x == 0
4249 /* Only registers can be subtargets. */
4250 || !REG_P (x)
4251 /* Don't use hard regs to avoid extending their life. */
4252 || REGNO (x) < FIRST_PSEUDO_REGISTER
4253 ? 0 : x);
4254 }
4255
4256 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4257 FIELD is a bitfield. Returns true if the optimization was successful,
4258 and there's nothing else to do. */
4259
4260 static bool
4261 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4262 unsigned HOST_WIDE_INT bitpos,
4263 unsigned HOST_WIDE_INT bitregion_start,
4264 unsigned HOST_WIDE_INT bitregion_end,
4265 enum machine_mode mode1, rtx str_rtx,
4266 tree to, tree src)
4267 {
4268 enum machine_mode str_mode = GET_MODE (str_rtx);
4269 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4270 tree op0, op1;
4271 rtx value, result;
4272 optab binop;
4273 gimple srcstmt;
4274 enum tree_code code;
4275
4276 if (mode1 != VOIDmode
4277 || bitsize >= BITS_PER_WORD
4278 || str_bitsize > BITS_PER_WORD
4279 || TREE_SIDE_EFFECTS (to)
4280 || TREE_THIS_VOLATILE (to))
4281 return false;
4282
4283 STRIP_NOPS (src);
4284 if (TREE_CODE (src) != SSA_NAME)
4285 return false;
4286 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4287 return false;
4288
4289 srcstmt = get_gimple_for_ssa_name (src);
4290 if (!srcstmt
4291 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4292 return false;
4293
4294 code = gimple_assign_rhs_code (srcstmt);
4295
4296 op0 = gimple_assign_rhs1 (srcstmt);
4297
4298 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4299 to find its initialization. Hopefully the initialization will
4300 be from a bitfield load. */
4301 if (TREE_CODE (op0) == SSA_NAME)
4302 {
4303 gimple op0stmt = get_gimple_for_ssa_name (op0);
4304
4305 /* We want to eventually have OP0 be the same as TO, which
4306 should be a bitfield. */
4307 if (!op0stmt
4308 || !is_gimple_assign (op0stmt)
4309 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4310 return false;
4311 op0 = gimple_assign_rhs1 (op0stmt);
4312 }
4313
4314 op1 = gimple_assign_rhs2 (srcstmt);
4315
4316 if (!operand_equal_p (to, op0, 0))
4317 return false;
4318
4319 if (MEM_P (str_rtx))
4320 {
4321 unsigned HOST_WIDE_INT offset1;
4322
4323 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4324 str_mode = word_mode;
4325 str_mode = get_best_mode (bitsize, bitpos,
4326 bitregion_start, bitregion_end,
4327 MEM_ALIGN (str_rtx), str_mode, 0);
4328 if (str_mode == VOIDmode)
4329 return false;
4330 str_bitsize = GET_MODE_BITSIZE (str_mode);
4331
4332 offset1 = bitpos;
4333 bitpos %= str_bitsize;
4334 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4335 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4336 }
4337 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4338 return false;
4339
4340 /* If the bit field covers the whole REG/MEM, store_field
4341 will likely generate better code. */
4342 if (bitsize >= str_bitsize)
4343 return false;
4344
4345 /* We can't handle fields split across multiple entities. */
4346 if (bitpos + bitsize > str_bitsize)
4347 return false;
4348
4349 if (BYTES_BIG_ENDIAN)
4350 bitpos = str_bitsize - bitpos - bitsize;
4351
4352 switch (code)
4353 {
4354 case PLUS_EXPR:
4355 case MINUS_EXPR:
4356 /* For now, just optimize the case of the topmost bitfield
4357 where we don't need to do any masking and also
4358 1 bit bitfields where xor can be used.
4359 We might win by one instruction for the other bitfields
4360 too if insv/extv instructions aren't used, so that
4361 can be added later. */
4362 if (bitpos + bitsize != str_bitsize
4363 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4364 break;
4365
4366 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4367 value = convert_modes (str_mode,
4368 TYPE_MODE (TREE_TYPE (op1)), value,
4369 TYPE_UNSIGNED (TREE_TYPE (op1)));
4370
4371 /* We may be accessing data outside the field, which means
4372 we can alias adjacent data. */
4373 if (MEM_P (str_rtx))
4374 {
4375 str_rtx = shallow_copy_rtx (str_rtx);
4376 set_mem_alias_set (str_rtx, 0);
4377 set_mem_expr (str_rtx, 0);
4378 }
4379
4380 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4381 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4382 {
4383 value = expand_and (str_mode, value, const1_rtx, NULL);
4384 binop = xor_optab;
4385 }
4386 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4387 result = expand_binop (str_mode, binop, str_rtx,
4388 value, str_rtx, 1, OPTAB_WIDEN);
4389 if (result != str_rtx)
4390 emit_move_insn (str_rtx, result);
4391 return true;
4392
4393 case BIT_IOR_EXPR:
4394 case BIT_XOR_EXPR:
4395 if (TREE_CODE (op1) != INTEGER_CST)
4396 break;
4397 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4398 value = convert_modes (str_mode,
4399 TYPE_MODE (TREE_TYPE (op1)), value,
4400 TYPE_UNSIGNED (TREE_TYPE (op1)));
4401
4402 /* We may be accessing data outside the field, which means
4403 we can alias adjacent data. */
4404 if (MEM_P (str_rtx))
4405 {
4406 str_rtx = shallow_copy_rtx (str_rtx);
4407 set_mem_alias_set (str_rtx, 0);
4408 set_mem_expr (str_rtx, 0);
4409 }
4410
4411 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4412 if (bitpos + bitsize != str_bitsize)
4413 {
4414 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1);
4415 value = expand_and (str_mode, value, mask, NULL_RTX);
4416 }
4417 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4418 result = expand_binop (str_mode, binop, str_rtx,
4419 value, str_rtx, 1, OPTAB_WIDEN);
4420 if (result != str_rtx)
4421 emit_move_insn (str_rtx, result);
4422 return true;
4423
4424 default:
4425 break;
4426 }
4427
4428 return false;
4429 }
4430
4431 /* In the C++ memory model, consecutive bit fields in a structure are
4432 considered one memory location.
4433
4434 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4435 returns the bit range of consecutive bits in which this COMPONENT_REF
4436 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4437 and *OFFSET may be adjusted in the process.
4438
4439 If the access does not need to be restricted, 0 is returned in both
4440 *BITSTART and *BITEND. */
4441
4442 static void
4443 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4444 unsigned HOST_WIDE_INT *bitend,
4445 tree exp,
4446 HOST_WIDE_INT *bitpos,
4447 tree *offset)
4448 {
4449 HOST_WIDE_INT bitoffset;
4450 tree field, repr;
4451
4452 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4453
4454 field = TREE_OPERAND (exp, 1);
4455 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4456 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4457 need to limit the range we can access. */
4458 if (!repr)
4459 {
4460 *bitstart = *bitend = 0;
4461 return;
4462 }
4463
4464 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4465 part of a larger bit field, then the representative does not serve any
4466 useful purpose. This can occur in Ada. */
4467 if (handled_component_p (TREE_OPERAND (exp, 0)))
4468 {
4469 enum machine_mode rmode;
4470 HOST_WIDE_INT rbitsize, rbitpos;
4471 tree roffset;
4472 int unsignedp;
4473 int volatilep = 0;
4474 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4475 &roffset, &rmode, &unsignedp, &volatilep, false);
4476 if ((rbitpos % BITS_PER_UNIT) != 0)
4477 {
4478 *bitstart = *bitend = 0;
4479 return;
4480 }
4481 }
4482
4483 /* Compute the adjustment to bitpos from the offset of the field
4484 relative to the representative. DECL_FIELD_OFFSET of field and
4485 repr are the same by construction if they are not constants,
4486 see finish_bitfield_layout. */
4487 if (host_integerp (DECL_FIELD_OFFSET (field), 1)
4488 && host_integerp (DECL_FIELD_OFFSET (repr), 1))
4489 bitoffset = (tree_low_cst (DECL_FIELD_OFFSET (field), 1)
4490 - tree_low_cst (DECL_FIELD_OFFSET (repr), 1)) * BITS_PER_UNIT;
4491 else
4492 bitoffset = 0;
4493 bitoffset += (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
4494 - tree_low_cst (DECL_FIELD_BIT_OFFSET (repr), 1));
4495
4496 /* If the adjustment is larger than bitpos, we would have a negative bit
4497 position for the lower bound and this may wreak havoc later. This can
4498 occur only if we have a non-null offset, so adjust offset and bitpos
4499 to make the lower bound non-negative. */
4500 if (bitoffset > *bitpos)
4501 {
4502 HOST_WIDE_INT adjust = bitoffset - *bitpos;
4503
4504 gcc_assert ((adjust % BITS_PER_UNIT) == 0);
4505 gcc_assert (*offset != NULL_TREE);
4506
4507 *bitpos += adjust;
4508 *offset
4509 = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));
4510 *bitstart = 0;
4511 }
4512 else
4513 *bitstart = *bitpos - bitoffset;
4514
4515 *bitend = *bitstart + tree_low_cst (DECL_SIZE (repr), 1) - 1;
4516 }
4517
4518 /* Returns true if the MEM_REF REF refers to an object that does not
4519 reside in memory and has non-BLKmode. */
4520
4521 static bool
4522 mem_ref_refers_to_non_mem_p (tree ref)
4523 {
4524 tree base = TREE_OPERAND (ref, 0);
4525 if (TREE_CODE (base) != ADDR_EXPR)
4526 return false;
4527 base = TREE_OPERAND (base, 0);
4528 return (DECL_P (base)
4529 && !TREE_ADDRESSABLE (base)
4530 && DECL_MODE (base) != BLKmode
4531 && DECL_RTL_SET_P (base)
4532 && !MEM_P (DECL_RTL (base)));
4533 }
4534
4535 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4536 is true, try generating a nontemporal store. */
4537
4538 void
4539 expand_assignment (tree to, tree from, bool nontemporal)
4540 {
4541 rtx to_rtx = 0;
4542 rtx result;
4543 enum machine_mode mode;
4544 unsigned int align;
4545 enum insn_code icode;
4546
4547 /* Don't crash if the lhs of the assignment was erroneous. */
4548 if (TREE_CODE (to) == ERROR_MARK)
4549 {
4550 expand_normal (from);
4551 return;
4552 }
4553
4554 /* Optimize away no-op moves without side-effects. */
4555 if (operand_equal_p (to, from, 0))
4556 return;
4557
4558 /* Handle misaligned stores. */
4559 mode = TYPE_MODE (TREE_TYPE (to));
4560 if ((TREE_CODE (to) == MEM_REF
4561 || TREE_CODE (to) == TARGET_MEM_REF)
4562 && mode != BLKmode
4563 && !mem_ref_refers_to_non_mem_p (to)
4564 && ((align = get_object_or_type_alignment (to))
4565 < GET_MODE_ALIGNMENT (mode))
4566 && (((icode = optab_handler (movmisalign_optab, mode))
4567 != CODE_FOR_nothing)
4568 || SLOW_UNALIGNED_ACCESS (mode, align)))
4569 {
4570 rtx reg, mem;
4571
4572 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4573 reg = force_not_mem (reg);
4574 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4575
4576 if (icode != CODE_FOR_nothing)
4577 {
4578 struct expand_operand ops[2];
4579
4580 create_fixed_operand (&ops[0], mem);
4581 create_input_operand (&ops[1], reg, mode);
4582 /* The movmisalign<mode> pattern cannot fail, else the assignment
4583 would silently be omitted. */
4584 expand_insn (icode, 2, ops);
4585 }
4586 else
4587 store_bit_field (mem, GET_MODE_BITSIZE (mode),
4588 0, 0, 0, mode, reg);
4589 return;
4590 }
4591
4592 /* Assignment of a structure component needs special treatment
4593 if the structure component's rtx is not simply a MEM.
4594 Assignment of an array element at a constant index, and assignment of
4595 an array element in an unaligned packed structure field, has the same
4596 problem. Same for (partially) storing into a non-memory object. */
4597 if (handled_component_p (to)
4598 || (TREE_CODE (to) == MEM_REF
4599 && mem_ref_refers_to_non_mem_p (to))
4600 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4601 {
4602 enum machine_mode mode1;
4603 HOST_WIDE_INT bitsize, bitpos;
4604 unsigned HOST_WIDE_INT bitregion_start = 0;
4605 unsigned HOST_WIDE_INT bitregion_end = 0;
4606 tree offset;
4607 int unsignedp;
4608 int volatilep = 0;
4609 tree tem;
4610 bool misalignp;
4611 rtx mem = NULL_RTX;
4612
4613 push_temp_slots ();
4614 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4615 &unsignedp, &volatilep, true);
4616
4617 if (TREE_CODE (to) == COMPONENT_REF
4618 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4619 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
4620
4621 /* If we are going to use store_bit_field and extract_bit_field,
4622 make sure to_rtx will be safe for multiple use. */
4623 mode = TYPE_MODE (TREE_TYPE (tem));
4624 if (TREE_CODE (tem) == MEM_REF
4625 && mode != BLKmode
4626 && ((align = get_object_or_type_alignment (tem))
4627 < GET_MODE_ALIGNMENT (mode))
4628 && ((icode = optab_handler (movmisalign_optab, mode))
4629 != CODE_FOR_nothing))
4630 {
4631 struct expand_operand ops[2];
4632
4633 misalignp = true;
4634 to_rtx = gen_reg_rtx (mode);
4635 mem = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4636
4637 /* If the misaligned store doesn't overwrite all bits, perform
4638 rmw cycle on MEM. */
4639 if (bitsize != GET_MODE_BITSIZE (mode))
4640 {
4641 create_input_operand (&ops[0], to_rtx, mode);
4642 create_fixed_operand (&ops[1], mem);
4643 /* The movmisalign<mode> pattern cannot fail, else the assignment
4644 would silently be omitted. */
4645 expand_insn (icode, 2, ops);
4646
4647 mem = copy_rtx (mem);
4648 }
4649 }
4650 else
4651 {
4652 misalignp = false;
4653 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4654 }
4655
4656 /* If the bitfield is volatile, we want to access it in the
4657 field's mode, not the computed mode.
4658 If a MEM has VOIDmode (external with incomplete type),
4659 use BLKmode for it instead. */
4660 if (MEM_P (to_rtx))
4661 {
4662 if (volatilep && flag_strict_volatile_bitfields > 0)
4663 to_rtx = adjust_address (to_rtx, mode1, 0);
4664 else if (GET_MODE (to_rtx) == VOIDmode)
4665 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4666 }
4667
4668 if (offset != 0)
4669 {
4670 enum machine_mode address_mode;
4671 rtx offset_rtx;
4672
4673 if (!MEM_P (to_rtx))
4674 {
4675 /* We can get constant negative offsets into arrays with broken
4676 user code. Translate this to a trap instead of ICEing. */
4677 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4678 expand_builtin_trap ();
4679 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4680 }
4681
4682 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4683 address_mode
4684 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4685 if (GET_MODE (offset_rtx) != address_mode)
4686 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4687
4688 /* A constant address in TO_RTX can have VOIDmode, we must not try
4689 to call force_reg for that case. Avoid that case. */
4690 if (MEM_P (to_rtx)
4691 && GET_MODE (to_rtx) == BLKmode
4692 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4693 && bitsize > 0
4694 && (bitpos % bitsize) == 0
4695 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4696 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4697 {
4698 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4699 bitpos = 0;
4700 }
4701
4702 to_rtx = offset_address (to_rtx, offset_rtx,
4703 highest_pow2_factor_for_target (to,
4704 offset));
4705 }
4706
4707 /* No action is needed if the target is not a memory and the field
4708 lies completely outside that target. This can occur if the source
4709 code contains an out-of-bounds access to a small array. */
4710 if (!MEM_P (to_rtx)
4711 && GET_MODE (to_rtx) != BLKmode
4712 && (unsigned HOST_WIDE_INT) bitpos
4713 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4714 {
4715 expand_normal (from);
4716 result = NULL;
4717 }
4718 /* Handle expand_expr of a complex value returning a CONCAT. */
4719 else if (GET_CODE (to_rtx) == CONCAT)
4720 {
4721 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4722 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4723 && bitpos == 0
4724 && bitsize == mode_bitsize)
4725 result = store_expr (from, to_rtx, false, nontemporal);
4726 else if (bitsize == mode_bitsize / 2
4727 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4728 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4729 nontemporal);
4730 else if (bitpos + bitsize <= mode_bitsize / 2)
4731 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4732 bitregion_start, bitregion_end,
4733 mode1, from, TREE_TYPE (tem),
4734 get_alias_set (to), nontemporal);
4735 else if (bitpos >= mode_bitsize / 2)
4736 result = store_field (XEXP (to_rtx, 1), bitsize,
4737 bitpos - mode_bitsize / 2,
4738 bitregion_start, bitregion_end,
4739 mode1, from,
4740 TREE_TYPE (tem), get_alias_set (to),
4741 nontemporal);
4742 else if (bitpos == 0 && bitsize == mode_bitsize)
4743 {
4744 rtx from_rtx;
4745 result = expand_normal (from);
4746 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4747 TYPE_MODE (TREE_TYPE (from)), 0);
4748 emit_move_insn (XEXP (to_rtx, 0),
4749 read_complex_part (from_rtx, false));
4750 emit_move_insn (XEXP (to_rtx, 1),
4751 read_complex_part (from_rtx, true));
4752 }
4753 else
4754 {
4755 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4756 GET_MODE_SIZE (GET_MODE (to_rtx)),
4757 0);
4758 write_complex_part (temp, XEXP (to_rtx, 0), false);
4759 write_complex_part (temp, XEXP (to_rtx, 1), true);
4760 result = store_field (temp, bitsize, bitpos,
4761 bitregion_start, bitregion_end,
4762 mode1, from,
4763 TREE_TYPE (tem), get_alias_set (to),
4764 nontemporal);
4765 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4766 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4767 }
4768 }
4769 else
4770 {
4771 if (MEM_P (to_rtx))
4772 {
4773 /* If the field is at offset zero, we could have been given the
4774 DECL_RTX of the parent struct. Don't munge it. */
4775 to_rtx = shallow_copy_rtx (to_rtx);
4776
4777 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4778
4779 /* Deal with volatile and readonly fields. The former is only
4780 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4781 if (volatilep)
4782 MEM_VOLATILE_P (to_rtx) = 1;
4783 if (component_uses_parent_alias_set (to))
4784 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4785 }
4786
4787 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4788 bitregion_start, bitregion_end,
4789 mode1,
4790 to_rtx, to, from))
4791 result = NULL;
4792 else
4793 result = store_field (to_rtx, bitsize, bitpos,
4794 bitregion_start, bitregion_end,
4795 mode1, from,
4796 TREE_TYPE (tem), get_alias_set (to),
4797 nontemporal);
4798 }
4799
4800 if (misalignp)
4801 {
4802 struct expand_operand ops[2];
4803
4804 create_fixed_operand (&ops[0], mem);
4805 create_input_operand (&ops[1], to_rtx, mode);
4806 /* The movmisalign<mode> pattern cannot fail, else the assignment
4807 would silently be omitted. */
4808 expand_insn (icode, 2, ops);
4809 }
4810
4811 if (result)
4812 preserve_temp_slots (result);
4813 free_temp_slots ();
4814 pop_temp_slots ();
4815 return;
4816 }
4817
4818 /* If the rhs is a function call and its value is not an aggregate,
4819 call the function before we start to compute the lhs.
4820 This is needed for correct code for cases such as
4821 val = setjmp (buf) on machines where reference to val
4822 requires loading up part of an address in a separate insn.
4823
4824 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4825 since it might be a promoted variable where the zero- or sign- extension
4826 needs to be done. Handling this in the normal way is safe because no
4827 computation is done before the call. The same is true for SSA names. */
4828 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4829 && COMPLETE_TYPE_P (TREE_TYPE (from))
4830 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4831 && ! (((TREE_CODE (to) == VAR_DECL
4832 || TREE_CODE (to) == PARM_DECL
4833 || TREE_CODE (to) == RESULT_DECL)
4834 && REG_P (DECL_RTL (to)))
4835 || TREE_CODE (to) == SSA_NAME))
4836 {
4837 rtx value;
4838
4839 push_temp_slots ();
4840 value = expand_normal (from);
4841 if (to_rtx == 0)
4842 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4843
4844 /* Handle calls that return values in multiple non-contiguous locations.
4845 The Irix 6 ABI has examples of this. */
4846 if (GET_CODE (to_rtx) == PARALLEL)
4847 emit_group_load (to_rtx, value, TREE_TYPE (from),
4848 int_size_in_bytes (TREE_TYPE (from)));
4849 else if (GET_MODE (to_rtx) == BLKmode)
4850 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4851 else
4852 {
4853 if (POINTER_TYPE_P (TREE_TYPE (to)))
4854 value = convert_memory_address_addr_space
4855 (GET_MODE (to_rtx), value,
4856 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4857
4858 emit_move_insn (to_rtx, value);
4859 }
4860 preserve_temp_slots (to_rtx);
4861 free_temp_slots ();
4862 pop_temp_slots ();
4863 return;
4864 }
4865
4866 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
4867 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4868
4869 /* Don't move directly into a return register. */
4870 if (TREE_CODE (to) == RESULT_DECL
4871 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4872 {
4873 rtx temp;
4874
4875 push_temp_slots ();
4876 if (REG_P (to_rtx) && TYPE_MODE (TREE_TYPE (from)) == BLKmode)
4877 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
4878 else
4879 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4880
4881 if (GET_CODE (to_rtx) == PARALLEL)
4882 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4883 int_size_in_bytes (TREE_TYPE (from)));
4884 else if (temp)
4885 emit_move_insn (to_rtx, temp);
4886
4887 preserve_temp_slots (to_rtx);
4888 free_temp_slots ();
4889 pop_temp_slots ();
4890 return;
4891 }
4892
4893 /* In case we are returning the contents of an object which overlaps
4894 the place the value is being stored, use a safe function when copying
4895 a value through a pointer into a structure value return block. */
4896 if (TREE_CODE (to) == RESULT_DECL
4897 && TREE_CODE (from) == INDIRECT_REF
4898 && ADDR_SPACE_GENERIC_P
4899 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4900 && refs_may_alias_p (to, from)
4901 && cfun->returns_struct
4902 && !cfun->returns_pcc_struct)
4903 {
4904 rtx from_rtx, size;
4905
4906 push_temp_slots ();
4907 size = expr_size (from);
4908 from_rtx = expand_normal (from);
4909
4910 emit_library_call (memmove_libfunc, LCT_NORMAL,
4911 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4912 XEXP (from_rtx, 0), Pmode,
4913 convert_to_mode (TYPE_MODE (sizetype),
4914 size, TYPE_UNSIGNED (sizetype)),
4915 TYPE_MODE (sizetype));
4916
4917 preserve_temp_slots (to_rtx);
4918 free_temp_slots ();
4919 pop_temp_slots ();
4920 return;
4921 }
4922
4923 /* Compute FROM and store the value in the rtx we got. */
4924
4925 push_temp_slots ();
4926 result = store_expr (from, to_rtx, 0, nontemporal);
4927 preserve_temp_slots (result);
4928 free_temp_slots ();
4929 pop_temp_slots ();
4930 return;
4931 }
4932
4933 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4934 succeeded, false otherwise. */
4935
4936 bool
4937 emit_storent_insn (rtx to, rtx from)
4938 {
4939 struct expand_operand ops[2];
4940 enum machine_mode mode = GET_MODE (to);
4941 enum insn_code code = optab_handler (storent_optab, mode);
4942
4943 if (code == CODE_FOR_nothing)
4944 return false;
4945
4946 create_fixed_operand (&ops[0], to);
4947 create_input_operand (&ops[1], from, mode);
4948 return maybe_expand_insn (code, 2, ops);
4949 }
4950
4951 /* Generate code for computing expression EXP,
4952 and storing the value into TARGET.
4953
4954 If the mode is BLKmode then we may return TARGET itself.
4955 It turns out that in BLKmode it doesn't cause a problem.
4956 because C has no operators that could combine two different
4957 assignments into the same BLKmode object with different values
4958 with no sequence point. Will other languages need this to
4959 be more thorough?
4960
4961 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4962 stack, and block moves may need to be treated specially.
4963
4964 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4965
4966 rtx
4967 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4968 {
4969 rtx temp;
4970 rtx alt_rtl = NULL_RTX;
4971 location_t loc = EXPR_LOCATION (exp);
4972
4973 if (VOID_TYPE_P (TREE_TYPE (exp)))
4974 {
4975 /* C++ can generate ?: expressions with a throw expression in one
4976 branch and an rvalue in the other. Here, we resolve attempts to
4977 store the throw expression's nonexistent result. */
4978 gcc_assert (!call_param_p);
4979 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4980 return NULL_RTX;
4981 }
4982 if (TREE_CODE (exp) == COMPOUND_EXPR)
4983 {
4984 /* Perform first part of compound expression, then assign from second
4985 part. */
4986 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4987 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4988 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4989 nontemporal);
4990 }
4991 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4992 {
4993 /* For conditional expression, get safe form of the target. Then
4994 test the condition, doing the appropriate assignment on either
4995 side. This avoids the creation of unnecessary temporaries.
4996 For non-BLKmode, it is more efficient not to do this. */
4997
4998 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
4999
5000 do_pending_stack_adjust ();
5001 NO_DEFER_POP;
5002 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5003 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5004 nontemporal);
5005 emit_jump_insn (gen_jump (lab2));
5006 emit_barrier ();
5007 emit_label (lab1);
5008 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5009 nontemporal);
5010 emit_label (lab2);
5011 OK_DEFER_POP;
5012
5013 return NULL_RTX;
5014 }
5015 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5016 /* If this is a scalar in a register that is stored in a wider mode
5017 than the declared mode, compute the result into its declared mode
5018 and then convert to the wider mode. Our value is the computed
5019 expression. */
5020 {
5021 rtx inner_target = 0;
5022
5023 /* We can do the conversion inside EXP, which will often result
5024 in some optimizations. Do the conversion in two steps: first
5025 change the signedness, if needed, then the extend. But don't
5026 do this if the type of EXP is a subtype of something else
5027 since then the conversion might involve more than just
5028 converting modes. */
5029 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5030 && TREE_TYPE (TREE_TYPE (exp)) == 0
5031 && GET_MODE_PRECISION (GET_MODE (target))
5032 == TYPE_PRECISION (TREE_TYPE (exp)))
5033 {
5034 if (TYPE_UNSIGNED (TREE_TYPE (exp))
5035 != SUBREG_PROMOTED_UNSIGNED_P (target))
5036 {
5037 /* Some types, e.g. Fortran's logical*4, won't have a signed
5038 version, so use the mode instead. */
5039 tree ntype
5040 = (signed_or_unsigned_type_for
5041 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
5042 if (ntype == NULL)
5043 ntype = lang_hooks.types.type_for_mode
5044 (TYPE_MODE (TREE_TYPE (exp)),
5045 SUBREG_PROMOTED_UNSIGNED_P (target));
5046
5047 exp = fold_convert_loc (loc, ntype, exp);
5048 }
5049
5050 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5051 (GET_MODE (SUBREG_REG (target)),
5052 SUBREG_PROMOTED_UNSIGNED_P (target)),
5053 exp);
5054
5055 inner_target = SUBREG_REG (target);
5056 }
5057
5058 temp = expand_expr (exp, inner_target, VOIDmode,
5059 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5060
5061 /* If TEMP is a VOIDmode constant, use convert_modes to make
5062 sure that we properly convert it. */
5063 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5064 {
5065 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5066 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
5067 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5068 GET_MODE (target), temp,
5069 SUBREG_PROMOTED_UNSIGNED_P (target));
5070 }
5071
5072 convert_move (SUBREG_REG (target), temp,
5073 SUBREG_PROMOTED_UNSIGNED_P (target));
5074
5075 return NULL_RTX;
5076 }
5077 else if ((TREE_CODE (exp) == STRING_CST
5078 || (TREE_CODE (exp) == MEM_REF
5079 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5080 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5081 == STRING_CST
5082 && integer_zerop (TREE_OPERAND (exp, 1))))
5083 && !nontemporal && !call_param_p
5084 && MEM_P (target))
5085 {
5086 /* Optimize initialization of an array with a STRING_CST. */
5087 HOST_WIDE_INT exp_len, str_copy_len;
5088 rtx dest_mem;
5089 tree str = TREE_CODE (exp) == STRING_CST
5090 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5091
5092 exp_len = int_expr_size (exp);
5093 if (exp_len <= 0)
5094 goto normal_expr;
5095
5096 if (TREE_STRING_LENGTH (str) <= 0)
5097 goto normal_expr;
5098
5099 str_copy_len = strlen (TREE_STRING_POINTER (str));
5100 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5101 goto normal_expr;
5102
5103 str_copy_len = TREE_STRING_LENGTH (str);
5104 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5105 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5106 {
5107 str_copy_len += STORE_MAX_PIECES - 1;
5108 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5109 }
5110 str_copy_len = MIN (str_copy_len, exp_len);
5111 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5112 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5113 MEM_ALIGN (target), false))
5114 goto normal_expr;
5115
5116 dest_mem = target;
5117
5118 dest_mem = store_by_pieces (dest_mem,
5119 str_copy_len, builtin_strncpy_read_str,
5120 CONST_CAST (char *,
5121 TREE_STRING_POINTER (str)),
5122 MEM_ALIGN (target), false,
5123 exp_len > str_copy_len ? 1 : 0);
5124 if (exp_len > str_copy_len)
5125 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5126 GEN_INT (exp_len - str_copy_len),
5127 BLOCK_OP_NORMAL);
5128 return NULL_RTX;
5129 }
5130 else
5131 {
5132 rtx tmp_target;
5133
5134 normal_expr:
5135 /* If we want to use a nontemporal store, force the value to
5136 register first. */
5137 tmp_target = nontemporal ? NULL_RTX : target;
5138 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5139 (call_param_p
5140 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5141 &alt_rtl);
5142 }
5143
5144 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5145 the same as that of TARGET, adjust the constant. This is needed, for
5146 example, in case it is a CONST_DOUBLE and we want only a word-sized
5147 value. */
5148 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5149 && TREE_CODE (exp) != ERROR_MARK
5150 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5151 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5152 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5153
5154 /* If value was not generated in the target, store it there.
5155 Convert the value to TARGET's type first if necessary and emit the
5156 pending incrementations that have been queued when expanding EXP.
5157 Note that we cannot emit the whole queue blindly because this will
5158 effectively disable the POST_INC optimization later.
5159
5160 If TEMP and TARGET compare equal according to rtx_equal_p, but
5161 one or both of them are volatile memory refs, we have to distinguish
5162 two cases:
5163 - expand_expr has used TARGET. In this case, we must not generate
5164 another copy. This can be detected by TARGET being equal according
5165 to == .
5166 - expand_expr has not used TARGET - that means that the source just
5167 happens to have the same RTX form. Since temp will have been created
5168 by expand_expr, it will compare unequal according to == .
5169 We must generate a copy in this case, to reach the correct number
5170 of volatile memory references. */
5171
5172 if ((! rtx_equal_p (temp, target)
5173 || (temp != target && (side_effects_p (temp)
5174 || side_effects_p (target))))
5175 && TREE_CODE (exp) != ERROR_MARK
5176 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5177 but TARGET is not valid memory reference, TEMP will differ
5178 from TARGET although it is really the same location. */
5179 && !(alt_rtl
5180 && rtx_equal_p (alt_rtl, target)
5181 && !side_effects_p (alt_rtl)
5182 && !side_effects_p (target))
5183 /* If there's nothing to copy, don't bother. Don't call
5184 expr_size unless necessary, because some front-ends (C++)
5185 expr_size-hook must not be given objects that are not
5186 supposed to be bit-copied or bit-initialized. */
5187 && expr_size (exp) != const0_rtx)
5188 {
5189 if (GET_MODE (temp) != GET_MODE (target)
5190 && GET_MODE (temp) != VOIDmode)
5191 {
5192 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5193 if (GET_MODE (target) == BLKmode
5194 && GET_MODE (temp) == BLKmode)
5195 emit_block_move (target, temp, expr_size (exp),
5196 (call_param_p
5197 ? BLOCK_OP_CALL_PARM
5198 : BLOCK_OP_NORMAL));
5199 else if (GET_MODE (target) == BLKmode)
5200 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5201 0, 0, 0, GET_MODE (temp), temp);
5202 else
5203 convert_move (target, temp, unsignedp);
5204 }
5205
5206 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5207 {
5208 /* Handle copying a string constant into an array. The string
5209 constant may be shorter than the array. So copy just the string's
5210 actual length, and clear the rest. First get the size of the data
5211 type of the string, which is actually the size of the target. */
5212 rtx size = expr_size (exp);
5213
5214 if (CONST_INT_P (size)
5215 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5216 emit_block_move (target, temp, size,
5217 (call_param_p
5218 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5219 else
5220 {
5221 enum machine_mode pointer_mode
5222 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5223 enum machine_mode address_mode
5224 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
5225
5226 /* Compute the size of the data to copy from the string. */
5227 tree copy_size
5228 = size_binop_loc (loc, MIN_EXPR,
5229 make_tree (sizetype, size),
5230 size_int (TREE_STRING_LENGTH (exp)));
5231 rtx copy_size_rtx
5232 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5233 (call_param_p
5234 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5235 rtx label = 0;
5236
5237 /* Copy that much. */
5238 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5239 TYPE_UNSIGNED (sizetype));
5240 emit_block_move (target, temp, copy_size_rtx,
5241 (call_param_p
5242 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5243
5244 /* Figure out how much is left in TARGET that we have to clear.
5245 Do all calculations in pointer_mode. */
5246 if (CONST_INT_P (copy_size_rtx))
5247 {
5248 size = plus_constant (size, -INTVAL (copy_size_rtx));
5249 target = adjust_address (target, BLKmode,
5250 INTVAL (copy_size_rtx));
5251 }
5252 else
5253 {
5254 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5255 copy_size_rtx, NULL_RTX, 0,
5256 OPTAB_LIB_WIDEN);
5257
5258 if (GET_MODE (copy_size_rtx) != address_mode)
5259 copy_size_rtx = convert_to_mode (address_mode,
5260 copy_size_rtx,
5261 TYPE_UNSIGNED (sizetype));
5262
5263 target = offset_address (target, copy_size_rtx,
5264 highest_pow2_factor (copy_size));
5265 label = gen_label_rtx ();
5266 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5267 GET_MODE (size), 0, label);
5268 }
5269
5270 if (size != const0_rtx)
5271 clear_storage (target, size, BLOCK_OP_NORMAL);
5272
5273 if (label)
5274 emit_label (label);
5275 }
5276 }
5277 /* Handle calls that return values in multiple non-contiguous locations.
5278 The Irix 6 ABI has examples of this. */
5279 else if (GET_CODE (target) == PARALLEL)
5280 emit_group_load (target, temp, TREE_TYPE (exp),
5281 int_size_in_bytes (TREE_TYPE (exp)));
5282 else if (GET_MODE (temp) == BLKmode)
5283 emit_block_move (target, temp, expr_size (exp),
5284 (call_param_p
5285 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5286 else if (nontemporal
5287 && emit_storent_insn (target, temp))
5288 /* If we managed to emit a nontemporal store, there is nothing else to
5289 do. */
5290 ;
5291 else
5292 {
5293 temp = force_operand (temp, target);
5294 if (temp != target)
5295 emit_move_insn (target, temp);
5296 }
5297 }
5298
5299 return NULL_RTX;
5300 }
5301 \f
5302 /* Return true if field F of structure TYPE is a flexible array. */
5303
5304 static bool
5305 flexible_array_member_p (const_tree f, const_tree type)
5306 {
5307 const_tree tf;
5308
5309 tf = TREE_TYPE (f);
5310 return (DECL_CHAIN (f) == NULL
5311 && TREE_CODE (tf) == ARRAY_TYPE
5312 && TYPE_DOMAIN (tf)
5313 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5314 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5315 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5316 && int_size_in_bytes (type) >= 0);
5317 }
5318
5319 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5320 must have in order for it to completely initialize a value of type TYPE.
5321 Return -1 if the number isn't known.
5322
5323 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5324
5325 static HOST_WIDE_INT
5326 count_type_elements (const_tree type, bool for_ctor_p)
5327 {
5328 switch (TREE_CODE (type))
5329 {
5330 case ARRAY_TYPE:
5331 {
5332 tree nelts;
5333
5334 nelts = array_type_nelts (type);
5335 if (nelts && host_integerp (nelts, 1))
5336 {
5337 unsigned HOST_WIDE_INT n;
5338
5339 n = tree_low_cst (nelts, 1) + 1;
5340 if (n == 0 || for_ctor_p)
5341 return n;
5342 else
5343 return n * count_type_elements (TREE_TYPE (type), false);
5344 }
5345 return for_ctor_p ? -1 : 1;
5346 }
5347
5348 case RECORD_TYPE:
5349 {
5350 unsigned HOST_WIDE_INT n;
5351 tree f;
5352
5353 n = 0;
5354 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5355 if (TREE_CODE (f) == FIELD_DECL)
5356 {
5357 if (!for_ctor_p)
5358 n += count_type_elements (TREE_TYPE (f), false);
5359 else if (!flexible_array_member_p (f, type))
5360 /* Don't count flexible arrays, which are not supposed
5361 to be initialized. */
5362 n += 1;
5363 }
5364
5365 return n;
5366 }
5367
5368 case UNION_TYPE:
5369 case QUAL_UNION_TYPE:
5370 {
5371 tree f;
5372 HOST_WIDE_INT n, m;
5373
5374 gcc_assert (!for_ctor_p);
5375 /* Estimate the number of scalars in each field and pick the
5376 maximum. Other estimates would do instead; the idea is simply
5377 to make sure that the estimate is not sensitive to the ordering
5378 of the fields. */
5379 n = 1;
5380 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5381 if (TREE_CODE (f) == FIELD_DECL)
5382 {
5383 m = count_type_elements (TREE_TYPE (f), false);
5384 /* If the field doesn't span the whole union, add an extra
5385 scalar for the rest. */
5386 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5387 TYPE_SIZE (type)) != 1)
5388 m++;
5389 if (n < m)
5390 n = m;
5391 }
5392 return n;
5393 }
5394
5395 case COMPLEX_TYPE:
5396 return 2;
5397
5398 case VECTOR_TYPE:
5399 return TYPE_VECTOR_SUBPARTS (type);
5400
5401 case INTEGER_TYPE:
5402 case REAL_TYPE:
5403 case FIXED_POINT_TYPE:
5404 case ENUMERAL_TYPE:
5405 case BOOLEAN_TYPE:
5406 case POINTER_TYPE:
5407 case OFFSET_TYPE:
5408 case REFERENCE_TYPE:
5409 case NULLPTR_TYPE:
5410 return 1;
5411
5412 case ERROR_MARK:
5413 return 0;
5414
5415 case VOID_TYPE:
5416 case METHOD_TYPE:
5417 case FUNCTION_TYPE:
5418 case LANG_TYPE:
5419 default:
5420 gcc_unreachable ();
5421 }
5422 }
5423
5424 /* Helper for categorize_ctor_elements. Identical interface. */
5425
5426 static bool
5427 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5428 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5429 {
5430 unsigned HOST_WIDE_INT idx;
5431 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5432 tree value, purpose, elt_type;
5433
5434 /* Whether CTOR is a valid constant initializer, in accordance with what
5435 initializer_constant_valid_p does. If inferred from the constructor
5436 elements, true until proven otherwise. */
5437 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5438 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5439
5440 nz_elts = 0;
5441 init_elts = 0;
5442 num_fields = 0;
5443 elt_type = NULL_TREE;
5444
5445 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5446 {
5447 HOST_WIDE_INT mult = 1;
5448
5449 if (TREE_CODE (purpose) == RANGE_EXPR)
5450 {
5451 tree lo_index = TREE_OPERAND (purpose, 0);
5452 tree hi_index = TREE_OPERAND (purpose, 1);
5453
5454 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5455 mult = (tree_low_cst (hi_index, 1)
5456 - tree_low_cst (lo_index, 1) + 1);
5457 }
5458 num_fields += mult;
5459 elt_type = TREE_TYPE (value);
5460
5461 switch (TREE_CODE (value))
5462 {
5463 case CONSTRUCTOR:
5464 {
5465 HOST_WIDE_INT nz = 0, ic = 0;
5466
5467 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5468 p_complete);
5469
5470 nz_elts += mult * nz;
5471 init_elts += mult * ic;
5472
5473 if (const_from_elts_p && const_p)
5474 const_p = const_elt_p;
5475 }
5476 break;
5477
5478 case INTEGER_CST:
5479 case REAL_CST:
5480 case FIXED_CST:
5481 if (!initializer_zerop (value))
5482 nz_elts += mult;
5483 init_elts += mult;
5484 break;
5485
5486 case STRING_CST:
5487 nz_elts += mult * TREE_STRING_LENGTH (value);
5488 init_elts += mult * TREE_STRING_LENGTH (value);
5489 break;
5490
5491 case COMPLEX_CST:
5492 if (!initializer_zerop (TREE_REALPART (value)))
5493 nz_elts += mult;
5494 if (!initializer_zerop (TREE_IMAGPART (value)))
5495 nz_elts += mult;
5496 init_elts += mult;
5497 break;
5498
5499 case VECTOR_CST:
5500 {
5501 unsigned i;
5502 for (i = 0; i < VECTOR_CST_NELTS (value); ++i)
5503 {
5504 tree v = VECTOR_CST_ELT (value, i);
5505 if (!initializer_zerop (v))
5506 nz_elts += mult;
5507 init_elts += mult;
5508 }
5509 }
5510 break;
5511
5512 default:
5513 {
5514 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5515 nz_elts += mult * tc;
5516 init_elts += mult * tc;
5517
5518 if (const_from_elts_p && const_p)
5519 const_p = initializer_constant_valid_p (value, elt_type)
5520 != NULL_TREE;
5521 }
5522 break;
5523 }
5524 }
5525
5526 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5527 num_fields, elt_type))
5528 *p_complete = false;
5529
5530 *p_nz_elts += nz_elts;
5531 *p_init_elts += init_elts;
5532
5533 return const_p;
5534 }
5535
5536 /* Examine CTOR to discover:
5537 * how many scalar fields are set to nonzero values,
5538 and place it in *P_NZ_ELTS;
5539 * how many scalar fields in total are in CTOR,
5540 and place it in *P_ELT_COUNT.
5541 * whether the constructor is complete -- in the sense that every
5542 meaningful byte is explicitly given a value --
5543 and place it in *P_COMPLETE.
5544
5545 Return whether or not CTOR is a valid static constant initializer, the same
5546 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5547
5548 bool
5549 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5550 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5551 {
5552 *p_nz_elts = 0;
5553 *p_init_elts = 0;
5554 *p_complete = true;
5555
5556 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5557 }
5558
5559 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5560 of which had type LAST_TYPE. Each element was itself a complete
5561 initializer, in the sense that every meaningful byte was explicitly
5562 given a value. Return true if the same is true for the constructor
5563 as a whole. */
5564
5565 bool
5566 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5567 const_tree last_type)
5568 {
5569 if (TREE_CODE (type) == UNION_TYPE
5570 || TREE_CODE (type) == QUAL_UNION_TYPE)
5571 {
5572 if (num_elts == 0)
5573 return false;
5574
5575 gcc_assert (num_elts == 1 && last_type);
5576
5577 /* ??? We could look at each element of the union, and find the
5578 largest element. Which would avoid comparing the size of the
5579 initialized element against any tail padding in the union.
5580 Doesn't seem worth the effort... */
5581 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5582 }
5583
5584 return count_type_elements (type, true) == num_elts;
5585 }
5586
5587 /* Return 1 if EXP contains mostly (3/4) zeros. */
5588
5589 static int
5590 mostly_zeros_p (const_tree exp)
5591 {
5592 if (TREE_CODE (exp) == CONSTRUCTOR)
5593 {
5594 HOST_WIDE_INT nz_elts, init_elts;
5595 bool complete_p;
5596
5597 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5598 return !complete_p || nz_elts < init_elts / 4;
5599 }
5600
5601 return initializer_zerop (exp);
5602 }
5603
5604 /* Return 1 if EXP contains all zeros. */
5605
5606 static int
5607 all_zeros_p (const_tree exp)
5608 {
5609 if (TREE_CODE (exp) == CONSTRUCTOR)
5610 {
5611 HOST_WIDE_INT nz_elts, init_elts;
5612 bool complete_p;
5613
5614 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5615 return nz_elts == 0;
5616 }
5617
5618 return initializer_zerop (exp);
5619 }
5620 \f
5621 /* Helper function for store_constructor.
5622 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5623 TYPE is the type of the CONSTRUCTOR, not the element type.
5624 CLEARED is as for store_constructor.
5625 ALIAS_SET is the alias set to use for any stores.
5626
5627 This provides a recursive shortcut back to store_constructor when it isn't
5628 necessary to go through store_field. This is so that we can pass through
5629 the cleared field to let store_constructor know that we may not have to
5630 clear a substructure if the outer structure has already been cleared. */
5631
5632 static void
5633 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5634 HOST_WIDE_INT bitpos, enum machine_mode mode,
5635 tree exp, tree type, int cleared,
5636 alias_set_type alias_set)
5637 {
5638 if (TREE_CODE (exp) == CONSTRUCTOR
5639 /* We can only call store_constructor recursively if the size and
5640 bit position are on a byte boundary. */
5641 && bitpos % BITS_PER_UNIT == 0
5642 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5643 /* If we have a nonzero bitpos for a register target, then we just
5644 let store_field do the bitfield handling. This is unlikely to
5645 generate unnecessary clear instructions anyways. */
5646 && (bitpos == 0 || MEM_P (target)))
5647 {
5648 if (MEM_P (target))
5649 target
5650 = adjust_address (target,
5651 GET_MODE (target) == BLKmode
5652 || 0 != (bitpos
5653 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5654 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5655
5656
5657 /* Update the alias set, if required. */
5658 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5659 && MEM_ALIAS_SET (target) != 0)
5660 {
5661 target = copy_rtx (target);
5662 set_mem_alias_set (target, alias_set);
5663 }
5664
5665 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5666 }
5667 else
5668 store_field (target, bitsize, bitpos, 0, 0, mode, exp, type, alias_set,
5669 false);
5670 }
5671
5672 /* Store the value of constructor EXP into the rtx TARGET.
5673 TARGET is either a REG or a MEM; we know it cannot conflict, since
5674 safe_from_p has been called.
5675 CLEARED is true if TARGET is known to have been zero'd.
5676 SIZE is the number of bytes of TARGET we are allowed to modify: this
5677 may not be the same as the size of EXP if we are assigning to a field
5678 which has been packed to exclude padding bits. */
5679
5680 static void
5681 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5682 {
5683 tree type = TREE_TYPE (exp);
5684 #ifdef WORD_REGISTER_OPERATIONS
5685 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5686 #endif
5687
5688 switch (TREE_CODE (type))
5689 {
5690 case RECORD_TYPE:
5691 case UNION_TYPE:
5692 case QUAL_UNION_TYPE:
5693 {
5694 unsigned HOST_WIDE_INT idx;
5695 tree field, value;
5696
5697 /* If size is zero or the target is already cleared, do nothing. */
5698 if (size == 0 || cleared)
5699 cleared = 1;
5700 /* We either clear the aggregate or indicate the value is dead. */
5701 else if ((TREE_CODE (type) == UNION_TYPE
5702 || TREE_CODE (type) == QUAL_UNION_TYPE)
5703 && ! CONSTRUCTOR_ELTS (exp))
5704 /* If the constructor is empty, clear the union. */
5705 {
5706 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5707 cleared = 1;
5708 }
5709
5710 /* If we are building a static constructor into a register,
5711 set the initial value as zero so we can fold the value into
5712 a constant. But if more than one register is involved,
5713 this probably loses. */
5714 else if (REG_P (target) && TREE_STATIC (exp)
5715 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5716 {
5717 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5718 cleared = 1;
5719 }
5720
5721 /* If the constructor has fewer fields than the structure or
5722 if we are initializing the structure to mostly zeros, clear
5723 the whole structure first. Don't do this if TARGET is a
5724 register whose mode size isn't equal to SIZE since
5725 clear_storage can't handle this case. */
5726 else if (size > 0
5727 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5728 != fields_length (type))
5729 || mostly_zeros_p (exp))
5730 && (!REG_P (target)
5731 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5732 == size)))
5733 {
5734 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5735 cleared = 1;
5736 }
5737
5738 if (REG_P (target) && !cleared)
5739 emit_clobber (target);
5740
5741 /* Store each element of the constructor into the
5742 corresponding field of TARGET. */
5743 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5744 {
5745 enum machine_mode mode;
5746 HOST_WIDE_INT bitsize;
5747 HOST_WIDE_INT bitpos = 0;
5748 tree offset;
5749 rtx to_rtx = target;
5750
5751 /* Just ignore missing fields. We cleared the whole
5752 structure, above, if any fields are missing. */
5753 if (field == 0)
5754 continue;
5755
5756 if (cleared && initializer_zerop (value))
5757 continue;
5758
5759 if (host_integerp (DECL_SIZE (field), 1))
5760 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5761 else
5762 bitsize = -1;
5763
5764 mode = DECL_MODE (field);
5765 if (DECL_BIT_FIELD (field))
5766 mode = VOIDmode;
5767
5768 offset = DECL_FIELD_OFFSET (field);
5769 if (host_integerp (offset, 0)
5770 && host_integerp (bit_position (field), 0))
5771 {
5772 bitpos = int_bit_position (field);
5773 offset = 0;
5774 }
5775 else
5776 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5777
5778 if (offset)
5779 {
5780 enum machine_mode address_mode;
5781 rtx offset_rtx;
5782
5783 offset
5784 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5785 make_tree (TREE_TYPE (exp),
5786 target));
5787
5788 offset_rtx = expand_normal (offset);
5789 gcc_assert (MEM_P (to_rtx));
5790
5791 address_mode
5792 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5793 if (GET_MODE (offset_rtx) != address_mode)
5794 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5795
5796 to_rtx = offset_address (to_rtx, offset_rtx,
5797 highest_pow2_factor (offset));
5798 }
5799
5800 #ifdef WORD_REGISTER_OPERATIONS
5801 /* If this initializes a field that is smaller than a
5802 word, at the start of a word, try to widen it to a full
5803 word. This special case allows us to output C++ member
5804 function initializations in a form that the optimizers
5805 can understand. */
5806 if (REG_P (target)
5807 && bitsize < BITS_PER_WORD
5808 && bitpos % BITS_PER_WORD == 0
5809 && GET_MODE_CLASS (mode) == MODE_INT
5810 && TREE_CODE (value) == INTEGER_CST
5811 && exp_size >= 0
5812 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5813 {
5814 tree type = TREE_TYPE (value);
5815
5816 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5817 {
5818 type = lang_hooks.types.type_for_mode
5819 (word_mode, TYPE_UNSIGNED (type));
5820 value = fold_convert (type, value);
5821 }
5822
5823 if (BYTES_BIG_ENDIAN)
5824 value
5825 = fold_build2 (LSHIFT_EXPR, type, value,
5826 build_int_cst (type,
5827 BITS_PER_WORD - bitsize));
5828 bitsize = BITS_PER_WORD;
5829 mode = word_mode;
5830 }
5831 #endif
5832
5833 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5834 && DECL_NONADDRESSABLE_P (field))
5835 {
5836 to_rtx = copy_rtx (to_rtx);
5837 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5838 }
5839
5840 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5841 value, type, cleared,
5842 get_alias_set (TREE_TYPE (field)));
5843 }
5844 break;
5845 }
5846 case ARRAY_TYPE:
5847 {
5848 tree value, index;
5849 unsigned HOST_WIDE_INT i;
5850 int need_to_clear;
5851 tree domain;
5852 tree elttype = TREE_TYPE (type);
5853 int const_bounds_p;
5854 HOST_WIDE_INT minelt = 0;
5855 HOST_WIDE_INT maxelt = 0;
5856
5857 domain = TYPE_DOMAIN (type);
5858 const_bounds_p = (TYPE_MIN_VALUE (domain)
5859 && TYPE_MAX_VALUE (domain)
5860 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5861 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5862
5863 /* If we have constant bounds for the range of the type, get them. */
5864 if (const_bounds_p)
5865 {
5866 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5867 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5868 }
5869
5870 /* If the constructor has fewer elements than the array, clear
5871 the whole array first. Similarly if this is static
5872 constructor of a non-BLKmode object. */
5873 if (cleared)
5874 need_to_clear = 0;
5875 else if (REG_P (target) && TREE_STATIC (exp))
5876 need_to_clear = 1;
5877 else
5878 {
5879 unsigned HOST_WIDE_INT idx;
5880 tree index, value;
5881 HOST_WIDE_INT count = 0, zero_count = 0;
5882 need_to_clear = ! const_bounds_p;
5883
5884 /* This loop is a more accurate version of the loop in
5885 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5886 is also needed to check for missing elements. */
5887 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5888 {
5889 HOST_WIDE_INT this_node_count;
5890
5891 if (need_to_clear)
5892 break;
5893
5894 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5895 {
5896 tree lo_index = TREE_OPERAND (index, 0);
5897 tree hi_index = TREE_OPERAND (index, 1);
5898
5899 if (! host_integerp (lo_index, 1)
5900 || ! host_integerp (hi_index, 1))
5901 {
5902 need_to_clear = 1;
5903 break;
5904 }
5905
5906 this_node_count = (tree_low_cst (hi_index, 1)
5907 - tree_low_cst (lo_index, 1) + 1);
5908 }
5909 else
5910 this_node_count = 1;
5911
5912 count += this_node_count;
5913 if (mostly_zeros_p (value))
5914 zero_count += this_node_count;
5915 }
5916
5917 /* Clear the entire array first if there are any missing
5918 elements, or if the incidence of zero elements is >=
5919 75%. */
5920 if (! need_to_clear
5921 && (count < maxelt - minelt + 1
5922 || 4 * zero_count >= 3 * count))
5923 need_to_clear = 1;
5924 }
5925
5926 if (need_to_clear && size > 0)
5927 {
5928 if (REG_P (target))
5929 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5930 else
5931 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5932 cleared = 1;
5933 }
5934
5935 if (!cleared && REG_P (target))
5936 /* Inform later passes that the old value is dead. */
5937 emit_clobber (target);
5938
5939 /* Store each element of the constructor into the
5940 corresponding element of TARGET, determined by counting the
5941 elements. */
5942 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5943 {
5944 enum machine_mode mode;
5945 HOST_WIDE_INT bitsize;
5946 HOST_WIDE_INT bitpos;
5947 rtx xtarget = target;
5948
5949 if (cleared && initializer_zerop (value))
5950 continue;
5951
5952 mode = TYPE_MODE (elttype);
5953 if (mode == BLKmode)
5954 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5955 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5956 : -1);
5957 else
5958 bitsize = GET_MODE_BITSIZE (mode);
5959
5960 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5961 {
5962 tree lo_index = TREE_OPERAND (index, 0);
5963 tree hi_index = TREE_OPERAND (index, 1);
5964 rtx index_r, pos_rtx;
5965 HOST_WIDE_INT lo, hi, count;
5966 tree position;
5967
5968 /* If the range is constant and "small", unroll the loop. */
5969 if (const_bounds_p
5970 && host_integerp (lo_index, 0)
5971 && host_integerp (hi_index, 0)
5972 && (lo = tree_low_cst (lo_index, 0),
5973 hi = tree_low_cst (hi_index, 0),
5974 count = hi - lo + 1,
5975 (!MEM_P (target)
5976 || count <= 2
5977 || (host_integerp (TYPE_SIZE (elttype), 1)
5978 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5979 <= 40 * 8)))))
5980 {
5981 lo -= minelt; hi -= minelt;
5982 for (; lo <= hi; lo++)
5983 {
5984 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
5985
5986 if (MEM_P (target)
5987 && !MEM_KEEP_ALIAS_SET_P (target)
5988 && TREE_CODE (type) == ARRAY_TYPE
5989 && TYPE_NONALIASED_COMPONENT (type))
5990 {
5991 target = copy_rtx (target);
5992 MEM_KEEP_ALIAS_SET_P (target) = 1;
5993 }
5994
5995 store_constructor_field
5996 (target, bitsize, bitpos, mode, value, type, cleared,
5997 get_alias_set (elttype));
5998 }
5999 }
6000 else
6001 {
6002 rtx loop_start = gen_label_rtx ();
6003 rtx loop_end = gen_label_rtx ();
6004 tree exit_cond;
6005
6006 expand_normal (hi_index);
6007
6008 index = build_decl (EXPR_LOCATION (exp),
6009 VAR_DECL, NULL_TREE, domain);
6010 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6011 SET_DECL_RTL (index, index_r);
6012 store_expr (lo_index, index_r, 0, false);
6013
6014 /* Build the head of the loop. */
6015 do_pending_stack_adjust ();
6016 emit_label (loop_start);
6017
6018 /* Assign value to element index. */
6019 position =
6020 fold_convert (ssizetype,
6021 fold_build2 (MINUS_EXPR,
6022 TREE_TYPE (index),
6023 index,
6024 TYPE_MIN_VALUE (domain)));
6025
6026 position =
6027 size_binop (MULT_EXPR, position,
6028 fold_convert (ssizetype,
6029 TYPE_SIZE_UNIT (elttype)));
6030
6031 pos_rtx = expand_normal (position);
6032 xtarget = offset_address (target, pos_rtx,
6033 highest_pow2_factor (position));
6034 xtarget = adjust_address (xtarget, mode, 0);
6035 if (TREE_CODE (value) == CONSTRUCTOR)
6036 store_constructor (value, xtarget, cleared,
6037 bitsize / BITS_PER_UNIT);
6038 else
6039 store_expr (value, xtarget, 0, false);
6040
6041 /* Generate a conditional jump to exit the loop. */
6042 exit_cond = build2 (LT_EXPR, integer_type_node,
6043 index, hi_index);
6044 jumpif (exit_cond, loop_end, -1);
6045
6046 /* Update the loop counter, and jump to the head of
6047 the loop. */
6048 expand_assignment (index,
6049 build2 (PLUS_EXPR, TREE_TYPE (index),
6050 index, integer_one_node),
6051 false);
6052
6053 emit_jump (loop_start);
6054
6055 /* Build the end of the loop. */
6056 emit_label (loop_end);
6057 }
6058 }
6059 else if ((index != 0 && ! host_integerp (index, 0))
6060 || ! host_integerp (TYPE_SIZE (elttype), 1))
6061 {
6062 tree position;
6063
6064 if (index == 0)
6065 index = ssize_int (1);
6066
6067 if (minelt)
6068 index = fold_convert (ssizetype,
6069 fold_build2 (MINUS_EXPR,
6070 TREE_TYPE (index),
6071 index,
6072 TYPE_MIN_VALUE (domain)));
6073
6074 position =
6075 size_binop (MULT_EXPR, index,
6076 fold_convert (ssizetype,
6077 TYPE_SIZE_UNIT (elttype)));
6078 xtarget = offset_address (target,
6079 expand_normal (position),
6080 highest_pow2_factor (position));
6081 xtarget = adjust_address (xtarget, mode, 0);
6082 store_expr (value, xtarget, 0, false);
6083 }
6084 else
6085 {
6086 if (index != 0)
6087 bitpos = ((tree_low_cst (index, 0) - minelt)
6088 * tree_low_cst (TYPE_SIZE (elttype), 1));
6089 else
6090 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
6091
6092 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6093 && TREE_CODE (type) == ARRAY_TYPE
6094 && TYPE_NONALIASED_COMPONENT (type))
6095 {
6096 target = copy_rtx (target);
6097 MEM_KEEP_ALIAS_SET_P (target) = 1;
6098 }
6099 store_constructor_field (target, bitsize, bitpos, mode, value,
6100 type, cleared, get_alias_set (elttype));
6101 }
6102 }
6103 break;
6104 }
6105
6106 case VECTOR_TYPE:
6107 {
6108 unsigned HOST_WIDE_INT idx;
6109 constructor_elt *ce;
6110 int i;
6111 int need_to_clear;
6112 int icode = 0;
6113 tree elttype = TREE_TYPE (type);
6114 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
6115 enum machine_mode eltmode = TYPE_MODE (elttype);
6116 HOST_WIDE_INT bitsize;
6117 HOST_WIDE_INT bitpos;
6118 rtvec vector = NULL;
6119 unsigned n_elts;
6120 alias_set_type alias;
6121
6122 gcc_assert (eltmode != BLKmode);
6123
6124 n_elts = TYPE_VECTOR_SUBPARTS (type);
6125 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6126 {
6127 enum machine_mode mode = GET_MODE (target);
6128
6129 icode = (int) optab_handler (vec_init_optab, mode);
6130 if (icode != CODE_FOR_nothing)
6131 {
6132 unsigned int i;
6133
6134 vector = rtvec_alloc (n_elts);
6135 for (i = 0; i < n_elts; i++)
6136 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6137 }
6138 }
6139
6140 /* If the constructor has fewer elements than the vector,
6141 clear the whole array first. Similarly if this is static
6142 constructor of a non-BLKmode object. */
6143 if (cleared)
6144 need_to_clear = 0;
6145 else if (REG_P (target) && TREE_STATIC (exp))
6146 need_to_clear = 1;
6147 else
6148 {
6149 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6150 tree value;
6151
6152 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6153 {
6154 int n_elts_here = tree_low_cst
6155 (int_const_binop (TRUNC_DIV_EXPR,
6156 TYPE_SIZE (TREE_TYPE (value)),
6157 TYPE_SIZE (elttype)), 1);
6158
6159 count += n_elts_here;
6160 if (mostly_zeros_p (value))
6161 zero_count += n_elts_here;
6162 }
6163
6164 /* Clear the entire vector first if there are any missing elements,
6165 or if the incidence of zero elements is >= 75%. */
6166 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6167 }
6168
6169 if (need_to_clear && size > 0 && !vector)
6170 {
6171 if (REG_P (target))
6172 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6173 else
6174 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6175 cleared = 1;
6176 }
6177
6178 /* Inform later passes that the old value is dead. */
6179 if (!cleared && !vector && REG_P (target))
6180 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6181
6182 if (MEM_P (target))
6183 alias = MEM_ALIAS_SET (target);
6184 else
6185 alias = get_alias_set (elttype);
6186
6187 /* Store each element of the constructor into the corresponding
6188 element of TARGET, determined by counting the elements. */
6189 for (idx = 0, i = 0;
6190 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6191 idx++, i += bitsize / elt_size)
6192 {
6193 HOST_WIDE_INT eltpos;
6194 tree value = ce->value;
6195
6196 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6197 if (cleared && initializer_zerop (value))
6198 continue;
6199
6200 if (ce->index)
6201 eltpos = tree_low_cst (ce->index, 1);
6202 else
6203 eltpos = i;
6204
6205 if (vector)
6206 {
6207 /* Vector CONSTRUCTORs should only be built from smaller
6208 vectors in the case of BLKmode vectors. */
6209 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6210 RTVEC_ELT (vector, eltpos)
6211 = expand_normal (value);
6212 }
6213 else
6214 {
6215 enum machine_mode value_mode =
6216 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6217 ? TYPE_MODE (TREE_TYPE (value))
6218 : eltmode;
6219 bitpos = eltpos * elt_size;
6220 store_constructor_field (target, bitsize, bitpos,
6221 value_mode, value, type,
6222 cleared, alias);
6223 }
6224 }
6225
6226 if (vector)
6227 emit_insn (GEN_FCN (icode)
6228 (target,
6229 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6230 break;
6231 }
6232
6233 default:
6234 gcc_unreachable ();
6235 }
6236 }
6237
6238 /* Store the value of EXP (an expression tree)
6239 into a subfield of TARGET which has mode MODE and occupies
6240 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6241 If MODE is VOIDmode, it means that we are storing into a bit-field.
6242
6243 BITREGION_START is bitpos of the first bitfield in this region.
6244 BITREGION_END is the bitpos of the ending bitfield in this region.
6245 These two fields are 0, if the C++ memory model does not apply,
6246 or we are not interested in keeping track of bitfield regions.
6247
6248 Always return const0_rtx unless we have something particular to
6249 return.
6250
6251 TYPE is the type of the underlying object,
6252
6253 ALIAS_SET is the alias set for the destination. This value will
6254 (in general) be different from that for TARGET, since TARGET is a
6255 reference to the containing structure.
6256
6257 If NONTEMPORAL is true, try generating a nontemporal store. */
6258
6259 static rtx
6260 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6261 unsigned HOST_WIDE_INT bitregion_start,
6262 unsigned HOST_WIDE_INT bitregion_end,
6263 enum machine_mode mode, tree exp, tree type,
6264 alias_set_type alias_set, bool nontemporal)
6265 {
6266 if (TREE_CODE (exp) == ERROR_MARK)
6267 return const0_rtx;
6268
6269 /* If we have nothing to store, do nothing unless the expression has
6270 side-effects. */
6271 if (bitsize == 0)
6272 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6273
6274 /* If we are storing into an unaligned field of an aligned union that is
6275 in a register, we may have the mode of TARGET being an integer mode but
6276 MODE == BLKmode. In that case, get an aligned object whose size and
6277 alignment are the same as TARGET and store TARGET into it (we can avoid
6278 the store if the field being stored is the entire width of TARGET). Then
6279 call ourselves recursively to store the field into a BLKmode version of
6280 that object. Finally, load from the object into TARGET. This is not
6281 very efficient in general, but should only be slightly more expensive
6282 than the otherwise-required unaligned accesses. Perhaps this can be
6283 cleaned up later. It's tempting to make OBJECT readonly, but it's set
6284 twice, once with emit_move_insn and once via store_field. */
6285
6286 if (mode == BLKmode
6287 && (REG_P (target) || GET_CODE (target) == SUBREG))
6288 {
6289 rtx object = assign_temp (type, 0, 1, 1);
6290 rtx blk_object = adjust_address (object, BLKmode, 0);
6291
6292 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
6293 emit_move_insn (object, target);
6294
6295 store_field (blk_object, bitsize, bitpos,
6296 bitregion_start, bitregion_end,
6297 mode, exp, type, MEM_ALIAS_SET (blk_object), nontemporal);
6298
6299 emit_move_insn (target, object);
6300
6301 /* We want to return the BLKmode version of the data. */
6302 return blk_object;
6303 }
6304
6305 if (GET_CODE (target) == CONCAT)
6306 {
6307 /* We're storing into a struct containing a single __complex. */
6308
6309 gcc_assert (!bitpos);
6310 return store_expr (exp, target, 0, nontemporal);
6311 }
6312
6313 /* If the structure is in a register or if the component
6314 is a bit field, we cannot use addressing to access it.
6315 Use bit-field techniques or SUBREG to store in it. */
6316
6317 if (mode == VOIDmode
6318 || (mode != BLKmode && ! direct_store[(int) mode]
6319 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6320 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6321 || REG_P (target)
6322 || GET_CODE (target) == SUBREG
6323 /* If the field isn't aligned enough to store as an ordinary memref,
6324 store it as a bit field. */
6325 || (mode != BLKmode
6326 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6327 || bitpos % GET_MODE_ALIGNMENT (mode))
6328 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6329 || (bitpos % BITS_PER_UNIT != 0)))
6330 || (bitsize >= 0 && mode != BLKmode
6331 && GET_MODE_BITSIZE (mode) > bitsize)
6332 /* If the RHS and field are a constant size and the size of the
6333 RHS isn't the same size as the bitfield, we must use bitfield
6334 operations. */
6335 || (bitsize >= 0
6336 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6337 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6338 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6339 decl we must use bitfield operations. */
6340 || (bitsize >= 0
6341 && TREE_CODE (exp) == MEM_REF
6342 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6343 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6344 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6345 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6346 {
6347 rtx temp;
6348 gimple nop_def;
6349
6350 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6351 implies a mask operation. If the precision is the same size as
6352 the field we're storing into, that mask is redundant. This is
6353 particularly common with bit field assignments generated by the
6354 C front end. */
6355 nop_def = get_def_for_expr (exp, NOP_EXPR);
6356 if (nop_def)
6357 {
6358 tree type = TREE_TYPE (exp);
6359 if (INTEGRAL_TYPE_P (type)
6360 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6361 && bitsize == TYPE_PRECISION (type))
6362 {
6363 tree op = gimple_assign_rhs1 (nop_def);
6364 type = TREE_TYPE (op);
6365 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6366 exp = op;
6367 }
6368 }
6369
6370 temp = expand_normal (exp);
6371
6372 /* If BITSIZE is narrower than the size of the type of EXP
6373 we will be narrowing TEMP. Normally, what's wanted are the
6374 low-order bits. However, if EXP's type is a record and this is
6375 big-endian machine, we want the upper BITSIZE bits. */
6376 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6377 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6378 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6379 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6380 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6381 NULL_RTX, 1);
6382
6383 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6384 if (mode != VOIDmode && mode != BLKmode
6385 && mode != TYPE_MODE (TREE_TYPE (exp)))
6386 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6387
6388 /* If the modes of TEMP and TARGET are both BLKmode, both
6389 must be in memory and BITPOS must be aligned on a byte
6390 boundary. If so, we simply do a block copy. Likewise
6391 for a BLKmode-like TARGET. */
6392 if (GET_MODE (temp) == BLKmode
6393 && (GET_MODE (target) == BLKmode
6394 || (MEM_P (target)
6395 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6396 && (bitpos % BITS_PER_UNIT) == 0
6397 && (bitsize % BITS_PER_UNIT) == 0)))
6398 {
6399 gcc_assert (MEM_P (target) && MEM_P (temp)
6400 && (bitpos % BITS_PER_UNIT) == 0);
6401
6402 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6403 emit_block_move (target, temp,
6404 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6405 / BITS_PER_UNIT),
6406 BLOCK_OP_NORMAL);
6407
6408 return const0_rtx;
6409 }
6410
6411 /* Store the value in the bitfield. */
6412 store_bit_field (target, bitsize, bitpos,
6413 bitregion_start, bitregion_end,
6414 mode, temp);
6415
6416 return const0_rtx;
6417 }
6418 else
6419 {
6420 /* Now build a reference to just the desired component. */
6421 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6422
6423 if (to_rtx == target)
6424 to_rtx = copy_rtx (to_rtx);
6425
6426 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6427 set_mem_alias_set (to_rtx, alias_set);
6428
6429 return store_expr (exp, to_rtx, 0, nontemporal);
6430 }
6431 }
6432 \f
6433 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6434 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6435 codes and find the ultimate containing object, which we return.
6436
6437 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6438 bit position, and *PUNSIGNEDP to the signedness of the field.
6439 If the position of the field is variable, we store a tree
6440 giving the variable offset (in units) in *POFFSET.
6441 This offset is in addition to the bit position.
6442 If the position is not variable, we store 0 in *POFFSET.
6443
6444 If any of the extraction expressions is volatile,
6445 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6446
6447 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6448 Otherwise, it is a mode that can be used to access the field.
6449
6450 If the field describes a variable-sized object, *PMODE is set to
6451 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6452 this case, but the address of the object can be found.
6453
6454 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6455 look through nodes that serve as markers of a greater alignment than
6456 the one that can be deduced from the expression. These nodes make it
6457 possible for front-ends to prevent temporaries from being created by
6458 the middle-end on alignment considerations. For that purpose, the
6459 normal operating mode at high-level is to always pass FALSE so that
6460 the ultimate containing object is really returned; moreover, the
6461 associated predicate handled_component_p will always return TRUE
6462 on these nodes, thus indicating that they are essentially handled
6463 by get_inner_reference. TRUE should only be passed when the caller
6464 is scanning the expression in order to build another representation
6465 and specifically knows how to handle these nodes; as such, this is
6466 the normal operating mode in the RTL expanders. */
6467
6468 tree
6469 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6470 HOST_WIDE_INT *pbitpos, tree *poffset,
6471 enum machine_mode *pmode, int *punsignedp,
6472 int *pvolatilep, bool keep_aligning)
6473 {
6474 tree size_tree = 0;
6475 enum machine_mode mode = VOIDmode;
6476 bool blkmode_bitfield = false;
6477 tree offset = size_zero_node;
6478 double_int bit_offset = double_int_zero;
6479
6480 /* First get the mode, signedness, and size. We do this from just the
6481 outermost expression. */
6482 *pbitsize = -1;
6483 if (TREE_CODE (exp) == COMPONENT_REF)
6484 {
6485 tree field = TREE_OPERAND (exp, 1);
6486 size_tree = DECL_SIZE (field);
6487 if (!DECL_BIT_FIELD (field))
6488 mode = DECL_MODE (field);
6489 else if (DECL_MODE (field) == BLKmode)
6490 blkmode_bitfield = true;
6491 else if (TREE_THIS_VOLATILE (exp)
6492 && flag_strict_volatile_bitfields > 0)
6493 /* Volatile bitfields should be accessed in the mode of the
6494 field's type, not the mode computed based on the bit
6495 size. */
6496 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6497
6498 *punsignedp = DECL_UNSIGNED (field);
6499 }
6500 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6501 {
6502 size_tree = TREE_OPERAND (exp, 1);
6503 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6504 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6505
6506 /* For vector types, with the correct size of access, use the mode of
6507 inner type. */
6508 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6509 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6510 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6511 mode = TYPE_MODE (TREE_TYPE (exp));
6512 }
6513 else
6514 {
6515 mode = TYPE_MODE (TREE_TYPE (exp));
6516 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6517
6518 if (mode == BLKmode)
6519 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6520 else
6521 *pbitsize = GET_MODE_BITSIZE (mode);
6522 }
6523
6524 if (size_tree != 0)
6525 {
6526 if (! host_integerp (size_tree, 1))
6527 mode = BLKmode, *pbitsize = -1;
6528 else
6529 *pbitsize = tree_low_cst (size_tree, 1);
6530 }
6531
6532 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6533 and find the ultimate containing object. */
6534 while (1)
6535 {
6536 switch (TREE_CODE (exp))
6537 {
6538 case BIT_FIELD_REF:
6539 bit_offset
6540 = double_int_add (bit_offset,
6541 tree_to_double_int (TREE_OPERAND (exp, 2)));
6542 break;
6543
6544 case COMPONENT_REF:
6545 {
6546 tree field = TREE_OPERAND (exp, 1);
6547 tree this_offset = component_ref_field_offset (exp);
6548
6549 /* If this field hasn't been filled in yet, don't go past it.
6550 This should only happen when folding expressions made during
6551 type construction. */
6552 if (this_offset == 0)
6553 break;
6554
6555 offset = size_binop (PLUS_EXPR, offset, this_offset);
6556 bit_offset = double_int_add (bit_offset,
6557 tree_to_double_int
6558 (DECL_FIELD_BIT_OFFSET (field)));
6559
6560 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6561 }
6562 break;
6563
6564 case ARRAY_REF:
6565 case ARRAY_RANGE_REF:
6566 {
6567 tree index = TREE_OPERAND (exp, 1);
6568 tree low_bound = array_ref_low_bound (exp);
6569 tree unit_size = array_ref_element_size (exp);
6570
6571 /* We assume all arrays have sizes that are a multiple of a byte.
6572 First subtract the lower bound, if any, in the type of the
6573 index, then convert to sizetype and multiply by the size of
6574 the array element. */
6575 if (! integer_zerop (low_bound))
6576 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6577 index, low_bound);
6578
6579 offset = size_binop (PLUS_EXPR, offset,
6580 size_binop (MULT_EXPR,
6581 fold_convert (sizetype, index),
6582 unit_size));
6583 }
6584 break;
6585
6586 case REALPART_EXPR:
6587 break;
6588
6589 case IMAGPART_EXPR:
6590 bit_offset = double_int_add (bit_offset,
6591 uhwi_to_double_int (*pbitsize));
6592 break;
6593
6594 case VIEW_CONVERT_EXPR:
6595 if (keep_aligning && STRICT_ALIGNMENT
6596 && (TYPE_ALIGN (TREE_TYPE (exp))
6597 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6598 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6599 < BIGGEST_ALIGNMENT)
6600 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6601 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6602 goto done;
6603 break;
6604
6605 case MEM_REF:
6606 /* Hand back the decl for MEM[&decl, off]. */
6607 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6608 {
6609 tree off = TREE_OPERAND (exp, 1);
6610 if (!integer_zerop (off))
6611 {
6612 double_int boff, coff = mem_ref_offset (exp);
6613 boff = double_int_lshift (coff,
6614 BITS_PER_UNIT == 8
6615 ? 3 : exact_log2 (BITS_PER_UNIT),
6616 HOST_BITS_PER_DOUBLE_INT, true);
6617 bit_offset = double_int_add (bit_offset, boff);
6618 }
6619 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6620 }
6621 goto done;
6622
6623 default:
6624 goto done;
6625 }
6626
6627 /* If any reference in the chain is volatile, the effect is volatile. */
6628 if (TREE_THIS_VOLATILE (exp))
6629 *pvolatilep = 1;
6630
6631 exp = TREE_OPERAND (exp, 0);
6632 }
6633 done:
6634
6635 /* If OFFSET is constant, see if we can return the whole thing as a
6636 constant bit position. Make sure to handle overflow during
6637 this conversion. */
6638 if (TREE_CODE (offset) == INTEGER_CST)
6639 {
6640 double_int tem = tree_to_double_int (offset);
6641 tem = double_int_sext (tem, TYPE_PRECISION (sizetype));
6642 tem = double_int_lshift (tem,
6643 BITS_PER_UNIT == 8
6644 ? 3 : exact_log2 (BITS_PER_UNIT),
6645 HOST_BITS_PER_DOUBLE_INT, true);
6646 tem = double_int_add (tem, bit_offset);
6647 if (double_int_fits_in_shwi_p (tem))
6648 {
6649 *pbitpos = double_int_to_shwi (tem);
6650 *poffset = offset = NULL_TREE;
6651 }
6652 }
6653
6654 /* Otherwise, split it up. */
6655 if (offset)
6656 {
6657 /* Avoid returning a negative bitpos as this may wreak havoc later. */
6658 if (double_int_negative_p (bit_offset))
6659 {
6660 double_int mask
6661 = double_int_mask (BITS_PER_UNIT == 8
6662 ? 3 : exact_log2 (BITS_PER_UNIT));
6663 double_int tem = double_int_and_not (bit_offset, mask);
6664 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
6665 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
6666 bit_offset = double_int_sub (bit_offset, tem);
6667 tem = double_int_rshift (tem,
6668 BITS_PER_UNIT == 8
6669 ? 3 : exact_log2 (BITS_PER_UNIT),
6670 HOST_BITS_PER_DOUBLE_INT, true);
6671 offset = size_binop (PLUS_EXPR, offset,
6672 double_int_to_tree (sizetype, tem));
6673 }
6674
6675 *pbitpos = double_int_to_shwi (bit_offset);
6676 *poffset = offset;
6677 }
6678
6679 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6680 if (mode == VOIDmode
6681 && blkmode_bitfield
6682 && (*pbitpos % BITS_PER_UNIT) == 0
6683 && (*pbitsize % BITS_PER_UNIT) == 0)
6684 *pmode = BLKmode;
6685 else
6686 *pmode = mode;
6687
6688 return exp;
6689 }
6690
6691 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6692 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6693 EXP is marked as PACKED. */
6694
6695 bool
6696 contains_packed_reference (const_tree exp)
6697 {
6698 bool packed_p = false;
6699
6700 while (1)
6701 {
6702 switch (TREE_CODE (exp))
6703 {
6704 case COMPONENT_REF:
6705 {
6706 tree field = TREE_OPERAND (exp, 1);
6707 packed_p = DECL_PACKED (field)
6708 || TYPE_PACKED (TREE_TYPE (field))
6709 || TYPE_PACKED (TREE_TYPE (exp));
6710 if (packed_p)
6711 goto done;
6712 }
6713 break;
6714
6715 case BIT_FIELD_REF:
6716 case ARRAY_REF:
6717 case ARRAY_RANGE_REF:
6718 case REALPART_EXPR:
6719 case IMAGPART_EXPR:
6720 case VIEW_CONVERT_EXPR:
6721 break;
6722
6723 default:
6724 goto done;
6725 }
6726 exp = TREE_OPERAND (exp, 0);
6727 }
6728 done:
6729 return packed_p;
6730 }
6731
6732 /* Return a tree of sizetype representing the size, in bytes, of the element
6733 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6734
6735 tree
6736 array_ref_element_size (tree exp)
6737 {
6738 tree aligned_size = TREE_OPERAND (exp, 3);
6739 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6740 location_t loc = EXPR_LOCATION (exp);
6741
6742 /* If a size was specified in the ARRAY_REF, it's the size measured
6743 in alignment units of the element type. So multiply by that value. */
6744 if (aligned_size)
6745 {
6746 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6747 sizetype from another type of the same width and signedness. */
6748 if (TREE_TYPE (aligned_size) != sizetype)
6749 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6750 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6751 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6752 }
6753
6754 /* Otherwise, take the size from that of the element type. Substitute
6755 any PLACEHOLDER_EXPR that we have. */
6756 else
6757 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6758 }
6759
6760 /* Return a tree representing the lower bound of the array mentioned in
6761 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6762
6763 tree
6764 array_ref_low_bound (tree exp)
6765 {
6766 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6767
6768 /* If a lower bound is specified in EXP, use it. */
6769 if (TREE_OPERAND (exp, 2))
6770 return TREE_OPERAND (exp, 2);
6771
6772 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6773 substituting for a PLACEHOLDER_EXPR as needed. */
6774 if (domain_type && TYPE_MIN_VALUE (domain_type))
6775 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6776
6777 /* Otherwise, return a zero of the appropriate type. */
6778 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6779 }
6780
6781 /* Return a tree representing the upper bound of the array mentioned in
6782 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6783
6784 tree
6785 array_ref_up_bound (tree exp)
6786 {
6787 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6788
6789 /* If there is a domain type and it has an upper bound, use it, substituting
6790 for a PLACEHOLDER_EXPR as needed. */
6791 if (domain_type && TYPE_MAX_VALUE (domain_type))
6792 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6793
6794 /* Otherwise fail. */
6795 return NULL_TREE;
6796 }
6797
6798 /* Return a tree representing the offset, in bytes, of the field referenced
6799 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6800
6801 tree
6802 component_ref_field_offset (tree exp)
6803 {
6804 tree aligned_offset = TREE_OPERAND (exp, 2);
6805 tree field = TREE_OPERAND (exp, 1);
6806 location_t loc = EXPR_LOCATION (exp);
6807
6808 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6809 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6810 value. */
6811 if (aligned_offset)
6812 {
6813 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6814 sizetype from another type of the same width and signedness. */
6815 if (TREE_TYPE (aligned_offset) != sizetype)
6816 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6817 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6818 size_int (DECL_OFFSET_ALIGN (field)
6819 / BITS_PER_UNIT));
6820 }
6821
6822 /* Otherwise, take the offset from that of the field. Substitute
6823 any PLACEHOLDER_EXPR that we have. */
6824 else
6825 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6826 }
6827
6828 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6829
6830 static unsigned HOST_WIDE_INT
6831 target_align (const_tree target)
6832 {
6833 /* We might have a chain of nested references with intermediate misaligning
6834 bitfields components, so need to recurse to find out. */
6835
6836 unsigned HOST_WIDE_INT this_align, outer_align;
6837
6838 switch (TREE_CODE (target))
6839 {
6840 case BIT_FIELD_REF:
6841 return 1;
6842
6843 case COMPONENT_REF:
6844 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6845 outer_align = target_align (TREE_OPERAND (target, 0));
6846 return MIN (this_align, outer_align);
6847
6848 case ARRAY_REF:
6849 case ARRAY_RANGE_REF:
6850 this_align = TYPE_ALIGN (TREE_TYPE (target));
6851 outer_align = target_align (TREE_OPERAND (target, 0));
6852 return MIN (this_align, outer_align);
6853
6854 CASE_CONVERT:
6855 case NON_LVALUE_EXPR:
6856 case VIEW_CONVERT_EXPR:
6857 this_align = TYPE_ALIGN (TREE_TYPE (target));
6858 outer_align = target_align (TREE_OPERAND (target, 0));
6859 return MAX (this_align, outer_align);
6860
6861 default:
6862 return TYPE_ALIGN (TREE_TYPE (target));
6863 }
6864 }
6865
6866 \f
6867 /* Given an rtx VALUE that may contain additions and multiplications, return
6868 an equivalent value that just refers to a register, memory, or constant.
6869 This is done by generating instructions to perform the arithmetic and
6870 returning a pseudo-register containing the value.
6871
6872 The returned value may be a REG, SUBREG, MEM or constant. */
6873
6874 rtx
6875 force_operand (rtx value, rtx target)
6876 {
6877 rtx op1, op2;
6878 /* Use subtarget as the target for operand 0 of a binary operation. */
6879 rtx subtarget = get_subtarget (target);
6880 enum rtx_code code = GET_CODE (value);
6881
6882 /* Check for subreg applied to an expression produced by loop optimizer. */
6883 if (code == SUBREG
6884 && !REG_P (SUBREG_REG (value))
6885 && !MEM_P (SUBREG_REG (value)))
6886 {
6887 value
6888 = simplify_gen_subreg (GET_MODE (value),
6889 force_reg (GET_MODE (SUBREG_REG (value)),
6890 force_operand (SUBREG_REG (value),
6891 NULL_RTX)),
6892 GET_MODE (SUBREG_REG (value)),
6893 SUBREG_BYTE (value));
6894 code = GET_CODE (value);
6895 }
6896
6897 /* Check for a PIC address load. */
6898 if ((code == PLUS || code == MINUS)
6899 && XEXP (value, 0) == pic_offset_table_rtx
6900 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6901 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6902 || GET_CODE (XEXP (value, 1)) == CONST))
6903 {
6904 if (!subtarget)
6905 subtarget = gen_reg_rtx (GET_MODE (value));
6906 emit_move_insn (subtarget, value);
6907 return subtarget;
6908 }
6909
6910 if (ARITHMETIC_P (value))
6911 {
6912 op2 = XEXP (value, 1);
6913 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6914 subtarget = 0;
6915 if (code == MINUS && CONST_INT_P (op2))
6916 {
6917 code = PLUS;
6918 op2 = negate_rtx (GET_MODE (value), op2);
6919 }
6920
6921 /* Check for an addition with OP2 a constant integer and our first
6922 operand a PLUS of a virtual register and something else. In that
6923 case, we want to emit the sum of the virtual register and the
6924 constant first and then add the other value. This allows virtual
6925 register instantiation to simply modify the constant rather than
6926 creating another one around this addition. */
6927 if (code == PLUS && CONST_INT_P (op2)
6928 && GET_CODE (XEXP (value, 0)) == PLUS
6929 && REG_P (XEXP (XEXP (value, 0), 0))
6930 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6931 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6932 {
6933 rtx temp = expand_simple_binop (GET_MODE (value), code,
6934 XEXP (XEXP (value, 0), 0), op2,
6935 subtarget, 0, OPTAB_LIB_WIDEN);
6936 return expand_simple_binop (GET_MODE (value), code, temp,
6937 force_operand (XEXP (XEXP (value,
6938 0), 1), 0),
6939 target, 0, OPTAB_LIB_WIDEN);
6940 }
6941
6942 op1 = force_operand (XEXP (value, 0), subtarget);
6943 op2 = force_operand (op2, NULL_RTX);
6944 switch (code)
6945 {
6946 case MULT:
6947 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6948 case DIV:
6949 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6950 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6951 target, 1, OPTAB_LIB_WIDEN);
6952 else
6953 return expand_divmod (0,
6954 FLOAT_MODE_P (GET_MODE (value))
6955 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6956 GET_MODE (value), op1, op2, target, 0);
6957 case MOD:
6958 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6959 target, 0);
6960 case UDIV:
6961 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6962 target, 1);
6963 case UMOD:
6964 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6965 target, 1);
6966 case ASHIFTRT:
6967 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6968 target, 0, OPTAB_LIB_WIDEN);
6969 default:
6970 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6971 target, 1, OPTAB_LIB_WIDEN);
6972 }
6973 }
6974 if (UNARY_P (value))
6975 {
6976 if (!target)
6977 target = gen_reg_rtx (GET_MODE (value));
6978 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6979 switch (code)
6980 {
6981 case ZERO_EXTEND:
6982 case SIGN_EXTEND:
6983 case TRUNCATE:
6984 case FLOAT_EXTEND:
6985 case FLOAT_TRUNCATE:
6986 convert_move (target, op1, code == ZERO_EXTEND);
6987 return target;
6988
6989 case FIX:
6990 case UNSIGNED_FIX:
6991 expand_fix (target, op1, code == UNSIGNED_FIX);
6992 return target;
6993
6994 case FLOAT:
6995 case UNSIGNED_FLOAT:
6996 expand_float (target, op1, code == UNSIGNED_FLOAT);
6997 return target;
6998
6999 default:
7000 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7001 }
7002 }
7003
7004 #ifdef INSN_SCHEDULING
7005 /* On machines that have insn scheduling, we want all memory reference to be
7006 explicit, so we need to deal with such paradoxical SUBREGs. */
7007 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7008 value
7009 = simplify_gen_subreg (GET_MODE (value),
7010 force_reg (GET_MODE (SUBREG_REG (value)),
7011 force_operand (SUBREG_REG (value),
7012 NULL_RTX)),
7013 GET_MODE (SUBREG_REG (value)),
7014 SUBREG_BYTE (value));
7015 #endif
7016
7017 return value;
7018 }
7019 \f
7020 /* Subroutine of expand_expr: return nonzero iff there is no way that
7021 EXP can reference X, which is being modified. TOP_P is nonzero if this
7022 call is going to be used to determine whether we need a temporary
7023 for EXP, as opposed to a recursive call to this function.
7024
7025 It is always safe for this routine to return zero since it merely
7026 searches for optimization opportunities. */
7027
7028 int
7029 safe_from_p (const_rtx x, tree exp, int top_p)
7030 {
7031 rtx exp_rtl = 0;
7032 int i, nops;
7033
7034 if (x == 0
7035 /* If EXP has varying size, we MUST use a target since we currently
7036 have no way of allocating temporaries of variable size
7037 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7038 So we assume here that something at a higher level has prevented a
7039 clash. This is somewhat bogus, but the best we can do. Only
7040 do this when X is BLKmode and when we are at the top level. */
7041 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7042 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7043 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7044 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7045 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7046 != INTEGER_CST)
7047 && GET_MODE (x) == BLKmode)
7048 /* If X is in the outgoing argument area, it is always safe. */
7049 || (MEM_P (x)
7050 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7051 || (GET_CODE (XEXP (x, 0)) == PLUS
7052 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7053 return 1;
7054
7055 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7056 find the underlying pseudo. */
7057 if (GET_CODE (x) == SUBREG)
7058 {
7059 x = SUBREG_REG (x);
7060 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7061 return 0;
7062 }
7063
7064 /* Now look at our tree code and possibly recurse. */
7065 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7066 {
7067 case tcc_declaration:
7068 exp_rtl = DECL_RTL_IF_SET (exp);
7069 break;
7070
7071 case tcc_constant:
7072 return 1;
7073
7074 case tcc_exceptional:
7075 if (TREE_CODE (exp) == TREE_LIST)
7076 {
7077 while (1)
7078 {
7079 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7080 return 0;
7081 exp = TREE_CHAIN (exp);
7082 if (!exp)
7083 return 1;
7084 if (TREE_CODE (exp) != TREE_LIST)
7085 return safe_from_p (x, exp, 0);
7086 }
7087 }
7088 else if (TREE_CODE (exp) == CONSTRUCTOR)
7089 {
7090 constructor_elt *ce;
7091 unsigned HOST_WIDE_INT idx;
7092
7093 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
7094 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7095 || !safe_from_p (x, ce->value, 0))
7096 return 0;
7097 return 1;
7098 }
7099 else if (TREE_CODE (exp) == ERROR_MARK)
7100 return 1; /* An already-visited SAVE_EXPR? */
7101 else
7102 return 0;
7103
7104 case tcc_statement:
7105 /* The only case we look at here is the DECL_INITIAL inside a
7106 DECL_EXPR. */
7107 return (TREE_CODE (exp) != DECL_EXPR
7108 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7109 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7110 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7111
7112 case tcc_binary:
7113 case tcc_comparison:
7114 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7115 return 0;
7116 /* Fall through. */
7117
7118 case tcc_unary:
7119 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7120
7121 case tcc_expression:
7122 case tcc_reference:
7123 case tcc_vl_exp:
7124 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7125 the expression. If it is set, we conflict iff we are that rtx or
7126 both are in memory. Otherwise, we check all operands of the
7127 expression recursively. */
7128
7129 switch (TREE_CODE (exp))
7130 {
7131 case ADDR_EXPR:
7132 /* If the operand is static or we are static, we can't conflict.
7133 Likewise if we don't conflict with the operand at all. */
7134 if (staticp (TREE_OPERAND (exp, 0))
7135 || TREE_STATIC (exp)
7136 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7137 return 1;
7138
7139 /* Otherwise, the only way this can conflict is if we are taking
7140 the address of a DECL a that address if part of X, which is
7141 very rare. */
7142 exp = TREE_OPERAND (exp, 0);
7143 if (DECL_P (exp))
7144 {
7145 if (!DECL_RTL_SET_P (exp)
7146 || !MEM_P (DECL_RTL (exp)))
7147 return 0;
7148 else
7149 exp_rtl = XEXP (DECL_RTL (exp), 0);
7150 }
7151 break;
7152
7153 case MEM_REF:
7154 if (MEM_P (x)
7155 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7156 get_alias_set (exp)))
7157 return 0;
7158 break;
7159
7160 case CALL_EXPR:
7161 /* Assume that the call will clobber all hard registers and
7162 all of memory. */
7163 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7164 || MEM_P (x))
7165 return 0;
7166 break;
7167
7168 case WITH_CLEANUP_EXPR:
7169 case CLEANUP_POINT_EXPR:
7170 /* Lowered by gimplify.c. */
7171 gcc_unreachable ();
7172
7173 case SAVE_EXPR:
7174 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7175
7176 default:
7177 break;
7178 }
7179
7180 /* If we have an rtx, we do not need to scan our operands. */
7181 if (exp_rtl)
7182 break;
7183
7184 nops = TREE_OPERAND_LENGTH (exp);
7185 for (i = 0; i < nops; i++)
7186 if (TREE_OPERAND (exp, i) != 0
7187 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7188 return 0;
7189
7190 break;
7191
7192 case tcc_type:
7193 /* Should never get a type here. */
7194 gcc_unreachable ();
7195 }
7196
7197 /* If we have an rtl, find any enclosed object. Then see if we conflict
7198 with it. */
7199 if (exp_rtl)
7200 {
7201 if (GET_CODE (exp_rtl) == SUBREG)
7202 {
7203 exp_rtl = SUBREG_REG (exp_rtl);
7204 if (REG_P (exp_rtl)
7205 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7206 return 0;
7207 }
7208
7209 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7210 are memory and they conflict. */
7211 return ! (rtx_equal_p (x, exp_rtl)
7212 || (MEM_P (x) && MEM_P (exp_rtl)
7213 && true_dependence (exp_rtl, VOIDmode, x)));
7214 }
7215
7216 /* If we reach here, it is safe. */
7217 return 1;
7218 }
7219
7220 \f
7221 /* Return the highest power of two that EXP is known to be a multiple of.
7222 This is used in updating alignment of MEMs in array references. */
7223
7224 unsigned HOST_WIDE_INT
7225 highest_pow2_factor (const_tree exp)
7226 {
7227 unsigned HOST_WIDE_INT c0, c1;
7228
7229 switch (TREE_CODE (exp))
7230 {
7231 case INTEGER_CST:
7232 /* We can find the lowest bit that's a one. If the low
7233 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7234 We need to handle this case since we can find it in a COND_EXPR,
7235 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7236 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7237 later ICE. */
7238 if (TREE_OVERFLOW (exp))
7239 return BIGGEST_ALIGNMENT;
7240 else
7241 {
7242 /* Note: tree_low_cst is intentionally not used here,
7243 we don't care about the upper bits. */
7244 c0 = TREE_INT_CST_LOW (exp);
7245 c0 &= -c0;
7246 return c0 ? c0 : BIGGEST_ALIGNMENT;
7247 }
7248 break;
7249
7250 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7251 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7252 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7253 return MIN (c0, c1);
7254
7255 case MULT_EXPR:
7256 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7257 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7258 return c0 * c1;
7259
7260 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7261 case CEIL_DIV_EXPR:
7262 if (integer_pow2p (TREE_OPERAND (exp, 1))
7263 && host_integerp (TREE_OPERAND (exp, 1), 1))
7264 {
7265 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7266 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7267 return MAX (1, c0 / c1);
7268 }
7269 break;
7270
7271 case BIT_AND_EXPR:
7272 /* The highest power of two of a bit-and expression is the maximum of
7273 that of its operands. We typically get here for a complex LHS and
7274 a constant negative power of two on the RHS to force an explicit
7275 alignment, so don't bother looking at the LHS. */
7276 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7277
7278 CASE_CONVERT:
7279 case SAVE_EXPR:
7280 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7281
7282 case COMPOUND_EXPR:
7283 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7284
7285 case COND_EXPR:
7286 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7287 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7288 return MIN (c0, c1);
7289
7290 default:
7291 break;
7292 }
7293
7294 return 1;
7295 }
7296
7297 /* Similar, except that the alignment requirements of TARGET are
7298 taken into account. Assume it is at least as aligned as its
7299 type, unless it is a COMPONENT_REF in which case the layout of
7300 the structure gives the alignment. */
7301
7302 static unsigned HOST_WIDE_INT
7303 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7304 {
7305 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7306 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7307
7308 return MAX (factor, talign);
7309 }
7310 \f
7311 /* Subroutine of expand_expr. Expand the two operands of a binary
7312 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7313 The value may be stored in TARGET if TARGET is nonzero. The
7314 MODIFIER argument is as documented by expand_expr. */
7315
7316 static void
7317 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7318 enum expand_modifier modifier)
7319 {
7320 if (! safe_from_p (target, exp1, 1))
7321 target = 0;
7322 if (operand_equal_p (exp0, exp1, 0))
7323 {
7324 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7325 *op1 = copy_rtx (*op0);
7326 }
7327 else
7328 {
7329 /* If we need to preserve evaluation order, copy exp0 into its own
7330 temporary variable so that it can't be clobbered by exp1. */
7331 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7332 exp0 = save_expr (exp0);
7333 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7334 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7335 }
7336 }
7337
7338 \f
7339 /* Return a MEM that contains constant EXP. DEFER is as for
7340 output_constant_def and MODIFIER is as for expand_expr. */
7341
7342 static rtx
7343 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7344 {
7345 rtx mem;
7346
7347 mem = output_constant_def (exp, defer);
7348 if (modifier != EXPAND_INITIALIZER)
7349 mem = use_anchored_address (mem);
7350 return mem;
7351 }
7352
7353 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7354 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7355
7356 static rtx
7357 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7358 enum expand_modifier modifier, addr_space_t as)
7359 {
7360 rtx result, subtarget;
7361 tree inner, offset;
7362 HOST_WIDE_INT bitsize, bitpos;
7363 int volatilep, unsignedp;
7364 enum machine_mode mode1;
7365
7366 /* If we are taking the address of a constant and are at the top level,
7367 we have to use output_constant_def since we can't call force_const_mem
7368 at top level. */
7369 /* ??? This should be considered a front-end bug. We should not be
7370 generating ADDR_EXPR of something that isn't an LVALUE. The only
7371 exception here is STRING_CST. */
7372 if (CONSTANT_CLASS_P (exp))
7373 {
7374 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7375 if (modifier < EXPAND_SUM)
7376 result = force_operand (result, target);
7377 return result;
7378 }
7379
7380 /* Everything must be something allowed by is_gimple_addressable. */
7381 switch (TREE_CODE (exp))
7382 {
7383 case INDIRECT_REF:
7384 /* This case will happen via recursion for &a->b. */
7385 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7386
7387 case MEM_REF:
7388 {
7389 tree tem = TREE_OPERAND (exp, 0);
7390 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7391 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7392 return expand_expr (tem, target, tmode, modifier);
7393 }
7394
7395 case CONST_DECL:
7396 /* Expand the initializer like constants above. */
7397 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7398 0, modifier), 0);
7399 if (modifier < EXPAND_SUM)
7400 result = force_operand (result, target);
7401 return result;
7402
7403 case REALPART_EXPR:
7404 /* The real part of the complex number is always first, therefore
7405 the address is the same as the address of the parent object. */
7406 offset = 0;
7407 bitpos = 0;
7408 inner = TREE_OPERAND (exp, 0);
7409 break;
7410
7411 case IMAGPART_EXPR:
7412 /* The imaginary part of the complex number is always second.
7413 The expression is therefore always offset by the size of the
7414 scalar type. */
7415 offset = 0;
7416 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7417 inner = TREE_OPERAND (exp, 0);
7418 break;
7419
7420 default:
7421 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7422 expand_expr, as that can have various side effects; LABEL_DECLs for
7423 example, may not have their DECL_RTL set yet. Expand the rtl of
7424 CONSTRUCTORs too, which should yield a memory reference for the
7425 constructor's contents. Assume language specific tree nodes can
7426 be expanded in some interesting way. */
7427 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7428 if (DECL_P (exp)
7429 || TREE_CODE (exp) == CONSTRUCTOR
7430 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7431 {
7432 result = expand_expr (exp, target, tmode,
7433 modifier == EXPAND_INITIALIZER
7434 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7435
7436 /* If the DECL isn't in memory, then the DECL wasn't properly
7437 marked TREE_ADDRESSABLE, which will be either a front-end
7438 or a tree optimizer bug. */
7439
7440 if (TREE_ADDRESSABLE (exp)
7441 && ! MEM_P (result)
7442 && ! targetm.calls.allocate_stack_slots_for_args())
7443 {
7444 error ("local frame unavailable (naked function?)");
7445 return result;
7446 }
7447 else
7448 gcc_assert (MEM_P (result));
7449 result = XEXP (result, 0);
7450
7451 /* ??? Is this needed anymore? */
7452 if (DECL_P (exp))
7453 TREE_USED (exp) = 1;
7454
7455 if (modifier != EXPAND_INITIALIZER
7456 && modifier != EXPAND_CONST_ADDRESS
7457 && modifier != EXPAND_SUM)
7458 result = force_operand (result, target);
7459 return result;
7460 }
7461
7462 /* Pass FALSE as the last argument to get_inner_reference although
7463 we are expanding to RTL. The rationale is that we know how to
7464 handle "aligning nodes" here: we can just bypass them because
7465 they won't change the final object whose address will be returned
7466 (they actually exist only for that purpose). */
7467 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7468 &mode1, &unsignedp, &volatilep, false);
7469 break;
7470 }
7471
7472 /* We must have made progress. */
7473 gcc_assert (inner != exp);
7474
7475 subtarget = offset || bitpos ? NULL_RTX : target;
7476 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7477 inner alignment, force the inner to be sufficiently aligned. */
7478 if (CONSTANT_CLASS_P (inner)
7479 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7480 {
7481 inner = copy_node (inner);
7482 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7483 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7484 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7485 }
7486 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7487
7488 if (offset)
7489 {
7490 rtx tmp;
7491
7492 if (modifier != EXPAND_NORMAL)
7493 result = force_operand (result, NULL);
7494 tmp = expand_expr (offset, NULL_RTX, tmode,
7495 modifier == EXPAND_INITIALIZER
7496 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7497
7498 result = convert_memory_address_addr_space (tmode, result, as);
7499 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7500
7501 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7502 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7503 else
7504 {
7505 subtarget = bitpos ? NULL_RTX : target;
7506 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7507 1, OPTAB_LIB_WIDEN);
7508 }
7509 }
7510
7511 if (bitpos)
7512 {
7513 /* Someone beforehand should have rejected taking the address
7514 of such an object. */
7515 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7516
7517 result = plus_constant (result, bitpos / BITS_PER_UNIT);
7518 if (modifier < EXPAND_SUM)
7519 result = force_operand (result, target);
7520 }
7521
7522 return result;
7523 }
7524
7525 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7526 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7527
7528 static rtx
7529 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7530 enum expand_modifier modifier)
7531 {
7532 addr_space_t as = ADDR_SPACE_GENERIC;
7533 enum machine_mode address_mode = Pmode;
7534 enum machine_mode pointer_mode = ptr_mode;
7535 enum machine_mode rmode;
7536 rtx result;
7537
7538 /* Target mode of VOIDmode says "whatever's natural". */
7539 if (tmode == VOIDmode)
7540 tmode = TYPE_MODE (TREE_TYPE (exp));
7541
7542 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7543 {
7544 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7545 address_mode = targetm.addr_space.address_mode (as);
7546 pointer_mode = targetm.addr_space.pointer_mode (as);
7547 }
7548
7549 /* We can get called with some Weird Things if the user does silliness
7550 like "(short) &a". In that case, convert_memory_address won't do
7551 the right thing, so ignore the given target mode. */
7552 if (tmode != address_mode && tmode != pointer_mode)
7553 tmode = address_mode;
7554
7555 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7556 tmode, modifier, as);
7557
7558 /* Despite expand_expr claims concerning ignoring TMODE when not
7559 strictly convenient, stuff breaks if we don't honor it. Note
7560 that combined with the above, we only do this for pointer modes. */
7561 rmode = GET_MODE (result);
7562 if (rmode == VOIDmode)
7563 rmode = tmode;
7564 if (rmode != tmode)
7565 result = convert_memory_address_addr_space (tmode, result, as);
7566
7567 return result;
7568 }
7569
7570 /* Generate code for computing CONSTRUCTOR EXP.
7571 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7572 is TRUE, instead of creating a temporary variable in memory
7573 NULL is returned and the caller needs to handle it differently. */
7574
7575 static rtx
7576 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7577 bool avoid_temp_mem)
7578 {
7579 tree type = TREE_TYPE (exp);
7580 enum machine_mode mode = TYPE_MODE (type);
7581
7582 /* Try to avoid creating a temporary at all. This is possible
7583 if all of the initializer is zero.
7584 FIXME: try to handle all [0..255] initializers we can handle
7585 with memset. */
7586 if (TREE_STATIC (exp)
7587 && !TREE_ADDRESSABLE (exp)
7588 && target != 0 && mode == BLKmode
7589 && all_zeros_p (exp))
7590 {
7591 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7592 return target;
7593 }
7594
7595 /* All elts simple constants => refer to a constant in memory. But
7596 if this is a non-BLKmode mode, let it store a field at a time
7597 since that should make a CONST_INT or CONST_DOUBLE when we
7598 fold. Likewise, if we have a target we can use, it is best to
7599 store directly into the target unless the type is large enough
7600 that memcpy will be used. If we are making an initializer and
7601 all operands are constant, put it in memory as well.
7602
7603 FIXME: Avoid trying to fill vector constructors piece-meal.
7604 Output them with output_constant_def below unless we're sure
7605 they're zeros. This should go away when vector initializers
7606 are treated like VECTOR_CST instead of arrays. */
7607 if ((TREE_STATIC (exp)
7608 && ((mode == BLKmode
7609 && ! (target != 0 && safe_from_p (target, exp, 1)))
7610 || TREE_ADDRESSABLE (exp)
7611 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7612 && (! MOVE_BY_PIECES_P
7613 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7614 TYPE_ALIGN (type)))
7615 && ! mostly_zeros_p (exp))))
7616 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7617 && TREE_CONSTANT (exp)))
7618 {
7619 rtx constructor;
7620
7621 if (avoid_temp_mem)
7622 return NULL_RTX;
7623
7624 constructor = expand_expr_constant (exp, 1, modifier);
7625
7626 if (modifier != EXPAND_CONST_ADDRESS
7627 && modifier != EXPAND_INITIALIZER
7628 && modifier != EXPAND_SUM)
7629 constructor = validize_mem (constructor);
7630
7631 return constructor;
7632 }
7633
7634 /* Handle calls that pass values in multiple non-contiguous
7635 locations. The Irix 6 ABI has examples of this. */
7636 if (target == 0 || ! safe_from_p (target, exp, 1)
7637 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7638 {
7639 if (avoid_temp_mem)
7640 return NULL_RTX;
7641
7642 target
7643 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7644 | (TREE_READONLY (exp)
7645 * TYPE_QUAL_CONST))),
7646 0, TREE_ADDRESSABLE (exp), 1);
7647 }
7648
7649 store_constructor (exp, target, 0, int_expr_size (exp));
7650 return target;
7651 }
7652
7653
7654 /* expand_expr: generate code for computing expression EXP.
7655 An rtx for the computed value is returned. The value is never null.
7656 In the case of a void EXP, const0_rtx is returned.
7657
7658 The value may be stored in TARGET if TARGET is nonzero.
7659 TARGET is just a suggestion; callers must assume that
7660 the rtx returned may not be the same as TARGET.
7661
7662 If TARGET is CONST0_RTX, it means that the value will be ignored.
7663
7664 If TMODE is not VOIDmode, it suggests generating the
7665 result in mode TMODE. But this is done only when convenient.
7666 Otherwise, TMODE is ignored and the value generated in its natural mode.
7667 TMODE is just a suggestion; callers must assume that
7668 the rtx returned may not have mode TMODE.
7669
7670 Note that TARGET may have neither TMODE nor MODE. In that case, it
7671 probably will not be used.
7672
7673 If MODIFIER is EXPAND_SUM then when EXP is an addition
7674 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7675 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7676 products as above, or REG or MEM, or constant.
7677 Ordinarily in such cases we would output mul or add instructions
7678 and then return a pseudo reg containing the sum.
7679
7680 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7681 it also marks a label as absolutely required (it can't be dead).
7682 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7683 This is used for outputting expressions used in initializers.
7684
7685 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7686 with a constant address even if that address is not normally legitimate.
7687 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7688
7689 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7690 a call parameter. Such targets require special care as we haven't yet
7691 marked TARGET so that it's safe from being trashed by libcalls. We
7692 don't want to use TARGET for anything but the final result;
7693 Intermediate values must go elsewhere. Additionally, calls to
7694 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7695
7696 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7697 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7698 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7699 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7700 recursively. */
7701
7702 rtx
7703 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7704 enum expand_modifier modifier, rtx *alt_rtl)
7705 {
7706 rtx ret;
7707
7708 /* Handle ERROR_MARK before anybody tries to access its type. */
7709 if (TREE_CODE (exp) == ERROR_MARK
7710 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7711 {
7712 ret = CONST0_RTX (tmode);
7713 return ret ? ret : const0_rtx;
7714 }
7715
7716 /* If this is an expression of some kind and it has an associated line
7717 number, then emit the line number before expanding the expression.
7718
7719 We need to save and restore the file and line information so that
7720 errors discovered during expansion are emitted with the right
7721 information. It would be better of the diagnostic routines
7722 used the file/line information embedded in the tree nodes rather
7723 than globals. */
7724 if (cfun && EXPR_HAS_LOCATION (exp))
7725 {
7726 location_t saved_location = input_location;
7727 location_t saved_curr_loc = get_curr_insn_source_location ();
7728 tree saved_block = get_curr_insn_block ();
7729 input_location = EXPR_LOCATION (exp);
7730 set_curr_insn_source_location (input_location);
7731
7732 /* Record where the insns produced belong. */
7733 set_curr_insn_block (TREE_BLOCK (exp));
7734
7735 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7736
7737 input_location = saved_location;
7738 set_curr_insn_block (saved_block);
7739 set_curr_insn_source_location (saved_curr_loc);
7740 }
7741 else
7742 {
7743 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7744 }
7745
7746 return ret;
7747 }
7748
7749 rtx
7750 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7751 enum expand_modifier modifier)
7752 {
7753 rtx op0, op1, op2, temp;
7754 tree type;
7755 int unsignedp;
7756 enum machine_mode mode;
7757 enum tree_code code = ops->code;
7758 optab this_optab;
7759 rtx subtarget, original_target;
7760 int ignore;
7761 bool reduce_bit_field;
7762 location_t loc = ops->location;
7763 tree treeop0, treeop1, treeop2;
7764 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7765 ? reduce_to_bit_field_precision ((expr), \
7766 target, \
7767 type) \
7768 : (expr))
7769
7770 type = ops->type;
7771 mode = TYPE_MODE (type);
7772 unsignedp = TYPE_UNSIGNED (type);
7773
7774 treeop0 = ops->op0;
7775 treeop1 = ops->op1;
7776 treeop2 = ops->op2;
7777
7778 /* We should be called only on simple (binary or unary) expressions,
7779 exactly those that are valid in gimple expressions that aren't
7780 GIMPLE_SINGLE_RHS (or invalid). */
7781 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7782 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7783 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7784
7785 ignore = (target == const0_rtx
7786 || ((CONVERT_EXPR_CODE_P (code)
7787 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7788 && TREE_CODE (type) == VOID_TYPE));
7789
7790 /* We should be called only if we need the result. */
7791 gcc_assert (!ignore);
7792
7793 /* An operation in what may be a bit-field type needs the
7794 result to be reduced to the precision of the bit-field type,
7795 which is narrower than that of the type's mode. */
7796 reduce_bit_field = (INTEGRAL_TYPE_P (type)
7797 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7798
7799 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7800 target = 0;
7801
7802 /* Use subtarget as the target for operand 0 of a binary operation. */
7803 subtarget = get_subtarget (target);
7804 original_target = target;
7805
7806 switch (code)
7807 {
7808 case NON_LVALUE_EXPR:
7809 case PAREN_EXPR:
7810 CASE_CONVERT:
7811 if (treeop0 == error_mark_node)
7812 return const0_rtx;
7813
7814 if (TREE_CODE (type) == UNION_TYPE)
7815 {
7816 tree valtype = TREE_TYPE (treeop0);
7817
7818 /* If both input and output are BLKmode, this conversion isn't doing
7819 anything except possibly changing memory attribute. */
7820 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7821 {
7822 rtx result = expand_expr (treeop0, target, tmode,
7823 modifier);
7824
7825 result = copy_rtx (result);
7826 set_mem_attributes (result, type, 0);
7827 return result;
7828 }
7829
7830 if (target == 0)
7831 {
7832 if (TYPE_MODE (type) != BLKmode)
7833 target = gen_reg_rtx (TYPE_MODE (type));
7834 else
7835 target = assign_temp (type, 0, 1, 1);
7836 }
7837
7838 if (MEM_P (target))
7839 /* Store data into beginning of memory target. */
7840 store_expr (treeop0,
7841 adjust_address (target, TYPE_MODE (valtype), 0),
7842 modifier == EXPAND_STACK_PARM,
7843 false);
7844
7845 else
7846 {
7847 gcc_assert (REG_P (target));
7848
7849 /* Store this field into a union of the proper type. */
7850 store_field (target,
7851 MIN ((int_size_in_bytes (TREE_TYPE
7852 (treeop0))
7853 * BITS_PER_UNIT),
7854 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7855 0, 0, 0, TYPE_MODE (valtype), treeop0,
7856 type, 0, false);
7857 }
7858
7859 /* Return the entire union. */
7860 return target;
7861 }
7862
7863 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
7864 {
7865 op0 = expand_expr (treeop0, target, VOIDmode,
7866 modifier);
7867
7868 /* If the signedness of the conversion differs and OP0 is
7869 a promoted SUBREG, clear that indication since we now
7870 have to do the proper extension. */
7871 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
7872 && GET_CODE (op0) == SUBREG)
7873 SUBREG_PROMOTED_VAR_P (op0) = 0;
7874
7875 return REDUCE_BIT_FIELD (op0);
7876 }
7877
7878 op0 = expand_expr (treeop0, NULL_RTX, mode,
7879 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
7880 if (GET_MODE (op0) == mode)
7881 ;
7882
7883 /* If OP0 is a constant, just convert it into the proper mode. */
7884 else if (CONSTANT_P (op0))
7885 {
7886 tree inner_type = TREE_TYPE (treeop0);
7887 enum machine_mode inner_mode = GET_MODE (op0);
7888
7889 if (inner_mode == VOIDmode)
7890 inner_mode = TYPE_MODE (inner_type);
7891
7892 if (modifier == EXPAND_INITIALIZER)
7893 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7894 subreg_lowpart_offset (mode,
7895 inner_mode));
7896 else
7897 op0= convert_modes (mode, inner_mode, op0,
7898 TYPE_UNSIGNED (inner_type));
7899 }
7900
7901 else if (modifier == EXPAND_INITIALIZER)
7902 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7903
7904 else if (target == 0)
7905 op0 = convert_to_mode (mode, op0,
7906 TYPE_UNSIGNED (TREE_TYPE
7907 (treeop0)));
7908 else
7909 {
7910 convert_move (target, op0,
7911 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7912 op0 = target;
7913 }
7914
7915 return REDUCE_BIT_FIELD (op0);
7916
7917 case ADDR_SPACE_CONVERT_EXPR:
7918 {
7919 tree treeop0_type = TREE_TYPE (treeop0);
7920 addr_space_t as_to;
7921 addr_space_t as_from;
7922
7923 gcc_assert (POINTER_TYPE_P (type));
7924 gcc_assert (POINTER_TYPE_P (treeop0_type));
7925
7926 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
7927 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
7928
7929 /* Conversions between pointers to the same address space should
7930 have been implemented via CONVERT_EXPR / NOP_EXPR. */
7931 gcc_assert (as_to != as_from);
7932
7933 /* Ask target code to handle conversion between pointers
7934 to overlapping address spaces. */
7935 if (targetm.addr_space.subset_p (as_to, as_from)
7936 || targetm.addr_space.subset_p (as_from, as_to))
7937 {
7938 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
7939 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
7940 gcc_assert (op0);
7941 return op0;
7942 }
7943
7944 /* For disjoint address spaces, converting anything but
7945 a null pointer invokes undefined behaviour. We simply
7946 always return a null pointer here. */
7947 return CONST0_RTX (mode);
7948 }
7949
7950 case POINTER_PLUS_EXPR:
7951 /* Even though the sizetype mode and the pointer's mode can be different
7952 expand is able to handle this correctly and get the correct result out
7953 of the PLUS_EXPR code. */
7954 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
7955 if sizetype precision is smaller than pointer precision. */
7956 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
7957 treeop1 = fold_convert_loc (loc, type,
7958 fold_convert_loc (loc, ssizetype,
7959 treeop1));
7960 /* If sizetype precision is larger than pointer precision, truncate the
7961 offset to have matching modes. */
7962 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
7963 treeop1 = fold_convert_loc (loc, type, treeop1);
7964
7965 case PLUS_EXPR:
7966 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7967 something else, make sure we add the register to the constant and
7968 then to the other thing. This case can occur during strength
7969 reduction and doing it this way will produce better code if the
7970 frame pointer or argument pointer is eliminated.
7971
7972 fold-const.c will ensure that the constant is always in the inner
7973 PLUS_EXPR, so the only case we need to do anything about is if
7974 sp, ap, or fp is our second argument, in which case we must swap
7975 the innermost first argument and our second argument. */
7976
7977 if (TREE_CODE (treeop0) == PLUS_EXPR
7978 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
7979 && TREE_CODE (treeop1) == VAR_DECL
7980 && (DECL_RTL (treeop1) == frame_pointer_rtx
7981 || DECL_RTL (treeop1) == stack_pointer_rtx
7982 || DECL_RTL (treeop1) == arg_pointer_rtx))
7983 {
7984 tree t = treeop1;
7985
7986 treeop1 = TREE_OPERAND (treeop0, 0);
7987 TREE_OPERAND (treeop0, 0) = t;
7988 }
7989
7990 /* If the result is to be ptr_mode and we are adding an integer to
7991 something, we might be forming a constant. So try to use
7992 plus_constant. If it produces a sum and we can't accept it,
7993 use force_operand. This allows P = &ARR[const] to generate
7994 efficient code on machines where a SYMBOL_REF is not a valid
7995 address.
7996
7997 If this is an EXPAND_SUM call, always return the sum. */
7998 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7999 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8000 {
8001 if (modifier == EXPAND_STACK_PARM)
8002 target = 0;
8003 if (TREE_CODE (treeop0) == INTEGER_CST
8004 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8005 && TREE_CONSTANT (treeop1))
8006 {
8007 rtx constant_part;
8008
8009 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8010 EXPAND_SUM);
8011 /* Use immed_double_const to ensure that the constant is
8012 truncated according to the mode of OP1, then sign extended
8013 to a HOST_WIDE_INT. Using the constant directly can result
8014 in non-canonical RTL in a 64x32 cross compile. */
8015 constant_part
8016 = immed_double_const (TREE_INT_CST_LOW (treeop0),
8017 (HOST_WIDE_INT) 0,
8018 TYPE_MODE (TREE_TYPE (treeop1)));
8019 op1 = plus_constant (op1, INTVAL (constant_part));
8020 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8021 op1 = force_operand (op1, target);
8022 return REDUCE_BIT_FIELD (op1);
8023 }
8024
8025 else if (TREE_CODE (treeop1) == INTEGER_CST
8026 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8027 && TREE_CONSTANT (treeop0))
8028 {
8029 rtx constant_part;
8030
8031 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8032 (modifier == EXPAND_INITIALIZER
8033 ? EXPAND_INITIALIZER : EXPAND_SUM));
8034 if (! CONSTANT_P (op0))
8035 {
8036 op1 = expand_expr (treeop1, NULL_RTX,
8037 VOIDmode, modifier);
8038 /* Return a PLUS if modifier says it's OK. */
8039 if (modifier == EXPAND_SUM
8040 || modifier == EXPAND_INITIALIZER)
8041 return simplify_gen_binary (PLUS, mode, op0, op1);
8042 goto binop2;
8043 }
8044 /* Use immed_double_const to ensure that the constant is
8045 truncated according to the mode of OP1, then sign extended
8046 to a HOST_WIDE_INT. Using the constant directly can result
8047 in non-canonical RTL in a 64x32 cross compile. */
8048 constant_part
8049 = immed_double_const (TREE_INT_CST_LOW (treeop1),
8050 (HOST_WIDE_INT) 0,
8051 TYPE_MODE (TREE_TYPE (treeop0)));
8052 op0 = plus_constant (op0, INTVAL (constant_part));
8053 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8054 op0 = force_operand (op0, target);
8055 return REDUCE_BIT_FIELD (op0);
8056 }
8057 }
8058
8059 /* Use TER to expand pointer addition of a negated value
8060 as pointer subtraction. */
8061 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8062 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8063 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8064 && TREE_CODE (treeop1) == SSA_NAME
8065 && TYPE_MODE (TREE_TYPE (treeop0))
8066 == TYPE_MODE (TREE_TYPE (treeop1)))
8067 {
8068 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8069 if (def)
8070 {
8071 treeop1 = gimple_assign_rhs1 (def);
8072 code = MINUS_EXPR;
8073 goto do_minus;
8074 }
8075 }
8076
8077 /* No sense saving up arithmetic to be done
8078 if it's all in the wrong mode to form part of an address.
8079 And force_operand won't know whether to sign-extend or
8080 zero-extend. */
8081 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8082 || mode != ptr_mode)
8083 {
8084 expand_operands (treeop0, treeop1,
8085 subtarget, &op0, &op1, EXPAND_NORMAL);
8086 if (op0 == const0_rtx)
8087 return op1;
8088 if (op1 == const0_rtx)
8089 return op0;
8090 goto binop2;
8091 }
8092
8093 expand_operands (treeop0, treeop1,
8094 subtarget, &op0, &op1, modifier);
8095 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8096
8097 case MINUS_EXPR:
8098 do_minus:
8099 /* For initializers, we are allowed to return a MINUS of two
8100 symbolic constants. Here we handle all cases when both operands
8101 are constant. */
8102 /* Handle difference of two symbolic constants,
8103 for the sake of an initializer. */
8104 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8105 && really_constant_p (treeop0)
8106 && really_constant_p (treeop1))
8107 {
8108 expand_operands (treeop0, treeop1,
8109 NULL_RTX, &op0, &op1, modifier);
8110
8111 /* If the last operand is a CONST_INT, use plus_constant of
8112 the negated constant. Else make the MINUS. */
8113 if (CONST_INT_P (op1))
8114 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
8115 else
8116 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8117 }
8118
8119 /* No sense saving up arithmetic to be done
8120 if it's all in the wrong mode to form part of an address.
8121 And force_operand won't know whether to sign-extend or
8122 zero-extend. */
8123 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8124 || mode != ptr_mode)
8125 goto binop;
8126
8127 expand_operands (treeop0, treeop1,
8128 subtarget, &op0, &op1, modifier);
8129
8130 /* Convert A - const to A + (-const). */
8131 if (CONST_INT_P (op1))
8132 {
8133 op1 = negate_rtx (mode, op1);
8134 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8135 }
8136
8137 goto binop2;
8138
8139 case WIDEN_MULT_PLUS_EXPR:
8140 case WIDEN_MULT_MINUS_EXPR:
8141 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8142 op2 = expand_normal (treeop2);
8143 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8144 target, unsignedp);
8145 return target;
8146
8147 case WIDEN_MULT_EXPR:
8148 /* If first operand is constant, swap them.
8149 Thus the following special case checks need only
8150 check the second operand. */
8151 if (TREE_CODE (treeop0) == INTEGER_CST)
8152 {
8153 tree t1 = treeop0;
8154 treeop0 = treeop1;
8155 treeop1 = t1;
8156 }
8157
8158 /* First, check if we have a multiplication of one signed and one
8159 unsigned operand. */
8160 if (TREE_CODE (treeop1) != INTEGER_CST
8161 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8162 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8163 {
8164 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8165 this_optab = usmul_widen_optab;
8166 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8167 != CODE_FOR_nothing)
8168 {
8169 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8170 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8171 EXPAND_NORMAL);
8172 else
8173 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8174 EXPAND_NORMAL);
8175 goto binop3;
8176 }
8177 }
8178 /* Check for a multiplication with matching signedness. */
8179 else if ((TREE_CODE (treeop1) == INTEGER_CST
8180 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8181 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8182 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8183 {
8184 tree op0type = TREE_TYPE (treeop0);
8185 enum machine_mode innermode = TYPE_MODE (op0type);
8186 bool zextend_p = TYPE_UNSIGNED (op0type);
8187 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8188 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8189
8190 if (TREE_CODE (treeop0) != INTEGER_CST)
8191 {
8192 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8193 != CODE_FOR_nothing)
8194 {
8195 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8196 EXPAND_NORMAL);
8197 temp = expand_widening_mult (mode, op0, op1, target,
8198 unsignedp, this_optab);
8199 return REDUCE_BIT_FIELD (temp);
8200 }
8201 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8202 != CODE_FOR_nothing
8203 && innermode == word_mode)
8204 {
8205 rtx htem, hipart;
8206 op0 = expand_normal (treeop0);
8207 if (TREE_CODE (treeop1) == INTEGER_CST)
8208 op1 = convert_modes (innermode, mode,
8209 expand_normal (treeop1), unsignedp);
8210 else
8211 op1 = expand_normal (treeop1);
8212 temp = expand_binop (mode, other_optab, op0, op1, target,
8213 unsignedp, OPTAB_LIB_WIDEN);
8214 hipart = gen_highpart (innermode, temp);
8215 htem = expand_mult_highpart_adjust (innermode, hipart,
8216 op0, op1, hipart,
8217 zextend_p);
8218 if (htem != hipart)
8219 emit_move_insn (hipart, htem);
8220 return REDUCE_BIT_FIELD (temp);
8221 }
8222 }
8223 }
8224 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8225 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8226 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8227 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8228
8229 case FMA_EXPR:
8230 {
8231 optab opt = fma_optab;
8232 gimple def0, def2;
8233
8234 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8235 call. */
8236 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8237 {
8238 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8239 tree call_expr;
8240
8241 gcc_assert (fn != NULL_TREE);
8242 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8243 return expand_builtin (call_expr, target, subtarget, mode, false);
8244 }
8245
8246 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8247 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8248
8249 op0 = op2 = NULL;
8250
8251 if (def0 && def2
8252 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8253 {
8254 opt = fnms_optab;
8255 op0 = expand_normal (gimple_assign_rhs1 (def0));
8256 op2 = expand_normal (gimple_assign_rhs1 (def2));
8257 }
8258 else if (def0
8259 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8260 {
8261 opt = fnma_optab;
8262 op0 = expand_normal (gimple_assign_rhs1 (def0));
8263 }
8264 else if (def2
8265 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8266 {
8267 opt = fms_optab;
8268 op2 = expand_normal (gimple_assign_rhs1 (def2));
8269 }
8270
8271 if (op0 == NULL)
8272 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8273 if (op2 == NULL)
8274 op2 = expand_normal (treeop2);
8275 op1 = expand_normal (treeop1);
8276
8277 return expand_ternary_op (TYPE_MODE (type), opt,
8278 op0, op1, op2, target, 0);
8279 }
8280
8281 case MULT_EXPR:
8282 /* If this is a fixed-point operation, then we cannot use the code
8283 below because "expand_mult" doesn't support sat/no-sat fixed-point
8284 multiplications. */
8285 if (ALL_FIXED_POINT_MODE_P (mode))
8286 goto binop;
8287
8288 /* If first operand is constant, swap them.
8289 Thus the following special case checks need only
8290 check the second operand. */
8291 if (TREE_CODE (treeop0) == INTEGER_CST)
8292 {
8293 tree t1 = treeop0;
8294 treeop0 = treeop1;
8295 treeop1 = t1;
8296 }
8297
8298 /* Attempt to return something suitable for generating an
8299 indexed address, for machines that support that. */
8300
8301 if (modifier == EXPAND_SUM && mode == ptr_mode
8302 && host_integerp (treeop1, 0))
8303 {
8304 tree exp1 = treeop1;
8305
8306 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8307 EXPAND_SUM);
8308
8309 if (!REG_P (op0))
8310 op0 = force_operand (op0, NULL_RTX);
8311 if (!REG_P (op0))
8312 op0 = copy_to_mode_reg (mode, op0);
8313
8314 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8315 gen_int_mode (tree_low_cst (exp1, 0),
8316 TYPE_MODE (TREE_TYPE (exp1)))));
8317 }
8318
8319 if (modifier == EXPAND_STACK_PARM)
8320 target = 0;
8321
8322 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8323 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8324
8325 case TRUNC_DIV_EXPR:
8326 case FLOOR_DIV_EXPR:
8327 case CEIL_DIV_EXPR:
8328 case ROUND_DIV_EXPR:
8329 case EXACT_DIV_EXPR:
8330 /* If this is a fixed-point operation, then we cannot use the code
8331 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8332 divisions. */
8333 if (ALL_FIXED_POINT_MODE_P (mode))
8334 goto binop;
8335
8336 if (modifier == EXPAND_STACK_PARM)
8337 target = 0;
8338 /* Possible optimization: compute the dividend with EXPAND_SUM
8339 then if the divisor is constant can optimize the case
8340 where some terms of the dividend have coeffs divisible by it. */
8341 expand_operands (treeop0, treeop1,
8342 subtarget, &op0, &op1, EXPAND_NORMAL);
8343 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8344
8345 case RDIV_EXPR:
8346 goto binop;
8347
8348 case TRUNC_MOD_EXPR:
8349 case FLOOR_MOD_EXPR:
8350 case CEIL_MOD_EXPR:
8351 case ROUND_MOD_EXPR:
8352 if (modifier == EXPAND_STACK_PARM)
8353 target = 0;
8354 expand_operands (treeop0, treeop1,
8355 subtarget, &op0, &op1, EXPAND_NORMAL);
8356 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8357
8358 case FIXED_CONVERT_EXPR:
8359 op0 = expand_normal (treeop0);
8360 if (target == 0 || modifier == EXPAND_STACK_PARM)
8361 target = gen_reg_rtx (mode);
8362
8363 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8364 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8365 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8366 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8367 else
8368 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8369 return target;
8370
8371 case FIX_TRUNC_EXPR:
8372 op0 = expand_normal (treeop0);
8373 if (target == 0 || modifier == EXPAND_STACK_PARM)
8374 target = gen_reg_rtx (mode);
8375 expand_fix (target, op0, unsignedp);
8376 return target;
8377
8378 case FLOAT_EXPR:
8379 op0 = expand_normal (treeop0);
8380 if (target == 0 || modifier == EXPAND_STACK_PARM)
8381 target = gen_reg_rtx (mode);
8382 /* expand_float can't figure out what to do if FROM has VOIDmode.
8383 So give it the correct mode. With -O, cse will optimize this. */
8384 if (GET_MODE (op0) == VOIDmode)
8385 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8386 op0);
8387 expand_float (target, op0,
8388 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8389 return target;
8390
8391 case NEGATE_EXPR:
8392 op0 = expand_expr (treeop0, subtarget,
8393 VOIDmode, EXPAND_NORMAL);
8394 if (modifier == EXPAND_STACK_PARM)
8395 target = 0;
8396 temp = expand_unop (mode,
8397 optab_for_tree_code (NEGATE_EXPR, type,
8398 optab_default),
8399 op0, target, 0);
8400 gcc_assert (temp);
8401 return REDUCE_BIT_FIELD (temp);
8402
8403 case ABS_EXPR:
8404 op0 = expand_expr (treeop0, subtarget,
8405 VOIDmode, EXPAND_NORMAL);
8406 if (modifier == EXPAND_STACK_PARM)
8407 target = 0;
8408
8409 /* ABS_EXPR is not valid for complex arguments. */
8410 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8411 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8412
8413 /* Unsigned abs is simply the operand. Testing here means we don't
8414 risk generating incorrect code below. */
8415 if (TYPE_UNSIGNED (type))
8416 return op0;
8417
8418 return expand_abs (mode, op0, target, unsignedp,
8419 safe_from_p (target, treeop0, 1));
8420
8421 case MAX_EXPR:
8422 case MIN_EXPR:
8423 target = original_target;
8424 if (target == 0
8425 || modifier == EXPAND_STACK_PARM
8426 || (MEM_P (target) && MEM_VOLATILE_P (target))
8427 || GET_MODE (target) != mode
8428 || (REG_P (target)
8429 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8430 target = gen_reg_rtx (mode);
8431 expand_operands (treeop0, treeop1,
8432 target, &op0, &op1, EXPAND_NORMAL);
8433
8434 /* First try to do it with a special MIN or MAX instruction.
8435 If that does not win, use a conditional jump to select the proper
8436 value. */
8437 this_optab = optab_for_tree_code (code, type, optab_default);
8438 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8439 OPTAB_WIDEN);
8440 if (temp != 0)
8441 return temp;
8442
8443 /* At this point, a MEM target is no longer useful; we will get better
8444 code without it. */
8445
8446 if (! REG_P (target))
8447 target = gen_reg_rtx (mode);
8448
8449 /* If op1 was placed in target, swap op0 and op1. */
8450 if (target != op0 && target == op1)
8451 {
8452 temp = op0;
8453 op0 = op1;
8454 op1 = temp;
8455 }
8456
8457 /* We generate better code and avoid problems with op1 mentioning
8458 target by forcing op1 into a pseudo if it isn't a constant. */
8459 if (! CONSTANT_P (op1))
8460 op1 = force_reg (mode, op1);
8461
8462 {
8463 enum rtx_code comparison_code;
8464 rtx cmpop1 = op1;
8465
8466 if (code == MAX_EXPR)
8467 comparison_code = unsignedp ? GEU : GE;
8468 else
8469 comparison_code = unsignedp ? LEU : LE;
8470
8471 /* Canonicalize to comparisons against 0. */
8472 if (op1 == const1_rtx)
8473 {
8474 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8475 or (a != 0 ? a : 1) for unsigned.
8476 For MIN we are safe converting (a <= 1 ? a : 1)
8477 into (a <= 0 ? a : 1) */
8478 cmpop1 = const0_rtx;
8479 if (code == MAX_EXPR)
8480 comparison_code = unsignedp ? NE : GT;
8481 }
8482 if (op1 == constm1_rtx && !unsignedp)
8483 {
8484 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8485 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8486 cmpop1 = const0_rtx;
8487 if (code == MIN_EXPR)
8488 comparison_code = LT;
8489 }
8490 #ifdef HAVE_conditional_move
8491 /* Use a conditional move if possible. */
8492 if (can_conditionally_move_p (mode))
8493 {
8494 rtx insn;
8495
8496 /* ??? Same problem as in expmed.c: emit_conditional_move
8497 forces a stack adjustment via compare_from_rtx, and we
8498 lose the stack adjustment if the sequence we are about
8499 to create is discarded. */
8500 do_pending_stack_adjust ();
8501
8502 start_sequence ();
8503
8504 /* Try to emit the conditional move. */
8505 insn = emit_conditional_move (target, comparison_code,
8506 op0, cmpop1, mode,
8507 op0, op1, mode,
8508 unsignedp);
8509
8510 /* If we could do the conditional move, emit the sequence,
8511 and return. */
8512 if (insn)
8513 {
8514 rtx seq = get_insns ();
8515 end_sequence ();
8516 emit_insn (seq);
8517 return target;
8518 }
8519
8520 /* Otherwise discard the sequence and fall back to code with
8521 branches. */
8522 end_sequence ();
8523 }
8524 #endif
8525 if (target != op0)
8526 emit_move_insn (target, op0);
8527
8528 temp = gen_label_rtx ();
8529 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8530 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8531 -1);
8532 }
8533 emit_move_insn (target, op1);
8534 emit_label (temp);
8535 return target;
8536
8537 case BIT_NOT_EXPR:
8538 op0 = expand_expr (treeop0, subtarget,
8539 VOIDmode, EXPAND_NORMAL);
8540 if (modifier == EXPAND_STACK_PARM)
8541 target = 0;
8542 /* In case we have to reduce the result to bitfield precision
8543 for unsigned bitfield expand this as XOR with a proper constant
8544 instead. */
8545 if (reduce_bit_field && TYPE_UNSIGNED (type))
8546 temp = expand_binop (mode, xor_optab, op0,
8547 immed_double_int_const
8548 (double_int_mask (TYPE_PRECISION (type)), mode),
8549 target, 1, OPTAB_LIB_WIDEN);
8550 else
8551 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8552 gcc_assert (temp);
8553 return temp;
8554
8555 /* ??? Can optimize bitwise operations with one arg constant.
8556 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8557 and (a bitwise1 b) bitwise2 b (etc)
8558 but that is probably not worth while. */
8559
8560 case BIT_AND_EXPR:
8561 case BIT_IOR_EXPR:
8562 case BIT_XOR_EXPR:
8563 goto binop;
8564
8565 case LROTATE_EXPR:
8566 case RROTATE_EXPR:
8567 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8568 || (GET_MODE_PRECISION (TYPE_MODE (type))
8569 == TYPE_PRECISION (type)));
8570 /* fall through */
8571
8572 case LSHIFT_EXPR:
8573 case RSHIFT_EXPR:
8574 /* If this is a fixed-point operation, then we cannot use the code
8575 below because "expand_shift" doesn't support sat/no-sat fixed-point
8576 shifts. */
8577 if (ALL_FIXED_POINT_MODE_P (mode))
8578 goto binop;
8579
8580 if (! safe_from_p (subtarget, treeop1, 1))
8581 subtarget = 0;
8582 if (modifier == EXPAND_STACK_PARM)
8583 target = 0;
8584 op0 = expand_expr (treeop0, subtarget,
8585 VOIDmode, EXPAND_NORMAL);
8586 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8587 unsignedp);
8588 if (code == LSHIFT_EXPR)
8589 temp = REDUCE_BIT_FIELD (temp);
8590 return temp;
8591
8592 /* Could determine the answer when only additive constants differ. Also,
8593 the addition of one can be handled by changing the condition. */
8594 case LT_EXPR:
8595 case LE_EXPR:
8596 case GT_EXPR:
8597 case GE_EXPR:
8598 case EQ_EXPR:
8599 case NE_EXPR:
8600 case UNORDERED_EXPR:
8601 case ORDERED_EXPR:
8602 case UNLT_EXPR:
8603 case UNLE_EXPR:
8604 case UNGT_EXPR:
8605 case UNGE_EXPR:
8606 case UNEQ_EXPR:
8607 case LTGT_EXPR:
8608 temp = do_store_flag (ops,
8609 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8610 tmode != VOIDmode ? tmode : mode);
8611 if (temp)
8612 return temp;
8613
8614 /* Use a compare and a jump for BLKmode comparisons, or for function
8615 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8616
8617 if ((target == 0
8618 || modifier == EXPAND_STACK_PARM
8619 || ! safe_from_p (target, treeop0, 1)
8620 || ! safe_from_p (target, treeop1, 1)
8621 /* Make sure we don't have a hard reg (such as function's return
8622 value) live across basic blocks, if not optimizing. */
8623 || (!optimize && REG_P (target)
8624 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8625 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8626
8627 emit_move_insn (target, const0_rtx);
8628
8629 op1 = gen_label_rtx ();
8630 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8631
8632 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8633 emit_move_insn (target, constm1_rtx);
8634 else
8635 emit_move_insn (target, const1_rtx);
8636
8637 emit_label (op1);
8638 return target;
8639
8640 case COMPLEX_EXPR:
8641 /* Get the rtx code of the operands. */
8642 op0 = expand_normal (treeop0);
8643 op1 = expand_normal (treeop1);
8644
8645 if (!target)
8646 target = gen_reg_rtx (TYPE_MODE (type));
8647
8648 /* Move the real (op0) and imaginary (op1) parts to their location. */
8649 write_complex_part (target, op0, false);
8650 write_complex_part (target, op1, true);
8651
8652 return target;
8653
8654 case WIDEN_SUM_EXPR:
8655 {
8656 tree oprnd0 = treeop0;
8657 tree oprnd1 = treeop1;
8658
8659 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8660 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8661 target, unsignedp);
8662 return target;
8663 }
8664
8665 case REDUC_MAX_EXPR:
8666 case REDUC_MIN_EXPR:
8667 case REDUC_PLUS_EXPR:
8668 {
8669 op0 = expand_normal (treeop0);
8670 this_optab = optab_for_tree_code (code, type, optab_default);
8671 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8672 gcc_assert (temp);
8673 return temp;
8674 }
8675
8676 case VEC_LSHIFT_EXPR:
8677 case VEC_RSHIFT_EXPR:
8678 {
8679 target = expand_vec_shift_expr (ops, target);
8680 return target;
8681 }
8682
8683 case VEC_UNPACK_HI_EXPR:
8684 case VEC_UNPACK_LO_EXPR:
8685 {
8686 op0 = expand_normal (treeop0);
8687 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8688 target, unsignedp);
8689 gcc_assert (temp);
8690 return temp;
8691 }
8692
8693 case VEC_UNPACK_FLOAT_HI_EXPR:
8694 case VEC_UNPACK_FLOAT_LO_EXPR:
8695 {
8696 op0 = expand_normal (treeop0);
8697 /* The signedness is determined from input operand. */
8698 temp = expand_widen_pattern_expr
8699 (ops, op0, NULL_RTX, NULL_RTX,
8700 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8701
8702 gcc_assert (temp);
8703 return temp;
8704 }
8705
8706 case VEC_WIDEN_MULT_HI_EXPR:
8707 case VEC_WIDEN_MULT_LO_EXPR:
8708 {
8709 tree oprnd0 = treeop0;
8710 tree oprnd1 = treeop1;
8711
8712 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8713 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8714 target, unsignedp);
8715 gcc_assert (target);
8716 return target;
8717 }
8718
8719 case VEC_WIDEN_LSHIFT_HI_EXPR:
8720 case VEC_WIDEN_LSHIFT_LO_EXPR:
8721 {
8722 tree oprnd0 = treeop0;
8723 tree oprnd1 = treeop1;
8724
8725 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8726 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8727 target, unsignedp);
8728 gcc_assert (target);
8729 return target;
8730 }
8731
8732 case VEC_PACK_TRUNC_EXPR:
8733 case VEC_PACK_SAT_EXPR:
8734 case VEC_PACK_FIX_TRUNC_EXPR:
8735 mode = TYPE_MODE (TREE_TYPE (treeop0));
8736 goto binop;
8737
8738 case VEC_PERM_EXPR:
8739 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
8740 op2 = expand_normal (treeop2);
8741
8742 /* Careful here: if the target doesn't support integral vector modes,
8743 a constant selection vector could wind up smooshed into a normal
8744 integral constant. */
8745 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
8746 {
8747 tree sel_type = TREE_TYPE (treeop2);
8748 enum machine_mode vmode
8749 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
8750 TYPE_VECTOR_SUBPARTS (sel_type));
8751 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
8752 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
8753 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
8754 }
8755 else
8756 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
8757
8758 temp = expand_vec_perm (mode, op0, op1, op2, target);
8759 gcc_assert (temp);
8760 return temp;
8761
8762 case DOT_PROD_EXPR:
8763 {
8764 tree oprnd0 = treeop0;
8765 tree oprnd1 = treeop1;
8766 tree oprnd2 = treeop2;
8767 rtx op2;
8768
8769 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8770 op2 = expand_normal (oprnd2);
8771 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8772 target, unsignedp);
8773 return target;
8774 }
8775
8776 case REALIGN_LOAD_EXPR:
8777 {
8778 tree oprnd0 = treeop0;
8779 tree oprnd1 = treeop1;
8780 tree oprnd2 = treeop2;
8781 rtx op2;
8782
8783 this_optab = optab_for_tree_code (code, type, optab_default);
8784 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8785 op2 = expand_normal (oprnd2);
8786 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8787 target, unsignedp);
8788 gcc_assert (temp);
8789 return temp;
8790 }
8791
8792 case COND_EXPR:
8793 /* A COND_EXPR with its type being VOID_TYPE represents a
8794 conditional jump and is handled in
8795 expand_gimple_cond_expr. */
8796 gcc_assert (!VOID_TYPE_P (type));
8797
8798 /* Note that COND_EXPRs whose type is a structure or union
8799 are required to be constructed to contain assignments of
8800 a temporary variable, so that we can evaluate them here
8801 for side effect only. If type is void, we must do likewise. */
8802
8803 gcc_assert (!TREE_ADDRESSABLE (type)
8804 && !ignore
8805 && TREE_TYPE (treeop1) != void_type_node
8806 && TREE_TYPE (treeop2) != void_type_node);
8807
8808 /* If we are not to produce a result, we have no target. Otherwise,
8809 if a target was specified use it; it will not be used as an
8810 intermediate target unless it is safe. If no target, use a
8811 temporary. */
8812
8813 if (modifier != EXPAND_STACK_PARM
8814 && original_target
8815 && safe_from_p (original_target, treeop0, 1)
8816 && GET_MODE (original_target) == mode
8817 #ifdef HAVE_conditional_move
8818 && (! can_conditionally_move_p (mode)
8819 || REG_P (original_target))
8820 #endif
8821 && !MEM_P (original_target))
8822 temp = original_target;
8823 else
8824 temp = assign_temp (type, 0, 0, 1);
8825
8826 do_pending_stack_adjust ();
8827 NO_DEFER_POP;
8828 op0 = gen_label_rtx ();
8829 op1 = gen_label_rtx ();
8830 jumpifnot (treeop0, op0, -1);
8831 store_expr (treeop1, temp,
8832 modifier == EXPAND_STACK_PARM,
8833 false);
8834
8835 emit_jump_insn (gen_jump (op1));
8836 emit_barrier ();
8837 emit_label (op0);
8838 store_expr (treeop2, temp,
8839 modifier == EXPAND_STACK_PARM,
8840 false);
8841
8842 emit_label (op1);
8843 OK_DEFER_POP;
8844 return temp;
8845
8846 case VEC_COND_EXPR:
8847 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
8848 return target;
8849
8850 default:
8851 gcc_unreachable ();
8852 }
8853
8854 /* Here to do an ordinary binary operator. */
8855 binop:
8856 expand_operands (treeop0, treeop1,
8857 subtarget, &op0, &op1, EXPAND_NORMAL);
8858 binop2:
8859 this_optab = optab_for_tree_code (code, type, optab_default);
8860 binop3:
8861 if (modifier == EXPAND_STACK_PARM)
8862 target = 0;
8863 temp = expand_binop (mode, this_optab, op0, op1, target,
8864 unsignedp, OPTAB_LIB_WIDEN);
8865 gcc_assert (temp);
8866 /* Bitwise operations do not need bitfield reduction as we expect their
8867 operands being properly truncated. */
8868 if (code == BIT_XOR_EXPR
8869 || code == BIT_AND_EXPR
8870 || code == BIT_IOR_EXPR)
8871 return temp;
8872 return REDUCE_BIT_FIELD (temp);
8873 }
8874 #undef REDUCE_BIT_FIELD
8875
8876 rtx
8877 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
8878 enum expand_modifier modifier, rtx *alt_rtl)
8879 {
8880 rtx op0, op1, temp, decl_rtl;
8881 tree type;
8882 int unsignedp;
8883 enum machine_mode mode;
8884 enum tree_code code = TREE_CODE (exp);
8885 rtx subtarget, original_target;
8886 int ignore;
8887 tree context;
8888 bool reduce_bit_field;
8889 location_t loc = EXPR_LOCATION (exp);
8890 struct separate_ops ops;
8891 tree treeop0, treeop1, treeop2;
8892 tree ssa_name = NULL_TREE;
8893 gimple g;
8894
8895 type = TREE_TYPE (exp);
8896 mode = TYPE_MODE (type);
8897 unsignedp = TYPE_UNSIGNED (type);
8898
8899 treeop0 = treeop1 = treeop2 = NULL_TREE;
8900 if (!VL_EXP_CLASS_P (exp))
8901 switch (TREE_CODE_LENGTH (code))
8902 {
8903 default:
8904 case 3: treeop2 = TREE_OPERAND (exp, 2);
8905 case 2: treeop1 = TREE_OPERAND (exp, 1);
8906 case 1: treeop0 = TREE_OPERAND (exp, 0);
8907 case 0: break;
8908 }
8909 ops.code = code;
8910 ops.type = type;
8911 ops.op0 = treeop0;
8912 ops.op1 = treeop1;
8913 ops.op2 = treeop2;
8914 ops.location = loc;
8915
8916 ignore = (target == const0_rtx
8917 || ((CONVERT_EXPR_CODE_P (code)
8918 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8919 && TREE_CODE (type) == VOID_TYPE));
8920
8921 /* An operation in what may be a bit-field type needs the
8922 result to be reduced to the precision of the bit-field type,
8923 which is narrower than that of the type's mode. */
8924 reduce_bit_field = (!ignore
8925 && INTEGRAL_TYPE_P (type)
8926 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8927
8928 /* If we are going to ignore this result, we need only do something
8929 if there is a side-effect somewhere in the expression. If there
8930 is, short-circuit the most common cases here. Note that we must
8931 not call expand_expr with anything but const0_rtx in case this
8932 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
8933
8934 if (ignore)
8935 {
8936 if (! TREE_SIDE_EFFECTS (exp))
8937 return const0_rtx;
8938
8939 /* Ensure we reference a volatile object even if value is ignored, but
8940 don't do this if all we are doing is taking its address. */
8941 if (TREE_THIS_VOLATILE (exp)
8942 && TREE_CODE (exp) != FUNCTION_DECL
8943 && mode != VOIDmode && mode != BLKmode
8944 && modifier != EXPAND_CONST_ADDRESS)
8945 {
8946 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
8947 if (MEM_P (temp))
8948 copy_to_reg (temp);
8949 return const0_rtx;
8950 }
8951
8952 if (TREE_CODE_CLASS (code) == tcc_unary
8953 || code == COMPONENT_REF || code == INDIRECT_REF)
8954 return expand_expr (treeop0, const0_rtx, VOIDmode,
8955 modifier);
8956
8957 else if (TREE_CODE_CLASS (code) == tcc_binary
8958 || TREE_CODE_CLASS (code) == tcc_comparison
8959 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
8960 {
8961 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8962 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8963 return const0_rtx;
8964 }
8965 else if (code == BIT_FIELD_REF)
8966 {
8967 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8968 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8969 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
8970 return const0_rtx;
8971 }
8972
8973 target = 0;
8974 }
8975
8976 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8977 target = 0;
8978
8979 /* Use subtarget as the target for operand 0 of a binary operation. */
8980 subtarget = get_subtarget (target);
8981 original_target = target;
8982
8983 switch (code)
8984 {
8985 case LABEL_DECL:
8986 {
8987 tree function = decl_function_context (exp);
8988
8989 temp = label_rtx (exp);
8990 temp = gen_rtx_LABEL_REF (Pmode, temp);
8991
8992 if (function != current_function_decl
8993 && function != 0)
8994 LABEL_REF_NONLOCAL_P (temp) = 1;
8995
8996 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
8997 return temp;
8998 }
8999
9000 case SSA_NAME:
9001 /* ??? ivopts calls expander, without any preparation from
9002 out-of-ssa. So fake instructions as if this was an access to the
9003 base variable. This unnecessarily allocates a pseudo, see how we can
9004 reuse it, if partition base vars have it set already. */
9005 if (!currently_expanding_to_rtl)
9006 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
9007 NULL);
9008
9009 g = get_gimple_for_ssa_name (exp);
9010 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9011 if (g == NULL
9012 && modifier == EXPAND_INITIALIZER
9013 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9014 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9015 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9016 g = SSA_NAME_DEF_STMT (exp);
9017 if (g)
9018 return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
9019 modifier, NULL);
9020
9021 ssa_name = exp;
9022 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9023 exp = SSA_NAME_VAR (ssa_name);
9024 goto expand_decl_rtl;
9025
9026 case PARM_DECL:
9027 case VAR_DECL:
9028 /* If a static var's type was incomplete when the decl was written,
9029 but the type is complete now, lay out the decl now. */
9030 if (DECL_SIZE (exp) == 0
9031 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9032 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9033 layout_decl (exp, 0);
9034
9035 /* ... fall through ... */
9036
9037 case FUNCTION_DECL:
9038 case RESULT_DECL:
9039 decl_rtl = DECL_RTL (exp);
9040 expand_decl_rtl:
9041 gcc_assert (decl_rtl);
9042 decl_rtl = copy_rtx (decl_rtl);
9043 /* Record writes to register variables. */
9044 if (modifier == EXPAND_WRITE
9045 && REG_P (decl_rtl)
9046 && HARD_REGISTER_P (decl_rtl))
9047 add_to_hard_reg_set (&crtl->asm_clobbers,
9048 GET_MODE (decl_rtl), REGNO (decl_rtl));
9049
9050 /* Ensure variable marked as used even if it doesn't go through
9051 a parser. If it hasn't be used yet, write out an external
9052 definition. */
9053 TREE_USED (exp) = 1;
9054
9055 /* Show we haven't gotten RTL for this yet. */
9056 temp = 0;
9057
9058 /* Variables inherited from containing functions should have
9059 been lowered by this point. */
9060 context = decl_function_context (exp);
9061 gcc_assert (!context
9062 || context == current_function_decl
9063 || TREE_STATIC (exp)
9064 || DECL_EXTERNAL (exp)
9065 /* ??? C++ creates functions that are not TREE_STATIC. */
9066 || TREE_CODE (exp) == FUNCTION_DECL);
9067
9068 /* This is the case of an array whose size is to be determined
9069 from its initializer, while the initializer is still being parsed.
9070 See expand_decl. */
9071
9072 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9073 temp = validize_mem (decl_rtl);
9074
9075 /* If DECL_RTL is memory, we are in the normal case and the
9076 address is not valid, get the address into a register. */
9077
9078 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9079 {
9080 if (alt_rtl)
9081 *alt_rtl = decl_rtl;
9082 decl_rtl = use_anchored_address (decl_rtl);
9083 if (modifier != EXPAND_CONST_ADDRESS
9084 && modifier != EXPAND_SUM
9085 && !memory_address_addr_space_p (DECL_MODE (exp),
9086 XEXP (decl_rtl, 0),
9087 MEM_ADDR_SPACE (decl_rtl)))
9088 temp = replace_equiv_address (decl_rtl,
9089 copy_rtx (XEXP (decl_rtl, 0)));
9090 }
9091
9092 /* If we got something, return it. But first, set the alignment
9093 if the address is a register. */
9094 if (temp != 0)
9095 {
9096 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9097 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9098
9099 return temp;
9100 }
9101
9102 /* If the mode of DECL_RTL does not match that of the decl,
9103 there are two cases: we are dealing with a BLKmode value
9104 that is returned in a register, or we are dealing with
9105 a promoted value. In the latter case, return a SUBREG
9106 of the wanted mode, but mark it so that we know that it
9107 was already extended. */
9108 if (REG_P (decl_rtl)
9109 && DECL_MODE (exp) != BLKmode
9110 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9111 {
9112 enum machine_mode pmode;
9113
9114 /* Get the signedness to be used for this variable. Ensure we get
9115 the same mode we got when the variable was declared. */
9116 if (code == SSA_NAME
9117 && (g = SSA_NAME_DEF_STMT (ssa_name))
9118 && gimple_code (g) == GIMPLE_CALL)
9119 {
9120 gcc_assert (!gimple_call_internal_p (g));
9121 pmode = promote_function_mode (type, mode, &unsignedp,
9122 gimple_call_fntype (g),
9123 2);
9124 }
9125 else
9126 pmode = promote_decl_mode (exp, &unsignedp);
9127 gcc_assert (GET_MODE (decl_rtl) == pmode);
9128
9129 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9130 SUBREG_PROMOTED_VAR_P (temp) = 1;
9131 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
9132 return temp;
9133 }
9134
9135 return decl_rtl;
9136
9137 case INTEGER_CST:
9138 temp = immed_double_const (TREE_INT_CST_LOW (exp),
9139 TREE_INT_CST_HIGH (exp), mode);
9140
9141 return temp;
9142
9143 case VECTOR_CST:
9144 {
9145 tree tmp = NULL_TREE;
9146 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9147 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9148 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9149 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9150 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9151 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9152 return const_vector_from_tree (exp);
9153 if (GET_MODE_CLASS (mode) == MODE_INT)
9154 {
9155 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9156 if (type_for_mode)
9157 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9158 }
9159 if (!tmp)
9160 {
9161 VEC(constructor_elt,gc) *v;
9162 unsigned i;
9163 v = VEC_alloc (constructor_elt, gc, VECTOR_CST_NELTS (exp));
9164 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
9165 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
9166 tmp = build_constructor (type, v);
9167 }
9168 return expand_expr (tmp, ignore ? const0_rtx : target,
9169 tmode, modifier);
9170 }
9171
9172 case CONST_DECL:
9173 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9174
9175 case REAL_CST:
9176 /* If optimized, generate immediate CONST_DOUBLE
9177 which will be turned into memory by reload if necessary.
9178
9179 We used to force a register so that loop.c could see it. But
9180 this does not allow gen_* patterns to perform optimizations with
9181 the constants. It also produces two insns in cases like "x = 1.0;".
9182 On most machines, floating-point constants are not permitted in
9183 many insns, so we'd end up copying it to a register in any case.
9184
9185 Now, we do the copying in expand_binop, if appropriate. */
9186 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9187 TYPE_MODE (TREE_TYPE (exp)));
9188
9189 case FIXED_CST:
9190 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9191 TYPE_MODE (TREE_TYPE (exp)));
9192
9193 case COMPLEX_CST:
9194 /* Handle evaluating a complex constant in a CONCAT target. */
9195 if (original_target && GET_CODE (original_target) == CONCAT)
9196 {
9197 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9198 rtx rtarg, itarg;
9199
9200 rtarg = XEXP (original_target, 0);
9201 itarg = XEXP (original_target, 1);
9202
9203 /* Move the real and imaginary parts separately. */
9204 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9205 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9206
9207 if (op0 != rtarg)
9208 emit_move_insn (rtarg, op0);
9209 if (op1 != itarg)
9210 emit_move_insn (itarg, op1);
9211
9212 return original_target;
9213 }
9214
9215 /* ... fall through ... */
9216
9217 case STRING_CST:
9218 temp = expand_expr_constant (exp, 1, modifier);
9219
9220 /* temp contains a constant address.
9221 On RISC machines where a constant address isn't valid,
9222 make some insns to get that address into a register. */
9223 if (modifier != EXPAND_CONST_ADDRESS
9224 && modifier != EXPAND_INITIALIZER
9225 && modifier != EXPAND_SUM
9226 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9227 MEM_ADDR_SPACE (temp)))
9228 return replace_equiv_address (temp,
9229 copy_rtx (XEXP (temp, 0)));
9230 return temp;
9231
9232 case SAVE_EXPR:
9233 {
9234 tree val = treeop0;
9235 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
9236
9237 if (!SAVE_EXPR_RESOLVED_P (exp))
9238 {
9239 /* We can indeed still hit this case, typically via builtin
9240 expanders calling save_expr immediately before expanding
9241 something. Assume this means that we only have to deal
9242 with non-BLKmode values. */
9243 gcc_assert (GET_MODE (ret) != BLKmode);
9244
9245 val = build_decl (EXPR_LOCATION (exp),
9246 VAR_DECL, NULL, TREE_TYPE (exp));
9247 DECL_ARTIFICIAL (val) = 1;
9248 DECL_IGNORED_P (val) = 1;
9249 treeop0 = val;
9250 TREE_OPERAND (exp, 0) = treeop0;
9251 SAVE_EXPR_RESOLVED_P (exp) = 1;
9252
9253 if (!CONSTANT_P (ret))
9254 ret = copy_to_reg (ret);
9255 SET_DECL_RTL (val, ret);
9256 }
9257
9258 return ret;
9259 }
9260
9261
9262 case CONSTRUCTOR:
9263 /* If we don't need the result, just ensure we evaluate any
9264 subexpressions. */
9265 if (ignore)
9266 {
9267 unsigned HOST_WIDE_INT idx;
9268 tree value;
9269
9270 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9271 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9272
9273 return const0_rtx;
9274 }
9275
9276 return expand_constructor (exp, target, modifier, false);
9277
9278 case TARGET_MEM_REF:
9279 {
9280 addr_space_t as
9281 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9282 struct mem_address addr;
9283 enum insn_code icode;
9284 unsigned int align;
9285
9286 get_address_description (exp, &addr);
9287 op0 = addr_for_mem_ref (&addr, as, true);
9288 op0 = memory_address_addr_space (mode, op0, as);
9289 temp = gen_rtx_MEM (mode, op0);
9290 set_mem_attributes (temp, exp, 0);
9291 set_mem_addr_space (temp, as);
9292 align = get_object_or_type_alignment (exp);
9293 if (modifier != EXPAND_WRITE
9294 && mode != BLKmode
9295 && align < GET_MODE_ALIGNMENT (mode)
9296 /* If the target does not have special handling for unaligned
9297 loads of mode then it can use regular moves for them. */
9298 && ((icode = optab_handler (movmisalign_optab, mode))
9299 != CODE_FOR_nothing))
9300 {
9301 struct expand_operand ops[2];
9302
9303 /* We've already validated the memory, and we're creating a
9304 new pseudo destination. The predicates really can't fail,
9305 nor can the generator. */
9306 create_output_operand (&ops[0], NULL_RTX, mode);
9307 create_fixed_operand (&ops[1], temp);
9308 expand_insn (icode, 2, ops);
9309 return ops[0].value;
9310 }
9311 return temp;
9312 }
9313
9314 case MEM_REF:
9315 {
9316 addr_space_t as
9317 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9318 enum machine_mode address_mode;
9319 tree base = TREE_OPERAND (exp, 0);
9320 gimple def_stmt;
9321 enum insn_code icode;
9322 unsigned align;
9323 /* Handle expansion of non-aliased memory with non-BLKmode. That
9324 might end up in a register. */
9325 if (mem_ref_refers_to_non_mem_p (exp))
9326 {
9327 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9328 tree bit_offset;
9329 tree bftype;
9330 base = TREE_OPERAND (base, 0);
9331 if (offset == 0
9332 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9333 && (GET_MODE_BITSIZE (DECL_MODE (base))
9334 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9335 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9336 TREE_TYPE (exp), base),
9337 target, tmode, modifier);
9338 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9339 bftype = TREE_TYPE (base);
9340 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9341 bftype = TREE_TYPE (exp);
9342 else
9343 {
9344 temp = assign_stack_temp (DECL_MODE (base),
9345 GET_MODE_SIZE (DECL_MODE (base)),
9346 0);
9347 store_expr (base, temp, 0, false);
9348 temp = adjust_address (temp, BLKmode, offset);
9349 set_mem_size (temp, int_size_in_bytes (TREE_TYPE (exp)));
9350 return temp;
9351 }
9352 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9353 base,
9354 TYPE_SIZE (TREE_TYPE (exp)),
9355 bit_offset),
9356 target, tmode, modifier);
9357 }
9358 address_mode = targetm.addr_space.address_mode (as);
9359 base = TREE_OPERAND (exp, 0);
9360 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9361 {
9362 tree mask = gimple_assign_rhs2 (def_stmt);
9363 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9364 gimple_assign_rhs1 (def_stmt), mask);
9365 TREE_OPERAND (exp, 0) = base;
9366 }
9367 align = get_object_or_type_alignment (exp);
9368 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9369 op0 = memory_address_addr_space (address_mode, op0, as);
9370 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9371 {
9372 rtx off
9373 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9374 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9375 }
9376 op0 = memory_address_addr_space (mode, op0, as);
9377 temp = gen_rtx_MEM (mode, op0);
9378 set_mem_attributes (temp, exp, 0);
9379 set_mem_addr_space (temp, as);
9380 if (TREE_THIS_VOLATILE (exp))
9381 MEM_VOLATILE_P (temp) = 1;
9382 if (modifier != EXPAND_WRITE
9383 && mode != BLKmode
9384 && align < GET_MODE_ALIGNMENT (mode))
9385 {
9386 if ((icode = optab_handler (movmisalign_optab, mode))
9387 != CODE_FOR_nothing)
9388 {
9389 struct expand_operand ops[2];
9390
9391 /* We've already validated the memory, and we're creating a
9392 new pseudo destination. The predicates really can't fail,
9393 nor can the generator. */
9394 create_output_operand (&ops[0], NULL_RTX, mode);
9395 create_fixed_operand (&ops[1], temp);
9396 expand_insn (icode, 2, ops);
9397 return ops[0].value;
9398 }
9399 else if (SLOW_UNALIGNED_ACCESS (mode, align))
9400 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
9401 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
9402 true, (modifier == EXPAND_STACK_PARM
9403 ? NULL_RTX : target),
9404 mode, mode);
9405 }
9406 return temp;
9407 }
9408
9409 case ARRAY_REF:
9410
9411 {
9412 tree array = treeop0;
9413 tree index = treeop1;
9414
9415 /* Fold an expression like: "foo"[2].
9416 This is not done in fold so it won't happen inside &.
9417 Don't fold if this is for wide characters since it's too
9418 difficult to do correctly and this is a very rare case. */
9419
9420 if (modifier != EXPAND_CONST_ADDRESS
9421 && modifier != EXPAND_INITIALIZER
9422 && modifier != EXPAND_MEMORY)
9423 {
9424 tree t = fold_read_from_constant_string (exp);
9425
9426 if (t)
9427 return expand_expr (t, target, tmode, modifier);
9428 }
9429
9430 /* If this is a constant index into a constant array,
9431 just get the value from the array. Handle both the cases when
9432 we have an explicit constructor and when our operand is a variable
9433 that was declared const. */
9434
9435 if (modifier != EXPAND_CONST_ADDRESS
9436 && modifier != EXPAND_INITIALIZER
9437 && modifier != EXPAND_MEMORY
9438 && TREE_CODE (array) == CONSTRUCTOR
9439 && ! TREE_SIDE_EFFECTS (array)
9440 && TREE_CODE (index) == INTEGER_CST)
9441 {
9442 unsigned HOST_WIDE_INT ix;
9443 tree field, value;
9444
9445 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9446 field, value)
9447 if (tree_int_cst_equal (field, index))
9448 {
9449 if (!TREE_SIDE_EFFECTS (value))
9450 return expand_expr (fold (value), target, tmode, modifier);
9451 break;
9452 }
9453 }
9454
9455 else if (optimize >= 1
9456 && modifier != EXPAND_CONST_ADDRESS
9457 && modifier != EXPAND_INITIALIZER
9458 && modifier != EXPAND_MEMORY
9459 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9460 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9461 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9462 && const_value_known_p (array))
9463 {
9464 if (TREE_CODE (index) == INTEGER_CST)
9465 {
9466 tree init = DECL_INITIAL (array);
9467
9468 if (TREE_CODE (init) == CONSTRUCTOR)
9469 {
9470 unsigned HOST_WIDE_INT ix;
9471 tree field, value;
9472
9473 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9474 field, value)
9475 if (tree_int_cst_equal (field, index))
9476 {
9477 if (TREE_SIDE_EFFECTS (value))
9478 break;
9479
9480 if (TREE_CODE (value) == CONSTRUCTOR)
9481 {
9482 /* If VALUE is a CONSTRUCTOR, this
9483 optimization is only useful if
9484 this doesn't store the CONSTRUCTOR
9485 into memory. If it does, it is more
9486 efficient to just load the data from
9487 the array directly. */
9488 rtx ret = expand_constructor (value, target,
9489 modifier, true);
9490 if (ret == NULL_RTX)
9491 break;
9492 }
9493
9494 return expand_expr (fold (value), target, tmode,
9495 modifier);
9496 }
9497 }
9498 else if(TREE_CODE (init) == STRING_CST)
9499 {
9500 tree index1 = index;
9501 tree low_bound = array_ref_low_bound (exp);
9502 index1 = fold_convert_loc (loc, sizetype,
9503 treeop1);
9504
9505 /* Optimize the special-case of a zero lower bound.
9506
9507 We convert the low_bound to sizetype to avoid some problems
9508 with constant folding. (E.g. suppose the lower bound is 1,
9509 and its mode is QI. Without the conversion,l (ARRAY
9510 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9511 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9512
9513 if (! integer_zerop (low_bound))
9514 index1 = size_diffop_loc (loc, index1,
9515 fold_convert_loc (loc, sizetype,
9516 low_bound));
9517
9518 if (0 > compare_tree_int (index1,
9519 TREE_STRING_LENGTH (init)))
9520 {
9521 tree type = TREE_TYPE (TREE_TYPE (init));
9522 enum machine_mode mode = TYPE_MODE (type);
9523
9524 if (GET_MODE_CLASS (mode) == MODE_INT
9525 && GET_MODE_SIZE (mode) == 1)
9526 return gen_int_mode (TREE_STRING_POINTER (init)
9527 [TREE_INT_CST_LOW (index1)],
9528 mode);
9529 }
9530 }
9531 }
9532 }
9533 }
9534 goto normal_inner_ref;
9535
9536 case COMPONENT_REF:
9537 /* If the operand is a CONSTRUCTOR, we can just extract the
9538 appropriate field if it is present. */
9539 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9540 {
9541 unsigned HOST_WIDE_INT idx;
9542 tree field, value;
9543
9544 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9545 idx, field, value)
9546 if (field == treeop1
9547 /* We can normally use the value of the field in the
9548 CONSTRUCTOR. However, if this is a bitfield in
9549 an integral mode that we can fit in a HOST_WIDE_INT,
9550 we must mask only the number of bits in the bitfield,
9551 since this is done implicitly by the constructor. If
9552 the bitfield does not meet either of those conditions,
9553 we can't do this optimization. */
9554 && (! DECL_BIT_FIELD (field)
9555 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9556 && (GET_MODE_PRECISION (DECL_MODE (field))
9557 <= HOST_BITS_PER_WIDE_INT))))
9558 {
9559 if (DECL_BIT_FIELD (field)
9560 && modifier == EXPAND_STACK_PARM)
9561 target = 0;
9562 op0 = expand_expr (value, target, tmode, modifier);
9563 if (DECL_BIT_FIELD (field))
9564 {
9565 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9566 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9567
9568 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9569 {
9570 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9571 op0 = expand_and (imode, op0, op1, target);
9572 }
9573 else
9574 {
9575 int count = GET_MODE_PRECISION (imode) - bitsize;
9576
9577 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9578 target, 0);
9579 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9580 target, 0);
9581 }
9582 }
9583
9584 return op0;
9585 }
9586 }
9587 goto normal_inner_ref;
9588
9589 case BIT_FIELD_REF:
9590 case ARRAY_RANGE_REF:
9591 normal_inner_ref:
9592 {
9593 enum machine_mode mode1, mode2;
9594 HOST_WIDE_INT bitsize, bitpos;
9595 tree offset;
9596 int volatilep = 0, must_force_mem;
9597 bool packedp = false;
9598 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9599 &mode1, &unsignedp, &volatilep, true);
9600 rtx orig_op0, memloc;
9601
9602 /* If we got back the original object, something is wrong. Perhaps
9603 we are evaluating an expression too early. In any event, don't
9604 infinitely recurse. */
9605 gcc_assert (tem != exp);
9606
9607 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9608 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9609 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9610 packedp = true;
9611
9612 /* If TEM's type is a union of variable size, pass TARGET to the inner
9613 computation, since it will need a temporary and TARGET is known
9614 to have to do. This occurs in unchecked conversion in Ada. */
9615 orig_op0 = op0
9616 = expand_expr (tem,
9617 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9618 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9619 != INTEGER_CST)
9620 && modifier != EXPAND_STACK_PARM
9621 ? target : NULL_RTX),
9622 VOIDmode,
9623 (modifier == EXPAND_INITIALIZER
9624 || modifier == EXPAND_CONST_ADDRESS
9625 || modifier == EXPAND_STACK_PARM)
9626 ? modifier : EXPAND_NORMAL);
9627
9628
9629 /* If the bitfield is volatile, we want to access it in the
9630 field's mode, not the computed mode.
9631 If a MEM has VOIDmode (external with incomplete type),
9632 use BLKmode for it instead. */
9633 if (MEM_P (op0))
9634 {
9635 if (volatilep && flag_strict_volatile_bitfields > 0)
9636 op0 = adjust_address (op0, mode1, 0);
9637 else if (GET_MODE (op0) == VOIDmode)
9638 op0 = adjust_address (op0, BLKmode, 0);
9639 }
9640
9641 mode2
9642 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9643
9644 /* If we have either an offset, a BLKmode result, or a reference
9645 outside the underlying object, we must force it to memory.
9646 Such a case can occur in Ada if we have unchecked conversion
9647 of an expression from a scalar type to an aggregate type or
9648 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9649 passed a partially uninitialized object or a view-conversion
9650 to a larger size. */
9651 must_force_mem = (offset
9652 || mode1 == BLKmode
9653 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9654
9655 /* Handle CONCAT first. */
9656 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9657 {
9658 if (bitpos == 0
9659 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9660 return op0;
9661 if (bitpos == 0
9662 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9663 && bitsize)
9664 {
9665 op0 = XEXP (op0, 0);
9666 mode2 = GET_MODE (op0);
9667 }
9668 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9669 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9670 && bitpos
9671 && bitsize)
9672 {
9673 op0 = XEXP (op0, 1);
9674 bitpos = 0;
9675 mode2 = GET_MODE (op0);
9676 }
9677 else
9678 /* Otherwise force into memory. */
9679 must_force_mem = 1;
9680 }
9681
9682 /* If this is a constant, put it in a register if it is a legitimate
9683 constant and we don't need a memory reference. */
9684 if (CONSTANT_P (op0)
9685 && mode2 != BLKmode
9686 && targetm.legitimate_constant_p (mode2, op0)
9687 && !must_force_mem)
9688 op0 = force_reg (mode2, op0);
9689
9690 /* Otherwise, if this is a constant, try to force it to the constant
9691 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9692 is a legitimate constant. */
9693 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9694 op0 = validize_mem (memloc);
9695
9696 /* Otherwise, if this is a constant or the object is not in memory
9697 and need be, put it there. */
9698 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9699 {
9700 tree nt = build_qualified_type (TREE_TYPE (tem),
9701 (TYPE_QUALS (TREE_TYPE (tem))
9702 | TYPE_QUAL_CONST));
9703 memloc = assign_temp (nt, 1, 1, 1);
9704 emit_move_insn (memloc, op0);
9705 op0 = memloc;
9706 }
9707
9708 if (offset)
9709 {
9710 enum machine_mode address_mode;
9711 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9712 EXPAND_SUM);
9713
9714 gcc_assert (MEM_P (op0));
9715
9716 address_mode
9717 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9718 if (GET_MODE (offset_rtx) != address_mode)
9719 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9720
9721 if (GET_MODE (op0) == BLKmode
9722 /* A constant address in OP0 can have VOIDmode, we must
9723 not try to call force_reg in that case. */
9724 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9725 && bitsize != 0
9726 && (bitpos % bitsize) == 0
9727 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9728 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9729 {
9730 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9731 bitpos = 0;
9732 }
9733
9734 op0 = offset_address (op0, offset_rtx,
9735 highest_pow2_factor (offset));
9736 }
9737
9738 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9739 record its alignment as BIGGEST_ALIGNMENT. */
9740 if (MEM_P (op0) && bitpos == 0 && offset != 0
9741 && is_aligning_offset (offset, tem))
9742 set_mem_align (op0, BIGGEST_ALIGNMENT);
9743
9744 /* Don't forget about volatility even if this is a bitfield. */
9745 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9746 {
9747 if (op0 == orig_op0)
9748 op0 = copy_rtx (op0);
9749
9750 MEM_VOLATILE_P (op0) = 1;
9751 }
9752
9753 /* In cases where an aligned union has an unaligned object
9754 as a field, we might be extracting a BLKmode value from
9755 an integer-mode (e.g., SImode) object. Handle this case
9756 by doing the extract into an object as wide as the field
9757 (which we know to be the width of a basic mode), then
9758 storing into memory, and changing the mode to BLKmode. */
9759 if (mode1 == VOIDmode
9760 || REG_P (op0) || GET_CODE (op0) == SUBREG
9761 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9762 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9763 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9764 && modifier != EXPAND_CONST_ADDRESS
9765 && modifier != EXPAND_INITIALIZER)
9766 /* If the field is volatile, we always want an aligned
9767 access. Do this in following two situations:
9768 1. the access is not already naturally
9769 aligned, otherwise "normal" (non-bitfield) volatile fields
9770 become non-addressable.
9771 2. the bitsize is narrower than the access size. Need
9772 to extract bitfields from the access. */
9773 || (volatilep && flag_strict_volatile_bitfields > 0
9774 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0
9775 || (mode1 != BLKmode
9776 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)))
9777 /* If the field isn't aligned enough to fetch as a memref,
9778 fetch it as a bit field. */
9779 || (mode1 != BLKmode
9780 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9781 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9782 || (MEM_P (op0)
9783 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9784 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9785 && ((modifier == EXPAND_CONST_ADDRESS
9786 || modifier == EXPAND_INITIALIZER)
9787 ? STRICT_ALIGNMENT
9788 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9789 || (bitpos % BITS_PER_UNIT != 0)))
9790 /* If the type and the field are a constant size and the
9791 size of the type isn't the same size as the bitfield,
9792 we must use bitfield operations. */
9793 || (bitsize >= 0
9794 && TYPE_SIZE (TREE_TYPE (exp))
9795 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9796 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9797 bitsize)))
9798 {
9799 enum machine_mode ext_mode = mode;
9800
9801 if (ext_mode == BLKmode
9802 && ! (target != 0 && MEM_P (op0)
9803 && MEM_P (target)
9804 && bitpos % BITS_PER_UNIT == 0))
9805 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9806
9807 if (ext_mode == BLKmode)
9808 {
9809 if (target == 0)
9810 target = assign_temp (type, 0, 1, 1);
9811
9812 if (bitsize == 0)
9813 return target;
9814
9815 /* In this case, BITPOS must start at a byte boundary and
9816 TARGET, if specified, must be a MEM. */
9817 gcc_assert (MEM_P (op0)
9818 && (!target || MEM_P (target))
9819 && !(bitpos % BITS_PER_UNIT));
9820
9821 emit_block_move (target,
9822 adjust_address (op0, VOIDmode,
9823 bitpos / BITS_PER_UNIT),
9824 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9825 / BITS_PER_UNIT),
9826 (modifier == EXPAND_STACK_PARM
9827 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9828
9829 return target;
9830 }
9831
9832 op0 = validize_mem (op0);
9833
9834 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9835 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9836
9837 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
9838 (modifier == EXPAND_STACK_PARM
9839 ? NULL_RTX : target),
9840 ext_mode, ext_mode);
9841
9842 /* If the result is a record type and BITSIZE is narrower than
9843 the mode of OP0, an integral mode, and this is a big endian
9844 machine, we must put the field into the high-order bits. */
9845 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
9846 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
9847 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
9848 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
9849 GET_MODE_BITSIZE (GET_MODE (op0))
9850 - bitsize, op0, 1);
9851
9852 /* If the result type is BLKmode, store the data into a temporary
9853 of the appropriate type, but with the mode corresponding to the
9854 mode for the data we have (op0's mode). It's tempting to make
9855 this a constant type, since we know it's only being stored once,
9856 but that can cause problems if we are taking the address of this
9857 COMPONENT_REF because the MEM of any reference via that address
9858 will have flags corresponding to the type, which will not
9859 necessarily be constant. */
9860 if (mode == BLKmode)
9861 {
9862 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
9863 rtx new_rtx;
9864
9865 /* If the reference doesn't use the alias set of its type,
9866 we cannot create the temporary using that type. */
9867 if (component_uses_parent_alias_set (exp))
9868 {
9869 new_rtx = assign_stack_local (ext_mode, size, 0);
9870 set_mem_alias_set (new_rtx, get_alias_set (exp));
9871 }
9872 else
9873 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
9874
9875 emit_move_insn (new_rtx, op0);
9876 op0 = copy_rtx (new_rtx);
9877 PUT_MODE (op0, BLKmode);
9878 set_mem_attributes (op0, exp, 1);
9879 }
9880
9881 return op0;
9882 }
9883
9884 /* If the result is BLKmode, use that to access the object
9885 now as well. */
9886 if (mode == BLKmode)
9887 mode1 = BLKmode;
9888
9889 /* Get a reference to just this component. */
9890 if (modifier == EXPAND_CONST_ADDRESS
9891 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
9892 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
9893 else
9894 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9895
9896 if (op0 == orig_op0)
9897 op0 = copy_rtx (op0);
9898
9899 set_mem_attributes (op0, exp, 0);
9900 if (REG_P (XEXP (op0, 0)))
9901 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9902
9903 MEM_VOLATILE_P (op0) |= volatilep;
9904 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
9905 || modifier == EXPAND_CONST_ADDRESS
9906 || modifier == EXPAND_INITIALIZER)
9907 return op0;
9908 else if (target == 0)
9909 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9910
9911 convert_move (target, op0, unsignedp);
9912 return target;
9913 }
9914
9915 case OBJ_TYPE_REF:
9916 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
9917
9918 case CALL_EXPR:
9919 /* All valid uses of __builtin_va_arg_pack () are removed during
9920 inlining. */
9921 if (CALL_EXPR_VA_ARG_PACK (exp))
9922 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
9923 {
9924 tree fndecl = get_callee_fndecl (exp), attr;
9925
9926 if (fndecl
9927 && (attr = lookup_attribute ("error",
9928 DECL_ATTRIBUTES (fndecl))) != NULL)
9929 error ("%Kcall to %qs declared with attribute error: %s",
9930 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9931 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9932 if (fndecl
9933 && (attr = lookup_attribute ("warning",
9934 DECL_ATTRIBUTES (fndecl))) != NULL)
9935 warning_at (tree_nonartificial_location (exp),
9936 0, "%Kcall to %qs declared with attribute warning: %s",
9937 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9938 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9939
9940 /* Check for a built-in function. */
9941 if (fndecl && DECL_BUILT_IN (fndecl))
9942 {
9943 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
9944 return expand_builtin (exp, target, subtarget, tmode, ignore);
9945 }
9946 }
9947 return expand_call (exp, target, ignore);
9948
9949 case VIEW_CONVERT_EXPR:
9950 op0 = NULL_RTX;
9951
9952 /* If we are converting to BLKmode, try to avoid an intermediate
9953 temporary by fetching an inner memory reference. */
9954 if (mode == BLKmode
9955 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9956 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
9957 && handled_component_p (treeop0))
9958 {
9959 enum machine_mode mode1;
9960 HOST_WIDE_INT bitsize, bitpos;
9961 tree offset;
9962 int unsignedp;
9963 int volatilep = 0;
9964 tree tem
9965 = get_inner_reference (treeop0, &bitsize, &bitpos,
9966 &offset, &mode1, &unsignedp, &volatilep,
9967 true);
9968 rtx orig_op0;
9969
9970 /* ??? We should work harder and deal with non-zero offsets. */
9971 if (!offset
9972 && (bitpos % BITS_PER_UNIT) == 0
9973 && bitsize >= 0
9974 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
9975 {
9976 /* See the normal_inner_ref case for the rationale. */
9977 orig_op0
9978 = expand_expr (tem,
9979 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9980 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9981 != INTEGER_CST)
9982 && modifier != EXPAND_STACK_PARM
9983 ? target : NULL_RTX),
9984 VOIDmode,
9985 (modifier == EXPAND_INITIALIZER
9986 || modifier == EXPAND_CONST_ADDRESS
9987 || modifier == EXPAND_STACK_PARM)
9988 ? modifier : EXPAND_NORMAL);
9989
9990 if (MEM_P (orig_op0))
9991 {
9992 op0 = orig_op0;
9993
9994 /* Get a reference to just this component. */
9995 if (modifier == EXPAND_CONST_ADDRESS
9996 || modifier == EXPAND_SUM
9997 || modifier == EXPAND_INITIALIZER)
9998 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
9999 else
10000 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10001
10002 if (op0 == orig_op0)
10003 op0 = copy_rtx (op0);
10004
10005 set_mem_attributes (op0, treeop0, 0);
10006 if (REG_P (XEXP (op0, 0)))
10007 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10008
10009 MEM_VOLATILE_P (op0) |= volatilep;
10010 }
10011 }
10012 }
10013
10014 if (!op0)
10015 op0 = expand_expr (treeop0,
10016 NULL_RTX, VOIDmode, modifier);
10017
10018 /* If the input and output modes are both the same, we are done. */
10019 if (mode == GET_MODE (op0))
10020 ;
10021 /* If neither mode is BLKmode, and both modes are the same size
10022 then we can use gen_lowpart. */
10023 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10024 && (GET_MODE_PRECISION (mode)
10025 == GET_MODE_PRECISION (GET_MODE (op0)))
10026 && !COMPLEX_MODE_P (GET_MODE (op0)))
10027 {
10028 if (GET_CODE (op0) == SUBREG)
10029 op0 = force_reg (GET_MODE (op0), op0);
10030 temp = gen_lowpart_common (mode, op0);
10031 if (temp)
10032 op0 = temp;
10033 else
10034 {
10035 if (!REG_P (op0) && !MEM_P (op0))
10036 op0 = force_reg (GET_MODE (op0), op0);
10037 op0 = gen_lowpart (mode, op0);
10038 }
10039 }
10040 /* If both types are integral, convert from one mode to the other. */
10041 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10042 op0 = convert_modes (mode, GET_MODE (op0), op0,
10043 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10044 /* As a last resort, spill op0 to memory, and reload it in a
10045 different mode. */
10046 else if (!MEM_P (op0))
10047 {
10048 /* If the operand is not a MEM, force it into memory. Since we
10049 are going to be changing the mode of the MEM, don't call
10050 force_const_mem for constants because we don't allow pool
10051 constants to change mode. */
10052 tree inner_type = TREE_TYPE (treeop0);
10053
10054 gcc_assert (!TREE_ADDRESSABLE (exp));
10055
10056 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10057 target
10058 = assign_stack_temp_for_type
10059 (TYPE_MODE (inner_type),
10060 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
10061
10062 emit_move_insn (target, op0);
10063 op0 = target;
10064 }
10065
10066 /* At this point, OP0 is in the correct mode. If the output type is
10067 such that the operand is known to be aligned, indicate that it is.
10068 Otherwise, we need only be concerned about alignment for non-BLKmode
10069 results. */
10070 if (MEM_P (op0))
10071 {
10072 enum insn_code icode;
10073
10074 op0 = copy_rtx (op0);
10075
10076 if (TYPE_ALIGN_OK (type))
10077 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10078 else if (mode != BLKmode
10079 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)
10080 /* If the target does have special handling for unaligned
10081 loads of mode then use them. */
10082 && ((icode = optab_handler (movmisalign_optab, mode))
10083 != CODE_FOR_nothing))
10084 {
10085 rtx reg, insn;
10086
10087 op0 = adjust_address (op0, mode, 0);
10088 /* We've already validated the memory, and we're creating a
10089 new pseudo destination. The predicates really can't
10090 fail. */
10091 reg = gen_reg_rtx (mode);
10092
10093 /* Nor can the insn generator. */
10094 insn = GEN_FCN (icode) (reg, op0);
10095 emit_insn (insn);
10096 return reg;
10097 }
10098 else if (STRICT_ALIGNMENT
10099 && mode != BLKmode
10100 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10101 {
10102 tree inner_type = TREE_TYPE (treeop0);
10103 HOST_WIDE_INT temp_size
10104 = MAX (int_size_in_bytes (inner_type),
10105 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10106 rtx new_rtx
10107 = assign_stack_temp_for_type (mode, temp_size, 0, type);
10108 rtx new_with_op0_mode
10109 = adjust_address (new_rtx, GET_MODE (op0), 0);
10110
10111 gcc_assert (!TREE_ADDRESSABLE (exp));
10112
10113 if (GET_MODE (op0) == BLKmode)
10114 emit_block_move (new_with_op0_mode, op0,
10115 GEN_INT (GET_MODE_SIZE (mode)),
10116 (modifier == EXPAND_STACK_PARM
10117 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10118 else
10119 emit_move_insn (new_with_op0_mode, op0);
10120
10121 op0 = new_rtx;
10122 }
10123
10124 op0 = adjust_address (op0, mode, 0);
10125 }
10126
10127 return op0;
10128
10129 case MODIFY_EXPR:
10130 {
10131 tree lhs = treeop0;
10132 tree rhs = treeop1;
10133 gcc_assert (ignore);
10134
10135 /* Check for |= or &= of a bitfield of size one into another bitfield
10136 of size 1. In this case, (unless we need the result of the
10137 assignment) we can do this more efficiently with a
10138 test followed by an assignment, if necessary.
10139
10140 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10141 things change so we do, this code should be enhanced to
10142 support it. */
10143 if (TREE_CODE (lhs) == COMPONENT_REF
10144 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10145 || TREE_CODE (rhs) == BIT_AND_EXPR)
10146 && TREE_OPERAND (rhs, 0) == lhs
10147 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10148 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10149 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10150 {
10151 rtx label = gen_label_rtx ();
10152 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10153 do_jump (TREE_OPERAND (rhs, 1),
10154 value ? label : 0,
10155 value ? 0 : label, -1);
10156 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10157 MOVE_NONTEMPORAL (exp));
10158 do_pending_stack_adjust ();
10159 emit_label (label);
10160 return const0_rtx;
10161 }
10162
10163 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
10164 return const0_rtx;
10165 }
10166
10167 case ADDR_EXPR:
10168 return expand_expr_addr_expr (exp, target, tmode, modifier);
10169
10170 case REALPART_EXPR:
10171 op0 = expand_normal (treeop0);
10172 return read_complex_part (op0, false);
10173
10174 case IMAGPART_EXPR:
10175 op0 = expand_normal (treeop0);
10176 return read_complex_part (op0, true);
10177
10178 case RETURN_EXPR:
10179 case LABEL_EXPR:
10180 case GOTO_EXPR:
10181 case SWITCH_EXPR:
10182 case ASM_EXPR:
10183 /* Expanded in cfgexpand.c. */
10184 gcc_unreachable ();
10185
10186 case TRY_CATCH_EXPR:
10187 case CATCH_EXPR:
10188 case EH_FILTER_EXPR:
10189 case TRY_FINALLY_EXPR:
10190 /* Lowered by tree-eh.c. */
10191 gcc_unreachable ();
10192
10193 case WITH_CLEANUP_EXPR:
10194 case CLEANUP_POINT_EXPR:
10195 case TARGET_EXPR:
10196 case CASE_LABEL_EXPR:
10197 case VA_ARG_EXPR:
10198 case BIND_EXPR:
10199 case INIT_EXPR:
10200 case CONJ_EXPR:
10201 case COMPOUND_EXPR:
10202 case PREINCREMENT_EXPR:
10203 case PREDECREMENT_EXPR:
10204 case POSTINCREMENT_EXPR:
10205 case POSTDECREMENT_EXPR:
10206 case LOOP_EXPR:
10207 case EXIT_EXPR:
10208 /* Lowered by gimplify.c. */
10209 gcc_unreachable ();
10210
10211 case FDESC_EXPR:
10212 /* Function descriptors are not valid except for as
10213 initialization constants, and should not be expanded. */
10214 gcc_unreachable ();
10215
10216 case WITH_SIZE_EXPR:
10217 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10218 have pulled out the size to use in whatever context it needed. */
10219 return expand_expr_real (treeop0, original_target, tmode,
10220 modifier, alt_rtl);
10221
10222 case COMPOUND_LITERAL_EXPR:
10223 {
10224 /* Initialize the anonymous variable declared in the compound
10225 literal, then return the variable. */
10226 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
10227
10228 /* Create RTL for this variable. */
10229 if (!DECL_RTL_SET_P (decl))
10230 {
10231 if (DECL_HARD_REGISTER (decl))
10232 /* The user specified an assembler name for this variable.
10233 Set that up now. */
10234 rest_of_decl_compilation (decl, 0, 0);
10235 else
10236 expand_decl (decl);
10237 }
10238
10239 return expand_expr_real (decl, original_target, tmode,
10240 modifier, alt_rtl);
10241 }
10242
10243 default:
10244 return expand_expr_real_2 (&ops, target, tmode, modifier);
10245 }
10246 }
10247 \f
10248 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10249 signedness of TYPE), possibly returning the result in TARGET. */
10250 static rtx
10251 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10252 {
10253 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10254 if (target && GET_MODE (target) != GET_MODE (exp))
10255 target = 0;
10256 /* For constant values, reduce using build_int_cst_type. */
10257 if (CONST_INT_P (exp))
10258 {
10259 HOST_WIDE_INT value = INTVAL (exp);
10260 tree t = build_int_cst_type (type, value);
10261 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10262 }
10263 else if (TYPE_UNSIGNED (type))
10264 {
10265 rtx mask = immed_double_int_const (double_int_mask (prec),
10266 GET_MODE (exp));
10267 return expand_and (GET_MODE (exp), exp, mask, target);
10268 }
10269 else
10270 {
10271 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10272 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10273 exp, count, target, 0);
10274 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10275 exp, count, target, 0);
10276 }
10277 }
10278 \f
10279 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10280 when applied to the address of EXP produces an address known to be
10281 aligned more than BIGGEST_ALIGNMENT. */
10282
10283 static int
10284 is_aligning_offset (const_tree offset, const_tree exp)
10285 {
10286 /* Strip off any conversions. */
10287 while (CONVERT_EXPR_P (offset))
10288 offset = TREE_OPERAND (offset, 0);
10289
10290 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10291 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10292 if (TREE_CODE (offset) != BIT_AND_EXPR
10293 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10294 || compare_tree_int (TREE_OPERAND (offset, 1),
10295 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10296 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10297 return 0;
10298
10299 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10300 It must be NEGATE_EXPR. Then strip any more conversions. */
10301 offset = TREE_OPERAND (offset, 0);
10302 while (CONVERT_EXPR_P (offset))
10303 offset = TREE_OPERAND (offset, 0);
10304
10305 if (TREE_CODE (offset) != NEGATE_EXPR)
10306 return 0;
10307
10308 offset = TREE_OPERAND (offset, 0);
10309 while (CONVERT_EXPR_P (offset))
10310 offset = TREE_OPERAND (offset, 0);
10311
10312 /* This must now be the address of EXP. */
10313 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10314 }
10315 \f
10316 /* Return the tree node if an ARG corresponds to a string constant or zero
10317 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10318 in bytes within the string that ARG is accessing. The type of the
10319 offset will be `sizetype'. */
10320
10321 tree
10322 string_constant (tree arg, tree *ptr_offset)
10323 {
10324 tree array, offset, lower_bound;
10325 STRIP_NOPS (arg);
10326
10327 if (TREE_CODE (arg) == ADDR_EXPR)
10328 {
10329 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10330 {
10331 *ptr_offset = size_zero_node;
10332 return TREE_OPERAND (arg, 0);
10333 }
10334 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10335 {
10336 array = TREE_OPERAND (arg, 0);
10337 offset = size_zero_node;
10338 }
10339 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10340 {
10341 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10342 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10343 if (TREE_CODE (array) != STRING_CST
10344 && TREE_CODE (array) != VAR_DECL)
10345 return 0;
10346
10347 /* Check if the array has a nonzero lower bound. */
10348 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10349 if (!integer_zerop (lower_bound))
10350 {
10351 /* If the offset and base aren't both constants, return 0. */
10352 if (TREE_CODE (lower_bound) != INTEGER_CST)
10353 return 0;
10354 if (TREE_CODE (offset) != INTEGER_CST)
10355 return 0;
10356 /* Adjust offset by the lower bound. */
10357 offset = size_diffop (fold_convert (sizetype, offset),
10358 fold_convert (sizetype, lower_bound));
10359 }
10360 }
10361 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10362 {
10363 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10364 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10365 if (TREE_CODE (array) != ADDR_EXPR)
10366 return 0;
10367 array = TREE_OPERAND (array, 0);
10368 if (TREE_CODE (array) != STRING_CST
10369 && TREE_CODE (array) != VAR_DECL)
10370 return 0;
10371 }
10372 else
10373 return 0;
10374 }
10375 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10376 {
10377 tree arg0 = TREE_OPERAND (arg, 0);
10378 tree arg1 = TREE_OPERAND (arg, 1);
10379
10380 STRIP_NOPS (arg0);
10381 STRIP_NOPS (arg1);
10382
10383 if (TREE_CODE (arg0) == ADDR_EXPR
10384 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10385 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10386 {
10387 array = TREE_OPERAND (arg0, 0);
10388 offset = arg1;
10389 }
10390 else if (TREE_CODE (arg1) == ADDR_EXPR
10391 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10392 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10393 {
10394 array = TREE_OPERAND (arg1, 0);
10395 offset = arg0;
10396 }
10397 else
10398 return 0;
10399 }
10400 else
10401 return 0;
10402
10403 if (TREE_CODE (array) == STRING_CST)
10404 {
10405 *ptr_offset = fold_convert (sizetype, offset);
10406 return array;
10407 }
10408 else if (TREE_CODE (array) == VAR_DECL
10409 || TREE_CODE (array) == CONST_DECL)
10410 {
10411 int length;
10412
10413 /* Variables initialized to string literals can be handled too. */
10414 if (!const_value_known_p (array)
10415 || !DECL_INITIAL (array)
10416 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10417 return 0;
10418
10419 /* Avoid const char foo[4] = "abcde"; */
10420 if (DECL_SIZE_UNIT (array) == NULL_TREE
10421 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10422 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10423 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10424 return 0;
10425
10426 /* If variable is bigger than the string literal, OFFSET must be constant
10427 and inside of the bounds of the string literal. */
10428 offset = fold_convert (sizetype, offset);
10429 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10430 && (! host_integerp (offset, 1)
10431 || compare_tree_int (offset, length) >= 0))
10432 return 0;
10433
10434 *ptr_offset = offset;
10435 return DECL_INITIAL (array);
10436 }
10437
10438 return 0;
10439 }
10440 \f
10441 /* Generate code to calculate OPS, and exploded expression
10442 using a store-flag instruction and return an rtx for the result.
10443 OPS reflects a comparison.
10444
10445 If TARGET is nonzero, store the result there if convenient.
10446
10447 Return zero if there is no suitable set-flag instruction
10448 available on this machine.
10449
10450 Once expand_expr has been called on the arguments of the comparison,
10451 we are committed to doing the store flag, since it is not safe to
10452 re-evaluate the expression. We emit the store-flag insn by calling
10453 emit_store_flag, but only expand the arguments if we have a reason
10454 to believe that emit_store_flag will be successful. If we think that
10455 it will, but it isn't, we have to simulate the store-flag with a
10456 set/jump/set sequence. */
10457
10458 static rtx
10459 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10460 {
10461 enum rtx_code code;
10462 tree arg0, arg1, type;
10463 tree tem;
10464 enum machine_mode operand_mode;
10465 int unsignedp;
10466 rtx op0, op1;
10467 rtx subtarget = target;
10468 location_t loc = ops->location;
10469
10470 arg0 = ops->op0;
10471 arg1 = ops->op1;
10472
10473 /* Don't crash if the comparison was erroneous. */
10474 if (arg0 == error_mark_node || arg1 == error_mark_node)
10475 return const0_rtx;
10476
10477 type = TREE_TYPE (arg0);
10478 operand_mode = TYPE_MODE (type);
10479 unsignedp = TYPE_UNSIGNED (type);
10480
10481 /* We won't bother with BLKmode store-flag operations because it would mean
10482 passing a lot of information to emit_store_flag. */
10483 if (operand_mode == BLKmode)
10484 return 0;
10485
10486 /* We won't bother with store-flag operations involving function pointers
10487 when function pointers must be canonicalized before comparisons. */
10488 #ifdef HAVE_canonicalize_funcptr_for_compare
10489 if (HAVE_canonicalize_funcptr_for_compare
10490 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10491 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10492 == FUNCTION_TYPE))
10493 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10494 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10495 == FUNCTION_TYPE))))
10496 return 0;
10497 #endif
10498
10499 STRIP_NOPS (arg0);
10500 STRIP_NOPS (arg1);
10501
10502 /* For vector typed comparisons emit code to generate the desired
10503 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10504 expander for this. */
10505 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10506 {
10507 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10508 tree if_true = constant_boolean_node (true, ops->type);
10509 tree if_false = constant_boolean_node (false, ops->type);
10510 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10511 }
10512
10513 /* For vector typed comparisons emit code to generate the desired
10514 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10515 expander for this. */
10516 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10517 {
10518 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10519 tree if_true = constant_boolean_node (true, ops->type);
10520 tree if_false = constant_boolean_node (false, ops->type);
10521 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10522 }
10523
10524 /* Get the rtx comparison code to use. We know that EXP is a comparison
10525 operation of some type. Some comparisons against 1 and -1 can be
10526 converted to comparisons with zero. Do so here so that the tests
10527 below will be aware that we have a comparison with zero. These
10528 tests will not catch constants in the first operand, but constants
10529 are rarely passed as the first operand. */
10530
10531 switch (ops->code)
10532 {
10533 case EQ_EXPR:
10534 code = EQ;
10535 break;
10536 case NE_EXPR:
10537 code = NE;
10538 break;
10539 case LT_EXPR:
10540 if (integer_onep (arg1))
10541 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10542 else
10543 code = unsignedp ? LTU : LT;
10544 break;
10545 case LE_EXPR:
10546 if (! unsignedp && integer_all_onesp (arg1))
10547 arg1 = integer_zero_node, code = LT;
10548 else
10549 code = unsignedp ? LEU : LE;
10550 break;
10551 case GT_EXPR:
10552 if (! unsignedp && integer_all_onesp (arg1))
10553 arg1 = integer_zero_node, code = GE;
10554 else
10555 code = unsignedp ? GTU : GT;
10556 break;
10557 case GE_EXPR:
10558 if (integer_onep (arg1))
10559 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10560 else
10561 code = unsignedp ? GEU : GE;
10562 break;
10563
10564 case UNORDERED_EXPR:
10565 code = UNORDERED;
10566 break;
10567 case ORDERED_EXPR:
10568 code = ORDERED;
10569 break;
10570 case UNLT_EXPR:
10571 code = UNLT;
10572 break;
10573 case UNLE_EXPR:
10574 code = UNLE;
10575 break;
10576 case UNGT_EXPR:
10577 code = UNGT;
10578 break;
10579 case UNGE_EXPR:
10580 code = UNGE;
10581 break;
10582 case UNEQ_EXPR:
10583 code = UNEQ;
10584 break;
10585 case LTGT_EXPR:
10586 code = LTGT;
10587 break;
10588
10589 default:
10590 gcc_unreachable ();
10591 }
10592
10593 /* Put a constant second. */
10594 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10595 || TREE_CODE (arg0) == FIXED_CST)
10596 {
10597 tem = arg0; arg0 = arg1; arg1 = tem;
10598 code = swap_condition (code);
10599 }
10600
10601 /* If this is an equality or inequality test of a single bit, we can
10602 do this by shifting the bit being tested to the low-order bit and
10603 masking the result with the constant 1. If the condition was EQ,
10604 we xor it with 1. This does not require an scc insn and is faster
10605 than an scc insn even if we have it.
10606
10607 The code to make this transformation was moved into fold_single_bit_test,
10608 so we just call into the folder and expand its result. */
10609
10610 if ((code == NE || code == EQ)
10611 && integer_zerop (arg1)
10612 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10613 {
10614 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
10615 if (srcstmt
10616 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
10617 {
10618 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
10619 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10620 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
10621 gimple_assign_rhs1 (srcstmt),
10622 gimple_assign_rhs2 (srcstmt));
10623 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
10624 if (temp)
10625 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
10626 }
10627 }
10628
10629 if (! get_subtarget (target)
10630 || GET_MODE (subtarget) != operand_mode)
10631 subtarget = 0;
10632
10633 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10634
10635 if (target == 0)
10636 target = gen_reg_rtx (mode);
10637
10638 /* Try a cstore if possible. */
10639 return emit_store_flag_force (target, code, op0, op1,
10640 operand_mode, unsignedp,
10641 (TYPE_PRECISION (ops->type) == 1
10642 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10643 }
10644 \f
10645
10646 /* Stubs in case we haven't got a casesi insn. */
10647 #ifndef HAVE_casesi
10648 # define HAVE_casesi 0
10649 # define gen_casesi(a, b, c, d, e) (0)
10650 # define CODE_FOR_casesi CODE_FOR_nothing
10651 #endif
10652
10653 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10654 0 otherwise (i.e. if there is no casesi instruction). */
10655 int
10656 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10657 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10658 rtx fallback_label ATTRIBUTE_UNUSED)
10659 {
10660 struct expand_operand ops[5];
10661 enum machine_mode index_mode = SImode;
10662 rtx op1, op2, index;
10663
10664 if (! HAVE_casesi)
10665 return 0;
10666
10667 /* Convert the index to SImode. */
10668 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10669 {
10670 enum machine_mode omode = TYPE_MODE (index_type);
10671 rtx rangertx = expand_normal (range);
10672
10673 /* We must handle the endpoints in the original mode. */
10674 index_expr = build2 (MINUS_EXPR, index_type,
10675 index_expr, minval);
10676 minval = integer_zero_node;
10677 index = expand_normal (index_expr);
10678 if (default_label)
10679 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10680 omode, 1, default_label);
10681 /* Now we can safely truncate. */
10682 index = convert_to_mode (index_mode, index, 0);
10683 }
10684 else
10685 {
10686 if (TYPE_MODE (index_type) != index_mode)
10687 {
10688 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
10689 index_expr = fold_convert (index_type, index_expr);
10690 }
10691
10692 index = expand_normal (index_expr);
10693 }
10694
10695 do_pending_stack_adjust ();
10696
10697 op1 = expand_normal (minval);
10698 op2 = expand_normal (range);
10699
10700 create_input_operand (&ops[0], index, index_mode);
10701 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10702 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10703 create_fixed_operand (&ops[3], table_label);
10704 create_fixed_operand (&ops[4], (default_label
10705 ? default_label
10706 : fallback_label));
10707 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10708 return 1;
10709 }
10710
10711 /* Attempt to generate a tablejump instruction; same concept. */
10712 #ifndef HAVE_tablejump
10713 #define HAVE_tablejump 0
10714 #define gen_tablejump(x, y) (0)
10715 #endif
10716
10717 /* Subroutine of the next function.
10718
10719 INDEX is the value being switched on, with the lowest value
10720 in the table already subtracted.
10721 MODE is its expected mode (needed if INDEX is constant).
10722 RANGE is the length of the jump table.
10723 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10724
10725 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10726 index value is out of range. */
10727
10728 static void
10729 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10730 rtx default_label)
10731 {
10732 rtx temp, vector;
10733
10734 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10735 cfun->cfg->max_jumptable_ents = INTVAL (range);
10736
10737 /* Do an unsigned comparison (in the proper mode) between the index
10738 expression and the value which represents the length of the range.
10739 Since we just finished subtracting the lower bound of the range
10740 from the index expression, this comparison allows us to simultaneously
10741 check that the original index expression value is both greater than
10742 or equal to the minimum value of the range and less than or equal to
10743 the maximum value of the range. */
10744
10745 if (default_label)
10746 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10747 default_label);
10748
10749 /* If index is in range, it must fit in Pmode.
10750 Convert to Pmode so we can index with it. */
10751 if (mode != Pmode)
10752 index = convert_to_mode (Pmode, index, 1);
10753
10754 /* Don't let a MEM slip through, because then INDEX that comes
10755 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10756 and break_out_memory_refs will go to work on it and mess it up. */
10757 #ifdef PIC_CASE_VECTOR_ADDRESS
10758 if (flag_pic && !REG_P (index))
10759 index = copy_to_mode_reg (Pmode, index);
10760 #endif
10761
10762 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10763 GET_MODE_SIZE, because this indicates how large insns are. The other
10764 uses should all be Pmode, because they are addresses. This code
10765 could fail if addresses and insns are not the same size. */
10766 index = gen_rtx_PLUS (Pmode,
10767 gen_rtx_MULT (Pmode, index,
10768 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10769 gen_rtx_LABEL_REF (Pmode, table_label));
10770 #ifdef PIC_CASE_VECTOR_ADDRESS
10771 if (flag_pic)
10772 index = PIC_CASE_VECTOR_ADDRESS (index);
10773 else
10774 #endif
10775 index = memory_address (CASE_VECTOR_MODE, index);
10776 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10777 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10778 convert_move (temp, vector, 0);
10779
10780 emit_jump_insn (gen_tablejump (temp, table_label));
10781
10782 /* If we are generating PIC code or if the table is PC-relative, the
10783 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10784 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10785 emit_barrier ();
10786 }
10787
10788 int
10789 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10790 rtx table_label, rtx default_label)
10791 {
10792 rtx index;
10793
10794 if (! HAVE_tablejump)
10795 return 0;
10796
10797 index_expr = fold_build2 (MINUS_EXPR, index_type,
10798 fold_convert (index_type, index_expr),
10799 fold_convert (index_type, minval));
10800 index = expand_normal (index_expr);
10801 do_pending_stack_adjust ();
10802
10803 do_tablejump (index, TYPE_MODE (index_type),
10804 convert_modes (TYPE_MODE (index_type),
10805 TYPE_MODE (TREE_TYPE (range)),
10806 expand_normal (range),
10807 TYPE_UNSIGNED (TREE_TYPE (range))),
10808 table_label, default_label);
10809 return 1;
10810 }
10811
10812 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10813 static rtx
10814 const_vector_from_tree (tree exp)
10815 {
10816 rtvec v;
10817 unsigned i;
10818 int units;
10819 tree elt;
10820 enum machine_mode inner, mode;
10821
10822 mode = TYPE_MODE (TREE_TYPE (exp));
10823
10824 if (initializer_zerop (exp))
10825 return CONST0_RTX (mode);
10826
10827 units = GET_MODE_NUNITS (mode);
10828 inner = GET_MODE_INNER (mode);
10829
10830 v = rtvec_alloc (units);
10831
10832 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
10833 {
10834 elt = VECTOR_CST_ELT (exp, i);
10835
10836 if (TREE_CODE (elt) == REAL_CST)
10837 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10838 inner);
10839 else if (TREE_CODE (elt) == FIXED_CST)
10840 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10841 inner);
10842 else
10843 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10844 inner);
10845 }
10846
10847 return gen_rtx_CONST_VECTOR (mode, v);
10848 }
10849
10850 /* Build a decl for a personality function given a language prefix. */
10851
10852 tree
10853 build_personality_function (const char *lang)
10854 {
10855 const char *unwind_and_version;
10856 tree decl, type;
10857 char *name;
10858
10859 switch (targetm_common.except_unwind_info (&global_options))
10860 {
10861 case UI_NONE:
10862 return NULL;
10863 case UI_SJLJ:
10864 unwind_and_version = "_sj0";
10865 break;
10866 case UI_DWARF2:
10867 case UI_TARGET:
10868 unwind_and_version = "_v0";
10869 break;
10870 default:
10871 gcc_unreachable ();
10872 }
10873
10874 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
10875
10876 type = build_function_type_list (integer_type_node, integer_type_node,
10877 long_long_unsigned_type_node,
10878 ptr_type_node, ptr_type_node, NULL_TREE);
10879 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
10880 get_identifier (name), type);
10881 DECL_ARTIFICIAL (decl) = 1;
10882 DECL_EXTERNAL (decl) = 1;
10883 TREE_PUBLIC (decl) = 1;
10884
10885 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
10886 are the flags assigned by targetm.encode_section_info. */
10887 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
10888
10889 return decl;
10890 }
10891
10892 /* Extracts the personality function of DECL and returns the corresponding
10893 libfunc. */
10894
10895 rtx
10896 get_personality_function (tree decl)
10897 {
10898 tree personality = DECL_FUNCTION_PERSONALITY (decl);
10899 enum eh_personality_kind pk;
10900
10901 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
10902 if (pk == eh_personality_none)
10903 return NULL;
10904
10905 if (!personality
10906 && pk == eh_personality_any)
10907 personality = lang_hooks.eh_personality ();
10908
10909 if (pk == eh_personality_lang)
10910 gcc_assert (personality != NULL_TREE);
10911
10912 return XEXP (DECL_RTL (personality), 0);
10913 }
10914
10915 #include "gt-expr.h"