Add MULT_HIGHPART_EXPR
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
4 2012 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "typeclass.h"
43 #include "toplev.h"
44 #include "langhooks.h"
45 #include "intl.h"
46 #include "tm_p.h"
47 #include "tree-iterator.h"
48 #include "tree-pass.h"
49 #include "tree-flow.h"
50 #include "target.h"
51 #include "common/common-target.h"
52 #include "timevar.h"
53 #include "df.h"
54 #include "diagnostic.h"
55 #include "ssaexpand.h"
56 #include "target-globals.h"
57 #include "params.h"
58
59 /* Decide whether a function's arguments should be processed
60 from first to last or from last to first.
61
62 They should if the stack and args grow in opposite directions, but
63 only if we have push insns. */
64
65 #ifdef PUSH_ROUNDING
66
67 #ifndef PUSH_ARGS_REVERSED
68 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
69 #define PUSH_ARGS_REVERSED /* If it's last to first. */
70 #endif
71 #endif
72
73 #endif
74
75 #ifndef STACK_PUSH_CODE
76 #ifdef STACK_GROWS_DOWNWARD
77 #define STACK_PUSH_CODE PRE_DEC
78 #else
79 #define STACK_PUSH_CODE PRE_INC
80 #endif
81 #endif
82
83
84 /* If this is nonzero, we do not bother generating VOLATILE
85 around volatile memory references, and we are willing to
86 output indirect addresses. If cse is to follow, we reject
87 indirect addresses so a useful potential cse is generated;
88 if it is used only once, instruction combination will produce
89 the same indirect address eventually. */
90 int cse_not_expected;
91
92 /* This structure is used by move_by_pieces to describe the move to
93 be performed. */
94 struct move_by_pieces_d
95 {
96 rtx to;
97 rtx to_addr;
98 int autinc_to;
99 int explicit_inc_to;
100 rtx from;
101 rtx from_addr;
102 int autinc_from;
103 int explicit_inc_from;
104 unsigned HOST_WIDE_INT len;
105 HOST_WIDE_INT offset;
106 int reverse;
107 };
108
109 /* This structure is used by store_by_pieces to describe the clear to
110 be performed. */
111
112 struct store_by_pieces_d
113 {
114 rtx to;
115 rtx to_addr;
116 int autinc_to;
117 int explicit_inc_to;
118 unsigned HOST_WIDE_INT len;
119 HOST_WIDE_INT offset;
120 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
121 void *constfundata;
122 int reverse;
123 };
124
125 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
126 struct move_by_pieces_d *);
127 static bool block_move_libcall_safe_for_call_parm (void);
128 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
129 static tree emit_block_move_libcall_fn (int);
130 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
131 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
132 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
133 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
134 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
135 struct store_by_pieces_d *);
136 static tree clear_storage_libcall_fn (int);
137 static rtx compress_float_constant (rtx, rtx);
138 static rtx get_subtarget (rtx);
139 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
140 HOST_WIDE_INT, enum machine_mode,
141 tree, tree, int, alias_set_type);
142 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
143 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
144 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
145 enum machine_mode,
146 tree, tree, alias_set_type, bool);
147
148 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
149
150 static int is_aligning_offset (const_tree, const_tree);
151 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
152 enum expand_modifier);
153 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
154 static rtx do_store_flag (sepops, rtx, enum machine_mode);
155 #ifdef PUSH_ROUNDING
156 static void emit_single_push_insn (enum machine_mode, rtx, tree);
157 #endif
158 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
159 static rtx const_vector_from_tree (tree);
160 static void write_complex_part (rtx, rtx, bool);
161
162 /* This macro is used to determine whether move_by_pieces should be called
163 to perform a structure copy. */
164 #ifndef MOVE_BY_PIECES_P
165 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
166 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
167 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
168 #endif
169
170 /* This macro is used to determine whether clear_by_pieces should be
171 called to clear storage. */
172 #ifndef CLEAR_BY_PIECES_P
173 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
174 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
175 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
176 #endif
177
178 /* This macro is used to determine whether store_by_pieces should be
179 called to "memset" storage with byte values other than zero. */
180 #ifndef SET_BY_PIECES_P
181 #define SET_BY_PIECES_P(SIZE, ALIGN) \
182 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
183 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
184 #endif
185
186 /* This macro is used to determine whether store_by_pieces should be
187 called to "memcpy" storage when the source is a constant string. */
188 #ifndef STORE_BY_PIECES_P
189 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
190 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
191 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
192 #endif
193
194 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
195
196 #ifndef SLOW_UNALIGNED_ACCESS
197 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
198 #endif
199 \f
200 /* This is run to set up which modes can be used
201 directly in memory and to initialize the block move optab. It is run
202 at the beginning of compilation and when the target is reinitialized. */
203
204 void
205 init_expr_target (void)
206 {
207 rtx insn, pat;
208 enum machine_mode mode;
209 int num_clobbers;
210 rtx mem, mem1;
211 rtx reg;
212
213 /* Try indexing by frame ptr and try by stack ptr.
214 It is known that on the Convex the stack ptr isn't a valid index.
215 With luck, one or the other is valid on any machine. */
216 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
217 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
218
219 /* A scratch register we can modify in-place below to avoid
220 useless RTL allocations. */
221 reg = gen_rtx_REG (VOIDmode, -1);
222
223 insn = rtx_alloc (INSN);
224 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
225 PATTERN (insn) = pat;
226
227 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
228 mode = (enum machine_mode) ((int) mode + 1))
229 {
230 int regno;
231
232 direct_load[(int) mode] = direct_store[(int) mode] = 0;
233 PUT_MODE (mem, mode);
234 PUT_MODE (mem1, mode);
235 PUT_MODE (reg, mode);
236
237 /* See if there is some register that can be used in this mode and
238 directly loaded or stored from memory. */
239
240 if (mode != VOIDmode && mode != BLKmode)
241 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
242 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
243 regno++)
244 {
245 if (! HARD_REGNO_MODE_OK (regno, mode))
246 continue;
247
248 SET_REGNO (reg, regno);
249
250 SET_SRC (pat) = mem;
251 SET_DEST (pat) = reg;
252 if (recog (pat, insn, &num_clobbers) >= 0)
253 direct_load[(int) mode] = 1;
254
255 SET_SRC (pat) = mem1;
256 SET_DEST (pat) = reg;
257 if (recog (pat, insn, &num_clobbers) >= 0)
258 direct_load[(int) mode] = 1;
259
260 SET_SRC (pat) = reg;
261 SET_DEST (pat) = mem;
262 if (recog (pat, insn, &num_clobbers) >= 0)
263 direct_store[(int) mode] = 1;
264
265 SET_SRC (pat) = reg;
266 SET_DEST (pat) = mem1;
267 if (recog (pat, insn, &num_clobbers) >= 0)
268 direct_store[(int) mode] = 1;
269 }
270 }
271
272 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
273
274 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
275 mode = GET_MODE_WIDER_MODE (mode))
276 {
277 enum machine_mode srcmode;
278 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
279 srcmode = GET_MODE_WIDER_MODE (srcmode))
280 {
281 enum insn_code ic;
282
283 ic = can_extend_p (mode, srcmode, 0);
284 if (ic == CODE_FOR_nothing)
285 continue;
286
287 PUT_MODE (mem, srcmode);
288
289 if (insn_operand_matches (ic, 1, mem))
290 float_extend_from_mem[mode][srcmode] = true;
291 }
292 }
293 }
294
295 /* This is run at the start of compiling a function. */
296
297 void
298 init_expr (void)
299 {
300 memset (&crtl->expr, 0, sizeof (crtl->expr));
301 }
302 \f
303 /* Copy data from FROM to TO, where the machine modes are not the same.
304 Both modes may be integer, or both may be floating, or both may be
305 fixed-point.
306 UNSIGNEDP should be nonzero if FROM is an unsigned type.
307 This causes zero-extension instead of sign-extension. */
308
309 void
310 convert_move (rtx to, rtx from, int unsignedp)
311 {
312 enum machine_mode to_mode = GET_MODE (to);
313 enum machine_mode from_mode = GET_MODE (from);
314 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
315 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
316 enum insn_code code;
317 rtx libcall;
318
319 /* rtx code for making an equivalent value. */
320 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
321 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
322
323
324 gcc_assert (to_real == from_real);
325 gcc_assert (to_mode != BLKmode);
326 gcc_assert (from_mode != BLKmode);
327
328 /* If the source and destination are already the same, then there's
329 nothing to do. */
330 if (to == from)
331 return;
332
333 /* If FROM is a SUBREG that indicates that we have already done at least
334 the required extension, strip it. We don't handle such SUBREGs as
335 TO here. */
336
337 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
338 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
339 >= GET_MODE_PRECISION (to_mode))
340 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
341 from = gen_lowpart (to_mode, from), from_mode = to_mode;
342
343 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
344
345 if (to_mode == from_mode
346 || (from_mode == VOIDmode && CONSTANT_P (from)))
347 {
348 emit_move_insn (to, from);
349 return;
350 }
351
352 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
353 {
354 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
355
356 if (VECTOR_MODE_P (to_mode))
357 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
358 else
359 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
360
361 emit_move_insn (to, from);
362 return;
363 }
364
365 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
366 {
367 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
368 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
369 return;
370 }
371
372 if (to_real)
373 {
374 rtx value, insns;
375 convert_optab tab;
376
377 gcc_assert ((GET_MODE_PRECISION (from_mode)
378 != GET_MODE_PRECISION (to_mode))
379 || (DECIMAL_FLOAT_MODE_P (from_mode)
380 != DECIMAL_FLOAT_MODE_P (to_mode)));
381
382 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
383 /* Conversion between decimal float and binary float, same size. */
384 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
385 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
386 tab = sext_optab;
387 else
388 tab = trunc_optab;
389
390 /* Try converting directly if the insn is supported. */
391
392 code = convert_optab_handler (tab, to_mode, from_mode);
393 if (code != CODE_FOR_nothing)
394 {
395 emit_unop_insn (code, to, from,
396 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
397 return;
398 }
399
400 /* Otherwise use a libcall. */
401 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
402
403 /* Is this conversion implemented yet? */
404 gcc_assert (libcall);
405
406 start_sequence ();
407 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
408 1, from, from_mode);
409 insns = get_insns ();
410 end_sequence ();
411 emit_libcall_block (insns, to, value,
412 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
413 from)
414 : gen_rtx_FLOAT_EXTEND (to_mode, from));
415 return;
416 }
417
418 /* Handle pointer conversion. */ /* SPEE 900220. */
419 /* Targets are expected to provide conversion insns between PxImode and
420 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
421 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
422 {
423 enum machine_mode full_mode
424 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
425
426 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
427 != CODE_FOR_nothing);
428
429 if (full_mode != from_mode)
430 from = convert_to_mode (full_mode, from, unsignedp);
431 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
432 to, from, UNKNOWN);
433 return;
434 }
435 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
436 {
437 rtx new_from;
438 enum machine_mode full_mode
439 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
440 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
441 enum insn_code icode;
442
443 icode = convert_optab_handler (ctab, full_mode, from_mode);
444 gcc_assert (icode != CODE_FOR_nothing);
445
446 if (to_mode == full_mode)
447 {
448 emit_unop_insn (icode, to, from, UNKNOWN);
449 return;
450 }
451
452 new_from = gen_reg_rtx (full_mode);
453 emit_unop_insn (icode, new_from, from, UNKNOWN);
454
455 /* else proceed to integer conversions below. */
456 from_mode = full_mode;
457 from = new_from;
458 }
459
460 /* Make sure both are fixed-point modes or both are not. */
461 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
462 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
463 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
464 {
465 /* If we widen from_mode to to_mode and they are in the same class,
466 we won't saturate the result.
467 Otherwise, always saturate the result to play safe. */
468 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
469 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
470 expand_fixed_convert (to, from, 0, 0);
471 else
472 expand_fixed_convert (to, from, 0, 1);
473 return;
474 }
475
476 /* Now both modes are integers. */
477
478 /* Handle expanding beyond a word. */
479 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
480 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
481 {
482 rtx insns;
483 rtx lowpart;
484 rtx fill_value;
485 rtx lowfrom;
486 int i;
487 enum machine_mode lowpart_mode;
488 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
489
490 /* Try converting directly if the insn is supported. */
491 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
492 != CODE_FOR_nothing)
493 {
494 /* If FROM is a SUBREG, put it into a register. Do this
495 so that we always generate the same set of insns for
496 better cse'ing; if an intermediate assignment occurred,
497 we won't be doing the operation directly on the SUBREG. */
498 if (optimize > 0 && GET_CODE (from) == SUBREG)
499 from = force_reg (from_mode, from);
500 emit_unop_insn (code, to, from, equiv_code);
501 return;
502 }
503 /* Next, try converting via full word. */
504 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
505 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
506 != CODE_FOR_nothing))
507 {
508 rtx word_to = gen_reg_rtx (word_mode);
509 if (REG_P (to))
510 {
511 if (reg_overlap_mentioned_p (to, from))
512 from = force_reg (from_mode, from);
513 emit_clobber (to);
514 }
515 convert_move (word_to, from, unsignedp);
516 emit_unop_insn (code, to, word_to, equiv_code);
517 return;
518 }
519
520 /* No special multiword conversion insn; do it by hand. */
521 start_sequence ();
522
523 /* Since we will turn this into a no conflict block, we must ensure
524 that the source does not overlap the target. */
525
526 if (reg_overlap_mentioned_p (to, from))
527 from = force_reg (from_mode, from);
528
529 /* Get a copy of FROM widened to a word, if necessary. */
530 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
531 lowpart_mode = word_mode;
532 else
533 lowpart_mode = from_mode;
534
535 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
536
537 lowpart = gen_lowpart (lowpart_mode, to);
538 emit_move_insn (lowpart, lowfrom);
539
540 /* Compute the value to put in each remaining word. */
541 if (unsignedp)
542 fill_value = const0_rtx;
543 else
544 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
545 LT, lowfrom, const0_rtx,
546 VOIDmode, 0, -1);
547
548 /* Fill the remaining words. */
549 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
550 {
551 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
552 rtx subword = operand_subword (to, index, 1, to_mode);
553
554 gcc_assert (subword);
555
556 if (fill_value != subword)
557 emit_move_insn (subword, fill_value);
558 }
559
560 insns = get_insns ();
561 end_sequence ();
562
563 emit_insn (insns);
564 return;
565 }
566
567 /* Truncating multi-word to a word or less. */
568 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
569 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
570 {
571 if (!((MEM_P (from)
572 && ! MEM_VOLATILE_P (from)
573 && direct_load[(int) to_mode]
574 && ! mode_dependent_address_p (XEXP (from, 0)))
575 || REG_P (from)
576 || GET_CODE (from) == SUBREG))
577 from = force_reg (from_mode, from);
578 convert_move (to, gen_lowpart (word_mode, from), 0);
579 return;
580 }
581
582 /* Now follow all the conversions between integers
583 no more than a word long. */
584
585 /* For truncation, usually we can just refer to FROM in a narrower mode. */
586 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
587 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
588 {
589 if (!((MEM_P (from)
590 && ! MEM_VOLATILE_P (from)
591 && direct_load[(int) to_mode]
592 && ! mode_dependent_address_p (XEXP (from, 0)))
593 || REG_P (from)
594 || GET_CODE (from) == SUBREG))
595 from = force_reg (from_mode, from);
596 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
597 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
598 from = copy_to_reg (from);
599 emit_move_insn (to, gen_lowpart (to_mode, from));
600 return;
601 }
602
603 /* Handle extension. */
604 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
605 {
606 /* Convert directly if that works. */
607 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
608 != CODE_FOR_nothing)
609 {
610 emit_unop_insn (code, to, from, equiv_code);
611 return;
612 }
613 else
614 {
615 enum machine_mode intermediate;
616 rtx tmp;
617 int shift_amount;
618
619 /* Search for a mode to convert via. */
620 for (intermediate = from_mode; intermediate != VOIDmode;
621 intermediate = GET_MODE_WIDER_MODE (intermediate))
622 if (((can_extend_p (to_mode, intermediate, unsignedp)
623 != CODE_FOR_nothing)
624 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
625 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
626 && (can_extend_p (intermediate, from_mode, unsignedp)
627 != CODE_FOR_nothing))
628 {
629 convert_move (to, convert_to_mode (intermediate, from,
630 unsignedp), unsignedp);
631 return;
632 }
633
634 /* No suitable intermediate mode.
635 Generate what we need with shifts. */
636 shift_amount = (GET_MODE_PRECISION (to_mode)
637 - GET_MODE_PRECISION (from_mode));
638 from = gen_lowpart (to_mode, force_reg (from_mode, from));
639 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
640 to, unsignedp);
641 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
642 to, unsignedp);
643 if (tmp != to)
644 emit_move_insn (to, tmp);
645 return;
646 }
647 }
648
649 /* Support special truncate insns for certain modes. */
650 if (convert_optab_handler (trunc_optab, to_mode,
651 from_mode) != CODE_FOR_nothing)
652 {
653 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
654 to, from, UNKNOWN);
655 return;
656 }
657
658 /* Handle truncation of volatile memrefs, and so on;
659 the things that couldn't be truncated directly,
660 and for which there was no special instruction.
661
662 ??? Code above formerly short-circuited this, for most integer
663 mode pairs, with a force_reg in from_mode followed by a recursive
664 call to this routine. Appears always to have been wrong. */
665 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
666 {
667 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
668 emit_move_insn (to, temp);
669 return;
670 }
671
672 /* Mode combination is not recognized. */
673 gcc_unreachable ();
674 }
675
676 /* Return an rtx for a value that would result
677 from converting X to mode MODE.
678 Both X and MODE may be floating, or both integer.
679 UNSIGNEDP is nonzero if X is an unsigned value.
680 This can be done by referring to a part of X in place
681 or by copying to a new temporary with conversion. */
682
683 rtx
684 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
685 {
686 return convert_modes (mode, VOIDmode, x, unsignedp);
687 }
688
689 /* Return an rtx for a value that would result
690 from converting X from mode OLDMODE to mode MODE.
691 Both modes may be floating, or both integer.
692 UNSIGNEDP is nonzero if X is an unsigned value.
693
694 This can be done by referring to a part of X in place
695 or by copying to a new temporary with conversion.
696
697 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
698
699 rtx
700 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
701 {
702 rtx temp;
703
704 /* If FROM is a SUBREG that indicates that we have already done at least
705 the required extension, strip it. */
706
707 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
708 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
709 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
710 x = gen_lowpart (mode, x);
711
712 if (GET_MODE (x) != VOIDmode)
713 oldmode = GET_MODE (x);
714
715 if (mode == oldmode)
716 return x;
717
718 /* There is one case that we must handle specially: If we are converting
719 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
720 we are to interpret the constant as unsigned, gen_lowpart will do
721 the wrong if the constant appears negative. What we want to do is
722 make the high-order word of the constant zero, not all ones. */
723
724 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
725 && GET_MODE_BITSIZE (mode) == HOST_BITS_PER_DOUBLE_INT
726 && CONST_INT_P (x) && INTVAL (x) < 0)
727 {
728 double_int val = uhwi_to_double_int (INTVAL (x));
729
730 /* We need to zero extend VAL. */
731 if (oldmode != VOIDmode)
732 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
733
734 return immed_double_int_const (val, mode);
735 }
736
737 /* We can do this with a gen_lowpart if both desired and current modes
738 are integer, and this is either a constant integer, a register, or a
739 non-volatile MEM. Except for the constant case where MODE is no
740 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
741
742 if ((CONST_INT_P (x)
743 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
744 || (GET_MODE_CLASS (mode) == MODE_INT
745 && GET_MODE_CLASS (oldmode) == MODE_INT
746 && (GET_CODE (x) == CONST_DOUBLE
747 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
748 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
749 && direct_load[(int) mode])
750 || (REG_P (x)
751 && (! HARD_REGISTER_P (x)
752 || HARD_REGNO_MODE_OK (REGNO (x), mode))
753 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
754 GET_MODE (x))))))))
755 {
756 /* ?? If we don't know OLDMODE, we have to assume here that
757 X does not need sign- or zero-extension. This may not be
758 the case, but it's the best we can do. */
759 if (CONST_INT_P (x) && oldmode != VOIDmode
760 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
761 {
762 HOST_WIDE_INT val = INTVAL (x);
763
764 /* We must sign or zero-extend in this case. Start by
765 zero-extending, then sign extend if we need to. */
766 val &= GET_MODE_MASK (oldmode);
767 if (! unsignedp
768 && val_signbit_known_set_p (oldmode, val))
769 val |= ~GET_MODE_MASK (oldmode);
770
771 return gen_int_mode (val, mode);
772 }
773
774 return gen_lowpart (mode, x);
775 }
776
777 /* Converting from integer constant into mode is always equivalent to an
778 subreg operation. */
779 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
780 {
781 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
782 return simplify_gen_subreg (mode, x, oldmode, 0);
783 }
784
785 temp = gen_reg_rtx (mode);
786 convert_move (temp, x, unsignedp);
787 return temp;
788 }
789 \f
790 /* Return the largest alignment we can use for doing a move (or store)
791 of MAX_PIECES. ALIGN is the largest alignment we could use. */
792
793 static unsigned int
794 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
795 {
796 enum machine_mode tmode;
797
798 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
799 if (align >= GET_MODE_ALIGNMENT (tmode))
800 align = GET_MODE_ALIGNMENT (tmode);
801 else
802 {
803 enum machine_mode tmode, xmode;
804
805 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
806 tmode != VOIDmode;
807 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
808 if (GET_MODE_SIZE (tmode) > max_pieces
809 || SLOW_UNALIGNED_ACCESS (tmode, align))
810 break;
811
812 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
813 }
814
815 return align;
816 }
817
818 /* Return the widest integer mode no wider than SIZE. If no such mode
819 can be found, return VOIDmode. */
820
821 static enum machine_mode
822 widest_int_mode_for_size (unsigned int size)
823 {
824 enum machine_mode tmode, mode = VOIDmode;
825
826 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
827 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
828 if (GET_MODE_SIZE (tmode) < size)
829 mode = tmode;
830
831 return mode;
832 }
833
834 /* STORE_MAX_PIECES is the number of bytes at a time that we can
835 store efficiently. Due to internal GCC limitations, this is
836 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
837 for an immediate constant. */
838
839 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
840
841 /* Determine whether the LEN bytes can be moved by using several move
842 instructions. Return nonzero if a call to move_by_pieces should
843 succeed. */
844
845 int
846 can_move_by_pieces (unsigned HOST_WIDE_INT len,
847 unsigned int align ATTRIBUTE_UNUSED)
848 {
849 return MOVE_BY_PIECES_P (len, align);
850 }
851
852 /* Generate several move instructions to copy LEN bytes from block FROM to
853 block TO. (These are MEM rtx's with BLKmode).
854
855 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
856 used to push FROM to the stack.
857
858 ALIGN is maximum stack alignment we can assume.
859
860 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
861 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
862 stpcpy. */
863
864 rtx
865 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
866 unsigned int align, int endp)
867 {
868 struct move_by_pieces_d data;
869 enum machine_mode to_addr_mode;
870 enum machine_mode from_addr_mode = get_address_mode (from);
871 rtx to_addr, from_addr = XEXP (from, 0);
872 unsigned int max_size = MOVE_MAX_PIECES + 1;
873 enum insn_code icode;
874
875 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
876
877 data.offset = 0;
878 data.from_addr = from_addr;
879 if (to)
880 {
881 to_addr_mode = get_address_mode (to);
882 to_addr = XEXP (to, 0);
883 data.to = to;
884 data.autinc_to
885 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
886 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
887 data.reverse
888 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
889 }
890 else
891 {
892 to_addr_mode = VOIDmode;
893 to_addr = NULL_RTX;
894 data.to = NULL_RTX;
895 data.autinc_to = 1;
896 #ifdef STACK_GROWS_DOWNWARD
897 data.reverse = 1;
898 #else
899 data.reverse = 0;
900 #endif
901 }
902 data.to_addr = to_addr;
903 data.from = from;
904 data.autinc_from
905 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
906 || GET_CODE (from_addr) == POST_INC
907 || GET_CODE (from_addr) == POST_DEC);
908
909 data.explicit_inc_from = 0;
910 data.explicit_inc_to = 0;
911 if (data.reverse) data.offset = len;
912 data.len = len;
913
914 /* If copying requires more than two move insns,
915 copy addresses to registers (to make displacements shorter)
916 and use post-increment if available. */
917 if (!(data.autinc_from && data.autinc_to)
918 && move_by_pieces_ninsns (len, align, max_size) > 2)
919 {
920 /* Find the mode of the largest move...
921 MODE might not be used depending on the definitions of the
922 USE_* macros below. */
923 enum machine_mode mode ATTRIBUTE_UNUSED
924 = widest_int_mode_for_size (max_size);
925
926 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
927 {
928 data.from_addr = copy_to_mode_reg (from_addr_mode,
929 plus_constant (from_addr_mode,
930 from_addr, len));
931 data.autinc_from = 1;
932 data.explicit_inc_from = -1;
933 }
934 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
935 {
936 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
937 data.autinc_from = 1;
938 data.explicit_inc_from = 1;
939 }
940 if (!data.autinc_from && CONSTANT_P (from_addr))
941 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
942 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
943 {
944 data.to_addr = copy_to_mode_reg (to_addr_mode,
945 plus_constant (to_addr_mode,
946 to_addr, len));
947 data.autinc_to = 1;
948 data.explicit_inc_to = -1;
949 }
950 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
951 {
952 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
953 data.autinc_to = 1;
954 data.explicit_inc_to = 1;
955 }
956 if (!data.autinc_to && CONSTANT_P (to_addr))
957 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
958 }
959
960 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
961
962 /* First move what we can in the largest integer mode, then go to
963 successively smaller modes. */
964
965 while (max_size > 1)
966 {
967 enum machine_mode mode = widest_int_mode_for_size (max_size);
968
969 if (mode == VOIDmode)
970 break;
971
972 icode = optab_handler (mov_optab, mode);
973 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
974 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
975
976 max_size = GET_MODE_SIZE (mode);
977 }
978
979 /* The code above should have handled everything. */
980 gcc_assert (!data.len);
981
982 if (endp)
983 {
984 rtx to1;
985
986 gcc_assert (!data.reverse);
987 if (data.autinc_to)
988 {
989 if (endp == 2)
990 {
991 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
992 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
993 else
994 data.to_addr = copy_to_mode_reg (to_addr_mode,
995 plus_constant (to_addr_mode,
996 data.to_addr,
997 -1));
998 }
999 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
1000 data.offset);
1001 }
1002 else
1003 {
1004 if (endp == 2)
1005 --data.offset;
1006 to1 = adjust_address (data.to, QImode, data.offset);
1007 }
1008 return to1;
1009 }
1010 else
1011 return data.to;
1012 }
1013
1014 /* Return number of insns required to move L bytes by pieces.
1015 ALIGN (in bits) is maximum alignment we can assume. */
1016
1017 unsigned HOST_WIDE_INT
1018 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1019 unsigned int max_size)
1020 {
1021 unsigned HOST_WIDE_INT n_insns = 0;
1022
1023 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1024
1025 while (max_size > 1)
1026 {
1027 enum machine_mode mode;
1028 enum insn_code icode;
1029
1030 mode = widest_int_mode_for_size (max_size);
1031
1032 if (mode == VOIDmode)
1033 break;
1034
1035 icode = optab_handler (mov_optab, mode);
1036 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1037 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1038
1039 max_size = GET_MODE_SIZE (mode);
1040 }
1041
1042 gcc_assert (!l);
1043 return n_insns;
1044 }
1045
1046 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1047 with move instructions for mode MODE. GENFUN is the gen_... function
1048 to make a move insn for that mode. DATA has all the other info. */
1049
1050 static void
1051 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1052 struct move_by_pieces_d *data)
1053 {
1054 unsigned int size = GET_MODE_SIZE (mode);
1055 rtx to1 = NULL_RTX, from1;
1056
1057 while (data->len >= size)
1058 {
1059 if (data->reverse)
1060 data->offset -= size;
1061
1062 if (data->to)
1063 {
1064 if (data->autinc_to)
1065 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1066 data->offset);
1067 else
1068 to1 = adjust_address (data->to, mode, data->offset);
1069 }
1070
1071 if (data->autinc_from)
1072 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1073 data->offset);
1074 else
1075 from1 = adjust_address (data->from, mode, data->offset);
1076
1077 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1078 emit_insn (gen_add2_insn (data->to_addr,
1079 GEN_INT (-(HOST_WIDE_INT)size)));
1080 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1081 emit_insn (gen_add2_insn (data->from_addr,
1082 GEN_INT (-(HOST_WIDE_INT)size)));
1083
1084 if (data->to)
1085 emit_insn ((*genfun) (to1, from1));
1086 else
1087 {
1088 #ifdef PUSH_ROUNDING
1089 emit_single_push_insn (mode, from1, NULL);
1090 #else
1091 gcc_unreachable ();
1092 #endif
1093 }
1094
1095 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1096 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1097 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1098 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1099
1100 if (! data->reverse)
1101 data->offset += size;
1102
1103 data->len -= size;
1104 }
1105 }
1106 \f
1107 /* Emit code to move a block Y to a block X. This may be done with
1108 string-move instructions, with multiple scalar move instructions,
1109 or with a library call.
1110
1111 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1112 SIZE is an rtx that says how long they are.
1113 ALIGN is the maximum alignment we can assume they have.
1114 METHOD describes what kind of copy this is, and what mechanisms may be used.
1115
1116 Return the address of the new block, if memcpy is called and returns it,
1117 0 otherwise. */
1118
1119 rtx
1120 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1121 unsigned int expected_align, HOST_WIDE_INT expected_size)
1122 {
1123 bool may_use_call;
1124 rtx retval = 0;
1125 unsigned int align;
1126
1127 gcc_assert (size);
1128 if (CONST_INT_P (size)
1129 && INTVAL (size) == 0)
1130 return 0;
1131
1132 switch (method)
1133 {
1134 case BLOCK_OP_NORMAL:
1135 case BLOCK_OP_TAILCALL:
1136 may_use_call = true;
1137 break;
1138
1139 case BLOCK_OP_CALL_PARM:
1140 may_use_call = block_move_libcall_safe_for_call_parm ();
1141
1142 /* Make inhibit_defer_pop nonzero around the library call
1143 to force it to pop the arguments right away. */
1144 NO_DEFER_POP;
1145 break;
1146
1147 case BLOCK_OP_NO_LIBCALL:
1148 may_use_call = false;
1149 break;
1150
1151 default:
1152 gcc_unreachable ();
1153 }
1154
1155 gcc_assert (MEM_P (x) && MEM_P (y));
1156 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1157 gcc_assert (align >= BITS_PER_UNIT);
1158
1159 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1160 block copy is more efficient for other large modes, e.g. DCmode. */
1161 x = adjust_address (x, BLKmode, 0);
1162 y = adjust_address (y, BLKmode, 0);
1163
1164 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1165 can be incorrect is coming from __builtin_memcpy. */
1166 if (CONST_INT_P (size))
1167 {
1168 x = shallow_copy_rtx (x);
1169 y = shallow_copy_rtx (y);
1170 set_mem_size (x, INTVAL (size));
1171 set_mem_size (y, INTVAL (size));
1172 }
1173
1174 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1175 move_by_pieces (x, y, INTVAL (size), align, 0);
1176 else if (emit_block_move_via_movmem (x, y, size, align,
1177 expected_align, expected_size))
1178 ;
1179 else if (may_use_call
1180 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1181 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1182 {
1183 /* Since x and y are passed to a libcall, mark the corresponding
1184 tree EXPR as addressable. */
1185 tree y_expr = MEM_EXPR (y);
1186 tree x_expr = MEM_EXPR (x);
1187 if (y_expr)
1188 mark_addressable (y_expr);
1189 if (x_expr)
1190 mark_addressable (x_expr);
1191 retval = emit_block_move_via_libcall (x, y, size,
1192 method == BLOCK_OP_TAILCALL);
1193 }
1194
1195 else
1196 emit_block_move_via_loop (x, y, size, align);
1197
1198 if (method == BLOCK_OP_CALL_PARM)
1199 OK_DEFER_POP;
1200
1201 return retval;
1202 }
1203
1204 rtx
1205 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1206 {
1207 return emit_block_move_hints (x, y, size, method, 0, -1);
1208 }
1209
1210 /* A subroutine of emit_block_move. Returns true if calling the
1211 block move libcall will not clobber any parameters which may have
1212 already been placed on the stack. */
1213
1214 static bool
1215 block_move_libcall_safe_for_call_parm (void)
1216 {
1217 #if defined (REG_PARM_STACK_SPACE)
1218 tree fn;
1219 #endif
1220
1221 /* If arguments are pushed on the stack, then they're safe. */
1222 if (PUSH_ARGS)
1223 return true;
1224
1225 /* If registers go on the stack anyway, any argument is sure to clobber
1226 an outgoing argument. */
1227 #if defined (REG_PARM_STACK_SPACE)
1228 fn = emit_block_move_libcall_fn (false);
1229 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1230 depend on its argument. */
1231 (void) fn;
1232 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1233 && REG_PARM_STACK_SPACE (fn) != 0)
1234 return false;
1235 #endif
1236
1237 /* If any argument goes in memory, then it might clobber an outgoing
1238 argument. */
1239 {
1240 CUMULATIVE_ARGS args_so_far_v;
1241 cumulative_args_t args_so_far;
1242 tree fn, arg;
1243
1244 fn = emit_block_move_libcall_fn (false);
1245 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1246 args_so_far = pack_cumulative_args (&args_so_far_v);
1247
1248 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1249 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1250 {
1251 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1252 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1253 NULL_TREE, true);
1254 if (!tmp || !REG_P (tmp))
1255 return false;
1256 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1257 return false;
1258 targetm.calls.function_arg_advance (args_so_far, mode,
1259 NULL_TREE, true);
1260 }
1261 }
1262 return true;
1263 }
1264
1265 /* A subroutine of emit_block_move. Expand a movmem pattern;
1266 return true if successful. */
1267
1268 static bool
1269 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1270 unsigned int expected_align, HOST_WIDE_INT expected_size)
1271 {
1272 int save_volatile_ok = volatile_ok;
1273 enum machine_mode mode;
1274
1275 if (expected_align < align)
1276 expected_align = align;
1277
1278 /* Since this is a move insn, we don't care about volatility. */
1279 volatile_ok = 1;
1280
1281 /* Try the most limited insn first, because there's no point
1282 including more than one in the machine description unless
1283 the more limited one has some advantage. */
1284
1285 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1286 mode = GET_MODE_WIDER_MODE (mode))
1287 {
1288 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1289
1290 if (code != CODE_FOR_nothing
1291 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1292 here because if SIZE is less than the mode mask, as it is
1293 returned by the macro, it will definitely be less than the
1294 actual mode mask. */
1295 && ((CONST_INT_P (size)
1296 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1297 <= (GET_MODE_MASK (mode) >> 1)))
1298 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1299 {
1300 struct expand_operand ops[6];
1301 unsigned int nops;
1302
1303 /* ??? When called via emit_block_move_for_call, it'd be
1304 nice if there were some way to inform the backend, so
1305 that it doesn't fail the expansion because it thinks
1306 emitting the libcall would be more efficient. */
1307 nops = insn_data[(int) code].n_generator_args;
1308 gcc_assert (nops == 4 || nops == 6);
1309
1310 create_fixed_operand (&ops[0], x);
1311 create_fixed_operand (&ops[1], y);
1312 /* The check above guarantees that this size conversion is valid. */
1313 create_convert_operand_to (&ops[2], size, mode, true);
1314 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1315 if (nops == 6)
1316 {
1317 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1318 create_integer_operand (&ops[5], expected_size);
1319 }
1320 if (maybe_expand_insn (code, nops, ops))
1321 {
1322 volatile_ok = save_volatile_ok;
1323 return true;
1324 }
1325 }
1326 }
1327
1328 volatile_ok = save_volatile_ok;
1329 return false;
1330 }
1331
1332 /* A subroutine of emit_block_move. Expand a call to memcpy.
1333 Return the return value from memcpy, 0 otherwise. */
1334
1335 rtx
1336 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1337 {
1338 rtx dst_addr, src_addr;
1339 tree call_expr, fn, src_tree, dst_tree, size_tree;
1340 enum machine_mode size_mode;
1341 rtx retval;
1342
1343 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1344 pseudos. We can then place those new pseudos into a VAR_DECL and
1345 use them later. */
1346
1347 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1348 src_addr = copy_addr_to_reg (XEXP (src, 0));
1349
1350 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1351 src_addr = convert_memory_address (ptr_mode, src_addr);
1352
1353 dst_tree = make_tree (ptr_type_node, dst_addr);
1354 src_tree = make_tree (ptr_type_node, src_addr);
1355
1356 size_mode = TYPE_MODE (sizetype);
1357
1358 size = convert_to_mode (size_mode, size, 1);
1359 size = copy_to_mode_reg (size_mode, size);
1360
1361 /* It is incorrect to use the libcall calling conventions to call
1362 memcpy in this context. This could be a user call to memcpy and
1363 the user may wish to examine the return value from memcpy. For
1364 targets where libcalls and normal calls have different conventions
1365 for returning pointers, we could end up generating incorrect code. */
1366
1367 size_tree = make_tree (sizetype, size);
1368
1369 fn = emit_block_move_libcall_fn (true);
1370 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1371 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1372
1373 retval = expand_normal (call_expr);
1374
1375 return retval;
1376 }
1377
1378 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1379 for the function we use for block copies. */
1380
1381 static GTY(()) tree block_move_fn;
1382
1383 void
1384 init_block_move_fn (const char *asmspec)
1385 {
1386 if (!block_move_fn)
1387 {
1388 tree args, fn, attrs, attr_args;
1389
1390 fn = get_identifier ("memcpy");
1391 args = build_function_type_list (ptr_type_node, ptr_type_node,
1392 const_ptr_type_node, sizetype,
1393 NULL_TREE);
1394
1395 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1396 DECL_EXTERNAL (fn) = 1;
1397 TREE_PUBLIC (fn) = 1;
1398 DECL_ARTIFICIAL (fn) = 1;
1399 TREE_NOTHROW (fn) = 1;
1400 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1401 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1402
1403 attr_args = build_tree_list (NULL_TREE, build_string (1, "1"));
1404 attrs = tree_cons (get_identifier ("fn spec"), attr_args, NULL);
1405
1406 decl_attributes (&fn, attrs, ATTR_FLAG_BUILT_IN);
1407
1408 block_move_fn = fn;
1409 }
1410
1411 if (asmspec)
1412 set_user_assembler_name (block_move_fn, asmspec);
1413 }
1414
1415 static tree
1416 emit_block_move_libcall_fn (int for_call)
1417 {
1418 static bool emitted_extern;
1419
1420 if (!block_move_fn)
1421 init_block_move_fn (NULL);
1422
1423 if (for_call && !emitted_extern)
1424 {
1425 emitted_extern = true;
1426 make_decl_rtl (block_move_fn);
1427 }
1428
1429 return block_move_fn;
1430 }
1431
1432 /* A subroutine of emit_block_move. Copy the data via an explicit
1433 loop. This is used only when libcalls are forbidden. */
1434 /* ??? It'd be nice to copy in hunks larger than QImode. */
1435
1436 static void
1437 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1438 unsigned int align ATTRIBUTE_UNUSED)
1439 {
1440 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1441 enum machine_mode x_addr_mode = get_address_mode (x);
1442 enum machine_mode y_addr_mode = get_address_mode (y);
1443 enum machine_mode iter_mode;
1444
1445 iter_mode = GET_MODE (size);
1446 if (iter_mode == VOIDmode)
1447 iter_mode = word_mode;
1448
1449 top_label = gen_label_rtx ();
1450 cmp_label = gen_label_rtx ();
1451 iter = gen_reg_rtx (iter_mode);
1452
1453 emit_move_insn (iter, const0_rtx);
1454
1455 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1456 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1457 do_pending_stack_adjust ();
1458
1459 emit_jump (cmp_label);
1460 emit_label (top_label);
1461
1462 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1463 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1464
1465 if (x_addr_mode != y_addr_mode)
1466 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1467 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1468
1469 x = change_address (x, QImode, x_addr);
1470 y = change_address (y, QImode, y_addr);
1471
1472 emit_move_insn (x, y);
1473
1474 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1475 true, OPTAB_LIB_WIDEN);
1476 if (tmp != iter)
1477 emit_move_insn (iter, tmp);
1478
1479 emit_label (cmp_label);
1480
1481 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1482 true, top_label);
1483 }
1484 \f
1485 /* Copy all or part of a value X into registers starting at REGNO.
1486 The number of registers to be filled is NREGS. */
1487
1488 void
1489 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1490 {
1491 int i;
1492 #ifdef HAVE_load_multiple
1493 rtx pat;
1494 rtx last;
1495 #endif
1496
1497 if (nregs == 0)
1498 return;
1499
1500 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1501 x = validize_mem (force_const_mem (mode, x));
1502
1503 /* See if the machine can do this with a load multiple insn. */
1504 #ifdef HAVE_load_multiple
1505 if (HAVE_load_multiple)
1506 {
1507 last = get_last_insn ();
1508 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1509 GEN_INT (nregs));
1510 if (pat)
1511 {
1512 emit_insn (pat);
1513 return;
1514 }
1515 else
1516 delete_insns_since (last);
1517 }
1518 #endif
1519
1520 for (i = 0; i < nregs; i++)
1521 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1522 operand_subword_force (x, i, mode));
1523 }
1524
1525 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1526 The number of registers to be filled is NREGS. */
1527
1528 void
1529 move_block_from_reg (int regno, rtx x, int nregs)
1530 {
1531 int i;
1532
1533 if (nregs == 0)
1534 return;
1535
1536 /* See if the machine can do this with a store multiple insn. */
1537 #ifdef HAVE_store_multiple
1538 if (HAVE_store_multiple)
1539 {
1540 rtx last = get_last_insn ();
1541 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1542 GEN_INT (nregs));
1543 if (pat)
1544 {
1545 emit_insn (pat);
1546 return;
1547 }
1548 else
1549 delete_insns_since (last);
1550 }
1551 #endif
1552
1553 for (i = 0; i < nregs; i++)
1554 {
1555 rtx tem = operand_subword (x, i, 1, BLKmode);
1556
1557 gcc_assert (tem);
1558
1559 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1560 }
1561 }
1562
1563 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1564 ORIG, where ORIG is a non-consecutive group of registers represented by
1565 a PARALLEL. The clone is identical to the original except in that the
1566 original set of registers is replaced by a new set of pseudo registers.
1567 The new set has the same modes as the original set. */
1568
1569 rtx
1570 gen_group_rtx (rtx orig)
1571 {
1572 int i, length;
1573 rtx *tmps;
1574
1575 gcc_assert (GET_CODE (orig) == PARALLEL);
1576
1577 length = XVECLEN (orig, 0);
1578 tmps = XALLOCAVEC (rtx, length);
1579
1580 /* Skip a NULL entry in first slot. */
1581 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1582
1583 if (i)
1584 tmps[0] = 0;
1585
1586 for (; i < length; i++)
1587 {
1588 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1589 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1590
1591 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1592 }
1593
1594 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1595 }
1596
1597 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1598 except that values are placed in TMPS[i], and must later be moved
1599 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1600
1601 static void
1602 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1603 {
1604 rtx src;
1605 int start, i;
1606 enum machine_mode m = GET_MODE (orig_src);
1607
1608 gcc_assert (GET_CODE (dst) == PARALLEL);
1609
1610 if (m != VOIDmode
1611 && !SCALAR_INT_MODE_P (m)
1612 && !MEM_P (orig_src)
1613 && GET_CODE (orig_src) != CONCAT)
1614 {
1615 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1616 if (imode == BLKmode)
1617 src = assign_stack_temp (GET_MODE (orig_src), ssize);
1618 else
1619 src = gen_reg_rtx (imode);
1620 if (imode != BLKmode)
1621 src = gen_lowpart (GET_MODE (orig_src), src);
1622 emit_move_insn (src, orig_src);
1623 /* ...and back again. */
1624 if (imode != BLKmode)
1625 src = gen_lowpart (imode, src);
1626 emit_group_load_1 (tmps, dst, src, type, ssize);
1627 return;
1628 }
1629
1630 /* Check for a NULL entry, used to indicate that the parameter goes
1631 both on the stack and in registers. */
1632 if (XEXP (XVECEXP (dst, 0, 0), 0))
1633 start = 0;
1634 else
1635 start = 1;
1636
1637 /* Process the pieces. */
1638 for (i = start; i < XVECLEN (dst, 0); i++)
1639 {
1640 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1641 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1642 unsigned int bytelen = GET_MODE_SIZE (mode);
1643 int shift = 0;
1644
1645 /* Handle trailing fragments that run over the size of the struct. */
1646 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1647 {
1648 /* Arrange to shift the fragment to where it belongs.
1649 extract_bit_field loads to the lsb of the reg. */
1650 if (
1651 #ifdef BLOCK_REG_PADDING
1652 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1653 == (BYTES_BIG_ENDIAN ? upward : downward)
1654 #else
1655 BYTES_BIG_ENDIAN
1656 #endif
1657 )
1658 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1659 bytelen = ssize - bytepos;
1660 gcc_assert (bytelen > 0);
1661 }
1662
1663 /* If we won't be loading directly from memory, protect the real source
1664 from strange tricks we might play; but make sure that the source can
1665 be loaded directly into the destination. */
1666 src = orig_src;
1667 if (!MEM_P (orig_src)
1668 && (!CONSTANT_P (orig_src)
1669 || (GET_MODE (orig_src) != mode
1670 && GET_MODE (orig_src) != VOIDmode)))
1671 {
1672 if (GET_MODE (orig_src) == VOIDmode)
1673 src = gen_reg_rtx (mode);
1674 else
1675 src = gen_reg_rtx (GET_MODE (orig_src));
1676
1677 emit_move_insn (src, orig_src);
1678 }
1679
1680 /* Optimize the access just a bit. */
1681 if (MEM_P (src)
1682 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1683 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1684 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1685 && bytelen == GET_MODE_SIZE (mode))
1686 {
1687 tmps[i] = gen_reg_rtx (mode);
1688 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1689 }
1690 else if (COMPLEX_MODE_P (mode)
1691 && GET_MODE (src) == mode
1692 && bytelen == GET_MODE_SIZE (mode))
1693 /* Let emit_move_complex do the bulk of the work. */
1694 tmps[i] = src;
1695 else if (GET_CODE (src) == CONCAT)
1696 {
1697 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1698 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1699
1700 if ((bytepos == 0 && bytelen == slen0)
1701 || (bytepos != 0 && bytepos + bytelen <= slen))
1702 {
1703 /* The following assumes that the concatenated objects all
1704 have the same size. In this case, a simple calculation
1705 can be used to determine the object and the bit field
1706 to be extracted. */
1707 tmps[i] = XEXP (src, bytepos / slen0);
1708 if (! CONSTANT_P (tmps[i])
1709 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1710 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1711 (bytepos % slen0) * BITS_PER_UNIT,
1712 1, false, NULL_RTX, mode, mode);
1713 }
1714 else
1715 {
1716 rtx mem;
1717
1718 gcc_assert (!bytepos);
1719 mem = assign_stack_temp (GET_MODE (src), slen);
1720 emit_move_insn (mem, src);
1721 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1722 0, 1, false, NULL_RTX, mode, mode);
1723 }
1724 }
1725 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1726 SIMD register, which is currently broken. While we get GCC
1727 to emit proper RTL for these cases, let's dump to memory. */
1728 else if (VECTOR_MODE_P (GET_MODE (dst))
1729 && REG_P (src))
1730 {
1731 int slen = GET_MODE_SIZE (GET_MODE (src));
1732 rtx mem;
1733
1734 mem = assign_stack_temp (GET_MODE (src), slen);
1735 emit_move_insn (mem, src);
1736 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1737 }
1738 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1739 && XVECLEN (dst, 0) > 1)
1740 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1741 else if (CONSTANT_P (src))
1742 {
1743 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1744
1745 if (len == ssize)
1746 tmps[i] = src;
1747 else
1748 {
1749 rtx first, second;
1750
1751 gcc_assert (2 * len == ssize);
1752 split_double (src, &first, &second);
1753 if (i)
1754 tmps[i] = second;
1755 else
1756 tmps[i] = first;
1757 }
1758 }
1759 else if (REG_P (src) && GET_MODE (src) == mode)
1760 tmps[i] = src;
1761 else
1762 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1763 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1764 mode, mode);
1765
1766 if (shift)
1767 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1768 shift, tmps[i], 0);
1769 }
1770 }
1771
1772 /* Emit code to move a block SRC of type TYPE to a block DST,
1773 where DST is non-consecutive registers represented by a PARALLEL.
1774 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1775 if not known. */
1776
1777 void
1778 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1779 {
1780 rtx *tmps;
1781 int i;
1782
1783 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1784 emit_group_load_1 (tmps, dst, src, type, ssize);
1785
1786 /* Copy the extracted pieces into the proper (probable) hard regs. */
1787 for (i = 0; i < XVECLEN (dst, 0); i++)
1788 {
1789 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1790 if (d == NULL)
1791 continue;
1792 emit_move_insn (d, tmps[i]);
1793 }
1794 }
1795
1796 /* Similar, but load SRC into new pseudos in a format that looks like
1797 PARALLEL. This can later be fed to emit_group_move to get things
1798 in the right place. */
1799
1800 rtx
1801 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1802 {
1803 rtvec vec;
1804 int i;
1805
1806 vec = rtvec_alloc (XVECLEN (parallel, 0));
1807 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1808
1809 /* Convert the vector to look just like the original PARALLEL, except
1810 with the computed values. */
1811 for (i = 0; i < XVECLEN (parallel, 0); i++)
1812 {
1813 rtx e = XVECEXP (parallel, 0, i);
1814 rtx d = XEXP (e, 0);
1815
1816 if (d)
1817 {
1818 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1819 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1820 }
1821 RTVEC_ELT (vec, i) = e;
1822 }
1823
1824 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1825 }
1826
1827 /* Emit code to move a block SRC to block DST, where SRC and DST are
1828 non-consecutive groups of registers, each represented by a PARALLEL. */
1829
1830 void
1831 emit_group_move (rtx dst, rtx src)
1832 {
1833 int i;
1834
1835 gcc_assert (GET_CODE (src) == PARALLEL
1836 && GET_CODE (dst) == PARALLEL
1837 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1838
1839 /* Skip first entry if NULL. */
1840 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1841 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1842 XEXP (XVECEXP (src, 0, i), 0));
1843 }
1844
1845 /* Move a group of registers represented by a PARALLEL into pseudos. */
1846
1847 rtx
1848 emit_group_move_into_temps (rtx src)
1849 {
1850 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1851 int i;
1852
1853 for (i = 0; i < XVECLEN (src, 0); i++)
1854 {
1855 rtx e = XVECEXP (src, 0, i);
1856 rtx d = XEXP (e, 0);
1857
1858 if (d)
1859 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1860 RTVEC_ELT (vec, i) = e;
1861 }
1862
1863 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1864 }
1865
1866 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1867 where SRC is non-consecutive registers represented by a PARALLEL.
1868 SSIZE represents the total size of block ORIG_DST, or -1 if not
1869 known. */
1870
1871 void
1872 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1873 {
1874 rtx *tmps, dst;
1875 int start, finish, i;
1876 enum machine_mode m = GET_MODE (orig_dst);
1877
1878 gcc_assert (GET_CODE (src) == PARALLEL);
1879
1880 if (!SCALAR_INT_MODE_P (m)
1881 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1882 {
1883 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1884 if (imode == BLKmode)
1885 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
1886 else
1887 dst = gen_reg_rtx (imode);
1888 emit_group_store (dst, src, type, ssize);
1889 if (imode != BLKmode)
1890 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1891 emit_move_insn (orig_dst, dst);
1892 return;
1893 }
1894
1895 /* Check for a NULL entry, used to indicate that the parameter goes
1896 both on the stack and in registers. */
1897 if (XEXP (XVECEXP (src, 0, 0), 0))
1898 start = 0;
1899 else
1900 start = 1;
1901 finish = XVECLEN (src, 0);
1902
1903 tmps = XALLOCAVEC (rtx, finish);
1904
1905 /* Copy the (probable) hard regs into pseudos. */
1906 for (i = start; i < finish; i++)
1907 {
1908 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1909 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1910 {
1911 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1912 emit_move_insn (tmps[i], reg);
1913 }
1914 else
1915 tmps[i] = reg;
1916 }
1917
1918 /* If we won't be storing directly into memory, protect the real destination
1919 from strange tricks we might play. */
1920 dst = orig_dst;
1921 if (GET_CODE (dst) == PARALLEL)
1922 {
1923 rtx temp;
1924
1925 /* We can get a PARALLEL dst if there is a conditional expression in
1926 a return statement. In that case, the dst and src are the same,
1927 so no action is necessary. */
1928 if (rtx_equal_p (dst, src))
1929 return;
1930
1931 /* It is unclear if we can ever reach here, but we may as well handle
1932 it. Allocate a temporary, and split this into a store/load to/from
1933 the temporary. */
1934
1935 temp = assign_stack_temp (GET_MODE (dst), ssize);
1936 emit_group_store (temp, src, type, ssize);
1937 emit_group_load (dst, temp, type, ssize);
1938 return;
1939 }
1940 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1941 {
1942 enum machine_mode outer = GET_MODE (dst);
1943 enum machine_mode inner;
1944 HOST_WIDE_INT bytepos;
1945 bool done = false;
1946 rtx temp;
1947
1948 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1949 dst = gen_reg_rtx (outer);
1950
1951 /* Make life a bit easier for combine. */
1952 /* If the first element of the vector is the low part
1953 of the destination mode, use a paradoxical subreg to
1954 initialize the destination. */
1955 if (start < finish)
1956 {
1957 inner = GET_MODE (tmps[start]);
1958 bytepos = subreg_lowpart_offset (inner, outer);
1959 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1960 {
1961 temp = simplify_gen_subreg (outer, tmps[start],
1962 inner, 0);
1963 if (temp)
1964 {
1965 emit_move_insn (dst, temp);
1966 done = true;
1967 start++;
1968 }
1969 }
1970 }
1971
1972 /* If the first element wasn't the low part, try the last. */
1973 if (!done
1974 && start < finish - 1)
1975 {
1976 inner = GET_MODE (tmps[finish - 1]);
1977 bytepos = subreg_lowpart_offset (inner, outer);
1978 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1979 {
1980 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1981 inner, 0);
1982 if (temp)
1983 {
1984 emit_move_insn (dst, temp);
1985 done = true;
1986 finish--;
1987 }
1988 }
1989 }
1990
1991 /* Otherwise, simply initialize the result to zero. */
1992 if (!done)
1993 emit_move_insn (dst, CONST0_RTX (outer));
1994 }
1995
1996 /* Process the pieces. */
1997 for (i = start; i < finish; i++)
1998 {
1999 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2000 enum machine_mode mode = GET_MODE (tmps[i]);
2001 unsigned int bytelen = GET_MODE_SIZE (mode);
2002 unsigned int adj_bytelen = bytelen;
2003 rtx dest = dst;
2004
2005 /* Handle trailing fragments that run over the size of the struct. */
2006 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2007 adj_bytelen = ssize - bytepos;
2008
2009 if (GET_CODE (dst) == CONCAT)
2010 {
2011 if (bytepos + adj_bytelen
2012 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2013 dest = XEXP (dst, 0);
2014 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2015 {
2016 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2017 dest = XEXP (dst, 1);
2018 }
2019 else
2020 {
2021 enum machine_mode dest_mode = GET_MODE (dest);
2022 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2023
2024 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2025
2026 if (GET_MODE_ALIGNMENT (dest_mode)
2027 >= GET_MODE_ALIGNMENT (tmp_mode))
2028 {
2029 dest = assign_stack_temp (dest_mode,
2030 GET_MODE_SIZE (dest_mode));
2031 emit_move_insn (adjust_address (dest,
2032 tmp_mode,
2033 bytepos),
2034 tmps[i]);
2035 dst = dest;
2036 }
2037 else
2038 {
2039 dest = assign_stack_temp (tmp_mode,
2040 GET_MODE_SIZE (tmp_mode));
2041 emit_move_insn (dest, tmps[i]);
2042 dst = adjust_address (dest, dest_mode, bytepos);
2043 }
2044 break;
2045 }
2046 }
2047
2048 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2049 {
2050 /* store_bit_field always takes its value from the lsb.
2051 Move the fragment to the lsb if it's not already there. */
2052 if (
2053 #ifdef BLOCK_REG_PADDING
2054 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2055 == (BYTES_BIG_ENDIAN ? upward : downward)
2056 #else
2057 BYTES_BIG_ENDIAN
2058 #endif
2059 )
2060 {
2061 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2062 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2063 shift, tmps[i], 0);
2064 }
2065 bytelen = adj_bytelen;
2066 }
2067
2068 /* Optimize the access just a bit. */
2069 if (MEM_P (dest)
2070 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2071 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2072 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2073 && bytelen == GET_MODE_SIZE (mode))
2074 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2075 else
2076 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2077 0, 0, mode, tmps[i]);
2078 }
2079
2080 /* Copy from the pseudo into the (probable) hard reg. */
2081 if (orig_dst != dst)
2082 emit_move_insn (orig_dst, dst);
2083 }
2084
2085 /* Generate code to copy a BLKmode object of TYPE out of a
2086 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2087 is null, a stack temporary is created. TGTBLK is returned.
2088
2089 The purpose of this routine is to handle functions that return
2090 BLKmode structures in registers. Some machines (the PA for example)
2091 want to return all small structures in registers regardless of the
2092 structure's alignment. */
2093
2094 rtx
2095 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2096 {
2097 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2098 rtx src = NULL, dst = NULL;
2099 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2100 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2101 enum machine_mode copy_mode;
2102
2103 if (tgtblk == 0)
2104 {
2105 tgtblk = assign_temp (build_qualified_type (type,
2106 (TYPE_QUALS (type)
2107 | TYPE_QUAL_CONST)),
2108 1, 1);
2109 preserve_temp_slots (tgtblk);
2110 }
2111
2112 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2113 into a new pseudo which is a full word. */
2114
2115 if (GET_MODE (srcreg) != BLKmode
2116 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2117 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2118
2119 /* If the structure doesn't take up a whole number of words, see whether
2120 SRCREG is padded on the left or on the right. If it's on the left,
2121 set PADDING_CORRECTION to the number of bits to skip.
2122
2123 In most ABIs, the structure will be returned at the least end of
2124 the register, which translates to right padding on little-endian
2125 targets and left padding on big-endian targets. The opposite
2126 holds if the structure is returned at the most significant
2127 end of the register. */
2128 if (bytes % UNITS_PER_WORD != 0
2129 && (targetm.calls.return_in_msb (type)
2130 ? !BYTES_BIG_ENDIAN
2131 : BYTES_BIG_ENDIAN))
2132 padding_correction
2133 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2134
2135 /* Copy the structure BITSIZE bits at a time. If the target lives in
2136 memory, take care of not reading/writing past its end by selecting
2137 a copy mode suited to BITSIZE. This should always be possible given
2138 how it is computed.
2139
2140 We could probably emit more efficient code for machines which do not use
2141 strict alignment, but it doesn't seem worth the effort at the current
2142 time. */
2143
2144 copy_mode = word_mode;
2145 if (MEM_P (tgtblk))
2146 {
2147 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2148 if (mem_mode != BLKmode)
2149 copy_mode = mem_mode;
2150 }
2151
2152 for (bitpos = 0, xbitpos = padding_correction;
2153 bitpos < bytes * BITS_PER_UNIT;
2154 bitpos += bitsize, xbitpos += bitsize)
2155 {
2156 /* We need a new source operand each time xbitpos is on a
2157 word boundary and when xbitpos == padding_correction
2158 (the first time through). */
2159 if (xbitpos % BITS_PER_WORD == 0
2160 || xbitpos == padding_correction)
2161 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2162 GET_MODE (srcreg));
2163
2164 /* We need a new destination operand each time bitpos is on
2165 a word boundary. */
2166 if (bitpos % BITS_PER_WORD == 0)
2167 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2168
2169 /* Use xbitpos for the source extraction (right justified) and
2170 bitpos for the destination store (left justified). */
2171 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2172 extract_bit_field (src, bitsize,
2173 xbitpos % BITS_PER_WORD, 1, false,
2174 NULL_RTX, copy_mode, copy_mode));
2175 }
2176
2177 return tgtblk;
2178 }
2179
2180 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2181 register if it contains any data, otherwise return null.
2182
2183 This is used on targets that return BLKmode values in registers. */
2184
2185 rtx
2186 copy_blkmode_to_reg (enum machine_mode mode, tree src)
2187 {
2188 int i, n_regs;
2189 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2190 unsigned int bitsize;
2191 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2192 enum machine_mode dst_mode;
2193
2194 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2195
2196 x = expand_normal (src);
2197
2198 bytes = int_size_in_bytes (TREE_TYPE (src));
2199 if (bytes == 0)
2200 return NULL_RTX;
2201
2202 /* If the structure doesn't take up a whole number of words, see
2203 whether the register value should be padded on the left or on
2204 the right. Set PADDING_CORRECTION to the number of padding
2205 bits needed on the left side.
2206
2207 In most ABIs, the structure will be returned at the least end of
2208 the register, which translates to right padding on little-endian
2209 targets and left padding on big-endian targets. The opposite
2210 holds if the structure is returned at the most significant
2211 end of the register. */
2212 if (bytes % UNITS_PER_WORD != 0
2213 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2214 ? !BYTES_BIG_ENDIAN
2215 : BYTES_BIG_ENDIAN))
2216 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2217 * BITS_PER_UNIT));
2218
2219 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2220 dst_words = XALLOCAVEC (rtx, n_regs);
2221 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2222
2223 /* Copy the structure BITSIZE bits at a time. */
2224 for (bitpos = 0, xbitpos = padding_correction;
2225 bitpos < bytes * BITS_PER_UNIT;
2226 bitpos += bitsize, xbitpos += bitsize)
2227 {
2228 /* We need a new destination pseudo each time xbitpos is
2229 on a word boundary and when xbitpos == padding_correction
2230 (the first time through). */
2231 if (xbitpos % BITS_PER_WORD == 0
2232 || xbitpos == padding_correction)
2233 {
2234 /* Generate an appropriate register. */
2235 dst_word = gen_reg_rtx (word_mode);
2236 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2237
2238 /* Clear the destination before we move anything into it. */
2239 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2240 }
2241
2242 /* We need a new source operand each time bitpos is on a word
2243 boundary. */
2244 if (bitpos % BITS_PER_WORD == 0)
2245 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2246
2247 /* Use bitpos for the source extraction (left justified) and
2248 xbitpos for the destination store (right justified). */
2249 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2250 0, 0, word_mode,
2251 extract_bit_field (src_word, bitsize,
2252 bitpos % BITS_PER_WORD, 1, false,
2253 NULL_RTX, word_mode, word_mode));
2254 }
2255
2256 if (mode == BLKmode)
2257 {
2258 /* Find the smallest integer mode large enough to hold the
2259 entire structure. */
2260 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2261 mode != VOIDmode;
2262 mode = GET_MODE_WIDER_MODE (mode))
2263 /* Have we found a large enough mode? */
2264 if (GET_MODE_SIZE (mode) >= bytes)
2265 break;
2266
2267 /* A suitable mode should have been found. */
2268 gcc_assert (mode != VOIDmode);
2269 }
2270
2271 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2272 dst_mode = word_mode;
2273 else
2274 dst_mode = mode;
2275 dst = gen_reg_rtx (dst_mode);
2276
2277 for (i = 0; i < n_regs; i++)
2278 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2279
2280 if (mode != dst_mode)
2281 dst = gen_lowpart (mode, dst);
2282
2283 return dst;
2284 }
2285
2286 /* Add a USE expression for REG to the (possibly empty) list pointed
2287 to by CALL_FUSAGE. REG must denote a hard register. */
2288
2289 void
2290 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2291 {
2292 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2293
2294 *call_fusage
2295 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2296 }
2297
2298 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2299 starting at REGNO. All of these registers must be hard registers. */
2300
2301 void
2302 use_regs (rtx *call_fusage, int regno, int nregs)
2303 {
2304 int i;
2305
2306 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2307
2308 for (i = 0; i < nregs; i++)
2309 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2310 }
2311
2312 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2313 PARALLEL REGS. This is for calls that pass values in multiple
2314 non-contiguous locations. The Irix 6 ABI has examples of this. */
2315
2316 void
2317 use_group_regs (rtx *call_fusage, rtx regs)
2318 {
2319 int i;
2320
2321 for (i = 0; i < XVECLEN (regs, 0); i++)
2322 {
2323 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2324
2325 /* A NULL entry means the parameter goes both on the stack and in
2326 registers. This can also be a MEM for targets that pass values
2327 partially on the stack and partially in registers. */
2328 if (reg != 0 && REG_P (reg))
2329 use_reg (call_fusage, reg);
2330 }
2331 }
2332
2333 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2334 assigment and the code of the expresion on the RHS is CODE. Return
2335 NULL otherwise. */
2336
2337 static gimple
2338 get_def_for_expr (tree name, enum tree_code code)
2339 {
2340 gimple def_stmt;
2341
2342 if (TREE_CODE (name) != SSA_NAME)
2343 return NULL;
2344
2345 def_stmt = get_gimple_for_ssa_name (name);
2346 if (!def_stmt
2347 || gimple_assign_rhs_code (def_stmt) != code)
2348 return NULL;
2349
2350 return def_stmt;
2351 }
2352
2353 #ifdef HAVE_conditional_move
2354 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2355 assigment and the class of the expresion on the RHS is CLASS. Return
2356 NULL otherwise. */
2357
2358 static gimple
2359 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2360 {
2361 gimple def_stmt;
2362
2363 if (TREE_CODE (name) != SSA_NAME)
2364 return NULL;
2365
2366 def_stmt = get_gimple_for_ssa_name (name);
2367 if (!def_stmt
2368 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2369 return NULL;
2370
2371 return def_stmt;
2372 }
2373 #endif
2374 \f
2375
2376 /* Determine whether the LEN bytes generated by CONSTFUN can be
2377 stored to memory using several move instructions. CONSTFUNDATA is
2378 a pointer which will be passed as argument in every CONSTFUN call.
2379 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2380 a memset operation and false if it's a copy of a constant string.
2381 Return nonzero if a call to store_by_pieces should succeed. */
2382
2383 int
2384 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2385 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2386 void *constfundata, unsigned int align, bool memsetp)
2387 {
2388 unsigned HOST_WIDE_INT l;
2389 unsigned int max_size;
2390 HOST_WIDE_INT offset = 0;
2391 enum machine_mode mode;
2392 enum insn_code icode;
2393 int reverse;
2394 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2395 rtx cst ATTRIBUTE_UNUSED;
2396
2397 if (len == 0)
2398 return 1;
2399
2400 if (! (memsetp
2401 ? SET_BY_PIECES_P (len, align)
2402 : STORE_BY_PIECES_P (len, align)))
2403 return 0;
2404
2405 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2406
2407 /* We would first store what we can in the largest integer mode, then go to
2408 successively smaller modes. */
2409
2410 for (reverse = 0;
2411 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2412 reverse++)
2413 {
2414 l = len;
2415 max_size = STORE_MAX_PIECES + 1;
2416 while (max_size > 1)
2417 {
2418 mode = widest_int_mode_for_size (max_size);
2419
2420 if (mode == VOIDmode)
2421 break;
2422
2423 icode = optab_handler (mov_optab, mode);
2424 if (icode != CODE_FOR_nothing
2425 && align >= GET_MODE_ALIGNMENT (mode))
2426 {
2427 unsigned int size = GET_MODE_SIZE (mode);
2428
2429 while (l >= size)
2430 {
2431 if (reverse)
2432 offset -= size;
2433
2434 cst = (*constfun) (constfundata, offset, mode);
2435 if (!targetm.legitimate_constant_p (mode, cst))
2436 return 0;
2437
2438 if (!reverse)
2439 offset += size;
2440
2441 l -= size;
2442 }
2443 }
2444
2445 max_size = GET_MODE_SIZE (mode);
2446 }
2447
2448 /* The code above should have handled everything. */
2449 gcc_assert (!l);
2450 }
2451
2452 return 1;
2453 }
2454
2455 /* Generate several move instructions to store LEN bytes generated by
2456 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2457 pointer which will be passed as argument in every CONSTFUN call.
2458 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2459 a memset operation and false if it's a copy of a constant string.
2460 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2461 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2462 stpcpy. */
2463
2464 rtx
2465 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2466 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2467 void *constfundata, unsigned int align, bool memsetp, int endp)
2468 {
2469 enum machine_mode to_addr_mode = get_address_mode (to);
2470 struct store_by_pieces_d data;
2471
2472 if (len == 0)
2473 {
2474 gcc_assert (endp != 2);
2475 return to;
2476 }
2477
2478 gcc_assert (memsetp
2479 ? SET_BY_PIECES_P (len, align)
2480 : STORE_BY_PIECES_P (len, align));
2481 data.constfun = constfun;
2482 data.constfundata = constfundata;
2483 data.len = len;
2484 data.to = to;
2485 store_by_pieces_1 (&data, align);
2486 if (endp)
2487 {
2488 rtx to1;
2489
2490 gcc_assert (!data.reverse);
2491 if (data.autinc_to)
2492 {
2493 if (endp == 2)
2494 {
2495 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2496 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2497 else
2498 data.to_addr = copy_to_mode_reg (to_addr_mode,
2499 plus_constant (to_addr_mode,
2500 data.to_addr,
2501 -1));
2502 }
2503 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2504 data.offset);
2505 }
2506 else
2507 {
2508 if (endp == 2)
2509 --data.offset;
2510 to1 = adjust_address (data.to, QImode, data.offset);
2511 }
2512 return to1;
2513 }
2514 else
2515 return data.to;
2516 }
2517
2518 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2519 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2520
2521 static void
2522 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2523 {
2524 struct store_by_pieces_d data;
2525
2526 if (len == 0)
2527 return;
2528
2529 data.constfun = clear_by_pieces_1;
2530 data.constfundata = NULL;
2531 data.len = len;
2532 data.to = to;
2533 store_by_pieces_1 (&data, align);
2534 }
2535
2536 /* Callback routine for clear_by_pieces.
2537 Return const0_rtx unconditionally. */
2538
2539 static rtx
2540 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2541 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2542 enum machine_mode mode ATTRIBUTE_UNUSED)
2543 {
2544 return const0_rtx;
2545 }
2546
2547 /* Subroutine of clear_by_pieces and store_by_pieces.
2548 Generate several move instructions to store LEN bytes of block TO. (A MEM
2549 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2550
2551 static void
2552 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2553 unsigned int align ATTRIBUTE_UNUSED)
2554 {
2555 enum machine_mode to_addr_mode = get_address_mode (data->to);
2556 rtx to_addr = XEXP (data->to, 0);
2557 unsigned int max_size = STORE_MAX_PIECES + 1;
2558 enum insn_code icode;
2559
2560 data->offset = 0;
2561 data->to_addr = to_addr;
2562 data->autinc_to
2563 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2564 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2565
2566 data->explicit_inc_to = 0;
2567 data->reverse
2568 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2569 if (data->reverse)
2570 data->offset = data->len;
2571
2572 /* If storing requires more than two move insns,
2573 copy addresses to registers (to make displacements shorter)
2574 and use post-increment if available. */
2575 if (!data->autinc_to
2576 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2577 {
2578 /* Determine the main mode we'll be using.
2579 MODE might not be used depending on the definitions of the
2580 USE_* macros below. */
2581 enum machine_mode mode ATTRIBUTE_UNUSED
2582 = widest_int_mode_for_size (max_size);
2583
2584 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2585 {
2586 data->to_addr = copy_to_mode_reg (to_addr_mode,
2587 plus_constant (to_addr_mode,
2588 to_addr,
2589 data->len));
2590 data->autinc_to = 1;
2591 data->explicit_inc_to = -1;
2592 }
2593
2594 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2595 && ! data->autinc_to)
2596 {
2597 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2598 data->autinc_to = 1;
2599 data->explicit_inc_to = 1;
2600 }
2601
2602 if ( !data->autinc_to && CONSTANT_P (to_addr))
2603 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2604 }
2605
2606 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2607
2608 /* First store what we can in the largest integer mode, then go to
2609 successively smaller modes. */
2610
2611 while (max_size > 1)
2612 {
2613 enum machine_mode mode = widest_int_mode_for_size (max_size);
2614
2615 if (mode == VOIDmode)
2616 break;
2617
2618 icode = optab_handler (mov_optab, mode);
2619 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2620 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2621
2622 max_size = GET_MODE_SIZE (mode);
2623 }
2624
2625 /* The code above should have handled everything. */
2626 gcc_assert (!data->len);
2627 }
2628
2629 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2630 with move instructions for mode MODE. GENFUN is the gen_... function
2631 to make a move insn for that mode. DATA has all the other info. */
2632
2633 static void
2634 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2635 struct store_by_pieces_d *data)
2636 {
2637 unsigned int size = GET_MODE_SIZE (mode);
2638 rtx to1, cst;
2639
2640 while (data->len >= size)
2641 {
2642 if (data->reverse)
2643 data->offset -= size;
2644
2645 if (data->autinc_to)
2646 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2647 data->offset);
2648 else
2649 to1 = adjust_address (data->to, mode, data->offset);
2650
2651 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2652 emit_insn (gen_add2_insn (data->to_addr,
2653 GEN_INT (-(HOST_WIDE_INT) size)));
2654
2655 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2656 emit_insn ((*genfun) (to1, cst));
2657
2658 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2659 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2660
2661 if (! data->reverse)
2662 data->offset += size;
2663
2664 data->len -= size;
2665 }
2666 }
2667 \f
2668 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2669 its length in bytes. */
2670
2671 rtx
2672 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2673 unsigned int expected_align, HOST_WIDE_INT expected_size)
2674 {
2675 enum machine_mode mode = GET_MODE (object);
2676 unsigned int align;
2677
2678 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2679
2680 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2681 just move a zero. Otherwise, do this a piece at a time. */
2682 if (mode != BLKmode
2683 && CONST_INT_P (size)
2684 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2685 {
2686 rtx zero = CONST0_RTX (mode);
2687 if (zero != NULL)
2688 {
2689 emit_move_insn (object, zero);
2690 return NULL;
2691 }
2692
2693 if (COMPLEX_MODE_P (mode))
2694 {
2695 zero = CONST0_RTX (GET_MODE_INNER (mode));
2696 if (zero != NULL)
2697 {
2698 write_complex_part (object, zero, 0);
2699 write_complex_part (object, zero, 1);
2700 return NULL;
2701 }
2702 }
2703 }
2704
2705 if (size == const0_rtx)
2706 return NULL;
2707
2708 align = MEM_ALIGN (object);
2709
2710 if (CONST_INT_P (size)
2711 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2712 clear_by_pieces (object, INTVAL (size), align);
2713 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2714 expected_align, expected_size))
2715 ;
2716 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2717 return set_storage_via_libcall (object, size, const0_rtx,
2718 method == BLOCK_OP_TAILCALL);
2719 else
2720 gcc_unreachable ();
2721
2722 return NULL;
2723 }
2724
2725 rtx
2726 clear_storage (rtx object, rtx size, enum block_op_methods method)
2727 {
2728 return clear_storage_hints (object, size, method, 0, -1);
2729 }
2730
2731
2732 /* A subroutine of clear_storage. Expand a call to memset.
2733 Return the return value of memset, 0 otherwise. */
2734
2735 rtx
2736 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2737 {
2738 tree call_expr, fn, object_tree, size_tree, val_tree;
2739 enum machine_mode size_mode;
2740 rtx retval;
2741
2742 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2743 place those into new pseudos into a VAR_DECL and use them later. */
2744
2745 object = copy_addr_to_reg (XEXP (object, 0));
2746
2747 size_mode = TYPE_MODE (sizetype);
2748 size = convert_to_mode (size_mode, size, 1);
2749 size = copy_to_mode_reg (size_mode, size);
2750
2751 /* It is incorrect to use the libcall calling conventions to call
2752 memset in this context. This could be a user call to memset and
2753 the user may wish to examine the return value from memset. For
2754 targets where libcalls and normal calls have different conventions
2755 for returning pointers, we could end up generating incorrect code. */
2756
2757 object_tree = make_tree (ptr_type_node, object);
2758 if (!CONST_INT_P (val))
2759 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2760 size_tree = make_tree (sizetype, size);
2761 val_tree = make_tree (integer_type_node, val);
2762
2763 fn = clear_storage_libcall_fn (true);
2764 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2765 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2766
2767 retval = expand_normal (call_expr);
2768
2769 return retval;
2770 }
2771
2772 /* A subroutine of set_storage_via_libcall. Create the tree node
2773 for the function we use for block clears. */
2774
2775 tree block_clear_fn;
2776
2777 void
2778 init_block_clear_fn (const char *asmspec)
2779 {
2780 if (!block_clear_fn)
2781 {
2782 tree fn, args;
2783
2784 fn = get_identifier ("memset");
2785 args = build_function_type_list (ptr_type_node, ptr_type_node,
2786 integer_type_node, sizetype,
2787 NULL_TREE);
2788
2789 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2790 DECL_EXTERNAL (fn) = 1;
2791 TREE_PUBLIC (fn) = 1;
2792 DECL_ARTIFICIAL (fn) = 1;
2793 TREE_NOTHROW (fn) = 1;
2794 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2795 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2796
2797 block_clear_fn = fn;
2798 }
2799
2800 if (asmspec)
2801 set_user_assembler_name (block_clear_fn, asmspec);
2802 }
2803
2804 static tree
2805 clear_storage_libcall_fn (int for_call)
2806 {
2807 static bool emitted_extern;
2808
2809 if (!block_clear_fn)
2810 init_block_clear_fn (NULL);
2811
2812 if (for_call && !emitted_extern)
2813 {
2814 emitted_extern = true;
2815 make_decl_rtl (block_clear_fn);
2816 }
2817
2818 return block_clear_fn;
2819 }
2820 \f
2821 /* Expand a setmem pattern; return true if successful. */
2822
2823 bool
2824 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2825 unsigned int expected_align, HOST_WIDE_INT expected_size)
2826 {
2827 /* Try the most limited insn first, because there's no point
2828 including more than one in the machine description unless
2829 the more limited one has some advantage. */
2830
2831 enum machine_mode mode;
2832
2833 if (expected_align < align)
2834 expected_align = align;
2835
2836 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2837 mode = GET_MODE_WIDER_MODE (mode))
2838 {
2839 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2840
2841 if (code != CODE_FOR_nothing
2842 /* We don't need MODE to be narrower than
2843 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2844 the mode mask, as it is returned by the macro, it will
2845 definitely be less than the actual mode mask. */
2846 && ((CONST_INT_P (size)
2847 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2848 <= (GET_MODE_MASK (mode) >> 1)))
2849 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2850 {
2851 struct expand_operand ops[6];
2852 unsigned int nops;
2853
2854 nops = insn_data[(int) code].n_generator_args;
2855 gcc_assert (nops == 4 || nops == 6);
2856
2857 create_fixed_operand (&ops[0], object);
2858 /* The check above guarantees that this size conversion is valid. */
2859 create_convert_operand_to (&ops[1], size, mode, true);
2860 create_convert_operand_from (&ops[2], val, byte_mode, true);
2861 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2862 if (nops == 6)
2863 {
2864 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2865 create_integer_operand (&ops[5], expected_size);
2866 }
2867 if (maybe_expand_insn (code, nops, ops))
2868 return true;
2869 }
2870 }
2871
2872 return false;
2873 }
2874
2875 \f
2876 /* Write to one of the components of the complex value CPLX. Write VAL to
2877 the real part if IMAG_P is false, and the imaginary part if its true. */
2878
2879 static void
2880 write_complex_part (rtx cplx, rtx val, bool imag_p)
2881 {
2882 enum machine_mode cmode;
2883 enum machine_mode imode;
2884 unsigned ibitsize;
2885
2886 if (GET_CODE (cplx) == CONCAT)
2887 {
2888 emit_move_insn (XEXP (cplx, imag_p), val);
2889 return;
2890 }
2891
2892 cmode = GET_MODE (cplx);
2893 imode = GET_MODE_INNER (cmode);
2894 ibitsize = GET_MODE_BITSIZE (imode);
2895
2896 /* For MEMs simplify_gen_subreg may generate an invalid new address
2897 because, e.g., the original address is considered mode-dependent
2898 by the target, which restricts simplify_subreg from invoking
2899 adjust_address_nv. Instead of preparing fallback support for an
2900 invalid address, we call adjust_address_nv directly. */
2901 if (MEM_P (cplx))
2902 {
2903 emit_move_insn (adjust_address_nv (cplx, imode,
2904 imag_p ? GET_MODE_SIZE (imode) : 0),
2905 val);
2906 return;
2907 }
2908
2909 /* If the sub-object is at least word sized, then we know that subregging
2910 will work. This special case is important, since store_bit_field
2911 wants to operate on integer modes, and there's rarely an OImode to
2912 correspond to TCmode. */
2913 if (ibitsize >= BITS_PER_WORD
2914 /* For hard regs we have exact predicates. Assume we can split
2915 the original object if it spans an even number of hard regs.
2916 This special case is important for SCmode on 64-bit platforms
2917 where the natural size of floating-point regs is 32-bit. */
2918 || (REG_P (cplx)
2919 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2920 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2921 {
2922 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2923 imag_p ? GET_MODE_SIZE (imode) : 0);
2924 if (part)
2925 {
2926 emit_move_insn (part, val);
2927 return;
2928 }
2929 else
2930 /* simplify_gen_subreg may fail for sub-word MEMs. */
2931 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2932 }
2933
2934 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2935 }
2936
2937 /* Extract one of the components of the complex value CPLX. Extract the
2938 real part if IMAG_P is false, and the imaginary part if it's true. */
2939
2940 static rtx
2941 read_complex_part (rtx cplx, bool imag_p)
2942 {
2943 enum machine_mode cmode, imode;
2944 unsigned ibitsize;
2945
2946 if (GET_CODE (cplx) == CONCAT)
2947 return XEXP (cplx, imag_p);
2948
2949 cmode = GET_MODE (cplx);
2950 imode = GET_MODE_INNER (cmode);
2951 ibitsize = GET_MODE_BITSIZE (imode);
2952
2953 /* Special case reads from complex constants that got spilled to memory. */
2954 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2955 {
2956 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2957 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2958 {
2959 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2960 if (CONSTANT_CLASS_P (part))
2961 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2962 }
2963 }
2964
2965 /* For MEMs simplify_gen_subreg may generate an invalid new address
2966 because, e.g., the original address is considered mode-dependent
2967 by the target, which restricts simplify_subreg from invoking
2968 adjust_address_nv. Instead of preparing fallback support for an
2969 invalid address, we call adjust_address_nv directly. */
2970 if (MEM_P (cplx))
2971 return adjust_address_nv (cplx, imode,
2972 imag_p ? GET_MODE_SIZE (imode) : 0);
2973
2974 /* If the sub-object is at least word sized, then we know that subregging
2975 will work. This special case is important, since extract_bit_field
2976 wants to operate on integer modes, and there's rarely an OImode to
2977 correspond to TCmode. */
2978 if (ibitsize >= BITS_PER_WORD
2979 /* For hard regs we have exact predicates. Assume we can split
2980 the original object if it spans an even number of hard regs.
2981 This special case is important for SCmode on 64-bit platforms
2982 where the natural size of floating-point regs is 32-bit. */
2983 || (REG_P (cplx)
2984 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2985 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2986 {
2987 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2988 imag_p ? GET_MODE_SIZE (imode) : 0);
2989 if (ret)
2990 return ret;
2991 else
2992 /* simplify_gen_subreg may fail for sub-word MEMs. */
2993 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2994 }
2995
2996 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2997 true, false, NULL_RTX, imode, imode);
2998 }
2999 \f
3000 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3001 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3002 represented in NEW_MODE. If FORCE is true, this will never happen, as
3003 we'll force-create a SUBREG if needed. */
3004
3005 static rtx
3006 emit_move_change_mode (enum machine_mode new_mode,
3007 enum machine_mode old_mode, rtx x, bool force)
3008 {
3009 rtx ret;
3010
3011 if (push_operand (x, GET_MODE (x)))
3012 {
3013 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3014 MEM_COPY_ATTRIBUTES (ret, x);
3015 }
3016 else if (MEM_P (x))
3017 {
3018 /* We don't have to worry about changing the address since the
3019 size in bytes is supposed to be the same. */
3020 if (reload_in_progress)
3021 {
3022 /* Copy the MEM to change the mode and move any
3023 substitutions from the old MEM to the new one. */
3024 ret = adjust_address_nv (x, new_mode, 0);
3025 copy_replacements (x, ret);
3026 }
3027 else
3028 ret = adjust_address (x, new_mode, 0);
3029 }
3030 else
3031 {
3032 /* Note that we do want simplify_subreg's behavior of validating
3033 that the new mode is ok for a hard register. If we were to use
3034 simplify_gen_subreg, we would create the subreg, but would
3035 probably run into the target not being able to implement it. */
3036 /* Except, of course, when FORCE is true, when this is exactly what
3037 we want. Which is needed for CCmodes on some targets. */
3038 if (force)
3039 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3040 else
3041 ret = simplify_subreg (new_mode, x, old_mode, 0);
3042 }
3043
3044 return ret;
3045 }
3046
3047 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3048 an integer mode of the same size as MODE. Returns the instruction
3049 emitted, or NULL if such a move could not be generated. */
3050
3051 static rtx
3052 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3053 {
3054 enum machine_mode imode;
3055 enum insn_code code;
3056
3057 /* There must exist a mode of the exact size we require. */
3058 imode = int_mode_for_mode (mode);
3059 if (imode == BLKmode)
3060 return NULL_RTX;
3061
3062 /* The target must support moves in this mode. */
3063 code = optab_handler (mov_optab, imode);
3064 if (code == CODE_FOR_nothing)
3065 return NULL_RTX;
3066
3067 x = emit_move_change_mode (imode, mode, x, force);
3068 if (x == NULL_RTX)
3069 return NULL_RTX;
3070 y = emit_move_change_mode (imode, mode, y, force);
3071 if (y == NULL_RTX)
3072 return NULL_RTX;
3073 return emit_insn (GEN_FCN (code) (x, y));
3074 }
3075
3076 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3077 Return an equivalent MEM that does not use an auto-increment. */
3078
3079 static rtx
3080 emit_move_resolve_push (enum machine_mode mode, rtx x)
3081 {
3082 enum rtx_code code = GET_CODE (XEXP (x, 0));
3083 HOST_WIDE_INT adjust;
3084 rtx temp;
3085
3086 adjust = GET_MODE_SIZE (mode);
3087 #ifdef PUSH_ROUNDING
3088 adjust = PUSH_ROUNDING (adjust);
3089 #endif
3090 if (code == PRE_DEC || code == POST_DEC)
3091 adjust = -adjust;
3092 else if (code == PRE_MODIFY || code == POST_MODIFY)
3093 {
3094 rtx expr = XEXP (XEXP (x, 0), 1);
3095 HOST_WIDE_INT val;
3096
3097 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3098 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3099 val = INTVAL (XEXP (expr, 1));
3100 if (GET_CODE (expr) == MINUS)
3101 val = -val;
3102 gcc_assert (adjust == val || adjust == -val);
3103 adjust = val;
3104 }
3105
3106 /* Do not use anti_adjust_stack, since we don't want to update
3107 stack_pointer_delta. */
3108 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3109 GEN_INT (adjust), stack_pointer_rtx,
3110 0, OPTAB_LIB_WIDEN);
3111 if (temp != stack_pointer_rtx)
3112 emit_move_insn (stack_pointer_rtx, temp);
3113
3114 switch (code)
3115 {
3116 case PRE_INC:
3117 case PRE_DEC:
3118 case PRE_MODIFY:
3119 temp = stack_pointer_rtx;
3120 break;
3121 case POST_INC:
3122 case POST_DEC:
3123 case POST_MODIFY:
3124 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3125 break;
3126 default:
3127 gcc_unreachable ();
3128 }
3129
3130 return replace_equiv_address (x, temp);
3131 }
3132
3133 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3134 X is known to satisfy push_operand, and MODE is known to be complex.
3135 Returns the last instruction emitted. */
3136
3137 rtx
3138 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3139 {
3140 enum machine_mode submode = GET_MODE_INNER (mode);
3141 bool imag_first;
3142
3143 #ifdef PUSH_ROUNDING
3144 unsigned int submodesize = GET_MODE_SIZE (submode);
3145
3146 /* In case we output to the stack, but the size is smaller than the
3147 machine can push exactly, we need to use move instructions. */
3148 if (PUSH_ROUNDING (submodesize) != submodesize)
3149 {
3150 x = emit_move_resolve_push (mode, x);
3151 return emit_move_insn (x, y);
3152 }
3153 #endif
3154
3155 /* Note that the real part always precedes the imag part in memory
3156 regardless of machine's endianness. */
3157 switch (GET_CODE (XEXP (x, 0)))
3158 {
3159 case PRE_DEC:
3160 case POST_DEC:
3161 imag_first = true;
3162 break;
3163 case PRE_INC:
3164 case POST_INC:
3165 imag_first = false;
3166 break;
3167 default:
3168 gcc_unreachable ();
3169 }
3170
3171 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3172 read_complex_part (y, imag_first));
3173 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3174 read_complex_part (y, !imag_first));
3175 }
3176
3177 /* A subroutine of emit_move_complex. Perform the move from Y to X
3178 via two moves of the parts. Returns the last instruction emitted. */
3179
3180 rtx
3181 emit_move_complex_parts (rtx x, rtx y)
3182 {
3183 /* Show the output dies here. This is necessary for SUBREGs
3184 of pseudos since we cannot track their lifetimes correctly;
3185 hard regs shouldn't appear here except as return values. */
3186 if (!reload_completed && !reload_in_progress
3187 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3188 emit_clobber (x);
3189
3190 write_complex_part (x, read_complex_part (y, false), false);
3191 write_complex_part (x, read_complex_part (y, true), true);
3192
3193 return get_last_insn ();
3194 }
3195
3196 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3197 MODE is known to be complex. Returns the last instruction emitted. */
3198
3199 static rtx
3200 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3201 {
3202 bool try_int;
3203
3204 /* Need to take special care for pushes, to maintain proper ordering
3205 of the data, and possibly extra padding. */
3206 if (push_operand (x, mode))
3207 return emit_move_complex_push (mode, x, y);
3208
3209 /* See if we can coerce the target into moving both values at once. */
3210
3211 /* Move floating point as parts. */
3212 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3213 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3214 try_int = false;
3215 /* Not possible if the values are inherently not adjacent. */
3216 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3217 try_int = false;
3218 /* Is possible if both are registers (or subregs of registers). */
3219 else if (register_operand (x, mode) && register_operand (y, mode))
3220 try_int = true;
3221 /* If one of the operands is a memory, and alignment constraints
3222 are friendly enough, we may be able to do combined memory operations.
3223 We do not attempt this if Y is a constant because that combination is
3224 usually better with the by-parts thing below. */
3225 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3226 && (!STRICT_ALIGNMENT
3227 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3228 try_int = true;
3229 else
3230 try_int = false;
3231
3232 if (try_int)
3233 {
3234 rtx ret;
3235
3236 /* For memory to memory moves, optimal behavior can be had with the
3237 existing block move logic. */
3238 if (MEM_P (x) && MEM_P (y))
3239 {
3240 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3241 BLOCK_OP_NO_LIBCALL);
3242 return get_last_insn ();
3243 }
3244
3245 ret = emit_move_via_integer (mode, x, y, true);
3246 if (ret)
3247 return ret;
3248 }
3249
3250 return emit_move_complex_parts (x, y);
3251 }
3252
3253 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3254 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3255
3256 static rtx
3257 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3258 {
3259 rtx ret;
3260
3261 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3262 if (mode != CCmode)
3263 {
3264 enum insn_code code = optab_handler (mov_optab, CCmode);
3265 if (code != CODE_FOR_nothing)
3266 {
3267 x = emit_move_change_mode (CCmode, mode, x, true);
3268 y = emit_move_change_mode (CCmode, mode, y, true);
3269 return emit_insn (GEN_FCN (code) (x, y));
3270 }
3271 }
3272
3273 /* Otherwise, find the MODE_INT mode of the same width. */
3274 ret = emit_move_via_integer (mode, x, y, false);
3275 gcc_assert (ret != NULL);
3276 return ret;
3277 }
3278
3279 /* Return true if word I of OP lies entirely in the
3280 undefined bits of a paradoxical subreg. */
3281
3282 static bool
3283 undefined_operand_subword_p (const_rtx op, int i)
3284 {
3285 enum machine_mode innermode, innermostmode;
3286 int offset;
3287 if (GET_CODE (op) != SUBREG)
3288 return false;
3289 innermode = GET_MODE (op);
3290 innermostmode = GET_MODE (SUBREG_REG (op));
3291 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3292 /* The SUBREG_BYTE represents offset, as if the value were stored in
3293 memory, except for a paradoxical subreg where we define
3294 SUBREG_BYTE to be 0; undo this exception as in
3295 simplify_subreg. */
3296 if (SUBREG_BYTE (op) == 0
3297 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3298 {
3299 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3300 if (WORDS_BIG_ENDIAN)
3301 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3302 if (BYTES_BIG_ENDIAN)
3303 offset += difference % UNITS_PER_WORD;
3304 }
3305 if (offset >= GET_MODE_SIZE (innermostmode)
3306 || offset <= -GET_MODE_SIZE (word_mode))
3307 return true;
3308 return false;
3309 }
3310
3311 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3312 MODE is any multi-word or full-word mode that lacks a move_insn
3313 pattern. Note that you will get better code if you define such
3314 patterns, even if they must turn into multiple assembler instructions. */
3315
3316 static rtx
3317 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3318 {
3319 rtx last_insn = 0;
3320 rtx seq, inner;
3321 bool need_clobber;
3322 int i;
3323
3324 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3325
3326 /* If X is a push on the stack, do the push now and replace
3327 X with a reference to the stack pointer. */
3328 if (push_operand (x, mode))
3329 x = emit_move_resolve_push (mode, x);
3330
3331 /* If we are in reload, see if either operand is a MEM whose address
3332 is scheduled for replacement. */
3333 if (reload_in_progress && MEM_P (x)
3334 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3335 x = replace_equiv_address_nv (x, inner);
3336 if (reload_in_progress && MEM_P (y)
3337 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3338 y = replace_equiv_address_nv (y, inner);
3339
3340 start_sequence ();
3341
3342 need_clobber = false;
3343 for (i = 0;
3344 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3345 i++)
3346 {
3347 rtx xpart = operand_subword (x, i, 1, mode);
3348 rtx ypart;
3349
3350 /* Do not generate code for a move if it would come entirely
3351 from the undefined bits of a paradoxical subreg. */
3352 if (undefined_operand_subword_p (y, i))
3353 continue;
3354
3355 ypart = operand_subword (y, i, 1, mode);
3356
3357 /* If we can't get a part of Y, put Y into memory if it is a
3358 constant. Otherwise, force it into a register. Then we must
3359 be able to get a part of Y. */
3360 if (ypart == 0 && CONSTANT_P (y))
3361 {
3362 y = use_anchored_address (force_const_mem (mode, y));
3363 ypart = operand_subword (y, i, 1, mode);
3364 }
3365 else if (ypart == 0)
3366 ypart = operand_subword_force (y, i, mode);
3367
3368 gcc_assert (xpart && ypart);
3369
3370 need_clobber |= (GET_CODE (xpart) == SUBREG);
3371
3372 last_insn = emit_move_insn (xpart, ypart);
3373 }
3374
3375 seq = get_insns ();
3376 end_sequence ();
3377
3378 /* Show the output dies here. This is necessary for SUBREGs
3379 of pseudos since we cannot track their lifetimes correctly;
3380 hard regs shouldn't appear here except as return values.
3381 We never want to emit such a clobber after reload. */
3382 if (x != y
3383 && ! (reload_in_progress || reload_completed)
3384 && need_clobber != 0)
3385 emit_clobber (x);
3386
3387 emit_insn (seq);
3388
3389 return last_insn;
3390 }
3391
3392 /* Low level part of emit_move_insn.
3393 Called just like emit_move_insn, but assumes X and Y
3394 are basically valid. */
3395
3396 rtx
3397 emit_move_insn_1 (rtx x, rtx y)
3398 {
3399 enum machine_mode mode = GET_MODE (x);
3400 enum insn_code code;
3401
3402 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3403
3404 code = optab_handler (mov_optab, mode);
3405 if (code != CODE_FOR_nothing)
3406 return emit_insn (GEN_FCN (code) (x, y));
3407
3408 /* Expand complex moves by moving real part and imag part. */
3409 if (COMPLEX_MODE_P (mode))
3410 return emit_move_complex (mode, x, y);
3411
3412 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3413 || ALL_FIXED_POINT_MODE_P (mode))
3414 {
3415 rtx result = emit_move_via_integer (mode, x, y, true);
3416
3417 /* If we can't find an integer mode, use multi words. */
3418 if (result)
3419 return result;
3420 else
3421 return emit_move_multi_word (mode, x, y);
3422 }
3423
3424 if (GET_MODE_CLASS (mode) == MODE_CC)
3425 return emit_move_ccmode (mode, x, y);
3426
3427 /* Try using a move pattern for the corresponding integer mode. This is
3428 only safe when simplify_subreg can convert MODE constants into integer
3429 constants. At present, it can only do this reliably if the value
3430 fits within a HOST_WIDE_INT. */
3431 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3432 {
3433 rtx ret = emit_move_via_integer (mode, x, y, false);
3434 if (ret)
3435 return ret;
3436 }
3437
3438 return emit_move_multi_word (mode, x, y);
3439 }
3440
3441 /* Generate code to copy Y into X.
3442 Both Y and X must have the same mode, except that
3443 Y can be a constant with VOIDmode.
3444 This mode cannot be BLKmode; use emit_block_move for that.
3445
3446 Return the last instruction emitted. */
3447
3448 rtx
3449 emit_move_insn (rtx x, rtx y)
3450 {
3451 enum machine_mode mode = GET_MODE (x);
3452 rtx y_cst = NULL_RTX;
3453 rtx last_insn, set;
3454
3455 gcc_assert (mode != BLKmode
3456 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3457
3458 if (CONSTANT_P (y))
3459 {
3460 if (optimize
3461 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3462 && (last_insn = compress_float_constant (x, y)))
3463 return last_insn;
3464
3465 y_cst = y;
3466
3467 if (!targetm.legitimate_constant_p (mode, y))
3468 {
3469 y = force_const_mem (mode, y);
3470
3471 /* If the target's cannot_force_const_mem prevented the spill,
3472 assume that the target's move expanders will also take care
3473 of the non-legitimate constant. */
3474 if (!y)
3475 y = y_cst;
3476 else
3477 y = use_anchored_address (y);
3478 }
3479 }
3480
3481 /* If X or Y are memory references, verify that their addresses are valid
3482 for the machine. */
3483 if (MEM_P (x)
3484 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3485 MEM_ADDR_SPACE (x))
3486 && ! push_operand (x, GET_MODE (x))))
3487 x = validize_mem (x);
3488
3489 if (MEM_P (y)
3490 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3491 MEM_ADDR_SPACE (y)))
3492 y = validize_mem (y);
3493
3494 gcc_assert (mode != BLKmode);
3495
3496 last_insn = emit_move_insn_1 (x, y);
3497
3498 if (y_cst && REG_P (x)
3499 && (set = single_set (last_insn)) != NULL_RTX
3500 && SET_DEST (set) == x
3501 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3502 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3503
3504 return last_insn;
3505 }
3506
3507 /* If Y is representable exactly in a narrower mode, and the target can
3508 perform the extension directly from constant or memory, then emit the
3509 move as an extension. */
3510
3511 static rtx
3512 compress_float_constant (rtx x, rtx y)
3513 {
3514 enum machine_mode dstmode = GET_MODE (x);
3515 enum machine_mode orig_srcmode = GET_MODE (y);
3516 enum machine_mode srcmode;
3517 REAL_VALUE_TYPE r;
3518 int oldcost, newcost;
3519 bool speed = optimize_insn_for_speed_p ();
3520
3521 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3522
3523 if (targetm.legitimate_constant_p (dstmode, y))
3524 oldcost = set_src_cost (y, speed);
3525 else
3526 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3527
3528 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3529 srcmode != orig_srcmode;
3530 srcmode = GET_MODE_WIDER_MODE (srcmode))
3531 {
3532 enum insn_code ic;
3533 rtx trunc_y, last_insn;
3534
3535 /* Skip if the target can't extend this way. */
3536 ic = can_extend_p (dstmode, srcmode, 0);
3537 if (ic == CODE_FOR_nothing)
3538 continue;
3539
3540 /* Skip if the narrowed value isn't exact. */
3541 if (! exact_real_truncate (srcmode, &r))
3542 continue;
3543
3544 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3545
3546 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3547 {
3548 /* Skip if the target needs extra instructions to perform
3549 the extension. */
3550 if (!insn_operand_matches (ic, 1, trunc_y))
3551 continue;
3552 /* This is valid, but may not be cheaper than the original. */
3553 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3554 speed);
3555 if (oldcost < newcost)
3556 continue;
3557 }
3558 else if (float_extend_from_mem[dstmode][srcmode])
3559 {
3560 trunc_y = force_const_mem (srcmode, trunc_y);
3561 /* This is valid, but may not be cheaper than the original. */
3562 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3563 speed);
3564 if (oldcost < newcost)
3565 continue;
3566 trunc_y = validize_mem (trunc_y);
3567 }
3568 else
3569 continue;
3570
3571 /* For CSE's benefit, force the compressed constant pool entry
3572 into a new pseudo. This constant may be used in different modes,
3573 and if not, combine will put things back together for us. */
3574 trunc_y = force_reg (srcmode, trunc_y);
3575 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3576 last_insn = get_last_insn ();
3577
3578 if (REG_P (x))
3579 set_unique_reg_note (last_insn, REG_EQUAL, y);
3580
3581 return last_insn;
3582 }
3583
3584 return NULL_RTX;
3585 }
3586 \f
3587 /* Pushing data onto the stack. */
3588
3589 /* Push a block of length SIZE (perhaps variable)
3590 and return an rtx to address the beginning of the block.
3591 The value may be virtual_outgoing_args_rtx.
3592
3593 EXTRA is the number of bytes of padding to push in addition to SIZE.
3594 BELOW nonzero means this padding comes at low addresses;
3595 otherwise, the padding comes at high addresses. */
3596
3597 rtx
3598 push_block (rtx size, int extra, int below)
3599 {
3600 rtx temp;
3601
3602 size = convert_modes (Pmode, ptr_mode, size, 1);
3603 if (CONSTANT_P (size))
3604 anti_adjust_stack (plus_constant (Pmode, size, extra));
3605 else if (REG_P (size) && extra == 0)
3606 anti_adjust_stack (size);
3607 else
3608 {
3609 temp = copy_to_mode_reg (Pmode, size);
3610 if (extra != 0)
3611 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3612 temp, 0, OPTAB_LIB_WIDEN);
3613 anti_adjust_stack (temp);
3614 }
3615
3616 #ifndef STACK_GROWS_DOWNWARD
3617 if (0)
3618 #else
3619 if (1)
3620 #endif
3621 {
3622 temp = virtual_outgoing_args_rtx;
3623 if (extra != 0 && below)
3624 temp = plus_constant (Pmode, temp, extra);
3625 }
3626 else
3627 {
3628 if (CONST_INT_P (size))
3629 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
3630 -INTVAL (size) - (below ? 0 : extra));
3631 else if (extra != 0 && !below)
3632 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3633 negate_rtx (Pmode, plus_constant (Pmode, size,
3634 extra)));
3635 else
3636 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3637 negate_rtx (Pmode, size));
3638 }
3639
3640 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3641 }
3642
3643 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3644
3645 static rtx
3646 mem_autoinc_base (rtx mem)
3647 {
3648 if (MEM_P (mem))
3649 {
3650 rtx addr = XEXP (mem, 0);
3651 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3652 return XEXP (addr, 0);
3653 }
3654 return NULL;
3655 }
3656
3657 /* A utility routine used here, in reload, and in try_split. The insns
3658 after PREV up to and including LAST are known to adjust the stack,
3659 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3660 placing notes as appropriate. PREV may be NULL, indicating the
3661 entire insn sequence prior to LAST should be scanned.
3662
3663 The set of allowed stack pointer modifications is small:
3664 (1) One or more auto-inc style memory references (aka pushes),
3665 (2) One or more addition/subtraction with the SP as destination,
3666 (3) A single move insn with the SP as destination,
3667 (4) A call_pop insn,
3668 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3669
3670 Insns in the sequence that do not modify the SP are ignored,
3671 except for noreturn calls.
3672
3673 The return value is the amount of adjustment that can be trivially
3674 verified, via immediate operand or auto-inc. If the adjustment
3675 cannot be trivially extracted, the return value is INT_MIN. */
3676
3677 HOST_WIDE_INT
3678 find_args_size_adjust (rtx insn)
3679 {
3680 rtx dest, set, pat;
3681 int i;
3682
3683 pat = PATTERN (insn);
3684 set = NULL;
3685
3686 /* Look for a call_pop pattern. */
3687 if (CALL_P (insn))
3688 {
3689 /* We have to allow non-call_pop patterns for the case
3690 of emit_single_push_insn of a TLS address. */
3691 if (GET_CODE (pat) != PARALLEL)
3692 return 0;
3693
3694 /* All call_pop have a stack pointer adjust in the parallel.
3695 The call itself is always first, and the stack adjust is
3696 usually last, so search from the end. */
3697 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3698 {
3699 set = XVECEXP (pat, 0, i);
3700 if (GET_CODE (set) != SET)
3701 continue;
3702 dest = SET_DEST (set);
3703 if (dest == stack_pointer_rtx)
3704 break;
3705 }
3706 /* We'd better have found the stack pointer adjust. */
3707 if (i == 0)
3708 return 0;
3709 /* Fall through to process the extracted SET and DEST
3710 as if it was a standalone insn. */
3711 }
3712 else if (GET_CODE (pat) == SET)
3713 set = pat;
3714 else if ((set = single_set (insn)) != NULL)
3715 ;
3716 else if (GET_CODE (pat) == PARALLEL)
3717 {
3718 /* ??? Some older ports use a parallel with a stack adjust
3719 and a store for a PUSH_ROUNDING pattern, rather than a
3720 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3721 /* ??? See h8300 and m68k, pushqi1. */
3722 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3723 {
3724 set = XVECEXP (pat, 0, i);
3725 if (GET_CODE (set) != SET)
3726 continue;
3727 dest = SET_DEST (set);
3728 if (dest == stack_pointer_rtx)
3729 break;
3730
3731 /* We do not expect an auto-inc of the sp in the parallel. */
3732 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3733 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3734 != stack_pointer_rtx);
3735 }
3736 if (i < 0)
3737 return 0;
3738 }
3739 else
3740 return 0;
3741
3742 dest = SET_DEST (set);
3743
3744 /* Look for direct modifications of the stack pointer. */
3745 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3746 {
3747 /* Look for a trivial adjustment, otherwise assume nothing. */
3748 /* Note that the SPU restore_stack_block pattern refers to
3749 the stack pointer in V4SImode. Consider that non-trivial. */
3750 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3751 && GET_CODE (SET_SRC (set)) == PLUS
3752 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3753 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3754 return INTVAL (XEXP (SET_SRC (set), 1));
3755 /* ??? Reload can generate no-op moves, which will be cleaned
3756 up later. Recognize it and continue searching. */
3757 else if (rtx_equal_p (dest, SET_SRC (set)))
3758 return 0;
3759 else
3760 return HOST_WIDE_INT_MIN;
3761 }
3762 else
3763 {
3764 rtx mem, addr;
3765
3766 /* Otherwise only think about autoinc patterns. */
3767 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3768 {
3769 mem = dest;
3770 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3771 != stack_pointer_rtx);
3772 }
3773 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3774 mem = SET_SRC (set);
3775 else
3776 return 0;
3777
3778 addr = XEXP (mem, 0);
3779 switch (GET_CODE (addr))
3780 {
3781 case PRE_INC:
3782 case POST_INC:
3783 return GET_MODE_SIZE (GET_MODE (mem));
3784 case PRE_DEC:
3785 case POST_DEC:
3786 return -GET_MODE_SIZE (GET_MODE (mem));
3787 case PRE_MODIFY:
3788 case POST_MODIFY:
3789 addr = XEXP (addr, 1);
3790 gcc_assert (GET_CODE (addr) == PLUS);
3791 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3792 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3793 return INTVAL (XEXP (addr, 1));
3794 default:
3795 gcc_unreachable ();
3796 }
3797 }
3798 }
3799
3800 int
3801 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3802 {
3803 int args_size = end_args_size;
3804 bool saw_unknown = false;
3805 rtx insn;
3806
3807 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3808 {
3809 HOST_WIDE_INT this_delta;
3810
3811 if (!NONDEBUG_INSN_P (insn))
3812 continue;
3813
3814 this_delta = find_args_size_adjust (insn);
3815 if (this_delta == 0)
3816 {
3817 if (!CALL_P (insn)
3818 || ACCUMULATE_OUTGOING_ARGS
3819 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3820 continue;
3821 }
3822
3823 gcc_assert (!saw_unknown);
3824 if (this_delta == HOST_WIDE_INT_MIN)
3825 saw_unknown = true;
3826
3827 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3828 #ifdef STACK_GROWS_DOWNWARD
3829 this_delta = -this_delta;
3830 #endif
3831 args_size -= this_delta;
3832 }
3833
3834 return saw_unknown ? INT_MIN : args_size;
3835 }
3836
3837 #ifdef PUSH_ROUNDING
3838 /* Emit single push insn. */
3839
3840 static void
3841 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3842 {
3843 rtx dest_addr;
3844 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3845 rtx dest;
3846 enum insn_code icode;
3847
3848 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3849 /* If there is push pattern, use it. Otherwise try old way of throwing
3850 MEM representing push operation to move expander. */
3851 icode = optab_handler (push_optab, mode);
3852 if (icode != CODE_FOR_nothing)
3853 {
3854 struct expand_operand ops[1];
3855
3856 create_input_operand (&ops[0], x, mode);
3857 if (maybe_expand_insn (icode, 1, ops))
3858 return;
3859 }
3860 if (GET_MODE_SIZE (mode) == rounded_size)
3861 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3862 /* If we are to pad downward, adjust the stack pointer first and
3863 then store X into the stack location using an offset. This is
3864 because emit_move_insn does not know how to pad; it does not have
3865 access to type. */
3866 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3867 {
3868 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3869 HOST_WIDE_INT offset;
3870
3871 emit_move_insn (stack_pointer_rtx,
3872 expand_binop (Pmode,
3873 #ifdef STACK_GROWS_DOWNWARD
3874 sub_optab,
3875 #else
3876 add_optab,
3877 #endif
3878 stack_pointer_rtx,
3879 GEN_INT (rounded_size),
3880 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3881
3882 offset = (HOST_WIDE_INT) padding_size;
3883 #ifdef STACK_GROWS_DOWNWARD
3884 if (STACK_PUSH_CODE == POST_DEC)
3885 /* We have already decremented the stack pointer, so get the
3886 previous value. */
3887 offset += (HOST_WIDE_INT) rounded_size;
3888 #else
3889 if (STACK_PUSH_CODE == POST_INC)
3890 /* We have already incremented the stack pointer, so get the
3891 previous value. */
3892 offset -= (HOST_WIDE_INT) rounded_size;
3893 #endif
3894 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3895 }
3896 else
3897 {
3898 #ifdef STACK_GROWS_DOWNWARD
3899 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3900 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3901 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3902 #else
3903 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3904 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3905 GEN_INT (rounded_size));
3906 #endif
3907 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3908 }
3909
3910 dest = gen_rtx_MEM (mode, dest_addr);
3911
3912 if (type != 0)
3913 {
3914 set_mem_attributes (dest, type, 1);
3915
3916 if (flag_optimize_sibling_calls)
3917 /* Function incoming arguments may overlap with sibling call
3918 outgoing arguments and we cannot allow reordering of reads
3919 from function arguments with stores to outgoing arguments
3920 of sibling calls. */
3921 set_mem_alias_set (dest, 0);
3922 }
3923 emit_move_insn (dest, x);
3924 }
3925
3926 /* Emit and annotate a single push insn. */
3927
3928 static void
3929 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3930 {
3931 int delta, old_delta = stack_pointer_delta;
3932 rtx prev = get_last_insn ();
3933 rtx last;
3934
3935 emit_single_push_insn_1 (mode, x, type);
3936
3937 last = get_last_insn ();
3938
3939 /* Notice the common case where we emitted exactly one insn. */
3940 if (PREV_INSN (last) == prev)
3941 {
3942 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3943 return;
3944 }
3945
3946 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3947 gcc_assert (delta == INT_MIN || delta == old_delta);
3948 }
3949 #endif
3950
3951 /* Generate code to push X onto the stack, assuming it has mode MODE and
3952 type TYPE.
3953 MODE is redundant except when X is a CONST_INT (since they don't
3954 carry mode info).
3955 SIZE is an rtx for the size of data to be copied (in bytes),
3956 needed only if X is BLKmode.
3957
3958 ALIGN (in bits) is maximum alignment we can assume.
3959
3960 If PARTIAL and REG are both nonzero, then copy that many of the first
3961 bytes of X into registers starting with REG, and push the rest of X.
3962 The amount of space pushed is decreased by PARTIAL bytes.
3963 REG must be a hard register in this case.
3964 If REG is zero but PARTIAL is not, take any all others actions for an
3965 argument partially in registers, but do not actually load any
3966 registers.
3967
3968 EXTRA is the amount in bytes of extra space to leave next to this arg.
3969 This is ignored if an argument block has already been allocated.
3970
3971 On a machine that lacks real push insns, ARGS_ADDR is the address of
3972 the bottom of the argument block for this call. We use indexing off there
3973 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3974 argument block has not been preallocated.
3975
3976 ARGS_SO_FAR is the size of args previously pushed for this call.
3977
3978 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3979 for arguments passed in registers. If nonzero, it will be the number
3980 of bytes required. */
3981
3982 void
3983 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3984 unsigned int align, int partial, rtx reg, int extra,
3985 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3986 rtx alignment_pad)
3987 {
3988 rtx xinner;
3989 enum direction stack_direction
3990 #ifdef STACK_GROWS_DOWNWARD
3991 = downward;
3992 #else
3993 = upward;
3994 #endif
3995
3996 /* Decide where to pad the argument: `downward' for below,
3997 `upward' for above, or `none' for don't pad it.
3998 Default is below for small data on big-endian machines; else above. */
3999 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
4000
4001 /* Invert direction if stack is post-decrement.
4002 FIXME: why? */
4003 if (STACK_PUSH_CODE == POST_DEC)
4004 if (where_pad != none)
4005 where_pad = (where_pad == downward ? upward : downward);
4006
4007 xinner = x;
4008
4009 if (mode == BLKmode
4010 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4011 {
4012 /* Copy a block into the stack, entirely or partially. */
4013
4014 rtx temp;
4015 int used;
4016 int offset;
4017 int skip;
4018
4019 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4020 used = partial - offset;
4021
4022 if (mode != BLKmode)
4023 {
4024 /* A value is to be stored in an insufficiently aligned
4025 stack slot; copy via a suitably aligned slot if
4026 necessary. */
4027 size = GEN_INT (GET_MODE_SIZE (mode));
4028 if (!MEM_P (xinner))
4029 {
4030 temp = assign_temp (type, 1, 1);
4031 emit_move_insn (temp, xinner);
4032 xinner = temp;
4033 }
4034 }
4035
4036 gcc_assert (size);
4037
4038 /* USED is now the # of bytes we need not copy to the stack
4039 because registers will take care of them. */
4040
4041 if (partial != 0)
4042 xinner = adjust_address (xinner, BLKmode, used);
4043
4044 /* If the partial register-part of the arg counts in its stack size,
4045 skip the part of stack space corresponding to the registers.
4046 Otherwise, start copying to the beginning of the stack space,
4047 by setting SKIP to 0. */
4048 skip = (reg_parm_stack_space == 0) ? 0 : used;
4049
4050 #ifdef PUSH_ROUNDING
4051 /* Do it with several push insns if that doesn't take lots of insns
4052 and if there is no difficulty with push insns that skip bytes
4053 on the stack for alignment purposes. */
4054 if (args_addr == 0
4055 && PUSH_ARGS
4056 && CONST_INT_P (size)
4057 && skip == 0
4058 && MEM_ALIGN (xinner) >= align
4059 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
4060 /* Here we avoid the case of a structure whose weak alignment
4061 forces many pushes of a small amount of data,
4062 and such small pushes do rounding that causes trouble. */
4063 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4064 || align >= BIGGEST_ALIGNMENT
4065 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4066 == (align / BITS_PER_UNIT)))
4067 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4068 {
4069 /* Push padding now if padding above and stack grows down,
4070 or if padding below and stack grows up.
4071 But if space already allocated, this has already been done. */
4072 if (extra && args_addr == 0
4073 && where_pad != none && where_pad != stack_direction)
4074 anti_adjust_stack (GEN_INT (extra));
4075
4076 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4077 }
4078 else
4079 #endif /* PUSH_ROUNDING */
4080 {
4081 rtx target;
4082
4083 /* Otherwise make space on the stack and copy the data
4084 to the address of that space. */
4085
4086 /* Deduct words put into registers from the size we must copy. */
4087 if (partial != 0)
4088 {
4089 if (CONST_INT_P (size))
4090 size = GEN_INT (INTVAL (size) - used);
4091 else
4092 size = expand_binop (GET_MODE (size), sub_optab, size,
4093 GEN_INT (used), NULL_RTX, 0,
4094 OPTAB_LIB_WIDEN);
4095 }
4096
4097 /* Get the address of the stack space.
4098 In this case, we do not deal with EXTRA separately.
4099 A single stack adjust will do. */
4100 if (! args_addr)
4101 {
4102 temp = push_block (size, extra, where_pad == downward);
4103 extra = 0;
4104 }
4105 else if (CONST_INT_P (args_so_far))
4106 temp = memory_address (BLKmode,
4107 plus_constant (Pmode, args_addr,
4108 skip + INTVAL (args_so_far)));
4109 else
4110 temp = memory_address (BLKmode,
4111 plus_constant (Pmode,
4112 gen_rtx_PLUS (Pmode,
4113 args_addr,
4114 args_so_far),
4115 skip));
4116
4117 if (!ACCUMULATE_OUTGOING_ARGS)
4118 {
4119 /* If the source is referenced relative to the stack pointer,
4120 copy it to another register to stabilize it. We do not need
4121 to do this if we know that we won't be changing sp. */
4122
4123 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4124 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4125 temp = copy_to_reg (temp);
4126 }
4127
4128 target = gen_rtx_MEM (BLKmode, temp);
4129
4130 /* We do *not* set_mem_attributes here, because incoming arguments
4131 may overlap with sibling call outgoing arguments and we cannot
4132 allow reordering of reads from function arguments with stores
4133 to outgoing arguments of sibling calls. We do, however, want
4134 to record the alignment of the stack slot. */
4135 /* ALIGN may well be better aligned than TYPE, e.g. due to
4136 PARM_BOUNDARY. Assume the caller isn't lying. */
4137 set_mem_align (target, align);
4138
4139 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4140 }
4141 }
4142 else if (partial > 0)
4143 {
4144 /* Scalar partly in registers. */
4145
4146 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4147 int i;
4148 int not_stack;
4149 /* # bytes of start of argument
4150 that we must make space for but need not store. */
4151 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4152 int args_offset = INTVAL (args_so_far);
4153 int skip;
4154
4155 /* Push padding now if padding above and stack grows down,
4156 or if padding below and stack grows up.
4157 But if space already allocated, this has already been done. */
4158 if (extra && args_addr == 0
4159 && where_pad != none && where_pad != stack_direction)
4160 anti_adjust_stack (GEN_INT (extra));
4161
4162 /* If we make space by pushing it, we might as well push
4163 the real data. Otherwise, we can leave OFFSET nonzero
4164 and leave the space uninitialized. */
4165 if (args_addr == 0)
4166 offset = 0;
4167
4168 /* Now NOT_STACK gets the number of words that we don't need to
4169 allocate on the stack. Convert OFFSET to words too. */
4170 not_stack = (partial - offset) / UNITS_PER_WORD;
4171 offset /= UNITS_PER_WORD;
4172
4173 /* If the partial register-part of the arg counts in its stack size,
4174 skip the part of stack space corresponding to the registers.
4175 Otherwise, start copying to the beginning of the stack space,
4176 by setting SKIP to 0. */
4177 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4178
4179 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4180 x = validize_mem (force_const_mem (mode, x));
4181
4182 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4183 SUBREGs of such registers are not allowed. */
4184 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4185 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4186 x = copy_to_reg (x);
4187
4188 /* Loop over all the words allocated on the stack for this arg. */
4189 /* We can do it by words, because any scalar bigger than a word
4190 has a size a multiple of a word. */
4191 #ifndef PUSH_ARGS_REVERSED
4192 for (i = not_stack; i < size; i++)
4193 #else
4194 for (i = size - 1; i >= not_stack; i--)
4195 #endif
4196 if (i >= not_stack + offset)
4197 emit_push_insn (operand_subword_force (x, i, mode),
4198 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4199 0, args_addr,
4200 GEN_INT (args_offset + ((i - not_stack + skip)
4201 * UNITS_PER_WORD)),
4202 reg_parm_stack_space, alignment_pad);
4203 }
4204 else
4205 {
4206 rtx addr;
4207 rtx dest;
4208
4209 /* Push padding now if padding above and stack grows down,
4210 or if padding below and stack grows up.
4211 But if space already allocated, this has already been done. */
4212 if (extra && args_addr == 0
4213 && where_pad != none && where_pad != stack_direction)
4214 anti_adjust_stack (GEN_INT (extra));
4215
4216 #ifdef PUSH_ROUNDING
4217 if (args_addr == 0 && PUSH_ARGS)
4218 emit_single_push_insn (mode, x, type);
4219 else
4220 #endif
4221 {
4222 if (CONST_INT_P (args_so_far))
4223 addr
4224 = memory_address (mode,
4225 plus_constant (Pmode, args_addr,
4226 INTVAL (args_so_far)));
4227 else
4228 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4229 args_so_far));
4230 dest = gen_rtx_MEM (mode, addr);
4231
4232 /* We do *not* set_mem_attributes here, because incoming arguments
4233 may overlap with sibling call outgoing arguments and we cannot
4234 allow reordering of reads from function arguments with stores
4235 to outgoing arguments of sibling calls. We do, however, want
4236 to record the alignment of the stack slot. */
4237 /* ALIGN may well be better aligned than TYPE, e.g. due to
4238 PARM_BOUNDARY. Assume the caller isn't lying. */
4239 set_mem_align (dest, align);
4240
4241 emit_move_insn (dest, x);
4242 }
4243 }
4244
4245 /* If part should go in registers, copy that part
4246 into the appropriate registers. Do this now, at the end,
4247 since mem-to-mem copies above may do function calls. */
4248 if (partial > 0 && reg != 0)
4249 {
4250 /* Handle calls that pass values in multiple non-contiguous locations.
4251 The Irix 6 ABI has examples of this. */
4252 if (GET_CODE (reg) == PARALLEL)
4253 emit_group_load (reg, x, type, -1);
4254 else
4255 {
4256 gcc_assert (partial % UNITS_PER_WORD == 0);
4257 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4258 }
4259 }
4260
4261 if (extra && args_addr == 0 && where_pad == stack_direction)
4262 anti_adjust_stack (GEN_INT (extra));
4263
4264 if (alignment_pad && args_addr == 0)
4265 anti_adjust_stack (alignment_pad);
4266 }
4267 \f
4268 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4269 operations. */
4270
4271 static rtx
4272 get_subtarget (rtx x)
4273 {
4274 return (optimize
4275 || x == 0
4276 /* Only registers can be subtargets. */
4277 || !REG_P (x)
4278 /* Don't use hard regs to avoid extending their life. */
4279 || REGNO (x) < FIRST_PSEUDO_REGISTER
4280 ? 0 : x);
4281 }
4282
4283 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4284 FIELD is a bitfield. Returns true if the optimization was successful,
4285 and there's nothing else to do. */
4286
4287 static bool
4288 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4289 unsigned HOST_WIDE_INT bitpos,
4290 unsigned HOST_WIDE_INT bitregion_start,
4291 unsigned HOST_WIDE_INT bitregion_end,
4292 enum machine_mode mode1, rtx str_rtx,
4293 tree to, tree src)
4294 {
4295 enum machine_mode str_mode = GET_MODE (str_rtx);
4296 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4297 tree op0, op1;
4298 rtx value, result;
4299 optab binop;
4300 gimple srcstmt;
4301 enum tree_code code;
4302
4303 if (mode1 != VOIDmode
4304 || bitsize >= BITS_PER_WORD
4305 || str_bitsize > BITS_PER_WORD
4306 || TREE_SIDE_EFFECTS (to)
4307 || TREE_THIS_VOLATILE (to))
4308 return false;
4309
4310 STRIP_NOPS (src);
4311 if (TREE_CODE (src) != SSA_NAME)
4312 return false;
4313 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4314 return false;
4315
4316 srcstmt = get_gimple_for_ssa_name (src);
4317 if (!srcstmt
4318 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4319 return false;
4320
4321 code = gimple_assign_rhs_code (srcstmt);
4322
4323 op0 = gimple_assign_rhs1 (srcstmt);
4324
4325 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4326 to find its initialization. Hopefully the initialization will
4327 be from a bitfield load. */
4328 if (TREE_CODE (op0) == SSA_NAME)
4329 {
4330 gimple op0stmt = get_gimple_for_ssa_name (op0);
4331
4332 /* We want to eventually have OP0 be the same as TO, which
4333 should be a bitfield. */
4334 if (!op0stmt
4335 || !is_gimple_assign (op0stmt)
4336 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4337 return false;
4338 op0 = gimple_assign_rhs1 (op0stmt);
4339 }
4340
4341 op1 = gimple_assign_rhs2 (srcstmt);
4342
4343 if (!operand_equal_p (to, op0, 0))
4344 return false;
4345
4346 if (MEM_P (str_rtx))
4347 {
4348 unsigned HOST_WIDE_INT offset1;
4349
4350 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4351 str_mode = word_mode;
4352 str_mode = get_best_mode (bitsize, bitpos,
4353 bitregion_start, bitregion_end,
4354 MEM_ALIGN (str_rtx), str_mode, 0);
4355 if (str_mode == VOIDmode)
4356 return false;
4357 str_bitsize = GET_MODE_BITSIZE (str_mode);
4358
4359 offset1 = bitpos;
4360 bitpos %= str_bitsize;
4361 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4362 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4363 }
4364 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4365 return false;
4366
4367 /* If the bit field covers the whole REG/MEM, store_field
4368 will likely generate better code. */
4369 if (bitsize >= str_bitsize)
4370 return false;
4371
4372 /* We can't handle fields split across multiple entities. */
4373 if (bitpos + bitsize > str_bitsize)
4374 return false;
4375
4376 if (BYTES_BIG_ENDIAN)
4377 bitpos = str_bitsize - bitpos - bitsize;
4378
4379 switch (code)
4380 {
4381 case PLUS_EXPR:
4382 case MINUS_EXPR:
4383 /* For now, just optimize the case of the topmost bitfield
4384 where we don't need to do any masking and also
4385 1 bit bitfields where xor can be used.
4386 We might win by one instruction for the other bitfields
4387 too if insv/extv instructions aren't used, so that
4388 can be added later. */
4389 if (bitpos + bitsize != str_bitsize
4390 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4391 break;
4392
4393 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4394 value = convert_modes (str_mode,
4395 TYPE_MODE (TREE_TYPE (op1)), value,
4396 TYPE_UNSIGNED (TREE_TYPE (op1)));
4397
4398 /* We may be accessing data outside the field, which means
4399 we can alias adjacent data. */
4400 if (MEM_P (str_rtx))
4401 {
4402 str_rtx = shallow_copy_rtx (str_rtx);
4403 set_mem_alias_set (str_rtx, 0);
4404 set_mem_expr (str_rtx, 0);
4405 }
4406
4407 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4408 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4409 {
4410 value = expand_and (str_mode, value, const1_rtx, NULL);
4411 binop = xor_optab;
4412 }
4413 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4414 result = expand_binop (str_mode, binop, str_rtx,
4415 value, str_rtx, 1, OPTAB_WIDEN);
4416 if (result != str_rtx)
4417 emit_move_insn (str_rtx, result);
4418 return true;
4419
4420 case BIT_IOR_EXPR:
4421 case BIT_XOR_EXPR:
4422 if (TREE_CODE (op1) != INTEGER_CST)
4423 break;
4424 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4425 value = convert_modes (str_mode,
4426 TYPE_MODE (TREE_TYPE (op1)), value,
4427 TYPE_UNSIGNED (TREE_TYPE (op1)));
4428
4429 /* We may be accessing data outside the field, which means
4430 we can alias adjacent data. */
4431 if (MEM_P (str_rtx))
4432 {
4433 str_rtx = shallow_copy_rtx (str_rtx);
4434 set_mem_alias_set (str_rtx, 0);
4435 set_mem_expr (str_rtx, 0);
4436 }
4437
4438 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4439 if (bitpos + bitsize != str_bitsize)
4440 {
4441 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1);
4442 value = expand_and (str_mode, value, mask, NULL_RTX);
4443 }
4444 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4445 result = expand_binop (str_mode, binop, str_rtx,
4446 value, str_rtx, 1, OPTAB_WIDEN);
4447 if (result != str_rtx)
4448 emit_move_insn (str_rtx, result);
4449 return true;
4450
4451 default:
4452 break;
4453 }
4454
4455 return false;
4456 }
4457
4458 /* In the C++ memory model, consecutive bit fields in a structure are
4459 considered one memory location.
4460
4461 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4462 returns the bit range of consecutive bits in which this COMPONENT_REF
4463 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4464 and *OFFSET may be adjusted in the process.
4465
4466 If the access does not need to be restricted, 0 is returned in both
4467 *BITSTART and *BITEND. */
4468
4469 static void
4470 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4471 unsigned HOST_WIDE_INT *bitend,
4472 tree exp,
4473 HOST_WIDE_INT *bitpos,
4474 tree *offset)
4475 {
4476 HOST_WIDE_INT bitoffset;
4477 tree field, repr;
4478
4479 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4480
4481 field = TREE_OPERAND (exp, 1);
4482 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4483 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4484 need to limit the range we can access. */
4485 if (!repr)
4486 {
4487 *bitstart = *bitend = 0;
4488 return;
4489 }
4490
4491 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4492 part of a larger bit field, then the representative does not serve any
4493 useful purpose. This can occur in Ada. */
4494 if (handled_component_p (TREE_OPERAND (exp, 0)))
4495 {
4496 enum machine_mode rmode;
4497 HOST_WIDE_INT rbitsize, rbitpos;
4498 tree roffset;
4499 int unsignedp;
4500 int volatilep = 0;
4501 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4502 &roffset, &rmode, &unsignedp, &volatilep, false);
4503 if ((rbitpos % BITS_PER_UNIT) != 0)
4504 {
4505 *bitstart = *bitend = 0;
4506 return;
4507 }
4508 }
4509
4510 /* Compute the adjustment to bitpos from the offset of the field
4511 relative to the representative. DECL_FIELD_OFFSET of field and
4512 repr are the same by construction if they are not constants,
4513 see finish_bitfield_layout. */
4514 if (host_integerp (DECL_FIELD_OFFSET (field), 1)
4515 && host_integerp (DECL_FIELD_OFFSET (repr), 1))
4516 bitoffset = (tree_low_cst (DECL_FIELD_OFFSET (field), 1)
4517 - tree_low_cst (DECL_FIELD_OFFSET (repr), 1)) * BITS_PER_UNIT;
4518 else
4519 bitoffset = 0;
4520 bitoffset += (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
4521 - tree_low_cst (DECL_FIELD_BIT_OFFSET (repr), 1));
4522
4523 /* If the adjustment is larger than bitpos, we would have a negative bit
4524 position for the lower bound and this may wreak havoc later. This can
4525 occur only if we have a non-null offset, so adjust offset and bitpos
4526 to make the lower bound non-negative. */
4527 if (bitoffset > *bitpos)
4528 {
4529 HOST_WIDE_INT adjust = bitoffset - *bitpos;
4530
4531 gcc_assert ((adjust % BITS_PER_UNIT) == 0);
4532 gcc_assert (*offset != NULL_TREE);
4533
4534 *bitpos += adjust;
4535 *offset
4536 = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));
4537 *bitstart = 0;
4538 }
4539 else
4540 *bitstart = *bitpos - bitoffset;
4541
4542 *bitend = *bitstart + tree_low_cst (DECL_SIZE (repr), 1) - 1;
4543 }
4544
4545 /* Returns true if the MEM_REF REF refers to an object that does not
4546 reside in memory and has non-BLKmode. */
4547
4548 static bool
4549 mem_ref_refers_to_non_mem_p (tree ref)
4550 {
4551 tree base = TREE_OPERAND (ref, 0);
4552 if (TREE_CODE (base) != ADDR_EXPR)
4553 return false;
4554 base = TREE_OPERAND (base, 0);
4555 return (DECL_P (base)
4556 && !TREE_ADDRESSABLE (base)
4557 && DECL_MODE (base) != BLKmode
4558 && DECL_RTL_SET_P (base)
4559 && !MEM_P (DECL_RTL (base)));
4560 }
4561
4562 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4563 is true, try generating a nontemporal store. */
4564
4565 void
4566 expand_assignment (tree to, tree from, bool nontemporal)
4567 {
4568 rtx to_rtx = 0;
4569 rtx result;
4570 enum machine_mode mode;
4571 unsigned int align;
4572 enum insn_code icode;
4573
4574 /* Don't crash if the lhs of the assignment was erroneous. */
4575 if (TREE_CODE (to) == ERROR_MARK)
4576 {
4577 expand_normal (from);
4578 return;
4579 }
4580
4581 /* Optimize away no-op moves without side-effects. */
4582 if (operand_equal_p (to, from, 0))
4583 return;
4584
4585 /* Handle misaligned stores. */
4586 mode = TYPE_MODE (TREE_TYPE (to));
4587 if ((TREE_CODE (to) == MEM_REF
4588 || TREE_CODE (to) == TARGET_MEM_REF)
4589 && mode != BLKmode
4590 && !mem_ref_refers_to_non_mem_p (to)
4591 && ((align = get_object_or_type_alignment (to))
4592 < GET_MODE_ALIGNMENT (mode))
4593 && (((icode = optab_handler (movmisalign_optab, mode))
4594 != CODE_FOR_nothing)
4595 || SLOW_UNALIGNED_ACCESS (mode, align)))
4596 {
4597 rtx reg, mem;
4598
4599 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4600 reg = force_not_mem (reg);
4601 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4602
4603 if (icode != CODE_FOR_nothing)
4604 {
4605 struct expand_operand ops[2];
4606
4607 create_fixed_operand (&ops[0], mem);
4608 create_input_operand (&ops[1], reg, mode);
4609 /* The movmisalign<mode> pattern cannot fail, else the assignment
4610 would silently be omitted. */
4611 expand_insn (icode, 2, ops);
4612 }
4613 else
4614 store_bit_field (mem, GET_MODE_BITSIZE (mode),
4615 0, 0, 0, mode, reg);
4616 return;
4617 }
4618
4619 /* Assignment of a structure component needs special treatment
4620 if the structure component's rtx is not simply a MEM.
4621 Assignment of an array element at a constant index, and assignment of
4622 an array element in an unaligned packed structure field, has the same
4623 problem. Same for (partially) storing into a non-memory object. */
4624 if (handled_component_p (to)
4625 || (TREE_CODE (to) == MEM_REF
4626 && mem_ref_refers_to_non_mem_p (to))
4627 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4628 {
4629 enum machine_mode mode1;
4630 HOST_WIDE_INT bitsize, bitpos;
4631 unsigned HOST_WIDE_INT bitregion_start = 0;
4632 unsigned HOST_WIDE_INT bitregion_end = 0;
4633 tree offset;
4634 int unsignedp;
4635 int volatilep = 0;
4636 tree tem;
4637 bool misalignp;
4638 rtx mem = NULL_RTX;
4639
4640 push_temp_slots ();
4641 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4642 &unsignedp, &volatilep, true);
4643
4644 if (TREE_CODE (to) == COMPONENT_REF
4645 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4646 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
4647
4648 /* If we are going to use store_bit_field and extract_bit_field,
4649 make sure to_rtx will be safe for multiple use. */
4650 mode = TYPE_MODE (TREE_TYPE (tem));
4651 if (TREE_CODE (tem) == MEM_REF
4652 && mode != BLKmode
4653 && ((align = get_object_or_type_alignment (tem))
4654 < GET_MODE_ALIGNMENT (mode))
4655 && ((icode = optab_handler (movmisalign_optab, mode))
4656 != CODE_FOR_nothing))
4657 {
4658 struct expand_operand ops[2];
4659
4660 misalignp = true;
4661 to_rtx = gen_reg_rtx (mode);
4662 mem = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4663
4664 /* If the misaligned store doesn't overwrite all bits, perform
4665 rmw cycle on MEM. */
4666 if (bitsize != GET_MODE_BITSIZE (mode))
4667 {
4668 create_input_operand (&ops[0], to_rtx, mode);
4669 create_fixed_operand (&ops[1], mem);
4670 /* The movmisalign<mode> pattern cannot fail, else the assignment
4671 would silently be omitted. */
4672 expand_insn (icode, 2, ops);
4673
4674 mem = copy_rtx (mem);
4675 }
4676 }
4677 else
4678 {
4679 misalignp = false;
4680 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4681 }
4682
4683 /* If the bitfield is volatile, we want to access it in the
4684 field's mode, not the computed mode.
4685 If a MEM has VOIDmode (external with incomplete type),
4686 use BLKmode for it instead. */
4687 if (MEM_P (to_rtx))
4688 {
4689 if (volatilep && flag_strict_volatile_bitfields > 0)
4690 to_rtx = adjust_address (to_rtx, mode1, 0);
4691 else if (GET_MODE (to_rtx) == VOIDmode)
4692 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4693 }
4694
4695 if (offset != 0)
4696 {
4697 enum machine_mode address_mode;
4698 rtx offset_rtx;
4699
4700 if (!MEM_P (to_rtx))
4701 {
4702 /* We can get constant negative offsets into arrays with broken
4703 user code. Translate this to a trap instead of ICEing. */
4704 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4705 expand_builtin_trap ();
4706 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4707 }
4708
4709 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4710 address_mode = get_address_mode (to_rtx);
4711 if (GET_MODE (offset_rtx) != address_mode)
4712 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4713
4714 /* A constant address in TO_RTX can have VOIDmode, we must not try
4715 to call force_reg for that case. Avoid that case. */
4716 if (MEM_P (to_rtx)
4717 && GET_MODE (to_rtx) == BLKmode
4718 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4719 && bitsize > 0
4720 && (bitpos % bitsize) == 0
4721 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4722 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4723 {
4724 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4725 bitpos = 0;
4726 }
4727
4728 to_rtx = offset_address (to_rtx, offset_rtx,
4729 highest_pow2_factor_for_target (to,
4730 offset));
4731 }
4732
4733 /* No action is needed if the target is not a memory and the field
4734 lies completely outside that target. This can occur if the source
4735 code contains an out-of-bounds access to a small array. */
4736 if (!MEM_P (to_rtx)
4737 && GET_MODE (to_rtx) != BLKmode
4738 && (unsigned HOST_WIDE_INT) bitpos
4739 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4740 {
4741 expand_normal (from);
4742 result = NULL;
4743 }
4744 /* Handle expand_expr of a complex value returning a CONCAT. */
4745 else if (GET_CODE (to_rtx) == CONCAT)
4746 {
4747 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4748 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4749 && bitpos == 0
4750 && bitsize == mode_bitsize)
4751 result = store_expr (from, to_rtx, false, nontemporal);
4752 else if (bitsize == mode_bitsize / 2
4753 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4754 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4755 nontemporal);
4756 else if (bitpos + bitsize <= mode_bitsize / 2)
4757 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4758 bitregion_start, bitregion_end,
4759 mode1, from, TREE_TYPE (tem),
4760 get_alias_set (to), nontemporal);
4761 else if (bitpos >= mode_bitsize / 2)
4762 result = store_field (XEXP (to_rtx, 1), bitsize,
4763 bitpos - mode_bitsize / 2,
4764 bitregion_start, bitregion_end,
4765 mode1, from,
4766 TREE_TYPE (tem), get_alias_set (to),
4767 nontemporal);
4768 else if (bitpos == 0 && bitsize == mode_bitsize)
4769 {
4770 rtx from_rtx;
4771 result = expand_normal (from);
4772 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4773 TYPE_MODE (TREE_TYPE (from)), 0);
4774 emit_move_insn (XEXP (to_rtx, 0),
4775 read_complex_part (from_rtx, false));
4776 emit_move_insn (XEXP (to_rtx, 1),
4777 read_complex_part (from_rtx, true));
4778 }
4779 else
4780 {
4781 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4782 GET_MODE_SIZE (GET_MODE (to_rtx)));
4783 write_complex_part (temp, XEXP (to_rtx, 0), false);
4784 write_complex_part (temp, XEXP (to_rtx, 1), true);
4785 result = store_field (temp, bitsize, bitpos,
4786 bitregion_start, bitregion_end,
4787 mode1, from,
4788 TREE_TYPE (tem), get_alias_set (to),
4789 nontemporal);
4790 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4791 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4792 }
4793 }
4794 else
4795 {
4796 if (MEM_P (to_rtx))
4797 {
4798 /* If the field is at offset zero, we could have been given the
4799 DECL_RTX of the parent struct. Don't munge it. */
4800 to_rtx = shallow_copy_rtx (to_rtx);
4801
4802 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4803
4804 /* Deal with volatile and readonly fields. The former is only
4805 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4806 if (volatilep)
4807 MEM_VOLATILE_P (to_rtx) = 1;
4808 if (component_uses_parent_alias_set (to))
4809 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4810 }
4811
4812 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4813 bitregion_start, bitregion_end,
4814 mode1,
4815 to_rtx, to, from))
4816 result = NULL;
4817 else
4818 result = store_field (to_rtx, bitsize, bitpos,
4819 bitregion_start, bitregion_end,
4820 mode1, from,
4821 TREE_TYPE (tem), get_alias_set (to),
4822 nontemporal);
4823 }
4824
4825 if (misalignp)
4826 {
4827 struct expand_operand ops[2];
4828
4829 create_fixed_operand (&ops[0], mem);
4830 create_input_operand (&ops[1], to_rtx, mode);
4831 /* The movmisalign<mode> pattern cannot fail, else the assignment
4832 would silently be omitted. */
4833 expand_insn (icode, 2, ops);
4834 }
4835
4836 if (result)
4837 preserve_temp_slots (result);
4838 pop_temp_slots ();
4839 return;
4840 }
4841
4842 /* If the rhs is a function call and its value is not an aggregate,
4843 call the function before we start to compute the lhs.
4844 This is needed for correct code for cases such as
4845 val = setjmp (buf) on machines where reference to val
4846 requires loading up part of an address in a separate insn.
4847
4848 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4849 since it might be a promoted variable where the zero- or sign- extension
4850 needs to be done. Handling this in the normal way is safe because no
4851 computation is done before the call. The same is true for SSA names. */
4852 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4853 && COMPLETE_TYPE_P (TREE_TYPE (from))
4854 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4855 && ! (((TREE_CODE (to) == VAR_DECL
4856 || TREE_CODE (to) == PARM_DECL
4857 || TREE_CODE (to) == RESULT_DECL)
4858 && REG_P (DECL_RTL (to)))
4859 || TREE_CODE (to) == SSA_NAME))
4860 {
4861 rtx value;
4862
4863 push_temp_slots ();
4864 value = expand_normal (from);
4865 if (to_rtx == 0)
4866 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4867
4868 /* Handle calls that return values in multiple non-contiguous locations.
4869 The Irix 6 ABI has examples of this. */
4870 if (GET_CODE (to_rtx) == PARALLEL)
4871 emit_group_load (to_rtx, value, TREE_TYPE (from),
4872 int_size_in_bytes (TREE_TYPE (from)));
4873 else if (GET_MODE (to_rtx) == BLKmode)
4874 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4875 else
4876 {
4877 if (POINTER_TYPE_P (TREE_TYPE (to)))
4878 value = convert_memory_address_addr_space
4879 (GET_MODE (to_rtx), value,
4880 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4881
4882 emit_move_insn (to_rtx, value);
4883 }
4884 preserve_temp_slots (to_rtx);
4885 pop_temp_slots ();
4886 return;
4887 }
4888
4889 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
4890 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4891
4892 /* Don't move directly into a return register. */
4893 if (TREE_CODE (to) == RESULT_DECL
4894 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4895 {
4896 rtx temp;
4897
4898 push_temp_slots ();
4899 if (REG_P (to_rtx) && TYPE_MODE (TREE_TYPE (from)) == BLKmode)
4900 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
4901 else
4902 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4903
4904 if (GET_CODE (to_rtx) == PARALLEL)
4905 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4906 int_size_in_bytes (TREE_TYPE (from)));
4907 else if (temp)
4908 emit_move_insn (to_rtx, temp);
4909
4910 preserve_temp_slots (to_rtx);
4911 pop_temp_slots ();
4912 return;
4913 }
4914
4915 /* In case we are returning the contents of an object which overlaps
4916 the place the value is being stored, use a safe function when copying
4917 a value through a pointer into a structure value return block. */
4918 if (TREE_CODE (to) == RESULT_DECL
4919 && TREE_CODE (from) == INDIRECT_REF
4920 && ADDR_SPACE_GENERIC_P
4921 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4922 && refs_may_alias_p (to, from)
4923 && cfun->returns_struct
4924 && !cfun->returns_pcc_struct)
4925 {
4926 rtx from_rtx, size;
4927
4928 push_temp_slots ();
4929 size = expr_size (from);
4930 from_rtx = expand_normal (from);
4931
4932 emit_library_call (memmove_libfunc, LCT_NORMAL,
4933 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4934 XEXP (from_rtx, 0), Pmode,
4935 convert_to_mode (TYPE_MODE (sizetype),
4936 size, TYPE_UNSIGNED (sizetype)),
4937 TYPE_MODE (sizetype));
4938
4939 preserve_temp_slots (to_rtx);
4940 pop_temp_slots ();
4941 return;
4942 }
4943
4944 /* Compute FROM and store the value in the rtx we got. */
4945
4946 push_temp_slots ();
4947 result = store_expr (from, to_rtx, 0, nontemporal);
4948 preserve_temp_slots (result);
4949 pop_temp_slots ();
4950 return;
4951 }
4952
4953 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4954 succeeded, false otherwise. */
4955
4956 bool
4957 emit_storent_insn (rtx to, rtx from)
4958 {
4959 struct expand_operand ops[2];
4960 enum machine_mode mode = GET_MODE (to);
4961 enum insn_code code = optab_handler (storent_optab, mode);
4962
4963 if (code == CODE_FOR_nothing)
4964 return false;
4965
4966 create_fixed_operand (&ops[0], to);
4967 create_input_operand (&ops[1], from, mode);
4968 return maybe_expand_insn (code, 2, ops);
4969 }
4970
4971 /* Generate code for computing expression EXP,
4972 and storing the value into TARGET.
4973
4974 If the mode is BLKmode then we may return TARGET itself.
4975 It turns out that in BLKmode it doesn't cause a problem.
4976 because C has no operators that could combine two different
4977 assignments into the same BLKmode object with different values
4978 with no sequence point. Will other languages need this to
4979 be more thorough?
4980
4981 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4982 stack, and block moves may need to be treated specially.
4983
4984 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4985
4986 rtx
4987 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4988 {
4989 rtx temp;
4990 rtx alt_rtl = NULL_RTX;
4991 location_t loc = EXPR_LOCATION (exp);
4992
4993 if (VOID_TYPE_P (TREE_TYPE (exp)))
4994 {
4995 /* C++ can generate ?: expressions with a throw expression in one
4996 branch and an rvalue in the other. Here, we resolve attempts to
4997 store the throw expression's nonexistent result. */
4998 gcc_assert (!call_param_p);
4999 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5000 return NULL_RTX;
5001 }
5002 if (TREE_CODE (exp) == COMPOUND_EXPR)
5003 {
5004 /* Perform first part of compound expression, then assign from second
5005 part. */
5006 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5007 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5008 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5009 nontemporal);
5010 }
5011 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5012 {
5013 /* For conditional expression, get safe form of the target. Then
5014 test the condition, doing the appropriate assignment on either
5015 side. This avoids the creation of unnecessary temporaries.
5016 For non-BLKmode, it is more efficient not to do this. */
5017
5018 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
5019
5020 do_pending_stack_adjust ();
5021 NO_DEFER_POP;
5022 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5023 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5024 nontemporal);
5025 emit_jump_insn (gen_jump (lab2));
5026 emit_barrier ();
5027 emit_label (lab1);
5028 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5029 nontemporal);
5030 emit_label (lab2);
5031 OK_DEFER_POP;
5032
5033 return NULL_RTX;
5034 }
5035 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5036 /* If this is a scalar in a register that is stored in a wider mode
5037 than the declared mode, compute the result into its declared mode
5038 and then convert to the wider mode. Our value is the computed
5039 expression. */
5040 {
5041 rtx inner_target = 0;
5042
5043 /* We can do the conversion inside EXP, which will often result
5044 in some optimizations. Do the conversion in two steps: first
5045 change the signedness, if needed, then the extend. But don't
5046 do this if the type of EXP is a subtype of something else
5047 since then the conversion might involve more than just
5048 converting modes. */
5049 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5050 && TREE_TYPE (TREE_TYPE (exp)) == 0
5051 && GET_MODE_PRECISION (GET_MODE (target))
5052 == TYPE_PRECISION (TREE_TYPE (exp)))
5053 {
5054 if (TYPE_UNSIGNED (TREE_TYPE (exp))
5055 != SUBREG_PROMOTED_UNSIGNED_P (target))
5056 {
5057 /* Some types, e.g. Fortran's logical*4, won't have a signed
5058 version, so use the mode instead. */
5059 tree ntype
5060 = (signed_or_unsigned_type_for
5061 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
5062 if (ntype == NULL)
5063 ntype = lang_hooks.types.type_for_mode
5064 (TYPE_MODE (TREE_TYPE (exp)),
5065 SUBREG_PROMOTED_UNSIGNED_P (target));
5066
5067 exp = fold_convert_loc (loc, ntype, exp);
5068 }
5069
5070 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5071 (GET_MODE (SUBREG_REG (target)),
5072 SUBREG_PROMOTED_UNSIGNED_P (target)),
5073 exp);
5074
5075 inner_target = SUBREG_REG (target);
5076 }
5077
5078 temp = expand_expr (exp, inner_target, VOIDmode,
5079 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5080
5081 /* If TEMP is a VOIDmode constant, use convert_modes to make
5082 sure that we properly convert it. */
5083 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5084 {
5085 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5086 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
5087 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5088 GET_MODE (target), temp,
5089 SUBREG_PROMOTED_UNSIGNED_P (target));
5090 }
5091
5092 convert_move (SUBREG_REG (target), temp,
5093 SUBREG_PROMOTED_UNSIGNED_P (target));
5094
5095 return NULL_RTX;
5096 }
5097 else if ((TREE_CODE (exp) == STRING_CST
5098 || (TREE_CODE (exp) == MEM_REF
5099 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5100 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5101 == STRING_CST
5102 && integer_zerop (TREE_OPERAND (exp, 1))))
5103 && !nontemporal && !call_param_p
5104 && MEM_P (target))
5105 {
5106 /* Optimize initialization of an array with a STRING_CST. */
5107 HOST_WIDE_INT exp_len, str_copy_len;
5108 rtx dest_mem;
5109 tree str = TREE_CODE (exp) == STRING_CST
5110 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5111
5112 exp_len = int_expr_size (exp);
5113 if (exp_len <= 0)
5114 goto normal_expr;
5115
5116 if (TREE_STRING_LENGTH (str) <= 0)
5117 goto normal_expr;
5118
5119 str_copy_len = strlen (TREE_STRING_POINTER (str));
5120 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5121 goto normal_expr;
5122
5123 str_copy_len = TREE_STRING_LENGTH (str);
5124 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5125 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5126 {
5127 str_copy_len += STORE_MAX_PIECES - 1;
5128 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5129 }
5130 str_copy_len = MIN (str_copy_len, exp_len);
5131 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5132 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5133 MEM_ALIGN (target), false))
5134 goto normal_expr;
5135
5136 dest_mem = target;
5137
5138 dest_mem = store_by_pieces (dest_mem,
5139 str_copy_len, builtin_strncpy_read_str,
5140 CONST_CAST (char *,
5141 TREE_STRING_POINTER (str)),
5142 MEM_ALIGN (target), false,
5143 exp_len > str_copy_len ? 1 : 0);
5144 if (exp_len > str_copy_len)
5145 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5146 GEN_INT (exp_len - str_copy_len),
5147 BLOCK_OP_NORMAL);
5148 return NULL_RTX;
5149 }
5150 else
5151 {
5152 rtx tmp_target;
5153
5154 normal_expr:
5155 /* If we want to use a nontemporal store, force the value to
5156 register first. */
5157 tmp_target = nontemporal ? NULL_RTX : target;
5158 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5159 (call_param_p
5160 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5161 &alt_rtl);
5162 }
5163
5164 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5165 the same as that of TARGET, adjust the constant. This is needed, for
5166 example, in case it is a CONST_DOUBLE and we want only a word-sized
5167 value. */
5168 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5169 && TREE_CODE (exp) != ERROR_MARK
5170 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5171 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5172 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5173
5174 /* If value was not generated in the target, store it there.
5175 Convert the value to TARGET's type first if necessary and emit the
5176 pending incrementations that have been queued when expanding EXP.
5177 Note that we cannot emit the whole queue blindly because this will
5178 effectively disable the POST_INC optimization later.
5179
5180 If TEMP and TARGET compare equal according to rtx_equal_p, but
5181 one or both of them are volatile memory refs, we have to distinguish
5182 two cases:
5183 - expand_expr has used TARGET. In this case, we must not generate
5184 another copy. This can be detected by TARGET being equal according
5185 to == .
5186 - expand_expr has not used TARGET - that means that the source just
5187 happens to have the same RTX form. Since temp will have been created
5188 by expand_expr, it will compare unequal according to == .
5189 We must generate a copy in this case, to reach the correct number
5190 of volatile memory references. */
5191
5192 if ((! rtx_equal_p (temp, target)
5193 || (temp != target && (side_effects_p (temp)
5194 || side_effects_p (target))))
5195 && TREE_CODE (exp) != ERROR_MARK
5196 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5197 but TARGET is not valid memory reference, TEMP will differ
5198 from TARGET although it is really the same location. */
5199 && !(alt_rtl
5200 && rtx_equal_p (alt_rtl, target)
5201 && !side_effects_p (alt_rtl)
5202 && !side_effects_p (target))
5203 /* If there's nothing to copy, don't bother. Don't call
5204 expr_size unless necessary, because some front-ends (C++)
5205 expr_size-hook must not be given objects that are not
5206 supposed to be bit-copied or bit-initialized. */
5207 && expr_size (exp) != const0_rtx)
5208 {
5209 if (GET_MODE (temp) != GET_MODE (target)
5210 && GET_MODE (temp) != VOIDmode)
5211 {
5212 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5213 if (GET_MODE (target) == BLKmode
5214 && GET_MODE (temp) == BLKmode)
5215 emit_block_move (target, temp, expr_size (exp),
5216 (call_param_p
5217 ? BLOCK_OP_CALL_PARM
5218 : BLOCK_OP_NORMAL));
5219 else if (GET_MODE (target) == BLKmode)
5220 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5221 0, 0, 0, GET_MODE (temp), temp);
5222 else
5223 convert_move (target, temp, unsignedp);
5224 }
5225
5226 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5227 {
5228 /* Handle copying a string constant into an array. The string
5229 constant may be shorter than the array. So copy just the string's
5230 actual length, and clear the rest. First get the size of the data
5231 type of the string, which is actually the size of the target. */
5232 rtx size = expr_size (exp);
5233
5234 if (CONST_INT_P (size)
5235 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5236 emit_block_move (target, temp, size,
5237 (call_param_p
5238 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5239 else
5240 {
5241 enum machine_mode pointer_mode
5242 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5243 enum machine_mode address_mode = get_address_mode (target);
5244
5245 /* Compute the size of the data to copy from the string. */
5246 tree copy_size
5247 = size_binop_loc (loc, MIN_EXPR,
5248 make_tree (sizetype, size),
5249 size_int (TREE_STRING_LENGTH (exp)));
5250 rtx copy_size_rtx
5251 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5252 (call_param_p
5253 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5254 rtx label = 0;
5255
5256 /* Copy that much. */
5257 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5258 TYPE_UNSIGNED (sizetype));
5259 emit_block_move (target, temp, copy_size_rtx,
5260 (call_param_p
5261 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5262
5263 /* Figure out how much is left in TARGET that we have to clear.
5264 Do all calculations in pointer_mode. */
5265 if (CONST_INT_P (copy_size_rtx))
5266 {
5267 size = plus_constant (address_mode, size,
5268 -INTVAL (copy_size_rtx));
5269 target = adjust_address (target, BLKmode,
5270 INTVAL (copy_size_rtx));
5271 }
5272 else
5273 {
5274 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5275 copy_size_rtx, NULL_RTX, 0,
5276 OPTAB_LIB_WIDEN);
5277
5278 if (GET_MODE (copy_size_rtx) != address_mode)
5279 copy_size_rtx = convert_to_mode (address_mode,
5280 copy_size_rtx,
5281 TYPE_UNSIGNED (sizetype));
5282
5283 target = offset_address (target, copy_size_rtx,
5284 highest_pow2_factor (copy_size));
5285 label = gen_label_rtx ();
5286 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5287 GET_MODE (size), 0, label);
5288 }
5289
5290 if (size != const0_rtx)
5291 clear_storage (target, size, BLOCK_OP_NORMAL);
5292
5293 if (label)
5294 emit_label (label);
5295 }
5296 }
5297 /* Handle calls that return values in multiple non-contiguous locations.
5298 The Irix 6 ABI has examples of this. */
5299 else if (GET_CODE (target) == PARALLEL)
5300 emit_group_load (target, temp, TREE_TYPE (exp),
5301 int_size_in_bytes (TREE_TYPE (exp)));
5302 else if (GET_MODE (temp) == BLKmode)
5303 emit_block_move (target, temp, expr_size (exp),
5304 (call_param_p
5305 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5306 else if (nontemporal
5307 && emit_storent_insn (target, temp))
5308 /* If we managed to emit a nontemporal store, there is nothing else to
5309 do. */
5310 ;
5311 else
5312 {
5313 temp = force_operand (temp, target);
5314 if (temp != target)
5315 emit_move_insn (target, temp);
5316 }
5317 }
5318
5319 return NULL_RTX;
5320 }
5321 \f
5322 /* Return true if field F of structure TYPE is a flexible array. */
5323
5324 static bool
5325 flexible_array_member_p (const_tree f, const_tree type)
5326 {
5327 const_tree tf;
5328
5329 tf = TREE_TYPE (f);
5330 return (DECL_CHAIN (f) == NULL
5331 && TREE_CODE (tf) == ARRAY_TYPE
5332 && TYPE_DOMAIN (tf)
5333 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5334 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5335 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5336 && int_size_in_bytes (type) >= 0);
5337 }
5338
5339 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5340 must have in order for it to completely initialize a value of type TYPE.
5341 Return -1 if the number isn't known.
5342
5343 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5344
5345 static HOST_WIDE_INT
5346 count_type_elements (const_tree type, bool for_ctor_p)
5347 {
5348 switch (TREE_CODE (type))
5349 {
5350 case ARRAY_TYPE:
5351 {
5352 tree nelts;
5353
5354 nelts = array_type_nelts (type);
5355 if (nelts && host_integerp (nelts, 1))
5356 {
5357 unsigned HOST_WIDE_INT n;
5358
5359 n = tree_low_cst (nelts, 1) + 1;
5360 if (n == 0 || for_ctor_p)
5361 return n;
5362 else
5363 return n * count_type_elements (TREE_TYPE (type), false);
5364 }
5365 return for_ctor_p ? -1 : 1;
5366 }
5367
5368 case RECORD_TYPE:
5369 {
5370 unsigned HOST_WIDE_INT n;
5371 tree f;
5372
5373 n = 0;
5374 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5375 if (TREE_CODE (f) == FIELD_DECL)
5376 {
5377 if (!for_ctor_p)
5378 n += count_type_elements (TREE_TYPE (f), false);
5379 else if (!flexible_array_member_p (f, type))
5380 /* Don't count flexible arrays, which are not supposed
5381 to be initialized. */
5382 n += 1;
5383 }
5384
5385 return n;
5386 }
5387
5388 case UNION_TYPE:
5389 case QUAL_UNION_TYPE:
5390 {
5391 tree f;
5392 HOST_WIDE_INT n, m;
5393
5394 gcc_assert (!for_ctor_p);
5395 /* Estimate the number of scalars in each field and pick the
5396 maximum. Other estimates would do instead; the idea is simply
5397 to make sure that the estimate is not sensitive to the ordering
5398 of the fields. */
5399 n = 1;
5400 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5401 if (TREE_CODE (f) == FIELD_DECL)
5402 {
5403 m = count_type_elements (TREE_TYPE (f), false);
5404 /* If the field doesn't span the whole union, add an extra
5405 scalar for the rest. */
5406 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5407 TYPE_SIZE (type)) != 1)
5408 m++;
5409 if (n < m)
5410 n = m;
5411 }
5412 return n;
5413 }
5414
5415 case COMPLEX_TYPE:
5416 return 2;
5417
5418 case VECTOR_TYPE:
5419 return TYPE_VECTOR_SUBPARTS (type);
5420
5421 case INTEGER_TYPE:
5422 case REAL_TYPE:
5423 case FIXED_POINT_TYPE:
5424 case ENUMERAL_TYPE:
5425 case BOOLEAN_TYPE:
5426 case POINTER_TYPE:
5427 case OFFSET_TYPE:
5428 case REFERENCE_TYPE:
5429 case NULLPTR_TYPE:
5430 return 1;
5431
5432 case ERROR_MARK:
5433 return 0;
5434
5435 case VOID_TYPE:
5436 case METHOD_TYPE:
5437 case FUNCTION_TYPE:
5438 case LANG_TYPE:
5439 default:
5440 gcc_unreachable ();
5441 }
5442 }
5443
5444 /* Helper for categorize_ctor_elements. Identical interface. */
5445
5446 static bool
5447 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5448 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5449 {
5450 unsigned HOST_WIDE_INT idx;
5451 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5452 tree value, purpose, elt_type;
5453
5454 /* Whether CTOR is a valid constant initializer, in accordance with what
5455 initializer_constant_valid_p does. If inferred from the constructor
5456 elements, true until proven otherwise. */
5457 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5458 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5459
5460 nz_elts = 0;
5461 init_elts = 0;
5462 num_fields = 0;
5463 elt_type = NULL_TREE;
5464
5465 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5466 {
5467 HOST_WIDE_INT mult = 1;
5468
5469 if (TREE_CODE (purpose) == RANGE_EXPR)
5470 {
5471 tree lo_index = TREE_OPERAND (purpose, 0);
5472 tree hi_index = TREE_OPERAND (purpose, 1);
5473
5474 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5475 mult = (tree_low_cst (hi_index, 1)
5476 - tree_low_cst (lo_index, 1) + 1);
5477 }
5478 num_fields += mult;
5479 elt_type = TREE_TYPE (value);
5480
5481 switch (TREE_CODE (value))
5482 {
5483 case CONSTRUCTOR:
5484 {
5485 HOST_WIDE_INT nz = 0, ic = 0;
5486
5487 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5488 p_complete);
5489
5490 nz_elts += mult * nz;
5491 init_elts += mult * ic;
5492
5493 if (const_from_elts_p && const_p)
5494 const_p = const_elt_p;
5495 }
5496 break;
5497
5498 case INTEGER_CST:
5499 case REAL_CST:
5500 case FIXED_CST:
5501 if (!initializer_zerop (value))
5502 nz_elts += mult;
5503 init_elts += mult;
5504 break;
5505
5506 case STRING_CST:
5507 nz_elts += mult * TREE_STRING_LENGTH (value);
5508 init_elts += mult * TREE_STRING_LENGTH (value);
5509 break;
5510
5511 case COMPLEX_CST:
5512 if (!initializer_zerop (TREE_REALPART (value)))
5513 nz_elts += mult;
5514 if (!initializer_zerop (TREE_IMAGPART (value)))
5515 nz_elts += mult;
5516 init_elts += mult;
5517 break;
5518
5519 case VECTOR_CST:
5520 {
5521 unsigned i;
5522 for (i = 0; i < VECTOR_CST_NELTS (value); ++i)
5523 {
5524 tree v = VECTOR_CST_ELT (value, i);
5525 if (!initializer_zerop (v))
5526 nz_elts += mult;
5527 init_elts += mult;
5528 }
5529 }
5530 break;
5531
5532 default:
5533 {
5534 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5535 nz_elts += mult * tc;
5536 init_elts += mult * tc;
5537
5538 if (const_from_elts_p && const_p)
5539 const_p = initializer_constant_valid_p (value, elt_type)
5540 != NULL_TREE;
5541 }
5542 break;
5543 }
5544 }
5545
5546 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5547 num_fields, elt_type))
5548 *p_complete = false;
5549
5550 *p_nz_elts += nz_elts;
5551 *p_init_elts += init_elts;
5552
5553 return const_p;
5554 }
5555
5556 /* Examine CTOR to discover:
5557 * how many scalar fields are set to nonzero values,
5558 and place it in *P_NZ_ELTS;
5559 * how many scalar fields in total are in CTOR,
5560 and place it in *P_ELT_COUNT.
5561 * whether the constructor is complete -- in the sense that every
5562 meaningful byte is explicitly given a value --
5563 and place it in *P_COMPLETE.
5564
5565 Return whether or not CTOR is a valid static constant initializer, the same
5566 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5567
5568 bool
5569 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5570 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5571 {
5572 *p_nz_elts = 0;
5573 *p_init_elts = 0;
5574 *p_complete = true;
5575
5576 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5577 }
5578
5579 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5580 of which had type LAST_TYPE. Each element was itself a complete
5581 initializer, in the sense that every meaningful byte was explicitly
5582 given a value. Return true if the same is true for the constructor
5583 as a whole. */
5584
5585 bool
5586 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5587 const_tree last_type)
5588 {
5589 if (TREE_CODE (type) == UNION_TYPE
5590 || TREE_CODE (type) == QUAL_UNION_TYPE)
5591 {
5592 if (num_elts == 0)
5593 return false;
5594
5595 gcc_assert (num_elts == 1 && last_type);
5596
5597 /* ??? We could look at each element of the union, and find the
5598 largest element. Which would avoid comparing the size of the
5599 initialized element against any tail padding in the union.
5600 Doesn't seem worth the effort... */
5601 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5602 }
5603
5604 return count_type_elements (type, true) == num_elts;
5605 }
5606
5607 /* Return 1 if EXP contains mostly (3/4) zeros. */
5608
5609 static int
5610 mostly_zeros_p (const_tree exp)
5611 {
5612 if (TREE_CODE (exp) == CONSTRUCTOR)
5613 {
5614 HOST_WIDE_INT nz_elts, init_elts;
5615 bool complete_p;
5616
5617 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5618 return !complete_p || nz_elts < init_elts / 4;
5619 }
5620
5621 return initializer_zerop (exp);
5622 }
5623
5624 /* Return 1 if EXP contains all zeros. */
5625
5626 static int
5627 all_zeros_p (const_tree exp)
5628 {
5629 if (TREE_CODE (exp) == CONSTRUCTOR)
5630 {
5631 HOST_WIDE_INT nz_elts, init_elts;
5632 bool complete_p;
5633
5634 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5635 return nz_elts == 0;
5636 }
5637
5638 return initializer_zerop (exp);
5639 }
5640 \f
5641 /* Helper function for store_constructor.
5642 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5643 TYPE is the type of the CONSTRUCTOR, not the element type.
5644 CLEARED is as for store_constructor.
5645 ALIAS_SET is the alias set to use for any stores.
5646
5647 This provides a recursive shortcut back to store_constructor when it isn't
5648 necessary to go through store_field. This is so that we can pass through
5649 the cleared field to let store_constructor know that we may not have to
5650 clear a substructure if the outer structure has already been cleared. */
5651
5652 static void
5653 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5654 HOST_WIDE_INT bitpos, enum machine_mode mode,
5655 tree exp, tree type, int cleared,
5656 alias_set_type alias_set)
5657 {
5658 if (TREE_CODE (exp) == CONSTRUCTOR
5659 /* We can only call store_constructor recursively if the size and
5660 bit position are on a byte boundary. */
5661 && bitpos % BITS_PER_UNIT == 0
5662 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5663 /* If we have a nonzero bitpos for a register target, then we just
5664 let store_field do the bitfield handling. This is unlikely to
5665 generate unnecessary clear instructions anyways. */
5666 && (bitpos == 0 || MEM_P (target)))
5667 {
5668 if (MEM_P (target))
5669 target
5670 = adjust_address (target,
5671 GET_MODE (target) == BLKmode
5672 || 0 != (bitpos
5673 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5674 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5675
5676
5677 /* Update the alias set, if required. */
5678 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5679 && MEM_ALIAS_SET (target) != 0)
5680 {
5681 target = copy_rtx (target);
5682 set_mem_alias_set (target, alias_set);
5683 }
5684
5685 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5686 }
5687 else
5688 store_field (target, bitsize, bitpos, 0, 0, mode, exp, type, alias_set,
5689 false);
5690 }
5691
5692 /* Store the value of constructor EXP into the rtx TARGET.
5693 TARGET is either a REG or a MEM; we know it cannot conflict, since
5694 safe_from_p has been called.
5695 CLEARED is true if TARGET is known to have been zero'd.
5696 SIZE is the number of bytes of TARGET we are allowed to modify: this
5697 may not be the same as the size of EXP if we are assigning to a field
5698 which has been packed to exclude padding bits. */
5699
5700 static void
5701 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5702 {
5703 tree type = TREE_TYPE (exp);
5704 #ifdef WORD_REGISTER_OPERATIONS
5705 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5706 #endif
5707
5708 switch (TREE_CODE (type))
5709 {
5710 case RECORD_TYPE:
5711 case UNION_TYPE:
5712 case QUAL_UNION_TYPE:
5713 {
5714 unsigned HOST_WIDE_INT idx;
5715 tree field, value;
5716
5717 /* If size is zero or the target is already cleared, do nothing. */
5718 if (size == 0 || cleared)
5719 cleared = 1;
5720 /* We either clear the aggregate or indicate the value is dead. */
5721 else if ((TREE_CODE (type) == UNION_TYPE
5722 || TREE_CODE (type) == QUAL_UNION_TYPE)
5723 && ! CONSTRUCTOR_ELTS (exp))
5724 /* If the constructor is empty, clear the union. */
5725 {
5726 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5727 cleared = 1;
5728 }
5729
5730 /* If we are building a static constructor into a register,
5731 set the initial value as zero so we can fold the value into
5732 a constant. But if more than one register is involved,
5733 this probably loses. */
5734 else if (REG_P (target) && TREE_STATIC (exp)
5735 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5736 {
5737 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5738 cleared = 1;
5739 }
5740
5741 /* If the constructor has fewer fields than the structure or
5742 if we are initializing the structure to mostly zeros, clear
5743 the whole structure first. Don't do this if TARGET is a
5744 register whose mode size isn't equal to SIZE since
5745 clear_storage can't handle this case. */
5746 else if (size > 0
5747 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5748 != fields_length (type))
5749 || mostly_zeros_p (exp))
5750 && (!REG_P (target)
5751 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5752 == size)))
5753 {
5754 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5755 cleared = 1;
5756 }
5757
5758 if (REG_P (target) && !cleared)
5759 emit_clobber (target);
5760
5761 /* Store each element of the constructor into the
5762 corresponding field of TARGET. */
5763 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5764 {
5765 enum machine_mode mode;
5766 HOST_WIDE_INT bitsize;
5767 HOST_WIDE_INT bitpos = 0;
5768 tree offset;
5769 rtx to_rtx = target;
5770
5771 /* Just ignore missing fields. We cleared the whole
5772 structure, above, if any fields are missing. */
5773 if (field == 0)
5774 continue;
5775
5776 if (cleared && initializer_zerop (value))
5777 continue;
5778
5779 if (host_integerp (DECL_SIZE (field), 1))
5780 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5781 else
5782 bitsize = -1;
5783
5784 mode = DECL_MODE (field);
5785 if (DECL_BIT_FIELD (field))
5786 mode = VOIDmode;
5787
5788 offset = DECL_FIELD_OFFSET (field);
5789 if (host_integerp (offset, 0)
5790 && host_integerp (bit_position (field), 0))
5791 {
5792 bitpos = int_bit_position (field);
5793 offset = 0;
5794 }
5795 else
5796 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5797
5798 if (offset)
5799 {
5800 enum machine_mode address_mode;
5801 rtx offset_rtx;
5802
5803 offset
5804 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5805 make_tree (TREE_TYPE (exp),
5806 target));
5807
5808 offset_rtx = expand_normal (offset);
5809 gcc_assert (MEM_P (to_rtx));
5810
5811 address_mode = get_address_mode (to_rtx);
5812 if (GET_MODE (offset_rtx) != address_mode)
5813 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5814
5815 to_rtx = offset_address (to_rtx, offset_rtx,
5816 highest_pow2_factor (offset));
5817 }
5818
5819 #ifdef WORD_REGISTER_OPERATIONS
5820 /* If this initializes a field that is smaller than a
5821 word, at the start of a word, try to widen it to a full
5822 word. This special case allows us to output C++ member
5823 function initializations in a form that the optimizers
5824 can understand. */
5825 if (REG_P (target)
5826 && bitsize < BITS_PER_WORD
5827 && bitpos % BITS_PER_WORD == 0
5828 && GET_MODE_CLASS (mode) == MODE_INT
5829 && TREE_CODE (value) == INTEGER_CST
5830 && exp_size >= 0
5831 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5832 {
5833 tree type = TREE_TYPE (value);
5834
5835 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5836 {
5837 type = lang_hooks.types.type_for_mode
5838 (word_mode, TYPE_UNSIGNED (type));
5839 value = fold_convert (type, value);
5840 }
5841
5842 if (BYTES_BIG_ENDIAN)
5843 value
5844 = fold_build2 (LSHIFT_EXPR, type, value,
5845 build_int_cst (type,
5846 BITS_PER_WORD - bitsize));
5847 bitsize = BITS_PER_WORD;
5848 mode = word_mode;
5849 }
5850 #endif
5851
5852 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5853 && DECL_NONADDRESSABLE_P (field))
5854 {
5855 to_rtx = copy_rtx (to_rtx);
5856 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5857 }
5858
5859 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5860 value, type, cleared,
5861 get_alias_set (TREE_TYPE (field)));
5862 }
5863 break;
5864 }
5865 case ARRAY_TYPE:
5866 {
5867 tree value, index;
5868 unsigned HOST_WIDE_INT i;
5869 int need_to_clear;
5870 tree domain;
5871 tree elttype = TREE_TYPE (type);
5872 int const_bounds_p;
5873 HOST_WIDE_INT minelt = 0;
5874 HOST_WIDE_INT maxelt = 0;
5875
5876 domain = TYPE_DOMAIN (type);
5877 const_bounds_p = (TYPE_MIN_VALUE (domain)
5878 && TYPE_MAX_VALUE (domain)
5879 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5880 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5881
5882 /* If we have constant bounds for the range of the type, get them. */
5883 if (const_bounds_p)
5884 {
5885 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5886 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5887 }
5888
5889 /* If the constructor has fewer elements than the array, clear
5890 the whole array first. Similarly if this is static
5891 constructor of a non-BLKmode object. */
5892 if (cleared)
5893 need_to_clear = 0;
5894 else if (REG_P (target) && TREE_STATIC (exp))
5895 need_to_clear = 1;
5896 else
5897 {
5898 unsigned HOST_WIDE_INT idx;
5899 tree index, value;
5900 HOST_WIDE_INT count = 0, zero_count = 0;
5901 need_to_clear = ! const_bounds_p;
5902
5903 /* This loop is a more accurate version of the loop in
5904 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5905 is also needed to check for missing elements. */
5906 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5907 {
5908 HOST_WIDE_INT this_node_count;
5909
5910 if (need_to_clear)
5911 break;
5912
5913 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5914 {
5915 tree lo_index = TREE_OPERAND (index, 0);
5916 tree hi_index = TREE_OPERAND (index, 1);
5917
5918 if (! host_integerp (lo_index, 1)
5919 || ! host_integerp (hi_index, 1))
5920 {
5921 need_to_clear = 1;
5922 break;
5923 }
5924
5925 this_node_count = (tree_low_cst (hi_index, 1)
5926 - tree_low_cst (lo_index, 1) + 1);
5927 }
5928 else
5929 this_node_count = 1;
5930
5931 count += this_node_count;
5932 if (mostly_zeros_p (value))
5933 zero_count += this_node_count;
5934 }
5935
5936 /* Clear the entire array first if there are any missing
5937 elements, or if the incidence of zero elements is >=
5938 75%. */
5939 if (! need_to_clear
5940 && (count < maxelt - minelt + 1
5941 || 4 * zero_count >= 3 * count))
5942 need_to_clear = 1;
5943 }
5944
5945 if (need_to_clear && size > 0)
5946 {
5947 if (REG_P (target))
5948 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5949 else
5950 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5951 cleared = 1;
5952 }
5953
5954 if (!cleared && REG_P (target))
5955 /* Inform later passes that the old value is dead. */
5956 emit_clobber (target);
5957
5958 /* Store each element of the constructor into the
5959 corresponding element of TARGET, determined by counting the
5960 elements. */
5961 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5962 {
5963 enum machine_mode mode;
5964 HOST_WIDE_INT bitsize;
5965 HOST_WIDE_INT bitpos;
5966 rtx xtarget = target;
5967
5968 if (cleared && initializer_zerop (value))
5969 continue;
5970
5971 mode = TYPE_MODE (elttype);
5972 if (mode == BLKmode)
5973 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5974 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5975 : -1);
5976 else
5977 bitsize = GET_MODE_BITSIZE (mode);
5978
5979 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5980 {
5981 tree lo_index = TREE_OPERAND (index, 0);
5982 tree hi_index = TREE_OPERAND (index, 1);
5983 rtx index_r, pos_rtx;
5984 HOST_WIDE_INT lo, hi, count;
5985 tree position;
5986
5987 /* If the range is constant and "small", unroll the loop. */
5988 if (const_bounds_p
5989 && host_integerp (lo_index, 0)
5990 && host_integerp (hi_index, 0)
5991 && (lo = tree_low_cst (lo_index, 0),
5992 hi = tree_low_cst (hi_index, 0),
5993 count = hi - lo + 1,
5994 (!MEM_P (target)
5995 || count <= 2
5996 || (host_integerp (TYPE_SIZE (elttype), 1)
5997 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5998 <= 40 * 8)))))
5999 {
6000 lo -= minelt; hi -= minelt;
6001 for (; lo <= hi; lo++)
6002 {
6003 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
6004
6005 if (MEM_P (target)
6006 && !MEM_KEEP_ALIAS_SET_P (target)
6007 && TREE_CODE (type) == ARRAY_TYPE
6008 && TYPE_NONALIASED_COMPONENT (type))
6009 {
6010 target = copy_rtx (target);
6011 MEM_KEEP_ALIAS_SET_P (target) = 1;
6012 }
6013
6014 store_constructor_field
6015 (target, bitsize, bitpos, mode, value, type, cleared,
6016 get_alias_set (elttype));
6017 }
6018 }
6019 else
6020 {
6021 rtx loop_start = gen_label_rtx ();
6022 rtx loop_end = gen_label_rtx ();
6023 tree exit_cond;
6024
6025 expand_normal (hi_index);
6026
6027 index = build_decl (EXPR_LOCATION (exp),
6028 VAR_DECL, NULL_TREE, domain);
6029 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6030 SET_DECL_RTL (index, index_r);
6031 store_expr (lo_index, index_r, 0, false);
6032
6033 /* Build the head of the loop. */
6034 do_pending_stack_adjust ();
6035 emit_label (loop_start);
6036
6037 /* Assign value to element index. */
6038 position =
6039 fold_convert (ssizetype,
6040 fold_build2 (MINUS_EXPR,
6041 TREE_TYPE (index),
6042 index,
6043 TYPE_MIN_VALUE (domain)));
6044
6045 position =
6046 size_binop (MULT_EXPR, position,
6047 fold_convert (ssizetype,
6048 TYPE_SIZE_UNIT (elttype)));
6049
6050 pos_rtx = expand_normal (position);
6051 xtarget = offset_address (target, pos_rtx,
6052 highest_pow2_factor (position));
6053 xtarget = adjust_address (xtarget, mode, 0);
6054 if (TREE_CODE (value) == CONSTRUCTOR)
6055 store_constructor (value, xtarget, cleared,
6056 bitsize / BITS_PER_UNIT);
6057 else
6058 store_expr (value, xtarget, 0, false);
6059
6060 /* Generate a conditional jump to exit the loop. */
6061 exit_cond = build2 (LT_EXPR, integer_type_node,
6062 index, hi_index);
6063 jumpif (exit_cond, loop_end, -1);
6064
6065 /* Update the loop counter, and jump to the head of
6066 the loop. */
6067 expand_assignment (index,
6068 build2 (PLUS_EXPR, TREE_TYPE (index),
6069 index, integer_one_node),
6070 false);
6071
6072 emit_jump (loop_start);
6073
6074 /* Build the end of the loop. */
6075 emit_label (loop_end);
6076 }
6077 }
6078 else if ((index != 0 && ! host_integerp (index, 0))
6079 || ! host_integerp (TYPE_SIZE (elttype), 1))
6080 {
6081 tree position;
6082
6083 if (index == 0)
6084 index = ssize_int (1);
6085
6086 if (minelt)
6087 index = fold_convert (ssizetype,
6088 fold_build2 (MINUS_EXPR,
6089 TREE_TYPE (index),
6090 index,
6091 TYPE_MIN_VALUE (domain)));
6092
6093 position =
6094 size_binop (MULT_EXPR, index,
6095 fold_convert (ssizetype,
6096 TYPE_SIZE_UNIT (elttype)));
6097 xtarget = offset_address (target,
6098 expand_normal (position),
6099 highest_pow2_factor (position));
6100 xtarget = adjust_address (xtarget, mode, 0);
6101 store_expr (value, xtarget, 0, false);
6102 }
6103 else
6104 {
6105 if (index != 0)
6106 bitpos = ((tree_low_cst (index, 0) - minelt)
6107 * tree_low_cst (TYPE_SIZE (elttype), 1));
6108 else
6109 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
6110
6111 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6112 && TREE_CODE (type) == ARRAY_TYPE
6113 && TYPE_NONALIASED_COMPONENT (type))
6114 {
6115 target = copy_rtx (target);
6116 MEM_KEEP_ALIAS_SET_P (target) = 1;
6117 }
6118 store_constructor_field (target, bitsize, bitpos, mode, value,
6119 type, cleared, get_alias_set (elttype));
6120 }
6121 }
6122 break;
6123 }
6124
6125 case VECTOR_TYPE:
6126 {
6127 unsigned HOST_WIDE_INT idx;
6128 constructor_elt *ce;
6129 int i;
6130 int need_to_clear;
6131 int icode = 0;
6132 tree elttype = TREE_TYPE (type);
6133 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
6134 enum machine_mode eltmode = TYPE_MODE (elttype);
6135 HOST_WIDE_INT bitsize;
6136 HOST_WIDE_INT bitpos;
6137 rtvec vector = NULL;
6138 unsigned n_elts;
6139 alias_set_type alias;
6140
6141 gcc_assert (eltmode != BLKmode);
6142
6143 n_elts = TYPE_VECTOR_SUBPARTS (type);
6144 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6145 {
6146 enum machine_mode mode = GET_MODE (target);
6147
6148 icode = (int) optab_handler (vec_init_optab, mode);
6149 if (icode != CODE_FOR_nothing)
6150 {
6151 unsigned int i;
6152
6153 vector = rtvec_alloc (n_elts);
6154 for (i = 0; i < n_elts; i++)
6155 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6156 }
6157 }
6158
6159 /* If the constructor has fewer elements than the vector,
6160 clear the whole array first. Similarly if this is static
6161 constructor of a non-BLKmode object. */
6162 if (cleared)
6163 need_to_clear = 0;
6164 else if (REG_P (target) && TREE_STATIC (exp))
6165 need_to_clear = 1;
6166 else
6167 {
6168 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6169 tree value;
6170
6171 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6172 {
6173 int n_elts_here = tree_low_cst
6174 (int_const_binop (TRUNC_DIV_EXPR,
6175 TYPE_SIZE (TREE_TYPE (value)),
6176 TYPE_SIZE (elttype)), 1);
6177
6178 count += n_elts_here;
6179 if (mostly_zeros_p (value))
6180 zero_count += n_elts_here;
6181 }
6182
6183 /* Clear the entire vector first if there are any missing elements,
6184 or if the incidence of zero elements is >= 75%. */
6185 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6186 }
6187
6188 if (need_to_clear && size > 0 && !vector)
6189 {
6190 if (REG_P (target))
6191 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6192 else
6193 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6194 cleared = 1;
6195 }
6196
6197 /* Inform later passes that the old value is dead. */
6198 if (!cleared && !vector && REG_P (target))
6199 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6200
6201 if (MEM_P (target))
6202 alias = MEM_ALIAS_SET (target);
6203 else
6204 alias = get_alias_set (elttype);
6205
6206 /* Store each element of the constructor into the corresponding
6207 element of TARGET, determined by counting the elements. */
6208 for (idx = 0, i = 0;
6209 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6210 idx++, i += bitsize / elt_size)
6211 {
6212 HOST_WIDE_INT eltpos;
6213 tree value = ce->value;
6214
6215 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6216 if (cleared && initializer_zerop (value))
6217 continue;
6218
6219 if (ce->index)
6220 eltpos = tree_low_cst (ce->index, 1);
6221 else
6222 eltpos = i;
6223
6224 if (vector)
6225 {
6226 /* Vector CONSTRUCTORs should only be built from smaller
6227 vectors in the case of BLKmode vectors. */
6228 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6229 RTVEC_ELT (vector, eltpos)
6230 = expand_normal (value);
6231 }
6232 else
6233 {
6234 enum machine_mode value_mode =
6235 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6236 ? TYPE_MODE (TREE_TYPE (value))
6237 : eltmode;
6238 bitpos = eltpos * elt_size;
6239 store_constructor_field (target, bitsize, bitpos,
6240 value_mode, value, type,
6241 cleared, alias);
6242 }
6243 }
6244
6245 if (vector)
6246 emit_insn (GEN_FCN (icode)
6247 (target,
6248 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6249 break;
6250 }
6251
6252 default:
6253 gcc_unreachable ();
6254 }
6255 }
6256
6257 /* Store the value of EXP (an expression tree)
6258 into a subfield of TARGET which has mode MODE and occupies
6259 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6260 If MODE is VOIDmode, it means that we are storing into a bit-field.
6261
6262 BITREGION_START is bitpos of the first bitfield in this region.
6263 BITREGION_END is the bitpos of the ending bitfield in this region.
6264 These two fields are 0, if the C++ memory model does not apply,
6265 or we are not interested in keeping track of bitfield regions.
6266
6267 Always return const0_rtx unless we have something particular to
6268 return.
6269
6270 TYPE is the type of the underlying object,
6271
6272 ALIAS_SET is the alias set for the destination. This value will
6273 (in general) be different from that for TARGET, since TARGET is a
6274 reference to the containing structure.
6275
6276 If NONTEMPORAL is true, try generating a nontemporal store. */
6277
6278 static rtx
6279 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6280 unsigned HOST_WIDE_INT bitregion_start,
6281 unsigned HOST_WIDE_INT bitregion_end,
6282 enum machine_mode mode, tree exp, tree type,
6283 alias_set_type alias_set, bool nontemporal)
6284 {
6285 if (TREE_CODE (exp) == ERROR_MARK)
6286 return const0_rtx;
6287
6288 /* If we have nothing to store, do nothing unless the expression has
6289 side-effects. */
6290 if (bitsize == 0)
6291 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6292
6293 /* If we are storing into an unaligned field of an aligned union that is
6294 in a register, we may have the mode of TARGET being an integer mode but
6295 MODE == BLKmode. In that case, get an aligned object whose size and
6296 alignment are the same as TARGET and store TARGET into it (we can avoid
6297 the store if the field being stored is the entire width of TARGET). Then
6298 call ourselves recursively to store the field into a BLKmode version of
6299 that object. Finally, load from the object into TARGET. This is not
6300 very efficient in general, but should only be slightly more expensive
6301 than the otherwise-required unaligned accesses. Perhaps this can be
6302 cleaned up later. It's tempting to make OBJECT readonly, but it's set
6303 twice, once with emit_move_insn and once via store_field. */
6304
6305 if (mode == BLKmode
6306 && (REG_P (target) || GET_CODE (target) == SUBREG))
6307 {
6308 rtx object = assign_temp (type, 1, 1);
6309 rtx blk_object = adjust_address (object, BLKmode, 0);
6310
6311 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
6312 emit_move_insn (object, target);
6313
6314 store_field (blk_object, bitsize, bitpos,
6315 bitregion_start, bitregion_end,
6316 mode, exp, type, MEM_ALIAS_SET (blk_object), nontemporal);
6317
6318 emit_move_insn (target, object);
6319
6320 /* We want to return the BLKmode version of the data. */
6321 return blk_object;
6322 }
6323
6324 if (GET_CODE (target) == CONCAT)
6325 {
6326 /* We're storing into a struct containing a single __complex. */
6327
6328 gcc_assert (!bitpos);
6329 return store_expr (exp, target, 0, nontemporal);
6330 }
6331
6332 /* If the structure is in a register or if the component
6333 is a bit field, we cannot use addressing to access it.
6334 Use bit-field techniques or SUBREG to store in it. */
6335
6336 if (mode == VOIDmode
6337 || (mode != BLKmode && ! direct_store[(int) mode]
6338 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6339 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6340 || REG_P (target)
6341 || GET_CODE (target) == SUBREG
6342 /* If the field isn't aligned enough to store as an ordinary memref,
6343 store it as a bit field. */
6344 || (mode != BLKmode
6345 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6346 || bitpos % GET_MODE_ALIGNMENT (mode))
6347 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6348 || (bitpos % BITS_PER_UNIT != 0)))
6349 || (bitsize >= 0 && mode != BLKmode
6350 && GET_MODE_BITSIZE (mode) > bitsize)
6351 /* If the RHS and field are a constant size and the size of the
6352 RHS isn't the same size as the bitfield, we must use bitfield
6353 operations. */
6354 || (bitsize >= 0
6355 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6356 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6357 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6358 decl we must use bitfield operations. */
6359 || (bitsize >= 0
6360 && TREE_CODE (exp) == MEM_REF
6361 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6362 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6363 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6364 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6365 {
6366 rtx temp;
6367 gimple nop_def;
6368
6369 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6370 implies a mask operation. If the precision is the same size as
6371 the field we're storing into, that mask is redundant. This is
6372 particularly common with bit field assignments generated by the
6373 C front end. */
6374 nop_def = get_def_for_expr (exp, NOP_EXPR);
6375 if (nop_def)
6376 {
6377 tree type = TREE_TYPE (exp);
6378 if (INTEGRAL_TYPE_P (type)
6379 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6380 && bitsize == TYPE_PRECISION (type))
6381 {
6382 tree op = gimple_assign_rhs1 (nop_def);
6383 type = TREE_TYPE (op);
6384 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6385 exp = op;
6386 }
6387 }
6388
6389 temp = expand_normal (exp);
6390
6391 /* If BITSIZE is narrower than the size of the type of EXP
6392 we will be narrowing TEMP. Normally, what's wanted are the
6393 low-order bits. However, if EXP's type is a record and this is
6394 big-endian machine, we want the upper BITSIZE bits. */
6395 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6396 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6397 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6398 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6399 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6400 NULL_RTX, 1);
6401
6402 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6403 if (mode != VOIDmode && mode != BLKmode
6404 && mode != TYPE_MODE (TREE_TYPE (exp)))
6405 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6406
6407 /* If the modes of TEMP and TARGET are both BLKmode, both
6408 must be in memory and BITPOS must be aligned on a byte
6409 boundary. If so, we simply do a block copy. Likewise
6410 for a BLKmode-like TARGET. */
6411 if (GET_MODE (temp) == BLKmode
6412 && (GET_MODE (target) == BLKmode
6413 || (MEM_P (target)
6414 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6415 && (bitpos % BITS_PER_UNIT) == 0
6416 && (bitsize % BITS_PER_UNIT) == 0)))
6417 {
6418 gcc_assert (MEM_P (target) && MEM_P (temp)
6419 && (bitpos % BITS_PER_UNIT) == 0);
6420
6421 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6422 emit_block_move (target, temp,
6423 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6424 / BITS_PER_UNIT),
6425 BLOCK_OP_NORMAL);
6426
6427 return const0_rtx;
6428 }
6429
6430 /* Store the value in the bitfield. */
6431 store_bit_field (target, bitsize, bitpos,
6432 bitregion_start, bitregion_end,
6433 mode, temp);
6434
6435 return const0_rtx;
6436 }
6437 else
6438 {
6439 /* Now build a reference to just the desired component. */
6440 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6441
6442 if (to_rtx == target)
6443 to_rtx = copy_rtx (to_rtx);
6444
6445 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6446 set_mem_alias_set (to_rtx, alias_set);
6447
6448 return store_expr (exp, to_rtx, 0, nontemporal);
6449 }
6450 }
6451 \f
6452 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6453 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6454 codes and find the ultimate containing object, which we return.
6455
6456 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6457 bit position, and *PUNSIGNEDP to the signedness of the field.
6458 If the position of the field is variable, we store a tree
6459 giving the variable offset (in units) in *POFFSET.
6460 This offset is in addition to the bit position.
6461 If the position is not variable, we store 0 in *POFFSET.
6462
6463 If any of the extraction expressions is volatile,
6464 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6465
6466 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6467 Otherwise, it is a mode that can be used to access the field.
6468
6469 If the field describes a variable-sized object, *PMODE is set to
6470 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6471 this case, but the address of the object can be found.
6472
6473 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6474 look through nodes that serve as markers of a greater alignment than
6475 the one that can be deduced from the expression. These nodes make it
6476 possible for front-ends to prevent temporaries from being created by
6477 the middle-end on alignment considerations. For that purpose, the
6478 normal operating mode at high-level is to always pass FALSE so that
6479 the ultimate containing object is really returned; moreover, the
6480 associated predicate handled_component_p will always return TRUE
6481 on these nodes, thus indicating that they are essentially handled
6482 by get_inner_reference. TRUE should only be passed when the caller
6483 is scanning the expression in order to build another representation
6484 and specifically knows how to handle these nodes; as such, this is
6485 the normal operating mode in the RTL expanders. */
6486
6487 tree
6488 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6489 HOST_WIDE_INT *pbitpos, tree *poffset,
6490 enum machine_mode *pmode, int *punsignedp,
6491 int *pvolatilep, bool keep_aligning)
6492 {
6493 tree size_tree = 0;
6494 enum machine_mode mode = VOIDmode;
6495 bool blkmode_bitfield = false;
6496 tree offset = size_zero_node;
6497 double_int bit_offset = double_int_zero;
6498
6499 /* First get the mode, signedness, and size. We do this from just the
6500 outermost expression. */
6501 *pbitsize = -1;
6502 if (TREE_CODE (exp) == COMPONENT_REF)
6503 {
6504 tree field = TREE_OPERAND (exp, 1);
6505 size_tree = DECL_SIZE (field);
6506 if (!DECL_BIT_FIELD (field))
6507 mode = DECL_MODE (field);
6508 else if (DECL_MODE (field) == BLKmode)
6509 blkmode_bitfield = true;
6510 else if (TREE_THIS_VOLATILE (exp)
6511 && flag_strict_volatile_bitfields > 0)
6512 /* Volatile bitfields should be accessed in the mode of the
6513 field's type, not the mode computed based on the bit
6514 size. */
6515 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6516
6517 *punsignedp = DECL_UNSIGNED (field);
6518 }
6519 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6520 {
6521 size_tree = TREE_OPERAND (exp, 1);
6522 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6523 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6524
6525 /* For vector types, with the correct size of access, use the mode of
6526 inner type. */
6527 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6528 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6529 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6530 mode = TYPE_MODE (TREE_TYPE (exp));
6531 }
6532 else
6533 {
6534 mode = TYPE_MODE (TREE_TYPE (exp));
6535 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6536
6537 if (mode == BLKmode)
6538 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6539 else
6540 *pbitsize = GET_MODE_BITSIZE (mode);
6541 }
6542
6543 if (size_tree != 0)
6544 {
6545 if (! host_integerp (size_tree, 1))
6546 mode = BLKmode, *pbitsize = -1;
6547 else
6548 *pbitsize = tree_low_cst (size_tree, 1);
6549 }
6550
6551 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6552 and find the ultimate containing object. */
6553 while (1)
6554 {
6555 switch (TREE_CODE (exp))
6556 {
6557 case BIT_FIELD_REF:
6558 bit_offset
6559 = double_int_add (bit_offset,
6560 tree_to_double_int (TREE_OPERAND (exp, 2)));
6561 break;
6562
6563 case COMPONENT_REF:
6564 {
6565 tree field = TREE_OPERAND (exp, 1);
6566 tree this_offset = component_ref_field_offset (exp);
6567
6568 /* If this field hasn't been filled in yet, don't go past it.
6569 This should only happen when folding expressions made during
6570 type construction. */
6571 if (this_offset == 0)
6572 break;
6573
6574 offset = size_binop (PLUS_EXPR, offset, this_offset);
6575 bit_offset = double_int_add (bit_offset,
6576 tree_to_double_int
6577 (DECL_FIELD_BIT_OFFSET (field)));
6578
6579 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6580 }
6581 break;
6582
6583 case ARRAY_REF:
6584 case ARRAY_RANGE_REF:
6585 {
6586 tree index = TREE_OPERAND (exp, 1);
6587 tree low_bound = array_ref_low_bound (exp);
6588 tree unit_size = array_ref_element_size (exp);
6589
6590 /* We assume all arrays have sizes that are a multiple of a byte.
6591 First subtract the lower bound, if any, in the type of the
6592 index, then convert to sizetype and multiply by the size of
6593 the array element. */
6594 if (! integer_zerop (low_bound))
6595 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6596 index, low_bound);
6597
6598 offset = size_binop (PLUS_EXPR, offset,
6599 size_binop (MULT_EXPR,
6600 fold_convert (sizetype, index),
6601 unit_size));
6602 }
6603 break;
6604
6605 case REALPART_EXPR:
6606 break;
6607
6608 case IMAGPART_EXPR:
6609 bit_offset = double_int_add (bit_offset,
6610 uhwi_to_double_int (*pbitsize));
6611 break;
6612
6613 case VIEW_CONVERT_EXPR:
6614 if (keep_aligning && STRICT_ALIGNMENT
6615 && (TYPE_ALIGN (TREE_TYPE (exp))
6616 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6617 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6618 < BIGGEST_ALIGNMENT)
6619 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6620 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6621 goto done;
6622 break;
6623
6624 case MEM_REF:
6625 /* Hand back the decl for MEM[&decl, off]. */
6626 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6627 {
6628 tree off = TREE_OPERAND (exp, 1);
6629 if (!integer_zerop (off))
6630 {
6631 double_int boff, coff = mem_ref_offset (exp);
6632 boff = double_int_lshift (coff,
6633 BITS_PER_UNIT == 8
6634 ? 3 : exact_log2 (BITS_PER_UNIT),
6635 HOST_BITS_PER_DOUBLE_INT, true);
6636 bit_offset = double_int_add (bit_offset, boff);
6637 }
6638 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6639 }
6640 goto done;
6641
6642 default:
6643 goto done;
6644 }
6645
6646 /* If any reference in the chain is volatile, the effect is volatile. */
6647 if (TREE_THIS_VOLATILE (exp))
6648 *pvolatilep = 1;
6649
6650 exp = TREE_OPERAND (exp, 0);
6651 }
6652 done:
6653
6654 /* If OFFSET is constant, see if we can return the whole thing as a
6655 constant bit position. Make sure to handle overflow during
6656 this conversion. */
6657 if (TREE_CODE (offset) == INTEGER_CST)
6658 {
6659 double_int tem = tree_to_double_int (offset);
6660 tem = double_int_sext (tem, TYPE_PRECISION (sizetype));
6661 tem = double_int_lshift (tem,
6662 BITS_PER_UNIT == 8
6663 ? 3 : exact_log2 (BITS_PER_UNIT),
6664 HOST_BITS_PER_DOUBLE_INT, true);
6665 tem = double_int_add (tem, bit_offset);
6666 if (double_int_fits_in_shwi_p (tem))
6667 {
6668 *pbitpos = double_int_to_shwi (tem);
6669 *poffset = offset = NULL_TREE;
6670 }
6671 }
6672
6673 /* Otherwise, split it up. */
6674 if (offset)
6675 {
6676 /* Avoid returning a negative bitpos as this may wreak havoc later. */
6677 if (double_int_negative_p (bit_offset))
6678 {
6679 double_int mask
6680 = double_int_mask (BITS_PER_UNIT == 8
6681 ? 3 : exact_log2 (BITS_PER_UNIT));
6682 double_int tem = double_int_and_not (bit_offset, mask);
6683 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
6684 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
6685 bit_offset = double_int_sub (bit_offset, tem);
6686 tem = double_int_rshift (tem,
6687 BITS_PER_UNIT == 8
6688 ? 3 : exact_log2 (BITS_PER_UNIT),
6689 HOST_BITS_PER_DOUBLE_INT, true);
6690 offset = size_binop (PLUS_EXPR, offset,
6691 double_int_to_tree (sizetype, tem));
6692 }
6693
6694 *pbitpos = double_int_to_shwi (bit_offset);
6695 *poffset = offset;
6696 }
6697
6698 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6699 if (mode == VOIDmode
6700 && blkmode_bitfield
6701 && (*pbitpos % BITS_PER_UNIT) == 0
6702 && (*pbitsize % BITS_PER_UNIT) == 0)
6703 *pmode = BLKmode;
6704 else
6705 *pmode = mode;
6706
6707 return exp;
6708 }
6709
6710 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6711 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6712 EXP is marked as PACKED. */
6713
6714 bool
6715 contains_packed_reference (const_tree exp)
6716 {
6717 bool packed_p = false;
6718
6719 while (1)
6720 {
6721 switch (TREE_CODE (exp))
6722 {
6723 case COMPONENT_REF:
6724 {
6725 tree field = TREE_OPERAND (exp, 1);
6726 packed_p = DECL_PACKED (field)
6727 || TYPE_PACKED (TREE_TYPE (field))
6728 || TYPE_PACKED (TREE_TYPE (exp));
6729 if (packed_p)
6730 goto done;
6731 }
6732 break;
6733
6734 case BIT_FIELD_REF:
6735 case ARRAY_REF:
6736 case ARRAY_RANGE_REF:
6737 case REALPART_EXPR:
6738 case IMAGPART_EXPR:
6739 case VIEW_CONVERT_EXPR:
6740 break;
6741
6742 default:
6743 goto done;
6744 }
6745 exp = TREE_OPERAND (exp, 0);
6746 }
6747 done:
6748 return packed_p;
6749 }
6750
6751 /* Return a tree of sizetype representing the size, in bytes, of the element
6752 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6753
6754 tree
6755 array_ref_element_size (tree exp)
6756 {
6757 tree aligned_size = TREE_OPERAND (exp, 3);
6758 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6759 location_t loc = EXPR_LOCATION (exp);
6760
6761 /* If a size was specified in the ARRAY_REF, it's the size measured
6762 in alignment units of the element type. So multiply by that value. */
6763 if (aligned_size)
6764 {
6765 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6766 sizetype from another type of the same width and signedness. */
6767 if (TREE_TYPE (aligned_size) != sizetype)
6768 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6769 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6770 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6771 }
6772
6773 /* Otherwise, take the size from that of the element type. Substitute
6774 any PLACEHOLDER_EXPR that we have. */
6775 else
6776 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6777 }
6778
6779 /* Return a tree representing the lower bound of the array mentioned in
6780 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6781
6782 tree
6783 array_ref_low_bound (tree exp)
6784 {
6785 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6786
6787 /* If a lower bound is specified in EXP, use it. */
6788 if (TREE_OPERAND (exp, 2))
6789 return TREE_OPERAND (exp, 2);
6790
6791 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6792 substituting for a PLACEHOLDER_EXPR as needed. */
6793 if (domain_type && TYPE_MIN_VALUE (domain_type))
6794 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6795
6796 /* Otherwise, return a zero of the appropriate type. */
6797 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6798 }
6799
6800 /* Returns true if REF is an array reference to an array at the end of
6801 a structure. If this is the case, the array may be allocated larger
6802 than its upper bound implies. */
6803
6804 bool
6805 array_at_struct_end_p (tree ref)
6806 {
6807 if (TREE_CODE (ref) != ARRAY_REF
6808 && TREE_CODE (ref) != ARRAY_RANGE_REF)
6809 return false;
6810
6811 while (handled_component_p (ref))
6812 {
6813 /* If the reference chain contains a component reference to a
6814 non-union type and there follows another field the reference
6815 is not at the end of a structure. */
6816 if (TREE_CODE (ref) == COMPONENT_REF
6817 && TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == RECORD_TYPE)
6818 {
6819 tree nextf = DECL_CHAIN (TREE_OPERAND (ref, 1));
6820 while (nextf && TREE_CODE (nextf) != FIELD_DECL)
6821 nextf = DECL_CHAIN (nextf);
6822 if (nextf)
6823 return false;
6824 }
6825
6826 ref = TREE_OPERAND (ref, 0);
6827 }
6828
6829 /* If the reference is based on a declared entity, the size of the array
6830 is constrained by its given domain. */
6831 if (DECL_P (ref))
6832 return false;
6833
6834 return true;
6835 }
6836
6837 /* Return a tree representing the upper bound of the array mentioned in
6838 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6839
6840 tree
6841 array_ref_up_bound (tree exp)
6842 {
6843 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6844
6845 /* If there is a domain type and it has an upper bound, use it, substituting
6846 for a PLACEHOLDER_EXPR as needed. */
6847 if (domain_type && TYPE_MAX_VALUE (domain_type))
6848 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6849
6850 /* Otherwise fail. */
6851 return NULL_TREE;
6852 }
6853
6854 /* Return a tree representing the offset, in bytes, of the field referenced
6855 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6856
6857 tree
6858 component_ref_field_offset (tree exp)
6859 {
6860 tree aligned_offset = TREE_OPERAND (exp, 2);
6861 tree field = TREE_OPERAND (exp, 1);
6862 location_t loc = EXPR_LOCATION (exp);
6863
6864 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6865 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6866 value. */
6867 if (aligned_offset)
6868 {
6869 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6870 sizetype from another type of the same width and signedness. */
6871 if (TREE_TYPE (aligned_offset) != sizetype)
6872 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6873 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6874 size_int (DECL_OFFSET_ALIGN (field)
6875 / BITS_PER_UNIT));
6876 }
6877
6878 /* Otherwise, take the offset from that of the field. Substitute
6879 any PLACEHOLDER_EXPR that we have. */
6880 else
6881 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6882 }
6883
6884 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6885
6886 static unsigned HOST_WIDE_INT
6887 target_align (const_tree target)
6888 {
6889 /* We might have a chain of nested references with intermediate misaligning
6890 bitfields components, so need to recurse to find out. */
6891
6892 unsigned HOST_WIDE_INT this_align, outer_align;
6893
6894 switch (TREE_CODE (target))
6895 {
6896 case BIT_FIELD_REF:
6897 return 1;
6898
6899 case COMPONENT_REF:
6900 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6901 outer_align = target_align (TREE_OPERAND (target, 0));
6902 return MIN (this_align, outer_align);
6903
6904 case ARRAY_REF:
6905 case ARRAY_RANGE_REF:
6906 this_align = TYPE_ALIGN (TREE_TYPE (target));
6907 outer_align = target_align (TREE_OPERAND (target, 0));
6908 return MIN (this_align, outer_align);
6909
6910 CASE_CONVERT:
6911 case NON_LVALUE_EXPR:
6912 case VIEW_CONVERT_EXPR:
6913 this_align = TYPE_ALIGN (TREE_TYPE (target));
6914 outer_align = target_align (TREE_OPERAND (target, 0));
6915 return MAX (this_align, outer_align);
6916
6917 default:
6918 return TYPE_ALIGN (TREE_TYPE (target));
6919 }
6920 }
6921
6922 \f
6923 /* Given an rtx VALUE that may contain additions and multiplications, return
6924 an equivalent value that just refers to a register, memory, or constant.
6925 This is done by generating instructions to perform the arithmetic and
6926 returning a pseudo-register containing the value.
6927
6928 The returned value may be a REG, SUBREG, MEM or constant. */
6929
6930 rtx
6931 force_operand (rtx value, rtx target)
6932 {
6933 rtx op1, op2;
6934 /* Use subtarget as the target for operand 0 of a binary operation. */
6935 rtx subtarget = get_subtarget (target);
6936 enum rtx_code code = GET_CODE (value);
6937
6938 /* Check for subreg applied to an expression produced by loop optimizer. */
6939 if (code == SUBREG
6940 && !REG_P (SUBREG_REG (value))
6941 && !MEM_P (SUBREG_REG (value)))
6942 {
6943 value
6944 = simplify_gen_subreg (GET_MODE (value),
6945 force_reg (GET_MODE (SUBREG_REG (value)),
6946 force_operand (SUBREG_REG (value),
6947 NULL_RTX)),
6948 GET_MODE (SUBREG_REG (value)),
6949 SUBREG_BYTE (value));
6950 code = GET_CODE (value);
6951 }
6952
6953 /* Check for a PIC address load. */
6954 if ((code == PLUS || code == MINUS)
6955 && XEXP (value, 0) == pic_offset_table_rtx
6956 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6957 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6958 || GET_CODE (XEXP (value, 1)) == CONST))
6959 {
6960 if (!subtarget)
6961 subtarget = gen_reg_rtx (GET_MODE (value));
6962 emit_move_insn (subtarget, value);
6963 return subtarget;
6964 }
6965
6966 if (ARITHMETIC_P (value))
6967 {
6968 op2 = XEXP (value, 1);
6969 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6970 subtarget = 0;
6971 if (code == MINUS && CONST_INT_P (op2))
6972 {
6973 code = PLUS;
6974 op2 = negate_rtx (GET_MODE (value), op2);
6975 }
6976
6977 /* Check for an addition with OP2 a constant integer and our first
6978 operand a PLUS of a virtual register and something else. In that
6979 case, we want to emit the sum of the virtual register and the
6980 constant first and then add the other value. This allows virtual
6981 register instantiation to simply modify the constant rather than
6982 creating another one around this addition. */
6983 if (code == PLUS && CONST_INT_P (op2)
6984 && GET_CODE (XEXP (value, 0)) == PLUS
6985 && REG_P (XEXP (XEXP (value, 0), 0))
6986 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6987 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6988 {
6989 rtx temp = expand_simple_binop (GET_MODE (value), code,
6990 XEXP (XEXP (value, 0), 0), op2,
6991 subtarget, 0, OPTAB_LIB_WIDEN);
6992 return expand_simple_binop (GET_MODE (value), code, temp,
6993 force_operand (XEXP (XEXP (value,
6994 0), 1), 0),
6995 target, 0, OPTAB_LIB_WIDEN);
6996 }
6997
6998 op1 = force_operand (XEXP (value, 0), subtarget);
6999 op2 = force_operand (op2, NULL_RTX);
7000 switch (code)
7001 {
7002 case MULT:
7003 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7004 case DIV:
7005 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7006 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7007 target, 1, OPTAB_LIB_WIDEN);
7008 else
7009 return expand_divmod (0,
7010 FLOAT_MODE_P (GET_MODE (value))
7011 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7012 GET_MODE (value), op1, op2, target, 0);
7013 case MOD:
7014 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7015 target, 0);
7016 case UDIV:
7017 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7018 target, 1);
7019 case UMOD:
7020 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7021 target, 1);
7022 case ASHIFTRT:
7023 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7024 target, 0, OPTAB_LIB_WIDEN);
7025 default:
7026 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7027 target, 1, OPTAB_LIB_WIDEN);
7028 }
7029 }
7030 if (UNARY_P (value))
7031 {
7032 if (!target)
7033 target = gen_reg_rtx (GET_MODE (value));
7034 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7035 switch (code)
7036 {
7037 case ZERO_EXTEND:
7038 case SIGN_EXTEND:
7039 case TRUNCATE:
7040 case FLOAT_EXTEND:
7041 case FLOAT_TRUNCATE:
7042 convert_move (target, op1, code == ZERO_EXTEND);
7043 return target;
7044
7045 case FIX:
7046 case UNSIGNED_FIX:
7047 expand_fix (target, op1, code == UNSIGNED_FIX);
7048 return target;
7049
7050 case FLOAT:
7051 case UNSIGNED_FLOAT:
7052 expand_float (target, op1, code == UNSIGNED_FLOAT);
7053 return target;
7054
7055 default:
7056 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7057 }
7058 }
7059
7060 #ifdef INSN_SCHEDULING
7061 /* On machines that have insn scheduling, we want all memory reference to be
7062 explicit, so we need to deal with such paradoxical SUBREGs. */
7063 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7064 value
7065 = simplify_gen_subreg (GET_MODE (value),
7066 force_reg (GET_MODE (SUBREG_REG (value)),
7067 force_operand (SUBREG_REG (value),
7068 NULL_RTX)),
7069 GET_MODE (SUBREG_REG (value)),
7070 SUBREG_BYTE (value));
7071 #endif
7072
7073 return value;
7074 }
7075 \f
7076 /* Subroutine of expand_expr: return nonzero iff there is no way that
7077 EXP can reference X, which is being modified. TOP_P is nonzero if this
7078 call is going to be used to determine whether we need a temporary
7079 for EXP, as opposed to a recursive call to this function.
7080
7081 It is always safe for this routine to return zero since it merely
7082 searches for optimization opportunities. */
7083
7084 int
7085 safe_from_p (const_rtx x, tree exp, int top_p)
7086 {
7087 rtx exp_rtl = 0;
7088 int i, nops;
7089
7090 if (x == 0
7091 /* If EXP has varying size, we MUST use a target since we currently
7092 have no way of allocating temporaries of variable size
7093 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7094 So we assume here that something at a higher level has prevented a
7095 clash. This is somewhat bogus, but the best we can do. Only
7096 do this when X is BLKmode and when we are at the top level. */
7097 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7098 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7099 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7100 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7101 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7102 != INTEGER_CST)
7103 && GET_MODE (x) == BLKmode)
7104 /* If X is in the outgoing argument area, it is always safe. */
7105 || (MEM_P (x)
7106 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7107 || (GET_CODE (XEXP (x, 0)) == PLUS
7108 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7109 return 1;
7110
7111 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7112 find the underlying pseudo. */
7113 if (GET_CODE (x) == SUBREG)
7114 {
7115 x = SUBREG_REG (x);
7116 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7117 return 0;
7118 }
7119
7120 /* Now look at our tree code and possibly recurse. */
7121 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7122 {
7123 case tcc_declaration:
7124 exp_rtl = DECL_RTL_IF_SET (exp);
7125 break;
7126
7127 case tcc_constant:
7128 return 1;
7129
7130 case tcc_exceptional:
7131 if (TREE_CODE (exp) == TREE_LIST)
7132 {
7133 while (1)
7134 {
7135 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7136 return 0;
7137 exp = TREE_CHAIN (exp);
7138 if (!exp)
7139 return 1;
7140 if (TREE_CODE (exp) != TREE_LIST)
7141 return safe_from_p (x, exp, 0);
7142 }
7143 }
7144 else if (TREE_CODE (exp) == CONSTRUCTOR)
7145 {
7146 constructor_elt *ce;
7147 unsigned HOST_WIDE_INT idx;
7148
7149 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
7150 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7151 || !safe_from_p (x, ce->value, 0))
7152 return 0;
7153 return 1;
7154 }
7155 else if (TREE_CODE (exp) == ERROR_MARK)
7156 return 1; /* An already-visited SAVE_EXPR? */
7157 else
7158 return 0;
7159
7160 case tcc_statement:
7161 /* The only case we look at here is the DECL_INITIAL inside a
7162 DECL_EXPR. */
7163 return (TREE_CODE (exp) != DECL_EXPR
7164 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7165 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7166 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7167
7168 case tcc_binary:
7169 case tcc_comparison:
7170 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7171 return 0;
7172 /* Fall through. */
7173
7174 case tcc_unary:
7175 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7176
7177 case tcc_expression:
7178 case tcc_reference:
7179 case tcc_vl_exp:
7180 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7181 the expression. If it is set, we conflict iff we are that rtx or
7182 both are in memory. Otherwise, we check all operands of the
7183 expression recursively. */
7184
7185 switch (TREE_CODE (exp))
7186 {
7187 case ADDR_EXPR:
7188 /* If the operand is static or we are static, we can't conflict.
7189 Likewise if we don't conflict with the operand at all. */
7190 if (staticp (TREE_OPERAND (exp, 0))
7191 || TREE_STATIC (exp)
7192 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7193 return 1;
7194
7195 /* Otherwise, the only way this can conflict is if we are taking
7196 the address of a DECL a that address if part of X, which is
7197 very rare. */
7198 exp = TREE_OPERAND (exp, 0);
7199 if (DECL_P (exp))
7200 {
7201 if (!DECL_RTL_SET_P (exp)
7202 || !MEM_P (DECL_RTL (exp)))
7203 return 0;
7204 else
7205 exp_rtl = XEXP (DECL_RTL (exp), 0);
7206 }
7207 break;
7208
7209 case MEM_REF:
7210 if (MEM_P (x)
7211 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7212 get_alias_set (exp)))
7213 return 0;
7214 break;
7215
7216 case CALL_EXPR:
7217 /* Assume that the call will clobber all hard registers and
7218 all of memory. */
7219 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7220 || MEM_P (x))
7221 return 0;
7222 break;
7223
7224 case WITH_CLEANUP_EXPR:
7225 case CLEANUP_POINT_EXPR:
7226 /* Lowered by gimplify.c. */
7227 gcc_unreachable ();
7228
7229 case SAVE_EXPR:
7230 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7231
7232 default:
7233 break;
7234 }
7235
7236 /* If we have an rtx, we do not need to scan our operands. */
7237 if (exp_rtl)
7238 break;
7239
7240 nops = TREE_OPERAND_LENGTH (exp);
7241 for (i = 0; i < nops; i++)
7242 if (TREE_OPERAND (exp, i) != 0
7243 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7244 return 0;
7245
7246 break;
7247
7248 case tcc_type:
7249 /* Should never get a type here. */
7250 gcc_unreachable ();
7251 }
7252
7253 /* If we have an rtl, find any enclosed object. Then see if we conflict
7254 with it. */
7255 if (exp_rtl)
7256 {
7257 if (GET_CODE (exp_rtl) == SUBREG)
7258 {
7259 exp_rtl = SUBREG_REG (exp_rtl);
7260 if (REG_P (exp_rtl)
7261 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7262 return 0;
7263 }
7264
7265 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7266 are memory and they conflict. */
7267 return ! (rtx_equal_p (x, exp_rtl)
7268 || (MEM_P (x) && MEM_P (exp_rtl)
7269 && true_dependence (exp_rtl, VOIDmode, x)));
7270 }
7271
7272 /* If we reach here, it is safe. */
7273 return 1;
7274 }
7275
7276 \f
7277 /* Return the highest power of two that EXP is known to be a multiple of.
7278 This is used in updating alignment of MEMs in array references. */
7279
7280 unsigned HOST_WIDE_INT
7281 highest_pow2_factor (const_tree exp)
7282 {
7283 unsigned HOST_WIDE_INT c0, c1;
7284
7285 switch (TREE_CODE (exp))
7286 {
7287 case INTEGER_CST:
7288 /* We can find the lowest bit that's a one. If the low
7289 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7290 We need to handle this case since we can find it in a COND_EXPR,
7291 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7292 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7293 later ICE. */
7294 if (TREE_OVERFLOW (exp))
7295 return BIGGEST_ALIGNMENT;
7296 else
7297 {
7298 /* Note: tree_low_cst is intentionally not used here,
7299 we don't care about the upper bits. */
7300 c0 = TREE_INT_CST_LOW (exp);
7301 c0 &= -c0;
7302 return c0 ? c0 : BIGGEST_ALIGNMENT;
7303 }
7304 break;
7305
7306 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7307 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7308 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7309 return MIN (c0, c1);
7310
7311 case MULT_EXPR:
7312 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7313 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7314 return c0 * c1;
7315
7316 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7317 case CEIL_DIV_EXPR:
7318 if (integer_pow2p (TREE_OPERAND (exp, 1))
7319 && host_integerp (TREE_OPERAND (exp, 1), 1))
7320 {
7321 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7322 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7323 return MAX (1, c0 / c1);
7324 }
7325 break;
7326
7327 case BIT_AND_EXPR:
7328 /* The highest power of two of a bit-and expression is the maximum of
7329 that of its operands. We typically get here for a complex LHS and
7330 a constant negative power of two on the RHS to force an explicit
7331 alignment, so don't bother looking at the LHS. */
7332 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7333
7334 CASE_CONVERT:
7335 case SAVE_EXPR:
7336 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7337
7338 case COMPOUND_EXPR:
7339 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7340
7341 case COND_EXPR:
7342 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7343 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7344 return MIN (c0, c1);
7345
7346 default:
7347 break;
7348 }
7349
7350 return 1;
7351 }
7352
7353 /* Similar, except that the alignment requirements of TARGET are
7354 taken into account. Assume it is at least as aligned as its
7355 type, unless it is a COMPONENT_REF in which case the layout of
7356 the structure gives the alignment. */
7357
7358 static unsigned HOST_WIDE_INT
7359 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7360 {
7361 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7362 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7363
7364 return MAX (factor, talign);
7365 }
7366 \f
7367 #ifdef HAVE_conditional_move
7368 /* Convert the tree comparison code TCODE to the rtl one where the
7369 signedness is UNSIGNEDP. */
7370
7371 static enum rtx_code
7372 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7373 {
7374 enum rtx_code code;
7375 switch (tcode)
7376 {
7377 case EQ_EXPR:
7378 code = EQ;
7379 break;
7380 case NE_EXPR:
7381 code = NE;
7382 break;
7383 case LT_EXPR:
7384 code = unsignedp ? LTU : LT;
7385 break;
7386 case LE_EXPR:
7387 code = unsignedp ? LEU : LE;
7388 break;
7389 case GT_EXPR:
7390 code = unsignedp ? GTU : GT;
7391 break;
7392 case GE_EXPR:
7393 code = unsignedp ? GEU : GE;
7394 break;
7395 case UNORDERED_EXPR:
7396 code = UNORDERED;
7397 break;
7398 case ORDERED_EXPR:
7399 code = ORDERED;
7400 break;
7401 case UNLT_EXPR:
7402 code = UNLT;
7403 break;
7404 case UNLE_EXPR:
7405 code = UNLE;
7406 break;
7407 case UNGT_EXPR:
7408 code = UNGT;
7409 break;
7410 case UNGE_EXPR:
7411 code = UNGE;
7412 break;
7413 case UNEQ_EXPR:
7414 code = UNEQ;
7415 break;
7416 case LTGT_EXPR:
7417 code = LTGT;
7418 break;
7419
7420 default:
7421 gcc_unreachable ();
7422 }
7423 return code;
7424 }
7425 #endif
7426
7427 /* Subroutine of expand_expr. Expand the two operands of a binary
7428 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7429 The value may be stored in TARGET if TARGET is nonzero. The
7430 MODIFIER argument is as documented by expand_expr. */
7431
7432 static void
7433 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7434 enum expand_modifier modifier)
7435 {
7436 if (! safe_from_p (target, exp1, 1))
7437 target = 0;
7438 if (operand_equal_p (exp0, exp1, 0))
7439 {
7440 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7441 *op1 = copy_rtx (*op0);
7442 }
7443 else
7444 {
7445 /* If we need to preserve evaluation order, copy exp0 into its own
7446 temporary variable so that it can't be clobbered by exp1. */
7447 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7448 exp0 = save_expr (exp0);
7449 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7450 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7451 }
7452 }
7453
7454 \f
7455 /* Return a MEM that contains constant EXP. DEFER is as for
7456 output_constant_def and MODIFIER is as for expand_expr. */
7457
7458 static rtx
7459 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7460 {
7461 rtx mem;
7462
7463 mem = output_constant_def (exp, defer);
7464 if (modifier != EXPAND_INITIALIZER)
7465 mem = use_anchored_address (mem);
7466 return mem;
7467 }
7468
7469 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7470 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7471
7472 static rtx
7473 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7474 enum expand_modifier modifier, addr_space_t as)
7475 {
7476 rtx result, subtarget;
7477 tree inner, offset;
7478 HOST_WIDE_INT bitsize, bitpos;
7479 int volatilep, unsignedp;
7480 enum machine_mode mode1;
7481
7482 /* If we are taking the address of a constant and are at the top level,
7483 we have to use output_constant_def since we can't call force_const_mem
7484 at top level. */
7485 /* ??? This should be considered a front-end bug. We should not be
7486 generating ADDR_EXPR of something that isn't an LVALUE. The only
7487 exception here is STRING_CST. */
7488 if (CONSTANT_CLASS_P (exp))
7489 {
7490 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7491 if (modifier < EXPAND_SUM)
7492 result = force_operand (result, target);
7493 return result;
7494 }
7495
7496 /* Everything must be something allowed by is_gimple_addressable. */
7497 switch (TREE_CODE (exp))
7498 {
7499 case INDIRECT_REF:
7500 /* This case will happen via recursion for &a->b. */
7501 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7502
7503 case MEM_REF:
7504 {
7505 tree tem = TREE_OPERAND (exp, 0);
7506 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7507 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7508 return expand_expr (tem, target, tmode, modifier);
7509 }
7510
7511 case CONST_DECL:
7512 /* Expand the initializer like constants above. */
7513 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7514 0, modifier), 0);
7515 if (modifier < EXPAND_SUM)
7516 result = force_operand (result, target);
7517 return result;
7518
7519 case REALPART_EXPR:
7520 /* The real part of the complex number is always first, therefore
7521 the address is the same as the address of the parent object. */
7522 offset = 0;
7523 bitpos = 0;
7524 inner = TREE_OPERAND (exp, 0);
7525 break;
7526
7527 case IMAGPART_EXPR:
7528 /* The imaginary part of the complex number is always second.
7529 The expression is therefore always offset by the size of the
7530 scalar type. */
7531 offset = 0;
7532 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7533 inner = TREE_OPERAND (exp, 0);
7534 break;
7535
7536 default:
7537 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7538 expand_expr, as that can have various side effects; LABEL_DECLs for
7539 example, may not have their DECL_RTL set yet. Expand the rtl of
7540 CONSTRUCTORs too, which should yield a memory reference for the
7541 constructor's contents. Assume language specific tree nodes can
7542 be expanded in some interesting way. */
7543 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7544 if (DECL_P (exp)
7545 || TREE_CODE (exp) == CONSTRUCTOR
7546 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7547 {
7548 result = expand_expr (exp, target, tmode,
7549 modifier == EXPAND_INITIALIZER
7550 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7551
7552 /* If the DECL isn't in memory, then the DECL wasn't properly
7553 marked TREE_ADDRESSABLE, which will be either a front-end
7554 or a tree optimizer bug. */
7555
7556 if (TREE_ADDRESSABLE (exp)
7557 && ! MEM_P (result)
7558 && ! targetm.calls.allocate_stack_slots_for_args())
7559 {
7560 error ("local frame unavailable (naked function?)");
7561 return result;
7562 }
7563 else
7564 gcc_assert (MEM_P (result));
7565 result = XEXP (result, 0);
7566
7567 /* ??? Is this needed anymore? */
7568 if (DECL_P (exp))
7569 TREE_USED (exp) = 1;
7570
7571 if (modifier != EXPAND_INITIALIZER
7572 && modifier != EXPAND_CONST_ADDRESS
7573 && modifier != EXPAND_SUM)
7574 result = force_operand (result, target);
7575 return result;
7576 }
7577
7578 /* Pass FALSE as the last argument to get_inner_reference although
7579 we are expanding to RTL. The rationale is that we know how to
7580 handle "aligning nodes" here: we can just bypass them because
7581 they won't change the final object whose address will be returned
7582 (they actually exist only for that purpose). */
7583 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7584 &mode1, &unsignedp, &volatilep, false);
7585 break;
7586 }
7587
7588 /* We must have made progress. */
7589 gcc_assert (inner != exp);
7590
7591 subtarget = offset || bitpos ? NULL_RTX : target;
7592 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7593 inner alignment, force the inner to be sufficiently aligned. */
7594 if (CONSTANT_CLASS_P (inner)
7595 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7596 {
7597 inner = copy_node (inner);
7598 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7599 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7600 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7601 }
7602 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7603
7604 if (offset)
7605 {
7606 rtx tmp;
7607
7608 if (modifier != EXPAND_NORMAL)
7609 result = force_operand (result, NULL);
7610 tmp = expand_expr (offset, NULL_RTX, tmode,
7611 modifier == EXPAND_INITIALIZER
7612 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7613
7614 result = convert_memory_address_addr_space (tmode, result, as);
7615 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7616
7617 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7618 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7619 else
7620 {
7621 subtarget = bitpos ? NULL_RTX : target;
7622 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7623 1, OPTAB_LIB_WIDEN);
7624 }
7625 }
7626
7627 if (bitpos)
7628 {
7629 /* Someone beforehand should have rejected taking the address
7630 of such an object. */
7631 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7632
7633 result = convert_memory_address_addr_space (tmode, result, as);
7634 result = plus_constant (tmode, result, bitpos / BITS_PER_UNIT);
7635 if (modifier < EXPAND_SUM)
7636 result = force_operand (result, target);
7637 }
7638
7639 return result;
7640 }
7641
7642 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7643 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7644
7645 static rtx
7646 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7647 enum expand_modifier modifier)
7648 {
7649 addr_space_t as = ADDR_SPACE_GENERIC;
7650 enum machine_mode address_mode = Pmode;
7651 enum machine_mode pointer_mode = ptr_mode;
7652 enum machine_mode rmode;
7653 rtx result;
7654
7655 /* Target mode of VOIDmode says "whatever's natural". */
7656 if (tmode == VOIDmode)
7657 tmode = TYPE_MODE (TREE_TYPE (exp));
7658
7659 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7660 {
7661 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7662 address_mode = targetm.addr_space.address_mode (as);
7663 pointer_mode = targetm.addr_space.pointer_mode (as);
7664 }
7665
7666 /* We can get called with some Weird Things if the user does silliness
7667 like "(short) &a". In that case, convert_memory_address won't do
7668 the right thing, so ignore the given target mode. */
7669 if (tmode != address_mode && tmode != pointer_mode)
7670 tmode = address_mode;
7671
7672 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7673 tmode, modifier, as);
7674
7675 /* Despite expand_expr claims concerning ignoring TMODE when not
7676 strictly convenient, stuff breaks if we don't honor it. Note
7677 that combined with the above, we only do this for pointer modes. */
7678 rmode = GET_MODE (result);
7679 if (rmode == VOIDmode)
7680 rmode = tmode;
7681 if (rmode != tmode)
7682 result = convert_memory_address_addr_space (tmode, result, as);
7683
7684 return result;
7685 }
7686
7687 /* Generate code for computing CONSTRUCTOR EXP.
7688 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7689 is TRUE, instead of creating a temporary variable in memory
7690 NULL is returned and the caller needs to handle it differently. */
7691
7692 static rtx
7693 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7694 bool avoid_temp_mem)
7695 {
7696 tree type = TREE_TYPE (exp);
7697 enum machine_mode mode = TYPE_MODE (type);
7698
7699 /* Try to avoid creating a temporary at all. This is possible
7700 if all of the initializer is zero.
7701 FIXME: try to handle all [0..255] initializers we can handle
7702 with memset. */
7703 if (TREE_STATIC (exp)
7704 && !TREE_ADDRESSABLE (exp)
7705 && target != 0 && mode == BLKmode
7706 && all_zeros_p (exp))
7707 {
7708 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7709 return target;
7710 }
7711
7712 /* All elts simple constants => refer to a constant in memory. But
7713 if this is a non-BLKmode mode, let it store a field at a time
7714 since that should make a CONST_INT or CONST_DOUBLE when we
7715 fold. Likewise, if we have a target we can use, it is best to
7716 store directly into the target unless the type is large enough
7717 that memcpy will be used. If we are making an initializer and
7718 all operands are constant, put it in memory as well.
7719
7720 FIXME: Avoid trying to fill vector constructors piece-meal.
7721 Output them with output_constant_def below unless we're sure
7722 they're zeros. This should go away when vector initializers
7723 are treated like VECTOR_CST instead of arrays. */
7724 if ((TREE_STATIC (exp)
7725 && ((mode == BLKmode
7726 && ! (target != 0 && safe_from_p (target, exp, 1)))
7727 || TREE_ADDRESSABLE (exp)
7728 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7729 && (! MOVE_BY_PIECES_P
7730 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7731 TYPE_ALIGN (type)))
7732 && ! mostly_zeros_p (exp))))
7733 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7734 && TREE_CONSTANT (exp)))
7735 {
7736 rtx constructor;
7737
7738 if (avoid_temp_mem)
7739 return NULL_RTX;
7740
7741 constructor = expand_expr_constant (exp, 1, modifier);
7742
7743 if (modifier != EXPAND_CONST_ADDRESS
7744 && modifier != EXPAND_INITIALIZER
7745 && modifier != EXPAND_SUM)
7746 constructor = validize_mem (constructor);
7747
7748 return constructor;
7749 }
7750
7751 /* Handle calls that pass values in multiple non-contiguous
7752 locations. The Irix 6 ABI has examples of this. */
7753 if (target == 0 || ! safe_from_p (target, exp, 1)
7754 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7755 {
7756 if (avoid_temp_mem)
7757 return NULL_RTX;
7758
7759 target
7760 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7761 | (TREE_READONLY (exp)
7762 * TYPE_QUAL_CONST))),
7763 TREE_ADDRESSABLE (exp), 1);
7764 }
7765
7766 store_constructor (exp, target, 0, int_expr_size (exp));
7767 return target;
7768 }
7769
7770
7771 /* expand_expr: generate code for computing expression EXP.
7772 An rtx for the computed value is returned. The value is never null.
7773 In the case of a void EXP, const0_rtx is returned.
7774
7775 The value may be stored in TARGET if TARGET is nonzero.
7776 TARGET is just a suggestion; callers must assume that
7777 the rtx returned may not be the same as TARGET.
7778
7779 If TARGET is CONST0_RTX, it means that the value will be ignored.
7780
7781 If TMODE is not VOIDmode, it suggests generating the
7782 result in mode TMODE. But this is done only when convenient.
7783 Otherwise, TMODE is ignored and the value generated in its natural mode.
7784 TMODE is just a suggestion; callers must assume that
7785 the rtx returned may not have mode TMODE.
7786
7787 Note that TARGET may have neither TMODE nor MODE. In that case, it
7788 probably will not be used.
7789
7790 If MODIFIER is EXPAND_SUM then when EXP is an addition
7791 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7792 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7793 products as above, or REG or MEM, or constant.
7794 Ordinarily in such cases we would output mul or add instructions
7795 and then return a pseudo reg containing the sum.
7796
7797 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7798 it also marks a label as absolutely required (it can't be dead).
7799 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7800 This is used for outputting expressions used in initializers.
7801
7802 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7803 with a constant address even if that address is not normally legitimate.
7804 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7805
7806 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7807 a call parameter. Such targets require special care as we haven't yet
7808 marked TARGET so that it's safe from being trashed by libcalls. We
7809 don't want to use TARGET for anything but the final result;
7810 Intermediate values must go elsewhere. Additionally, calls to
7811 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7812
7813 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7814 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7815 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7816 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7817 recursively. */
7818
7819 rtx
7820 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7821 enum expand_modifier modifier, rtx *alt_rtl)
7822 {
7823 rtx ret;
7824
7825 /* Handle ERROR_MARK before anybody tries to access its type. */
7826 if (TREE_CODE (exp) == ERROR_MARK
7827 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7828 {
7829 ret = CONST0_RTX (tmode);
7830 return ret ? ret : const0_rtx;
7831 }
7832
7833 /* If this is an expression of some kind and it has an associated line
7834 number, then emit the line number before expanding the expression.
7835
7836 We need to save and restore the file and line information so that
7837 errors discovered during expansion are emitted with the right
7838 information. It would be better of the diagnostic routines
7839 used the file/line information embedded in the tree nodes rather
7840 than globals. */
7841 if (cfun && EXPR_HAS_LOCATION (exp))
7842 {
7843 location_t saved_location = input_location;
7844 location_t saved_curr_loc = get_curr_insn_source_location ();
7845 tree saved_block = get_curr_insn_block ();
7846 input_location = EXPR_LOCATION (exp);
7847 set_curr_insn_source_location (input_location);
7848
7849 /* Record where the insns produced belong. */
7850 set_curr_insn_block (TREE_BLOCK (exp));
7851
7852 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7853
7854 input_location = saved_location;
7855 set_curr_insn_block (saved_block);
7856 set_curr_insn_source_location (saved_curr_loc);
7857 }
7858 else
7859 {
7860 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7861 }
7862
7863 return ret;
7864 }
7865
7866 /* Try to expand the conditional expression which is represented by
7867 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If succeseds
7868 return the rtl reg which repsents the result. Otherwise return
7869 NULL_RTL. */
7870
7871 static rtx
7872 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
7873 tree treeop1 ATTRIBUTE_UNUSED,
7874 tree treeop2 ATTRIBUTE_UNUSED)
7875 {
7876 #ifdef HAVE_conditional_move
7877 rtx insn;
7878 rtx op00, op01, op1, op2;
7879 enum rtx_code comparison_code;
7880 enum machine_mode comparison_mode;
7881 gimple srcstmt;
7882 rtx temp;
7883 tree type = TREE_TYPE (treeop1);
7884 int unsignedp = TYPE_UNSIGNED (type);
7885 enum machine_mode mode = TYPE_MODE (type);
7886
7887 temp = assign_temp (type, 0, 1);
7888
7889 /* If we cannot do a conditional move on the mode, try doing it
7890 with the promoted mode. */
7891 if (!can_conditionally_move_p (mode))
7892 mode = promote_mode (type, mode, &unsignedp);
7893
7894 if (!can_conditionally_move_p (mode))
7895 return NULL_RTX;
7896
7897 start_sequence ();
7898 expand_operands (treeop1, treeop2,
7899 temp, &op1, &op2, EXPAND_NORMAL);
7900
7901 if (TREE_CODE (treeop0) == SSA_NAME
7902 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
7903 {
7904 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
7905 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
7906 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
7907 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
7908 comparison_mode = TYPE_MODE (type);
7909 unsignedp = TYPE_UNSIGNED (type);
7910 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7911 }
7912 else if (TREE_CODE_CLASS (TREE_CODE (treeop0)) == tcc_comparison)
7913 {
7914 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
7915 enum tree_code cmpcode = TREE_CODE (treeop0);
7916 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
7917 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
7918 unsignedp = TYPE_UNSIGNED (type);
7919 comparison_mode = TYPE_MODE (type);
7920 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7921 }
7922 else
7923 {
7924 op00 = expand_normal (treeop0);
7925 op01 = const0_rtx;
7926 comparison_code = NE;
7927 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
7928 }
7929
7930 if (GET_MODE (op1) != mode)
7931 op1 = gen_lowpart (mode, op1);
7932
7933 if (GET_MODE (op2) != mode)
7934 op2 = gen_lowpart (mode, op2);
7935
7936 /* Try to emit the conditional move. */
7937 insn = emit_conditional_move (temp, comparison_code,
7938 op00, op01, comparison_mode,
7939 op1, op2, mode,
7940 unsignedp);
7941
7942 /* If we could do the conditional move, emit the sequence,
7943 and return. */
7944 if (insn)
7945 {
7946 rtx seq = get_insns ();
7947 end_sequence ();
7948 emit_insn (seq);
7949 return temp;
7950 }
7951
7952 /* Otherwise discard the sequence and fall back to code with
7953 branches. */
7954 end_sequence ();
7955 #endif
7956 return NULL_RTX;
7957 }
7958
7959 rtx
7960 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7961 enum expand_modifier modifier)
7962 {
7963 rtx op0, op1, op2, temp;
7964 tree type;
7965 int unsignedp;
7966 enum machine_mode mode;
7967 enum tree_code code = ops->code;
7968 optab this_optab;
7969 rtx subtarget, original_target;
7970 int ignore;
7971 bool reduce_bit_field;
7972 location_t loc = ops->location;
7973 tree treeop0, treeop1, treeop2;
7974 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7975 ? reduce_to_bit_field_precision ((expr), \
7976 target, \
7977 type) \
7978 : (expr))
7979
7980 type = ops->type;
7981 mode = TYPE_MODE (type);
7982 unsignedp = TYPE_UNSIGNED (type);
7983
7984 treeop0 = ops->op0;
7985 treeop1 = ops->op1;
7986 treeop2 = ops->op2;
7987
7988 /* We should be called only on simple (binary or unary) expressions,
7989 exactly those that are valid in gimple expressions that aren't
7990 GIMPLE_SINGLE_RHS (or invalid). */
7991 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7992 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7993 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7994
7995 ignore = (target == const0_rtx
7996 || ((CONVERT_EXPR_CODE_P (code)
7997 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7998 && TREE_CODE (type) == VOID_TYPE));
7999
8000 /* We should be called only if we need the result. */
8001 gcc_assert (!ignore);
8002
8003 /* An operation in what may be a bit-field type needs the
8004 result to be reduced to the precision of the bit-field type,
8005 which is narrower than that of the type's mode. */
8006 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8007 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8008
8009 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8010 target = 0;
8011
8012 /* Use subtarget as the target for operand 0 of a binary operation. */
8013 subtarget = get_subtarget (target);
8014 original_target = target;
8015
8016 switch (code)
8017 {
8018 case NON_LVALUE_EXPR:
8019 case PAREN_EXPR:
8020 CASE_CONVERT:
8021 if (treeop0 == error_mark_node)
8022 return const0_rtx;
8023
8024 if (TREE_CODE (type) == UNION_TYPE)
8025 {
8026 tree valtype = TREE_TYPE (treeop0);
8027
8028 /* If both input and output are BLKmode, this conversion isn't doing
8029 anything except possibly changing memory attribute. */
8030 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8031 {
8032 rtx result = expand_expr (treeop0, target, tmode,
8033 modifier);
8034
8035 result = copy_rtx (result);
8036 set_mem_attributes (result, type, 0);
8037 return result;
8038 }
8039
8040 if (target == 0)
8041 {
8042 if (TYPE_MODE (type) != BLKmode)
8043 target = gen_reg_rtx (TYPE_MODE (type));
8044 else
8045 target = assign_temp (type, 1, 1);
8046 }
8047
8048 if (MEM_P (target))
8049 /* Store data into beginning of memory target. */
8050 store_expr (treeop0,
8051 adjust_address (target, TYPE_MODE (valtype), 0),
8052 modifier == EXPAND_STACK_PARM,
8053 false);
8054
8055 else
8056 {
8057 gcc_assert (REG_P (target));
8058
8059 /* Store this field into a union of the proper type. */
8060 store_field (target,
8061 MIN ((int_size_in_bytes (TREE_TYPE
8062 (treeop0))
8063 * BITS_PER_UNIT),
8064 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
8065 0, 0, 0, TYPE_MODE (valtype), treeop0,
8066 type, 0, false);
8067 }
8068
8069 /* Return the entire union. */
8070 return target;
8071 }
8072
8073 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8074 {
8075 op0 = expand_expr (treeop0, target, VOIDmode,
8076 modifier);
8077
8078 /* If the signedness of the conversion differs and OP0 is
8079 a promoted SUBREG, clear that indication since we now
8080 have to do the proper extension. */
8081 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8082 && GET_CODE (op0) == SUBREG)
8083 SUBREG_PROMOTED_VAR_P (op0) = 0;
8084
8085 return REDUCE_BIT_FIELD (op0);
8086 }
8087
8088 op0 = expand_expr (treeop0, NULL_RTX, mode,
8089 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8090 if (GET_MODE (op0) == mode)
8091 ;
8092
8093 /* If OP0 is a constant, just convert it into the proper mode. */
8094 else if (CONSTANT_P (op0))
8095 {
8096 tree inner_type = TREE_TYPE (treeop0);
8097 enum machine_mode inner_mode = GET_MODE (op0);
8098
8099 if (inner_mode == VOIDmode)
8100 inner_mode = TYPE_MODE (inner_type);
8101
8102 if (modifier == EXPAND_INITIALIZER)
8103 op0 = simplify_gen_subreg (mode, op0, inner_mode,
8104 subreg_lowpart_offset (mode,
8105 inner_mode));
8106 else
8107 op0= convert_modes (mode, inner_mode, op0,
8108 TYPE_UNSIGNED (inner_type));
8109 }
8110
8111 else if (modifier == EXPAND_INITIALIZER)
8112 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8113
8114 else if (target == 0)
8115 op0 = convert_to_mode (mode, op0,
8116 TYPE_UNSIGNED (TREE_TYPE
8117 (treeop0)));
8118 else
8119 {
8120 convert_move (target, op0,
8121 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8122 op0 = target;
8123 }
8124
8125 return REDUCE_BIT_FIELD (op0);
8126
8127 case ADDR_SPACE_CONVERT_EXPR:
8128 {
8129 tree treeop0_type = TREE_TYPE (treeop0);
8130 addr_space_t as_to;
8131 addr_space_t as_from;
8132
8133 gcc_assert (POINTER_TYPE_P (type));
8134 gcc_assert (POINTER_TYPE_P (treeop0_type));
8135
8136 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8137 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8138
8139 /* Conversions between pointers to the same address space should
8140 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8141 gcc_assert (as_to != as_from);
8142
8143 /* Ask target code to handle conversion between pointers
8144 to overlapping address spaces. */
8145 if (targetm.addr_space.subset_p (as_to, as_from)
8146 || targetm.addr_space.subset_p (as_from, as_to))
8147 {
8148 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8149 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8150 gcc_assert (op0);
8151 return op0;
8152 }
8153
8154 /* For disjoint address spaces, converting anything but
8155 a null pointer invokes undefined behaviour. We simply
8156 always return a null pointer here. */
8157 return CONST0_RTX (mode);
8158 }
8159
8160 case POINTER_PLUS_EXPR:
8161 /* Even though the sizetype mode and the pointer's mode can be different
8162 expand is able to handle this correctly and get the correct result out
8163 of the PLUS_EXPR code. */
8164 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8165 if sizetype precision is smaller than pointer precision. */
8166 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8167 treeop1 = fold_convert_loc (loc, type,
8168 fold_convert_loc (loc, ssizetype,
8169 treeop1));
8170 /* If sizetype precision is larger than pointer precision, truncate the
8171 offset to have matching modes. */
8172 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8173 treeop1 = fold_convert_loc (loc, type, treeop1);
8174
8175 case PLUS_EXPR:
8176 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8177 something else, make sure we add the register to the constant and
8178 then to the other thing. This case can occur during strength
8179 reduction and doing it this way will produce better code if the
8180 frame pointer or argument pointer is eliminated.
8181
8182 fold-const.c will ensure that the constant is always in the inner
8183 PLUS_EXPR, so the only case we need to do anything about is if
8184 sp, ap, or fp is our second argument, in which case we must swap
8185 the innermost first argument and our second argument. */
8186
8187 if (TREE_CODE (treeop0) == PLUS_EXPR
8188 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8189 && TREE_CODE (treeop1) == VAR_DECL
8190 && (DECL_RTL (treeop1) == frame_pointer_rtx
8191 || DECL_RTL (treeop1) == stack_pointer_rtx
8192 || DECL_RTL (treeop1) == arg_pointer_rtx))
8193 {
8194 gcc_unreachable ();
8195 }
8196
8197 /* If the result is to be ptr_mode and we are adding an integer to
8198 something, we might be forming a constant. So try to use
8199 plus_constant. If it produces a sum and we can't accept it,
8200 use force_operand. This allows P = &ARR[const] to generate
8201 efficient code on machines where a SYMBOL_REF is not a valid
8202 address.
8203
8204 If this is an EXPAND_SUM call, always return the sum. */
8205 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8206 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8207 {
8208 if (modifier == EXPAND_STACK_PARM)
8209 target = 0;
8210 if (TREE_CODE (treeop0) == INTEGER_CST
8211 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8212 && TREE_CONSTANT (treeop1))
8213 {
8214 rtx constant_part;
8215
8216 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8217 EXPAND_SUM);
8218 /* Use immed_double_const to ensure that the constant is
8219 truncated according to the mode of OP1, then sign extended
8220 to a HOST_WIDE_INT. Using the constant directly can result
8221 in non-canonical RTL in a 64x32 cross compile. */
8222 constant_part
8223 = immed_double_const (TREE_INT_CST_LOW (treeop0),
8224 (HOST_WIDE_INT) 0,
8225 TYPE_MODE (TREE_TYPE (treeop1)));
8226 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8227 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8228 op1 = force_operand (op1, target);
8229 return REDUCE_BIT_FIELD (op1);
8230 }
8231
8232 else if (TREE_CODE (treeop1) == INTEGER_CST
8233 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8234 && TREE_CONSTANT (treeop0))
8235 {
8236 rtx constant_part;
8237
8238 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8239 (modifier == EXPAND_INITIALIZER
8240 ? EXPAND_INITIALIZER : EXPAND_SUM));
8241 if (! CONSTANT_P (op0))
8242 {
8243 op1 = expand_expr (treeop1, NULL_RTX,
8244 VOIDmode, modifier);
8245 /* Return a PLUS if modifier says it's OK. */
8246 if (modifier == EXPAND_SUM
8247 || modifier == EXPAND_INITIALIZER)
8248 return simplify_gen_binary (PLUS, mode, op0, op1);
8249 goto binop2;
8250 }
8251 /* Use immed_double_const to ensure that the constant is
8252 truncated according to the mode of OP1, then sign extended
8253 to a HOST_WIDE_INT. Using the constant directly can result
8254 in non-canonical RTL in a 64x32 cross compile. */
8255 constant_part
8256 = immed_double_const (TREE_INT_CST_LOW (treeop1),
8257 (HOST_WIDE_INT) 0,
8258 TYPE_MODE (TREE_TYPE (treeop0)));
8259 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8260 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8261 op0 = force_operand (op0, target);
8262 return REDUCE_BIT_FIELD (op0);
8263 }
8264 }
8265
8266 /* Use TER to expand pointer addition of a negated value
8267 as pointer subtraction. */
8268 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8269 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8270 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8271 && TREE_CODE (treeop1) == SSA_NAME
8272 && TYPE_MODE (TREE_TYPE (treeop0))
8273 == TYPE_MODE (TREE_TYPE (treeop1)))
8274 {
8275 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8276 if (def)
8277 {
8278 treeop1 = gimple_assign_rhs1 (def);
8279 code = MINUS_EXPR;
8280 goto do_minus;
8281 }
8282 }
8283
8284 /* No sense saving up arithmetic to be done
8285 if it's all in the wrong mode to form part of an address.
8286 And force_operand won't know whether to sign-extend or
8287 zero-extend. */
8288 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8289 || mode != ptr_mode)
8290 {
8291 expand_operands (treeop0, treeop1,
8292 subtarget, &op0, &op1, EXPAND_NORMAL);
8293 if (op0 == const0_rtx)
8294 return op1;
8295 if (op1 == const0_rtx)
8296 return op0;
8297 goto binop2;
8298 }
8299
8300 expand_operands (treeop0, treeop1,
8301 subtarget, &op0, &op1, modifier);
8302 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8303
8304 case MINUS_EXPR:
8305 do_minus:
8306 /* For initializers, we are allowed to return a MINUS of two
8307 symbolic constants. Here we handle all cases when both operands
8308 are constant. */
8309 /* Handle difference of two symbolic constants,
8310 for the sake of an initializer. */
8311 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8312 && really_constant_p (treeop0)
8313 && really_constant_p (treeop1))
8314 {
8315 expand_operands (treeop0, treeop1,
8316 NULL_RTX, &op0, &op1, modifier);
8317
8318 /* If the last operand is a CONST_INT, use plus_constant of
8319 the negated constant. Else make the MINUS. */
8320 if (CONST_INT_P (op1))
8321 return REDUCE_BIT_FIELD (plus_constant (mode, op0,
8322 -INTVAL (op1)));
8323 else
8324 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8325 }
8326
8327 /* No sense saving up arithmetic to be done
8328 if it's all in the wrong mode to form part of an address.
8329 And force_operand won't know whether to sign-extend or
8330 zero-extend. */
8331 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8332 || mode != ptr_mode)
8333 goto binop;
8334
8335 expand_operands (treeop0, treeop1,
8336 subtarget, &op0, &op1, modifier);
8337
8338 /* Convert A - const to A + (-const). */
8339 if (CONST_INT_P (op1))
8340 {
8341 op1 = negate_rtx (mode, op1);
8342 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8343 }
8344
8345 goto binop2;
8346
8347 case WIDEN_MULT_PLUS_EXPR:
8348 case WIDEN_MULT_MINUS_EXPR:
8349 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8350 op2 = expand_normal (treeop2);
8351 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8352 target, unsignedp);
8353 return target;
8354
8355 case WIDEN_MULT_EXPR:
8356 /* If first operand is constant, swap them.
8357 Thus the following special case checks need only
8358 check the second operand. */
8359 if (TREE_CODE (treeop0) == INTEGER_CST)
8360 {
8361 tree t1 = treeop0;
8362 treeop0 = treeop1;
8363 treeop1 = t1;
8364 }
8365
8366 /* First, check if we have a multiplication of one signed and one
8367 unsigned operand. */
8368 if (TREE_CODE (treeop1) != INTEGER_CST
8369 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8370 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8371 {
8372 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8373 this_optab = usmul_widen_optab;
8374 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8375 != CODE_FOR_nothing)
8376 {
8377 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8378 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8379 EXPAND_NORMAL);
8380 else
8381 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8382 EXPAND_NORMAL);
8383 goto binop3;
8384 }
8385 }
8386 /* Check for a multiplication with matching signedness. */
8387 else if ((TREE_CODE (treeop1) == INTEGER_CST
8388 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8389 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8390 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8391 {
8392 tree op0type = TREE_TYPE (treeop0);
8393 enum machine_mode innermode = TYPE_MODE (op0type);
8394 bool zextend_p = TYPE_UNSIGNED (op0type);
8395 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8396 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8397
8398 if (TREE_CODE (treeop0) != INTEGER_CST)
8399 {
8400 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8401 != CODE_FOR_nothing)
8402 {
8403 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8404 EXPAND_NORMAL);
8405 temp = expand_widening_mult (mode, op0, op1, target,
8406 unsignedp, this_optab);
8407 return REDUCE_BIT_FIELD (temp);
8408 }
8409 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8410 != CODE_FOR_nothing
8411 && innermode == word_mode)
8412 {
8413 rtx htem, hipart;
8414 op0 = expand_normal (treeop0);
8415 if (TREE_CODE (treeop1) == INTEGER_CST)
8416 op1 = convert_modes (innermode, mode,
8417 expand_normal (treeop1), unsignedp);
8418 else
8419 op1 = expand_normal (treeop1);
8420 temp = expand_binop (mode, other_optab, op0, op1, target,
8421 unsignedp, OPTAB_LIB_WIDEN);
8422 hipart = gen_highpart (innermode, temp);
8423 htem = expand_mult_highpart_adjust (innermode, hipart,
8424 op0, op1, hipart,
8425 zextend_p);
8426 if (htem != hipart)
8427 emit_move_insn (hipart, htem);
8428 return REDUCE_BIT_FIELD (temp);
8429 }
8430 }
8431 }
8432 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8433 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8434 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8435 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8436
8437 case FMA_EXPR:
8438 {
8439 optab opt = fma_optab;
8440 gimple def0, def2;
8441
8442 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8443 call. */
8444 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8445 {
8446 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8447 tree call_expr;
8448
8449 gcc_assert (fn != NULL_TREE);
8450 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8451 return expand_builtin (call_expr, target, subtarget, mode, false);
8452 }
8453
8454 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8455 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8456
8457 op0 = op2 = NULL;
8458
8459 if (def0 && def2
8460 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8461 {
8462 opt = fnms_optab;
8463 op0 = expand_normal (gimple_assign_rhs1 (def0));
8464 op2 = expand_normal (gimple_assign_rhs1 (def2));
8465 }
8466 else if (def0
8467 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8468 {
8469 opt = fnma_optab;
8470 op0 = expand_normal (gimple_assign_rhs1 (def0));
8471 }
8472 else if (def2
8473 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8474 {
8475 opt = fms_optab;
8476 op2 = expand_normal (gimple_assign_rhs1 (def2));
8477 }
8478
8479 if (op0 == NULL)
8480 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8481 if (op2 == NULL)
8482 op2 = expand_normal (treeop2);
8483 op1 = expand_normal (treeop1);
8484
8485 return expand_ternary_op (TYPE_MODE (type), opt,
8486 op0, op1, op2, target, 0);
8487 }
8488
8489 case MULT_EXPR:
8490 /* If this is a fixed-point operation, then we cannot use the code
8491 below because "expand_mult" doesn't support sat/no-sat fixed-point
8492 multiplications. */
8493 if (ALL_FIXED_POINT_MODE_P (mode))
8494 goto binop;
8495
8496 /* If first operand is constant, swap them.
8497 Thus the following special case checks need only
8498 check the second operand. */
8499 if (TREE_CODE (treeop0) == INTEGER_CST)
8500 {
8501 tree t1 = treeop0;
8502 treeop0 = treeop1;
8503 treeop1 = t1;
8504 }
8505
8506 /* Attempt to return something suitable for generating an
8507 indexed address, for machines that support that. */
8508
8509 if (modifier == EXPAND_SUM && mode == ptr_mode
8510 && host_integerp (treeop1, 0))
8511 {
8512 tree exp1 = treeop1;
8513
8514 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8515 EXPAND_SUM);
8516
8517 if (!REG_P (op0))
8518 op0 = force_operand (op0, NULL_RTX);
8519 if (!REG_P (op0))
8520 op0 = copy_to_mode_reg (mode, op0);
8521
8522 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8523 gen_int_mode (tree_low_cst (exp1, 0),
8524 TYPE_MODE (TREE_TYPE (exp1)))));
8525 }
8526
8527 if (modifier == EXPAND_STACK_PARM)
8528 target = 0;
8529
8530 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8531 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8532
8533 case TRUNC_DIV_EXPR:
8534 case FLOOR_DIV_EXPR:
8535 case CEIL_DIV_EXPR:
8536 case ROUND_DIV_EXPR:
8537 case EXACT_DIV_EXPR:
8538 /* If this is a fixed-point operation, then we cannot use the code
8539 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8540 divisions. */
8541 if (ALL_FIXED_POINT_MODE_P (mode))
8542 goto binop;
8543
8544 if (modifier == EXPAND_STACK_PARM)
8545 target = 0;
8546 /* Possible optimization: compute the dividend with EXPAND_SUM
8547 then if the divisor is constant can optimize the case
8548 where some terms of the dividend have coeffs divisible by it. */
8549 expand_operands (treeop0, treeop1,
8550 subtarget, &op0, &op1, EXPAND_NORMAL);
8551 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8552
8553 case RDIV_EXPR:
8554 case MULT_HIGHPART_EXPR:
8555 goto binop;
8556
8557 case TRUNC_MOD_EXPR:
8558 case FLOOR_MOD_EXPR:
8559 case CEIL_MOD_EXPR:
8560 case ROUND_MOD_EXPR:
8561 if (modifier == EXPAND_STACK_PARM)
8562 target = 0;
8563 expand_operands (treeop0, treeop1,
8564 subtarget, &op0, &op1, EXPAND_NORMAL);
8565 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8566
8567 case FIXED_CONVERT_EXPR:
8568 op0 = expand_normal (treeop0);
8569 if (target == 0 || modifier == EXPAND_STACK_PARM)
8570 target = gen_reg_rtx (mode);
8571
8572 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8573 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8574 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8575 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8576 else
8577 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8578 return target;
8579
8580 case FIX_TRUNC_EXPR:
8581 op0 = expand_normal (treeop0);
8582 if (target == 0 || modifier == EXPAND_STACK_PARM)
8583 target = gen_reg_rtx (mode);
8584 expand_fix (target, op0, unsignedp);
8585 return target;
8586
8587 case FLOAT_EXPR:
8588 op0 = expand_normal (treeop0);
8589 if (target == 0 || modifier == EXPAND_STACK_PARM)
8590 target = gen_reg_rtx (mode);
8591 /* expand_float can't figure out what to do if FROM has VOIDmode.
8592 So give it the correct mode. With -O, cse will optimize this. */
8593 if (GET_MODE (op0) == VOIDmode)
8594 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8595 op0);
8596 expand_float (target, op0,
8597 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8598 return target;
8599
8600 case NEGATE_EXPR:
8601 op0 = expand_expr (treeop0, subtarget,
8602 VOIDmode, EXPAND_NORMAL);
8603 if (modifier == EXPAND_STACK_PARM)
8604 target = 0;
8605 temp = expand_unop (mode,
8606 optab_for_tree_code (NEGATE_EXPR, type,
8607 optab_default),
8608 op0, target, 0);
8609 gcc_assert (temp);
8610 return REDUCE_BIT_FIELD (temp);
8611
8612 case ABS_EXPR:
8613 op0 = expand_expr (treeop0, subtarget,
8614 VOIDmode, EXPAND_NORMAL);
8615 if (modifier == EXPAND_STACK_PARM)
8616 target = 0;
8617
8618 /* ABS_EXPR is not valid for complex arguments. */
8619 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8620 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8621
8622 /* Unsigned abs is simply the operand. Testing here means we don't
8623 risk generating incorrect code below. */
8624 if (TYPE_UNSIGNED (type))
8625 return op0;
8626
8627 return expand_abs (mode, op0, target, unsignedp,
8628 safe_from_p (target, treeop0, 1));
8629
8630 case MAX_EXPR:
8631 case MIN_EXPR:
8632 target = original_target;
8633 if (target == 0
8634 || modifier == EXPAND_STACK_PARM
8635 || (MEM_P (target) && MEM_VOLATILE_P (target))
8636 || GET_MODE (target) != mode
8637 || (REG_P (target)
8638 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8639 target = gen_reg_rtx (mode);
8640 expand_operands (treeop0, treeop1,
8641 target, &op0, &op1, EXPAND_NORMAL);
8642
8643 /* First try to do it with a special MIN or MAX instruction.
8644 If that does not win, use a conditional jump to select the proper
8645 value. */
8646 this_optab = optab_for_tree_code (code, type, optab_default);
8647 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8648 OPTAB_WIDEN);
8649 if (temp != 0)
8650 return temp;
8651
8652 /* At this point, a MEM target is no longer useful; we will get better
8653 code without it. */
8654
8655 if (! REG_P (target))
8656 target = gen_reg_rtx (mode);
8657
8658 /* If op1 was placed in target, swap op0 and op1. */
8659 if (target != op0 && target == op1)
8660 {
8661 temp = op0;
8662 op0 = op1;
8663 op1 = temp;
8664 }
8665
8666 /* We generate better code and avoid problems with op1 mentioning
8667 target by forcing op1 into a pseudo if it isn't a constant. */
8668 if (! CONSTANT_P (op1))
8669 op1 = force_reg (mode, op1);
8670
8671 {
8672 enum rtx_code comparison_code;
8673 rtx cmpop1 = op1;
8674
8675 if (code == MAX_EXPR)
8676 comparison_code = unsignedp ? GEU : GE;
8677 else
8678 comparison_code = unsignedp ? LEU : LE;
8679
8680 /* Canonicalize to comparisons against 0. */
8681 if (op1 == const1_rtx)
8682 {
8683 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8684 or (a != 0 ? a : 1) for unsigned.
8685 For MIN we are safe converting (a <= 1 ? a : 1)
8686 into (a <= 0 ? a : 1) */
8687 cmpop1 = const0_rtx;
8688 if (code == MAX_EXPR)
8689 comparison_code = unsignedp ? NE : GT;
8690 }
8691 if (op1 == constm1_rtx && !unsignedp)
8692 {
8693 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8694 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8695 cmpop1 = const0_rtx;
8696 if (code == MIN_EXPR)
8697 comparison_code = LT;
8698 }
8699 #ifdef HAVE_conditional_move
8700 /* Use a conditional move if possible. */
8701 if (can_conditionally_move_p (mode))
8702 {
8703 rtx insn;
8704
8705 /* ??? Same problem as in expmed.c: emit_conditional_move
8706 forces a stack adjustment via compare_from_rtx, and we
8707 lose the stack adjustment if the sequence we are about
8708 to create is discarded. */
8709 do_pending_stack_adjust ();
8710
8711 start_sequence ();
8712
8713 /* Try to emit the conditional move. */
8714 insn = emit_conditional_move (target, comparison_code,
8715 op0, cmpop1, mode,
8716 op0, op1, mode,
8717 unsignedp);
8718
8719 /* If we could do the conditional move, emit the sequence,
8720 and return. */
8721 if (insn)
8722 {
8723 rtx seq = get_insns ();
8724 end_sequence ();
8725 emit_insn (seq);
8726 return target;
8727 }
8728
8729 /* Otherwise discard the sequence and fall back to code with
8730 branches. */
8731 end_sequence ();
8732 }
8733 #endif
8734 if (target != op0)
8735 emit_move_insn (target, op0);
8736
8737 temp = gen_label_rtx ();
8738 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8739 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8740 -1);
8741 }
8742 emit_move_insn (target, op1);
8743 emit_label (temp);
8744 return target;
8745
8746 case BIT_NOT_EXPR:
8747 op0 = expand_expr (treeop0, subtarget,
8748 VOIDmode, EXPAND_NORMAL);
8749 if (modifier == EXPAND_STACK_PARM)
8750 target = 0;
8751 /* In case we have to reduce the result to bitfield precision
8752 for unsigned bitfield expand this as XOR with a proper constant
8753 instead. */
8754 if (reduce_bit_field && TYPE_UNSIGNED (type))
8755 temp = expand_binop (mode, xor_optab, op0,
8756 immed_double_int_const
8757 (double_int_mask (TYPE_PRECISION (type)), mode),
8758 target, 1, OPTAB_LIB_WIDEN);
8759 else
8760 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8761 gcc_assert (temp);
8762 return temp;
8763
8764 /* ??? Can optimize bitwise operations with one arg constant.
8765 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8766 and (a bitwise1 b) bitwise2 b (etc)
8767 but that is probably not worth while. */
8768
8769 case BIT_AND_EXPR:
8770 case BIT_IOR_EXPR:
8771 case BIT_XOR_EXPR:
8772 goto binop;
8773
8774 case LROTATE_EXPR:
8775 case RROTATE_EXPR:
8776 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8777 || (GET_MODE_PRECISION (TYPE_MODE (type))
8778 == TYPE_PRECISION (type)));
8779 /* fall through */
8780
8781 case LSHIFT_EXPR:
8782 case RSHIFT_EXPR:
8783 /* If this is a fixed-point operation, then we cannot use the code
8784 below because "expand_shift" doesn't support sat/no-sat fixed-point
8785 shifts. */
8786 if (ALL_FIXED_POINT_MODE_P (mode))
8787 goto binop;
8788
8789 if (! safe_from_p (subtarget, treeop1, 1))
8790 subtarget = 0;
8791 if (modifier == EXPAND_STACK_PARM)
8792 target = 0;
8793 op0 = expand_expr (treeop0, subtarget,
8794 VOIDmode, EXPAND_NORMAL);
8795 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8796 unsignedp);
8797 if (code == LSHIFT_EXPR)
8798 temp = REDUCE_BIT_FIELD (temp);
8799 return temp;
8800
8801 /* Could determine the answer when only additive constants differ. Also,
8802 the addition of one can be handled by changing the condition. */
8803 case LT_EXPR:
8804 case LE_EXPR:
8805 case GT_EXPR:
8806 case GE_EXPR:
8807 case EQ_EXPR:
8808 case NE_EXPR:
8809 case UNORDERED_EXPR:
8810 case ORDERED_EXPR:
8811 case UNLT_EXPR:
8812 case UNLE_EXPR:
8813 case UNGT_EXPR:
8814 case UNGE_EXPR:
8815 case UNEQ_EXPR:
8816 case LTGT_EXPR:
8817 temp = do_store_flag (ops,
8818 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8819 tmode != VOIDmode ? tmode : mode);
8820 if (temp)
8821 return temp;
8822
8823 /* Use a compare and a jump for BLKmode comparisons, or for function
8824 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8825
8826 if ((target == 0
8827 || modifier == EXPAND_STACK_PARM
8828 || ! safe_from_p (target, treeop0, 1)
8829 || ! safe_from_p (target, treeop1, 1)
8830 /* Make sure we don't have a hard reg (such as function's return
8831 value) live across basic blocks, if not optimizing. */
8832 || (!optimize && REG_P (target)
8833 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8834 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8835
8836 emit_move_insn (target, const0_rtx);
8837
8838 op1 = gen_label_rtx ();
8839 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8840
8841 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8842 emit_move_insn (target, constm1_rtx);
8843 else
8844 emit_move_insn (target, const1_rtx);
8845
8846 emit_label (op1);
8847 return target;
8848
8849 case COMPLEX_EXPR:
8850 /* Get the rtx code of the operands. */
8851 op0 = expand_normal (treeop0);
8852 op1 = expand_normal (treeop1);
8853
8854 if (!target)
8855 target = gen_reg_rtx (TYPE_MODE (type));
8856
8857 /* Move the real (op0) and imaginary (op1) parts to their location. */
8858 write_complex_part (target, op0, false);
8859 write_complex_part (target, op1, true);
8860
8861 return target;
8862
8863 case WIDEN_SUM_EXPR:
8864 {
8865 tree oprnd0 = treeop0;
8866 tree oprnd1 = treeop1;
8867
8868 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8869 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8870 target, unsignedp);
8871 return target;
8872 }
8873
8874 case REDUC_MAX_EXPR:
8875 case REDUC_MIN_EXPR:
8876 case REDUC_PLUS_EXPR:
8877 {
8878 op0 = expand_normal (treeop0);
8879 this_optab = optab_for_tree_code (code, type, optab_default);
8880 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8881 gcc_assert (temp);
8882 return temp;
8883 }
8884
8885 case VEC_LSHIFT_EXPR:
8886 case VEC_RSHIFT_EXPR:
8887 {
8888 target = expand_vec_shift_expr (ops, target);
8889 return target;
8890 }
8891
8892 case VEC_UNPACK_HI_EXPR:
8893 case VEC_UNPACK_LO_EXPR:
8894 {
8895 op0 = expand_normal (treeop0);
8896 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8897 target, unsignedp);
8898 gcc_assert (temp);
8899 return temp;
8900 }
8901
8902 case VEC_UNPACK_FLOAT_HI_EXPR:
8903 case VEC_UNPACK_FLOAT_LO_EXPR:
8904 {
8905 op0 = expand_normal (treeop0);
8906 /* The signedness is determined from input operand. */
8907 temp = expand_widen_pattern_expr
8908 (ops, op0, NULL_RTX, NULL_RTX,
8909 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8910
8911 gcc_assert (temp);
8912 return temp;
8913 }
8914
8915 case VEC_WIDEN_MULT_HI_EXPR:
8916 case VEC_WIDEN_MULT_LO_EXPR:
8917 {
8918 tree oprnd0 = treeop0;
8919 tree oprnd1 = treeop1;
8920
8921 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8922 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8923 target, unsignedp);
8924 gcc_assert (target);
8925 return target;
8926 }
8927
8928 case VEC_WIDEN_LSHIFT_HI_EXPR:
8929 case VEC_WIDEN_LSHIFT_LO_EXPR:
8930 {
8931 tree oprnd0 = treeop0;
8932 tree oprnd1 = treeop1;
8933
8934 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8935 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8936 target, unsignedp);
8937 gcc_assert (target);
8938 return target;
8939 }
8940
8941 case VEC_PACK_TRUNC_EXPR:
8942 case VEC_PACK_SAT_EXPR:
8943 case VEC_PACK_FIX_TRUNC_EXPR:
8944 mode = TYPE_MODE (TREE_TYPE (treeop0));
8945 goto binop;
8946
8947 case VEC_PERM_EXPR:
8948 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
8949 op2 = expand_normal (treeop2);
8950
8951 /* Careful here: if the target doesn't support integral vector modes,
8952 a constant selection vector could wind up smooshed into a normal
8953 integral constant. */
8954 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
8955 {
8956 tree sel_type = TREE_TYPE (treeop2);
8957 enum machine_mode vmode
8958 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
8959 TYPE_VECTOR_SUBPARTS (sel_type));
8960 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
8961 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
8962 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
8963 }
8964 else
8965 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
8966
8967 temp = expand_vec_perm (mode, op0, op1, op2, target);
8968 gcc_assert (temp);
8969 return temp;
8970
8971 case DOT_PROD_EXPR:
8972 {
8973 tree oprnd0 = treeop0;
8974 tree oprnd1 = treeop1;
8975 tree oprnd2 = treeop2;
8976 rtx op2;
8977
8978 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8979 op2 = expand_normal (oprnd2);
8980 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8981 target, unsignedp);
8982 return target;
8983 }
8984
8985 case REALIGN_LOAD_EXPR:
8986 {
8987 tree oprnd0 = treeop0;
8988 tree oprnd1 = treeop1;
8989 tree oprnd2 = treeop2;
8990 rtx op2;
8991
8992 this_optab = optab_for_tree_code (code, type, optab_default);
8993 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8994 op2 = expand_normal (oprnd2);
8995 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8996 target, unsignedp);
8997 gcc_assert (temp);
8998 return temp;
8999 }
9000
9001 case COND_EXPR:
9002 /* A COND_EXPR with its type being VOID_TYPE represents a
9003 conditional jump and is handled in
9004 expand_gimple_cond_expr. */
9005 gcc_assert (!VOID_TYPE_P (type));
9006
9007 /* Note that COND_EXPRs whose type is a structure or union
9008 are required to be constructed to contain assignments of
9009 a temporary variable, so that we can evaluate them here
9010 for side effect only. If type is void, we must do likewise. */
9011
9012 gcc_assert (!TREE_ADDRESSABLE (type)
9013 && !ignore
9014 && TREE_TYPE (treeop1) != void_type_node
9015 && TREE_TYPE (treeop2) != void_type_node);
9016
9017 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9018 if (temp)
9019 return temp;
9020
9021 /* If we are not to produce a result, we have no target. Otherwise,
9022 if a target was specified use it; it will not be used as an
9023 intermediate target unless it is safe. If no target, use a
9024 temporary. */
9025
9026 if (modifier != EXPAND_STACK_PARM
9027 && original_target
9028 && safe_from_p (original_target, treeop0, 1)
9029 && GET_MODE (original_target) == mode
9030 && !MEM_P (original_target))
9031 temp = original_target;
9032 else
9033 temp = assign_temp (type, 0, 1);
9034
9035 do_pending_stack_adjust ();
9036 NO_DEFER_POP;
9037 op0 = gen_label_rtx ();
9038 op1 = gen_label_rtx ();
9039 jumpifnot (treeop0, op0, -1);
9040 store_expr (treeop1, temp,
9041 modifier == EXPAND_STACK_PARM,
9042 false);
9043
9044 emit_jump_insn (gen_jump (op1));
9045 emit_barrier ();
9046 emit_label (op0);
9047 store_expr (treeop2, temp,
9048 modifier == EXPAND_STACK_PARM,
9049 false);
9050
9051 emit_label (op1);
9052 OK_DEFER_POP;
9053 return temp;
9054
9055 case VEC_COND_EXPR:
9056 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9057 return target;
9058
9059 default:
9060 gcc_unreachable ();
9061 }
9062
9063 /* Here to do an ordinary binary operator. */
9064 binop:
9065 expand_operands (treeop0, treeop1,
9066 subtarget, &op0, &op1, EXPAND_NORMAL);
9067 binop2:
9068 this_optab = optab_for_tree_code (code, type, optab_default);
9069 binop3:
9070 if (modifier == EXPAND_STACK_PARM)
9071 target = 0;
9072 temp = expand_binop (mode, this_optab, op0, op1, target,
9073 unsignedp, OPTAB_LIB_WIDEN);
9074 gcc_assert (temp);
9075 /* Bitwise operations do not need bitfield reduction as we expect their
9076 operands being properly truncated. */
9077 if (code == BIT_XOR_EXPR
9078 || code == BIT_AND_EXPR
9079 || code == BIT_IOR_EXPR)
9080 return temp;
9081 return REDUCE_BIT_FIELD (temp);
9082 }
9083 #undef REDUCE_BIT_FIELD
9084
9085 rtx
9086 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
9087 enum expand_modifier modifier, rtx *alt_rtl)
9088 {
9089 rtx op0, op1, temp, decl_rtl;
9090 tree type;
9091 int unsignedp;
9092 enum machine_mode mode;
9093 enum tree_code code = TREE_CODE (exp);
9094 rtx subtarget, original_target;
9095 int ignore;
9096 tree context;
9097 bool reduce_bit_field;
9098 location_t loc = EXPR_LOCATION (exp);
9099 struct separate_ops ops;
9100 tree treeop0, treeop1, treeop2;
9101 tree ssa_name = NULL_TREE;
9102 gimple g;
9103
9104 type = TREE_TYPE (exp);
9105 mode = TYPE_MODE (type);
9106 unsignedp = TYPE_UNSIGNED (type);
9107
9108 treeop0 = treeop1 = treeop2 = NULL_TREE;
9109 if (!VL_EXP_CLASS_P (exp))
9110 switch (TREE_CODE_LENGTH (code))
9111 {
9112 default:
9113 case 3: treeop2 = TREE_OPERAND (exp, 2);
9114 case 2: treeop1 = TREE_OPERAND (exp, 1);
9115 case 1: treeop0 = TREE_OPERAND (exp, 0);
9116 case 0: break;
9117 }
9118 ops.code = code;
9119 ops.type = type;
9120 ops.op0 = treeop0;
9121 ops.op1 = treeop1;
9122 ops.op2 = treeop2;
9123 ops.location = loc;
9124
9125 ignore = (target == const0_rtx
9126 || ((CONVERT_EXPR_CODE_P (code)
9127 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9128 && TREE_CODE (type) == VOID_TYPE));
9129
9130 /* An operation in what may be a bit-field type needs the
9131 result to be reduced to the precision of the bit-field type,
9132 which is narrower than that of the type's mode. */
9133 reduce_bit_field = (!ignore
9134 && INTEGRAL_TYPE_P (type)
9135 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
9136
9137 /* If we are going to ignore this result, we need only do something
9138 if there is a side-effect somewhere in the expression. If there
9139 is, short-circuit the most common cases here. Note that we must
9140 not call expand_expr with anything but const0_rtx in case this
9141 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9142
9143 if (ignore)
9144 {
9145 if (! TREE_SIDE_EFFECTS (exp))
9146 return const0_rtx;
9147
9148 /* Ensure we reference a volatile object even if value is ignored, but
9149 don't do this if all we are doing is taking its address. */
9150 if (TREE_THIS_VOLATILE (exp)
9151 && TREE_CODE (exp) != FUNCTION_DECL
9152 && mode != VOIDmode && mode != BLKmode
9153 && modifier != EXPAND_CONST_ADDRESS)
9154 {
9155 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9156 if (MEM_P (temp))
9157 copy_to_reg (temp);
9158 return const0_rtx;
9159 }
9160
9161 if (TREE_CODE_CLASS (code) == tcc_unary
9162 || code == COMPONENT_REF || code == INDIRECT_REF)
9163 return expand_expr (treeop0, const0_rtx, VOIDmode,
9164 modifier);
9165
9166 else if (TREE_CODE_CLASS (code) == tcc_binary
9167 || TREE_CODE_CLASS (code) == tcc_comparison
9168 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9169 {
9170 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9171 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9172 return const0_rtx;
9173 }
9174 else if (code == BIT_FIELD_REF)
9175 {
9176 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9177 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9178 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
9179 return const0_rtx;
9180 }
9181
9182 target = 0;
9183 }
9184
9185 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9186 target = 0;
9187
9188 /* Use subtarget as the target for operand 0 of a binary operation. */
9189 subtarget = get_subtarget (target);
9190 original_target = target;
9191
9192 switch (code)
9193 {
9194 case LABEL_DECL:
9195 {
9196 tree function = decl_function_context (exp);
9197
9198 temp = label_rtx (exp);
9199 temp = gen_rtx_LABEL_REF (Pmode, temp);
9200
9201 if (function != current_function_decl
9202 && function != 0)
9203 LABEL_REF_NONLOCAL_P (temp) = 1;
9204
9205 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9206 return temp;
9207 }
9208
9209 case SSA_NAME:
9210 /* ??? ivopts calls expander, without any preparation from
9211 out-of-ssa. So fake instructions as if this was an access to the
9212 base variable. This unnecessarily allocates a pseudo, see how we can
9213 reuse it, if partition base vars have it set already. */
9214 if (!currently_expanding_to_rtl)
9215 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
9216 NULL);
9217
9218 g = get_gimple_for_ssa_name (exp);
9219 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9220 if (g == NULL
9221 && modifier == EXPAND_INITIALIZER
9222 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9223 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9224 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9225 g = SSA_NAME_DEF_STMT (exp);
9226 if (g)
9227 {
9228 rtx r = expand_expr_real (gimple_assign_rhs_to_tree (g), target,
9229 tmode, modifier, NULL);
9230 if (REG_P (r) && !REG_EXPR (r))
9231 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9232 return r;
9233 }
9234
9235 ssa_name = exp;
9236 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9237 exp = SSA_NAME_VAR (ssa_name);
9238 goto expand_decl_rtl;
9239
9240 case PARM_DECL:
9241 case VAR_DECL:
9242 /* If a static var's type was incomplete when the decl was written,
9243 but the type is complete now, lay out the decl now. */
9244 if (DECL_SIZE (exp) == 0
9245 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9246 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9247 layout_decl (exp, 0);
9248
9249 /* ... fall through ... */
9250
9251 case FUNCTION_DECL:
9252 case RESULT_DECL:
9253 decl_rtl = DECL_RTL (exp);
9254 expand_decl_rtl:
9255 gcc_assert (decl_rtl);
9256 decl_rtl = copy_rtx (decl_rtl);
9257 /* Record writes to register variables. */
9258 if (modifier == EXPAND_WRITE
9259 && REG_P (decl_rtl)
9260 && HARD_REGISTER_P (decl_rtl))
9261 add_to_hard_reg_set (&crtl->asm_clobbers,
9262 GET_MODE (decl_rtl), REGNO (decl_rtl));
9263
9264 /* Ensure variable marked as used even if it doesn't go through
9265 a parser. If it hasn't be used yet, write out an external
9266 definition. */
9267 TREE_USED (exp) = 1;
9268
9269 /* Show we haven't gotten RTL for this yet. */
9270 temp = 0;
9271
9272 /* Variables inherited from containing functions should have
9273 been lowered by this point. */
9274 context = decl_function_context (exp);
9275 gcc_assert (!context
9276 || context == current_function_decl
9277 || TREE_STATIC (exp)
9278 || DECL_EXTERNAL (exp)
9279 /* ??? C++ creates functions that are not TREE_STATIC. */
9280 || TREE_CODE (exp) == FUNCTION_DECL);
9281
9282 /* This is the case of an array whose size is to be determined
9283 from its initializer, while the initializer is still being parsed.
9284 ??? We aren't parsing while expanding anymore. */
9285
9286 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9287 temp = validize_mem (decl_rtl);
9288
9289 /* If DECL_RTL is memory, we are in the normal case and the
9290 address is not valid, get the address into a register. */
9291
9292 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9293 {
9294 if (alt_rtl)
9295 *alt_rtl = decl_rtl;
9296 decl_rtl = use_anchored_address (decl_rtl);
9297 if (modifier != EXPAND_CONST_ADDRESS
9298 && modifier != EXPAND_SUM
9299 && !memory_address_addr_space_p (DECL_MODE (exp),
9300 XEXP (decl_rtl, 0),
9301 MEM_ADDR_SPACE (decl_rtl)))
9302 temp = replace_equiv_address (decl_rtl,
9303 copy_rtx (XEXP (decl_rtl, 0)));
9304 }
9305
9306 /* If we got something, return it. But first, set the alignment
9307 if the address is a register. */
9308 if (temp != 0)
9309 {
9310 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9311 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9312
9313 return temp;
9314 }
9315
9316 /* If the mode of DECL_RTL does not match that of the decl,
9317 there are two cases: we are dealing with a BLKmode value
9318 that is returned in a register, or we are dealing with
9319 a promoted value. In the latter case, return a SUBREG
9320 of the wanted mode, but mark it so that we know that it
9321 was already extended. */
9322 if (REG_P (decl_rtl)
9323 && DECL_MODE (exp) != BLKmode
9324 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9325 {
9326 enum machine_mode pmode;
9327
9328 /* Get the signedness to be used for this variable. Ensure we get
9329 the same mode we got when the variable was declared. */
9330 if (code == SSA_NAME
9331 && (g = SSA_NAME_DEF_STMT (ssa_name))
9332 && gimple_code (g) == GIMPLE_CALL)
9333 {
9334 gcc_assert (!gimple_call_internal_p (g));
9335 pmode = promote_function_mode (type, mode, &unsignedp,
9336 gimple_call_fntype (g),
9337 2);
9338 }
9339 else
9340 pmode = promote_decl_mode (exp, &unsignedp);
9341 gcc_assert (GET_MODE (decl_rtl) == pmode);
9342
9343 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9344 SUBREG_PROMOTED_VAR_P (temp) = 1;
9345 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
9346 return temp;
9347 }
9348
9349 return decl_rtl;
9350
9351 case INTEGER_CST:
9352 temp = immed_double_const (TREE_INT_CST_LOW (exp),
9353 TREE_INT_CST_HIGH (exp), mode);
9354
9355 return temp;
9356
9357 case VECTOR_CST:
9358 {
9359 tree tmp = NULL_TREE;
9360 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9361 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9362 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9363 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9364 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9365 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9366 return const_vector_from_tree (exp);
9367 if (GET_MODE_CLASS (mode) == MODE_INT)
9368 {
9369 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9370 if (type_for_mode)
9371 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9372 }
9373 if (!tmp)
9374 {
9375 VEC(constructor_elt,gc) *v;
9376 unsigned i;
9377 v = VEC_alloc (constructor_elt, gc, VECTOR_CST_NELTS (exp));
9378 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
9379 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
9380 tmp = build_constructor (type, v);
9381 }
9382 return expand_expr (tmp, ignore ? const0_rtx : target,
9383 tmode, modifier);
9384 }
9385
9386 case CONST_DECL:
9387 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9388
9389 case REAL_CST:
9390 /* If optimized, generate immediate CONST_DOUBLE
9391 which will be turned into memory by reload if necessary.
9392
9393 We used to force a register so that loop.c could see it. But
9394 this does not allow gen_* patterns to perform optimizations with
9395 the constants. It also produces two insns in cases like "x = 1.0;".
9396 On most machines, floating-point constants are not permitted in
9397 many insns, so we'd end up copying it to a register in any case.
9398
9399 Now, we do the copying in expand_binop, if appropriate. */
9400 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9401 TYPE_MODE (TREE_TYPE (exp)));
9402
9403 case FIXED_CST:
9404 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9405 TYPE_MODE (TREE_TYPE (exp)));
9406
9407 case COMPLEX_CST:
9408 /* Handle evaluating a complex constant in a CONCAT target. */
9409 if (original_target && GET_CODE (original_target) == CONCAT)
9410 {
9411 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9412 rtx rtarg, itarg;
9413
9414 rtarg = XEXP (original_target, 0);
9415 itarg = XEXP (original_target, 1);
9416
9417 /* Move the real and imaginary parts separately. */
9418 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9419 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9420
9421 if (op0 != rtarg)
9422 emit_move_insn (rtarg, op0);
9423 if (op1 != itarg)
9424 emit_move_insn (itarg, op1);
9425
9426 return original_target;
9427 }
9428
9429 /* ... fall through ... */
9430
9431 case STRING_CST:
9432 temp = expand_expr_constant (exp, 1, modifier);
9433
9434 /* temp contains a constant address.
9435 On RISC machines where a constant address isn't valid,
9436 make some insns to get that address into a register. */
9437 if (modifier != EXPAND_CONST_ADDRESS
9438 && modifier != EXPAND_INITIALIZER
9439 && modifier != EXPAND_SUM
9440 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9441 MEM_ADDR_SPACE (temp)))
9442 return replace_equiv_address (temp,
9443 copy_rtx (XEXP (temp, 0)));
9444 return temp;
9445
9446 case SAVE_EXPR:
9447 {
9448 tree val = treeop0;
9449 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
9450
9451 if (!SAVE_EXPR_RESOLVED_P (exp))
9452 {
9453 /* We can indeed still hit this case, typically via builtin
9454 expanders calling save_expr immediately before expanding
9455 something. Assume this means that we only have to deal
9456 with non-BLKmode values. */
9457 gcc_assert (GET_MODE (ret) != BLKmode);
9458
9459 val = build_decl (EXPR_LOCATION (exp),
9460 VAR_DECL, NULL, TREE_TYPE (exp));
9461 DECL_ARTIFICIAL (val) = 1;
9462 DECL_IGNORED_P (val) = 1;
9463 treeop0 = val;
9464 TREE_OPERAND (exp, 0) = treeop0;
9465 SAVE_EXPR_RESOLVED_P (exp) = 1;
9466
9467 if (!CONSTANT_P (ret))
9468 ret = copy_to_reg (ret);
9469 SET_DECL_RTL (val, ret);
9470 }
9471
9472 return ret;
9473 }
9474
9475
9476 case CONSTRUCTOR:
9477 /* If we don't need the result, just ensure we evaluate any
9478 subexpressions. */
9479 if (ignore)
9480 {
9481 unsigned HOST_WIDE_INT idx;
9482 tree value;
9483
9484 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9485 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9486
9487 return const0_rtx;
9488 }
9489
9490 return expand_constructor (exp, target, modifier, false);
9491
9492 case TARGET_MEM_REF:
9493 {
9494 addr_space_t as
9495 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9496 struct mem_address addr;
9497 enum insn_code icode;
9498 unsigned int align;
9499
9500 get_address_description (exp, &addr);
9501 op0 = addr_for_mem_ref (&addr, as, true);
9502 op0 = memory_address_addr_space (mode, op0, as);
9503 temp = gen_rtx_MEM (mode, op0);
9504 set_mem_attributes (temp, exp, 0);
9505 set_mem_addr_space (temp, as);
9506 align = get_object_or_type_alignment (exp);
9507 if (modifier != EXPAND_WRITE
9508 && mode != BLKmode
9509 && align < GET_MODE_ALIGNMENT (mode)
9510 /* If the target does not have special handling for unaligned
9511 loads of mode then it can use regular moves for them. */
9512 && ((icode = optab_handler (movmisalign_optab, mode))
9513 != CODE_FOR_nothing))
9514 {
9515 struct expand_operand ops[2];
9516
9517 /* We've already validated the memory, and we're creating a
9518 new pseudo destination. The predicates really can't fail,
9519 nor can the generator. */
9520 create_output_operand (&ops[0], NULL_RTX, mode);
9521 create_fixed_operand (&ops[1], temp);
9522 expand_insn (icode, 2, ops);
9523 return ops[0].value;
9524 }
9525 return temp;
9526 }
9527
9528 case MEM_REF:
9529 {
9530 addr_space_t as
9531 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9532 enum machine_mode address_mode;
9533 tree base = TREE_OPERAND (exp, 0);
9534 gimple def_stmt;
9535 enum insn_code icode;
9536 unsigned align;
9537 /* Handle expansion of non-aliased memory with non-BLKmode. That
9538 might end up in a register. */
9539 if (mem_ref_refers_to_non_mem_p (exp))
9540 {
9541 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9542 tree bit_offset;
9543 tree bftype;
9544 base = TREE_OPERAND (base, 0);
9545 if (offset == 0
9546 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9547 && (GET_MODE_BITSIZE (DECL_MODE (base))
9548 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9549 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9550 TREE_TYPE (exp), base),
9551 target, tmode, modifier);
9552 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9553 bftype = TREE_TYPE (base);
9554 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9555 bftype = TREE_TYPE (exp);
9556 else
9557 {
9558 temp = assign_stack_temp (DECL_MODE (base),
9559 GET_MODE_SIZE (DECL_MODE (base)));
9560 store_expr (base, temp, 0, false);
9561 temp = adjust_address (temp, BLKmode, offset);
9562 set_mem_size (temp, int_size_in_bytes (TREE_TYPE (exp)));
9563 return temp;
9564 }
9565 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9566 base,
9567 TYPE_SIZE (TREE_TYPE (exp)),
9568 bit_offset),
9569 target, tmode, modifier);
9570 }
9571 address_mode = targetm.addr_space.address_mode (as);
9572 base = TREE_OPERAND (exp, 0);
9573 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9574 {
9575 tree mask = gimple_assign_rhs2 (def_stmt);
9576 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9577 gimple_assign_rhs1 (def_stmt), mask);
9578 TREE_OPERAND (exp, 0) = base;
9579 }
9580 align = get_object_or_type_alignment (exp);
9581 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9582 op0 = memory_address_addr_space (address_mode, op0, as);
9583 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9584 {
9585 rtx off
9586 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9587 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9588 }
9589 op0 = memory_address_addr_space (mode, op0, as);
9590 temp = gen_rtx_MEM (mode, op0);
9591 set_mem_attributes (temp, exp, 0);
9592 set_mem_addr_space (temp, as);
9593 if (TREE_THIS_VOLATILE (exp))
9594 MEM_VOLATILE_P (temp) = 1;
9595 if (modifier != EXPAND_WRITE
9596 && mode != BLKmode
9597 && align < GET_MODE_ALIGNMENT (mode))
9598 {
9599 if ((icode = optab_handler (movmisalign_optab, mode))
9600 != CODE_FOR_nothing)
9601 {
9602 struct expand_operand ops[2];
9603
9604 /* We've already validated the memory, and we're creating a
9605 new pseudo destination. The predicates really can't fail,
9606 nor can the generator. */
9607 create_output_operand (&ops[0], NULL_RTX, mode);
9608 create_fixed_operand (&ops[1], temp);
9609 expand_insn (icode, 2, ops);
9610 return ops[0].value;
9611 }
9612 else if (SLOW_UNALIGNED_ACCESS (mode, align))
9613 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
9614 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
9615 true, (modifier == EXPAND_STACK_PARM
9616 ? NULL_RTX : target),
9617 mode, mode);
9618 }
9619 return temp;
9620 }
9621
9622 case ARRAY_REF:
9623
9624 {
9625 tree array = treeop0;
9626 tree index = treeop1;
9627
9628 /* Fold an expression like: "foo"[2].
9629 This is not done in fold so it won't happen inside &.
9630 Don't fold if this is for wide characters since it's too
9631 difficult to do correctly and this is a very rare case. */
9632
9633 if (modifier != EXPAND_CONST_ADDRESS
9634 && modifier != EXPAND_INITIALIZER
9635 && modifier != EXPAND_MEMORY)
9636 {
9637 tree t = fold_read_from_constant_string (exp);
9638
9639 if (t)
9640 return expand_expr (t, target, tmode, modifier);
9641 }
9642
9643 /* If this is a constant index into a constant array,
9644 just get the value from the array. Handle both the cases when
9645 we have an explicit constructor and when our operand is a variable
9646 that was declared const. */
9647
9648 if (modifier != EXPAND_CONST_ADDRESS
9649 && modifier != EXPAND_INITIALIZER
9650 && modifier != EXPAND_MEMORY
9651 && TREE_CODE (array) == CONSTRUCTOR
9652 && ! TREE_SIDE_EFFECTS (array)
9653 && TREE_CODE (index) == INTEGER_CST)
9654 {
9655 unsigned HOST_WIDE_INT ix;
9656 tree field, value;
9657
9658 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9659 field, value)
9660 if (tree_int_cst_equal (field, index))
9661 {
9662 if (!TREE_SIDE_EFFECTS (value))
9663 return expand_expr (fold (value), target, tmode, modifier);
9664 break;
9665 }
9666 }
9667
9668 else if (optimize >= 1
9669 && modifier != EXPAND_CONST_ADDRESS
9670 && modifier != EXPAND_INITIALIZER
9671 && modifier != EXPAND_MEMORY
9672 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9673 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9674 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9675 && const_value_known_p (array))
9676 {
9677 if (TREE_CODE (index) == INTEGER_CST)
9678 {
9679 tree init = DECL_INITIAL (array);
9680
9681 if (TREE_CODE (init) == CONSTRUCTOR)
9682 {
9683 unsigned HOST_WIDE_INT ix;
9684 tree field, value;
9685
9686 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9687 field, value)
9688 if (tree_int_cst_equal (field, index))
9689 {
9690 if (TREE_SIDE_EFFECTS (value))
9691 break;
9692
9693 if (TREE_CODE (value) == CONSTRUCTOR)
9694 {
9695 /* If VALUE is a CONSTRUCTOR, this
9696 optimization is only useful if
9697 this doesn't store the CONSTRUCTOR
9698 into memory. If it does, it is more
9699 efficient to just load the data from
9700 the array directly. */
9701 rtx ret = expand_constructor (value, target,
9702 modifier, true);
9703 if (ret == NULL_RTX)
9704 break;
9705 }
9706
9707 return expand_expr (fold (value), target, tmode,
9708 modifier);
9709 }
9710 }
9711 else if(TREE_CODE (init) == STRING_CST)
9712 {
9713 tree index1 = index;
9714 tree low_bound = array_ref_low_bound (exp);
9715 index1 = fold_convert_loc (loc, sizetype,
9716 treeop1);
9717
9718 /* Optimize the special-case of a zero lower bound.
9719
9720 We convert the low_bound to sizetype to avoid some problems
9721 with constant folding. (E.g. suppose the lower bound is 1,
9722 and its mode is QI. Without the conversion,l (ARRAY
9723 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9724 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9725
9726 if (! integer_zerop (low_bound))
9727 index1 = size_diffop_loc (loc, index1,
9728 fold_convert_loc (loc, sizetype,
9729 low_bound));
9730
9731 if (0 > compare_tree_int (index1,
9732 TREE_STRING_LENGTH (init)))
9733 {
9734 tree type = TREE_TYPE (TREE_TYPE (init));
9735 enum machine_mode mode = TYPE_MODE (type);
9736
9737 if (GET_MODE_CLASS (mode) == MODE_INT
9738 && GET_MODE_SIZE (mode) == 1)
9739 return gen_int_mode (TREE_STRING_POINTER (init)
9740 [TREE_INT_CST_LOW (index1)],
9741 mode);
9742 }
9743 }
9744 }
9745 }
9746 }
9747 goto normal_inner_ref;
9748
9749 case COMPONENT_REF:
9750 /* If the operand is a CONSTRUCTOR, we can just extract the
9751 appropriate field if it is present. */
9752 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9753 {
9754 unsigned HOST_WIDE_INT idx;
9755 tree field, value;
9756
9757 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9758 idx, field, value)
9759 if (field == treeop1
9760 /* We can normally use the value of the field in the
9761 CONSTRUCTOR. However, if this is a bitfield in
9762 an integral mode that we can fit in a HOST_WIDE_INT,
9763 we must mask only the number of bits in the bitfield,
9764 since this is done implicitly by the constructor. If
9765 the bitfield does not meet either of those conditions,
9766 we can't do this optimization. */
9767 && (! DECL_BIT_FIELD (field)
9768 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9769 && (GET_MODE_PRECISION (DECL_MODE (field))
9770 <= HOST_BITS_PER_WIDE_INT))))
9771 {
9772 if (DECL_BIT_FIELD (field)
9773 && modifier == EXPAND_STACK_PARM)
9774 target = 0;
9775 op0 = expand_expr (value, target, tmode, modifier);
9776 if (DECL_BIT_FIELD (field))
9777 {
9778 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9779 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9780
9781 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9782 {
9783 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9784 op0 = expand_and (imode, op0, op1, target);
9785 }
9786 else
9787 {
9788 int count = GET_MODE_PRECISION (imode) - bitsize;
9789
9790 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9791 target, 0);
9792 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9793 target, 0);
9794 }
9795 }
9796
9797 return op0;
9798 }
9799 }
9800 goto normal_inner_ref;
9801
9802 case BIT_FIELD_REF:
9803 case ARRAY_RANGE_REF:
9804 normal_inner_ref:
9805 {
9806 enum machine_mode mode1, mode2;
9807 HOST_WIDE_INT bitsize, bitpos;
9808 tree offset;
9809 int volatilep = 0, must_force_mem;
9810 bool packedp = false;
9811 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9812 &mode1, &unsignedp, &volatilep, true);
9813 rtx orig_op0, memloc;
9814 bool mem_attrs_from_type = false;
9815
9816 /* If we got back the original object, something is wrong. Perhaps
9817 we are evaluating an expression too early. In any event, don't
9818 infinitely recurse. */
9819 gcc_assert (tem != exp);
9820
9821 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9822 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9823 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9824 packedp = true;
9825
9826 /* If TEM's type is a union of variable size, pass TARGET to the inner
9827 computation, since it will need a temporary and TARGET is known
9828 to have to do. This occurs in unchecked conversion in Ada. */
9829 orig_op0 = op0
9830 = expand_expr (tem,
9831 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9832 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9833 != INTEGER_CST)
9834 && modifier != EXPAND_STACK_PARM
9835 ? target : NULL_RTX),
9836 VOIDmode,
9837 (modifier == EXPAND_INITIALIZER
9838 || modifier == EXPAND_CONST_ADDRESS
9839 || modifier == EXPAND_STACK_PARM)
9840 ? modifier : EXPAND_NORMAL);
9841
9842
9843 /* If the bitfield is volatile, we want to access it in the
9844 field's mode, not the computed mode.
9845 If a MEM has VOIDmode (external with incomplete type),
9846 use BLKmode for it instead. */
9847 if (MEM_P (op0))
9848 {
9849 if (volatilep && flag_strict_volatile_bitfields > 0)
9850 op0 = adjust_address (op0, mode1, 0);
9851 else if (GET_MODE (op0) == VOIDmode)
9852 op0 = adjust_address (op0, BLKmode, 0);
9853 }
9854
9855 mode2
9856 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9857
9858 /* If we have either an offset, a BLKmode result, or a reference
9859 outside the underlying object, we must force it to memory.
9860 Such a case can occur in Ada if we have unchecked conversion
9861 of an expression from a scalar type to an aggregate type or
9862 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9863 passed a partially uninitialized object or a view-conversion
9864 to a larger size. */
9865 must_force_mem = (offset
9866 || mode1 == BLKmode
9867 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9868
9869 /* Handle CONCAT first. */
9870 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9871 {
9872 if (bitpos == 0
9873 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9874 return op0;
9875 if (bitpos == 0
9876 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9877 && bitsize)
9878 {
9879 op0 = XEXP (op0, 0);
9880 mode2 = GET_MODE (op0);
9881 }
9882 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9883 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9884 && bitpos
9885 && bitsize)
9886 {
9887 op0 = XEXP (op0, 1);
9888 bitpos = 0;
9889 mode2 = GET_MODE (op0);
9890 }
9891 else
9892 /* Otherwise force into memory. */
9893 must_force_mem = 1;
9894 }
9895
9896 /* If this is a constant, put it in a register if it is a legitimate
9897 constant and we don't need a memory reference. */
9898 if (CONSTANT_P (op0)
9899 && mode2 != BLKmode
9900 && targetm.legitimate_constant_p (mode2, op0)
9901 && !must_force_mem)
9902 op0 = force_reg (mode2, op0);
9903
9904 /* Otherwise, if this is a constant, try to force it to the constant
9905 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9906 is a legitimate constant. */
9907 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9908 op0 = validize_mem (memloc);
9909
9910 /* Otherwise, if this is a constant or the object is not in memory
9911 and need be, put it there. */
9912 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9913 {
9914 tree nt = build_qualified_type (TREE_TYPE (tem),
9915 (TYPE_QUALS (TREE_TYPE (tem))
9916 | TYPE_QUAL_CONST));
9917 memloc = assign_temp (nt, 1, 1);
9918 emit_move_insn (memloc, op0);
9919 op0 = memloc;
9920 mem_attrs_from_type = true;
9921 }
9922
9923 if (offset)
9924 {
9925 enum machine_mode address_mode;
9926 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9927 EXPAND_SUM);
9928
9929 gcc_assert (MEM_P (op0));
9930
9931 address_mode = get_address_mode (op0);
9932 if (GET_MODE (offset_rtx) != address_mode)
9933 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9934
9935 if (GET_MODE (op0) == BLKmode
9936 /* A constant address in OP0 can have VOIDmode, we must
9937 not try to call force_reg in that case. */
9938 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9939 && bitsize != 0
9940 && (bitpos % bitsize) == 0
9941 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9942 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9943 {
9944 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9945 bitpos = 0;
9946 }
9947
9948 op0 = offset_address (op0, offset_rtx,
9949 highest_pow2_factor (offset));
9950 }
9951
9952 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9953 record its alignment as BIGGEST_ALIGNMENT. */
9954 if (MEM_P (op0) && bitpos == 0 && offset != 0
9955 && is_aligning_offset (offset, tem))
9956 set_mem_align (op0, BIGGEST_ALIGNMENT);
9957
9958 /* Don't forget about volatility even if this is a bitfield. */
9959 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9960 {
9961 if (op0 == orig_op0)
9962 op0 = copy_rtx (op0);
9963
9964 MEM_VOLATILE_P (op0) = 1;
9965 }
9966
9967 /* In cases where an aligned union has an unaligned object
9968 as a field, we might be extracting a BLKmode value from
9969 an integer-mode (e.g., SImode) object. Handle this case
9970 by doing the extract into an object as wide as the field
9971 (which we know to be the width of a basic mode), then
9972 storing into memory, and changing the mode to BLKmode. */
9973 if (mode1 == VOIDmode
9974 || REG_P (op0) || GET_CODE (op0) == SUBREG
9975 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9976 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9977 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9978 && modifier != EXPAND_CONST_ADDRESS
9979 && modifier != EXPAND_INITIALIZER)
9980 /* If the field is volatile, we always want an aligned
9981 access. Do this in following two situations:
9982 1. the access is not already naturally
9983 aligned, otherwise "normal" (non-bitfield) volatile fields
9984 become non-addressable.
9985 2. the bitsize is narrower than the access size. Need
9986 to extract bitfields from the access. */
9987 || (volatilep && flag_strict_volatile_bitfields > 0
9988 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0
9989 || (mode1 != BLKmode
9990 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)))
9991 /* If the field isn't aligned enough to fetch as a memref,
9992 fetch it as a bit field. */
9993 || (mode1 != BLKmode
9994 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9995 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9996 || (MEM_P (op0)
9997 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9998 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9999 && ((modifier == EXPAND_CONST_ADDRESS
10000 || modifier == EXPAND_INITIALIZER)
10001 ? STRICT_ALIGNMENT
10002 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
10003 || (bitpos % BITS_PER_UNIT != 0)))
10004 /* If the type and the field are a constant size and the
10005 size of the type isn't the same size as the bitfield,
10006 we must use bitfield operations. */
10007 || (bitsize >= 0
10008 && TYPE_SIZE (TREE_TYPE (exp))
10009 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10010 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
10011 bitsize)))
10012 {
10013 enum machine_mode ext_mode = mode;
10014
10015 if (ext_mode == BLKmode
10016 && ! (target != 0 && MEM_P (op0)
10017 && MEM_P (target)
10018 && bitpos % BITS_PER_UNIT == 0))
10019 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
10020
10021 if (ext_mode == BLKmode)
10022 {
10023 if (target == 0)
10024 target = assign_temp (type, 1, 1);
10025
10026 if (bitsize == 0)
10027 return target;
10028
10029 /* In this case, BITPOS must start at a byte boundary and
10030 TARGET, if specified, must be a MEM. */
10031 gcc_assert (MEM_P (op0)
10032 && (!target || MEM_P (target))
10033 && !(bitpos % BITS_PER_UNIT));
10034
10035 emit_block_move (target,
10036 adjust_address (op0, VOIDmode,
10037 bitpos / BITS_PER_UNIT),
10038 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
10039 / BITS_PER_UNIT),
10040 (modifier == EXPAND_STACK_PARM
10041 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10042
10043 return target;
10044 }
10045
10046 op0 = validize_mem (op0);
10047
10048 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10049 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10050
10051 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
10052 (modifier == EXPAND_STACK_PARM
10053 ? NULL_RTX : target),
10054 ext_mode, ext_mode);
10055
10056 /* If the result is a record type and BITSIZE is narrower than
10057 the mode of OP0, an integral mode, and this is a big endian
10058 machine, we must put the field into the high-order bits. */
10059 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
10060 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
10061 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
10062 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
10063 GET_MODE_BITSIZE (GET_MODE (op0))
10064 - bitsize, op0, 1);
10065
10066 /* If the result type is BLKmode, store the data into a temporary
10067 of the appropriate type, but with the mode corresponding to the
10068 mode for the data we have (op0's mode). It's tempting to make
10069 this a constant type, since we know it's only being stored once,
10070 but that can cause problems if we are taking the address of this
10071 COMPONENT_REF because the MEM of any reference via that address
10072 will have flags corresponding to the type, which will not
10073 necessarily be constant. */
10074 if (mode == BLKmode)
10075 {
10076 rtx new_rtx;
10077
10078 new_rtx = assign_stack_temp_for_type (ext_mode,
10079 GET_MODE_BITSIZE (ext_mode),
10080 type);
10081 emit_move_insn (new_rtx, op0);
10082 op0 = copy_rtx (new_rtx);
10083 PUT_MODE (op0, BLKmode);
10084 }
10085
10086 return op0;
10087 }
10088
10089 /* If the result is BLKmode, use that to access the object
10090 now as well. */
10091 if (mode == BLKmode)
10092 mode1 = BLKmode;
10093
10094 /* Get a reference to just this component. */
10095 if (modifier == EXPAND_CONST_ADDRESS
10096 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10097 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
10098 else
10099 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10100
10101 if (op0 == orig_op0)
10102 op0 = copy_rtx (op0);
10103
10104 /* If op0 is a temporary because of forcing to memory, pass only the
10105 type to set_mem_attributes so that the original expression is never
10106 marked as ADDRESSABLE through MEM_EXPR of the temporary. */
10107 if (mem_attrs_from_type)
10108 set_mem_attributes (op0, type, 0);
10109 else
10110 set_mem_attributes (op0, exp, 0);
10111
10112 if (REG_P (XEXP (op0, 0)))
10113 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10114
10115 MEM_VOLATILE_P (op0) |= volatilep;
10116 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
10117 || modifier == EXPAND_CONST_ADDRESS
10118 || modifier == EXPAND_INITIALIZER)
10119 return op0;
10120 else if (target == 0)
10121 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
10122
10123 convert_move (target, op0, unsignedp);
10124 return target;
10125 }
10126
10127 case OBJ_TYPE_REF:
10128 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
10129
10130 case CALL_EXPR:
10131 /* All valid uses of __builtin_va_arg_pack () are removed during
10132 inlining. */
10133 if (CALL_EXPR_VA_ARG_PACK (exp))
10134 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
10135 {
10136 tree fndecl = get_callee_fndecl (exp), attr;
10137
10138 if (fndecl
10139 && (attr = lookup_attribute ("error",
10140 DECL_ATTRIBUTES (fndecl))) != NULL)
10141 error ("%Kcall to %qs declared with attribute error: %s",
10142 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10143 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10144 if (fndecl
10145 && (attr = lookup_attribute ("warning",
10146 DECL_ATTRIBUTES (fndecl))) != NULL)
10147 warning_at (tree_nonartificial_location (exp),
10148 0, "%Kcall to %qs declared with attribute warning: %s",
10149 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10150 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10151
10152 /* Check for a built-in function. */
10153 if (fndecl && DECL_BUILT_IN (fndecl))
10154 {
10155 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
10156 return expand_builtin (exp, target, subtarget, tmode, ignore);
10157 }
10158 }
10159 return expand_call (exp, target, ignore);
10160
10161 case VIEW_CONVERT_EXPR:
10162 op0 = NULL_RTX;
10163
10164 /* If we are converting to BLKmode, try to avoid an intermediate
10165 temporary by fetching an inner memory reference. */
10166 if (mode == BLKmode
10167 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10168 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10169 && handled_component_p (treeop0))
10170 {
10171 enum machine_mode mode1;
10172 HOST_WIDE_INT bitsize, bitpos;
10173 tree offset;
10174 int unsignedp;
10175 int volatilep = 0;
10176 tree tem
10177 = get_inner_reference (treeop0, &bitsize, &bitpos,
10178 &offset, &mode1, &unsignedp, &volatilep,
10179 true);
10180 rtx orig_op0;
10181
10182 /* ??? We should work harder and deal with non-zero offsets. */
10183 if (!offset
10184 && (bitpos % BITS_PER_UNIT) == 0
10185 && bitsize >= 0
10186 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
10187 {
10188 /* See the normal_inner_ref case for the rationale. */
10189 orig_op0
10190 = expand_expr (tem,
10191 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10192 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10193 != INTEGER_CST)
10194 && modifier != EXPAND_STACK_PARM
10195 ? target : NULL_RTX),
10196 VOIDmode,
10197 (modifier == EXPAND_INITIALIZER
10198 || modifier == EXPAND_CONST_ADDRESS
10199 || modifier == EXPAND_STACK_PARM)
10200 ? modifier : EXPAND_NORMAL);
10201
10202 if (MEM_P (orig_op0))
10203 {
10204 op0 = orig_op0;
10205
10206 /* Get a reference to just this component. */
10207 if (modifier == EXPAND_CONST_ADDRESS
10208 || modifier == EXPAND_SUM
10209 || modifier == EXPAND_INITIALIZER)
10210 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
10211 else
10212 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10213
10214 if (op0 == orig_op0)
10215 op0 = copy_rtx (op0);
10216
10217 set_mem_attributes (op0, treeop0, 0);
10218 if (REG_P (XEXP (op0, 0)))
10219 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10220
10221 MEM_VOLATILE_P (op0) |= volatilep;
10222 }
10223 }
10224 }
10225
10226 if (!op0)
10227 op0 = expand_expr (treeop0,
10228 NULL_RTX, VOIDmode, modifier);
10229
10230 /* If the input and output modes are both the same, we are done. */
10231 if (mode == GET_MODE (op0))
10232 ;
10233 /* If neither mode is BLKmode, and both modes are the same size
10234 then we can use gen_lowpart. */
10235 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10236 && (GET_MODE_PRECISION (mode)
10237 == GET_MODE_PRECISION (GET_MODE (op0)))
10238 && !COMPLEX_MODE_P (GET_MODE (op0)))
10239 {
10240 if (GET_CODE (op0) == SUBREG)
10241 op0 = force_reg (GET_MODE (op0), op0);
10242 temp = gen_lowpart_common (mode, op0);
10243 if (temp)
10244 op0 = temp;
10245 else
10246 {
10247 if (!REG_P (op0) && !MEM_P (op0))
10248 op0 = force_reg (GET_MODE (op0), op0);
10249 op0 = gen_lowpart (mode, op0);
10250 }
10251 }
10252 /* If both types are integral, convert from one mode to the other. */
10253 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10254 op0 = convert_modes (mode, GET_MODE (op0), op0,
10255 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10256 /* As a last resort, spill op0 to memory, and reload it in a
10257 different mode. */
10258 else if (!MEM_P (op0))
10259 {
10260 /* If the operand is not a MEM, force it into memory. Since we
10261 are going to be changing the mode of the MEM, don't call
10262 force_const_mem for constants because we don't allow pool
10263 constants to change mode. */
10264 tree inner_type = TREE_TYPE (treeop0);
10265
10266 gcc_assert (!TREE_ADDRESSABLE (exp));
10267
10268 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10269 target
10270 = assign_stack_temp_for_type
10271 (TYPE_MODE (inner_type),
10272 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
10273
10274 emit_move_insn (target, op0);
10275 op0 = target;
10276 }
10277
10278 /* At this point, OP0 is in the correct mode. If the output type is
10279 such that the operand is known to be aligned, indicate that it is.
10280 Otherwise, we need only be concerned about alignment for non-BLKmode
10281 results. */
10282 if (MEM_P (op0))
10283 {
10284 enum insn_code icode;
10285
10286 op0 = copy_rtx (op0);
10287
10288 if (TYPE_ALIGN_OK (type))
10289 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10290 else if (mode != BLKmode
10291 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)
10292 /* If the target does have special handling for unaligned
10293 loads of mode then use them. */
10294 && ((icode = optab_handler (movmisalign_optab, mode))
10295 != CODE_FOR_nothing))
10296 {
10297 rtx reg, insn;
10298
10299 op0 = adjust_address (op0, mode, 0);
10300 /* We've already validated the memory, and we're creating a
10301 new pseudo destination. The predicates really can't
10302 fail. */
10303 reg = gen_reg_rtx (mode);
10304
10305 /* Nor can the insn generator. */
10306 insn = GEN_FCN (icode) (reg, op0);
10307 emit_insn (insn);
10308 return reg;
10309 }
10310 else if (STRICT_ALIGNMENT
10311 && mode != BLKmode
10312 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10313 {
10314 tree inner_type = TREE_TYPE (treeop0);
10315 HOST_WIDE_INT temp_size
10316 = MAX (int_size_in_bytes (inner_type),
10317 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10318 rtx new_rtx
10319 = assign_stack_temp_for_type (mode, temp_size, type);
10320 rtx new_with_op0_mode
10321 = adjust_address (new_rtx, GET_MODE (op0), 0);
10322
10323 gcc_assert (!TREE_ADDRESSABLE (exp));
10324
10325 if (GET_MODE (op0) == BLKmode)
10326 emit_block_move (new_with_op0_mode, op0,
10327 GEN_INT (GET_MODE_SIZE (mode)),
10328 (modifier == EXPAND_STACK_PARM
10329 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10330 else
10331 emit_move_insn (new_with_op0_mode, op0);
10332
10333 op0 = new_rtx;
10334 }
10335
10336 op0 = adjust_address (op0, mode, 0);
10337 }
10338
10339 return op0;
10340
10341 case MODIFY_EXPR:
10342 {
10343 tree lhs = treeop0;
10344 tree rhs = treeop1;
10345 gcc_assert (ignore);
10346
10347 /* Check for |= or &= of a bitfield of size one into another bitfield
10348 of size 1. In this case, (unless we need the result of the
10349 assignment) we can do this more efficiently with a
10350 test followed by an assignment, if necessary.
10351
10352 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10353 things change so we do, this code should be enhanced to
10354 support it. */
10355 if (TREE_CODE (lhs) == COMPONENT_REF
10356 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10357 || TREE_CODE (rhs) == BIT_AND_EXPR)
10358 && TREE_OPERAND (rhs, 0) == lhs
10359 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10360 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10361 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10362 {
10363 rtx label = gen_label_rtx ();
10364 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10365 do_jump (TREE_OPERAND (rhs, 1),
10366 value ? label : 0,
10367 value ? 0 : label, -1);
10368 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10369 MOVE_NONTEMPORAL (exp));
10370 do_pending_stack_adjust ();
10371 emit_label (label);
10372 return const0_rtx;
10373 }
10374
10375 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
10376 return const0_rtx;
10377 }
10378
10379 case ADDR_EXPR:
10380 return expand_expr_addr_expr (exp, target, tmode, modifier);
10381
10382 case REALPART_EXPR:
10383 op0 = expand_normal (treeop0);
10384 return read_complex_part (op0, false);
10385
10386 case IMAGPART_EXPR:
10387 op0 = expand_normal (treeop0);
10388 return read_complex_part (op0, true);
10389
10390 case RETURN_EXPR:
10391 case LABEL_EXPR:
10392 case GOTO_EXPR:
10393 case SWITCH_EXPR:
10394 case ASM_EXPR:
10395 /* Expanded in cfgexpand.c. */
10396 gcc_unreachable ();
10397
10398 case TRY_CATCH_EXPR:
10399 case CATCH_EXPR:
10400 case EH_FILTER_EXPR:
10401 case TRY_FINALLY_EXPR:
10402 /* Lowered by tree-eh.c. */
10403 gcc_unreachable ();
10404
10405 case WITH_CLEANUP_EXPR:
10406 case CLEANUP_POINT_EXPR:
10407 case TARGET_EXPR:
10408 case CASE_LABEL_EXPR:
10409 case VA_ARG_EXPR:
10410 case BIND_EXPR:
10411 case INIT_EXPR:
10412 case CONJ_EXPR:
10413 case COMPOUND_EXPR:
10414 case PREINCREMENT_EXPR:
10415 case PREDECREMENT_EXPR:
10416 case POSTINCREMENT_EXPR:
10417 case POSTDECREMENT_EXPR:
10418 case LOOP_EXPR:
10419 case EXIT_EXPR:
10420 case COMPOUND_LITERAL_EXPR:
10421 /* Lowered by gimplify.c. */
10422 gcc_unreachable ();
10423
10424 case FDESC_EXPR:
10425 /* Function descriptors are not valid except for as
10426 initialization constants, and should not be expanded. */
10427 gcc_unreachable ();
10428
10429 case WITH_SIZE_EXPR:
10430 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10431 have pulled out the size to use in whatever context it needed. */
10432 return expand_expr_real (treeop0, original_target, tmode,
10433 modifier, alt_rtl);
10434
10435 default:
10436 return expand_expr_real_2 (&ops, target, tmode, modifier);
10437 }
10438 }
10439 \f
10440 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10441 signedness of TYPE), possibly returning the result in TARGET. */
10442 static rtx
10443 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10444 {
10445 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10446 if (target && GET_MODE (target) != GET_MODE (exp))
10447 target = 0;
10448 /* For constant values, reduce using build_int_cst_type. */
10449 if (CONST_INT_P (exp))
10450 {
10451 HOST_WIDE_INT value = INTVAL (exp);
10452 tree t = build_int_cst_type (type, value);
10453 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10454 }
10455 else if (TYPE_UNSIGNED (type))
10456 {
10457 rtx mask = immed_double_int_const (double_int_mask (prec),
10458 GET_MODE (exp));
10459 return expand_and (GET_MODE (exp), exp, mask, target);
10460 }
10461 else
10462 {
10463 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10464 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10465 exp, count, target, 0);
10466 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10467 exp, count, target, 0);
10468 }
10469 }
10470 \f
10471 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10472 when applied to the address of EXP produces an address known to be
10473 aligned more than BIGGEST_ALIGNMENT. */
10474
10475 static int
10476 is_aligning_offset (const_tree offset, const_tree exp)
10477 {
10478 /* Strip off any conversions. */
10479 while (CONVERT_EXPR_P (offset))
10480 offset = TREE_OPERAND (offset, 0);
10481
10482 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10483 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10484 if (TREE_CODE (offset) != BIT_AND_EXPR
10485 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10486 || compare_tree_int (TREE_OPERAND (offset, 1),
10487 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10488 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10489 return 0;
10490
10491 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10492 It must be NEGATE_EXPR. Then strip any more conversions. */
10493 offset = TREE_OPERAND (offset, 0);
10494 while (CONVERT_EXPR_P (offset))
10495 offset = TREE_OPERAND (offset, 0);
10496
10497 if (TREE_CODE (offset) != NEGATE_EXPR)
10498 return 0;
10499
10500 offset = TREE_OPERAND (offset, 0);
10501 while (CONVERT_EXPR_P (offset))
10502 offset = TREE_OPERAND (offset, 0);
10503
10504 /* This must now be the address of EXP. */
10505 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10506 }
10507 \f
10508 /* Return the tree node if an ARG corresponds to a string constant or zero
10509 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10510 in bytes within the string that ARG is accessing. The type of the
10511 offset will be `sizetype'. */
10512
10513 tree
10514 string_constant (tree arg, tree *ptr_offset)
10515 {
10516 tree array, offset, lower_bound;
10517 STRIP_NOPS (arg);
10518
10519 if (TREE_CODE (arg) == ADDR_EXPR)
10520 {
10521 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10522 {
10523 *ptr_offset = size_zero_node;
10524 return TREE_OPERAND (arg, 0);
10525 }
10526 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10527 {
10528 array = TREE_OPERAND (arg, 0);
10529 offset = size_zero_node;
10530 }
10531 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10532 {
10533 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10534 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10535 if (TREE_CODE (array) != STRING_CST
10536 && TREE_CODE (array) != VAR_DECL)
10537 return 0;
10538
10539 /* Check if the array has a nonzero lower bound. */
10540 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10541 if (!integer_zerop (lower_bound))
10542 {
10543 /* If the offset and base aren't both constants, return 0. */
10544 if (TREE_CODE (lower_bound) != INTEGER_CST)
10545 return 0;
10546 if (TREE_CODE (offset) != INTEGER_CST)
10547 return 0;
10548 /* Adjust offset by the lower bound. */
10549 offset = size_diffop (fold_convert (sizetype, offset),
10550 fold_convert (sizetype, lower_bound));
10551 }
10552 }
10553 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10554 {
10555 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10556 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10557 if (TREE_CODE (array) != ADDR_EXPR)
10558 return 0;
10559 array = TREE_OPERAND (array, 0);
10560 if (TREE_CODE (array) != STRING_CST
10561 && TREE_CODE (array) != VAR_DECL)
10562 return 0;
10563 }
10564 else
10565 return 0;
10566 }
10567 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10568 {
10569 tree arg0 = TREE_OPERAND (arg, 0);
10570 tree arg1 = TREE_OPERAND (arg, 1);
10571
10572 STRIP_NOPS (arg0);
10573 STRIP_NOPS (arg1);
10574
10575 if (TREE_CODE (arg0) == ADDR_EXPR
10576 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10577 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10578 {
10579 array = TREE_OPERAND (arg0, 0);
10580 offset = arg1;
10581 }
10582 else if (TREE_CODE (arg1) == ADDR_EXPR
10583 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10584 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10585 {
10586 array = TREE_OPERAND (arg1, 0);
10587 offset = arg0;
10588 }
10589 else
10590 return 0;
10591 }
10592 else
10593 return 0;
10594
10595 if (TREE_CODE (array) == STRING_CST)
10596 {
10597 *ptr_offset = fold_convert (sizetype, offset);
10598 return array;
10599 }
10600 else if (TREE_CODE (array) == VAR_DECL
10601 || TREE_CODE (array) == CONST_DECL)
10602 {
10603 int length;
10604
10605 /* Variables initialized to string literals can be handled too. */
10606 if (!const_value_known_p (array)
10607 || !DECL_INITIAL (array)
10608 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10609 return 0;
10610
10611 /* Avoid const char foo[4] = "abcde"; */
10612 if (DECL_SIZE_UNIT (array) == NULL_TREE
10613 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10614 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10615 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10616 return 0;
10617
10618 /* If variable is bigger than the string literal, OFFSET must be constant
10619 and inside of the bounds of the string literal. */
10620 offset = fold_convert (sizetype, offset);
10621 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10622 && (! host_integerp (offset, 1)
10623 || compare_tree_int (offset, length) >= 0))
10624 return 0;
10625
10626 *ptr_offset = offset;
10627 return DECL_INITIAL (array);
10628 }
10629
10630 return 0;
10631 }
10632 \f
10633 /* Generate code to calculate OPS, and exploded expression
10634 using a store-flag instruction and return an rtx for the result.
10635 OPS reflects a comparison.
10636
10637 If TARGET is nonzero, store the result there if convenient.
10638
10639 Return zero if there is no suitable set-flag instruction
10640 available on this machine.
10641
10642 Once expand_expr has been called on the arguments of the comparison,
10643 we are committed to doing the store flag, since it is not safe to
10644 re-evaluate the expression. We emit the store-flag insn by calling
10645 emit_store_flag, but only expand the arguments if we have a reason
10646 to believe that emit_store_flag will be successful. If we think that
10647 it will, but it isn't, we have to simulate the store-flag with a
10648 set/jump/set sequence. */
10649
10650 static rtx
10651 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10652 {
10653 enum rtx_code code;
10654 tree arg0, arg1, type;
10655 tree tem;
10656 enum machine_mode operand_mode;
10657 int unsignedp;
10658 rtx op0, op1;
10659 rtx subtarget = target;
10660 location_t loc = ops->location;
10661
10662 arg0 = ops->op0;
10663 arg1 = ops->op1;
10664
10665 /* Don't crash if the comparison was erroneous. */
10666 if (arg0 == error_mark_node || arg1 == error_mark_node)
10667 return const0_rtx;
10668
10669 type = TREE_TYPE (arg0);
10670 operand_mode = TYPE_MODE (type);
10671 unsignedp = TYPE_UNSIGNED (type);
10672
10673 /* We won't bother with BLKmode store-flag operations because it would mean
10674 passing a lot of information to emit_store_flag. */
10675 if (operand_mode == BLKmode)
10676 return 0;
10677
10678 /* We won't bother with store-flag operations involving function pointers
10679 when function pointers must be canonicalized before comparisons. */
10680 #ifdef HAVE_canonicalize_funcptr_for_compare
10681 if (HAVE_canonicalize_funcptr_for_compare
10682 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10683 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10684 == FUNCTION_TYPE))
10685 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10686 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10687 == FUNCTION_TYPE))))
10688 return 0;
10689 #endif
10690
10691 STRIP_NOPS (arg0);
10692 STRIP_NOPS (arg1);
10693
10694 /* For vector typed comparisons emit code to generate the desired
10695 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10696 expander for this. */
10697 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10698 {
10699 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10700 tree if_true = constant_boolean_node (true, ops->type);
10701 tree if_false = constant_boolean_node (false, ops->type);
10702 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10703 }
10704
10705 /* For vector typed comparisons emit code to generate the desired
10706 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10707 expander for this. */
10708 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10709 {
10710 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10711 tree if_true = constant_boolean_node (true, ops->type);
10712 tree if_false = constant_boolean_node (false, ops->type);
10713 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10714 }
10715
10716 /* Get the rtx comparison code to use. We know that EXP is a comparison
10717 operation of some type. Some comparisons against 1 and -1 can be
10718 converted to comparisons with zero. Do so here so that the tests
10719 below will be aware that we have a comparison with zero. These
10720 tests will not catch constants in the first operand, but constants
10721 are rarely passed as the first operand. */
10722
10723 switch (ops->code)
10724 {
10725 case EQ_EXPR:
10726 code = EQ;
10727 break;
10728 case NE_EXPR:
10729 code = NE;
10730 break;
10731 case LT_EXPR:
10732 if (integer_onep (arg1))
10733 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10734 else
10735 code = unsignedp ? LTU : LT;
10736 break;
10737 case LE_EXPR:
10738 if (! unsignedp && integer_all_onesp (arg1))
10739 arg1 = integer_zero_node, code = LT;
10740 else
10741 code = unsignedp ? LEU : LE;
10742 break;
10743 case GT_EXPR:
10744 if (! unsignedp && integer_all_onesp (arg1))
10745 arg1 = integer_zero_node, code = GE;
10746 else
10747 code = unsignedp ? GTU : GT;
10748 break;
10749 case GE_EXPR:
10750 if (integer_onep (arg1))
10751 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10752 else
10753 code = unsignedp ? GEU : GE;
10754 break;
10755
10756 case UNORDERED_EXPR:
10757 code = UNORDERED;
10758 break;
10759 case ORDERED_EXPR:
10760 code = ORDERED;
10761 break;
10762 case UNLT_EXPR:
10763 code = UNLT;
10764 break;
10765 case UNLE_EXPR:
10766 code = UNLE;
10767 break;
10768 case UNGT_EXPR:
10769 code = UNGT;
10770 break;
10771 case UNGE_EXPR:
10772 code = UNGE;
10773 break;
10774 case UNEQ_EXPR:
10775 code = UNEQ;
10776 break;
10777 case LTGT_EXPR:
10778 code = LTGT;
10779 break;
10780
10781 default:
10782 gcc_unreachable ();
10783 }
10784
10785 /* Put a constant second. */
10786 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10787 || TREE_CODE (arg0) == FIXED_CST)
10788 {
10789 tem = arg0; arg0 = arg1; arg1 = tem;
10790 code = swap_condition (code);
10791 }
10792
10793 /* If this is an equality or inequality test of a single bit, we can
10794 do this by shifting the bit being tested to the low-order bit and
10795 masking the result with the constant 1. If the condition was EQ,
10796 we xor it with 1. This does not require an scc insn and is faster
10797 than an scc insn even if we have it.
10798
10799 The code to make this transformation was moved into fold_single_bit_test,
10800 so we just call into the folder and expand its result. */
10801
10802 if ((code == NE || code == EQ)
10803 && integer_zerop (arg1)
10804 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10805 {
10806 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
10807 if (srcstmt
10808 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
10809 {
10810 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
10811 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10812 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
10813 gimple_assign_rhs1 (srcstmt),
10814 gimple_assign_rhs2 (srcstmt));
10815 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
10816 if (temp)
10817 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
10818 }
10819 }
10820
10821 if (! get_subtarget (target)
10822 || GET_MODE (subtarget) != operand_mode)
10823 subtarget = 0;
10824
10825 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10826
10827 if (target == 0)
10828 target = gen_reg_rtx (mode);
10829
10830 /* Try a cstore if possible. */
10831 return emit_store_flag_force (target, code, op0, op1,
10832 operand_mode, unsignedp,
10833 (TYPE_PRECISION (ops->type) == 1
10834 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10835 }
10836 \f
10837
10838 /* Stubs in case we haven't got a casesi insn. */
10839 #ifndef HAVE_casesi
10840 # define HAVE_casesi 0
10841 # define gen_casesi(a, b, c, d, e) (0)
10842 # define CODE_FOR_casesi CODE_FOR_nothing
10843 #endif
10844
10845 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10846 0 otherwise (i.e. if there is no casesi instruction). */
10847 int
10848 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10849 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10850 rtx fallback_label ATTRIBUTE_UNUSED)
10851 {
10852 struct expand_operand ops[5];
10853 enum machine_mode index_mode = SImode;
10854 rtx op1, op2, index;
10855
10856 if (! HAVE_casesi)
10857 return 0;
10858
10859 /* Convert the index to SImode. */
10860 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10861 {
10862 enum machine_mode omode = TYPE_MODE (index_type);
10863 rtx rangertx = expand_normal (range);
10864
10865 /* We must handle the endpoints in the original mode. */
10866 index_expr = build2 (MINUS_EXPR, index_type,
10867 index_expr, minval);
10868 minval = integer_zero_node;
10869 index = expand_normal (index_expr);
10870 if (default_label)
10871 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10872 omode, 1, default_label);
10873 /* Now we can safely truncate. */
10874 index = convert_to_mode (index_mode, index, 0);
10875 }
10876 else
10877 {
10878 if (TYPE_MODE (index_type) != index_mode)
10879 {
10880 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
10881 index_expr = fold_convert (index_type, index_expr);
10882 }
10883
10884 index = expand_normal (index_expr);
10885 }
10886
10887 do_pending_stack_adjust ();
10888
10889 op1 = expand_normal (minval);
10890 op2 = expand_normal (range);
10891
10892 create_input_operand (&ops[0], index, index_mode);
10893 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10894 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10895 create_fixed_operand (&ops[3], table_label);
10896 create_fixed_operand (&ops[4], (default_label
10897 ? default_label
10898 : fallback_label));
10899 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10900 return 1;
10901 }
10902
10903 /* Attempt to generate a tablejump instruction; same concept. */
10904 #ifndef HAVE_tablejump
10905 #define HAVE_tablejump 0
10906 #define gen_tablejump(x, y) (0)
10907 #endif
10908
10909 /* Subroutine of the next function.
10910
10911 INDEX is the value being switched on, with the lowest value
10912 in the table already subtracted.
10913 MODE is its expected mode (needed if INDEX is constant).
10914 RANGE is the length of the jump table.
10915 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10916
10917 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10918 index value is out of range. */
10919
10920 static void
10921 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10922 rtx default_label)
10923 {
10924 rtx temp, vector;
10925
10926 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10927 cfun->cfg->max_jumptable_ents = INTVAL (range);
10928
10929 /* Do an unsigned comparison (in the proper mode) between the index
10930 expression and the value which represents the length of the range.
10931 Since we just finished subtracting the lower bound of the range
10932 from the index expression, this comparison allows us to simultaneously
10933 check that the original index expression value is both greater than
10934 or equal to the minimum value of the range and less than or equal to
10935 the maximum value of the range. */
10936
10937 if (default_label)
10938 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10939 default_label);
10940
10941 /* If index is in range, it must fit in Pmode.
10942 Convert to Pmode so we can index with it. */
10943 if (mode != Pmode)
10944 index = convert_to_mode (Pmode, index, 1);
10945
10946 /* Don't let a MEM slip through, because then INDEX that comes
10947 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10948 and break_out_memory_refs will go to work on it and mess it up. */
10949 #ifdef PIC_CASE_VECTOR_ADDRESS
10950 if (flag_pic && !REG_P (index))
10951 index = copy_to_mode_reg (Pmode, index);
10952 #endif
10953
10954 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10955 GET_MODE_SIZE, because this indicates how large insns are. The other
10956 uses should all be Pmode, because they are addresses. This code
10957 could fail if addresses and insns are not the same size. */
10958 index = gen_rtx_PLUS (Pmode,
10959 gen_rtx_MULT (Pmode, index,
10960 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10961 gen_rtx_LABEL_REF (Pmode, table_label));
10962 #ifdef PIC_CASE_VECTOR_ADDRESS
10963 if (flag_pic)
10964 index = PIC_CASE_VECTOR_ADDRESS (index);
10965 else
10966 #endif
10967 index = memory_address (CASE_VECTOR_MODE, index);
10968 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10969 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10970 convert_move (temp, vector, 0);
10971
10972 emit_jump_insn (gen_tablejump (temp, table_label));
10973
10974 /* If we are generating PIC code or if the table is PC-relative, the
10975 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10976 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10977 emit_barrier ();
10978 }
10979
10980 int
10981 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10982 rtx table_label, rtx default_label)
10983 {
10984 rtx index;
10985
10986 if (! HAVE_tablejump)
10987 return 0;
10988
10989 index_expr = fold_build2 (MINUS_EXPR, index_type,
10990 fold_convert (index_type, index_expr),
10991 fold_convert (index_type, minval));
10992 index = expand_normal (index_expr);
10993 do_pending_stack_adjust ();
10994
10995 do_tablejump (index, TYPE_MODE (index_type),
10996 convert_modes (TYPE_MODE (index_type),
10997 TYPE_MODE (TREE_TYPE (range)),
10998 expand_normal (range),
10999 TYPE_UNSIGNED (TREE_TYPE (range))),
11000 table_label, default_label);
11001 return 1;
11002 }
11003
11004 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11005 static rtx
11006 const_vector_from_tree (tree exp)
11007 {
11008 rtvec v;
11009 unsigned i;
11010 int units;
11011 tree elt;
11012 enum machine_mode inner, mode;
11013
11014 mode = TYPE_MODE (TREE_TYPE (exp));
11015
11016 if (initializer_zerop (exp))
11017 return CONST0_RTX (mode);
11018
11019 units = GET_MODE_NUNITS (mode);
11020 inner = GET_MODE_INNER (mode);
11021
11022 v = rtvec_alloc (units);
11023
11024 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
11025 {
11026 elt = VECTOR_CST_ELT (exp, i);
11027
11028 if (TREE_CODE (elt) == REAL_CST)
11029 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
11030 inner);
11031 else if (TREE_CODE (elt) == FIXED_CST)
11032 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
11033 inner);
11034 else
11035 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
11036 inner);
11037 }
11038
11039 return gen_rtx_CONST_VECTOR (mode, v);
11040 }
11041
11042 /* Build a decl for a personality function given a language prefix. */
11043
11044 tree
11045 build_personality_function (const char *lang)
11046 {
11047 const char *unwind_and_version;
11048 tree decl, type;
11049 char *name;
11050
11051 switch (targetm_common.except_unwind_info (&global_options))
11052 {
11053 case UI_NONE:
11054 return NULL;
11055 case UI_SJLJ:
11056 unwind_and_version = "_sj0";
11057 break;
11058 case UI_DWARF2:
11059 case UI_TARGET:
11060 unwind_and_version = "_v0";
11061 break;
11062 default:
11063 gcc_unreachable ();
11064 }
11065
11066 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
11067
11068 type = build_function_type_list (integer_type_node, integer_type_node,
11069 long_long_unsigned_type_node,
11070 ptr_type_node, ptr_type_node, NULL_TREE);
11071 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
11072 get_identifier (name), type);
11073 DECL_ARTIFICIAL (decl) = 1;
11074 DECL_EXTERNAL (decl) = 1;
11075 TREE_PUBLIC (decl) = 1;
11076
11077 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11078 are the flags assigned by targetm.encode_section_info. */
11079 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
11080
11081 return decl;
11082 }
11083
11084 /* Extracts the personality function of DECL and returns the corresponding
11085 libfunc. */
11086
11087 rtx
11088 get_personality_function (tree decl)
11089 {
11090 tree personality = DECL_FUNCTION_PERSONALITY (decl);
11091 enum eh_personality_kind pk;
11092
11093 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
11094 if (pk == eh_personality_none)
11095 return NULL;
11096
11097 if (!personality
11098 && pk == eh_personality_any)
11099 personality = lang_hooks.eh_personality ();
11100
11101 if (pk == eh_personality_lang)
11102 gcc_assert (personality != NULL_TREE);
11103
11104 return XEXP (DECL_RTL (personality), 0);
11105 }
11106
11107 #include "gt-expr.h"