[expr.c] PR target/65358 Avoid clobbering partial argument during sibcall
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2015 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "machmode.h"
25 #include "rtl.h"
26 #include "hash-set.h"
27 #include "vec.h"
28 #include "double-int.h"
29 #include "input.h"
30 #include "alias.h"
31 #include "symtab.h"
32 #include "wide-int.h"
33 #include "inchash.h"
34 #include "tree.h"
35 #include "fold-const.h"
36 #include "stringpool.h"
37 #include "stor-layout.h"
38 #include "attribs.h"
39 #include "varasm.h"
40 #include "flags.h"
41 #include "regs.h"
42 #include "hard-reg-set.h"
43 #include "except.h"
44 #include "function.h"
45 #include "insn-config.h"
46 #include "insn-attr.h"
47 #include "hashtab.h"
48 #include "statistics.h"
49 #include "real.h"
50 #include "fixed-value.h"
51 #include "expmed.h"
52 #include "dojump.h"
53 #include "explow.h"
54 #include "calls.h"
55 #include "emit-rtl.h"
56 #include "stmt.h"
57 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
58 #include "expr.h"
59 #include "insn-codes.h"
60 #include "optabs.h"
61 #include "libfuncs.h"
62 #include "recog.h"
63 #include "reload.h"
64 #include "typeclass.h"
65 #include "toplev.h"
66 #include "langhooks.h"
67 #include "intl.h"
68 #include "tm_p.h"
69 #include "tree-iterator.h"
70 #include "predict.h"
71 #include "dominance.h"
72 #include "cfg.h"
73 #include "basic-block.h"
74 #include "tree-ssa-alias.h"
75 #include "internal-fn.h"
76 #include "gimple-expr.h"
77 #include "is-a.h"
78 #include "gimple.h"
79 #include "gimple-ssa.h"
80 #include "hash-map.h"
81 #include "plugin-api.h"
82 #include "ipa-ref.h"
83 #include "cgraph.h"
84 #include "tree-ssanames.h"
85 #include "target.h"
86 #include "common/common-target.h"
87 #include "timevar.h"
88 #include "df.h"
89 #include "diagnostic.h"
90 #include "tree-ssa-live.h"
91 #include "tree-outof-ssa.h"
92 #include "target-globals.h"
93 #include "params.h"
94 #include "tree-ssa-address.h"
95 #include "cfgexpand.h"
96 #include "builtins.h"
97 #include "tree-chkp.h"
98 #include "rtl-chkp.h"
99 #include "ccmp.h"
100
101
102 /* If this is nonzero, we do not bother generating VOLATILE
103 around volatile memory references, and we are willing to
104 output indirect addresses. If cse is to follow, we reject
105 indirect addresses so a useful potential cse is generated;
106 if it is used only once, instruction combination will produce
107 the same indirect address eventually. */
108 int cse_not_expected;
109
110 /* This structure is used by move_by_pieces to describe the move to
111 be performed. */
112 struct move_by_pieces_d
113 {
114 rtx to;
115 rtx to_addr;
116 int autinc_to;
117 int explicit_inc_to;
118 rtx from;
119 rtx from_addr;
120 int autinc_from;
121 int explicit_inc_from;
122 unsigned HOST_WIDE_INT len;
123 HOST_WIDE_INT offset;
124 int reverse;
125 };
126
127 /* This structure is used by store_by_pieces to describe the clear to
128 be performed. */
129
130 struct store_by_pieces_d
131 {
132 rtx to;
133 rtx to_addr;
134 int autinc_to;
135 int explicit_inc_to;
136 unsigned HOST_WIDE_INT len;
137 HOST_WIDE_INT offset;
138 rtx (*constfun) (void *, HOST_WIDE_INT, machine_mode);
139 void *constfundata;
140 int reverse;
141 };
142
143 static void move_by_pieces_1 (insn_gen_fn, machine_mode,
144 struct move_by_pieces_d *);
145 static bool block_move_libcall_safe_for_call_parm (void);
146 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT,
147 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
148 unsigned HOST_WIDE_INT);
149 static tree emit_block_move_libcall_fn (int);
150 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
151 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, machine_mode);
152 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
153 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
154 static void store_by_pieces_2 (insn_gen_fn, machine_mode,
155 struct store_by_pieces_d *);
156 static tree clear_storage_libcall_fn (int);
157 static rtx_insn *compress_float_constant (rtx, rtx);
158 static rtx get_subtarget (rtx);
159 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
160 HOST_WIDE_INT, machine_mode,
161 tree, int, alias_set_type);
162 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
163 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
164 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
165 machine_mode, tree, alias_set_type, bool);
166
167 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
168
169 static int is_aligning_offset (const_tree, const_tree);
170 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
171 static rtx do_store_flag (sepops, rtx, machine_mode);
172 #ifdef PUSH_ROUNDING
173 static void emit_single_push_insn (machine_mode, rtx, tree);
174 #endif
175 static void do_tablejump (rtx, machine_mode, rtx, rtx, rtx, int);
176 static rtx const_vector_from_tree (tree);
177 static tree tree_expr_size (const_tree);
178 static HOST_WIDE_INT int_expr_size (tree);
179
180 \f
181 /* This is run to set up which modes can be used
182 directly in memory and to initialize the block move optab. It is run
183 at the beginning of compilation and when the target is reinitialized. */
184
185 void
186 init_expr_target (void)
187 {
188 rtx insn, pat;
189 machine_mode mode;
190 int num_clobbers;
191 rtx mem, mem1;
192 rtx reg;
193
194 /* Try indexing by frame ptr and try by stack ptr.
195 It is known that on the Convex the stack ptr isn't a valid index.
196 With luck, one or the other is valid on any machine. */
197 mem = gen_rtx_MEM (word_mode, stack_pointer_rtx);
198 mem1 = gen_rtx_MEM (word_mode, frame_pointer_rtx);
199
200 /* A scratch register we can modify in-place below to avoid
201 useless RTL allocations. */
202 reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
203
204 insn = rtx_alloc (INSN);
205 pat = gen_rtx_SET (NULL_RTX, NULL_RTX);
206 PATTERN (insn) = pat;
207
208 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
209 mode = (machine_mode) ((int) mode + 1))
210 {
211 int regno;
212
213 direct_load[(int) mode] = direct_store[(int) mode] = 0;
214 PUT_MODE (mem, mode);
215 PUT_MODE (mem1, mode);
216
217 /* See if there is some register that can be used in this mode and
218 directly loaded or stored from memory. */
219
220 if (mode != VOIDmode && mode != BLKmode)
221 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
222 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
223 regno++)
224 {
225 if (! HARD_REGNO_MODE_OK (regno, mode))
226 continue;
227
228 set_mode_and_regno (reg, mode, regno);
229
230 SET_SRC (pat) = mem;
231 SET_DEST (pat) = reg;
232 if (recog (pat, insn, &num_clobbers) >= 0)
233 direct_load[(int) mode] = 1;
234
235 SET_SRC (pat) = mem1;
236 SET_DEST (pat) = reg;
237 if (recog (pat, insn, &num_clobbers) >= 0)
238 direct_load[(int) mode] = 1;
239
240 SET_SRC (pat) = reg;
241 SET_DEST (pat) = mem;
242 if (recog (pat, insn, &num_clobbers) >= 0)
243 direct_store[(int) mode] = 1;
244
245 SET_SRC (pat) = reg;
246 SET_DEST (pat) = mem1;
247 if (recog (pat, insn, &num_clobbers) >= 0)
248 direct_store[(int) mode] = 1;
249 }
250 }
251
252 mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 1));
253
254 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
255 mode = GET_MODE_WIDER_MODE (mode))
256 {
257 machine_mode srcmode;
258 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
259 srcmode = GET_MODE_WIDER_MODE (srcmode))
260 {
261 enum insn_code ic;
262
263 ic = can_extend_p (mode, srcmode, 0);
264 if (ic == CODE_FOR_nothing)
265 continue;
266
267 PUT_MODE (mem, srcmode);
268
269 if (insn_operand_matches (ic, 1, mem))
270 float_extend_from_mem[mode][srcmode] = true;
271 }
272 }
273 }
274
275 /* This is run at the start of compiling a function. */
276
277 void
278 init_expr (void)
279 {
280 memset (&crtl->expr, 0, sizeof (crtl->expr));
281 }
282 \f
283 /* Copy data from FROM to TO, where the machine modes are not the same.
284 Both modes may be integer, or both may be floating, or both may be
285 fixed-point.
286 UNSIGNEDP should be nonzero if FROM is an unsigned type.
287 This causes zero-extension instead of sign-extension. */
288
289 void
290 convert_move (rtx to, rtx from, int unsignedp)
291 {
292 machine_mode to_mode = GET_MODE (to);
293 machine_mode from_mode = GET_MODE (from);
294 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
295 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
296 enum insn_code code;
297 rtx libcall;
298
299 /* rtx code for making an equivalent value. */
300 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
301 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
302
303
304 gcc_assert (to_real == from_real);
305 gcc_assert (to_mode != BLKmode);
306 gcc_assert (from_mode != BLKmode);
307
308 /* If the source and destination are already the same, then there's
309 nothing to do. */
310 if (to == from)
311 return;
312
313 /* If FROM is a SUBREG that indicates that we have already done at least
314 the required extension, strip it. We don't handle such SUBREGs as
315 TO here. */
316
317 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
318 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
319 >= GET_MODE_PRECISION (to_mode))
320 && SUBREG_CHECK_PROMOTED_SIGN (from, unsignedp))
321 from = gen_lowpart (to_mode, from), from_mode = to_mode;
322
323 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
324
325 if (to_mode == from_mode
326 || (from_mode == VOIDmode && CONSTANT_P (from)))
327 {
328 emit_move_insn (to, from);
329 return;
330 }
331
332 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
333 {
334 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
335
336 if (VECTOR_MODE_P (to_mode))
337 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
338 else
339 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
340
341 emit_move_insn (to, from);
342 return;
343 }
344
345 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
346 {
347 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
348 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
349 return;
350 }
351
352 if (to_real)
353 {
354 rtx value;
355 rtx_insn *insns;
356 convert_optab tab;
357
358 gcc_assert ((GET_MODE_PRECISION (from_mode)
359 != GET_MODE_PRECISION (to_mode))
360 || (DECIMAL_FLOAT_MODE_P (from_mode)
361 != DECIMAL_FLOAT_MODE_P (to_mode)));
362
363 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
364 /* Conversion between decimal float and binary float, same size. */
365 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
366 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
367 tab = sext_optab;
368 else
369 tab = trunc_optab;
370
371 /* Try converting directly if the insn is supported. */
372
373 code = convert_optab_handler (tab, to_mode, from_mode);
374 if (code != CODE_FOR_nothing)
375 {
376 emit_unop_insn (code, to, from,
377 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
378 return;
379 }
380
381 /* Otherwise use a libcall. */
382 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
383
384 /* Is this conversion implemented yet? */
385 gcc_assert (libcall);
386
387 start_sequence ();
388 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
389 1, from, from_mode);
390 insns = get_insns ();
391 end_sequence ();
392 emit_libcall_block (insns, to, value,
393 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
394 from)
395 : gen_rtx_FLOAT_EXTEND (to_mode, from));
396 return;
397 }
398
399 /* Handle pointer conversion. */ /* SPEE 900220. */
400 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
401 {
402 convert_optab ctab;
403
404 if (GET_MODE_PRECISION (from_mode) > GET_MODE_PRECISION (to_mode))
405 ctab = trunc_optab;
406 else if (unsignedp)
407 ctab = zext_optab;
408 else
409 ctab = sext_optab;
410
411 if (convert_optab_handler (ctab, to_mode, from_mode)
412 != CODE_FOR_nothing)
413 {
414 emit_unop_insn (convert_optab_handler (ctab, to_mode, from_mode),
415 to, from, UNKNOWN);
416 return;
417 }
418 }
419
420 /* Targets are expected to provide conversion insns between PxImode and
421 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
422 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
423 {
424 machine_mode full_mode
425 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
426
427 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
428 != CODE_FOR_nothing);
429
430 if (full_mode != from_mode)
431 from = convert_to_mode (full_mode, from, unsignedp);
432 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
433 to, from, UNKNOWN);
434 return;
435 }
436 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
437 {
438 rtx new_from;
439 machine_mode full_mode
440 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
441 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
442 enum insn_code icode;
443
444 icode = convert_optab_handler (ctab, full_mode, from_mode);
445 gcc_assert (icode != CODE_FOR_nothing);
446
447 if (to_mode == full_mode)
448 {
449 emit_unop_insn (icode, to, from, UNKNOWN);
450 return;
451 }
452
453 new_from = gen_reg_rtx (full_mode);
454 emit_unop_insn (icode, new_from, from, UNKNOWN);
455
456 /* else proceed to integer conversions below. */
457 from_mode = full_mode;
458 from = new_from;
459 }
460
461 /* Make sure both are fixed-point modes or both are not. */
462 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
463 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
464 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
465 {
466 /* If we widen from_mode to to_mode and they are in the same class,
467 we won't saturate the result.
468 Otherwise, always saturate the result to play safe. */
469 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
470 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
471 expand_fixed_convert (to, from, 0, 0);
472 else
473 expand_fixed_convert (to, from, 0, 1);
474 return;
475 }
476
477 /* Now both modes are integers. */
478
479 /* Handle expanding beyond a word. */
480 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
481 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
482 {
483 rtx_insn *insns;
484 rtx lowpart;
485 rtx fill_value;
486 rtx lowfrom;
487 int i;
488 machine_mode lowpart_mode;
489 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
490
491 /* Try converting directly if the insn is supported. */
492 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
493 != CODE_FOR_nothing)
494 {
495 /* If FROM is a SUBREG, put it into a register. Do this
496 so that we always generate the same set of insns for
497 better cse'ing; if an intermediate assignment occurred,
498 we won't be doing the operation directly on the SUBREG. */
499 if (optimize > 0 && GET_CODE (from) == SUBREG)
500 from = force_reg (from_mode, from);
501 emit_unop_insn (code, to, from, equiv_code);
502 return;
503 }
504 /* Next, try converting via full word. */
505 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
506 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
507 != CODE_FOR_nothing))
508 {
509 rtx word_to = gen_reg_rtx (word_mode);
510 if (REG_P (to))
511 {
512 if (reg_overlap_mentioned_p (to, from))
513 from = force_reg (from_mode, from);
514 emit_clobber (to);
515 }
516 convert_move (word_to, from, unsignedp);
517 emit_unop_insn (code, to, word_to, equiv_code);
518 return;
519 }
520
521 /* No special multiword conversion insn; do it by hand. */
522 start_sequence ();
523
524 /* Since we will turn this into a no conflict block, we must ensure the
525 the source does not overlap the target so force it into an isolated
526 register when maybe so. Likewise for any MEM input, since the
527 conversion sequence might require several references to it and we
528 must ensure we're getting the same value every time. */
529
530 if (MEM_P (from) || reg_overlap_mentioned_p (to, from))
531 from = force_reg (from_mode, from);
532
533 /* Get a copy of FROM widened to a word, if necessary. */
534 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
535 lowpart_mode = word_mode;
536 else
537 lowpart_mode = from_mode;
538
539 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
540
541 lowpart = gen_lowpart (lowpart_mode, to);
542 emit_move_insn (lowpart, lowfrom);
543
544 /* Compute the value to put in each remaining word. */
545 if (unsignedp)
546 fill_value = const0_rtx;
547 else
548 fill_value = emit_store_flag_force (gen_reg_rtx (word_mode),
549 LT, lowfrom, const0_rtx,
550 lowpart_mode, 0, -1);
551
552 /* Fill the remaining words. */
553 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
554 {
555 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
556 rtx subword = operand_subword (to, index, 1, to_mode);
557
558 gcc_assert (subword);
559
560 if (fill_value != subword)
561 emit_move_insn (subword, fill_value);
562 }
563
564 insns = get_insns ();
565 end_sequence ();
566
567 emit_insn (insns);
568 return;
569 }
570
571 /* Truncating multi-word to a word or less. */
572 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
573 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
574 {
575 if (!((MEM_P (from)
576 && ! MEM_VOLATILE_P (from)
577 && direct_load[(int) to_mode]
578 && ! mode_dependent_address_p (XEXP (from, 0),
579 MEM_ADDR_SPACE (from)))
580 || REG_P (from)
581 || GET_CODE (from) == SUBREG))
582 from = force_reg (from_mode, from);
583 convert_move (to, gen_lowpart (word_mode, from), 0);
584 return;
585 }
586
587 /* Now follow all the conversions between integers
588 no more than a word long. */
589
590 /* For truncation, usually we can just refer to FROM in a narrower mode. */
591 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
592 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
593 {
594 if (!((MEM_P (from)
595 && ! MEM_VOLATILE_P (from)
596 && direct_load[(int) to_mode]
597 && ! mode_dependent_address_p (XEXP (from, 0),
598 MEM_ADDR_SPACE (from)))
599 || REG_P (from)
600 || GET_CODE (from) == SUBREG))
601 from = force_reg (from_mode, from);
602 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
603 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
604 from = copy_to_reg (from);
605 emit_move_insn (to, gen_lowpart (to_mode, from));
606 return;
607 }
608
609 /* Handle extension. */
610 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
611 {
612 /* Convert directly if that works. */
613 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
614 != CODE_FOR_nothing)
615 {
616 emit_unop_insn (code, to, from, equiv_code);
617 return;
618 }
619 else
620 {
621 machine_mode intermediate;
622 rtx tmp;
623 int shift_amount;
624
625 /* Search for a mode to convert via. */
626 for (intermediate = from_mode; intermediate != VOIDmode;
627 intermediate = GET_MODE_WIDER_MODE (intermediate))
628 if (((can_extend_p (to_mode, intermediate, unsignedp)
629 != CODE_FOR_nothing)
630 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
631 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
632 && (can_extend_p (intermediate, from_mode, unsignedp)
633 != CODE_FOR_nothing))
634 {
635 convert_move (to, convert_to_mode (intermediate, from,
636 unsignedp), unsignedp);
637 return;
638 }
639
640 /* No suitable intermediate mode.
641 Generate what we need with shifts. */
642 shift_amount = (GET_MODE_PRECISION (to_mode)
643 - GET_MODE_PRECISION (from_mode));
644 from = gen_lowpart (to_mode, force_reg (from_mode, from));
645 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
646 to, unsignedp);
647 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
648 to, unsignedp);
649 if (tmp != to)
650 emit_move_insn (to, tmp);
651 return;
652 }
653 }
654
655 /* Support special truncate insns for certain modes. */
656 if (convert_optab_handler (trunc_optab, to_mode,
657 from_mode) != CODE_FOR_nothing)
658 {
659 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
660 to, from, UNKNOWN);
661 return;
662 }
663
664 /* Handle truncation of volatile memrefs, and so on;
665 the things that couldn't be truncated directly,
666 and for which there was no special instruction.
667
668 ??? Code above formerly short-circuited this, for most integer
669 mode pairs, with a force_reg in from_mode followed by a recursive
670 call to this routine. Appears always to have been wrong. */
671 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
672 {
673 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
674 emit_move_insn (to, temp);
675 return;
676 }
677
678 /* Mode combination is not recognized. */
679 gcc_unreachable ();
680 }
681
682 /* Return an rtx for a value that would result
683 from converting X to mode MODE.
684 Both X and MODE may be floating, or both integer.
685 UNSIGNEDP is nonzero if X is an unsigned value.
686 This can be done by referring to a part of X in place
687 or by copying to a new temporary with conversion. */
688
689 rtx
690 convert_to_mode (machine_mode mode, rtx x, int unsignedp)
691 {
692 return convert_modes (mode, VOIDmode, x, unsignedp);
693 }
694
695 /* Return an rtx for a value that would result
696 from converting X from mode OLDMODE to mode MODE.
697 Both modes may be floating, or both integer.
698 UNSIGNEDP is nonzero if X is an unsigned value.
699
700 This can be done by referring to a part of X in place
701 or by copying to a new temporary with conversion.
702
703 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
704
705 rtx
706 convert_modes (machine_mode mode, machine_mode oldmode, rtx x, int unsignedp)
707 {
708 rtx temp;
709
710 /* If FROM is a SUBREG that indicates that we have already done at least
711 the required extension, strip it. */
712
713 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
714 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
715 && SUBREG_CHECK_PROMOTED_SIGN (x, unsignedp))
716 x = gen_lowpart (mode, SUBREG_REG (x));
717
718 if (GET_MODE (x) != VOIDmode)
719 oldmode = GET_MODE (x);
720
721 if (mode == oldmode)
722 return x;
723
724 if (CONST_SCALAR_INT_P (x) && GET_MODE_CLASS (mode) == MODE_INT)
725 {
726 /* If the caller did not tell us the old mode, then there is not
727 much to do with respect to canonicalization. We have to
728 assume that all the bits are significant. */
729 if (GET_MODE_CLASS (oldmode) != MODE_INT)
730 oldmode = MAX_MODE_INT;
731 wide_int w = wide_int::from (std::make_pair (x, oldmode),
732 GET_MODE_PRECISION (mode),
733 unsignedp ? UNSIGNED : SIGNED);
734 return immed_wide_int_const (w, mode);
735 }
736
737 /* We can do this with a gen_lowpart if both desired and current modes
738 are integer, and this is either a constant integer, a register, or a
739 non-volatile MEM. */
740 if (GET_MODE_CLASS (mode) == MODE_INT
741 && GET_MODE_CLASS (oldmode) == MODE_INT
742 && GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
743 && ((MEM_P (x) && !MEM_VOLATILE_P (x) && direct_load[(int) mode])
744 || (REG_P (x)
745 && (!HARD_REGISTER_P (x)
746 || HARD_REGNO_MODE_OK (REGNO (x), mode))
747 && TRULY_NOOP_TRUNCATION_MODES_P (mode, GET_MODE (x)))))
748
749 return gen_lowpart (mode, x);
750
751 /* Converting from integer constant into mode is always equivalent to an
752 subreg operation. */
753 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
754 {
755 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
756 return simplify_gen_subreg (mode, x, oldmode, 0);
757 }
758
759 temp = gen_reg_rtx (mode);
760 convert_move (temp, x, unsignedp);
761 return temp;
762 }
763 \f
764 /* Return the largest alignment we can use for doing a move (or store)
765 of MAX_PIECES. ALIGN is the largest alignment we could use. */
766
767 static unsigned int
768 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
769 {
770 machine_mode tmode;
771
772 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
773 if (align >= GET_MODE_ALIGNMENT (tmode))
774 align = GET_MODE_ALIGNMENT (tmode);
775 else
776 {
777 machine_mode tmode, xmode;
778
779 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
780 tmode != VOIDmode;
781 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
782 if (GET_MODE_SIZE (tmode) > max_pieces
783 || SLOW_UNALIGNED_ACCESS (tmode, align))
784 break;
785
786 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
787 }
788
789 return align;
790 }
791
792 /* Return the widest integer mode no wider than SIZE. If no such mode
793 can be found, return VOIDmode. */
794
795 static machine_mode
796 widest_int_mode_for_size (unsigned int size)
797 {
798 machine_mode tmode, mode = VOIDmode;
799
800 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
801 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
802 if (GET_MODE_SIZE (tmode) < size)
803 mode = tmode;
804
805 return mode;
806 }
807
808 /* Determine whether the LEN bytes can be moved by using several move
809 instructions. Return nonzero if a call to move_by_pieces should
810 succeed. */
811
812 int
813 can_move_by_pieces (unsigned HOST_WIDE_INT len,
814 unsigned int align)
815 {
816 return targetm.use_by_pieces_infrastructure_p (len, align, MOVE_BY_PIECES,
817 optimize_insn_for_speed_p ());
818 }
819
820 /* Generate several move instructions to copy LEN bytes from block FROM to
821 block TO. (These are MEM rtx's with BLKmode).
822
823 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
824 used to push FROM to the stack.
825
826 ALIGN is maximum stack alignment we can assume.
827
828 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
829 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
830 stpcpy. */
831
832 rtx
833 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
834 unsigned int align, int endp)
835 {
836 struct move_by_pieces_d data;
837 machine_mode to_addr_mode;
838 machine_mode from_addr_mode = get_address_mode (from);
839 rtx to_addr, from_addr = XEXP (from, 0);
840 unsigned int max_size = MOVE_MAX_PIECES + 1;
841 enum insn_code icode;
842
843 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
844
845 data.offset = 0;
846 data.from_addr = from_addr;
847 if (to)
848 {
849 to_addr_mode = get_address_mode (to);
850 to_addr = XEXP (to, 0);
851 data.to = to;
852 data.autinc_to
853 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
854 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
855 data.reverse
856 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
857 }
858 else
859 {
860 to_addr_mode = VOIDmode;
861 to_addr = NULL_RTX;
862 data.to = NULL_RTX;
863 data.autinc_to = 1;
864 if (STACK_GROWS_DOWNWARD)
865 data.reverse = 1;
866 else
867 data.reverse = 0;
868 }
869 data.to_addr = to_addr;
870 data.from = from;
871 data.autinc_from
872 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
873 || GET_CODE (from_addr) == POST_INC
874 || GET_CODE (from_addr) == POST_DEC);
875
876 data.explicit_inc_from = 0;
877 data.explicit_inc_to = 0;
878 if (data.reverse) data.offset = len;
879 data.len = len;
880
881 /* If copying requires more than two move insns,
882 copy addresses to registers (to make displacements shorter)
883 and use post-increment if available. */
884 if (!(data.autinc_from && data.autinc_to)
885 && move_by_pieces_ninsns (len, align, max_size) > 2)
886 {
887 /* Find the mode of the largest move...
888 MODE might not be used depending on the definitions of the
889 USE_* macros below. */
890 machine_mode mode ATTRIBUTE_UNUSED
891 = widest_int_mode_for_size (max_size);
892
893 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
894 {
895 data.from_addr = copy_to_mode_reg (from_addr_mode,
896 plus_constant (from_addr_mode,
897 from_addr, len));
898 data.autinc_from = 1;
899 data.explicit_inc_from = -1;
900 }
901 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
902 {
903 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
904 data.autinc_from = 1;
905 data.explicit_inc_from = 1;
906 }
907 if (!data.autinc_from && CONSTANT_P (from_addr))
908 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
909 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
910 {
911 data.to_addr = copy_to_mode_reg (to_addr_mode,
912 plus_constant (to_addr_mode,
913 to_addr, len));
914 data.autinc_to = 1;
915 data.explicit_inc_to = -1;
916 }
917 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
918 {
919 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
920 data.autinc_to = 1;
921 data.explicit_inc_to = 1;
922 }
923 if (!data.autinc_to && CONSTANT_P (to_addr))
924 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
925 }
926
927 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
928
929 /* First move what we can in the largest integer mode, then go to
930 successively smaller modes. */
931
932 while (max_size > 1 && data.len > 0)
933 {
934 machine_mode mode = widest_int_mode_for_size (max_size);
935
936 if (mode == VOIDmode)
937 break;
938
939 icode = optab_handler (mov_optab, mode);
940 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
941 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
942
943 max_size = GET_MODE_SIZE (mode);
944 }
945
946 /* The code above should have handled everything. */
947 gcc_assert (!data.len);
948
949 if (endp)
950 {
951 rtx to1;
952
953 gcc_assert (!data.reverse);
954 if (data.autinc_to)
955 {
956 if (endp == 2)
957 {
958 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
959 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
960 else
961 data.to_addr = copy_to_mode_reg (to_addr_mode,
962 plus_constant (to_addr_mode,
963 data.to_addr,
964 -1));
965 }
966 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
967 data.offset);
968 }
969 else
970 {
971 if (endp == 2)
972 --data.offset;
973 to1 = adjust_address (data.to, QImode, data.offset);
974 }
975 return to1;
976 }
977 else
978 return data.to;
979 }
980
981 /* Return number of insns required to move L bytes by pieces.
982 ALIGN (in bits) is maximum alignment we can assume. */
983
984 unsigned HOST_WIDE_INT
985 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
986 unsigned int max_size)
987 {
988 unsigned HOST_WIDE_INT n_insns = 0;
989
990 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
991
992 while (max_size > 1 && l > 0)
993 {
994 machine_mode mode;
995 enum insn_code icode;
996
997 mode = widest_int_mode_for_size (max_size);
998
999 if (mode == VOIDmode)
1000 break;
1001
1002 icode = optab_handler (mov_optab, mode);
1003 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1004 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1005
1006 max_size = GET_MODE_SIZE (mode);
1007 }
1008
1009 gcc_assert (!l);
1010 return n_insns;
1011 }
1012
1013 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1014 with move instructions for mode MODE. GENFUN is the gen_... function
1015 to make a move insn for that mode. DATA has all the other info. */
1016
1017 static void
1018 move_by_pieces_1 (insn_gen_fn genfun, machine_mode mode,
1019 struct move_by_pieces_d *data)
1020 {
1021 unsigned int size = GET_MODE_SIZE (mode);
1022 rtx to1 = NULL_RTX, from1;
1023
1024 while (data->len >= size)
1025 {
1026 if (data->reverse)
1027 data->offset -= size;
1028
1029 if (data->to)
1030 {
1031 if (data->autinc_to)
1032 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1033 data->offset);
1034 else
1035 to1 = adjust_address (data->to, mode, data->offset);
1036 }
1037
1038 if (data->autinc_from)
1039 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1040 data->offset);
1041 else
1042 from1 = adjust_address (data->from, mode, data->offset);
1043
1044 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1045 emit_insn (gen_add2_insn (data->to_addr,
1046 gen_int_mode (-(HOST_WIDE_INT) size,
1047 GET_MODE (data->to_addr))));
1048 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1049 emit_insn (gen_add2_insn (data->from_addr,
1050 gen_int_mode (-(HOST_WIDE_INT) size,
1051 GET_MODE (data->from_addr))));
1052
1053 if (data->to)
1054 emit_insn ((*genfun) (to1, from1));
1055 else
1056 {
1057 #ifdef PUSH_ROUNDING
1058 emit_single_push_insn (mode, from1, NULL);
1059 #else
1060 gcc_unreachable ();
1061 #endif
1062 }
1063
1064 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1065 emit_insn (gen_add2_insn (data->to_addr,
1066 gen_int_mode (size,
1067 GET_MODE (data->to_addr))));
1068 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1069 emit_insn (gen_add2_insn (data->from_addr,
1070 gen_int_mode (size,
1071 GET_MODE (data->from_addr))));
1072
1073 if (! data->reverse)
1074 data->offset += size;
1075
1076 data->len -= size;
1077 }
1078 }
1079 \f
1080 /* Emit code to move a block Y to a block X. This may be done with
1081 string-move instructions, with multiple scalar move instructions,
1082 or with a library call.
1083
1084 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1085 SIZE is an rtx that says how long they are.
1086 ALIGN is the maximum alignment we can assume they have.
1087 METHOD describes what kind of copy this is, and what mechanisms may be used.
1088 MIN_SIZE is the minimal size of block to move
1089 MAX_SIZE is the maximal size of block to move, if it can not be represented
1090 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1091
1092 Return the address of the new block, if memcpy is called and returns it,
1093 0 otherwise. */
1094
1095 rtx
1096 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1097 unsigned int expected_align, HOST_WIDE_INT expected_size,
1098 unsigned HOST_WIDE_INT min_size,
1099 unsigned HOST_WIDE_INT max_size,
1100 unsigned HOST_WIDE_INT probable_max_size)
1101 {
1102 bool may_use_call;
1103 rtx retval = 0;
1104 unsigned int align;
1105
1106 gcc_assert (size);
1107 if (CONST_INT_P (size)
1108 && INTVAL (size) == 0)
1109 return 0;
1110
1111 switch (method)
1112 {
1113 case BLOCK_OP_NORMAL:
1114 case BLOCK_OP_TAILCALL:
1115 may_use_call = true;
1116 break;
1117
1118 case BLOCK_OP_CALL_PARM:
1119 may_use_call = block_move_libcall_safe_for_call_parm ();
1120
1121 /* Make inhibit_defer_pop nonzero around the library call
1122 to force it to pop the arguments right away. */
1123 NO_DEFER_POP;
1124 break;
1125
1126 case BLOCK_OP_NO_LIBCALL:
1127 may_use_call = false;
1128 break;
1129
1130 default:
1131 gcc_unreachable ();
1132 }
1133
1134 gcc_assert (MEM_P (x) && MEM_P (y));
1135 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1136 gcc_assert (align >= BITS_PER_UNIT);
1137
1138 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1139 block copy is more efficient for other large modes, e.g. DCmode. */
1140 x = adjust_address (x, BLKmode, 0);
1141 y = adjust_address (y, BLKmode, 0);
1142
1143 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1144 can be incorrect is coming from __builtin_memcpy. */
1145 if (CONST_INT_P (size))
1146 {
1147 x = shallow_copy_rtx (x);
1148 y = shallow_copy_rtx (y);
1149 set_mem_size (x, INTVAL (size));
1150 set_mem_size (y, INTVAL (size));
1151 }
1152
1153 if (CONST_INT_P (size) && can_move_by_pieces (INTVAL (size), align))
1154 move_by_pieces (x, y, INTVAL (size), align, 0);
1155 else if (emit_block_move_via_movmem (x, y, size, align,
1156 expected_align, expected_size,
1157 min_size, max_size, probable_max_size))
1158 ;
1159 else if (may_use_call
1160 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1161 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1162 {
1163 /* Since x and y are passed to a libcall, mark the corresponding
1164 tree EXPR as addressable. */
1165 tree y_expr = MEM_EXPR (y);
1166 tree x_expr = MEM_EXPR (x);
1167 if (y_expr)
1168 mark_addressable (y_expr);
1169 if (x_expr)
1170 mark_addressable (x_expr);
1171 retval = emit_block_move_via_libcall (x, y, size,
1172 method == BLOCK_OP_TAILCALL);
1173 }
1174
1175 else
1176 emit_block_move_via_loop (x, y, size, align);
1177
1178 if (method == BLOCK_OP_CALL_PARM)
1179 OK_DEFER_POP;
1180
1181 return retval;
1182 }
1183
1184 rtx
1185 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1186 {
1187 unsigned HOST_WIDE_INT max, min = 0;
1188 if (GET_CODE (size) == CONST_INT)
1189 min = max = UINTVAL (size);
1190 else
1191 max = GET_MODE_MASK (GET_MODE (size));
1192 return emit_block_move_hints (x, y, size, method, 0, -1,
1193 min, max, max);
1194 }
1195
1196 /* A subroutine of emit_block_move. Returns true if calling the
1197 block move libcall will not clobber any parameters which may have
1198 already been placed on the stack. */
1199
1200 static bool
1201 block_move_libcall_safe_for_call_parm (void)
1202 {
1203 #if defined (REG_PARM_STACK_SPACE)
1204 tree fn;
1205 #endif
1206
1207 /* If arguments are pushed on the stack, then they're safe. */
1208 if (PUSH_ARGS)
1209 return true;
1210
1211 /* If registers go on the stack anyway, any argument is sure to clobber
1212 an outgoing argument. */
1213 #if defined (REG_PARM_STACK_SPACE)
1214 fn = emit_block_move_libcall_fn (false);
1215 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1216 depend on its argument. */
1217 (void) fn;
1218 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1219 && REG_PARM_STACK_SPACE (fn) != 0)
1220 return false;
1221 #endif
1222
1223 /* If any argument goes in memory, then it might clobber an outgoing
1224 argument. */
1225 {
1226 CUMULATIVE_ARGS args_so_far_v;
1227 cumulative_args_t args_so_far;
1228 tree fn, arg;
1229
1230 fn = emit_block_move_libcall_fn (false);
1231 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1232 args_so_far = pack_cumulative_args (&args_so_far_v);
1233
1234 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1235 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1236 {
1237 machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1238 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1239 NULL_TREE, true);
1240 if (!tmp || !REG_P (tmp))
1241 return false;
1242 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1243 return false;
1244 targetm.calls.function_arg_advance (args_so_far, mode,
1245 NULL_TREE, true);
1246 }
1247 }
1248 return true;
1249 }
1250
1251 /* A subroutine of emit_block_move. Expand a movmem pattern;
1252 return true if successful. */
1253
1254 static bool
1255 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1256 unsigned int expected_align, HOST_WIDE_INT expected_size,
1257 unsigned HOST_WIDE_INT min_size,
1258 unsigned HOST_WIDE_INT max_size,
1259 unsigned HOST_WIDE_INT probable_max_size)
1260 {
1261 int save_volatile_ok = volatile_ok;
1262 machine_mode mode;
1263
1264 if (expected_align < align)
1265 expected_align = align;
1266 if (expected_size != -1)
1267 {
1268 if ((unsigned HOST_WIDE_INT)expected_size > probable_max_size)
1269 expected_size = probable_max_size;
1270 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
1271 expected_size = min_size;
1272 }
1273
1274 /* Since this is a move insn, we don't care about volatility. */
1275 volatile_ok = 1;
1276
1277 /* Try the most limited insn first, because there's no point
1278 including more than one in the machine description unless
1279 the more limited one has some advantage. */
1280
1281 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1282 mode = GET_MODE_WIDER_MODE (mode))
1283 {
1284 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1285
1286 if (code != CODE_FOR_nothing
1287 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1288 here because if SIZE is less than the mode mask, as it is
1289 returned by the macro, it will definitely be less than the
1290 actual mode mask. Since SIZE is within the Pmode address
1291 space, we limit MODE to Pmode. */
1292 && ((CONST_INT_P (size)
1293 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1294 <= (GET_MODE_MASK (mode) >> 1)))
1295 || max_size <= (GET_MODE_MASK (mode) >> 1)
1296 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
1297 {
1298 struct expand_operand ops[9];
1299 unsigned int nops;
1300
1301 /* ??? When called via emit_block_move_for_call, it'd be
1302 nice if there were some way to inform the backend, so
1303 that it doesn't fail the expansion because it thinks
1304 emitting the libcall would be more efficient. */
1305 nops = insn_data[(int) code].n_generator_args;
1306 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
1307
1308 create_fixed_operand (&ops[0], x);
1309 create_fixed_operand (&ops[1], y);
1310 /* The check above guarantees that this size conversion is valid. */
1311 create_convert_operand_to (&ops[2], size, mode, true);
1312 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1313 if (nops >= 6)
1314 {
1315 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1316 create_integer_operand (&ops[5], expected_size);
1317 }
1318 if (nops >= 8)
1319 {
1320 create_integer_operand (&ops[6], min_size);
1321 /* If we can not represent the maximal size,
1322 make parameter NULL. */
1323 if ((HOST_WIDE_INT) max_size != -1)
1324 create_integer_operand (&ops[7], max_size);
1325 else
1326 create_fixed_operand (&ops[7], NULL);
1327 }
1328 if (nops == 9)
1329 {
1330 /* If we can not represent the maximal size,
1331 make parameter NULL. */
1332 if ((HOST_WIDE_INT) probable_max_size != -1)
1333 create_integer_operand (&ops[8], probable_max_size);
1334 else
1335 create_fixed_operand (&ops[8], NULL);
1336 }
1337 if (maybe_expand_insn (code, nops, ops))
1338 {
1339 volatile_ok = save_volatile_ok;
1340 return true;
1341 }
1342 }
1343 }
1344
1345 volatile_ok = save_volatile_ok;
1346 return false;
1347 }
1348
1349 /* A subroutine of emit_block_move. Expand a call to memcpy.
1350 Return the return value from memcpy, 0 otherwise. */
1351
1352 rtx
1353 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1354 {
1355 rtx dst_addr, src_addr;
1356 tree call_expr, fn, src_tree, dst_tree, size_tree;
1357 machine_mode size_mode;
1358 rtx retval;
1359
1360 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1361 pseudos. We can then place those new pseudos into a VAR_DECL and
1362 use them later. */
1363
1364 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1365 src_addr = copy_addr_to_reg (XEXP (src, 0));
1366
1367 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1368 src_addr = convert_memory_address (ptr_mode, src_addr);
1369
1370 dst_tree = make_tree (ptr_type_node, dst_addr);
1371 src_tree = make_tree (ptr_type_node, src_addr);
1372
1373 size_mode = TYPE_MODE (sizetype);
1374
1375 size = convert_to_mode (size_mode, size, 1);
1376 size = copy_to_mode_reg (size_mode, size);
1377
1378 /* It is incorrect to use the libcall calling conventions to call
1379 memcpy in this context. This could be a user call to memcpy and
1380 the user may wish to examine the return value from memcpy. For
1381 targets where libcalls and normal calls have different conventions
1382 for returning pointers, we could end up generating incorrect code. */
1383
1384 size_tree = make_tree (sizetype, size);
1385
1386 fn = emit_block_move_libcall_fn (true);
1387 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1388 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1389
1390 retval = expand_normal (call_expr);
1391
1392 return retval;
1393 }
1394
1395 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1396 for the function we use for block copies. */
1397
1398 static GTY(()) tree block_move_fn;
1399
1400 void
1401 init_block_move_fn (const char *asmspec)
1402 {
1403 if (!block_move_fn)
1404 {
1405 tree args, fn, attrs, attr_args;
1406
1407 fn = get_identifier ("memcpy");
1408 args = build_function_type_list (ptr_type_node, ptr_type_node,
1409 const_ptr_type_node, sizetype,
1410 NULL_TREE);
1411
1412 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1413 DECL_EXTERNAL (fn) = 1;
1414 TREE_PUBLIC (fn) = 1;
1415 DECL_ARTIFICIAL (fn) = 1;
1416 TREE_NOTHROW (fn) = 1;
1417 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1418 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1419
1420 attr_args = build_tree_list (NULL_TREE, build_string (1, "1"));
1421 attrs = tree_cons (get_identifier ("fn spec"), attr_args, NULL);
1422
1423 decl_attributes (&fn, attrs, ATTR_FLAG_BUILT_IN);
1424
1425 block_move_fn = fn;
1426 }
1427
1428 if (asmspec)
1429 set_user_assembler_name (block_move_fn, asmspec);
1430 }
1431
1432 static tree
1433 emit_block_move_libcall_fn (int for_call)
1434 {
1435 static bool emitted_extern;
1436
1437 if (!block_move_fn)
1438 init_block_move_fn (NULL);
1439
1440 if (for_call && !emitted_extern)
1441 {
1442 emitted_extern = true;
1443 make_decl_rtl (block_move_fn);
1444 }
1445
1446 return block_move_fn;
1447 }
1448
1449 /* A subroutine of emit_block_move. Copy the data via an explicit
1450 loop. This is used only when libcalls are forbidden. */
1451 /* ??? It'd be nice to copy in hunks larger than QImode. */
1452
1453 static void
1454 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1455 unsigned int align ATTRIBUTE_UNUSED)
1456 {
1457 rtx_code_label *cmp_label, *top_label;
1458 rtx iter, x_addr, y_addr, tmp;
1459 machine_mode x_addr_mode = get_address_mode (x);
1460 machine_mode y_addr_mode = get_address_mode (y);
1461 machine_mode iter_mode;
1462
1463 iter_mode = GET_MODE (size);
1464 if (iter_mode == VOIDmode)
1465 iter_mode = word_mode;
1466
1467 top_label = gen_label_rtx ();
1468 cmp_label = gen_label_rtx ();
1469 iter = gen_reg_rtx (iter_mode);
1470
1471 emit_move_insn (iter, const0_rtx);
1472
1473 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1474 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1475 do_pending_stack_adjust ();
1476
1477 emit_jump (cmp_label);
1478 emit_label (top_label);
1479
1480 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1481 x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp);
1482
1483 if (x_addr_mode != y_addr_mode)
1484 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1485 y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp);
1486
1487 x = change_address (x, QImode, x_addr);
1488 y = change_address (y, QImode, y_addr);
1489
1490 emit_move_insn (x, y);
1491
1492 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1493 true, OPTAB_LIB_WIDEN);
1494 if (tmp != iter)
1495 emit_move_insn (iter, tmp);
1496
1497 emit_label (cmp_label);
1498
1499 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1500 true, top_label, REG_BR_PROB_BASE * 90 / 100);
1501 }
1502 \f
1503 /* Copy all or part of a value X into registers starting at REGNO.
1504 The number of registers to be filled is NREGS. */
1505
1506 void
1507 move_block_to_reg (int regno, rtx x, int nregs, machine_mode mode)
1508 {
1509 int i;
1510 rtx pat;
1511 rtx_insn *last;
1512
1513 if (nregs == 0)
1514 return;
1515
1516 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1517 x = validize_mem (force_const_mem (mode, x));
1518
1519 /* See if the machine can do this with a load multiple insn. */
1520 if (HAVE_load_multiple)
1521 {
1522 last = get_last_insn ();
1523 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1524 GEN_INT (nregs));
1525 if (pat)
1526 {
1527 emit_insn (pat);
1528 return;
1529 }
1530 else
1531 delete_insns_since (last);
1532 }
1533
1534 for (i = 0; i < nregs; i++)
1535 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1536 operand_subword_force (x, i, mode));
1537 }
1538
1539 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1540 The number of registers to be filled is NREGS. */
1541
1542 void
1543 move_block_from_reg (int regno, rtx x, int nregs)
1544 {
1545 int i;
1546
1547 if (nregs == 0)
1548 return;
1549
1550 /* See if the machine can do this with a store multiple insn. */
1551 if (HAVE_store_multiple)
1552 {
1553 rtx_insn *last = get_last_insn ();
1554 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1555 GEN_INT (nregs));
1556 if (pat)
1557 {
1558 emit_insn (pat);
1559 return;
1560 }
1561 else
1562 delete_insns_since (last);
1563 }
1564
1565 for (i = 0; i < nregs; i++)
1566 {
1567 rtx tem = operand_subword (x, i, 1, BLKmode);
1568
1569 gcc_assert (tem);
1570
1571 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1572 }
1573 }
1574
1575 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1576 ORIG, where ORIG is a non-consecutive group of registers represented by
1577 a PARALLEL. The clone is identical to the original except in that the
1578 original set of registers is replaced by a new set of pseudo registers.
1579 The new set has the same modes as the original set. */
1580
1581 rtx
1582 gen_group_rtx (rtx orig)
1583 {
1584 int i, length;
1585 rtx *tmps;
1586
1587 gcc_assert (GET_CODE (orig) == PARALLEL);
1588
1589 length = XVECLEN (orig, 0);
1590 tmps = XALLOCAVEC (rtx, length);
1591
1592 /* Skip a NULL entry in first slot. */
1593 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1594
1595 if (i)
1596 tmps[0] = 0;
1597
1598 for (; i < length; i++)
1599 {
1600 machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1601 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1602
1603 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1604 }
1605
1606 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1607 }
1608
1609 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1610 except that values are placed in TMPS[i], and must later be moved
1611 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1612
1613 static void
1614 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1615 {
1616 rtx src;
1617 int start, i;
1618 machine_mode m = GET_MODE (orig_src);
1619
1620 gcc_assert (GET_CODE (dst) == PARALLEL);
1621
1622 if (m != VOIDmode
1623 && !SCALAR_INT_MODE_P (m)
1624 && !MEM_P (orig_src)
1625 && GET_CODE (orig_src) != CONCAT)
1626 {
1627 machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1628 if (imode == BLKmode)
1629 src = assign_stack_temp (GET_MODE (orig_src), ssize);
1630 else
1631 src = gen_reg_rtx (imode);
1632 if (imode != BLKmode)
1633 src = gen_lowpart (GET_MODE (orig_src), src);
1634 emit_move_insn (src, orig_src);
1635 /* ...and back again. */
1636 if (imode != BLKmode)
1637 src = gen_lowpart (imode, src);
1638 emit_group_load_1 (tmps, dst, src, type, ssize);
1639 return;
1640 }
1641
1642 /* Check for a NULL entry, used to indicate that the parameter goes
1643 both on the stack and in registers. */
1644 if (XEXP (XVECEXP (dst, 0, 0), 0))
1645 start = 0;
1646 else
1647 start = 1;
1648
1649 /* Process the pieces. */
1650 for (i = start; i < XVECLEN (dst, 0); i++)
1651 {
1652 machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1653 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1654 unsigned int bytelen = GET_MODE_SIZE (mode);
1655 int shift = 0;
1656
1657 /* Handle trailing fragments that run over the size of the struct. */
1658 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1659 {
1660 /* Arrange to shift the fragment to where it belongs.
1661 extract_bit_field loads to the lsb of the reg. */
1662 if (
1663 #ifdef BLOCK_REG_PADDING
1664 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1665 == (BYTES_BIG_ENDIAN ? upward : downward)
1666 #else
1667 BYTES_BIG_ENDIAN
1668 #endif
1669 )
1670 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1671 bytelen = ssize - bytepos;
1672 gcc_assert (bytelen > 0);
1673 }
1674
1675 /* If we won't be loading directly from memory, protect the real source
1676 from strange tricks we might play; but make sure that the source can
1677 be loaded directly into the destination. */
1678 src = orig_src;
1679 if (!MEM_P (orig_src)
1680 && (!CONSTANT_P (orig_src)
1681 || (GET_MODE (orig_src) != mode
1682 && GET_MODE (orig_src) != VOIDmode)))
1683 {
1684 if (GET_MODE (orig_src) == VOIDmode)
1685 src = gen_reg_rtx (mode);
1686 else
1687 src = gen_reg_rtx (GET_MODE (orig_src));
1688
1689 emit_move_insn (src, orig_src);
1690 }
1691
1692 /* Optimize the access just a bit. */
1693 if (MEM_P (src)
1694 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1695 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1696 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1697 && bytelen == GET_MODE_SIZE (mode))
1698 {
1699 tmps[i] = gen_reg_rtx (mode);
1700 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1701 }
1702 else if (COMPLEX_MODE_P (mode)
1703 && GET_MODE (src) == mode
1704 && bytelen == GET_MODE_SIZE (mode))
1705 /* Let emit_move_complex do the bulk of the work. */
1706 tmps[i] = src;
1707 else if (GET_CODE (src) == CONCAT)
1708 {
1709 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1710 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1711
1712 if ((bytepos == 0 && bytelen == slen0)
1713 || (bytepos != 0 && bytepos + bytelen <= slen))
1714 {
1715 /* The following assumes that the concatenated objects all
1716 have the same size. In this case, a simple calculation
1717 can be used to determine the object and the bit field
1718 to be extracted. */
1719 tmps[i] = XEXP (src, bytepos / slen0);
1720 if (! CONSTANT_P (tmps[i])
1721 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1722 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1723 (bytepos % slen0) * BITS_PER_UNIT,
1724 1, NULL_RTX, mode, mode);
1725 }
1726 else
1727 {
1728 rtx mem;
1729
1730 gcc_assert (!bytepos);
1731 mem = assign_stack_temp (GET_MODE (src), slen);
1732 emit_move_insn (mem, src);
1733 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1734 0, 1, NULL_RTX, mode, mode);
1735 }
1736 }
1737 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1738 SIMD register, which is currently broken. While we get GCC
1739 to emit proper RTL for these cases, let's dump to memory. */
1740 else if (VECTOR_MODE_P (GET_MODE (dst))
1741 && REG_P (src))
1742 {
1743 int slen = GET_MODE_SIZE (GET_MODE (src));
1744 rtx mem;
1745
1746 mem = assign_stack_temp (GET_MODE (src), slen);
1747 emit_move_insn (mem, src);
1748 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1749 }
1750 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1751 && XVECLEN (dst, 0) > 1)
1752 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE (dst), bytepos);
1753 else if (CONSTANT_P (src))
1754 {
1755 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1756
1757 if (len == ssize)
1758 tmps[i] = src;
1759 else
1760 {
1761 rtx first, second;
1762
1763 /* TODO: const_wide_int can have sizes other than this... */
1764 gcc_assert (2 * len == ssize);
1765 split_double (src, &first, &second);
1766 if (i)
1767 tmps[i] = second;
1768 else
1769 tmps[i] = first;
1770 }
1771 }
1772 else if (REG_P (src) && GET_MODE (src) == mode)
1773 tmps[i] = src;
1774 else
1775 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1776 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
1777 mode, mode);
1778
1779 if (shift)
1780 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1781 shift, tmps[i], 0);
1782 }
1783 }
1784
1785 /* Emit code to move a block SRC of type TYPE to a block DST,
1786 where DST is non-consecutive registers represented by a PARALLEL.
1787 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1788 if not known. */
1789
1790 void
1791 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1792 {
1793 rtx *tmps;
1794 int i;
1795
1796 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1797 emit_group_load_1 (tmps, dst, src, type, ssize);
1798
1799 /* Copy the extracted pieces into the proper (probable) hard regs. */
1800 for (i = 0; i < XVECLEN (dst, 0); i++)
1801 {
1802 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1803 if (d == NULL)
1804 continue;
1805 emit_move_insn (d, tmps[i]);
1806 }
1807 }
1808
1809 /* Similar, but load SRC into new pseudos in a format that looks like
1810 PARALLEL. This can later be fed to emit_group_move to get things
1811 in the right place. */
1812
1813 rtx
1814 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1815 {
1816 rtvec vec;
1817 int i;
1818
1819 vec = rtvec_alloc (XVECLEN (parallel, 0));
1820 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1821
1822 /* Convert the vector to look just like the original PARALLEL, except
1823 with the computed values. */
1824 for (i = 0; i < XVECLEN (parallel, 0); i++)
1825 {
1826 rtx e = XVECEXP (parallel, 0, i);
1827 rtx d = XEXP (e, 0);
1828
1829 if (d)
1830 {
1831 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1832 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1833 }
1834 RTVEC_ELT (vec, i) = e;
1835 }
1836
1837 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1838 }
1839
1840 /* Emit code to move a block SRC to block DST, where SRC and DST are
1841 non-consecutive groups of registers, each represented by a PARALLEL. */
1842
1843 void
1844 emit_group_move (rtx dst, rtx src)
1845 {
1846 int i;
1847
1848 gcc_assert (GET_CODE (src) == PARALLEL
1849 && GET_CODE (dst) == PARALLEL
1850 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1851
1852 /* Skip first entry if NULL. */
1853 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1854 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1855 XEXP (XVECEXP (src, 0, i), 0));
1856 }
1857
1858 /* Move a group of registers represented by a PARALLEL into pseudos. */
1859
1860 rtx
1861 emit_group_move_into_temps (rtx src)
1862 {
1863 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1864 int i;
1865
1866 for (i = 0; i < XVECLEN (src, 0); i++)
1867 {
1868 rtx e = XVECEXP (src, 0, i);
1869 rtx d = XEXP (e, 0);
1870
1871 if (d)
1872 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1873 RTVEC_ELT (vec, i) = e;
1874 }
1875
1876 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1877 }
1878
1879 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1880 where SRC is non-consecutive registers represented by a PARALLEL.
1881 SSIZE represents the total size of block ORIG_DST, or -1 if not
1882 known. */
1883
1884 void
1885 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1886 {
1887 rtx *tmps, dst;
1888 int start, finish, i;
1889 machine_mode m = GET_MODE (orig_dst);
1890
1891 gcc_assert (GET_CODE (src) == PARALLEL);
1892
1893 if (!SCALAR_INT_MODE_P (m)
1894 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1895 {
1896 machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1897 if (imode == BLKmode)
1898 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
1899 else
1900 dst = gen_reg_rtx (imode);
1901 emit_group_store (dst, src, type, ssize);
1902 if (imode != BLKmode)
1903 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1904 emit_move_insn (orig_dst, dst);
1905 return;
1906 }
1907
1908 /* Check for a NULL entry, used to indicate that the parameter goes
1909 both on the stack and in registers. */
1910 if (XEXP (XVECEXP (src, 0, 0), 0))
1911 start = 0;
1912 else
1913 start = 1;
1914 finish = XVECLEN (src, 0);
1915
1916 tmps = XALLOCAVEC (rtx, finish);
1917
1918 /* Copy the (probable) hard regs into pseudos. */
1919 for (i = start; i < finish; i++)
1920 {
1921 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1922 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1923 {
1924 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1925 emit_move_insn (tmps[i], reg);
1926 }
1927 else
1928 tmps[i] = reg;
1929 }
1930
1931 /* If we won't be storing directly into memory, protect the real destination
1932 from strange tricks we might play. */
1933 dst = orig_dst;
1934 if (GET_CODE (dst) == PARALLEL)
1935 {
1936 rtx temp;
1937
1938 /* We can get a PARALLEL dst if there is a conditional expression in
1939 a return statement. In that case, the dst and src are the same,
1940 so no action is necessary. */
1941 if (rtx_equal_p (dst, src))
1942 return;
1943
1944 /* It is unclear if we can ever reach here, but we may as well handle
1945 it. Allocate a temporary, and split this into a store/load to/from
1946 the temporary. */
1947 temp = assign_stack_temp (GET_MODE (dst), ssize);
1948 emit_group_store (temp, src, type, ssize);
1949 emit_group_load (dst, temp, type, ssize);
1950 return;
1951 }
1952 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1953 {
1954 machine_mode outer = GET_MODE (dst);
1955 machine_mode inner;
1956 HOST_WIDE_INT bytepos;
1957 bool done = false;
1958 rtx temp;
1959
1960 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1961 dst = gen_reg_rtx (outer);
1962
1963 /* Make life a bit easier for combine. */
1964 /* If the first element of the vector is the low part
1965 of the destination mode, use a paradoxical subreg to
1966 initialize the destination. */
1967 if (start < finish)
1968 {
1969 inner = GET_MODE (tmps[start]);
1970 bytepos = subreg_lowpart_offset (inner, outer);
1971 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1972 {
1973 temp = simplify_gen_subreg (outer, tmps[start],
1974 inner, 0);
1975 if (temp)
1976 {
1977 emit_move_insn (dst, temp);
1978 done = true;
1979 start++;
1980 }
1981 }
1982 }
1983
1984 /* If the first element wasn't the low part, try the last. */
1985 if (!done
1986 && start < finish - 1)
1987 {
1988 inner = GET_MODE (tmps[finish - 1]);
1989 bytepos = subreg_lowpart_offset (inner, outer);
1990 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1991 {
1992 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1993 inner, 0);
1994 if (temp)
1995 {
1996 emit_move_insn (dst, temp);
1997 done = true;
1998 finish--;
1999 }
2000 }
2001 }
2002
2003 /* Otherwise, simply initialize the result to zero. */
2004 if (!done)
2005 emit_move_insn (dst, CONST0_RTX (outer));
2006 }
2007
2008 /* Process the pieces. */
2009 for (i = start; i < finish; i++)
2010 {
2011 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2012 machine_mode mode = GET_MODE (tmps[i]);
2013 unsigned int bytelen = GET_MODE_SIZE (mode);
2014 unsigned int adj_bytelen;
2015 rtx dest = dst;
2016
2017 /* Handle trailing fragments that run over the size of the struct. */
2018 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2019 adj_bytelen = ssize - bytepos;
2020 else
2021 adj_bytelen = bytelen;
2022
2023 if (GET_CODE (dst) == CONCAT)
2024 {
2025 if (bytepos + adj_bytelen
2026 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2027 dest = XEXP (dst, 0);
2028 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2029 {
2030 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2031 dest = XEXP (dst, 1);
2032 }
2033 else
2034 {
2035 machine_mode dest_mode = GET_MODE (dest);
2036 machine_mode tmp_mode = GET_MODE (tmps[i]);
2037
2038 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2039
2040 if (GET_MODE_ALIGNMENT (dest_mode)
2041 >= GET_MODE_ALIGNMENT (tmp_mode))
2042 {
2043 dest = assign_stack_temp (dest_mode,
2044 GET_MODE_SIZE (dest_mode));
2045 emit_move_insn (adjust_address (dest,
2046 tmp_mode,
2047 bytepos),
2048 tmps[i]);
2049 dst = dest;
2050 }
2051 else
2052 {
2053 dest = assign_stack_temp (tmp_mode,
2054 GET_MODE_SIZE (tmp_mode));
2055 emit_move_insn (dest, tmps[i]);
2056 dst = adjust_address (dest, dest_mode, bytepos);
2057 }
2058 break;
2059 }
2060 }
2061
2062 /* Handle trailing fragments that run over the size of the struct. */
2063 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2064 {
2065 /* store_bit_field always takes its value from the lsb.
2066 Move the fragment to the lsb if it's not already there. */
2067 if (
2068 #ifdef BLOCK_REG_PADDING
2069 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2070 == (BYTES_BIG_ENDIAN ? upward : downward)
2071 #else
2072 BYTES_BIG_ENDIAN
2073 #endif
2074 )
2075 {
2076 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2077 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2078 shift, tmps[i], 0);
2079 }
2080
2081 /* Make sure not to write past the end of the struct. */
2082 store_bit_field (dest,
2083 adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2084 bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1,
2085 VOIDmode, tmps[i]);
2086 }
2087
2088 /* Optimize the access just a bit. */
2089 else if (MEM_P (dest)
2090 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2091 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2092 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2093 && bytelen == GET_MODE_SIZE (mode))
2094 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2095
2096 else
2097 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2098 0, 0, mode, tmps[i]);
2099 }
2100
2101 /* Copy from the pseudo into the (probable) hard reg. */
2102 if (orig_dst != dst)
2103 emit_move_insn (orig_dst, dst);
2104 }
2105
2106 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2107 of the value stored in X. */
2108
2109 rtx
2110 maybe_emit_group_store (rtx x, tree type)
2111 {
2112 machine_mode mode = TYPE_MODE (type);
2113 gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode);
2114 if (GET_CODE (x) == PARALLEL)
2115 {
2116 rtx result = gen_reg_rtx (mode);
2117 emit_group_store (result, x, type, int_size_in_bytes (type));
2118 return result;
2119 }
2120 return x;
2121 }
2122
2123 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2124
2125 This is used on targets that return BLKmode values in registers. */
2126
2127 void
2128 copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
2129 {
2130 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2131 rtx src = NULL, dst = NULL;
2132 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2133 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2134 machine_mode mode = GET_MODE (srcreg);
2135 machine_mode tmode = GET_MODE (target);
2136 machine_mode copy_mode;
2137
2138 /* BLKmode registers created in the back-end shouldn't have survived. */
2139 gcc_assert (mode != BLKmode);
2140
2141 /* If the structure doesn't take up a whole number of words, see whether
2142 SRCREG is padded on the left or on the right. If it's on the left,
2143 set PADDING_CORRECTION to the number of bits to skip.
2144
2145 In most ABIs, the structure will be returned at the least end of
2146 the register, which translates to right padding on little-endian
2147 targets and left padding on big-endian targets. The opposite
2148 holds if the structure is returned at the most significant
2149 end of the register. */
2150 if (bytes % UNITS_PER_WORD != 0
2151 && (targetm.calls.return_in_msb (type)
2152 ? !BYTES_BIG_ENDIAN
2153 : BYTES_BIG_ENDIAN))
2154 padding_correction
2155 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2156
2157 /* We can use a single move if we have an exact mode for the size. */
2158 else if (MEM_P (target)
2159 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target))
2160 || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode))
2161 && bytes == GET_MODE_SIZE (mode))
2162 {
2163 emit_move_insn (adjust_address (target, mode, 0), srcreg);
2164 return;
2165 }
2166
2167 /* And if we additionally have the same mode for a register. */
2168 else if (REG_P (target)
2169 && GET_MODE (target) == mode
2170 && bytes == GET_MODE_SIZE (mode))
2171 {
2172 emit_move_insn (target, srcreg);
2173 return;
2174 }
2175
2176 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2177 into a new pseudo which is a full word. */
2178 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
2179 {
2180 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2181 mode = word_mode;
2182 }
2183
2184 /* Copy the structure BITSIZE bits at a time. If the target lives in
2185 memory, take care of not reading/writing past its end by selecting
2186 a copy mode suited to BITSIZE. This should always be possible given
2187 how it is computed.
2188
2189 If the target lives in register, make sure not to select a copy mode
2190 larger than the mode of the register.
2191
2192 We could probably emit more efficient code for machines which do not use
2193 strict alignment, but it doesn't seem worth the effort at the current
2194 time. */
2195
2196 copy_mode = word_mode;
2197 if (MEM_P (target))
2198 {
2199 machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2200 if (mem_mode != BLKmode)
2201 copy_mode = mem_mode;
2202 }
2203 else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2204 copy_mode = tmode;
2205
2206 for (bitpos = 0, xbitpos = padding_correction;
2207 bitpos < bytes * BITS_PER_UNIT;
2208 bitpos += bitsize, xbitpos += bitsize)
2209 {
2210 /* We need a new source operand each time xbitpos is on a
2211 word boundary and when xbitpos == padding_correction
2212 (the first time through). */
2213 if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction)
2214 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode);
2215
2216 /* We need a new destination operand each time bitpos is on
2217 a word boundary. */
2218 if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2219 dst = target;
2220 else if (bitpos % BITS_PER_WORD == 0)
2221 dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode);
2222
2223 /* Use xbitpos for the source extraction (right justified) and
2224 bitpos for the destination store (left justified). */
2225 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2226 extract_bit_field (src, bitsize,
2227 xbitpos % BITS_PER_WORD, 1,
2228 NULL_RTX, copy_mode, copy_mode));
2229 }
2230 }
2231
2232 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2233 register if it contains any data, otherwise return null.
2234
2235 This is used on targets that return BLKmode values in registers. */
2236
2237 rtx
2238 copy_blkmode_to_reg (machine_mode mode, tree src)
2239 {
2240 int i, n_regs;
2241 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2242 unsigned int bitsize;
2243 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2244 machine_mode dst_mode;
2245
2246 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2247
2248 x = expand_normal (src);
2249
2250 bytes = int_size_in_bytes (TREE_TYPE (src));
2251 if (bytes == 0)
2252 return NULL_RTX;
2253
2254 /* If the structure doesn't take up a whole number of words, see
2255 whether the register value should be padded on the left or on
2256 the right. Set PADDING_CORRECTION to the number of padding
2257 bits needed on the left side.
2258
2259 In most ABIs, the structure will be returned at the least end of
2260 the register, which translates to right padding on little-endian
2261 targets and left padding on big-endian targets. The opposite
2262 holds if the structure is returned at the most significant
2263 end of the register. */
2264 if (bytes % UNITS_PER_WORD != 0
2265 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2266 ? !BYTES_BIG_ENDIAN
2267 : BYTES_BIG_ENDIAN))
2268 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2269 * BITS_PER_UNIT));
2270
2271 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2272 dst_words = XALLOCAVEC (rtx, n_regs);
2273 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2274
2275 /* Copy the structure BITSIZE bits at a time. */
2276 for (bitpos = 0, xbitpos = padding_correction;
2277 bitpos < bytes * BITS_PER_UNIT;
2278 bitpos += bitsize, xbitpos += bitsize)
2279 {
2280 /* We need a new destination pseudo each time xbitpos is
2281 on a word boundary and when xbitpos == padding_correction
2282 (the first time through). */
2283 if (xbitpos % BITS_PER_WORD == 0
2284 || xbitpos == padding_correction)
2285 {
2286 /* Generate an appropriate register. */
2287 dst_word = gen_reg_rtx (word_mode);
2288 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2289
2290 /* Clear the destination before we move anything into it. */
2291 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2292 }
2293
2294 /* We need a new source operand each time bitpos is on a word
2295 boundary. */
2296 if (bitpos % BITS_PER_WORD == 0)
2297 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2298
2299 /* Use bitpos for the source extraction (left justified) and
2300 xbitpos for the destination store (right justified). */
2301 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2302 0, 0, word_mode,
2303 extract_bit_field (src_word, bitsize,
2304 bitpos % BITS_PER_WORD, 1,
2305 NULL_RTX, word_mode, word_mode));
2306 }
2307
2308 if (mode == BLKmode)
2309 {
2310 /* Find the smallest integer mode large enough to hold the
2311 entire structure. */
2312 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2313 mode != VOIDmode;
2314 mode = GET_MODE_WIDER_MODE (mode))
2315 /* Have we found a large enough mode? */
2316 if (GET_MODE_SIZE (mode) >= bytes)
2317 break;
2318
2319 /* A suitable mode should have been found. */
2320 gcc_assert (mode != VOIDmode);
2321 }
2322
2323 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2324 dst_mode = word_mode;
2325 else
2326 dst_mode = mode;
2327 dst = gen_reg_rtx (dst_mode);
2328
2329 for (i = 0; i < n_regs; i++)
2330 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2331
2332 if (mode != dst_mode)
2333 dst = gen_lowpart (mode, dst);
2334
2335 return dst;
2336 }
2337
2338 /* Add a USE expression for REG to the (possibly empty) list pointed
2339 to by CALL_FUSAGE. REG must denote a hard register. */
2340
2341 void
2342 use_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2343 {
2344 gcc_assert (REG_P (reg));
2345
2346 if (!HARD_REGISTER_P (reg))
2347 return;
2348
2349 *call_fusage
2350 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2351 }
2352
2353 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2354 to by CALL_FUSAGE. REG must denote a hard register. */
2355
2356 void
2357 clobber_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2358 {
2359 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2360
2361 *call_fusage
2362 = gen_rtx_EXPR_LIST (mode, gen_rtx_CLOBBER (VOIDmode, reg), *call_fusage);
2363 }
2364
2365 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2366 starting at REGNO. All of these registers must be hard registers. */
2367
2368 void
2369 use_regs (rtx *call_fusage, int regno, int nregs)
2370 {
2371 int i;
2372
2373 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2374
2375 for (i = 0; i < nregs; i++)
2376 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2377 }
2378
2379 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2380 PARALLEL REGS. This is for calls that pass values in multiple
2381 non-contiguous locations. The Irix 6 ABI has examples of this. */
2382
2383 void
2384 use_group_regs (rtx *call_fusage, rtx regs)
2385 {
2386 int i;
2387
2388 for (i = 0; i < XVECLEN (regs, 0); i++)
2389 {
2390 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2391
2392 /* A NULL entry means the parameter goes both on the stack and in
2393 registers. This can also be a MEM for targets that pass values
2394 partially on the stack and partially in registers. */
2395 if (reg != 0 && REG_P (reg))
2396 use_reg (call_fusage, reg);
2397 }
2398 }
2399
2400 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2401 assigment and the code of the expresion on the RHS is CODE. Return
2402 NULL otherwise. */
2403
2404 static gimple
2405 get_def_for_expr (tree name, enum tree_code code)
2406 {
2407 gimple def_stmt;
2408
2409 if (TREE_CODE (name) != SSA_NAME)
2410 return NULL;
2411
2412 def_stmt = get_gimple_for_ssa_name (name);
2413 if (!def_stmt
2414 || gimple_assign_rhs_code (def_stmt) != code)
2415 return NULL;
2416
2417 return def_stmt;
2418 }
2419
2420 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2421 assigment and the class of the expresion on the RHS is CLASS. Return
2422 NULL otherwise. */
2423
2424 static gimple
2425 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2426 {
2427 gimple def_stmt;
2428
2429 if (TREE_CODE (name) != SSA_NAME)
2430 return NULL;
2431
2432 def_stmt = get_gimple_for_ssa_name (name);
2433 if (!def_stmt
2434 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2435 return NULL;
2436
2437 return def_stmt;
2438 }
2439 \f
2440
2441 /* Determine whether the LEN bytes generated by CONSTFUN can be
2442 stored to memory using several move instructions. CONSTFUNDATA is
2443 a pointer which will be passed as argument in every CONSTFUN call.
2444 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2445 a memset operation and false if it's a copy of a constant string.
2446 Return nonzero if a call to store_by_pieces should succeed. */
2447
2448 int
2449 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2450 rtx (*constfun) (void *, HOST_WIDE_INT, machine_mode),
2451 void *constfundata, unsigned int align, bool memsetp)
2452 {
2453 unsigned HOST_WIDE_INT l;
2454 unsigned int max_size;
2455 HOST_WIDE_INT offset = 0;
2456 machine_mode mode;
2457 enum insn_code icode;
2458 int reverse;
2459 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2460 rtx cst ATTRIBUTE_UNUSED;
2461
2462 if (len == 0)
2463 return 1;
2464
2465 if (!targetm.use_by_pieces_infrastructure_p (len, align,
2466 memsetp
2467 ? SET_BY_PIECES
2468 : STORE_BY_PIECES,
2469 optimize_insn_for_speed_p ()))
2470 return 0;
2471
2472 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2473
2474 /* We would first store what we can in the largest integer mode, then go to
2475 successively smaller modes. */
2476
2477 for (reverse = 0;
2478 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2479 reverse++)
2480 {
2481 l = len;
2482 max_size = STORE_MAX_PIECES + 1;
2483 while (max_size > 1 && l > 0)
2484 {
2485 mode = widest_int_mode_for_size (max_size);
2486
2487 if (mode == VOIDmode)
2488 break;
2489
2490 icode = optab_handler (mov_optab, mode);
2491 if (icode != CODE_FOR_nothing
2492 && align >= GET_MODE_ALIGNMENT (mode))
2493 {
2494 unsigned int size = GET_MODE_SIZE (mode);
2495
2496 while (l >= size)
2497 {
2498 if (reverse)
2499 offset -= size;
2500
2501 cst = (*constfun) (constfundata, offset, mode);
2502 if (!targetm.legitimate_constant_p (mode, cst))
2503 return 0;
2504
2505 if (!reverse)
2506 offset += size;
2507
2508 l -= size;
2509 }
2510 }
2511
2512 max_size = GET_MODE_SIZE (mode);
2513 }
2514
2515 /* The code above should have handled everything. */
2516 gcc_assert (!l);
2517 }
2518
2519 return 1;
2520 }
2521
2522 /* Generate several move instructions to store LEN bytes generated by
2523 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2524 pointer which will be passed as argument in every CONSTFUN call.
2525 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2526 a memset operation and false if it's a copy of a constant string.
2527 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2528 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2529 stpcpy. */
2530
2531 rtx
2532 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2533 rtx (*constfun) (void *, HOST_WIDE_INT, machine_mode),
2534 void *constfundata, unsigned int align, bool memsetp, int endp)
2535 {
2536 machine_mode to_addr_mode = get_address_mode (to);
2537 struct store_by_pieces_d data;
2538
2539 if (len == 0)
2540 {
2541 gcc_assert (endp != 2);
2542 return to;
2543 }
2544
2545 gcc_assert (targetm.use_by_pieces_infrastructure_p
2546 (len, align,
2547 memsetp
2548 ? SET_BY_PIECES
2549 : STORE_BY_PIECES,
2550 optimize_insn_for_speed_p ()));
2551
2552 data.constfun = constfun;
2553 data.constfundata = constfundata;
2554 data.len = len;
2555 data.to = to;
2556 store_by_pieces_1 (&data, align);
2557 if (endp)
2558 {
2559 rtx to1;
2560
2561 gcc_assert (!data.reverse);
2562 if (data.autinc_to)
2563 {
2564 if (endp == 2)
2565 {
2566 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2567 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2568 else
2569 data.to_addr = copy_to_mode_reg (to_addr_mode,
2570 plus_constant (to_addr_mode,
2571 data.to_addr,
2572 -1));
2573 }
2574 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2575 data.offset);
2576 }
2577 else
2578 {
2579 if (endp == 2)
2580 --data.offset;
2581 to1 = adjust_address (data.to, QImode, data.offset);
2582 }
2583 return to1;
2584 }
2585 else
2586 return data.to;
2587 }
2588
2589 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2590 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2591
2592 static void
2593 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2594 {
2595 struct store_by_pieces_d data;
2596
2597 if (len == 0)
2598 return;
2599
2600 data.constfun = clear_by_pieces_1;
2601 data.constfundata = NULL;
2602 data.len = len;
2603 data.to = to;
2604 store_by_pieces_1 (&data, align);
2605 }
2606
2607 /* Callback routine for clear_by_pieces.
2608 Return const0_rtx unconditionally. */
2609
2610 static rtx
2611 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2612 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2613 machine_mode mode ATTRIBUTE_UNUSED)
2614 {
2615 return const0_rtx;
2616 }
2617
2618 /* Subroutine of clear_by_pieces and store_by_pieces.
2619 Generate several move instructions to store LEN bytes of block TO. (A MEM
2620 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2621
2622 static void
2623 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2624 unsigned int align ATTRIBUTE_UNUSED)
2625 {
2626 machine_mode to_addr_mode = get_address_mode (data->to);
2627 rtx to_addr = XEXP (data->to, 0);
2628 unsigned int max_size = STORE_MAX_PIECES + 1;
2629 enum insn_code icode;
2630
2631 data->offset = 0;
2632 data->to_addr = to_addr;
2633 data->autinc_to
2634 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2635 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2636
2637 data->explicit_inc_to = 0;
2638 data->reverse
2639 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2640 if (data->reverse)
2641 data->offset = data->len;
2642
2643 /* If storing requires more than two move insns,
2644 copy addresses to registers (to make displacements shorter)
2645 and use post-increment if available. */
2646 if (!data->autinc_to
2647 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2648 {
2649 /* Determine the main mode we'll be using.
2650 MODE might not be used depending on the definitions of the
2651 USE_* macros below. */
2652 machine_mode mode ATTRIBUTE_UNUSED
2653 = widest_int_mode_for_size (max_size);
2654
2655 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2656 {
2657 data->to_addr = copy_to_mode_reg (to_addr_mode,
2658 plus_constant (to_addr_mode,
2659 to_addr,
2660 data->len));
2661 data->autinc_to = 1;
2662 data->explicit_inc_to = -1;
2663 }
2664
2665 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2666 && ! data->autinc_to)
2667 {
2668 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2669 data->autinc_to = 1;
2670 data->explicit_inc_to = 1;
2671 }
2672
2673 if ( !data->autinc_to && CONSTANT_P (to_addr))
2674 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2675 }
2676
2677 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2678
2679 /* First store what we can in the largest integer mode, then go to
2680 successively smaller modes. */
2681
2682 while (max_size > 1 && data->len > 0)
2683 {
2684 machine_mode mode = widest_int_mode_for_size (max_size);
2685
2686 if (mode == VOIDmode)
2687 break;
2688
2689 icode = optab_handler (mov_optab, mode);
2690 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2691 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2692
2693 max_size = GET_MODE_SIZE (mode);
2694 }
2695
2696 /* The code above should have handled everything. */
2697 gcc_assert (!data->len);
2698 }
2699
2700 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2701 with move instructions for mode MODE. GENFUN is the gen_... function
2702 to make a move insn for that mode. DATA has all the other info. */
2703
2704 static void
2705 store_by_pieces_2 (insn_gen_fn genfun, machine_mode mode,
2706 struct store_by_pieces_d *data)
2707 {
2708 unsigned int size = GET_MODE_SIZE (mode);
2709 rtx to1, cst;
2710
2711 while (data->len >= size)
2712 {
2713 if (data->reverse)
2714 data->offset -= size;
2715
2716 if (data->autinc_to)
2717 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2718 data->offset);
2719 else
2720 to1 = adjust_address (data->to, mode, data->offset);
2721
2722 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2723 emit_insn (gen_add2_insn (data->to_addr,
2724 gen_int_mode (-(HOST_WIDE_INT) size,
2725 GET_MODE (data->to_addr))));
2726
2727 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2728 emit_insn ((*genfun) (to1, cst));
2729
2730 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2731 emit_insn (gen_add2_insn (data->to_addr,
2732 gen_int_mode (size,
2733 GET_MODE (data->to_addr))));
2734
2735 if (! data->reverse)
2736 data->offset += size;
2737
2738 data->len -= size;
2739 }
2740 }
2741 \f
2742 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2743 its length in bytes. */
2744
2745 rtx
2746 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2747 unsigned int expected_align, HOST_WIDE_INT expected_size,
2748 unsigned HOST_WIDE_INT min_size,
2749 unsigned HOST_WIDE_INT max_size,
2750 unsigned HOST_WIDE_INT probable_max_size)
2751 {
2752 machine_mode mode = GET_MODE (object);
2753 unsigned int align;
2754
2755 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2756
2757 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2758 just move a zero. Otherwise, do this a piece at a time. */
2759 if (mode != BLKmode
2760 && CONST_INT_P (size)
2761 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2762 {
2763 rtx zero = CONST0_RTX (mode);
2764 if (zero != NULL)
2765 {
2766 emit_move_insn (object, zero);
2767 return NULL;
2768 }
2769
2770 if (COMPLEX_MODE_P (mode))
2771 {
2772 zero = CONST0_RTX (GET_MODE_INNER (mode));
2773 if (zero != NULL)
2774 {
2775 write_complex_part (object, zero, 0);
2776 write_complex_part (object, zero, 1);
2777 return NULL;
2778 }
2779 }
2780 }
2781
2782 if (size == const0_rtx)
2783 return NULL;
2784
2785 align = MEM_ALIGN (object);
2786
2787 if (CONST_INT_P (size)
2788 && targetm.use_by_pieces_infrastructure_p (INTVAL (size), align,
2789 CLEAR_BY_PIECES,
2790 optimize_insn_for_speed_p ()))
2791 clear_by_pieces (object, INTVAL (size), align);
2792 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2793 expected_align, expected_size,
2794 min_size, max_size, probable_max_size))
2795 ;
2796 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2797 return set_storage_via_libcall (object, size, const0_rtx,
2798 method == BLOCK_OP_TAILCALL);
2799 else
2800 gcc_unreachable ();
2801
2802 return NULL;
2803 }
2804
2805 rtx
2806 clear_storage (rtx object, rtx size, enum block_op_methods method)
2807 {
2808 unsigned HOST_WIDE_INT max, min = 0;
2809 if (GET_CODE (size) == CONST_INT)
2810 min = max = UINTVAL (size);
2811 else
2812 max = GET_MODE_MASK (GET_MODE (size));
2813 return clear_storage_hints (object, size, method, 0, -1, min, max, max);
2814 }
2815
2816
2817 /* A subroutine of clear_storage. Expand a call to memset.
2818 Return the return value of memset, 0 otherwise. */
2819
2820 rtx
2821 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2822 {
2823 tree call_expr, fn, object_tree, size_tree, val_tree;
2824 machine_mode size_mode;
2825 rtx retval;
2826
2827 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2828 place those into new pseudos into a VAR_DECL and use them later. */
2829
2830 object = copy_addr_to_reg (XEXP (object, 0));
2831
2832 size_mode = TYPE_MODE (sizetype);
2833 size = convert_to_mode (size_mode, size, 1);
2834 size = copy_to_mode_reg (size_mode, size);
2835
2836 /* It is incorrect to use the libcall calling conventions to call
2837 memset in this context. This could be a user call to memset and
2838 the user may wish to examine the return value from memset. For
2839 targets where libcalls and normal calls have different conventions
2840 for returning pointers, we could end up generating incorrect code. */
2841
2842 object_tree = make_tree (ptr_type_node, object);
2843 if (!CONST_INT_P (val))
2844 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2845 size_tree = make_tree (sizetype, size);
2846 val_tree = make_tree (integer_type_node, val);
2847
2848 fn = clear_storage_libcall_fn (true);
2849 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2850 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2851
2852 retval = expand_normal (call_expr);
2853
2854 return retval;
2855 }
2856
2857 /* A subroutine of set_storage_via_libcall. Create the tree node
2858 for the function we use for block clears. */
2859
2860 tree block_clear_fn;
2861
2862 void
2863 init_block_clear_fn (const char *asmspec)
2864 {
2865 if (!block_clear_fn)
2866 {
2867 tree fn, args;
2868
2869 fn = get_identifier ("memset");
2870 args = build_function_type_list (ptr_type_node, ptr_type_node,
2871 integer_type_node, sizetype,
2872 NULL_TREE);
2873
2874 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2875 DECL_EXTERNAL (fn) = 1;
2876 TREE_PUBLIC (fn) = 1;
2877 DECL_ARTIFICIAL (fn) = 1;
2878 TREE_NOTHROW (fn) = 1;
2879 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2880 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2881
2882 block_clear_fn = fn;
2883 }
2884
2885 if (asmspec)
2886 set_user_assembler_name (block_clear_fn, asmspec);
2887 }
2888
2889 static tree
2890 clear_storage_libcall_fn (int for_call)
2891 {
2892 static bool emitted_extern;
2893
2894 if (!block_clear_fn)
2895 init_block_clear_fn (NULL);
2896
2897 if (for_call && !emitted_extern)
2898 {
2899 emitted_extern = true;
2900 make_decl_rtl (block_clear_fn);
2901 }
2902
2903 return block_clear_fn;
2904 }
2905 \f
2906 /* Expand a setmem pattern; return true if successful. */
2907
2908 bool
2909 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2910 unsigned int expected_align, HOST_WIDE_INT expected_size,
2911 unsigned HOST_WIDE_INT min_size,
2912 unsigned HOST_WIDE_INT max_size,
2913 unsigned HOST_WIDE_INT probable_max_size)
2914 {
2915 /* Try the most limited insn first, because there's no point
2916 including more than one in the machine description unless
2917 the more limited one has some advantage. */
2918
2919 machine_mode mode;
2920
2921 if (expected_align < align)
2922 expected_align = align;
2923 if (expected_size != -1)
2924 {
2925 if ((unsigned HOST_WIDE_INT)expected_size > max_size)
2926 expected_size = max_size;
2927 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
2928 expected_size = min_size;
2929 }
2930
2931 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2932 mode = GET_MODE_WIDER_MODE (mode))
2933 {
2934 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2935
2936 if (code != CODE_FOR_nothing
2937 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
2938 here because if SIZE is less than the mode mask, as it is
2939 returned by the macro, it will definitely be less than the
2940 actual mode mask. Since SIZE is within the Pmode address
2941 space, we limit MODE to Pmode. */
2942 && ((CONST_INT_P (size)
2943 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2944 <= (GET_MODE_MASK (mode) >> 1)))
2945 || max_size <= (GET_MODE_MASK (mode) >> 1)
2946 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
2947 {
2948 struct expand_operand ops[9];
2949 unsigned int nops;
2950
2951 nops = insn_data[(int) code].n_generator_args;
2952 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
2953
2954 create_fixed_operand (&ops[0], object);
2955 /* The check above guarantees that this size conversion is valid. */
2956 create_convert_operand_to (&ops[1], size, mode, true);
2957 create_convert_operand_from (&ops[2], val, byte_mode, true);
2958 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2959 if (nops >= 6)
2960 {
2961 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2962 create_integer_operand (&ops[5], expected_size);
2963 }
2964 if (nops >= 8)
2965 {
2966 create_integer_operand (&ops[6], min_size);
2967 /* If we can not represent the maximal size,
2968 make parameter NULL. */
2969 if ((HOST_WIDE_INT) max_size != -1)
2970 create_integer_operand (&ops[7], max_size);
2971 else
2972 create_fixed_operand (&ops[7], NULL);
2973 }
2974 if (nops == 9)
2975 {
2976 /* If we can not represent the maximal size,
2977 make parameter NULL. */
2978 if ((HOST_WIDE_INT) probable_max_size != -1)
2979 create_integer_operand (&ops[8], probable_max_size);
2980 else
2981 create_fixed_operand (&ops[8], NULL);
2982 }
2983 if (maybe_expand_insn (code, nops, ops))
2984 return true;
2985 }
2986 }
2987
2988 return false;
2989 }
2990
2991 \f
2992 /* Write to one of the components of the complex value CPLX. Write VAL to
2993 the real part if IMAG_P is false, and the imaginary part if its true. */
2994
2995 void
2996 write_complex_part (rtx cplx, rtx val, bool imag_p)
2997 {
2998 machine_mode cmode;
2999 machine_mode imode;
3000 unsigned ibitsize;
3001
3002 if (GET_CODE (cplx) == CONCAT)
3003 {
3004 emit_move_insn (XEXP (cplx, imag_p), val);
3005 return;
3006 }
3007
3008 cmode = GET_MODE (cplx);
3009 imode = GET_MODE_INNER (cmode);
3010 ibitsize = GET_MODE_BITSIZE (imode);
3011
3012 /* For MEMs simplify_gen_subreg may generate an invalid new address
3013 because, e.g., the original address is considered mode-dependent
3014 by the target, which restricts simplify_subreg from invoking
3015 adjust_address_nv. Instead of preparing fallback support for an
3016 invalid address, we call adjust_address_nv directly. */
3017 if (MEM_P (cplx))
3018 {
3019 emit_move_insn (adjust_address_nv (cplx, imode,
3020 imag_p ? GET_MODE_SIZE (imode) : 0),
3021 val);
3022 return;
3023 }
3024
3025 /* If the sub-object is at least word sized, then we know that subregging
3026 will work. This special case is important, since store_bit_field
3027 wants to operate on integer modes, and there's rarely an OImode to
3028 correspond to TCmode. */
3029 if (ibitsize >= BITS_PER_WORD
3030 /* For hard regs we have exact predicates. Assume we can split
3031 the original object if it spans an even number of hard regs.
3032 This special case is important for SCmode on 64-bit platforms
3033 where the natural size of floating-point regs is 32-bit. */
3034 || (REG_P (cplx)
3035 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3036 && REG_NREGS (cplx) % 2 == 0))
3037 {
3038 rtx part = simplify_gen_subreg (imode, cplx, cmode,
3039 imag_p ? GET_MODE_SIZE (imode) : 0);
3040 if (part)
3041 {
3042 emit_move_insn (part, val);
3043 return;
3044 }
3045 else
3046 /* simplify_gen_subreg may fail for sub-word MEMs. */
3047 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3048 }
3049
3050 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
3051 }
3052
3053 /* Extract one of the components of the complex value CPLX. Extract the
3054 real part if IMAG_P is false, and the imaginary part if it's true. */
3055
3056 static rtx
3057 read_complex_part (rtx cplx, bool imag_p)
3058 {
3059 machine_mode cmode, imode;
3060 unsigned ibitsize;
3061
3062 if (GET_CODE (cplx) == CONCAT)
3063 return XEXP (cplx, imag_p);
3064
3065 cmode = GET_MODE (cplx);
3066 imode = GET_MODE_INNER (cmode);
3067 ibitsize = GET_MODE_BITSIZE (imode);
3068
3069 /* Special case reads from complex constants that got spilled to memory. */
3070 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
3071 {
3072 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
3073 if (decl && TREE_CODE (decl) == COMPLEX_CST)
3074 {
3075 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
3076 if (CONSTANT_CLASS_P (part))
3077 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
3078 }
3079 }
3080
3081 /* For MEMs simplify_gen_subreg may generate an invalid new address
3082 because, e.g., the original address is considered mode-dependent
3083 by the target, which restricts simplify_subreg from invoking
3084 adjust_address_nv. Instead of preparing fallback support for an
3085 invalid address, we call adjust_address_nv directly. */
3086 if (MEM_P (cplx))
3087 return adjust_address_nv (cplx, imode,
3088 imag_p ? GET_MODE_SIZE (imode) : 0);
3089
3090 /* If the sub-object is at least word sized, then we know that subregging
3091 will work. This special case is important, since extract_bit_field
3092 wants to operate on integer modes, and there's rarely an OImode to
3093 correspond to TCmode. */
3094 if (ibitsize >= BITS_PER_WORD
3095 /* For hard regs we have exact predicates. Assume we can split
3096 the original object if it spans an even number of hard regs.
3097 This special case is important for SCmode on 64-bit platforms
3098 where the natural size of floating-point regs is 32-bit. */
3099 || (REG_P (cplx)
3100 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3101 && REG_NREGS (cplx) % 2 == 0))
3102 {
3103 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
3104 imag_p ? GET_MODE_SIZE (imode) : 0);
3105 if (ret)
3106 return ret;
3107 else
3108 /* simplify_gen_subreg may fail for sub-word MEMs. */
3109 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3110 }
3111
3112 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
3113 true, NULL_RTX, imode, imode);
3114 }
3115 \f
3116 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3117 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3118 represented in NEW_MODE. If FORCE is true, this will never happen, as
3119 we'll force-create a SUBREG if needed. */
3120
3121 static rtx
3122 emit_move_change_mode (machine_mode new_mode,
3123 machine_mode old_mode, rtx x, bool force)
3124 {
3125 rtx ret;
3126
3127 if (push_operand (x, GET_MODE (x)))
3128 {
3129 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3130 MEM_COPY_ATTRIBUTES (ret, x);
3131 }
3132 else if (MEM_P (x))
3133 {
3134 /* We don't have to worry about changing the address since the
3135 size in bytes is supposed to be the same. */
3136 if (reload_in_progress)
3137 {
3138 /* Copy the MEM to change the mode and move any
3139 substitutions from the old MEM to the new one. */
3140 ret = adjust_address_nv (x, new_mode, 0);
3141 copy_replacements (x, ret);
3142 }
3143 else
3144 ret = adjust_address (x, new_mode, 0);
3145 }
3146 else
3147 {
3148 /* Note that we do want simplify_subreg's behavior of validating
3149 that the new mode is ok for a hard register. If we were to use
3150 simplify_gen_subreg, we would create the subreg, but would
3151 probably run into the target not being able to implement it. */
3152 /* Except, of course, when FORCE is true, when this is exactly what
3153 we want. Which is needed for CCmodes on some targets. */
3154 if (force)
3155 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3156 else
3157 ret = simplify_subreg (new_mode, x, old_mode, 0);
3158 }
3159
3160 return ret;
3161 }
3162
3163 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3164 an integer mode of the same size as MODE. Returns the instruction
3165 emitted, or NULL if such a move could not be generated. */
3166
3167 static rtx_insn *
3168 emit_move_via_integer (machine_mode mode, rtx x, rtx y, bool force)
3169 {
3170 machine_mode imode;
3171 enum insn_code code;
3172
3173 /* There must exist a mode of the exact size we require. */
3174 imode = int_mode_for_mode (mode);
3175 if (imode == BLKmode)
3176 return NULL;
3177
3178 /* The target must support moves in this mode. */
3179 code = optab_handler (mov_optab, imode);
3180 if (code == CODE_FOR_nothing)
3181 return NULL;
3182
3183 x = emit_move_change_mode (imode, mode, x, force);
3184 if (x == NULL_RTX)
3185 return NULL;
3186 y = emit_move_change_mode (imode, mode, y, force);
3187 if (y == NULL_RTX)
3188 return NULL;
3189 return emit_insn (GEN_FCN (code) (x, y));
3190 }
3191
3192 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3193 Return an equivalent MEM that does not use an auto-increment. */
3194
3195 rtx
3196 emit_move_resolve_push (machine_mode mode, rtx x)
3197 {
3198 enum rtx_code code = GET_CODE (XEXP (x, 0));
3199 HOST_WIDE_INT adjust;
3200 rtx temp;
3201
3202 adjust = GET_MODE_SIZE (mode);
3203 #ifdef PUSH_ROUNDING
3204 adjust = PUSH_ROUNDING (adjust);
3205 #endif
3206 if (code == PRE_DEC || code == POST_DEC)
3207 adjust = -adjust;
3208 else if (code == PRE_MODIFY || code == POST_MODIFY)
3209 {
3210 rtx expr = XEXP (XEXP (x, 0), 1);
3211 HOST_WIDE_INT val;
3212
3213 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3214 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3215 val = INTVAL (XEXP (expr, 1));
3216 if (GET_CODE (expr) == MINUS)
3217 val = -val;
3218 gcc_assert (adjust == val || adjust == -val);
3219 adjust = val;
3220 }
3221
3222 /* Do not use anti_adjust_stack, since we don't want to update
3223 stack_pointer_delta. */
3224 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3225 gen_int_mode (adjust, Pmode), stack_pointer_rtx,
3226 0, OPTAB_LIB_WIDEN);
3227 if (temp != stack_pointer_rtx)
3228 emit_move_insn (stack_pointer_rtx, temp);
3229
3230 switch (code)
3231 {
3232 case PRE_INC:
3233 case PRE_DEC:
3234 case PRE_MODIFY:
3235 temp = stack_pointer_rtx;
3236 break;
3237 case POST_INC:
3238 case POST_DEC:
3239 case POST_MODIFY:
3240 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3241 break;
3242 default:
3243 gcc_unreachable ();
3244 }
3245
3246 return replace_equiv_address (x, temp);
3247 }
3248
3249 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3250 X is known to satisfy push_operand, and MODE is known to be complex.
3251 Returns the last instruction emitted. */
3252
3253 rtx_insn *
3254 emit_move_complex_push (machine_mode mode, rtx x, rtx y)
3255 {
3256 machine_mode submode = GET_MODE_INNER (mode);
3257 bool imag_first;
3258
3259 #ifdef PUSH_ROUNDING
3260 unsigned int submodesize = GET_MODE_SIZE (submode);
3261
3262 /* In case we output to the stack, but the size is smaller than the
3263 machine can push exactly, we need to use move instructions. */
3264 if (PUSH_ROUNDING (submodesize) != submodesize)
3265 {
3266 x = emit_move_resolve_push (mode, x);
3267 return emit_move_insn (x, y);
3268 }
3269 #endif
3270
3271 /* Note that the real part always precedes the imag part in memory
3272 regardless of machine's endianness. */
3273 switch (GET_CODE (XEXP (x, 0)))
3274 {
3275 case PRE_DEC:
3276 case POST_DEC:
3277 imag_first = true;
3278 break;
3279 case PRE_INC:
3280 case POST_INC:
3281 imag_first = false;
3282 break;
3283 default:
3284 gcc_unreachable ();
3285 }
3286
3287 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3288 read_complex_part (y, imag_first));
3289 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3290 read_complex_part (y, !imag_first));
3291 }
3292
3293 /* A subroutine of emit_move_complex. Perform the move from Y to X
3294 via two moves of the parts. Returns the last instruction emitted. */
3295
3296 rtx_insn *
3297 emit_move_complex_parts (rtx x, rtx y)
3298 {
3299 /* Show the output dies here. This is necessary for SUBREGs
3300 of pseudos since we cannot track their lifetimes correctly;
3301 hard regs shouldn't appear here except as return values. */
3302 if (!reload_completed && !reload_in_progress
3303 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3304 emit_clobber (x);
3305
3306 write_complex_part (x, read_complex_part (y, false), false);
3307 write_complex_part (x, read_complex_part (y, true), true);
3308
3309 return get_last_insn ();
3310 }
3311
3312 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3313 MODE is known to be complex. Returns the last instruction emitted. */
3314
3315 static rtx_insn *
3316 emit_move_complex (machine_mode mode, rtx x, rtx y)
3317 {
3318 bool try_int;
3319
3320 /* Need to take special care for pushes, to maintain proper ordering
3321 of the data, and possibly extra padding. */
3322 if (push_operand (x, mode))
3323 return emit_move_complex_push (mode, x, y);
3324
3325 /* See if we can coerce the target into moving both values at once, except
3326 for floating point where we favor moving as parts if this is easy. */
3327 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3328 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing
3329 && !(REG_P (x)
3330 && HARD_REGISTER_P (x)
3331 && REG_NREGS (x) == 1)
3332 && !(REG_P (y)
3333 && HARD_REGISTER_P (y)
3334 && REG_NREGS (y) == 1))
3335 try_int = false;
3336 /* Not possible if the values are inherently not adjacent. */
3337 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3338 try_int = false;
3339 /* Is possible if both are registers (or subregs of registers). */
3340 else if (register_operand (x, mode) && register_operand (y, mode))
3341 try_int = true;
3342 /* If one of the operands is a memory, and alignment constraints
3343 are friendly enough, we may be able to do combined memory operations.
3344 We do not attempt this if Y is a constant because that combination is
3345 usually better with the by-parts thing below. */
3346 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3347 && (!STRICT_ALIGNMENT
3348 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3349 try_int = true;
3350 else
3351 try_int = false;
3352
3353 if (try_int)
3354 {
3355 rtx_insn *ret;
3356
3357 /* For memory to memory moves, optimal behavior can be had with the
3358 existing block move logic. */
3359 if (MEM_P (x) && MEM_P (y))
3360 {
3361 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3362 BLOCK_OP_NO_LIBCALL);
3363 return get_last_insn ();
3364 }
3365
3366 ret = emit_move_via_integer (mode, x, y, true);
3367 if (ret)
3368 return ret;
3369 }
3370
3371 return emit_move_complex_parts (x, y);
3372 }
3373
3374 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3375 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3376
3377 static rtx_insn *
3378 emit_move_ccmode (machine_mode mode, rtx x, rtx y)
3379 {
3380 rtx_insn *ret;
3381
3382 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3383 if (mode != CCmode)
3384 {
3385 enum insn_code code = optab_handler (mov_optab, CCmode);
3386 if (code != CODE_FOR_nothing)
3387 {
3388 x = emit_move_change_mode (CCmode, mode, x, true);
3389 y = emit_move_change_mode (CCmode, mode, y, true);
3390 return emit_insn (GEN_FCN (code) (x, y));
3391 }
3392 }
3393
3394 /* Otherwise, find the MODE_INT mode of the same width. */
3395 ret = emit_move_via_integer (mode, x, y, false);
3396 gcc_assert (ret != NULL);
3397 return ret;
3398 }
3399
3400 /* Return true if word I of OP lies entirely in the
3401 undefined bits of a paradoxical subreg. */
3402
3403 static bool
3404 undefined_operand_subword_p (const_rtx op, int i)
3405 {
3406 machine_mode innermode, innermostmode;
3407 int offset;
3408 if (GET_CODE (op) != SUBREG)
3409 return false;
3410 innermode = GET_MODE (op);
3411 innermostmode = GET_MODE (SUBREG_REG (op));
3412 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3413 /* The SUBREG_BYTE represents offset, as if the value were stored in
3414 memory, except for a paradoxical subreg where we define
3415 SUBREG_BYTE to be 0; undo this exception as in
3416 simplify_subreg. */
3417 if (SUBREG_BYTE (op) == 0
3418 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3419 {
3420 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3421 if (WORDS_BIG_ENDIAN)
3422 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3423 if (BYTES_BIG_ENDIAN)
3424 offset += difference % UNITS_PER_WORD;
3425 }
3426 if (offset >= GET_MODE_SIZE (innermostmode)
3427 || offset <= -GET_MODE_SIZE (word_mode))
3428 return true;
3429 return false;
3430 }
3431
3432 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3433 MODE is any multi-word or full-word mode that lacks a move_insn
3434 pattern. Note that you will get better code if you define such
3435 patterns, even if they must turn into multiple assembler instructions. */
3436
3437 static rtx_insn *
3438 emit_move_multi_word (machine_mode mode, rtx x, rtx y)
3439 {
3440 rtx_insn *last_insn = 0;
3441 rtx_insn *seq;
3442 rtx inner;
3443 bool need_clobber;
3444 int i;
3445
3446 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3447
3448 /* If X is a push on the stack, do the push now and replace
3449 X with a reference to the stack pointer. */
3450 if (push_operand (x, mode))
3451 x = emit_move_resolve_push (mode, x);
3452
3453 /* If we are in reload, see if either operand is a MEM whose address
3454 is scheduled for replacement. */
3455 if (reload_in_progress && MEM_P (x)
3456 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3457 x = replace_equiv_address_nv (x, inner);
3458 if (reload_in_progress && MEM_P (y)
3459 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3460 y = replace_equiv_address_nv (y, inner);
3461
3462 start_sequence ();
3463
3464 need_clobber = false;
3465 for (i = 0;
3466 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3467 i++)
3468 {
3469 rtx xpart = operand_subword (x, i, 1, mode);
3470 rtx ypart;
3471
3472 /* Do not generate code for a move if it would come entirely
3473 from the undefined bits of a paradoxical subreg. */
3474 if (undefined_operand_subword_p (y, i))
3475 continue;
3476
3477 ypart = operand_subword (y, i, 1, mode);
3478
3479 /* If we can't get a part of Y, put Y into memory if it is a
3480 constant. Otherwise, force it into a register. Then we must
3481 be able to get a part of Y. */
3482 if (ypart == 0 && CONSTANT_P (y))
3483 {
3484 y = use_anchored_address (force_const_mem (mode, y));
3485 ypart = operand_subword (y, i, 1, mode);
3486 }
3487 else if (ypart == 0)
3488 ypart = operand_subword_force (y, i, mode);
3489
3490 gcc_assert (xpart && ypart);
3491
3492 need_clobber |= (GET_CODE (xpart) == SUBREG);
3493
3494 last_insn = emit_move_insn (xpart, ypart);
3495 }
3496
3497 seq = get_insns ();
3498 end_sequence ();
3499
3500 /* Show the output dies here. This is necessary for SUBREGs
3501 of pseudos since we cannot track their lifetimes correctly;
3502 hard regs shouldn't appear here except as return values.
3503 We never want to emit such a clobber after reload. */
3504 if (x != y
3505 && ! (reload_in_progress || reload_completed)
3506 && need_clobber != 0)
3507 emit_clobber (x);
3508
3509 emit_insn (seq);
3510
3511 return last_insn;
3512 }
3513
3514 /* Low level part of emit_move_insn.
3515 Called just like emit_move_insn, but assumes X and Y
3516 are basically valid. */
3517
3518 rtx_insn *
3519 emit_move_insn_1 (rtx x, rtx y)
3520 {
3521 machine_mode mode = GET_MODE (x);
3522 enum insn_code code;
3523
3524 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3525
3526 code = optab_handler (mov_optab, mode);
3527 if (code != CODE_FOR_nothing)
3528 return emit_insn (GEN_FCN (code) (x, y));
3529
3530 /* Expand complex moves by moving real part and imag part. */
3531 if (COMPLEX_MODE_P (mode))
3532 return emit_move_complex (mode, x, y);
3533
3534 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3535 || ALL_FIXED_POINT_MODE_P (mode))
3536 {
3537 rtx_insn *result = emit_move_via_integer (mode, x, y, true);
3538
3539 /* If we can't find an integer mode, use multi words. */
3540 if (result)
3541 return result;
3542 else
3543 return emit_move_multi_word (mode, x, y);
3544 }
3545
3546 if (GET_MODE_CLASS (mode) == MODE_CC)
3547 return emit_move_ccmode (mode, x, y);
3548
3549 /* Try using a move pattern for the corresponding integer mode. This is
3550 only safe when simplify_subreg can convert MODE constants into integer
3551 constants. At present, it can only do this reliably if the value
3552 fits within a HOST_WIDE_INT. */
3553 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3554 {
3555 rtx_insn *ret = emit_move_via_integer (mode, x, y, lra_in_progress);
3556
3557 if (ret)
3558 {
3559 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0)
3560 return ret;
3561 }
3562 }
3563
3564 return emit_move_multi_word (mode, x, y);
3565 }
3566
3567 /* Generate code to copy Y into X.
3568 Both Y and X must have the same mode, except that
3569 Y can be a constant with VOIDmode.
3570 This mode cannot be BLKmode; use emit_block_move for that.
3571
3572 Return the last instruction emitted. */
3573
3574 rtx_insn *
3575 emit_move_insn (rtx x, rtx y)
3576 {
3577 machine_mode mode = GET_MODE (x);
3578 rtx y_cst = NULL_RTX;
3579 rtx_insn *last_insn;
3580 rtx set;
3581
3582 gcc_assert (mode != BLKmode
3583 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3584
3585 if (CONSTANT_P (y))
3586 {
3587 if (optimize
3588 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3589 && (last_insn = compress_float_constant (x, y)))
3590 return last_insn;
3591
3592 y_cst = y;
3593
3594 if (!targetm.legitimate_constant_p (mode, y))
3595 {
3596 y = force_const_mem (mode, y);
3597
3598 /* If the target's cannot_force_const_mem prevented the spill,
3599 assume that the target's move expanders will also take care
3600 of the non-legitimate constant. */
3601 if (!y)
3602 y = y_cst;
3603 else
3604 y = use_anchored_address (y);
3605 }
3606 }
3607
3608 /* If X or Y are memory references, verify that their addresses are valid
3609 for the machine. */
3610 if (MEM_P (x)
3611 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3612 MEM_ADDR_SPACE (x))
3613 && ! push_operand (x, GET_MODE (x))))
3614 x = validize_mem (x);
3615
3616 if (MEM_P (y)
3617 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3618 MEM_ADDR_SPACE (y)))
3619 y = validize_mem (y);
3620
3621 gcc_assert (mode != BLKmode);
3622
3623 last_insn = emit_move_insn_1 (x, y);
3624
3625 if (y_cst && REG_P (x)
3626 && (set = single_set (last_insn)) != NULL_RTX
3627 && SET_DEST (set) == x
3628 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3629 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3630
3631 return last_insn;
3632 }
3633
3634 /* Generate the body of an instruction to copy Y into X.
3635 It may be a list of insns, if one insn isn't enough. */
3636
3637 rtx_insn *
3638 gen_move_insn (rtx x, rtx y)
3639 {
3640 rtx_insn *seq;
3641
3642 start_sequence ();
3643 emit_move_insn_1 (x, y);
3644 seq = get_insns ();
3645 end_sequence ();
3646 return seq;
3647 }
3648
3649 /* Same as above, but return rtx (used as a callback, which must have
3650 prototype compatible with other functions returning rtx). */
3651
3652 rtx
3653 gen_move_insn_uncast (rtx x, rtx y)
3654 {
3655 return gen_move_insn (x, y);
3656 }
3657
3658 /* If Y is representable exactly in a narrower mode, and the target can
3659 perform the extension directly from constant or memory, then emit the
3660 move as an extension. */
3661
3662 static rtx_insn *
3663 compress_float_constant (rtx x, rtx y)
3664 {
3665 machine_mode dstmode = GET_MODE (x);
3666 machine_mode orig_srcmode = GET_MODE (y);
3667 machine_mode srcmode;
3668 REAL_VALUE_TYPE r;
3669 int oldcost, newcost;
3670 bool speed = optimize_insn_for_speed_p ();
3671
3672 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3673
3674 if (targetm.legitimate_constant_p (dstmode, y))
3675 oldcost = set_src_cost (y, speed);
3676 else
3677 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3678
3679 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3680 srcmode != orig_srcmode;
3681 srcmode = GET_MODE_WIDER_MODE (srcmode))
3682 {
3683 enum insn_code ic;
3684 rtx trunc_y;
3685 rtx_insn *last_insn;
3686
3687 /* Skip if the target can't extend this way. */
3688 ic = can_extend_p (dstmode, srcmode, 0);
3689 if (ic == CODE_FOR_nothing)
3690 continue;
3691
3692 /* Skip if the narrowed value isn't exact. */
3693 if (! exact_real_truncate (srcmode, &r))
3694 continue;
3695
3696 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3697
3698 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3699 {
3700 /* Skip if the target needs extra instructions to perform
3701 the extension. */
3702 if (!insn_operand_matches (ic, 1, trunc_y))
3703 continue;
3704 /* This is valid, but may not be cheaper than the original. */
3705 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3706 speed);
3707 if (oldcost < newcost)
3708 continue;
3709 }
3710 else if (float_extend_from_mem[dstmode][srcmode])
3711 {
3712 trunc_y = force_const_mem (srcmode, trunc_y);
3713 /* This is valid, but may not be cheaper than the original. */
3714 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3715 speed);
3716 if (oldcost < newcost)
3717 continue;
3718 trunc_y = validize_mem (trunc_y);
3719 }
3720 else
3721 continue;
3722
3723 /* For CSE's benefit, force the compressed constant pool entry
3724 into a new pseudo. This constant may be used in different modes,
3725 and if not, combine will put things back together for us. */
3726 trunc_y = force_reg (srcmode, trunc_y);
3727
3728 /* If x is a hard register, perform the extension into a pseudo,
3729 so that e.g. stack realignment code is aware of it. */
3730 rtx target = x;
3731 if (REG_P (x) && HARD_REGISTER_P (x))
3732 target = gen_reg_rtx (dstmode);
3733
3734 emit_unop_insn (ic, target, trunc_y, UNKNOWN);
3735 last_insn = get_last_insn ();
3736
3737 if (REG_P (target))
3738 set_unique_reg_note (last_insn, REG_EQUAL, y);
3739
3740 if (target != x)
3741 return emit_move_insn (x, target);
3742 return last_insn;
3743 }
3744
3745 return NULL;
3746 }
3747 \f
3748 /* Pushing data onto the stack. */
3749
3750 /* Push a block of length SIZE (perhaps variable)
3751 and return an rtx to address the beginning of the block.
3752 The value may be virtual_outgoing_args_rtx.
3753
3754 EXTRA is the number of bytes of padding to push in addition to SIZE.
3755 BELOW nonzero means this padding comes at low addresses;
3756 otherwise, the padding comes at high addresses. */
3757
3758 rtx
3759 push_block (rtx size, int extra, int below)
3760 {
3761 rtx temp;
3762
3763 size = convert_modes (Pmode, ptr_mode, size, 1);
3764 if (CONSTANT_P (size))
3765 anti_adjust_stack (plus_constant (Pmode, size, extra));
3766 else if (REG_P (size) && extra == 0)
3767 anti_adjust_stack (size);
3768 else
3769 {
3770 temp = copy_to_mode_reg (Pmode, size);
3771 if (extra != 0)
3772 temp = expand_binop (Pmode, add_optab, temp,
3773 gen_int_mode (extra, Pmode),
3774 temp, 0, OPTAB_LIB_WIDEN);
3775 anti_adjust_stack (temp);
3776 }
3777
3778 if (STACK_GROWS_DOWNWARD)
3779 {
3780 temp = virtual_outgoing_args_rtx;
3781 if (extra != 0 && below)
3782 temp = plus_constant (Pmode, temp, extra);
3783 }
3784 else
3785 {
3786 if (CONST_INT_P (size))
3787 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
3788 -INTVAL (size) - (below ? 0 : extra));
3789 else if (extra != 0 && !below)
3790 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3791 negate_rtx (Pmode, plus_constant (Pmode, size,
3792 extra)));
3793 else
3794 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3795 negate_rtx (Pmode, size));
3796 }
3797
3798 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3799 }
3800
3801 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3802
3803 static rtx
3804 mem_autoinc_base (rtx mem)
3805 {
3806 if (MEM_P (mem))
3807 {
3808 rtx addr = XEXP (mem, 0);
3809 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3810 return XEXP (addr, 0);
3811 }
3812 return NULL;
3813 }
3814
3815 /* A utility routine used here, in reload, and in try_split. The insns
3816 after PREV up to and including LAST are known to adjust the stack,
3817 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3818 placing notes as appropriate. PREV may be NULL, indicating the
3819 entire insn sequence prior to LAST should be scanned.
3820
3821 The set of allowed stack pointer modifications is small:
3822 (1) One or more auto-inc style memory references (aka pushes),
3823 (2) One or more addition/subtraction with the SP as destination,
3824 (3) A single move insn with the SP as destination,
3825 (4) A call_pop insn,
3826 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3827
3828 Insns in the sequence that do not modify the SP are ignored,
3829 except for noreturn calls.
3830
3831 The return value is the amount of adjustment that can be trivially
3832 verified, via immediate operand or auto-inc. If the adjustment
3833 cannot be trivially extracted, the return value is INT_MIN. */
3834
3835 HOST_WIDE_INT
3836 find_args_size_adjust (rtx_insn *insn)
3837 {
3838 rtx dest, set, pat;
3839 int i;
3840
3841 pat = PATTERN (insn);
3842 set = NULL;
3843
3844 /* Look for a call_pop pattern. */
3845 if (CALL_P (insn))
3846 {
3847 /* We have to allow non-call_pop patterns for the case
3848 of emit_single_push_insn of a TLS address. */
3849 if (GET_CODE (pat) != PARALLEL)
3850 return 0;
3851
3852 /* All call_pop have a stack pointer adjust in the parallel.
3853 The call itself is always first, and the stack adjust is
3854 usually last, so search from the end. */
3855 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3856 {
3857 set = XVECEXP (pat, 0, i);
3858 if (GET_CODE (set) != SET)
3859 continue;
3860 dest = SET_DEST (set);
3861 if (dest == stack_pointer_rtx)
3862 break;
3863 }
3864 /* We'd better have found the stack pointer adjust. */
3865 if (i == 0)
3866 return 0;
3867 /* Fall through to process the extracted SET and DEST
3868 as if it was a standalone insn. */
3869 }
3870 else if (GET_CODE (pat) == SET)
3871 set = pat;
3872 else if ((set = single_set (insn)) != NULL)
3873 ;
3874 else if (GET_CODE (pat) == PARALLEL)
3875 {
3876 /* ??? Some older ports use a parallel with a stack adjust
3877 and a store for a PUSH_ROUNDING pattern, rather than a
3878 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3879 /* ??? See h8300 and m68k, pushqi1. */
3880 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3881 {
3882 set = XVECEXP (pat, 0, i);
3883 if (GET_CODE (set) != SET)
3884 continue;
3885 dest = SET_DEST (set);
3886 if (dest == stack_pointer_rtx)
3887 break;
3888
3889 /* We do not expect an auto-inc of the sp in the parallel. */
3890 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3891 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3892 != stack_pointer_rtx);
3893 }
3894 if (i < 0)
3895 return 0;
3896 }
3897 else
3898 return 0;
3899
3900 dest = SET_DEST (set);
3901
3902 /* Look for direct modifications of the stack pointer. */
3903 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3904 {
3905 /* Look for a trivial adjustment, otherwise assume nothing. */
3906 /* Note that the SPU restore_stack_block pattern refers to
3907 the stack pointer in V4SImode. Consider that non-trivial. */
3908 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3909 && GET_CODE (SET_SRC (set)) == PLUS
3910 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3911 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3912 return INTVAL (XEXP (SET_SRC (set), 1));
3913 /* ??? Reload can generate no-op moves, which will be cleaned
3914 up later. Recognize it and continue searching. */
3915 else if (rtx_equal_p (dest, SET_SRC (set)))
3916 return 0;
3917 else
3918 return HOST_WIDE_INT_MIN;
3919 }
3920 else
3921 {
3922 rtx mem, addr;
3923
3924 /* Otherwise only think about autoinc patterns. */
3925 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3926 {
3927 mem = dest;
3928 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3929 != stack_pointer_rtx);
3930 }
3931 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3932 mem = SET_SRC (set);
3933 else
3934 return 0;
3935
3936 addr = XEXP (mem, 0);
3937 switch (GET_CODE (addr))
3938 {
3939 case PRE_INC:
3940 case POST_INC:
3941 return GET_MODE_SIZE (GET_MODE (mem));
3942 case PRE_DEC:
3943 case POST_DEC:
3944 return -GET_MODE_SIZE (GET_MODE (mem));
3945 case PRE_MODIFY:
3946 case POST_MODIFY:
3947 addr = XEXP (addr, 1);
3948 gcc_assert (GET_CODE (addr) == PLUS);
3949 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3950 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3951 return INTVAL (XEXP (addr, 1));
3952 default:
3953 gcc_unreachable ();
3954 }
3955 }
3956 }
3957
3958 int
3959 fixup_args_size_notes (rtx_insn *prev, rtx_insn *last, int end_args_size)
3960 {
3961 int args_size = end_args_size;
3962 bool saw_unknown = false;
3963 rtx_insn *insn;
3964
3965 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3966 {
3967 HOST_WIDE_INT this_delta;
3968
3969 if (!NONDEBUG_INSN_P (insn))
3970 continue;
3971
3972 this_delta = find_args_size_adjust (insn);
3973 if (this_delta == 0)
3974 {
3975 if (!CALL_P (insn)
3976 || ACCUMULATE_OUTGOING_ARGS
3977 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3978 continue;
3979 }
3980
3981 gcc_assert (!saw_unknown);
3982 if (this_delta == HOST_WIDE_INT_MIN)
3983 saw_unknown = true;
3984
3985 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3986 if (STACK_GROWS_DOWNWARD)
3987 this_delta = -(unsigned HOST_WIDE_INT) this_delta;
3988
3989 args_size -= this_delta;
3990 }
3991
3992 return saw_unknown ? INT_MIN : args_size;
3993 }
3994
3995 #ifdef PUSH_ROUNDING
3996 /* Emit single push insn. */
3997
3998 static void
3999 emit_single_push_insn_1 (machine_mode mode, rtx x, tree type)
4000 {
4001 rtx dest_addr;
4002 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
4003 rtx dest;
4004 enum insn_code icode;
4005
4006 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
4007 /* If there is push pattern, use it. Otherwise try old way of throwing
4008 MEM representing push operation to move expander. */
4009 icode = optab_handler (push_optab, mode);
4010 if (icode != CODE_FOR_nothing)
4011 {
4012 struct expand_operand ops[1];
4013
4014 create_input_operand (&ops[0], x, mode);
4015 if (maybe_expand_insn (icode, 1, ops))
4016 return;
4017 }
4018 if (GET_MODE_SIZE (mode) == rounded_size)
4019 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
4020 /* If we are to pad downward, adjust the stack pointer first and
4021 then store X into the stack location using an offset. This is
4022 because emit_move_insn does not know how to pad; it does not have
4023 access to type. */
4024 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
4025 {
4026 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
4027 HOST_WIDE_INT offset;
4028
4029 emit_move_insn (stack_pointer_rtx,
4030 expand_binop (Pmode,
4031 STACK_GROWS_DOWNWARD ? sub_optab
4032 : add_optab,
4033 stack_pointer_rtx,
4034 gen_int_mode (rounded_size, Pmode),
4035 NULL_RTX, 0, OPTAB_LIB_WIDEN));
4036
4037 offset = (HOST_WIDE_INT) padding_size;
4038 if (STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_DEC)
4039 /* We have already decremented the stack pointer, so get the
4040 previous value. */
4041 offset += (HOST_WIDE_INT) rounded_size;
4042
4043 if (!STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_INC)
4044 /* We have already incremented the stack pointer, so get the
4045 previous value. */
4046 offset -= (HOST_WIDE_INT) rounded_size;
4047
4048 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4049 gen_int_mode (offset, Pmode));
4050 }
4051 else
4052 {
4053 if (STACK_GROWS_DOWNWARD)
4054 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4055 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4056 gen_int_mode (-(HOST_WIDE_INT) rounded_size,
4057 Pmode));
4058 else
4059 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4060 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4061 gen_int_mode (rounded_size, Pmode));
4062
4063 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
4064 }
4065
4066 dest = gen_rtx_MEM (mode, dest_addr);
4067
4068 if (type != 0)
4069 {
4070 set_mem_attributes (dest, type, 1);
4071
4072 if (cfun->tail_call_marked)
4073 /* Function incoming arguments may overlap with sibling call
4074 outgoing arguments and we cannot allow reordering of reads
4075 from function arguments with stores to outgoing arguments
4076 of sibling calls. */
4077 set_mem_alias_set (dest, 0);
4078 }
4079 emit_move_insn (dest, x);
4080 }
4081
4082 /* Emit and annotate a single push insn. */
4083
4084 static void
4085 emit_single_push_insn (machine_mode mode, rtx x, tree type)
4086 {
4087 int delta, old_delta = stack_pointer_delta;
4088 rtx_insn *prev = get_last_insn ();
4089 rtx_insn *last;
4090
4091 emit_single_push_insn_1 (mode, x, type);
4092
4093 last = get_last_insn ();
4094
4095 /* Notice the common case where we emitted exactly one insn. */
4096 if (PREV_INSN (last) == prev)
4097 {
4098 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
4099 return;
4100 }
4101
4102 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
4103 gcc_assert (delta == INT_MIN || delta == old_delta);
4104 }
4105 #endif
4106
4107 /* If reading SIZE bytes from X will end up reading from
4108 Y return the number of bytes that overlap. Return -1
4109 if there is no overlap or -2 if we can't determine
4110 (for example when X and Y have different base registers). */
4111
4112 static int
4113 memory_load_overlap (rtx x, rtx y, HOST_WIDE_INT size)
4114 {
4115 rtx tmp = plus_constant (Pmode, x, size);
4116 rtx sub = simplify_gen_binary (MINUS, Pmode, tmp, y);
4117
4118 if (!CONST_INT_P (sub))
4119 return -2;
4120
4121 HOST_WIDE_INT val = INTVAL (sub);
4122
4123 return IN_RANGE (val, 1, size) ? val : -1;
4124 }
4125
4126 /* Generate code to push X onto the stack, assuming it has mode MODE and
4127 type TYPE.
4128 MODE is redundant except when X is a CONST_INT (since they don't
4129 carry mode info).
4130 SIZE is an rtx for the size of data to be copied (in bytes),
4131 needed only if X is BLKmode.
4132 Return true if successful. May return false if asked to push a
4133 partial argument during a sibcall optimization (as specified by
4134 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4135 to not overlap.
4136
4137 ALIGN (in bits) is maximum alignment we can assume.
4138
4139 If PARTIAL and REG are both nonzero, then copy that many of the first
4140 bytes of X into registers starting with REG, and push the rest of X.
4141 The amount of space pushed is decreased by PARTIAL bytes.
4142 REG must be a hard register in this case.
4143 If REG is zero but PARTIAL is not, take any all others actions for an
4144 argument partially in registers, but do not actually load any
4145 registers.
4146
4147 EXTRA is the amount in bytes of extra space to leave next to this arg.
4148 This is ignored if an argument block has already been allocated.
4149
4150 On a machine that lacks real push insns, ARGS_ADDR is the address of
4151 the bottom of the argument block for this call. We use indexing off there
4152 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4153 argument block has not been preallocated.
4154
4155 ARGS_SO_FAR is the size of args previously pushed for this call.
4156
4157 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4158 for arguments passed in registers. If nonzero, it will be the number
4159 of bytes required. */
4160
4161 bool
4162 emit_push_insn (rtx x, machine_mode mode, tree type, rtx size,
4163 unsigned int align, int partial, rtx reg, int extra,
4164 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
4165 rtx alignment_pad, bool sibcall_p)
4166 {
4167 rtx xinner;
4168 enum direction stack_direction = STACK_GROWS_DOWNWARD ? downward : upward;
4169
4170 /* Decide where to pad the argument: `downward' for below,
4171 `upward' for above, or `none' for don't pad it.
4172 Default is below for small data on big-endian machines; else above. */
4173 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
4174
4175 /* Invert direction if stack is post-decrement.
4176 FIXME: why? */
4177 if (STACK_PUSH_CODE == POST_DEC)
4178 if (where_pad != none)
4179 where_pad = (where_pad == downward ? upward : downward);
4180
4181 xinner = x;
4182
4183 int nregs = partial / UNITS_PER_WORD;
4184 rtx *tmp_regs = NULL;
4185 int overlapping = 0;
4186
4187 if (mode == BLKmode
4188 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4189 {
4190 /* Copy a block into the stack, entirely or partially. */
4191
4192 rtx temp;
4193 int used;
4194 int offset;
4195 int skip;
4196
4197 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4198 used = partial - offset;
4199
4200 if (mode != BLKmode)
4201 {
4202 /* A value is to be stored in an insufficiently aligned
4203 stack slot; copy via a suitably aligned slot if
4204 necessary. */
4205 size = GEN_INT (GET_MODE_SIZE (mode));
4206 if (!MEM_P (xinner))
4207 {
4208 temp = assign_temp (type, 1, 1);
4209 emit_move_insn (temp, xinner);
4210 xinner = temp;
4211 }
4212 }
4213
4214 gcc_assert (size);
4215
4216 /* USED is now the # of bytes we need not copy to the stack
4217 because registers will take care of them. */
4218
4219 if (partial != 0)
4220 xinner = adjust_address (xinner, BLKmode, used);
4221
4222 /* If the partial register-part of the arg counts in its stack size,
4223 skip the part of stack space corresponding to the registers.
4224 Otherwise, start copying to the beginning of the stack space,
4225 by setting SKIP to 0. */
4226 skip = (reg_parm_stack_space == 0) ? 0 : used;
4227
4228 #ifdef PUSH_ROUNDING
4229 /* Do it with several push insns if that doesn't take lots of insns
4230 and if there is no difficulty with push insns that skip bytes
4231 on the stack for alignment purposes. */
4232 if (args_addr == 0
4233 && PUSH_ARGS
4234 && CONST_INT_P (size)
4235 && skip == 0
4236 && MEM_ALIGN (xinner) >= align
4237 && can_move_by_pieces ((unsigned) INTVAL (size) - used, align)
4238 /* Here we avoid the case of a structure whose weak alignment
4239 forces many pushes of a small amount of data,
4240 and such small pushes do rounding that causes trouble. */
4241 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4242 || align >= BIGGEST_ALIGNMENT
4243 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4244 == (align / BITS_PER_UNIT)))
4245 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4246 {
4247 /* Push padding now if padding above and stack grows down,
4248 or if padding below and stack grows up.
4249 But if space already allocated, this has already been done. */
4250 if (extra && args_addr == 0
4251 && where_pad != none && where_pad != stack_direction)
4252 anti_adjust_stack (GEN_INT (extra));
4253
4254 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4255 }
4256 else
4257 #endif /* PUSH_ROUNDING */
4258 {
4259 rtx target;
4260
4261 /* Otherwise make space on the stack and copy the data
4262 to the address of that space. */
4263
4264 /* Deduct words put into registers from the size we must copy. */
4265 if (partial != 0)
4266 {
4267 if (CONST_INT_P (size))
4268 size = GEN_INT (INTVAL (size) - used);
4269 else
4270 size = expand_binop (GET_MODE (size), sub_optab, size,
4271 gen_int_mode (used, GET_MODE (size)),
4272 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4273 }
4274
4275 /* Get the address of the stack space.
4276 In this case, we do not deal with EXTRA separately.
4277 A single stack adjust will do. */
4278 if (! args_addr)
4279 {
4280 temp = push_block (size, extra, where_pad == downward);
4281 extra = 0;
4282 }
4283 else if (CONST_INT_P (args_so_far))
4284 temp = memory_address (BLKmode,
4285 plus_constant (Pmode, args_addr,
4286 skip + INTVAL (args_so_far)));
4287 else
4288 temp = memory_address (BLKmode,
4289 plus_constant (Pmode,
4290 gen_rtx_PLUS (Pmode,
4291 args_addr,
4292 args_so_far),
4293 skip));
4294
4295 if (!ACCUMULATE_OUTGOING_ARGS)
4296 {
4297 /* If the source is referenced relative to the stack pointer,
4298 copy it to another register to stabilize it. We do not need
4299 to do this if we know that we won't be changing sp. */
4300
4301 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4302 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4303 temp = copy_to_reg (temp);
4304 }
4305
4306 target = gen_rtx_MEM (BLKmode, temp);
4307
4308 /* We do *not* set_mem_attributes here, because incoming arguments
4309 may overlap with sibling call outgoing arguments and we cannot
4310 allow reordering of reads from function arguments with stores
4311 to outgoing arguments of sibling calls. We do, however, want
4312 to record the alignment of the stack slot. */
4313 /* ALIGN may well be better aligned than TYPE, e.g. due to
4314 PARM_BOUNDARY. Assume the caller isn't lying. */
4315 set_mem_align (target, align);
4316
4317 /* If part should go in registers and pushing to that part would
4318 overwrite some of the values that need to go into regs, load the
4319 overlapping values into temporary pseudos to be moved into the hard
4320 regs at the end after the stack pushing has completed.
4321 We cannot load them directly into the hard regs here because
4322 they can be clobbered by the block move expansions.
4323 See PR 65358. */
4324
4325 if (partial > 0 && reg != 0 && mode == BLKmode
4326 && GET_CODE (reg) != PARALLEL)
4327 {
4328 overlapping = memory_load_overlap (XEXP (x, 0), temp, partial);
4329 if (overlapping > 0)
4330 {
4331 gcc_assert (overlapping % UNITS_PER_WORD == 0);
4332 overlapping /= UNITS_PER_WORD;
4333
4334 tmp_regs = XALLOCAVEC (rtx, overlapping);
4335
4336 for (int i = 0; i < overlapping; i++)
4337 tmp_regs[i] = gen_reg_rtx (word_mode);
4338
4339 for (int i = 0; i < overlapping; i++)
4340 emit_move_insn (tmp_regs[i],
4341 operand_subword_force (target, i, mode));
4342 }
4343 else if (overlapping == -1)
4344 overlapping = 0;
4345 /* Could not determine whether there is overlap.
4346 Fail the sibcall. */
4347 else
4348 {
4349 overlapping = 0;
4350 if (sibcall_p)
4351 return false;
4352 }
4353 }
4354 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4355 }
4356 }
4357 else if (partial > 0)
4358 {
4359 /* Scalar partly in registers. */
4360
4361 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4362 int i;
4363 int not_stack;
4364 /* # bytes of start of argument
4365 that we must make space for but need not store. */
4366 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4367 int args_offset = INTVAL (args_so_far);
4368 int skip;
4369
4370 /* Push padding now if padding above and stack grows down,
4371 or if padding below and stack grows up.
4372 But if space already allocated, this has already been done. */
4373 if (extra && args_addr == 0
4374 && where_pad != none && where_pad != stack_direction)
4375 anti_adjust_stack (GEN_INT (extra));
4376
4377 /* If we make space by pushing it, we might as well push
4378 the real data. Otherwise, we can leave OFFSET nonzero
4379 and leave the space uninitialized. */
4380 if (args_addr == 0)
4381 offset = 0;
4382
4383 /* Now NOT_STACK gets the number of words that we don't need to
4384 allocate on the stack. Convert OFFSET to words too. */
4385 not_stack = (partial - offset) / UNITS_PER_WORD;
4386 offset /= UNITS_PER_WORD;
4387
4388 /* If the partial register-part of the arg counts in its stack size,
4389 skip the part of stack space corresponding to the registers.
4390 Otherwise, start copying to the beginning of the stack space,
4391 by setting SKIP to 0. */
4392 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4393
4394 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4395 x = validize_mem (force_const_mem (mode, x));
4396
4397 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4398 SUBREGs of such registers are not allowed. */
4399 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4400 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4401 x = copy_to_reg (x);
4402
4403 /* Loop over all the words allocated on the stack for this arg. */
4404 /* We can do it by words, because any scalar bigger than a word
4405 has a size a multiple of a word. */
4406 for (i = size - 1; i >= not_stack; i--)
4407 if (i >= not_stack + offset)
4408 if (!emit_push_insn (operand_subword_force (x, i, mode),
4409 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4410 0, args_addr,
4411 GEN_INT (args_offset + ((i - not_stack + skip)
4412 * UNITS_PER_WORD)),
4413 reg_parm_stack_space, alignment_pad, sibcall_p))
4414 return false;
4415 }
4416 else
4417 {
4418 rtx addr;
4419 rtx dest;
4420
4421 /* Push padding now if padding above and stack grows down,
4422 or if padding below and stack grows up.
4423 But if space already allocated, this has already been done. */
4424 if (extra && args_addr == 0
4425 && where_pad != none && where_pad != stack_direction)
4426 anti_adjust_stack (GEN_INT (extra));
4427
4428 #ifdef PUSH_ROUNDING
4429 if (args_addr == 0 && PUSH_ARGS)
4430 emit_single_push_insn (mode, x, type);
4431 else
4432 #endif
4433 {
4434 if (CONST_INT_P (args_so_far))
4435 addr
4436 = memory_address (mode,
4437 plus_constant (Pmode, args_addr,
4438 INTVAL (args_so_far)));
4439 else
4440 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4441 args_so_far));
4442 dest = gen_rtx_MEM (mode, addr);
4443
4444 /* We do *not* set_mem_attributes here, because incoming arguments
4445 may overlap with sibling call outgoing arguments and we cannot
4446 allow reordering of reads from function arguments with stores
4447 to outgoing arguments of sibling calls. We do, however, want
4448 to record the alignment of the stack slot. */
4449 /* ALIGN may well be better aligned than TYPE, e.g. due to
4450 PARM_BOUNDARY. Assume the caller isn't lying. */
4451 set_mem_align (dest, align);
4452
4453 emit_move_insn (dest, x);
4454 }
4455 }
4456
4457 /* Move the partial arguments into the registers and any overlapping
4458 values that we moved into the pseudos in tmp_regs. */
4459 if (partial > 0 && reg != 0)
4460 {
4461 /* Handle calls that pass values in multiple non-contiguous locations.
4462 The Irix 6 ABI has examples of this. */
4463 if (GET_CODE (reg) == PARALLEL)
4464 emit_group_load (reg, x, type, -1);
4465 else
4466 {
4467 gcc_assert (partial % UNITS_PER_WORD == 0);
4468 move_block_to_reg (REGNO (reg), x, nregs - overlapping, mode);
4469
4470 for (int i = 0; i < overlapping; i++)
4471 emit_move_insn (gen_rtx_REG (word_mode, REGNO (reg)
4472 + nregs - overlapping + i),
4473 tmp_regs[i]);
4474
4475 }
4476 }
4477
4478 if (extra && args_addr == 0 && where_pad == stack_direction)
4479 anti_adjust_stack (GEN_INT (extra));
4480
4481 if (alignment_pad && args_addr == 0)
4482 anti_adjust_stack (alignment_pad);
4483
4484 return true;
4485 }
4486 \f
4487 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4488 operations. */
4489
4490 static rtx
4491 get_subtarget (rtx x)
4492 {
4493 return (optimize
4494 || x == 0
4495 /* Only registers can be subtargets. */
4496 || !REG_P (x)
4497 /* Don't use hard regs to avoid extending their life. */
4498 || REGNO (x) < FIRST_PSEUDO_REGISTER
4499 ? 0 : x);
4500 }
4501
4502 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4503 FIELD is a bitfield. Returns true if the optimization was successful,
4504 and there's nothing else to do. */
4505
4506 static bool
4507 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4508 unsigned HOST_WIDE_INT bitpos,
4509 unsigned HOST_WIDE_INT bitregion_start,
4510 unsigned HOST_WIDE_INT bitregion_end,
4511 machine_mode mode1, rtx str_rtx,
4512 tree to, tree src)
4513 {
4514 machine_mode str_mode = GET_MODE (str_rtx);
4515 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4516 tree op0, op1;
4517 rtx value, result;
4518 optab binop;
4519 gimple srcstmt;
4520 enum tree_code code;
4521
4522 if (mode1 != VOIDmode
4523 || bitsize >= BITS_PER_WORD
4524 || str_bitsize > BITS_PER_WORD
4525 || TREE_SIDE_EFFECTS (to)
4526 || TREE_THIS_VOLATILE (to))
4527 return false;
4528
4529 STRIP_NOPS (src);
4530 if (TREE_CODE (src) != SSA_NAME)
4531 return false;
4532 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4533 return false;
4534
4535 srcstmt = get_gimple_for_ssa_name (src);
4536 if (!srcstmt
4537 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4538 return false;
4539
4540 code = gimple_assign_rhs_code (srcstmt);
4541
4542 op0 = gimple_assign_rhs1 (srcstmt);
4543
4544 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4545 to find its initialization. Hopefully the initialization will
4546 be from a bitfield load. */
4547 if (TREE_CODE (op0) == SSA_NAME)
4548 {
4549 gimple op0stmt = get_gimple_for_ssa_name (op0);
4550
4551 /* We want to eventually have OP0 be the same as TO, which
4552 should be a bitfield. */
4553 if (!op0stmt
4554 || !is_gimple_assign (op0stmt)
4555 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4556 return false;
4557 op0 = gimple_assign_rhs1 (op0stmt);
4558 }
4559
4560 op1 = gimple_assign_rhs2 (srcstmt);
4561
4562 if (!operand_equal_p (to, op0, 0))
4563 return false;
4564
4565 if (MEM_P (str_rtx))
4566 {
4567 unsigned HOST_WIDE_INT offset1;
4568
4569 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4570 str_mode = word_mode;
4571 str_mode = get_best_mode (bitsize, bitpos,
4572 bitregion_start, bitregion_end,
4573 MEM_ALIGN (str_rtx), str_mode, 0);
4574 if (str_mode == VOIDmode)
4575 return false;
4576 str_bitsize = GET_MODE_BITSIZE (str_mode);
4577
4578 offset1 = bitpos;
4579 bitpos %= str_bitsize;
4580 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4581 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4582 }
4583 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4584 return false;
4585
4586 /* If the bit field covers the whole REG/MEM, store_field
4587 will likely generate better code. */
4588 if (bitsize >= str_bitsize)
4589 return false;
4590
4591 /* We can't handle fields split across multiple entities. */
4592 if (bitpos + bitsize > str_bitsize)
4593 return false;
4594
4595 if (BYTES_BIG_ENDIAN)
4596 bitpos = str_bitsize - bitpos - bitsize;
4597
4598 switch (code)
4599 {
4600 case PLUS_EXPR:
4601 case MINUS_EXPR:
4602 /* For now, just optimize the case of the topmost bitfield
4603 where we don't need to do any masking and also
4604 1 bit bitfields where xor can be used.
4605 We might win by one instruction for the other bitfields
4606 too if insv/extv instructions aren't used, so that
4607 can be added later. */
4608 if (bitpos + bitsize != str_bitsize
4609 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4610 break;
4611
4612 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4613 value = convert_modes (str_mode,
4614 TYPE_MODE (TREE_TYPE (op1)), value,
4615 TYPE_UNSIGNED (TREE_TYPE (op1)));
4616
4617 /* We may be accessing data outside the field, which means
4618 we can alias adjacent data. */
4619 if (MEM_P (str_rtx))
4620 {
4621 str_rtx = shallow_copy_rtx (str_rtx);
4622 set_mem_alias_set (str_rtx, 0);
4623 set_mem_expr (str_rtx, 0);
4624 }
4625
4626 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4627 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4628 {
4629 value = expand_and (str_mode, value, const1_rtx, NULL);
4630 binop = xor_optab;
4631 }
4632 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4633 result = expand_binop (str_mode, binop, str_rtx,
4634 value, str_rtx, 1, OPTAB_WIDEN);
4635 if (result != str_rtx)
4636 emit_move_insn (str_rtx, result);
4637 return true;
4638
4639 case BIT_IOR_EXPR:
4640 case BIT_XOR_EXPR:
4641 if (TREE_CODE (op1) != INTEGER_CST)
4642 break;
4643 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4644 value = convert_modes (str_mode,
4645 TYPE_MODE (TREE_TYPE (op1)), value,
4646 TYPE_UNSIGNED (TREE_TYPE (op1)));
4647
4648 /* We may be accessing data outside the field, which means
4649 we can alias adjacent data. */
4650 if (MEM_P (str_rtx))
4651 {
4652 str_rtx = shallow_copy_rtx (str_rtx);
4653 set_mem_alias_set (str_rtx, 0);
4654 set_mem_expr (str_rtx, 0);
4655 }
4656
4657 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4658 if (bitpos + bitsize != str_bitsize)
4659 {
4660 rtx mask = gen_int_mode (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1,
4661 str_mode);
4662 value = expand_and (str_mode, value, mask, NULL_RTX);
4663 }
4664 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4665 result = expand_binop (str_mode, binop, str_rtx,
4666 value, str_rtx, 1, OPTAB_WIDEN);
4667 if (result != str_rtx)
4668 emit_move_insn (str_rtx, result);
4669 return true;
4670
4671 default:
4672 break;
4673 }
4674
4675 return false;
4676 }
4677
4678 /* In the C++ memory model, consecutive bit fields in a structure are
4679 considered one memory location.
4680
4681 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4682 returns the bit range of consecutive bits in which this COMPONENT_REF
4683 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4684 and *OFFSET may be adjusted in the process.
4685
4686 If the access does not need to be restricted, 0 is returned in both
4687 *BITSTART and *BITEND. */
4688
4689 static void
4690 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4691 unsigned HOST_WIDE_INT *bitend,
4692 tree exp,
4693 HOST_WIDE_INT *bitpos,
4694 tree *offset)
4695 {
4696 HOST_WIDE_INT bitoffset;
4697 tree field, repr;
4698
4699 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4700
4701 field = TREE_OPERAND (exp, 1);
4702 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4703 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4704 need to limit the range we can access. */
4705 if (!repr)
4706 {
4707 *bitstart = *bitend = 0;
4708 return;
4709 }
4710
4711 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4712 part of a larger bit field, then the representative does not serve any
4713 useful purpose. This can occur in Ada. */
4714 if (handled_component_p (TREE_OPERAND (exp, 0)))
4715 {
4716 machine_mode rmode;
4717 HOST_WIDE_INT rbitsize, rbitpos;
4718 tree roffset;
4719 int unsignedp;
4720 int volatilep = 0;
4721 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4722 &roffset, &rmode, &unsignedp, &volatilep, false);
4723 if ((rbitpos % BITS_PER_UNIT) != 0)
4724 {
4725 *bitstart = *bitend = 0;
4726 return;
4727 }
4728 }
4729
4730 /* Compute the adjustment to bitpos from the offset of the field
4731 relative to the representative. DECL_FIELD_OFFSET of field and
4732 repr are the same by construction if they are not constants,
4733 see finish_bitfield_layout. */
4734 if (tree_fits_uhwi_p (DECL_FIELD_OFFSET (field))
4735 && tree_fits_uhwi_p (DECL_FIELD_OFFSET (repr)))
4736 bitoffset = (tree_to_uhwi (DECL_FIELD_OFFSET (field))
4737 - tree_to_uhwi (DECL_FIELD_OFFSET (repr))) * BITS_PER_UNIT;
4738 else
4739 bitoffset = 0;
4740 bitoffset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
4741 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr)));
4742
4743 /* If the adjustment is larger than bitpos, we would have a negative bit
4744 position for the lower bound and this may wreak havoc later. Adjust
4745 offset and bitpos to make the lower bound non-negative in that case. */
4746 if (bitoffset > *bitpos)
4747 {
4748 HOST_WIDE_INT adjust = bitoffset - *bitpos;
4749 gcc_assert ((adjust % BITS_PER_UNIT) == 0);
4750
4751 *bitpos += adjust;
4752 if (*offset == NULL_TREE)
4753 *offset = size_int (-adjust / BITS_PER_UNIT);
4754 else
4755 *offset
4756 = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));
4757 *bitstart = 0;
4758 }
4759 else
4760 *bitstart = *bitpos - bitoffset;
4761
4762 *bitend = *bitstart + tree_to_uhwi (DECL_SIZE (repr)) - 1;
4763 }
4764
4765 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4766 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4767 DECL_RTL was not set yet, return NORTL. */
4768
4769 static inline bool
4770 addr_expr_of_non_mem_decl_p_1 (tree addr, bool nortl)
4771 {
4772 if (TREE_CODE (addr) != ADDR_EXPR)
4773 return false;
4774
4775 tree base = TREE_OPERAND (addr, 0);
4776
4777 if (!DECL_P (base)
4778 || TREE_ADDRESSABLE (base)
4779 || DECL_MODE (base) == BLKmode)
4780 return false;
4781
4782 if (!DECL_RTL_SET_P (base))
4783 return nortl;
4784
4785 return (!MEM_P (DECL_RTL (base)));
4786 }
4787
4788 /* Returns true if the MEM_REF REF refers to an object that does not
4789 reside in memory and has non-BLKmode. */
4790
4791 static inline bool
4792 mem_ref_refers_to_non_mem_p (tree ref)
4793 {
4794 tree base = TREE_OPERAND (ref, 0);
4795 return addr_expr_of_non_mem_decl_p_1 (base, false);
4796 }
4797
4798 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4799 is true, try generating a nontemporal store. */
4800
4801 void
4802 expand_assignment (tree to, tree from, bool nontemporal)
4803 {
4804 rtx to_rtx = 0;
4805 rtx result;
4806 machine_mode mode;
4807 unsigned int align;
4808 enum insn_code icode;
4809
4810 /* Don't crash if the lhs of the assignment was erroneous. */
4811 if (TREE_CODE (to) == ERROR_MARK)
4812 {
4813 expand_normal (from);
4814 return;
4815 }
4816
4817 /* Optimize away no-op moves without side-effects. */
4818 if (operand_equal_p (to, from, 0))
4819 return;
4820
4821 /* Handle misaligned stores. */
4822 mode = TYPE_MODE (TREE_TYPE (to));
4823 if ((TREE_CODE (to) == MEM_REF
4824 || TREE_CODE (to) == TARGET_MEM_REF)
4825 && mode != BLKmode
4826 && !mem_ref_refers_to_non_mem_p (to)
4827 && ((align = get_object_alignment (to))
4828 < GET_MODE_ALIGNMENT (mode))
4829 && (((icode = optab_handler (movmisalign_optab, mode))
4830 != CODE_FOR_nothing)
4831 || SLOW_UNALIGNED_ACCESS (mode, align)))
4832 {
4833 rtx reg, mem;
4834
4835 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4836 reg = force_not_mem (reg);
4837 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4838
4839 if (icode != CODE_FOR_nothing)
4840 {
4841 struct expand_operand ops[2];
4842
4843 create_fixed_operand (&ops[0], mem);
4844 create_input_operand (&ops[1], reg, mode);
4845 /* The movmisalign<mode> pattern cannot fail, else the assignment
4846 would silently be omitted. */
4847 expand_insn (icode, 2, ops);
4848 }
4849 else
4850 store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg);
4851 return;
4852 }
4853
4854 /* Assignment of a structure component needs special treatment
4855 if the structure component's rtx is not simply a MEM.
4856 Assignment of an array element at a constant index, and assignment of
4857 an array element in an unaligned packed structure field, has the same
4858 problem. Same for (partially) storing into a non-memory object. */
4859 if (handled_component_p (to)
4860 || (TREE_CODE (to) == MEM_REF
4861 && mem_ref_refers_to_non_mem_p (to))
4862 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4863 {
4864 machine_mode mode1;
4865 HOST_WIDE_INT bitsize, bitpos;
4866 unsigned HOST_WIDE_INT bitregion_start = 0;
4867 unsigned HOST_WIDE_INT bitregion_end = 0;
4868 tree offset;
4869 int unsignedp;
4870 int volatilep = 0;
4871 tree tem;
4872
4873 push_temp_slots ();
4874 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4875 &unsignedp, &volatilep, true);
4876
4877 /* Make sure bitpos is not negative, it can wreak havoc later. */
4878 if (bitpos < 0)
4879 {
4880 gcc_assert (offset == NULL_TREE);
4881 offset = size_int (bitpos >> (BITS_PER_UNIT == 8
4882 ? 3 : exact_log2 (BITS_PER_UNIT)));
4883 bitpos &= BITS_PER_UNIT - 1;
4884 }
4885
4886 if (TREE_CODE (to) == COMPONENT_REF
4887 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4888 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
4889 /* The C++ memory model naturally applies to byte-aligned fields.
4890 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
4891 BITSIZE are not byte-aligned, there is no need to limit the range
4892 we can access. This can occur with packed structures in Ada. */
4893 else if (bitsize > 0
4894 && bitsize % BITS_PER_UNIT == 0
4895 && bitpos % BITS_PER_UNIT == 0)
4896 {
4897 bitregion_start = bitpos;
4898 bitregion_end = bitpos + bitsize - 1;
4899 }
4900
4901 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4902
4903 /* If the field has a mode, we want to access it in the
4904 field's mode, not the computed mode.
4905 If a MEM has VOIDmode (external with incomplete type),
4906 use BLKmode for it instead. */
4907 if (MEM_P (to_rtx))
4908 {
4909 if (mode1 != VOIDmode)
4910 to_rtx = adjust_address (to_rtx, mode1, 0);
4911 else if (GET_MODE (to_rtx) == VOIDmode)
4912 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4913 }
4914
4915 if (offset != 0)
4916 {
4917 machine_mode address_mode;
4918 rtx offset_rtx;
4919
4920 if (!MEM_P (to_rtx))
4921 {
4922 /* We can get constant negative offsets into arrays with broken
4923 user code. Translate this to a trap instead of ICEing. */
4924 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4925 expand_builtin_trap ();
4926 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4927 }
4928
4929 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4930 address_mode = get_address_mode (to_rtx);
4931 if (GET_MODE (offset_rtx) != address_mode)
4932 {
4933 /* We cannot be sure that the RTL in offset_rtx is valid outside
4934 of a memory address context, so force it into a register
4935 before attempting to convert it to the desired mode. */
4936 offset_rtx = force_operand (offset_rtx, NULL_RTX);
4937 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4938 }
4939
4940 /* If we have an expression in OFFSET_RTX and a non-zero
4941 byte offset in BITPOS, adding the byte offset before the
4942 OFFSET_RTX results in better intermediate code, which makes
4943 later rtl optimization passes perform better.
4944
4945 We prefer intermediate code like this:
4946
4947 r124:DI=r123:DI+0x18
4948 [r124:DI]=r121:DI
4949
4950 ... instead of ...
4951
4952 r124:DI=r123:DI+0x10
4953 [r124:DI+0x8]=r121:DI
4954
4955 This is only done for aligned data values, as these can
4956 be expected to result in single move instructions. */
4957 if (mode1 != VOIDmode
4958 && bitpos != 0
4959 && bitsize > 0
4960 && (bitpos % bitsize) == 0
4961 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4962 && MEM_ALIGN (to_rtx) >= GET_MODE_ALIGNMENT (mode1))
4963 {
4964 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4965 bitregion_start = 0;
4966 if (bitregion_end >= (unsigned HOST_WIDE_INT) bitpos)
4967 bitregion_end -= bitpos;
4968 bitpos = 0;
4969 }
4970
4971 to_rtx = offset_address (to_rtx, offset_rtx,
4972 highest_pow2_factor_for_target (to,
4973 offset));
4974 }
4975
4976 /* No action is needed if the target is not a memory and the field
4977 lies completely outside that target. This can occur if the source
4978 code contains an out-of-bounds access to a small array. */
4979 if (!MEM_P (to_rtx)
4980 && GET_MODE (to_rtx) != BLKmode
4981 && (unsigned HOST_WIDE_INT) bitpos
4982 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4983 {
4984 expand_normal (from);
4985 result = NULL;
4986 }
4987 /* Handle expand_expr of a complex value returning a CONCAT. */
4988 else if (GET_CODE (to_rtx) == CONCAT)
4989 {
4990 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4991 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4992 && bitpos == 0
4993 && bitsize == mode_bitsize)
4994 result = store_expr (from, to_rtx, false, nontemporal);
4995 else if (bitsize == mode_bitsize / 2
4996 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4997 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4998 nontemporal);
4999 else if (bitpos + bitsize <= mode_bitsize / 2)
5000 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
5001 bitregion_start, bitregion_end,
5002 mode1, from,
5003 get_alias_set (to), nontemporal);
5004 else if (bitpos >= mode_bitsize / 2)
5005 result = store_field (XEXP (to_rtx, 1), bitsize,
5006 bitpos - mode_bitsize / 2,
5007 bitregion_start, bitregion_end,
5008 mode1, from,
5009 get_alias_set (to), nontemporal);
5010 else if (bitpos == 0 && bitsize == mode_bitsize)
5011 {
5012 rtx from_rtx;
5013 result = expand_normal (from);
5014 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
5015 TYPE_MODE (TREE_TYPE (from)), 0);
5016 emit_move_insn (XEXP (to_rtx, 0),
5017 read_complex_part (from_rtx, false));
5018 emit_move_insn (XEXP (to_rtx, 1),
5019 read_complex_part (from_rtx, true));
5020 }
5021 else
5022 {
5023 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
5024 GET_MODE_SIZE (GET_MODE (to_rtx)));
5025 write_complex_part (temp, XEXP (to_rtx, 0), false);
5026 write_complex_part (temp, XEXP (to_rtx, 1), true);
5027 result = store_field (temp, bitsize, bitpos,
5028 bitregion_start, bitregion_end,
5029 mode1, from,
5030 get_alias_set (to), nontemporal);
5031 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
5032 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
5033 }
5034 }
5035 else
5036 {
5037 if (MEM_P (to_rtx))
5038 {
5039 /* If the field is at offset zero, we could have been given the
5040 DECL_RTX of the parent struct. Don't munge it. */
5041 to_rtx = shallow_copy_rtx (to_rtx);
5042 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
5043 if (volatilep)
5044 MEM_VOLATILE_P (to_rtx) = 1;
5045 }
5046
5047 if (optimize_bitfield_assignment_op (bitsize, bitpos,
5048 bitregion_start, bitregion_end,
5049 mode1,
5050 to_rtx, to, from))
5051 result = NULL;
5052 else
5053 result = store_field (to_rtx, bitsize, bitpos,
5054 bitregion_start, bitregion_end,
5055 mode1, from,
5056 get_alias_set (to), nontemporal);
5057 }
5058
5059 if (result)
5060 preserve_temp_slots (result);
5061 pop_temp_slots ();
5062 return;
5063 }
5064
5065 /* If the rhs is a function call and its value is not an aggregate,
5066 call the function before we start to compute the lhs.
5067 This is needed for correct code for cases such as
5068 val = setjmp (buf) on machines where reference to val
5069 requires loading up part of an address in a separate insn.
5070
5071 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5072 since it might be a promoted variable where the zero- or sign- extension
5073 needs to be done. Handling this in the normal way is safe because no
5074 computation is done before the call. The same is true for SSA names. */
5075 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
5076 && COMPLETE_TYPE_P (TREE_TYPE (from))
5077 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
5078 && ! (((TREE_CODE (to) == VAR_DECL
5079 || TREE_CODE (to) == PARM_DECL
5080 || TREE_CODE (to) == RESULT_DECL)
5081 && REG_P (DECL_RTL (to)))
5082 || TREE_CODE (to) == SSA_NAME))
5083 {
5084 rtx value;
5085 rtx bounds;
5086
5087 push_temp_slots ();
5088 value = expand_normal (from);
5089
5090 /* Split value and bounds to store them separately. */
5091 chkp_split_slot (value, &value, &bounds);
5092
5093 if (to_rtx == 0)
5094 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5095
5096 /* Handle calls that return values in multiple non-contiguous locations.
5097 The Irix 6 ABI has examples of this. */
5098 if (GET_CODE (to_rtx) == PARALLEL)
5099 {
5100 if (GET_CODE (value) == PARALLEL)
5101 emit_group_move (to_rtx, value);
5102 else
5103 emit_group_load (to_rtx, value, TREE_TYPE (from),
5104 int_size_in_bytes (TREE_TYPE (from)));
5105 }
5106 else if (GET_CODE (value) == PARALLEL)
5107 emit_group_store (to_rtx, value, TREE_TYPE (from),
5108 int_size_in_bytes (TREE_TYPE (from)));
5109 else if (GET_MODE (to_rtx) == BLKmode)
5110 {
5111 /* Handle calls that return BLKmode values in registers. */
5112 if (REG_P (value))
5113 copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from));
5114 else
5115 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
5116 }
5117 else
5118 {
5119 if (POINTER_TYPE_P (TREE_TYPE (to)))
5120 value = convert_memory_address_addr_space
5121 (GET_MODE (to_rtx), value,
5122 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
5123
5124 emit_move_insn (to_rtx, value);
5125 }
5126
5127 /* Store bounds if required. */
5128 if (bounds
5129 && (BOUNDED_P (to) || chkp_type_has_pointer (TREE_TYPE (to))))
5130 {
5131 gcc_assert (MEM_P (to_rtx));
5132 chkp_emit_bounds_store (bounds, value, to_rtx);
5133 }
5134
5135 preserve_temp_slots (to_rtx);
5136 pop_temp_slots ();
5137 return;
5138 }
5139
5140 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5141 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5142
5143 /* Don't move directly into a return register. */
5144 if (TREE_CODE (to) == RESULT_DECL
5145 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
5146 {
5147 rtx temp;
5148
5149 push_temp_slots ();
5150
5151 /* If the source is itself a return value, it still is in a pseudo at
5152 this point so we can move it back to the return register directly. */
5153 if (REG_P (to_rtx)
5154 && TYPE_MODE (TREE_TYPE (from)) == BLKmode
5155 && TREE_CODE (from) != CALL_EXPR)
5156 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
5157 else
5158 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
5159
5160 /* Handle calls that return values in multiple non-contiguous locations.
5161 The Irix 6 ABI has examples of this. */
5162 if (GET_CODE (to_rtx) == PARALLEL)
5163 {
5164 if (GET_CODE (temp) == PARALLEL)
5165 emit_group_move (to_rtx, temp);
5166 else
5167 emit_group_load (to_rtx, temp, TREE_TYPE (from),
5168 int_size_in_bytes (TREE_TYPE (from)));
5169 }
5170 else if (temp)
5171 emit_move_insn (to_rtx, temp);
5172
5173 preserve_temp_slots (to_rtx);
5174 pop_temp_slots ();
5175 return;
5176 }
5177
5178 /* In case we are returning the contents of an object which overlaps
5179 the place the value is being stored, use a safe function when copying
5180 a value through a pointer into a structure value return block. */
5181 if (TREE_CODE (to) == RESULT_DECL
5182 && TREE_CODE (from) == INDIRECT_REF
5183 && ADDR_SPACE_GENERIC_P
5184 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
5185 && refs_may_alias_p (to, from)
5186 && cfun->returns_struct
5187 && !cfun->returns_pcc_struct)
5188 {
5189 rtx from_rtx, size;
5190
5191 push_temp_slots ();
5192 size = expr_size (from);
5193 from_rtx = expand_normal (from);
5194
5195 emit_library_call (memmove_libfunc, LCT_NORMAL,
5196 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
5197 XEXP (from_rtx, 0), Pmode,
5198 convert_to_mode (TYPE_MODE (sizetype),
5199 size, TYPE_UNSIGNED (sizetype)),
5200 TYPE_MODE (sizetype));
5201
5202 preserve_temp_slots (to_rtx);
5203 pop_temp_slots ();
5204 return;
5205 }
5206
5207 /* Compute FROM and store the value in the rtx we got. */
5208
5209 push_temp_slots ();
5210 result = store_expr_with_bounds (from, to_rtx, 0, nontemporal, to);
5211 preserve_temp_slots (result);
5212 pop_temp_slots ();
5213 return;
5214 }
5215
5216 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5217 succeeded, false otherwise. */
5218
5219 bool
5220 emit_storent_insn (rtx to, rtx from)
5221 {
5222 struct expand_operand ops[2];
5223 machine_mode mode = GET_MODE (to);
5224 enum insn_code code = optab_handler (storent_optab, mode);
5225
5226 if (code == CODE_FOR_nothing)
5227 return false;
5228
5229 create_fixed_operand (&ops[0], to);
5230 create_input_operand (&ops[1], from, mode);
5231 return maybe_expand_insn (code, 2, ops);
5232 }
5233
5234 /* Generate code for computing expression EXP,
5235 and storing the value into TARGET.
5236
5237 If the mode is BLKmode then we may return TARGET itself.
5238 It turns out that in BLKmode it doesn't cause a problem.
5239 because C has no operators that could combine two different
5240 assignments into the same BLKmode object with different values
5241 with no sequence point. Will other languages need this to
5242 be more thorough?
5243
5244 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5245 stack, and block moves may need to be treated specially.
5246
5247 If NONTEMPORAL is true, try using a nontemporal store instruction.
5248
5249 If BTARGET is not NULL then computed bounds of EXP are
5250 associated with BTARGET. */
5251
5252 rtx
5253 store_expr_with_bounds (tree exp, rtx target, int call_param_p,
5254 bool nontemporal, tree btarget)
5255 {
5256 rtx temp;
5257 rtx alt_rtl = NULL_RTX;
5258 location_t loc = curr_insn_location ();
5259
5260 if (VOID_TYPE_P (TREE_TYPE (exp)))
5261 {
5262 /* C++ can generate ?: expressions with a throw expression in one
5263 branch and an rvalue in the other. Here, we resolve attempts to
5264 store the throw expression's nonexistent result. */
5265 gcc_assert (!call_param_p);
5266 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5267 return NULL_RTX;
5268 }
5269 if (TREE_CODE (exp) == COMPOUND_EXPR)
5270 {
5271 /* Perform first part of compound expression, then assign from second
5272 part. */
5273 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5274 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5275 return store_expr_with_bounds (TREE_OPERAND (exp, 1), target,
5276 call_param_p, nontemporal, btarget);
5277 }
5278 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5279 {
5280 /* For conditional expression, get safe form of the target. Then
5281 test the condition, doing the appropriate assignment on either
5282 side. This avoids the creation of unnecessary temporaries.
5283 For non-BLKmode, it is more efficient not to do this. */
5284
5285 rtx_code_label *lab1 = gen_label_rtx (), *lab2 = gen_label_rtx ();
5286
5287 do_pending_stack_adjust ();
5288 NO_DEFER_POP;
5289 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5290 store_expr_with_bounds (TREE_OPERAND (exp, 1), target, call_param_p,
5291 nontemporal, btarget);
5292 emit_jump_insn (gen_jump (lab2));
5293 emit_barrier ();
5294 emit_label (lab1);
5295 store_expr_with_bounds (TREE_OPERAND (exp, 2), target, call_param_p,
5296 nontemporal, btarget);
5297 emit_label (lab2);
5298 OK_DEFER_POP;
5299
5300 return NULL_RTX;
5301 }
5302 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5303 /* If this is a scalar in a register that is stored in a wider mode
5304 than the declared mode, compute the result into its declared mode
5305 and then convert to the wider mode. Our value is the computed
5306 expression. */
5307 {
5308 rtx inner_target = 0;
5309
5310 /* We can do the conversion inside EXP, which will often result
5311 in some optimizations. Do the conversion in two steps: first
5312 change the signedness, if needed, then the extend. But don't
5313 do this if the type of EXP is a subtype of something else
5314 since then the conversion might involve more than just
5315 converting modes. */
5316 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5317 && TREE_TYPE (TREE_TYPE (exp)) == 0
5318 && GET_MODE_PRECISION (GET_MODE (target))
5319 == TYPE_PRECISION (TREE_TYPE (exp)))
5320 {
5321 if (!SUBREG_CHECK_PROMOTED_SIGN (target,
5322 TYPE_UNSIGNED (TREE_TYPE (exp))))
5323 {
5324 /* Some types, e.g. Fortran's logical*4, won't have a signed
5325 version, so use the mode instead. */
5326 tree ntype
5327 = (signed_or_unsigned_type_for
5328 (SUBREG_PROMOTED_SIGN (target), TREE_TYPE (exp)));
5329 if (ntype == NULL)
5330 ntype = lang_hooks.types.type_for_mode
5331 (TYPE_MODE (TREE_TYPE (exp)),
5332 SUBREG_PROMOTED_SIGN (target));
5333
5334 exp = fold_convert_loc (loc, ntype, exp);
5335 }
5336
5337 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5338 (GET_MODE (SUBREG_REG (target)),
5339 SUBREG_PROMOTED_SIGN (target)),
5340 exp);
5341
5342 inner_target = SUBREG_REG (target);
5343 }
5344
5345 temp = expand_expr (exp, inner_target, VOIDmode,
5346 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5347
5348 /* Handle bounds returned by call. */
5349 if (TREE_CODE (exp) == CALL_EXPR)
5350 {
5351 rtx bounds;
5352 chkp_split_slot (temp, &temp, &bounds);
5353 if (bounds && btarget)
5354 {
5355 gcc_assert (TREE_CODE (btarget) == SSA_NAME);
5356 rtx tmp = targetm.calls.load_returned_bounds (bounds);
5357 chkp_set_rtl_bounds (btarget, tmp);
5358 }
5359 }
5360
5361 /* If TEMP is a VOIDmode constant, use convert_modes to make
5362 sure that we properly convert it. */
5363 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5364 {
5365 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5366 temp, SUBREG_PROMOTED_SIGN (target));
5367 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5368 GET_MODE (target), temp,
5369 SUBREG_PROMOTED_SIGN (target));
5370 }
5371
5372 convert_move (SUBREG_REG (target), temp,
5373 SUBREG_PROMOTED_SIGN (target));
5374
5375 return NULL_RTX;
5376 }
5377 else if ((TREE_CODE (exp) == STRING_CST
5378 || (TREE_CODE (exp) == MEM_REF
5379 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5380 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5381 == STRING_CST
5382 && integer_zerop (TREE_OPERAND (exp, 1))))
5383 && !nontemporal && !call_param_p
5384 && MEM_P (target))
5385 {
5386 /* Optimize initialization of an array with a STRING_CST. */
5387 HOST_WIDE_INT exp_len, str_copy_len;
5388 rtx dest_mem;
5389 tree str = TREE_CODE (exp) == STRING_CST
5390 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5391
5392 exp_len = int_expr_size (exp);
5393 if (exp_len <= 0)
5394 goto normal_expr;
5395
5396 if (TREE_STRING_LENGTH (str) <= 0)
5397 goto normal_expr;
5398
5399 str_copy_len = strlen (TREE_STRING_POINTER (str));
5400 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5401 goto normal_expr;
5402
5403 str_copy_len = TREE_STRING_LENGTH (str);
5404 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5405 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5406 {
5407 str_copy_len += STORE_MAX_PIECES - 1;
5408 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5409 }
5410 str_copy_len = MIN (str_copy_len, exp_len);
5411 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5412 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5413 MEM_ALIGN (target), false))
5414 goto normal_expr;
5415
5416 dest_mem = target;
5417
5418 dest_mem = store_by_pieces (dest_mem,
5419 str_copy_len, builtin_strncpy_read_str,
5420 CONST_CAST (char *,
5421 TREE_STRING_POINTER (str)),
5422 MEM_ALIGN (target), false,
5423 exp_len > str_copy_len ? 1 : 0);
5424 if (exp_len > str_copy_len)
5425 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5426 GEN_INT (exp_len - str_copy_len),
5427 BLOCK_OP_NORMAL);
5428 return NULL_RTX;
5429 }
5430 else
5431 {
5432 rtx tmp_target;
5433
5434 normal_expr:
5435 /* If we want to use a nontemporal store, force the value to
5436 register first. */
5437 tmp_target = nontemporal ? NULL_RTX : target;
5438 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5439 (call_param_p
5440 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5441 &alt_rtl, false);
5442
5443 /* Handle bounds returned by call. */
5444 if (TREE_CODE (exp) == CALL_EXPR)
5445 {
5446 rtx bounds;
5447 chkp_split_slot (temp, &temp, &bounds);
5448 if (bounds && btarget)
5449 {
5450 gcc_assert (TREE_CODE (btarget) == SSA_NAME);
5451 rtx tmp = targetm.calls.load_returned_bounds (bounds);
5452 chkp_set_rtl_bounds (btarget, tmp);
5453 }
5454 }
5455 }
5456
5457 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5458 the same as that of TARGET, adjust the constant. This is needed, for
5459 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5460 only a word-sized value. */
5461 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5462 && TREE_CODE (exp) != ERROR_MARK
5463 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5464 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5465 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5466
5467 /* If value was not generated in the target, store it there.
5468 Convert the value to TARGET's type first if necessary and emit the
5469 pending incrementations that have been queued when expanding EXP.
5470 Note that we cannot emit the whole queue blindly because this will
5471 effectively disable the POST_INC optimization later.
5472
5473 If TEMP and TARGET compare equal according to rtx_equal_p, but
5474 one or both of them are volatile memory refs, we have to distinguish
5475 two cases:
5476 - expand_expr has used TARGET. In this case, we must not generate
5477 another copy. This can be detected by TARGET being equal according
5478 to == .
5479 - expand_expr has not used TARGET - that means that the source just
5480 happens to have the same RTX form. Since temp will have been created
5481 by expand_expr, it will compare unequal according to == .
5482 We must generate a copy in this case, to reach the correct number
5483 of volatile memory references. */
5484
5485 if ((! rtx_equal_p (temp, target)
5486 || (temp != target && (side_effects_p (temp)
5487 || side_effects_p (target))))
5488 && TREE_CODE (exp) != ERROR_MARK
5489 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5490 but TARGET is not valid memory reference, TEMP will differ
5491 from TARGET although it is really the same location. */
5492 && !(alt_rtl
5493 && rtx_equal_p (alt_rtl, target)
5494 && !side_effects_p (alt_rtl)
5495 && !side_effects_p (target))
5496 /* If there's nothing to copy, don't bother. Don't call
5497 expr_size unless necessary, because some front-ends (C++)
5498 expr_size-hook must not be given objects that are not
5499 supposed to be bit-copied or bit-initialized. */
5500 && expr_size (exp) != const0_rtx)
5501 {
5502 if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode)
5503 {
5504 if (GET_MODE (target) == BLKmode)
5505 {
5506 /* Handle calls that return BLKmode values in registers. */
5507 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
5508 copy_blkmode_from_reg (target, temp, TREE_TYPE (exp));
5509 else
5510 store_bit_field (target,
5511 INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5512 0, 0, 0, GET_MODE (temp), temp);
5513 }
5514 else
5515 convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5516 }
5517
5518 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5519 {
5520 /* Handle copying a string constant into an array. The string
5521 constant may be shorter than the array. So copy just the string's
5522 actual length, and clear the rest. First get the size of the data
5523 type of the string, which is actually the size of the target. */
5524 rtx size = expr_size (exp);
5525
5526 if (CONST_INT_P (size)
5527 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5528 emit_block_move (target, temp, size,
5529 (call_param_p
5530 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5531 else
5532 {
5533 machine_mode pointer_mode
5534 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5535 machine_mode address_mode = get_address_mode (target);
5536
5537 /* Compute the size of the data to copy from the string. */
5538 tree copy_size
5539 = size_binop_loc (loc, MIN_EXPR,
5540 make_tree (sizetype, size),
5541 size_int (TREE_STRING_LENGTH (exp)));
5542 rtx copy_size_rtx
5543 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5544 (call_param_p
5545 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5546 rtx_code_label *label = 0;
5547
5548 /* Copy that much. */
5549 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5550 TYPE_UNSIGNED (sizetype));
5551 emit_block_move (target, temp, copy_size_rtx,
5552 (call_param_p
5553 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5554
5555 /* Figure out how much is left in TARGET that we have to clear.
5556 Do all calculations in pointer_mode. */
5557 if (CONST_INT_P (copy_size_rtx))
5558 {
5559 size = plus_constant (address_mode, size,
5560 -INTVAL (copy_size_rtx));
5561 target = adjust_address (target, BLKmode,
5562 INTVAL (copy_size_rtx));
5563 }
5564 else
5565 {
5566 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5567 copy_size_rtx, NULL_RTX, 0,
5568 OPTAB_LIB_WIDEN);
5569
5570 if (GET_MODE (copy_size_rtx) != address_mode)
5571 copy_size_rtx = convert_to_mode (address_mode,
5572 copy_size_rtx,
5573 TYPE_UNSIGNED (sizetype));
5574
5575 target = offset_address (target, copy_size_rtx,
5576 highest_pow2_factor (copy_size));
5577 label = gen_label_rtx ();
5578 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5579 GET_MODE (size), 0, label);
5580 }
5581
5582 if (size != const0_rtx)
5583 clear_storage (target, size, BLOCK_OP_NORMAL);
5584
5585 if (label)
5586 emit_label (label);
5587 }
5588 }
5589 /* Handle calls that return values in multiple non-contiguous locations.
5590 The Irix 6 ABI has examples of this. */
5591 else if (GET_CODE (target) == PARALLEL)
5592 {
5593 if (GET_CODE (temp) == PARALLEL)
5594 emit_group_move (target, temp);
5595 else
5596 emit_group_load (target, temp, TREE_TYPE (exp),
5597 int_size_in_bytes (TREE_TYPE (exp)));
5598 }
5599 else if (GET_CODE (temp) == PARALLEL)
5600 emit_group_store (target, temp, TREE_TYPE (exp),
5601 int_size_in_bytes (TREE_TYPE (exp)));
5602 else if (GET_MODE (temp) == BLKmode)
5603 emit_block_move (target, temp, expr_size (exp),
5604 (call_param_p
5605 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5606 /* If we emit a nontemporal store, there is nothing else to do. */
5607 else if (nontemporal && emit_storent_insn (target, temp))
5608 ;
5609 else
5610 {
5611 temp = force_operand (temp, target);
5612 if (temp != target)
5613 emit_move_insn (target, temp);
5614 }
5615 }
5616
5617 return NULL_RTX;
5618 }
5619
5620 /* Same as store_expr_with_bounds but ignoring bounds of EXP. */
5621 rtx
5622 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
5623 {
5624 return store_expr_with_bounds (exp, target, call_param_p, nontemporal, NULL);
5625 }
5626 \f
5627 /* Return true if field F of structure TYPE is a flexible array. */
5628
5629 static bool
5630 flexible_array_member_p (const_tree f, const_tree type)
5631 {
5632 const_tree tf;
5633
5634 tf = TREE_TYPE (f);
5635 return (DECL_CHAIN (f) == NULL
5636 && TREE_CODE (tf) == ARRAY_TYPE
5637 && TYPE_DOMAIN (tf)
5638 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5639 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5640 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5641 && int_size_in_bytes (type) >= 0);
5642 }
5643
5644 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5645 must have in order for it to completely initialize a value of type TYPE.
5646 Return -1 if the number isn't known.
5647
5648 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5649
5650 static HOST_WIDE_INT
5651 count_type_elements (const_tree type, bool for_ctor_p)
5652 {
5653 switch (TREE_CODE (type))
5654 {
5655 case ARRAY_TYPE:
5656 {
5657 tree nelts;
5658
5659 nelts = array_type_nelts (type);
5660 if (nelts && tree_fits_uhwi_p (nelts))
5661 {
5662 unsigned HOST_WIDE_INT n;
5663
5664 n = tree_to_uhwi (nelts) + 1;
5665 if (n == 0 || for_ctor_p)
5666 return n;
5667 else
5668 return n * count_type_elements (TREE_TYPE (type), false);
5669 }
5670 return for_ctor_p ? -1 : 1;
5671 }
5672
5673 case RECORD_TYPE:
5674 {
5675 unsigned HOST_WIDE_INT n;
5676 tree f;
5677
5678 n = 0;
5679 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5680 if (TREE_CODE (f) == FIELD_DECL)
5681 {
5682 if (!for_ctor_p)
5683 n += count_type_elements (TREE_TYPE (f), false);
5684 else if (!flexible_array_member_p (f, type))
5685 /* Don't count flexible arrays, which are not supposed
5686 to be initialized. */
5687 n += 1;
5688 }
5689
5690 return n;
5691 }
5692
5693 case UNION_TYPE:
5694 case QUAL_UNION_TYPE:
5695 {
5696 tree f;
5697 HOST_WIDE_INT n, m;
5698
5699 gcc_assert (!for_ctor_p);
5700 /* Estimate the number of scalars in each field and pick the
5701 maximum. Other estimates would do instead; the idea is simply
5702 to make sure that the estimate is not sensitive to the ordering
5703 of the fields. */
5704 n = 1;
5705 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5706 if (TREE_CODE (f) == FIELD_DECL)
5707 {
5708 m = count_type_elements (TREE_TYPE (f), false);
5709 /* If the field doesn't span the whole union, add an extra
5710 scalar for the rest. */
5711 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5712 TYPE_SIZE (type)) != 1)
5713 m++;
5714 if (n < m)
5715 n = m;
5716 }
5717 return n;
5718 }
5719
5720 case COMPLEX_TYPE:
5721 return 2;
5722
5723 case VECTOR_TYPE:
5724 return TYPE_VECTOR_SUBPARTS (type);
5725
5726 case INTEGER_TYPE:
5727 case REAL_TYPE:
5728 case FIXED_POINT_TYPE:
5729 case ENUMERAL_TYPE:
5730 case BOOLEAN_TYPE:
5731 case POINTER_TYPE:
5732 case OFFSET_TYPE:
5733 case REFERENCE_TYPE:
5734 case NULLPTR_TYPE:
5735 return 1;
5736
5737 case ERROR_MARK:
5738 return 0;
5739
5740 case VOID_TYPE:
5741 case METHOD_TYPE:
5742 case FUNCTION_TYPE:
5743 case LANG_TYPE:
5744 default:
5745 gcc_unreachable ();
5746 }
5747 }
5748
5749 /* Helper for categorize_ctor_elements. Identical interface. */
5750
5751 static bool
5752 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5753 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5754 {
5755 unsigned HOST_WIDE_INT idx;
5756 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5757 tree value, purpose, elt_type;
5758
5759 /* Whether CTOR is a valid constant initializer, in accordance with what
5760 initializer_constant_valid_p does. If inferred from the constructor
5761 elements, true until proven otherwise. */
5762 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5763 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5764
5765 nz_elts = 0;
5766 init_elts = 0;
5767 num_fields = 0;
5768 elt_type = NULL_TREE;
5769
5770 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5771 {
5772 HOST_WIDE_INT mult = 1;
5773
5774 if (purpose && TREE_CODE (purpose) == RANGE_EXPR)
5775 {
5776 tree lo_index = TREE_OPERAND (purpose, 0);
5777 tree hi_index = TREE_OPERAND (purpose, 1);
5778
5779 if (tree_fits_uhwi_p (lo_index) && tree_fits_uhwi_p (hi_index))
5780 mult = (tree_to_uhwi (hi_index)
5781 - tree_to_uhwi (lo_index) + 1);
5782 }
5783 num_fields += mult;
5784 elt_type = TREE_TYPE (value);
5785
5786 switch (TREE_CODE (value))
5787 {
5788 case CONSTRUCTOR:
5789 {
5790 HOST_WIDE_INT nz = 0, ic = 0;
5791
5792 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5793 p_complete);
5794
5795 nz_elts += mult * nz;
5796 init_elts += mult * ic;
5797
5798 if (const_from_elts_p && const_p)
5799 const_p = const_elt_p;
5800 }
5801 break;
5802
5803 case INTEGER_CST:
5804 case REAL_CST:
5805 case FIXED_CST:
5806 if (!initializer_zerop (value))
5807 nz_elts += mult;
5808 init_elts += mult;
5809 break;
5810
5811 case STRING_CST:
5812 nz_elts += mult * TREE_STRING_LENGTH (value);
5813 init_elts += mult * TREE_STRING_LENGTH (value);
5814 break;
5815
5816 case COMPLEX_CST:
5817 if (!initializer_zerop (TREE_REALPART (value)))
5818 nz_elts += mult;
5819 if (!initializer_zerop (TREE_IMAGPART (value)))
5820 nz_elts += mult;
5821 init_elts += mult;
5822 break;
5823
5824 case VECTOR_CST:
5825 {
5826 unsigned i;
5827 for (i = 0; i < VECTOR_CST_NELTS (value); ++i)
5828 {
5829 tree v = VECTOR_CST_ELT (value, i);
5830 if (!initializer_zerop (v))
5831 nz_elts += mult;
5832 init_elts += mult;
5833 }
5834 }
5835 break;
5836
5837 default:
5838 {
5839 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5840 nz_elts += mult * tc;
5841 init_elts += mult * tc;
5842
5843 if (const_from_elts_p && const_p)
5844 const_p = initializer_constant_valid_p (value, elt_type)
5845 != NULL_TREE;
5846 }
5847 break;
5848 }
5849 }
5850
5851 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5852 num_fields, elt_type))
5853 *p_complete = false;
5854
5855 *p_nz_elts += nz_elts;
5856 *p_init_elts += init_elts;
5857
5858 return const_p;
5859 }
5860
5861 /* Examine CTOR to discover:
5862 * how many scalar fields are set to nonzero values,
5863 and place it in *P_NZ_ELTS;
5864 * how many scalar fields in total are in CTOR,
5865 and place it in *P_ELT_COUNT.
5866 * whether the constructor is complete -- in the sense that every
5867 meaningful byte is explicitly given a value --
5868 and place it in *P_COMPLETE.
5869
5870 Return whether or not CTOR is a valid static constant initializer, the same
5871 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5872
5873 bool
5874 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5875 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5876 {
5877 *p_nz_elts = 0;
5878 *p_init_elts = 0;
5879 *p_complete = true;
5880
5881 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5882 }
5883
5884 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5885 of which had type LAST_TYPE. Each element was itself a complete
5886 initializer, in the sense that every meaningful byte was explicitly
5887 given a value. Return true if the same is true for the constructor
5888 as a whole. */
5889
5890 bool
5891 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5892 const_tree last_type)
5893 {
5894 if (TREE_CODE (type) == UNION_TYPE
5895 || TREE_CODE (type) == QUAL_UNION_TYPE)
5896 {
5897 if (num_elts == 0)
5898 return false;
5899
5900 gcc_assert (num_elts == 1 && last_type);
5901
5902 /* ??? We could look at each element of the union, and find the
5903 largest element. Which would avoid comparing the size of the
5904 initialized element against any tail padding in the union.
5905 Doesn't seem worth the effort... */
5906 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5907 }
5908
5909 return count_type_elements (type, true) == num_elts;
5910 }
5911
5912 /* Return 1 if EXP contains mostly (3/4) zeros. */
5913
5914 static int
5915 mostly_zeros_p (const_tree exp)
5916 {
5917 if (TREE_CODE (exp) == CONSTRUCTOR)
5918 {
5919 HOST_WIDE_INT nz_elts, init_elts;
5920 bool complete_p;
5921
5922 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5923 return !complete_p || nz_elts < init_elts / 4;
5924 }
5925
5926 return initializer_zerop (exp);
5927 }
5928
5929 /* Return 1 if EXP contains all zeros. */
5930
5931 static int
5932 all_zeros_p (const_tree exp)
5933 {
5934 if (TREE_CODE (exp) == CONSTRUCTOR)
5935 {
5936 HOST_WIDE_INT nz_elts, init_elts;
5937 bool complete_p;
5938
5939 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5940 return nz_elts == 0;
5941 }
5942
5943 return initializer_zerop (exp);
5944 }
5945 \f
5946 /* Helper function for store_constructor.
5947 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5948 CLEARED is as for store_constructor.
5949 ALIAS_SET is the alias set to use for any stores.
5950
5951 This provides a recursive shortcut back to store_constructor when it isn't
5952 necessary to go through store_field. This is so that we can pass through
5953 the cleared field to let store_constructor know that we may not have to
5954 clear a substructure if the outer structure has already been cleared. */
5955
5956 static void
5957 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5958 HOST_WIDE_INT bitpos, machine_mode mode,
5959 tree exp, int cleared, alias_set_type alias_set)
5960 {
5961 if (TREE_CODE (exp) == CONSTRUCTOR
5962 /* We can only call store_constructor recursively if the size and
5963 bit position are on a byte boundary. */
5964 && bitpos % BITS_PER_UNIT == 0
5965 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5966 /* If we have a nonzero bitpos for a register target, then we just
5967 let store_field do the bitfield handling. This is unlikely to
5968 generate unnecessary clear instructions anyways. */
5969 && (bitpos == 0 || MEM_P (target)))
5970 {
5971 if (MEM_P (target))
5972 target
5973 = adjust_address (target,
5974 GET_MODE (target) == BLKmode
5975 || 0 != (bitpos
5976 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5977 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5978
5979
5980 /* Update the alias set, if required. */
5981 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5982 && MEM_ALIAS_SET (target) != 0)
5983 {
5984 target = copy_rtx (target);
5985 set_mem_alias_set (target, alias_set);
5986 }
5987
5988 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5989 }
5990 else
5991 store_field (target, bitsize, bitpos, 0, 0, mode, exp, alias_set, false);
5992 }
5993
5994
5995 /* Returns the number of FIELD_DECLs in TYPE. */
5996
5997 static int
5998 fields_length (const_tree type)
5999 {
6000 tree t = TYPE_FIELDS (type);
6001 int count = 0;
6002
6003 for (; t; t = DECL_CHAIN (t))
6004 if (TREE_CODE (t) == FIELD_DECL)
6005 ++count;
6006
6007 return count;
6008 }
6009
6010
6011 /* Store the value of constructor EXP into the rtx TARGET.
6012 TARGET is either a REG or a MEM; we know it cannot conflict, since
6013 safe_from_p has been called.
6014 CLEARED is true if TARGET is known to have been zero'd.
6015 SIZE is the number of bytes of TARGET we are allowed to modify: this
6016 may not be the same as the size of EXP if we are assigning to a field
6017 which has been packed to exclude padding bits. */
6018
6019 static void
6020 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
6021 {
6022 tree type = TREE_TYPE (exp);
6023 #ifdef WORD_REGISTER_OPERATIONS
6024 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
6025 #endif
6026
6027 switch (TREE_CODE (type))
6028 {
6029 case RECORD_TYPE:
6030 case UNION_TYPE:
6031 case QUAL_UNION_TYPE:
6032 {
6033 unsigned HOST_WIDE_INT idx;
6034 tree field, value;
6035
6036 /* If size is zero or the target is already cleared, do nothing. */
6037 if (size == 0 || cleared)
6038 cleared = 1;
6039 /* We either clear the aggregate or indicate the value is dead. */
6040 else if ((TREE_CODE (type) == UNION_TYPE
6041 || TREE_CODE (type) == QUAL_UNION_TYPE)
6042 && ! CONSTRUCTOR_ELTS (exp))
6043 /* If the constructor is empty, clear the union. */
6044 {
6045 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
6046 cleared = 1;
6047 }
6048
6049 /* If we are building a static constructor into a register,
6050 set the initial value as zero so we can fold the value into
6051 a constant. But if more than one register is involved,
6052 this probably loses. */
6053 else if (REG_P (target) && TREE_STATIC (exp)
6054 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
6055 {
6056 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6057 cleared = 1;
6058 }
6059
6060 /* If the constructor has fewer fields than the structure or
6061 if we are initializing the structure to mostly zeros, clear
6062 the whole structure first. Don't do this if TARGET is a
6063 register whose mode size isn't equal to SIZE since
6064 clear_storage can't handle this case. */
6065 else if (size > 0
6066 && (((int)vec_safe_length (CONSTRUCTOR_ELTS (exp))
6067 != fields_length (type))
6068 || mostly_zeros_p (exp))
6069 && (!REG_P (target)
6070 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
6071 == size)))
6072 {
6073 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6074 cleared = 1;
6075 }
6076
6077 if (REG_P (target) && !cleared)
6078 emit_clobber (target);
6079
6080 /* Store each element of the constructor into the
6081 corresponding field of TARGET. */
6082 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
6083 {
6084 machine_mode mode;
6085 HOST_WIDE_INT bitsize;
6086 HOST_WIDE_INT bitpos = 0;
6087 tree offset;
6088 rtx to_rtx = target;
6089
6090 /* Just ignore missing fields. We cleared the whole
6091 structure, above, if any fields are missing. */
6092 if (field == 0)
6093 continue;
6094
6095 if (cleared && initializer_zerop (value))
6096 continue;
6097
6098 if (tree_fits_uhwi_p (DECL_SIZE (field)))
6099 bitsize = tree_to_uhwi (DECL_SIZE (field));
6100 else
6101 bitsize = -1;
6102
6103 mode = DECL_MODE (field);
6104 if (DECL_BIT_FIELD (field))
6105 mode = VOIDmode;
6106
6107 offset = DECL_FIELD_OFFSET (field);
6108 if (tree_fits_shwi_p (offset)
6109 && tree_fits_shwi_p (bit_position (field)))
6110 {
6111 bitpos = int_bit_position (field);
6112 offset = 0;
6113 }
6114 else
6115 bitpos = tree_to_shwi (DECL_FIELD_BIT_OFFSET (field));
6116
6117 if (offset)
6118 {
6119 machine_mode address_mode;
6120 rtx offset_rtx;
6121
6122 offset
6123 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
6124 make_tree (TREE_TYPE (exp),
6125 target));
6126
6127 offset_rtx = expand_normal (offset);
6128 gcc_assert (MEM_P (to_rtx));
6129
6130 address_mode = get_address_mode (to_rtx);
6131 if (GET_MODE (offset_rtx) != address_mode)
6132 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
6133
6134 to_rtx = offset_address (to_rtx, offset_rtx,
6135 highest_pow2_factor (offset));
6136 }
6137
6138 #ifdef WORD_REGISTER_OPERATIONS
6139 /* If this initializes a field that is smaller than a
6140 word, at the start of a word, try to widen it to a full
6141 word. This special case allows us to output C++ member
6142 function initializations in a form that the optimizers
6143 can understand. */
6144 if (REG_P (target)
6145 && bitsize < BITS_PER_WORD
6146 && bitpos % BITS_PER_WORD == 0
6147 && GET_MODE_CLASS (mode) == MODE_INT
6148 && TREE_CODE (value) == INTEGER_CST
6149 && exp_size >= 0
6150 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
6151 {
6152 tree type = TREE_TYPE (value);
6153
6154 if (TYPE_PRECISION (type) < BITS_PER_WORD)
6155 {
6156 type = lang_hooks.types.type_for_mode
6157 (word_mode, TYPE_UNSIGNED (type));
6158 value = fold_convert (type, value);
6159 }
6160
6161 if (BYTES_BIG_ENDIAN)
6162 value
6163 = fold_build2 (LSHIFT_EXPR, type, value,
6164 build_int_cst (type,
6165 BITS_PER_WORD - bitsize));
6166 bitsize = BITS_PER_WORD;
6167 mode = word_mode;
6168 }
6169 #endif
6170
6171 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
6172 && DECL_NONADDRESSABLE_P (field))
6173 {
6174 to_rtx = copy_rtx (to_rtx);
6175 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
6176 }
6177
6178 store_constructor_field (to_rtx, bitsize, bitpos, mode,
6179 value, cleared,
6180 get_alias_set (TREE_TYPE (field)));
6181 }
6182 break;
6183 }
6184 case ARRAY_TYPE:
6185 {
6186 tree value, index;
6187 unsigned HOST_WIDE_INT i;
6188 int need_to_clear;
6189 tree domain;
6190 tree elttype = TREE_TYPE (type);
6191 int const_bounds_p;
6192 HOST_WIDE_INT minelt = 0;
6193 HOST_WIDE_INT maxelt = 0;
6194
6195 domain = TYPE_DOMAIN (type);
6196 const_bounds_p = (TYPE_MIN_VALUE (domain)
6197 && TYPE_MAX_VALUE (domain)
6198 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain))
6199 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain)));
6200
6201 /* If we have constant bounds for the range of the type, get them. */
6202 if (const_bounds_p)
6203 {
6204 minelt = tree_to_shwi (TYPE_MIN_VALUE (domain));
6205 maxelt = tree_to_shwi (TYPE_MAX_VALUE (domain));
6206 }
6207
6208 /* If the constructor has fewer elements than the array, clear
6209 the whole array first. Similarly if this is static
6210 constructor of a non-BLKmode object. */
6211 if (cleared)
6212 need_to_clear = 0;
6213 else if (REG_P (target) && TREE_STATIC (exp))
6214 need_to_clear = 1;
6215 else
6216 {
6217 unsigned HOST_WIDE_INT idx;
6218 tree index, value;
6219 HOST_WIDE_INT count = 0, zero_count = 0;
6220 need_to_clear = ! const_bounds_p;
6221
6222 /* This loop is a more accurate version of the loop in
6223 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6224 is also needed to check for missing elements. */
6225 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
6226 {
6227 HOST_WIDE_INT this_node_count;
6228
6229 if (need_to_clear)
6230 break;
6231
6232 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6233 {
6234 tree lo_index = TREE_OPERAND (index, 0);
6235 tree hi_index = TREE_OPERAND (index, 1);
6236
6237 if (! tree_fits_uhwi_p (lo_index)
6238 || ! tree_fits_uhwi_p (hi_index))
6239 {
6240 need_to_clear = 1;
6241 break;
6242 }
6243
6244 this_node_count = (tree_to_uhwi (hi_index)
6245 - tree_to_uhwi (lo_index) + 1);
6246 }
6247 else
6248 this_node_count = 1;
6249
6250 count += this_node_count;
6251 if (mostly_zeros_p (value))
6252 zero_count += this_node_count;
6253 }
6254
6255 /* Clear the entire array first if there are any missing
6256 elements, or if the incidence of zero elements is >=
6257 75%. */
6258 if (! need_to_clear
6259 && (count < maxelt - minelt + 1
6260 || 4 * zero_count >= 3 * count))
6261 need_to_clear = 1;
6262 }
6263
6264 if (need_to_clear && size > 0)
6265 {
6266 if (REG_P (target))
6267 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6268 else
6269 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6270 cleared = 1;
6271 }
6272
6273 if (!cleared && REG_P (target))
6274 /* Inform later passes that the old value is dead. */
6275 emit_clobber (target);
6276
6277 /* Store each element of the constructor into the
6278 corresponding element of TARGET, determined by counting the
6279 elements. */
6280 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
6281 {
6282 machine_mode mode;
6283 HOST_WIDE_INT bitsize;
6284 HOST_WIDE_INT bitpos;
6285 rtx xtarget = target;
6286
6287 if (cleared && initializer_zerop (value))
6288 continue;
6289
6290 mode = TYPE_MODE (elttype);
6291 if (mode == BLKmode)
6292 bitsize = (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6293 ? tree_to_uhwi (TYPE_SIZE (elttype))
6294 : -1);
6295 else
6296 bitsize = GET_MODE_BITSIZE (mode);
6297
6298 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6299 {
6300 tree lo_index = TREE_OPERAND (index, 0);
6301 tree hi_index = TREE_OPERAND (index, 1);
6302 rtx index_r, pos_rtx;
6303 HOST_WIDE_INT lo, hi, count;
6304 tree position;
6305
6306 /* If the range is constant and "small", unroll the loop. */
6307 if (const_bounds_p
6308 && tree_fits_shwi_p (lo_index)
6309 && tree_fits_shwi_p (hi_index)
6310 && (lo = tree_to_shwi (lo_index),
6311 hi = tree_to_shwi (hi_index),
6312 count = hi - lo + 1,
6313 (!MEM_P (target)
6314 || count <= 2
6315 || (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6316 && (tree_to_uhwi (TYPE_SIZE (elttype)) * count
6317 <= 40 * 8)))))
6318 {
6319 lo -= minelt; hi -= minelt;
6320 for (; lo <= hi; lo++)
6321 {
6322 bitpos = lo * tree_to_shwi (TYPE_SIZE (elttype));
6323
6324 if (MEM_P (target)
6325 && !MEM_KEEP_ALIAS_SET_P (target)
6326 && TREE_CODE (type) == ARRAY_TYPE
6327 && TYPE_NONALIASED_COMPONENT (type))
6328 {
6329 target = copy_rtx (target);
6330 MEM_KEEP_ALIAS_SET_P (target) = 1;
6331 }
6332
6333 store_constructor_field
6334 (target, bitsize, bitpos, mode, value, cleared,
6335 get_alias_set (elttype));
6336 }
6337 }
6338 else
6339 {
6340 rtx_code_label *loop_start = gen_label_rtx ();
6341 rtx_code_label *loop_end = gen_label_rtx ();
6342 tree exit_cond;
6343
6344 expand_normal (hi_index);
6345
6346 index = build_decl (EXPR_LOCATION (exp),
6347 VAR_DECL, NULL_TREE, domain);
6348 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6349 SET_DECL_RTL (index, index_r);
6350 store_expr (lo_index, index_r, 0, false);
6351
6352 /* Build the head of the loop. */
6353 do_pending_stack_adjust ();
6354 emit_label (loop_start);
6355
6356 /* Assign value to element index. */
6357 position =
6358 fold_convert (ssizetype,
6359 fold_build2 (MINUS_EXPR,
6360 TREE_TYPE (index),
6361 index,
6362 TYPE_MIN_VALUE (domain)));
6363
6364 position =
6365 size_binop (MULT_EXPR, position,
6366 fold_convert (ssizetype,
6367 TYPE_SIZE_UNIT (elttype)));
6368
6369 pos_rtx = expand_normal (position);
6370 xtarget = offset_address (target, pos_rtx,
6371 highest_pow2_factor (position));
6372 xtarget = adjust_address (xtarget, mode, 0);
6373 if (TREE_CODE (value) == CONSTRUCTOR)
6374 store_constructor (value, xtarget, cleared,
6375 bitsize / BITS_PER_UNIT);
6376 else
6377 store_expr (value, xtarget, 0, false);
6378
6379 /* Generate a conditional jump to exit the loop. */
6380 exit_cond = build2 (LT_EXPR, integer_type_node,
6381 index, hi_index);
6382 jumpif (exit_cond, loop_end, -1);
6383
6384 /* Update the loop counter, and jump to the head of
6385 the loop. */
6386 expand_assignment (index,
6387 build2 (PLUS_EXPR, TREE_TYPE (index),
6388 index, integer_one_node),
6389 false);
6390
6391 emit_jump (loop_start);
6392
6393 /* Build the end of the loop. */
6394 emit_label (loop_end);
6395 }
6396 }
6397 else if ((index != 0 && ! tree_fits_shwi_p (index))
6398 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype)))
6399 {
6400 tree position;
6401
6402 if (index == 0)
6403 index = ssize_int (1);
6404
6405 if (minelt)
6406 index = fold_convert (ssizetype,
6407 fold_build2 (MINUS_EXPR,
6408 TREE_TYPE (index),
6409 index,
6410 TYPE_MIN_VALUE (domain)));
6411
6412 position =
6413 size_binop (MULT_EXPR, index,
6414 fold_convert (ssizetype,
6415 TYPE_SIZE_UNIT (elttype)));
6416 xtarget = offset_address (target,
6417 expand_normal (position),
6418 highest_pow2_factor (position));
6419 xtarget = adjust_address (xtarget, mode, 0);
6420 store_expr (value, xtarget, 0, false);
6421 }
6422 else
6423 {
6424 if (index != 0)
6425 bitpos = ((tree_to_shwi (index) - minelt)
6426 * tree_to_uhwi (TYPE_SIZE (elttype)));
6427 else
6428 bitpos = (i * tree_to_uhwi (TYPE_SIZE (elttype)));
6429
6430 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6431 && TREE_CODE (type) == ARRAY_TYPE
6432 && TYPE_NONALIASED_COMPONENT (type))
6433 {
6434 target = copy_rtx (target);
6435 MEM_KEEP_ALIAS_SET_P (target) = 1;
6436 }
6437 store_constructor_field (target, bitsize, bitpos, mode, value,
6438 cleared, get_alias_set (elttype));
6439 }
6440 }
6441 break;
6442 }
6443
6444 case VECTOR_TYPE:
6445 {
6446 unsigned HOST_WIDE_INT idx;
6447 constructor_elt *ce;
6448 int i;
6449 int need_to_clear;
6450 int icode = CODE_FOR_nothing;
6451 tree elttype = TREE_TYPE (type);
6452 int elt_size = tree_to_uhwi (TYPE_SIZE (elttype));
6453 machine_mode eltmode = TYPE_MODE (elttype);
6454 HOST_WIDE_INT bitsize;
6455 HOST_WIDE_INT bitpos;
6456 rtvec vector = NULL;
6457 unsigned n_elts;
6458 alias_set_type alias;
6459
6460 gcc_assert (eltmode != BLKmode);
6461
6462 n_elts = TYPE_VECTOR_SUBPARTS (type);
6463 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6464 {
6465 machine_mode mode = GET_MODE (target);
6466
6467 icode = (int) optab_handler (vec_init_optab, mode);
6468 /* Don't use vec_init<mode> if some elements have VECTOR_TYPE. */
6469 if (icode != CODE_FOR_nothing)
6470 {
6471 tree value;
6472
6473 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6474 if (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE)
6475 {
6476 icode = CODE_FOR_nothing;
6477 break;
6478 }
6479 }
6480 if (icode != CODE_FOR_nothing)
6481 {
6482 unsigned int i;
6483
6484 vector = rtvec_alloc (n_elts);
6485 for (i = 0; i < n_elts; i++)
6486 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6487 }
6488 }
6489
6490 /* If the constructor has fewer elements than the vector,
6491 clear the whole array first. Similarly if this is static
6492 constructor of a non-BLKmode object. */
6493 if (cleared)
6494 need_to_clear = 0;
6495 else if (REG_P (target) && TREE_STATIC (exp))
6496 need_to_clear = 1;
6497 else
6498 {
6499 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6500 tree value;
6501
6502 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6503 {
6504 int n_elts_here = tree_to_uhwi
6505 (int_const_binop (TRUNC_DIV_EXPR,
6506 TYPE_SIZE (TREE_TYPE (value)),
6507 TYPE_SIZE (elttype)));
6508
6509 count += n_elts_here;
6510 if (mostly_zeros_p (value))
6511 zero_count += n_elts_here;
6512 }
6513
6514 /* Clear the entire vector first if there are any missing elements,
6515 or if the incidence of zero elements is >= 75%. */
6516 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6517 }
6518
6519 if (need_to_clear && size > 0 && !vector)
6520 {
6521 if (REG_P (target))
6522 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6523 else
6524 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6525 cleared = 1;
6526 }
6527
6528 /* Inform later passes that the old value is dead. */
6529 if (!cleared && !vector && REG_P (target))
6530 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6531
6532 if (MEM_P (target))
6533 alias = MEM_ALIAS_SET (target);
6534 else
6535 alias = get_alias_set (elttype);
6536
6537 /* Store each element of the constructor into the corresponding
6538 element of TARGET, determined by counting the elements. */
6539 for (idx = 0, i = 0;
6540 vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce);
6541 idx++, i += bitsize / elt_size)
6542 {
6543 HOST_WIDE_INT eltpos;
6544 tree value = ce->value;
6545
6546 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value)));
6547 if (cleared && initializer_zerop (value))
6548 continue;
6549
6550 if (ce->index)
6551 eltpos = tree_to_uhwi (ce->index);
6552 else
6553 eltpos = i;
6554
6555 if (vector)
6556 {
6557 /* vec_init<mode> should not be used if there are VECTOR_TYPE
6558 elements. */
6559 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6560 RTVEC_ELT (vector, eltpos)
6561 = expand_normal (value);
6562 }
6563 else
6564 {
6565 machine_mode value_mode =
6566 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6567 ? TYPE_MODE (TREE_TYPE (value))
6568 : eltmode;
6569 bitpos = eltpos * elt_size;
6570 store_constructor_field (target, bitsize, bitpos, value_mode,
6571 value, cleared, alias);
6572 }
6573 }
6574
6575 if (vector)
6576 emit_insn (GEN_FCN (icode)
6577 (target,
6578 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6579 break;
6580 }
6581
6582 default:
6583 gcc_unreachable ();
6584 }
6585 }
6586
6587 /* Store the value of EXP (an expression tree)
6588 into a subfield of TARGET which has mode MODE and occupies
6589 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6590 If MODE is VOIDmode, it means that we are storing into a bit-field.
6591
6592 BITREGION_START is bitpos of the first bitfield in this region.
6593 BITREGION_END is the bitpos of the ending bitfield in this region.
6594 These two fields are 0, if the C++ memory model does not apply,
6595 or we are not interested in keeping track of bitfield regions.
6596
6597 Always return const0_rtx unless we have something particular to
6598 return.
6599
6600 ALIAS_SET is the alias set for the destination. This value will
6601 (in general) be different from that for TARGET, since TARGET is a
6602 reference to the containing structure.
6603
6604 If NONTEMPORAL is true, try generating a nontemporal store. */
6605
6606 static rtx
6607 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6608 unsigned HOST_WIDE_INT bitregion_start,
6609 unsigned HOST_WIDE_INT bitregion_end,
6610 machine_mode mode, tree exp,
6611 alias_set_type alias_set, bool nontemporal)
6612 {
6613 if (TREE_CODE (exp) == ERROR_MARK)
6614 return const0_rtx;
6615
6616 /* If we have nothing to store, do nothing unless the expression has
6617 side-effects. */
6618 if (bitsize == 0)
6619 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6620
6621 if (GET_CODE (target) == CONCAT)
6622 {
6623 /* We're storing into a struct containing a single __complex. */
6624
6625 gcc_assert (!bitpos);
6626 return store_expr (exp, target, 0, nontemporal);
6627 }
6628
6629 /* If the structure is in a register or if the component
6630 is a bit field, we cannot use addressing to access it.
6631 Use bit-field techniques or SUBREG to store in it. */
6632
6633 if (mode == VOIDmode
6634 || (mode != BLKmode && ! direct_store[(int) mode]
6635 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6636 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6637 || REG_P (target)
6638 || GET_CODE (target) == SUBREG
6639 /* If the field isn't aligned enough to store as an ordinary memref,
6640 store it as a bit field. */
6641 || (mode != BLKmode
6642 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6643 || bitpos % GET_MODE_ALIGNMENT (mode))
6644 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6645 || (bitpos % BITS_PER_UNIT != 0)))
6646 || (bitsize >= 0 && mode != BLKmode
6647 && GET_MODE_BITSIZE (mode) > bitsize)
6648 /* If the RHS and field are a constant size and the size of the
6649 RHS isn't the same size as the bitfield, we must use bitfield
6650 operations. */
6651 || (bitsize >= 0
6652 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6653 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6654 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6655 decl we must use bitfield operations. */
6656 || (bitsize >= 0
6657 && TREE_CODE (exp) == MEM_REF
6658 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6659 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6660 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6661 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6662 {
6663 rtx temp;
6664 gimple nop_def;
6665
6666 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6667 implies a mask operation. If the precision is the same size as
6668 the field we're storing into, that mask is redundant. This is
6669 particularly common with bit field assignments generated by the
6670 C front end. */
6671 nop_def = get_def_for_expr (exp, NOP_EXPR);
6672 if (nop_def)
6673 {
6674 tree type = TREE_TYPE (exp);
6675 if (INTEGRAL_TYPE_P (type)
6676 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6677 && bitsize == TYPE_PRECISION (type))
6678 {
6679 tree op = gimple_assign_rhs1 (nop_def);
6680 type = TREE_TYPE (op);
6681 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6682 exp = op;
6683 }
6684 }
6685
6686 temp = expand_normal (exp);
6687
6688 /* If BITSIZE is narrower than the size of the type of EXP
6689 we will be narrowing TEMP. Normally, what's wanted are the
6690 low-order bits. However, if EXP's type is a record and this is
6691 big-endian machine, we want the upper BITSIZE bits. */
6692 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6693 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6694 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6695 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6696 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6697 NULL_RTX, 1);
6698
6699 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6700 if (mode != VOIDmode && mode != BLKmode
6701 && mode != TYPE_MODE (TREE_TYPE (exp)))
6702 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6703
6704 /* If TEMP is not a PARALLEL (see below) and its mode and that of TARGET
6705 are both BLKmode, both must be in memory and BITPOS must be aligned
6706 on a byte boundary. If so, we simply do a block copy. Likewise for
6707 a BLKmode-like TARGET. */
6708 if (GET_CODE (temp) != PARALLEL
6709 && GET_MODE (temp) == BLKmode
6710 && (GET_MODE (target) == BLKmode
6711 || (MEM_P (target)
6712 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6713 && (bitpos % BITS_PER_UNIT) == 0
6714 && (bitsize % BITS_PER_UNIT) == 0)))
6715 {
6716 gcc_assert (MEM_P (target) && MEM_P (temp)
6717 && (bitpos % BITS_PER_UNIT) == 0);
6718
6719 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6720 emit_block_move (target, temp,
6721 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6722 / BITS_PER_UNIT),
6723 BLOCK_OP_NORMAL);
6724
6725 return const0_rtx;
6726 }
6727
6728 /* Handle calls that return values in multiple non-contiguous locations.
6729 The Irix 6 ABI has examples of this. */
6730 if (GET_CODE (temp) == PARALLEL)
6731 {
6732 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6733 rtx temp_target;
6734 if (mode == BLKmode || mode == VOIDmode)
6735 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6736 temp_target = gen_reg_rtx (mode);
6737 emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
6738 temp = temp_target;
6739 }
6740 else if (mode == BLKmode)
6741 {
6742 /* Handle calls that return BLKmode values in registers. */
6743 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
6744 {
6745 rtx temp_target = gen_reg_rtx (GET_MODE (temp));
6746 copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp));
6747 temp = temp_target;
6748 }
6749 else
6750 {
6751 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6752 rtx temp_target;
6753 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6754 temp_target = gen_reg_rtx (mode);
6755 temp_target
6756 = extract_bit_field (temp, size * BITS_PER_UNIT, 0, 1,
6757 temp_target, mode, mode);
6758 temp = temp_target;
6759 }
6760 }
6761
6762 /* Store the value in the bitfield. */
6763 store_bit_field (target, bitsize, bitpos,
6764 bitregion_start, bitregion_end,
6765 mode, temp);
6766
6767 return const0_rtx;
6768 }
6769 else
6770 {
6771 /* Now build a reference to just the desired component. */
6772 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6773
6774 if (to_rtx == target)
6775 to_rtx = copy_rtx (to_rtx);
6776
6777 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6778 set_mem_alias_set (to_rtx, alias_set);
6779
6780 return store_expr (exp, to_rtx, 0, nontemporal);
6781 }
6782 }
6783 \f
6784 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6785 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6786 codes and find the ultimate containing object, which we return.
6787
6788 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6789 bit position, and *PUNSIGNEDP to the signedness of the field.
6790 If the position of the field is variable, we store a tree
6791 giving the variable offset (in units) in *POFFSET.
6792 This offset is in addition to the bit position.
6793 If the position is not variable, we store 0 in *POFFSET.
6794
6795 If any of the extraction expressions is volatile,
6796 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6797
6798 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6799 Otherwise, it is a mode that can be used to access the field.
6800
6801 If the field describes a variable-sized object, *PMODE is set to
6802 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6803 this case, but the address of the object can be found.
6804
6805 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6806 look through nodes that serve as markers of a greater alignment than
6807 the one that can be deduced from the expression. These nodes make it
6808 possible for front-ends to prevent temporaries from being created by
6809 the middle-end on alignment considerations. For that purpose, the
6810 normal operating mode at high-level is to always pass FALSE so that
6811 the ultimate containing object is really returned; moreover, the
6812 associated predicate handled_component_p will always return TRUE
6813 on these nodes, thus indicating that they are essentially handled
6814 by get_inner_reference. TRUE should only be passed when the caller
6815 is scanning the expression in order to build another representation
6816 and specifically knows how to handle these nodes; as such, this is
6817 the normal operating mode in the RTL expanders. */
6818
6819 tree
6820 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6821 HOST_WIDE_INT *pbitpos, tree *poffset,
6822 machine_mode *pmode, int *punsignedp,
6823 int *pvolatilep, bool keep_aligning)
6824 {
6825 tree size_tree = 0;
6826 machine_mode mode = VOIDmode;
6827 bool blkmode_bitfield = false;
6828 tree offset = size_zero_node;
6829 offset_int bit_offset = 0;
6830
6831 /* First get the mode, signedness, and size. We do this from just the
6832 outermost expression. */
6833 *pbitsize = -1;
6834 if (TREE_CODE (exp) == COMPONENT_REF)
6835 {
6836 tree field = TREE_OPERAND (exp, 1);
6837 size_tree = DECL_SIZE (field);
6838 if (flag_strict_volatile_bitfields > 0
6839 && TREE_THIS_VOLATILE (exp)
6840 && DECL_BIT_FIELD_TYPE (field)
6841 && DECL_MODE (field) != BLKmode)
6842 /* Volatile bitfields should be accessed in the mode of the
6843 field's type, not the mode computed based on the bit
6844 size. */
6845 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6846 else if (!DECL_BIT_FIELD (field))
6847 mode = DECL_MODE (field);
6848 else if (DECL_MODE (field) == BLKmode)
6849 blkmode_bitfield = true;
6850
6851 *punsignedp = DECL_UNSIGNED (field);
6852 }
6853 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6854 {
6855 size_tree = TREE_OPERAND (exp, 1);
6856 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6857 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6858
6859 /* For vector types, with the correct size of access, use the mode of
6860 inner type. */
6861 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6862 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6863 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6864 mode = TYPE_MODE (TREE_TYPE (exp));
6865 }
6866 else
6867 {
6868 mode = TYPE_MODE (TREE_TYPE (exp));
6869 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6870
6871 if (mode == BLKmode)
6872 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6873 else
6874 *pbitsize = GET_MODE_BITSIZE (mode);
6875 }
6876
6877 if (size_tree != 0)
6878 {
6879 if (! tree_fits_uhwi_p (size_tree))
6880 mode = BLKmode, *pbitsize = -1;
6881 else
6882 *pbitsize = tree_to_uhwi (size_tree);
6883 }
6884
6885 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6886 and find the ultimate containing object. */
6887 while (1)
6888 {
6889 switch (TREE_CODE (exp))
6890 {
6891 case BIT_FIELD_REF:
6892 bit_offset += wi::to_offset (TREE_OPERAND (exp, 2));
6893 break;
6894
6895 case COMPONENT_REF:
6896 {
6897 tree field = TREE_OPERAND (exp, 1);
6898 tree this_offset = component_ref_field_offset (exp);
6899
6900 /* If this field hasn't been filled in yet, don't go past it.
6901 This should only happen when folding expressions made during
6902 type construction. */
6903 if (this_offset == 0)
6904 break;
6905
6906 offset = size_binop (PLUS_EXPR, offset, this_offset);
6907 bit_offset += wi::to_offset (DECL_FIELD_BIT_OFFSET (field));
6908
6909 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6910 }
6911 break;
6912
6913 case ARRAY_REF:
6914 case ARRAY_RANGE_REF:
6915 {
6916 tree index = TREE_OPERAND (exp, 1);
6917 tree low_bound = array_ref_low_bound (exp);
6918 tree unit_size = array_ref_element_size (exp);
6919
6920 /* We assume all arrays have sizes that are a multiple of a byte.
6921 First subtract the lower bound, if any, in the type of the
6922 index, then convert to sizetype and multiply by the size of
6923 the array element. */
6924 if (! integer_zerop (low_bound))
6925 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6926 index, low_bound);
6927
6928 offset = size_binop (PLUS_EXPR, offset,
6929 size_binop (MULT_EXPR,
6930 fold_convert (sizetype, index),
6931 unit_size));
6932 }
6933 break;
6934
6935 case REALPART_EXPR:
6936 break;
6937
6938 case IMAGPART_EXPR:
6939 bit_offset += *pbitsize;
6940 break;
6941
6942 case VIEW_CONVERT_EXPR:
6943 if (keep_aligning && STRICT_ALIGNMENT
6944 && (TYPE_ALIGN (TREE_TYPE (exp))
6945 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6946 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6947 < BIGGEST_ALIGNMENT)
6948 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6949 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6950 goto done;
6951 break;
6952
6953 case MEM_REF:
6954 /* Hand back the decl for MEM[&decl, off]. */
6955 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6956 {
6957 tree off = TREE_OPERAND (exp, 1);
6958 if (!integer_zerop (off))
6959 {
6960 offset_int boff, coff = mem_ref_offset (exp);
6961 boff = wi::lshift (coff, LOG2_BITS_PER_UNIT);
6962 bit_offset += boff;
6963 }
6964 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6965 }
6966 goto done;
6967
6968 default:
6969 goto done;
6970 }
6971
6972 /* If any reference in the chain is volatile, the effect is volatile. */
6973 if (TREE_THIS_VOLATILE (exp))
6974 *pvolatilep = 1;
6975
6976 exp = TREE_OPERAND (exp, 0);
6977 }
6978 done:
6979
6980 /* If OFFSET is constant, see if we can return the whole thing as a
6981 constant bit position. Make sure to handle overflow during
6982 this conversion. */
6983 if (TREE_CODE (offset) == INTEGER_CST)
6984 {
6985 offset_int tem = wi::sext (wi::to_offset (offset),
6986 TYPE_PRECISION (sizetype));
6987 tem = wi::lshift (tem, LOG2_BITS_PER_UNIT);
6988 tem += bit_offset;
6989 if (wi::fits_shwi_p (tem))
6990 {
6991 *pbitpos = tem.to_shwi ();
6992 *poffset = offset = NULL_TREE;
6993 }
6994 }
6995
6996 /* Otherwise, split it up. */
6997 if (offset)
6998 {
6999 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7000 if (wi::neg_p (bit_offset) || !wi::fits_shwi_p (bit_offset))
7001 {
7002 offset_int mask = wi::mask <offset_int> (LOG2_BITS_PER_UNIT, false);
7003 offset_int tem = bit_offset.and_not (mask);
7004 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
7005 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
7006 bit_offset -= tem;
7007 tem = wi::arshift (tem, LOG2_BITS_PER_UNIT);
7008 offset = size_binop (PLUS_EXPR, offset,
7009 wide_int_to_tree (sizetype, tem));
7010 }
7011
7012 *pbitpos = bit_offset.to_shwi ();
7013 *poffset = offset;
7014 }
7015
7016 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7017 if (mode == VOIDmode
7018 && blkmode_bitfield
7019 && (*pbitpos % BITS_PER_UNIT) == 0
7020 && (*pbitsize % BITS_PER_UNIT) == 0)
7021 *pmode = BLKmode;
7022 else
7023 *pmode = mode;
7024
7025 return exp;
7026 }
7027
7028 /* Return a tree of sizetype representing the size, in bytes, of the element
7029 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
7030
7031 tree
7032 array_ref_element_size (tree exp)
7033 {
7034 tree aligned_size = TREE_OPERAND (exp, 3);
7035 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
7036 location_t loc = EXPR_LOCATION (exp);
7037
7038 /* If a size was specified in the ARRAY_REF, it's the size measured
7039 in alignment units of the element type. So multiply by that value. */
7040 if (aligned_size)
7041 {
7042 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
7043 sizetype from another type of the same width and signedness. */
7044 if (TREE_TYPE (aligned_size) != sizetype)
7045 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
7046 return size_binop_loc (loc, MULT_EXPR, aligned_size,
7047 size_int (TYPE_ALIGN_UNIT (elmt_type)));
7048 }
7049
7050 /* Otherwise, take the size from that of the element type. Substitute
7051 any PLACEHOLDER_EXPR that we have. */
7052 else
7053 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
7054 }
7055
7056 /* Return a tree representing the lower bound of the array mentioned in
7057 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
7058
7059 tree
7060 array_ref_low_bound (tree exp)
7061 {
7062 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
7063
7064 /* If a lower bound is specified in EXP, use it. */
7065 if (TREE_OPERAND (exp, 2))
7066 return TREE_OPERAND (exp, 2);
7067
7068 /* Otherwise, if there is a domain type and it has a lower bound, use it,
7069 substituting for a PLACEHOLDER_EXPR as needed. */
7070 if (domain_type && TYPE_MIN_VALUE (domain_type))
7071 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
7072
7073 /* Otherwise, return a zero of the appropriate type. */
7074 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
7075 }
7076
7077 /* Returns true if REF is an array reference to an array at the end of
7078 a structure. If this is the case, the array may be allocated larger
7079 than its upper bound implies. */
7080
7081 bool
7082 array_at_struct_end_p (tree ref)
7083 {
7084 if (TREE_CODE (ref) != ARRAY_REF
7085 && TREE_CODE (ref) != ARRAY_RANGE_REF)
7086 return false;
7087
7088 while (handled_component_p (ref))
7089 {
7090 /* If the reference chain contains a component reference to a
7091 non-union type and there follows another field the reference
7092 is not at the end of a structure. */
7093 if (TREE_CODE (ref) == COMPONENT_REF
7094 && TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == RECORD_TYPE)
7095 {
7096 tree nextf = DECL_CHAIN (TREE_OPERAND (ref, 1));
7097 while (nextf && TREE_CODE (nextf) != FIELD_DECL)
7098 nextf = DECL_CHAIN (nextf);
7099 if (nextf)
7100 return false;
7101 }
7102
7103 ref = TREE_OPERAND (ref, 0);
7104 }
7105
7106 /* If the reference is based on a declared entity, the size of the array
7107 is constrained by its given domain. */
7108 if (DECL_P (ref))
7109 return false;
7110
7111 return true;
7112 }
7113
7114 /* Return a tree representing the upper bound of the array mentioned in
7115 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
7116
7117 tree
7118 array_ref_up_bound (tree exp)
7119 {
7120 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
7121
7122 /* If there is a domain type and it has an upper bound, use it, substituting
7123 for a PLACEHOLDER_EXPR as needed. */
7124 if (domain_type && TYPE_MAX_VALUE (domain_type))
7125 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
7126
7127 /* Otherwise fail. */
7128 return NULL_TREE;
7129 }
7130
7131 /* Return a tree representing the offset, in bytes, of the field referenced
7132 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
7133
7134 tree
7135 component_ref_field_offset (tree exp)
7136 {
7137 tree aligned_offset = TREE_OPERAND (exp, 2);
7138 tree field = TREE_OPERAND (exp, 1);
7139 location_t loc = EXPR_LOCATION (exp);
7140
7141 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
7142 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
7143 value. */
7144 if (aligned_offset)
7145 {
7146 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
7147 sizetype from another type of the same width and signedness. */
7148 if (TREE_TYPE (aligned_offset) != sizetype)
7149 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
7150 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
7151 size_int (DECL_OFFSET_ALIGN (field)
7152 / BITS_PER_UNIT));
7153 }
7154
7155 /* Otherwise, take the offset from that of the field. Substitute
7156 any PLACEHOLDER_EXPR that we have. */
7157 else
7158 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
7159 }
7160
7161 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7162
7163 static unsigned HOST_WIDE_INT
7164 target_align (const_tree target)
7165 {
7166 /* We might have a chain of nested references with intermediate misaligning
7167 bitfields components, so need to recurse to find out. */
7168
7169 unsigned HOST_WIDE_INT this_align, outer_align;
7170
7171 switch (TREE_CODE (target))
7172 {
7173 case BIT_FIELD_REF:
7174 return 1;
7175
7176 case COMPONENT_REF:
7177 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
7178 outer_align = target_align (TREE_OPERAND (target, 0));
7179 return MIN (this_align, outer_align);
7180
7181 case ARRAY_REF:
7182 case ARRAY_RANGE_REF:
7183 this_align = TYPE_ALIGN (TREE_TYPE (target));
7184 outer_align = target_align (TREE_OPERAND (target, 0));
7185 return MIN (this_align, outer_align);
7186
7187 CASE_CONVERT:
7188 case NON_LVALUE_EXPR:
7189 case VIEW_CONVERT_EXPR:
7190 this_align = TYPE_ALIGN (TREE_TYPE (target));
7191 outer_align = target_align (TREE_OPERAND (target, 0));
7192 return MAX (this_align, outer_align);
7193
7194 default:
7195 return TYPE_ALIGN (TREE_TYPE (target));
7196 }
7197 }
7198
7199 \f
7200 /* Given an rtx VALUE that may contain additions and multiplications, return
7201 an equivalent value that just refers to a register, memory, or constant.
7202 This is done by generating instructions to perform the arithmetic and
7203 returning a pseudo-register containing the value.
7204
7205 The returned value may be a REG, SUBREG, MEM or constant. */
7206
7207 rtx
7208 force_operand (rtx value, rtx target)
7209 {
7210 rtx op1, op2;
7211 /* Use subtarget as the target for operand 0 of a binary operation. */
7212 rtx subtarget = get_subtarget (target);
7213 enum rtx_code code = GET_CODE (value);
7214
7215 /* Check for subreg applied to an expression produced by loop optimizer. */
7216 if (code == SUBREG
7217 && !REG_P (SUBREG_REG (value))
7218 && !MEM_P (SUBREG_REG (value)))
7219 {
7220 value
7221 = simplify_gen_subreg (GET_MODE (value),
7222 force_reg (GET_MODE (SUBREG_REG (value)),
7223 force_operand (SUBREG_REG (value),
7224 NULL_RTX)),
7225 GET_MODE (SUBREG_REG (value)),
7226 SUBREG_BYTE (value));
7227 code = GET_CODE (value);
7228 }
7229
7230 /* Check for a PIC address load. */
7231 if ((code == PLUS || code == MINUS)
7232 && XEXP (value, 0) == pic_offset_table_rtx
7233 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
7234 || GET_CODE (XEXP (value, 1)) == LABEL_REF
7235 || GET_CODE (XEXP (value, 1)) == CONST))
7236 {
7237 if (!subtarget)
7238 subtarget = gen_reg_rtx (GET_MODE (value));
7239 emit_move_insn (subtarget, value);
7240 return subtarget;
7241 }
7242
7243 if (ARITHMETIC_P (value))
7244 {
7245 op2 = XEXP (value, 1);
7246 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
7247 subtarget = 0;
7248 if (code == MINUS && CONST_INT_P (op2))
7249 {
7250 code = PLUS;
7251 op2 = negate_rtx (GET_MODE (value), op2);
7252 }
7253
7254 /* Check for an addition with OP2 a constant integer and our first
7255 operand a PLUS of a virtual register and something else. In that
7256 case, we want to emit the sum of the virtual register and the
7257 constant first and then add the other value. This allows virtual
7258 register instantiation to simply modify the constant rather than
7259 creating another one around this addition. */
7260 if (code == PLUS && CONST_INT_P (op2)
7261 && GET_CODE (XEXP (value, 0)) == PLUS
7262 && REG_P (XEXP (XEXP (value, 0), 0))
7263 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7264 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
7265 {
7266 rtx temp = expand_simple_binop (GET_MODE (value), code,
7267 XEXP (XEXP (value, 0), 0), op2,
7268 subtarget, 0, OPTAB_LIB_WIDEN);
7269 return expand_simple_binop (GET_MODE (value), code, temp,
7270 force_operand (XEXP (XEXP (value,
7271 0), 1), 0),
7272 target, 0, OPTAB_LIB_WIDEN);
7273 }
7274
7275 op1 = force_operand (XEXP (value, 0), subtarget);
7276 op2 = force_operand (op2, NULL_RTX);
7277 switch (code)
7278 {
7279 case MULT:
7280 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7281 case DIV:
7282 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7283 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7284 target, 1, OPTAB_LIB_WIDEN);
7285 else
7286 return expand_divmod (0,
7287 FLOAT_MODE_P (GET_MODE (value))
7288 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7289 GET_MODE (value), op1, op2, target, 0);
7290 case MOD:
7291 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7292 target, 0);
7293 case UDIV:
7294 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7295 target, 1);
7296 case UMOD:
7297 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7298 target, 1);
7299 case ASHIFTRT:
7300 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7301 target, 0, OPTAB_LIB_WIDEN);
7302 default:
7303 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7304 target, 1, OPTAB_LIB_WIDEN);
7305 }
7306 }
7307 if (UNARY_P (value))
7308 {
7309 if (!target)
7310 target = gen_reg_rtx (GET_MODE (value));
7311 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7312 switch (code)
7313 {
7314 case ZERO_EXTEND:
7315 case SIGN_EXTEND:
7316 case TRUNCATE:
7317 case FLOAT_EXTEND:
7318 case FLOAT_TRUNCATE:
7319 convert_move (target, op1, code == ZERO_EXTEND);
7320 return target;
7321
7322 case FIX:
7323 case UNSIGNED_FIX:
7324 expand_fix (target, op1, code == UNSIGNED_FIX);
7325 return target;
7326
7327 case FLOAT:
7328 case UNSIGNED_FLOAT:
7329 expand_float (target, op1, code == UNSIGNED_FLOAT);
7330 return target;
7331
7332 default:
7333 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7334 }
7335 }
7336
7337 #ifdef INSN_SCHEDULING
7338 /* On machines that have insn scheduling, we want all memory reference to be
7339 explicit, so we need to deal with such paradoxical SUBREGs. */
7340 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7341 value
7342 = simplify_gen_subreg (GET_MODE (value),
7343 force_reg (GET_MODE (SUBREG_REG (value)),
7344 force_operand (SUBREG_REG (value),
7345 NULL_RTX)),
7346 GET_MODE (SUBREG_REG (value)),
7347 SUBREG_BYTE (value));
7348 #endif
7349
7350 return value;
7351 }
7352 \f
7353 /* Subroutine of expand_expr: return nonzero iff there is no way that
7354 EXP can reference X, which is being modified. TOP_P is nonzero if this
7355 call is going to be used to determine whether we need a temporary
7356 for EXP, as opposed to a recursive call to this function.
7357
7358 It is always safe for this routine to return zero since it merely
7359 searches for optimization opportunities. */
7360
7361 int
7362 safe_from_p (const_rtx x, tree exp, int top_p)
7363 {
7364 rtx exp_rtl = 0;
7365 int i, nops;
7366
7367 if (x == 0
7368 /* If EXP has varying size, we MUST use a target since we currently
7369 have no way of allocating temporaries of variable size
7370 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7371 So we assume here that something at a higher level has prevented a
7372 clash. This is somewhat bogus, but the best we can do. Only
7373 do this when X is BLKmode and when we are at the top level. */
7374 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7375 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7376 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7377 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7378 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7379 != INTEGER_CST)
7380 && GET_MODE (x) == BLKmode)
7381 /* If X is in the outgoing argument area, it is always safe. */
7382 || (MEM_P (x)
7383 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7384 || (GET_CODE (XEXP (x, 0)) == PLUS
7385 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7386 return 1;
7387
7388 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7389 find the underlying pseudo. */
7390 if (GET_CODE (x) == SUBREG)
7391 {
7392 x = SUBREG_REG (x);
7393 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7394 return 0;
7395 }
7396
7397 /* Now look at our tree code and possibly recurse. */
7398 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7399 {
7400 case tcc_declaration:
7401 exp_rtl = DECL_RTL_IF_SET (exp);
7402 break;
7403
7404 case tcc_constant:
7405 return 1;
7406
7407 case tcc_exceptional:
7408 if (TREE_CODE (exp) == TREE_LIST)
7409 {
7410 while (1)
7411 {
7412 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7413 return 0;
7414 exp = TREE_CHAIN (exp);
7415 if (!exp)
7416 return 1;
7417 if (TREE_CODE (exp) != TREE_LIST)
7418 return safe_from_p (x, exp, 0);
7419 }
7420 }
7421 else if (TREE_CODE (exp) == CONSTRUCTOR)
7422 {
7423 constructor_elt *ce;
7424 unsigned HOST_WIDE_INT idx;
7425
7426 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce)
7427 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7428 || !safe_from_p (x, ce->value, 0))
7429 return 0;
7430 return 1;
7431 }
7432 else if (TREE_CODE (exp) == ERROR_MARK)
7433 return 1; /* An already-visited SAVE_EXPR? */
7434 else
7435 return 0;
7436
7437 case tcc_statement:
7438 /* The only case we look at here is the DECL_INITIAL inside a
7439 DECL_EXPR. */
7440 return (TREE_CODE (exp) != DECL_EXPR
7441 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7442 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7443 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7444
7445 case tcc_binary:
7446 case tcc_comparison:
7447 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7448 return 0;
7449 /* Fall through. */
7450
7451 case tcc_unary:
7452 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7453
7454 case tcc_expression:
7455 case tcc_reference:
7456 case tcc_vl_exp:
7457 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7458 the expression. If it is set, we conflict iff we are that rtx or
7459 both are in memory. Otherwise, we check all operands of the
7460 expression recursively. */
7461
7462 switch (TREE_CODE (exp))
7463 {
7464 case ADDR_EXPR:
7465 /* If the operand is static or we are static, we can't conflict.
7466 Likewise if we don't conflict with the operand at all. */
7467 if (staticp (TREE_OPERAND (exp, 0))
7468 || TREE_STATIC (exp)
7469 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7470 return 1;
7471
7472 /* Otherwise, the only way this can conflict is if we are taking
7473 the address of a DECL a that address if part of X, which is
7474 very rare. */
7475 exp = TREE_OPERAND (exp, 0);
7476 if (DECL_P (exp))
7477 {
7478 if (!DECL_RTL_SET_P (exp)
7479 || !MEM_P (DECL_RTL (exp)))
7480 return 0;
7481 else
7482 exp_rtl = XEXP (DECL_RTL (exp), 0);
7483 }
7484 break;
7485
7486 case MEM_REF:
7487 if (MEM_P (x)
7488 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7489 get_alias_set (exp)))
7490 return 0;
7491 break;
7492
7493 case CALL_EXPR:
7494 /* Assume that the call will clobber all hard registers and
7495 all of memory. */
7496 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7497 || MEM_P (x))
7498 return 0;
7499 break;
7500
7501 case WITH_CLEANUP_EXPR:
7502 case CLEANUP_POINT_EXPR:
7503 /* Lowered by gimplify.c. */
7504 gcc_unreachable ();
7505
7506 case SAVE_EXPR:
7507 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7508
7509 default:
7510 break;
7511 }
7512
7513 /* If we have an rtx, we do not need to scan our operands. */
7514 if (exp_rtl)
7515 break;
7516
7517 nops = TREE_OPERAND_LENGTH (exp);
7518 for (i = 0; i < nops; i++)
7519 if (TREE_OPERAND (exp, i) != 0
7520 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7521 return 0;
7522
7523 break;
7524
7525 case tcc_type:
7526 /* Should never get a type here. */
7527 gcc_unreachable ();
7528 }
7529
7530 /* If we have an rtl, find any enclosed object. Then see if we conflict
7531 with it. */
7532 if (exp_rtl)
7533 {
7534 if (GET_CODE (exp_rtl) == SUBREG)
7535 {
7536 exp_rtl = SUBREG_REG (exp_rtl);
7537 if (REG_P (exp_rtl)
7538 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7539 return 0;
7540 }
7541
7542 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7543 are memory and they conflict. */
7544 return ! (rtx_equal_p (x, exp_rtl)
7545 || (MEM_P (x) && MEM_P (exp_rtl)
7546 && true_dependence (exp_rtl, VOIDmode, x)));
7547 }
7548
7549 /* If we reach here, it is safe. */
7550 return 1;
7551 }
7552
7553 \f
7554 /* Return the highest power of two that EXP is known to be a multiple of.
7555 This is used in updating alignment of MEMs in array references. */
7556
7557 unsigned HOST_WIDE_INT
7558 highest_pow2_factor (const_tree exp)
7559 {
7560 unsigned HOST_WIDE_INT ret;
7561 int trailing_zeros = tree_ctz (exp);
7562 if (trailing_zeros >= HOST_BITS_PER_WIDE_INT)
7563 return BIGGEST_ALIGNMENT;
7564 ret = (unsigned HOST_WIDE_INT) 1 << trailing_zeros;
7565 if (ret > BIGGEST_ALIGNMENT)
7566 return BIGGEST_ALIGNMENT;
7567 return ret;
7568 }
7569
7570 /* Similar, except that the alignment requirements of TARGET are
7571 taken into account. Assume it is at least as aligned as its
7572 type, unless it is a COMPONENT_REF in which case the layout of
7573 the structure gives the alignment. */
7574
7575 static unsigned HOST_WIDE_INT
7576 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7577 {
7578 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7579 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7580
7581 return MAX (factor, talign);
7582 }
7583 \f
7584 /* Convert the tree comparison code TCODE to the rtl one where the
7585 signedness is UNSIGNEDP. */
7586
7587 static enum rtx_code
7588 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7589 {
7590 enum rtx_code code;
7591 switch (tcode)
7592 {
7593 case EQ_EXPR:
7594 code = EQ;
7595 break;
7596 case NE_EXPR:
7597 code = NE;
7598 break;
7599 case LT_EXPR:
7600 code = unsignedp ? LTU : LT;
7601 break;
7602 case LE_EXPR:
7603 code = unsignedp ? LEU : LE;
7604 break;
7605 case GT_EXPR:
7606 code = unsignedp ? GTU : GT;
7607 break;
7608 case GE_EXPR:
7609 code = unsignedp ? GEU : GE;
7610 break;
7611 case UNORDERED_EXPR:
7612 code = UNORDERED;
7613 break;
7614 case ORDERED_EXPR:
7615 code = ORDERED;
7616 break;
7617 case UNLT_EXPR:
7618 code = UNLT;
7619 break;
7620 case UNLE_EXPR:
7621 code = UNLE;
7622 break;
7623 case UNGT_EXPR:
7624 code = UNGT;
7625 break;
7626 case UNGE_EXPR:
7627 code = UNGE;
7628 break;
7629 case UNEQ_EXPR:
7630 code = UNEQ;
7631 break;
7632 case LTGT_EXPR:
7633 code = LTGT;
7634 break;
7635
7636 default:
7637 gcc_unreachable ();
7638 }
7639 return code;
7640 }
7641
7642 /* Subroutine of expand_expr. Expand the two operands of a binary
7643 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7644 The value may be stored in TARGET if TARGET is nonzero. The
7645 MODIFIER argument is as documented by expand_expr. */
7646
7647 void
7648 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7649 enum expand_modifier modifier)
7650 {
7651 if (! safe_from_p (target, exp1, 1))
7652 target = 0;
7653 if (operand_equal_p (exp0, exp1, 0))
7654 {
7655 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7656 *op1 = copy_rtx (*op0);
7657 }
7658 else
7659 {
7660 /* If we need to preserve evaluation order, copy exp0 into its own
7661 temporary variable so that it can't be clobbered by exp1. */
7662 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7663 exp0 = save_expr (exp0);
7664 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7665 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7666 }
7667 }
7668
7669 \f
7670 /* Return a MEM that contains constant EXP. DEFER is as for
7671 output_constant_def and MODIFIER is as for expand_expr. */
7672
7673 static rtx
7674 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7675 {
7676 rtx mem;
7677
7678 mem = output_constant_def (exp, defer);
7679 if (modifier != EXPAND_INITIALIZER)
7680 mem = use_anchored_address (mem);
7681 return mem;
7682 }
7683
7684 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7685 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7686
7687 static rtx
7688 expand_expr_addr_expr_1 (tree exp, rtx target, machine_mode tmode,
7689 enum expand_modifier modifier, addr_space_t as)
7690 {
7691 rtx result, subtarget;
7692 tree inner, offset;
7693 HOST_WIDE_INT bitsize, bitpos;
7694 int volatilep, unsignedp;
7695 machine_mode mode1;
7696
7697 /* If we are taking the address of a constant and are at the top level,
7698 we have to use output_constant_def since we can't call force_const_mem
7699 at top level. */
7700 /* ??? This should be considered a front-end bug. We should not be
7701 generating ADDR_EXPR of something that isn't an LVALUE. The only
7702 exception here is STRING_CST. */
7703 if (CONSTANT_CLASS_P (exp))
7704 {
7705 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7706 if (modifier < EXPAND_SUM)
7707 result = force_operand (result, target);
7708 return result;
7709 }
7710
7711 /* Everything must be something allowed by is_gimple_addressable. */
7712 switch (TREE_CODE (exp))
7713 {
7714 case INDIRECT_REF:
7715 /* This case will happen via recursion for &a->b. */
7716 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7717
7718 case MEM_REF:
7719 {
7720 tree tem = TREE_OPERAND (exp, 0);
7721 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7722 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7723 return expand_expr (tem, target, tmode, modifier);
7724 }
7725
7726 case CONST_DECL:
7727 /* Expand the initializer like constants above. */
7728 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7729 0, modifier), 0);
7730 if (modifier < EXPAND_SUM)
7731 result = force_operand (result, target);
7732 return result;
7733
7734 case REALPART_EXPR:
7735 /* The real part of the complex number is always first, therefore
7736 the address is the same as the address of the parent object. */
7737 offset = 0;
7738 bitpos = 0;
7739 inner = TREE_OPERAND (exp, 0);
7740 break;
7741
7742 case IMAGPART_EXPR:
7743 /* The imaginary part of the complex number is always second.
7744 The expression is therefore always offset by the size of the
7745 scalar type. */
7746 offset = 0;
7747 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7748 inner = TREE_OPERAND (exp, 0);
7749 break;
7750
7751 case COMPOUND_LITERAL_EXPR:
7752 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7753 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7754 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7755 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7756 the initializers aren't gimplified. */
7757 if (COMPOUND_LITERAL_EXPR_DECL (exp)
7758 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp)))
7759 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp),
7760 target, tmode, modifier, as);
7761 /* FALLTHRU */
7762 default:
7763 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7764 expand_expr, as that can have various side effects; LABEL_DECLs for
7765 example, may not have their DECL_RTL set yet. Expand the rtl of
7766 CONSTRUCTORs too, which should yield a memory reference for the
7767 constructor's contents. Assume language specific tree nodes can
7768 be expanded in some interesting way. */
7769 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7770 if (DECL_P (exp)
7771 || TREE_CODE (exp) == CONSTRUCTOR
7772 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7773 {
7774 result = expand_expr (exp, target, tmode,
7775 modifier == EXPAND_INITIALIZER
7776 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7777
7778 /* If the DECL isn't in memory, then the DECL wasn't properly
7779 marked TREE_ADDRESSABLE, which will be either a front-end
7780 or a tree optimizer bug. */
7781
7782 if (TREE_ADDRESSABLE (exp)
7783 && ! MEM_P (result)
7784 && ! targetm.calls.allocate_stack_slots_for_args ())
7785 {
7786 error ("local frame unavailable (naked function?)");
7787 return result;
7788 }
7789 else
7790 gcc_assert (MEM_P (result));
7791 result = XEXP (result, 0);
7792
7793 /* ??? Is this needed anymore? */
7794 if (DECL_P (exp))
7795 TREE_USED (exp) = 1;
7796
7797 if (modifier != EXPAND_INITIALIZER
7798 && modifier != EXPAND_CONST_ADDRESS
7799 && modifier != EXPAND_SUM)
7800 result = force_operand (result, target);
7801 return result;
7802 }
7803
7804 /* Pass FALSE as the last argument to get_inner_reference although
7805 we are expanding to RTL. The rationale is that we know how to
7806 handle "aligning nodes" here: we can just bypass them because
7807 they won't change the final object whose address will be returned
7808 (they actually exist only for that purpose). */
7809 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7810 &mode1, &unsignedp, &volatilep, false);
7811 break;
7812 }
7813
7814 /* We must have made progress. */
7815 gcc_assert (inner != exp);
7816
7817 subtarget = offset || bitpos ? NULL_RTX : target;
7818 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7819 inner alignment, force the inner to be sufficiently aligned. */
7820 if (CONSTANT_CLASS_P (inner)
7821 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7822 {
7823 inner = copy_node (inner);
7824 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7825 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7826 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7827 }
7828 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7829
7830 if (offset)
7831 {
7832 rtx tmp;
7833
7834 if (modifier != EXPAND_NORMAL)
7835 result = force_operand (result, NULL);
7836 tmp = expand_expr (offset, NULL_RTX, tmode,
7837 modifier == EXPAND_INITIALIZER
7838 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7839
7840 /* expand_expr is allowed to return an object in a mode other
7841 than TMODE. If it did, we need to convert. */
7842 if (GET_MODE (tmp) != VOIDmode && tmode != GET_MODE (tmp))
7843 tmp = convert_modes (tmode, GET_MODE (tmp),
7844 tmp, TYPE_UNSIGNED (TREE_TYPE (offset)));
7845 result = convert_memory_address_addr_space (tmode, result, as);
7846 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7847
7848 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7849 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7850 else
7851 {
7852 subtarget = bitpos ? NULL_RTX : target;
7853 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7854 1, OPTAB_LIB_WIDEN);
7855 }
7856 }
7857
7858 if (bitpos)
7859 {
7860 /* Someone beforehand should have rejected taking the address
7861 of such an object. */
7862 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7863
7864 result = convert_memory_address_addr_space (tmode, result, as);
7865 result = plus_constant (tmode, result, bitpos / BITS_PER_UNIT);
7866 if (modifier < EXPAND_SUM)
7867 result = force_operand (result, target);
7868 }
7869
7870 return result;
7871 }
7872
7873 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7874 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7875
7876 static rtx
7877 expand_expr_addr_expr (tree exp, rtx target, machine_mode tmode,
7878 enum expand_modifier modifier)
7879 {
7880 addr_space_t as = ADDR_SPACE_GENERIC;
7881 machine_mode address_mode = Pmode;
7882 machine_mode pointer_mode = ptr_mode;
7883 machine_mode rmode;
7884 rtx result;
7885
7886 /* Target mode of VOIDmode says "whatever's natural". */
7887 if (tmode == VOIDmode)
7888 tmode = TYPE_MODE (TREE_TYPE (exp));
7889
7890 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7891 {
7892 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7893 address_mode = targetm.addr_space.address_mode (as);
7894 pointer_mode = targetm.addr_space.pointer_mode (as);
7895 }
7896
7897 /* We can get called with some Weird Things if the user does silliness
7898 like "(short) &a". In that case, convert_memory_address won't do
7899 the right thing, so ignore the given target mode. */
7900 if (tmode != address_mode && tmode != pointer_mode)
7901 tmode = address_mode;
7902
7903 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7904 tmode, modifier, as);
7905
7906 /* Despite expand_expr claims concerning ignoring TMODE when not
7907 strictly convenient, stuff breaks if we don't honor it. Note
7908 that combined with the above, we only do this for pointer modes. */
7909 rmode = GET_MODE (result);
7910 if (rmode == VOIDmode)
7911 rmode = tmode;
7912 if (rmode != tmode)
7913 result = convert_memory_address_addr_space (tmode, result, as);
7914
7915 return result;
7916 }
7917
7918 /* Generate code for computing CONSTRUCTOR EXP.
7919 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7920 is TRUE, instead of creating a temporary variable in memory
7921 NULL is returned and the caller needs to handle it differently. */
7922
7923 static rtx
7924 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7925 bool avoid_temp_mem)
7926 {
7927 tree type = TREE_TYPE (exp);
7928 machine_mode mode = TYPE_MODE (type);
7929
7930 /* Try to avoid creating a temporary at all. This is possible
7931 if all of the initializer is zero.
7932 FIXME: try to handle all [0..255] initializers we can handle
7933 with memset. */
7934 if (TREE_STATIC (exp)
7935 && !TREE_ADDRESSABLE (exp)
7936 && target != 0 && mode == BLKmode
7937 && all_zeros_p (exp))
7938 {
7939 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7940 return target;
7941 }
7942
7943 /* All elts simple constants => refer to a constant in memory. But
7944 if this is a non-BLKmode mode, let it store a field at a time
7945 since that should make a CONST_INT, CONST_WIDE_INT or
7946 CONST_DOUBLE when we fold. Likewise, if we have a target we can
7947 use, it is best to store directly into the target unless the type
7948 is large enough that memcpy will be used. If we are making an
7949 initializer and all operands are constant, put it in memory as
7950 well.
7951
7952 FIXME: Avoid trying to fill vector constructors piece-meal.
7953 Output them with output_constant_def below unless we're sure
7954 they're zeros. This should go away when vector initializers
7955 are treated like VECTOR_CST instead of arrays. */
7956 if ((TREE_STATIC (exp)
7957 && ((mode == BLKmode
7958 && ! (target != 0 && safe_from_p (target, exp, 1)))
7959 || TREE_ADDRESSABLE (exp)
7960 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type))
7961 && (! can_move_by_pieces
7962 (tree_to_uhwi (TYPE_SIZE_UNIT (type)),
7963 TYPE_ALIGN (type)))
7964 && ! mostly_zeros_p (exp))))
7965 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7966 && TREE_CONSTANT (exp)))
7967 {
7968 rtx constructor;
7969
7970 if (avoid_temp_mem)
7971 return NULL_RTX;
7972
7973 constructor = expand_expr_constant (exp, 1, modifier);
7974
7975 if (modifier != EXPAND_CONST_ADDRESS
7976 && modifier != EXPAND_INITIALIZER
7977 && modifier != EXPAND_SUM)
7978 constructor = validize_mem (constructor);
7979
7980 return constructor;
7981 }
7982
7983 /* Handle calls that pass values in multiple non-contiguous
7984 locations. The Irix 6 ABI has examples of this. */
7985 if (target == 0 || ! safe_from_p (target, exp, 1)
7986 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7987 {
7988 if (avoid_temp_mem)
7989 return NULL_RTX;
7990
7991 target = assign_temp (type, TREE_ADDRESSABLE (exp), 1);
7992 }
7993
7994 store_constructor (exp, target, 0, int_expr_size (exp));
7995 return target;
7996 }
7997
7998
7999 /* expand_expr: generate code for computing expression EXP.
8000 An rtx for the computed value is returned. The value is never null.
8001 In the case of a void EXP, const0_rtx is returned.
8002
8003 The value may be stored in TARGET if TARGET is nonzero.
8004 TARGET is just a suggestion; callers must assume that
8005 the rtx returned may not be the same as TARGET.
8006
8007 If TARGET is CONST0_RTX, it means that the value will be ignored.
8008
8009 If TMODE is not VOIDmode, it suggests generating the
8010 result in mode TMODE. But this is done only when convenient.
8011 Otherwise, TMODE is ignored and the value generated in its natural mode.
8012 TMODE is just a suggestion; callers must assume that
8013 the rtx returned may not have mode TMODE.
8014
8015 Note that TARGET may have neither TMODE nor MODE. In that case, it
8016 probably will not be used.
8017
8018 If MODIFIER is EXPAND_SUM then when EXP is an addition
8019 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8020 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8021 products as above, or REG or MEM, or constant.
8022 Ordinarily in such cases we would output mul or add instructions
8023 and then return a pseudo reg containing the sum.
8024
8025 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8026 it also marks a label as absolutely required (it can't be dead).
8027 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8028 This is used for outputting expressions used in initializers.
8029
8030 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8031 with a constant address even if that address is not normally legitimate.
8032 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8033
8034 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8035 a call parameter. Such targets require special care as we haven't yet
8036 marked TARGET so that it's safe from being trashed by libcalls. We
8037 don't want to use TARGET for anything but the final result;
8038 Intermediate values must go elsewhere. Additionally, calls to
8039 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8040
8041 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8042 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8043 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8044 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8045 recursively.
8046
8047 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8048 In this case, we don't adjust a returned MEM rtx that wouldn't be
8049 sufficiently aligned for its mode; instead, it's up to the caller
8050 to deal with it afterwards. This is used to make sure that unaligned
8051 base objects for which out-of-bounds accesses are supported, for
8052 example record types with trailing arrays, aren't realigned behind
8053 the back of the caller.
8054 The normal operating mode is to pass FALSE for this parameter. */
8055
8056 rtx
8057 expand_expr_real (tree exp, rtx target, machine_mode tmode,
8058 enum expand_modifier modifier, rtx *alt_rtl,
8059 bool inner_reference_p)
8060 {
8061 rtx ret;
8062
8063 /* Handle ERROR_MARK before anybody tries to access its type. */
8064 if (TREE_CODE (exp) == ERROR_MARK
8065 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
8066 {
8067 ret = CONST0_RTX (tmode);
8068 return ret ? ret : const0_rtx;
8069 }
8070
8071 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl,
8072 inner_reference_p);
8073 return ret;
8074 }
8075
8076 /* Try to expand the conditional expression which is represented by
8077 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If succeseds
8078 return the rtl reg which repsents the result. Otherwise return
8079 NULL_RTL. */
8080
8081 static rtx
8082 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
8083 tree treeop1 ATTRIBUTE_UNUSED,
8084 tree treeop2 ATTRIBUTE_UNUSED)
8085 {
8086 rtx insn;
8087 rtx op00, op01, op1, op2;
8088 enum rtx_code comparison_code;
8089 machine_mode comparison_mode;
8090 gimple srcstmt;
8091 rtx temp;
8092 tree type = TREE_TYPE (treeop1);
8093 int unsignedp = TYPE_UNSIGNED (type);
8094 machine_mode mode = TYPE_MODE (type);
8095 machine_mode orig_mode = mode;
8096
8097 /* If we cannot do a conditional move on the mode, try doing it
8098 with the promoted mode. */
8099 if (!can_conditionally_move_p (mode))
8100 {
8101 mode = promote_mode (type, mode, &unsignedp);
8102 if (!can_conditionally_move_p (mode))
8103 return NULL_RTX;
8104 temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */
8105 }
8106 else
8107 temp = assign_temp (type, 0, 1);
8108
8109 start_sequence ();
8110 expand_operands (treeop1, treeop2,
8111 temp, &op1, &op2, EXPAND_NORMAL);
8112
8113 if (TREE_CODE (treeop0) == SSA_NAME
8114 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
8115 {
8116 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
8117 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
8118 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
8119 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
8120 comparison_mode = TYPE_MODE (type);
8121 unsignedp = TYPE_UNSIGNED (type);
8122 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8123 }
8124 else if (COMPARISON_CLASS_P (treeop0))
8125 {
8126 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
8127 enum tree_code cmpcode = TREE_CODE (treeop0);
8128 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
8129 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
8130 unsignedp = TYPE_UNSIGNED (type);
8131 comparison_mode = TYPE_MODE (type);
8132 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8133 }
8134 else
8135 {
8136 op00 = expand_normal (treeop0);
8137 op01 = const0_rtx;
8138 comparison_code = NE;
8139 comparison_mode = GET_MODE (op00);
8140 if (comparison_mode == VOIDmode)
8141 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
8142 }
8143
8144 if (GET_MODE (op1) != mode)
8145 op1 = gen_lowpart (mode, op1);
8146
8147 if (GET_MODE (op2) != mode)
8148 op2 = gen_lowpart (mode, op2);
8149
8150 /* Try to emit the conditional move. */
8151 insn = emit_conditional_move (temp, comparison_code,
8152 op00, op01, comparison_mode,
8153 op1, op2, mode,
8154 unsignedp);
8155
8156 /* If we could do the conditional move, emit the sequence,
8157 and return. */
8158 if (insn)
8159 {
8160 rtx_insn *seq = get_insns ();
8161 end_sequence ();
8162 emit_insn (seq);
8163 return convert_modes (orig_mode, mode, temp, 0);
8164 }
8165
8166 /* Otherwise discard the sequence and fall back to code with
8167 branches. */
8168 end_sequence ();
8169 return NULL_RTX;
8170 }
8171
8172 rtx
8173 expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
8174 enum expand_modifier modifier)
8175 {
8176 rtx op0, op1, op2, temp;
8177 rtx_code_label *lab;
8178 tree type;
8179 int unsignedp;
8180 machine_mode mode;
8181 enum tree_code code = ops->code;
8182 optab this_optab;
8183 rtx subtarget, original_target;
8184 int ignore;
8185 bool reduce_bit_field;
8186 location_t loc = ops->location;
8187 tree treeop0, treeop1, treeop2;
8188 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8189 ? reduce_to_bit_field_precision ((expr), \
8190 target, \
8191 type) \
8192 : (expr))
8193
8194 type = ops->type;
8195 mode = TYPE_MODE (type);
8196 unsignedp = TYPE_UNSIGNED (type);
8197
8198 treeop0 = ops->op0;
8199 treeop1 = ops->op1;
8200 treeop2 = ops->op2;
8201
8202 /* We should be called only on simple (binary or unary) expressions,
8203 exactly those that are valid in gimple expressions that aren't
8204 GIMPLE_SINGLE_RHS (or invalid). */
8205 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
8206 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
8207 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
8208
8209 ignore = (target == const0_rtx
8210 || ((CONVERT_EXPR_CODE_P (code)
8211 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8212 && TREE_CODE (type) == VOID_TYPE));
8213
8214 /* We should be called only if we need the result. */
8215 gcc_assert (!ignore);
8216
8217 /* An operation in what may be a bit-field type needs the
8218 result to be reduced to the precision of the bit-field type,
8219 which is narrower than that of the type's mode. */
8220 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8221 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8222
8223 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8224 target = 0;
8225
8226 /* Use subtarget as the target for operand 0 of a binary operation. */
8227 subtarget = get_subtarget (target);
8228 original_target = target;
8229
8230 switch (code)
8231 {
8232 case NON_LVALUE_EXPR:
8233 case PAREN_EXPR:
8234 CASE_CONVERT:
8235 if (treeop0 == error_mark_node)
8236 return const0_rtx;
8237
8238 if (TREE_CODE (type) == UNION_TYPE)
8239 {
8240 tree valtype = TREE_TYPE (treeop0);
8241
8242 /* If both input and output are BLKmode, this conversion isn't doing
8243 anything except possibly changing memory attribute. */
8244 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8245 {
8246 rtx result = expand_expr (treeop0, target, tmode,
8247 modifier);
8248
8249 result = copy_rtx (result);
8250 set_mem_attributes (result, type, 0);
8251 return result;
8252 }
8253
8254 if (target == 0)
8255 {
8256 if (TYPE_MODE (type) != BLKmode)
8257 target = gen_reg_rtx (TYPE_MODE (type));
8258 else
8259 target = assign_temp (type, 1, 1);
8260 }
8261
8262 if (MEM_P (target))
8263 /* Store data into beginning of memory target. */
8264 store_expr (treeop0,
8265 adjust_address (target, TYPE_MODE (valtype), 0),
8266 modifier == EXPAND_STACK_PARM,
8267 false);
8268
8269 else
8270 {
8271 gcc_assert (REG_P (target));
8272
8273 /* Store this field into a union of the proper type. */
8274 store_field (target,
8275 MIN ((int_size_in_bytes (TREE_TYPE
8276 (treeop0))
8277 * BITS_PER_UNIT),
8278 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
8279 0, 0, 0, TYPE_MODE (valtype), treeop0, 0, false);
8280 }
8281
8282 /* Return the entire union. */
8283 return target;
8284 }
8285
8286 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8287 {
8288 op0 = expand_expr (treeop0, target, VOIDmode,
8289 modifier);
8290
8291 /* If the signedness of the conversion differs and OP0 is
8292 a promoted SUBREG, clear that indication since we now
8293 have to do the proper extension. */
8294 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8295 && GET_CODE (op0) == SUBREG)
8296 SUBREG_PROMOTED_VAR_P (op0) = 0;
8297
8298 return REDUCE_BIT_FIELD (op0);
8299 }
8300
8301 op0 = expand_expr (treeop0, NULL_RTX, mode,
8302 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8303 if (GET_MODE (op0) == mode)
8304 ;
8305
8306 /* If OP0 is a constant, just convert it into the proper mode. */
8307 else if (CONSTANT_P (op0))
8308 {
8309 tree inner_type = TREE_TYPE (treeop0);
8310 machine_mode inner_mode = GET_MODE (op0);
8311
8312 if (inner_mode == VOIDmode)
8313 inner_mode = TYPE_MODE (inner_type);
8314
8315 if (modifier == EXPAND_INITIALIZER)
8316 op0 = simplify_gen_subreg (mode, op0, inner_mode,
8317 subreg_lowpart_offset (mode,
8318 inner_mode));
8319 else
8320 op0= convert_modes (mode, inner_mode, op0,
8321 TYPE_UNSIGNED (inner_type));
8322 }
8323
8324 else if (modifier == EXPAND_INITIALIZER)
8325 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8326
8327 else if (target == 0)
8328 op0 = convert_to_mode (mode, op0,
8329 TYPE_UNSIGNED (TREE_TYPE
8330 (treeop0)));
8331 else
8332 {
8333 convert_move (target, op0,
8334 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8335 op0 = target;
8336 }
8337
8338 return REDUCE_BIT_FIELD (op0);
8339
8340 case ADDR_SPACE_CONVERT_EXPR:
8341 {
8342 tree treeop0_type = TREE_TYPE (treeop0);
8343 addr_space_t as_to;
8344 addr_space_t as_from;
8345
8346 gcc_assert (POINTER_TYPE_P (type));
8347 gcc_assert (POINTER_TYPE_P (treeop0_type));
8348
8349 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8350 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8351
8352 /* Conversions between pointers to the same address space should
8353 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8354 gcc_assert (as_to != as_from);
8355
8356 /* Ask target code to handle conversion between pointers
8357 to overlapping address spaces. */
8358 if (targetm.addr_space.subset_p (as_to, as_from)
8359 || targetm.addr_space.subset_p (as_from, as_to))
8360 {
8361 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8362 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8363 gcc_assert (op0);
8364 return op0;
8365 }
8366
8367 /* For disjoint address spaces, converting anything but
8368 a null pointer invokes undefined behaviour. We simply
8369 always return a null pointer here. */
8370 return CONST0_RTX (mode);
8371 }
8372
8373 case POINTER_PLUS_EXPR:
8374 /* Even though the sizetype mode and the pointer's mode can be different
8375 expand is able to handle this correctly and get the correct result out
8376 of the PLUS_EXPR code. */
8377 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8378 if sizetype precision is smaller than pointer precision. */
8379 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8380 treeop1 = fold_convert_loc (loc, type,
8381 fold_convert_loc (loc, ssizetype,
8382 treeop1));
8383 /* If sizetype precision is larger than pointer precision, truncate the
8384 offset to have matching modes. */
8385 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8386 treeop1 = fold_convert_loc (loc, type, treeop1);
8387
8388 case PLUS_EXPR:
8389 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8390 something else, make sure we add the register to the constant and
8391 then to the other thing. This case can occur during strength
8392 reduction and doing it this way will produce better code if the
8393 frame pointer or argument pointer is eliminated.
8394
8395 fold-const.c will ensure that the constant is always in the inner
8396 PLUS_EXPR, so the only case we need to do anything about is if
8397 sp, ap, or fp is our second argument, in which case we must swap
8398 the innermost first argument and our second argument. */
8399
8400 if (TREE_CODE (treeop0) == PLUS_EXPR
8401 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8402 && TREE_CODE (treeop1) == VAR_DECL
8403 && (DECL_RTL (treeop1) == frame_pointer_rtx
8404 || DECL_RTL (treeop1) == stack_pointer_rtx
8405 || DECL_RTL (treeop1) == arg_pointer_rtx))
8406 {
8407 gcc_unreachable ();
8408 }
8409
8410 /* If the result is to be ptr_mode and we are adding an integer to
8411 something, we might be forming a constant. So try to use
8412 plus_constant. If it produces a sum and we can't accept it,
8413 use force_operand. This allows P = &ARR[const] to generate
8414 efficient code on machines where a SYMBOL_REF is not a valid
8415 address.
8416
8417 If this is an EXPAND_SUM call, always return the sum. */
8418 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8419 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8420 {
8421 if (modifier == EXPAND_STACK_PARM)
8422 target = 0;
8423 if (TREE_CODE (treeop0) == INTEGER_CST
8424 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8425 && TREE_CONSTANT (treeop1))
8426 {
8427 rtx constant_part;
8428 HOST_WIDE_INT wc;
8429 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop1));
8430
8431 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8432 EXPAND_SUM);
8433 /* Use wi::shwi to ensure that the constant is
8434 truncated according to the mode of OP1, then sign extended
8435 to a HOST_WIDE_INT. Using the constant directly can result
8436 in non-canonical RTL in a 64x32 cross compile. */
8437 wc = TREE_INT_CST_LOW (treeop0);
8438 constant_part =
8439 immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8440 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8441 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8442 op1 = force_operand (op1, target);
8443 return REDUCE_BIT_FIELD (op1);
8444 }
8445
8446 else if (TREE_CODE (treeop1) == INTEGER_CST
8447 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8448 && TREE_CONSTANT (treeop0))
8449 {
8450 rtx constant_part;
8451 HOST_WIDE_INT wc;
8452 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop0));
8453
8454 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8455 (modifier == EXPAND_INITIALIZER
8456 ? EXPAND_INITIALIZER : EXPAND_SUM));
8457 if (! CONSTANT_P (op0))
8458 {
8459 op1 = expand_expr (treeop1, NULL_RTX,
8460 VOIDmode, modifier);
8461 /* Return a PLUS if modifier says it's OK. */
8462 if (modifier == EXPAND_SUM
8463 || modifier == EXPAND_INITIALIZER)
8464 return simplify_gen_binary (PLUS, mode, op0, op1);
8465 goto binop2;
8466 }
8467 /* Use wi::shwi to ensure that the constant is
8468 truncated according to the mode of OP1, then sign extended
8469 to a HOST_WIDE_INT. Using the constant directly can result
8470 in non-canonical RTL in a 64x32 cross compile. */
8471 wc = TREE_INT_CST_LOW (treeop1);
8472 constant_part
8473 = immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8474 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8475 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8476 op0 = force_operand (op0, target);
8477 return REDUCE_BIT_FIELD (op0);
8478 }
8479 }
8480
8481 /* Use TER to expand pointer addition of a negated value
8482 as pointer subtraction. */
8483 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8484 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8485 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8486 && TREE_CODE (treeop1) == SSA_NAME
8487 && TYPE_MODE (TREE_TYPE (treeop0))
8488 == TYPE_MODE (TREE_TYPE (treeop1)))
8489 {
8490 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8491 if (def)
8492 {
8493 treeop1 = gimple_assign_rhs1 (def);
8494 code = MINUS_EXPR;
8495 goto do_minus;
8496 }
8497 }
8498
8499 /* No sense saving up arithmetic to be done
8500 if it's all in the wrong mode to form part of an address.
8501 And force_operand won't know whether to sign-extend or
8502 zero-extend. */
8503 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8504 || mode != ptr_mode)
8505 {
8506 expand_operands (treeop0, treeop1,
8507 subtarget, &op0, &op1, EXPAND_NORMAL);
8508 if (op0 == const0_rtx)
8509 return op1;
8510 if (op1 == const0_rtx)
8511 return op0;
8512 goto binop2;
8513 }
8514
8515 expand_operands (treeop0, treeop1,
8516 subtarget, &op0, &op1, modifier);
8517 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8518
8519 case MINUS_EXPR:
8520 do_minus:
8521 /* For initializers, we are allowed to return a MINUS of two
8522 symbolic constants. Here we handle all cases when both operands
8523 are constant. */
8524 /* Handle difference of two symbolic constants,
8525 for the sake of an initializer. */
8526 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8527 && really_constant_p (treeop0)
8528 && really_constant_p (treeop1))
8529 {
8530 expand_operands (treeop0, treeop1,
8531 NULL_RTX, &op0, &op1, modifier);
8532
8533 /* If the last operand is a CONST_INT, use plus_constant of
8534 the negated constant. Else make the MINUS. */
8535 if (CONST_INT_P (op1))
8536 return REDUCE_BIT_FIELD (plus_constant (mode, op0,
8537 -INTVAL (op1)));
8538 else
8539 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8540 }
8541
8542 /* No sense saving up arithmetic to be done
8543 if it's all in the wrong mode to form part of an address.
8544 And force_operand won't know whether to sign-extend or
8545 zero-extend. */
8546 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8547 || mode != ptr_mode)
8548 goto binop;
8549
8550 expand_operands (treeop0, treeop1,
8551 subtarget, &op0, &op1, modifier);
8552
8553 /* Convert A - const to A + (-const). */
8554 if (CONST_INT_P (op1))
8555 {
8556 op1 = negate_rtx (mode, op1);
8557 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8558 }
8559
8560 goto binop2;
8561
8562 case WIDEN_MULT_PLUS_EXPR:
8563 case WIDEN_MULT_MINUS_EXPR:
8564 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8565 op2 = expand_normal (treeop2);
8566 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8567 target, unsignedp);
8568 return target;
8569
8570 case WIDEN_MULT_EXPR:
8571 /* If first operand is constant, swap them.
8572 Thus the following special case checks need only
8573 check the second operand. */
8574 if (TREE_CODE (treeop0) == INTEGER_CST)
8575 {
8576 tree t1 = treeop0;
8577 treeop0 = treeop1;
8578 treeop1 = t1;
8579 }
8580
8581 /* First, check if we have a multiplication of one signed and one
8582 unsigned operand. */
8583 if (TREE_CODE (treeop1) != INTEGER_CST
8584 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8585 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8586 {
8587 machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8588 this_optab = usmul_widen_optab;
8589 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8590 != CODE_FOR_nothing)
8591 {
8592 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8593 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8594 EXPAND_NORMAL);
8595 else
8596 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8597 EXPAND_NORMAL);
8598 /* op0 and op1 might still be constant, despite the above
8599 != INTEGER_CST check. Handle it. */
8600 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8601 {
8602 op0 = convert_modes (innermode, mode, op0, true);
8603 op1 = convert_modes (innermode, mode, op1, false);
8604 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8605 target, unsignedp));
8606 }
8607 goto binop3;
8608 }
8609 }
8610 /* Check for a multiplication with matching signedness. */
8611 else if ((TREE_CODE (treeop1) == INTEGER_CST
8612 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8613 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8614 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8615 {
8616 tree op0type = TREE_TYPE (treeop0);
8617 machine_mode innermode = TYPE_MODE (op0type);
8618 bool zextend_p = TYPE_UNSIGNED (op0type);
8619 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8620 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8621
8622 if (TREE_CODE (treeop0) != INTEGER_CST)
8623 {
8624 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8625 != CODE_FOR_nothing)
8626 {
8627 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8628 EXPAND_NORMAL);
8629 /* op0 and op1 might still be constant, despite the above
8630 != INTEGER_CST check. Handle it. */
8631 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8632 {
8633 widen_mult_const:
8634 op0 = convert_modes (innermode, mode, op0, zextend_p);
8635 op1
8636 = convert_modes (innermode, mode, op1,
8637 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8638 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8639 target,
8640 unsignedp));
8641 }
8642 temp = expand_widening_mult (mode, op0, op1, target,
8643 unsignedp, this_optab);
8644 return REDUCE_BIT_FIELD (temp);
8645 }
8646 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8647 != CODE_FOR_nothing
8648 && innermode == word_mode)
8649 {
8650 rtx htem, hipart;
8651 op0 = expand_normal (treeop0);
8652 if (TREE_CODE (treeop1) == INTEGER_CST)
8653 op1 = convert_modes (innermode, mode,
8654 expand_normal (treeop1),
8655 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8656 else
8657 op1 = expand_normal (treeop1);
8658 /* op0 and op1 might still be constant, despite the above
8659 != INTEGER_CST check. Handle it. */
8660 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8661 goto widen_mult_const;
8662 temp = expand_binop (mode, other_optab, op0, op1, target,
8663 unsignedp, OPTAB_LIB_WIDEN);
8664 hipart = gen_highpart (innermode, temp);
8665 htem = expand_mult_highpart_adjust (innermode, hipart,
8666 op0, op1, hipart,
8667 zextend_p);
8668 if (htem != hipart)
8669 emit_move_insn (hipart, htem);
8670 return REDUCE_BIT_FIELD (temp);
8671 }
8672 }
8673 }
8674 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8675 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8676 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8677 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8678
8679 case FMA_EXPR:
8680 {
8681 optab opt = fma_optab;
8682 gimple def0, def2;
8683
8684 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8685 call. */
8686 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8687 {
8688 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8689 tree call_expr;
8690
8691 gcc_assert (fn != NULL_TREE);
8692 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8693 return expand_builtin (call_expr, target, subtarget, mode, false);
8694 }
8695
8696 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8697 /* The multiplication is commutative - look at its 2nd operand
8698 if the first isn't fed by a negate. */
8699 if (!def0)
8700 {
8701 def0 = get_def_for_expr (treeop1, NEGATE_EXPR);
8702 /* Swap operands if the 2nd operand is fed by a negate. */
8703 if (def0)
8704 {
8705 tree tem = treeop0;
8706 treeop0 = treeop1;
8707 treeop1 = tem;
8708 }
8709 }
8710 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8711
8712 op0 = op2 = NULL;
8713
8714 if (def0 && def2
8715 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8716 {
8717 opt = fnms_optab;
8718 op0 = expand_normal (gimple_assign_rhs1 (def0));
8719 op2 = expand_normal (gimple_assign_rhs1 (def2));
8720 }
8721 else if (def0
8722 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8723 {
8724 opt = fnma_optab;
8725 op0 = expand_normal (gimple_assign_rhs1 (def0));
8726 }
8727 else if (def2
8728 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8729 {
8730 opt = fms_optab;
8731 op2 = expand_normal (gimple_assign_rhs1 (def2));
8732 }
8733
8734 if (op0 == NULL)
8735 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8736 if (op2 == NULL)
8737 op2 = expand_normal (treeop2);
8738 op1 = expand_normal (treeop1);
8739
8740 return expand_ternary_op (TYPE_MODE (type), opt,
8741 op0, op1, op2, target, 0);
8742 }
8743
8744 case MULT_EXPR:
8745 /* If this is a fixed-point operation, then we cannot use the code
8746 below because "expand_mult" doesn't support sat/no-sat fixed-point
8747 multiplications. */
8748 if (ALL_FIXED_POINT_MODE_P (mode))
8749 goto binop;
8750
8751 /* If first operand is constant, swap them.
8752 Thus the following special case checks need only
8753 check the second operand. */
8754 if (TREE_CODE (treeop0) == INTEGER_CST)
8755 {
8756 tree t1 = treeop0;
8757 treeop0 = treeop1;
8758 treeop1 = t1;
8759 }
8760
8761 /* Attempt to return something suitable for generating an
8762 indexed address, for machines that support that. */
8763
8764 if (modifier == EXPAND_SUM && mode == ptr_mode
8765 && tree_fits_shwi_p (treeop1))
8766 {
8767 tree exp1 = treeop1;
8768
8769 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8770 EXPAND_SUM);
8771
8772 if (!REG_P (op0))
8773 op0 = force_operand (op0, NULL_RTX);
8774 if (!REG_P (op0))
8775 op0 = copy_to_mode_reg (mode, op0);
8776
8777 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8778 gen_int_mode (tree_to_shwi (exp1),
8779 TYPE_MODE (TREE_TYPE (exp1)))));
8780 }
8781
8782 if (modifier == EXPAND_STACK_PARM)
8783 target = 0;
8784
8785 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8786 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8787
8788 case TRUNC_DIV_EXPR:
8789 case FLOOR_DIV_EXPR:
8790 case CEIL_DIV_EXPR:
8791 case ROUND_DIV_EXPR:
8792 case EXACT_DIV_EXPR:
8793 /* If this is a fixed-point operation, then we cannot use the code
8794 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8795 divisions. */
8796 if (ALL_FIXED_POINT_MODE_P (mode))
8797 goto binop;
8798
8799 if (modifier == EXPAND_STACK_PARM)
8800 target = 0;
8801 /* Possible optimization: compute the dividend with EXPAND_SUM
8802 then if the divisor is constant can optimize the case
8803 where some terms of the dividend have coeffs divisible by it. */
8804 expand_operands (treeop0, treeop1,
8805 subtarget, &op0, &op1, EXPAND_NORMAL);
8806 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8807
8808 case RDIV_EXPR:
8809 goto binop;
8810
8811 case MULT_HIGHPART_EXPR:
8812 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8813 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp);
8814 gcc_assert (temp);
8815 return temp;
8816
8817 case TRUNC_MOD_EXPR:
8818 case FLOOR_MOD_EXPR:
8819 case CEIL_MOD_EXPR:
8820 case ROUND_MOD_EXPR:
8821 if (modifier == EXPAND_STACK_PARM)
8822 target = 0;
8823 expand_operands (treeop0, treeop1,
8824 subtarget, &op0, &op1, EXPAND_NORMAL);
8825 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8826
8827 case FIXED_CONVERT_EXPR:
8828 op0 = expand_normal (treeop0);
8829 if (target == 0 || modifier == EXPAND_STACK_PARM)
8830 target = gen_reg_rtx (mode);
8831
8832 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8833 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8834 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8835 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8836 else
8837 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8838 return target;
8839
8840 case FIX_TRUNC_EXPR:
8841 op0 = expand_normal (treeop0);
8842 if (target == 0 || modifier == EXPAND_STACK_PARM)
8843 target = gen_reg_rtx (mode);
8844 expand_fix (target, op0, unsignedp);
8845 return target;
8846
8847 case FLOAT_EXPR:
8848 op0 = expand_normal (treeop0);
8849 if (target == 0 || modifier == EXPAND_STACK_PARM)
8850 target = gen_reg_rtx (mode);
8851 /* expand_float can't figure out what to do if FROM has VOIDmode.
8852 So give it the correct mode. With -O, cse will optimize this. */
8853 if (GET_MODE (op0) == VOIDmode)
8854 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8855 op0);
8856 expand_float (target, op0,
8857 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8858 return target;
8859
8860 case NEGATE_EXPR:
8861 op0 = expand_expr (treeop0, subtarget,
8862 VOIDmode, EXPAND_NORMAL);
8863 if (modifier == EXPAND_STACK_PARM)
8864 target = 0;
8865 temp = expand_unop (mode,
8866 optab_for_tree_code (NEGATE_EXPR, type,
8867 optab_default),
8868 op0, target, 0);
8869 gcc_assert (temp);
8870 return REDUCE_BIT_FIELD (temp);
8871
8872 case ABS_EXPR:
8873 op0 = expand_expr (treeop0, subtarget,
8874 VOIDmode, EXPAND_NORMAL);
8875 if (modifier == EXPAND_STACK_PARM)
8876 target = 0;
8877
8878 /* ABS_EXPR is not valid for complex arguments. */
8879 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8880 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8881
8882 /* Unsigned abs is simply the operand. Testing here means we don't
8883 risk generating incorrect code below. */
8884 if (TYPE_UNSIGNED (type))
8885 return op0;
8886
8887 return expand_abs (mode, op0, target, unsignedp,
8888 safe_from_p (target, treeop0, 1));
8889
8890 case MAX_EXPR:
8891 case MIN_EXPR:
8892 target = original_target;
8893 if (target == 0
8894 || modifier == EXPAND_STACK_PARM
8895 || (MEM_P (target) && MEM_VOLATILE_P (target))
8896 || GET_MODE (target) != mode
8897 || (REG_P (target)
8898 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8899 target = gen_reg_rtx (mode);
8900 expand_operands (treeop0, treeop1,
8901 target, &op0, &op1, EXPAND_NORMAL);
8902
8903 /* First try to do it with a special MIN or MAX instruction.
8904 If that does not win, use a conditional jump to select the proper
8905 value. */
8906 this_optab = optab_for_tree_code (code, type, optab_default);
8907 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8908 OPTAB_WIDEN);
8909 if (temp != 0)
8910 return temp;
8911
8912 /* At this point, a MEM target is no longer useful; we will get better
8913 code without it. */
8914
8915 if (! REG_P (target))
8916 target = gen_reg_rtx (mode);
8917
8918 /* If op1 was placed in target, swap op0 and op1. */
8919 if (target != op0 && target == op1)
8920 std::swap (op0, op1);
8921
8922 /* We generate better code and avoid problems with op1 mentioning
8923 target by forcing op1 into a pseudo if it isn't a constant. */
8924 if (! CONSTANT_P (op1))
8925 op1 = force_reg (mode, op1);
8926
8927 {
8928 enum rtx_code comparison_code;
8929 rtx cmpop1 = op1;
8930
8931 if (code == MAX_EXPR)
8932 comparison_code = unsignedp ? GEU : GE;
8933 else
8934 comparison_code = unsignedp ? LEU : LE;
8935
8936 /* Canonicalize to comparisons against 0. */
8937 if (op1 == const1_rtx)
8938 {
8939 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8940 or (a != 0 ? a : 1) for unsigned.
8941 For MIN we are safe converting (a <= 1 ? a : 1)
8942 into (a <= 0 ? a : 1) */
8943 cmpop1 = const0_rtx;
8944 if (code == MAX_EXPR)
8945 comparison_code = unsignedp ? NE : GT;
8946 }
8947 if (op1 == constm1_rtx && !unsignedp)
8948 {
8949 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8950 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8951 cmpop1 = const0_rtx;
8952 if (code == MIN_EXPR)
8953 comparison_code = LT;
8954 }
8955
8956 /* Use a conditional move if possible. */
8957 if (can_conditionally_move_p (mode))
8958 {
8959 rtx insn;
8960
8961 start_sequence ();
8962
8963 /* Try to emit the conditional move. */
8964 insn = emit_conditional_move (target, comparison_code,
8965 op0, cmpop1, mode,
8966 op0, op1, mode,
8967 unsignedp);
8968
8969 /* If we could do the conditional move, emit the sequence,
8970 and return. */
8971 if (insn)
8972 {
8973 rtx_insn *seq = get_insns ();
8974 end_sequence ();
8975 emit_insn (seq);
8976 return target;
8977 }
8978
8979 /* Otherwise discard the sequence and fall back to code with
8980 branches. */
8981 end_sequence ();
8982 }
8983
8984 if (target != op0)
8985 emit_move_insn (target, op0);
8986
8987 lab = gen_label_rtx ();
8988 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8989 unsignedp, mode, NULL_RTX, NULL, lab,
8990 -1);
8991 }
8992 emit_move_insn (target, op1);
8993 emit_label (lab);
8994 return target;
8995
8996 case BIT_NOT_EXPR:
8997 op0 = expand_expr (treeop0, subtarget,
8998 VOIDmode, EXPAND_NORMAL);
8999 if (modifier == EXPAND_STACK_PARM)
9000 target = 0;
9001 /* In case we have to reduce the result to bitfield precision
9002 for unsigned bitfield expand this as XOR with a proper constant
9003 instead. */
9004 if (reduce_bit_field && TYPE_UNSIGNED (type))
9005 {
9006 wide_int mask = wi::mask (TYPE_PRECISION (type),
9007 false, GET_MODE_PRECISION (mode));
9008
9009 temp = expand_binop (mode, xor_optab, op0,
9010 immed_wide_int_const (mask, mode),
9011 target, 1, OPTAB_LIB_WIDEN);
9012 }
9013 else
9014 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
9015 gcc_assert (temp);
9016 return temp;
9017
9018 /* ??? Can optimize bitwise operations with one arg constant.
9019 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9020 and (a bitwise1 b) bitwise2 b (etc)
9021 but that is probably not worth while. */
9022
9023 case BIT_AND_EXPR:
9024 case BIT_IOR_EXPR:
9025 case BIT_XOR_EXPR:
9026 goto binop;
9027
9028 case LROTATE_EXPR:
9029 case RROTATE_EXPR:
9030 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
9031 || (GET_MODE_PRECISION (TYPE_MODE (type))
9032 == TYPE_PRECISION (type)));
9033 /* fall through */
9034
9035 case LSHIFT_EXPR:
9036 case RSHIFT_EXPR:
9037 /* If this is a fixed-point operation, then we cannot use the code
9038 below because "expand_shift" doesn't support sat/no-sat fixed-point
9039 shifts. */
9040 if (ALL_FIXED_POINT_MODE_P (mode))
9041 goto binop;
9042
9043 if (! safe_from_p (subtarget, treeop1, 1))
9044 subtarget = 0;
9045 if (modifier == EXPAND_STACK_PARM)
9046 target = 0;
9047 op0 = expand_expr (treeop0, subtarget,
9048 VOIDmode, EXPAND_NORMAL);
9049 temp = expand_variable_shift (code, mode, op0, treeop1, target,
9050 unsignedp);
9051 if (code == LSHIFT_EXPR)
9052 temp = REDUCE_BIT_FIELD (temp);
9053 return temp;
9054
9055 /* Could determine the answer when only additive constants differ. Also,
9056 the addition of one can be handled by changing the condition. */
9057 case LT_EXPR:
9058 case LE_EXPR:
9059 case GT_EXPR:
9060 case GE_EXPR:
9061 case EQ_EXPR:
9062 case NE_EXPR:
9063 case UNORDERED_EXPR:
9064 case ORDERED_EXPR:
9065 case UNLT_EXPR:
9066 case UNLE_EXPR:
9067 case UNGT_EXPR:
9068 case UNGE_EXPR:
9069 case UNEQ_EXPR:
9070 case LTGT_EXPR:
9071 {
9072 temp = do_store_flag (ops,
9073 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
9074 tmode != VOIDmode ? tmode : mode);
9075 if (temp)
9076 return temp;
9077
9078 /* Use a compare and a jump for BLKmode comparisons, or for function
9079 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
9080
9081 if ((target == 0
9082 || modifier == EXPAND_STACK_PARM
9083 || ! safe_from_p (target, treeop0, 1)
9084 || ! safe_from_p (target, treeop1, 1)
9085 /* Make sure we don't have a hard reg (such as function's return
9086 value) live across basic blocks, if not optimizing. */
9087 || (!optimize && REG_P (target)
9088 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
9089 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9090
9091 emit_move_insn (target, const0_rtx);
9092
9093 rtx_code_label *lab1 = gen_label_rtx ();
9094 jumpifnot_1 (code, treeop0, treeop1, lab1, -1);
9095
9096 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
9097 emit_move_insn (target, constm1_rtx);
9098 else
9099 emit_move_insn (target, const1_rtx);
9100
9101 emit_label (lab1);
9102 return target;
9103 }
9104 case COMPLEX_EXPR:
9105 /* Get the rtx code of the operands. */
9106 op0 = expand_normal (treeop0);
9107 op1 = expand_normal (treeop1);
9108
9109 if (!target)
9110 target = gen_reg_rtx (TYPE_MODE (type));
9111 else
9112 /* If target overlaps with op1, then either we need to force
9113 op1 into a pseudo (if target also overlaps with op0),
9114 or write the complex parts in reverse order. */
9115 switch (GET_CODE (target))
9116 {
9117 case CONCAT:
9118 if (reg_overlap_mentioned_p (XEXP (target, 0), op1))
9119 {
9120 if (reg_overlap_mentioned_p (XEXP (target, 1), op0))
9121 {
9122 complex_expr_force_op1:
9123 temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target)));
9124 emit_move_insn (temp, op1);
9125 op1 = temp;
9126 break;
9127 }
9128 complex_expr_swap_order:
9129 /* Move the imaginary (op1) and real (op0) parts to their
9130 location. */
9131 write_complex_part (target, op1, true);
9132 write_complex_part (target, op0, false);
9133
9134 return target;
9135 }
9136 break;
9137 case MEM:
9138 temp = adjust_address_nv (target,
9139 GET_MODE_INNER (GET_MODE (target)), 0);
9140 if (reg_overlap_mentioned_p (temp, op1))
9141 {
9142 machine_mode imode = GET_MODE_INNER (GET_MODE (target));
9143 temp = adjust_address_nv (target, imode,
9144 GET_MODE_SIZE (imode));
9145 if (reg_overlap_mentioned_p (temp, op0))
9146 goto complex_expr_force_op1;
9147 goto complex_expr_swap_order;
9148 }
9149 break;
9150 default:
9151 if (reg_overlap_mentioned_p (target, op1))
9152 {
9153 if (reg_overlap_mentioned_p (target, op0))
9154 goto complex_expr_force_op1;
9155 goto complex_expr_swap_order;
9156 }
9157 break;
9158 }
9159
9160 /* Move the real (op0) and imaginary (op1) parts to their location. */
9161 write_complex_part (target, op0, false);
9162 write_complex_part (target, op1, true);
9163
9164 return target;
9165
9166 case WIDEN_SUM_EXPR:
9167 {
9168 tree oprnd0 = treeop0;
9169 tree oprnd1 = treeop1;
9170
9171 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9172 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
9173 target, unsignedp);
9174 return target;
9175 }
9176
9177 case REDUC_MAX_EXPR:
9178 case REDUC_MIN_EXPR:
9179 case REDUC_PLUS_EXPR:
9180 {
9181 op0 = expand_normal (treeop0);
9182 this_optab = optab_for_tree_code (code, type, optab_default);
9183 machine_mode vec_mode = TYPE_MODE (TREE_TYPE (treeop0));
9184
9185 if (optab_handler (this_optab, vec_mode) != CODE_FOR_nothing)
9186 {
9187 struct expand_operand ops[2];
9188 enum insn_code icode = optab_handler (this_optab, vec_mode);
9189
9190 create_output_operand (&ops[0], target, mode);
9191 create_input_operand (&ops[1], op0, vec_mode);
9192 if (maybe_expand_insn (icode, 2, ops))
9193 {
9194 target = ops[0].value;
9195 if (GET_MODE (target) != mode)
9196 return gen_lowpart (tmode, target);
9197 return target;
9198 }
9199 }
9200 /* Fall back to optab with vector result, and then extract scalar. */
9201 this_optab = scalar_reduc_to_vector (this_optab, type);
9202 temp = expand_unop (vec_mode, this_optab, op0, NULL_RTX, unsignedp);
9203 gcc_assert (temp);
9204 /* The tree code produces a scalar result, but (somewhat by convention)
9205 the optab produces a vector with the result in element 0 if
9206 little-endian, or element N-1 if big-endian. So pull the scalar
9207 result out of that element. */
9208 int index = BYTES_BIG_ENDIAN ? GET_MODE_NUNITS (vec_mode) - 1 : 0;
9209 int bitsize = GET_MODE_BITSIZE (GET_MODE_INNER (vec_mode));
9210 temp = extract_bit_field (temp, bitsize, bitsize * index, unsignedp,
9211 target, mode, mode);
9212 gcc_assert (temp);
9213 return temp;
9214 }
9215
9216 case VEC_UNPACK_HI_EXPR:
9217 case VEC_UNPACK_LO_EXPR:
9218 {
9219 op0 = expand_normal (treeop0);
9220 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
9221 target, unsignedp);
9222 gcc_assert (temp);
9223 return temp;
9224 }
9225
9226 case VEC_UNPACK_FLOAT_HI_EXPR:
9227 case VEC_UNPACK_FLOAT_LO_EXPR:
9228 {
9229 op0 = expand_normal (treeop0);
9230 /* The signedness is determined from input operand. */
9231 temp = expand_widen_pattern_expr
9232 (ops, op0, NULL_RTX, NULL_RTX,
9233 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9234
9235 gcc_assert (temp);
9236 return temp;
9237 }
9238
9239 case VEC_WIDEN_MULT_HI_EXPR:
9240 case VEC_WIDEN_MULT_LO_EXPR:
9241 case VEC_WIDEN_MULT_EVEN_EXPR:
9242 case VEC_WIDEN_MULT_ODD_EXPR:
9243 case VEC_WIDEN_LSHIFT_HI_EXPR:
9244 case VEC_WIDEN_LSHIFT_LO_EXPR:
9245 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9246 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
9247 target, unsignedp);
9248 gcc_assert (target);
9249 return target;
9250
9251 case VEC_PACK_TRUNC_EXPR:
9252 case VEC_PACK_SAT_EXPR:
9253 case VEC_PACK_FIX_TRUNC_EXPR:
9254 mode = TYPE_MODE (TREE_TYPE (treeop0));
9255 goto binop;
9256
9257 case VEC_PERM_EXPR:
9258 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
9259 op2 = expand_normal (treeop2);
9260
9261 /* Careful here: if the target doesn't support integral vector modes,
9262 a constant selection vector could wind up smooshed into a normal
9263 integral constant. */
9264 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
9265 {
9266 tree sel_type = TREE_TYPE (treeop2);
9267 machine_mode vmode
9268 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
9269 TYPE_VECTOR_SUBPARTS (sel_type));
9270 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
9271 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
9272 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
9273 }
9274 else
9275 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
9276
9277 temp = expand_vec_perm (mode, op0, op1, op2, target);
9278 gcc_assert (temp);
9279 return temp;
9280
9281 case DOT_PROD_EXPR:
9282 {
9283 tree oprnd0 = treeop0;
9284 tree oprnd1 = treeop1;
9285 tree oprnd2 = treeop2;
9286 rtx op2;
9287
9288 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9289 op2 = expand_normal (oprnd2);
9290 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9291 target, unsignedp);
9292 return target;
9293 }
9294
9295 case SAD_EXPR:
9296 {
9297 tree oprnd0 = treeop0;
9298 tree oprnd1 = treeop1;
9299 tree oprnd2 = treeop2;
9300 rtx op2;
9301
9302 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9303 op2 = expand_normal (oprnd2);
9304 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9305 target, unsignedp);
9306 return target;
9307 }
9308
9309 case REALIGN_LOAD_EXPR:
9310 {
9311 tree oprnd0 = treeop0;
9312 tree oprnd1 = treeop1;
9313 tree oprnd2 = treeop2;
9314 rtx op2;
9315
9316 this_optab = optab_for_tree_code (code, type, optab_default);
9317 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9318 op2 = expand_normal (oprnd2);
9319 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9320 target, unsignedp);
9321 gcc_assert (temp);
9322 return temp;
9323 }
9324
9325 case COND_EXPR:
9326 {
9327 /* A COND_EXPR with its type being VOID_TYPE represents a
9328 conditional jump and is handled in
9329 expand_gimple_cond_expr. */
9330 gcc_assert (!VOID_TYPE_P (type));
9331
9332 /* Note that COND_EXPRs whose type is a structure or union
9333 are required to be constructed to contain assignments of
9334 a temporary variable, so that we can evaluate them here
9335 for side effect only. If type is void, we must do likewise. */
9336
9337 gcc_assert (!TREE_ADDRESSABLE (type)
9338 && !ignore
9339 && TREE_TYPE (treeop1) != void_type_node
9340 && TREE_TYPE (treeop2) != void_type_node);
9341
9342 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9343 if (temp)
9344 return temp;
9345
9346 /* If we are not to produce a result, we have no target. Otherwise,
9347 if a target was specified use it; it will not be used as an
9348 intermediate target unless it is safe. If no target, use a
9349 temporary. */
9350
9351 if (modifier != EXPAND_STACK_PARM
9352 && original_target
9353 && safe_from_p (original_target, treeop0, 1)
9354 && GET_MODE (original_target) == mode
9355 && !MEM_P (original_target))
9356 temp = original_target;
9357 else
9358 temp = assign_temp (type, 0, 1);
9359
9360 do_pending_stack_adjust ();
9361 NO_DEFER_POP;
9362 rtx_code_label *lab0 = gen_label_rtx ();
9363 rtx_code_label *lab1 = gen_label_rtx ();
9364 jumpifnot (treeop0, lab0, -1);
9365 store_expr (treeop1, temp,
9366 modifier == EXPAND_STACK_PARM,
9367 false);
9368
9369 emit_jump_insn (gen_jump (lab1));
9370 emit_barrier ();
9371 emit_label (lab0);
9372 store_expr (treeop2, temp,
9373 modifier == EXPAND_STACK_PARM,
9374 false);
9375
9376 emit_label (lab1);
9377 OK_DEFER_POP;
9378 return temp;
9379 }
9380
9381 case VEC_COND_EXPR:
9382 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9383 return target;
9384
9385 default:
9386 gcc_unreachable ();
9387 }
9388
9389 /* Here to do an ordinary binary operator. */
9390 binop:
9391 expand_operands (treeop0, treeop1,
9392 subtarget, &op0, &op1, EXPAND_NORMAL);
9393 binop2:
9394 this_optab = optab_for_tree_code (code, type, optab_default);
9395 binop3:
9396 if (modifier == EXPAND_STACK_PARM)
9397 target = 0;
9398 temp = expand_binop (mode, this_optab, op0, op1, target,
9399 unsignedp, OPTAB_LIB_WIDEN);
9400 gcc_assert (temp);
9401 /* Bitwise operations do not need bitfield reduction as we expect their
9402 operands being properly truncated. */
9403 if (code == BIT_XOR_EXPR
9404 || code == BIT_AND_EXPR
9405 || code == BIT_IOR_EXPR)
9406 return temp;
9407 return REDUCE_BIT_FIELD (temp);
9408 }
9409 #undef REDUCE_BIT_FIELD
9410
9411
9412 /* Return TRUE if expression STMT is suitable for replacement.
9413 Never consider memory loads as replaceable, because those don't ever lead
9414 into constant expressions. */
9415
9416 static bool
9417 stmt_is_replaceable_p (gimple stmt)
9418 {
9419 if (ssa_is_replaceable_p (stmt))
9420 {
9421 /* Don't move around loads. */
9422 if (!gimple_assign_single_p (stmt)
9423 || is_gimple_val (gimple_assign_rhs1 (stmt)))
9424 return true;
9425 }
9426 return false;
9427 }
9428
9429 rtx
9430 expand_expr_real_1 (tree exp, rtx target, machine_mode tmode,
9431 enum expand_modifier modifier, rtx *alt_rtl,
9432 bool inner_reference_p)
9433 {
9434 rtx op0, op1, temp, decl_rtl;
9435 tree type;
9436 int unsignedp;
9437 machine_mode mode;
9438 enum tree_code code = TREE_CODE (exp);
9439 rtx subtarget, original_target;
9440 int ignore;
9441 tree context;
9442 bool reduce_bit_field;
9443 location_t loc = EXPR_LOCATION (exp);
9444 struct separate_ops ops;
9445 tree treeop0, treeop1, treeop2;
9446 tree ssa_name = NULL_TREE;
9447 gimple g;
9448
9449 type = TREE_TYPE (exp);
9450 mode = TYPE_MODE (type);
9451 unsignedp = TYPE_UNSIGNED (type);
9452
9453 treeop0 = treeop1 = treeop2 = NULL_TREE;
9454 if (!VL_EXP_CLASS_P (exp))
9455 switch (TREE_CODE_LENGTH (code))
9456 {
9457 default:
9458 case 3: treeop2 = TREE_OPERAND (exp, 2);
9459 case 2: treeop1 = TREE_OPERAND (exp, 1);
9460 case 1: treeop0 = TREE_OPERAND (exp, 0);
9461 case 0: break;
9462 }
9463 ops.code = code;
9464 ops.type = type;
9465 ops.op0 = treeop0;
9466 ops.op1 = treeop1;
9467 ops.op2 = treeop2;
9468 ops.location = loc;
9469
9470 ignore = (target == const0_rtx
9471 || ((CONVERT_EXPR_CODE_P (code)
9472 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9473 && TREE_CODE (type) == VOID_TYPE));
9474
9475 /* An operation in what may be a bit-field type needs the
9476 result to be reduced to the precision of the bit-field type,
9477 which is narrower than that of the type's mode. */
9478 reduce_bit_field = (!ignore
9479 && INTEGRAL_TYPE_P (type)
9480 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
9481
9482 /* If we are going to ignore this result, we need only do something
9483 if there is a side-effect somewhere in the expression. If there
9484 is, short-circuit the most common cases here. Note that we must
9485 not call expand_expr with anything but const0_rtx in case this
9486 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9487
9488 if (ignore)
9489 {
9490 if (! TREE_SIDE_EFFECTS (exp))
9491 return const0_rtx;
9492
9493 /* Ensure we reference a volatile object even if value is ignored, but
9494 don't do this if all we are doing is taking its address. */
9495 if (TREE_THIS_VOLATILE (exp)
9496 && TREE_CODE (exp) != FUNCTION_DECL
9497 && mode != VOIDmode && mode != BLKmode
9498 && modifier != EXPAND_CONST_ADDRESS)
9499 {
9500 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9501 if (MEM_P (temp))
9502 copy_to_reg (temp);
9503 return const0_rtx;
9504 }
9505
9506 if (TREE_CODE_CLASS (code) == tcc_unary
9507 || code == BIT_FIELD_REF
9508 || code == COMPONENT_REF
9509 || code == INDIRECT_REF)
9510 return expand_expr (treeop0, const0_rtx, VOIDmode,
9511 modifier);
9512
9513 else if (TREE_CODE_CLASS (code) == tcc_binary
9514 || TREE_CODE_CLASS (code) == tcc_comparison
9515 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9516 {
9517 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9518 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9519 return const0_rtx;
9520 }
9521
9522 target = 0;
9523 }
9524
9525 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9526 target = 0;
9527
9528 /* Use subtarget as the target for operand 0 of a binary operation. */
9529 subtarget = get_subtarget (target);
9530 original_target = target;
9531
9532 switch (code)
9533 {
9534 case LABEL_DECL:
9535 {
9536 tree function = decl_function_context (exp);
9537
9538 temp = label_rtx (exp);
9539 temp = gen_rtx_LABEL_REF (Pmode, temp);
9540
9541 if (function != current_function_decl
9542 && function != 0)
9543 LABEL_REF_NONLOCAL_P (temp) = 1;
9544
9545 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9546 return temp;
9547 }
9548
9549 case SSA_NAME:
9550 /* ??? ivopts calls expander, without any preparation from
9551 out-of-ssa. So fake instructions as if this was an access to the
9552 base variable. This unnecessarily allocates a pseudo, see how we can
9553 reuse it, if partition base vars have it set already. */
9554 if (!currently_expanding_to_rtl)
9555 {
9556 tree var = SSA_NAME_VAR (exp);
9557 if (var && DECL_RTL_SET_P (var))
9558 return DECL_RTL (var);
9559 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)),
9560 LAST_VIRTUAL_REGISTER + 1);
9561 }
9562
9563 g = get_gimple_for_ssa_name (exp);
9564 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9565 if (g == NULL
9566 && modifier == EXPAND_INITIALIZER
9567 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9568 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9569 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9570 g = SSA_NAME_DEF_STMT (exp);
9571 if (g)
9572 {
9573 rtx r;
9574 ops.code = gimple_assign_rhs_code (g);
9575 switch (get_gimple_rhs_class (ops.code))
9576 {
9577 case GIMPLE_TERNARY_RHS:
9578 ops.op2 = gimple_assign_rhs3 (g);
9579 /* Fallthru */
9580 case GIMPLE_BINARY_RHS:
9581 ops.op1 = gimple_assign_rhs2 (g);
9582
9583 /* Try to expand conditonal compare. */
9584 if (targetm.gen_ccmp_first)
9585 {
9586 gcc_checking_assert (targetm.gen_ccmp_next != NULL);
9587 r = expand_ccmp_expr (g);
9588 if (r)
9589 break;
9590 }
9591 /* Fallthru */
9592 case GIMPLE_UNARY_RHS:
9593 ops.op0 = gimple_assign_rhs1 (g);
9594 ops.type = TREE_TYPE (gimple_assign_lhs (g));
9595 ops.location = gimple_location (g);
9596 r = expand_expr_real_2 (&ops, target, tmode, modifier);
9597 break;
9598 case GIMPLE_SINGLE_RHS:
9599 {
9600 location_t saved_loc = curr_insn_location ();
9601 set_curr_insn_location (gimple_location (g));
9602 r = expand_expr_real (gimple_assign_rhs1 (g), target,
9603 tmode, modifier, NULL, inner_reference_p);
9604 set_curr_insn_location (saved_loc);
9605 break;
9606 }
9607 default:
9608 gcc_unreachable ();
9609 }
9610 if (REG_P (r) && !REG_EXPR (r))
9611 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9612 return r;
9613 }
9614
9615 ssa_name = exp;
9616 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9617 exp = SSA_NAME_VAR (ssa_name);
9618 goto expand_decl_rtl;
9619
9620 case PARM_DECL:
9621 case VAR_DECL:
9622 /* If a static var's type was incomplete when the decl was written,
9623 but the type is complete now, lay out the decl now. */
9624 if (DECL_SIZE (exp) == 0
9625 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9626 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9627 layout_decl (exp, 0);
9628
9629 /* ... fall through ... */
9630
9631 case FUNCTION_DECL:
9632 case RESULT_DECL:
9633 decl_rtl = DECL_RTL (exp);
9634 expand_decl_rtl:
9635 gcc_assert (decl_rtl);
9636 decl_rtl = copy_rtx (decl_rtl);
9637 /* Record writes to register variables. */
9638 if (modifier == EXPAND_WRITE
9639 && REG_P (decl_rtl)
9640 && HARD_REGISTER_P (decl_rtl))
9641 add_to_hard_reg_set (&crtl->asm_clobbers,
9642 GET_MODE (decl_rtl), REGNO (decl_rtl));
9643
9644 /* Ensure variable marked as used even if it doesn't go through
9645 a parser. If it hasn't be used yet, write out an external
9646 definition. */
9647 TREE_USED (exp) = 1;
9648
9649 /* Show we haven't gotten RTL for this yet. */
9650 temp = 0;
9651
9652 /* Variables inherited from containing functions should have
9653 been lowered by this point. */
9654 context = decl_function_context (exp);
9655 gcc_assert (SCOPE_FILE_SCOPE_P (context)
9656 || context == current_function_decl
9657 || TREE_STATIC (exp)
9658 || DECL_EXTERNAL (exp)
9659 /* ??? C++ creates functions that are not TREE_STATIC. */
9660 || TREE_CODE (exp) == FUNCTION_DECL);
9661
9662 /* This is the case of an array whose size is to be determined
9663 from its initializer, while the initializer is still being parsed.
9664 ??? We aren't parsing while expanding anymore. */
9665
9666 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9667 temp = validize_mem (decl_rtl);
9668
9669 /* If DECL_RTL is memory, we are in the normal case and the
9670 address is not valid, get the address into a register. */
9671
9672 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9673 {
9674 if (alt_rtl)
9675 *alt_rtl = decl_rtl;
9676 decl_rtl = use_anchored_address (decl_rtl);
9677 if (modifier != EXPAND_CONST_ADDRESS
9678 && modifier != EXPAND_SUM
9679 && !memory_address_addr_space_p (DECL_MODE (exp),
9680 XEXP (decl_rtl, 0),
9681 MEM_ADDR_SPACE (decl_rtl)))
9682 temp = replace_equiv_address (decl_rtl,
9683 copy_rtx (XEXP (decl_rtl, 0)));
9684 }
9685
9686 /* If we got something, return it. But first, set the alignment
9687 if the address is a register. */
9688 if (temp != 0)
9689 {
9690 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9691 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9692
9693 return temp;
9694 }
9695
9696 /* If the mode of DECL_RTL does not match that of the decl,
9697 there are two cases: we are dealing with a BLKmode value
9698 that is returned in a register, or we are dealing with
9699 a promoted value. In the latter case, return a SUBREG
9700 of the wanted mode, but mark it so that we know that it
9701 was already extended. */
9702 if (REG_P (decl_rtl)
9703 && DECL_MODE (exp) != BLKmode
9704 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9705 {
9706 machine_mode pmode;
9707
9708 /* Get the signedness to be used for this variable. Ensure we get
9709 the same mode we got when the variable was declared. */
9710 if (code == SSA_NAME
9711 && (g = SSA_NAME_DEF_STMT (ssa_name))
9712 && gimple_code (g) == GIMPLE_CALL
9713 && !gimple_call_internal_p (g))
9714 pmode = promote_function_mode (type, mode, &unsignedp,
9715 gimple_call_fntype (g),
9716 2);
9717 else
9718 pmode = promote_decl_mode (exp, &unsignedp);
9719 gcc_assert (GET_MODE (decl_rtl) == pmode);
9720
9721 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9722 SUBREG_PROMOTED_VAR_P (temp) = 1;
9723 SUBREG_PROMOTED_SET (temp, unsignedp);
9724 return temp;
9725 }
9726
9727 return decl_rtl;
9728
9729 case INTEGER_CST:
9730 /* Given that TYPE_PRECISION (type) is not always equal to
9731 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
9732 the former to the latter according to the signedness of the
9733 type. */
9734 temp = immed_wide_int_const (wide_int::from
9735 (exp,
9736 GET_MODE_PRECISION (TYPE_MODE (type)),
9737 TYPE_SIGN (type)),
9738 TYPE_MODE (type));
9739 return temp;
9740
9741 case VECTOR_CST:
9742 {
9743 tree tmp = NULL_TREE;
9744 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9745 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9746 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9747 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9748 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9749 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9750 return const_vector_from_tree (exp);
9751 if (GET_MODE_CLASS (mode) == MODE_INT)
9752 {
9753 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9754 if (type_for_mode)
9755 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9756 }
9757 if (!tmp)
9758 {
9759 vec<constructor_elt, va_gc> *v;
9760 unsigned i;
9761 vec_alloc (v, VECTOR_CST_NELTS (exp));
9762 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
9763 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
9764 tmp = build_constructor (type, v);
9765 }
9766 return expand_expr (tmp, ignore ? const0_rtx : target,
9767 tmode, modifier);
9768 }
9769
9770 case CONST_DECL:
9771 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9772
9773 case REAL_CST:
9774 /* If optimized, generate immediate CONST_DOUBLE
9775 which will be turned into memory by reload if necessary.
9776
9777 We used to force a register so that loop.c could see it. But
9778 this does not allow gen_* patterns to perform optimizations with
9779 the constants. It also produces two insns in cases like "x = 1.0;".
9780 On most machines, floating-point constants are not permitted in
9781 many insns, so we'd end up copying it to a register in any case.
9782
9783 Now, we do the copying in expand_binop, if appropriate. */
9784 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9785 TYPE_MODE (TREE_TYPE (exp)));
9786
9787 case FIXED_CST:
9788 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9789 TYPE_MODE (TREE_TYPE (exp)));
9790
9791 case COMPLEX_CST:
9792 /* Handle evaluating a complex constant in a CONCAT target. */
9793 if (original_target && GET_CODE (original_target) == CONCAT)
9794 {
9795 machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9796 rtx rtarg, itarg;
9797
9798 rtarg = XEXP (original_target, 0);
9799 itarg = XEXP (original_target, 1);
9800
9801 /* Move the real and imaginary parts separately. */
9802 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9803 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9804
9805 if (op0 != rtarg)
9806 emit_move_insn (rtarg, op0);
9807 if (op1 != itarg)
9808 emit_move_insn (itarg, op1);
9809
9810 return original_target;
9811 }
9812
9813 /* ... fall through ... */
9814
9815 case STRING_CST:
9816 temp = expand_expr_constant (exp, 1, modifier);
9817
9818 /* temp contains a constant address.
9819 On RISC machines where a constant address isn't valid,
9820 make some insns to get that address into a register. */
9821 if (modifier != EXPAND_CONST_ADDRESS
9822 && modifier != EXPAND_INITIALIZER
9823 && modifier != EXPAND_SUM
9824 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9825 MEM_ADDR_SPACE (temp)))
9826 return replace_equiv_address (temp,
9827 copy_rtx (XEXP (temp, 0)));
9828 return temp;
9829
9830 case SAVE_EXPR:
9831 {
9832 tree val = treeop0;
9833 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl,
9834 inner_reference_p);
9835
9836 if (!SAVE_EXPR_RESOLVED_P (exp))
9837 {
9838 /* We can indeed still hit this case, typically via builtin
9839 expanders calling save_expr immediately before expanding
9840 something. Assume this means that we only have to deal
9841 with non-BLKmode values. */
9842 gcc_assert (GET_MODE (ret) != BLKmode);
9843
9844 val = build_decl (curr_insn_location (),
9845 VAR_DECL, NULL, TREE_TYPE (exp));
9846 DECL_ARTIFICIAL (val) = 1;
9847 DECL_IGNORED_P (val) = 1;
9848 treeop0 = val;
9849 TREE_OPERAND (exp, 0) = treeop0;
9850 SAVE_EXPR_RESOLVED_P (exp) = 1;
9851
9852 if (!CONSTANT_P (ret))
9853 ret = copy_to_reg (ret);
9854 SET_DECL_RTL (val, ret);
9855 }
9856
9857 return ret;
9858 }
9859
9860
9861 case CONSTRUCTOR:
9862 /* If we don't need the result, just ensure we evaluate any
9863 subexpressions. */
9864 if (ignore)
9865 {
9866 unsigned HOST_WIDE_INT idx;
9867 tree value;
9868
9869 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9870 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9871
9872 return const0_rtx;
9873 }
9874
9875 return expand_constructor (exp, target, modifier, false);
9876
9877 case TARGET_MEM_REF:
9878 {
9879 addr_space_t as
9880 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9881 enum insn_code icode;
9882 unsigned int align;
9883
9884 op0 = addr_for_mem_ref (exp, as, true);
9885 op0 = memory_address_addr_space (mode, op0, as);
9886 temp = gen_rtx_MEM (mode, op0);
9887 set_mem_attributes (temp, exp, 0);
9888 set_mem_addr_space (temp, as);
9889 align = get_object_alignment (exp);
9890 if (modifier != EXPAND_WRITE
9891 && modifier != EXPAND_MEMORY
9892 && mode != BLKmode
9893 && align < GET_MODE_ALIGNMENT (mode)
9894 /* If the target does not have special handling for unaligned
9895 loads of mode then it can use regular moves for them. */
9896 && ((icode = optab_handler (movmisalign_optab, mode))
9897 != CODE_FOR_nothing))
9898 {
9899 struct expand_operand ops[2];
9900
9901 /* We've already validated the memory, and we're creating a
9902 new pseudo destination. The predicates really can't fail,
9903 nor can the generator. */
9904 create_output_operand (&ops[0], NULL_RTX, mode);
9905 create_fixed_operand (&ops[1], temp);
9906 expand_insn (icode, 2, ops);
9907 temp = ops[0].value;
9908 }
9909 return temp;
9910 }
9911
9912 case MEM_REF:
9913 {
9914 addr_space_t as
9915 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9916 machine_mode address_mode;
9917 tree base = TREE_OPERAND (exp, 0);
9918 gimple def_stmt;
9919 enum insn_code icode;
9920 unsigned align;
9921 /* Handle expansion of non-aliased memory with non-BLKmode. That
9922 might end up in a register. */
9923 if (mem_ref_refers_to_non_mem_p (exp))
9924 {
9925 HOST_WIDE_INT offset = mem_ref_offset (exp).to_short_addr ();
9926 base = TREE_OPERAND (base, 0);
9927 if (offset == 0
9928 && tree_fits_uhwi_p (TYPE_SIZE (type))
9929 && (GET_MODE_BITSIZE (DECL_MODE (base))
9930 == tree_to_uhwi (TYPE_SIZE (type))))
9931 return expand_expr (build1 (VIEW_CONVERT_EXPR, type, base),
9932 target, tmode, modifier);
9933 if (TYPE_MODE (type) == BLKmode)
9934 {
9935 temp = assign_stack_temp (DECL_MODE (base),
9936 GET_MODE_SIZE (DECL_MODE (base)));
9937 store_expr (base, temp, 0, false);
9938 temp = adjust_address (temp, BLKmode, offset);
9939 set_mem_size (temp, int_size_in_bytes (type));
9940 return temp;
9941 }
9942 exp = build3 (BIT_FIELD_REF, type, base, TYPE_SIZE (type),
9943 bitsize_int (offset * BITS_PER_UNIT));
9944 return expand_expr (exp, target, tmode, modifier);
9945 }
9946 address_mode = targetm.addr_space.address_mode (as);
9947 base = TREE_OPERAND (exp, 0);
9948 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9949 {
9950 tree mask = gimple_assign_rhs2 (def_stmt);
9951 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9952 gimple_assign_rhs1 (def_stmt), mask);
9953 TREE_OPERAND (exp, 0) = base;
9954 }
9955 align = get_object_alignment (exp);
9956 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9957 op0 = memory_address_addr_space (mode, op0, as);
9958 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9959 {
9960 rtx off = immed_wide_int_const (mem_ref_offset (exp), address_mode);
9961 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9962 op0 = memory_address_addr_space (mode, op0, as);
9963 }
9964 temp = gen_rtx_MEM (mode, op0);
9965 set_mem_attributes (temp, exp, 0);
9966 set_mem_addr_space (temp, as);
9967 if (TREE_THIS_VOLATILE (exp))
9968 MEM_VOLATILE_P (temp) = 1;
9969 if (modifier != EXPAND_WRITE
9970 && modifier != EXPAND_MEMORY
9971 && !inner_reference_p
9972 && mode != BLKmode
9973 && align < GET_MODE_ALIGNMENT (mode))
9974 {
9975 if ((icode = optab_handler (movmisalign_optab, mode))
9976 != CODE_FOR_nothing)
9977 {
9978 struct expand_operand ops[2];
9979
9980 /* We've already validated the memory, and we're creating a
9981 new pseudo destination. The predicates really can't fail,
9982 nor can the generator. */
9983 create_output_operand (&ops[0], NULL_RTX, mode);
9984 create_fixed_operand (&ops[1], temp);
9985 expand_insn (icode, 2, ops);
9986 temp = ops[0].value;
9987 }
9988 else if (SLOW_UNALIGNED_ACCESS (mode, align))
9989 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
9990 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
9991 (modifier == EXPAND_STACK_PARM
9992 ? NULL_RTX : target),
9993 mode, mode);
9994 }
9995 return temp;
9996 }
9997
9998 case ARRAY_REF:
9999
10000 {
10001 tree array = treeop0;
10002 tree index = treeop1;
10003 tree init;
10004
10005 /* Fold an expression like: "foo"[2].
10006 This is not done in fold so it won't happen inside &.
10007 Don't fold if this is for wide characters since it's too
10008 difficult to do correctly and this is a very rare case. */
10009
10010 if (modifier != EXPAND_CONST_ADDRESS
10011 && modifier != EXPAND_INITIALIZER
10012 && modifier != EXPAND_MEMORY)
10013 {
10014 tree t = fold_read_from_constant_string (exp);
10015
10016 if (t)
10017 return expand_expr (t, target, tmode, modifier);
10018 }
10019
10020 /* If this is a constant index into a constant array,
10021 just get the value from the array. Handle both the cases when
10022 we have an explicit constructor and when our operand is a variable
10023 that was declared const. */
10024
10025 if (modifier != EXPAND_CONST_ADDRESS
10026 && modifier != EXPAND_INITIALIZER
10027 && modifier != EXPAND_MEMORY
10028 && TREE_CODE (array) == CONSTRUCTOR
10029 && ! TREE_SIDE_EFFECTS (array)
10030 && TREE_CODE (index) == INTEGER_CST)
10031 {
10032 unsigned HOST_WIDE_INT ix;
10033 tree field, value;
10034
10035 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
10036 field, value)
10037 if (tree_int_cst_equal (field, index))
10038 {
10039 if (!TREE_SIDE_EFFECTS (value))
10040 return expand_expr (fold (value), target, tmode, modifier);
10041 break;
10042 }
10043 }
10044
10045 else if (optimize >= 1
10046 && modifier != EXPAND_CONST_ADDRESS
10047 && modifier != EXPAND_INITIALIZER
10048 && modifier != EXPAND_MEMORY
10049 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
10050 && TREE_CODE (index) == INTEGER_CST
10051 && (TREE_CODE (array) == VAR_DECL
10052 || TREE_CODE (array) == CONST_DECL)
10053 && (init = ctor_for_folding (array)) != error_mark_node)
10054 {
10055 if (init == NULL_TREE)
10056 {
10057 tree value = build_zero_cst (type);
10058 if (TREE_CODE (value) == CONSTRUCTOR)
10059 {
10060 /* If VALUE is a CONSTRUCTOR, this optimization is only
10061 useful if this doesn't store the CONSTRUCTOR into
10062 memory. If it does, it is more efficient to just
10063 load the data from the array directly. */
10064 rtx ret = expand_constructor (value, target,
10065 modifier, true);
10066 if (ret == NULL_RTX)
10067 value = NULL_TREE;
10068 }
10069
10070 if (value)
10071 return expand_expr (value, target, tmode, modifier);
10072 }
10073 else if (TREE_CODE (init) == CONSTRUCTOR)
10074 {
10075 unsigned HOST_WIDE_INT ix;
10076 tree field, value;
10077
10078 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
10079 field, value)
10080 if (tree_int_cst_equal (field, index))
10081 {
10082 if (TREE_SIDE_EFFECTS (value))
10083 break;
10084
10085 if (TREE_CODE (value) == CONSTRUCTOR)
10086 {
10087 /* If VALUE is a CONSTRUCTOR, this
10088 optimization is only useful if
10089 this doesn't store the CONSTRUCTOR
10090 into memory. If it does, it is more
10091 efficient to just load the data from
10092 the array directly. */
10093 rtx ret = expand_constructor (value, target,
10094 modifier, true);
10095 if (ret == NULL_RTX)
10096 break;
10097 }
10098
10099 return
10100 expand_expr (fold (value), target, tmode, modifier);
10101 }
10102 }
10103 else if (TREE_CODE (init) == STRING_CST)
10104 {
10105 tree low_bound = array_ref_low_bound (exp);
10106 tree index1 = fold_convert_loc (loc, sizetype, treeop1);
10107
10108 /* Optimize the special case of a zero lower bound.
10109
10110 We convert the lower bound to sizetype to avoid problems
10111 with constant folding. E.g. suppose the lower bound is
10112 1 and its mode is QI. Without the conversion
10113 (ARRAY + (INDEX - (unsigned char)1))
10114 becomes
10115 (ARRAY + (-(unsigned char)1) + INDEX)
10116 which becomes
10117 (ARRAY + 255 + INDEX). Oops! */
10118 if (!integer_zerop (low_bound))
10119 index1 = size_diffop_loc (loc, index1,
10120 fold_convert_loc (loc, sizetype,
10121 low_bound));
10122
10123 if (compare_tree_int (index1, TREE_STRING_LENGTH (init)) < 0)
10124 {
10125 tree type = TREE_TYPE (TREE_TYPE (init));
10126 machine_mode mode = TYPE_MODE (type);
10127
10128 if (GET_MODE_CLASS (mode) == MODE_INT
10129 && GET_MODE_SIZE (mode) == 1)
10130 return gen_int_mode (TREE_STRING_POINTER (init)
10131 [TREE_INT_CST_LOW (index1)],
10132 mode);
10133 }
10134 }
10135 }
10136 }
10137 goto normal_inner_ref;
10138
10139 case COMPONENT_REF:
10140 /* If the operand is a CONSTRUCTOR, we can just extract the
10141 appropriate field if it is present. */
10142 if (TREE_CODE (treeop0) == CONSTRUCTOR)
10143 {
10144 unsigned HOST_WIDE_INT idx;
10145 tree field, value;
10146
10147 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
10148 idx, field, value)
10149 if (field == treeop1
10150 /* We can normally use the value of the field in the
10151 CONSTRUCTOR. However, if this is a bitfield in
10152 an integral mode that we can fit in a HOST_WIDE_INT,
10153 we must mask only the number of bits in the bitfield,
10154 since this is done implicitly by the constructor. If
10155 the bitfield does not meet either of those conditions,
10156 we can't do this optimization. */
10157 && (! DECL_BIT_FIELD (field)
10158 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
10159 && (GET_MODE_PRECISION (DECL_MODE (field))
10160 <= HOST_BITS_PER_WIDE_INT))))
10161 {
10162 if (DECL_BIT_FIELD (field)
10163 && modifier == EXPAND_STACK_PARM)
10164 target = 0;
10165 op0 = expand_expr (value, target, tmode, modifier);
10166 if (DECL_BIT_FIELD (field))
10167 {
10168 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
10169 machine_mode imode = TYPE_MODE (TREE_TYPE (field));
10170
10171 if (TYPE_UNSIGNED (TREE_TYPE (field)))
10172 {
10173 op1 = gen_int_mode (((HOST_WIDE_INT) 1 << bitsize) - 1,
10174 imode);
10175 op0 = expand_and (imode, op0, op1, target);
10176 }
10177 else
10178 {
10179 int count = GET_MODE_PRECISION (imode) - bitsize;
10180
10181 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
10182 target, 0);
10183 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
10184 target, 0);
10185 }
10186 }
10187
10188 return op0;
10189 }
10190 }
10191 goto normal_inner_ref;
10192
10193 case BIT_FIELD_REF:
10194 case ARRAY_RANGE_REF:
10195 normal_inner_ref:
10196 {
10197 machine_mode mode1, mode2;
10198 HOST_WIDE_INT bitsize, bitpos;
10199 tree offset;
10200 int volatilep = 0, must_force_mem;
10201 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
10202 &mode1, &unsignedp, &volatilep, true);
10203 rtx orig_op0, memloc;
10204 bool clear_mem_expr = false;
10205
10206 /* If we got back the original object, something is wrong. Perhaps
10207 we are evaluating an expression too early. In any event, don't
10208 infinitely recurse. */
10209 gcc_assert (tem != exp);
10210
10211 /* If TEM's type is a union of variable size, pass TARGET to the inner
10212 computation, since it will need a temporary and TARGET is known
10213 to have to do. This occurs in unchecked conversion in Ada. */
10214 orig_op0 = op0
10215 = expand_expr_real (tem,
10216 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10217 && COMPLETE_TYPE_P (TREE_TYPE (tem))
10218 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10219 != INTEGER_CST)
10220 && modifier != EXPAND_STACK_PARM
10221 ? target : NULL_RTX),
10222 VOIDmode,
10223 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10224 NULL, true);
10225
10226 /* If the field has a mode, we want to access it in the
10227 field's mode, not the computed mode.
10228 If a MEM has VOIDmode (external with incomplete type),
10229 use BLKmode for it instead. */
10230 if (MEM_P (op0))
10231 {
10232 if (mode1 != VOIDmode)
10233 op0 = adjust_address (op0, mode1, 0);
10234 else if (GET_MODE (op0) == VOIDmode)
10235 op0 = adjust_address (op0, BLKmode, 0);
10236 }
10237
10238 mode2
10239 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
10240
10241 /* If we have either an offset, a BLKmode result, or a reference
10242 outside the underlying object, we must force it to memory.
10243 Such a case can occur in Ada if we have unchecked conversion
10244 of an expression from a scalar type to an aggregate type or
10245 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10246 passed a partially uninitialized object or a view-conversion
10247 to a larger size. */
10248 must_force_mem = (offset
10249 || mode1 == BLKmode
10250 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
10251
10252 /* Handle CONCAT first. */
10253 if (GET_CODE (op0) == CONCAT && !must_force_mem)
10254 {
10255 if (bitpos == 0
10256 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
10257 return op0;
10258 if (bitpos == 0
10259 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
10260 && bitsize)
10261 {
10262 op0 = XEXP (op0, 0);
10263 mode2 = GET_MODE (op0);
10264 }
10265 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
10266 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
10267 && bitpos
10268 && bitsize)
10269 {
10270 op0 = XEXP (op0, 1);
10271 bitpos = 0;
10272 mode2 = GET_MODE (op0);
10273 }
10274 else
10275 /* Otherwise force into memory. */
10276 must_force_mem = 1;
10277 }
10278
10279 /* If this is a constant, put it in a register if it is a legitimate
10280 constant and we don't need a memory reference. */
10281 if (CONSTANT_P (op0)
10282 && mode2 != BLKmode
10283 && targetm.legitimate_constant_p (mode2, op0)
10284 && !must_force_mem)
10285 op0 = force_reg (mode2, op0);
10286
10287 /* Otherwise, if this is a constant, try to force it to the constant
10288 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10289 is a legitimate constant. */
10290 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
10291 op0 = validize_mem (memloc);
10292
10293 /* Otherwise, if this is a constant or the object is not in memory
10294 and need be, put it there. */
10295 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
10296 {
10297 memloc = assign_temp (TREE_TYPE (tem), 1, 1);
10298 emit_move_insn (memloc, op0);
10299 op0 = memloc;
10300 clear_mem_expr = true;
10301 }
10302
10303 if (offset)
10304 {
10305 machine_mode address_mode;
10306 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
10307 EXPAND_SUM);
10308
10309 gcc_assert (MEM_P (op0));
10310
10311 address_mode = get_address_mode (op0);
10312 if (GET_MODE (offset_rtx) != address_mode)
10313 {
10314 /* We cannot be sure that the RTL in offset_rtx is valid outside
10315 of a memory address context, so force it into a register
10316 before attempting to convert it to the desired mode. */
10317 offset_rtx = force_operand (offset_rtx, NULL_RTX);
10318 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
10319 }
10320
10321 /* See the comment in expand_assignment for the rationale. */
10322 if (mode1 != VOIDmode
10323 && bitpos != 0
10324 && bitsize > 0
10325 && (bitpos % bitsize) == 0
10326 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
10327 && MEM_ALIGN (op0) >= GET_MODE_ALIGNMENT (mode1))
10328 {
10329 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10330 bitpos = 0;
10331 }
10332
10333 op0 = offset_address (op0, offset_rtx,
10334 highest_pow2_factor (offset));
10335 }
10336
10337 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10338 record its alignment as BIGGEST_ALIGNMENT. */
10339 if (MEM_P (op0) && bitpos == 0 && offset != 0
10340 && is_aligning_offset (offset, tem))
10341 set_mem_align (op0, BIGGEST_ALIGNMENT);
10342
10343 /* Don't forget about volatility even if this is a bitfield. */
10344 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
10345 {
10346 if (op0 == orig_op0)
10347 op0 = copy_rtx (op0);
10348
10349 MEM_VOLATILE_P (op0) = 1;
10350 }
10351
10352 /* In cases where an aligned union has an unaligned object
10353 as a field, we might be extracting a BLKmode value from
10354 an integer-mode (e.g., SImode) object. Handle this case
10355 by doing the extract into an object as wide as the field
10356 (which we know to be the width of a basic mode), then
10357 storing into memory, and changing the mode to BLKmode. */
10358 if (mode1 == VOIDmode
10359 || REG_P (op0) || GET_CODE (op0) == SUBREG
10360 || (mode1 != BLKmode && ! direct_load[(int) mode1]
10361 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
10362 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
10363 && modifier != EXPAND_CONST_ADDRESS
10364 && modifier != EXPAND_INITIALIZER
10365 && modifier != EXPAND_MEMORY)
10366 /* If the bitfield is volatile and the bitsize
10367 is narrower than the access size of the bitfield,
10368 we need to extract bitfields from the access. */
10369 || (volatilep && TREE_CODE (exp) == COMPONENT_REF
10370 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp, 1))
10371 && mode1 != BLKmode
10372 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)
10373 /* If the field isn't aligned enough to fetch as a memref,
10374 fetch it as a bit field. */
10375 || (mode1 != BLKmode
10376 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
10377 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
10378 || (MEM_P (op0)
10379 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
10380 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
10381 && modifier != EXPAND_MEMORY
10382 && ((modifier == EXPAND_CONST_ADDRESS
10383 || modifier == EXPAND_INITIALIZER)
10384 ? STRICT_ALIGNMENT
10385 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
10386 || (bitpos % BITS_PER_UNIT != 0)))
10387 /* If the type and the field are a constant size and the
10388 size of the type isn't the same size as the bitfield,
10389 we must use bitfield operations. */
10390 || (bitsize >= 0
10391 && TYPE_SIZE (TREE_TYPE (exp))
10392 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10393 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
10394 bitsize)))
10395 {
10396 machine_mode ext_mode = mode;
10397
10398 if (ext_mode == BLKmode
10399 && ! (target != 0 && MEM_P (op0)
10400 && MEM_P (target)
10401 && bitpos % BITS_PER_UNIT == 0))
10402 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
10403
10404 if (ext_mode == BLKmode)
10405 {
10406 if (target == 0)
10407 target = assign_temp (type, 1, 1);
10408
10409 /* ??? Unlike the similar test a few lines below, this one is
10410 very likely obsolete. */
10411 if (bitsize == 0)
10412 return target;
10413
10414 /* In this case, BITPOS must start at a byte boundary and
10415 TARGET, if specified, must be a MEM. */
10416 gcc_assert (MEM_P (op0)
10417 && (!target || MEM_P (target))
10418 && !(bitpos % BITS_PER_UNIT));
10419
10420 emit_block_move (target,
10421 adjust_address (op0, VOIDmode,
10422 bitpos / BITS_PER_UNIT),
10423 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
10424 / BITS_PER_UNIT),
10425 (modifier == EXPAND_STACK_PARM
10426 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10427
10428 return target;
10429 }
10430
10431 /* If we have nothing to extract, the result will be 0 for targets
10432 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10433 return 0 for the sake of consistency, as reading a zero-sized
10434 bitfield is valid in Ada and the value is fully specified. */
10435 if (bitsize == 0)
10436 return const0_rtx;
10437
10438 op0 = validize_mem (op0);
10439
10440 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10441 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10442
10443 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
10444 (modifier == EXPAND_STACK_PARM
10445 ? NULL_RTX : target),
10446 ext_mode, ext_mode);
10447
10448 /* If the result is a record type and BITSIZE is narrower than
10449 the mode of OP0, an integral mode, and this is a big endian
10450 machine, we must put the field into the high-order bits. */
10451 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
10452 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
10453 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
10454 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
10455 GET_MODE_BITSIZE (GET_MODE (op0))
10456 - bitsize, op0, 1);
10457
10458 /* If the result type is BLKmode, store the data into a temporary
10459 of the appropriate type, but with the mode corresponding to the
10460 mode for the data we have (op0's mode). */
10461 if (mode == BLKmode)
10462 {
10463 rtx new_rtx
10464 = assign_stack_temp_for_type (ext_mode,
10465 GET_MODE_BITSIZE (ext_mode),
10466 type);
10467 emit_move_insn (new_rtx, op0);
10468 op0 = copy_rtx (new_rtx);
10469 PUT_MODE (op0, BLKmode);
10470 }
10471
10472 return op0;
10473 }
10474
10475 /* If the result is BLKmode, use that to access the object
10476 now as well. */
10477 if (mode == BLKmode)
10478 mode1 = BLKmode;
10479
10480 /* Get a reference to just this component. */
10481 if (modifier == EXPAND_CONST_ADDRESS
10482 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10483 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
10484 else
10485 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10486
10487 if (op0 == orig_op0)
10488 op0 = copy_rtx (op0);
10489
10490 set_mem_attributes (op0, exp, 0);
10491
10492 if (REG_P (XEXP (op0, 0)))
10493 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10494
10495 /* If op0 is a temporary because the original expressions was forced
10496 to memory, clear MEM_EXPR so that the original expression cannot
10497 be marked as addressable through MEM_EXPR of the temporary. */
10498 if (clear_mem_expr)
10499 set_mem_expr (op0, NULL_TREE);
10500
10501 MEM_VOLATILE_P (op0) |= volatilep;
10502 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
10503 || modifier == EXPAND_CONST_ADDRESS
10504 || modifier == EXPAND_INITIALIZER)
10505 return op0;
10506
10507 if (target == 0)
10508 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
10509
10510 convert_move (target, op0, unsignedp);
10511 return target;
10512 }
10513
10514 case OBJ_TYPE_REF:
10515 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
10516
10517 case CALL_EXPR:
10518 /* All valid uses of __builtin_va_arg_pack () are removed during
10519 inlining. */
10520 if (CALL_EXPR_VA_ARG_PACK (exp))
10521 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
10522 {
10523 tree fndecl = get_callee_fndecl (exp), attr;
10524
10525 if (fndecl
10526 && (attr = lookup_attribute ("error",
10527 DECL_ATTRIBUTES (fndecl))) != NULL)
10528 error ("%Kcall to %qs declared with attribute error: %s",
10529 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10530 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10531 if (fndecl
10532 && (attr = lookup_attribute ("warning",
10533 DECL_ATTRIBUTES (fndecl))) != NULL)
10534 warning_at (tree_nonartificial_location (exp),
10535 0, "%Kcall to %qs declared with attribute warning: %s",
10536 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10537 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10538
10539 /* Check for a built-in function. */
10540 if (fndecl && DECL_BUILT_IN (fndecl))
10541 {
10542 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
10543 if (CALL_WITH_BOUNDS_P (exp))
10544 return expand_builtin_with_bounds (exp, target, subtarget,
10545 tmode, ignore);
10546 else
10547 return expand_builtin (exp, target, subtarget, tmode, ignore);
10548 }
10549 }
10550 return expand_call (exp, target, ignore);
10551
10552 case VIEW_CONVERT_EXPR:
10553 op0 = NULL_RTX;
10554
10555 /* If we are converting to BLKmode, try to avoid an intermediate
10556 temporary by fetching an inner memory reference. */
10557 if (mode == BLKmode
10558 && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
10559 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10560 && handled_component_p (treeop0))
10561 {
10562 machine_mode mode1;
10563 HOST_WIDE_INT bitsize, bitpos;
10564 tree offset;
10565 int unsignedp;
10566 int volatilep = 0;
10567 tree tem
10568 = get_inner_reference (treeop0, &bitsize, &bitpos,
10569 &offset, &mode1, &unsignedp, &volatilep,
10570 true);
10571 rtx orig_op0;
10572
10573 /* ??? We should work harder and deal with non-zero offsets. */
10574 if (!offset
10575 && (bitpos % BITS_PER_UNIT) == 0
10576 && bitsize >= 0
10577 && compare_tree_int (TYPE_SIZE (type), bitsize) == 0)
10578 {
10579 /* See the normal_inner_ref case for the rationale. */
10580 orig_op0
10581 = expand_expr_real (tem,
10582 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10583 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10584 != INTEGER_CST)
10585 && modifier != EXPAND_STACK_PARM
10586 ? target : NULL_RTX),
10587 VOIDmode,
10588 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10589 NULL, true);
10590
10591 if (MEM_P (orig_op0))
10592 {
10593 op0 = orig_op0;
10594
10595 /* Get a reference to just this component. */
10596 if (modifier == EXPAND_CONST_ADDRESS
10597 || modifier == EXPAND_SUM
10598 || modifier == EXPAND_INITIALIZER)
10599 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
10600 else
10601 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10602
10603 if (op0 == orig_op0)
10604 op0 = copy_rtx (op0);
10605
10606 set_mem_attributes (op0, treeop0, 0);
10607 if (REG_P (XEXP (op0, 0)))
10608 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10609
10610 MEM_VOLATILE_P (op0) |= volatilep;
10611 }
10612 }
10613 }
10614
10615 if (!op0)
10616 op0 = expand_expr_real (treeop0, NULL_RTX, VOIDmode, modifier,
10617 NULL, inner_reference_p);
10618
10619 /* If the input and output modes are both the same, we are done. */
10620 if (mode == GET_MODE (op0))
10621 ;
10622 /* If neither mode is BLKmode, and both modes are the same size
10623 then we can use gen_lowpart. */
10624 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10625 && (GET_MODE_PRECISION (mode)
10626 == GET_MODE_PRECISION (GET_MODE (op0)))
10627 && !COMPLEX_MODE_P (GET_MODE (op0)))
10628 {
10629 if (GET_CODE (op0) == SUBREG)
10630 op0 = force_reg (GET_MODE (op0), op0);
10631 temp = gen_lowpart_common (mode, op0);
10632 if (temp)
10633 op0 = temp;
10634 else
10635 {
10636 if (!REG_P (op0) && !MEM_P (op0))
10637 op0 = force_reg (GET_MODE (op0), op0);
10638 op0 = gen_lowpart (mode, op0);
10639 }
10640 }
10641 /* If both types are integral, convert from one mode to the other. */
10642 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10643 op0 = convert_modes (mode, GET_MODE (op0), op0,
10644 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10645 /* If the output type is a bit-field type, do an extraction. */
10646 else if (reduce_bit_field)
10647 return extract_bit_field (op0, TYPE_PRECISION (type), 0,
10648 TYPE_UNSIGNED (type), NULL_RTX,
10649 mode, mode);
10650 /* As a last resort, spill op0 to memory, and reload it in a
10651 different mode. */
10652 else if (!MEM_P (op0))
10653 {
10654 /* If the operand is not a MEM, force it into memory. Since we
10655 are going to be changing the mode of the MEM, don't call
10656 force_const_mem for constants because we don't allow pool
10657 constants to change mode. */
10658 tree inner_type = TREE_TYPE (treeop0);
10659
10660 gcc_assert (!TREE_ADDRESSABLE (exp));
10661
10662 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10663 target
10664 = assign_stack_temp_for_type
10665 (TYPE_MODE (inner_type),
10666 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
10667
10668 emit_move_insn (target, op0);
10669 op0 = target;
10670 }
10671
10672 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
10673 output type is such that the operand is known to be aligned, indicate
10674 that it is. Otherwise, we need only be concerned about alignment for
10675 non-BLKmode results. */
10676 if (MEM_P (op0))
10677 {
10678 enum insn_code icode;
10679
10680 if (TYPE_ALIGN_OK (type))
10681 {
10682 /* ??? Copying the MEM without substantially changing it might
10683 run afoul of the code handling volatile memory references in
10684 store_expr, which assumes that TARGET is returned unmodified
10685 if it has been used. */
10686 op0 = copy_rtx (op0);
10687 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10688 }
10689 else if (modifier != EXPAND_WRITE
10690 && modifier != EXPAND_MEMORY
10691 && !inner_reference_p
10692 && mode != BLKmode
10693 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10694 {
10695 /* If the target does have special handling for unaligned
10696 loads of mode then use them. */
10697 if ((icode = optab_handler (movmisalign_optab, mode))
10698 != CODE_FOR_nothing)
10699 {
10700 rtx reg, insn;
10701
10702 op0 = adjust_address (op0, mode, 0);
10703 /* We've already validated the memory, and we're creating a
10704 new pseudo destination. The predicates really can't
10705 fail. */
10706 reg = gen_reg_rtx (mode);
10707
10708 /* Nor can the insn generator. */
10709 insn = GEN_FCN (icode) (reg, op0);
10710 emit_insn (insn);
10711 return reg;
10712 }
10713 else if (STRICT_ALIGNMENT)
10714 {
10715 tree inner_type = TREE_TYPE (treeop0);
10716 HOST_WIDE_INT temp_size
10717 = MAX (int_size_in_bytes (inner_type),
10718 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10719 rtx new_rtx
10720 = assign_stack_temp_for_type (mode, temp_size, type);
10721 rtx new_with_op0_mode
10722 = adjust_address (new_rtx, GET_MODE (op0), 0);
10723
10724 gcc_assert (!TREE_ADDRESSABLE (exp));
10725
10726 if (GET_MODE (op0) == BLKmode)
10727 emit_block_move (new_with_op0_mode, op0,
10728 GEN_INT (GET_MODE_SIZE (mode)),
10729 (modifier == EXPAND_STACK_PARM
10730 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10731 else
10732 emit_move_insn (new_with_op0_mode, op0);
10733
10734 op0 = new_rtx;
10735 }
10736 }
10737
10738 op0 = adjust_address (op0, mode, 0);
10739 }
10740
10741 return op0;
10742
10743 case MODIFY_EXPR:
10744 {
10745 tree lhs = treeop0;
10746 tree rhs = treeop1;
10747 gcc_assert (ignore);
10748
10749 /* Check for |= or &= of a bitfield of size one into another bitfield
10750 of size 1. In this case, (unless we need the result of the
10751 assignment) we can do this more efficiently with a
10752 test followed by an assignment, if necessary.
10753
10754 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10755 things change so we do, this code should be enhanced to
10756 support it. */
10757 if (TREE_CODE (lhs) == COMPONENT_REF
10758 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10759 || TREE_CODE (rhs) == BIT_AND_EXPR)
10760 && TREE_OPERAND (rhs, 0) == lhs
10761 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10762 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10763 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10764 {
10765 rtx_code_label *label = gen_label_rtx ();
10766 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10767 do_jump (TREE_OPERAND (rhs, 1),
10768 value ? label : 0,
10769 value ? 0 : label, -1);
10770 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10771 false);
10772 do_pending_stack_adjust ();
10773 emit_label (label);
10774 return const0_rtx;
10775 }
10776
10777 expand_assignment (lhs, rhs, false);
10778 return const0_rtx;
10779 }
10780
10781 case ADDR_EXPR:
10782 return expand_expr_addr_expr (exp, target, tmode, modifier);
10783
10784 case REALPART_EXPR:
10785 op0 = expand_normal (treeop0);
10786 return read_complex_part (op0, false);
10787
10788 case IMAGPART_EXPR:
10789 op0 = expand_normal (treeop0);
10790 return read_complex_part (op0, true);
10791
10792 case RETURN_EXPR:
10793 case LABEL_EXPR:
10794 case GOTO_EXPR:
10795 case SWITCH_EXPR:
10796 case ASM_EXPR:
10797 /* Expanded in cfgexpand.c. */
10798 gcc_unreachable ();
10799
10800 case TRY_CATCH_EXPR:
10801 case CATCH_EXPR:
10802 case EH_FILTER_EXPR:
10803 case TRY_FINALLY_EXPR:
10804 /* Lowered by tree-eh.c. */
10805 gcc_unreachable ();
10806
10807 case WITH_CLEANUP_EXPR:
10808 case CLEANUP_POINT_EXPR:
10809 case TARGET_EXPR:
10810 case CASE_LABEL_EXPR:
10811 case VA_ARG_EXPR:
10812 case BIND_EXPR:
10813 case INIT_EXPR:
10814 case CONJ_EXPR:
10815 case COMPOUND_EXPR:
10816 case PREINCREMENT_EXPR:
10817 case PREDECREMENT_EXPR:
10818 case POSTINCREMENT_EXPR:
10819 case POSTDECREMENT_EXPR:
10820 case LOOP_EXPR:
10821 case EXIT_EXPR:
10822 case COMPOUND_LITERAL_EXPR:
10823 /* Lowered by gimplify.c. */
10824 gcc_unreachable ();
10825
10826 case FDESC_EXPR:
10827 /* Function descriptors are not valid except for as
10828 initialization constants, and should not be expanded. */
10829 gcc_unreachable ();
10830
10831 case WITH_SIZE_EXPR:
10832 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10833 have pulled out the size to use in whatever context it needed. */
10834 return expand_expr_real (treeop0, original_target, tmode,
10835 modifier, alt_rtl, inner_reference_p);
10836
10837 default:
10838 return expand_expr_real_2 (&ops, target, tmode, modifier);
10839 }
10840 }
10841 \f
10842 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10843 signedness of TYPE), possibly returning the result in TARGET. */
10844 static rtx
10845 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10846 {
10847 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10848 if (target && GET_MODE (target) != GET_MODE (exp))
10849 target = 0;
10850 /* For constant values, reduce using build_int_cst_type. */
10851 if (CONST_INT_P (exp))
10852 {
10853 HOST_WIDE_INT value = INTVAL (exp);
10854 tree t = build_int_cst_type (type, value);
10855 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10856 }
10857 else if (TYPE_UNSIGNED (type))
10858 {
10859 machine_mode mode = GET_MODE (exp);
10860 rtx mask = immed_wide_int_const
10861 (wi::mask (prec, false, GET_MODE_PRECISION (mode)), mode);
10862 return expand_and (mode, exp, mask, target);
10863 }
10864 else
10865 {
10866 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10867 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10868 exp, count, target, 0);
10869 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10870 exp, count, target, 0);
10871 }
10872 }
10873 \f
10874 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10875 when applied to the address of EXP produces an address known to be
10876 aligned more than BIGGEST_ALIGNMENT. */
10877
10878 static int
10879 is_aligning_offset (const_tree offset, const_tree exp)
10880 {
10881 /* Strip off any conversions. */
10882 while (CONVERT_EXPR_P (offset))
10883 offset = TREE_OPERAND (offset, 0);
10884
10885 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10886 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10887 if (TREE_CODE (offset) != BIT_AND_EXPR
10888 || !tree_fits_uhwi_p (TREE_OPERAND (offset, 1))
10889 || compare_tree_int (TREE_OPERAND (offset, 1),
10890 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10891 || exact_log2 (tree_to_uhwi (TREE_OPERAND (offset, 1)) + 1) < 0)
10892 return 0;
10893
10894 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10895 It must be NEGATE_EXPR. Then strip any more conversions. */
10896 offset = TREE_OPERAND (offset, 0);
10897 while (CONVERT_EXPR_P (offset))
10898 offset = TREE_OPERAND (offset, 0);
10899
10900 if (TREE_CODE (offset) != NEGATE_EXPR)
10901 return 0;
10902
10903 offset = TREE_OPERAND (offset, 0);
10904 while (CONVERT_EXPR_P (offset))
10905 offset = TREE_OPERAND (offset, 0);
10906
10907 /* This must now be the address of EXP. */
10908 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10909 }
10910 \f
10911 /* Return the tree node if an ARG corresponds to a string constant or zero
10912 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10913 in bytes within the string that ARG is accessing. The type of the
10914 offset will be `sizetype'. */
10915
10916 tree
10917 string_constant (tree arg, tree *ptr_offset)
10918 {
10919 tree array, offset, lower_bound;
10920 STRIP_NOPS (arg);
10921
10922 if (TREE_CODE (arg) == ADDR_EXPR)
10923 {
10924 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10925 {
10926 *ptr_offset = size_zero_node;
10927 return TREE_OPERAND (arg, 0);
10928 }
10929 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10930 {
10931 array = TREE_OPERAND (arg, 0);
10932 offset = size_zero_node;
10933 }
10934 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10935 {
10936 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10937 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10938 if (TREE_CODE (array) != STRING_CST
10939 && TREE_CODE (array) != VAR_DECL)
10940 return 0;
10941
10942 /* Check if the array has a nonzero lower bound. */
10943 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10944 if (!integer_zerop (lower_bound))
10945 {
10946 /* If the offset and base aren't both constants, return 0. */
10947 if (TREE_CODE (lower_bound) != INTEGER_CST)
10948 return 0;
10949 if (TREE_CODE (offset) != INTEGER_CST)
10950 return 0;
10951 /* Adjust offset by the lower bound. */
10952 offset = size_diffop (fold_convert (sizetype, offset),
10953 fold_convert (sizetype, lower_bound));
10954 }
10955 }
10956 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10957 {
10958 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10959 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10960 if (TREE_CODE (array) != ADDR_EXPR)
10961 return 0;
10962 array = TREE_OPERAND (array, 0);
10963 if (TREE_CODE (array) != STRING_CST
10964 && TREE_CODE (array) != VAR_DECL)
10965 return 0;
10966 }
10967 else
10968 return 0;
10969 }
10970 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10971 {
10972 tree arg0 = TREE_OPERAND (arg, 0);
10973 tree arg1 = TREE_OPERAND (arg, 1);
10974
10975 STRIP_NOPS (arg0);
10976 STRIP_NOPS (arg1);
10977
10978 if (TREE_CODE (arg0) == ADDR_EXPR
10979 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10980 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10981 {
10982 array = TREE_OPERAND (arg0, 0);
10983 offset = arg1;
10984 }
10985 else if (TREE_CODE (arg1) == ADDR_EXPR
10986 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10987 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10988 {
10989 array = TREE_OPERAND (arg1, 0);
10990 offset = arg0;
10991 }
10992 else
10993 return 0;
10994 }
10995 else
10996 return 0;
10997
10998 if (TREE_CODE (array) == STRING_CST)
10999 {
11000 *ptr_offset = fold_convert (sizetype, offset);
11001 return array;
11002 }
11003 else if (TREE_CODE (array) == VAR_DECL
11004 || TREE_CODE (array) == CONST_DECL)
11005 {
11006 int length;
11007 tree init = ctor_for_folding (array);
11008
11009 /* Variables initialized to string literals can be handled too. */
11010 if (init == error_mark_node
11011 || !init
11012 || TREE_CODE (init) != STRING_CST)
11013 return 0;
11014
11015 /* Avoid const char foo[4] = "abcde"; */
11016 if (DECL_SIZE_UNIT (array) == NULL_TREE
11017 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
11018 || (length = TREE_STRING_LENGTH (init)) <= 0
11019 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
11020 return 0;
11021
11022 /* If variable is bigger than the string literal, OFFSET must be constant
11023 and inside of the bounds of the string literal. */
11024 offset = fold_convert (sizetype, offset);
11025 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
11026 && (! tree_fits_uhwi_p (offset)
11027 || compare_tree_int (offset, length) >= 0))
11028 return 0;
11029
11030 *ptr_offset = offset;
11031 return init;
11032 }
11033
11034 return 0;
11035 }
11036 \f
11037 /* Generate code to calculate OPS, and exploded expression
11038 using a store-flag instruction and return an rtx for the result.
11039 OPS reflects a comparison.
11040
11041 If TARGET is nonzero, store the result there if convenient.
11042
11043 Return zero if there is no suitable set-flag instruction
11044 available on this machine.
11045
11046 Once expand_expr has been called on the arguments of the comparison,
11047 we are committed to doing the store flag, since it is not safe to
11048 re-evaluate the expression. We emit the store-flag insn by calling
11049 emit_store_flag, but only expand the arguments if we have a reason
11050 to believe that emit_store_flag will be successful. If we think that
11051 it will, but it isn't, we have to simulate the store-flag with a
11052 set/jump/set sequence. */
11053
11054 static rtx
11055 do_store_flag (sepops ops, rtx target, machine_mode mode)
11056 {
11057 enum rtx_code code;
11058 tree arg0, arg1, type;
11059 tree tem;
11060 machine_mode operand_mode;
11061 int unsignedp;
11062 rtx op0, op1;
11063 rtx subtarget = target;
11064 location_t loc = ops->location;
11065
11066 arg0 = ops->op0;
11067 arg1 = ops->op1;
11068
11069 /* Don't crash if the comparison was erroneous. */
11070 if (arg0 == error_mark_node || arg1 == error_mark_node)
11071 return const0_rtx;
11072
11073 type = TREE_TYPE (arg0);
11074 operand_mode = TYPE_MODE (type);
11075 unsignedp = TYPE_UNSIGNED (type);
11076
11077 /* We won't bother with BLKmode store-flag operations because it would mean
11078 passing a lot of information to emit_store_flag. */
11079 if (operand_mode == BLKmode)
11080 return 0;
11081
11082 /* We won't bother with store-flag operations involving function pointers
11083 when function pointers must be canonicalized before comparisons. */
11084 #ifdef HAVE_canonicalize_funcptr_for_compare
11085 if (HAVE_canonicalize_funcptr_for_compare
11086 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
11087 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
11088 == FUNCTION_TYPE))
11089 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
11090 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
11091 == FUNCTION_TYPE))))
11092 return 0;
11093 #endif
11094
11095 STRIP_NOPS (arg0);
11096 STRIP_NOPS (arg1);
11097
11098 /* For vector typed comparisons emit code to generate the desired
11099 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11100 expander for this. */
11101 if (TREE_CODE (ops->type) == VECTOR_TYPE)
11102 {
11103 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
11104 tree if_true = constant_boolean_node (true, ops->type);
11105 tree if_false = constant_boolean_node (false, ops->type);
11106 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
11107 }
11108
11109 /* Get the rtx comparison code to use. We know that EXP is a comparison
11110 operation of some type. Some comparisons against 1 and -1 can be
11111 converted to comparisons with zero. Do so here so that the tests
11112 below will be aware that we have a comparison with zero. These
11113 tests will not catch constants in the first operand, but constants
11114 are rarely passed as the first operand. */
11115
11116 switch (ops->code)
11117 {
11118 case EQ_EXPR:
11119 code = EQ;
11120 break;
11121 case NE_EXPR:
11122 code = NE;
11123 break;
11124 case LT_EXPR:
11125 if (integer_onep (arg1))
11126 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
11127 else
11128 code = unsignedp ? LTU : LT;
11129 break;
11130 case LE_EXPR:
11131 if (! unsignedp && integer_all_onesp (arg1))
11132 arg1 = integer_zero_node, code = LT;
11133 else
11134 code = unsignedp ? LEU : LE;
11135 break;
11136 case GT_EXPR:
11137 if (! unsignedp && integer_all_onesp (arg1))
11138 arg1 = integer_zero_node, code = GE;
11139 else
11140 code = unsignedp ? GTU : GT;
11141 break;
11142 case GE_EXPR:
11143 if (integer_onep (arg1))
11144 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
11145 else
11146 code = unsignedp ? GEU : GE;
11147 break;
11148
11149 case UNORDERED_EXPR:
11150 code = UNORDERED;
11151 break;
11152 case ORDERED_EXPR:
11153 code = ORDERED;
11154 break;
11155 case UNLT_EXPR:
11156 code = UNLT;
11157 break;
11158 case UNLE_EXPR:
11159 code = UNLE;
11160 break;
11161 case UNGT_EXPR:
11162 code = UNGT;
11163 break;
11164 case UNGE_EXPR:
11165 code = UNGE;
11166 break;
11167 case UNEQ_EXPR:
11168 code = UNEQ;
11169 break;
11170 case LTGT_EXPR:
11171 code = LTGT;
11172 break;
11173
11174 default:
11175 gcc_unreachable ();
11176 }
11177
11178 /* Put a constant second. */
11179 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
11180 || TREE_CODE (arg0) == FIXED_CST)
11181 {
11182 tem = arg0; arg0 = arg1; arg1 = tem;
11183 code = swap_condition (code);
11184 }
11185
11186 /* If this is an equality or inequality test of a single bit, we can
11187 do this by shifting the bit being tested to the low-order bit and
11188 masking the result with the constant 1. If the condition was EQ,
11189 we xor it with 1. This does not require an scc insn and is faster
11190 than an scc insn even if we have it.
11191
11192 The code to make this transformation was moved into fold_single_bit_test,
11193 so we just call into the folder and expand its result. */
11194
11195 if ((code == NE || code == EQ)
11196 && integer_zerop (arg1)
11197 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
11198 {
11199 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
11200 if (srcstmt
11201 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
11202 {
11203 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
11204 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
11205 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
11206 gimple_assign_rhs1 (srcstmt),
11207 gimple_assign_rhs2 (srcstmt));
11208 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
11209 if (temp)
11210 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
11211 }
11212 }
11213
11214 if (! get_subtarget (target)
11215 || GET_MODE (subtarget) != operand_mode)
11216 subtarget = 0;
11217
11218 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
11219
11220 if (target == 0)
11221 target = gen_reg_rtx (mode);
11222
11223 /* Try a cstore if possible. */
11224 return emit_store_flag_force (target, code, op0, op1,
11225 operand_mode, unsignedp,
11226 (TYPE_PRECISION (ops->type) == 1
11227 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
11228 }
11229 \f
11230
11231 /* Stubs in case we haven't got a casesi insn. */
11232 #ifndef HAVE_casesi
11233 # define HAVE_casesi 0
11234 # define gen_casesi(a, b, c, d, e) (0)
11235 # define CODE_FOR_casesi CODE_FOR_nothing
11236 #endif
11237
11238 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11239 0 otherwise (i.e. if there is no casesi instruction).
11240
11241 DEFAULT_PROBABILITY is the probability of jumping to the default
11242 label. */
11243 int
11244 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
11245 rtx table_label, rtx default_label, rtx fallback_label,
11246 int default_probability)
11247 {
11248 struct expand_operand ops[5];
11249 machine_mode index_mode = SImode;
11250 rtx op1, op2, index;
11251
11252 if (! HAVE_casesi)
11253 return 0;
11254
11255 /* Convert the index to SImode. */
11256 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
11257 {
11258 machine_mode omode = TYPE_MODE (index_type);
11259 rtx rangertx = expand_normal (range);
11260
11261 /* We must handle the endpoints in the original mode. */
11262 index_expr = build2 (MINUS_EXPR, index_type,
11263 index_expr, minval);
11264 minval = integer_zero_node;
11265 index = expand_normal (index_expr);
11266 if (default_label)
11267 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
11268 omode, 1, default_label,
11269 default_probability);
11270 /* Now we can safely truncate. */
11271 index = convert_to_mode (index_mode, index, 0);
11272 }
11273 else
11274 {
11275 if (TYPE_MODE (index_type) != index_mode)
11276 {
11277 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
11278 index_expr = fold_convert (index_type, index_expr);
11279 }
11280
11281 index = expand_normal (index_expr);
11282 }
11283
11284 do_pending_stack_adjust ();
11285
11286 op1 = expand_normal (minval);
11287 op2 = expand_normal (range);
11288
11289 create_input_operand (&ops[0], index, index_mode);
11290 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
11291 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
11292 create_fixed_operand (&ops[3], table_label);
11293 create_fixed_operand (&ops[4], (default_label
11294 ? default_label
11295 : fallback_label));
11296 expand_jump_insn (CODE_FOR_casesi, 5, ops);
11297 return 1;
11298 }
11299
11300 /* Attempt to generate a tablejump instruction; same concept. */
11301 /* Subroutine of the next function.
11302
11303 INDEX is the value being switched on, with the lowest value
11304 in the table already subtracted.
11305 MODE is its expected mode (needed if INDEX is constant).
11306 RANGE is the length of the jump table.
11307 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11308
11309 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11310 index value is out of range.
11311 DEFAULT_PROBABILITY is the probability of jumping to
11312 the default label. */
11313
11314 static void
11315 do_tablejump (rtx index, machine_mode mode, rtx range, rtx table_label,
11316 rtx default_label, int default_probability)
11317 {
11318 rtx temp, vector;
11319
11320 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
11321 cfun->cfg->max_jumptable_ents = INTVAL (range);
11322
11323 /* Do an unsigned comparison (in the proper mode) between the index
11324 expression and the value which represents the length of the range.
11325 Since we just finished subtracting the lower bound of the range
11326 from the index expression, this comparison allows us to simultaneously
11327 check that the original index expression value is both greater than
11328 or equal to the minimum value of the range and less than or equal to
11329 the maximum value of the range. */
11330
11331 if (default_label)
11332 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
11333 default_label, default_probability);
11334
11335
11336 /* If index is in range, it must fit in Pmode.
11337 Convert to Pmode so we can index with it. */
11338 if (mode != Pmode)
11339 index = convert_to_mode (Pmode, index, 1);
11340
11341 /* Don't let a MEM slip through, because then INDEX that comes
11342 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11343 and break_out_memory_refs will go to work on it and mess it up. */
11344 #ifdef PIC_CASE_VECTOR_ADDRESS
11345 if (flag_pic && !REG_P (index))
11346 index = copy_to_mode_reg (Pmode, index);
11347 #endif
11348
11349 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11350 GET_MODE_SIZE, because this indicates how large insns are. The other
11351 uses should all be Pmode, because they are addresses. This code
11352 could fail if addresses and insns are not the same size. */
11353 index = simplify_gen_binary (MULT, Pmode, index,
11354 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE),
11355 Pmode));
11356 index = simplify_gen_binary (PLUS, Pmode, index,
11357 gen_rtx_LABEL_REF (Pmode, table_label));
11358
11359 #ifdef PIC_CASE_VECTOR_ADDRESS
11360 if (flag_pic)
11361 index = PIC_CASE_VECTOR_ADDRESS (index);
11362 else
11363 #endif
11364 index = memory_address (CASE_VECTOR_MODE, index);
11365 temp = gen_reg_rtx (CASE_VECTOR_MODE);
11366 vector = gen_const_mem (CASE_VECTOR_MODE, index);
11367 convert_move (temp, vector, 0);
11368
11369 emit_jump_insn (gen_tablejump (temp, table_label));
11370
11371 /* If we are generating PIC code or if the table is PC-relative, the
11372 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11373 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
11374 emit_barrier ();
11375 }
11376
11377 int
11378 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
11379 rtx table_label, rtx default_label, int default_probability)
11380 {
11381 rtx index;
11382
11383 if (! HAVE_tablejump)
11384 return 0;
11385
11386 index_expr = fold_build2 (MINUS_EXPR, index_type,
11387 fold_convert (index_type, index_expr),
11388 fold_convert (index_type, minval));
11389 index = expand_normal (index_expr);
11390 do_pending_stack_adjust ();
11391
11392 do_tablejump (index, TYPE_MODE (index_type),
11393 convert_modes (TYPE_MODE (index_type),
11394 TYPE_MODE (TREE_TYPE (range)),
11395 expand_normal (range),
11396 TYPE_UNSIGNED (TREE_TYPE (range))),
11397 table_label, default_label, default_probability);
11398 return 1;
11399 }
11400
11401 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11402 static rtx
11403 const_vector_from_tree (tree exp)
11404 {
11405 rtvec v;
11406 unsigned i;
11407 int units;
11408 tree elt;
11409 machine_mode inner, mode;
11410
11411 mode = TYPE_MODE (TREE_TYPE (exp));
11412
11413 if (initializer_zerop (exp))
11414 return CONST0_RTX (mode);
11415
11416 units = GET_MODE_NUNITS (mode);
11417 inner = GET_MODE_INNER (mode);
11418
11419 v = rtvec_alloc (units);
11420
11421 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
11422 {
11423 elt = VECTOR_CST_ELT (exp, i);
11424
11425 if (TREE_CODE (elt) == REAL_CST)
11426 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
11427 inner);
11428 else if (TREE_CODE (elt) == FIXED_CST)
11429 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
11430 inner);
11431 else
11432 RTVEC_ELT (v, i) = immed_wide_int_const (elt, inner);
11433 }
11434
11435 return gen_rtx_CONST_VECTOR (mode, v);
11436 }
11437
11438 /* Build a decl for a personality function given a language prefix. */
11439
11440 tree
11441 build_personality_function (const char *lang)
11442 {
11443 const char *unwind_and_version;
11444 tree decl, type;
11445 char *name;
11446
11447 switch (targetm_common.except_unwind_info (&global_options))
11448 {
11449 case UI_NONE:
11450 return NULL;
11451 case UI_SJLJ:
11452 unwind_and_version = "_sj0";
11453 break;
11454 case UI_DWARF2:
11455 case UI_TARGET:
11456 unwind_and_version = "_v0";
11457 break;
11458 case UI_SEH:
11459 unwind_and_version = "_seh0";
11460 break;
11461 default:
11462 gcc_unreachable ();
11463 }
11464
11465 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
11466
11467 type = build_function_type_list (integer_type_node, integer_type_node,
11468 long_long_unsigned_type_node,
11469 ptr_type_node, ptr_type_node, NULL_TREE);
11470 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
11471 get_identifier (name), type);
11472 DECL_ARTIFICIAL (decl) = 1;
11473 DECL_EXTERNAL (decl) = 1;
11474 TREE_PUBLIC (decl) = 1;
11475
11476 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11477 are the flags assigned by targetm.encode_section_info. */
11478 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
11479
11480 return decl;
11481 }
11482
11483 /* Extracts the personality function of DECL and returns the corresponding
11484 libfunc. */
11485
11486 rtx
11487 get_personality_function (tree decl)
11488 {
11489 tree personality = DECL_FUNCTION_PERSONALITY (decl);
11490 enum eh_personality_kind pk;
11491
11492 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
11493 if (pk == eh_personality_none)
11494 return NULL;
11495
11496 if (!personality
11497 && pk == eh_personality_any)
11498 personality = lang_hooks.eh_personality ();
11499
11500 if (pk == eh_personality_lang)
11501 gcc_assert (personality != NULL_TREE);
11502
11503 return XEXP (DECL_RTL (personality), 0);
11504 }
11505
11506 /* Returns a tree for the size of EXP in bytes. */
11507
11508 static tree
11509 tree_expr_size (const_tree exp)
11510 {
11511 if (DECL_P (exp)
11512 && DECL_SIZE_UNIT (exp) != 0)
11513 return DECL_SIZE_UNIT (exp);
11514 else
11515 return size_in_bytes (TREE_TYPE (exp));
11516 }
11517
11518 /* Return an rtx for the size in bytes of the value of EXP. */
11519
11520 rtx
11521 expr_size (tree exp)
11522 {
11523 tree size;
11524
11525 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
11526 size = TREE_OPERAND (exp, 1);
11527 else
11528 {
11529 size = tree_expr_size (exp);
11530 gcc_assert (size);
11531 gcc_assert (size == SUBSTITUTE_PLACEHOLDER_IN_EXPR (size, exp));
11532 }
11533
11534 return expand_expr (size, NULL_RTX, TYPE_MODE (sizetype), EXPAND_NORMAL);
11535 }
11536
11537 /* Return a wide integer for the size in bytes of the value of EXP, or -1
11538 if the size can vary or is larger than an integer. */
11539
11540 static HOST_WIDE_INT
11541 int_expr_size (tree exp)
11542 {
11543 tree size;
11544
11545 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
11546 size = TREE_OPERAND (exp, 1);
11547 else
11548 {
11549 size = tree_expr_size (exp);
11550 gcc_assert (size);
11551 }
11552
11553 if (size == 0 || !tree_fits_shwi_p (size))
11554 return -1;
11555
11556 return tree_to_shwi (size);
11557 }
11558
11559 #include "gt-expr.h"