expr.c (expand_expr_real_2): Use widening_optab_handler.
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "common/common-target.h"
53 #include "timevar.h"
54 #include "df.h"
55 #include "diagnostic.h"
56 #include "ssaexpand.h"
57 #include "target-globals.h"
58 #include "params.h"
59
60 /* Decide whether a function's arguments should be processed
61 from first to last or from last to first.
62
63 They should if the stack and args grow in opposite directions, but
64 only if we have push insns. */
65
66 #ifdef PUSH_ROUNDING
67
68 #ifndef PUSH_ARGS_REVERSED
69 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
70 #define PUSH_ARGS_REVERSED /* If it's last to first. */
71 #endif
72 #endif
73
74 #endif
75
76 #ifndef STACK_PUSH_CODE
77 #ifdef STACK_GROWS_DOWNWARD
78 #define STACK_PUSH_CODE PRE_DEC
79 #else
80 #define STACK_PUSH_CODE PRE_INC
81 #endif
82 #endif
83
84
85 /* If this is nonzero, we do not bother generating VOLATILE
86 around volatile memory references, and we are willing to
87 output indirect addresses. If cse is to follow, we reject
88 indirect addresses so a useful potential cse is generated;
89 if it is used only once, instruction combination will produce
90 the same indirect address eventually. */
91 int cse_not_expected;
92
93 /* This structure is used by move_by_pieces to describe the move to
94 be performed. */
95 struct move_by_pieces_d
96 {
97 rtx to;
98 rtx to_addr;
99 int autinc_to;
100 int explicit_inc_to;
101 rtx from;
102 rtx from_addr;
103 int autinc_from;
104 int explicit_inc_from;
105 unsigned HOST_WIDE_INT len;
106 HOST_WIDE_INT offset;
107 int reverse;
108 };
109
110 /* This structure is used by store_by_pieces to describe the clear to
111 be performed. */
112
113 struct store_by_pieces_d
114 {
115 rtx to;
116 rtx to_addr;
117 int autinc_to;
118 int explicit_inc_to;
119 unsigned HOST_WIDE_INT len;
120 HOST_WIDE_INT offset;
121 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
122 void *constfundata;
123 int reverse;
124 };
125
126 static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT,
127 unsigned int,
128 unsigned int);
129 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
130 struct move_by_pieces_d *);
131 static bool block_move_libcall_safe_for_call_parm (void);
132 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
133 static tree emit_block_move_libcall_fn (int);
134 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
135 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
136 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
137 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
138 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
139 struct store_by_pieces_d *);
140 static tree clear_storage_libcall_fn (int);
141 static rtx compress_float_constant (rtx, rtx);
142 static rtx get_subtarget (rtx);
143 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
144 HOST_WIDE_INT, enum machine_mode,
145 tree, tree, int, alias_set_type);
146 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
147 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
148 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
149 enum machine_mode,
150 tree, tree, alias_set_type, bool);
151
152 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
153
154 static int is_aligning_offset (const_tree, const_tree);
155 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
156 enum expand_modifier);
157 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
158 static rtx do_store_flag (sepops, rtx, enum machine_mode);
159 #ifdef PUSH_ROUNDING
160 static void emit_single_push_insn (enum machine_mode, rtx, tree);
161 #endif
162 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
163 static rtx const_vector_from_tree (tree);
164 static void write_complex_part (rtx, rtx, bool);
165
166 /* This macro is used to determine whether move_by_pieces should be called
167 to perform a structure copy. */
168 #ifndef MOVE_BY_PIECES_P
169 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
170 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
171 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
172 #endif
173
174 /* This macro is used to determine whether clear_by_pieces should be
175 called to clear storage. */
176 #ifndef CLEAR_BY_PIECES_P
177 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
178 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
179 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
180 #endif
181
182 /* This macro is used to determine whether store_by_pieces should be
183 called to "memset" storage with byte values other than zero. */
184 #ifndef SET_BY_PIECES_P
185 #define SET_BY_PIECES_P(SIZE, ALIGN) \
186 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
187 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
188 #endif
189
190 /* This macro is used to determine whether store_by_pieces should be
191 called to "memcpy" storage when the source is a constant string. */
192 #ifndef STORE_BY_PIECES_P
193 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
194 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
195 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
196 #endif
197
198 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
199
200 #ifndef SLOW_UNALIGNED_ACCESS
201 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
202 #endif
203 \f
204 /* This is run to set up which modes can be used
205 directly in memory and to initialize the block move optab. It is run
206 at the beginning of compilation and when the target is reinitialized. */
207
208 void
209 init_expr_target (void)
210 {
211 rtx insn, pat;
212 enum machine_mode mode;
213 int num_clobbers;
214 rtx mem, mem1;
215 rtx reg;
216
217 /* Try indexing by frame ptr and try by stack ptr.
218 It is known that on the Convex the stack ptr isn't a valid index.
219 With luck, one or the other is valid on any machine. */
220 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
221 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
222
223 /* A scratch register we can modify in-place below to avoid
224 useless RTL allocations. */
225 reg = gen_rtx_REG (VOIDmode, -1);
226
227 insn = rtx_alloc (INSN);
228 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
229 PATTERN (insn) = pat;
230
231 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
232 mode = (enum machine_mode) ((int) mode + 1))
233 {
234 int regno;
235
236 direct_load[(int) mode] = direct_store[(int) mode] = 0;
237 PUT_MODE (mem, mode);
238 PUT_MODE (mem1, mode);
239 PUT_MODE (reg, mode);
240
241 /* See if there is some register that can be used in this mode and
242 directly loaded or stored from memory. */
243
244 if (mode != VOIDmode && mode != BLKmode)
245 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
246 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
247 regno++)
248 {
249 if (! HARD_REGNO_MODE_OK (regno, mode))
250 continue;
251
252 SET_REGNO (reg, regno);
253
254 SET_SRC (pat) = mem;
255 SET_DEST (pat) = reg;
256 if (recog (pat, insn, &num_clobbers) >= 0)
257 direct_load[(int) mode] = 1;
258
259 SET_SRC (pat) = mem1;
260 SET_DEST (pat) = reg;
261 if (recog (pat, insn, &num_clobbers) >= 0)
262 direct_load[(int) mode] = 1;
263
264 SET_SRC (pat) = reg;
265 SET_DEST (pat) = mem;
266 if (recog (pat, insn, &num_clobbers) >= 0)
267 direct_store[(int) mode] = 1;
268
269 SET_SRC (pat) = reg;
270 SET_DEST (pat) = mem1;
271 if (recog (pat, insn, &num_clobbers) >= 0)
272 direct_store[(int) mode] = 1;
273 }
274 }
275
276 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
277
278 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
279 mode = GET_MODE_WIDER_MODE (mode))
280 {
281 enum machine_mode srcmode;
282 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
283 srcmode = GET_MODE_WIDER_MODE (srcmode))
284 {
285 enum insn_code ic;
286
287 ic = can_extend_p (mode, srcmode, 0);
288 if (ic == CODE_FOR_nothing)
289 continue;
290
291 PUT_MODE (mem, srcmode);
292
293 if (insn_operand_matches (ic, 1, mem))
294 float_extend_from_mem[mode][srcmode] = true;
295 }
296 }
297 }
298
299 /* This is run at the start of compiling a function. */
300
301 void
302 init_expr (void)
303 {
304 memset (&crtl->expr, 0, sizeof (crtl->expr));
305 }
306 \f
307 /* Copy data from FROM to TO, where the machine modes are not the same.
308 Both modes may be integer, or both may be floating, or both may be
309 fixed-point.
310 UNSIGNEDP should be nonzero if FROM is an unsigned type.
311 This causes zero-extension instead of sign-extension. */
312
313 void
314 convert_move (rtx to, rtx from, int unsignedp)
315 {
316 enum machine_mode to_mode = GET_MODE (to);
317 enum machine_mode from_mode = GET_MODE (from);
318 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
319 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
320 enum insn_code code;
321 rtx libcall;
322
323 /* rtx code for making an equivalent value. */
324 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
325 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
326
327
328 gcc_assert (to_real == from_real);
329 gcc_assert (to_mode != BLKmode);
330 gcc_assert (from_mode != BLKmode);
331
332 /* If the source and destination are already the same, then there's
333 nothing to do. */
334 if (to == from)
335 return;
336
337 /* If FROM is a SUBREG that indicates that we have already done at least
338 the required extension, strip it. We don't handle such SUBREGs as
339 TO here. */
340
341 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
342 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
343 >= GET_MODE_PRECISION (to_mode))
344 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
345 from = gen_lowpart (to_mode, from), from_mode = to_mode;
346
347 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
348
349 if (to_mode == from_mode
350 || (from_mode == VOIDmode && CONSTANT_P (from)))
351 {
352 emit_move_insn (to, from);
353 return;
354 }
355
356 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
357 {
358 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
359
360 if (VECTOR_MODE_P (to_mode))
361 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
362 else
363 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
364
365 emit_move_insn (to, from);
366 return;
367 }
368
369 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
370 {
371 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
372 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
373 return;
374 }
375
376 if (to_real)
377 {
378 rtx value, insns;
379 convert_optab tab;
380
381 gcc_assert ((GET_MODE_PRECISION (from_mode)
382 != GET_MODE_PRECISION (to_mode))
383 || (DECIMAL_FLOAT_MODE_P (from_mode)
384 != DECIMAL_FLOAT_MODE_P (to_mode)));
385
386 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
387 /* Conversion between decimal float and binary float, same size. */
388 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
389 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
390 tab = sext_optab;
391 else
392 tab = trunc_optab;
393
394 /* Try converting directly if the insn is supported. */
395
396 code = convert_optab_handler (tab, to_mode, from_mode);
397 if (code != CODE_FOR_nothing)
398 {
399 emit_unop_insn (code, to, from,
400 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
401 return;
402 }
403
404 /* Otherwise use a libcall. */
405 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
406
407 /* Is this conversion implemented yet? */
408 gcc_assert (libcall);
409
410 start_sequence ();
411 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
412 1, from, from_mode);
413 insns = get_insns ();
414 end_sequence ();
415 emit_libcall_block (insns, to, value,
416 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
417 from)
418 : gen_rtx_FLOAT_EXTEND (to_mode, from));
419 return;
420 }
421
422 /* Handle pointer conversion. */ /* SPEE 900220. */
423 /* Targets are expected to provide conversion insns between PxImode and
424 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
425 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
426 {
427 enum machine_mode full_mode
428 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
429
430 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
431 != CODE_FOR_nothing);
432
433 if (full_mode != from_mode)
434 from = convert_to_mode (full_mode, from, unsignedp);
435 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
436 to, from, UNKNOWN);
437 return;
438 }
439 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
440 {
441 rtx new_from;
442 enum machine_mode full_mode
443 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
444
445 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)
446 != CODE_FOR_nothing);
447
448 if (to_mode == full_mode)
449 {
450 emit_unop_insn (convert_optab_handler (sext_optab, full_mode,
451 from_mode),
452 to, from, UNKNOWN);
453 return;
454 }
455
456 new_from = gen_reg_rtx (full_mode);
457 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode),
458 new_from, from, UNKNOWN);
459
460 /* else proceed to integer conversions below. */
461 from_mode = full_mode;
462 from = new_from;
463 }
464
465 /* Make sure both are fixed-point modes or both are not. */
466 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
467 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
468 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
469 {
470 /* If we widen from_mode to to_mode and they are in the same class,
471 we won't saturate the result.
472 Otherwise, always saturate the result to play safe. */
473 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
474 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
475 expand_fixed_convert (to, from, 0, 0);
476 else
477 expand_fixed_convert (to, from, 0, 1);
478 return;
479 }
480
481 /* Now both modes are integers. */
482
483 /* Handle expanding beyond a word. */
484 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
485 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
486 {
487 rtx insns;
488 rtx lowpart;
489 rtx fill_value;
490 rtx lowfrom;
491 int i;
492 enum machine_mode lowpart_mode;
493 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
494
495 /* Try converting directly if the insn is supported. */
496 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
497 != CODE_FOR_nothing)
498 {
499 /* If FROM is a SUBREG, put it into a register. Do this
500 so that we always generate the same set of insns for
501 better cse'ing; if an intermediate assignment occurred,
502 we won't be doing the operation directly on the SUBREG. */
503 if (optimize > 0 && GET_CODE (from) == SUBREG)
504 from = force_reg (from_mode, from);
505 emit_unop_insn (code, to, from, equiv_code);
506 return;
507 }
508 /* Next, try converting via full word. */
509 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
510 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
511 != CODE_FOR_nothing))
512 {
513 rtx word_to = gen_reg_rtx (word_mode);
514 if (REG_P (to))
515 {
516 if (reg_overlap_mentioned_p (to, from))
517 from = force_reg (from_mode, from);
518 emit_clobber (to);
519 }
520 convert_move (word_to, from, unsignedp);
521 emit_unop_insn (code, to, word_to, equiv_code);
522 return;
523 }
524
525 /* No special multiword conversion insn; do it by hand. */
526 start_sequence ();
527
528 /* Since we will turn this into a no conflict block, we must ensure
529 that the source does not overlap the target. */
530
531 if (reg_overlap_mentioned_p (to, from))
532 from = force_reg (from_mode, from);
533
534 /* Get a copy of FROM widened to a word, if necessary. */
535 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
536 lowpart_mode = word_mode;
537 else
538 lowpart_mode = from_mode;
539
540 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
541
542 lowpart = gen_lowpart (lowpart_mode, to);
543 emit_move_insn (lowpart, lowfrom);
544
545 /* Compute the value to put in each remaining word. */
546 if (unsignedp)
547 fill_value = const0_rtx;
548 else
549 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
550 LT, lowfrom, const0_rtx,
551 VOIDmode, 0, -1);
552
553 /* Fill the remaining words. */
554 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
555 {
556 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
557 rtx subword = operand_subword (to, index, 1, to_mode);
558
559 gcc_assert (subword);
560
561 if (fill_value != subword)
562 emit_move_insn (subword, fill_value);
563 }
564
565 insns = get_insns ();
566 end_sequence ();
567
568 emit_insn (insns);
569 return;
570 }
571
572 /* Truncating multi-word to a word or less. */
573 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
574 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
575 {
576 if (!((MEM_P (from)
577 && ! MEM_VOLATILE_P (from)
578 && direct_load[(int) to_mode]
579 && ! mode_dependent_address_p (XEXP (from, 0)))
580 || REG_P (from)
581 || GET_CODE (from) == SUBREG))
582 from = force_reg (from_mode, from);
583 convert_move (to, gen_lowpart (word_mode, from), 0);
584 return;
585 }
586
587 /* Now follow all the conversions between integers
588 no more than a word long. */
589
590 /* For truncation, usually we can just refer to FROM in a narrower mode. */
591 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
592 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
593 {
594 if (!((MEM_P (from)
595 && ! MEM_VOLATILE_P (from)
596 && direct_load[(int) to_mode]
597 && ! mode_dependent_address_p (XEXP (from, 0)))
598 || REG_P (from)
599 || GET_CODE (from) == SUBREG))
600 from = force_reg (from_mode, from);
601 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
602 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
603 from = copy_to_reg (from);
604 emit_move_insn (to, gen_lowpart (to_mode, from));
605 return;
606 }
607
608 /* Handle extension. */
609 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
610 {
611 /* Convert directly if that works. */
612 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
613 != CODE_FOR_nothing)
614 {
615 emit_unop_insn (code, to, from, equiv_code);
616 return;
617 }
618 else
619 {
620 enum machine_mode intermediate;
621 rtx tmp;
622 int shift_amount;
623
624 /* Search for a mode to convert via. */
625 for (intermediate = from_mode; intermediate != VOIDmode;
626 intermediate = GET_MODE_WIDER_MODE (intermediate))
627 if (((can_extend_p (to_mode, intermediate, unsignedp)
628 != CODE_FOR_nothing)
629 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
630 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
631 && (can_extend_p (intermediate, from_mode, unsignedp)
632 != CODE_FOR_nothing))
633 {
634 convert_move (to, convert_to_mode (intermediate, from,
635 unsignedp), unsignedp);
636 return;
637 }
638
639 /* No suitable intermediate mode.
640 Generate what we need with shifts. */
641 shift_amount = (GET_MODE_PRECISION (to_mode)
642 - GET_MODE_PRECISION (from_mode));
643 from = gen_lowpart (to_mode, force_reg (from_mode, from));
644 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
645 to, unsignedp);
646 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
647 to, unsignedp);
648 if (tmp != to)
649 emit_move_insn (to, tmp);
650 return;
651 }
652 }
653
654 /* Support special truncate insns for certain modes. */
655 if (convert_optab_handler (trunc_optab, to_mode,
656 from_mode) != CODE_FOR_nothing)
657 {
658 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
659 to, from, UNKNOWN);
660 return;
661 }
662
663 /* Handle truncation of volatile memrefs, and so on;
664 the things that couldn't be truncated directly,
665 and for which there was no special instruction.
666
667 ??? Code above formerly short-circuited this, for most integer
668 mode pairs, with a force_reg in from_mode followed by a recursive
669 call to this routine. Appears always to have been wrong. */
670 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
671 {
672 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
673 emit_move_insn (to, temp);
674 return;
675 }
676
677 /* Mode combination is not recognized. */
678 gcc_unreachable ();
679 }
680
681 /* Return an rtx for a value that would result
682 from converting X to mode MODE.
683 Both X and MODE may be floating, or both integer.
684 UNSIGNEDP is nonzero if X is an unsigned value.
685 This can be done by referring to a part of X in place
686 or by copying to a new temporary with conversion. */
687
688 rtx
689 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
690 {
691 return convert_modes (mode, VOIDmode, x, unsignedp);
692 }
693
694 /* Return an rtx for a value that would result
695 from converting X from mode OLDMODE to mode MODE.
696 Both modes may be floating, or both integer.
697 UNSIGNEDP is nonzero if X is an unsigned value.
698
699 This can be done by referring to a part of X in place
700 or by copying to a new temporary with conversion.
701
702 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
703
704 rtx
705 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
706 {
707 rtx temp;
708
709 /* If FROM is a SUBREG that indicates that we have already done at least
710 the required extension, strip it. */
711
712 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
713 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
714 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
715 x = gen_lowpart (mode, x);
716
717 if (GET_MODE (x) != VOIDmode)
718 oldmode = GET_MODE (x);
719
720 if (mode == oldmode)
721 return x;
722
723 /* There is one case that we must handle specially: If we are converting
724 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
725 we are to interpret the constant as unsigned, gen_lowpart will do
726 the wrong if the constant appears negative. What we want to do is
727 make the high-order word of the constant zero, not all ones. */
728
729 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
730 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
731 && CONST_INT_P (x) && INTVAL (x) < 0)
732 {
733 double_int val = uhwi_to_double_int (INTVAL (x));
734
735 /* We need to zero extend VAL. */
736 if (oldmode != VOIDmode)
737 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
738
739 return immed_double_int_const (val, mode);
740 }
741
742 /* We can do this with a gen_lowpart if both desired and current modes
743 are integer, and this is either a constant integer, a register, or a
744 non-volatile MEM. Except for the constant case where MODE is no
745 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
746
747 if ((CONST_INT_P (x)
748 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
749 || (GET_MODE_CLASS (mode) == MODE_INT
750 && GET_MODE_CLASS (oldmode) == MODE_INT
751 && (GET_CODE (x) == CONST_DOUBLE
752 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
753 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
754 && direct_load[(int) mode])
755 || (REG_P (x)
756 && (! HARD_REGISTER_P (x)
757 || HARD_REGNO_MODE_OK (REGNO (x), mode))
758 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
759 GET_MODE (x))))))))
760 {
761 /* ?? If we don't know OLDMODE, we have to assume here that
762 X does not need sign- or zero-extension. This may not be
763 the case, but it's the best we can do. */
764 if (CONST_INT_P (x) && oldmode != VOIDmode
765 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
766 {
767 HOST_WIDE_INT val = INTVAL (x);
768
769 /* We must sign or zero-extend in this case. Start by
770 zero-extending, then sign extend if we need to. */
771 val &= GET_MODE_MASK (oldmode);
772 if (! unsignedp
773 && val_signbit_known_set_p (oldmode, val))
774 val |= ~GET_MODE_MASK (oldmode);
775
776 return gen_int_mode (val, mode);
777 }
778
779 return gen_lowpart (mode, x);
780 }
781
782 /* Converting from integer constant into mode is always equivalent to an
783 subreg operation. */
784 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
785 {
786 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
787 return simplify_gen_subreg (mode, x, oldmode, 0);
788 }
789
790 temp = gen_reg_rtx (mode);
791 convert_move (temp, x, unsignedp);
792 return temp;
793 }
794 \f
795 /* Return the largest alignment we can use for doing a move (or store)
796 of MAX_PIECES. ALIGN is the largest alignment we could use. */
797
798 static unsigned int
799 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
800 {
801 enum machine_mode tmode;
802
803 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
804 if (align >= GET_MODE_ALIGNMENT (tmode))
805 align = GET_MODE_ALIGNMENT (tmode);
806 else
807 {
808 enum machine_mode tmode, xmode;
809
810 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
811 tmode != VOIDmode;
812 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
813 if (GET_MODE_SIZE (tmode) > max_pieces
814 || SLOW_UNALIGNED_ACCESS (tmode, align))
815 break;
816
817 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
818 }
819
820 return align;
821 }
822
823 /* Return the widest integer mode no wider than SIZE. If no such mode
824 can be found, return VOIDmode. */
825
826 static enum machine_mode
827 widest_int_mode_for_size (unsigned int size)
828 {
829 enum machine_mode tmode, mode = VOIDmode;
830
831 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
832 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
833 if (GET_MODE_SIZE (tmode) < size)
834 mode = tmode;
835
836 return mode;
837 }
838
839 /* STORE_MAX_PIECES is the number of bytes at a time that we can
840 store efficiently. Due to internal GCC limitations, this is
841 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
842 for an immediate constant. */
843
844 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
845
846 /* Determine whether the LEN bytes can be moved by using several move
847 instructions. Return nonzero if a call to move_by_pieces should
848 succeed. */
849
850 int
851 can_move_by_pieces (unsigned HOST_WIDE_INT len,
852 unsigned int align ATTRIBUTE_UNUSED)
853 {
854 return MOVE_BY_PIECES_P (len, align);
855 }
856
857 /* Generate several move instructions to copy LEN bytes from block FROM to
858 block TO. (These are MEM rtx's with BLKmode).
859
860 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
861 used to push FROM to the stack.
862
863 ALIGN is maximum stack alignment we can assume.
864
865 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
866 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
867 stpcpy. */
868
869 rtx
870 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
871 unsigned int align, int endp)
872 {
873 struct move_by_pieces_d data;
874 enum machine_mode to_addr_mode, from_addr_mode
875 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
876 rtx to_addr, from_addr = XEXP (from, 0);
877 unsigned int max_size = MOVE_MAX_PIECES + 1;
878 enum insn_code icode;
879
880 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
881
882 data.offset = 0;
883 data.from_addr = from_addr;
884 if (to)
885 {
886 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
887 to_addr = XEXP (to, 0);
888 data.to = to;
889 data.autinc_to
890 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
891 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
892 data.reverse
893 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
894 }
895 else
896 {
897 to_addr_mode = VOIDmode;
898 to_addr = NULL_RTX;
899 data.to = NULL_RTX;
900 data.autinc_to = 1;
901 #ifdef STACK_GROWS_DOWNWARD
902 data.reverse = 1;
903 #else
904 data.reverse = 0;
905 #endif
906 }
907 data.to_addr = to_addr;
908 data.from = from;
909 data.autinc_from
910 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
911 || GET_CODE (from_addr) == POST_INC
912 || GET_CODE (from_addr) == POST_DEC);
913
914 data.explicit_inc_from = 0;
915 data.explicit_inc_to = 0;
916 if (data.reverse) data.offset = len;
917 data.len = len;
918
919 /* If copying requires more than two move insns,
920 copy addresses to registers (to make displacements shorter)
921 and use post-increment if available. */
922 if (!(data.autinc_from && data.autinc_to)
923 && move_by_pieces_ninsns (len, align, max_size) > 2)
924 {
925 /* Find the mode of the largest move...
926 MODE might not be used depending on the definitions of the
927 USE_* macros below. */
928 enum machine_mode mode ATTRIBUTE_UNUSED
929 = widest_int_mode_for_size (max_size);
930
931 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
932 {
933 data.from_addr = copy_to_mode_reg (from_addr_mode,
934 plus_constant (from_addr, len));
935 data.autinc_from = 1;
936 data.explicit_inc_from = -1;
937 }
938 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
939 {
940 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
941 data.autinc_from = 1;
942 data.explicit_inc_from = 1;
943 }
944 if (!data.autinc_from && CONSTANT_P (from_addr))
945 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
946 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
947 {
948 data.to_addr = copy_to_mode_reg (to_addr_mode,
949 plus_constant (to_addr, len));
950 data.autinc_to = 1;
951 data.explicit_inc_to = -1;
952 }
953 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
954 {
955 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
956 data.autinc_to = 1;
957 data.explicit_inc_to = 1;
958 }
959 if (!data.autinc_to && CONSTANT_P (to_addr))
960 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
961 }
962
963 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
964
965 /* First move what we can in the largest integer mode, then go to
966 successively smaller modes. */
967
968 while (max_size > 1)
969 {
970 enum machine_mode mode = widest_int_mode_for_size (max_size);
971
972 if (mode == VOIDmode)
973 break;
974
975 icode = optab_handler (mov_optab, mode);
976 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
977 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
978
979 max_size = GET_MODE_SIZE (mode);
980 }
981
982 /* The code above should have handled everything. */
983 gcc_assert (!data.len);
984
985 if (endp)
986 {
987 rtx to1;
988
989 gcc_assert (!data.reverse);
990 if (data.autinc_to)
991 {
992 if (endp == 2)
993 {
994 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
995 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
996 else
997 data.to_addr = copy_to_mode_reg (to_addr_mode,
998 plus_constant (data.to_addr,
999 -1));
1000 }
1001 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
1002 data.offset);
1003 }
1004 else
1005 {
1006 if (endp == 2)
1007 --data.offset;
1008 to1 = adjust_address (data.to, QImode, data.offset);
1009 }
1010 return to1;
1011 }
1012 else
1013 return data.to;
1014 }
1015
1016 /* Return number of insns required to move L bytes by pieces.
1017 ALIGN (in bits) is maximum alignment we can assume. */
1018
1019 static unsigned HOST_WIDE_INT
1020 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1021 unsigned int max_size)
1022 {
1023 unsigned HOST_WIDE_INT n_insns = 0;
1024
1025 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1026
1027 while (max_size > 1)
1028 {
1029 enum machine_mode mode;
1030 enum insn_code icode;
1031
1032 mode = widest_int_mode_for_size (max_size);
1033
1034 if (mode == VOIDmode)
1035 break;
1036
1037 icode = optab_handler (mov_optab, mode);
1038 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1039 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1040
1041 max_size = GET_MODE_SIZE (mode);
1042 }
1043
1044 gcc_assert (!l);
1045 return n_insns;
1046 }
1047
1048 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1049 with move instructions for mode MODE. GENFUN is the gen_... function
1050 to make a move insn for that mode. DATA has all the other info. */
1051
1052 static void
1053 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1054 struct move_by_pieces_d *data)
1055 {
1056 unsigned int size = GET_MODE_SIZE (mode);
1057 rtx to1 = NULL_RTX, from1;
1058
1059 while (data->len >= size)
1060 {
1061 if (data->reverse)
1062 data->offset -= size;
1063
1064 if (data->to)
1065 {
1066 if (data->autinc_to)
1067 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1068 data->offset);
1069 else
1070 to1 = adjust_address (data->to, mode, data->offset);
1071 }
1072
1073 if (data->autinc_from)
1074 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1075 data->offset);
1076 else
1077 from1 = adjust_address (data->from, mode, data->offset);
1078
1079 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1080 emit_insn (gen_add2_insn (data->to_addr,
1081 GEN_INT (-(HOST_WIDE_INT)size)));
1082 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1083 emit_insn (gen_add2_insn (data->from_addr,
1084 GEN_INT (-(HOST_WIDE_INT)size)));
1085
1086 if (data->to)
1087 emit_insn ((*genfun) (to1, from1));
1088 else
1089 {
1090 #ifdef PUSH_ROUNDING
1091 emit_single_push_insn (mode, from1, NULL);
1092 #else
1093 gcc_unreachable ();
1094 #endif
1095 }
1096
1097 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1098 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1099 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1100 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1101
1102 if (! data->reverse)
1103 data->offset += size;
1104
1105 data->len -= size;
1106 }
1107 }
1108 \f
1109 /* Emit code to move a block Y to a block X. This may be done with
1110 string-move instructions, with multiple scalar move instructions,
1111 or with a library call.
1112
1113 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1114 SIZE is an rtx that says how long they are.
1115 ALIGN is the maximum alignment we can assume they have.
1116 METHOD describes what kind of copy this is, and what mechanisms may be used.
1117
1118 Return the address of the new block, if memcpy is called and returns it,
1119 0 otherwise. */
1120
1121 rtx
1122 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1123 unsigned int expected_align, HOST_WIDE_INT expected_size)
1124 {
1125 bool may_use_call;
1126 rtx retval = 0;
1127 unsigned int align;
1128
1129 gcc_assert (size);
1130 if (CONST_INT_P (size)
1131 && INTVAL (size) == 0)
1132 return 0;
1133
1134 switch (method)
1135 {
1136 case BLOCK_OP_NORMAL:
1137 case BLOCK_OP_TAILCALL:
1138 may_use_call = true;
1139 break;
1140
1141 case BLOCK_OP_CALL_PARM:
1142 may_use_call = block_move_libcall_safe_for_call_parm ();
1143
1144 /* Make inhibit_defer_pop nonzero around the library call
1145 to force it to pop the arguments right away. */
1146 NO_DEFER_POP;
1147 break;
1148
1149 case BLOCK_OP_NO_LIBCALL:
1150 may_use_call = false;
1151 break;
1152
1153 default:
1154 gcc_unreachable ();
1155 }
1156
1157 gcc_assert (MEM_P (x) && MEM_P (y));
1158 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1159 gcc_assert (align >= BITS_PER_UNIT);
1160
1161 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1162 block copy is more efficient for other large modes, e.g. DCmode. */
1163 x = adjust_address (x, BLKmode, 0);
1164 y = adjust_address (y, BLKmode, 0);
1165
1166 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1167 can be incorrect is coming from __builtin_memcpy. */
1168 if (CONST_INT_P (size))
1169 {
1170 x = shallow_copy_rtx (x);
1171 y = shallow_copy_rtx (y);
1172 set_mem_size (x, INTVAL (size));
1173 set_mem_size (y, INTVAL (size));
1174 }
1175
1176 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1177 move_by_pieces (x, y, INTVAL (size), align, 0);
1178 else if (emit_block_move_via_movmem (x, y, size, align,
1179 expected_align, expected_size))
1180 ;
1181 else if (may_use_call
1182 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1183 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1184 {
1185 /* Since x and y are passed to a libcall, mark the corresponding
1186 tree EXPR as addressable. */
1187 tree y_expr = MEM_EXPR (y);
1188 tree x_expr = MEM_EXPR (x);
1189 if (y_expr)
1190 mark_addressable (y_expr);
1191 if (x_expr)
1192 mark_addressable (x_expr);
1193 retval = emit_block_move_via_libcall (x, y, size,
1194 method == BLOCK_OP_TAILCALL);
1195 }
1196
1197 else
1198 emit_block_move_via_loop (x, y, size, align);
1199
1200 if (method == BLOCK_OP_CALL_PARM)
1201 OK_DEFER_POP;
1202
1203 return retval;
1204 }
1205
1206 rtx
1207 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1208 {
1209 return emit_block_move_hints (x, y, size, method, 0, -1);
1210 }
1211
1212 /* A subroutine of emit_block_move. Returns true if calling the
1213 block move libcall will not clobber any parameters which may have
1214 already been placed on the stack. */
1215
1216 static bool
1217 block_move_libcall_safe_for_call_parm (void)
1218 {
1219 #if defined (REG_PARM_STACK_SPACE)
1220 tree fn;
1221 #endif
1222
1223 /* If arguments are pushed on the stack, then they're safe. */
1224 if (PUSH_ARGS)
1225 return true;
1226
1227 /* If registers go on the stack anyway, any argument is sure to clobber
1228 an outgoing argument. */
1229 #if defined (REG_PARM_STACK_SPACE)
1230 fn = emit_block_move_libcall_fn (false);
1231 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1232 depend on its argument. */
1233 (void) fn;
1234 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1235 && REG_PARM_STACK_SPACE (fn) != 0)
1236 return false;
1237 #endif
1238
1239 /* If any argument goes in memory, then it might clobber an outgoing
1240 argument. */
1241 {
1242 CUMULATIVE_ARGS args_so_far_v;
1243 cumulative_args_t args_so_far;
1244 tree fn, arg;
1245
1246 fn = emit_block_move_libcall_fn (false);
1247 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1248 args_so_far = pack_cumulative_args (&args_so_far_v);
1249
1250 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1251 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1252 {
1253 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1254 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1255 NULL_TREE, true);
1256 if (!tmp || !REG_P (tmp))
1257 return false;
1258 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1259 return false;
1260 targetm.calls.function_arg_advance (args_so_far, mode,
1261 NULL_TREE, true);
1262 }
1263 }
1264 return true;
1265 }
1266
1267 /* A subroutine of emit_block_move. Expand a movmem pattern;
1268 return true if successful. */
1269
1270 static bool
1271 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1272 unsigned int expected_align, HOST_WIDE_INT expected_size)
1273 {
1274 int save_volatile_ok = volatile_ok;
1275 enum machine_mode mode;
1276
1277 if (expected_align < align)
1278 expected_align = align;
1279
1280 /* Since this is a move insn, we don't care about volatility. */
1281 volatile_ok = 1;
1282
1283 /* Try the most limited insn first, because there's no point
1284 including more than one in the machine description unless
1285 the more limited one has some advantage. */
1286
1287 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1288 mode = GET_MODE_WIDER_MODE (mode))
1289 {
1290 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1291
1292 if (code != CODE_FOR_nothing
1293 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1294 here because if SIZE is less than the mode mask, as it is
1295 returned by the macro, it will definitely be less than the
1296 actual mode mask. */
1297 && ((CONST_INT_P (size)
1298 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1299 <= (GET_MODE_MASK (mode) >> 1)))
1300 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1301 {
1302 struct expand_operand ops[6];
1303 unsigned int nops;
1304
1305 /* ??? When called via emit_block_move_for_call, it'd be
1306 nice if there were some way to inform the backend, so
1307 that it doesn't fail the expansion because it thinks
1308 emitting the libcall would be more efficient. */
1309 nops = insn_data[(int) code].n_generator_args;
1310 gcc_assert (nops == 4 || nops == 6);
1311
1312 create_fixed_operand (&ops[0], x);
1313 create_fixed_operand (&ops[1], y);
1314 /* The check above guarantees that this size conversion is valid. */
1315 create_convert_operand_to (&ops[2], size, mode, true);
1316 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1317 if (nops == 6)
1318 {
1319 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1320 create_integer_operand (&ops[5], expected_size);
1321 }
1322 if (maybe_expand_insn (code, nops, ops))
1323 {
1324 volatile_ok = save_volatile_ok;
1325 return true;
1326 }
1327 }
1328 }
1329
1330 volatile_ok = save_volatile_ok;
1331 return false;
1332 }
1333
1334 /* A subroutine of emit_block_move. Expand a call to memcpy.
1335 Return the return value from memcpy, 0 otherwise. */
1336
1337 rtx
1338 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1339 {
1340 rtx dst_addr, src_addr;
1341 tree call_expr, fn, src_tree, dst_tree, size_tree;
1342 enum machine_mode size_mode;
1343 rtx retval;
1344
1345 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1346 pseudos. We can then place those new pseudos into a VAR_DECL and
1347 use them later. */
1348
1349 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1350 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1351
1352 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1353 src_addr = convert_memory_address (ptr_mode, src_addr);
1354
1355 dst_tree = make_tree (ptr_type_node, dst_addr);
1356 src_tree = make_tree (ptr_type_node, src_addr);
1357
1358 size_mode = TYPE_MODE (sizetype);
1359
1360 size = convert_to_mode (size_mode, size, 1);
1361 size = copy_to_mode_reg (size_mode, size);
1362
1363 /* It is incorrect to use the libcall calling conventions to call
1364 memcpy in this context. This could be a user call to memcpy and
1365 the user may wish to examine the return value from memcpy. For
1366 targets where libcalls and normal calls have different conventions
1367 for returning pointers, we could end up generating incorrect code. */
1368
1369 size_tree = make_tree (sizetype, size);
1370
1371 fn = emit_block_move_libcall_fn (true);
1372 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1373 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1374
1375 retval = expand_normal (call_expr);
1376
1377 return retval;
1378 }
1379
1380 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1381 for the function we use for block copies. The first time FOR_CALL
1382 is true, we call assemble_external. */
1383
1384 static GTY(()) tree block_move_fn;
1385
1386 void
1387 init_block_move_fn (const char *asmspec)
1388 {
1389 if (!block_move_fn)
1390 {
1391 tree args, fn;
1392
1393 fn = get_identifier ("memcpy");
1394 args = build_function_type_list (ptr_type_node, ptr_type_node,
1395 const_ptr_type_node, sizetype,
1396 NULL_TREE);
1397
1398 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1399 DECL_EXTERNAL (fn) = 1;
1400 TREE_PUBLIC (fn) = 1;
1401 DECL_ARTIFICIAL (fn) = 1;
1402 TREE_NOTHROW (fn) = 1;
1403 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1404 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1405
1406 block_move_fn = fn;
1407 }
1408
1409 if (asmspec)
1410 set_user_assembler_name (block_move_fn, asmspec);
1411 }
1412
1413 static tree
1414 emit_block_move_libcall_fn (int for_call)
1415 {
1416 static bool emitted_extern;
1417
1418 if (!block_move_fn)
1419 init_block_move_fn (NULL);
1420
1421 if (for_call && !emitted_extern)
1422 {
1423 emitted_extern = true;
1424 make_decl_rtl (block_move_fn);
1425 assemble_external (block_move_fn);
1426 }
1427
1428 return block_move_fn;
1429 }
1430
1431 /* A subroutine of emit_block_move. Copy the data via an explicit
1432 loop. This is used only when libcalls are forbidden. */
1433 /* ??? It'd be nice to copy in hunks larger than QImode. */
1434
1435 static void
1436 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1437 unsigned int align ATTRIBUTE_UNUSED)
1438 {
1439 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1440 enum machine_mode x_addr_mode
1441 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1442 enum machine_mode y_addr_mode
1443 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1444 enum machine_mode iter_mode;
1445
1446 iter_mode = GET_MODE (size);
1447 if (iter_mode == VOIDmode)
1448 iter_mode = word_mode;
1449
1450 top_label = gen_label_rtx ();
1451 cmp_label = gen_label_rtx ();
1452 iter = gen_reg_rtx (iter_mode);
1453
1454 emit_move_insn (iter, const0_rtx);
1455
1456 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1457 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1458 do_pending_stack_adjust ();
1459
1460 emit_jump (cmp_label);
1461 emit_label (top_label);
1462
1463 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1464 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1465
1466 if (x_addr_mode != y_addr_mode)
1467 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1468 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1469
1470 x = change_address (x, QImode, x_addr);
1471 y = change_address (y, QImode, y_addr);
1472
1473 emit_move_insn (x, y);
1474
1475 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1476 true, OPTAB_LIB_WIDEN);
1477 if (tmp != iter)
1478 emit_move_insn (iter, tmp);
1479
1480 emit_label (cmp_label);
1481
1482 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1483 true, top_label);
1484 }
1485 \f
1486 /* Copy all or part of a value X into registers starting at REGNO.
1487 The number of registers to be filled is NREGS. */
1488
1489 void
1490 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1491 {
1492 int i;
1493 #ifdef HAVE_load_multiple
1494 rtx pat;
1495 rtx last;
1496 #endif
1497
1498 if (nregs == 0)
1499 return;
1500
1501 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1502 x = validize_mem (force_const_mem (mode, x));
1503
1504 /* See if the machine can do this with a load multiple insn. */
1505 #ifdef HAVE_load_multiple
1506 if (HAVE_load_multiple)
1507 {
1508 last = get_last_insn ();
1509 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1510 GEN_INT (nregs));
1511 if (pat)
1512 {
1513 emit_insn (pat);
1514 return;
1515 }
1516 else
1517 delete_insns_since (last);
1518 }
1519 #endif
1520
1521 for (i = 0; i < nregs; i++)
1522 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1523 operand_subword_force (x, i, mode));
1524 }
1525
1526 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1527 The number of registers to be filled is NREGS. */
1528
1529 void
1530 move_block_from_reg (int regno, rtx x, int nregs)
1531 {
1532 int i;
1533
1534 if (nregs == 0)
1535 return;
1536
1537 /* See if the machine can do this with a store multiple insn. */
1538 #ifdef HAVE_store_multiple
1539 if (HAVE_store_multiple)
1540 {
1541 rtx last = get_last_insn ();
1542 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1543 GEN_INT (nregs));
1544 if (pat)
1545 {
1546 emit_insn (pat);
1547 return;
1548 }
1549 else
1550 delete_insns_since (last);
1551 }
1552 #endif
1553
1554 for (i = 0; i < nregs; i++)
1555 {
1556 rtx tem = operand_subword (x, i, 1, BLKmode);
1557
1558 gcc_assert (tem);
1559
1560 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1561 }
1562 }
1563
1564 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1565 ORIG, where ORIG is a non-consecutive group of registers represented by
1566 a PARALLEL. The clone is identical to the original except in that the
1567 original set of registers is replaced by a new set of pseudo registers.
1568 The new set has the same modes as the original set. */
1569
1570 rtx
1571 gen_group_rtx (rtx orig)
1572 {
1573 int i, length;
1574 rtx *tmps;
1575
1576 gcc_assert (GET_CODE (orig) == PARALLEL);
1577
1578 length = XVECLEN (orig, 0);
1579 tmps = XALLOCAVEC (rtx, length);
1580
1581 /* Skip a NULL entry in first slot. */
1582 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1583
1584 if (i)
1585 tmps[0] = 0;
1586
1587 for (; i < length; i++)
1588 {
1589 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1590 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1591
1592 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1593 }
1594
1595 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1596 }
1597
1598 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1599 except that values are placed in TMPS[i], and must later be moved
1600 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1601
1602 static void
1603 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1604 {
1605 rtx src;
1606 int start, i;
1607 enum machine_mode m = GET_MODE (orig_src);
1608
1609 gcc_assert (GET_CODE (dst) == PARALLEL);
1610
1611 if (m != VOIDmode
1612 && !SCALAR_INT_MODE_P (m)
1613 && !MEM_P (orig_src)
1614 && GET_CODE (orig_src) != CONCAT)
1615 {
1616 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1617 if (imode == BLKmode)
1618 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1619 else
1620 src = gen_reg_rtx (imode);
1621 if (imode != BLKmode)
1622 src = gen_lowpart (GET_MODE (orig_src), src);
1623 emit_move_insn (src, orig_src);
1624 /* ...and back again. */
1625 if (imode != BLKmode)
1626 src = gen_lowpart (imode, src);
1627 emit_group_load_1 (tmps, dst, src, type, ssize);
1628 return;
1629 }
1630
1631 /* Check for a NULL entry, used to indicate that the parameter goes
1632 both on the stack and in registers. */
1633 if (XEXP (XVECEXP (dst, 0, 0), 0))
1634 start = 0;
1635 else
1636 start = 1;
1637
1638 /* Process the pieces. */
1639 for (i = start; i < XVECLEN (dst, 0); i++)
1640 {
1641 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1642 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1643 unsigned int bytelen = GET_MODE_SIZE (mode);
1644 int shift = 0;
1645
1646 /* Handle trailing fragments that run over the size of the struct. */
1647 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1648 {
1649 /* Arrange to shift the fragment to where it belongs.
1650 extract_bit_field loads to the lsb of the reg. */
1651 if (
1652 #ifdef BLOCK_REG_PADDING
1653 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1654 == (BYTES_BIG_ENDIAN ? upward : downward)
1655 #else
1656 BYTES_BIG_ENDIAN
1657 #endif
1658 )
1659 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1660 bytelen = ssize - bytepos;
1661 gcc_assert (bytelen > 0);
1662 }
1663
1664 /* If we won't be loading directly from memory, protect the real source
1665 from strange tricks we might play; but make sure that the source can
1666 be loaded directly into the destination. */
1667 src = orig_src;
1668 if (!MEM_P (orig_src)
1669 && (!CONSTANT_P (orig_src)
1670 || (GET_MODE (orig_src) != mode
1671 && GET_MODE (orig_src) != VOIDmode)))
1672 {
1673 if (GET_MODE (orig_src) == VOIDmode)
1674 src = gen_reg_rtx (mode);
1675 else
1676 src = gen_reg_rtx (GET_MODE (orig_src));
1677
1678 emit_move_insn (src, orig_src);
1679 }
1680
1681 /* Optimize the access just a bit. */
1682 if (MEM_P (src)
1683 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1684 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1685 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1686 && bytelen == GET_MODE_SIZE (mode))
1687 {
1688 tmps[i] = gen_reg_rtx (mode);
1689 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1690 }
1691 else if (COMPLEX_MODE_P (mode)
1692 && GET_MODE (src) == mode
1693 && bytelen == GET_MODE_SIZE (mode))
1694 /* Let emit_move_complex do the bulk of the work. */
1695 tmps[i] = src;
1696 else if (GET_CODE (src) == CONCAT)
1697 {
1698 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1699 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1700
1701 if ((bytepos == 0 && bytelen == slen0)
1702 || (bytepos != 0 && bytepos + bytelen <= slen))
1703 {
1704 /* The following assumes that the concatenated objects all
1705 have the same size. In this case, a simple calculation
1706 can be used to determine the object and the bit field
1707 to be extracted. */
1708 tmps[i] = XEXP (src, bytepos / slen0);
1709 if (! CONSTANT_P (tmps[i])
1710 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1711 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1712 (bytepos % slen0) * BITS_PER_UNIT,
1713 1, false, NULL_RTX, mode, mode);
1714 }
1715 else
1716 {
1717 rtx mem;
1718
1719 gcc_assert (!bytepos);
1720 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1721 emit_move_insn (mem, src);
1722 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1723 0, 1, false, NULL_RTX, mode, mode);
1724 }
1725 }
1726 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1727 SIMD register, which is currently broken. While we get GCC
1728 to emit proper RTL for these cases, let's dump to memory. */
1729 else if (VECTOR_MODE_P (GET_MODE (dst))
1730 && REG_P (src))
1731 {
1732 int slen = GET_MODE_SIZE (GET_MODE (src));
1733 rtx mem;
1734
1735 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1736 emit_move_insn (mem, src);
1737 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1738 }
1739 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1740 && XVECLEN (dst, 0) > 1)
1741 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1742 else if (CONSTANT_P (src))
1743 {
1744 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1745
1746 if (len == ssize)
1747 tmps[i] = src;
1748 else
1749 {
1750 rtx first, second;
1751
1752 gcc_assert (2 * len == ssize);
1753 split_double (src, &first, &second);
1754 if (i)
1755 tmps[i] = second;
1756 else
1757 tmps[i] = first;
1758 }
1759 }
1760 else if (REG_P (src) && GET_MODE (src) == mode)
1761 tmps[i] = src;
1762 else
1763 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1764 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1765 mode, mode);
1766
1767 if (shift)
1768 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1769 shift, tmps[i], 0);
1770 }
1771 }
1772
1773 /* Emit code to move a block SRC of type TYPE to a block DST,
1774 where DST is non-consecutive registers represented by a PARALLEL.
1775 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1776 if not known. */
1777
1778 void
1779 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1780 {
1781 rtx *tmps;
1782 int i;
1783
1784 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1785 emit_group_load_1 (tmps, dst, src, type, ssize);
1786
1787 /* Copy the extracted pieces into the proper (probable) hard regs. */
1788 for (i = 0; i < XVECLEN (dst, 0); i++)
1789 {
1790 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1791 if (d == NULL)
1792 continue;
1793 emit_move_insn (d, tmps[i]);
1794 }
1795 }
1796
1797 /* Similar, but load SRC into new pseudos in a format that looks like
1798 PARALLEL. This can later be fed to emit_group_move to get things
1799 in the right place. */
1800
1801 rtx
1802 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1803 {
1804 rtvec vec;
1805 int i;
1806
1807 vec = rtvec_alloc (XVECLEN (parallel, 0));
1808 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1809
1810 /* Convert the vector to look just like the original PARALLEL, except
1811 with the computed values. */
1812 for (i = 0; i < XVECLEN (parallel, 0); i++)
1813 {
1814 rtx e = XVECEXP (parallel, 0, i);
1815 rtx d = XEXP (e, 0);
1816
1817 if (d)
1818 {
1819 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1820 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1821 }
1822 RTVEC_ELT (vec, i) = e;
1823 }
1824
1825 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1826 }
1827
1828 /* Emit code to move a block SRC to block DST, where SRC and DST are
1829 non-consecutive groups of registers, each represented by a PARALLEL. */
1830
1831 void
1832 emit_group_move (rtx dst, rtx src)
1833 {
1834 int i;
1835
1836 gcc_assert (GET_CODE (src) == PARALLEL
1837 && GET_CODE (dst) == PARALLEL
1838 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1839
1840 /* Skip first entry if NULL. */
1841 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1842 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1843 XEXP (XVECEXP (src, 0, i), 0));
1844 }
1845
1846 /* Move a group of registers represented by a PARALLEL into pseudos. */
1847
1848 rtx
1849 emit_group_move_into_temps (rtx src)
1850 {
1851 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1852 int i;
1853
1854 for (i = 0; i < XVECLEN (src, 0); i++)
1855 {
1856 rtx e = XVECEXP (src, 0, i);
1857 rtx d = XEXP (e, 0);
1858
1859 if (d)
1860 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1861 RTVEC_ELT (vec, i) = e;
1862 }
1863
1864 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1865 }
1866
1867 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1868 where SRC is non-consecutive registers represented by a PARALLEL.
1869 SSIZE represents the total size of block ORIG_DST, or -1 if not
1870 known. */
1871
1872 void
1873 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1874 {
1875 rtx *tmps, dst;
1876 int start, finish, i;
1877 enum machine_mode m = GET_MODE (orig_dst);
1878
1879 gcc_assert (GET_CODE (src) == PARALLEL);
1880
1881 if (!SCALAR_INT_MODE_P (m)
1882 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1883 {
1884 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1885 if (imode == BLKmode)
1886 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1887 else
1888 dst = gen_reg_rtx (imode);
1889 emit_group_store (dst, src, type, ssize);
1890 if (imode != BLKmode)
1891 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1892 emit_move_insn (orig_dst, dst);
1893 return;
1894 }
1895
1896 /* Check for a NULL entry, used to indicate that the parameter goes
1897 both on the stack and in registers. */
1898 if (XEXP (XVECEXP (src, 0, 0), 0))
1899 start = 0;
1900 else
1901 start = 1;
1902 finish = XVECLEN (src, 0);
1903
1904 tmps = XALLOCAVEC (rtx, finish);
1905
1906 /* Copy the (probable) hard regs into pseudos. */
1907 for (i = start; i < finish; i++)
1908 {
1909 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1910 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1911 {
1912 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1913 emit_move_insn (tmps[i], reg);
1914 }
1915 else
1916 tmps[i] = reg;
1917 }
1918
1919 /* If we won't be storing directly into memory, protect the real destination
1920 from strange tricks we might play. */
1921 dst = orig_dst;
1922 if (GET_CODE (dst) == PARALLEL)
1923 {
1924 rtx temp;
1925
1926 /* We can get a PARALLEL dst if there is a conditional expression in
1927 a return statement. In that case, the dst and src are the same,
1928 so no action is necessary. */
1929 if (rtx_equal_p (dst, src))
1930 return;
1931
1932 /* It is unclear if we can ever reach here, but we may as well handle
1933 it. Allocate a temporary, and split this into a store/load to/from
1934 the temporary. */
1935
1936 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1937 emit_group_store (temp, src, type, ssize);
1938 emit_group_load (dst, temp, type, ssize);
1939 return;
1940 }
1941 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1942 {
1943 enum machine_mode outer = GET_MODE (dst);
1944 enum machine_mode inner;
1945 HOST_WIDE_INT bytepos;
1946 bool done = false;
1947 rtx temp;
1948
1949 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1950 dst = gen_reg_rtx (outer);
1951
1952 /* Make life a bit easier for combine. */
1953 /* If the first element of the vector is the low part
1954 of the destination mode, use a paradoxical subreg to
1955 initialize the destination. */
1956 if (start < finish)
1957 {
1958 inner = GET_MODE (tmps[start]);
1959 bytepos = subreg_lowpart_offset (inner, outer);
1960 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1961 {
1962 temp = simplify_gen_subreg (outer, tmps[start],
1963 inner, 0);
1964 if (temp)
1965 {
1966 emit_move_insn (dst, temp);
1967 done = true;
1968 start++;
1969 }
1970 }
1971 }
1972
1973 /* If the first element wasn't the low part, try the last. */
1974 if (!done
1975 && start < finish - 1)
1976 {
1977 inner = GET_MODE (tmps[finish - 1]);
1978 bytepos = subreg_lowpart_offset (inner, outer);
1979 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1980 {
1981 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1982 inner, 0);
1983 if (temp)
1984 {
1985 emit_move_insn (dst, temp);
1986 done = true;
1987 finish--;
1988 }
1989 }
1990 }
1991
1992 /* Otherwise, simply initialize the result to zero. */
1993 if (!done)
1994 emit_move_insn (dst, CONST0_RTX (outer));
1995 }
1996
1997 /* Process the pieces. */
1998 for (i = start; i < finish; i++)
1999 {
2000 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2001 enum machine_mode mode = GET_MODE (tmps[i]);
2002 unsigned int bytelen = GET_MODE_SIZE (mode);
2003 unsigned int adj_bytelen = bytelen;
2004 rtx dest = dst;
2005
2006 /* Handle trailing fragments that run over the size of the struct. */
2007 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2008 adj_bytelen = ssize - bytepos;
2009
2010 if (GET_CODE (dst) == CONCAT)
2011 {
2012 if (bytepos + adj_bytelen
2013 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2014 dest = XEXP (dst, 0);
2015 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2016 {
2017 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2018 dest = XEXP (dst, 1);
2019 }
2020 else
2021 {
2022 enum machine_mode dest_mode = GET_MODE (dest);
2023 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2024
2025 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2026
2027 if (GET_MODE_ALIGNMENT (dest_mode)
2028 >= GET_MODE_ALIGNMENT (tmp_mode))
2029 {
2030 dest = assign_stack_temp (dest_mode,
2031 GET_MODE_SIZE (dest_mode),
2032 0);
2033 emit_move_insn (adjust_address (dest,
2034 tmp_mode,
2035 bytepos),
2036 tmps[i]);
2037 dst = dest;
2038 }
2039 else
2040 {
2041 dest = assign_stack_temp (tmp_mode,
2042 GET_MODE_SIZE (tmp_mode),
2043 0);
2044 emit_move_insn (dest, tmps[i]);
2045 dst = adjust_address (dest, dest_mode, bytepos);
2046 }
2047 break;
2048 }
2049 }
2050
2051 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2052 {
2053 /* store_bit_field always takes its value from the lsb.
2054 Move the fragment to the lsb if it's not already there. */
2055 if (
2056 #ifdef BLOCK_REG_PADDING
2057 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2058 == (BYTES_BIG_ENDIAN ? upward : downward)
2059 #else
2060 BYTES_BIG_ENDIAN
2061 #endif
2062 )
2063 {
2064 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2065 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2066 shift, tmps[i], 0);
2067 }
2068 bytelen = adj_bytelen;
2069 }
2070
2071 /* Optimize the access just a bit. */
2072 if (MEM_P (dest)
2073 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2074 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2075 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2076 && bytelen == GET_MODE_SIZE (mode))
2077 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2078 else
2079 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2080 0, 0, mode, tmps[i]);
2081 }
2082
2083 /* Copy from the pseudo into the (probable) hard reg. */
2084 if (orig_dst != dst)
2085 emit_move_insn (orig_dst, dst);
2086 }
2087
2088 /* Generate code to copy a BLKmode object of TYPE out of a
2089 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2090 is null, a stack temporary is created. TGTBLK is returned.
2091
2092 The purpose of this routine is to handle functions that return
2093 BLKmode structures in registers. Some machines (the PA for example)
2094 want to return all small structures in registers regardless of the
2095 structure's alignment. */
2096
2097 rtx
2098 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2099 {
2100 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2101 rtx src = NULL, dst = NULL;
2102 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2103 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2104 enum machine_mode copy_mode;
2105
2106 if (tgtblk == 0)
2107 {
2108 tgtblk = assign_temp (build_qualified_type (type,
2109 (TYPE_QUALS (type)
2110 | TYPE_QUAL_CONST)),
2111 0, 1, 1);
2112 preserve_temp_slots (tgtblk);
2113 }
2114
2115 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2116 into a new pseudo which is a full word. */
2117
2118 if (GET_MODE (srcreg) != BLKmode
2119 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2120 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2121
2122 /* If the structure doesn't take up a whole number of words, see whether
2123 SRCREG is padded on the left or on the right. If it's on the left,
2124 set PADDING_CORRECTION to the number of bits to skip.
2125
2126 In most ABIs, the structure will be returned at the least end of
2127 the register, which translates to right padding on little-endian
2128 targets and left padding on big-endian targets. The opposite
2129 holds if the structure is returned at the most significant
2130 end of the register. */
2131 if (bytes % UNITS_PER_WORD != 0
2132 && (targetm.calls.return_in_msb (type)
2133 ? !BYTES_BIG_ENDIAN
2134 : BYTES_BIG_ENDIAN))
2135 padding_correction
2136 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2137
2138 /* Copy the structure BITSIZE bits at a time. If the target lives in
2139 memory, take care of not reading/writing past its end by selecting
2140 a copy mode suited to BITSIZE. This should always be possible given
2141 how it is computed.
2142
2143 We could probably emit more efficient code for machines which do not use
2144 strict alignment, but it doesn't seem worth the effort at the current
2145 time. */
2146
2147 copy_mode = word_mode;
2148 if (MEM_P (tgtblk))
2149 {
2150 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2151 if (mem_mode != BLKmode)
2152 copy_mode = mem_mode;
2153 }
2154
2155 for (bitpos = 0, xbitpos = padding_correction;
2156 bitpos < bytes * BITS_PER_UNIT;
2157 bitpos += bitsize, xbitpos += bitsize)
2158 {
2159 /* We need a new source operand each time xbitpos is on a
2160 word boundary and when xbitpos == padding_correction
2161 (the first time through). */
2162 if (xbitpos % BITS_PER_WORD == 0
2163 || xbitpos == padding_correction)
2164 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2165 GET_MODE (srcreg));
2166
2167 /* We need a new destination operand each time bitpos is on
2168 a word boundary. */
2169 if (bitpos % BITS_PER_WORD == 0)
2170 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2171
2172 /* Use xbitpos for the source extraction (right justified) and
2173 bitpos for the destination store (left justified). */
2174 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2175 extract_bit_field (src, bitsize,
2176 xbitpos % BITS_PER_WORD, 1, false,
2177 NULL_RTX, copy_mode, copy_mode));
2178 }
2179
2180 return tgtblk;
2181 }
2182
2183 /* Add a USE expression for REG to the (possibly empty) list pointed
2184 to by CALL_FUSAGE. REG must denote a hard register. */
2185
2186 void
2187 use_reg (rtx *call_fusage, rtx reg)
2188 {
2189 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2190
2191 *call_fusage
2192 = gen_rtx_EXPR_LIST (VOIDmode,
2193 gen_rtx_USE (VOIDmode, reg), *call_fusage);
2194 }
2195
2196 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2197 starting at REGNO. All of these registers must be hard registers. */
2198
2199 void
2200 use_regs (rtx *call_fusage, int regno, int nregs)
2201 {
2202 int i;
2203
2204 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2205
2206 for (i = 0; i < nregs; i++)
2207 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2208 }
2209
2210 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2211 PARALLEL REGS. This is for calls that pass values in multiple
2212 non-contiguous locations. The Irix 6 ABI has examples of this. */
2213
2214 void
2215 use_group_regs (rtx *call_fusage, rtx regs)
2216 {
2217 int i;
2218
2219 for (i = 0; i < XVECLEN (regs, 0); i++)
2220 {
2221 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2222
2223 /* A NULL entry means the parameter goes both on the stack and in
2224 registers. This can also be a MEM for targets that pass values
2225 partially on the stack and partially in registers. */
2226 if (reg != 0 && REG_P (reg))
2227 use_reg (call_fusage, reg);
2228 }
2229 }
2230
2231 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2232 assigment and the code of the expresion on the RHS is CODE. Return
2233 NULL otherwise. */
2234
2235 static gimple
2236 get_def_for_expr (tree name, enum tree_code code)
2237 {
2238 gimple def_stmt;
2239
2240 if (TREE_CODE (name) != SSA_NAME)
2241 return NULL;
2242
2243 def_stmt = get_gimple_for_ssa_name (name);
2244 if (!def_stmt
2245 || gimple_assign_rhs_code (def_stmt) != code)
2246 return NULL;
2247
2248 return def_stmt;
2249 }
2250 \f
2251
2252 /* Determine whether the LEN bytes generated by CONSTFUN can be
2253 stored to memory using several move instructions. CONSTFUNDATA is
2254 a pointer which will be passed as argument in every CONSTFUN call.
2255 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2256 a memset operation and false if it's a copy of a constant string.
2257 Return nonzero if a call to store_by_pieces should succeed. */
2258
2259 int
2260 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2261 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2262 void *constfundata, unsigned int align, bool memsetp)
2263 {
2264 unsigned HOST_WIDE_INT l;
2265 unsigned int max_size;
2266 HOST_WIDE_INT offset = 0;
2267 enum machine_mode mode;
2268 enum insn_code icode;
2269 int reverse;
2270 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2271 rtx cst ATTRIBUTE_UNUSED;
2272
2273 if (len == 0)
2274 return 1;
2275
2276 if (! (memsetp
2277 ? SET_BY_PIECES_P (len, align)
2278 : STORE_BY_PIECES_P (len, align)))
2279 return 0;
2280
2281 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2282
2283 /* We would first store what we can in the largest integer mode, then go to
2284 successively smaller modes. */
2285
2286 for (reverse = 0;
2287 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2288 reverse++)
2289 {
2290 l = len;
2291 max_size = STORE_MAX_PIECES + 1;
2292 while (max_size > 1)
2293 {
2294 mode = widest_int_mode_for_size (max_size);
2295
2296 if (mode == VOIDmode)
2297 break;
2298
2299 icode = optab_handler (mov_optab, mode);
2300 if (icode != CODE_FOR_nothing
2301 && align >= GET_MODE_ALIGNMENT (mode))
2302 {
2303 unsigned int size = GET_MODE_SIZE (mode);
2304
2305 while (l >= size)
2306 {
2307 if (reverse)
2308 offset -= size;
2309
2310 cst = (*constfun) (constfundata, offset, mode);
2311 if (!targetm.legitimate_constant_p (mode, cst))
2312 return 0;
2313
2314 if (!reverse)
2315 offset += size;
2316
2317 l -= size;
2318 }
2319 }
2320
2321 max_size = GET_MODE_SIZE (mode);
2322 }
2323
2324 /* The code above should have handled everything. */
2325 gcc_assert (!l);
2326 }
2327
2328 return 1;
2329 }
2330
2331 /* Generate several move instructions to store LEN bytes generated by
2332 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2333 pointer which will be passed as argument in every CONSTFUN call.
2334 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2335 a memset operation and false if it's a copy of a constant string.
2336 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2337 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2338 stpcpy. */
2339
2340 rtx
2341 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2342 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2343 void *constfundata, unsigned int align, bool memsetp, int endp)
2344 {
2345 enum machine_mode to_addr_mode
2346 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2347 struct store_by_pieces_d data;
2348
2349 if (len == 0)
2350 {
2351 gcc_assert (endp != 2);
2352 return to;
2353 }
2354
2355 gcc_assert (memsetp
2356 ? SET_BY_PIECES_P (len, align)
2357 : STORE_BY_PIECES_P (len, align));
2358 data.constfun = constfun;
2359 data.constfundata = constfundata;
2360 data.len = len;
2361 data.to = to;
2362 store_by_pieces_1 (&data, align);
2363 if (endp)
2364 {
2365 rtx to1;
2366
2367 gcc_assert (!data.reverse);
2368 if (data.autinc_to)
2369 {
2370 if (endp == 2)
2371 {
2372 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2373 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2374 else
2375 data.to_addr = copy_to_mode_reg (to_addr_mode,
2376 plus_constant (data.to_addr,
2377 -1));
2378 }
2379 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2380 data.offset);
2381 }
2382 else
2383 {
2384 if (endp == 2)
2385 --data.offset;
2386 to1 = adjust_address (data.to, QImode, data.offset);
2387 }
2388 return to1;
2389 }
2390 else
2391 return data.to;
2392 }
2393
2394 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2395 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2396
2397 static void
2398 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2399 {
2400 struct store_by_pieces_d data;
2401
2402 if (len == 0)
2403 return;
2404
2405 data.constfun = clear_by_pieces_1;
2406 data.constfundata = NULL;
2407 data.len = len;
2408 data.to = to;
2409 store_by_pieces_1 (&data, align);
2410 }
2411
2412 /* Callback routine for clear_by_pieces.
2413 Return const0_rtx unconditionally. */
2414
2415 static rtx
2416 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2417 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2418 enum machine_mode mode ATTRIBUTE_UNUSED)
2419 {
2420 return const0_rtx;
2421 }
2422
2423 /* Subroutine of clear_by_pieces and store_by_pieces.
2424 Generate several move instructions to store LEN bytes of block TO. (A MEM
2425 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2426
2427 static void
2428 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2429 unsigned int align ATTRIBUTE_UNUSED)
2430 {
2431 enum machine_mode to_addr_mode
2432 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2433 rtx to_addr = XEXP (data->to, 0);
2434 unsigned int max_size = STORE_MAX_PIECES + 1;
2435 enum insn_code icode;
2436
2437 data->offset = 0;
2438 data->to_addr = to_addr;
2439 data->autinc_to
2440 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2441 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2442
2443 data->explicit_inc_to = 0;
2444 data->reverse
2445 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2446 if (data->reverse)
2447 data->offset = data->len;
2448
2449 /* If storing requires more than two move insns,
2450 copy addresses to registers (to make displacements shorter)
2451 and use post-increment if available. */
2452 if (!data->autinc_to
2453 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2454 {
2455 /* Determine the main mode we'll be using.
2456 MODE might not be used depending on the definitions of the
2457 USE_* macros below. */
2458 enum machine_mode mode ATTRIBUTE_UNUSED
2459 = widest_int_mode_for_size (max_size);
2460
2461 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2462 {
2463 data->to_addr = copy_to_mode_reg (to_addr_mode,
2464 plus_constant (to_addr, data->len));
2465 data->autinc_to = 1;
2466 data->explicit_inc_to = -1;
2467 }
2468
2469 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2470 && ! data->autinc_to)
2471 {
2472 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2473 data->autinc_to = 1;
2474 data->explicit_inc_to = 1;
2475 }
2476
2477 if ( !data->autinc_to && CONSTANT_P (to_addr))
2478 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2479 }
2480
2481 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2482
2483 /* First store what we can in the largest integer mode, then go to
2484 successively smaller modes. */
2485
2486 while (max_size > 1)
2487 {
2488 enum machine_mode mode = widest_int_mode_for_size (max_size);
2489
2490 if (mode == VOIDmode)
2491 break;
2492
2493 icode = optab_handler (mov_optab, mode);
2494 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2495 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2496
2497 max_size = GET_MODE_SIZE (mode);
2498 }
2499
2500 /* The code above should have handled everything. */
2501 gcc_assert (!data->len);
2502 }
2503
2504 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2505 with move instructions for mode MODE. GENFUN is the gen_... function
2506 to make a move insn for that mode. DATA has all the other info. */
2507
2508 static void
2509 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2510 struct store_by_pieces_d *data)
2511 {
2512 unsigned int size = GET_MODE_SIZE (mode);
2513 rtx to1, cst;
2514
2515 while (data->len >= size)
2516 {
2517 if (data->reverse)
2518 data->offset -= size;
2519
2520 if (data->autinc_to)
2521 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2522 data->offset);
2523 else
2524 to1 = adjust_address (data->to, mode, data->offset);
2525
2526 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2527 emit_insn (gen_add2_insn (data->to_addr,
2528 GEN_INT (-(HOST_WIDE_INT) size)));
2529
2530 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2531 emit_insn ((*genfun) (to1, cst));
2532
2533 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2534 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2535
2536 if (! data->reverse)
2537 data->offset += size;
2538
2539 data->len -= size;
2540 }
2541 }
2542 \f
2543 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2544 its length in bytes. */
2545
2546 rtx
2547 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2548 unsigned int expected_align, HOST_WIDE_INT expected_size)
2549 {
2550 enum machine_mode mode = GET_MODE (object);
2551 unsigned int align;
2552
2553 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2554
2555 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2556 just move a zero. Otherwise, do this a piece at a time. */
2557 if (mode != BLKmode
2558 && CONST_INT_P (size)
2559 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2560 {
2561 rtx zero = CONST0_RTX (mode);
2562 if (zero != NULL)
2563 {
2564 emit_move_insn (object, zero);
2565 return NULL;
2566 }
2567
2568 if (COMPLEX_MODE_P (mode))
2569 {
2570 zero = CONST0_RTX (GET_MODE_INNER (mode));
2571 if (zero != NULL)
2572 {
2573 write_complex_part (object, zero, 0);
2574 write_complex_part (object, zero, 1);
2575 return NULL;
2576 }
2577 }
2578 }
2579
2580 if (size == const0_rtx)
2581 return NULL;
2582
2583 align = MEM_ALIGN (object);
2584
2585 if (CONST_INT_P (size)
2586 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2587 clear_by_pieces (object, INTVAL (size), align);
2588 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2589 expected_align, expected_size))
2590 ;
2591 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2592 return set_storage_via_libcall (object, size, const0_rtx,
2593 method == BLOCK_OP_TAILCALL);
2594 else
2595 gcc_unreachable ();
2596
2597 return NULL;
2598 }
2599
2600 rtx
2601 clear_storage (rtx object, rtx size, enum block_op_methods method)
2602 {
2603 return clear_storage_hints (object, size, method, 0, -1);
2604 }
2605
2606
2607 /* A subroutine of clear_storage. Expand a call to memset.
2608 Return the return value of memset, 0 otherwise. */
2609
2610 rtx
2611 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2612 {
2613 tree call_expr, fn, object_tree, size_tree, val_tree;
2614 enum machine_mode size_mode;
2615 rtx retval;
2616
2617 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2618 place those into new pseudos into a VAR_DECL and use them later. */
2619
2620 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2621
2622 size_mode = TYPE_MODE (sizetype);
2623 size = convert_to_mode (size_mode, size, 1);
2624 size = copy_to_mode_reg (size_mode, size);
2625
2626 /* It is incorrect to use the libcall calling conventions to call
2627 memset in this context. This could be a user call to memset and
2628 the user may wish to examine the return value from memset. For
2629 targets where libcalls and normal calls have different conventions
2630 for returning pointers, we could end up generating incorrect code. */
2631
2632 object_tree = make_tree (ptr_type_node, object);
2633 if (!CONST_INT_P (val))
2634 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2635 size_tree = make_tree (sizetype, size);
2636 val_tree = make_tree (integer_type_node, val);
2637
2638 fn = clear_storage_libcall_fn (true);
2639 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2640 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2641
2642 retval = expand_normal (call_expr);
2643
2644 return retval;
2645 }
2646
2647 /* A subroutine of set_storage_via_libcall. Create the tree node
2648 for the function we use for block clears. The first time FOR_CALL
2649 is true, we call assemble_external. */
2650
2651 tree block_clear_fn;
2652
2653 void
2654 init_block_clear_fn (const char *asmspec)
2655 {
2656 if (!block_clear_fn)
2657 {
2658 tree fn, args;
2659
2660 fn = get_identifier ("memset");
2661 args = build_function_type_list (ptr_type_node, ptr_type_node,
2662 integer_type_node, sizetype,
2663 NULL_TREE);
2664
2665 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2666 DECL_EXTERNAL (fn) = 1;
2667 TREE_PUBLIC (fn) = 1;
2668 DECL_ARTIFICIAL (fn) = 1;
2669 TREE_NOTHROW (fn) = 1;
2670 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2671 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2672
2673 block_clear_fn = fn;
2674 }
2675
2676 if (asmspec)
2677 set_user_assembler_name (block_clear_fn, asmspec);
2678 }
2679
2680 static tree
2681 clear_storage_libcall_fn (int for_call)
2682 {
2683 static bool emitted_extern;
2684
2685 if (!block_clear_fn)
2686 init_block_clear_fn (NULL);
2687
2688 if (for_call && !emitted_extern)
2689 {
2690 emitted_extern = true;
2691 make_decl_rtl (block_clear_fn);
2692 assemble_external (block_clear_fn);
2693 }
2694
2695 return block_clear_fn;
2696 }
2697 \f
2698 /* Expand a setmem pattern; return true if successful. */
2699
2700 bool
2701 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2702 unsigned int expected_align, HOST_WIDE_INT expected_size)
2703 {
2704 /* Try the most limited insn first, because there's no point
2705 including more than one in the machine description unless
2706 the more limited one has some advantage. */
2707
2708 enum machine_mode mode;
2709
2710 if (expected_align < align)
2711 expected_align = align;
2712
2713 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2714 mode = GET_MODE_WIDER_MODE (mode))
2715 {
2716 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2717
2718 if (code != CODE_FOR_nothing
2719 /* We don't need MODE to be narrower than
2720 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2721 the mode mask, as it is returned by the macro, it will
2722 definitely be less than the actual mode mask. */
2723 && ((CONST_INT_P (size)
2724 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2725 <= (GET_MODE_MASK (mode) >> 1)))
2726 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2727 {
2728 struct expand_operand ops[6];
2729 unsigned int nops;
2730
2731 nops = insn_data[(int) code].n_generator_args;
2732 gcc_assert (nops == 4 || nops == 6);
2733
2734 create_fixed_operand (&ops[0], object);
2735 /* The check above guarantees that this size conversion is valid. */
2736 create_convert_operand_to (&ops[1], size, mode, true);
2737 create_convert_operand_from (&ops[2], val, byte_mode, true);
2738 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2739 if (nops == 6)
2740 {
2741 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2742 create_integer_operand (&ops[5], expected_size);
2743 }
2744 if (maybe_expand_insn (code, nops, ops))
2745 return true;
2746 }
2747 }
2748
2749 return false;
2750 }
2751
2752 \f
2753 /* Write to one of the components of the complex value CPLX. Write VAL to
2754 the real part if IMAG_P is false, and the imaginary part if its true. */
2755
2756 static void
2757 write_complex_part (rtx cplx, rtx val, bool imag_p)
2758 {
2759 enum machine_mode cmode;
2760 enum machine_mode imode;
2761 unsigned ibitsize;
2762
2763 if (GET_CODE (cplx) == CONCAT)
2764 {
2765 emit_move_insn (XEXP (cplx, imag_p), val);
2766 return;
2767 }
2768
2769 cmode = GET_MODE (cplx);
2770 imode = GET_MODE_INNER (cmode);
2771 ibitsize = GET_MODE_BITSIZE (imode);
2772
2773 /* For MEMs simplify_gen_subreg may generate an invalid new address
2774 because, e.g., the original address is considered mode-dependent
2775 by the target, which restricts simplify_subreg from invoking
2776 adjust_address_nv. Instead of preparing fallback support for an
2777 invalid address, we call adjust_address_nv directly. */
2778 if (MEM_P (cplx))
2779 {
2780 emit_move_insn (adjust_address_nv (cplx, imode,
2781 imag_p ? GET_MODE_SIZE (imode) : 0),
2782 val);
2783 return;
2784 }
2785
2786 /* If the sub-object is at least word sized, then we know that subregging
2787 will work. This special case is important, since store_bit_field
2788 wants to operate on integer modes, and there's rarely an OImode to
2789 correspond to TCmode. */
2790 if (ibitsize >= BITS_PER_WORD
2791 /* For hard regs we have exact predicates. Assume we can split
2792 the original object if it spans an even number of hard regs.
2793 This special case is important for SCmode on 64-bit platforms
2794 where the natural size of floating-point regs is 32-bit. */
2795 || (REG_P (cplx)
2796 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2797 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2798 {
2799 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2800 imag_p ? GET_MODE_SIZE (imode) : 0);
2801 if (part)
2802 {
2803 emit_move_insn (part, val);
2804 return;
2805 }
2806 else
2807 /* simplify_gen_subreg may fail for sub-word MEMs. */
2808 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2809 }
2810
2811 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2812 }
2813
2814 /* Extract one of the components of the complex value CPLX. Extract the
2815 real part if IMAG_P is false, and the imaginary part if it's true. */
2816
2817 static rtx
2818 read_complex_part (rtx cplx, bool imag_p)
2819 {
2820 enum machine_mode cmode, imode;
2821 unsigned ibitsize;
2822
2823 if (GET_CODE (cplx) == CONCAT)
2824 return XEXP (cplx, imag_p);
2825
2826 cmode = GET_MODE (cplx);
2827 imode = GET_MODE_INNER (cmode);
2828 ibitsize = GET_MODE_BITSIZE (imode);
2829
2830 /* Special case reads from complex constants that got spilled to memory. */
2831 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2832 {
2833 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2834 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2835 {
2836 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2837 if (CONSTANT_CLASS_P (part))
2838 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2839 }
2840 }
2841
2842 /* For MEMs simplify_gen_subreg may generate an invalid new address
2843 because, e.g., the original address is considered mode-dependent
2844 by the target, which restricts simplify_subreg from invoking
2845 adjust_address_nv. Instead of preparing fallback support for an
2846 invalid address, we call adjust_address_nv directly. */
2847 if (MEM_P (cplx))
2848 return adjust_address_nv (cplx, imode,
2849 imag_p ? GET_MODE_SIZE (imode) : 0);
2850
2851 /* If the sub-object is at least word sized, then we know that subregging
2852 will work. This special case is important, since extract_bit_field
2853 wants to operate on integer modes, and there's rarely an OImode to
2854 correspond to TCmode. */
2855 if (ibitsize >= BITS_PER_WORD
2856 /* For hard regs we have exact predicates. Assume we can split
2857 the original object if it spans an even number of hard regs.
2858 This special case is important for SCmode on 64-bit platforms
2859 where the natural size of floating-point regs is 32-bit. */
2860 || (REG_P (cplx)
2861 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2862 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2863 {
2864 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2865 imag_p ? GET_MODE_SIZE (imode) : 0);
2866 if (ret)
2867 return ret;
2868 else
2869 /* simplify_gen_subreg may fail for sub-word MEMs. */
2870 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2871 }
2872
2873 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2874 true, false, NULL_RTX, imode, imode);
2875 }
2876 \f
2877 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2878 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2879 represented in NEW_MODE. If FORCE is true, this will never happen, as
2880 we'll force-create a SUBREG if needed. */
2881
2882 static rtx
2883 emit_move_change_mode (enum machine_mode new_mode,
2884 enum machine_mode old_mode, rtx x, bool force)
2885 {
2886 rtx ret;
2887
2888 if (push_operand (x, GET_MODE (x)))
2889 {
2890 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2891 MEM_COPY_ATTRIBUTES (ret, x);
2892 }
2893 else if (MEM_P (x))
2894 {
2895 /* We don't have to worry about changing the address since the
2896 size in bytes is supposed to be the same. */
2897 if (reload_in_progress)
2898 {
2899 /* Copy the MEM to change the mode and move any
2900 substitutions from the old MEM to the new one. */
2901 ret = adjust_address_nv (x, new_mode, 0);
2902 copy_replacements (x, ret);
2903 }
2904 else
2905 ret = adjust_address (x, new_mode, 0);
2906 }
2907 else
2908 {
2909 /* Note that we do want simplify_subreg's behavior of validating
2910 that the new mode is ok for a hard register. If we were to use
2911 simplify_gen_subreg, we would create the subreg, but would
2912 probably run into the target not being able to implement it. */
2913 /* Except, of course, when FORCE is true, when this is exactly what
2914 we want. Which is needed for CCmodes on some targets. */
2915 if (force)
2916 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
2917 else
2918 ret = simplify_subreg (new_mode, x, old_mode, 0);
2919 }
2920
2921 return ret;
2922 }
2923
2924 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
2925 an integer mode of the same size as MODE. Returns the instruction
2926 emitted, or NULL if such a move could not be generated. */
2927
2928 static rtx
2929 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
2930 {
2931 enum machine_mode imode;
2932 enum insn_code code;
2933
2934 /* There must exist a mode of the exact size we require. */
2935 imode = int_mode_for_mode (mode);
2936 if (imode == BLKmode)
2937 return NULL_RTX;
2938
2939 /* The target must support moves in this mode. */
2940 code = optab_handler (mov_optab, imode);
2941 if (code == CODE_FOR_nothing)
2942 return NULL_RTX;
2943
2944 x = emit_move_change_mode (imode, mode, x, force);
2945 if (x == NULL_RTX)
2946 return NULL_RTX;
2947 y = emit_move_change_mode (imode, mode, y, force);
2948 if (y == NULL_RTX)
2949 return NULL_RTX;
2950 return emit_insn (GEN_FCN (code) (x, y));
2951 }
2952
2953 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
2954 Return an equivalent MEM that does not use an auto-increment. */
2955
2956 static rtx
2957 emit_move_resolve_push (enum machine_mode mode, rtx x)
2958 {
2959 enum rtx_code code = GET_CODE (XEXP (x, 0));
2960 HOST_WIDE_INT adjust;
2961 rtx temp;
2962
2963 adjust = GET_MODE_SIZE (mode);
2964 #ifdef PUSH_ROUNDING
2965 adjust = PUSH_ROUNDING (adjust);
2966 #endif
2967 if (code == PRE_DEC || code == POST_DEC)
2968 adjust = -adjust;
2969 else if (code == PRE_MODIFY || code == POST_MODIFY)
2970 {
2971 rtx expr = XEXP (XEXP (x, 0), 1);
2972 HOST_WIDE_INT val;
2973
2974 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
2975 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
2976 val = INTVAL (XEXP (expr, 1));
2977 if (GET_CODE (expr) == MINUS)
2978 val = -val;
2979 gcc_assert (adjust == val || adjust == -val);
2980 adjust = val;
2981 }
2982
2983 /* Do not use anti_adjust_stack, since we don't want to update
2984 stack_pointer_delta. */
2985 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
2986 GEN_INT (adjust), stack_pointer_rtx,
2987 0, OPTAB_LIB_WIDEN);
2988 if (temp != stack_pointer_rtx)
2989 emit_move_insn (stack_pointer_rtx, temp);
2990
2991 switch (code)
2992 {
2993 case PRE_INC:
2994 case PRE_DEC:
2995 case PRE_MODIFY:
2996 temp = stack_pointer_rtx;
2997 break;
2998 case POST_INC:
2999 case POST_DEC:
3000 case POST_MODIFY:
3001 temp = plus_constant (stack_pointer_rtx, -adjust);
3002 break;
3003 default:
3004 gcc_unreachable ();
3005 }
3006
3007 return replace_equiv_address (x, temp);
3008 }
3009
3010 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3011 X is known to satisfy push_operand, and MODE is known to be complex.
3012 Returns the last instruction emitted. */
3013
3014 rtx
3015 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3016 {
3017 enum machine_mode submode = GET_MODE_INNER (mode);
3018 bool imag_first;
3019
3020 #ifdef PUSH_ROUNDING
3021 unsigned int submodesize = GET_MODE_SIZE (submode);
3022
3023 /* In case we output to the stack, but the size is smaller than the
3024 machine can push exactly, we need to use move instructions. */
3025 if (PUSH_ROUNDING (submodesize) != submodesize)
3026 {
3027 x = emit_move_resolve_push (mode, x);
3028 return emit_move_insn (x, y);
3029 }
3030 #endif
3031
3032 /* Note that the real part always precedes the imag part in memory
3033 regardless of machine's endianness. */
3034 switch (GET_CODE (XEXP (x, 0)))
3035 {
3036 case PRE_DEC:
3037 case POST_DEC:
3038 imag_first = true;
3039 break;
3040 case PRE_INC:
3041 case POST_INC:
3042 imag_first = false;
3043 break;
3044 default:
3045 gcc_unreachable ();
3046 }
3047
3048 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3049 read_complex_part (y, imag_first));
3050 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3051 read_complex_part (y, !imag_first));
3052 }
3053
3054 /* A subroutine of emit_move_complex. Perform the move from Y to X
3055 via two moves of the parts. Returns the last instruction emitted. */
3056
3057 rtx
3058 emit_move_complex_parts (rtx x, rtx y)
3059 {
3060 /* Show the output dies here. This is necessary for SUBREGs
3061 of pseudos since we cannot track their lifetimes correctly;
3062 hard regs shouldn't appear here except as return values. */
3063 if (!reload_completed && !reload_in_progress
3064 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3065 emit_clobber (x);
3066
3067 write_complex_part (x, read_complex_part (y, false), false);
3068 write_complex_part (x, read_complex_part (y, true), true);
3069
3070 return get_last_insn ();
3071 }
3072
3073 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3074 MODE is known to be complex. Returns the last instruction emitted. */
3075
3076 static rtx
3077 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3078 {
3079 bool try_int;
3080
3081 /* Need to take special care for pushes, to maintain proper ordering
3082 of the data, and possibly extra padding. */
3083 if (push_operand (x, mode))
3084 return emit_move_complex_push (mode, x, y);
3085
3086 /* See if we can coerce the target into moving both values at once. */
3087
3088 /* Move floating point as parts. */
3089 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3090 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3091 try_int = false;
3092 /* Not possible if the values are inherently not adjacent. */
3093 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3094 try_int = false;
3095 /* Is possible if both are registers (or subregs of registers). */
3096 else if (register_operand (x, mode) && register_operand (y, mode))
3097 try_int = true;
3098 /* If one of the operands is a memory, and alignment constraints
3099 are friendly enough, we may be able to do combined memory operations.
3100 We do not attempt this if Y is a constant because that combination is
3101 usually better with the by-parts thing below. */
3102 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3103 && (!STRICT_ALIGNMENT
3104 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3105 try_int = true;
3106 else
3107 try_int = false;
3108
3109 if (try_int)
3110 {
3111 rtx ret;
3112
3113 /* For memory to memory moves, optimal behavior can be had with the
3114 existing block move logic. */
3115 if (MEM_P (x) && MEM_P (y))
3116 {
3117 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3118 BLOCK_OP_NO_LIBCALL);
3119 return get_last_insn ();
3120 }
3121
3122 ret = emit_move_via_integer (mode, x, y, true);
3123 if (ret)
3124 return ret;
3125 }
3126
3127 return emit_move_complex_parts (x, y);
3128 }
3129
3130 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3131 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3132
3133 static rtx
3134 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3135 {
3136 rtx ret;
3137
3138 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3139 if (mode != CCmode)
3140 {
3141 enum insn_code code = optab_handler (mov_optab, CCmode);
3142 if (code != CODE_FOR_nothing)
3143 {
3144 x = emit_move_change_mode (CCmode, mode, x, true);
3145 y = emit_move_change_mode (CCmode, mode, y, true);
3146 return emit_insn (GEN_FCN (code) (x, y));
3147 }
3148 }
3149
3150 /* Otherwise, find the MODE_INT mode of the same width. */
3151 ret = emit_move_via_integer (mode, x, y, false);
3152 gcc_assert (ret != NULL);
3153 return ret;
3154 }
3155
3156 /* Return true if word I of OP lies entirely in the
3157 undefined bits of a paradoxical subreg. */
3158
3159 static bool
3160 undefined_operand_subword_p (const_rtx op, int i)
3161 {
3162 enum machine_mode innermode, innermostmode;
3163 int offset;
3164 if (GET_CODE (op) != SUBREG)
3165 return false;
3166 innermode = GET_MODE (op);
3167 innermostmode = GET_MODE (SUBREG_REG (op));
3168 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3169 /* The SUBREG_BYTE represents offset, as if the value were stored in
3170 memory, except for a paradoxical subreg where we define
3171 SUBREG_BYTE to be 0; undo this exception as in
3172 simplify_subreg. */
3173 if (SUBREG_BYTE (op) == 0
3174 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3175 {
3176 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3177 if (WORDS_BIG_ENDIAN)
3178 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3179 if (BYTES_BIG_ENDIAN)
3180 offset += difference % UNITS_PER_WORD;
3181 }
3182 if (offset >= GET_MODE_SIZE (innermostmode)
3183 || offset <= -GET_MODE_SIZE (word_mode))
3184 return true;
3185 return false;
3186 }
3187
3188 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3189 MODE is any multi-word or full-word mode that lacks a move_insn
3190 pattern. Note that you will get better code if you define such
3191 patterns, even if they must turn into multiple assembler instructions. */
3192
3193 static rtx
3194 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3195 {
3196 rtx last_insn = 0;
3197 rtx seq, inner;
3198 bool need_clobber;
3199 int i;
3200
3201 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3202
3203 /* If X is a push on the stack, do the push now and replace
3204 X with a reference to the stack pointer. */
3205 if (push_operand (x, mode))
3206 x = emit_move_resolve_push (mode, x);
3207
3208 /* If we are in reload, see if either operand is a MEM whose address
3209 is scheduled for replacement. */
3210 if (reload_in_progress && MEM_P (x)
3211 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3212 x = replace_equiv_address_nv (x, inner);
3213 if (reload_in_progress && MEM_P (y)
3214 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3215 y = replace_equiv_address_nv (y, inner);
3216
3217 start_sequence ();
3218
3219 need_clobber = false;
3220 for (i = 0;
3221 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3222 i++)
3223 {
3224 rtx xpart = operand_subword (x, i, 1, mode);
3225 rtx ypart;
3226
3227 /* Do not generate code for a move if it would come entirely
3228 from the undefined bits of a paradoxical subreg. */
3229 if (undefined_operand_subword_p (y, i))
3230 continue;
3231
3232 ypart = operand_subword (y, i, 1, mode);
3233
3234 /* If we can't get a part of Y, put Y into memory if it is a
3235 constant. Otherwise, force it into a register. Then we must
3236 be able to get a part of Y. */
3237 if (ypart == 0 && CONSTANT_P (y))
3238 {
3239 y = use_anchored_address (force_const_mem (mode, y));
3240 ypart = operand_subword (y, i, 1, mode);
3241 }
3242 else if (ypart == 0)
3243 ypart = operand_subword_force (y, i, mode);
3244
3245 gcc_assert (xpart && ypart);
3246
3247 need_clobber |= (GET_CODE (xpart) == SUBREG);
3248
3249 last_insn = emit_move_insn (xpart, ypart);
3250 }
3251
3252 seq = get_insns ();
3253 end_sequence ();
3254
3255 /* Show the output dies here. This is necessary for SUBREGs
3256 of pseudos since we cannot track their lifetimes correctly;
3257 hard regs shouldn't appear here except as return values.
3258 We never want to emit such a clobber after reload. */
3259 if (x != y
3260 && ! (reload_in_progress || reload_completed)
3261 && need_clobber != 0)
3262 emit_clobber (x);
3263
3264 emit_insn (seq);
3265
3266 return last_insn;
3267 }
3268
3269 /* Low level part of emit_move_insn.
3270 Called just like emit_move_insn, but assumes X and Y
3271 are basically valid. */
3272
3273 rtx
3274 emit_move_insn_1 (rtx x, rtx y)
3275 {
3276 enum machine_mode mode = GET_MODE (x);
3277 enum insn_code code;
3278
3279 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3280
3281 code = optab_handler (mov_optab, mode);
3282 if (code != CODE_FOR_nothing)
3283 return emit_insn (GEN_FCN (code) (x, y));
3284
3285 /* Expand complex moves by moving real part and imag part. */
3286 if (COMPLEX_MODE_P (mode))
3287 return emit_move_complex (mode, x, y);
3288
3289 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3290 || ALL_FIXED_POINT_MODE_P (mode))
3291 {
3292 rtx result = emit_move_via_integer (mode, x, y, true);
3293
3294 /* If we can't find an integer mode, use multi words. */
3295 if (result)
3296 return result;
3297 else
3298 return emit_move_multi_word (mode, x, y);
3299 }
3300
3301 if (GET_MODE_CLASS (mode) == MODE_CC)
3302 return emit_move_ccmode (mode, x, y);
3303
3304 /* Try using a move pattern for the corresponding integer mode. This is
3305 only safe when simplify_subreg can convert MODE constants into integer
3306 constants. At present, it can only do this reliably if the value
3307 fits within a HOST_WIDE_INT. */
3308 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3309 {
3310 rtx ret = emit_move_via_integer (mode, x, y, false);
3311 if (ret)
3312 return ret;
3313 }
3314
3315 return emit_move_multi_word (mode, x, y);
3316 }
3317
3318 /* Generate code to copy Y into X.
3319 Both Y and X must have the same mode, except that
3320 Y can be a constant with VOIDmode.
3321 This mode cannot be BLKmode; use emit_block_move for that.
3322
3323 Return the last instruction emitted. */
3324
3325 rtx
3326 emit_move_insn (rtx x, rtx y)
3327 {
3328 enum machine_mode mode = GET_MODE (x);
3329 rtx y_cst = NULL_RTX;
3330 rtx last_insn, set;
3331
3332 gcc_assert (mode != BLKmode
3333 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3334
3335 if (CONSTANT_P (y))
3336 {
3337 if (optimize
3338 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3339 && (last_insn = compress_float_constant (x, y)))
3340 return last_insn;
3341
3342 y_cst = y;
3343
3344 if (!targetm.legitimate_constant_p (mode, y))
3345 {
3346 y = force_const_mem (mode, y);
3347
3348 /* If the target's cannot_force_const_mem prevented the spill,
3349 assume that the target's move expanders will also take care
3350 of the non-legitimate constant. */
3351 if (!y)
3352 y = y_cst;
3353 else
3354 y = use_anchored_address (y);
3355 }
3356 }
3357
3358 /* If X or Y are memory references, verify that their addresses are valid
3359 for the machine. */
3360 if (MEM_P (x)
3361 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3362 MEM_ADDR_SPACE (x))
3363 && ! push_operand (x, GET_MODE (x))))
3364 x = validize_mem (x);
3365
3366 if (MEM_P (y)
3367 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3368 MEM_ADDR_SPACE (y)))
3369 y = validize_mem (y);
3370
3371 gcc_assert (mode != BLKmode);
3372
3373 last_insn = emit_move_insn_1 (x, y);
3374
3375 if (y_cst && REG_P (x)
3376 && (set = single_set (last_insn)) != NULL_RTX
3377 && SET_DEST (set) == x
3378 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3379 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3380
3381 return last_insn;
3382 }
3383
3384 /* If Y is representable exactly in a narrower mode, and the target can
3385 perform the extension directly from constant or memory, then emit the
3386 move as an extension. */
3387
3388 static rtx
3389 compress_float_constant (rtx x, rtx y)
3390 {
3391 enum machine_mode dstmode = GET_MODE (x);
3392 enum machine_mode orig_srcmode = GET_MODE (y);
3393 enum machine_mode srcmode;
3394 REAL_VALUE_TYPE r;
3395 int oldcost, newcost;
3396 bool speed = optimize_insn_for_speed_p ();
3397
3398 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3399
3400 if (targetm.legitimate_constant_p (dstmode, y))
3401 oldcost = set_src_cost (y, speed);
3402 else
3403 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3404
3405 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3406 srcmode != orig_srcmode;
3407 srcmode = GET_MODE_WIDER_MODE (srcmode))
3408 {
3409 enum insn_code ic;
3410 rtx trunc_y, last_insn;
3411
3412 /* Skip if the target can't extend this way. */
3413 ic = can_extend_p (dstmode, srcmode, 0);
3414 if (ic == CODE_FOR_nothing)
3415 continue;
3416
3417 /* Skip if the narrowed value isn't exact. */
3418 if (! exact_real_truncate (srcmode, &r))
3419 continue;
3420
3421 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3422
3423 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3424 {
3425 /* Skip if the target needs extra instructions to perform
3426 the extension. */
3427 if (!insn_operand_matches (ic, 1, trunc_y))
3428 continue;
3429 /* This is valid, but may not be cheaper than the original. */
3430 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3431 speed);
3432 if (oldcost < newcost)
3433 continue;
3434 }
3435 else if (float_extend_from_mem[dstmode][srcmode])
3436 {
3437 trunc_y = force_const_mem (srcmode, trunc_y);
3438 /* This is valid, but may not be cheaper than the original. */
3439 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3440 speed);
3441 if (oldcost < newcost)
3442 continue;
3443 trunc_y = validize_mem (trunc_y);
3444 }
3445 else
3446 continue;
3447
3448 /* For CSE's benefit, force the compressed constant pool entry
3449 into a new pseudo. This constant may be used in different modes,
3450 and if not, combine will put things back together for us. */
3451 trunc_y = force_reg (srcmode, trunc_y);
3452 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3453 last_insn = get_last_insn ();
3454
3455 if (REG_P (x))
3456 set_unique_reg_note (last_insn, REG_EQUAL, y);
3457
3458 return last_insn;
3459 }
3460
3461 return NULL_RTX;
3462 }
3463 \f
3464 /* Pushing data onto the stack. */
3465
3466 /* Push a block of length SIZE (perhaps variable)
3467 and return an rtx to address the beginning of the block.
3468 The value may be virtual_outgoing_args_rtx.
3469
3470 EXTRA is the number of bytes of padding to push in addition to SIZE.
3471 BELOW nonzero means this padding comes at low addresses;
3472 otherwise, the padding comes at high addresses. */
3473
3474 rtx
3475 push_block (rtx size, int extra, int below)
3476 {
3477 rtx temp;
3478
3479 size = convert_modes (Pmode, ptr_mode, size, 1);
3480 if (CONSTANT_P (size))
3481 anti_adjust_stack (plus_constant (size, extra));
3482 else if (REG_P (size) && extra == 0)
3483 anti_adjust_stack (size);
3484 else
3485 {
3486 temp = copy_to_mode_reg (Pmode, size);
3487 if (extra != 0)
3488 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3489 temp, 0, OPTAB_LIB_WIDEN);
3490 anti_adjust_stack (temp);
3491 }
3492
3493 #ifndef STACK_GROWS_DOWNWARD
3494 if (0)
3495 #else
3496 if (1)
3497 #endif
3498 {
3499 temp = virtual_outgoing_args_rtx;
3500 if (extra != 0 && below)
3501 temp = plus_constant (temp, extra);
3502 }
3503 else
3504 {
3505 if (CONST_INT_P (size))
3506 temp = plus_constant (virtual_outgoing_args_rtx,
3507 -INTVAL (size) - (below ? 0 : extra));
3508 else if (extra != 0 && !below)
3509 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3510 negate_rtx (Pmode, plus_constant (size, extra)));
3511 else
3512 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3513 negate_rtx (Pmode, size));
3514 }
3515
3516 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3517 }
3518
3519 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3520
3521 static rtx
3522 mem_autoinc_base (rtx mem)
3523 {
3524 if (MEM_P (mem))
3525 {
3526 rtx addr = XEXP (mem, 0);
3527 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3528 return XEXP (addr, 0);
3529 }
3530 return NULL;
3531 }
3532
3533 /* A utility routine used here, in reload, and in try_split. The insns
3534 after PREV up to and including LAST are known to adjust the stack,
3535 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3536 placing notes as appropriate. PREV may be NULL, indicating the
3537 entire insn sequence prior to LAST should be scanned.
3538
3539 The set of allowed stack pointer modifications is small:
3540 (1) One or more auto-inc style memory references (aka pushes),
3541 (2) One or more addition/subtraction with the SP as destination,
3542 (3) A single move insn with the SP as destination,
3543 (4) A call_pop insn.
3544
3545 Insns in the sequence that do not modify the SP are ignored.
3546
3547 The return value is the amount of adjustment that can be trivially
3548 verified, via immediate operand or auto-inc. If the adjustment
3549 cannot be trivially extracted, the return value is INT_MIN. */
3550
3551 int
3552 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3553 {
3554 int args_size = end_args_size;
3555 bool saw_unknown = false;
3556 rtx insn;
3557
3558 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3559 {
3560 rtx dest, set, pat;
3561 HOST_WIDE_INT this_delta = 0;
3562 int i;
3563
3564 if (!NONDEBUG_INSN_P (insn))
3565 continue;
3566 pat = PATTERN (insn);
3567 set = NULL;
3568
3569 /* Look for a call_pop pattern. */
3570 if (CALL_P (insn))
3571 {
3572 /* We have to allow non-call_pop patterns for the case
3573 of emit_single_push_insn of a TLS address. */
3574 if (GET_CODE (pat) != PARALLEL)
3575 continue;
3576
3577 /* All call_pop have a stack pointer adjust in the parallel.
3578 The call itself is always first, and the stack adjust is
3579 usually last, so search from the end. */
3580 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3581 {
3582 set = XVECEXP (pat, 0, i);
3583 if (GET_CODE (set) != SET)
3584 continue;
3585 dest = SET_DEST (set);
3586 if (dest == stack_pointer_rtx)
3587 break;
3588 }
3589 /* We'd better have found the stack pointer adjust. */
3590 if (i == 0)
3591 continue;
3592 /* Fall through to process the extracted SET and DEST
3593 as if it was a standalone insn. */
3594 }
3595 else if (GET_CODE (pat) == SET)
3596 set = pat;
3597 else if ((set = single_set (insn)) != NULL)
3598 ;
3599 else if (GET_CODE (pat) == PARALLEL)
3600 {
3601 /* ??? Some older ports use a parallel with a stack adjust
3602 and a store for a PUSH_ROUNDING pattern, rather than a
3603 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3604 /* ??? See h8300 and m68k, pushqi1. */
3605 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3606 {
3607 set = XVECEXP (pat, 0, i);
3608 if (GET_CODE (set) != SET)
3609 continue;
3610 dest = SET_DEST (set);
3611 if (dest == stack_pointer_rtx)
3612 break;
3613
3614 /* We do not expect an auto-inc of the sp in the parallel. */
3615 gcc_checking_assert (mem_autoinc_base (dest)
3616 != stack_pointer_rtx);
3617 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3618 != stack_pointer_rtx);
3619 }
3620 if (i < 0)
3621 continue;
3622 }
3623 else
3624 continue;
3625 dest = SET_DEST (set);
3626
3627 /* Look for direct modifications of the stack pointer. */
3628 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3629 {
3630 gcc_assert (!saw_unknown);
3631 /* Look for a trivial adjustment, otherwise assume nothing. */
3632 /* Note that the SPU restore_stack_block pattern refers to
3633 the stack pointer in V4SImode. Consider that non-trivial. */
3634 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3635 && GET_CODE (SET_SRC (set)) == PLUS
3636 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3637 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3638 this_delta = INTVAL (XEXP (SET_SRC (set), 1));
3639 /* ??? Reload can generate no-op moves, which will be cleaned
3640 up later. Recognize it and continue searching. */
3641 else if (rtx_equal_p (dest, SET_SRC (set)))
3642 this_delta = 0;
3643 else
3644 saw_unknown = true;
3645 }
3646 /* Otherwise only think about autoinc patterns. */
3647 else if (mem_autoinc_base (dest) == stack_pointer_rtx)
3648 {
3649 rtx addr = XEXP (dest, 0);
3650 gcc_assert (!saw_unknown);
3651 switch (GET_CODE (addr))
3652 {
3653 case PRE_INC:
3654 case POST_INC:
3655 this_delta = GET_MODE_SIZE (GET_MODE (dest));
3656 break;
3657 case PRE_DEC:
3658 case POST_DEC:
3659 this_delta = -GET_MODE_SIZE (GET_MODE (dest));
3660 break;
3661 case PRE_MODIFY:
3662 case POST_MODIFY:
3663 addr = XEXP (addr, 1);
3664 gcc_assert (GET_CODE (addr) == PLUS);
3665 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3666 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3667 this_delta = INTVAL (XEXP (addr, 1));
3668 break;
3669 default:
3670 gcc_unreachable ();
3671 }
3672 }
3673 else
3674 continue;
3675
3676 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3677 #ifdef STACK_GROWS_DOWNWARD
3678 this_delta = -this_delta;
3679 #endif
3680 args_size -= this_delta;
3681 }
3682
3683 return saw_unknown ? INT_MIN : args_size;
3684 }
3685
3686 #ifdef PUSH_ROUNDING
3687 /* Emit single push insn. */
3688
3689 static void
3690 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3691 {
3692 rtx dest_addr;
3693 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3694 rtx dest;
3695 enum insn_code icode;
3696
3697 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3698 /* If there is push pattern, use it. Otherwise try old way of throwing
3699 MEM representing push operation to move expander. */
3700 icode = optab_handler (push_optab, mode);
3701 if (icode != CODE_FOR_nothing)
3702 {
3703 struct expand_operand ops[1];
3704
3705 create_input_operand (&ops[0], x, mode);
3706 if (maybe_expand_insn (icode, 1, ops))
3707 return;
3708 }
3709 if (GET_MODE_SIZE (mode) == rounded_size)
3710 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3711 /* If we are to pad downward, adjust the stack pointer first and
3712 then store X into the stack location using an offset. This is
3713 because emit_move_insn does not know how to pad; it does not have
3714 access to type. */
3715 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3716 {
3717 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3718 HOST_WIDE_INT offset;
3719
3720 emit_move_insn (stack_pointer_rtx,
3721 expand_binop (Pmode,
3722 #ifdef STACK_GROWS_DOWNWARD
3723 sub_optab,
3724 #else
3725 add_optab,
3726 #endif
3727 stack_pointer_rtx,
3728 GEN_INT (rounded_size),
3729 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3730
3731 offset = (HOST_WIDE_INT) padding_size;
3732 #ifdef STACK_GROWS_DOWNWARD
3733 if (STACK_PUSH_CODE == POST_DEC)
3734 /* We have already decremented the stack pointer, so get the
3735 previous value. */
3736 offset += (HOST_WIDE_INT) rounded_size;
3737 #else
3738 if (STACK_PUSH_CODE == POST_INC)
3739 /* We have already incremented the stack pointer, so get the
3740 previous value. */
3741 offset -= (HOST_WIDE_INT) rounded_size;
3742 #endif
3743 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3744 }
3745 else
3746 {
3747 #ifdef STACK_GROWS_DOWNWARD
3748 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3749 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3750 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3751 #else
3752 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3753 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3754 GEN_INT (rounded_size));
3755 #endif
3756 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3757 }
3758
3759 dest = gen_rtx_MEM (mode, dest_addr);
3760
3761 if (type != 0)
3762 {
3763 set_mem_attributes (dest, type, 1);
3764
3765 if (flag_optimize_sibling_calls)
3766 /* Function incoming arguments may overlap with sibling call
3767 outgoing arguments and we cannot allow reordering of reads
3768 from function arguments with stores to outgoing arguments
3769 of sibling calls. */
3770 set_mem_alias_set (dest, 0);
3771 }
3772 emit_move_insn (dest, x);
3773 }
3774
3775 /* Emit and annotate a single push insn. */
3776
3777 static void
3778 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3779 {
3780 int delta, old_delta = stack_pointer_delta;
3781 rtx prev = get_last_insn ();
3782 rtx last;
3783
3784 emit_single_push_insn_1 (mode, x, type);
3785
3786 last = get_last_insn ();
3787
3788 /* Notice the common case where we emitted exactly one insn. */
3789 if (PREV_INSN (last) == prev)
3790 {
3791 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3792 return;
3793 }
3794
3795 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3796 gcc_assert (delta == INT_MIN || delta == old_delta);
3797 }
3798 #endif
3799
3800 /* Generate code to push X onto the stack, assuming it has mode MODE and
3801 type TYPE.
3802 MODE is redundant except when X is a CONST_INT (since they don't
3803 carry mode info).
3804 SIZE is an rtx for the size of data to be copied (in bytes),
3805 needed only if X is BLKmode.
3806
3807 ALIGN (in bits) is maximum alignment we can assume.
3808
3809 If PARTIAL and REG are both nonzero, then copy that many of the first
3810 bytes of X into registers starting with REG, and push the rest of X.
3811 The amount of space pushed is decreased by PARTIAL bytes.
3812 REG must be a hard register in this case.
3813 If REG is zero but PARTIAL is not, take any all others actions for an
3814 argument partially in registers, but do not actually load any
3815 registers.
3816
3817 EXTRA is the amount in bytes of extra space to leave next to this arg.
3818 This is ignored if an argument block has already been allocated.
3819
3820 On a machine that lacks real push insns, ARGS_ADDR is the address of
3821 the bottom of the argument block for this call. We use indexing off there
3822 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3823 argument block has not been preallocated.
3824
3825 ARGS_SO_FAR is the size of args previously pushed for this call.
3826
3827 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3828 for arguments passed in registers. If nonzero, it will be the number
3829 of bytes required. */
3830
3831 void
3832 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3833 unsigned int align, int partial, rtx reg, int extra,
3834 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3835 rtx alignment_pad)
3836 {
3837 rtx xinner;
3838 enum direction stack_direction
3839 #ifdef STACK_GROWS_DOWNWARD
3840 = downward;
3841 #else
3842 = upward;
3843 #endif
3844
3845 /* Decide where to pad the argument: `downward' for below,
3846 `upward' for above, or `none' for don't pad it.
3847 Default is below for small data on big-endian machines; else above. */
3848 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3849
3850 /* Invert direction if stack is post-decrement.
3851 FIXME: why? */
3852 if (STACK_PUSH_CODE == POST_DEC)
3853 if (where_pad != none)
3854 where_pad = (where_pad == downward ? upward : downward);
3855
3856 xinner = x;
3857
3858 if (mode == BLKmode
3859 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3860 {
3861 /* Copy a block into the stack, entirely or partially. */
3862
3863 rtx temp;
3864 int used;
3865 int offset;
3866 int skip;
3867
3868 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3869 used = partial - offset;
3870
3871 if (mode != BLKmode)
3872 {
3873 /* A value is to be stored in an insufficiently aligned
3874 stack slot; copy via a suitably aligned slot if
3875 necessary. */
3876 size = GEN_INT (GET_MODE_SIZE (mode));
3877 if (!MEM_P (xinner))
3878 {
3879 temp = assign_temp (type, 0, 1, 1);
3880 emit_move_insn (temp, xinner);
3881 xinner = temp;
3882 }
3883 }
3884
3885 gcc_assert (size);
3886
3887 /* USED is now the # of bytes we need not copy to the stack
3888 because registers will take care of them. */
3889
3890 if (partial != 0)
3891 xinner = adjust_address (xinner, BLKmode, used);
3892
3893 /* If the partial register-part of the arg counts in its stack size,
3894 skip the part of stack space corresponding to the registers.
3895 Otherwise, start copying to the beginning of the stack space,
3896 by setting SKIP to 0. */
3897 skip = (reg_parm_stack_space == 0) ? 0 : used;
3898
3899 #ifdef PUSH_ROUNDING
3900 /* Do it with several push insns if that doesn't take lots of insns
3901 and if there is no difficulty with push insns that skip bytes
3902 on the stack for alignment purposes. */
3903 if (args_addr == 0
3904 && PUSH_ARGS
3905 && CONST_INT_P (size)
3906 && skip == 0
3907 && MEM_ALIGN (xinner) >= align
3908 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
3909 /* Here we avoid the case of a structure whose weak alignment
3910 forces many pushes of a small amount of data,
3911 and such small pushes do rounding that causes trouble. */
3912 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
3913 || align >= BIGGEST_ALIGNMENT
3914 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
3915 == (align / BITS_PER_UNIT)))
3916 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
3917 {
3918 /* Push padding now if padding above and stack grows down,
3919 or if padding below and stack grows up.
3920 But if space already allocated, this has already been done. */
3921 if (extra && args_addr == 0
3922 && where_pad != none && where_pad != stack_direction)
3923 anti_adjust_stack (GEN_INT (extra));
3924
3925 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
3926 }
3927 else
3928 #endif /* PUSH_ROUNDING */
3929 {
3930 rtx target;
3931
3932 /* Otherwise make space on the stack and copy the data
3933 to the address of that space. */
3934
3935 /* Deduct words put into registers from the size we must copy. */
3936 if (partial != 0)
3937 {
3938 if (CONST_INT_P (size))
3939 size = GEN_INT (INTVAL (size) - used);
3940 else
3941 size = expand_binop (GET_MODE (size), sub_optab, size,
3942 GEN_INT (used), NULL_RTX, 0,
3943 OPTAB_LIB_WIDEN);
3944 }
3945
3946 /* Get the address of the stack space.
3947 In this case, we do not deal with EXTRA separately.
3948 A single stack adjust will do. */
3949 if (! args_addr)
3950 {
3951 temp = push_block (size, extra, where_pad == downward);
3952 extra = 0;
3953 }
3954 else if (CONST_INT_P (args_so_far))
3955 temp = memory_address (BLKmode,
3956 plus_constant (args_addr,
3957 skip + INTVAL (args_so_far)));
3958 else
3959 temp = memory_address (BLKmode,
3960 plus_constant (gen_rtx_PLUS (Pmode,
3961 args_addr,
3962 args_so_far),
3963 skip));
3964
3965 if (!ACCUMULATE_OUTGOING_ARGS)
3966 {
3967 /* If the source is referenced relative to the stack pointer,
3968 copy it to another register to stabilize it. We do not need
3969 to do this if we know that we won't be changing sp. */
3970
3971 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
3972 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
3973 temp = copy_to_reg (temp);
3974 }
3975
3976 target = gen_rtx_MEM (BLKmode, temp);
3977
3978 /* We do *not* set_mem_attributes here, because incoming arguments
3979 may overlap with sibling call outgoing arguments and we cannot
3980 allow reordering of reads from function arguments with stores
3981 to outgoing arguments of sibling calls. We do, however, want
3982 to record the alignment of the stack slot. */
3983 /* ALIGN may well be better aligned than TYPE, e.g. due to
3984 PARM_BOUNDARY. Assume the caller isn't lying. */
3985 set_mem_align (target, align);
3986
3987 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
3988 }
3989 }
3990 else if (partial > 0)
3991 {
3992 /* Scalar partly in registers. */
3993
3994 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
3995 int i;
3996 int not_stack;
3997 /* # bytes of start of argument
3998 that we must make space for but need not store. */
3999 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4000 int args_offset = INTVAL (args_so_far);
4001 int skip;
4002
4003 /* Push padding now if padding above and stack grows down,
4004 or if padding below and stack grows up.
4005 But if space already allocated, this has already been done. */
4006 if (extra && args_addr == 0
4007 && where_pad != none && where_pad != stack_direction)
4008 anti_adjust_stack (GEN_INT (extra));
4009
4010 /* If we make space by pushing it, we might as well push
4011 the real data. Otherwise, we can leave OFFSET nonzero
4012 and leave the space uninitialized. */
4013 if (args_addr == 0)
4014 offset = 0;
4015
4016 /* Now NOT_STACK gets the number of words that we don't need to
4017 allocate on the stack. Convert OFFSET to words too. */
4018 not_stack = (partial - offset) / UNITS_PER_WORD;
4019 offset /= UNITS_PER_WORD;
4020
4021 /* If the partial register-part of the arg counts in its stack size,
4022 skip the part of stack space corresponding to the registers.
4023 Otherwise, start copying to the beginning of the stack space,
4024 by setting SKIP to 0. */
4025 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4026
4027 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4028 x = validize_mem (force_const_mem (mode, x));
4029
4030 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4031 SUBREGs of such registers are not allowed. */
4032 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4033 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4034 x = copy_to_reg (x);
4035
4036 /* Loop over all the words allocated on the stack for this arg. */
4037 /* We can do it by words, because any scalar bigger than a word
4038 has a size a multiple of a word. */
4039 #ifndef PUSH_ARGS_REVERSED
4040 for (i = not_stack; i < size; i++)
4041 #else
4042 for (i = size - 1; i >= not_stack; i--)
4043 #endif
4044 if (i >= not_stack + offset)
4045 emit_push_insn (operand_subword_force (x, i, mode),
4046 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4047 0, args_addr,
4048 GEN_INT (args_offset + ((i - not_stack + skip)
4049 * UNITS_PER_WORD)),
4050 reg_parm_stack_space, alignment_pad);
4051 }
4052 else
4053 {
4054 rtx addr;
4055 rtx dest;
4056
4057 /* Push padding now if padding above and stack grows down,
4058 or if padding below and stack grows up.
4059 But if space already allocated, this has already been done. */
4060 if (extra && args_addr == 0
4061 && where_pad != none && where_pad != stack_direction)
4062 anti_adjust_stack (GEN_INT (extra));
4063
4064 #ifdef PUSH_ROUNDING
4065 if (args_addr == 0 && PUSH_ARGS)
4066 emit_single_push_insn (mode, x, type);
4067 else
4068 #endif
4069 {
4070 if (CONST_INT_P (args_so_far))
4071 addr
4072 = memory_address (mode,
4073 plus_constant (args_addr,
4074 INTVAL (args_so_far)));
4075 else
4076 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4077 args_so_far));
4078 dest = gen_rtx_MEM (mode, addr);
4079
4080 /* We do *not* set_mem_attributes here, because incoming arguments
4081 may overlap with sibling call outgoing arguments and we cannot
4082 allow reordering of reads from function arguments with stores
4083 to outgoing arguments of sibling calls. We do, however, want
4084 to record the alignment of the stack slot. */
4085 /* ALIGN may well be better aligned than TYPE, e.g. due to
4086 PARM_BOUNDARY. Assume the caller isn't lying. */
4087 set_mem_align (dest, align);
4088
4089 emit_move_insn (dest, x);
4090 }
4091 }
4092
4093 /* If part should go in registers, copy that part
4094 into the appropriate registers. Do this now, at the end,
4095 since mem-to-mem copies above may do function calls. */
4096 if (partial > 0 && reg != 0)
4097 {
4098 /* Handle calls that pass values in multiple non-contiguous locations.
4099 The Irix 6 ABI has examples of this. */
4100 if (GET_CODE (reg) == PARALLEL)
4101 emit_group_load (reg, x, type, -1);
4102 else
4103 {
4104 gcc_assert (partial % UNITS_PER_WORD == 0);
4105 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4106 }
4107 }
4108
4109 if (extra && args_addr == 0 && where_pad == stack_direction)
4110 anti_adjust_stack (GEN_INT (extra));
4111
4112 if (alignment_pad && args_addr == 0)
4113 anti_adjust_stack (alignment_pad);
4114 }
4115 \f
4116 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4117 operations. */
4118
4119 static rtx
4120 get_subtarget (rtx x)
4121 {
4122 return (optimize
4123 || x == 0
4124 /* Only registers can be subtargets. */
4125 || !REG_P (x)
4126 /* Don't use hard regs to avoid extending their life. */
4127 || REGNO (x) < FIRST_PSEUDO_REGISTER
4128 ? 0 : x);
4129 }
4130
4131 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4132 FIELD is a bitfield. Returns true if the optimization was successful,
4133 and there's nothing else to do. */
4134
4135 static bool
4136 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4137 unsigned HOST_WIDE_INT bitpos,
4138 unsigned HOST_WIDE_INT bitregion_start,
4139 unsigned HOST_WIDE_INT bitregion_end,
4140 enum machine_mode mode1, rtx str_rtx,
4141 tree to, tree src)
4142 {
4143 enum machine_mode str_mode = GET_MODE (str_rtx);
4144 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4145 tree op0, op1;
4146 rtx value, result;
4147 optab binop;
4148 gimple srcstmt;
4149 enum tree_code code;
4150
4151 if (mode1 != VOIDmode
4152 || bitsize >= BITS_PER_WORD
4153 || str_bitsize > BITS_PER_WORD
4154 || TREE_SIDE_EFFECTS (to)
4155 || TREE_THIS_VOLATILE (to))
4156 return false;
4157
4158 STRIP_NOPS (src);
4159 if (TREE_CODE (src) != SSA_NAME)
4160 return false;
4161 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4162 return false;
4163
4164 srcstmt = get_gimple_for_ssa_name (src);
4165 if (!srcstmt
4166 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4167 return false;
4168
4169 code = gimple_assign_rhs_code (srcstmt);
4170
4171 op0 = gimple_assign_rhs1 (srcstmt);
4172
4173 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4174 to find its initialization. Hopefully the initialization will
4175 be from a bitfield load. */
4176 if (TREE_CODE (op0) == SSA_NAME)
4177 {
4178 gimple op0stmt = get_gimple_for_ssa_name (op0);
4179
4180 /* We want to eventually have OP0 be the same as TO, which
4181 should be a bitfield. */
4182 if (!op0stmt
4183 || !is_gimple_assign (op0stmt)
4184 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4185 return false;
4186 op0 = gimple_assign_rhs1 (op0stmt);
4187 }
4188
4189 op1 = gimple_assign_rhs2 (srcstmt);
4190
4191 if (!operand_equal_p (to, op0, 0))
4192 return false;
4193
4194 if (MEM_P (str_rtx))
4195 {
4196 unsigned HOST_WIDE_INT offset1;
4197
4198 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4199 str_mode = word_mode;
4200 str_mode = get_best_mode (bitsize, bitpos,
4201 bitregion_start, bitregion_end,
4202 MEM_ALIGN (str_rtx), str_mode, 0);
4203 if (str_mode == VOIDmode)
4204 return false;
4205 str_bitsize = GET_MODE_BITSIZE (str_mode);
4206
4207 offset1 = bitpos;
4208 bitpos %= str_bitsize;
4209 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4210 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4211 }
4212 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4213 return false;
4214
4215 /* If the bit field covers the whole REG/MEM, store_field
4216 will likely generate better code. */
4217 if (bitsize >= str_bitsize)
4218 return false;
4219
4220 /* We can't handle fields split across multiple entities. */
4221 if (bitpos + bitsize > str_bitsize)
4222 return false;
4223
4224 if (BYTES_BIG_ENDIAN)
4225 bitpos = str_bitsize - bitpos - bitsize;
4226
4227 switch (code)
4228 {
4229 case PLUS_EXPR:
4230 case MINUS_EXPR:
4231 /* For now, just optimize the case of the topmost bitfield
4232 where we don't need to do any masking and also
4233 1 bit bitfields where xor can be used.
4234 We might win by one instruction for the other bitfields
4235 too if insv/extv instructions aren't used, so that
4236 can be added later. */
4237 if (bitpos + bitsize != str_bitsize
4238 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4239 break;
4240
4241 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4242 value = convert_modes (str_mode,
4243 TYPE_MODE (TREE_TYPE (op1)), value,
4244 TYPE_UNSIGNED (TREE_TYPE (op1)));
4245
4246 /* We may be accessing data outside the field, which means
4247 we can alias adjacent data. */
4248 if (MEM_P (str_rtx))
4249 {
4250 str_rtx = shallow_copy_rtx (str_rtx);
4251 set_mem_alias_set (str_rtx, 0);
4252 set_mem_expr (str_rtx, 0);
4253 }
4254
4255 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4256 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4257 {
4258 value = expand_and (str_mode, value, const1_rtx, NULL);
4259 binop = xor_optab;
4260 }
4261 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4262 bitpos, NULL_RTX, 1);
4263 result = expand_binop (str_mode, binop, str_rtx,
4264 value, str_rtx, 1, OPTAB_WIDEN);
4265 if (result != str_rtx)
4266 emit_move_insn (str_rtx, result);
4267 return true;
4268
4269 case BIT_IOR_EXPR:
4270 case BIT_XOR_EXPR:
4271 if (TREE_CODE (op1) != INTEGER_CST)
4272 break;
4273 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4274 value = convert_modes (GET_MODE (str_rtx),
4275 TYPE_MODE (TREE_TYPE (op1)), value,
4276 TYPE_UNSIGNED (TREE_TYPE (op1)));
4277
4278 /* We may be accessing data outside the field, which means
4279 we can alias adjacent data. */
4280 if (MEM_P (str_rtx))
4281 {
4282 str_rtx = shallow_copy_rtx (str_rtx);
4283 set_mem_alias_set (str_rtx, 0);
4284 set_mem_expr (str_rtx, 0);
4285 }
4286
4287 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4288 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4289 {
4290 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4291 - 1);
4292 value = expand_and (GET_MODE (str_rtx), value, mask,
4293 NULL_RTX);
4294 }
4295 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4296 bitpos, NULL_RTX, 1);
4297 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4298 value, str_rtx, 1, OPTAB_WIDEN);
4299 if (result != str_rtx)
4300 emit_move_insn (str_rtx, result);
4301 return true;
4302
4303 default:
4304 break;
4305 }
4306
4307 return false;
4308 }
4309
4310 /* In the C++ memory model, consecutive bit fields in a structure are
4311 considered one memory location.
4312
4313 Given a COMPONENT_REF, this function returns the bit range of
4314 consecutive bits in which this COMPONENT_REF belongs in. The
4315 values are returned in *BITSTART and *BITEND. If either the C++
4316 memory model is not activated, or this memory access is not thread
4317 visible, 0 is returned in *BITSTART and *BITEND.
4318
4319 EXP is the COMPONENT_REF.
4320 INNERDECL is the actual object being referenced.
4321 BITPOS is the position in bits where the bit starts within the structure.
4322 BITSIZE is size in bits of the field being referenced in EXP.
4323
4324 For example, while storing into FOO.A here...
4325
4326 struct {
4327 BIT 0:
4328 unsigned int a : 4;
4329 unsigned int b : 1;
4330 BIT 8:
4331 unsigned char c;
4332 unsigned int d : 6;
4333 } foo;
4334
4335 ...we are not allowed to store past <b>, so for the layout above, a
4336 range of 0..7 (because no one cares if we store into the
4337 padding). */
4338
4339 static void
4340 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4341 unsigned HOST_WIDE_INT *bitend,
4342 tree exp, tree innerdecl,
4343 HOST_WIDE_INT bitpos, HOST_WIDE_INT bitsize)
4344 {
4345 tree field, record_type, fld;
4346 bool found_field = false;
4347 bool prev_field_is_bitfield;
4348
4349 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4350
4351 /* If other threads can't see this value, no need to restrict stores. */
4352 if (ALLOW_STORE_DATA_RACES
4353 || ((TREE_CODE (innerdecl) == MEM_REF
4354 || TREE_CODE (innerdecl) == TARGET_MEM_REF)
4355 && !ptr_deref_may_alias_global_p (TREE_OPERAND (innerdecl, 0)))
4356 || (DECL_P (innerdecl)
4357 && (DECL_THREAD_LOCAL_P (innerdecl)
4358 || !TREE_STATIC (innerdecl))))
4359 {
4360 *bitstart = *bitend = 0;
4361 return;
4362 }
4363
4364 /* Bit field we're storing into. */
4365 field = TREE_OPERAND (exp, 1);
4366 record_type = DECL_FIELD_CONTEXT (field);
4367
4368 /* Count the contiguous bitfields for the memory location that
4369 contains FIELD. */
4370 *bitstart = 0;
4371 prev_field_is_bitfield = true;
4372 for (fld = TYPE_FIELDS (record_type); fld; fld = DECL_CHAIN (fld))
4373 {
4374 tree t, offset;
4375 enum machine_mode mode;
4376 int unsignedp, volatilep;
4377
4378 if (TREE_CODE (fld) != FIELD_DECL)
4379 continue;
4380
4381 t = build3 (COMPONENT_REF, TREE_TYPE (exp),
4382 unshare_expr (TREE_OPERAND (exp, 0)),
4383 fld, NULL_TREE);
4384 get_inner_reference (t, &bitsize, &bitpos, &offset,
4385 &mode, &unsignedp, &volatilep, true);
4386
4387 if (field == fld)
4388 found_field = true;
4389
4390 if (DECL_BIT_FIELD_TYPE (fld) && bitsize > 0)
4391 {
4392 if (prev_field_is_bitfield == false)
4393 {
4394 *bitstart = bitpos;
4395 prev_field_is_bitfield = true;
4396 }
4397 }
4398 else
4399 {
4400 prev_field_is_bitfield = false;
4401 if (found_field)
4402 break;
4403 }
4404 }
4405 gcc_assert (found_field);
4406
4407 if (fld)
4408 {
4409 /* We found the end of the bit field sequence. Include the
4410 padding up to the next field and be done. */
4411 *bitend = bitpos - 1;
4412 }
4413 else
4414 {
4415 /* If this is the last element in the structure, include the padding
4416 at the end of structure. */
4417 *bitend = TREE_INT_CST_LOW (TYPE_SIZE (record_type)) - 1;
4418 }
4419 }
4420
4421 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4422 is true, try generating a nontemporal store. */
4423
4424 void
4425 expand_assignment (tree to, tree from, bool nontemporal)
4426 {
4427 rtx to_rtx = 0;
4428 rtx result;
4429 enum machine_mode mode;
4430 int align;
4431 enum insn_code icode;
4432
4433 /* Don't crash if the lhs of the assignment was erroneous. */
4434 if (TREE_CODE (to) == ERROR_MARK)
4435 {
4436 expand_normal (from);
4437 return;
4438 }
4439
4440 /* Optimize away no-op moves without side-effects. */
4441 if (operand_equal_p (to, from, 0))
4442 return;
4443
4444 mode = TYPE_MODE (TREE_TYPE (to));
4445 if ((TREE_CODE (to) == MEM_REF
4446 || TREE_CODE (to) == TARGET_MEM_REF)
4447 && mode != BLKmode
4448 && ((align = MAX (TYPE_ALIGN (TREE_TYPE (to)), get_object_alignment (to)))
4449 < (signed) GET_MODE_ALIGNMENT (mode))
4450 && ((icode = optab_handler (movmisalign_optab, mode))
4451 != CODE_FOR_nothing))
4452 {
4453 struct expand_operand ops[2];
4454 enum machine_mode address_mode;
4455 rtx reg, op0, mem;
4456
4457 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4458 reg = force_not_mem (reg);
4459
4460 if (TREE_CODE (to) == MEM_REF)
4461 {
4462 addr_space_t as
4463 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (to, 1))));
4464 tree base = TREE_OPERAND (to, 0);
4465 address_mode = targetm.addr_space.address_mode (as);
4466 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4467 op0 = convert_memory_address_addr_space (address_mode, op0, as);
4468 if (!integer_zerop (TREE_OPERAND (to, 1)))
4469 {
4470 rtx off
4471 = immed_double_int_const (mem_ref_offset (to), address_mode);
4472 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
4473 }
4474 op0 = memory_address_addr_space (mode, op0, as);
4475 mem = gen_rtx_MEM (mode, op0);
4476 set_mem_attributes (mem, to, 0);
4477 set_mem_addr_space (mem, as);
4478 }
4479 else if (TREE_CODE (to) == TARGET_MEM_REF)
4480 {
4481 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (to));
4482 struct mem_address addr;
4483
4484 get_address_description (to, &addr);
4485 op0 = addr_for_mem_ref (&addr, as, true);
4486 op0 = memory_address_addr_space (mode, op0, as);
4487 mem = gen_rtx_MEM (mode, op0);
4488 set_mem_attributes (mem, to, 0);
4489 set_mem_addr_space (mem, as);
4490 }
4491 else
4492 gcc_unreachable ();
4493 if (TREE_THIS_VOLATILE (to))
4494 MEM_VOLATILE_P (mem) = 1;
4495
4496 create_fixed_operand (&ops[0], mem);
4497 create_input_operand (&ops[1], reg, mode);
4498 /* The movmisalign<mode> pattern cannot fail, else the assignment would
4499 silently be omitted. */
4500 expand_insn (icode, 2, ops);
4501 return;
4502 }
4503
4504 /* Assignment of a structure component needs special treatment
4505 if the structure component's rtx is not simply a MEM.
4506 Assignment of an array element at a constant index, and assignment of
4507 an array element in an unaligned packed structure field, has the same
4508 problem. */
4509 if (handled_component_p (to)
4510 /* ??? We only need to handle MEM_REF here if the access is not
4511 a full access of the base object. */
4512 || (TREE_CODE (to) == MEM_REF
4513 && TREE_CODE (TREE_OPERAND (to, 0)) == ADDR_EXPR)
4514 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4515 {
4516 enum machine_mode mode1;
4517 HOST_WIDE_INT bitsize, bitpos;
4518 unsigned HOST_WIDE_INT bitregion_start = 0;
4519 unsigned HOST_WIDE_INT bitregion_end = 0;
4520 tree offset;
4521 int unsignedp;
4522 int volatilep = 0;
4523 tree tem;
4524
4525 push_temp_slots ();
4526 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4527 &unsignedp, &volatilep, true);
4528
4529 if (TREE_CODE (to) == COMPONENT_REF
4530 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4531 get_bit_range (&bitregion_start, &bitregion_end,
4532 to, tem, bitpos, bitsize);
4533
4534 /* If we are going to use store_bit_field and extract_bit_field,
4535 make sure to_rtx will be safe for multiple use. */
4536
4537 to_rtx = expand_normal (tem);
4538
4539 /* If the bitfield is volatile, we want to access it in the
4540 field's mode, not the computed mode.
4541 If a MEM has VOIDmode (external with incomplete type),
4542 use BLKmode for it instead. */
4543 if (MEM_P (to_rtx))
4544 {
4545 if (volatilep && flag_strict_volatile_bitfields > 0)
4546 to_rtx = adjust_address (to_rtx, mode1, 0);
4547 else if (GET_MODE (to_rtx) == VOIDmode)
4548 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4549 }
4550
4551 if (offset != 0)
4552 {
4553 enum machine_mode address_mode;
4554 rtx offset_rtx;
4555
4556 if (!MEM_P (to_rtx))
4557 {
4558 /* We can get constant negative offsets into arrays with broken
4559 user code. Translate this to a trap instead of ICEing. */
4560 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4561 expand_builtin_trap ();
4562 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4563 }
4564
4565 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4566 address_mode
4567 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4568 if (GET_MODE (offset_rtx) != address_mode)
4569 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4570
4571 /* A constant address in TO_RTX can have VOIDmode, we must not try
4572 to call force_reg for that case. Avoid that case. */
4573 if (MEM_P (to_rtx)
4574 && GET_MODE (to_rtx) == BLKmode
4575 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4576 && bitsize > 0
4577 && (bitpos % bitsize) == 0
4578 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4579 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4580 {
4581 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4582 bitpos = 0;
4583 }
4584
4585 to_rtx = offset_address (to_rtx, offset_rtx,
4586 highest_pow2_factor_for_target (to,
4587 offset));
4588 }
4589
4590 /* No action is needed if the target is not a memory and the field
4591 lies completely outside that target. This can occur if the source
4592 code contains an out-of-bounds access to a small array. */
4593 if (!MEM_P (to_rtx)
4594 && GET_MODE (to_rtx) != BLKmode
4595 && (unsigned HOST_WIDE_INT) bitpos
4596 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4597 {
4598 expand_normal (from);
4599 result = NULL;
4600 }
4601 /* Handle expand_expr of a complex value returning a CONCAT. */
4602 else if (GET_CODE (to_rtx) == CONCAT)
4603 {
4604 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4605 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4606 && bitpos == 0
4607 && bitsize == mode_bitsize)
4608 result = store_expr (from, to_rtx, false, nontemporal);
4609 else if (bitsize == mode_bitsize / 2
4610 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4611 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4612 nontemporal);
4613 else if (bitpos + bitsize <= mode_bitsize / 2)
4614 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4615 bitregion_start, bitregion_end,
4616 mode1, from, TREE_TYPE (tem),
4617 get_alias_set (to), nontemporal);
4618 else if (bitpos >= mode_bitsize / 2)
4619 result = store_field (XEXP (to_rtx, 1), bitsize,
4620 bitpos - mode_bitsize / 2,
4621 bitregion_start, bitregion_end,
4622 mode1, from,
4623 TREE_TYPE (tem), get_alias_set (to),
4624 nontemporal);
4625 else if (bitpos == 0 && bitsize == mode_bitsize)
4626 {
4627 rtx from_rtx;
4628 result = expand_normal (from);
4629 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4630 TYPE_MODE (TREE_TYPE (from)), 0);
4631 emit_move_insn (XEXP (to_rtx, 0),
4632 read_complex_part (from_rtx, false));
4633 emit_move_insn (XEXP (to_rtx, 1),
4634 read_complex_part (from_rtx, true));
4635 }
4636 else
4637 {
4638 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4639 GET_MODE_SIZE (GET_MODE (to_rtx)),
4640 0);
4641 write_complex_part (temp, XEXP (to_rtx, 0), false);
4642 write_complex_part (temp, XEXP (to_rtx, 1), true);
4643 result = store_field (temp, bitsize, bitpos,
4644 bitregion_start, bitregion_end,
4645 mode1, from,
4646 TREE_TYPE (tem), get_alias_set (to),
4647 nontemporal);
4648 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4649 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4650 }
4651 }
4652 else
4653 {
4654 if (MEM_P (to_rtx))
4655 {
4656 /* If the field is at offset zero, we could have been given the
4657 DECL_RTX of the parent struct. Don't munge it. */
4658 to_rtx = shallow_copy_rtx (to_rtx);
4659
4660 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4661
4662 /* Deal with volatile and readonly fields. The former is only
4663 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4664 if (volatilep)
4665 MEM_VOLATILE_P (to_rtx) = 1;
4666 if (component_uses_parent_alias_set (to))
4667 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4668 }
4669
4670 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4671 bitregion_start, bitregion_end,
4672 mode1,
4673 to_rtx, to, from))
4674 result = NULL;
4675 else
4676 result = store_field (to_rtx, bitsize, bitpos,
4677 bitregion_start, bitregion_end,
4678 mode1, from,
4679 TREE_TYPE (tem), get_alias_set (to),
4680 nontemporal);
4681 }
4682
4683 if (result)
4684 preserve_temp_slots (result);
4685 free_temp_slots ();
4686 pop_temp_slots ();
4687 return;
4688 }
4689
4690 /* If the rhs is a function call and its value is not an aggregate,
4691 call the function before we start to compute the lhs.
4692 This is needed for correct code for cases such as
4693 val = setjmp (buf) on machines where reference to val
4694 requires loading up part of an address in a separate insn.
4695
4696 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4697 since it might be a promoted variable where the zero- or sign- extension
4698 needs to be done. Handling this in the normal way is safe because no
4699 computation is done before the call. The same is true for SSA names. */
4700 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4701 && COMPLETE_TYPE_P (TREE_TYPE (from))
4702 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4703 && ! (((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
4704 && REG_P (DECL_RTL (to)))
4705 || TREE_CODE (to) == SSA_NAME))
4706 {
4707 rtx value;
4708
4709 push_temp_slots ();
4710 value = expand_normal (from);
4711 if (to_rtx == 0)
4712 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4713
4714 /* Handle calls that return values in multiple non-contiguous locations.
4715 The Irix 6 ABI has examples of this. */
4716 if (GET_CODE (to_rtx) == PARALLEL)
4717 emit_group_load (to_rtx, value, TREE_TYPE (from),
4718 int_size_in_bytes (TREE_TYPE (from)));
4719 else if (GET_MODE (to_rtx) == BLKmode)
4720 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4721 else
4722 {
4723 if (POINTER_TYPE_P (TREE_TYPE (to)))
4724 value = convert_memory_address_addr_space
4725 (GET_MODE (to_rtx), value,
4726 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4727
4728 emit_move_insn (to_rtx, value);
4729 }
4730 preserve_temp_slots (to_rtx);
4731 free_temp_slots ();
4732 pop_temp_slots ();
4733 return;
4734 }
4735
4736 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
4737 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
4738
4739 if (to_rtx == 0)
4740 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4741
4742 /* Don't move directly into a return register. */
4743 if (TREE_CODE (to) == RESULT_DECL
4744 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4745 {
4746 rtx temp;
4747
4748 push_temp_slots ();
4749 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4750
4751 if (GET_CODE (to_rtx) == PARALLEL)
4752 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4753 int_size_in_bytes (TREE_TYPE (from)));
4754 else
4755 emit_move_insn (to_rtx, temp);
4756
4757 preserve_temp_slots (to_rtx);
4758 free_temp_slots ();
4759 pop_temp_slots ();
4760 return;
4761 }
4762
4763 /* In case we are returning the contents of an object which overlaps
4764 the place the value is being stored, use a safe function when copying
4765 a value through a pointer into a structure value return block. */
4766 if (TREE_CODE (to) == RESULT_DECL
4767 && TREE_CODE (from) == INDIRECT_REF
4768 && ADDR_SPACE_GENERIC_P
4769 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4770 && refs_may_alias_p (to, from)
4771 && cfun->returns_struct
4772 && !cfun->returns_pcc_struct)
4773 {
4774 rtx from_rtx, size;
4775
4776 push_temp_slots ();
4777 size = expr_size (from);
4778 from_rtx = expand_normal (from);
4779
4780 emit_library_call (memmove_libfunc, LCT_NORMAL,
4781 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4782 XEXP (from_rtx, 0), Pmode,
4783 convert_to_mode (TYPE_MODE (sizetype),
4784 size, TYPE_UNSIGNED (sizetype)),
4785 TYPE_MODE (sizetype));
4786
4787 preserve_temp_slots (to_rtx);
4788 free_temp_slots ();
4789 pop_temp_slots ();
4790 return;
4791 }
4792
4793 /* Compute FROM and store the value in the rtx we got. */
4794
4795 push_temp_slots ();
4796 result = store_expr (from, to_rtx, 0, nontemporal);
4797 preserve_temp_slots (result);
4798 free_temp_slots ();
4799 pop_temp_slots ();
4800 return;
4801 }
4802
4803 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4804 succeeded, false otherwise. */
4805
4806 bool
4807 emit_storent_insn (rtx to, rtx from)
4808 {
4809 struct expand_operand ops[2];
4810 enum machine_mode mode = GET_MODE (to);
4811 enum insn_code code = optab_handler (storent_optab, mode);
4812
4813 if (code == CODE_FOR_nothing)
4814 return false;
4815
4816 create_fixed_operand (&ops[0], to);
4817 create_input_operand (&ops[1], from, mode);
4818 return maybe_expand_insn (code, 2, ops);
4819 }
4820
4821 /* Generate code for computing expression EXP,
4822 and storing the value into TARGET.
4823
4824 If the mode is BLKmode then we may return TARGET itself.
4825 It turns out that in BLKmode it doesn't cause a problem.
4826 because C has no operators that could combine two different
4827 assignments into the same BLKmode object with different values
4828 with no sequence point. Will other languages need this to
4829 be more thorough?
4830
4831 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4832 stack, and block moves may need to be treated specially.
4833
4834 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4835
4836 rtx
4837 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4838 {
4839 rtx temp;
4840 rtx alt_rtl = NULL_RTX;
4841 location_t loc = EXPR_LOCATION (exp);
4842
4843 if (VOID_TYPE_P (TREE_TYPE (exp)))
4844 {
4845 /* C++ can generate ?: expressions with a throw expression in one
4846 branch and an rvalue in the other. Here, we resolve attempts to
4847 store the throw expression's nonexistent result. */
4848 gcc_assert (!call_param_p);
4849 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4850 return NULL_RTX;
4851 }
4852 if (TREE_CODE (exp) == COMPOUND_EXPR)
4853 {
4854 /* Perform first part of compound expression, then assign from second
4855 part. */
4856 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4857 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4858 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4859 nontemporal);
4860 }
4861 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4862 {
4863 /* For conditional expression, get safe form of the target. Then
4864 test the condition, doing the appropriate assignment on either
4865 side. This avoids the creation of unnecessary temporaries.
4866 For non-BLKmode, it is more efficient not to do this. */
4867
4868 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
4869
4870 do_pending_stack_adjust ();
4871 NO_DEFER_POP;
4872 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
4873 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4874 nontemporal);
4875 emit_jump_insn (gen_jump (lab2));
4876 emit_barrier ();
4877 emit_label (lab1);
4878 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
4879 nontemporal);
4880 emit_label (lab2);
4881 OK_DEFER_POP;
4882
4883 return NULL_RTX;
4884 }
4885 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
4886 /* If this is a scalar in a register that is stored in a wider mode
4887 than the declared mode, compute the result into its declared mode
4888 and then convert to the wider mode. Our value is the computed
4889 expression. */
4890 {
4891 rtx inner_target = 0;
4892
4893 /* We can do the conversion inside EXP, which will often result
4894 in some optimizations. Do the conversion in two steps: first
4895 change the signedness, if needed, then the extend. But don't
4896 do this if the type of EXP is a subtype of something else
4897 since then the conversion might involve more than just
4898 converting modes. */
4899 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
4900 && TREE_TYPE (TREE_TYPE (exp)) == 0
4901 && GET_MODE_PRECISION (GET_MODE (target))
4902 == TYPE_PRECISION (TREE_TYPE (exp)))
4903 {
4904 if (TYPE_UNSIGNED (TREE_TYPE (exp))
4905 != SUBREG_PROMOTED_UNSIGNED_P (target))
4906 {
4907 /* Some types, e.g. Fortran's logical*4, won't have a signed
4908 version, so use the mode instead. */
4909 tree ntype
4910 = (signed_or_unsigned_type_for
4911 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
4912 if (ntype == NULL)
4913 ntype = lang_hooks.types.type_for_mode
4914 (TYPE_MODE (TREE_TYPE (exp)),
4915 SUBREG_PROMOTED_UNSIGNED_P (target));
4916
4917 exp = fold_convert_loc (loc, ntype, exp);
4918 }
4919
4920 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
4921 (GET_MODE (SUBREG_REG (target)),
4922 SUBREG_PROMOTED_UNSIGNED_P (target)),
4923 exp);
4924
4925 inner_target = SUBREG_REG (target);
4926 }
4927
4928 temp = expand_expr (exp, inner_target, VOIDmode,
4929 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4930
4931 /* If TEMP is a VOIDmode constant, use convert_modes to make
4932 sure that we properly convert it. */
4933 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
4934 {
4935 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4936 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
4937 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
4938 GET_MODE (target), temp,
4939 SUBREG_PROMOTED_UNSIGNED_P (target));
4940 }
4941
4942 convert_move (SUBREG_REG (target), temp,
4943 SUBREG_PROMOTED_UNSIGNED_P (target));
4944
4945 return NULL_RTX;
4946 }
4947 else if ((TREE_CODE (exp) == STRING_CST
4948 || (TREE_CODE (exp) == MEM_REF
4949 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
4950 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
4951 == STRING_CST
4952 && integer_zerop (TREE_OPERAND (exp, 1))))
4953 && !nontemporal && !call_param_p
4954 && MEM_P (target))
4955 {
4956 /* Optimize initialization of an array with a STRING_CST. */
4957 HOST_WIDE_INT exp_len, str_copy_len;
4958 rtx dest_mem;
4959 tree str = TREE_CODE (exp) == STRING_CST
4960 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
4961
4962 exp_len = int_expr_size (exp);
4963 if (exp_len <= 0)
4964 goto normal_expr;
4965
4966 if (TREE_STRING_LENGTH (str) <= 0)
4967 goto normal_expr;
4968
4969 str_copy_len = strlen (TREE_STRING_POINTER (str));
4970 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
4971 goto normal_expr;
4972
4973 str_copy_len = TREE_STRING_LENGTH (str);
4974 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
4975 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
4976 {
4977 str_copy_len += STORE_MAX_PIECES - 1;
4978 str_copy_len &= ~(STORE_MAX_PIECES - 1);
4979 }
4980 str_copy_len = MIN (str_copy_len, exp_len);
4981 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
4982 CONST_CAST (char *, TREE_STRING_POINTER (str)),
4983 MEM_ALIGN (target), false))
4984 goto normal_expr;
4985
4986 dest_mem = target;
4987
4988 dest_mem = store_by_pieces (dest_mem,
4989 str_copy_len, builtin_strncpy_read_str,
4990 CONST_CAST (char *,
4991 TREE_STRING_POINTER (str)),
4992 MEM_ALIGN (target), false,
4993 exp_len > str_copy_len ? 1 : 0);
4994 if (exp_len > str_copy_len)
4995 clear_storage (adjust_address (dest_mem, BLKmode, 0),
4996 GEN_INT (exp_len - str_copy_len),
4997 BLOCK_OP_NORMAL);
4998 return NULL_RTX;
4999 }
5000 else
5001 {
5002 rtx tmp_target;
5003
5004 normal_expr:
5005 /* If we want to use a nontemporal store, force the value to
5006 register first. */
5007 tmp_target = nontemporal ? NULL_RTX : target;
5008 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5009 (call_param_p
5010 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5011 &alt_rtl);
5012 }
5013
5014 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5015 the same as that of TARGET, adjust the constant. This is needed, for
5016 example, in case it is a CONST_DOUBLE and we want only a word-sized
5017 value. */
5018 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5019 && TREE_CODE (exp) != ERROR_MARK
5020 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5021 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5022 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5023
5024 /* If value was not generated in the target, store it there.
5025 Convert the value to TARGET's type first if necessary and emit the
5026 pending incrementations that have been queued when expanding EXP.
5027 Note that we cannot emit the whole queue blindly because this will
5028 effectively disable the POST_INC optimization later.
5029
5030 If TEMP and TARGET compare equal according to rtx_equal_p, but
5031 one or both of them are volatile memory refs, we have to distinguish
5032 two cases:
5033 - expand_expr has used TARGET. In this case, we must not generate
5034 another copy. This can be detected by TARGET being equal according
5035 to == .
5036 - expand_expr has not used TARGET - that means that the source just
5037 happens to have the same RTX form. Since temp will have been created
5038 by expand_expr, it will compare unequal according to == .
5039 We must generate a copy in this case, to reach the correct number
5040 of volatile memory references. */
5041
5042 if ((! rtx_equal_p (temp, target)
5043 || (temp != target && (side_effects_p (temp)
5044 || side_effects_p (target))))
5045 && TREE_CODE (exp) != ERROR_MARK
5046 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5047 but TARGET is not valid memory reference, TEMP will differ
5048 from TARGET although it is really the same location. */
5049 && !(alt_rtl
5050 && rtx_equal_p (alt_rtl, target)
5051 && !side_effects_p (alt_rtl)
5052 && !side_effects_p (target))
5053 /* If there's nothing to copy, don't bother. Don't call
5054 expr_size unless necessary, because some front-ends (C++)
5055 expr_size-hook must not be given objects that are not
5056 supposed to be bit-copied or bit-initialized. */
5057 && expr_size (exp) != const0_rtx)
5058 {
5059 if (GET_MODE (temp) != GET_MODE (target)
5060 && GET_MODE (temp) != VOIDmode)
5061 {
5062 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5063 if (GET_MODE (target) == BLKmode
5064 && GET_MODE (temp) == BLKmode)
5065 emit_block_move (target, temp, expr_size (exp),
5066 (call_param_p
5067 ? BLOCK_OP_CALL_PARM
5068 : BLOCK_OP_NORMAL));
5069 else if (GET_MODE (target) == BLKmode)
5070 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5071 0, 0, 0, GET_MODE (temp), temp);
5072 else
5073 convert_move (target, temp, unsignedp);
5074 }
5075
5076 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5077 {
5078 /* Handle copying a string constant into an array. The string
5079 constant may be shorter than the array. So copy just the string's
5080 actual length, and clear the rest. First get the size of the data
5081 type of the string, which is actually the size of the target. */
5082 rtx size = expr_size (exp);
5083
5084 if (CONST_INT_P (size)
5085 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5086 emit_block_move (target, temp, size,
5087 (call_param_p
5088 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5089 else
5090 {
5091 enum machine_mode pointer_mode
5092 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5093 enum machine_mode address_mode
5094 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
5095
5096 /* Compute the size of the data to copy from the string. */
5097 tree copy_size
5098 = size_binop_loc (loc, MIN_EXPR,
5099 make_tree (sizetype, size),
5100 size_int (TREE_STRING_LENGTH (exp)));
5101 rtx copy_size_rtx
5102 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5103 (call_param_p
5104 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5105 rtx label = 0;
5106
5107 /* Copy that much. */
5108 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5109 TYPE_UNSIGNED (sizetype));
5110 emit_block_move (target, temp, copy_size_rtx,
5111 (call_param_p
5112 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5113
5114 /* Figure out how much is left in TARGET that we have to clear.
5115 Do all calculations in pointer_mode. */
5116 if (CONST_INT_P (copy_size_rtx))
5117 {
5118 size = plus_constant (size, -INTVAL (copy_size_rtx));
5119 target = adjust_address (target, BLKmode,
5120 INTVAL (copy_size_rtx));
5121 }
5122 else
5123 {
5124 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5125 copy_size_rtx, NULL_RTX, 0,
5126 OPTAB_LIB_WIDEN);
5127
5128 if (GET_MODE (copy_size_rtx) != address_mode)
5129 copy_size_rtx = convert_to_mode (address_mode,
5130 copy_size_rtx,
5131 TYPE_UNSIGNED (sizetype));
5132
5133 target = offset_address (target, copy_size_rtx,
5134 highest_pow2_factor (copy_size));
5135 label = gen_label_rtx ();
5136 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5137 GET_MODE (size), 0, label);
5138 }
5139
5140 if (size != const0_rtx)
5141 clear_storage (target, size, BLOCK_OP_NORMAL);
5142
5143 if (label)
5144 emit_label (label);
5145 }
5146 }
5147 /* Handle calls that return values in multiple non-contiguous locations.
5148 The Irix 6 ABI has examples of this. */
5149 else if (GET_CODE (target) == PARALLEL)
5150 emit_group_load (target, temp, TREE_TYPE (exp),
5151 int_size_in_bytes (TREE_TYPE (exp)));
5152 else if (GET_MODE (temp) == BLKmode)
5153 emit_block_move (target, temp, expr_size (exp),
5154 (call_param_p
5155 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5156 else if (nontemporal
5157 && emit_storent_insn (target, temp))
5158 /* If we managed to emit a nontemporal store, there is nothing else to
5159 do. */
5160 ;
5161 else
5162 {
5163 temp = force_operand (temp, target);
5164 if (temp != target)
5165 emit_move_insn (target, temp);
5166 }
5167 }
5168
5169 return NULL_RTX;
5170 }
5171 \f
5172 /* Return true if field F of structure TYPE is a flexible array. */
5173
5174 static bool
5175 flexible_array_member_p (const_tree f, const_tree type)
5176 {
5177 const_tree tf;
5178
5179 tf = TREE_TYPE (f);
5180 return (DECL_CHAIN (f) == NULL
5181 && TREE_CODE (tf) == ARRAY_TYPE
5182 && TYPE_DOMAIN (tf)
5183 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5184 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5185 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5186 && int_size_in_bytes (type) >= 0);
5187 }
5188
5189 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5190 must have in order for it to completely initialize a value of type TYPE.
5191 Return -1 if the number isn't known.
5192
5193 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5194
5195 static HOST_WIDE_INT
5196 count_type_elements (const_tree type, bool for_ctor_p)
5197 {
5198 switch (TREE_CODE (type))
5199 {
5200 case ARRAY_TYPE:
5201 {
5202 tree nelts;
5203
5204 nelts = array_type_nelts (type);
5205 if (nelts && host_integerp (nelts, 1))
5206 {
5207 unsigned HOST_WIDE_INT n;
5208
5209 n = tree_low_cst (nelts, 1) + 1;
5210 if (n == 0 || for_ctor_p)
5211 return n;
5212 else
5213 return n * count_type_elements (TREE_TYPE (type), false);
5214 }
5215 return for_ctor_p ? -1 : 1;
5216 }
5217
5218 case RECORD_TYPE:
5219 {
5220 unsigned HOST_WIDE_INT n;
5221 tree f;
5222
5223 n = 0;
5224 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5225 if (TREE_CODE (f) == FIELD_DECL)
5226 {
5227 if (!for_ctor_p)
5228 n += count_type_elements (TREE_TYPE (f), false);
5229 else if (!flexible_array_member_p (f, type))
5230 /* Don't count flexible arrays, which are not supposed
5231 to be initialized. */
5232 n += 1;
5233 }
5234
5235 return n;
5236 }
5237
5238 case UNION_TYPE:
5239 case QUAL_UNION_TYPE:
5240 {
5241 tree f;
5242 HOST_WIDE_INT n, m;
5243
5244 gcc_assert (!for_ctor_p);
5245 /* Estimate the number of scalars in each field and pick the
5246 maximum. Other estimates would do instead; the idea is simply
5247 to make sure that the estimate is not sensitive to the ordering
5248 of the fields. */
5249 n = 1;
5250 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5251 if (TREE_CODE (f) == FIELD_DECL)
5252 {
5253 m = count_type_elements (TREE_TYPE (f), false);
5254 /* If the field doesn't span the whole union, add an extra
5255 scalar for the rest. */
5256 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5257 TYPE_SIZE (type)) != 1)
5258 m++;
5259 if (n < m)
5260 n = m;
5261 }
5262 return n;
5263 }
5264
5265 case COMPLEX_TYPE:
5266 return 2;
5267
5268 case VECTOR_TYPE:
5269 return TYPE_VECTOR_SUBPARTS (type);
5270
5271 case INTEGER_TYPE:
5272 case REAL_TYPE:
5273 case FIXED_POINT_TYPE:
5274 case ENUMERAL_TYPE:
5275 case BOOLEAN_TYPE:
5276 case POINTER_TYPE:
5277 case OFFSET_TYPE:
5278 case REFERENCE_TYPE:
5279 return 1;
5280
5281 case ERROR_MARK:
5282 return 0;
5283
5284 case VOID_TYPE:
5285 case METHOD_TYPE:
5286 case FUNCTION_TYPE:
5287 case LANG_TYPE:
5288 default:
5289 gcc_unreachable ();
5290 }
5291 }
5292
5293 /* Helper for categorize_ctor_elements. Identical interface. */
5294
5295 static bool
5296 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5297 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5298 {
5299 unsigned HOST_WIDE_INT idx;
5300 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5301 tree value, purpose, elt_type;
5302
5303 /* Whether CTOR is a valid constant initializer, in accordance with what
5304 initializer_constant_valid_p does. If inferred from the constructor
5305 elements, true until proven otherwise. */
5306 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5307 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5308
5309 nz_elts = 0;
5310 init_elts = 0;
5311 num_fields = 0;
5312 elt_type = NULL_TREE;
5313
5314 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5315 {
5316 HOST_WIDE_INT mult = 1;
5317
5318 if (TREE_CODE (purpose) == RANGE_EXPR)
5319 {
5320 tree lo_index = TREE_OPERAND (purpose, 0);
5321 tree hi_index = TREE_OPERAND (purpose, 1);
5322
5323 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5324 mult = (tree_low_cst (hi_index, 1)
5325 - tree_low_cst (lo_index, 1) + 1);
5326 }
5327 num_fields += mult;
5328 elt_type = TREE_TYPE (value);
5329
5330 switch (TREE_CODE (value))
5331 {
5332 case CONSTRUCTOR:
5333 {
5334 HOST_WIDE_INT nz = 0, ic = 0;
5335
5336 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5337 p_complete);
5338
5339 nz_elts += mult * nz;
5340 init_elts += mult * ic;
5341
5342 if (const_from_elts_p && const_p)
5343 const_p = const_elt_p;
5344 }
5345 break;
5346
5347 case INTEGER_CST:
5348 case REAL_CST:
5349 case FIXED_CST:
5350 if (!initializer_zerop (value))
5351 nz_elts += mult;
5352 init_elts += mult;
5353 break;
5354
5355 case STRING_CST:
5356 nz_elts += mult * TREE_STRING_LENGTH (value);
5357 init_elts += mult * TREE_STRING_LENGTH (value);
5358 break;
5359
5360 case COMPLEX_CST:
5361 if (!initializer_zerop (TREE_REALPART (value)))
5362 nz_elts += mult;
5363 if (!initializer_zerop (TREE_IMAGPART (value)))
5364 nz_elts += mult;
5365 init_elts += mult;
5366 break;
5367
5368 case VECTOR_CST:
5369 {
5370 tree v;
5371 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
5372 {
5373 if (!initializer_zerop (TREE_VALUE (v)))
5374 nz_elts += mult;
5375 init_elts += mult;
5376 }
5377 }
5378 break;
5379
5380 default:
5381 {
5382 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5383 nz_elts += mult * tc;
5384 init_elts += mult * tc;
5385
5386 if (const_from_elts_p && const_p)
5387 const_p = initializer_constant_valid_p (value, elt_type)
5388 != NULL_TREE;
5389 }
5390 break;
5391 }
5392 }
5393
5394 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5395 num_fields, elt_type))
5396 *p_complete = false;
5397
5398 *p_nz_elts += nz_elts;
5399 *p_init_elts += init_elts;
5400
5401 return const_p;
5402 }
5403
5404 /* Examine CTOR to discover:
5405 * how many scalar fields are set to nonzero values,
5406 and place it in *P_NZ_ELTS;
5407 * how many scalar fields in total are in CTOR,
5408 and place it in *P_ELT_COUNT.
5409 * whether the constructor is complete -- in the sense that every
5410 meaningful byte is explicitly given a value --
5411 and place it in *P_COMPLETE.
5412
5413 Return whether or not CTOR is a valid static constant initializer, the same
5414 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5415
5416 bool
5417 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5418 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5419 {
5420 *p_nz_elts = 0;
5421 *p_init_elts = 0;
5422 *p_complete = true;
5423
5424 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5425 }
5426
5427 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5428 of which had type LAST_TYPE. Each element was itself a complete
5429 initializer, in the sense that every meaningful byte was explicitly
5430 given a value. Return true if the same is true for the constructor
5431 as a whole. */
5432
5433 bool
5434 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5435 const_tree last_type)
5436 {
5437 if (TREE_CODE (type) == UNION_TYPE
5438 || TREE_CODE (type) == QUAL_UNION_TYPE)
5439 {
5440 if (num_elts == 0)
5441 return false;
5442
5443 gcc_assert (num_elts == 1 && last_type);
5444
5445 /* ??? We could look at each element of the union, and find the
5446 largest element. Which would avoid comparing the size of the
5447 initialized element against any tail padding in the union.
5448 Doesn't seem worth the effort... */
5449 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5450 }
5451
5452 return count_type_elements (type, true) == num_elts;
5453 }
5454
5455 /* Return 1 if EXP contains mostly (3/4) zeros. */
5456
5457 static int
5458 mostly_zeros_p (const_tree exp)
5459 {
5460 if (TREE_CODE (exp) == CONSTRUCTOR)
5461 {
5462 HOST_WIDE_INT nz_elts, init_elts;
5463 bool complete_p;
5464
5465 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5466 return !complete_p || nz_elts < init_elts / 4;
5467 }
5468
5469 return initializer_zerop (exp);
5470 }
5471
5472 /* Return 1 if EXP contains all zeros. */
5473
5474 static int
5475 all_zeros_p (const_tree exp)
5476 {
5477 if (TREE_CODE (exp) == CONSTRUCTOR)
5478 {
5479 HOST_WIDE_INT nz_elts, init_elts;
5480 bool complete_p;
5481
5482 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5483 return nz_elts == 0;
5484 }
5485
5486 return initializer_zerop (exp);
5487 }
5488 \f
5489 /* Helper function for store_constructor.
5490 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5491 TYPE is the type of the CONSTRUCTOR, not the element type.
5492 CLEARED is as for store_constructor.
5493 ALIAS_SET is the alias set to use for any stores.
5494
5495 This provides a recursive shortcut back to store_constructor when it isn't
5496 necessary to go through store_field. This is so that we can pass through
5497 the cleared field to let store_constructor know that we may not have to
5498 clear a substructure if the outer structure has already been cleared. */
5499
5500 static void
5501 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5502 HOST_WIDE_INT bitpos, enum machine_mode mode,
5503 tree exp, tree type, int cleared,
5504 alias_set_type alias_set)
5505 {
5506 if (TREE_CODE (exp) == CONSTRUCTOR
5507 /* We can only call store_constructor recursively if the size and
5508 bit position are on a byte boundary. */
5509 && bitpos % BITS_PER_UNIT == 0
5510 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5511 /* If we have a nonzero bitpos for a register target, then we just
5512 let store_field do the bitfield handling. This is unlikely to
5513 generate unnecessary clear instructions anyways. */
5514 && (bitpos == 0 || MEM_P (target)))
5515 {
5516 if (MEM_P (target))
5517 target
5518 = adjust_address (target,
5519 GET_MODE (target) == BLKmode
5520 || 0 != (bitpos
5521 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5522 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5523
5524
5525 /* Update the alias set, if required. */
5526 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5527 && MEM_ALIAS_SET (target) != 0)
5528 {
5529 target = copy_rtx (target);
5530 set_mem_alias_set (target, alias_set);
5531 }
5532
5533 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5534 }
5535 else
5536 store_field (target, bitsize, bitpos, 0, 0, mode, exp, type, alias_set,
5537 false);
5538 }
5539
5540 /* Store the value of constructor EXP into the rtx TARGET.
5541 TARGET is either a REG or a MEM; we know it cannot conflict, since
5542 safe_from_p has been called.
5543 CLEARED is true if TARGET is known to have been zero'd.
5544 SIZE is the number of bytes of TARGET we are allowed to modify: this
5545 may not be the same as the size of EXP if we are assigning to a field
5546 which has been packed to exclude padding bits. */
5547
5548 static void
5549 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5550 {
5551 tree type = TREE_TYPE (exp);
5552 #ifdef WORD_REGISTER_OPERATIONS
5553 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5554 #endif
5555
5556 switch (TREE_CODE (type))
5557 {
5558 case RECORD_TYPE:
5559 case UNION_TYPE:
5560 case QUAL_UNION_TYPE:
5561 {
5562 unsigned HOST_WIDE_INT idx;
5563 tree field, value;
5564
5565 /* If size is zero or the target is already cleared, do nothing. */
5566 if (size == 0 || cleared)
5567 cleared = 1;
5568 /* We either clear the aggregate or indicate the value is dead. */
5569 else if ((TREE_CODE (type) == UNION_TYPE
5570 || TREE_CODE (type) == QUAL_UNION_TYPE)
5571 && ! CONSTRUCTOR_ELTS (exp))
5572 /* If the constructor is empty, clear the union. */
5573 {
5574 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5575 cleared = 1;
5576 }
5577
5578 /* If we are building a static constructor into a register,
5579 set the initial value as zero so we can fold the value into
5580 a constant. But if more than one register is involved,
5581 this probably loses. */
5582 else if (REG_P (target) && TREE_STATIC (exp)
5583 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5584 {
5585 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5586 cleared = 1;
5587 }
5588
5589 /* If the constructor has fewer fields than the structure or
5590 if we are initializing the structure to mostly zeros, clear
5591 the whole structure first. Don't do this if TARGET is a
5592 register whose mode size isn't equal to SIZE since
5593 clear_storage can't handle this case. */
5594 else if (size > 0
5595 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5596 != fields_length (type))
5597 || mostly_zeros_p (exp))
5598 && (!REG_P (target)
5599 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5600 == size)))
5601 {
5602 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5603 cleared = 1;
5604 }
5605
5606 if (REG_P (target) && !cleared)
5607 emit_clobber (target);
5608
5609 /* Store each element of the constructor into the
5610 corresponding field of TARGET. */
5611 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5612 {
5613 enum machine_mode mode;
5614 HOST_WIDE_INT bitsize;
5615 HOST_WIDE_INT bitpos = 0;
5616 tree offset;
5617 rtx to_rtx = target;
5618
5619 /* Just ignore missing fields. We cleared the whole
5620 structure, above, if any fields are missing. */
5621 if (field == 0)
5622 continue;
5623
5624 if (cleared && initializer_zerop (value))
5625 continue;
5626
5627 if (host_integerp (DECL_SIZE (field), 1))
5628 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5629 else
5630 bitsize = -1;
5631
5632 mode = DECL_MODE (field);
5633 if (DECL_BIT_FIELD (field))
5634 mode = VOIDmode;
5635
5636 offset = DECL_FIELD_OFFSET (field);
5637 if (host_integerp (offset, 0)
5638 && host_integerp (bit_position (field), 0))
5639 {
5640 bitpos = int_bit_position (field);
5641 offset = 0;
5642 }
5643 else
5644 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5645
5646 if (offset)
5647 {
5648 enum machine_mode address_mode;
5649 rtx offset_rtx;
5650
5651 offset
5652 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5653 make_tree (TREE_TYPE (exp),
5654 target));
5655
5656 offset_rtx = expand_normal (offset);
5657 gcc_assert (MEM_P (to_rtx));
5658
5659 address_mode
5660 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5661 if (GET_MODE (offset_rtx) != address_mode)
5662 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5663
5664 to_rtx = offset_address (to_rtx, offset_rtx,
5665 highest_pow2_factor (offset));
5666 }
5667
5668 #ifdef WORD_REGISTER_OPERATIONS
5669 /* If this initializes a field that is smaller than a
5670 word, at the start of a word, try to widen it to a full
5671 word. This special case allows us to output C++ member
5672 function initializations in a form that the optimizers
5673 can understand. */
5674 if (REG_P (target)
5675 && bitsize < BITS_PER_WORD
5676 && bitpos % BITS_PER_WORD == 0
5677 && GET_MODE_CLASS (mode) == MODE_INT
5678 && TREE_CODE (value) == INTEGER_CST
5679 && exp_size >= 0
5680 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5681 {
5682 tree type = TREE_TYPE (value);
5683
5684 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5685 {
5686 type = lang_hooks.types.type_for_size
5687 (BITS_PER_WORD, TYPE_UNSIGNED (type));
5688 value = fold_convert (type, value);
5689 }
5690
5691 if (BYTES_BIG_ENDIAN)
5692 value
5693 = fold_build2 (LSHIFT_EXPR, type, value,
5694 build_int_cst (type,
5695 BITS_PER_WORD - bitsize));
5696 bitsize = BITS_PER_WORD;
5697 mode = word_mode;
5698 }
5699 #endif
5700
5701 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5702 && DECL_NONADDRESSABLE_P (field))
5703 {
5704 to_rtx = copy_rtx (to_rtx);
5705 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5706 }
5707
5708 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5709 value, type, cleared,
5710 get_alias_set (TREE_TYPE (field)));
5711 }
5712 break;
5713 }
5714 case ARRAY_TYPE:
5715 {
5716 tree value, index;
5717 unsigned HOST_WIDE_INT i;
5718 int need_to_clear;
5719 tree domain;
5720 tree elttype = TREE_TYPE (type);
5721 int const_bounds_p;
5722 HOST_WIDE_INT minelt = 0;
5723 HOST_WIDE_INT maxelt = 0;
5724
5725 domain = TYPE_DOMAIN (type);
5726 const_bounds_p = (TYPE_MIN_VALUE (domain)
5727 && TYPE_MAX_VALUE (domain)
5728 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5729 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5730
5731 /* If we have constant bounds for the range of the type, get them. */
5732 if (const_bounds_p)
5733 {
5734 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5735 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5736 }
5737
5738 /* If the constructor has fewer elements than the array, clear
5739 the whole array first. Similarly if this is static
5740 constructor of a non-BLKmode object. */
5741 if (cleared)
5742 need_to_clear = 0;
5743 else if (REG_P (target) && TREE_STATIC (exp))
5744 need_to_clear = 1;
5745 else
5746 {
5747 unsigned HOST_WIDE_INT idx;
5748 tree index, value;
5749 HOST_WIDE_INT count = 0, zero_count = 0;
5750 need_to_clear = ! const_bounds_p;
5751
5752 /* This loop is a more accurate version of the loop in
5753 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5754 is also needed to check for missing elements. */
5755 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5756 {
5757 HOST_WIDE_INT this_node_count;
5758
5759 if (need_to_clear)
5760 break;
5761
5762 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5763 {
5764 tree lo_index = TREE_OPERAND (index, 0);
5765 tree hi_index = TREE_OPERAND (index, 1);
5766
5767 if (! host_integerp (lo_index, 1)
5768 || ! host_integerp (hi_index, 1))
5769 {
5770 need_to_clear = 1;
5771 break;
5772 }
5773
5774 this_node_count = (tree_low_cst (hi_index, 1)
5775 - tree_low_cst (lo_index, 1) + 1);
5776 }
5777 else
5778 this_node_count = 1;
5779
5780 count += this_node_count;
5781 if (mostly_zeros_p (value))
5782 zero_count += this_node_count;
5783 }
5784
5785 /* Clear the entire array first if there are any missing
5786 elements, or if the incidence of zero elements is >=
5787 75%. */
5788 if (! need_to_clear
5789 && (count < maxelt - minelt + 1
5790 || 4 * zero_count >= 3 * count))
5791 need_to_clear = 1;
5792 }
5793
5794 if (need_to_clear && size > 0)
5795 {
5796 if (REG_P (target))
5797 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5798 else
5799 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5800 cleared = 1;
5801 }
5802
5803 if (!cleared && REG_P (target))
5804 /* Inform later passes that the old value is dead. */
5805 emit_clobber (target);
5806
5807 /* Store each element of the constructor into the
5808 corresponding element of TARGET, determined by counting the
5809 elements. */
5810 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5811 {
5812 enum machine_mode mode;
5813 HOST_WIDE_INT bitsize;
5814 HOST_WIDE_INT bitpos;
5815 rtx xtarget = target;
5816
5817 if (cleared && initializer_zerop (value))
5818 continue;
5819
5820 mode = TYPE_MODE (elttype);
5821 if (mode == BLKmode)
5822 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5823 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5824 : -1);
5825 else
5826 bitsize = GET_MODE_BITSIZE (mode);
5827
5828 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5829 {
5830 tree lo_index = TREE_OPERAND (index, 0);
5831 tree hi_index = TREE_OPERAND (index, 1);
5832 rtx index_r, pos_rtx;
5833 HOST_WIDE_INT lo, hi, count;
5834 tree position;
5835
5836 /* If the range is constant and "small", unroll the loop. */
5837 if (const_bounds_p
5838 && host_integerp (lo_index, 0)
5839 && host_integerp (hi_index, 0)
5840 && (lo = tree_low_cst (lo_index, 0),
5841 hi = tree_low_cst (hi_index, 0),
5842 count = hi - lo + 1,
5843 (!MEM_P (target)
5844 || count <= 2
5845 || (host_integerp (TYPE_SIZE (elttype), 1)
5846 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5847 <= 40 * 8)))))
5848 {
5849 lo -= minelt; hi -= minelt;
5850 for (; lo <= hi; lo++)
5851 {
5852 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
5853
5854 if (MEM_P (target)
5855 && !MEM_KEEP_ALIAS_SET_P (target)
5856 && TREE_CODE (type) == ARRAY_TYPE
5857 && TYPE_NONALIASED_COMPONENT (type))
5858 {
5859 target = copy_rtx (target);
5860 MEM_KEEP_ALIAS_SET_P (target) = 1;
5861 }
5862
5863 store_constructor_field
5864 (target, bitsize, bitpos, mode, value, type, cleared,
5865 get_alias_set (elttype));
5866 }
5867 }
5868 else
5869 {
5870 rtx loop_start = gen_label_rtx ();
5871 rtx loop_end = gen_label_rtx ();
5872 tree exit_cond;
5873
5874 expand_normal (hi_index);
5875
5876 index = build_decl (EXPR_LOCATION (exp),
5877 VAR_DECL, NULL_TREE, domain);
5878 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
5879 SET_DECL_RTL (index, index_r);
5880 store_expr (lo_index, index_r, 0, false);
5881
5882 /* Build the head of the loop. */
5883 do_pending_stack_adjust ();
5884 emit_label (loop_start);
5885
5886 /* Assign value to element index. */
5887 position =
5888 fold_convert (ssizetype,
5889 fold_build2 (MINUS_EXPR,
5890 TREE_TYPE (index),
5891 index,
5892 TYPE_MIN_VALUE (domain)));
5893
5894 position =
5895 size_binop (MULT_EXPR, position,
5896 fold_convert (ssizetype,
5897 TYPE_SIZE_UNIT (elttype)));
5898
5899 pos_rtx = expand_normal (position);
5900 xtarget = offset_address (target, pos_rtx,
5901 highest_pow2_factor (position));
5902 xtarget = adjust_address (xtarget, mode, 0);
5903 if (TREE_CODE (value) == CONSTRUCTOR)
5904 store_constructor (value, xtarget, cleared,
5905 bitsize / BITS_PER_UNIT);
5906 else
5907 store_expr (value, xtarget, 0, false);
5908
5909 /* Generate a conditional jump to exit the loop. */
5910 exit_cond = build2 (LT_EXPR, integer_type_node,
5911 index, hi_index);
5912 jumpif (exit_cond, loop_end, -1);
5913
5914 /* Update the loop counter, and jump to the head of
5915 the loop. */
5916 expand_assignment (index,
5917 build2 (PLUS_EXPR, TREE_TYPE (index),
5918 index, integer_one_node),
5919 false);
5920
5921 emit_jump (loop_start);
5922
5923 /* Build the end of the loop. */
5924 emit_label (loop_end);
5925 }
5926 }
5927 else if ((index != 0 && ! host_integerp (index, 0))
5928 || ! host_integerp (TYPE_SIZE (elttype), 1))
5929 {
5930 tree position;
5931
5932 if (index == 0)
5933 index = ssize_int (1);
5934
5935 if (minelt)
5936 index = fold_convert (ssizetype,
5937 fold_build2 (MINUS_EXPR,
5938 TREE_TYPE (index),
5939 index,
5940 TYPE_MIN_VALUE (domain)));
5941
5942 position =
5943 size_binop (MULT_EXPR, index,
5944 fold_convert (ssizetype,
5945 TYPE_SIZE_UNIT (elttype)));
5946 xtarget = offset_address (target,
5947 expand_normal (position),
5948 highest_pow2_factor (position));
5949 xtarget = adjust_address (xtarget, mode, 0);
5950 store_expr (value, xtarget, 0, false);
5951 }
5952 else
5953 {
5954 if (index != 0)
5955 bitpos = ((tree_low_cst (index, 0) - minelt)
5956 * tree_low_cst (TYPE_SIZE (elttype), 1));
5957 else
5958 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
5959
5960 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
5961 && TREE_CODE (type) == ARRAY_TYPE
5962 && TYPE_NONALIASED_COMPONENT (type))
5963 {
5964 target = copy_rtx (target);
5965 MEM_KEEP_ALIAS_SET_P (target) = 1;
5966 }
5967 store_constructor_field (target, bitsize, bitpos, mode, value,
5968 type, cleared, get_alias_set (elttype));
5969 }
5970 }
5971 break;
5972 }
5973
5974 case VECTOR_TYPE:
5975 {
5976 unsigned HOST_WIDE_INT idx;
5977 constructor_elt *ce;
5978 int i;
5979 int need_to_clear;
5980 int icode = 0;
5981 tree elttype = TREE_TYPE (type);
5982 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
5983 enum machine_mode eltmode = TYPE_MODE (elttype);
5984 HOST_WIDE_INT bitsize;
5985 HOST_WIDE_INT bitpos;
5986 rtvec vector = NULL;
5987 unsigned n_elts;
5988 alias_set_type alias;
5989
5990 gcc_assert (eltmode != BLKmode);
5991
5992 n_elts = TYPE_VECTOR_SUBPARTS (type);
5993 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
5994 {
5995 enum machine_mode mode = GET_MODE (target);
5996
5997 icode = (int) optab_handler (vec_init_optab, mode);
5998 if (icode != CODE_FOR_nothing)
5999 {
6000 unsigned int i;
6001
6002 vector = rtvec_alloc (n_elts);
6003 for (i = 0; i < n_elts; i++)
6004 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6005 }
6006 }
6007
6008 /* If the constructor has fewer elements than the vector,
6009 clear the whole array first. Similarly if this is static
6010 constructor of a non-BLKmode object. */
6011 if (cleared)
6012 need_to_clear = 0;
6013 else if (REG_P (target) && TREE_STATIC (exp))
6014 need_to_clear = 1;
6015 else
6016 {
6017 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6018 tree value;
6019
6020 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6021 {
6022 int n_elts_here = tree_low_cst
6023 (int_const_binop (TRUNC_DIV_EXPR,
6024 TYPE_SIZE (TREE_TYPE (value)),
6025 TYPE_SIZE (elttype)), 1);
6026
6027 count += n_elts_here;
6028 if (mostly_zeros_p (value))
6029 zero_count += n_elts_here;
6030 }
6031
6032 /* Clear the entire vector first if there are any missing elements,
6033 or if the incidence of zero elements is >= 75%. */
6034 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6035 }
6036
6037 if (need_to_clear && size > 0 && !vector)
6038 {
6039 if (REG_P (target))
6040 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6041 else
6042 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6043 cleared = 1;
6044 }
6045
6046 /* Inform later passes that the old value is dead. */
6047 if (!cleared && !vector && REG_P (target))
6048 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6049
6050 if (MEM_P (target))
6051 alias = MEM_ALIAS_SET (target);
6052 else
6053 alias = get_alias_set (elttype);
6054
6055 /* Store each element of the constructor into the corresponding
6056 element of TARGET, determined by counting the elements. */
6057 for (idx = 0, i = 0;
6058 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6059 idx++, i += bitsize / elt_size)
6060 {
6061 HOST_WIDE_INT eltpos;
6062 tree value = ce->value;
6063
6064 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6065 if (cleared && initializer_zerop (value))
6066 continue;
6067
6068 if (ce->index)
6069 eltpos = tree_low_cst (ce->index, 1);
6070 else
6071 eltpos = i;
6072
6073 if (vector)
6074 {
6075 /* Vector CONSTRUCTORs should only be built from smaller
6076 vectors in the case of BLKmode vectors. */
6077 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6078 RTVEC_ELT (vector, eltpos)
6079 = expand_normal (value);
6080 }
6081 else
6082 {
6083 enum machine_mode value_mode =
6084 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6085 ? TYPE_MODE (TREE_TYPE (value))
6086 : eltmode;
6087 bitpos = eltpos * elt_size;
6088 store_constructor_field (target, bitsize, bitpos,
6089 value_mode, value, type,
6090 cleared, alias);
6091 }
6092 }
6093
6094 if (vector)
6095 emit_insn (GEN_FCN (icode)
6096 (target,
6097 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6098 break;
6099 }
6100
6101 default:
6102 gcc_unreachable ();
6103 }
6104 }
6105
6106 /* Store the value of EXP (an expression tree)
6107 into a subfield of TARGET which has mode MODE and occupies
6108 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6109 If MODE is VOIDmode, it means that we are storing into a bit-field.
6110
6111 BITREGION_START is bitpos of the first bitfield in this region.
6112 BITREGION_END is the bitpos of the ending bitfield in this region.
6113 These two fields are 0, if the C++ memory model does not apply,
6114 or we are not interested in keeping track of bitfield regions.
6115
6116 Always return const0_rtx unless we have something particular to
6117 return.
6118
6119 TYPE is the type of the underlying object,
6120
6121 ALIAS_SET is the alias set for the destination. This value will
6122 (in general) be different from that for TARGET, since TARGET is a
6123 reference to the containing structure.
6124
6125 If NONTEMPORAL is true, try generating a nontemporal store. */
6126
6127 static rtx
6128 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6129 unsigned HOST_WIDE_INT bitregion_start,
6130 unsigned HOST_WIDE_INT bitregion_end,
6131 enum machine_mode mode, tree exp, tree type,
6132 alias_set_type alias_set, bool nontemporal)
6133 {
6134 if (TREE_CODE (exp) == ERROR_MARK)
6135 return const0_rtx;
6136
6137 /* If we have nothing to store, do nothing unless the expression has
6138 side-effects. */
6139 if (bitsize == 0)
6140 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6141
6142 /* If we are storing into an unaligned field of an aligned union that is
6143 in a register, we may have the mode of TARGET being an integer mode but
6144 MODE == BLKmode. In that case, get an aligned object whose size and
6145 alignment are the same as TARGET and store TARGET into it (we can avoid
6146 the store if the field being stored is the entire width of TARGET). Then
6147 call ourselves recursively to store the field into a BLKmode version of
6148 that object. Finally, load from the object into TARGET. This is not
6149 very efficient in general, but should only be slightly more expensive
6150 than the otherwise-required unaligned accesses. Perhaps this can be
6151 cleaned up later. It's tempting to make OBJECT readonly, but it's set
6152 twice, once with emit_move_insn and once via store_field. */
6153
6154 if (mode == BLKmode
6155 && (REG_P (target) || GET_CODE (target) == SUBREG))
6156 {
6157 rtx object = assign_temp (type, 0, 1, 1);
6158 rtx blk_object = adjust_address (object, BLKmode, 0);
6159
6160 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
6161 emit_move_insn (object, target);
6162
6163 store_field (blk_object, bitsize, bitpos,
6164 bitregion_start, bitregion_end,
6165 mode, exp, type, alias_set, nontemporal);
6166
6167 emit_move_insn (target, object);
6168
6169 /* We want to return the BLKmode version of the data. */
6170 return blk_object;
6171 }
6172
6173 if (GET_CODE (target) == CONCAT)
6174 {
6175 /* We're storing into a struct containing a single __complex. */
6176
6177 gcc_assert (!bitpos);
6178 return store_expr (exp, target, 0, nontemporal);
6179 }
6180
6181 /* If the structure is in a register or if the component
6182 is a bit field, we cannot use addressing to access it.
6183 Use bit-field techniques or SUBREG to store in it. */
6184
6185 if (mode == VOIDmode
6186 || (mode != BLKmode && ! direct_store[(int) mode]
6187 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6188 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6189 || REG_P (target)
6190 || GET_CODE (target) == SUBREG
6191 /* If the field isn't aligned enough to store as an ordinary memref,
6192 store it as a bit field. */
6193 || (mode != BLKmode
6194 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6195 || bitpos % GET_MODE_ALIGNMENT (mode))
6196 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6197 || (bitpos % BITS_PER_UNIT != 0)))
6198 /* If the RHS and field are a constant size and the size of the
6199 RHS isn't the same size as the bitfield, we must use bitfield
6200 operations. */
6201 || (bitsize >= 0
6202 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6203 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6204 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6205 decl we must use bitfield operations. */
6206 || (bitsize >= 0
6207 && TREE_CODE (exp) == MEM_REF
6208 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6209 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6210 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6211 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6212 {
6213 rtx temp;
6214 gimple nop_def;
6215
6216 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6217 implies a mask operation. If the precision is the same size as
6218 the field we're storing into, that mask is redundant. This is
6219 particularly common with bit field assignments generated by the
6220 C front end. */
6221 nop_def = get_def_for_expr (exp, NOP_EXPR);
6222 if (nop_def)
6223 {
6224 tree type = TREE_TYPE (exp);
6225 if (INTEGRAL_TYPE_P (type)
6226 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6227 && bitsize == TYPE_PRECISION (type))
6228 {
6229 tree op = gimple_assign_rhs1 (nop_def);
6230 type = TREE_TYPE (op);
6231 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6232 exp = op;
6233 }
6234 }
6235
6236 temp = expand_normal (exp);
6237
6238 /* If BITSIZE is narrower than the size of the type of EXP
6239 we will be narrowing TEMP. Normally, what's wanted are the
6240 low-order bits. However, if EXP's type is a record and this is
6241 big-endian machine, we want the upper BITSIZE bits. */
6242 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6243 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6244 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6245 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6246 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6247 NULL_RTX, 1);
6248
6249 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
6250 MODE. */
6251 if (mode != VOIDmode && mode != BLKmode
6252 && mode != TYPE_MODE (TREE_TYPE (exp)))
6253 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6254
6255 /* If the modes of TEMP and TARGET are both BLKmode, both
6256 must be in memory and BITPOS must be aligned on a byte
6257 boundary. If so, we simply do a block copy. Likewise
6258 for a BLKmode-like TARGET. */
6259 if (GET_MODE (temp) == BLKmode
6260 && (GET_MODE (target) == BLKmode
6261 || (MEM_P (target)
6262 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6263 && (bitpos % BITS_PER_UNIT) == 0
6264 && (bitsize % BITS_PER_UNIT) == 0)))
6265 {
6266 gcc_assert (MEM_P (target) && MEM_P (temp)
6267 && (bitpos % BITS_PER_UNIT) == 0);
6268
6269 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6270 emit_block_move (target, temp,
6271 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6272 / BITS_PER_UNIT),
6273 BLOCK_OP_NORMAL);
6274
6275 return const0_rtx;
6276 }
6277
6278 /* Store the value in the bitfield. */
6279 store_bit_field (target, bitsize, bitpos,
6280 bitregion_start, bitregion_end,
6281 mode, temp);
6282
6283 return const0_rtx;
6284 }
6285 else
6286 {
6287 /* Now build a reference to just the desired component. */
6288 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6289
6290 if (to_rtx == target)
6291 to_rtx = copy_rtx (to_rtx);
6292
6293 if (!MEM_SCALAR_P (to_rtx))
6294 MEM_IN_STRUCT_P (to_rtx) = 1;
6295 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6296 set_mem_alias_set (to_rtx, alias_set);
6297
6298 return store_expr (exp, to_rtx, 0, nontemporal);
6299 }
6300 }
6301 \f
6302 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6303 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6304 codes and find the ultimate containing object, which we return.
6305
6306 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6307 bit position, and *PUNSIGNEDP to the signedness of the field.
6308 If the position of the field is variable, we store a tree
6309 giving the variable offset (in units) in *POFFSET.
6310 This offset is in addition to the bit position.
6311 If the position is not variable, we store 0 in *POFFSET.
6312
6313 If any of the extraction expressions is volatile,
6314 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6315
6316 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6317 Otherwise, it is a mode that can be used to access the field.
6318
6319 If the field describes a variable-sized object, *PMODE is set to
6320 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6321 this case, but the address of the object can be found.
6322
6323 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6324 look through nodes that serve as markers of a greater alignment than
6325 the one that can be deduced from the expression. These nodes make it
6326 possible for front-ends to prevent temporaries from being created by
6327 the middle-end on alignment considerations. For that purpose, the
6328 normal operating mode at high-level is to always pass FALSE so that
6329 the ultimate containing object is really returned; moreover, the
6330 associated predicate handled_component_p will always return TRUE
6331 on these nodes, thus indicating that they are essentially handled
6332 by get_inner_reference. TRUE should only be passed when the caller
6333 is scanning the expression in order to build another representation
6334 and specifically knows how to handle these nodes; as such, this is
6335 the normal operating mode in the RTL expanders. */
6336
6337 tree
6338 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6339 HOST_WIDE_INT *pbitpos, tree *poffset,
6340 enum machine_mode *pmode, int *punsignedp,
6341 int *pvolatilep, bool keep_aligning)
6342 {
6343 tree size_tree = 0;
6344 enum machine_mode mode = VOIDmode;
6345 bool blkmode_bitfield = false;
6346 tree offset = size_zero_node;
6347 double_int bit_offset = double_int_zero;
6348
6349 /* First get the mode, signedness, and size. We do this from just the
6350 outermost expression. */
6351 *pbitsize = -1;
6352 if (TREE_CODE (exp) == COMPONENT_REF)
6353 {
6354 tree field = TREE_OPERAND (exp, 1);
6355 size_tree = DECL_SIZE (field);
6356 if (!DECL_BIT_FIELD (field))
6357 mode = DECL_MODE (field);
6358 else if (DECL_MODE (field) == BLKmode)
6359 blkmode_bitfield = true;
6360 else if (TREE_THIS_VOLATILE (exp)
6361 && flag_strict_volatile_bitfields > 0)
6362 /* Volatile bitfields should be accessed in the mode of the
6363 field's type, not the mode computed based on the bit
6364 size. */
6365 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6366
6367 *punsignedp = DECL_UNSIGNED (field);
6368 }
6369 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6370 {
6371 size_tree = TREE_OPERAND (exp, 1);
6372 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6373 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6374
6375 /* For vector types, with the correct size of access, use the mode of
6376 inner type. */
6377 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6378 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6379 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6380 mode = TYPE_MODE (TREE_TYPE (exp));
6381 }
6382 else
6383 {
6384 mode = TYPE_MODE (TREE_TYPE (exp));
6385 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6386
6387 if (mode == BLKmode)
6388 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6389 else
6390 *pbitsize = GET_MODE_BITSIZE (mode);
6391 }
6392
6393 if (size_tree != 0)
6394 {
6395 if (! host_integerp (size_tree, 1))
6396 mode = BLKmode, *pbitsize = -1;
6397 else
6398 *pbitsize = tree_low_cst (size_tree, 1);
6399 }
6400
6401 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6402 and find the ultimate containing object. */
6403 while (1)
6404 {
6405 switch (TREE_CODE (exp))
6406 {
6407 case BIT_FIELD_REF:
6408 bit_offset
6409 = double_int_add (bit_offset,
6410 tree_to_double_int (TREE_OPERAND (exp, 2)));
6411 break;
6412
6413 case COMPONENT_REF:
6414 {
6415 tree field = TREE_OPERAND (exp, 1);
6416 tree this_offset = component_ref_field_offset (exp);
6417
6418 /* If this field hasn't been filled in yet, don't go past it.
6419 This should only happen when folding expressions made during
6420 type construction. */
6421 if (this_offset == 0)
6422 break;
6423
6424 offset = size_binop (PLUS_EXPR, offset, this_offset);
6425 bit_offset = double_int_add (bit_offset,
6426 tree_to_double_int
6427 (DECL_FIELD_BIT_OFFSET (field)));
6428
6429 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6430 }
6431 break;
6432
6433 case ARRAY_REF:
6434 case ARRAY_RANGE_REF:
6435 {
6436 tree index = TREE_OPERAND (exp, 1);
6437 tree low_bound = array_ref_low_bound (exp);
6438 tree unit_size = array_ref_element_size (exp);
6439
6440 /* We assume all arrays have sizes that are a multiple of a byte.
6441 First subtract the lower bound, if any, in the type of the
6442 index, then convert to sizetype and multiply by the size of
6443 the array element. */
6444 if (! integer_zerop (low_bound))
6445 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6446 index, low_bound);
6447
6448 offset = size_binop (PLUS_EXPR, offset,
6449 size_binop (MULT_EXPR,
6450 fold_convert (sizetype, index),
6451 unit_size));
6452 }
6453 break;
6454
6455 case REALPART_EXPR:
6456 break;
6457
6458 case IMAGPART_EXPR:
6459 bit_offset = double_int_add (bit_offset,
6460 uhwi_to_double_int (*pbitsize));
6461 break;
6462
6463 case VIEW_CONVERT_EXPR:
6464 if (keep_aligning && STRICT_ALIGNMENT
6465 && (TYPE_ALIGN (TREE_TYPE (exp))
6466 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6467 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6468 < BIGGEST_ALIGNMENT)
6469 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6470 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6471 goto done;
6472 break;
6473
6474 case MEM_REF:
6475 /* Hand back the decl for MEM[&decl, off]. */
6476 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6477 {
6478 tree off = TREE_OPERAND (exp, 1);
6479 if (!integer_zerop (off))
6480 {
6481 double_int boff, coff = mem_ref_offset (exp);
6482 boff = double_int_lshift (coff,
6483 BITS_PER_UNIT == 8
6484 ? 3 : exact_log2 (BITS_PER_UNIT),
6485 HOST_BITS_PER_DOUBLE_INT, true);
6486 bit_offset = double_int_add (bit_offset, boff);
6487 }
6488 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6489 }
6490 goto done;
6491
6492 default:
6493 goto done;
6494 }
6495
6496 /* If any reference in the chain is volatile, the effect is volatile. */
6497 if (TREE_THIS_VOLATILE (exp))
6498 *pvolatilep = 1;
6499
6500 exp = TREE_OPERAND (exp, 0);
6501 }
6502 done:
6503
6504 /* If OFFSET is constant, see if we can return the whole thing as a
6505 constant bit position. Make sure to handle overflow during
6506 this conversion. */
6507 if (TREE_CODE (offset) == INTEGER_CST)
6508 {
6509 double_int tem = tree_to_double_int (offset);
6510 tem = double_int_sext (tem, TYPE_PRECISION (sizetype));
6511 tem = double_int_lshift (tem,
6512 BITS_PER_UNIT == 8
6513 ? 3 : exact_log2 (BITS_PER_UNIT),
6514 HOST_BITS_PER_DOUBLE_INT, true);
6515 tem = double_int_add (tem, bit_offset);
6516 if (double_int_fits_in_shwi_p (tem))
6517 {
6518 *pbitpos = double_int_to_shwi (tem);
6519 *poffset = offset = NULL_TREE;
6520 }
6521 }
6522
6523 /* Otherwise, split it up. */
6524 if (offset)
6525 {
6526 *pbitpos = double_int_to_shwi (bit_offset);
6527 *poffset = offset;
6528 }
6529
6530 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6531 if (mode == VOIDmode
6532 && blkmode_bitfield
6533 && (*pbitpos % BITS_PER_UNIT) == 0
6534 && (*pbitsize % BITS_PER_UNIT) == 0)
6535 *pmode = BLKmode;
6536 else
6537 *pmode = mode;
6538
6539 return exp;
6540 }
6541
6542 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6543 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6544 EXP is marked as PACKED. */
6545
6546 bool
6547 contains_packed_reference (const_tree exp)
6548 {
6549 bool packed_p = false;
6550
6551 while (1)
6552 {
6553 switch (TREE_CODE (exp))
6554 {
6555 case COMPONENT_REF:
6556 {
6557 tree field = TREE_OPERAND (exp, 1);
6558 packed_p = DECL_PACKED (field)
6559 || TYPE_PACKED (TREE_TYPE (field))
6560 || TYPE_PACKED (TREE_TYPE (exp));
6561 if (packed_p)
6562 goto done;
6563 }
6564 break;
6565
6566 case BIT_FIELD_REF:
6567 case ARRAY_REF:
6568 case ARRAY_RANGE_REF:
6569 case REALPART_EXPR:
6570 case IMAGPART_EXPR:
6571 case VIEW_CONVERT_EXPR:
6572 break;
6573
6574 default:
6575 goto done;
6576 }
6577 exp = TREE_OPERAND (exp, 0);
6578 }
6579 done:
6580 return packed_p;
6581 }
6582
6583 /* Return a tree of sizetype representing the size, in bytes, of the element
6584 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6585
6586 tree
6587 array_ref_element_size (tree exp)
6588 {
6589 tree aligned_size = TREE_OPERAND (exp, 3);
6590 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6591 location_t loc = EXPR_LOCATION (exp);
6592
6593 /* If a size was specified in the ARRAY_REF, it's the size measured
6594 in alignment units of the element type. So multiply by that value. */
6595 if (aligned_size)
6596 {
6597 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6598 sizetype from another type of the same width and signedness. */
6599 if (TREE_TYPE (aligned_size) != sizetype)
6600 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6601 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6602 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6603 }
6604
6605 /* Otherwise, take the size from that of the element type. Substitute
6606 any PLACEHOLDER_EXPR that we have. */
6607 else
6608 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6609 }
6610
6611 /* Return a tree representing the lower bound of the array mentioned in
6612 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6613
6614 tree
6615 array_ref_low_bound (tree exp)
6616 {
6617 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6618
6619 /* If a lower bound is specified in EXP, use it. */
6620 if (TREE_OPERAND (exp, 2))
6621 return TREE_OPERAND (exp, 2);
6622
6623 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6624 substituting for a PLACEHOLDER_EXPR as needed. */
6625 if (domain_type && TYPE_MIN_VALUE (domain_type))
6626 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6627
6628 /* Otherwise, return a zero of the appropriate type. */
6629 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6630 }
6631
6632 /* Return a tree representing the upper bound of the array mentioned in
6633 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6634
6635 tree
6636 array_ref_up_bound (tree exp)
6637 {
6638 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6639
6640 /* If there is a domain type and it has an upper bound, use it, substituting
6641 for a PLACEHOLDER_EXPR as needed. */
6642 if (domain_type && TYPE_MAX_VALUE (domain_type))
6643 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6644
6645 /* Otherwise fail. */
6646 return NULL_TREE;
6647 }
6648
6649 /* Return a tree representing the offset, in bytes, of the field referenced
6650 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6651
6652 tree
6653 component_ref_field_offset (tree exp)
6654 {
6655 tree aligned_offset = TREE_OPERAND (exp, 2);
6656 tree field = TREE_OPERAND (exp, 1);
6657 location_t loc = EXPR_LOCATION (exp);
6658
6659 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6660 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6661 value. */
6662 if (aligned_offset)
6663 {
6664 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6665 sizetype from another type of the same width and signedness. */
6666 if (TREE_TYPE (aligned_offset) != sizetype)
6667 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6668 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6669 size_int (DECL_OFFSET_ALIGN (field)
6670 / BITS_PER_UNIT));
6671 }
6672
6673 /* Otherwise, take the offset from that of the field. Substitute
6674 any PLACEHOLDER_EXPR that we have. */
6675 else
6676 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6677 }
6678
6679 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6680
6681 static unsigned HOST_WIDE_INT
6682 target_align (const_tree target)
6683 {
6684 /* We might have a chain of nested references with intermediate misaligning
6685 bitfields components, so need to recurse to find out. */
6686
6687 unsigned HOST_WIDE_INT this_align, outer_align;
6688
6689 switch (TREE_CODE (target))
6690 {
6691 case BIT_FIELD_REF:
6692 return 1;
6693
6694 case COMPONENT_REF:
6695 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6696 outer_align = target_align (TREE_OPERAND (target, 0));
6697 return MIN (this_align, outer_align);
6698
6699 case ARRAY_REF:
6700 case ARRAY_RANGE_REF:
6701 this_align = TYPE_ALIGN (TREE_TYPE (target));
6702 outer_align = target_align (TREE_OPERAND (target, 0));
6703 return MIN (this_align, outer_align);
6704
6705 CASE_CONVERT:
6706 case NON_LVALUE_EXPR:
6707 case VIEW_CONVERT_EXPR:
6708 this_align = TYPE_ALIGN (TREE_TYPE (target));
6709 outer_align = target_align (TREE_OPERAND (target, 0));
6710 return MAX (this_align, outer_align);
6711
6712 default:
6713 return TYPE_ALIGN (TREE_TYPE (target));
6714 }
6715 }
6716
6717 \f
6718 /* Given an rtx VALUE that may contain additions and multiplications, return
6719 an equivalent value that just refers to a register, memory, or constant.
6720 This is done by generating instructions to perform the arithmetic and
6721 returning a pseudo-register containing the value.
6722
6723 The returned value may be a REG, SUBREG, MEM or constant. */
6724
6725 rtx
6726 force_operand (rtx value, rtx target)
6727 {
6728 rtx op1, op2;
6729 /* Use subtarget as the target for operand 0 of a binary operation. */
6730 rtx subtarget = get_subtarget (target);
6731 enum rtx_code code = GET_CODE (value);
6732
6733 /* Check for subreg applied to an expression produced by loop optimizer. */
6734 if (code == SUBREG
6735 && !REG_P (SUBREG_REG (value))
6736 && !MEM_P (SUBREG_REG (value)))
6737 {
6738 value
6739 = simplify_gen_subreg (GET_MODE (value),
6740 force_reg (GET_MODE (SUBREG_REG (value)),
6741 force_operand (SUBREG_REG (value),
6742 NULL_RTX)),
6743 GET_MODE (SUBREG_REG (value)),
6744 SUBREG_BYTE (value));
6745 code = GET_CODE (value);
6746 }
6747
6748 /* Check for a PIC address load. */
6749 if ((code == PLUS || code == MINUS)
6750 && XEXP (value, 0) == pic_offset_table_rtx
6751 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6752 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6753 || GET_CODE (XEXP (value, 1)) == CONST))
6754 {
6755 if (!subtarget)
6756 subtarget = gen_reg_rtx (GET_MODE (value));
6757 emit_move_insn (subtarget, value);
6758 return subtarget;
6759 }
6760
6761 if (ARITHMETIC_P (value))
6762 {
6763 op2 = XEXP (value, 1);
6764 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6765 subtarget = 0;
6766 if (code == MINUS && CONST_INT_P (op2))
6767 {
6768 code = PLUS;
6769 op2 = negate_rtx (GET_MODE (value), op2);
6770 }
6771
6772 /* Check for an addition with OP2 a constant integer and our first
6773 operand a PLUS of a virtual register and something else. In that
6774 case, we want to emit the sum of the virtual register and the
6775 constant first and then add the other value. This allows virtual
6776 register instantiation to simply modify the constant rather than
6777 creating another one around this addition. */
6778 if (code == PLUS && CONST_INT_P (op2)
6779 && GET_CODE (XEXP (value, 0)) == PLUS
6780 && REG_P (XEXP (XEXP (value, 0), 0))
6781 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6782 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6783 {
6784 rtx temp = expand_simple_binop (GET_MODE (value), code,
6785 XEXP (XEXP (value, 0), 0), op2,
6786 subtarget, 0, OPTAB_LIB_WIDEN);
6787 return expand_simple_binop (GET_MODE (value), code, temp,
6788 force_operand (XEXP (XEXP (value,
6789 0), 1), 0),
6790 target, 0, OPTAB_LIB_WIDEN);
6791 }
6792
6793 op1 = force_operand (XEXP (value, 0), subtarget);
6794 op2 = force_operand (op2, NULL_RTX);
6795 switch (code)
6796 {
6797 case MULT:
6798 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6799 case DIV:
6800 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6801 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6802 target, 1, OPTAB_LIB_WIDEN);
6803 else
6804 return expand_divmod (0,
6805 FLOAT_MODE_P (GET_MODE (value))
6806 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6807 GET_MODE (value), op1, op2, target, 0);
6808 case MOD:
6809 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6810 target, 0);
6811 case UDIV:
6812 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6813 target, 1);
6814 case UMOD:
6815 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6816 target, 1);
6817 case ASHIFTRT:
6818 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6819 target, 0, OPTAB_LIB_WIDEN);
6820 default:
6821 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6822 target, 1, OPTAB_LIB_WIDEN);
6823 }
6824 }
6825 if (UNARY_P (value))
6826 {
6827 if (!target)
6828 target = gen_reg_rtx (GET_MODE (value));
6829 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6830 switch (code)
6831 {
6832 case ZERO_EXTEND:
6833 case SIGN_EXTEND:
6834 case TRUNCATE:
6835 case FLOAT_EXTEND:
6836 case FLOAT_TRUNCATE:
6837 convert_move (target, op1, code == ZERO_EXTEND);
6838 return target;
6839
6840 case FIX:
6841 case UNSIGNED_FIX:
6842 expand_fix (target, op1, code == UNSIGNED_FIX);
6843 return target;
6844
6845 case FLOAT:
6846 case UNSIGNED_FLOAT:
6847 expand_float (target, op1, code == UNSIGNED_FLOAT);
6848 return target;
6849
6850 default:
6851 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
6852 }
6853 }
6854
6855 #ifdef INSN_SCHEDULING
6856 /* On machines that have insn scheduling, we want all memory reference to be
6857 explicit, so we need to deal with such paradoxical SUBREGs. */
6858 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
6859 value
6860 = simplify_gen_subreg (GET_MODE (value),
6861 force_reg (GET_MODE (SUBREG_REG (value)),
6862 force_operand (SUBREG_REG (value),
6863 NULL_RTX)),
6864 GET_MODE (SUBREG_REG (value)),
6865 SUBREG_BYTE (value));
6866 #endif
6867
6868 return value;
6869 }
6870 \f
6871 /* Subroutine of expand_expr: return nonzero iff there is no way that
6872 EXP can reference X, which is being modified. TOP_P is nonzero if this
6873 call is going to be used to determine whether we need a temporary
6874 for EXP, as opposed to a recursive call to this function.
6875
6876 It is always safe for this routine to return zero since it merely
6877 searches for optimization opportunities. */
6878
6879 int
6880 safe_from_p (const_rtx x, tree exp, int top_p)
6881 {
6882 rtx exp_rtl = 0;
6883 int i, nops;
6884
6885 if (x == 0
6886 /* If EXP has varying size, we MUST use a target since we currently
6887 have no way of allocating temporaries of variable size
6888 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
6889 So we assume here that something at a higher level has prevented a
6890 clash. This is somewhat bogus, but the best we can do. Only
6891 do this when X is BLKmode and when we are at the top level. */
6892 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
6893 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
6894 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
6895 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
6896 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
6897 != INTEGER_CST)
6898 && GET_MODE (x) == BLKmode)
6899 /* If X is in the outgoing argument area, it is always safe. */
6900 || (MEM_P (x)
6901 && (XEXP (x, 0) == virtual_outgoing_args_rtx
6902 || (GET_CODE (XEXP (x, 0)) == PLUS
6903 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
6904 return 1;
6905
6906 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
6907 find the underlying pseudo. */
6908 if (GET_CODE (x) == SUBREG)
6909 {
6910 x = SUBREG_REG (x);
6911 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6912 return 0;
6913 }
6914
6915 /* Now look at our tree code and possibly recurse. */
6916 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
6917 {
6918 case tcc_declaration:
6919 exp_rtl = DECL_RTL_IF_SET (exp);
6920 break;
6921
6922 case tcc_constant:
6923 return 1;
6924
6925 case tcc_exceptional:
6926 if (TREE_CODE (exp) == TREE_LIST)
6927 {
6928 while (1)
6929 {
6930 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
6931 return 0;
6932 exp = TREE_CHAIN (exp);
6933 if (!exp)
6934 return 1;
6935 if (TREE_CODE (exp) != TREE_LIST)
6936 return safe_from_p (x, exp, 0);
6937 }
6938 }
6939 else if (TREE_CODE (exp) == CONSTRUCTOR)
6940 {
6941 constructor_elt *ce;
6942 unsigned HOST_WIDE_INT idx;
6943
6944 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
6945 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
6946 || !safe_from_p (x, ce->value, 0))
6947 return 0;
6948 return 1;
6949 }
6950 else if (TREE_CODE (exp) == ERROR_MARK)
6951 return 1; /* An already-visited SAVE_EXPR? */
6952 else
6953 return 0;
6954
6955 case tcc_statement:
6956 /* The only case we look at here is the DECL_INITIAL inside a
6957 DECL_EXPR. */
6958 return (TREE_CODE (exp) != DECL_EXPR
6959 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
6960 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
6961 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
6962
6963 case tcc_binary:
6964 case tcc_comparison:
6965 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
6966 return 0;
6967 /* Fall through. */
6968
6969 case tcc_unary:
6970 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6971
6972 case tcc_expression:
6973 case tcc_reference:
6974 case tcc_vl_exp:
6975 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
6976 the expression. If it is set, we conflict iff we are that rtx or
6977 both are in memory. Otherwise, we check all operands of the
6978 expression recursively. */
6979
6980 switch (TREE_CODE (exp))
6981 {
6982 case ADDR_EXPR:
6983 /* If the operand is static or we are static, we can't conflict.
6984 Likewise if we don't conflict with the operand at all. */
6985 if (staticp (TREE_OPERAND (exp, 0))
6986 || TREE_STATIC (exp)
6987 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
6988 return 1;
6989
6990 /* Otherwise, the only way this can conflict is if we are taking
6991 the address of a DECL a that address if part of X, which is
6992 very rare. */
6993 exp = TREE_OPERAND (exp, 0);
6994 if (DECL_P (exp))
6995 {
6996 if (!DECL_RTL_SET_P (exp)
6997 || !MEM_P (DECL_RTL (exp)))
6998 return 0;
6999 else
7000 exp_rtl = XEXP (DECL_RTL (exp), 0);
7001 }
7002 break;
7003
7004 case MEM_REF:
7005 if (MEM_P (x)
7006 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7007 get_alias_set (exp)))
7008 return 0;
7009 break;
7010
7011 case CALL_EXPR:
7012 /* Assume that the call will clobber all hard registers and
7013 all of memory. */
7014 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7015 || MEM_P (x))
7016 return 0;
7017 break;
7018
7019 case WITH_CLEANUP_EXPR:
7020 case CLEANUP_POINT_EXPR:
7021 /* Lowered by gimplify.c. */
7022 gcc_unreachable ();
7023
7024 case SAVE_EXPR:
7025 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7026
7027 default:
7028 break;
7029 }
7030
7031 /* If we have an rtx, we do not need to scan our operands. */
7032 if (exp_rtl)
7033 break;
7034
7035 nops = TREE_OPERAND_LENGTH (exp);
7036 for (i = 0; i < nops; i++)
7037 if (TREE_OPERAND (exp, i) != 0
7038 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7039 return 0;
7040
7041 break;
7042
7043 case tcc_type:
7044 /* Should never get a type here. */
7045 gcc_unreachable ();
7046 }
7047
7048 /* If we have an rtl, find any enclosed object. Then see if we conflict
7049 with it. */
7050 if (exp_rtl)
7051 {
7052 if (GET_CODE (exp_rtl) == SUBREG)
7053 {
7054 exp_rtl = SUBREG_REG (exp_rtl);
7055 if (REG_P (exp_rtl)
7056 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7057 return 0;
7058 }
7059
7060 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7061 are memory and they conflict. */
7062 return ! (rtx_equal_p (x, exp_rtl)
7063 || (MEM_P (x) && MEM_P (exp_rtl)
7064 && true_dependence (exp_rtl, VOIDmode, x,
7065 rtx_addr_varies_p)));
7066 }
7067
7068 /* If we reach here, it is safe. */
7069 return 1;
7070 }
7071
7072 \f
7073 /* Return the highest power of two that EXP is known to be a multiple of.
7074 This is used in updating alignment of MEMs in array references. */
7075
7076 unsigned HOST_WIDE_INT
7077 highest_pow2_factor (const_tree exp)
7078 {
7079 unsigned HOST_WIDE_INT c0, c1;
7080
7081 switch (TREE_CODE (exp))
7082 {
7083 case INTEGER_CST:
7084 /* We can find the lowest bit that's a one. If the low
7085 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7086 We need to handle this case since we can find it in a COND_EXPR,
7087 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7088 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7089 later ICE. */
7090 if (TREE_OVERFLOW (exp))
7091 return BIGGEST_ALIGNMENT;
7092 else
7093 {
7094 /* Note: tree_low_cst is intentionally not used here,
7095 we don't care about the upper bits. */
7096 c0 = TREE_INT_CST_LOW (exp);
7097 c0 &= -c0;
7098 return c0 ? c0 : BIGGEST_ALIGNMENT;
7099 }
7100 break;
7101
7102 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7103 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7104 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7105 return MIN (c0, c1);
7106
7107 case MULT_EXPR:
7108 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7109 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7110 return c0 * c1;
7111
7112 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7113 case CEIL_DIV_EXPR:
7114 if (integer_pow2p (TREE_OPERAND (exp, 1))
7115 && host_integerp (TREE_OPERAND (exp, 1), 1))
7116 {
7117 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7118 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7119 return MAX (1, c0 / c1);
7120 }
7121 break;
7122
7123 case BIT_AND_EXPR:
7124 /* The highest power of two of a bit-and expression is the maximum of
7125 that of its operands. We typically get here for a complex LHS and
7126 a constant negative power of two on the RHS to force an explicit
7127 alignment, so don't bother looking at the LHS. */
7128 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7129
7130 CASE_CONVERT:
7131 case SAVE_EXPR:
7132 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7133
7134 case COMPOUND_EXPR:
7135 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7136
7137 case COND_EXPR:
7138 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7139 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7140 return MIN (c0, c1);
7141
7142 default:
7143 break;
7144 }
7145
7146 return 1;
7147 }
7148
7149 /* Similar, except that the alignment requirements of TARGET are
7150 taken into account. Assume it is at least as aligned as its
7151 type, unless it is a COMPONENT_REF in which case the layout of
7152 the structure gives the alignment. */
7153
7154 static unsigned HOST_WIDE_INT
7155 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7156 {
7157 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7158 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7159
7160 return MAX (factor, talign);
7161 }
7162 \f
7163 /* Subroutine of expand_expr. Expand the two operands of a binary
7164 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7165 The value may be stored in TARGET if TARGET is nonzero. The
7166 MODIFIER argument is as documented by expand_expr. */
7167
7168 static void
7169 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7170 enum expand_modifier modifier)
7171 {
7172 if (! safe_from_p (target, exp1, 1))
7173 target = 0;
7174 if (operand_equal_p (exp0, exp1, 0))
7175 {
7176 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7177 *op1 = copy_rtx (*op0);
7178 }
7179 else
7180 {
7181 /* If we need to preserve evaluation order, copy exp0 into its own
7182 temporary variable so that it can't be clobbered by exp1. */
7183 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7184 exp0 = save_expr (exp0);
7185 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7186 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7187 }
7188 }
7189
7190 \f
7191 /* Return a MEM that contains constant EXP. DEFER is as for
7192 output_constant_def and MODIFIER is as for expand_expr. */
7193
7194 static rtx
7195 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7196 {
7197 rtx mem;
7198
7199 mem = output_constant_def (exp, defer);
7200 if (modifier != EXPAND_INITIALIZER)
7201 mem = use_anchored_address (mem);
7202 return mem;
7203 }
7204
7205 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7206 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7207
7208 static rtx
7209 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7210 enum expand_modifier modifier, addr_space_t as)
7211 {
7212 rtx result, subtarget;
7213 tree inner, offset;
7214 HOST_WIDE_INT bitsize, bitpos;
7215 int volatilep, unsignedp;
7216 enum machine_mode mode1;
7217
7218 /* If we are taking the address of a constant and are at the top level,
7219 we have to use output_constant_def since we can't call force_const_mem
7220 at top level. */
7221 /* ??? This should be considered a front-end bug. We should not be
7222 generating ADDR_EXPR of something that isn't an LVALUE. The only
7223 exception here is STRING_CST. */
7224 if (CONSTANT_CLASS_P (exp))
7225 return XEXP (expand_expr_constant (exp, 0, modifier), 0);
7226
7227 /* Everything must be something allowed by is_gimple_addressable. */
7228 switch (TREE_CODE (exp))
7229 {
7230 case INDIRECT_REF:
7231 /* This case will happen via recursion for &a->b. */
7232 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7233
7234 case MEM_REF:
7235 {
7236 tree tem = TREE_OPERAND (exp, 0);
7237 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7238 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7239 return expand_expr (tem, target, tmode, modifier);
7240 }
7241
7242 case CONST_DECL:
7243 /* Expand the initializer like constants above. */
7244 return XEXP (expand_expr_constant (DECL_INITIAL (exp), 0, modifier), 0);
7245
7246 case REALPART_EXPR:
7247 /* The real part of the complex number is always first, therefore
7248 the address is the same as the address of the parent object. */
7249 offset = 0;
7250 bitpos = 0;
7251 inner = TREE_OPERAND (exp, 0);
7252 break;
7253
7254 case IMAGPART_EXPR:
7255 /* The imaginary part of the complex number is always second.
7256 The expression is therefore always offset by the size of the
7257 scalar type. */
7258 offset = 0;
7259 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7260 inner = TREE_OPERAND (exp, 0);
7261 break;
7262
7263 default:
7264 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7265 expand_expr, as that can have various side effects; LABEL_DECLs for
7266 example, may not have their DECL_RTL set yet. Expand the rtl of
7267 CONSTRUCTORs too, which should yield a memory reference for the
7268 constructor's contents. Assume language specific tree nodes can
7269 be expanded in some interesting way. */
7270 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7271 if (DECL_P (exp)
7272 || TREE_CODE (exp) == CONSTRUCTOR
7273 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7274 {
7275 result = expand_expr (exp, target, tmode,
7276 modifier == EXPAND_INITIALIZER
7277 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7278
7279 /* If the DECL isn't in memory, then the DECL wasn't properly
7280 marked TREE_ADDRESSABLE, which will be either a front-end
7281 or a tree optimizer bug. */
7282
7283 if (TREE_ADDRESSABLE (exp)
7284 && ! MEM_P (result)
7285 && ! targetm.calls.allocate_stack_slots_for_args())
7286 {
7287 error ("local frame unavailable (naked function?)");
7288 return result;
7289 }
7290 else
7291 gcc_assert (MEM_P (result));
7292 result = XEXP (result, 0);
7293
7294 /* ??? Is this needed anymore? */
7295 if (DECL_P (exp) && !TREE_USED (exp) == 0)
7296 {
7297 assemble_external (exp);
7298 TREE_USED (exp) = 1;
7299 }
7300
7301 if (modifier != EXPAND_INITIALIZER
7302 && modifier != EXPAND_CONST_ADDRESS)
7303 result = force_operand (result, target);
7304 return result;
7305 }
7306
7307 /* Pass FALSE as the last argument to get_inner_reference although
7308 we are expanding to RTL. The rationale is that we know how to
7309 handle "aligning nodes" here: we can just bypass them because
7310 they won't change the final object whose address will be returned
7311 (they actually exist only for that purpose). */
7312 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7313 &mode1, &unsignedp, &volatilep, false);
7314 break;
7315 }
7316
7317 /* We must have made progress. */
7318 gcc_assert (inner != exp);
7319
7320 subtarget = offset || bitpos ? NULL_RTX : target;
7321 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7322 inner alignment, force the inner to be sufficiently aligned. */
7323 if (CONSTANT_CLASS_P (inner)
7324 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7325 {
7326 inner = copy_node (inner);
7327 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7328 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7329 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7330 }
7331 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7332
7333 if (offset)
7334 {
7335 rtx tmp;
7336
7337 if (modifier != EXPAND_NORMAL)
7338 result = force_operand (result, NULL);
7339 tmp = expand_expr (offset, NULL_RTX, tmode,
7340 modifier == EXPAND_INITIALIZER
7341 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7342
7343 result = convert_memory_address_addr_space (tmode, result, as);
7344 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7345
7346 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7347 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7348 else
7349 {
7350 subtarget = bitpos ? NULL_RTX : target;
7351 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7352 1, OPTAB_LIB_WIDEN);
7353 }
7354 }
7355
7356 if (bitpos)
7357 {
7358 /* Someone beforehand should have rejected taking the address
7359 of such an object. */
7360 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7361
7362 result = plus_constant (result, bitpos / BITS_PER_UNIT);
7363 if (modifier < EXPAND_SUM)
7364 result = force_operand (result, target);
7365 }
7366
7367 return result;
7368 }
7369
7370 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7371 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7372
7373 static rtx
7374 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7375 enum expand_modifier modifier)
7376 {
7377 addr_space_t as = ADDR_SPACE_GENERIC;
7378 enum machine_mode address_mode = Pmode;
7379 enum machine_mode pointer_mode = ptr_mode;
7380 enum machine_mode rmode;
7381 rtx result;
7382
7383 /* Target mode of VOIDmode says "whatever's natural". */
7384 if (tmode == VOIDmode)
7385 tmode = TYPE_MODE (TREE_TYPE (exp));
7386
7387 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7388 {
7389 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7390 address_mode = targetm.addr_space.address_mode (as);
7391 pointer_mode = targetm.addr_space.pointer_mode (as);
7392 }
7393
7394 /* We can get called with some Weird Things if the user does silliness
7395 like "(short) &a". In that case, convert_memory_address won't do
7396 the right thing, so ignore the given target mode. */
7397 if (tmode != address_mode && tmode != pointer_mode)
7398 tmode = address_mode;
7399
7400 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7401 tmode, modifier, as);
7402
7403 /* Despite expand_expr claims concerning ignoring TMODE when not
7404 strictly convenient, stuff breaks if we don't honor it. Note
7405 that combined with the above, we only do this for pointer modes. */
7406 rmode = GET_MODE (result);
7407 if (rmode == VOIDmode)
7408 rmode = tmode;
7409 if (rmode != tmode)
7410 result = convert_memory_address_addr_space (tmode, result, as);
7411
7412 return result;
7413 }
7414
7415 /* Generate code for computing CONSTRUCTOR EXP.
7416 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7417 is TRUE, instead of creating a temporary variable in memory
7418 NULL is returned and the caller needs to handle it differently. */
7419
7420 static rtx
7421 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7422 bool avoid_temp_mem)
7423 {
7424 tree type = TREE_TYPE (exp);
7425 enum machine_mode mode = TYPE_MODE (type);
7426
7427 /* Try to avoid creating a temporary at all. This is possible
7428 if all of the initializer is zero.
7429 FIXME: try to handle all [0..255] initializers we can handle
7430 with memset. */
7431 if (TREE_STATIC (exp)
7432 && !TREE_ADDRESSABLE (exp)
7433 && target != 0 && mode == BLKmode
7434 && all_zeros_p (exp))
7435 {
7436 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7437 return target;
7438 }
7439
7440 /* All elts simple constants => refer to a constant in memory. But
7441 if this is a non-BLKmode mode, let it store a field at a time
7442 since that should make a CONST_INT or CONST_DOUBLE when we
7443 fold. Likewise, if we have a target we can use, it is best to
7444 store directly into the target unless the type is large enough
7445 that memcpy will be used. If we are making an initializer and
7446 all operands are constant, put it in memory as well.
7447
7448 FIXME: Avoid trying to fill vector constructors piece-meal.
7449 Output them with output_constant_def below unless we're sure
7450 they're zeros. This should go away when vector initializers
7451 are treated like VECTOR_CST instead of arrays. */
7452 if ((TREE_STATIC (exp)
7453 && ((mode == BLKmode
7454 && ! (target != 0 && safe_from_p (target, exp, 1)))
7455 || TREE_ADDRESSABLE (exp)
7456 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7457 && (! MOVE_BY_PIECES_P
7458 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7459 TYPE_ALIGN (type)))
7460 && ! mostly_zeros_p (exp))))
7461 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7462 && TREE_CONSTANT (exp)))
7463 {
7464 rtx constructor;
7465
7466 if (avoid_temp_mem)
7467 return NULL_RTX;
7468
7469 constructor = expand_expr_constant (exp, 1, modifier);
7470
7471 if (modifier != EXPAND_CONST_ADDRESS
7472 && modifier != EXPAND_INITIALIZER
7473 && modifier != EXPAND_SUM)
7474 constructor = validize_mem (constructor);
7475
7476 return constructor;
7477 }
7478
7479 /* Handle calls that pass values in multiple non-contiguous
7480 locations. The Irix 6 ABI has examples of this. */
7481 if (target == 0 || ! safe_from_p (target, exp, 1)
7482 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7483 {
7484 if (avoid_temp_mem)
7485 return NULL_RTX;
7486
7487 target
7488 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7489 | (TREE_READONLY (exp)
7490 * TYPE_QUAL_CONST))),
7491 0, TREE_ADDRESSABLE (exp), 1);
7492 }
7493
7494 store_constructor (exp, target, 0, int_expr_size (exp));
7495 return target;
7496 }
7497
7498
7499 /* expand_expr: generate code for computing expression EXP.
7500 An rtx for the computed value is returned. The value is never null.
7501 In the case of a void EXP, const0_rtx is returned.
7502
7503 The value may be stored in TARGET if TARGET is nonzero.
7504 TARGET is just a suggestion; callers must assume that
7505 the rtx returned may not be the same as TARGET.
7506
7507 If TARGET is CONST0_RTX, it means that the value will be ignored.
7508
7509 If TMODE is not VOIDmode, it suggests generating the
7510 result in mode TMODE. But this is done only when convenient.
7511 Otherwise, TMODE is ignored and the value generated in its natural mode.
7512 TMODE is just a suggestion; callers must assume that
7513 the rtx returned may not have mode TMODE.
7514
7515 Note that TARGET may have neither TMODE nor MODE. In that case, it
7516 probably will not be used.
7517
7518 If MODIFIER is EXPAND_SUM then when EXP is an addition
7519 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7520 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7521 products as above, or REG or MEM, or constant.
7522 Ordinarily in such cases we would output mul or add instructions
7523 and then return a pseudo reg containing the sum.
7524
7525 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7526 it also marks a label as absolutely required (it can't be dead).
7527 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7528 This is used for outputting expressions used in initializers.
7529
7530 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7531 with a constant address even if that address is not normally legitimate.
7532 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7533
7534 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7535 a call parameter. Such targets require special care as we haven't yet
7536 marked TARGET so that it's safe from being trashed by libcalls. We
7537 don't want to use TARGET for anything but the final result;
7538 Intermediate values must go elsewhere. Additionally, calls to
7539 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7540
7541 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7542 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7543 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7544 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7545 recursively. */
7546
7547 rtx
7548 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7549 enum expand_modifier modifier, rtx *alt_rtl)
7550 {
7551 rtx ret;
7552
7553 /* Handle ERROR_MARK before anybody tries to access its type. */
7554 if (TREE_CODE (exp) == ERROR_MARK
7555 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7556 {
7557 ret = CONST0_RTX (tmode);
7558 return ret ? ret : const0_rtx;
7559 }
7560
7561 /* If this is an expression of some kind and it has an associated line
7562 number, then emit the line number before expanding the expression.
7563
7564 We need to save and restore the file and line information so that
7565 errors discovered during expansion are emitted with the right
7566 information. It would be better of the diagnostic routines
7567 used the file/line information embedded in the tree nodes rather
7568 than globals. */
7569 if (cfun && EXPR_HAS_LOCATION (exp))
7570 {
7571 location_t saved_location = input_location;
7572 location_t saved_curr_loc = get_curr_insn_source_location ();
7573 tree saved_block = get_curr_insn_block ();
7574 input_location = EXPR_LOCATION (exp);
7575 set_curr_insn_source_location (input_location);
7576
7577 /* Record where the insns produced belong. */
7578 set_curr_insn_block (TREE_BLOCK (exp));
7579
7580 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7581
7582 input_location = saved_location;
7583 set_curr_insn_block (saved_block);
7584 set_curr_insn_source_location (saved_curr_loc);
7585 }
7586 else
7587 {
7588 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7589 }
7590
7591 return ret;
7592 }
7593
7594 rtx
7595 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7596 enum expand_modifier modifier)
7597 {
7598 rtx op0, op1, op2, temp;
7599 tree type;
7600 int unsignedp;
7601 enum machine_mode mode;
7602 enum tree_code code = ops->code;
7603 optab this_optab;
7604 rtx subtarget, original_target;
7605 int ignore;
7606 bool reduce_bit_field;
7607 location_t loc = ops->location;
7608 tree treeop0, treeop1, treeop2;
7609 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7610 ? reduce_to_bit_field_precision ((expr), \
7611 target, \
7612 type) \
7613 : (expr))
7614
7615 type = ops->type;
7616 mode = TYPE_MODE (type);
7617 unsignedp = TYPE_UNSIGNED (type);
7618
7619 treeop0 = ops->op0;
7620 treeop1 = ops->op1;
7621 treeop2 = ops->op2;
7622
7623 /* We should be called only on simple (binary or unary) expressions,
7624 exactly those that are valid in gimple expressions that aren't
7625 GIMPLE_SINGLE_RHS (or invalid). */
7626 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7627 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7628 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7629
7630 ignore = (target == const0_rtx
7631 || ((CONVERT_EXPR_CODE_P (code)
7632 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7633 && TREE_CODE (type) == VOID_TYPE));
7634
7635 /* We should be called only if we need the result. */
7636 gcc_assert (!ignore);
7637
7638 /* An operation in what may be a bit-field type needs the
7639 result to be reduced to the precision of the bit-field type,
7640 which is narrower than that of the type's mode. */
7641 reduce_bit_field = (INTEGRAL_TYPE_P (type)
7642 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7643
7644 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7645 target = 0;
7646
7647 /* Use subtarget as the target for operand 0 of a binary operation. */
7648 subtarget = get_subtarget (target);
7649 original_target = target;
7650
7651 switch (code)
7652 {
7653 case NON_LVALUE_EXPR:
7654 case PAREN_EXPR:
7655 CASE_CONVERT:
7656 if (treeop0 == error_mark_node)
7657 return const0_rtx;
7658
7659 if (TREE_CODE (type) == UNION_TYPE)
7660 {
7661 tree valtype = TREE_TYPE (treeop0);
7662
7663 /* If both input and output are BLKmode, this conversion isn't doing
7664 anything except possibly changing memory attribute. */
7665 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7666 {
7667 rtx result = expand_expr (treeop0, target, tmode,
7668 modifier);
7669
7670 result = copy_rtx (result);
7671 set_mem_attributes (result, type, 0);
7672 return result;
7673 }
7674
7675 if (target == 0)
7676 {
7677 if (TYPE_MODE (type) != BLKmode)
7678 target = gen_reg_rtx (TYPE_MODE (type));
7679 else
7680 target = assign_temp (type, 0, 1, 1);
7681 }
7682
7683 if (MEM_P (target))
7684 /* Store data into beginning of memory target. */
7685 store_expr (treeop0,
7686 adjust_address (target, TYPE_MODE (valtype), 0),
7687 modifier == EXPAND_STACK_PARM,
7688 false);
7689
7690 else
7691 {
7692 gcc_assert (REG_P (target));
7693
7694 /* Store this field into a union of the proper type. */
7695 store_field (target,
7696 MIN ((int_size_in_bytes (TREE_TYPE
7697 (treeop0))
7698 * BITS_PER_UNIT),
7699 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7700 0, 0, 0, TYPE_MODE (valtype), treeop0,
7701 type, 0, false);
7702 }
7703
7704 /* Return the entire union. */
7705 return target;
7706 }
7707
7708 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
7709 {
7710 op0 = expand_expr (treeop0, target, VOIDmode,
7711 modifier);
7712
7713 /* If the signedness of the conversion differs and OP0 is
7714 a promoted SUBREG, clear that indication since we now
7715 have to do the proper extension. */
7716 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
7717 && GET_CODE (op0) == SUBREG)
7718 SUBREG_PROMOTED_VAR_P (op0) = 0;
7719
7720 return REDUCE_BIT_FIELD (op0);
7721 }
7722
7723 op0 = expand_expr (treeop0, NULL_RTX, mode,
7724 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
7725 if (GET_MODE (op0) == mode)
7726 ;
7727
7728 /* If OP0 is a constant, just convert it into the proper mode. */
7729 else if (CONSTANT_P (op0))
7730 {
7731 tree inner_type = TREE_TYPE (treeop0);
7732 enum machine_mode inner_mode = GET_MODE (op0);
7733
7734 if (inner_mode == VOIDmode)
7735 inner_mode = TYPE_MODE (inner_type);
7736
7737 if (modifier == EXPAND_INITIALIZER)
7738 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7739 subreg_lowpart_offset (mode,
7740 inner_mode));
7741 else
7742 op0= convert_modes (mode, inner_mode, op0,
7743 TYPE_UNSIGNED (inner_type));
7744 }
7745
7746 else if (modifier == EXPAND_INITIALIZER)
7747 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7748
7749 else if (target == 0)
7750 op0 = convert_to_mode (mode, op0,
7751 TYPE_UNSIGNED (TREE_TYPE
7752 (treeop0)));
7753 else
7754 {
7755 convert_move (target, op0,
7756 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7757 op0 = target;
7758 }
7759
7760 return REDUCE_BIT_FIELD (op0);
7761
7762 case ADDR_SPACE_CONVERT_EXPR:
7763 {
7764 tree treeop0_type = TREE_TYPE (treeop0);
7765 addr_space_t as_to;
7766 addr_space_t as_from;
7767
7768 gcc_assert (POINTER_TYPE_P (type));
7769 gcc_assert (POINTER_TYPE_P (treeop0_type));
7770
7771 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
7772 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
7773
7774 /* Conversions between pointers to the same address space should
7775 have been implemented via CONVERT_EXPR / NOP_EXPR. */
7776 gcc_assert (as_to != as_from);
7777
7778 /* Ask target code to handle conversion between pointers
7779 to overlapping address spaces. */
7780 if (targetm.addr_space.subset_p (as_to, as_from)
7781 || targetm.addr_space.subset_p (as_from, as_to))
7782 {
7783 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
7784 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
7785 gcc_assert (op0);
7786 return op0;
7787 }
7788
7789 /* For disjoint address spaces, converting anything but
7790 a null pointer invokes undefined behaviour. We simply
7791 always return a null pointer here. */
7792 return CONST0_RTX (mode);
7793 }
7794
7795 case POINTER_PLUS_EXPR:
7796 /* Even though the sizetype mode and the pointer's mode can be different
7797 expand is able to handle this correctly and get the correct result out
7798 of the PLUS_EXPR code. */
7799 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
7800 if sizetype precision is smaller than pointer precision. */
7801 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
7802 treeop1 = fold_convert_loc (loc, type,
7803 fold_convert_loc (loc, ssizetype,
7804 treeop1));
7805 case PLUS_EXPR:
7806 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7807 something else, make sure we add the register to the constant and
7808 then to the other thing. This case can occur during strength
7809 reduction and doing it this way will produce better code if the
7810 frame pointer or argument pointer is eliminated.
7811
7812 fold-const.c will ensure that the constant is always in the inner
7813 PLUS_EXPR, so the only case we need to do anything about is if
7814 sp, ap, or fp is our second argument, in which case we must swap
7815 the innermost first argument and our second argument. */
7816
7817 if (TREE_CODE (treeop0) == PLUS_EXPR
7818 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
7819 && TREE_CODE (treeop1) == VAR_DECL
7820 && (DECL_RTL (treeop1) == frame_pointer_rtx
7821 || DECL_RTL (treeop1) == stack_pointer_rtx
7822 || DECL_RTL (treeop1) == arg_pointer_rtx))
7823 {
7824 tree t = treeop1;
7825
7826 treeop1 = TREE_OPERAND (treeop0, 0);
7827 TREE_OPERAND (treeop0, 0) = t;
7828 }
7829
7830 /* If the result is to be ptr_mode and we are adding an integer to
7831 something, we might be forming a constant. So try to use
7832 plus_constant. If it produces a sum and we can't accept it,
7833 use force_operand. This allows P = &ARR[const] to generate
7834 efficient code on machines where a SYMBOL_REF is not a valid
7835 address.
7836
7837 If this is an EXPAND_SUM call, always return the sum. */
7838 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7839 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
7840 {
7841 if (modifier == EXPAND_STACK_PARM)
7842 target = 0;
7843 if (TREE_CODE (treeop0) == INTEGER_CST
7844 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7845 && TREE_CONSTANT (treeop1))
7846 {
7847 rtx constant_part;
7848
7849 op1 = expand_expr (treeop1, subtarget, VOIDmode,
7850 EXPAND_SUM);
7851 /* Use immed_double_const to ensure that the constant is
7852 truncated according to the mode of OP1, then sign extended
7853 to a HOST_WIDE_INT. Using the constant directly can result
7854 in non-canonical RTL in a 64x32 cross compile. */
7855 constant_part
7856 = immed_double_const (TREE_INT_CST_LOW (treeop0),
7857 (HOST_WIDE_INT) 0,
7858 TYPE_MODE (TREE_TYPE (treeop1)));
7859 op1 = plus_constant (op1, INTVAL (constant_part));
7860 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7861 op1 = force_operand (op1, target);
7862 return REDUCE_BIT_FIELD (op1);
7863 }
7864
7865 else if (TREE_CODE (treeop1) == INTEGER_CST
7866 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
7867 && TREE_CONSTANT (treeop0))
7868 {
7869 rtx constant_part;
7870
7871 op0 = expand_expr (treeop0, subtarget, VOIDmode,
7872 (modifier == EXPAND_INITIALIZER
7873 ? EXPAND_INITIALIZER : EXPAND_SUM));
7874 if (! CONSTANT_P (op0))
7875 {
7876 op1 = expand_expr (treeop1, NULL_RTX,
7877 VOIDmode, modifier);
7878 /* Return a PLUS if modifier says it's OK. */
7879 if (modifier == EXPAND_SUM
7880 || modifier == EXPAND_INITIALIZER)
7881 return simplify_gen_binary (PLUS, mode, op0, op1);
7882 goto binop2;
7883 }
7884 /* Use immed_double_const to ensure that the constant is
7885 truncated according to the mode of OP1, then sign extended
7886 to a HOST_WIDE_INT. Using the constant directly can result
7887 in non-canonical RTL in a 64x32 cross compile. */
7888 constant_part
7889 = immed_double_const (TREE_INT_CST_LOW (treeop1),
7890 (HOST_WIDE_INT) 0,
7891 TYPE_MODE (TREE_TYPE (treeop0)));
7892 op0 = plus_constant (op0, INTVAL (constant_part));
7893 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7894 op0 = force_operand (op0, target);
7895 return REDUCE_BIT_FIELD (op0);
7896 }
7897 }
7898
7899 /* Use TER to expand pointer addition of a negated value
7900 as pointer subtraction. */
7901 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
7902 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
7903 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
7904 && TREE_CODE (treeop1) == SSA_NAME
7905 && TYPE_MODE (TREE_TYPE (treeop0))
7906 == TYPE_MODE (TREE_TYPE (treeop1)))
7907 {
7908 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
7909 if (def)
7910 {
7911 treeop1 = gimple_assign_rhs1 (def);
7912 code = MINUS_EXPR;
7913 goto do_minus;
7914 }
7915 }
7916
7917 /* No sense saving up arithmetic to be done
7918 if it's all in the wrong mode to form part of an address.
7919 And force_operand won't know whether to sign-extend or
7920 zero-extend. */
7921 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7922 || mode != ptr_mode)
7923 {
7924 expand_operands (treeop0, treeop1,
7925 subtarget, &op0, &op1, EXPAND_NORMAL);
7926 if (op0 == const0_rtx)
7927 return op1;
7928 if (op1 == const0_rtx)
7929 return op0;
7930 goto binop2;
7931 }
7932
7933 expand_operands (treeop0, treeop1,
7934 subtarget, &op0, &op1, modifier);
7935 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7936
7937 case MINUS_EXPR:
7938 do_minus:
7939 /* For initializers, we are allowed to return a MINUS of two
7940 symbolic constants. Here we handle all cases when both operands
7941 are constant. */
7942 /* Handle difference of two symbolic constants,
7943 for the sake of an initializer. */
7944 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7945 && really_constant_p (treeop0)
7946 && really_constant_p (treeop1))
7947 {
7948 expand_operands (treeop0, treeop1,
7949 NULL_RTX, &op0, &op1, modifier);
7950
7951 /* If the last operand is a CONST_INT, use plus_constant of
7952 the negated constant. Else make the MINUS. */
7953 if (CONST_INT_P (op1))
7954 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
7955 else
7956 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
7957 }
7958
7959 /* No sense saving up arithmetic to be done
7960 if it's all in the wrong mode to form part of an address.
7961 And force_operand won't know whether to sign-extend or
7962 zero-extend. */
7963 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7964 || mode != ptr_mode)
7965 goto binop;
7966
7967 expand_operands (treeop0, treeop1,
7968 subtarget, &op0, &op1, modifier);
7969
7970 /* Convert A - const to A + (-const). */
7971 if (CONST_INT_P (op1))
7972 {
7973 op1 = negate_rtx (mode, op1);
7974 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7975 }
7976
7977 goto binop2;
7978
7979 case WIDEN_MULT_PLUS_EXPR:
7980 case WIDEN_MULT_MINUS_EXPR:
7981 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
7982 op2 = expand_normal (treeop2);
7983 target = expand_widen_pattern_expr (ops, op0, op1, op2,
7984 target, unsignedp);
7985 return target;
7986
7987 case WIDEN_MULT_EXPR:
7988 /* If first operand is constant, swap them.
7989 Thus the following special case checks need only
7990 check the second operand. */
7991 if (TREE_CODE (treeop0) == INTEGER_CST)
7992 {
7993 tree t1 = treeop0;
7994 treeop0 = treeop1;
7995 treeop1 = t1;
7996 }
7997
7998 /* First, check if we have a multiplication of one signed and one
7999 unsigned operand. */
8000 if (TREE_CODE (treeop1) != INTEGER_CST
8001 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8002 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8003 {
8004 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8005 this_optab = usmul_widen_optab;
8006 if (mode == GET_MODE_2XWIDER_MODE (innermode))
8007 {
8008 if (widening_optab_handler (this_optab, mode, innermode)
8009 != CODE_FOR_nothing)
8010 {
8011 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8012 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8013 EXPAND_NORMAL);
8014 else
8015 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8016 EXPAND_NORMAL);
8017 goto binop3;
8018 }
8019 }
8020 }
8021 /* Check for a multiplication with matching signedness. */
8022 else if ((TREE_CODE (treeop1) == INTEGER_CST
8023 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8024 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8025 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8026 {
8027 tree op0type = TREE_TYPE (treeop0);
8028 enum machine_mode innermode = TYPE_MODE (op0type);
8029 bool zextend_p = TYPE_UNSIGNED (op0type);
8030 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8031 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8032
8033 if (mode == GET_MODE_2XWIDER_MODE (innermode)
8034 && TREE_CODE (treeop0) != INTEGER_CST)
8035 {
8036 if (widening_optab_handler (this_optab, mode, innermode)
8037 != CODE_FOR_nothing)
8038 {
8039 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8040 EXPAND_NORMAL);
8041 temp = expand_widening_mult (mode, op0, op1, target,
8042 unsignedp, this_optab);
8043 return REDUCE_BIT_FIELD (temp);
8044 }
8045 if (widening_optab_handler (other_optab, mode, innermode)
8046 != CODE_FOR_nothing
8047 && innermode == word_mode)
8048 {
8049 rtx htem, hipart;
8050 op0 = expand_normal (treeop0);
8051 if (TREE_CODE (treeop1) == INTEGER_CST)
8052 op1 = convert_modes (innermode, mode,
8053 expand_normal (treeop1), unsignedp);
8054 else
8055 op1 = expand_normal (treeop1);
8056 temp = expand_binop (mode, other_optab, op0, op1, target,
8057 unsignedp, OPTAB_LIB_WIDEN);
8058 hipart = gen_highpart (innermode, temp);
8059 htem = expand_mult_highpart_adjust (innermode, hipart,
8060 op0, op1, hipart,
8061 zextend_p);
8062 if (htem != hipart)
8063 emit_move_insn (hipart, htem);
8064 return REDUCE_BIT_FIELD (temp);
8065 }
8066 }
8067 }
8068 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8069 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8070 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8071 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8072
8073 case FMA_EXPR:
8074 {
8075 optab opt = fma_optab;
8076 gimple def0, def2;
8077
8078 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8079 call. */
8080 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8081 {
8082 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8083 tree call_expr;
8084
8085 gcc_assert (fn != NULL_TREE);
8086 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8087 return expand_builtin (call_expr, target, subtarget, mode, false);
8088 }
8089
8090 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8091 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8092
8093 op0 = op2 = NULL;
8094
8095 if (def0 && def2
8096 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8097 {
8098 opt = fnms_optab;
8099 op0 = expand_normal (gimple_assign_rhs1 (def0));
8100 op2 = expand_normal (gimple_assign_rhs1 (def2));
8101 }
8102 else if (def0
8103 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8104 {
8105 opt = fnma_optab;
8106 op0 = expand_normal (gimple_assign_rhs1 (def0));
8107 }
8108 else if (def2
8109 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8110 {
8111 opt = fms_optab;
8112 op2 = expand_normal (gimple_assign_rhs1 (def2));
8113 }
8114
8115 if (op0 == NULL)
8116 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8117 if (op2 == NULL)
8118 op2 = expand_normal (treeop2);
8119 op1 = expand_normal (treeop1);
8120
8121 return expand_ternary_op (TYPE_MODE (type), opt,
8122 op0, op1, op2, target, 0);
8123 }
8124
8125 case MULT_EXPR:
8126 /* If this is a fixed-point operation, then we cannot use the code
8127 below because "expand_mult" doesn't support sat/no-sat fixed-point
8128 multiplications. */
8129 if (ALL_FIXED_POINT_MODE_P (mode))
8130 goto binop;
8131
8132 /* If first operand is constant, swap them.
8133 Thus the following special case checks need only
8134 check the second operand. */
8135 if (TREE_CODE (treeop0) == INTEGER_CST)
8136 {
8137 tree t1 = treeop0;
8138 treeop0 = treeop1;
8139 treeop1 = t1;
8140 }
8141
8142 /* Attempt to return something suitable for generating an
8143 indexed address, for machines that support that. */
8144
8145 if (modifier == EXPAND_SUM && mode == ptr_mode
8146 && host_integerp (treeop1, 0))
8147 {
8148 tree exp1 = treeop1;
8149
8150 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8151 EXPAND_SUM);
8152
8153 if (!REG_P (op0))
8154 op0 = force_operand (op0, NULL_RTX);
8155 if (!REG_P (op0))
8156 op0 = copy_to_mode_reg (mode, op0);
8157
8158 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8159 gen_int_mode (tree_low_cst (exp1, 0),
8160 TYPE_MODE (TREE_TYPE (exp1)))));
8161 }
8162
8163 if (modifier == EXPAND_STACK_PARM)
8164 target = 0;
8165
8166 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8167 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8168
8169 case TRUNC_DIV_EXPR:
8170 case FLOOR_DIV_EXPR:
8171 case CEIL_DIV_EXPR:
8172 case ROUND_DIV_EXPR:
8173 case EXACT_DIV_EXPR:
8174 /* If this is a fixed-point operation, then we cannot use the code
8175 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8176 divisions. */
8177 if (ALL_FIXED_POINT_MODE_P (mode))
8178 goto binop;
8179
8180 if (modifier == EXPAND_STACK_PARM)
8181 target = 0;
8182 /* Possible optimization: compute the dividend with EXPAND_SUM
8183 then if the divisor is constant can optimize the case
8184 where some terms of the dividend have coeffs divisible by it. */
8185 expand_operands (treeop0, treeop1,
8186 subtarget, &op0, &op1, EXPAND_NORMAL);
8187 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8188
8189 case RDIV_EXPR:
8190 goto binop;
8191
8192 case TRUNC_MOD_EXPR:
8193 case FLOOR_MOD_EXPR:
8194 case CEIL_MOD_EXPR:
8195 case ROUND_MOD_EXPR:
8196 if (modifier == EXPAND_STACK_PARM)
8197 target = 0;
8198 expand_operands (treeop0, treeop1,
8199 subtarget, &op0, &op1, EXPAND_NORMAL);
8200 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8201
8202 case FIXED_CONVERT_EXPR:
8203 op0 = expand_normal (treeop0);
8204 if (target == 0 || modifier == EXPAND_STACK_PARM)
8205 target = gen_reg_rtx (mode);
8206
8207 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8208 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8209 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8210 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8211 else
8212 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8213 return target;
8214
8215 case FIX_TRUNC_EXPR:
8216 op0 = expand_normal (treeop0);
8217 if (target == 0 || modifier == EXPAND_STACK_PARM)
8218 target = gen_reg_rtx (mode);
8219 expand_fix (target, op0, unsignedp);
8220 return target;
8221
8222 case FLOAT_EXPR:
8223 op0 = expand_normal (treeop0);
8224 if (target == 0 || modifier == EXPAND_STACK_PARM)
8225 target = gen_reg_rtx (mode);
8226 /* expand_float can't figure out what to do if FROM has VOIDmode.
8227 So give it the correct mode. With -O, cse will optimize this. */
8228 if (GET_MODE (op0) == VOIDmode)
8229 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8230 op0);
8231 expand_float (target, op0,
8232 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8233 return target;
8234
8235 case NEGATE_EXPR:
8236 op0 = expand_expr (treeop0, subtarget,
8237 VOIDmode, EXPAND_NORMAL);
8238 if (modifier == EXPAND_STACK_PARM)
8239 target = 0;
8240 temp = expand_unop (mode,
8241 optab_for_tree_code (NEGATE_EXPR, type,
8242 optab_default),
8243 op0, target, 0);
8244 gcc_assert (temp);
8245 return REDUCE_BIT_FIELD (temp);
8246
8247 case ABS_EXPR:
8248 op0 = expand_expr (treeop0, subtarget,
8249 VOIDmode, EXPAND_NORMAL);
8250 if (modifier == EXPAND_STACK_PARM)
8251 target = 0;
8252
8253 /* ABS_EXPR is not valid for complex arguments. */
8254 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8255 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8256
8257 /* Unsigned abs is simply the operand. Testing here means we don't
8258 risk generating incorrect code below. */
8259 if (TYPE_UNSIGNED (type))
8260 return op0;
8261
8262 return expand_abs (mode, op0, target, unsignedp,
8263 safe_from_p (target, treeop0, 1));
8264
8265 case MAX_EXPR:
8266 case MIN_EXPR:
8267 target = original_target;
8268 if (target == 0
8269 || modifier == EXPAND_STACK_PARM
8270 || (MEM_P (target) && MEM_VOLATILE_P (target))
8271 || GET_MODE (target) != mode
8272 || (REG_P (target)
8273 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8274 target = gen_reg_rtx (mode);
8275 expand_operands (treeop0, treeop1,
8276 target, &op0, &op1, EXPAND_NORMAL);
8277
8278 /* First try to do it with a special MIN or MAX instruction.
8279 If that does not win, use a conditional jump to select the proper
8280 value. */
8281 this_optab = optab_for_tree_code (code, type, optab_default);
8282 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8283 OPTAB_WIDEN);
8284 if (temp != 0)
8285 return temp;
8286
8287 /* At this point, a MEM target is no longer useful; we will get better
8288 code without it. */
8289
8290 if (! REG_P (target))
8291 target = gen_reg_rtx (mode);
8292
8293 /* If op1 was placed in target, swap op0 and op1. */
8294 if (target != op0 && target == op1)
8295 {
8296 temp = op0;
8297 op0 = op1;
8298 op1 = temp;
8299 }
8300
8301 /* We generate better code and avoid problems with op1 mentioning
8302 target by forcing op1 into a pseudo if it isn't a constant. */
8303 if (! CONSTANT_P (op1))
8304 op1 = force_reg (mode, op1);
8305
8306 {
8307 enum rtx_code comparison_code;
8308 rtx cmpop1 = op1;
8309
8310 if (code == MAX_EXPR)
8311 comparison_code = unsignedp ? GEU : GE;
8312 else
8313 comparison_code = unsignedp ? LEU : LE;
8314
8315 /* Canonicalize to comparisons against 0. */
8316 if (op1 == const1_rtx)
8317 {
8318 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8319 or (a != 0 ? a : 1) for unsigned.
8320 For MIN we are safe converting (a <= 1 ? a : 1)
8321 into (a <= 0 ? a : 1) */
8322 cmpop1 = const0_rtx;
8323 if (code == MAX_EXPR)
8324 comparison_code = unsignedp ? NE : GT;
8325 }
8326 if (op1 == constm1_rtx && !unsignedp)
8327 {
8328 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8329 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8330 cmpop1 = const0_rtx;
8331 if (code == MIN_EXPR)
8332 comparison_code = LT;
8333 }
8334 #ifdef HAVE_conditional_move
8335 /* Use a conditional move if possible. */
8336 if (can_conditionally_move_p (mode))
8337 {
8338 rtx insn;
8339
8340 /* ??? Same problem as in expmed.c: emit_conditional_move
8341 forces a stack adjustment via compare_from_rtx, and we
8342 lose the stack adjustment if the sequence we are about
8343 to create is discarded. */
8344 do_pending_stack_adjust ();
8345
8346 start_sequence ();
8347
8348 /* Try to emit the conditional move. */
8349 insn = emit_conditional_move (target, comparison_code,
8350 op0, cmpop1, mode,
8351 op0, op1, mode,
8352 unsignedp);
8353
8354 /* If we could do the conditional move, emit the sequence,
8355 and return. */
8356 if (insn)
8357 {
8358 rtx seq = get_insns ();
8359 end_sequence ();
8360 emit_insn (seq);
8361 return target;
8362 }
8363
8364 /* Otherwise discard the sequence and fall back to code with
8365 branches. */
8366 end_sequence ();
8367 }
8368 #endif
8369 if (target != op0)
8370 emit_move_insn (target, op0);
8371
8372 temp = gen_label_rtx ();
8373 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8374 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8375 -1);
8376 }
8377 emit_move_insn (target, op1);
8378 emit_label (temp);
8379 return target;
8380
8381 case BIT_NOT_EXPR:
8382 op0 = expand_expr (treeop0, subtarget,
8383 VOIDmode, EXPAND_NORMAL);
8384 if (modifier == EXPAND_STACK_PARM)
8385 target = 0;
8386 /* In case we have to reduce the result to bitfield precision
8387 expand this as XOR with a proper constant instead. */
8388 if (reduce_bit_field)
8389 temp = expand_binop (mode, xor_optab, op0,
8390 immed_double_int_const
8391 (double_int_mask (TYPE_PRECISION (type)), mode),
8392 target, 1, OPTAB_LIB_WIDEN);
8393 else
8394 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8395 gcc_assert (temp);
8396 return temp;
8397
8398 /* ??? Can optimize bitwise operations with one arg constant.
8399 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8400 and (a bitwise1 b) bitwise2 b (etc)
8401 but that is probably not worth while. */
8402
8403 case BIT_AND_EXPR:
8404 case BIT_IOR_EXPR:
8405 case BIT_XOR_EXPR:
8406 goto binop;
8407
8408 case LROTATE_EXPR:
8409 case RROTATE_EXPR:
8410 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8411 || (GET_MODE_PRECISION (TYPE_MODE (type))
8412 == TYPE_PRECISION (type)));
8413 /* fall through */
8414
8415 case LSHIFT_EXPR:
8416 case RSHIFT_EXPR:
8417 /* If this is a fixed-point operation, then we cannot use the code
8418 below because "expand_shift" doesn't support sat/no-sat fixed-point
8419 shifts. */
8420 if (ALL_FIXED_POINT_MODE_P (mode))
8421 goto binop;
8422
8423 if (! safe_from_p (subtarget, treeop1, 1))
8424 subtarget = 0;
8425 if (modifier == EXPAND_STACK_PARM)
8426 target = 0;
8427 op0 = expand_expr (treeop0, subtarget,
8428 VOIDmode, EXPAND_NORMAL);
8429 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8430 unsignedp);
8431 if (code == LSHIFT_EXPR)
8432 temp = REDUCE_BIT_FIELD (temp);
8433 return temp;
8434
8435 /* Could determine the answer when only additive constants differ. Also,
8436 the addition of one can be handled by changing the condition. */
8437 case LT_EXPR:
8438 case LE_EXPR:
8439 case GT_EXPR:
8440 case GE_EXPR:
8441 case EQ_EXPR:
8442 case NE_EXPR:
8443 case UNORDERED_EXPR:
8444 case ORDERED_EXPR:
8445 case UNLT_EXPR:
8446 case UNLE_EXPR:
8447 case UNGT_EXPR:
8448 case UNGE_EXPR:
8449 case UNEQ_EXPR:
8450 case LTGT_EXPR:
8451 temp = do_store_flag (ops,
8452 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8453 tmode != VOIDmode ? tmode : mode);
8454 if (temp)
8455 return temp;
8456
8457 /* Use a compare and a jump for BLKmode comparisons, or for function
8458 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8459
8460 if ((target == 0
8461 || modifier == EXPAND_STACK_PARM
8462 || ! safe_from_p (target, treeop0, 1)
8463 || ! safe_from_p (target, treeop1, 1)
8464 /* Make sure we don't have a hard reg (such as function's return
8465 value) live across basic blocks, if not optimizing. */
8466 || (!optimize && REG_P (target)
8467 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8468 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8469
8470 emit_move_insn (target, const0_rtx);
8471
8472 op1 = gen_label_rtx ();
8473 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8474
8475 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8476 emit_move_insn (target, constm1_rtx);
8477 else
8478 emit_move_insn (target, const1_rtx);
8479
8480 emit_label (op1);
8481 return target;
8482
8483 case COMPLEX_EXPR:
8484 /* Get the rtx code of the operands. */
8485 op0 = expand_normal (treeop0);
8486 op1 = expand_normal (treeop1);
8487
8488 if (!target)
8489 target = gen_reg_rtx (TYPE_MODE (type));
8490
8491 /* Move the real (op0) and imaginary (op1) parts to their location. */
8492 write_complex_part (target, op0, false);
8493 write_complex_part (target, op1, true);
8494
8495 return target;
8496
8497 case WIDEN_SUM_EXPR:
8498 {
8499 tree oprnd0 = treeop0;
8500 tree oprnd1 = treeop1;
8501
8502 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8503 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8504 target, unsignedp);
8505 return target;
8506 }
8507
8508 case REDUC_MAX_EXPR:
8509 case REDUC_MIN_EXPR:
8510 case REDUC_PLUS_EXPR:
8511 {
8512 op0 = expand_normal (treeop0);
8513 this_optab = optab_for_tree_code (code, type, optab_default);
8514 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8515 gcc_assert (temp);
8516 return temp;
8517 }
8518
8519 case VEC_EXTRACT_EVEN_EXPR:
8520 case VEC_EXTRACT_ODD_EXPR:
8521 {
8522 expand_operands (treeop0, treeop1,
8523 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8524 this_optab = optab_for_tree_code (code, type, optab_default);
8525 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8526 OPTAB_WIDEN);
8527 gcc_assert (temp);
8528 return temp;
8529 }
8530
8531 case VEC_INTERLEAVE_HIGH_EXPR:
8532 case VEC_INTERLEAVE_LOW_EXPR:
8533 {
8534 expand_operands (treeop0, treeop1,
8535 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8536 this_optab = optab_for_tree_code (code, type, optab_default);
8537 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8538 OPTAB_WIDEN);
8539 gcc_assert (temp);
8540 return temp;
8541 }
8542
8543 case VEC_LSHIFT_EXPR:
8544 case VEC_RSHIFT_EXPR:
8545 {
8546 target = expand_vec_shift_expr (ops, target);
8547 return target;
8548 }
8549
8550 case VEC_UNPACK_HI_EXPR:
8551 case VEC_UNPACK_LO_EXPR:
8552 {
8553 op0 = expand_normal (treeop0);
8554 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8555 target, unsignedp);
8556 gcc_assert (temp);
8557 return temp;
8558 }
8559
8560 case VEC_UNPACK_FLOAT_HI_EXPR:
8561 case VEC_UNPACK_FLOAT_LO_EXPR:
8562 {
8563 op0 = expand_normal (treeop0);
8564 /* The signedness is determined from input operand. */
8565 temp = expand_widen_pattern_expr
8566 (ops, op0, NULL_RTX, NULL_RTX,
8567 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8568
8569 gcc_assert (temp);
8570 return temp;
8571 }
8572
8573 case VEC_WIDEN_MULT_HI_EXPR:
8574 case VEC_WIDEN_MULT_LO_EXPR:
8575 {
8576 tree oprnd0 = treeop0;
8577 tree oprnd1 = treeop1;
8578
8579 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8580 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8581 target, unsignedp);
8582 gcc_assert (target);
8583 return target;
8584 }
8585
8586 case VEC_PACK_TRUNC_EXPR:
8587 case VEC_PACK_SAT_EXPR:
8588 case VEC_PACK_FIX_TRUNC_EXPR:
8589 mode = TYPE_MODE (TREE_TYPE (treeop0));
8590 goto binop;
8591
8592 case DOT_PROD_EXPR:
8593 {
8594 tree oprnd0 = treeop0;
8595 tree oprnd1 = treeop1;
8596 tree oprnd2 = treeop2;
8597 rtx op2;
8598
8599 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8600 op2 = expand_normal (oprnd2);
8601 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8602 target, unsignedp);
8603 return target;
8604 }
8605
8606 case REALIGN_LOAD_EXPR:
8607 {
8608 tree oprnd0 = treeop0;
8609 tree oprnd1 = treeop1;
8610 tree oprnd2 = treeop2;
8611 rtx op2;
8612
8613 this_optab = optab_for_tree_code (code, type, optab_default);
8614 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8615 op2 = expand_normal (oprnd2);
8616 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8617 target, unsignedp);
8618 gcc_assert (temp);
8619 return temp;
8620 }
8621
8622 default:
8623 gcc_unreachable ();
8624 }
8625
8626 /* Here to do an ordinary binary operator. */
8627 binop:
8628 expand_operands (treeop0, treeop1,
8629 subtarget, &op0, &op1, EXPAND_NORMAL);
8630 binop2:
8631 this_optab = optab_for_tree_code (code, type, optab_default);
8632 binop3:
8633 if (modifier == EXPAND_STACK_PARM)
8634 target = 0;
8635 temp = expand_binop (mode, this_optab, op0, op1, target,
8636 unsignedp, OPTAB_LIB_WIDEN);
8637 gcc_assert (temp);
8638 /* Bitwise operations do not need bitfield reduction as we expect their
8639 operands being properly truncated. */
8640 if (code == BIT_XOR_EXPR
8641 || code == BIT_AND_EXPR
8642 || code == BIT_IOR_EXPR)
8643 return temp;
8644 return REDUCE_BIT_FIELD (temp);
8645 }
8646 #undef REDUCE_BIT_FIELD
8647
8648 rtx
8649 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
8650 enum expand_modifier modifier, rtx *alt_rtl)
8651 {
8652 rtx op0, op1, temp, decl_rtl;
8653 tree type;
8654 int unsignedp;
8655 enum machine_mode mode;
8656 enum tree_code code = TREE_CODE (exp);
8657 rtx subtarget, original_target;
8658 int ignore;
8659 tree context;
8660 bool reduce_bit_field;
8661 location_t loc = EXPR_LOCATION (exp);
8662 struct separate_ops ops;
8663 tree treeop0, treeop1, treeop2;
8664 tree ssa_name = NULL_TREE;
8665 gimple g;
8666
8667 type = TREE_TYPE (exp);
8668 mode = TYPE_MODE (type);
8669 unsignedp = TYPE_UNSIGNED (type);
8670
8671 treeop0 = treeop1 = treeop2 = NULL_TREE;
8672 if (!VL_EXP_CLASS_P (exp))
8673 switch (TREE_CODE_LENGTH (code))
8674 {
8675 default:
8676 case 3: treeop2 = TREE_OPERAND (exp, 2);
8677 case 2: treeop1 = TREE_OPERAND (exp, 1);
8678 case 1: treeop0 = TREE_OPERAND (exp, 0);
8679 case 0: break;
8680 }
8681 ops.code = code;
8682 ops.type = type;
8683 ops.op0 = treeop0;
8684 ops.op1 = treeop1;
8685 ops.op2 = treeop2;
8686 ops.location = loc;
8687
8688 ignore = (target == const0_rtx
8689 || ((CONVERT_EXPR_CODE_P (code)
8690 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8691 && TREE_CODE (type) == VOID_TYPE));
8692
8693 /* An operation in what may be a bit-field type needs the
8694 result to be reduced to the precision of the bit-field type,
8695 which is narrower than that of the type's mode. */
8696 reduce_bit_field = (!ignore
8697 && INTEGRAL_TYPE_P (type)
8698 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8699
8700 /* If we are going to ignore this result, we need only do something
8701 if there is a side-effect somewhere in the expression. If there
8702 is, short-circuit the most common cases here. Note that we must
8703 not call expand_expr with anything but const0_rtx in case this
8704 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
8705
8706 if (ignore)
8707 {
8708 if (! TREE_SIDE_EFFECTS (exp))
8709 return const0_rtx;
8710
8711 /* Ensure we reference a volatile object even if value is ignored, but
8712 don't do this if all we are doing is taking its address. */
8713 if (TREE_THIS_VOLATILE (exp)
8714 && TREE_CODE (exp) != FUNCTION_DECL
8715 && mode != VOIDmode && mode != BLKmode
8716 && modifier != EXPAND_CONST_ADDRESS)
8717 {
8718 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
8719 if (MEM_P (temp))
8720 copy_to_reg (temp);
8721 return const0_rtx;
8722 }
8723
8724 if (TREE_CODE_CLASS (code) == tcc_unary
8725 || code == COMPONENT_REF || code == INDIRECT_REF)
8726 return expand_expr (treeop0, const0_rtx, VOIDmode,
8727 modifier);
8728
8729 else if (TREE_CODE_CLASS (code) == tcc_binary
8730 || TREE_CODE_CLASS (code) == tcc_comparison
8731 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
8732 {
8733 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8734 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8735 return const0_rtx;
8736 }
8737 else if (code == BIT_FIELD_REF)
8738 {
8739 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8740 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8741 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
8742 return const0_rtx;
8743 }
8744
8745 target = 0;
8746 }
8747
8748 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8749 target = 0;
8750
8751 /* Use subtarget as the target for operand 0 of a binary operation. */
8752 subtarget = get_subtarget (target);
8753 original_target = target;
8754
8755 switch (code)
8756 {
8757 case LABEL_DECL:
8758 {
8759 tree function = decl_function_context (exp);
8760
8761 temp = label_rtx (exp);
8762 temp = gen_rtx_LABEL_REF (Pmode, temp);
8763
8764 if (function != current_function_decl
8765 && function != 0)
8766 LABEL_REF_NONLOCAL_P (temp) = 1;
8767
8768 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
8769 return temp;
8770 }
8771
8772 case SSA_NAME:
8773 /* ??? ivopts calls expander, without any preparation from
8774 out-of-ssa. So fake instructions as if this was an access to the
8775 base variable. This unnecessarily allocates a pseudo, see how we can
8776 reuse it, if partition base vars have it set already. */
8777 if (!currently_expanding_to_rtl)
8778 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
8779 NULL);
8780
8781 g = get_gimple_for_ssa_name (exp);
8782 /* For EXPAND_INITIALIZER try harder to get something simpler. */
8783 if (g == NULL
8784 && modifier == EXPAND_INITIALIZER
8785 && !SSA_NAME_IS_DEFAULT_DEF (exp)
8786 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
8787 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
8788 g = SSA_NAME_DEF_STMT (exp);
8789 if (g)
8790 return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
8791 modifier, NULL);
8792
8793 ssa_name = exp;
8794 decl_rtl = get_rtx_for_ssa_name (ssa_name);
8795 exp = SSA_NAME_VAR (ssa_name);
8796 goto expand_decl_rtl;
8797
8798 case PARM_DECL:
8799 case VAR_DECL:
8800 /* If a static var's type was incomplete when the decl was written,
8801 but the type is complete now, lay out the decl now. */
8802 if (DECL_SIZE (exp) == 0
8803 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
8804 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
8805 layout_decl (exp, 0);
8806
8807 /* ... fall through ... */
8808
8809 case FUNCTION_DECL:
8810 case RESULT_DECL:
8811 decl_rtl = DECL_RTL (exp);
8812 expand_decl_rtl:
8813 gcc_assert (decl_rtl);
8814 decl_rtl = copy_rtx (decl_rtl);
8815 /* Record writes to register variables. */
8816 if (modifier == EXPAND_WRITE
8817 && REG_P (decl_rtl)
8818 && HARD_REGISTER_P (decl_rtl))
8819 add_to_hard_reg_set (&crtl->asm_clobbers,
8820 GET_MODE (decl_rtl), REGNO (decl_rtl));
8821
8822 /* Ensure variable marked as used even if it doesn't go through
8823 a parser. If it hasn't be used yet, write out an external
8824 definition. */
8825 if (! TREE_USED (exp))
8826 {
8827 assemble_external (exp);
8828 TREE_USED (exp) = 1;
8829 }
8830
8831 /* Show we haven't gotten RTL for this yet. */
8832 temp = 0;
8833
8834 /* Variables inherited from containing functions should have
8835 been lowered by this point. */
8836 context = decl_function_context (exp);
8837 gcc_assert (!context
8838 || context == current_function_decl
8839 || TREE_STATIC (exp)
8840 || DECL_EXTERNAL (exp)
8841 /* ??? C++ creates functions that are not TREE_STATIC. */
8842 || TREE_CODE (exp) == FUNCTION_DECL);
8843
8844 /* This is the case of an array whose size is to be determined
8845 from its initializer, while the initializer is still being parsed.
8846 See expand_decl. */
8847
8848 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
8849 temp = validize_mem (decl_rtl);
8850
8851 /* If DECL_RTL is memory, we are in the normal case and the
8852 address is not valid, get the address into a register. */
8853
8854 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
8855 {
8856 if (alt_rtl)
8857 *alt_rtl = decl_rtl;
8858 decl_rtl = use_anchored_address (decl_rtl);
8859 if (modifier != EXPAND_CONST_ADDRESS
8860 && modifier != EXPAND_SUM
8861 && !memory_address_addr_space_p (DECL_MODE (exp),
8862 XEXP (decl_rtl, 0),
8863 MEM_ADDR_SPACE (decl_rtl)))
8864 temp = replace_equiv_address (decl_rtl,
8865 copy_rtx (XEXP (decl_rtl, 0)));
8866 }
8867
8868 /* If we got something, return it. But first, set the alignment
8869 if the address is a register. */
8870 if (temp != 0)
8871 {
8872 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
8873 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
8874
8875 return temp;
8876 }
8877
8878 /* If the mode of DECL_RTL does not match that of the decl, it
8879 must be a promoted value. We return a SUBREG of the wanted mode,
8880 but mark it so that we know that it was already extended. */
8881 if (REG_P (decl_rtl) && GET_MODE (decl_rtl) != DECL_MODE (exp))
8882 {
8883 enum machine_mode pmode;
8884
8885 /* Get the signedness to be used for this variable. Ensure we get
8886 the same mode we got when the variable was declared. */
8887 if (code == SSA_NAME
8888 && (g = SSA_NAME_DEF_STMT (ssa_name))
8889 && gimple_code (g) == GIMPLE_CALL)
8890 {
8891 gcc_assert (!gimple_call_internal_p (g));
8892 pmode = promote_function_mode (type, mode, &unsignedp,
8893 gimple_call_fntype (g),
8894 2);
8895 }
8896 else
8897 pmode = promote_decl_mode (exp, &unsignedp);
8898 gcc_assert (GET_MODE (decl_rtl) == pmode);
8899
8900 temp = gen_lowpart_SUBREG (mode, decl_rtl);
8901 SUBREG_PROMOTED_VAR_P (temp) = 1;
8902 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
8903 return temp;
8904 }
8905
8906 return decl_rtl;
8907
8908 case INTEGER_CST:
8909 temp = immed_double_const (TREE_INT_CST_LOW (exp),
8910 TREE_INT_CST_HIGH (exp), mode);
8911
8912 return temp;
8913
8914 case VECTOR_CST:
8915 {
8916 tree tmp = NULL_TREE;
8917 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
8918 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
8919 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
8920 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
8921 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
8922 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
8923 return const_vector_from_tree (exp);
8924 if (GET_MODE_CLASS (mode) == MODE_INT)
8925 {
8926 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
8927 if (type_for_mode)
8928 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
8929 }
8930 if (!tmp)
8931 tmp = build_constructor_from_list (type,
8932 TREE_VECTOR_CST_ELTS (exp));
8933 return expand_expr (tmp, ignore ? const0_rtx : target,
8934 tmode, modifier);
8935 }
8936
8937 case CONST_DECL:
8938 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
8939
8940 case REAL_CST:
8941 /* If optimized, generate immediate CONST_DOUBLE
8942 which will be turned into memory by reload if necessary.
8943
8944 We used to force a register so that loop.c could see it. But
8945 this does not allow gen_* patterns to perform optimizations with
8946 the constants. It also produces two insns in cases like "x = 1.0;".
8947 On most machines, floating-point constants are not permitted in
8948 many insns, so we'd end up copying it to a register in any case.
8949
8950 Now, we do the copying in expand_binop, if appropriate. */
8951 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
8952 TYPE_MODE (TREE_TYPE (exp)));
8953
8954 case FIXED_CST:
8955 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
8956 TYPE_MODE (TREE_TYPE (exp)));
8957
8958 case COMPLEX_CST:
8959 /* Handle evaluating a complex constant in a CONCAT target. */
8960 if (original_target && GET_CODE (original_target) == CONCAT)
8961 {
8962 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
8963 rtx rtarg, itarg;
8964
8965 rtarg = XEXP (original_target, 0);
8966 itarg = XEXP (original_target, 1);
8967
8968 /* Move the real and imaginary parts separately. */
8969 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
8970 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
8971
8972 if (op0 != rtarg)
8973 emit_move_insn (rtarg, op0);
8974 if (op1 != itarg)
8975 emit_move_insn (itarg, op1);
8976
8977 return original_target;
8978 }
8979
8980 /* ... fall through ... */
8981
8982 case STRING_CST:
8983 temp = expand_expr_constant (exp, 1, modifier);
8984
8985 /* temp contains a constant address.
8986 On RISC machines where a constant address isn't valid,
8987 make some insns to get that address into a register. */
8988 if (modifier != EXPAND_CONST_ADDRESS
8989 && modifier != EXPAND_INITIALIZER
8990 && modifier != EXPAND_SUM
8991 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
8992 MEM_ADDR_SPACE (temp)))
8993 return replace_equiv_address (temp,
8994 copy_rtx (XEXP (temp, 0)));
8995 return temp;
8996
8997 case SAVE_EXPR:
8998 {
8999 tree val = treeop0;
9000 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
9001
9002 if (!SAVE_EXPR_RESOLVED_P (exp))
9003 {
9004 /* We can indeed still hit this case, typically via builtin
9005 expanders calling save_expr immediately before expanding
9006 something. Assume this means that we only have to deal
9007 with non-BLKmode values. */
9008 gcc_assert (GET_MODE (ret) != BLKmode);
9009
9010 val = build_decl (EXPR_LOCATION (exp),
9011 VAR_DECL, NULL, TREE_TYPE (exp));
9012 DECL_ARTIFICIAL (val) = 1;
9013 DECL_IGNORED_P (val) = 1;
9014 treeop0 = val;
9015 TREE_OPERAND (exp, 0) = treeop0;
9016 SAVE_EXPR_RESOLVED_P (exp) = 1;
9017
9018 if (!CONSTANT_P (ret))
9019 ret = copy_to_reg (ret);
9020 SET_DECL_RTL (val, ret);
9021 }
9022
9023 return ret;
9024 }
9025
9026
9027 case CONSTRUCTOR:
9028 /* If we don't need the result, just ensure we evaluate any
9029 subexpressions. */
9030 if (ignore)
9031 {
9032 unsigned HOST_WIDE_INT idx;
9033 tree value;
9034
9035 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9036 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9037
9038 return const0_rtx;
9039 }
9040
9041 return expand_constructor (exp, target, modifier, false);
9042
9043 case TARGET_MEM_REF:
9044 {
9045 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
9046 struct mem_address addr;
9047 enum insn_code icode;
9048 int align;
9049
9050 get_address_description (exp, &addr);
9051 op0 = addr_for_mem_ref (&addr, as, true);
9052 op0 = memory_address_addr_space (mode, op0, as);
9053 temp = gen_rtx_MEM (mode, op0);
9054 set_mem_attributes (temp, exp, 0);
9055 set_mem_addr_space (temp, as);
9056 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)), get_object_alignment (exp));
9057 if (mode != BLKmode
9058 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
9059 /* If the target does not have special handling for unaligned
9060 loads of mode then it can use regular moves for them. */
9061 && ((icode = optab_handler (movmisalign_optab, mode))
9062 != CODE_FOR_nothing))
9063 {
9064 struct expand_operand ops[2];
9065
9066 /* We've already validated the memory, and we're creating a
9067 new pseudo destination. The predicates really can't fail,
9068 nor can the generator. */
9069 create_output_operand (&ops[0], NULL_RTX, mode);
9070 create_fixed_operand (&ops[1], temp);
9071 expand_insn (icode, 2, ops);
9072 return ops[0].value;
9073 }
9074 return temp;
9075 }
9076
9077 case MEM_REF:
9078 {
9079 addr_space_t as
9080 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1))));
9081 enum machine_mode address_mode;
9082 tree base = TREE_OPERAND (exp, 0);
9083 gimple def_stmt;
9084 enum insn_code icode;
9085 int align;
9086 /* Handle expansion of non-aliased memory with non-BLKmode. That
9087 might end up in a register. */
9088 if (TREE_CODE (base) == ADDR_EXPR)
9089 {
9090 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9091 tree bit_offset;
9092 base = TREE_OPERAND (base, 0);
9093 if (!DECL_P (base))
9094 {
9095 HOST_WIDE_INT off;
9096 base = get_addr_base_and_unit_offset (base, &off);
9097 gcc_assert (base);
9098 offset += off;
9099 }
9100 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
9101 decl we must use bitfield operations. */
9102 if (DECL_P (base)
9103 && !TREE_ADDRESSABLE (base)
9104 && DECL_MODE (base) != BLKmode
9105 && DECL_RTL_SET_P (base)
9106 && !MEM_P (DECL_RTL (base)))
9107 {
9108 tree bftype;
9109 if (offset == 0
9110 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9111 && (GET_MODE_BITSIZE (DECL_MODE (base))
9112 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9113 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9114 TREE_TYPE (exp), base),
9115 target, tmode, modifier);
9116 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9117 bftype = TREE_TYPE (base);
9118 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9119 bftype = TREE_TYPE (exp);
9120 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9121 base,
9122 TYPE_SIZE (TREE_TYPE (exp)),
9123 bit_offset),
9124 target, tmode, modifier);
9125 }
9126 }
9127 address_mode = targetm.addr_space.address_mode (as);
9128 base = TREE_OPERAND (exp, 0);
9129 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9130 {
9131 tree mask = gimple_assign_rhs2 (def_stmt);
9132 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9133 gimple_assign_rhs1 (def_stmt), mask);
9134 TREE_OPERAND (exp, 0) = base;
9135 }
9136 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)), get_object_alignment (exp));
9137 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9138 op0 = memory_address_addr_space (address_mode, op0, as);
9139 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9140 {
9141 rtx off
9142 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9143 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9144 }
9145 op0 = memory_address_addr_space (mode, op0, as);
9146 temp = gen_rtx_MEM (mode, op0);
9147 set_mem_attributes (temp, exp, 0);
9148 set_mem_addr_space (temp, as);
9149 if (TREE_THIS_VOLATILE (exp))
9150 MEM_VOLATILE_P (temp) = 1;
9151 if (mode != BLKmode
9152 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
9153 /* If the target does not have special handling for unaligned
9154 loads of mode then it can use regular moves for them. */
9155 && ((icode = optab_handler (movmisalign_optab, mode))
9156 != CODE_FOR_nothing))
9157 {
9158 struct expand_operand ops[2];
9159
9160 /* We've already validated the memory, and we're creating a
9161 new pseudo destination. The predicates really can't fail,
9162 nor can the generator. */
9163 create_output_operand (&ops[0], NULL_RTX, mode);
9164 create_fixed_operand (&ops[1], temp);
9165 expand_insn (icode, 2, ops);
9166 return ops[0].value;
9167 }
9168 return temp;
9169 }
9170
9171 case ARRAY_REF:
9172
9173 {
9174 tree array = treeop0;
9175 tree index = treeop1;
9176
9177 /* Fold an expression like: "foo"[2].
9178 This is not done in fold so it won't happen inside &.
9179 Don't fold if this is for wide characters since it's too
9180 difficult to do correctly and this is a very rare case. */
9181
9182 if (modifier != EXPAND_CONST_ADDRESS
9183 && modifier != EXPAND_INITIALIZER
9184 && modifier != EXPAND_MEMORY)
9185 {
9186 tree t = fold_read_from_constant_string (exp);
9187
9188 if (t)
9189 return expand_expr (t, target, tmode, modifier);
9190 }
9191
9192 /* If this is a constant index into a constant array,
9193 just get the value from the array. Handle both the cases when
9194 we have an explicit constructor and when our operand is a variable
9195 that was declared const. */
9196
9197 if (modifier != EXPAND_CONST_ADDRESS
9198 && modifier != EXPAND_INITIALIZER
9199 && modifier != EXPAND_MEMORY
9200 && TREE_CODE (array) == CONSTRUCTOR
9201 && ! TREE_SIDE_EFFECTS (array)
9202 && TREE_CODE (index) == INTEGER_CST)
9203 {
9204 unsigned HOST_WIDE_INT ix;
9205 tree field, value;
9206
9207 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9208 field, value)
9209 if (tree_int_cst_equal (field, index))
9210 {
9211 if (!TREE_SIDE_EFFECTS (value))
9212 return expand_expr (fold (value), target, tmode, modifier);
9213 break;
9214 }
9215 }
9216
9217 else if (optimize >= 1
9218 && modifier != EXPAND_CONST_ADDRESS
9219 && modifier != EXPAND_INITIALIZER
9220 && modifier != EXPAND_MEMORY
9221 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9222 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9223 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9224 && const_value_known_p (array))
9225 {
9226 if (TREE_CODE (index) == INTEGER_CST)
9227 {
9228 tree init = DECL_INITIAL (array);
9229
9230 if (TREE_CODE (init) == CONSTRUCTOR)
9231 {
9232 unsigned HOST_WIDE_INT ix;
9233 tree field, value;
9234
9235 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9236 field, value)
9237 if (tree_int_cst_equal (field, index))
9238 {
9239 if (TREE_SIDE_EFFECTS (value))
9240 break;
9241
9242 if (TREE_CODE (value) == CONSTRUCTOR)
9243 {
9244 /* If VALUE is a CONSTRUCTOR, this
9245 optimization is only useful if
9246 this doesn't store the CONSTRUCTOR
9247 into memory. If it does, it is more
9248 efficient to just load the data from
9249 the array directly. */
9250 rtx ret = expand_constructor (value, target,
9251 modifier, true);
9252 if (ret == NULL_RTX)
9253 break;
9254 }
9255
9256 return expand_expr (fold (value), target, tmode,
9257 modifier);
9258 }
9259 }
9260 else if(TREE_CODE (init) == STRING_CST)
9261 {
9262 tree index1 = index;
9263 tree low_bound = array_ref_low_bound (exp);
9264 index1 = fold_convert_loc (loc, sizetype,
9265 treeop1);
9266
9267 /* Optimize the special-case of a zero lower bound.
9268
9269 We convert the low_bound to sizetype to avoid some problems
9270 with constant folding. (E.g. suppose the lower bound is 1,
9271 and its mode is QI. Without the conversion,l (ARRAY
9272 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9273 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9274
9275 if (! integer_zerop (low_bound))
9276 index1 = size_diffop_loc (loc, index1,
9277 fold_convert_loc (loc, sizetype,
9278 low_bound));
9279
9280 if (0 > compare_tree_int (index1,
9281 TREE_STRING_LENGTH (init)))
9282 {
9283 tree type = TREE_TYPE (TREE_TYPE (init));
9284 enum machine_mode mode = TYPE_MODE (type);
9285
9286 if (GET_MODE_CLASS (mode) == MODE_INT
9287 && GET_MODE_SIZE (mode) == 1)
9288 return gen_int_mode (TREE_STRING_POINTER (init)
9289 [TREE_INT_CST_LOW (index1)],
9290 mode);
9291 }
9292 }
9293 }
9294 }
9295 }
9296 goto normal_inner_ref;
9297
9298 case COMPONENT_REF:
9299 /* If the operand is a CONSTRUCTOR, we can just extract the
9300 appropriate field if it is present. */
9301 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9302 {
9303 unsigned HOST_WIDE_INT idx;
9304 tree field, value;
9305
9306 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9307 idx, field, value)
9308 if (field == treeop1
9309 /* We can normally use the value of the field in the
9310 CONSTRUCTOR. However, if this is a bitfield in
9311 an integral mode that we can fit in a HOST_WIDE_INT,
9312 we must mask only the number of bits in the bitfield,
9313 since this is done implicitly by the constructor. If
9314 the bitfield does not meet either of those conditions,
9315 we can't do this optimization. */
9316 && (! DECL_BIT_FIELD (field)
9317 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9318 && (GET_MODE_PRECISION (DECL_MODE (field))
9319 <= HOST_BITS_PER_WIDE_INT))))
9320 {
9321 if (DECL_BIT_FIELD (field)
9322 && modifier == EXPAND_STACK_PARM)
9323 target = 0;
9324 op0 = expand_expr (value, target, tmode, modifier);
9325 if (DECL_BIT_FIELD (field))
9326 {
9327 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9328 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9329
9330 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9331 {
9332 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9333 op0 = expand_and (imode, op0, op1, target);
9334 }
9335 else
9336 {
9337 int count = GET_MODE_PRECISION (imode) - bitsize;
9338
9339 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9340 target, 0);
9341 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9342 target, 0);
9343 }
9344 }
9345
9346 return op0;
9347 }
9348 }
9349 goto normal_inner_ref;
9350
9351 case BIT_FIELD_REF:
9352 case ARRAY_RANGE_REF:
9353 normal_inner_ref:
9354 {
9355 enum machine_mode mode1, mode2;
9356 HOST_WIDE_INT bitsize, bitpos;
9357 tree offset;
9358 int volatilep = 0, must_force_mem;
9359 bool packedp = false;
9360 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9361 &mode1, &unsignedp, &volatilep, true);
9362 rtx orig_op0, memloc;
9363
9364 /* If we got back the original object, something is wrong. Perhaps
9365 we are evaluating an expression too early. In any event, don't
9366 infinitely recurse. */
9367 gcc_assert (tem != exp);
9368
9369 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9370 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9371 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9372 packedp = true;
9373
9374 /* If TEM's type is a union of variable size, pass TARGET to the inner
9375 computation, since it will need a temporary and TARGET is known
9376 to have to do. This occurs in unchecked conversion in Ada. */
9377 orig_op0 = op0
9378 = expand_expr (tem,
9379 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9380 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9381 != INTEGER_CST)
9382 && modifier != EXPAND_STACK_PARM
9383 ? target : NULL_RTX),
9384 VOIDmode,
9385 (modifier == EXPAND_INITIALIZER
9386 || modifier == EXPAND_CONST_ADDRESS
9387 || modifier == EXPAND_STACK_PARM)
9388 ? modifier : EXPAND_NORMAL);
9389
9390
9391 /* If the bitfield is volatile, we want to access it in the
9392 field's mode, not the computed mode.
9393 If a MEM has VOIDmode (external with incomplete type),
9394 use BLKmode for it instead. */
9395 if (MEM_P (op0))
9396 {
9397 if (volatilep && flag_strict_volatile_bitfields > 0)
9398 op0 = adjust_address (op0, mode1, 0);
9399 else if (GET_MODE (op0) == VOIDmode)
9400 op0 = adjust_address (op0, BLKmode, 0);
9401 }
9402
9403 mode2
9404 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9405
9406 /* If we have either an offset, a BLKmode result, or a reference
9407 outside the underlying object, we must force it to memory.
9408 Such a case can occur in Ada if we have unchecked conversion
9409 of an expression from a scalar type to an aggregate type or
9410 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9411 passed a partially uninitialized object or a view-conversion
9412 to a larger size. */
9413 must_force_mem = (offset
9414 || mode1 == BLKmode
9415 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9416
9417 /* Handle CONCAT first. */
9418 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9419 {
9420 if (bitpos == 0
9421 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9422 return op0;
9423 if (bitpos == 0
9424 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9425 && bitsize)
9426 {
9427 op0 = XEXP (op0, 0);
9428 mode2 = GET_MODE (op0);
9429 }
9430 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9431 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9432 && bitpos
9433 && bitsize)
9434 {
9435 op0 = XEXP (op0, 1);
9436 bitpos = 0;
9437 mode2 = GET_MODE (op0);
9438 }
9439 else
9440 /* Otherwise force into memory. */
9441 must_force_mem = 1;
9442 }
9443
9444 /* If this is a constant, put it in a register if it is a legitimate
9445 constant and we don't need a memory reference. */
9446 if (CONSTANT_P (op0)
9447 && mode2 != BLKmode
9448 && targetm.legitimate_constant_p (mode2, op0)
9449 && !must_force_mem)
9450 op0 = force_reg (mode2, op0);
9451
9452 /* Otherwise, if this is a constant, try to force it to the constant
9453 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9454 is a legitimate constant. */
9455 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9456 op0 = validize_mem (memloc);
9457
9458 /* Otherwise, if this is a constant or the object is not in memory
9459 and need be, put it there. */
9460 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9461 {
9462 tree nt = build_qualified_type (TREE_TYPE (tem),
9463 (TYPE_QUALS (TREE_TYPE (tem))
9464 | TYPE_QUAL_CONST));
9465 memloc = assign_temp (nt, 1, 1, 1);
9466 emit_move_insn (memloc, op0);
9467 op0 = memloc;
9468 }
9469
9470 if (offset)
9471 {
9472 enum machine_mode address_mode;
9473 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9474 EXPAND_SUM);
9475
9476 gcc_assert (MEM_P (op0));
9477
9478 address_mode
9479 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9480 if (GET_MODE (offset_rtx) != address_mode)
9481 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9482
9483 if (GET_MODE (op0) == BLKmode
9484 /* A constant address in OP0 can have VOIDmode, we must
9485 not try to call force_reg in that case. */
9486 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9487 && bitsize != 0
9488 && (bitpos % bitsize) == 0
9489 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9490 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9491 {
9492 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9493 bitpos = 0;
9494 }
9495
9496 op0 = offset_address (op0, offset_rtx,
9497 highest_pow2_factor (offset));
9498 }
9499
9500 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9501 record its alignment as BIGGEST_ALIGNMENT. */
9502 if (MEM_P (op0) && bitpos == 0 && offset != 0
9503 && is_aligning_offset (offset, tem))
9504 set_mem_align (op0, BIGGEST_ALIGNMENT);
9505
9506 /* Don't forget about volatility even if this is a bitfield. */
9507 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9508 {
9509 if (op0 == orig_op0)
9510 op0 = copy_rtx (op0);
9511
9512 MEM_VOLATILE_P (op0) = 1;
9513 }
9514
9515 /* In cases where an aligned union has an unaligned object
9516 as a field, we might be extracting a BLKmode value from
9517 an integer-mode (e.g., SImode) object. Handle this case
9518 by doing the extract into an object as wide as the field
9519 (which we know to be the width of a basic mode), then
9520 storing into memory, and changing the mode to BLKmode. */
9521 if (mode1 == VOIDmode
9522 || REG_P (op0) || GET_CODE (op0) == SUBREG
9523 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9524 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9525 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9526 && modifier != EXPAND_CONST_ADDRESS
9527 && modifier != EXPAND_INITIALIZER)
9528 /* If the field is volatile, we always want an aligned
9529 access. Only do this if the access is not already naturally
9530 aligned, otherwise "normal" (non-bitfield) volatile fields
9531 become non-addressable. */
9532 || (volatilep && flag_strict_volatile_bitfields > 0
9533 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0))
9534 /* If the field isn't aligned enough to fetch as a memref,
9535 fetch it as a bit field. */
9536 || (mode1 != BLKmode
9537 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9538 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9539 || (MEM_P (op0)
9540 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9541 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9542 && ((modifier == EXPAND_CONST_ADDRESS
9543 || modifier == EXPAND_INITIALIZER)
9544 ? STRICT_ALIGNMENT
9545 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9546 || (bitpos % BITS_PER_UNIT != 0)))
9547 /* If the type and the field are a constant size and the
9548 size of the type isn't the same size as the bitfield,
9549 we must use bitfield operations. */
9550 || (bitsize >= 0
9551 && TYPE_SIZE (TREE_TYPE (exp))
9552 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9553 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9554 bitsize)))
9555 {
9556 enum machine_mode ext_mode = mode;
9557
9558 if (ext_mode == BLKmode
9559 && ! (target != 0 && MEM_P (op0)
9560 && MEM_P (target)
9561 && bitpos % BITS_PER_UNIT == 0))
9562 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9563
9564 if (ext_mode == BLKmode)
9565 {
9566 if (target == 0)
9567 target = assign_temp (type, 0, 1, 1);
9568
9569 if (bitsize == 0)
9570 return target;
9571
9572 /* In this case, BITPOS must start at a byte boundary and
9573 TARGET, if specified, must be a MEM. */
9574 gcc_assert (MEM_P (op0)
9575 && (!target || MEM_P (target))
9576 && !(bitpos % BITS_PER_UNIT));
9577
9578 emit_block_move (target,
9579 adjust_address (op0, VOIDmode,
9580 bitpos / BITS_PER_UNIT),
9581 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9582 / BITS_PER_UNIT),
9583 (modifier == EXPAND_STACK_PARM
9584 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9585
9586 return target;
9587 }
9588
9589 op0 = validize_mem (op0);
9590
9591 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9592 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9593
9594 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
9595 (modifier == EXPAND_STACK_PARM
9596 ? NULL_RTX : target),
9597 ext_mode, ext_mode);
9598
9599 /* If the result is a record type and BITSIZE is narrower than
9600 the mode of OP0, an integral mode, and this is a big endian
9601 machine, we must put the field into the high-order bits. */
9602 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
9603 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
9604 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
9605 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
9606 GET_MODE_BITSIZE (GET_MODE (op0))
9607 - bitsize, op0, 1);
9608
9609 /* If the result type is BLKmode, store the data into a temporary
9610 of the appropriate type, but with the mode corresponding to the
9611 mode for the data we have (op0's mode). It's tempting to make
9612 this a constant type, since we know it's only being stored once,
9613 but that can cause problems if we are taking the address of this
9614 COMPONENT_REF because the MEM of any reference via that address
9615 will have flags corresponding to the type, which will not
9616 necessarily be constant. */
9617 if (mode == BLKmode)
9618 {
9619 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
9620 rtx new_rtx;
9621
9622 /* If the reference doesn't use the alias set of its type,
9623 we cannot create the temporary using that type. */
9624 if (component_uses_parent_alias_set (exp))
9625 {
9626 new_rtx = assign_stack_local (ext_mode, size, 0);
9627 set_mem_alias_set (new_rtx, get_alias_set (exp));
9628 }
9629 else
9630 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
9631
9632 emit_move_insn (new_rtx, op0);
9633 op0 = copy_rtx (new_rtx);
9634 PUT_MODE (op0, BLKmode);
9635 set_mem_attributes (op0, exp, 1);
9636 }
9637
9638 return op0;
9639 }
9640
9641 /* If the result is BLKmode, use that to access the object
9642 now as well. */
9643 if (mode == BLKmode)
9644 mode1 = BLKmode;
9645
9646 /* Get a reference to just this component. */
9647 if (modifier == EXPAND_CONST_ADDRESS
9648 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
9649 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
9650 else
9651 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9652
9653 if (op0 == orig_op0)
9654 op0 = copy_rtx (op0);
9655
9656 set_mem_attributes (op0, exp, 0);
9657 if (REG_P (XEXP (op0, 0)))
9658 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9659
9660 MEM_VOLATILE_P (op0) |= volatilep;
9661 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
9662 || modifier == EXPAND_CONST_ADDRESS
9663 || modifier == EXPAND_INITIALIZER)
9664 return op0;
9665 else if (target == 0)
9666 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9667
9668 convert_move (target, op0, unsignedp);
9669 return target;
9670 }
9671
9672 case OBJ_TYPE_REF:
9673 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
9674
9675 case CALL_EXPR:
9676 /* All valid uses of __builtin_va_arg_pack () are removed during
9677 inlining. */
9678 if (CALL_EXPR_VA_ARG_PACK (exp))
9679 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
9680 {
9681 tree fndecl = get_callee_fndecl (exp), attr;
9682
9683 if (fndecl
9684 && (attr = lookup_attribute ("error",
9685 DECL_ATTRIBUTES (fndecl))) != NULL)
9686 error ("%Kcall to %qs declared with attribute error: %s",
9687 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9688 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9689 if (fndecl
9690 && (attr = lookup_attribute ("warning",
9691 DECL_ATTRIBUTES (fndecl))) != NULL)
9692 warning_at (tree_nonartificial_location (exp),
9693 0, "%Kcall to %qs declared with attribute warning: %s",
9694 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9695 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9696
9697 /* Check for a built-in function. */
9698 if (fndecl && DECL_BUILT_IN (fndecl))
9699 {
9700 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
9701 return expand_builtin (exp, target, subtarget, tmode, ignore);
9702 }
9703 }
9704 return expand_call (exp, target, ignore);
9705
9706 case VIEW_CONVERT_EXPR:
9707 op0 = NULL_RTX;
9708
9709 /* If we are converting to BLKmode, try to avoid an intermediate
9710 temporary by fetching an inner memory reference. */
9711 if (mode == BLKmode
9712 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9713 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
9714 && handled_component_p (treeop0))
9715 {
9716 enum machine_mode mode1;
9717 HOST_WIDE_INT bitsize, bitpos;
9718 tree offset;
9719 int unsignedp;
9720 int volatilep = 0;
9721 tree tem
9722 = get_inner_reference (treeop0, &bitsize, &bitpos,
9723 &offset, &mode1, &unsignedp, &volatilep,
9724 true);
9725 rtx orig_op0;
9726
9727 /* ??? We should work harder and deal with non-zero offsets. */
9728 if (!offset
9729 && (bitpos % BITS_PER_UNIT) == 0
9730 && bitsize >= 0
9731 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
9732 {
9733 /* See the normal_inner_ref case for the rationale. */
9734 orig_op0
9735 = expand_expr (tem,
9736 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9737 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9738 != INTEGER_CST)
9739 && modifier != EXPAND_STACK_PARM
9740 ? target : NULL_RTX),
9741 VOIDmode,
9742 (modifier == EXPAND_INITIALIZER
9743 || modifier == EXPAND_CONST_ADDRESS
9744 || modifier == EXPAND_STACK_PARM)
9745 ? modifier : EXPAND_NORMAL);
9746
9747 if (MEM_P (orig_op0))
9748 {
9749 op0 = orig_op0;
9750
9751 /* Get a reference to just this component. */
9752 if (modifier == EXPAND_CONST_ADDRESS
9753 || modifier == EXPAND_SUM
9754 || modifier == EXPAND_INITIALIZER)
9755 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
9756 else
9757 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
9758
9759 if (op0 == orig_op0)
9760 op0 = copy_rtx (op0);
9761
9762 set_mem_attributes (op0, treeop0, 0);
9763 if (REG_P (XEXP (op0, 0)))
9764 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9765
9766 MEM_VOLATILE_P (op0) |= volatilep;
9767 }
9768 }
9769 }
9770
9771 if (!op0)
9772 op0 = expand_expr (treeop0,
9773 NULL_RTX, VOIDmode, modifier);
9774
9775 /* If the input and output modes are both the same, we are done. */
9776 if (mode == GET_MODE (op0))
9777 ;
9778 /* If neither mode is BLKmode, and both modes are the same size
9779 then we can use gen_lowpart. */
9780 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
9781 && (GET_MODE_PRECISION (mode)
9782 == GET_MODE_PRECISION (GET_MODE (op0)))
9783 && !COMPLEX_MODE_P (GET_MODE (op0)))
9784 {
9785 if (GET_CODE (op0) == SUBREG)
9786 op0 = force_reg (GET_MODE (op0), op0);
9787 temp = gen_lowpart_common (mode, op0);
9788 if (temp)
9789 op0 = temp;
9790 else
9791 {
9792 if (!REG_P (op0) && !MEM_P (op0))
9793 op0 = force_reg (GET_MODE (op0), op0);
9794 op0 = gen_lowpart (mode, op0);
9795 }
9796 }
9797 /* If both types are integral, convert from one mode to the other. */
9798 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
9799 op0 = convert_modes (mode, GET_MODE (op0), op0,
9800 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9801 /* As a last resort, spill op0 to memory, and reload it in a
9802 different mode. */
9803 else if (!MEM_P (op0))
9804 {
9805 /* If the operand is not a MEM, force it into memory. Since we
9806 are going to be changing the mode of the MEM, don't call
9807 force_const_mem for constants because we don't allow pool
9808 constants to change mode. */
9809 tree inner_type = TREE_TYPE (treeop0);
9810
9811 gcc_assert (!TREE_ADDRESSABLE (exp));
9812
9813 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
9814 target
9815 = assign_stack_temp_for_type
9816 (TYPE_MODE (inner_type),
9817 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
9818
9819 emit_move_insn (target, op0);
9820 op0 = target;
9821 }
9822
9823 /* At this point, OP0 is in the correct mode. If the output type is
9824 such that the operand is known to be aligned, indicate that it is.
9825 Otherwise, we need only be concerned about alignment for non-BLKmode
9826 results. */
9827 if (MEM_P (op0))
9828 {
9829 op0 = copy_rtx (op0);
9830
9831 if (TYPE_ALIGN_OK (type))
9832 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
9833 else if (STRICT_ALIGNMENT
9834 && mode != BLKmode
9835 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
9836 {
9837 tree inner_type = TREE_TYPE (treeop0);
9838 HOST_WIDE_INT temp_size
9839 = MAX (int_size_in_bytes (inner_type),
9840 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
9841 rtx new_rtx
9842 = assign_stack_temp_for_type (mode, temp_size, 0, type);
9843 rtx new_with_op0_mode
9844 = adjust_address (new_rtx, GET_MODE (op0), 0);
9845
9846 gcc_assert (!TREE_ADDRESSABLE (exp));
9847
9848 if (GET_MODE (op0) == BLKmode)
9849 emit_block_move (new_with_op0_mode, op0,
9850 GEN_INT (GET_MODE_SIZE (mode)),
9851 (modifier == EXPAND_STACK_PARM
9852 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9853 else
9854 emit_move_insn (new_with_op0_mode, op0);
9855
9856 op0 = new_rtx;
9857 }
9858
9859 op0 = adjust_address (op0, mode, 0);
9860 }
9861
9862 return op0;
9863
9864 case COND_EXPR:
9865 /* A COND_EXPR with its type being VOID_TYPE represents a
9866 conditional jump and is handled in
9867 expand_gimple_cond_expr. */
9868 gcc_assert (!VOID_TYPE_P (type));
9869
9870 /* Note that COND_EXPRs whose type is a structure or union
9871 are required to be constructed to contain assignments of
9872 a temporary variable, so that we can evaluate them here
9873 for side effect only. If type is void, we must do likewise. */
9874
9875 gcc_assert (!TREE_ADDRESSABLE (type)
9876 && !ignore
9877 && TREE_TYPE (treeop1) != void_type_node
9878 && TREE_TYPE (treeop2) != void_type_node);
9879
9880 /* If we are not to produce a result, we have no target. Otherwise,
9881 if a target was specified use it; it will not be used as an
9882 intermediate target unless it is safe. If no target, use a
9883 temporary. */
9884
9885 if (modifier != EXPAND_STACK_PARM
9886 && original_target
9887 && safe_from_p (original_target, treeop0, 1)
9888 && GET_MODE (original_target) == mode
9889 #ifdef HAVE_conditional_move
9890 && (! can_conditionally_move_p (mode)
9891 || REG_P (original_target))
9892 #endif
9893 && !MEM_P (original_target))
9894 temp = original_target;
9895 else
9896 temp = assign_temp (type, 0, 0, 1);
9897
9898 do_pending_stack_adjust ();
9899 NO_DEFER_POP;
9900 op0 = gen_label_rtx ();
9901 op1 = gen_label_rtx ();
9902 jumpifnot (treeop0, op0, -1);
9903 store_expr (treeop1, temp,
9904 modifier == EXPAND_STACK_PARM,
9905 false);
9906
9907 emit_jump_insn (gen_jump (op1));
9908 emit_barrier ();
9909 emit_label (op0);
9910 store_expr (treeop2, temp,
9911 modifier == EXPAND_STACK_PARM,
9912 false);
9913
9914 emit_label (op1);
9915 OK_DEFER_POP;
9916 return temp;
9917
9918 case VEC_COND_EXPR:
9919 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9920 return target;
9921
9922 case MODIFY_EXPR:
9923 {
9924 tree lhs = treeop0;
9925 tree rhs = treeop1;
9926 gcc_assert (ignore);
9927
9928 /* Check for |= or &= of a bitfield of size one into another bitfield
9929 of size 1. In this case, (unless we need the result of the
9930 assignment) we can do this more efficiently with a
9931 test followed by an assignment, if necessary.
9932
9933 ??? At this point, we can't get a BIT_FIELD_REF here. But if
9934 things change so we do, this code should be enhanced to
9935 support it. */
9936 if (TREE_CODE (lhs) == COMPONENT_REF
9937 && (TREE_CODE (rhs) == BIT_IOR_EXPR
9938 || TREE_CODE (rhs) == BIT_AND_EXPR)
9939 && TREE_OPERAND (rhs, 0) == lhs
9940 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
9941 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
9942 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
9943 {
9944 rtx label = gen_label_rtx ();
9945 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
9946 do_jump (TREE_OPERAND (rhs, 1),
9947 value ? label : 0,
9948 value ? 0 : label, -1);
9949 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
9950 MOVE_NONTEMPORAL (exp));
9951 do_pending_stack_adjust ();
9952 emit_label (label);
9953 return const0_rtx;
9954 }
9955
9956 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
9957 return const0_rtx;
9958 }
9959
9960 case ADDR_EXPR:
9961 return expand_expr_addr_expr (exp, target, tmode, modifier);
9962
9963 case REALPART_EXPR:
9964 op0 = expand_normal (treeop0);
9965 return read_complex_part (op0, false);
9966
9967 case IMAGPART_EXPR:
9968 op0 = expand_normal (treeop0);
9969 return read_complex_part (op0, true);
9970
9971 case RETURN_EXPR:
9972 case LABEL_EXPR:
9973 case GOTO_EXPR:
9974 case SWITCH_EXPR:
9975 case ASM_EXPR:
9976 /* Expanded in cfgexpand.c. */
9977 gcc_unreachable ();
9978
9979 case TRY_CATCH_EXPR:
9980 case CATCH_EXPR:
9981 case EH_FILTER_EXPR:
9982 case TRY_FINALLY_EXPR:
9983 /* Lowered by tree-eh.c. */
9984 gcc_unreachable ();
9985
9986 case WITH_CLEANUP_EXPR:
9987 case CLEANUP_POINT_EXPR:
9988 case TARGET_EXPR:
9989 case CASE_LABEL_EXPR:
9990 case VA_ARG_EXPR:
9991 case BIND_EXPR:
9992 case INIT_EXPR:
9993 case CONJ_EXPR:
9994 case COMPOUND_EXPR:
9995 case PREINCREMENT_EXPR:
9996 case PREDECREMENT_EXPR:
9997 case POSTINCREMENT_EXPR:
9998 case POSTDECREMENT_EXPR:
9999 case LOOP_EXPR:
10000 case EXIT_EXPR:
10001 /* Lowered by gimplify.c. */
10002 gcc_unreachable ();
10003
10004 case FDESC_EXPR:
10005 /* Function descriptors are not valid except for as
10006 initialization constants, and should not be expanded. */
10007 gcc_unreachable ();
10008
10009 case WITH_SIZE_EXPR:
10010 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10011 have pulled out the size to use in whatever context it needed. */
10012 return expand_expr_real (treeop0, original_target, tmode,
10013 modifier, alt_rtl);
10014
10015 case COMPOUND_LITERAL_EXPR:
10016 {
10017 /* Initialize the anonymous variable declared in the compound
10018 literal, then return the variable. */
10019 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
10020
10021 /* Create RTL for this variable. */
10022 if (!DECL_RTL_SET_P (decl))
10023 {
10024 if (DECL_HARD_REGISTER (decl))
10025 /* The user specified an assembler name for this variable.
10026 Set that up now. */
10027 rest_of_decl_compilation (decl, 0, 0);
10028 else
10029 expand_decl (decl);
10030 }
10031
10032 return expand_expr_real (decl, original_target, tmode,
10033 modifier, alt_rtl);
10034 }
10035
10036 default:
10037 return expand_expr_real_2 (&ops, target, tmode, modifier);
10038 }
10039 }
10040 \f
10041 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10042 signedness of TYPE), possibly returning the result in TARGET. */
10043 static rtx
10044 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10045 {
10046 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10047 if (target && GET_MODE (target) != GET_MODE (exp))
10048 target = 0;
10049 /* For constant values, reduce using build_int_cst_type. */
10050 if (CONST_INT_P (exp))
10051 {
10052 HOST_WIDE_INT value = INTVAL (exp);
10053 tree t = build_int_cst_type (type, value);
10054 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10055 }
10056 else if (TYPE_UNSIGNED (type))
10057 {
10058 rtx mask = immed_double_int_const (double_int_mask (prec),
10059 GET_MODE (exp));
10060 return expand_and (GET_MODE (exp), exp, mask, target);
10061 }
10062 else
10063 {
10064 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10065 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10066 exp, count, target, 0);
10067 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10068 exp, count, target, 0);
10069 }
10070 }
10071 \f
10072 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10073 when applied to the address of EXP produces an address known to be
10074 aligned more than BIGGEST_ALIGNMENT. */
10075
10076 static int
10077 is_aligning_offset (const_tree offset, const_tree exp)
10078 {
10079 /* Strip off any conversions. */
10080 while (CONVERT_EXPR_P (offset))
10081 offset = TREE_OPERAND (offset, 0);
10082
10083 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10084 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10085 if (TREE_CODE (offset) != BIT_AND_EXPR
10086 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10087 || compare_tree_int (TREE_OPERAND (offset, 1),
10088 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10089 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10090 return 0;
10091
10092 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10093 It must be NEGATE_EXPR. Then strip any more conversions. */
10094 offset = TREE_OPERAND (offset, 0);
10095 while (CONVERT_EXPR_P (offset))
10096 offset = TREE_OPERAND (offset, 0);
10097
10098 if (TREE_CODE (offset) != NEGATE_EXPR)
10099 return 0;
10100
10101 offset = TREE_OPERAND (offset, 0);
10102 while (CONVERT_EXPR_P (offset))
10103 offset = TREE_OPERAND (offset, 0);
10104
10105 /* This must now be the address of EXP. */
10106 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10107 }
10108 \f
10109 /* Return the tree node if an ARG corresponds to a string constant or zero
10110 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10111 in bytes within the string that ARG is accessing. The type of the
10112 offset will be `sizetype'. */
10113
10114 tree
10115 string_constant (tree arg, tree *ptr_offset)
10116 {
10117 tree array, offset, lower_bound;
10118 STRIP_NOPS (arg);
10119
10120 if (TREE_CODE (arg) == ADDR_EXPR)
10121 {
10122 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10123 {
10124 *ptr_offset = size_zero_node;
10125 return TREE_OPERAND (arg, 0);
10126 }
10127 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10128 {
10129 array = TREE_OPERAND (arg, 0);
10130 offset = size_zero_node;
10131 }
10132 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10133 {
10134 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10135 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10136 if (TREE_CODE (array) != STRING_CST
10137 && TREE_CODE (array) != VAR_DECL)
10138 return 0;
10139
10140 /* Check if the array has a nonzero lower bound. */
10141 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10142 if (!integer_zerop (lower_bound))
10143 {
10144 /* If the offset and base aren't both constants, return 0. */
10145 if (TREE_CODE (lower_bound) != INTEGER_CST)
10146 return 0;
10147 if (TREE_CODE (offset) != INTEGER_CST)
10148 return 0;
10149 /* Adjust offset by the lower bound. */
10150 offset = size_diffop (fold_convert (sizetype, offset),
10151 fold_convert (sizetype, lower_bound));
10152 }
10153 }
10154 else
10155 return 0;
10156 }
10157 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10158 {
10159 tree arg0 = TREE_OPERAND (arg, 0);
10160 tree arg1 = TREE_OPERAND (arg, 1);
10161
10162 STRIP_NOPS (arg0);
10163 STRIP_NOPS (arg1);
10164
10165 if (TREE_CODE (arg0) == ADDR_EXPR
10166 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10167 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10168 {
10169 array = TREE_OPERAND (arg0, 0);
10170 offset = arg1;
10171 }
10172 else if (TREE_CODE (arg1) == ADDR_EXPR
10173 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10174 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10175 {
10176 array = TREE_OPERAND (arg1, 0);
10177 offset = arg0;
10178 }
10179 else
10180 return 0;
10181 }
10182 else
10183 return 0;
10184
10185 if (TREE_CODE (array) == STRING_CST)
10186 {
10187 *ptr_offset = fold_convert (sizetype, offset);
10188 return array;
10189 }
10190 else if (TREE_CODE (array) == VAR_DECL
10191 || TREE_CODE (array) == CONST_DECL)
10192 {
10193 int length;
10194
10195 /* Variables initialized to string literals can be handled too. */
10196 if (!const_value_known_p (array)
10197 || !DECL_INITIAL (array)
10198 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10199 return 0;
10200
10201 /* Avoid const char foo[4] = "abcde"; */
10202 if (DECL_SIZE_UNIT (array) == NULL_TREE
10203 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10204 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10205 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10206 return 0;
10207
10208 /* If variable is bigger than the string literal, OFFSET must be constant
10209 and inside of the bounds of the string literal. */
10210 offset = fold_convert (sizetype, offset);
10211 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10212 && (! host_integerp (offset, 1)
10213 || compare_tree_int (offset, length) >= 0))
10214 return 0;
10215
10216 *ptr_offset = offset;
10217 return DECL_INITIAL (array);
10218 }
10219
10220 return 0;
10221 }
10222 \f
10223 /* Generate code to calculate OPS, and exploded expression
10224 using a store-flag instruction and return an rtx for the result.
10225 OPS reflects a comparison.
10226
10227 If TARGET is nonzero, store the result there if convenient.
10228
10229 Return zero if there is no suitable set-flag instruction
10230 available on this machine.
10231
10232 Once expand_expr has been called on the arguments of the comparison,
10233 we are committed to doing the store flag, since it is not safe to
10234 re-evaluate the expression. We emit the store-flag insn by calling
10235 emit_store_flag, but only expand the arguments if we have a reason
10236 to believe that emit_store_flag will be successful. If we think that
10237 it will, but it isn't, we have to simulate the store-flag with a
10238 set/jump/set sequence. */
10239
10240 static rtx
10241 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10242 {
10243 enum rtx_code code;
10244 tree arg0, arg1, type;
10245 tree tem;
10246 enum machine_mode operand_mode;
10247 int unsignedp;
10248 rtx op0, op1;
10249 rtx subtarget = target;
10250 location_t loc = ops->location;
10251
10252 arg0 = ops->op0;
10253 arg1 = ops->op1;
10254
10255 /* Don't crash if the comparison was erroneous. */
10256 if (arg0 == error_mark_node || arg1 == error_mark_node)
10257 return const0_rtx;
10258
10259 type = TREE_TYPE (arg0);
10260 operand_mode = TYPE_MODE (type);
10261 unsignedp = TYPE_UNSIGNED (type);
10262
10263 /* We won't bother with BLKmode store-flag operations because it would mean
10264 passing a lot of information to emit_store_flag. */
10265 if (operand_mode == BLKmode)
10266 return 0;
10267
10268 /* We won't bother with store-flag operations involving function pointers
10269 when function pointers must be canonicalized before comparisons. */
10270 #ifdef HAVE_canonicalize_funcptr_for_compare
10271 if (HAVE_canonicalize_funcptr_for_compare
10272 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10273 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10274 == FUNCTION_TYPE))
10275 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10276 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10277 == FUNCTION_TYPE))))
10278 return 0;
10279 #endif
10280
10281 STRIP_NOPS (arg0);
10282 STRIP_NOPS (arg1);
10283
10284 /* Get the rtx comparison code to use. We know that EXP is a comparison
10285 operation of some type. Some comparisons against 1 and -1 can be
10286 converted to comparisons with zero. Do so here so that the tests
10287 below will be aware that we have a comparison with zero. These
10288 tests will not catch constants in the first operand, but constants
10289 are rarely passed as the first operand. */
10290
10291 switch (ops->code)
10292 {
10293 case EQ_EXPR:
10294 code = EQ;
10295 break;
10296 case NE_EXPR:
10297 code = NE;
10298 break;
10299 case LT_EXPR:
10300 if (integer_onep (arg1))
10301 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10302 else
10303 code = unsignedp ? LTU : LT;
10304 break;
10305 case LE_EXPR:
10306 if (! unsignedp && integer_all_onesp (arg1))
10307 arg1 = integer_zero_node, code = LT;
10308 else
10309 code = unsignedp ? LEU : LE;
10310 break;
10311 case GT_EXPR:
10312 if (! unsignedp && integer_all_onesp (arg1))
10313 arg1 = integer_zero_node, code = GE;
10314 else
10315 code = unsignedp ? GTU : GT;
10316 break;
10317 case GE_EXPR:
10318 if (integer_onep (arg1))
10319 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10320 else
10321 code = unsignedp ? GEU : GE;
10322 break;
10323
10324 case UNORDERED_EXPR:
10325 code = UNORDERED;
10326 break;
10327 case ORDERED_EXPR:
10328 code = ORDERED;
10329 break;
10330 case UNLT_EXPR:
10331 code = UNLT;
10332 break;
10333 case UNLE_EXPR:
10334 code = UNLE;
10335 break;
10336 case UNGT_EXPR:
10337 code = UNGT;
10338 break;
10339 case UNGE_EXPR:
10340 code = UNGE;
10341 break;
10342 case UNEQ_EXPR:
10343 code = UNEQ;
10344 break;
10345 case LTGT_EXPR:
10346 code = LTGT;
10347 break;
10348
10349 default:
10350 gcc_unreachable ();
10351 }
10352
10353 /* Put a constant second. */
10354 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10355 || TREE_CODE (arg0) == FIXED_CST)
10356 {
10357 tem = arg0; arg0 = arg1; arg1 = tem;
10358 code = swap_condition (code);
10359 }
10360
10361 /* If this is an equality or inequality test of a single bit, we can
10362 do this by shifting the bit being tested to the low-order bit and
10363 masking the result with the constant 1. If the condition was EQ,
10364 we xor it with 1. This does not require an scc insn and is faster
10365 than an scc insn even if we have it.
10366
10367 The code to make this transformation was moved into fold_single_bit_test,
10368 so we just call into the folder and expand its result. */
10369
10370 if ((code == NE || code == EQ)
10371 && TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1)
10372 && integer_pow2p (TREE_OPERAND (arg0, 1))
10373 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10374 {
10375 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10376 return expand_expr (fold_single_bit_test (loc,
10377 code == NE ? NE_EXPR : EQ_EXPR,
10378 arg0, arg1, type),
10379 target, VOIDmode, EXPAND_NORMAL);
10380 }
10381
10382 if (! get_subtarget (target)
10383 || GET_MODE (subtarget) != operand_mode)
10384 subtarget = 0;
10385
10386 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10387
10388 if (target == 0)
10389 target = gen_reg_rtx (mode);
10390
10391 /* Try a cstore if possible. */
10392 return emit_store_flag_force (target, code, op0, op1,
10393 operand_mode, unsignedp,
10394 (TYPE_PRECISION (ops->type) == 1
10395 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10396 }
10397 \f
10398
10399 /* Stubs in case we haven't got a casesi insn. */
10400 #ifndef HAVE_casesi
10401 # define HAVE_casesi 0
10402 # define gen_casesi(a, b, c, d, e) (0)
10403 # define CODE_FOR_casesi CODE_FOR_nothing
10404 #endif
10405
10406 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10407 0 otherwise (i.e. if there is no casesi instruction). */
10408 int
10409 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10410 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10411 rtx fallback_label ATTRIBUTE_UNUSED)
10412 {
10413 struct expand_operand ops[5];
10414 enum machine_mode index_mode = SImode;
10415 int index_bits = GET_MODE_BITSIZE (index_mode);
10416 rtx op1, op2, index;
10417
10418 if (! HAVE_casesi)
10419 return 0;
10420
10421 /* Convert the index to SImode. */
10422 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10423 {
10424 enum machine_mode omode = TYPE_MODE (index_type);
10425 rtx rangertx = expand_normal (range);
10426
10427 /* We must handle the endpoints in the original mode. */
10428 index_expr = build2 (MINUS_EXPR, index_type,
10429 index_expr, minval);
10430 minval = integer_zero_node;
10431 index = expand_normal (index_expr);
10432 if (default_label)
10433 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10434 omode, 1, default_label);
10435 /* Now we can safely truncate. */
10436 index = convert_to_mode (index_mode, index, 0);
10437 }
10438 else
10439 {
10440 if (TYPE_MODE (index_type) != index_mode)
10441 {
10442 index_type = lang_hooks.types.type_for_size (index_bits, 0);
10443 index_expr = fold_convert (index_type, index_expr);
10444 }
10445
10446 index = expand_normal (index_expr);
10447 }
10448
10449 do_pending_stack_adjust ();
10450
10451 op1 = expand_normal (minval);
10452 op2 = expand_normal (range);
10453
10454 create_input_operand (&ops[0], index, index_mode);
10455 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10456 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10457 create_fixed_operand (&ops[3], table_label);
10458 create_fixed_operand (&ops[4], (default_label
10459 ? default_label
10460 : fallback_label));
10461 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10462 return 1;
10463 }
10464
10465 /* Attempt to generate a tablejump instruction; same concept. */
10466 #ifndef HAVE_tablejump
10467 #define HAVE_tablejump 0
10468 #define gen_tablejump(x, y) (0)
10469 #endif
10470
10471 /* Subroutine of the next function.
10472
10473 INDEX is the value being switched on, with the lowest value
10474 in the table already subtracted.
10475 MODE is its expected mode (needed if INDEX is constant).
10476 RANGE is the length of the jump table.
10477 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10478
10479 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10480 index value is out of range. */
10481
10482 static void
10483 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10484 rtx default_label)
10485 {
10486 rtx temp, vector;
10487
10488 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10489 cfun->cfg->max_jumptable_ents = INTVAL (range);
10490
10491 /* Do an unsigned comparison (in the proper mode) between the index
10492 expression and the value which represents the length of the range.
10493 Since we just finished subtracting the lower bound of the range
10494 from the index expression, this comparison allows us to simultaneously
10495 check that the original index expression value is both greater than
10496 or equal to the minimum value of the range and less than or equal to
10497 the maximum value of the range. */
10498
10499 if (default_label)
10500 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10501 default_label);
10502
10503 /* If index is in range, it must fit in Pmode.
10504 Convert to Pmode so we can index with it. */
10505 if (mode != Pmode)
10506 index = convert_to_mode (Pmode, index, 1);
10507
10508 /* Don't let a MEM slip through, because then INDEX that comes
10509 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10510 and break_out_memory_refs will go to work on it and mess it up. */
10511 #ifdef PIC_CASE_VECTOR_ADDRESS
10512 if (flag_pic && !REG_P (index))
10513 index = copy_to_mode_reg (Pmode, index);
10514 #endif
10515
10516 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10517 GET_MODE_SIZE, because this indicates how large insns are. The other
10518 uses should all be Pmode, because they are addresses. This code
10519 could fail if addresses and insns are not the same size. */
10520 index = gen_rtx_PLUS (Pmode,
10521 gen_rtx_MULT (Pmode, index,
10522 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10523 gen_rtx_LABEL_REF (Pmode, table_label));
10524 #ifdef PIC_CASE_VECTOR_ADDRESS
10525 if (flag_pic)
10526 index = PIC_CASE_VECTOR_ADDRESS (index);
10527 else
10528 #endif
10529 index = memory_address (CASE_VECTOR_MODE, index);
10530 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10531 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10532 convert_move (temp, vector, 0);
10533
10534 emit_jump_insn (gen_tablejump (temp, table_label));
10535
10536 /* If we are generating PIC code or if the table is PC-relative, the
10537 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10538 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10539 emit_barrier ();
10540 }
10541
10542 int
10543 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10544 rtx table_label, rtx default_label)
10545 {
10546 rtx index;
10547
10548 if (! HAVE_tablejump)
10549 return 0;
10550
10551 index_expr = fold_build2 (MINUS_EXPR, index_type,
10552 fold_convert (index_type, index_expr),
10553 fold_convert (index_type, minval));
10554 index = expand_normal (index_expr);
10555 do_pending_stack_adjust ();
10556
10557 do_tablejump (index, TYPE_MODE (index_type),
10558 convert_modes (TYPE_MODE (index_type),
10559 TYPE_MODE (TREE_TYPE (range)),
10560 expand_normal (range),
10561 TYPE_UNSIGNED (TREE_TYPE (range))),
10562 table_label, default_label);
10563 return 1;
10564 }
10565
10566 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10567 static rtx
10568 const_vector_from_tree (tree exp)
10569 {
10570 rtvec v;
10571 int units, i;
10572 tree link, elt;
10573 enum machine_mode inner, mode;
10574
10575 mode = TYPE_MODE (TREE_TYPE (exp));
10576
10577 if (initializer_zerop (exp))
10578 return CONST0_RTX (mode);
10579
10580 units = GET_MODE_NUNITS (mode);
10581 inner = GET_MODE_INNER (mode);
10582
10583 v = rtvec_alloc (units);
10584
10585 link = TREE_VECTOR_CST_ELTS (exp);
10586 for (i = 0; link; link = TREE_CHAIN (link), ++i)
10587 {
10588 elt = TREE_VALUE (link);
10589
10590 if (TREE_CODE (elt) == REAL_CST)
10591 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10592 inner);
10593 else if (TREE_CODE (elt) == FIXED_CST)
10594 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10595 inner);
10596 else
10597 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10598 inner);
10599 }
10600
10601 /* Initialize remaining elements to 0. */
10602 for (; i < units; ++i)
10603 RTVEC_ELT (v, i) = CONST0_RTX (inner);
10604
10605 return gen_rtx_CONST_VECTOR (mode, v);
10606 }
10607
10608 /* Build a decl for a personality function given a language prefix. */
10609
10610 tree
10611 build_personality_function (const char *lang)
10612 {
10613 const char *unwind_and_version;
10614 tree decl, type;
10615 char *name;
10616
10617 switch (targetm_common.except_unwind_info (&global_options))
10618 {
10619 case UI_NONE:
10620 return NULL;
10621 case UI_SJLJ:
10622 unwind_and_version = "_sj0";
10623 break;
10624 case UI_DWARF2:
10625 case UI_TARGET:
10626 unwind_and_version = "_v0";
10627 break;
10628 default:
10629 gcc_unreachable ();
10630 }
10631
10632 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
10633
10634 type = build_function_type_list (integer_type_node, integer_type_node,
10635 long_long_unsigned_type_node,
10636 ptr_type_node, ptr_type_node, NULL_TREE);
10637 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
10638 get_identifier (name), type);
10639 DECL_ARTIFICIAL (decl) = 1;
10640 DECL_EXTERNAL (decl) = 1;
10641 TREE_PUBLIC (decl) = 1;
10642
10643 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
10644 are the flags assigned by targetm.encode_section_info. */
10645 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
10646
10647 return decl;
10648 }
10649
10650 /* Extracts the personality function of DECL and returns the corresponding
10651 libfunc. */
10652
10653 rtx
10654 get_personality_function (tree decl)
10655 {
10656 tree personality = DECL_FUNCTION_PERSONALITY (decl);
10657 enum eh_personality_kind pk;
10658
10659 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
10660 if (pk == eh_personality_none)
10661 return NULL;
10662
10663 if (!personality
10664 && pk == eh_personality_any)
10665 personality = lang_hooks.eh_personality ();
10666
10667 if (pk == eh_personality_lang)
10668 gcc_assert (personality != NULL_TREE);
10669
10670 return XEXP (DECL_RTL (personality), 0);
10671 }
10672
10673 #include "gt-expr.h"