tree.def (MISALIGNED_INDIRECT_REF): Remove.
[gcc.git] / gcc / expr.c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "rtl.h"
28 #include "tree.h"
29 #include "flags.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "except.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "insn-attr.h"
36 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
37 #include "expr.h"
38 #include "optabs.h"
39 #include "libfuncs.h"
40 #include "recog.h"
41 #include "reload.h"
42 #include "output.h"
43 #include "typeclass.h"
44 #include "toplev.h"
45 #include "langhooks.h"
46 #include "intl.h"
47 #include "tm_p.h"
48 #include "tree-iterator.h"
49 #include "tree-pass.h"
50 #include "tree-flow.h"
51 #include "target.h"
52 #include "timevar.h"
53 #include "df.h"
54 #include "diagnostic.h"
55 #include "ssaexpand.h"
56 #include "target-globals.h"
57
58 /* Decide whether a function's arguments should be processed
59 from first to last or from last to first.
60
61 They should if the stack and args grow in opposite directions, but
62 only if we have push insns. */
63
64 #ifdef PUSH_ROUNDING
65
66 #ifndef PUSH_ARGS_REVERSED
67 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
68 #define PUSH_ARGS_REVERSED /* If it's last to first. */
69 #endif
70 #endif
71
72 #endif
73
74 #ifndef STACK_PUSH_CODE
75 #ifdef STACK_GROWS_DOWNWARD
76 #define STACK_PUSH_CODE PRE_DEC
77 #else
78 #define STACK_PUSH_CODE PRE_INC
79 #endif
80 #endif
81
82
83 /* If this is nonzero, we do not bother generating VOLATILE
84 around volatile memory references, and we are willing to
85 output indirect addresses. If cse is to follow, we reject
86 indirect addresses so a useful potential cse is generated;
87 if it is used only once, instruction combination will produce
88 the same indirect address eventually. */
89 int cse_not_expected;
90
91 /* This structure is used by move_by_pieces to describe the move to
92 be performed. */
93 struct move_by_pieces_d
94 {
95 rtx to;
96 rtx to_addr;
97 int autinc_to;
98 int explicit_inc_to;
99 rtx from;
100 rtx from_addr;
101 int autinc_from;
102 int explicit_inc_from;
103 unsigned HOST_WIDE_INT len;
104 HOST_WIDE_INT offset;
105 int reverse;
106 };
107
108 /* This structure is used by store_by_pieces to describe the clear to
109 be performed. */
110
111 struct store_by_pieces_d
112 {
113 rtx to;
114 rtx to_addr;
115 int autinc_to;
116 int explicit_inc_to;
117 unsigned HOST_WIDE_INT len;
118 HOST_WIDE_INT offset;
119 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
120 void *constfundata;
121 int reverse;
122 };
123
124 static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT,
125 unsigned int,
126 unsigned int);
127 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
128 struct move_by_pieces_d *);
129 static bool block_move_libcall_safe_for_call_parm (void);
130 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
131 static tree emit_block_move_libcall_fn (int);
132 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
133 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
134 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
135 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
136 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
137 struct store_by_pieces_d *);
138 static tree clear_storage_libcall_fn (int);
139 static rtx compress_float_constant (rtx, rtx);
140 static rtx get_subtarget (rtx);
141 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
142 HOST_WIDE_INT, enum machine_mode,
143 tree, tree, int, alias_set_type);
144 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
145 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT, enum machine_mode,
146 tree, tree, alias_set_type, bool);
147
148 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
149
150 static int is_aligning_offset (const_tree, const_tree);
151 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
152 enum expand_modifier);
153 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
154 static rtx do_store_flag (sepops, rtx, enum machine_mode);
155 #ifdef PUSH_ROUNDING
156 static void emit_single_push_insn (enum machine_mode, rtx, tree);
157 #endif
158 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
159 static rtx const_vector_from_tree (tree);
160 static void write_complex_part (rtx, rtx, bool);
161
162 /* This macro is used to determine whether move_by_pieces should be called
163 to perform a structure copy. */
164 #ifndef MOVE_BY_PIECES_P
165 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
166 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
167 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
168 #endif
169
170 /* This macro is used to determine whether clear_by_pieces should be
171 called to clear storage. */
172 #ifndef CLEAR_BY_PIECES_P
173 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
174 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
175 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
176 #endif
177
178 /* This macro is used to determine whether store_by_pieces should be
179 called to "memset" storage with byte values other than zero. */
180 #ifndef SET_BY_PIECES_P
181 #define SET_BY_PIECES_P(SIZE, ALIGN) \
182 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
183 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
184 #endif
185
186 /* This macro is used to determine whether store_by_pieces should be
187 called to "memcpy" storage when the source is a constant string. */
188 #ifndef STORE_BY_PIECES_P
189 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
190 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
191 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
192 #endif
193
194 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
195
196 #ifndef SLOW_UNALIGNED_ACCESS
197 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
198 #endif
199 \f
200 /* This is run to set up which modes can be used
201 directly in memory and to initialize the block move optab. It is run
202 at the beginning of compilation and when the target is reinitialized. */
203
204 void
205 init_expr_target (void)
206 {
207 rtx insn, pat;
208 enum machine_mode mode;
209 int num_clobbers;
210 rtx mem, mem1;
211 rtx reg;
212
213 /* Try indexing by frame ptr and try by stack ptr.
214 It is known that on the Convex the stack ptr isn't a valid index.
215 With luck, one or the other is valid on any machine. */
216 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
217 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
218
219 /* A scratch register we can modify in-place below to avoid
220 useless RTL allocations. */
221 reg = gen_rtx_REG (VOIDmode, -1);
222
223 insn = rtx_alloc (INSN);
224 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
225 PATTERN (insn) = pat;
226
227 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
228 mode = (enum machine_mode) ((int) mode + 1))
229 {
230 int regno;
231
232 direct_load[(int) mode] = direct_store[(int) mode] = 0;
233 PUT_MODE (mem, mode);
234 PUT_MODE (mem1, mode);
235 PUT_MODE (reg, mode);
236
237 /* See if there is some register that can be used in this mode and
238 directly loaded or stored from memory. */
239
240 if (mode != VOIDmode && mode != BLKmode)
241 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
242 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
243 regno++)
244 {
245 if (! HARD_REGNO_MODE_OK (regno, mode))
246 continue;
247
248 SET_REGNO (reg, regno);
249
250 SET_SRC (pat) = mem;
251 SET_DEST (pat) = reg;
252 if (recog (pat, insn, &num_clobbers) >= 0)
253 direct_load[(int) mode] = 1;
254
255 SET_SRC (pat) = mem1;
256 SET_DEST (pat) = reg;
257 if (recog (pat, insn, &num_clobbers) >= 0)
258 direct_load[(int) mode] = 1;
259
260 SET_SRC (pat) = reg;
261 SET_DEST (pat) = mem;
262 if (recog (pat, insn, &num_clobbers) >= 0)
263 direct_store[(int) mode] = 1;
264
265 SET_SRC (pat) = reg;
266 SET_DEST (pat) = mem1;
267 if (recog (pat, insn, &num_clobbers) >= 0)
268 direct_store[(int) mode] = 1;
269 }
270 }
271
272 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
273
274 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
275 mode = GET_MODE_WIDER_MODE (mode))
276 {
277 enum machine_mode srcmode;
278 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
279 srcmode = GET_MODE_WIDER_MODE (srcmode))
280 {
281 enum insn_code ic;
282
283 ic = can_extend_p (mode, srcmode, 0);
284 if (ic == CODE_FOR_nothing)
285 continue;
286
287 PUT_MODE (mem, srcmode);
288
289 if ((*insn_data[ic].operand[1].predicate) (mem, srcmode))
290 float_extend_from_mem[mode][srcmode] = true;
291 }
292 }
293 }
294
295 /* This is run at the start of compiling a function. */
296
297 void
298 init_expr (void)
299 {
300 memset (&crtl->expr, 0, sizeof (crtl->expr));
301 }
302 \f
303 /* Copy data from FROM to TO, where the machine modes are not the same.
304 Both modes may be integer, or both may be floating, or both may be
305 fixed-point.
306 UNSIGNEDP should be nonzero if FROM is an unsigned type.
307 This causes zero-extension instead of sign-extension. */
308
309 void
310 convert_move (rtx to, rtx from, int unsignedp)
311 {
312 enum machine_mode to_mode = GET_MODE (to);
313 enum machine_mode from_mode = GET_MODE (from);
314 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
315 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
316 enum insn_code code;
317 rtx libcall;
318
319 /* rtx code for making an equivalent value. */
320 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
321 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
322
323
324 gcc_assert (to_real == from_real);
325 gcc_assert (to_mode != BLKmode);
326 gcc_assert (from_mode != BLKmode);
327
328 /* If the source and destination are already the same, then there's
329 nothing to do. */
330 if (to == from)
331 return;
332
333 /* If FROM is a SUBREG that indicates that we have already done at least
334 the required extension, strip it. We don't handle such SUBREGs as
335 TO here. */
336
337 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
338 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (from)))
339 >= GET_MODE_SIZE (to_mode))
340 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
341 from = gen_lowpart (to_mode, from), from_mode = to_mode;
342
343 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
344
345 if (to_mode == from_mode
346 || (from_mode == VOIDmode && CONSTANT_P (from)))
347 {
348 emit_move_insn (to, from);
349 return;
350 }
351
352 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
353 {
354 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
355
356 if (VECTOR_MODE_P (to_mode))
357 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
358 else
359 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
360
361 emit_move_insn (to, from);
362 return;
363 }
364
365 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
366 {
367 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
368 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
369 return;
370 }
371
372 if (to_real)
373 {
374 rtx value, insns;
375 convert_optab tab;
376
377 gcc_assert ((GET_MODE_PRECISION (from_mode)
378 != GET_MODE_PRECISION (to_mode))
379 || (DECIMAL_FLOAT_MODE_P (from_mode)
380 != DECIMAL_FLOAT_MODE_P (to_mode)));
381
382 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
383 /* Conversion between decimal float and binary float, same size. */
384 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
385 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
386 tab = sext_optab;
387 else
388 tab = trunc_optab;
389
390 /* Try converting directly if the insn is supported. */
391
392 code = convert_optab_handler (tab, to_mode, from_mode);
393 if (code != CODE_FOR_nothing)
394 {
395 emit_unop_insn (code, to, from,
396 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
397 return;
398 }
399
400 /* Otherwise use a libcall. */
401 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
402
403 /* Is this conversion implemented yet? */
404 gcc_assert (libcall);
405
406 start_sequence ();
407 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
408 1, from, from_mode);
409 insns = get_insns ();
410 end_sequence ();
411 emit_libcall_block (insns, to, value,
412 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
413 from)
414 : gen_rtx_FLOAT_EXTEND (to_mode, from));
415 return;
416 }
417
418 /* Handle pointer conversion. */ /* SPEE 900220. */
419 /* Targets are expected to provide conversion insns between PxImode and
420 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
421 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
422 {
423 enum machine_mode full_mode
424 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
425
426 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
427 != CODE_FOR_nothing);
428
429 if (full_mode != from_mode)
430 from = convert_to_mode (full_mode, from, unsignedp);
431 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
432 to, from, UNKNOWN);
433 return;
434 }
435 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
436 {
437 rtx new_from;
438 enum machine_mode full_mode
439 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
440
441 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)
442 != CODE_FOR_nothing);
443
444 if (to_mode == full_mode)
445 {
446 emit_unop_insn (convert_optab_handler (sext_optab, full_mode,
447 from_mode),
448 to, from, UNKNOWN);
449 return;
450 }
451
452 new_from = gen_reg_rtx (full_mode);
453 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode),
454 new_from, from, UNKNOWN);
455
456 /* else proceed to integer conversions below. */
457 from_mode = full_mode;
458 from = new_from;
459 }
460
461 /* Make sure both are fixed-point modes or both are not. */
462 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
463 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
464 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
465 {
466 /* If we widen from_mode to to_mode and they are in the same class,
467 we won't saturate the result.
468 Otherwise, always saturate the result to play safe. */
469 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
470 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
471 expand_fixed_convert (to, from, 0, 0);
472 else
473 expand_fixed_convert (to, from, 0, 1);
474 return;
475 }
476
477 /* Now both modes are integers. */
478
479 /* Handle expanding beyond a word. */
480 if (GET_MODE_BITSIZE (from_mode) < GET_MODE_BITSIZE (to_mode)
481 && GET_MODE_BITSIZE (to_mode) > BITS_PER_WORD)
482 {
483 rtx insns;
484 rtx lowpart;
485 rtx fill_value;
486 rtx lowfrom;
487 int i;
488 enum machine_mode lowpart_mode;
489 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
490
491 /* Try converting directly if the insn is supported. */
492 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
493 != CODE_FOR_nothing)
494 {
495 /* If FROM is a SUBREG, put it into a register. Do this
496 so that we always generate the same set of insns for
497 better cse'ing; if an intermediate assignment occurred,
498 we won't be doing the operation directly on the SUBREG. */
499 if (optimize > 0 && GET_CODE (from) == SUBREG)
500 from = force_reg (from_mode, from);
501 emit_unop_insn (code, to, from, equiv_code);
502 return;
503 }
504 /* Next, try converting via full word. */
505 else if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD
506 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
507 != CODE_FOR_nothing))
508 {
509 rtx word_to = gen_reg_rtx (word_mode);
510 if (REG_P (to))
511 {
512 if (reg_overlap_mentioned_p (to, from))
513 from = force_reg (from_mode, from);
514 emit_clobber (to);
515 }
516 convert_move (word_to, from, unsignedp);
517 emit_unop_insn (code, to, word_to, equiv_code);
518 return;
519 }
520
521 /* No special multiword conversion insn; do it by hand. */
522 start_sequence ();
523
524 /* Since we will turn this into a no conflict block, we must ensure
525 that the source does not overlap the target. */
526
527 if (reg_overlap_mentioned_p (to, from))
528 from = force_reg (from_mode, from);
529
530 /* Get a copy of FROM widened to a word, if necessary. */
531 if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD)
532 lowpart_mode = word_mode;
533 else
534 lowpart_mode = from_mode;
535
536 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
537
538 lowpart = gen_lowpart (lowpart_mode, to);
539 emit_move_insn (lowpart, lowfrom);
540
541 /* Compute the value to put in each remaining word. */
542 if (unsignedp)
543 fill_value = const0_rtx;
544 else
545 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
546 LT, lowfrom, const0_rtx,
547 VOIDmode, 0, -1);
548
549 /* Fill the remaining words. */
550 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
551 {
552 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
553 rtx subword = operand_subword (to, index, 1, to_mode);
554
555 gcc_assert (subword);
556
557 if (fill_value != subword)
558 emit_move_insn (subword, fill_value);
559 }
560
561 insns = get_insns ();
562 end_sequence ();
563
564 emit_insn (insns);
565 return;
566 }
567
568 /* Truncating multi-word to a word or less. */
569 if (GET_MODE_BITSIZE (from_mode) > BITS_PER_WORD
570 && GET_MODE_BITSIZE (to_mode) <= BITS_PER_WORD)
571 {
572 if (!((MEM_P (from)
573 && ! MEM_VOLATILE_P (from)
574 && direct_load[(int) to_mode]
575 && ! mode_dependent_address_p (XEXP (from, 0)))
576 || REG_P (from)
577 || GET_CODE (from) == SUBREG))
578 from = force_reg (from_mode, from);
579 convert_move (to, gen_lowpart (word_mode, from), 0);
580 return;
581 }
582
583 /* Now follow all the conversions between integers
584 no more than a word long. */
585
586 /* For truncation, usually we can just refer to FROM in a narrower mode. */
587 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
588 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode),
589 GET_MODE_BITSIZE (from_mode)))
590 {
591 if (!((MEM_P (from)
592 && ! MEM_VOLATILE_P (from)
593 && direct_load[(int) to_mode]
594 && ! mode_dependent_address_p (XEXP (from, 0)))
595 || REG_P (from)
596 || GET_CODE (from) == SUBREG))
597 from = force_reg (from_mode, from);
598 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
599 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
600 from = copy_to_reg (from);
601 emit_move_insn (to, gen_lowpart (to_mode, from));
602 return;
603 }
604
605 /* Handle extension. */
606 if (GET_MODE_BITSIZE (to_mode) > GET_MODE_BITSIZE (from_mode))
607 {
608 /* Convert directly if that works. */
609 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
610 != CODE_FOR_nothing)
611 {
612 emit_unop_insn (code, to, from, equiv_code);
613 return;
614 }
615 else
616 {
617 enum machine_mode intermediate;
618 rtx tmp;
619 tree shift_amount;
620
621 /* Search for a mode to convert via. */
622 for (intermediate = from_mode; intermediate != VOIDmode;
623 intermediate = GET_MODE_WIDER_MODE (intermediate))
624 if (((can_extend_p (to_mode, intermediate, unsignedp)
625 != CODE_FOR_nothing)
626 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
627 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode),
628 GET_MODE_BITSIZE (intermediate))))
629 && (can_extend_p (intermediate, from_mode, unsignedp)
630 != CODE_FOR_nothing))
631 {
632 convert_move (to, convert_to_mode (intermediate, from,
633 unsignedp), unsignedp);
634 return;
635 }
636
637 /* No suitable intermediate mode.
638 Generate what we need with shifts. */
639 shift_amount = build_int_cst (NULL_TREE,
640 GET_MODE_BITSIZE (to_mode)
641 - GET_MODE_BITSIZE (from_mode));
642 from = gen_lowpart (to_mode, force_reg (from_mode, from));
643 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
644 to, unsignedp);
645 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
646 to, unsignedp);
647 if (tmp != to)
648 emit_move_insn (to, tmp);
649 return;
650 }
651 }
652
653 /* Support special truncate insns for certain modes. */
654 if (convert_optab_handler (trunc_optab, to_mode,
655 from_mode) != CODE_FOR_nothing)
656 {
657 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
658 to, from, UNKNOWN);
659 return;
660 }
661
662 /* Handle truncation of volatile memrefs, and so on;
663 the things that couldn't be truncated directly,
664 and for which there was no special instruction.
665
666 ??? Code above formerly short-circuited this, for most integer
667 mode pairs, with a force_reg in from_mode followed by a recursive
668 call to this routine. Appears always to have been wrong. */
669 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode))
670 {
671 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
672 emit_move_insn (to, temp);
673 return;
674 }
675
676 /* Mode combination is not recognized. */
677 gcc_unreachable ();
678 }
679
680 /* Return an rtx for a value that would result
681 from converting X to mode MODE.
682 Both X and MODE may be floating, or both integer.
683 UNSIGNEDP is nonzero if X is an unsigned value.
684 This can be done by referring to a part of X in place
685 or by copying to a new temporary with conversion. */
686
687 rtx
688 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
689 {
690 return convert_modes (mode, VOIDmode, x, unsignedp);
691 }
692
693 /* Return an rtx for a value that would result
694 from converting X from mode OLDMODE to mode MODE.
695 Both modes may be floating, or both integer.
696 UNSIGNEDP is nonzero if X is an unsigned value.
697
698 This can be done by referring to a part of X in place
699 or by copying to a new temporary with conversion.
700
701 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
702
703 rtx
704 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
705 {
706 rtx temp;
707
708 /* If FROM is a SUBREG that indicates that we have already done at least
709 the required extension, strip it. */
710
711 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
712 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
713 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
714 x = gen_lowpart (mode, x);
715
716 if (GET_MODE (x) != VOIDmode)
717 oldmode = GET_MODE (x);
718
719 if (mode == oldmode)
720 return x;
721
722 /* There is one case that we must handle specially: If we are converting
723 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
724 we are to interpret the constant as unsigned, gen_lowpart will do
725 the wrong if the constant appears negative. What we want to do is
726 make the high-order word of the constant zero, not all ones. */
727
728 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
729 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
730 && CONST_INT_P (x) && INTVAL (x) < 0)
731 {
732 double_int val = uhwi_to_double_int (INTVAL (x));
733
734 /* We need to zero extend VAL. */
735 if (oldmode != VOIDmode)
736 val = double_int_zext (val, GET_MODE_BITSIZE (oldmode));
737
738 return immed_double_int_const (val, mode);
739 }
740
741 /* We can do this with a gen_lowpart if both desired and current modes
742 are integer, and this is either a constant integer, a register, or a
743 non-volatile MEM. Except for the constant case where MODE is no
744 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
745
746 if ((CONST_INT_P (x)
747 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
748 || (GET_MODE_CLASS (mode) == MODE_INT
749 && GET_MODE_CLASS (oldmode) == MODE_INT
750 && (GET_CODE (x) == CONST_DOUBLE
751 || (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (oldmode)
752 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
753 && direct_load[(int) mode])
754 || (REG_P (x)
755 && (! HARD_REGISTER_P (x)
756 || HARD_REGNO_MODE_OK (REGNO (x), mode))
757 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
758 GET_MODE_BITSIZE (GET_MODE (x)))))))))
759 {
760 /* ?? If we don't know OLDMODE, we have to assume here that
761 X does not need sign- or zero-extension. This may not be
762 the case, but it's the best we can do. */
763 if (CONST_INT_P (x) && oldmode != VOIDmode
764 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (oldmode))
765 {
766 HOST_WIDE_INT val = INTVAL (x);
767 int width = GET_MODE_BITSIZE (oldmode);
768
769 /* We must sign or zero-extend in this case. Start by
770 zero-extending, then sign extend if we need to. */
771 val &= ((HOST_WIDE_INT) 1 << width) - 1;
772 if (! unsignedp
773 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
774 val |= (HOST_WIDE_INT) (-1) << width;
775
776 return gen_int_mode (val, mode);
777 }
778
779 return gen_lowpart (mode, x);
780 }
781
782 /* Converting from integer constant into mode is always equivalent to an
783 subreg operation. */
784 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
785 {
786 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
787 return simplify_gen_subreg (mode, x, oldmode, 0);
788 }
789
790 temp = gen_reg_rtx (mode);
791 convert_move (temp, x, unsignedp);
792 return temp;
793 }
794 \f
795 /* STORE_MAX_PIECES is the number of bytes at a time that we can
796 store efficiently. Due to internal GCC limitations, this is
797 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
798 for an immediate constant. */
799
800 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
801
802 /* Determine whether the LEN bytes can be moved by using several move
803 instructions. Return nonzero if a call to move_by_pieces should
804 succeed. */
805
806 int
807 can_move_by_pieces (unsigned HOST_WIDE_INT len,
808 unsigned int align ATTRIBUTE_UNUSED)
809 {
810 return MOVE_BY_PIECES_P (len, align);
811 }
812
813 /* Generate several move instructions to copy LEN bytes from block FROM to
814 block TO. (These are MEM rtx's with BLKmode).
815
816 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
817 used to push FROM to the stack.
818
819 ALIGN is maximum stack alignment we can assume.
820
821 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
822 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
823 stpcpy. */
824
825 rtx
826 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
827 unsigned int align, int endp)
828 {
829 struct move_by_pieces_d data;
830 enum machine_mode to_addr_mode, from_addr_mode
831 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from));
832 rtx to_addr, from_addr = XEXP (from, 0);
833 unsigned int max_size = MOVE_MAX_PIECES + 1;
834 enum machine_mode mode = VOIDmode, tmode;
835 enum insn_code icode;
836
837 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
838
839 data.offset = 0;
840 data.from_addr = from_addr;
841 if (to)
842 {
843 to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
844 to_addr = XEXP (to, 0);
845 data.to = to;
846 data.autinc_to
847 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
848 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
849 data.reverse
850 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
851 }
852 else
853 {
854 to_addr_mode = VOIDmode;
855 to_addr = NULL_RTX;
856 data.to = NULL_RTX;
857 data.autinc_to = 1;
858 #ifdef STACK_GROWS_DOWNWARD
859 data.reverse = 1;
860 #else
861 data.reverse = 0;
862 #endif
863 }
864 data.to_addr = to_addr;
865 data.from = from;
866 data.autinc_from
867 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
868 || GET_CODE (from_addr) == POST_INC
869 || GET_CODE (from_addr) == POST_DEC);
870
871 data.explicit_inc_from = 0;
872 data.explicit_inc_to = 0;
873 if (data.reverse) data.offset = len;
874 data.len = len;
875
876 /* If copying requires more than two move insns,
877 copy addresses to registers (to make displacements shorter)
878 and use post-increment if available. */
879 if (!(data.autinc_from && data.autinc_to)
880 && move_by_pieces_ninsns (len, align, max_size) > 2)
881 {
882 /* Find the mode of the largest move... */
883 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
884 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
885 if (GET_MODE_SIZE (tmode) < max_size)
886 mode = tmode;
887
888 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
889 {
890 data.from_addr = copy_to_mode_reg (from_addr_mode,
891 plus_constant (from_addr, len));
892 data.autinc_from = 1;
893 data.explicit_inc_from = -1;
894 }
895 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
896 {
897 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
898 data.autinc_from = 1;
899 data.explicit_inc_from = 1;
900 }
901 if (!data.autinc_from && CONSTANT_P (from_addr))
902 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
903 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
904 {
905 data.to_addr = copy_to_mode_reg (to_addr_mode,
906 plus_constant (to_addr, len));
907 data.autinc_to = 1;
908 data.explicit_inc_to = -1;
909 }
910 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
911 {
912 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
913 data.autinc_to = 1;
914 data.explicit_inc_to = 1;
915 }
916 if (!data.autinc_to && CONSTANT_P (to_addr))
917 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
918 }
919
920 tmode = mode_for_size (MOVE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
921 if (align >= GET_MODE_ALIGNMENT (tmode))
922 align = GET_MODE_ALIGNMENT (tmode);
923 else
924 {
925 enum machine_mode xmode;
926
927 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
928 tmode != VOIDmode;
929 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
930 if (GET_MODE_SIZE (tmode) > MOVE_MAX_PIECES
931 || SLOW_UNALIGNED_ACCESS (tmode, align))
932 break;
933
934 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
935 }
936
937 /* First move what we can in the largest integer mode, then go to
938 successively smaller modes. */
939
940 while (max_size > 1)
941 {
942 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
943 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
944 if (GET_MODE_SIZE (tmode) < max_size)
945 mode = tmode;
946
947 if (mode == VOIDmode)
948 break;
949
950 icode = optab_handler (mov_optab, mode);
951 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
952 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
953
954 max_size = GET_MODE_SIZE (mode);
955 }
956
957 /* The code above should have handled everything. */
958 gcc_assert (!data.len);
959
960 if (endp)
961 {
962 rtx to1;
963
964 gcc_assert (!data.reverse);
965 if (data.autinc_to)
966 {
967 if (endp == 2)
968 {
969 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
970 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
971 else
972 data.to_addr = copy_to_mode_reg (to_addr_mode,
973 plus_constant (data.to_addr,
974 -1));
975 }
976 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
977 data.offset);
978 }
979 else
980 {
981 if (endp == 2)
982 --data.offset;
983 to1 = adjust_address (data.to, QImode, data.offset);
984 }
985 return to1;
986 }
987 else
988 return data.to;
989 }
990
991 /* Return number of insns required to move L bytes by pieces.
992 ALIGN (in bits) is maximum alignment we can assume. */
993
994 static unsigned HOST_WIDE_INT
995 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
996 unsigned int max_size)
997 {
998 unsigned HOST_WIDE_INT n_insns = 0;
999 enum machine_mode tmode;
1000
1001 tmode = mode_for_size (MOVE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
1002 if (align >= GET_MODE_ALIGNMENT (tmode))
1003 align = GET_MODE_ALIGNMENT (tmode);
1004 else
1005 {
1006 enum machine_mode tmode, xmode;
1007
1008 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
1009 tmode != VOIDmode;
1010 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
1011 if (GET_MODE_SIZE (tmode) > MOVE_MAX_PIECES
1012 || SLOW_UNALIGNED_ACCESS (tmode, align))
1013 break;
1014
1015 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
1016 }
1017
1018 while (max_size > 1)
1019 {
1020 enum machine_mode mode = VOIDmode;
1021 enum insn_code icode;
1022
1023 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
1024 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
1025 if (GET_MODE_SIZE (tmode) < max_size)
1026 mode = tmode;
1027
1028 if (mode == VOIDmode)
1029 break;
1030
1031 icode = optab_handler (mov_optab, mode);
1032 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1033 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1034
1035 max_size = GET_MODE_SIZE (mode);
1036 }
1037
1038 gcc_assert (!l);
1039 return n_insns;
1040 }
1041
1042 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1043 with move instructions for mode MODE. GENFUN is the gen_... function
1044 to make a move insn for that mode. DATA has all the other info. */
1045
1046 static void
1047 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1048 struct move_by_pieces_d *data)
1049 {
1050 unsigned int size = GET_MODE_SIZE (mode);
1051 rtx to1 = NULL_RTX, from1;
1052
1053 while (data->len >= size)
1054 {
1055 if (data->reverse)
1056 data->offset -= size;
1057
1058 if (data->to)
1059 {
1060 if (data->autinc_to)
1061 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1062 data->offset);
1063 else
1064 to1 = adjust_address (data->to, mode, data->offset);
1065 }
1066
1067 if (data->autinc_from)
1068 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1069 data->offset);
1070 else
1071 from1 = adjust_address (data->from, mode, data->offset);
1072
1073 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1074 emit_insn (gen_add2_insn (data->to_addr,
1075 GEN_INT (-(HOST_WIDE_INT)size)));
1076 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1077 emit_insn (gen_add2_insn (data->from_addr,
1078 GEN_INT (-(HOST_WIDE_INT)size)));
1079
1080 if (data->to)
1081 emit_insn ((*genfun) (to1, from1));
1082 else
1083 {
1084 #ifdef PUSH_ROUNDING
1085 emit_single_push_insn (mode, from1, NULL);
1086 #else
1087 gcc_unreachable ();
1088 #endif
1089 }
1090
1091 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1092 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1093 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1094 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1095
1096 if (! data->reverse)
1097 data->offset += size;
1098
1099 data->len -= size;
1100 }
1101 }
1102 \f
1103 /* Emit code to move a block Y to a block X. This may be done with
1104 string-move instructions, with multiple scalar move instructions,
1105 or with a library call.
1106
1107 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1108 SIZE is an rtx that says how long they are.
1109 ALIGN is the maximum alignment we can assume they have.
1110 METHOD describes what kind of copy this is, and what mechanisms may be used.
1111
1112 Return the address of the new block, if memcpy is called and returns it,
1113 0 otherwise. */
1114
1115 rtx
1116 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1117 unsigned int expected_align, HOST_WIDE_INT expected_size)
1118 {
1119 bool may_use_call;
1120 rtx retval = 0;
1121 unsigned int align;
1122
1123 gcc_assert (size);
1124 if (CONST_INT_P (size)
1125 && INTVAL (size) == 0)
1126 return 0;
1127
1128 switch (method)
1129 {
1130 case BLOCK_OP_NORMAL:
1131 case BLOCK_OP_TAILCALL:
1132 may_use_call = true;
1133 break;
1134
1135 case BLOCK_OP_CALL_PARM:
1136 may_use_call = block_move_libcall_safe_for_call_parm ();
1137
1138 /* Make inhibit_defer_pop nonzero around the library call
1139 to force it to pop the arguments right away. */
1140 NO_DEFER_POP;
1141 break;
1142
1143 case BLOCK_OP_NO_LIBCALL:
1144 may_use_call = false;
1145 break;
1146
1147 default:
1148 gcc_unreachable ();
1149 }
1150
1151 gcc_assert (MEM_P (x) && MEM_P (y));
1152 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1153 gcc_assert (align >= BITS_PER_UNIT);
1154
1155 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1156 block copy is more efficient for other large modes, e.g. DCmode. */
1157 x = adjust_address (x, BLKmode, 0);
1158 y = adjust_address (y, BLKmode, 0);
1159
1160 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1161 can be incorrect is coming from __builtin_memcpy. */
1162 if (CONST_INT_P (size))
1163 {
1164 x = shallow_copy_rtx (x);
1165 y = shallow_copy_rtx (y);
1166 set_mem_size (x, size);
1167 set_mem_size (y, size);
1168 }
1169
1170 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1171 move_by_pieces (x, y, INTVAL (size), align, 0);
1172 else if (emit_block_move_via_movmem (x, y, size, align,
1173 expected_align, expected_size))
1174 ;
1175 else if (may_use_call
1176 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1177 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1178 retval = emit_block_move_via_libcall (x, y, size,
1179 method == BLOCK_OP_TAILCALL);
1180 else
1181 emit_block_move_via_loop (x, y, size, align);
1182
1183 if (method == BLOCK_OP_CALL_PARM)
1184 OK_DEFER_POP;
1185
1186 return retval;
1187 }
1188
1189 rtx
1190 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1191 {
1192 return emit_block_move_hints (x, y, size, method, 0, -1);
1193 }
1194
1195 /* A subroutine of emit_block_move. Returns true if calling the
1196 block move libcall will not clobber any parameters which may have
1197 already been placed on the stack. */
1198
1199 static bool
1200 block_move_libcall_safe_for_call_parm (void)
1201 {
1202 #if defined (REG_PARM_STACK_SPACE)
1203 tree fn;
1204 #endif
1205
1206 /* If arguments are pushed on the stack, then they're safe. */
1207 if (PUSH_ARGS)
1208 return true;
1209
1210 /* If registers go on the stack anyway, any argument is sure to clobber
1211 an outgoing argument. */
1212 #if defined (REG_PARM_STACK_SPACE)
1213 fn = emit_block_move_libcall_fn (false);
1214 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1215 depend on its argument. */
1216 (void) fn;
1217 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1218 && REG_PARM_STACK_SPACE (fn) != 0)
1219 return false;
1220 #endif
1221
1222 /* If any argument goes in memory, then it might clobber an outgoing
1223 argument. */
1224 {
1225 CUMULATIVE_ARGS args_so_far;
1226 tree fn, arg;
1227
1228 fn = emit_block_move_libcall_fn (false);
1229 INIT_CUMULATIVE_ARGS (args_so_far, TREE_TYPE (fn), NULL_RTX, 0, 3);
1230
1231 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1232 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1233 {
1234 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1235 rtx tmp = targetm.calls.function_arg (&args_so_far, mode,
1236 NULL_TREE, true);
1237 if (!tmp || !REG_P (tmp))
1238 return false;
1239 if (targetm.calls.arg_partial_bytes (&args_so_far, mode, NULL, 1))
1240 return false;
1241 targetm.calls.function_arg_advance (&args_so_far, mode,
1242 NULL_TREE, true);
1243 }
1244 }
1245 return true;
1246 }
1247
1248 /* A subroutine of emit_block_move. Expand a movmem pattern;
1249 return true if successful. */
1250
1251 static bool
1252 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1253 unsigned int expected_align, HOST_WIDE_INT expected_size)
1254 {
1255 rtx opalign = GEN_INT (align / BITS_PER_UNIT);
1256 int save_volatile_ok = volatile_ok;
1257 enum machine_mode mode;
1258
1259 if (expected_align < align)
1260 expected_align = align;
1261
1262 /* Since this is a move insn, we don't care about volatility. */
1263 volatile_ok = 1;
1264
1265 /* Try the most limited insn first, because there's no point
1266 including more than one in the machine description unless
1267 the more limited one has some advantage. */
1268
1269 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1270 mode = GET_MODE_WIDER_MODE (mode))
1271 {
1272 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1273 insn_operand_predicate_fn pred;
1274
1275 if (code != CODE_FOR_nothing
1276 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1277 here because if SIZE is less than the mode mask, as it is
1278 returned by the macro, it will definitely be less than the
1279 actual mode mask. */
1280 && ((CONST_INT_P (size)
1281 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1282 <= (GET_MODE_MASK (mode) >> 1)))
1283 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD)
1284 && ((pred = insn_data[(int) code].operand[0].predicate) == 0
1285 || (*pred) (x, BLKmode))
1286 && ((pred = insn_data[(int) code].operand[1].predicate) == 0
1287 || (*pred) (y, BLKmode))
1288 && ((pred = insn_data[(int) code].operand[3].predicate) == 0
1289 || (*pred) (opalign, VOIDmode)))
1290 {
1291 rtx op2;
1292 rtx last = get_last_insn ();
1293 rtx pat;
1294
1295 op2 = convert_to_mode (mode, size, 1);
1296 pred = insn_data[(int) code].operand[2].predicate;
1297 if (pred != 0 && ! (*pred) (op2, mode))
1298 op2 = copy_to_mode_reg (mode, op2);
1299
1300 /* ??? When called via emit_block_move_for_call, it'd be
1301 nice if there were some way to inform the backend, so
1302 that it doesn't fail the expansion because it thinks
1303 emitting the libcall would be more efficient. */
1304
1305 if (insn_data[(int) code].n_operands == 4)
1306 pat = GEN_FCN ((int) code) (x, y, op2, opalign);
1307 else
1308 pat = GEN_FCN ((int) code) (x, y, op2, opalign,
1309 GEN_INT (expected_align
1310 / BITS_PER_UNIT),
1311 GEN_INT (expected_size));
1312 if (pat)
1313 {
1314 emit_insn (pat);
1315 volatile_ok = save_volatile_ok;
1316 return true;
1317 }
1318 else
1319 delete_insns_since (last);
1320 }
1321 }
1322
1323 volatile_ok = save_volatile_ok;
1324 return false;
1325 }
1326
1327 /* A subroutine of emit_block_move. Expand a call to memcpy.
1328 Return the return value from memcpy, 0 otherwise. */
1329
1330 rtx
1331 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1332 {
1333 rtx dst_addr, src_addr;
1334 tree call_expr, fn, src_tree, dst_tree, size_tree;
1335 enum machine_mode size_mode;
1336 rtx retval;
1337
1338 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1339 pseudos. We can then place those new pseudos into a VAR_DECL and
1340 use them later. */
1341
1342 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1343 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1344
1345 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1346 src_addr = convert_memory_address (ptr_mode, src_addr);
1347
1348 dst_tree = make_tree (ptr_type_node, dst_addr);
1349 src_tree = make_tree (ptr_type_node, src_addr);
1350
1351 size_mode = TYPE_MODE (sizetype);
1352
1353 size = convert_to_mode (size_mode, size, 1);
1354 size = copy_to_mode_reg (size_mode, size);
1355
1356 /* It is incorrect to use the libcall calling conventions to call
1357 memcpy in this context. This could be a user call to memcpy and
1358 the user may wish to examine the return value from memcpy. For
1359 targets where libcalls and normal calls have different conventions
1360 for returning pointers, we could end up generating incorrect code. */
1361
1362 size_tree = make_tree (sizetype, size);
1363
1364 fn = emit_block_move_libcall_fn (true);
1365 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1366 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1367
1368 retval = expand_normal (call_expr);
1369
1370 return retval;
1371 }
1372
1373 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1374 for the function we use for block copies. The first time FOR_CALL
1375 is true, we call assemble_external. */
1376
1377 static GTY(()) tree block_move_fn;
1378
1379 void
1380 init_block_move_fn (const char *asmspec)
1381 {
1382 if (!block_move_fn)
1383 {
1384 tree args, fn;
1385
1386 fn = get_identifier ("memcpy");
1387 args = build_function_type_list (ptr_type_node, ptr_type_node,
1388 const_ptr_type_node, sizetype,
1389 NULL_TREE);
1390
1391 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1392 DECL_EXTERNAL (fn) = 1;
1393 TREE_PUBLIC (fn) = 1;
1394 DECL_ARTIFICIAL (fn) = 1;
1395 TREE_NOTHROW (fn) = 1;
1396 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1397 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1398
1399 block_move_fn = fn;
1400 }
1401
1402 if (asmspec)
1403 set_user_assembler_name (block_move_fn, asmspec);
1404 }
1405
1406 static tree
1407 emit_block_move_libcall_fn (int for_call)
1408 {
1409 static bool emitted_extern;
1410
1411 if (!block_move_fn)
1412 init_block_move_fn (NULL);
1413
1414 if (for_call && !emitted_extern)
1415 {
1416 emitted_extern = true;
1417 make_decl_rtl (block_move_fn);
1418 assemble_external (block_move_fn);
1419 }
1420
1421 return block_move_fn;
1422 }
1423
1424 /* A subroutine of emit_block_move. Copy the data via an explicit
1425 loop. This is used only when libcalls are forbidden. */
1426 /* ??? It'd be nice to copy in hunks larger than QImode. */
1427
1428 static void
1429 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1430 unsigned int align ATTRIBUTE_UNUSED)
1431 {
1432 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1433 enum machine_mode x_addr_mode
1434 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x));
1435 enum machine_mode y_addr_mode
1436 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y));
1437 enum machine_mode iter_mode;
1438
1439 iter_mode = GET_MODE (size);
1440 if (iter_mode == VOIDmode)
1441 iter_mode = word_mode;
1442
1443 top_label = gen_label_rtx ();
1444 cmp_label = gen_label_rtx ();
1445 iter = gen_reg_rtx (iter_mode);
1446
1447 emit_move_insn (iter, const0_rtx);
1448
1449 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1450 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1451 do_pending_stack_adjust ();
1452
1453 emit_jump (cmp_label);
1454 emit_label (top_label);
1455
1456 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1457 x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp);
1458
1459 if (x_addr_mode != y_addr_mode)
1460 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1461 y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp);
1462
1463 x = change_address (x, QImode, x_addr);
1464 y = change_address (y, QImode, y_addr);
1465
1466 emit_move_insn (x, y);
1467
1468 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1469 true, OPTAB_LIB_WIDEN);
1470 if (tmp != iter)
1471 emit_move_insn (iter, tmp);
1472
1473 emit_label (cmp_label);
1474
1475 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1476 true, top_label);
1477 }
1478 \f
1479 /* Copy all or part of a value X into registers starting at REGNO.
1480 The number of registers to be filled is NREGS. */
1481
1482 void
1483 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1484 {
1485 int i;
1486 #ifdef HAVE_load_multiple
1487 rtx pat;
1488 rtx last;
1489 #endif
1490
1491 if (nregs == 0)
1492 return;
1493
1494 if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
1495 x = validize_mem (force_const_mem (mode, x));
1496
1497 /* See if the machine can do this with a load multiple insn. */
1498 #ifdef HAVE_load_multiple
1499 if (HAVE_load_multiple)
1500 {
1501 last = get_last_insn ();
1502 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1503 GEN_INT (nregs));
1504 if (pat)
1505 {
1506 emit_insn (pat);
1507 return;
1508 }
1509 else
1510 delete_insns_since (last);
1511 }
1512 #endif
1513
1514 for (i = 0; i < nregs; i++)
1515 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1516 operand_subword_force (x, i, mode));
1517 }
1518
1519 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1520 The number of registers to be filled is NREGS. */
1521
1522 void
1523 move_block_from_reg (int regno, rtx x, int nregs)
1524 {
1525 int i;
1526
1527 if (nregs == 0)
1528 return;
1529
1530 /* See if the machine can do this with a store multiple insn. */
1531 #ifdef HAVE_store_multiple
1532 if (HAVE_store_multiple)
1533 {
1534 rtx last = get_last_insn ();
1535 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1536 GEN_INT (nregs));
1537 if (pat)
1538 {
1539 emit_insn (pat);
1540 return;
1541 }
1542 else
1543 delete_insns_since (last);
1544 }
1545 #endif
1546
1547 for (i = 0; i < nregs; i++)
1548 {
1549 rtx tem = operand_subword (x, i, 1, BLKmode);
1550
1551 gcc_assert (tem);
1552
1553 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1554 }
1555 }
1556
1557 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1558 ORIG, where ORIG is a non-consecutive group of registers represented by
1559 a PARALLEL. The clone is identical to the original except in that the
1560 original set of registers is replaced by a new set of pseudo registers.
1561 The new set has the same modes as the original set. */
1562
1563 rtx
1564 gen_group_rtx (rtx orig)
1565 {
1566 int i, length;
1567 rtx *tmps;
1568
1569 gcc_assert (GET_CODE (orig) == PARALLEL);
1570
1571 length = XVECLEN (orig, 0);
1572 tmps = XALLOCAVEC (rtx, length);
1573
1574 /* Skip a NULL entry in first slot. */
1575 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1576
1577 if (i)
1578 tmps[0] = 0;
1579
1580 for (; i < length; i++)
1581 {
1582 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1583 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1584
1585 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1586 }
1587
1588 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1589 }
1590
1591 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1592 except that values are placed in TMPS[i], and must later be moved
1593 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1594
1595 static void
1596 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1597 {
1598 rtx src;
1599 int start, i;
1600 enum machine_mode m = GET_MODE (orig_src);
1601
1602 gcc_assert (GET_CODE (dst) == PARALLEL);
1603
1604 if (m != VOIDmode
1605 && !SCALAR_INT_MODE_P (m)
1606 && !MEM_P (orig_src)
1607 && GET_CODE (orig_src) != CONCAT)
1608 {
1609 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1610 if (imode == BLKmode)
1611 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1612 else
1613 src = gen_reg_rtx (imode);
1614 if (imode != BLKmode)
1615 src = gen_lowpart (GET_MODE (orig_src), src);
1616 emit_move_insn (src, orig_src);
1617 /* ...and back again. */
1618 if (imode != BLKmode)
1619 src = gen_lowpart (imode, src);
1620 emit_group_load_1 (tmps, dst, src, type, ssize);
1621 return;
1622 }
1623
1624 /* Check for a NULL entry, used to indicate that the parameter goes
1625 both on the stack and in registers. */
1626 if (XEXP (XVECEXP (dst, 0, 0), 0))
1627 start = 0;
1628 else
1629 start = 1;
1630
1631 /* Process the pieces. */
1632 for (i = start; i < XVECLEN (dst, 0); i++)
1633 {
1634 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1635 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1636 unsigned int bytelen = GET_MODE_SIZE (mode);
1637 int shift = 0;
1638
1639 /* Handle trailing fragments that run over the size of the struct. */
1640 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1641 {
1642 /* Arrange to shift the fragment to where it belongs.
1643 extract_bit_field loads to the lsb of the reg. */
1644 if (
1645 #ifdef BLOCK_REG_PADDING
1646 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1647 == (BYTES_BIG_ENDIAN ? upward : downward)
1648 #else
1649 BYTES_BIG_ENDIAN
1650 #endif
1651 )
1652 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1653 bytelen = ssize - bytepos;
1654 gcc_assert (bytelen > 0);
1655 }
1656
1657 /* If we won't be loading directly from memory, protect the real source
1658 from strange tricks we might play; but make sure that the source can
1659 be loaded directly into the destination. */
1660 src = orig_src;
1661 if (!MEM_P (orig_src)
1662 && (!CONSTANT_P (orig_src)
1663 || (GET_MODE (orig_src) != mode
1664 && GET_MODE (orig_src) != VOIDmode)))
1665 {
1666 if (GET_MODE (orig_src) == VOIDmode)
1667 src = gen_reg_rtx (mode);
1668 else
1669 src = gen_reg_rtx (GET_MODE (orig_src));
1670
1671 emit_move_insn (src, orig_src);
1672 }
1673
1674 /* Optimize the access just a bit. */
1675 if (MEM_P (src)
1676 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1677 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1678 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1679 && bytelen == GET_MODE_SIZE (mode))
1680 {
1681 tmps[i] = gen_reg_rtx (mode);
1682 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1683 }
1684 else if (COMPLEX_MODE_P (mode)
1685 && GET_MODE (src) == mode
1686 && bytelen == GET_MODE_SIZE (mode))
1687 /* Let emit_move_complex do the bulk of the work. */
1688 tmps[i] = src;
1689 else if (GET_CODE (src) == CONCAT)
1690 {
1691 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1692 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1693
1694 if ((bytepos == 0 && bytelen == slen0)
1695 || (bytepos != 0 && bytepos + bytelen <= slen))
1696 {
1697 /* The following assumes that the concatenated objects all
1698 have the same size. In this case, a simple calculation
1699 can be used to determine the object and the bit field
1700 to be extracted. */
1701 tmps[i] = XEXP (src, bytepos / slen0);
1702 if (! CONSTANT_P (tmps[i])
1703 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1704 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1705 (bytepos % slen0) * BITS_PER_UNIT,
1706 1, NULL_RTX, mode, mode);
1707 }
1708 else
1709 {
1710 rtx mem;
1711
1712 gcc_assert (!bytepos);
1713 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1714 emit_move_insn (mem, src);
1715 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1716 0, 1, NULL_RTX, mode, mode);
1717 }
1718 }
1719 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1720 SIMD register, which is currently broken. While we get GCC
1721 to emit proper RTL for these cases, let's dump to memory. */
1722 else if (VECTOR_MODE_P (GET_MODE (dst))
1723 && REG_P (src))
1724 {
1725 int slen = GET_MODE_SIZE (GET_MODE (src));
1726 rtx mem;
1727
1728 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1729 emit_move_insn (mem, src);
1730 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1731 }
1732 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1733 && XVECLEN (dst, 0) > 1)
1734 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1735 else if (CONSTANT_P (src))
1736 {
1737 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1738
1739 if (len == ssize)
1740 tmps[i] = src;
1741 else
1742 {
1743 rtx first, second;
1744
1745 gcc_assert (2 * len == ssize);
1746 split_double (src, &first, &second);
1747 if (i)
1748 tmps[i] = second;
1749 else
1750 tmps[i] = first;
1751 }
1752 }
1753 else if (REG_P (src) && GET_MODE (src) == mode)
1754 tmps[i] = src;
1755 else
1756 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1757 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
1758 mode, mode);
1759
1760 if (shift)
1761 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1762 build_int_cst (NULL_TREE, shift), tmps[i], 0);
1763 }
1764 }
1765
1766 /* Emit code to move a block SRC of type TYPE to a block DST,
1767 where DST is non-consecutive registers represented by a PARALLEL.
1768 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1769 if not known. */
1770
1771 void
1772 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1773 {
1774 rtx *tmps;
1775 int i;
1776
1777 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1778 emit_group_load_1 (tmps, dst, src, type, ssize);
1779
1780 /* Copy the extracted pieces into the proper (probable) hard regs. */
1781 for (i = 0; i < XVECLEN (dst, 0); i++)
1782 {
1783 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1784 if (d == NULL)
1785 continue;
1786 emit_move_insn (d, tmps[i]);
1787 }
1788 }
1789
1790 /* Similar, but load SRC into new pseudos in a format that looks like
1791 PARALLEL. This can later be fed to emit_group_move to get things
1792 in the right place. */
1793
1794 rtx
1795 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1796 {
1797 rtvec vec;
1798 int i;
1799
1800 vec = rtvec_alloc (XVECLEN (parallel, 0));
1801 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1802
1803 /* Convert the vector to look just like the original PARALLEL, except
1804 with the computed values. */
1805 for (i = 0; i < XVECLEN (parallel, 0); i++)
1806 {
1807 rtx e = XVECEXP (parallel, 0, i);
1808 rtx d = XEXP (e, 0);
1809
1810 if (d)
1811 {
1812 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1813 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1814 }
1815 RTVEC_ELT (vec, i) = e;
1816 }
1817
1818 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1819 }
1820
1821 /* Emit code to move a block SRC to block DST, where SRC and DST are
1822 non-consecutive groups of registers, each represented by a PARALLEL. */
1823
1824 void
1825 emit_group_move (rtx dst, rtx src)
1826 {
1827 int i;
1828
1829 gcc_assert (GET_CODE (src) == PARALLEL
1830 && GET_CODE (dst) == PARALLEL
1831 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1832
1833 /* Skip first entry if NULL. */
1834 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1835 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1836 XEXP (XVECEXP (src, 0, i), 0));
1837 }
1838
1839 /* Move a group of registers represented by a PARALLEL into pseudos. */
1840
1841 rtx
1842 emit_group_move_into_temps (rtx src)
1843 {
1844 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1845 int i;
1846
1847 for (i = 0; i < XVECLEN (src, 0); i++)
1848 {
1849 rtx e = XVECEXP (src, 0, i);
1850 rtx d = XEXP (e, 0);
1851
1852 if (d)
1853 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1854 RTVEC_ELT (vec, i) = e;
1855 }
1856
1857 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1858 }
1859
1860 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1861 where SRC is non-consecutive registers represented by a PARALLEL.
1862 SSIZE represents the total size of block ORIG_DST, or -1 if not
1863 known. */
1864
1865 void
1866 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1867 {
1868 rtx *tmps, dst;
1869 int start, finish, i;
1870 enum machine_mode m = GET_MODE (orig_dst);
1871
1872 gcc_assert (GET_CODE (src) == PARALLEL);
1873
1874 if (!SCALAR_INT_MODE_P (m)
1875 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1876 {
1877 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1878 if (imode == BLKmode)
1879 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1880 else
1881 dst = gen_reg_rtx (imode);
1882 emit_group_store (dst, src, type, ssize);
1883 if (imode != BLKmode)
1884 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1885 emit_move_insn (orig_dst, dst);
1886 return;
1887 }
1888
1889 /* Check for a NULL entry, used to indicate that the parameter goes
1890 both on the stack and in registers. */
1891 if (XEXP (XVECEXP (src, 0, 0), 0))
1892 start = 0;
1893 else
1894 start = 1;
1895 finish = XVECLEN (src, 0);
1896
1897 tmps = XALLOCAVEC (rtx, finish);
1898
1899 /* Copy the (probable) hard regs into pseudos. */
1900 for (i = start; i < finish; i++)
1901 {
1902 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1903 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1904 {
1905 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1906 emit_move_insn (tmps[i], reg);
1907 }
1908 else
1909 tmps[i] = reg;
1910 }
1911
1912 /* If we won't be storing directly into memory, protect the real destination
1913 from strange tricks we might play. */
1914 dst = orig_dst;
1915 if (GET_CODE (dst) == PARALLEL)
1916 {
1917 rtx temp;
1918
1919 /* We can get a PARALLEL dst if there is a conditional expression in
1920 a return statement. In that case, the dst and src are the same,
1921 so no action is necessary. */
1922 if (rtx_equal_p (dst, src))
1923 return;
1924
1925 /* It is unclear if we can ever reach here, but we may as well handle
1926 it. Allocate a temporary, and split this into a store/load to/from
1927 the temporary. */
1928
1929 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1930 emit_group_store (temp, src, type, ssize);
1931 emit_group_load (dst, temp, type, ssize);
1932 return;
1933 }
1934 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1935 {
1936 enum machine_mode outer = GET_MODE (dst);
1937 enum machine_mode inner;
1938 HOST_WIDE_INT bytepos;
1939 bool done = false;
1940 rtx temp;
1941
1942 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1943 dst = gen_reg_rtx (outer);
1944
1945 /* Make life a bit easier for combine. */
1946 /* If the first element of the vector is the low part
1947 of the destination mode, use a paradoxical subreg to
1948 initialize the destination. */
1949 if (start < finish)
1950 {
1951 inner = GET_MODE (tmps[start]);
1952 bytepos = subreg_lowpart_offset (inner, outer);
1953 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1954 {
1955 temp = simplify_gen_subreg (outer, tmps[start],
1956 inner, 0);
1957 if (temp)
1958 {
1959 emit_move_insn (dst, temp);
1960 done = true;
1961 start++;
1962 }
1963 }
1964 }
1965
1966 /* If the first element wasn't the low part, try the last. */
1967 if (!done
1968 && start < finish - 1)
1969 {
1970 inner = GET_MODE (tmps[finish - 1]);
1971 bytepos = subreg_lowpart_offset (inner, outer);
1972 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1973 {
1974 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1975 inner, 0);
1976 if (temp)
1977 {
1978 emit_move_insn (dst, temp);
1979 done = true;
1980 finish--;
1981 }
1982 }
1983 }
1984
1985 /* Otherwise, simply initialize the result to zero. */
1986 if (!done)
1987 emit_move_insn (dst, CONST0_RTX (outer));
1988 }
1989
1990 /* Process the pieces. */
1991 for (i = start; i < finish; i++)
1992 {
1993 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
1994 enum machine_mode mode = GET_MODE (tmps[i]);
1995 unsigned int bytelen = GET_MODE_SIZE (mode);
1996 unsigned int adj_bytelen = bytelen;
1997 rtx dest = dst;
1998
1999 /* Handle trailing fragments that run over the size of the struct. */
2000 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2001 adj_bytelen = ssize - bytepos;
2002
2003 if (GET_CODE (dst) == CONCAT)
2004 {
2005 if (bytepos + adj_bytelen
2006 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2007 dest = XEXP (dst, 0);
2008 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2009 {
2010 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2011 dest = XEXP (dst, 1);
2012 }
2013 else
2014 {
2015 enum machine_mode dest_mode = GET_MODE (dest);
2016 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2017
2018 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2019
2020 if (GET_MODE_ALIGNMENT (dest_mode)
2021 >= GET_MODE_ALIGNMENT (tmp_mode))
2022 {
2023 dest = assign_stack_temp (dest_mode,
2024 GET_MODE_SIZE (dest_mode),
2025 0);
2026 emit_move_insn (adjust_address (dest,
2027 tmp_mode,
2028 bytepos),
2029 tmps[i]);
2030 dst = dest;
2031 }
2032 else
2033 {
2034 dest = assign_stack_temp (tmp_mode,
2035 GET_MODE_SIZE (tmp_mode),
2036 0);
2037 emit_move_insn (dest, tmps[i]);
2038 dst = adjust_address (dest, dest_mode, bytepos);
2039 }
2040 break;
2041 }
2042 }
2043
2044 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2045 {
2046 /* store_bit_field always takes its value from the lsb.
2047 Move the fragment to the lsb if it's not already there. */
2048 if (
2049 #ifdef BLOCK_REG_PADDING
2050 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2051 == (BYTES_BIG_ENDIAN ? upward : downward)
2052 #else
2053 BYTES_BIG_ENDIAN
2054 #endif
2055 )
2056 {
2057 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2058 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2059 build_int_cst (NULL_TREE, shift),
2060 tmps[i], 0);
2061 }
2062 bytelen = adj_bytelen;
2063 }
2064
2065 /* Optimize the access just a bit. */
2066 if (MEM_P (dest)
2067 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2068 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2069 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2070 && bytelen == GET_MODE_SIZE (mode))
2071 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2072 else
2073 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2074 mode, tmps[i]);
2075 }
2076
2077 /* Copy from the pseudo into the (probable) hard reg. */
2078 if (orig_dst != dst)
2079 emit_move_insn (orig_dst, dst);
2080 }
2081
2082 /* Generate code to copy a BLKmode object of TYPE out of a
2083 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2084 is null, a stack temporary is created. TGTBLK is returned.
2085
2086 The purpose of this routine is to handle functions that return
2087 BLKmode structures in registers. Some machines (the PA for example)
2088 want to return all small structures in registers regardless of the
2089 structure's alignment. */
2090
2091 rtx
2092 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2093 {
2094 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2095 rtx src = NULL, dst = NULL;
2096 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2097 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2098 enum machine_mode copy_mode;
2099
2100 if (tgtblk == 0)
2101 {
2102 tgtblk = assign_temp (build_qualified_type (type,
2103 (TYPE_QUALS (type)
2104 | TYPE_QUAL_CONST)),
2105 0, 1, 1);
2106 preserve_temp_slots (tgtblk);
2107 }
2108
2109 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2110 into a new pseudo which is a full word. */
2111
2112 if (GET_MODE (srcreg) != BLKmode
2113 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2114 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2115
2116 /* If the structure doesn't take up a whole number of words, see whether
2117 SRCREG is padded on the left or on the right. If it's on the left,
2118 set PADDING_CORRECTION to the number of bits to skip.
2119
2120 In most ABIs, the structure will be returned at the least end of
2121 the register, which translates to right padding on little-endian
2122 targets and left padding on big-endian targets. The opposite
2123 holds if the structure is returned at the most significant
2124 end of the register. */
2125 if (bytes % UNITS_PER_WORD != 0
2126 && (targetm.calls.return_in_msb (type)
2127 ? !BYTES_BIG_ENDIAN
2128 : BYTES_BIG_ENDIAN))
2129 padding_correction
2130 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2131
2132 /* Copy the structure BITSIZE bits at a time. If the target lives in
2133 memory, take care of not reading/writing past its end by selecting
2134 a copy mode suited to BITSIZE. This should always be possible given
2135 how it is computed.
2136
2137 We could probably emit more efficient code for machines which do not use
2138 strict alignment, but it doesn't seem worth the effort at the current
2139 time. */
2140
2141 copy_mode = word_mode;
2142 if (MEM_P (tgtblk))
2143 {
2144 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2145 if (mem_mode != BLKmode)
2146 copy_mode = mem_mode;
2147 }
2148
2149 for (bitpos = 0, xbitpos = padding_correction;
2150 bitpos < bytes * BITS_PER_UNIT;
2151 bitpos += bitsize, xbitpos += bitsize)
2152 {
2153 /* We need a new source operand each time xbitpos is on a
2154 word boundary and when xbitpos == padding_correction
2155 (the first time through). */
2156 if (xbitpos % BITS_PER_WORD == 0
2157 || xbitpos == padding_correction)
2158 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2159 GET_MODE (srcreg));
2160
2161 /* We need a new destination operand each time bitpos is on
2162 a word boundary. */
2163 if (bitpos % BITS_PER_WORD == 0)
2164 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2165
2166 /* Use xbitpos for the source extraction (right justified) and
2167 bitpos for the destination store (left justified). */
2168 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, copy_mode,
2169 extract_bit_field (src, bitsize,
2170 xbitpos % BITS_PER_WORD, 1,
2171 NULL_RTX, copy_mode, copy_mode));
2172 }
2173
2174 return tgtblk;
2175 }
2176
2177 /* Add a USE expression for REG to the (possibly empty) list pointed
2178 to by CALL_FUSAGE. REG must denote a hard register. */
2179
2180 void
2181 use_reg (rtx *call_fusage, rtx reg)
2182 {
2183 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2184
2185 *call_fusage
2186 = gen_rtx_EXPR_LIST (VOIDmode,
2187 gen_rtx_USE (VOIDmode, reg), *call_fusage);
2188 }
2189
2190 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2191 starting at REGNO. All of these registers must be hard registers. */
2192
2193 void
2194 use_regs (rtx *call_fusage, int regno, int nregs)
2195 {
2196 int i;
2197
2198 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2199
2200 for (i = 0; i < nregs; i++)
2201 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2202 }
2203
2204 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2205 PARALLEL REGS. This is for calls that pass values in multiple
2206 non-contiguous locations. The Irix 6 ABI has examples of this. */
2207
2208 void
2209 use_group_regs (rtx *call_fusage, rtx regs)
2210 {
2211 int i;
2212
2213 for (i = 0; i < XVECLEN (regs, 0); i++)
2214 {
2215 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2216
2217 /* A NULL entry means the parameter goes both on the stack and in
2218 registers. This can also be a MEM for targets that pass values
2219 partially on the stack and partially in registers. */
2220 if (reg != 0 && REG_P (reg))
2221 use_reg (call_fusage, reg);
2222 }
2223 }
2224
2225 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2226 assigment and the code of the expresion on the RHS is CODE. Return
2227 NULL otherwise. */
2228
2229 static gimple
2230 get_def_for_expr (tree name, enum tree_code code)
2231 {
2232 gimple def_stmt;
2233
2234 if (TREE_CODE (name) != SSA_NAME)
2235 return NULL;
2236
2237 def_stmt = get_gimple_for_ssa_name (name);
2238 if (!def_stmt
2239 || gimple_assign_rhs_code (def_stmt) != code)
2240 return NULL;
2241
2242 return def_stmt;
2243 }
2244 \f
2245
2246 /* Determine whether the LEN bytes generated by CONSTFUN can be
2247 stored to memory using several move instructions. CONSTFUNDATA is
2248 a pointer which will be passed as argument in every CONSTFUN call.
2249 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2250 a memset operation and false if it's a copy of a constant string.
2251 Return nonzero if a call to store_by_pieces should succeed. */
2252
2253 int
2254 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2255 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2256 void *constfundata, unsigned int align, bool memsetp)
2257 {
2258 unsigned HOST_WIDE_INT l;
2259 unsigned int max_size;
2260 HOST_WIDE_INT offset = 0;
2261 enum machine_mode mode, tmode;
2262 enum insn_code icode;
2263 int reverse;
2264 rtx cst;
2265
2266 if (len == 0)
2267 return 1;
2268
2269 if (! (memsetp
2270 ? SET_BY_PIECES_P (len, align)
2271 : STORE_BY_PIECES_P (len, align)))
2272 return 0;
2273
2274 tmode = mode_for_size (STORE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
2275 if (align >= GET_MODE_ALIGNMENT (tmode))
2276 align = GET_MODE_ALIGNMENT (tmode);
2277 else
2278 {
2279 enum machine_mode xmode;
2280
2281 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
2282 tmode != VOIDmode;
2283 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
2284 if (GET_MODE_SIZE (tmode) > STORE_MAX_PIECES
2285 || SLOW_UNALIGNED_ACCESS (tmode, align))
2286 break;
2287
2288 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
2289 }
2290
2291 /* We would first store what we can in the largest integer mode, then go to
2292 successively smaller modes. */
2293
2294 for (reverse = 0;
2295 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2296 reverse++)
2297 {
2298 l = len;
2299 mode = VOIDmode;
2300 max_size = STORE_MAX_PIECES + 1;
2301 while (max_size > 1)
2302 {
2303 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2304 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2305 if (GET_MODE_SIZE (tmode) < max_size)
2306 mode = tmode;
2307
2308 if (mode == VOIDmode)
2309 break;
2310
2311 icode = optab_handler (mov_optab, mode);
2312 if (icode != CODE_FOR_nothing
2313 && align >= GET_MODE_ALIGNMENT (mode))
2314 {
2315 unsigned int size = GET_MODE_SIZE (mode);
2316
2317 while (l >= size)
2318 {
2319 if (reverse)
2320 offset -= size;
2321
2322 cst = (*constfun) (constfundata, offset, mode);
2323 if (!LEGITIMATE_CONSTANT_P (cst))
2324 return 0;
2325
2326 if (!reverse)
2327 offset += size;
2328
2329 l -= size;
2330 }
2331 }
2332
2333 max_size = GET_MODE_SIZE (mode);
2334 }
2335
2336 /* The code above should have handled everything. */
2337 gcc_assert (!l);
2338 }
2339
2340 return 1;
2341 }
2342
2343 /* Generate several move instructions to store LEN bytes generated by
2344 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2345 pointer which will be passed as argument in every CONSTFUN call.
2346 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2347 a memset operation and false if it's a copy of a constant string.
2348 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2349 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2350 stpcpy. */
2351
2352 rtx
2353 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2354 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2355 void *constfundata, unsigned int align, bool memsetp, int endp)
2356 {
2357 enum machine_mode to_addr_mode
2358 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to));
2359 struct store_by_pieces_d data;
2360
2361 if (len == 0)
2362 {
2363 gcc_assert (endp != 2);
2364 return to;
2365 }
2366
2367 gcc_assert (memsetp
2368 ? SET_BY_PIECES_P (len, align)
2369 : STORE_BY_PIECES_P (len, align));
2370 data.constfun = constfun;
2371 data.constfundata = constfundata;
2372 data.len = len;
2373 data.to = to;
2374 store_by_pieces_1 (&data, align);
2375 if (endp)
2376 {
2377 rtx to1;
2378
2379 gcc_assert (!data.reverse);
2380 if (data.autinc_to)
2381 {
2382 if (endp == 2)
2383 {
2384 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2385 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2386 else
2387 data.to_addr = copy_to_mode_reg (to_addr_mode,
2388 plus_constant (data.to_addr,
2389 -1));
2390 }
2391 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2392 data.offset);
2393 }
2394 else
2395 {
2396 if (endp == 2)
2397 --data.offset;
2398 to1 = adjust_address (data.to, QImode, data.offset);
2399 }
2400 return to1;
2401 }
2402 else
2403 return data.to;
2404 }
2405
2406 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2407 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2408
2409 static void
2410 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2411 {
2412 struct store_by_pieces_d data;
2413
2414 if (len == 0)
2415 return;
2416
2417 data.constfun = clear_by_pieces_1;
2418 data.constfundata = NULL;
2419 data.len = len;
2420 data.to = to;
2421 store_by_pieces_1 (&data, align);
2422 }
2423
2424 /* Callback routine for clear_by_pieces.
2425 Return const0_rtx unconditionally. */
2426
2427 static rtx
2428 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2429 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2430 enum machine_mode mode ATTRIBUTE_UNUSED)
2431 {
2432 return const0_rtx;
2433 }
2434
2435 /* Subroutine of clear_by_pieces and store_by_pieces.
2436 Generate several move instructions to store LEN bytes of block TO. (A MEM
2437 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2438
2439 static void
2440 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2441 unsigned int align ATTRIBUTE_UNUSED)
2442 {
2443 enum machine_mode to_addr_mode
2444 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to));
2445 rtx to_addr = XEXP (data->to, 0);
2446 unsigned int max_size = STORE_MAX_PIECES + 1;
2447 enum machine_mode mode = VOIDmode, tmode;
2448 enum insn_code icode;
2449
2450 data->offset = 0;
2451 data->to_addr = to_addr;
2452 data->autinc_to
2453 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2454 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2455
2456 data->explicit_inc_to = 0;
2457 data->reverse
2458 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2459 if (data->reverse)
2460 data->offset = data->len;
2461
2462 /* If storing requires more than two move insns,
2463 copy addresses to registers (to make displacements shorter)
2464 and use post-increment if available. */
2465 if (!data->autinc_to
2466 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2467 {
2468 /* Determine the main mode we'll be using. */
2469 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2470 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2471 if (GET_MODE_SIZE (tmode) < max_size)
2472 mode = tmode;
2473
2474 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2475 {
2476 data->to_addr = copy_to_mode_reg (to_addr_mode,
2477 plus_constant (to_addr, data->len));
2478 data->autinc_to = 1;
2479 data->explicit_inc_to = -1;
2480 }
2481
2482 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2483 && ! data->autinc_to)
2484 {
2485 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2486 data->autinc_to = 1;
2487 data->explicit_inc_to = 1;
2488 }
2489
2490 if ( !data->autinc_to && CONSTANT_P (to_addr))
2491 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2492 }
2493
2494 tmode = mode_for_size (STORE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
2495 if (align >= GET_MODE_ALIGNMENT (tmode))
2496 align = GET_MODE_ALIGNMENT (tmode);
2497 else
2498 {
2499 enum machine_mode xmode;
2500
2501 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
2502 tmode != VOIDmode;
2503 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
2504 if (GET_MODE_SIZE (tmode) > STORE_MAX_PIECES
2505 || SLOW_UNALIGNED_ACCESS (tmode, align))
2506 break;
2507
2508 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
2509 }
2510
2511 /* First store what we can in the largest integer mode, then go to
2512 successively smaller modes. */
2513
2514 while (max_size > 1)
2515 {
2516 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2517 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2518 if (GET_MODE_SIZE (tmode) < max_size)
2519 mode = tmode;
2520
2521 if (mode == VOIDmode)
2522 break;
2523
2524 icode = optab_handler (mov_optab, mode);
2525 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2526 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2527
2528 max_size = GET_MODE_SIZE (mode);
2529 }
2530
2531 /* The code above should have handled everything. */
2532 gcc_assert (!data->len);
2533 }
2534
2535 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2536 with move instructions for mode MODE. GENFUN is the gen_... function
2537 to make a move insn for that mode. DATA has all the other info. */
2538
2539 static void
2540 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2541 struct store_by_pieces_d *data)
2542 {
2543 unsigned int size = GET_MODE_SIZE (mode);
2544 rtx to1, cst;
2545
2546 while (data->len >= size)
2547 {
2548 if (data->reverse)
2549 data->offset -= size;
2550
2551 if (data->autinc_to)
2552 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2553 data->offset);
2554 else
2555 to1 = adjust_address (data->to, mode, data->offset);
2556
2557 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2558 emit_insn (gen_add2_insn (data->to_addr,
2559 GEN_INT (-(HOST_WIDE_INT) size)));
2560
2561 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2562 emit_insn ((*genfun) (to1, cst));
2563
2564 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2565 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2566
2567 if (! data->reverse)
2568 data->offset += size;
2569
2570 data->len -= size;
2571 }
2572 }
2573 \f
2574 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2575 its length in bytes. */
2576
2577 rtx
2578 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2579 unsigned int expected_align, HOST_WIDE_INT expected_size)
2580 {
2581 enum machine_mode mode = GET_MODE (object);
2582 unsigned int align;
2583
2584 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2585
2586 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2587 just move a zero. Otherwise, do this a piece at a time. */
2588 if (mode != BLKmode
2589 && CONST_INT_P (size)
2590 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2591 {
2592 rtx zero = CONST0_RTX (mode);
2593 if (zero != NULL)
2594 {
2595 emit_move_insn (object, zero);
2596 return NULL;
2597 }
2598
2599 if (COMPLEX_MODE_P (mode))
2600 {
2601 zero = CONST0_RTX (GET_MODE_INNER (mode));
2602 if (zero != NULL)
2603 {
2604 write_complex_part (object, zero, 0);
2605 write_complex_part (object, zero, 1);
2606 return NULL;
2607 }
2608 }
2609 }
2610
2611 if (size == const0_rtx)
2612 return NULL;
2613
2614 align = MEM_ALIGN (object);
2615
2616 if (CONST_INT_P (size)
2617 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2618 clear_by_pieces (object, INTVAL (size), align);
2619 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2620 expected_align, expected_size))
2621 ;
2622 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2623 return set_storage_via_libcall (object, size, const0_rtx,
2624 method == BLOCK_OP_TAILCALL);
2625 else
2626 gcc_unreachable ();
2627
2628 return NULL;
2629 }
2630
2631 rtx
2632 clear_storage (rtx object, rtx size, enum block_op_methods method)
2633 {
2634 return clear_storage_hints (object, size, method, 0, -1);
2635 }
2636
2637
2638 /* A subroutine of clear_storage. Expand a call to memset.
2639 Return the return value of memset, 0 otherwise. */
2640
2641 rtx
2642 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2643 {
2644 tree call_expr, fn, object_tree, size_tree, val_tree;
2645 enum machine_mode size_mode;
2646 rtx retval;
2647
2648 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2649 place those into new pseudos into a VAR_DECL and use them later. */
2650
2651 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2652
2653 size_mode = TYPE_MODE (sizetype);
2654 size = convert_to_mode (size_mode, size, 1);
2655 size = copy_to_mode_reg (size_mode, size);
2656
2657 /* It is incorrect to use the libcall calling conventions to call
2658 memset in this context. This could be a user call to memset and
2659 the user may wish to examine the return value from memset. For
2660 targets where libcalls and normal calls have different conventions
2661 for returning pointers, we could end up generating incorrect code. */
2662
2663 object_tree = make_tree (ptr_type_node, object);
2664 if (!CONST_INT_P (val))
2665 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2666 size_tree = make_tree (sizetype, size);
2667 val_tree = make_tree (integer_type_node, val);
2668
2669 fn = clear_storage_libcall_fn (true);
2670 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2671 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2672
2673 retval = expand_normal (call_expr);
2674
2675 return retval;
2676 }
2677
2678 /* A subroutine of set_storage_via_libcall. Create the tree node
2679 for the function we use for block clears. The first time FOR_CALL
2680 is true, we call assemble_external. */
2681
2682 tree block_clear_fn;
2683
2684 void
2685 init_block_clear_fn (const char *asmspec)
2686 {
2687 if (!block_clear_fn)
2688 {
2689 tree fn, args;
2690
2691 fn = get_identifier ("memset");
2692 args = build_function_type_list (ptr_type_node, ptr_type_node,
2693 integer_type_node, sizetype,
2694 NULL_TREE);
2695
2696 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2697 DECL_EXTERNAL (fn) = 1;
2698 TREE_PUBLIC (fn) = 1;
2699 DECL_ARTIFICIAL (fn) = 1;
2700 TREE_NOTHROW (fn) = 1;
2701 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2702 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2703
2704 block_clear_fn = fn;
2705 }
2706
2707 if (asmspec)
2708 set_user_assembler_name (block_clear_fn, asmspec);
2709 }
2710
2711 static tree
2712 clear_storage_libcall_fn (int for_call)
2713 {
2714 static bool emitted_extern;
2715
2716 if (!block_clear_fn)
2717 init_block_clear_fn (NULL);
2718
2719 if (for_call && !emitted_extern)
2720 {
2721 emitted_extern = true;
2722 make_decl_rtl (block_clear_fn);
2723 assemble_external (block_clear_fn);
2724 }
2725
2726 return block_clear_fn;
2727 }
2728 \f
2729 /* Expand a setmem pattern; return true if successful. */
2730
2731 bool
2732 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2733 unsigned int expected_align, HOST_WIDE_INT expected_size)
2734 {
2735 /* Try the most limited insn first, because there's no point
2736 including more than one in the machine description unless
2737 the more limited one has some advantage. */
2738
2739 rtx opalign = GEN_INT (align / BITS_PER_UNIT);
2740 enum machine_mode mode;
2741
2742 if (expected_align < align)
2743 expected_align = align;
2744
2745 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2746 mode = GET_MODE_WIDER_MODE (mode))
2747 {
2748 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2749 insn_operand_predicate_fn pred;
2750
2751 if (code != CODE_FOR_nothing
2752 /* We don't need MODE to be narrower than
2753 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2754 the mode mask, as it is returned by the macro, it will
2755 definitely be less than the actual mode mask. */
2756 && ((CONST_INT_P (size)
2757 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2758 <= (GET_MODE_MASK (mode) >> 1)))
2759 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD)
2760 && ((pred = insn_data[(int) code].operand[0].predicate) == 0
2761 || (*pred) (object, BLKmode))
2762 && ((pred = insn_data[(int) code].operand[3].predicate) == 0
2763 || (*pred) (opalign, VOIDmode)))
2764 {
2765 rtx opsize, opchar;
2766 enum machine_mode char_mode;
2767 rtx last = get_last_insn ();
2768 rtx pat;
2769
2770 opsize = convert_to_mode (mode, size, 1);
2771 pred = insn_data[(int) code].operand[1].predicate;
2772 if (pred != 0 && ! (*pred) (opsize, mode))
2773 opsize = copy_to_mode_reg (mode, opsize);
2774
2775 opchar = val;
2776 char_mode = insn_data[(int) code].operand[2].mode;
2777 if (char_mode != VOIDmode)
2778 {
2779 opchar = convert_to_mode (char_mode, opchar, 1);
2780 pred = insn_data[(int) code].operand[2].predicate;
2781 if (pred != 0 && ! (*pred) (opchar, char_mode))
2782 opchar = copy_to_mode_reg (char_mode, opchar);
2783 }
2784
2785 if (insn_data[(int) code].n_operands == 4)
2786 pat = GEN_FCN ((int) code) (object, opsize, opchar, opalign);
2787 else
2788 pat = GEN_FCN ((int) code) (object, opsize, opchar, opalign,
2789 GEN_INT (expected_align
2790 / BITS_PER_UNIT),
2791 GEN_INT (expected_size));
2792 if (pat)
2793 {
2794 emit_insn (pat);
2795 return true;
2796 }
2797 else
2798 delete_insns_since (last);
2799 }
2800 }
2801
2802 return false;
2803 }
2804
2805 \f
2806 /* Write to one of the components of the complex value CPLX. Write VAL to
2807 the real part if IMAG_P is false, and the imaginary part if its true. */
2808
2809 static void
2810 write_complex_part (rtx cplx, rtx val, bool imag_p)
2811 {
2812 enum machine_mode cmode;
2813 enum machine_mode imode;
2814 unsigned ibitsize;
2815
2816 if (GET_CODE (cplx) == CONCAT)
2817 {
2818 emit_move_insn (XEXP (cplx, imag_p), val);
2819 return;
2820 }
2821
2822 cmode = GET_MODE (cplx);
2823 imode = GET_MODE_INNER (cmode);
2824 ibitsize = GET_MODE_BITSIZE (imode);
2825
2826 /* For MEMs simplify_gen_subreg may generate an invalid new address
2827 because, e.g., the original address is considered mode-dependent
2828 by the target, which restricts simplify_subreg from invoking
2829 adjust_address_nv. Instead of preparing fallback support for an
2830 invalid address, we call adjust_address_nv directly. */
2831 if (MEM_P (cplx))
2832 {
2833 emit_move_insn (adjust_address_nv (cplx, imode,
2834 imag_p ? GET_MODE_SIZE (imode) : 0),
2835 val);
2836 return;
2837 }
2838
2839 /* If the sub-object is at least word sized, then we know that subregging
2840 will work. This special case is important, since store_bit_field
2841 wants to operate on integer modes, and there's rarely an OImode to
2842 correspond to TCmode. */
2843 if (ibitsize >= BITS_PER_WORD
2844 /* For hard regs we have exact predicates. Assume we can split
2845 the original object if it spans an even number of hard regs.
2846 This special case is important for SCmode on 64-bit platforms
2847 where the natural size of floating-point regs is 32-bit. */
2848 || (REG_P (cplx)
2849 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2850 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2851 {
2852 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2853 imag_p ? GET_MODE_SIZE (imode) : 0);
2854 if (part)
2855 {
2856 emit_move_insn (part, val);
2857 return;
2858 }
2859 else
2860 /* simplify_gen_subreg may fail for sub-word MEMs. */
2861 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2862 }
2863
2864 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, imode, val);
2865 }
2866
2867 /* Extract one of the components of the complex value CPLX. Extract the
2868 real part if IMAG_P is false, and the imaginary part if it's true. */
2869
2870 static rtx
2871 read_complex_part (rtx cplx, bool imag_p)
2872 {
2873 enum machine_mode cmode, imode;
2874 unsigned ibitsize;
2875
2876 if (GET_CODE (cplx) == CONCAT)
2877 return XEXP (cplx, imag_p);
2878
2879 cmode = GET_MODE (cplx);
2880 imode = GET_MODE_INNER (cmode);
2881 ibitsize = GET_MODE_BITSIZE (imode);
2882
2883 /* Special case reads from complex constants that got spilled to memory. */
2884 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2885 {
2886 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2887 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2888 {
2889 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2890 if (CONSTANT_CLASS_P (part))
2891 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2892 }
2893 }
2894
2895 /* For MEMs simplify_gen_subreg may generate an invalid new address
2896 because, e.g., the original address is considered mode-dependent
2897 by the target, which restricts simplify_subreg from invoking
2898 adjust_address_nv. Instead of preparing fallback support for an
2899 invalid address, we call adjust_address_nv directly. */
2900 if (MEM_P (cplx))
2901 return adjust_address_nv (cplx, imode,
2902 imag_p ? GET_MODE_SIZE (imode) : 0);
2903
2904 /* If the sub-object is at least word sized, then we know that subregging
2905 will work. This special case is important, since extract_bit_field
2906 wants to operate on integer modes, and there's rarely an OImode to
2907 correspond to TCmode. */
2908 if (ibitsize >= BITS_PER_WORD
2909 /* For hard regs we have exact predicates. Assume we can split
2910 the original object if it spans an even number of hard regs.
2911 This special case is important for SCmode on 64-bit platforms
2912 where the natural size of floating-point regs is 32-bit. */
2913 || (REG_P (cplx)
2914 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2915 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2916 {
2917 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2918 imag_p ? GET_MODE_SIZE (imode) : 0);
2919 if (ret)
2920 return ret;
2921 else
2922 /* simplify_gen_subreg may fail for sub-word MEMs. */
2923 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2924 }
2925
2926 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2927 true, NULL_RTX, imode, imode);
2928 }
2929 \f
2930 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2931 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2932 represented in NEW_MODE. If FORCE is true, this will never happen, as
2933 we'll force-create a SUBREG if needed. */
2934
2935 static rtx
2936 emit_move_change_mode (enum machine_mode new_mode,
2937 enum machine_mode old_mode, rtx x, bool force)
2938 {
2939 rtx ret;
2940
2941 if (push_operand (x, GET_MODE (x)))
2942 {
2943 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2944 MEM_COPY_ATTRIBUTES (ret, x);
2945 }
2946 else if (MEM_P (x))
2947 {
2948 /* We don't have to worry about changing the address since the
2949 size in bytes is supposed to be the same. */
2950 if (reload_in_progress)
2951 {
2952 /* Copy the MEM to change the mode and move any
2953 substitutions from the old MEM to the new one. */
2954 ret = adjust_address_nv (x, new_mode, 0);
2955 copy_replacements (x, ret);
2956 }
2957 else
2958 ret = adjust_address (x, new_mode, 0);
2959 }
2960 else
2961 {
2962 /* Note that we do want simplify_subreg's behavior of validating
2963 that the new mode is ok for a hard register. If we were to use
2964 simplify_gen_subreg, we would create the subreg, but would
2965 probably run into the target not being able to implement it. */
2966 /* Except, of course, when FORCE is true, when this is exactly what
2967 we want. Which is needed for CCmodes on some targets. */
2968 if (force)
2969 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
2970 else
2971 ret = simplify_subreg (new_mode, x, old_mode, 0);
2972 }
2973
2974 return ret;
2975 }
2976
2977 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
2978 an integer mode of the same size as MODE. Returns the instruction
2979 emitted, or NULL if such a move could not be generated. */
2980
2981 static rtx
2982 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
2983 {
2984 enum machine_mode imode;
2985 enum insn_code code;
2986
2987 /* There must exist a mode of the exact size we require. */
2988 imode = int_mode_for_mode (mode);
2989 if (imode == BLKmode)
2990 return NULL_RTX;
2991
2992 /* The target must support moves in this mode. */
2993 code = optab_handler (mov_optab, imode);
2994 if (code == CODE_FOR_nothing)
2995 return NULL_RTX;
2996
2997 x = emit_move_change_mode (imode, mode, x, force);
2998 if (x == NULL_RTX)
2999 return NULL_RTX;
3000 y = emit_move_change_mode (imode, mode, y, force);
3001 if (y == NULL_RTX)
3002 return NULL_RTX;
3003 return emit_insn (GEN_FCN (code) (x, y));
3004 }
3005
3006 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3007 Return an equivalent MEM that does not use an auto-increment. */
3008
3009 static rtx
3010 emit_move_resolve_push (enum machine_mode mode, rtx x)
3011 {
3012 enum rtx_code code = GET_CODE (XEXP (x, 0));
3013 HOST_WIDE_INT adjust;
3014 rtx temp;
3015
3016 adjust = GET_MODE_SIZE (mode);
3017 #ifdef PUSH_ROUNDING
3018 adjust = PUSH_ROUNDING (adjust);
3019 #endif
3020 if (code == PRE_DEC || code == POST_DEC)
3021 adjust = -adjust;
3022 else if (code == PRE_MODIFY || code == POST_MODIFY)
3023 {
3024 rtx expr = XEXP (XEXP (x, 0), 1);
3025 HOST_WIDE_INT val;
3026
3027 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3028 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3029 val = INTVAL (XEXP (expr, 1));
3030 if (GET_CODE (expr) == MINUS)
3031 val = -val;
3032 gcc_assert (adjust == val || adjust == -val);
3033 adjust = val;
3034 }
3035
3036 /* Do not use anti_adjust_stack, since we don't want to update
3037 stack_pointer_delta. */
3038 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3039 GEN_INT (adjust), stack_pointer_rtx,
3040 0, OPTAB_LIB_WIDEN);
3041 if (temp != stack_pointer_rtx)
3042 emit_move_insn (stack_pointer_rtx, temp);
3043
3044 switch (code)
3045 {
3046 case PRE_INC:
3047 case PRE_DEC:
3048 case PRE_MODIFY:
3049 temp = stack_pointer_rtx;
3050 break;
3051 case POST_INC:
3052 case POST_DEC:
3053 case POST_MODIFY:
3054 temp = plus_constant (stack_pointer_rtx, -adjust);
3055 break;
3056 default:
3057 gcc_unreachable ();
3058 }
3059
3060 return replace_equiv_address (x, temp);
3061 }
3062
3063 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3064 X is known to satisfy push_operand, and MODE is known to be complex.
3065 Returns the last instruction emitted. */
3066
3067 rtx
3068 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3069 {
3070 enum machine_mode submode = GET_MODE_INNER (mode);
3071 bool imag_first;
3072
3073 #ifdef PUSH_ROUNDING
3074 unsigned int submodesize = GET_MODE_SIZE (submode);
3075
3076 /* In case we output to the stack, but the size is smaller than the
3077 machine can push exactly, we need to use move instructions. */
3078 if (PUSH_ROUNDING (submodesize) != submodesize)
3079 {
3080 x = emit_move_resolve_push (mode, x);
3081 return emit_move_insn (x, y);
3082 }
3083 #endif
3084
3085 /* Note that the real part always precedes the imag part in memory
3086 regardless of machine's endianness. */
3087 switch (GET_CODE (XEXP (x, 0)))
3088 {
3089 case PRE_DEC:
3090 case POST_DEC:
3091 imag_first = true;
3092 break;
3093 case PRE_INC:
3094 case POST_INC:
3095 imag_first = false;
3096 break;
3097 default:
3098 gcc_unreachable ();
3099 }
3100
3101 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3102 read_complex_part (y, imag_first));
3103 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3104 read_complex_part (y, !imag_first));
3105 }
3106
3107 /* A subroutine of emit_move_complex. Perform the move from Y to X
3108 via two moves of the parts. Returns the last instruction emitted. */
3109
3110 rtx
3111 emit_move_complex_parts (rtx x, rtx y)
3112 {
3113 /* Show the output dies here. This is necessary for SUBREGs
3114 of pseudos since we cannot track their lifetimes correctly;
3115 hard regs shouldn't appear here except as return values. */
3116 if (!reload_completed && !reload_in_progress
3117 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3118 emit_clobber (x);
3119
3120 write_complex_part (x, read_complex_part (y, false), false);
3121 write_complex_part (x, read_complex_part (y, true), true);
3122
3123 return get_last_insn ();
3124 }
3125
3126 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3127 MODE is known to be complex. Returns the last instruction emitted. */
3128
3129 static rtx
3130 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3131 {
3132 bool try_int;
3133
3134 /* Need to take special care for pushes, to maintain proper ordering
3135 of the data, and possibly extra padding. */
3136 if (push_operand (x, mode))
3137 return emit_move_complex_push (mode, x, y);
3138
3139 /* See if we can coerce the target into moving both values at once. */
3140
3141 /* Move floating point as parts. */
3142 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3143 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3144 try_int = false;
3145 /* Not possible if the values are inherently not adjacent. */
3146 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3147 try_int = false;
3148 /* Is possible if both are registers (or subregs of registers). */
3149 else if (register_operand (x, mode) && register_operand (y, mode))
3150 try_int = true;
3151 /* If one of the operands is a memory, and alignment constraints
3152 are friendly enough, we may be able to do combined memory operations.
3153 We do not attempt this if Y is a constant because that combination is
3154 usually better with the by-parts thing below. */
3155 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3156 && (!STRICT_ALIGNMENT
3157 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3158 try_int = true;
3159 else
3160 try_int = false;
3161
3162 if (try_int)
3163 {
3164 rtx ret;
3165
3166 /* For memory to memory moves, optimal behavior can be had with the
3167 existing block move logic. */
3168 if (MEM_P (x) && MEM_P (y))
3169 {
3170 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3171 BLOCK_OP_NO_LIBCALL);
3172 return get_last_insn ();
3173 }
3174
3175 ret = emit_move_via_integer (mode, x, y, true);
3176 if (ret)
3177 return ret;
3178 }
3179
3180 return emit_move_complex_parts (x, y);
3181 }
3182
3183 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3184 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3185
3186 static rtx
3187 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3188 {
3189 rtx ret;
3190
3191 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3192 if (mode != CCmode)
3193 {
3194 enum insn_code code = optab_handler (mov_optab, CCmode);
3195 if (code != CODE_FOR_nothing)
3196 {
3197 x = emit_move_change_mode (CCmode, mode, x, true);
3198 y = emit_move_change_mode (CCmode, mode, y, true);
3199 return emit_insn (GEN_FCN (code) (x, y));
3200 }
3201 }
3202
3203 /* Otherwise, find the MODE_INT mode of the same width. */
3204 ret = emit_move_via_integer (mode, x, y, false);
3205 gcc_assert (ret != NULL);
3206 return ret;
3207 }
3208
3209 /* Return true if word I of OP lies entirely in the
3210 undefined bits of a paradoxical subreg. */
3211
3212 static bool
3213 undefined_operand_subword_p (const_rtx op, int i)
3214 {
3215 enum machine_mode innermode, innermostmode;
3216 int offset;
3217 if (GET_CODE (op) != SUBREG)
3218 return false;
3219 innermode = GET_MODE (op);
3220 innermostmode = GET_MODE (SUBREG_REG (op));
3221 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3222 /* The SUBREG_BYTE represents offset, as if the value were stored in
3223 memory, except for a paradoxical subreg where we define
3224 SUBREG_BYTE to be 0; undo this exception as in
3225 simplify_subreg. */
3226 if (SUBREG_BYTE (op) == 0
3227 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3228 {
3229 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3230 if (WORDS_BIG_ENDIAN)
3231 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3232 if (BYTES_BIG_ENDIAN)
3233 offset += difference % UNITS_PER_WORD;
3234 }
3235 if (offset >= GET_MODE_SIZE (innermostmode)
3236 || offset <= -GET_MODE_SIZE (word_mode))
3237 return true;
3238 return false;
3239 }
3240
3241 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3242 MODE is any multi-word or full-word mode that lacks a move_insn
3243 pattern. Note that you will get better code if you define such
3244 patterns, even if they must turn into multiple assembler instructions. */
3245
3246 static rtx
3247 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3248 {
3249 rtx last_insn = 0;
3250 rtx seq, inner;
3251 bool need_clobber;
3252 int i;
3253
3254 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3255
3256 /* If X is a push on the stack, do the push now and replace
3257 X with a reference to the stack pointer. */
3258 if (push_operand (x, mode))
3259 x = emit_move_resolve_push (mode, x);
3260
3261 /* If we are in reload, see if either operand is a MEM whose address
3262 is scheduled for replacement. */
3263 if (reload_in_progress && MEM_P (x)
3264 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3265 x = replace_equiv_address_nv (x, inner);
3266 if (reload_in_progress && MEM_P (y)
3267 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3268 y = replace_equiv_address_nv (y, inner);
3269
3270 start_sequence ();
3271
3272 need_clobber = false;
3273 for (i = 0;
3274 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3275 i++)
3276 {
3277 rtx xpart = operand_subword (x, i, 1, mode);
3278 rtx ypart;
3279
3280 /* Do not generate code for a move if it would come entirely
3281 from the undefined bits of a paradoxical subreg. */
3282 if (undefined_operand_subword_p (y, i))
3283 continue;
3284
3285 ypart = operand_subword (y, i, 1, mode);
3286
3287 /* If we can't get a part of Y, put Y into memory if it is a
3288 constant. Otherwise, force it into a register. Then we must
3289 be able to get a part of Y. */
3290 if (ypart == 0 && CONSTANT_P (y))
3291 {
3292 y = use_anchored_address (force_const_mem (mode, y));
3293 ypart = operand_subword (y, i, 1, mode);
3294 }
3295 else if (ypart == 0)
3296 ypart = operand_subword_force (y, i, mode);
3297
3298 gcc_assert (xpart && ypart);
3299
3300 need_clobber |= (GET_CODE (xpart) == SUBREG);
3301
3302 last_insn = emit_move_insn (xpart, ypart);
3303 }
3304
3305 seq = get_insns ();
3306 end_sequence ();
3307
3308 /* Show the output dies here. This is necessary for SUBREGs
3309 of pseudos since we cannot track their lifetimes correctly;
3310 hard regs shouldn't appear here except as return values.
3311 We never want to emit such a clobber after reload. */
3312 if (x != y
3313 && ! (reload_in_progress || reload_completed)
3314 && need_clobber != 0)
3315 emit_clobber (x);
3316
3317 emit_insn (seq);
3318
3319 return last_insn;
3320 }
3321
3322 /* Low level part of emit_move_insn.
3323 Called just like emit_move_insn, but assumes X and Y
3324 are basically valid. */
3325
3326 rtx
3327 emit_move_insn_1 (rtx x, rtx y)
3328 {
3329 enum machine_mode mode = GET_MODE (x);
3330 enum insn_code code;
3331
3332 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3333
3334 code = optab_handler (mov_optab, mode);
3335 if (code != CODE_FOR_nothing)
3336 return emit_insn (GEN_FCN (code) (x, y));
3337
3338 /* Expand complex moves by moving real part and imag part. */
3339 if (COMPLEX_MODE_P (mode))
3340 return emit_move_complex (mode, x, y);
3341
3342 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3343 || ALL_FIXED_POINT_MODE_P (mode))
3344 {
3345 rtx result = emit_move_via_integer (mode, x, y, true);
3346
3347 /* If we can't find an integer mode, use multi words. */
3348 if (result)
3349 return result;
3350 else
3351 return emit_move_multi_word (mode, x, y);
3352 }
3353
3354 if (GET_MODE_CLASS (mode) == MODE_CC)
3355 return emit_move_ccmode (mode, x, y);
3356
3357 /* Try using a move pattern for the corresponding integer mode. This is
3358 only safe when simplify_subreg can convert MODE constants into integer
3359 constants. At present, it can only do this reliably if the value
3360 fits within a HOST_WIDE_INT. */
3361 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3362 {
3363 rtx ret = emit_move_via_integer (mode, x, y, false);
3364 if (ret)
3365 return ret;
3366 }
3367
3368 return emit_move_multi_word (mode, x, y);
3369 }
3370
3371 /* Generate code to copy Y into X.
3372 Both Y and X must have the same mode, except that
3373 Y can be a constant with VOIDmode.
3374 This mode cannot be BLKmode; use emit_block_move for that.
3375
3376 Return the last instruction emitted. */
3377
3378 rtx
3379 emit_move_insn (rtx x, rtx y)
3380 {
3381 enum machine_mode mode = GET_MODE (x);
3382 rtx y_cst = NULL_RTX;
3383 rtx last_insn, set;
3384
3385 gcc_assert (mode != BLKmode
3386 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3387
3388 if (CONSTANT_P (y))
3389 {
3390 if (optimize
3391 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3392 && (last_insn = compress_float_constant (x, y)))
3393 return last_insn;
3394
3395 y_cst = y;
3396
3397 if (!LEGITIMATE_CONSTANT_P (y))
3398 {
3399 y = force_const_mem (mode, y);
3400
3401 /* If the target's cannot_force_const_mem prevented the spill,
3402 assume that the target's move expanders will also take care
3403 of the non-legitimate constant. */
3404 if (!y)
3405 y = y_cst;
3406 else
3407 y = use_anchored_address (y);
3408 }
3409 }
3410
3411 /* If X or Y are memory references, verify that their addresses are valid
3412 for the machine. */
3413 if (MEM_P (x)
3414 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3415 MEM_ADDR_SPACE (x))
3416 && ! push_operand (x, GET_MODE (x))))
3417 x = validize_mem (x);
3418
3419 if (MEM_P (y)
3420 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3421 MEM_ADDR_SPACE (y)))
3422 y = validize_mem (y);
3423
3424 gcc_assert (mode != BLKmode);
3425
3426 last_insn = emit_move_insn_1 (x, y);
3427
3428 if (y_cst && REG_P (x)
3429 && (set = single_set (last_insn)) != NULL_RTX
3430 && SET_DEST (set) == x
3431 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3432 set_unique_reg_note (last_insn, REG_EQUAL, y_cst);
3433
3434 return last_insn;
3435 }
3436
3437 /* If Y is representable exactly in a narrower mode, and the target can
3438 perform the extension directly from constant or memory, then emit the
3439 move as an extension. */
3440
3441 static rtx
3442 compress_float_constant (rtx x, rtx y)
3443 {
3444 enum machine_mode dstmode = GET_MODE (x);
3445 enum machine_mode orig_srcmode = GET_MODE (y);
3446 enum machine_mode srcmode;
3447 REAL_VALUE_TYPE r;
3448 int oldcost, newcost;
3449 bool speed = optimize_insn_for_speed_p ();
3450
3451 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3452
3453 if (LEGITIMATE_CONSTANT_P (y))
3454 oldcost = rtx_cost (y, SET, speed);
3455 else
3456 oldcost = rtx_cost (force_const_mem (dstmode, y), SET, speed);
3457
3458 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3459 srcmode != orig_srcmode;
3460 srcmode = GET_MODE_WIDER_MODE (srcmode))
3461 {
3462 enum insn_code ic;
3463 rtx trunc_y, last_insn;
3464
3465 /* Skip if the target can't extend this way. */
3466 ic = can_extend_p (dstmode, srcmode, 0);
3467 if (ic == CODE_FOR_nothing)
3468 continue;
3469
3470 /* Skip if the narrowed value isn't exact. */
3471 if (! exact_real_truncate (srcmode, &r))
3472 continue;
3473
3474 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3475
3476 if (LEGITIMATE_CONSTANT_P (trunc_y))
3477 {
3478 /* Skip if the target needs extra instructions to perform
3479 the extension. */
3480 if (! (*insn_data[ic].operand[1].predicate) (trunc_y, srcmode))
3481 continue;
3482 /* This is valid, but may not be cheaper than the original. */
3483 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3484 if (oldcost < newcost)
3485 continue;
3486 }
3487 else if (float_extend_from_mem[dstmode][srcmode])
3488 {
3489 trunc_y = force_const_mem (srcmode, trunc_y);
3490 /* This is valid, but may not be cheaper than the original. */
3491 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3492 if (oldcost < newcost)
3493 continue;
3494 trunc_y = validize_mem (trunc_y);
3495 }
3496 else
3497 continue;
3498
3499 /* For CSE's benefit, force the compressed constant pool entry
3500 into a new pseudo. This constant may be used in different modes,
3501 and if not, combine will put things back together for us. */
3502 trunc_y = force_reg (srcmode, trunc_y);
3503 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3504 last_insn = get_last_insn ();
3505
3506 if (REG_P (x))
3507 set_unique_reg_note (last_insn, REG_EQUAL, y);
3508
3509 return last_insn;
3510 }
3511
3512 return NULL_RTX;
3513 }
3514 \f
3515 /* Pushing data onto the stack. */
3516
3517 /* Push a block of length SIZE (perhaps variable)
3518 and return an rtx to address the beginning of the block.
3519 The value may be virtual_outgoing_args_rtx.
3520
3521 EXTRA is the number of bytes of padding to push in addition to SIZE.
3522 BELOW nonzero means this padding comes at low addresses;
3523 otherwise, the padding comes at high addresses. */
3524
3525 rtx
3526 push_block (rtx size, int extra, int below)
3527 {
3528 rtx temp;
3529
3530 size = convert_modes (Pmode, ptr_mode, size, 1);
3531 if (CONSTANT_P (size))
3532 anti_adjust_stack (plus_constant (size, extra));
3533 else if (REG_P (size) && extra == 0)
3534 anti_adjust_stack (size);
3535 else
3536 {
3537 temp = copy_to_mode_reg (Pmode, size);
3538 if (extra != 0)
3539 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3540 temp, 0, OPTAB_LIB_WIDEN);
3541 anti_adjust_stack (temp);
3542 }
3543
3544 #ifndef STACK_GROWS_DOWNWARD
3545 if (0)
3546 #else
3547 if (1)
3548 #endif
3549 {
3550 temp = virtual_outgoing_args_rtx;
3551 if (extra != 0 && below)
3552 temp = plus_constant (temp, extra);
3553 }
3554 else
3555 {
3556 if (CONST_INT_P (size))
3557 temp = plus_constant (virtual_outgoing_args_rtx,
3558 -INTVAL (size) - (below ? 0 : extra));
3559 else if (extra != 0 && !below)
3560 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3561 negate_rtx (Pmode, plus_constant (size, extra)));
3562 else
3563 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3564 negate_rtx (Pmode, size));
3565 }
3566
3567 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3568 }
3569
3570 #ifdef PUSH_ROUNDING
3571
3572 /* Emit single push insn. */
3573
3574 static void
3575 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3576 {
3577 rtx dest_addr;
3578 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3579 rtx dest;
3580 enum insn_code icode;
3581 insn_operand_predicate_fn pred;
3582
3583 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3584 /* If there is push pattern, use it. Otherwise try old way of throwing
3585 MEM representing push operation to move expander. */
3586 icode = optab_handler (push_optab, mode);
3587 if (icode != CODE_FOR_nothing)
3588 {
3589 if (((pred = insn_data[(int) icode].operand[0].predicate)
3590 && !((*pred) (x, mode))))
3591 x = force_reg (mode, x);
3592 emit_insn (GEN_FCN (icode) (x));
3593 return;
3594 }
3595 if (GET_MODE_SIZE (mode) == rounded_size)
3596 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3597 /* If we are to pad downward, adjust the stack pointer first and
3598 then store X into the stack location using an offset. This is
3599 because emit_move_insn does not know how to pad; it does not have
3600 access to type. */
3601 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3602 {
3603 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3604 HOST_WIDE_INT offset;
3605
3606 emit_move_insn (stack_pointer_rtx,
3607 expand_binop (Pmode,
3608 #ifdef STACK_GROWS_DOWNWARD
3609 sub_optab,
3610 #else
3611 add_optab,
3612 #endif
3613 stack_pointer_rtx,
3614 GEN_INT (rounded_size),
3615 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3616
3617 offset = (HOST_WIDE_INT) padding_size;
3618 #ifdef STACK_GROWS_DOWNWARD
3619 if (STACK_PUSH_CODE == POST_DEC)
3620 /* We have already decremented the stack pointer, so get the
3621 previous value. */
3622 offset += (HOST_WIDE_INT) rounded_size;
3623 #else
3624 if (STACK_PUSH_CODE == POST_INC)
3625 /* We have already incremented the stack pointer, so get the
3626 previous value. */
3627 offset -= (HOST_WIDE_INT) rounded_size;
3628 #endif
3629 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3630 }
3631 else
3632 {
3633 #ifdef STACK_GROWS_DOWNWARD
3634 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3635 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3636 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3637 #else
3638 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3639 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3640 GEN_INT (rounded_size));
3641 #endif
3642 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3643 }
3644
3645 dest = gen_rtx_MEM (mode, dest_addr);
3646
3647 if (type != 0)
3648 {
3649 set_mem_attributes (dest, type, 1);
3650
3651 if (flag_optimize_sibling_calls)
3652 /* Function incoming arguments may overlap with sibling call
3653 outgoing arguments and we cannot allow reordering of reads
3654 from function arguments with stores to outgoing arguments
3655 of sibling calls. */
3656 set_mem_alias_set (dest, 0);
3657 }
3658 emit_move_insn (dest, x);
3659 }
3660 #endif
3661
3662 /* Generate code to push X onto the stack, assuming it has mode MODE and
3663 type TYPE.
3664 MODE is redundant except when X is a CONST_INT (since they don't
3665 carry mode info).
3666 SIZE is an rtx for the size of data to be copied (in bytes),
3667 needed only if X is BLKmode.
3668
3669 ALIGN (in bits) is maximum alignment we can assume.
3670
3671 If PARTIAL and REG are both nonzero, then copy that many of the first
3672 bytes of X into registers starting with REG, and push the rest of X.
3673 The amount of space pushed is decreased by PARTIAL bytes.
3674 REG must be a hard register in this case.
3675 If REG is zero but PARTIAL is not, take any all others actions for an
3676 argument partially in registers, but do not actually load any
3677 registers.
3678
3679 EXTRA is the amount in bytes of extra space to leave next to this arg.
3680 This is ignored if an argument block has already been allocated.
3681
3682 On a machine that lacks real push insns, ARGS_ADDR is the address of
3683 the bottom of the argument block for this call. We use indexing off there
3684 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3685 argument block has not been preallocated.
3686
3687 ARGS_SO_FAR is the size of args previously pushed for this call.
3688
3689 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3690 for arguments passed in registers. If nonzero, it will be the number
3691 of bytes required. */
3692
3693 void
3694 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3695 unsigned int align, int partial, rtx reg, int extra,
3696 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3697 rtx alignment_pad)
3698 {
3699 rtx xinner;
3700 enum direction stack_direction
3701 #ifdef STACK_GROWS_DOWNWARD
3702 = downward;
3703 #else
3704 = upward;
3705 #endif
3706
3707 /* Decide where to pad the argument: `downward' for below,
3708 `upward' for above, or `none' for don't pad it.
3709 Default is below for small data on big-endian machines; else above. */
3710 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3711
3712 /* Invert direction if stack is post-decrement.
3713 FIXME: why? */
3714 if (STACK_PUSH_CODE == POST_DEC)
3715 if (where_pad != none)
3716 where_pad = (where_pad == downward ? upward : downward);
3717
3718 xinner = x;
3719
3720 if (mode == BLKmode
3721 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3722 {
3723 /* Copy a block into the stack, entirely or partially. */
3724
3725 rtx temp;
3726 int used;
3727 int offset;
3728 int skip;
3729
3730 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3731 used = partial - offset;
3732
3733 if (mode != BLKmode)
3734 {
3735 /* A value is to be stored in an insufficiently aligned
3736 stack slot; copy via a suitably aligned slot if
3737 necessary. */
3738 size = GEN_INT (GET_MODE_SIZE (mode));
3739 if (!MEM_P (xinner))
3740 {
3741 temp = assign_temp (type, 0, 1, 1);
3742 emit_move_insn (temp, xinner);
3743 xinner = temp;
3744 }
3745 }
3746
3747 gcc_assert (size);
3748
3749 /* USED is now the # of bytes we need not copy to the stack
3750 because registers will take care of them. */
3751
3752 if (partial != 0)
3753 xinner = adjust_address (xinner, BLKmode, used);
3754
3755 /* If the partial register-part of the arg counts in its stack size,
3756 skip the part of stack space corresponding to the registers.
3757 Otherwise, start copying to the beginning of the stack space,
3758 by setting SKIP to 0. */
3759 skip = (reg_parm_stack_space == 0) ? 0 : used;
3760
3761 #ifdef PUSH_ROUNDING
3762 /* Do it with several push insns if that doesn't take lots of insns
3763 and if there is no difficulty with push insns that skip bytes
3764 on the stack for alignment purposes. */
3765 if (args_addr == 0
3766 && PUSH_ARGS
3767 && CONST_INT_P (size)
3768 && skip == 0
3769 && MEM_ALIGN (xinner) >= align
3770 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
3771 /* Here we avoid the case of a structure whose weak alignment
3772 forces many pushes of a small amount of data,
3773 and such small pushes do rounding that causes trouble. */
3774 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
3775 || align >= BIGGEST_ALIGNMENT
3776 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
3777 == (align / BITS_PER_UNIT)))
3778 && PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
3779 {
3780 /* Push padding now if padding above and stack grows down,
3781 or if padding below and stack grows up.
3782 But if space already allocated, this has already been done. */
3783 if (extra && args_addr == 0
3784 && where_pad != none && where_pad != stack_direction)
3785 anti_adjust_stack (GEN_INT (extra));
3786
3787 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
3788 }
3789 else
3790 #endif /* PUSH_ROUNDING */
3791 {
3792 rtx target;
3793
3794 /* Otherwise make space on the stack and copy the data
3795 to the address of that space. */
3796
3797 /* Deduct words put into registers from the size we must copy. */
3798 if (partial != 0)
3799 {
3800 if (CONST_INT_P (size))
3801 size = GEN_INT (INTVAL (size) - used);
3802 else
3803 size = expand_binop (GET_MODE (size), sub_optab, size,
3804 GEN_INT (used), NULL_RTX, 0,
3805 OPTAB_LIB_WIDEN);
3806 }
3807
3808 /* Get the address of the stack space.
3809 In this case, we do not deal with EXTRA separately.
3810 A single stack adjust will do. */
3811 if (! args_addr)
3812 {
3813 temp = push_block (size, extra, where_pad == downward);
3814 extra = 0;
3815 }
3816 else if (CONST_INT_P (args_so_far))
3817 temp = memory_address (BLKmode,
3818 plus_constant (args_addr,
3819 skip + INTVAL (args_so_far)));
3820 else
3821 temp = memory_address (BLKmode,
3822 plus_constant (gen_rtx_PLUS (Pmode,
3823 args_addr,
3824 args_so_far),
3825 skip));
3826
3827 if (!ACCUMULATE_OUTGOING_ARGS)
3828 {
3829 /* If the source is referenced relative to the stack pointer,
3830 copy it to another register to stabilize it. We do not need
3831 to do this if we know that we won't be changing sp. */
3832
3833 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
3834 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
3835 temp = copy_to_reg (temp);
3836 }
3837
3838 target = gen_rtx_MEM (BLKmode, temp);
3839
3840 /* We do *not* set_mem_attributes here, because incoming arguments
3841 may overlap with sibling call outgoing arguments and we cannot
3842 allow reordering of reads from function arguments with stores
3843 to outgoing arguments of sibling calls. We do, however, want
3844 to record the alignment of the stack slot. */
3845 /* ALIGN may well be better aligned than TYPE, e.g. due to
3846 PARM_BOUNDARY. Assume the caller isn't lying. */
3847 set_mem_align (target, align);
3848
3849 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
3850 }
3851 }
3852 else if (partial > 0)
3853 {
3854 /* Scalar partly in registers. */
3855
3856 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
3857 int i;
3858 int not_stack;
3859 /* # bytes of start of argument
3860 that we must make space for but need not store. */
3861 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3862 int args_offset = INTVAL (args_so_far);
3863 int skip;
3864
3865 /* Push padding now if padding above and stack grows down,
3866 or if padding below and stack grows up.
3867 But if space already allocated, this has already been done. */
3868 if (extra && args_addr == 0
3869 && where_pad != none && where_pad != stack_direction)
3870 anti_adjust_stack (GEN_INT (extra));
3871
3872 /* If we make space by pushing it, we might as well push
3873 the real data. Otherwise, we can leave OFFSET nonzero
3874 and leave the space uninitialized. */
3875 if (args_addr == 0)
3876 offset = 0;
3877
3878 /* Now NOT_STACK gets the number of words that we don't need to
3879 allocate on the stack. Convert OFFSET to words too. */
3880 not_stack = (partial - offset) / UNITS_PER_WORD;
3881 offset /= UNITS_PER_WORD;
3882
3883 /* If the partial register-part of the arg counts in its stack size,
3884 skip the part of stack space corresponding to the registers.
3885 Otherwise, start copying to the beginning of the stack space,
3886 by setting SKIP to 0. */
3887 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
3888
3889 if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
3890 x = validize_mem (force_const_mem (mode, x));
3891
3892 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
3893 SUBREGs of such registers are not allowed. */
3894 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
3895 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
3896 x = copy_to_reg (x);
3897
3898 /* Loop over all the words allocated on the stack for this arg. */
3899 /* We can do it by words, because any scalar bigger than a word
3900 has a size a multiple of a word. */
3901 #ifndef PUSH_ARGS_REVERSED
3902 for (i = not_stack; i < size; i++)
3903 #else
3904 for (i = size - 1; i >= not_stack; i--)
3905 #endif
3906 if (i >= not_stack + offset)
3907 emit_push_insn (operand_subword_force (x, i, mode),
3908 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
3909 0, args_addr,
3910 GEN_INT (args_offset + ((i - not_stack + skip)
3911 * UNITS_PER_WORD)),
3912 reg_parm_stack_space, alignment_pad);
3913 }
3914 else
3915 {
3916 rtx addr;
3917 rtx dest;
3918
3919 /* Push padding now if padding above and stack grows down,
3920 or if padding below and stack grows up.
3921 But if space already allocated, this has already been done. */
3922 if (extra && args_addr == 0
3923 && where_pad != none && where_pad != stack_direction)
3924 anti_adjust_stack (GEN_INT (extra));
3925
3926 #ifdef PUSH_ROUNDING
3927 if (args_addr == 0 && PUSH_ARGS)
3928 emit_single_push_insn (mode, x, type);
3929 else
3930 #endif
3931 {
3932 if (CONST_INT_P (args_so_far))
3933 addr
3934 = memory_address (mode,
3935 plus_constant (args_addr,
3936 INTVAL (args_so_far)));
3937 else
3938 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
3939 args_so_far));
3940 dest = gen_rtx_MEM (mode, addr);
3941
3942 /* We do *not* set_mem_attributes here, because incoming arguments
3943 may overlap with sibling call outgoing arguments and we cannot
3944 allow reordering of reads from function arguments with stores
3945 to outgoing arguments of sibling calls. We do, however, want
3946 to record the alignment of the stack slot. */
3947 /* ALIGN may well be better aligned than TYPE, e.g. due to
3948 PARM_BOUNDARY. Assume the caller isn't lying. */
3949 set_mem_align (dest, align);
3950
3951 emit_move_insn (dest, x);
3952 }
3953 }
3954
3955 /* If part should go in registers, copy that part
3956 into the appropriate registers. Do this now, at the end,
3957 since mem-to-mem copies above may do function calls. */
3958 if (partial > 0 && reg != 0)
3959 {
3960 /* Handle calls that pass values in multiple non-contiguous locations.
3961 The Irix 6 ABI has examples of this. */
3962 if (GET_CODE (reg) == PARALLEL)
3963 emit_group_load (reg, x, type, -1);
3964 else
3965 {
3966 gcc_assert (partial % UNITS_PER_WORD == 0);
3967 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
3968 }
3969 }
3970
3971 if (extra && args_addr == 0 && where_pad == stack_direction)
3972 anti_adjust_stack (GEN_INT (extra));
3973
3974 if (alignment_pad && args_addr == 0)
3975 anti_adjust_stack (alignment_pad);
3976 }
3977 \f
3978 /* Return X if X can be used as a subtarget in a sequence of arithmetic
3979 operations. */
3980
3981 static rtx
3982 get_subtarget (rtx x)
3983 {
3984 return (optimize
3985 || x == 0
3986 /* Only registers can be subtargets. */
3987 || !REG_P (x)
3988 /* Don't use hard regs to avoid extending their life. */
3989 || REGNO (x) < FIRST_PSEUDO_REGISTER
3990 ? 0 : x);
3991 }
3992
3993 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
3994 FIELD is a bitfield. Returns true if the optimization was successful,
3995 and there's nothing else to do. */
3996
3997 static bool
3998 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
3999 unsigned HOST_WIDE_INT bitpos,
4000 enum machine_mode mode1, rtx str_rtx,
4001 tree to, tree src)
4002 {
4003 enum machine_mode str_mode = GET_MODE (str_rtx);
4004 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4005 tree op0, op1;
4006 rtx value, result;
4007 optab binop;
4008
4009 if (mode1 != VOIDmode
4010 || bitsize >= BITS_PER_WORD
4011 || str_bitsize > BITS_PER_WORD
4012 || TREE_SIDE_EFFECTS (to)
4013 || TREE_THIS_VOLATILE (to))
4014 return false;
4015
4016 STRIP_NOPS (src);
4017 if (!BINARY_CLASS_P (src)
4018 || TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4019 return false;
4020
4021 op0 = TREE_OPERAND (src, 0);
4022 op1 = TREE_OPERAND (src, 1);
4023 STRIP_NOPS (op0);
4024
4025 if (!operand_equal_p (to, op0, 0))
4026 return false;
4027
4028 if (MEM_P (str_rtx))
4029 {
4030 unsigned HOST_WIDE_INT offset1;
4031
4032 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4033 str_mode = word_mode;
4034 str_mode = get_best_mode (bitsize, bitpos,
4035 MEM_ALIGN (str_rtx), str_mode, 0);
4036 if (str_mode == VOIDmode)
4037 return false;
4038 str_bitsize = GET_MODE_BITSIZE (str_mode);
4039
4040 offset1 = bitpos;
4041 bitpos %= str_bitsize;
4042 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4043 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4044 }
4045 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4046 return false;
4047
4048 /* If the bit field covers the whole REG/MEM, store_field
4049 will likely generate better code. */
4050 if (bitsize >= str_bitsize)
4051 return false;
4052
4053 /* We can't handle fields split across multiple entities. */
4054 if (bitpos + bitsize > str_bitsize)
4055 return false;
4056
4057 if (BYTES_BIG_ENDIAN)
4058 bitpos = str_bitsize - bitpos - bitsize;
4059
4060 switch (TREE_CODE (src))
4061 {
4062 case PLUS_EXPR:
4063 case MINUS_EXPR:
4064 /* For now, just optimize the case of the topmost bitfield
4065 where we don't need to do any masking and also
4066 1 bit bitfields where xor can be used.
4067 We might win by one instruction for the other bitfields
4068 too if insv/extv instructions aren't used, so that
4069 can be added later. */
4070 if (bitpos + bitsize != str_bitsize
4071 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4072 break;
4073
4074 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4075 value = convert_modes (str_mode,
4076 TYPE_MODE (TREE_TYPE (op1)), value,
4077 TYPE_UNSIGNED (TREE_TYPE (op1)));
4078
4079 /* We may be accessing data outside the field, which means
4080 we can alias adjacent data. */
4081 if (MEM_P (str_rtx))
4082 {
4083 str_rtx = shallow_copy_rtx (str_rtx);
4084 set_mem_alias_set (str_rtx, 0);
4085 set_mem_expr (str_rtx, 0);
4086 }
4087
4088 binop = TREE_CODE (src) == PLUS_EXPR ? add_optab : sub_optab;
4089 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4090 {
4091 value = expand_and (str_mode, value, const1_rtx, NULL);
4092 binop = xor_optab;
4093 }
4094 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4095 build_int_cst (NULL_TREE, bitpos),
4096 NULL_RTX, 1);
4097 result = expand_binop (str_mode, binop, str_rtx,
4098 value, str_rtx, 1, OPTAB_WIDEN);
4099 if (result != str_rtx)
4100 emit_move_insn (str_rtx, result);
4101 return true;
4102
4103 case BIT_IOR_EXPR:
4104 case BIT_XOR_EXPR:
4105 if (TREE_CODE (op1) != INTEGER_CST)
4106 break;
4107 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4108 value = convert_modes (GET_MODE (str_rtx),
4109 TYPE_MODE (TREE_TYPE (op1)), value,
4110 TYPE_UNSIGNED (TREE_TYPE (op1)));
4111
4112 /* We may be accessing data outside the field, which means
4113 we can alias adjacent data. */
4114 if (MEM_P (str_rtx))
4115 {
4116 str_rtx = shallow_copy_rtx (str_rtx);
4117 set_mem_alias_set (str_rtx, 0);
4118 set_mem_expr (str_rtx, 0);
4119 }
4120
4121 binop = TREE_CODE (src) == BIT_IOR_EXPR ? ior_optab : xor_optab;
4122 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4123 {
4124 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4125 - 1);
4126 value = expand_and (GET_MODE (str_rtx), value, mask,
4127 NULL_RTX);
4128 }
4129 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4130 build_int_cst (NULL_TREE, bitpos),
4131 NULL_RTX, 1);
4132 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4133 value, str_rtx, 1, OPTAB_WIDEN);
4134 if (result != str_rtx)
4135 emit_move_insn (str_rtx, result);
4136 return true;
4137
4138 default:
4139 break;
4140 }
4141
4142 return false;
4143 }
4144
4145
4146 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4147 is true, try generating a nontemporal store. */
4148
4149 void
4150 expand_assignment (tree to, tree from, bool nontemporal)
4151 {
4152 rtx to_rtx = 0;
4153 rtx result;
4154 enum machine_mode mode;
4155 int align, icode;
4156
4157 /* Don't crash if the lhs of the assignment was erroneous. */
4158 if (TREE_CODE (to) == ERROR_MARK)
4159 {
4160 result = expand_normal (from);
4161 return;
4162 }
4163
4164 /* Optimize away no-op moves without side-effects. */
4165 if (operand_equal_p (to, from, 0))
4166 return;
4167
4168 mode = TYPE_MODE (TREE_TYPE (to));
4169 if ((TREE_CODE (to) == MEM_REF
4170 || TREE_CODE (to) == TARGET_MEM_REF)
4171 && mode != BLKmode
4172 && ((align = MAX (TYPE_ALIGN (TREE_TYPE (to)),
4173 get_object_alignment (to, BIGGEST_ALIGNMENT)))
4174 < (signed) GET_MODE_ALIGNMENT (mode))
4175 && ((icode = optab_handler (movmisalign_optab, mode))
4176 != CODE_FOR_nothing))
4177 {
4178 enum machine_mode address_mode, op_mode1;
4179 rtx insn, reg, op0, mem;
4180
4181 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4182 reg = force_not_mem (reg);
4183
4184 if (TREE_CODE (to) == MEM_REF)
4185 {
4186 addr_space_t as
4187 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (to, 1))));
4188 tree base = TREE_OPERAND (to, 0);
4189 address_mode = targetm.addr_space.address_mode (as);
4190 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4191 op0 = convert_memory_address_addr_space (address_mode, op0, as);
4192 if (!integer_zerop (TREE_OPERAND (to, 1)))
4193 {
4194 rtx off
4195 = immed_double_int_const (mem_ref_offset (to), address_mode);
4196 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
4197 }
4198 op0 = memory_address_addr_space (mode, op0, as);
4199 mem = gen_rtx_MEM (mode, op0);
4200 set_mem_attributes (mem, to, 0);
4201 set_mem_addr_space (mem, as);
4202 }
4203 else if (TREE_CODE (to) == TARGET_MEM_REF)
4204 {
4205 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (to));
4206 struct mem_address addr;
4207
4208 get_address_description (to, &addr);
4209 op0 = addr_for_mem_ref (&addr, as, true);
4210 op0 = memory_address_addr_space (mode, op0, as);
4211 mem = gen_rtx_MEM (mode, op0);
4212 set_mem_attributes (mem, to, 0);
4213 set_mem_addr_space (mem, as);
4214 }
4215 else
4216 gcc_unreachable ();
4217 if (TREE_THIS_VOLATILE (to))
4218 MEM_VOLATILE_P (mem) = 1;
4219
4220 op_mode1 = insn_data[icode].operand[1].mode;
4221 if (! (*insn_data[icode].operand[1].predicate) (reg, op_mode1)
4222 && op_mode1 != VOIDmode)
4223 reg = copy_to_mode_reg (op_mode1, reg);
4224
4225 insn = GEN_FCN (icode) (mem, reg);
4226 emit_insn (insn);
4227 return;
4228 }
4229
4230 /* Assignment of a structure component needs special treatment
4231 if the structure component's rtx is not simply a MEM.
4232 Assignment of an array element at a constant index, and assignment of
4233 an array element in an unaligned packed structure field, has the same
4234 problem. */
4235 if (handled_component_p (to)
4236 /* ??? We only need to handle MEM_REF here if the access is not
4237 a full access of the base object. */
4238 || (TREE_CODE (to) == MEM_REF
4239 && TREE_CODE (TREE_OPERAND (to, 0)) == ADDR_EXPR)
4240 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4241 {
4242 enum machine_mode mode1;
4243 HOST_WIDE_INT bitsize, bitpos;
4244 tree offset;
4245 int unsignedp;
4246 int volatilep = 0;
4247 tree tem;
4248
4249 push_temp_slots ();
4250 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4251 &unsignedp, &volatilep, true);
4252
4253 /* If we are going to use store_bit_field and extract_bit_field,
4254 make sure to_rtx will be safe for multiple use. */
4255
4256 to_rtx = expand_normal (tem);
4257
4258 /* If the bitfield is volatile, we want to access it in the
4259 field's mode, not the computed mode. */
4260 if (volatilep
4261 && GET_CODE (to_rtx) == MEM
4262 && flag_strict_volatile_bitfields > 0)
4263 to_rtx = adjust_address (to_rtx, mode1, 0);
4264
4265 if (offset != 0)
4266 {
4267 enum machine_mode address_mode;
4268 rtx offset_rtx;
4269
4270 if (!MEM_P (to_rtx))
4271 {
4272 /* We can get constant negative offsets into arrays with broken
4273 user code. Translate this to a trap instead of ICEing. */
4274 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4275 expand_builtin_trap ();
4276 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4277 }
4278
4279 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4280 address_mode
4281 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
4282 if (GET_MODE (offset_rtx) != address_mode)
4283 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4284
4285 /* A constant address in TO_RTX can have VOIDmode, we must not try
4286 to call force_reg for that case. Avoid that case. */
4287 if (MEM_P (to_rtx)
4288 && GET_MODE (to_rtx) == BLKmode
4289 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4290 && bitsize > 0
4291 && (bitpos % bitsize) == 0
4292 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4293 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4294 {
4295 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4296 bitpos = 0;
4297 }
4298
4299 to_rtx = offset_address (to_rtx, offset_rtx,
4300 highest_pow2_factor_for_target (to,
4301 offset));
4302 }
4303
4304 /* No action is needed if the target is not a memory and the field
4305 lies completely outside that target. This can occur if the source
4306 code contains an out-of-bounds access to a small array. */
4307 if (!MEM_P (to_rtx)
4308 && GET_MODE (to_rtx) != BLKmode
4309 && (unsigned HOST_WIDE_INT) bitpos
4310 >= GET_MODE_BITSIZE (GET_MODE (to_rtx)))
4311 {
4312 expand_normal (from);
4313 result = NULL;
4314 }
4315 /* Handle expand_expr of a complex value returning a CONCAT. */
4316 else if (GET_CODE (to_rtx) == CONCAT)
4317 {
4318 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from))))
4319 {
4320 gcc_assert (bitpos == 0);
4321 result = store_expr (from, to_rtx, false, nontemporal);
4322 }
4323 else
4324 {
4325 gcc_assert (bitpos == 0 || bitpos == GET_MODE_BITSIZE (mode1));
4326 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4327 nontemporal);
4328 }
4329 }
4330 else
4331 {
4332 if (MEM_P (to_rtx))
4333 {
4334 /* If the field is at offset zero, we could have been given the
4335 DECL_RTX of the parent struct. Don't munge it. */
4336 to_rtx = shallow_copy_rtx (to_rtx);
4337
4338 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4339
4340 /* Deal with volatile and readonly fields. The former is only
4341 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4342 if (volatilep)
4343 MEM_VOLATILE_P (to_rtx) = 1;
4344 if (component_uses_parent_alias_set (to))
4345 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4346 }
4347
4348 if (optimize_bitfield_assignment_op (bitsize, bitpos, mode1,
4349 to_rtx, to, from))
4350 result = NULL;
4351 else
4352 result = store_field (to_rtx, bitsize, bitpos, mode1, from,
4353 TREE_TYPE (tem), get_alias_set (to),
4354 nontemporal);
4355 }
4356
4357 if (result)
4358 preserve_temp_slots (result);
4359 free_temp_slots ();
4360 pop_temp_slots ();
4361 return;
4362 }
4363
4364 /* If the rhs is a function call and its value is not an aggregate,
4365 call the function before we start to compute the lhs.
4366 This is needed for correct code for cases such as
4367 val = setjmp (buf) on machines where reference to val
4368 requires loading up part of an address in a separate insn.
4369
4370 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4371 since it might be a promoted variable where the zero- or sign- extension
4372 needs to be done. Handling this in the normal way is safe because no
4373 computation is done before the call. The same is true for SSA names. */
4374 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4375 && COMPLETE_TYPE_P (TREE_TYPE (from))
4376 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4377 && ! (((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
4378 && REG_P (DECL_RTL (to)))
4379 || TREE_CODE (to) == SSA_NAME))
4380 {
4381 rtx value;
4382
4383 push_temp_slots ();
4384 value = expand_normal (from);
4385 if (to_rtx == 0)
4386 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4387
4388 /* Handle calls that return values in multiple non-contiguous locations.
4389 The Irix 6 ABI has examples of this. */
4390 if (GET_CODE (to_rtx) == PARALLEL)
4391 emit_group_load (to_rtx, value, TREE_TYPE (from),
4392 int_size_in_bytes (TREE_TYPE (from)));
4393 else if (GET_MODE (to_rtx) == BLKmode)
4394 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4395 else
4396 {
4397 if (POINTER_TYPE_P (TREE_TYPE (to)))
4398 value = convert_memory_address_addr_space
4399 (GET_MODE (to_rtx), value,
4400 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4401
4402 emit_move_insn (to_rtx, value);
4403 }
4404 preserve_temp_slots (to_rtx);
4405 free_temp_slots ();
4406 pop_temp_slots ();
4407 return;
4408 }
4409
4410 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
4411 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
4412
4413 if (to_rtx == 0)
4414 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4415
4416 /* Don't move directly into a return register. */
4417 if (TREE_CODE (to) == RESULT_DECL
4418 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4419 {
4420 rtx temp;
4421
4422 push_temp_slots ();
4423 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4424
4425 if (GET_CODE (to_rtx) == PARALLEL)
4426 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4427 int_size_in_bytes (TREE_TYPE (from)));
4428 else
4429 emit_move_insn (to_rtx, temp);
4430
4431 preserve_temp_slots (to_rtx);
4432 free_temp_slots ();
4433 pop_temp_slots ();
4434 return;
4435 }
4436
4437 /* In case we are returning the contents of an object which overlaps
4438 the place the value is being stored, use a safe function when copying
4439 a value through a pointer into a structure value return block. */
4440 if (TREE_CODE (to) == RESULT_DECL
4441 && TREE_CODE (from) == INDIRECT_REF
4442 && ADDR_SPACE_GENERIC_P
4443 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4444 && refs_may_alias_p (to, from)
4445 && cfun->returns_struct
4446 && !cfun->returns_pcc_struct)
4447 {
4448 rtx from_rtx, size;
4449
4450 push_temp_slots ();
4451 size = expr_size (from);
4452 from_rtx = expand_normal (from);
4453
4454 emit_library_call (memmove_libfunc, LCT_NORMAL,
4455 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4456 XEXP (from_rtx, 0), Pmode,
4457 convert_to_mode (TYPE_MODE (sizetype),
4458 size, TYPE_UNSIGNED (sizetype)),
4459 TYPE_MODE (sizetype));
4460
4461 preserve_temp_slots (to_rtx);
4462 free_temp_slots ();
4463 pop_temp_slots ();
4464 return;
4465 }
4466
4467 /* Compute FROM and store the value in the rtx we got. */
4468
4469 push_temp_slots ();
4470 result = store_expr (from, to_rtx, 0, nontemporal);
4471 preserve_temp_slots (result);
4472 free_temp_slots ();
4473 pop_temp_slots ();
4474 return;
4475 }
4476
4477 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4478 succeeded, false otherwise. */
4479
4480 bool
4481 emit_storent_insn (rtx to, rtx from)
4482 {
4483 enum machine_mode mode = GET_MODE (to), imode;
4484 enum insn_code code = optab_handler (storent_optab, mode);
4485 rtx pattern;
4486
4487 if (code == CODE_FOR_nothing)
4488 return false;
4489
4490 imode = insn_data[code].operand[0].mode;
4491 if (!insn_data[code].operand[0].predicate (to, imode))
4492 return false;
4493
4494 imode = insn_data[code].operand[1].mode;
4495 if (!insn_data[code].operand[1].predicate (from, imode))
4496 {
4497 from = copy_to_mode_reg (imode, from);
4498 if (!insn_data[code].operand[1].predicate (from, imode))
4499 return false;
4500 }
4501
4502 pattern = GEN_FCN (code) (to, from);
4503 if (pattern == NULL_RTX)
4504 return false;
4505
4506 emit_insn (pattern);
4507 return true;
4508 }
4509
4510 /* Generate code for computing expression EXP,
4511 and storing the value into TARGET.
4512
4513 If the mode is BLKmode then we may return TARGET itself.
4514 It turns out that in BLKmode it doesn't cause a problem.
4515 because C has no operators that could combine two different
4516 assignments into the same BLKmode object with different values
4517 with no sequence point. Will other languages need this to
4518 be more thorough?
4519
4520 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4521 stack, and block moves may need to be treated specially.
4522
4523 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4524
4525 rtx
4526 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4527 {
4528 rtx temp;
4529 rtx alt_rtl = NULL_RTX;
4530 location_t loc = EXPR_LOCATION (exp);
4531
4532 if (VOID_TYPE_P (TREE_TYPE (exp)))
4533 {
4534 /* C++ can generate ?: expressions with a throw expression in one
4535 branch and an rvalue in the other. Here, we resolve attempts to
4536 store the throw expression's nonexistent result. */
4537 gcc_assert (!call_param_p);
4538 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4539 return NULL_RTX;
4540 }
4541 if (TREE_CODE (exp) == COMPOUND_EXPR)
4542 {
4543 /* Perform first part of compound expression, then assign from second
4544 part. */
4545 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4546 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4547 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4548 nontemporal);
4549 }
4550 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4551 {
4552 /* For conditional expression, get safe form of the target. Then
4553 test the condition, doing the appropriate assignment on either
4554 side. This avoids the creation of unnecessary temporaries.
4555 For non-BLKmode, it is more efficient not to do this. */
4556
4557 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
4558
4559 do_pending_stack_adjust ();
4560 NO_DEFER_POP;
4561 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
4562 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4563 nontemporal);
4564 emit_jump_insn (gen_jump (lab2));
4565 emit_barrier ();
4566 emit_label (lab1);
4567 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
4568 nontemporal);
4569 emit_label (lab2);
4570 OK_DEFER_POP;
4571
4572 return NULL_RTX;
4573 }
4574 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
4575 /* If this is a scalar in a register that is stored in a wider mode
4576 than the declared mode, compute the result into its declared mode
4577 and then convert to the wider mode. Our value is the computed
4578 expression. */
4579 {
4580 rtx inner_target = 0;
4581
4582 /* We can do the conversion inside EXP, which will often result
4583 in some optimizations. Do the conversion in two steps: first
4584 change the signedness, if needed, then the extend. But don't
4585 do this if the type of EXP is a subtype of something else
4586 since then the conversion might involve more than just
4587 converting modes. */
4588 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
4589 && TREE_TYPE (TREE_TYPE (exp)) == 0
4590 && GET_MODE_PRECISION (GET_MODE (target))
4591 == TYPE_PRECISION (TREE_TYPE (exp)))
4592 {
4593 if (TYPE_UNSIGNED (TREE_TYPE (exp))
4594 != SUBREG_PROMOTED_UNSIGNED_P (target))
4595 {
4596 /* Some types, e.g. Fortran's logical*4, won't have a signed
4597 version, so use the mode instead. */
4598 tree ntype
4599 = (signed_or_unsigned_type_for
4600 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
4601 if (ntype == NULL)
4602 ntype = lang_hooks.types.type_for_mode
4603 (TYPE_MODE (TREE_TYPE (exp)),
4604 SUBREG_PROMOTED_UNSIGNED_P (target));
4605
4606 exp = fold_convert_loc (loc, ntype, exp);
4607 }
4608
4609 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
4610 (GET_MODE (SUBREG_REG (target)),
4611 SUBREG_PROMOTED_UNSIGNED_P (target)),
4612 exp);
4613
4614 inner_target = SUBREG_REG (target);
4615 }
4616
4617 temp = expand_expr (exp, inner_target, VOIDmode,
4618 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4619
4620 /* If TEMP is a VOIDmode constant, use convert_modes to make
4621 sure that we properly convert it. */
4622 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
4623 {
4624 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4625 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
4626 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
4627 GET_MODE (target), temp,
4628 SUBREG_PROMOTED_UNSIGNED_P (target));
4629 }
4630
4631 convert_move (SUBREG_REG (target), temp,
4632 SUBREG_PROMOTED_UNSIGNED_P (target));
4633
4634 return NULL_RTX;
4635 }
4636 else if (TREE_CODE (exp) == STRING_CST
4637 && !nontemporal && !call_param_p
4638 && TREE_STRING_LENGTH (exp) > 0
4639 && TYPE_MODE (TREE_TYPE (exp)) == BLKmode)
4640 {
4641 /* Optimize initialization of an array with a STRING_CST. */
4642 HOST_WIDE_INT exp_len, str_copy_len;
4643 rtx dest_mem;
4644
4645 exp_len = int_expr_size (exp);
4646 if (exp_len <= 0)
4647 goto normal_expr;
4648
4649 str_copy_len = strlen (TREE_STRING_POINTER (exp));
4650 if (str_copy_len < TREE_STRING_LENGTH (exp) - 1)
4651 goto normal_expr;
4652
4653 str_copy_len = TREE_STRING_LENGTH (exp);
4654 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0)
4655 {
4656 str_copy_len += STORE_MAX_PIECES - 1;
4657 str_copy_len &= ~(STORE_MAX_PIECES - 1);
4658 }
4659 str_copy_len = MIN (str_copy_len, exp_len);
4660 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
4661 CONST_CAST(char *, TREE_STRING_POINTER (exp)),
4662 MEM_ALIGN (target), false))
4663 goto normal_expr;
4664
4665 dest_mem = target;
4666
4667 dest_mem = store_by_pieces (dest_mem,
4668 str_copy_len, builtin_strncpy_read_str,
4669 CONST_CAST(char *, TREE_STRING_POINTER (exp)),
4670 MEM_ALIGN (target), false,
4671 exp_len > str_copy_len ? 1 : 0);
4672 if (exp_len > str_copy_len)
4673 clear_storage (adjust_address (dest_mem, BLKmode, 0),
4674 GEN_INT (exp_len - str_copy_len),
4675 BLOCK_OP_NORMAL);
4676 return NULL_RTX;
4677 }
4678 else if (TREE_CODE (exp) == MEM_REF
4679 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
4680 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) == STRING_CST
4681 && integer_zerop (TREE_OPERAND (exp, 1))
4682 && !nontemporal && !call_param_p
4683 && TYPE_MODE (TREE_TYPE (exp)) == BLKmode)
4684 {
4685 /* Optimize initialization of an array with a STRING_CST. */
4686 HOST_WIDE_INT exp_len, str_copy_len;
4687 rtx dest_mem;
4688 tree str = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
4689
4690 exp_len = int_expr_size (exp);
4691 if (exp_len <= 0)
4692 goto normal_expr;
4693
4694 str_copy_len = strlen (TREE_STRING_POINTER (str));
4695 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
4696 goto normal_expr;
4697
4698 str_copy_len = TREE_STRING_LENGTH (str);
4699 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0)
4700 {
4701 str_copy_len += STORE_MAX_PIECES - 1;
4702 str_copy_len &= ~(STORE_MAX_PIECES - 1);
4703 }
4704 str_copy_len = MIN (str_copy_len, exp_len);
4705 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
4706 CONST_CAST(char *, TREE_STRING_POINTER (str)),
4707 MEM_ALIGN (target), false))
4708 goto normal_expr;
4709
4710 dest_mem = target;
4711
4712 dest_mem = store_by_pieces (dest_mem,
4713 str_copy_len, builtin_strncpy_read_str,
4714 CONST_CAST(char *, TREE_STRING_POINTER (str)),
4715 MEM_ALIGN (target), false,
4716 exp_len > str_copy_len ? 1 : 0);
4717 if (exp_len > str_copy_len)
4718 clear_storage (adjust_address (dest_mem, BLKmode, 0),
4719 GEN_INT (exp_len - str_copy_len),
4720 BLOCK_OP_NORMAL);
4721 return NULL_RTX;
4722 }
4723 else
4724 {
4725 rtx tmp_target;
4726
4727 normal_expr:
4728 /* If we want to use a nontemporal store, force the value to
4729 register first. */
4730 tmp_target = nontemporal ? NULL_RTX : target;
4731 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
4732 (call_param_p
4733 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
4734 &alt_rtl);
4735 }
4736
4737 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
4738 the same as that of TARGET, adjust the constant. This is needed, for
4739 example, in case it is a CONST_DOUBLE and we want only a word-sized
4740 value. */
4741 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
4742 && TREE_CODE (exp) != ERROR_MARK
4743 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
4744 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4745 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
4746
4747 /* If value was not generated in the target, store it there.
4748 Convert the value to TARGET's type first if necessary and emit the
4749 pending incrementations that have been queued when expanding EXP.
4750 Note that we cannot emit the whole queue blindly because this will
4751 effectively disable the POST_INC optimization later.
4752
4753 If TEMP and TARGET compare equal according to rtx_equal_p, but
4754 one or both of them are volatile memory refs, we have to distinguish
4755 two cases:
4756 - expand_expr has used TARGET. In this case, we must not generate
4757 another copy. This can be detected by TARGET being equal according
4758 to == .
4759 - expand_expr has not used TARGET - that means that the source just
4760 happens to have the same RTX form. Since temp will have been created
4761 by expand_expr, it will compare unequal according to == .
4762 We must generate a copy in this case, to reach the correct number
4763 of volatile memory references. */
4764
4765 if ((! rtx_equal_p (temp, target)
4766 || (temp != target && (side_effects_p (temp)
4767 || side_effects_p (target))))
4768 && TREE_CODE (exp) != ERROR_MARK
4769 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
4770 but TARGET is not valid memory reference, TEMP will differ
4771 from TARGET although it is really the same location. */
4772 && !(alt_rtl && rtx_equal_p (alt_rtl, target))
4773 /* If there's nothing to copy, don't bother. Don't call
4774 expr_size unless necessary, because some front-ends (C++)
4775 expr_size-hook must not be given objects that are not
4776 supposed to be bit-copied or bit-initialized. */
4777 && expr_size (exp) != const0_rtx)
4778 {
4779 if (GET_MODE (temp) != GET_MODE (target)
4780 && GET_MODE (temp) != VOIDmode)
4781 {
4782 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
4783 if (GET_MODE (target) == BLKmode
4784 && GET_MODE (temp) == BLKmode)
4785 emit_block_move (target, temp, expr_size (exp),
4786 (call_param_p
4787 ? BLOCK_OP_CALL_PARM
4788 : BLOCK_OP_NORMAL));
4789 else if (GET_MODE (target) == BLKmode)
4790 store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT,
4791 0, GET_MODE (temp), temp);
4792 else
4793 convert_move (target, temp, unsignedp);
4794 }
4795
4796 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
4797 {
4798 /* Handle copying a string constant into an array. The string
4799 constant may be shorter than the array. So copy just the string's
4800 actual length, and clear the rest. First get the size of the data
4801 type of the string, which is actually the size of the target. */
4802 rtx size = expr_size (exp);
4803
4804 if (CONST_INT_P (size)
4805 && INTVAL (size) < TREE_STRING_LENGTH (exp))
4806 emit_block_move (target, temp, size,
4807 (call_param_p
4808 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4809 else
4810 {
4811 enum machine_mode pointer_mode
4812 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
4813 enum machine_mode address_mode
4814 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target));
4815
4816 /* Compute the size of the data to copy from the string. */
4817 tree copy_size
4818 = size_binop_loc (loc, MIN_EXPR,
4819 make_tree (sizetype, size),
4820 size_int (TREE_STRING_LENGTH (exp)));
4821 rtx copy_size_rtx
4822 = expand_expr (copy_size, NULL_RTX, VOIDmode,
4823 (call_param_p
4824 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
4825 rtx label = 0;
4826
4827 /* Copy that much. */
4828 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
4829 TYPE_UNSIGNED (sizetype));
4830 emit_block_move (target, temp, copy_size_rtx,
4831 (call_param_p
4832 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4833
4834 /* Figure out how much is left in TARGET that we have to clear.
4835 Do all calculations in pointer_mode. */
4836 if (CONST_INT_P (copy_size_rtx))
4837 {
4838 size = plus_constant (size, -INTVAL (copy_size_rtx));
4839 target = adjust_address (target, BLKmode,
4840 INTVAL (copy_size_rtx));
4841 }
4842 else
4843 {
4844 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
4845 copy_size_rtx, NULL_RTX, 0,
4846 OPTAB_LIB_WIDEN);
4847
4848 if (GET_MODE (copy_size_rtx) != address_mode)
4849 copy_size_rtx = convert_to_mode (address_mode,
4850 copy_size_rtx,
4851 TYPE_UNSIGNED (sizetype));
4852
4853 target = offset_address (target, copy_size_rtx,
4854 highest_pow2_factor (copy_size));
4855 label = gen_label_rtx ();
4856 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
4857 GET_MODE (size), 0, label);
4858 }
4859
4860 if (size != const0_rtx)
4861 clear_storage (target, size, BLOCK_OP_NORMAL);
4862
4863 if (label)
4864 emit_label (label);
4865 }
4866 }
4867 /* Handle calls that return values in multiple non-contiguous locations.
4868 The Irix 6 ABI has examples of this. */
4869 else if (GET_CODE (target) == PARALLEL)
4870 emit_group_load (target, temp, TREE_TYPE (exp),
4871 int_size_in_bytes (TREE_TYPE (exp)));
4872 else if (GET_MODE (temp) == BLKmode)
4873 emit_block_move (target, temp, expr_size (exp),
4874 (call_param_p
4875 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4876 else if (nontemporal
4877 && emit_storent_insn (target, temp))
4878 /* If we managed to emit a nontemporal store, there is nothing else to
4879 do. */
4880 ;
4881 else
4882 {
4883 temp = force_operand (temp, target);
4884 if (temp != target)
4885 emit_move_insn (target, temp);
4886 }
4887 }
4888
4889 return NULL_RTX;
4890 }
4891 \f
4892 /* Helper for categorize_ctor_elements. Identical interface. */
4893
4894 static bool
4895 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
4896 HOST_WIDE_INT *p_elt_count,
4897 bool *p_must_clear)
4898 {
4899 unsigned HOST_WIDE_INT idx;
4900 HOST_WIDE_INT nz_elts, elt_count;
4901 tree value, purpose;
4902
4903 /* Whether CTOR is a valid constant initializer, in accordance with what
4904 initializer_constant_valid_p does. If inferred from the constructor
4905 elements, true until proven otherwise. */
4906 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
4907 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
4908
4909 nz_elts = 0;
4910 elt_count = 0;
4911
4912 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
4913 {
4914 HOST_WIDE_INT mult = 1;
4915
4916 if (TREE_CODE (purpose) == RANGE_EXPR)
4917 {
4918 tree lo_index = TREE_OPERAND (purpose, 0);
4919 tree hi_index = TREE_OPERAND (purpose, 1);
4920
4921 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
4922 mult = (tree_low_cst (hi_index, 1)
4923 - tree_low_cst (lo_index, 1) + 1);
4924 }
4925
4926 switch (TREE_CODE (value))
4927 {
4928 case CONSTRUCTOR:
4929 {
4930 HOST_WIDE_INT nz = 0, ic = 0;
4931
4932 bool const_elt_p
4933 = categorize_ctor_elements_1 (value, &nz, &ic, p_must_clear);
4934
4935 nz_elts += mult * nz;
4936 elt_count += mult * ic;
4937
4938 if (const_from_elts_p && const_p)
4939 const_p = const_elt_p;
4940 }
4941 break;
4942
4943 case INTEGER_CST:
4944 case REAL_CST:
4945 case FIXED_CST:
4946 if (!initializer_zerop (value))
4947 nz_elts += mult;
4948 elt_count += mult;
4949 break;
4950
4951 case STRING_CST:
4952 nz_elts += mult * TREE_STRING_LENGTH (value);
4953 elt_count += mult * TREE_STRING_LENGTH (value);
4954 break;
4955
4956 case COMPLEX_CST:
4957 if (!initializer_zerop (TREE_REALPART (value)))
4958 nz_elts += mult;
4959 if (!initializer_zerop (TREE_IMAGPART (value)))
4960 nz_elts += mult;
4961 elt_count += mult;
4962 break;
4963
4964 case VECTOR_CST:
4965 {
4966 tree v;
4967 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
4968 {
4969 if (!initializer_zerop (TREE_VALUE (v)))
4970 nz_elts += mult;
4971 elt_count += mult;
4972 }
4973 }
4974 break;
4975
4976 default:
4977 {
4978 HOST_WIDE_INT tc = count_type_elements (TREE_TYPE (value), true);
4979 if (tc < 1)
4980 tc = 1;
4981 nz_elts += mult * tc;
4982 elt_count += mult * tc;
4983
4984 if (const_from_elts_p && const_p)
4985 const_p = initializer_constant_valid_p (value, TREE_TYPE (value))
4986 != NULL_TREE;
4987 }
4988 break;
4989 }
4990 }
4991
4992 if (!*p_must_clear
4993 && (TREE_CODE (TREE_TYPE (ctor)) == UNION_TYPE
4994 || TREE_CODE (TREE_TYPE (ctor)) == QUAL_UNION_TYPE))
4995 {
4996 tree init_sub_type;
4997 bool clear_this = true;
4998
4999 if (!VEC_empty (constructor_elt, CONSTRUCTOR_ELTS (ctor)))
5000 {
5001 /* We don't expect more than one element of the union to be
5002 initialized. Not sure what we should do otherwise... */
5003 gcc_assert (VEC_length (constructor_elt, CONSTRUCTOR_ELTS (ctor))
5004 == 1);
5005
5006 init_sub_type = TREE_TYPE (VEC_index (constructor_elt,
5007 CONSTRUCTOR_ELTS (ctor),
5008 0)->value);
5009
5010 /* ??? We could look at each element of the union, and find the
5011 largest element. Which would avoid comparing the size of the
5012 initialized element against any tail padding in the union.
5013 Doesn't seem worth the effort... */
5014 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (ctor)),
5015 TYPE_SIZE (init_sub_type)) == 1)
5016 {
5017 /* And now we have to find out if the element itself is fully
5018 constructed. E.g. for union { struct { int a, b; } s; } u
5019 = { .s = { .a = 1 } }. */
5020 if (elt_count == count_type_elements (init_sub_type, false))
5021 clear_this = false;
5022 }
5023 }
5024
5025 *p_must_clear = clear_this;
5026 }
5027
5028 *p_nz_elts += nz_elts;
5029 *p_elt_count += elt_count;
5030
5031 return const_p;
5032 }
5033
5034 /* Examine CTOR to discover:
5035 * how many scalar fields are set to nonzero values,
5036 and place it in *P_NZ_ELTS;
5037 * how many scalar fields in total are in CTOR,
5038 and place it in *P_ELT_COUNT.
5039 * if a type is a union, and the initializer from the constructor
5040 is not the largest element in the union, then set *p_must_clear.
5041
5042 Return whether or not CTOR is a valid static constant initializer, the same
5043 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5044
5045 bool
5046 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5047 HOST_WIDE_INT *p_elt_count,
5048 bool *p_must_clear)
5049 {
5050 *p_nz_elts = 0;
5051 *p_elt_count = 0;
5052 *p_must_clear = false;
5053
5054 return
5055 categorize_ctor_elements_1 (ctor, p_nz_elts, p_elt_count, p_must_clear);
5056 }
5057
5058 /* Count the number of scalars in TYPE. Return -1 on overflow or
5059 variable-sized. If ALLOW_FLEXARR is true, don't count flexible
5060 array member at the end of the structure. */
5061
5062 HOST_WIDE_INT
5063 count_type_elements (const_tree type, bool allow_flexarr)
5064 {
5065 const HOST_WIDE_INT max = ~((HOST_WIDE_INT)1 << (HOST_BITS_PER_WIDE_INT-1));
5066 switch (TREE_CODE (type))
5067 {
5068 case ARRAY_TYPE:
5069 {
5070 tree telts = array_type_nelts (type);
5071 if (telts && host_integerp (telts, 1))
5072 {
5073 HOST_WIDE_INT n = tree_low_cst (telts, 1) + 1;
5074 HOST_WIDE_INT m = count_type_elements (TREE_TYPE (type), false);
5075 if (n == 0)
5076 return 0;
5077 else if (max / n > m)
5078 return n * m;
5079 }
5080 return -1;
5081 }
5082
5083 case RECORD_TYPE:
5084 {
5085 HOST_WIDE_INT n = 0, t;
5086 tree f;
5087
5088 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5089 if (TREE_CODE (f) == FIELD_DECL)
5090 {
5091 t = count_type_elements (TREE_TYPE (f), false);
5092 if (t < 0)
5093 {
5094 /* Check for structures with flexible array member. */
5095 tree tf = TREE_TYPE (f);
5096 if (allow_flexarr
5097 && DECL_CHAIN (f) == NULL
5098 && TREE_CODE (tf) == ARRAY_TYPE
5099 && TYPE_DOMAIN (tf)
5100 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5101 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5102 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5103 && int_size_in_bytes (type) >= 0)
5104 break;
5105
5106 return -1;
5107 }
5108 n += t;
5109 }
5110
5111 return n;
5112 }
5113
5114 case UNION_TYPE:
5115 case QUAL_UNION_TYPE:
5116 return -1;
5117
5118 case COMPLEX_TYPE:
5119 return 2;
5120
5121 case VECTOR_TYPE:
5122 return TYPE_VECTOR_SUBPARTS (type);
5123
5124 case INTEGER_TYPE:
5125 case REAL_TYPE:
5126 case FIXED_POINT_TYPE:
5127 case ENUMERAL_TYPE:
5128 case BOOLEAN_TYPE:
5129 case POINTER_TYPE:
5130 case OFFSET_TYPE:
5131 case REFERENCE_TYPE:
5132 return 1;
5133
5134 case ERROR_MARK:
5135 return 0;
5136
5137 case VOID_TYPE:
5138 case METHOD_TYPE:
5139 case FUNCTION_TYPE:
5140 case LANG_TYPE:
5141 default:
5142 gcc_unreachable ();
5143 }
5144 }
5145
5146 /* Return 1 if EXP contains mostly (3/4) zeros. */
5147
5148 static int
5149 mostly_zeros_p (const_tree exp)
5150 {
5151 if (TREE_CODE (exp) == CONSTRUCTOR)
5152
5153 {
5154 HOST_WIDE_INT nz_elts, count, elts;
5155 bool must_clear;
5156
5157 categorize_ctor_elements (exp, &nz_elts, &count, &must_clear);
5158 if (must_clear)
5159 return 1;
5160
5161 elts = count_type_elements (TREE_TYPE (exp), false);
5162
5163 return nz_elts < elts / 4;
5164 }
5165
5166 return initializer_zerop (exp);
5167 }
5168
5169 /* Return 1 if EXP contains all zeros. */
5170
5171 static int
5172 all_zeros_p (const_tree exp)
5173 {
5174 if (TREE_CODE (exp) == CONSTRUCTOR)
5175
5176 {
5177 HOST_WIDE_INT nz_elts, count;
5178 bool must_clear;
5179
5180 categorize_ctor_elements (exp, &nz_elts, &count, &must_clear);
5181 return nz_elts == 0;
5182 }
5183
5184 return initializer_zerop (exp);
5185 }
5186 \f
5187 /* Helper function for store_constructor.
5188 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5189 TYPE is the type of the CONSTRUCTOR, not the element type.
5190 CLEARED is as for store_constructor.
5191 ALIAS_SET is the alias set to use for any stores.
5192
5193 This provides a recursive shortcut back to store_constructor when it isn't
5194 necessary to go through store_field. This is so that we can pass through
5195 the cleared field to let store_constructor know that we may not have to
5196 clear a substructure if the outer structure has already been cleared. */
5197
5198 static void
5199 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5200 HOST_WIDE_INT bitpos, enum machine_mode mode,
5201 tree exp, tree type, int cleared,
5202 alias_set_type alias_set)
5203 {
5204 if (TREE_CODE (exp) == CONSTRUCTOR
5205 /* We can only call store_constructor recursively if the size and
5206 bit position are on a byte boundary. */
5207 && bitpos % BITS_PER_UNIT == 0
5208 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5209 /* If we have a nonzero bitpos for a register target, then we just
5210 let store_field do the bitfield handling. This is unlikely to
5211 generate unnecessary clear instructions anyways. */
5212 && (bitpos == 0 || MEM_P (target)))
5213 {
5214 if (MEM_P (target))
5215 target
5216 = adjust_address (target,
5217 GET_MODE (target) == BLKmode
5218 || 0 != (bitpos
5219 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5220 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5221
5222
5223 /* Update the alias set, if required. */
5224 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5225 && MEM_ALIAS_SET (target) != 0)
5226 {
5227 target = copy_rtx (target);
5228 set_mem_alias_set (target, alias_set);
5229 }
5230
5231 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5232 }
5233 else
5234 store_field (target, bitsize, bitpos, mode, exp, type, alias_set, false);
5235 }
5236
5237 /* Store the value of constructor EXP into the rtx TARGET.
5238 TARGET is either a REG or a MEM; we know it cannot conflict, since
5239 safe_from_p has been called.
5240 CLEARED is true if TARGET is known to have been zero'd.
5241 SIZE is the number of bytes of TARGET we are allowed to modify: this
5242 may not be the same as the size of EXP if we are assigning to a field
5243 which has been packed to exclude padding bits. */
5244
5245 static void
5246 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5247 {
5248 tree type = TREE_TYPE (exp);
5249 #ifdef WORD_REGISTER_OPERATIONS
5250 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5251 #endif
5252
5253 switch (TREE_CODE (type))
5254 {
5255 case RECORD_TYPE:
5256 case UNION_TYPE:
5257 case QUAL_UNION_TYPE:
5258 {
5259 unsigned HOST_WIDE_INT idx;
5260 tree field, value;
5261
5262 /* If size is zero or the target is already cleared, do nothing. */
5263 if (size == 0 || cleared)
5264 cleared = 1;
5265 /* We either clear the aggregate or indicate the value is dead. */
5266 else if ((TREE_CODE (type) == UNION_TYPE
5267 || TREE_CODE (type) == QUAL_UNION_TYPE)
5268 && ! CONSTRUCTOR_ELTS (exp))
5269 /* If the constructor is empty, clear the union. */
5270 {
5271 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5272 cleared = 1;
5273 }
5274
5275 /* If we are building a static constructor into a register,
5276 set the initial value as zero so we can fold the value into
5277 a constant. But if more than one register is involved,
5278 this probably loses. */
5279 else if (REG_P (target) && TREE_STATIC (exp)
5280 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5281 {
5282 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5283 cleared = 1;
5284 }
5285
5286 /* If the constructor has fewer fields than the structure or
5287 if we are initializing the structure to mostly zeros, clear
5288 the whole structure first. Don't do this if TARGET is a
5289 register whose mode size isn't equal to SIZE since
5290 clear_storage can't handle this case. */
5291 else if (size > 0
5292 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5293 != fields_length (type))
5294 || mostly_zeros_p (exp))
5295 && (!REG_P (target)
5296 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5297 == size)))
5298 {
5299 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5300 cleared = 1;
5301 }
5302
5303 if (REG_P (target) && !cleared)
5304 emit_clobber (target);
5305
5306 /* Store each element of the constructor into the
5307 corresponding field of TARGET. */
5308 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5309 {
5310 enum machine_mode mode;
5311 HOST_WIDE_INT bitsize;
5312 HOST_WIDE_INT bitpos = 0;
5313 tree offset;
5314 rtx to_rtx = target;
5315
5316 /* Just ignore missing fields. We cleared the whole
5317 structure, above, if any fields are missing. */
5318 if (field == 0)
5319 continue;
5320
5321 if (cleared && initializer_zerop (value))
5322 continue;
5323
5324 if (host_integerp (DECL_SIZE (field), 1))
5325 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5326 else
5327 bitsize = -1;
5328
5329 mode = DECL_MODE (field);
5330 if (DECL_BIT_FIELD (field))
5331 mode = VOIDmode;
5332
5333 offset = DECL_FIELD_OFFSET (field);
5334 if (host_integerp (offset, 0)
5335 && host_integerp (bit_position (field), 0))
5336 {
5337 bitpos = int_bit_position (field);
5338 offset = 0;
5339 }
5340 else
5341 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5342
5343 if (offset)
5344 {
5345 enum machine_mode address_mode;
5346 rtx offset_rtx;
5347
5348 offset
5349 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5350 make_tree (TREE_TYPE (exp),
5351 target));
5352
5353 offset_rtx = expand_normal (offset);
5354 gcc_assert (MEM_P (to_rtx));
5355
5356 address_mode
5357 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx));
5358 if (GET_MODE (offset_rtx) != address_mode)
5359 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5360
5361 to_rtx = offset_address (to_rtx, offset_rtx,
5362 highest_pow2_factor (offset));
5363 }
5364
5365 #ifdef WORD_REGISTER_OPERATIONS
5366 /* If this initializes a field that is smaller than a
5367 word, at the start of a word, try to widen it to a full
5368 word. This special case allows us to output C++ member
5369 function initializations in a form that the optimizers
5370 can understand. */
5371 if (REG_P (target)
5372 && bitsize < BITS_PER_WORD
5373 && bitpos % BITS_PER_WORD == 0
5374 && GET_MODE_CLASS (mode) == MODE_INT
5375 && TREE_CODE (value) == INTEGER_CST
5376 && exp_size >= 0
5377 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5378 {
5379 tree type = TREE_TYPE (value);
5380
5381 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5382 {
5383 type = lang_hooks.types.type_for_size
5384 (BITS_PER_WORD, TYPE_UNSIGNED (type));
5385 value = fold_convert (type, value);
5386 }
5387
5388 if (BYTES_BIG_ENDIAN)
5389 value
5390 = fold_build2 (LSHIFT_EXPR, type, value,
5391 build_int_cst (type,
5392 BITS_PER_WORD - bitsize));
5393 bitsize = BITS_PER_WORD;
5394 mode = word_mode;
5395 }
5396 #endif
5397
5398 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5399 && DECL_NONADDRESSABLE_P (field))
5400 {
5401 to_rtx = copy_rtx (to_rtx);
5402 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5403 }
5404
5405 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5406 value, type, cleared,
5407 get_alias_set (TREE_TYPE (field)));
5408 }
5409 break;
5410 }
5411 case ARRAY_TYPE:
5412 {
5413 tree value, index;
5414 unsigned HOST_WIDE_INT i;
5415 int need_to_clear;
5416 tree domain;
5417 tree elttype = TREE_TYPE (type);
5418 int const_bounds_p;
5419 HOST_WIDE_INT minelt = 0;
5420 HOST_WIDE_INT maxelt = 0;
5421
5422 domain = TYPE_DOMAIN (type);
5423 const_bounds_p = (TYPE_MIN_VALUE (domain)
5424 && TYPE_MAX_VALUE (domain)
5425 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5426 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5427
5428 /* If we have constant bounds for the range of the type, get them. */
5429 if (const_bounds_p)
5430 {
5431 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5432 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5433 }
5434
5435 /* If the constructor has fewer elements than the array, clear
5436 the whole array first. Similarly if this is static
5437 constructor of a non-BLKmode object. */
5438 if (cleared)
5439 need_to_clear = 0;
5440 else if (REG_P (target) && TREE_STATIC (exp))
5441 need_to_clear = 1;
5442 else
5443 {
5444 unsigned HOST_WIDE_INT idx;
5445 tree index, value;
5446 HOST_WIDE_INT count = 0, zero_count = 0;
5447 need_to_clear = ! const_bounds_p;
5448
5449 /* This loop is a more accurate version of the loop in
5450 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5451 is also needed to check for missing elements. */
5452 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5453 {
5454 HOST_WIDE_INT this_node_count;
5455
5456 if (need_to_clear)
5457 break;
5458
5459 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5460 {
5461 tree lo_index = TREE_OPERAND (index, 0);
5462 tree hi_index = TREE_OPERAND (index, 1);
5463
5464 if (! host_integerp (lo_index, 1)
5465 || ! host_integerp (hi_index, 1))
5466 {
5467 need_to_clear = 1;
5468 break;
5469 }
5470
5471 this_node_count = (tree_low_cst (hi_index, 1)
5472 - tree_low_cst (lo_index, 1) + 1);
5473 }
5474 else
5475 this_node_count = 1;
5476
5477 count += this_node_count;
5478 if (mostly_zeros_p (value))
5479 zero_count += this_node_count;
5480 }
5481
5482 /* Clear the entire array first if there are any missing
5483 elements, or if the incidence of zero elements is >=
5484 75%. */
5485 if (! need_to_clear
5486 && (count < maxelt - minelt + 1
5487 || 4 * zero_count >= 3 * count))
5488 need_to_clear = 1;
5489 }
5490
5491 if (need_to_clear && size > 0)
5492 {
5493 if (REG_P (target))
5494 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5495 else
5496 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5497 cleared = 1;
5498 }
5499
5500 if (!cleared && REG_P (target))
5501 /* Inform later passes that the old value is dead. */
5502 emit_clobber (target);
5503
5504 /* Store each element of the constructor into the
5505 corresponding element of TARGET, determined by counting the
5506 elements. */
5507 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5508 {
5509 enum machine_mode mode;
5510 HOST_WIDE_INT bitsize;
5511 HOST_WIDE_INT bitpos;
5512 rtx xtarget = target;
5513
5514 if (cleared && initializer_zerop (value))
5515 continue;
5516
5517 mode = TYPE_MODE (elttype);
5518 if (mode == BLKmode)
5519 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5520 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5521 : -1);
5522 else
5523 bitsize = GET_MODE_BITSIZE (mode);
5524
5525 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5526 {
5527 tree lo_index = TREE_OPERAND (index, 0);
5528 tree hi_index = TREE_OPERAND (index, 1);
5529 rtx index_r, pos_rtx;
5530 HOST_WIDE_INT lo, hi, count;
5531 tree position;
5532
5533 /* If the range is constant and "small", unroll the loop. */
5534 if (const_bounds_p
5535 && host_integerp (lo_index, 0)
5536 && host_integerp (hi_index, 0)
5537 && (lo = tree_low_cst (lo_index, 0),
5538 hi = tree_low_cst (hi_index, 0),
5539 count = hi - lo + 1,
5540 (!MEM_P (target)
5541 || count <= 2
5542 || (host_integerp (TYPE_SIZE (elttype), 1)
5543 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5544 <= 40 * 8)))))
5545 {
5546 lo -= minelt; hi -= minelt;
5547 for (; lo <= hi; lo++)
5548 {
5549 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
5550
5551 if (MEM_P (target)
5552 && !MEM_KEEP_ALIAS_SET_P (target)
5553 && TREE_CODE (type) == ARRAY_TYPE
5554 && TYPE_NONALIASED_COMPONENT (type))
5555 {
5556 target = copy_rtx (target);
5557 MEM_KEEP_ALIAS_SET_P (target) = 1;
5558 }
5559
5560 store_constructor_field
5561 (target, bitsize, bitpos, mode, value, type, cleared,
5562 get_alias_set (elttype));
5563 }
5564 }
5565 else
5566 {
5567 rtx loop_start = gen_label_rtx ();
5568 rtx loop_end = gen_label_rtx ();
5569 tree exit_cond;
5570
5571 expand_normal (hi_index);
5572
5573 index = build_decl (EXPR_LOCATION (exp),
5574 VAR_DECL, NULL_TREE, domain);
5575 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
5576 SET_DECL_RTL (index, index_r);
5577 store_expr (lo_index, index_r, 0, false);
5578
5579 /* Build the head of the loop. */
5580 do_pending_stack_adjust ();
5581 emit_label (loop_start);
5582
5583 /* Assign value to element index. */
5584 position =
5585 fold_convert (ssizetype,
5586 fold_build2 (MINUS_EXPR,
5587 TREE_TYPE (index),
5588 index,
5589 TYPE_MIN_VALUE (domain)));
5590
5591 position =
5592 size_binop (MULT_EXPR, position,
5593 fold_convert (ssizetype,
5594 TYPE_SIZE_UNIT (elttype)));
5595
5596 pos_rtx = expand_normal (position);
5597 xtarget = offset_address (target, pos_rtx,
5598 highest_pow2_factor (position));
5599 xtarget = adjust_address (xtarget, mode, 0);
5600 if (TREE_CODE (value) == CONSTRUCTOR)
5601 store_constructor (value, xtarget, cleared,
5602 bitsize / BITS_PER_UNIT);
5603 else
5604 store_expr (value, xtarget, 0, false);
5605
5606 /* Generate a conditional jump to exit the loop. */
5607 exit_cond = build2 (LT_EXPR, integer_type_node,
5608 index, hi_index);
5609 jumpif (exit_cond, loop_end, -1);
5610
5611 /* Update the loop counter, and jump to the head of
5612 the loop. */
5613 expand_assignment (index,
5614 build2 (PLUS_EXPR, TREE_TYPE (index),
5615 index, integer_one_node),
5616 false);
5617
5618 emit_jump (loop_start);
5619
5620 /* Build the end of the loop. */
5621 emit_label (loop_end);
5622 }
5623 }
5624 else if ((index != 0 && ! host_integerp (index, 0))
5625 || ! host_integerp (TYPE_SIZE (elttype), 1))
5626 {
5627 tree position;
5628
5629 if (index == 0)
5630 index = ssize_int (1);
5631
5632 if (minelt)
5633 index = fold_convert (ssizetype,
5634 fold_build2 (MINUS_EXPR,
5635 TREE_TYPE (index),
5636 index,
5637 TYPE_MIN_VALUE (domain)));
5638
5639 position =
5640 size_binop (MULT_EXPR, index,
5641 fold_convert (ssizetype,
5642 TYPE_SIZE_UNIT (elttype)));
5643 xtarget = offset_address (target,
5644 expand_normal (position),
5645 highest_pow2_factor (position));
5646 xtarget = adjust_address (xtarget, mode, 0);
5647 store_expr (value, xtarget, 0, false);
5648 }
5649 else
5650 {
5651 if (index != 0)
5652 bitpos = ((tree_low_cst (index, 0) - minelt)
5653 * tree_low_cst (TYPE_SIZE (elttype), 1));
5654 else
5655 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
5656
5657 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
5658 && TREE_CODE (type) == ARRAY_TYPE
5659 && TYPE_NONALIASED_COMPONENT (type))
5660 {
5661 target = copy_rtx (target);
5662 MEM_KEEP_ALIAS_SET_P (target) = 1;
5663 }
5664 store_constructor_field (target, bitsize, bitpos, mode, value,
5665 type, cleared, get_alias_set (elttype));
5666 }
5667 }
5668 break;
5669 }
5670
5671 case VECTOR_TYPE:
5672 {
5673 unsigned HOST_WIDE_INT idx;
5674 constructor_elt *ce;
5675 int i;
5676 int need_to_clear;
5677 int icode = 0;
5678 tree elttype = TREE_TYPE (type);
5679 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
5680 enum machine_mode eltmode = TYPE_MODE (elttype);
5681 HOST_WIDE_INT bitsize;
5682 HOST_WIDE_INT bitpos;
5683 rtvec vector = NULL;
5684 unsigned n_elts;
5685 alias_set_type alias;
5686
5687 gcc_assert (eltmode != BLKmode);
5688
5689 n_elts = TYPE_VECTOR_SUBPARTS (type);
5690 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
5691 {
5692 enum machine_mode mode = GET_MODE (target);
5693
5694 icode = (int) optab_handler (vec_init_optab, mode);
5695 if (icode != CODE_FOR_nothing)
5696 {
5697 unsigned int i;
5698
5699 vector = rtvec_alloc (n_elts);
5700 for (i = 0; i < n_elts; i++)
5701 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
5702 }
5703 }
5704
5705 /* If the constructor has fewer elements than the vector,
5706 clear the whole array first. Similarly if this is static
5707 constructor of a non-BLKmode object. */
5708 if (cleared)
5709 need_to_clear = 0;
5710 else if (REG_P (target) && TREE_STATIC (exp))
5711 need_to_clear = 1;
5712 else
5713 {
5714 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
5715 tree value;
5716
5717 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
5718 {
5719 int n_elts_here = tree_low_cst
5720 (int_const_binop (TRUNC_DIV_EXPR,
5721 TYPE_SIZE (TREE_TYPE (value)),
5722 TYPE_SIZE (elttype), 0), 1);
5723
5724 count += n_elts_here;
5725 if (mostly_zeros_p (value))
5726 zero_count += n_elts_here;
5727 }
5728
5729 /* Clear the entire vector first if there are any missing elements,
5730 or if the incidence of zero elements is >= 75%. */
5731 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
5732 }
5733
5734 if (need_to_clear && size > 0 && !vector)
5735 {
5736 if (REG_P (target))
5737 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5738 else
5739 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5740 cleared = 1;
5741 }
5742
5743 /* Inform later passes that the old value is dead. */
5744 if (!cleared && !vector && REG_P (target))
5745 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5746
5747 if (MEM_P (target))
5748 alias = MEM_ALIAS_SET (target);
5749 else
5750 alias = get_alias_set (elttype);
5751
5752 /* Store each element of the constructor into the corresponding
5753 element of TARGET, determined by counting the elements. */
5754 for (idx = 0, i = 0;
5755 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
5756 idx++, i += bitsize / elt_size)
5757 {
5758 HOST_WIDE_INT eltpos;
5759 tree value = ce->value;
5760
5761 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
5762 if (cleared && initializer_zerop (value))
5763 continue;
5764
5765 if (ce->index)
5766 eltpos = tree_low_cst (ce->index, 1);
5767 else
5768 eltpos = i;
5769
5770 if (vector)
5771 {
5772 /* Vector CONSTRUCTORs should only be built from smaller
5773 vectors in the case of BLKmode vectors. */
5774 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
5775 RTVEC_ELT (vector, eltpos)
5776 = expand_normal (value);
5777 }
5778 else
5779 {
5780 enum machine_mode value_mode =
5781 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
5782 ? TYPE_MODE (TREE_TYPE (value))
5783 : eltmode;
5784 bitpos = eltpos * elt_size;
5785 store_constructor_field (target, bitsize, bitpos,
5786 value_mode, value, type,
5787 cleared, alias);
5788 }
5789 }
5790
5791 if (vector)
5792 emit_insn (GEN_FCN (icode)
5793 (target,
5794 gen_rtx_PARALLEL (GET_MODE (target), vector)));
5795 break;
5796 }
5797
5798 default:
5799 gcc_unreachable ();
5800 }
5801 }
5802
5803 /* Store the value of EXP (an expression tree)
5804 into a subfield of TARGET which has mode MODE and occupies
5805 BITSIZE bits, starting BITPOS bits from the start of TARGET.
5806 If MODE is VOIDmode, it means that we are storing into a bit-field.
5807
5808 Always return const0_rtx unless we have something particular to
5809 return.
5810
5811 TYPE is the type of the underlying object,
5812
5813 ALIAS_SET is the alias set for the destination. This value will
5814 (in general) be different from that for TARGET, since TARGET is a
5815 reference to the containing structure.
5816
5817 If NONTEMPORAL is true, try generating a nontemporal store. */
5818
5819 static rtx
5820 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
5821 enum machine_mode mode, tree exp, tree type,
5822 alias_set_type alias_set, bool nontemporal)
5823 {
5824 if (TREE_CODE (exp) == ERROR_MARK)
5825 return const0_rtx;
5826
5827 /* If we have nothing to store, do nothing unless the expression has
5828 side-effects. */
5829 if (bitsize == 0)
5830 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5831
5832 /* If we are storing into an unaligned field of an aligned union that is
5833 in a register, we may have the mode of TARGET being an integer mode but
5834 MODE == BLKmode. In that case, get an aligned object whose size and
5835 alignment are the same as TARGET and store TARGET into it (we can avoid
5836 the store if the field being stored is the entire width of TARGET). Then
5837 call ourselves recursively to store the field into a BLKmode version of
5838 that object. Finally, load from the object into TARGET. This is not
5839 very efficient in general, but should only be slightly more expensive
5840 than the otherwise-required unaligned accesses. Perhaps this can be
5841 cleaned up later. It's tempting to make OBJECT readonly, but it's set
5842 twice, once with emit_move_insn and once via store_field. */
5843
5844 if (mode == BLKmode
5845 && (REG_P (target) || GET_CODE (target) == SUBREG))
5846 {
5847 rtx object = assign_temp (type, 0, 1, 1);
5848 rtx blk_object = adjust_address (object, BLKmode, 0);
5849
5850 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
5851 emit_move_insn (object, target);
5852
5853 store_field (blk_object, bitsize, bitpos, mode, exp, type, alias_set,
5854 nontemporal);
5855
5856 emit_move_insn (target, object);
5857
5858 /* We want to return the BLKmode version of the data. */
5859 return blk_object;
5860 }
5861
5862 if (GET_CODE (target) == CONCAT)
5863 {
5864 /* We're storing into a struct containing a single __complex. */
5865
5866 gcc_assert (!bitpos);
5867 return store_expr (exp, target, 0, nontemporal);
5868 }
5869
5870 /* If the structure is in a register or if the component
5871 is a bit field, we cannot use addressing to access it.
5872 Use bit-field techniques or SUBREG to store in it. */
5873
5874 if (mode == VOIDmode
5875 || (mode != BLKmode && ! direct_store[(int) mode]
5876 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
5877 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
5878 || REG_P (target)
5879 || GET_CODE (target) == SUBREG
5880 /* If the field isn't aligned enough to store as an ordinary memref,
5881 store it as a bit field. */
5882 || (mode != BLKmode
5883 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
5884 || bitpos % GET_MODE_ALIGNMENT (mode))
5885 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
5886 || (bitpos % BITS_PER_UNIT != 0)))
5887 /* If the RHS and field are a constant size and the size of the
5888 RHS isn't the same size as the bitfield, we must use bitfield
5889 operations. */
5890 || (bitsize >= 0
5891 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
5892 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
5893 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
5894 decl we must use bitfield operations. */
5895 || (bitsize >= 0
5896 && TREE_CODE (exp) == MEM_REF
5897 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5898 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5899 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
5900 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
5901 {
5902 rtx temp;
5903 gimple nop_def;
5904
5905 /* If EXP is a NOP_EXPR of precision less than its mode, then that
5906 implies a mask operation. If the precision is the same size as
5907 the field we're storing into, that mask is redundant. This is
5908 particularly common with bit field assignments generated by the
5909 C front end. */
5910 nop_def = get_def_for_expr (exp, NOP_EXPR);
5911 if (nop_def)
5912 {
5913 tree type = TREE_TYPE (exp);
5914 if (INTEGRAL_TYPE_P (type)
5915 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
5916 && bitsize == TYPE_PRECISION (type))
5917 {
5918 tree op = gimple_assign_rhs1 (nop_def);
5919 type = TREE_TYPE (op);
5920 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
5921 exp = op;
5922 }
5923 }
5924
5925 temp = expand_normal (exp);
5926
5927 /* If BITSIZE is narrower than the size of the type of EXP
5928 we will be narrowing TEMP. Normally, what's wanted are the
5929 low-order bits. However, if EXP's type is a record and this is
5930 big-endian machine, we want the upper BITSIZE bits. */
5931 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
5932 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
5933 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
5934 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
5935 size_int (GET_MODE_BITSIZE (GET_MODE (temp))
5936 - bitsize),
5937 NULL_RTX, 1);
5938
5939 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
5940 MODE. */
5941 if (mode != VOIDmode && mode != BLKmode
5942 && mode != TYPE_MODE (TREE_TYPE (exp)))
5943 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
5944
5945 /* If the modes of TEMP and TARGET are both BLKmode, both
5946 must be in memory and BITPOS must be aligned on a byte
5947 boundary. If so, we simply do a block copy. Likewise
5948 for a BLKmode-like TARGET. */
5949 if (GET_MODE (temp) == BLKmode
5950 && (GET_MODE (target) == BLKmode
5951 || (MEM_P (target)
5952 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
5953 && (bitpos % BITS_PER_UNIT) == 0
5954 && (bitsize % BITS_PER_UNIT) == 0)))
5955 {
5956 gcc_assert (MEM_P (target) && MEM_P (temp)
5957 && (bitpos % BITS_PER_UNIT) == 0);
5958
5959 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
5960 emit_block_move (target, temp,
5961 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
5962 / BITS_PER_UNIT),
5963 BLOCK_OP_NORMAL);
5964
5965 return const0_rtx;
5966 }
5967
5968 /* Store the value in the bitfield. */
5969 store_bit_field (target, bitsize, bitpos, mode, temp);
5970
5971 return const0_rtx;
5972 }
5973 else
5974 {
5975 /* Now build a reference to just the desired component. */
5976 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
5977
5978 if (to_rtx == target)
5979 to_rtx = copy_rtx (to_rtx);
5980
5981 MEM_SET_IN_STRUCT_P (to_rtx, 1);
5982 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
5983 set_mem_alias_set (to_rtx, alias_set);
5984
5985 return store_expr (exp, to_rtx, 0, nontemporal);
5986 }
5987 }
5988 \f
5989 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
5990 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
5991 codes and find the ultimate containing object, which we return.
5992
5993 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
5994 bit position, and *PUNSIGNEDP to the signedness of the field.
5995 If the position of the field is variable, we store a tree
5996 giving the variable offset (in units) in *POFFSET.
5997 This offset is in addition to the bit position.
5998 If the position is not variable, we store 0 in *POFFSET.
5999
6000 If any of the extraction expressions is volatile,
6001 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6002
6003 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6004 Otherwise, it is a mode that can be used to access the field.
6005
6006 If the field describes a variable-sized object, *PMODE is set to
6007 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6008 this case, but the address of the object can be found.
6009
6010 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6011 look through nodes that serve as markers of a greater alignment than
6012 the one that can be deduced from the expression. These nodes make it
6013 possible for front-ends to prevent temporaries from being created by
6014 the middle-end on alignment considerations. For that purpose, the
6015 normal operating mode at high-level is to always pass FALSE so that
6016 the ultimate containing object is really returned; moreover, the
6017 associated predicate handled_component_p will always return TRUE
6018 on these nodes, thus indicating that they are essentially handled
6019 by get_inner_reference. TRUE should only be passed when the caller
6020 is scanning the expression in order to build another representation
6021 and specifically knows how to handle these nodes; as such, this is
6022 the normal operating mode in the RTL expanders. */
6023
6024 tree
6025 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6026 HOST_WIDE_INT *pbitpos, tree *poffset,
6027 enum machine_mode *pmode, int *punsignedp,
6028 int *pvolatilep, bool keep_aligning)
6029 {
6030 tree size_tree = 0;
6031 enum machine_mode mode = VOIDmode;
6032 bool blkmode_bitfield = false;
6033 tree offset = size_zero_node;
6034 double_int bit_offset = double_int_zero;
6035
6036 /* First get the mode, signedness, and size. We do this from just the
6037 outermost expression. */
6038 *pbitsize = -1;
6039 if (TREE_CODE (exp) == COMPONENT_REF)
6040 {
6041 tree field = TREE_OPERAND (exp, 1);
6042 size_tree = DECL_SIZE (field);
6043 if (!DECL_BIT_FIELD (field))
6044 mode = DECL_MODE (field);
6045 else if (DECL_MODE (field) == BLKmode)
6046 blkmode_bitfield = true;
6047 else if (TREE_THIS_VOLATILE (exp)
6048 && flag_strict_volatile_bitfields > 0)
6049 /* Volatile bitfields should be accessed in the mode of the
6050 field's type, not the mode computed based on the bit
6051 size. */
6052 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6053
6054 *punsignedp = DECL_UNSIGNED (field);
6055 }
6056 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6057 {
6058 size_tree = TREE_OPERAND (exp, 1);
6059 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6060 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6061
6062 /* For vector types, with the correct size of access, use the mode of
6063 inner type. */
6064 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6065 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6066 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6067 mode = TYPE_MODE (TREE_TYPE (exp));
6068 }
6069 else
6070 {
6071 mode = TYPE_MODE (TREE_TYPE (exp));
6072 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6073
6074 if (mode == BLKmode)
6075 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6076 else
6077 *pbitsize = GET_MODE_BITSIZE (mode);
6078 }
6079
6080 if (size_tree != 0)
6081 {
6082 if (! host_integerp (size_tree, 1))
6083 mode = BLKmode, *pbitsize = -1;
6084 else
6085 *pbitsize = tree_low_cst (size_tree, 1);
6086 }
6087
6088 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6089 and find the ultimate containing object. */
6090 while (1)
6091 {
6092 switch (TREE_CODE (exp))
6093 {
6094 case BIT_FIELD_REF:
6095 bit_offset
6096 = double_int_add (bit_offset,
6097 tree_to_double_int (TREE_OPERAND (exp, 2)));
6098 break;
6099
6100 case COMPONENT_REF:
6101 {
6102 tree field = TREE_OPERAND (exp, 1);
6103 tree this_offset = component_ref_field_offset (exp);
6104
6105 /* If this field hasn't been filled in yet, don't go past it.
6106 This should only happen when folding expressions made during
6107 type construction. */
6108 if (this_offset == 0)
6109 break;
6110
6111 offset = size_binop (PLUS_EXPR, offset, this_offset);
6112 bit_offset = double_int_add (bit_offset,
6113 tree_to_double_int
6114 (DECL_FIELD_BIT_OFFSET (field)));
6115
6116 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6117 }
6118 break;
6119
6120 case ARRAY_REF:
6121 case ARRAY_RANGE_REF:
6122 {
6123 tree index = TREE_OPERAND (exp, 1);
6124 tree low_bound = array_ref_low_bound (exp);
6125 tree unit_size = array_ref_element_size (exp);
6126
6127 /* We assume all arrays have sizes that are a multiple of a byte.
6128 First subtract the lower bound, if any, in the type of the
6129 index, then convert to sizetype and multiply by the size of
6130 the array element. */
6131 if (! integer_zerop (low_bound))
6132 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6133 index, low_bound);
6134
6135 offset = size_binop (PLUS_EXPR, offset,
6136 size_binop (MULT_EXPR,
6137 fold_convert (sizetype, index),
6138 unit_size));
6139 }
6140 break;
6141
6142 case REALPART_EXPR:
6143 break;
6144
6145 case IMAGPART_EXPR:
6146 bit_offset = double_int_add (bit_offset,
6147 uhwi_to_double_int (*pbitsize));
6148 break;
6149
6150 case VIEW_CONVERT_EXPR:
6151 if (keep_aligning && STRICT_ALIGNMENT
6152 && (TYPE_ALIGN (TREE_TYPE (exp))
6153 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6154 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6155 < BIGGEST_ALIGNMENT)
6156 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6157 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6158 goto done;
6159 break;
6160
6161 case MEM_REF:
6162 /* Hand back the decl for MEM[&decl, off]. */
6163 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6164 {
6165 tree off = TREE_OPERAND (exp, 1);
6166 if (!integer_zerop (off))
6167 {
6168 double_int boff, coff = mem_ref_offset (exp);
6169 boff = double_int_lshift (coff,
6170 BITS_PER_UNIT == 8
6171 ? 3 : exact_log2 (BITS_PER_UNIT),
6172 HOST_BITS_PER_DOUBLE_INT, true);
6173 bit_offset = double_int_add (bit_offset, boff);
6174 }
6175 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6176 }
6177 goto done;
6178
6179 default:
6180 goto done;
6181 }
6182
6183 /* If any reference in the chain is volatile, the effect is volatile. */
6184 if (TREE_THIS_VOLATILE (exp))
6185 *pvolatilep = 1;
6186
6187 exp = TREE_OPERAND (exp, 0);
6188 }
6189 done:
6190
6191 /* If OFFSET is constant, see if we can return the whole thing as a
6192 constant bit position. Make sure to handle overflow during
6193 this conversion. */
6194 if (host_integerp (offset, 0))
6195 {
6196 double_int tem = double_int_lshift (tree_to_double_int (offset),
6197 BITS_PER_UNIT == 8
6198 ? 3 : exact_log2 (BITS_PER_UNIT),
6199 HOST_BITS_PER_DOUBLE_INT, true);
6200 tem = double_int_add (tem, bit_offset);
6201 if (double_int_fits_in_shwi_p (tem))
6202 {
6203 *pbitpos = double_int_to_shwi (tem);
6204 *poffset = offset = NULL_TREE;
6205 }
6206 }
6207
6208 /* Otherwise, split it up. */
6209 if (offset)
6210 {
6211 *pbitpos = double_int_to_shwi (bit_offset);
6212 *poffset = offset;
6213 }
6214
6215 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6216 if (mode == VOIDmode
6217 && blkmode_bitfield
6218 && (*pbitpos % BITS_PER_UNIT) == 0
6219 && (*pbitsize % BITS_PER_UNIT) == 0)
6220 *pmode = BLKmode;
6221 else
6222 *pmode = mode;
6223
6224 return exp;
6225 }
6226
6227 /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an
6228 ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within
6229 EXP is marked as PACKED. */
6230
6231 bool
6232 contains_packed_reference (const_tree exp)
6233 {
6234 bool packed_p = false;
6235
6236 while (1)
6237 {
6238 switch (TREE_CODE (exp))
6239 {
6240 case COMPONENT_REF:
6241 {
6242 tree field = TREE_OPERAND (exp, 1);
6243 packed_p = DECL_PACKED (field)
6244 || TYPE_PACKED (TREE_TYPE (field))
6245 || TYPE_PACKED (TREE_TYPE (exp));
6246 if (packed_p)
6247 goto done;
6248 }
6249 break;
6250
6251 case BIT_FIELD_REF:
6252 case ARRAY_REF:
6253 case ARRAY_RANGE_REF:
6254 case REALPART_EXPR:
6255 case IMAGPART_EXPR:
6256 case VIEW_CONVERT_EXPR:
6257 break;
6258
6259 default:
6260 goto done;
6261 }
6262 exp = TREE_OPERAND (exp, 0);
6263 }
6264 done:
6265 return packed_p;
6266 }
6267
6268 /* Return a tree of sizetype representing the size, in bytes, of the element
6269 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6270
6271 tree
6272 array_ref_element_size (tree exp)
6273 {
6274 tree aligned_size = TREE_OPERAND (exp, 3);
6275 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6276 location_t loc = EXPR_LOCATION (exp);
6277
6278 /* If a size was specified in the ARRAY_REF, it's the size measured
6279 in alignment units of the element type. So multiply by that value. */
6280 if (aligned_size)
6281 {
6282 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6283 sizetype from another type of the same width and signedness. */
6284 if (TREE_TYPE (aligned_size) != sizetype)
6285 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6286 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6287 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6288 }
6289
6290 /* Otherwise, take the size from that of the element type. Substitute
6291 any PLACEHOLDER_EXPR that we have. */
6292 else
6293 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6294 }
6295
6296 /* Return a tree representing the lower bound of the array mentioned in
6297 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6298
6299 tree
6300 array_ref_low_bound (tree exp)
6301 {
6302 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6303
6304 /* If a lower bound is specified in EXP, use it. */
6305 if (TREE_OPERAND (exp, 2))
6306 return TREE_OPERAND (exp, 2);
6307
6308 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6309 substituting for a PLACEHOLDER_EXPR as needed. */
6310 if (domain_type && TYPE_MIN_VALUE (domain_type))
6311 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6312
6313 /* Otherwise, return a zero of the appropriate type. */
6314 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6315 }
6316
6317 /* Return a tree representing the upper bound of the array mentioned in
6318 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6319
6320 tree
6321 array_ref_up_bound (tree exp)
6322 {
6323 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6324
6325 /* If there is a domain type and it has an upper bound, use it, substituting
6326 for a PLACEHOLDER_EXPR as needed. */
6327 if (domain_type && TYPE_MAX_VALUE (domain_type))
6328 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6329
6330 /* Otherwise fail. */
6331 return NULL_TREE;
6332 }
6333
6334 /* Return a tree representing the offset, in bytes, of the field referenced
6335 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6336
6337 tree
6338 component_ref_field_offset (tree exp)
6339 {
6340 tree aligned_offset = TREE_OPERAND (exp, 2);
6341 tree field = TREE_OPERAND (exp, 1);
6342 location_t loc = EXPR_LOCATION (exp);
6343
6344 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6345 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6346 value. */
6347 if (aligned_offset)
6348 {
6349 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6350 sizetype from another type of the same width and signedness. */
6351 if (TREE_TYPE (aligned_offset) != sizetype)
6352 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6353 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6354 size_int (DECL_OFFSET_ALIGN (field)
6355 / BITS_PER_UNIT));
6356 }
6357
6358 /* Otherwise, take the offset from that of the field. Substitute
6359 any PLACEHOLDER_EXPR that we have. */
6360 else
6361 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6362 }
6363
6364 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6365
6366 static unsigned HOST_WIDE_INT
6367 target_align (const_tree target)
6368 {
6369 /* We might have a chain of nested references with intermediate misaligning
6370 bitfields components, so need to recurse to find out. */
6371
6372 unsigned HOST_WIDE_INT this_align, outer_align;
6373
6374 switch (TREE_CODE (target))
6375 {
6376 case BIT_FIELD_REF:
6377 return 1;
6378
6379 case COMPONENT_REF:
6380 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6381 outer_align = target_align (TREE_OPERAND (target, 0));
6382 return MIN (this_align, outer_align);
6383
6384 case ARRAY_REF:
6385 case ARRAY_RANGE_REF:
6386 this_align = TYPE_ALIGN (TREE_TYPE (target));
6387 outer_align = target_align (TREE_OPERAND (target, 0));
6388 return MIN (this_align, outer_align);
6389
6390 CASE_CONVERT:
6391 case NON_LVALUE_EXPR:
6392 case VIEW_CONVERT_EXPR:
6393 this_align = TYPE_ALIGN (TREE_TYPE (target));
6394 outer_align = target_align (TREE_OPERAND (target, 0));
6395 return MAX (this_align, outer_align);
6396
6397 default:
6398 return TYPE_ALIGN (TREE_TYPE (target));
6399 }
6400 }
6401
6402 \f
6403 /* Given an rtx VALUE that may contain additions and multiplications, return
6404 an equivalent value that just refers to a register, memory, or constant.
6405 This is done by generating instructions to perform the arithmetic and
6406 returning a pseudo-register containing the value.
6407
6408 The returned value may be a REG, SUBREG, MEM or constant. */
6409
6410 rtx
6411 force_operand (rtx value, rtx target)
6412 {
6413 rtx op1, op2;
6414 /* Use subtarget as the target for operand 0 of a binary operation. */
6415 rtx subtarget = get_subtarget (target);
6416 enum rtx_code code = GET_CODE (value);
6417
6418 /* Check for subreg applied to an expression produced by loop optimizer. */
6419 if (code == SUBREG
6420 && !REG_P (SUBREG_REG (value))
6421 && !MEM_P (SUBREG_REG (value)))
6422 {
6423 value
6424 = simplify_gen_subreg (GET_MODE (value),
6425 force_reg (GET_MODE (SUBREG_REG (value)),
6426 force_operand (SUBREG_REG (value),
6427 NULL_RTX)),
6428 GET_MODE (SUBREG_REG (value)),
6429 SUBREG_BYTE (value));
6430 code = GET_CODE (value);
6431 }
6432
6433 /* Check for a PIC address load. */
6434 if ((code == PLUS || code == MINUS)
6435 && XEXP (value, 0) == pic_offset_table_rtx
6436 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6437 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6438 || GET_CODE (XEXP (value, 1)) == CONST))
6439 {
6440 if (!subtarget)
6441 subtarget = gen_reg_rtx (GET_MODE (value));
6442 emit_move_insn (subtarget, value);
6443 return subtarget;
6444 }
6445
6446 if (ARITHMETIC_P (value))
6447 {
6448 op2 = XEXP (value, 1);
6449 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6450 subtarget = 0;
6451 if (code == MINUS && CONST_INT_P (op2))
6452 {
6453 code = PLUS;
6454 op2 = negate_rtx (GET_MODE (value), op2);
6455 }
6456
6457 /* Check for an addition with OP2 a constant integer and our first
6458 operand a PLUS of a virtual register and something else. In that
6459 case, we want to emit the sum of the virtual register and the
6460 constant first and then add the other value. This allows virtual
6461 register instantiation to simply modify the constant rather than
6462 creating another one around this addition. */
6463 if (code == PLUS && CONST_INT_P (op2)
6464 && GET_CODE (XEXP (value, 0)) == PLUS
6465 && REG_P (XEXP (XEXP (value, 0), 0))
6466 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6467 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6468 {
6469 rtx temp = expand_simple_binop (GET_MODE (value), code,
6470 XEXP (XEXP (value, 0), 0), op2,
6471 subtarget, 0, OPTAB_LIB_WIDEN);
6472 return expand_simple_binop (GET_MODE (value), code, temp,
6473 force_operand (XEXP (XEXP (value,
6474 0), 1), 0),
6475 target, 0, OPTAB_LIB_WIDEN);
6476 }
6477
6478 op1 = force_operand (XEXP (value, 0), subtarget);
6479 op2 = force_operand (op2, NULL_RTX);
6480 switch (code)
6481 {
6482 case MULT:
6483 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6484 case DIV:
6485 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6486 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6487 target, 1, OPTAB_LIB_WIDEN);
6488 else
6489 return expand_divmod (0,
6490 FLOAT_MODE_P (GET_MODE (value))
6491 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6492 GET_MODE (value), op1, op2, target, 0);
6493 case MOD:
6494 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6495 target, 0);
6496 case UDIV:
6497 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6498 target, 1);
6499 case UMOD:
6500 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6501 target, 1);
6502 case ASHIFTRT:
6503 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6504 target, 0, OPTAB_LIB_WIDEN);
6505 default:
6506 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6507 target, 1, OPTAB_LIB_WIDEN);
6508 }
6509 }
6510 if (UNARY_P (value))
6511 {
6512 if (!target)
6513 target = gen_reg_rtx (GET_MODE (value));
6514 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6515 switch (code)
6516 {
6517 case ZERO_EXTEND:
6518 case SIGN_EXTEND:
6519 case TRUNCATE:
6520 case FLOAT_EXTEND:
6521 case FLOAT_TRUNCATE:
6522 convert_move (target, op1, code == ZERO_EXTEND);
6523 return target;
6524
6525 case FIX:
6526 case UNSIGNED_FIX:
6527 expand_fix (target, op1, code == UNSIGNED_FIX);
6528 return target;
6529
6530 case FLOAT:
6531 case UNSIGNED_FLOAT:
6532 expand_float (target, op1, code == UNSIGNED_FLOAT);
6533 return target;
6534
6535 default:
6536 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
6537 }
6538 }
6539
6540 #ifdef INSN_SCHEDULING
6541 /* On machines that have insn scheduling, we want all memory reference to be
6542 explicit, so we need to deal with such paradoxical SUBREGs. */
6543 if (GET_CODE (value) == SUBREG && MEM_P (SUBREG_REG (value))
6544 && (GET_MODE_SIZE (GET_MODE (value))
6545 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (value)))))
6546 value
6547 = simplify_gen_subreg (GET_MODE (value),
6548 force_reg (GET_MODE (SUBREG_REG (value)),
6549 force_operand (SUBREG_REG (value),
6550 NULL_RTX)),
6551 GET_MODE (SUBREG_REG (value)),
6552 SUBREG_BYTE (value));
6553 #endif
6554
6555 return value;
6556 }
6557 \f
6558 /* Subroutine of expand_expr: return nonzero iff there is no way that
6559 EXP can reference X, which is being modified. TOP_P is nonzero if this
6560 call is going to be used to determine whether we need a temporary
6561 for EXP, as opposed to a recursive call to this function.
6562
6563 It is always safe for this routine to return zero since it merely
6564 searches for optimization opportunities. */
6565
6566 int
6567 safe_from_p (const_rtx x, tree exp, int top_p)
6568 {
6569 rtx exp_rtl = 0;
6570 int i, nops;
6571
6572 if (x == 0
6573 /* If EXP has varying size, we MUST use a target since we currently
6574 have no way of allocating temporaries of variable size
6575 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
6576 So we assume here that something at a higher level has prevented a
6577 clash. This is somewhat bogus, but the best we can do. Only
6578 do this when X is BLKmode and when we are at the top level. */
6579 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
6580 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
6581 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
6582 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
6583 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
6584 != INTEGER_CST)
6585 && GET_MODE (x) == BLKmode)
6586 /* If X is in the outgoing argument area, it is always safe. */
6587 || (MEM_P (x)
6588 && (XEXP (x, 0) == virtual_outgoing_args_rtx
6589 || (GET_CODE (XEXP (x, 0)) == PLUS
6590 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
6591 return 1;
6592
6593 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
6594 find the underlying pseudo. */
6595 if (GET_CODE (x) == SUBREG)
6596 {
6597 x = SUBREG_REG (x);
6598 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6599 return 0;
6600 }
6601
6602 /* Now look at our tree code and possibly recurse. */
6603 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
6604 {
6605 case tcc_declaration:
6606 exp_rtl = DECL_RTL_IF_SET (exp);
6607 break;
6608
6609 case tcc_constant:
6610 return 1;
6611
6612 case tcc_exceptional:
6613 if (TREE_CODE (exp) == TREE_LIST)
6614 {
6615 while (1)
6616 {
6617 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
6618 return 0;
6619 exp = TREE_CHAIN (exp);
6620 if (!exp)
6621 return 1;
6622 if (TREE_CODE (exp) != TREE_LIST)
6623 return safe_from_p (x, exp, 0);
6624 }
6625 }
6626 else if (TREE_CODE (exp) == CONSTRUCTOR)
6627 {
6628 constructor_elt *ce;
6629 unsigned HOST_WIDE_INT idx;
6630
6631 FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce)
6632 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
6633 || !safe_from_p (x, ce->value, 0))
6634 return 0;
6635 return 1;
6636 }
6637 else if (TREE_CODE (exp) == ERROR_MARK)
6638 return 1; /* An already-visited SAVE_EXPR? */
6639 else
6640 return 0;
6641
6642 case tcc_statement:
6643 /* The only case we look at here is the DECL_INITIAL inside a
6644 DECL_EXPR. */
6645 return (TREE_CODE (exp) != DECL_EXPR
6646 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
6647 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
6648 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
6649
6650 case tcc_binary:
6651 case tcc_comparison:
6652 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
6653 return 0;
6654 /* Fall through. */
6655
6656 case tcc_unary:
6657 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6658
6659 case tcc_expression:
6660 case tcc_reference:
6661 case tcc_vl_exp:
6662 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
6663 the expression. If it is set, we conflict iff we are that rtx or
6664 both are in memory. Otherwise, we check all operands of the
6665 expression recursively. */
6666
6667 switch (TREE_CODE (exp))
6668 {
6669 case ADDR_EXPR:
6670 /* If the operand is static or we are static, we can't conflict.
6671 Likewise if we don't conflict with the operand at all. */
6672 if (staticp (TREE_OPERAND (exp, 0))
6673 || TREE_STATIC (exp)
6674 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
6675 return 1;
6676
6677 /* Otherwise, the only way this can conflict is if we are taking
6678 the address of a DECL a that address if part of X, which is
6679 very rare. */
6680 exp = TREE_OPERAND (exp, 0);
6681 if (DECL_P (exp))
6682 {
6683 if (!DECL_RTL_SET_P (exp)
6684 || !MEM_P (DECL_RTL (exp)))
6685 return 0;
6686 else
6687 exp_rtl = XEXP (DECL_RTL (exp), 0);
6688 }
6689 break;
6690
6691 case MEM_REF:
6692 if (MEM_P (x)
6693 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
6694 get_alias_set (exp)))
6695 return 0;
6696 break;
6697
6698 case CALL_EXPR:
6699 /* Assume that the call will clobber all hard registers and
6700 all of memory. */
6701 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6702 || MEM_P (x))
6703 return 0;
6704 break;
6705
6706 case WITH_CLEANUP_EXPR:
6707 case CLEANUP_POINT_EXPR:
6708 /* Lowered by gimplify.c. */
6709 gcc_unreachable ();
6710
6711 case SAVE_EXPR:
6712 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6713
6714 default:
6715 break;
6716 }
6717
6718 /* If we have an rtx, we do not need to scan our operands. */
6719 if (exp_rtl)
6720 break;
6721
6722 nops = TREE_OPERAND_LENGTH (exp);
6723 for (i = 0; i < nops; i++)
6724 if (TREE_OPERAND (exp, i) != 0
6725 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
6726 return 0;
6727
6728 break;
6729
6730 case tcc_type:
6731 /* Should never get a type here. */
6732 gcc_unreachable ();
6733 }
6734
6735 /* If we have an rtl, find any enclosed object. Then see if we conflict
6736 with it. */
6737 if (exp_rtl)
6738 {
6739 if (GET_CODE (exp_rtl) == SUBREG)
6740 {
6741 exp_rtl = SUBREG_REG (exp_rtl);
6742 if (REG_P (exp_rtl)
6743 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
6744 return 0;
6745 }
6746
6747 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
6748 are memory and they conflict. */
6749 return ! (rtx_equal_p (x, exp_rtl)
6750 || (MEM_P (x) && MEM_P (exp_rtl)
6751 && true_dependence (exp_rtl, VOIDmode, x,
6752 rtx_addr_varies_p)));
6753 }
6754
6755 /* If we reach here, it is safe. */
6756 return 1;
6757 }
6758
6759 \f
6760 /* Return the highest power of two that EXP is known to be a multiple of.
6761 This is used in updating alignment of MEMs in array references. */
6762
6763 unsigned HOST_WIDE_INT
6764 highest_pow2_factor (const_tree exp)
6765 {
6766 unsigned HOST_WIDE_INT c0, c1;
6767
6768 switch (TREE_CODE (exp))
6769 {
6770 case INTEGER_CST:
6771 /* We can find the lowest bit that's a one. If the low
6772 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
6773 We need to handle this case since we can find it in a COND_EXPR,
6774 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
6775 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
6776 later ICE. */
6777 if (TREE_OVERFLOW (exp))
6778 return BIGGEST_ALIGNMENT;
6779 else
6780 {
6781 /* Note: tree_low_cst is intentionally not used here,
6782 we don't care about the upper bits. */
6783 c0 = TREE_INT_CST_LOW (exp);
6784 c0 &= -c0;
6785 return c0 ? c0 : BIGGEST_ALIGNMENT;
6786 }
6787 break;
6788
6789 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
6790 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6791 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6792 return MIN (c0, c1);
6793
6794 case MULT_EXPR:
6795 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6796 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6797 return c0 * c1;
6798
6799 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
6800 case CEIL_DIV_EXPR:
6801 if (integer_pow2p (TREE_OPERAND (exp, 1))
6802 && host_integerp (TREE_OPERAND (exp, 1), 1))
6803 {
6804 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6805 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
6806 return MAX (1, c0 / c1);
6807 }
6808 break;
6809
6810 case BIT_AND_EXPR:
6811 /* The highest power of two of a bit-and expression is the maximum of
6812 that of its operands. We typically get here for a complex LHS and
6813 a constant negative power of two on the RHS to force an explicit
6814 alignment, so don't bother looking at the LHS. */
6815 return highest_pow2_factor (TREE_OPERAND (exp, 1));
6816
6817 CASE_CONVERT:
6818 case SAVE_EXPR:
6819 return highest_pow2_factor (TREE_OPERAND (exp, 0));
6820
6821 case COMPOUND_EXPR:
6822 return highest_pow2_factor (TREE_OPERAND (exp, 1));
6823
6824 case COND_EXPR:
6825 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6826 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
6827 return MIN (c0, c1);
6828
6829 default:
6830 break;
6831 }
6832
6833 return 1;
6834 }
6835
6836 /* Similar, except that the alignment requirements of TARGET are
6837 taken into account. Assume it is at least as aligned as its
6838 type, unless it is a COMPONENT_REF in which case the layout of
6839 the structure gives the alignment. */
6840
6841 static unsigned HOST_WIDE_INT
6842 highest_pow2_factor_for_target (const_tree target, const_tree exp)
6843 {
6844 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
6845 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
6846
6847 return MAX (factor, talign);
6848 }
6849 \f
6850 /* Subroutine of expand_expr. Expand the two operands of a binary
6851 expression EXP0 and EXP1 placing the results in OP0 and OP1.
6852 The value may be stored in TARGET if TARGET is nonzero. The
6853 MODIFIER argument is as documented by expand_expr. */
6854
6855 static void
6856 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
6857 enum expand_modifier modifier)
6858 {
6859 if (! safe_from_p (target, exp1, 1))
6860 target = 0;
6861 if (operand_equal_p (exp0, exp1, 0))
6862 {
6863 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6864 *op1 = copy_rtx (*op0);
6865 }
6866 else
6867 {
6868 /* If we need to preserve evaluation order, copy exp0 into its own
6869 temporary variable so that it can't be clobbered by exp1. */
6870 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
6871 exp0 = save_expr (exp0);
6872 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6873 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
6874 }
6875 }
6876
6877 \f
6878 /* Return a MEM that contains constant EXP. DEFER is as for
6879 output_constant_def and MODIFIER is as for expand_expr. */
6880
6881 static rtx
6882 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
6883 {
6884 rtx mem;
6885
6886 mem = output_constant_def (exp, defer);
6887 if (modifier != EXPAND_INITIALIZER)
6888 mem = use_anchored_address (mem);
6889 return mem;
6890 }
6891
6892 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
6893 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
6894
6895 static rtx
6896 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
6897 enum expand_modifier modifier, addr_space_t as)
6898 {
6899 rtx result, subtarget;
6900 tree inner, offset;
6901 HOST_WIDE_INT bitsize, bitpos;
6902 int volatilep, unsignedp;
6903 enum machine_mode mode1;
6904
6905 /* If we are taking the address of a constant and are at the top level,
6906 we have to use output_constant_def since we can't call force_const_mem
6907 at top level. */
6908 /* ??? This should be considered a front-end bug. We should not be
6909 generating ADDR_EXPR of something that isn't an LVALUE. The only
6910 exception here is STRING_CST. */
6911 if (CONSTANT_CLASS_P (exp))
6912 return XEXP (expand_expr_constant (exp, 0, modifier), 0);
6913
6914 /* Everything must be something allowed by is_gimple_addressable. */
6915 switch (TREE_CODE (exp))
6916 {
6917 case INDIRECT_REF:
6918 /* This case will happen via recursion for &a->b. */
6919 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
6920
6921 case MEM_REF:
6922 {
6923 tree tem = TREE_OPERAND (exp, 0);
6924 if (!integer_zerop (TREE_OPERAND (exp, 1)))
6925 tem = build2 (POINTER_PLUS_EXPR, TREE_TYPE (TREE_OPERAND (exp, 1)),
6926 tem,
6927 double_int_to_tree (sizetype, mem_ref_offset (exp)));
6928 return expand_expr (tem, target, tmode, modifier);
6929 }
6930
6931 case CONST_DECL:
6932 /* Expand the initializer like constants above. */
6933 return XEXP (expand_expr_constant (DECL_INITIAL (exp), 0, modifier), 0);
6934
6935 case REALPART_EXPR:
6936 /* The real part of the complex number is always first, therefore
6937 the address is the same as the address of the parent object. */
6938 offset = 0;
6939 bitpos = 0;
6940 inner = TREE_OPERAND (exp, 0);
6941 break;
6942
6943 case IMAGPART_EXPR:
6944 /* The imaginary part of the complex number is always second.
6945 The expression is therefore always offset by the size of the
6946 scalar type. */
6947 offset = 0;
6948 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
6949 inner = TREE_OPERAND (exp, 0);
6950 break;
6951
6952 default:
6953 /* If the object is a DECL, then expand it for its rtl. Don't bypass
6954 expand_expr, as that can have various side effects; LABEL_DECLs for
6955 example, may not have their DECL_RTL set yet. Expand the rtl of
6956 CONSTRUCTORs too, which should yield a memory reference for the
6957 constructor's contents. Assume language specific tree nodes can
6958 be expanded in some interesting way. */
6959 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
6960 if (DECL_P (exp)
6961 || TREE_CODE (exp) == CONSTRUCTOR
6962 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
6963 {
6964 result = expand_expr (exp, target, tmode,
6965 modifier == EXPAND_INITIALIZER
6966 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
6967
6968 /* If the DECL isn't in memory, then the DECL wasn't properly
6969 marked TREE_ADDRESSABLE, which will be either a front-end
6970 or a tree optimizer bug. */
6971 gcc_assert (MEM_P (result));
6972 result = XEXP (result, 0);
6973
6974 /* ??? Is this needed anymore? */
6975 if (DECL_P (exp) && !TREE_USED (exp) == 0)
6976 {
6977 assemble_external (exp);
6978 TREE_USED (exp) = 1;
6979 }
6980
6981 if (modifier != EXPAND_INITIALIZER
6982 && modifier != EXPAND_CONST_ADDRESS)
6983 result = force_operand (result, target);
6984 return result;
6985 }
6986
6987 /* Pass FALSE as the last argument to get_inner_reference although
6988 we are expanding to RTL. The rationale is that we know how to
6989 handle "aligning nodes" here: we can just bypass them because
6990 they won't change the final object whose address will be returned
6991 (they actually exist only for that purpose). */
6992 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
6993 &mode1, &unsignedp, &volatilep, false);
6994 break;
6995 }
6996
6997 /* We must have made progress. */
6998 gcc_assert (inner != exp);
6999
7000 subtarget = offset || bitpos ? NULL_RTX : target;
7001 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7002 inner alignment, force the inner to be sufficiently aligned. */
7003 if (CONSTANT_CLASS_P (inner)
7004 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7005 {
7006 inner = copy_node (inner);
7007 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7008 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7009 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7010 }
7011 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7012
7013 if (offset)
7014 {
7015 rtx tmp;
7016
7017 if (modifier != EXPAND_NORMAL)
7018 result = force_operand (result, NULL);
7019 tmp = expand_expr (offset, NULL_RTX, tmode,
7020 modifier == EXPAND_INITIALIZER
7021 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7022
7023 result = convert_memory_address_addr_space (tmode, result, as);
7024 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7025
7026 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7027 result = gen_rtx_PLUS (tmode, result, tmp);
7028 else
7029 {
7030 subtarget = bitpos ? NULL_RTX : target;
7031 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7032 1, OPTAB_LIB_WIDEN);
7033 }
7034 }
7035
7036 if (bitpos)
7037 {
7038 /* Someone beforehand should have rejected taking the address
7039 of such an object. */
7040 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7041
7042 result = plus_constant (result, bitpos / BITS_PER_UNIT);
7043 if (modifier < EXPAND_SUM)
7044 result = force_operand (result, target);
7045 }
7046
7047 return result;
7048 }
7049
7050 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7051 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7052
7053 static rtx
7054 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7055 enum expand_modifier modifier)
7056 {
7057 addr_space_t as = ADDR_SPACE_GENERIC;
7058 enum machine_mode address_mode = Pmode;
7059 enum machine_mode pointer_mode = ptr_mode;
7060 enum machine_mode rmode;
7061 rtx result;
7062
7063 /* Target mode of VOIDmode says "whatever's natural". */
7064 if (tmode == VOIDmode)
7065 tmode = TYPE_MODE (TREE_TYPE (exp));
7066
7067 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7068 {
7069 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7070 address_mode = targetm.addr_space.address_mode (as);
7071 pointer_mode = targetm.addr_space.pointer_mode (as);
7072 }
7073
7074 /* We can get called with some Weird Things if the user does silliness
7075 like "(short) &a". In that case, convert_memory_address won't do
7076 the right thing, so ignore the given target mode. */
7077 if (tmode != address_mode && tmode != pointer_mode)
7078 tmode = address_mode;
7079
7080 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7081 tmode, modifier, as);
7082
7083 /* Despite expand_expr claims concerning ignoring TMODE when not
7084 strictly convenient, stuff breaks if we don't honor it. Note
7085 that combined with the above, we only do this for pointer modes. */
7086 rmode = GET_MODE (result);
7087 if (rmode == VOIDmode)
7088 rmode = tmode;
7089 if (rmode != tmode)
7090 result = convert_memory_address_addr_space (tmode, result, as);
7091
7092 return result;
7093 }
7094
7095 /* Generate code for computing CONSTRUCTOR EXP.
7096 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7097 is TRUE, instead of creating a temporary variable in memory
7098 NULL is returned and the caller needs to handle it differently. */
7099
7100 static rtx
7101 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7102 bool avoid_temp_mem)
7103 {
7104 tree type = TREE_TYPE (exp);
7105 enum machine_mode mode = TYPE_MODE (type);
7106
7107 /* Try to avoid creating a temporary at all. This is possible
7108 if all of the initializer is zero.
7109 FIXME: try to handle all [0..255] initializers we can handle
7110 with memset. */
7111 if (TREE_STATIC (exp)
7112 && !TREE_ADDRESSABLE (exp)
7113 && target != 0 && mode == BLKmode
7114 && all_zeros_p (exp))
7115 {
7116 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7117 return target;
7118 }
7119
7120 /* All elts simple constants => refer to a constant in memory. But
7121 if this is a non-BLKmode mode, let it store a field at a time
7122 since that should make a CONST_INT or CONST_DOUBLE when we
7123 fold. Likewise, if we have a target we can use, it is best to
7124 store directly into the target unless the type is large enough
7125 that memcpy will be used. If we are making an initializer and
7126 all operands are constant, put it in memory as well.
7127
7128 FIXME: Avoid trying to fill vector constructors piece-meal.
7129 Output them with output_constant_def below unless we're sure
7130 they're zeros. This should go away when vector initializers
7131 are treated like VECTOR_CST instead of arrays. */
7132 if ((TREE_STATIC (exp)
7133 && ((mode == BLKmode
7134 && ! (target != 0 && safe_from_p (target, exp, 1)))
7135 || TREE_ADDRESSABLE (exp)
7136 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7137 && (! MOVE_BY_PIECES_P
7138 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7139 TYPE_ALIGN (type)))
7140 && ! mostly_zeros_p (exp))))
7141 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7142 && TREE_CONSTANT (exp)))
7143 {
7144 rtx constructor;
7145
7146 if (avoid_temp_mem)
7147 return NULL_RTX;
7148
7149 constructor = expand_expr_constant (exp, 1, modifier);
7150
7151 if (modifier != EXPAND_CONST_ADDRESS
7152 && modifier != EXPAND_INITIALIZER
7153 && modifier != EXPAND_SUM)
7154 constructor = validize_mem (constructor);
7155
7156 return constructor;
7157 }
7158
7159 /* Handle calls that pass values in multiple non-contiguous
7160 locations. The Irix 6 ABI has examples of this. */
7161 if (target == 0 || ! safe_from_p (target, exp, 1)
7162 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7163 {
7164 if (avoid_temp_mem)
7165 return NULL_RTX;
7166
7167 target
7168 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7169 | (TREE_READONLY (exp)
7170 * TYPE_QUAL_CONST))),
7171 0, TREE_ADDRESSABLE (exp), 1);
7172 }
7173
7174 store_constructor (exp, target, 0, int_expr_size (exp));
7175 return target;
7176 }
7177
7178
7179 /* expand_expr: generate code for computing expression EXP.
7180 An rtx for the computed value is returned. The value is never null.
7181 In the case of a void EXP, const0_rtx is returned.
7182
7183 The value may be stored in TARGET if TARGET is nonzero.
7184 TARGET is just a suggestion; callers must assume that
7185 the rtx returned may not be the same as TARGET.
7186
7187 If TARGET is CONST0_RTX, it means that the value will be ignored.
7188
7189 If TMODE is not VOIDmode, it suggests generating the
7190 result in mode TMODE. But this is done only when convenient.
7191 Otherwise, TMODE is ignored and the value generated in its natural mode.
7192 TMODE is just a suggestion; callers must assume that
7193 the rtx returned may not have mode TMODE.
7194
7195 Note that TARGET may have neither TMODE nor MODE. In that case, it
7196 probably will not be used.
7197
7198 If MODIFIER is EXPAND_SUM then when EXP is an addition
7199 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7200 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7201 products as above, or REG or MEM, or constant.
7202 Ordinarily in such cases we would output mul or add instructions
7203 and then return a pseudo reg containing the sum.
7204
7205 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7206 it also marks a label as absolutely required (it can't be dead).
7207 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7208 This is used for outputting expressions used in initializers.
7209
7210 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7211 with a constant address even if that address is not normally legitimate.
7212 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7213
7214 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7215 a call parameter. Such targets require special care as we haven't yet
7216 marked TARGET so that it's safe from being trashed by libcalls. We
7217 don't want to use TARGET for anything but the final result;
7218 Intermediate values must go elsewhere. Additionally, calls to
7219 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7220
7221 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7222 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7223 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7224 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7225 recursively. */
7226
7227 rtx
7228 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7229 enum expand_modifier modifier, rtx *alt_rtl)
7230 {
7231 rtx ret;
7232
7233 /* Handle ERROR_MARK before anybody tries to access its type. */
7234 if (TREE_CODE (exp) == ERROR_MARK
7235 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7236 {
7237 ret = CONST0_RTX (tmode);
7238 return ret ? ret : const0_rtx;
7239 }
7240
7241 /* If this is an expression of some kind and it has an associated line
7242 number, then emit the line number before expanding the expression.
7243
7244 We need to save and restore the file and line information so that
7245 errors discovered during expansion are emitted with the right
7246 information. It would be better of the diagnostic routines
7247 used the file/line information embedded in the tree nodes rather
7248 than globals. */
7249 if (cfun && EXPR_HAS_LOCATION (exp))
7250 {
7251 location_t saved_location = input_location;
7252 location_t saved_curr_loc = get_curr_insn_source_location ();
7253 tree saved_block = get_curr_insn_block ();
7254 input_location = EXPR_LOCATION (exp);
7255 set_curr_insn_source_location (input_location);
7256
7257 /* Record where the insns produced belong. */
7258 set_curr_insn_block (TREE_BLOCK (exp));
7259
7260 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7261
7262 input_location = saved_location;
7263 set_curr_insn_block (saved_block);
7264 set_curr_insn_source_location (saved_curr_loc);
7265 }
7266 else
7267 {
7268 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7269 }
7270
7271 return ret;
7272 }
7273
7274 rtx
7275 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7276 enum expand_modifier modifier)
7277 {
7278 rtx op0, op1, op2, temp;
7279 tree type;
7280 int unsignedp;
7281 enum machine_mode mode;
7282 enum tree_code code = ops->code;
7283 optab this_optab;
7284 rtx subtarget, original_target;
7285 int ignore;
7286 bool reduce_bit_field;
7287 location_t loc = ops->location;
7288 tree treeop0, treeop1;
7289 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7290 ? reduce_to_bit_field_precision ((expr), \
7291 target, \
7292 type) \
7293 : (expr))
7294
7295 type = ops->type;
7296 mode = TYPE_MODE (type);
7297 unsignedp = TYPE_UNSIGNED (type);
7298
7299 treeop0 = ops->op0;
7300 treeop1 = ops->op1;
7301
7302 /* We should be called only on simple (binary or unary) expressions,
7303 exactly those that are valid in gimple expressions that aren't
7304 GIMPLE_SINGLE_RHS (or invalid). */
7305 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7306 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
7307 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
7308
7309 ignore = (target == const0_rtx
7310 || ((CONVERT_EXPR_CODE_P (code)
7311 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7312 && TREE_CODE (type) == VOID_TYPE));
7313
7314 /* We should be called only if we need the result. */
7315 gcc_assert (!ignore);
7316
7317 /* An operation in what may be a bit-field type needs the
7318 result to be reduced to the precision of the bit-field type,
7319 which is narrower than that of the type's mode. */
7320 reduce_bit_field = (TREE_CODE (type) == INTEGER_TYPE
7321 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7322
7323 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7324 target = 0;
7325
7326 /* Use subtarget as the target for operand 0 of a binary operation. */
7327 subtarget = get_subtarget (target);
7328 original_target = target;
7329
7330 switch (code)
7331 {
7332 case NON_LVALUE_EXPR:
7333 case PAREN_EXPR:
7334 CASE_CONVERT:
7335 if (treeop0 == error_mark_node)
7336 return const0_rtx;
7337
7338 if (TREE_CODE (type) == UNION_TYPE)
7339 {
7340 tree valtype = TREE_TYPE (treeop0);
7341
7342 /* If both input and output are BLKmode, this conversion isn't doing
7343 anything except possibly changing memory attribute. */
7344 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7345 {
7346 rtx result = expand_expr (treeop0, target, tmode,
7347 modifier);
7348
7349 result = copy_rtx (result);
7350 set_mem_attributes (result, type, 0);
7351 return result;
7352 }
7353
7354 if (target == 0)
7355 {
7356 if (TYPE_MODE (type) != BLKmode)
7357 target = gen_reg_rtx (TYPE_MODE (type));
7358 else
7359 target = assign_temp (type, 0, 1, 1);
7360 }
7361
7362 if (MEM_P (target))
7363 /* Store data into beginning of memory target. */
7364 store_expr (treeop0,
7365 adjust_address (target, TYPE_MODE (valtype), 0),
7366 modifier == EXPAND_STACK_PARM,
7367 false);
7368
7369 else
7370 {
7371 gcc_assert (REG_P (target));
7372
7373 /* Store this field into a union of the proper type. */
7374 store_field (target,
7375 MIN ((int_size_in_bytes (TREE_TYPE
7376 (treeop0))
7377 * BITS_PER_UNIT),
7378 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7379 0, TYPE_MODE (valtype), treeop0,
7380 type, 0, false);
7381 }
7382
7383 /* Return the entire union. */
7384 return target;
7385 }
7386
7387 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
7388 {
7389 op0 = expand_expr (treeop0, target, VOIDmode,
7390 modifier);
7391
7392 /* If the signedness of the conversion differs and OP0 is
7393 a promoted SUBREG, clear that indication since we now
7394 have to do the proper extension. */
7395 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
7396 && GET_CODE (op0) == SUBREG)
7397 SUBREG_PROMOTED_VAR_P (op0) = 0;
7398
7399 return REDUCE_BIT_FIELD (op0);
7400 }
7401
7402 op0 = expand_expr (treeop0, NULL_RTX, mode,
7403 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
7404 if (GET_MODE (op0) == mode)
7405 ;
7406
7407 /* If OP0 is a constant, just convert it into the proper mode. */
7408 else if (CONSTANT_P (op0))
7409 {
7410 tree inner_type = TREE_TYPE (treeop0);
7411 enum machine_mode inner_mode = TYPE_MODE (inner_type);
7412
7413 if (modifier == EXPAND_INITIALIZER)
7414 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7415 subreg_lowpart_offset (mode,
7416 inner_mode));
7417 else
7418 op0= convert_modes (mode, inner_mode, op0,
7419 TYPE_UNSIGNED (inner_type));
7420 }
7421
7422 else if (modifier == EXPAND_INITIALIZER)
7423 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7424
7425 else if (target == 0)
7426 op0 = convert_to_mode (mode, op0,
7427 TYPE_UNSIGNED (TREE_TYPE
7428 (treeop0)));
7429 else
7430 {
7431 convert_move (target, op0,
7432 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7433 op0 = target;
7434 }
7435
7436 return REDUCE_BIT_FIELD (op0);
7437
7438 case ADDR_SPACE_CONVERT_EXPR:
7439 {
7440 tree treeop0_type = TREE_TYPE (treeop0);
7441 addr_space_t as_to;
7442 addr_space_t as_from;
7443
7444 gcc_assert (POINTER_TYPE_P (type));
7445 gcc_assert (POINTER_TYPE_P (treeop0_type));
7446
7447 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
7448 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
7449
7450 /* Conversions between pointers to the same address space should
7451 have been implemented via CONVERT_EXPR / NOP_EXPR. */
7452 gcc_assert (as_to != as_from);
7453
7454 /* Ask target code to handle conversion between pointers
7455 to overlapping address spaces. */
7456 if (targetm.addr_space.subset_p (as_to, as_from)
7457 || targetm.addr_space.subset_p (as_from, as_to))
7458 {
7459 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
7460 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
7461 gcc_assert (op0);
7462 return op0;
7463 }
7464
7465 /* For disjoint address spaces, converting anything but
7466 a null pointer invokes undefined behaviour. We simply
7467 always return a null pointer here. */
7468 return CONST0_RTX (mode);
7469 }
7470
7471 case POINTER_PLUS_EXPR:
7472 /* Even though the sizetype mode and the pointer's mode can be different
7473 expand is able to handle this correctly and get the correct result out
7474 of the PLUS_EXPR code. */
7475 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
7476 if sizetype precision is smaller than pointer precision. */
7477 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
7478 treeop1 = fold_convert_loc (loc, type,
7479 fold_convert_loc (loc, ssizetype,
7480 treeop1));
7481 case PLUS_EXPR:
7482 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7483 something else, make sure we add the register to the constant and
7484 then to the other thing. This case can occur during strength
7485 reduction and doing it this way will produce better code if the
7486 frame pointer or argument pointer is eliminated.
7487
7488 fold-const.c will ensure that the constant is always in the inner
7489 PLUS_EXPR, so the only case we need to do anything about is if
7490 sp, ap, or fp is our second argument, in which case we must swap
7491 the innermost first argument and our second argument. */
7492
7493 if (TREE_CODE (treeop0) == PLUS_EXPR
7494 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
7495 && TREE_CODE (treeop1) == VAR_DECL
7496 && (DECL_RTL (treeop1) == frame_pointer_rtx
7497 || DECL_RTL (treeop1) == stack_pointer_rtx
7498 || DECL_RTL (treeop1) == arg_pointer_rtx))
7499 {
7500 tree t = treeop1;
7501
7502 treeop1 = TREE_OPERAND (treeop0, 0);
7503 TREE_OPERAND (treeop0, 0) = t;
7504 }
7505
7506 /* If the result is to be ptr_mode and we are adding an integer to
7507 something, we might be forming a constant. So try to use
7508 plus_constant. If it produces a sum and we can't accept it,
7509 use force_operand. This allows P = &ARR[const] to generate
7510 efficient code on machines where a SYMBOL_REF is not a valid
7511 address.
7512
7513 If this is an EXPAND_SUM call, always return the sum. */
7514 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7515 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
7516 {
7517 if (modifier == EXPAND_STACK_PARM)
7518 target = 0;
7519 if (TREE_CODE (treeop0) == INTEGER_CST
7520 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
7521 && TREE_CONSTANT (treeop1))
7522 {
7523 rtx constant_part;
7524
7525 op1 = expand_expr (treeop1, subtarget, VOIDmode,
7526 EXPAND_SUM);
7527 /* Use immed_double_const to ensure that the constant is
7528 truncated according to the mode of OP1, then sign extended
7529 to a HOST_WIDE_INT. Using the constant directly can result
7530 in non-canonical RTL in a 64x32 cross compile. */
7531 constant_part
7532 = immed_double_const (TREE_INT_CST_LOW (treeop0),
7533 (HOST_WIDE_INT) 0,
7534 TYPE_MODE (TREE_TYPE (treeop1)));
7535 op1 = plus_constant (op1, INTVAL (constant_part));
7536 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7537 op1 = force_operand (op1, target);
7538 return REDUCE_BIT_FIELD (op1);
7539 }
7540
7541 else if (TREE_CODE (treeop1) == INTEGER_CST
7542 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
7543 && TREE_CONSTANT (treeop0))
7544 {
7545 rtx constant_part;
7546
7547 op0 = expand_expr (treeop0, subtarget, VOIDmode,
7548 (modifier == EXPAND_INITIALIZER
7549 ? EXPAND_INITIALIZER : EXPAND_SUM));
7550 if (! CONSTANT_P (op0))
7551 {
7552 op1 = expand_expr (treeop1, NULL_RTX,
7553 VOIDmode, modifier);
7554 /* Return a PLUS if modifier says it's OK. */
7555 if (modifier == EXPAND_SUM
7556 || modifier == EXPAND_INITIALIZER)
7557 return simplify_gen_binary (PLUS, mode, op0, op1);
7558 goto binop2;
7559 }
7560 /* Use immed_double_const to ensure that the constant is
7561 truncated according to the mode of OP1, then sign extended
7562 to a HOST_WIDE_INT. Using the constant directly can result
7563 in non-canonical RTL in a 64x32 cross compile. */
7564 constant_part
7565 = immed_double_const (TREE_INT_CST_LOW (treeop1),
7566 (HOST_WIDE_INT) 0,
7567 TYPE_MODE (TREE_TYPE (treeop0)));
7568 op0 = plus_constant (op0, INTVAL (constant_part));
7569 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7570 op0 = force_operand (op0, target);
7571 return REDUCE_BIT_FIELD (op0);
7572 }
7573 }
7574
7575 /* No sense saving up arithmetic to be done
7576 if it's all in the wrong mode to form part of an address.
7577 And force_operand won't know whether to sign-extend or
7578 zero-extend. */
7579 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7580 || mode != ptr_mode)
7581 {
7582 expand_operands (treeop0, treeop1,
7583 subtarget, &op0, &op1, EXPAND_NORMAL);
7584 if (op0 == const0_rtx)
7585 return op1;
7586 if (op1 == const0_rtx)
7587 return op0;
7588 goto binop2;
7589 }
7590
7591 expand_operands (treeop0, treeop1,
7592 subtarget, &op0, &op1, modifier);
7593 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7594
7595 case MINUS_EXPR:
7596 /* For initializers, we are allowed to return a MINUS of two
7597 symbolic constants. Here we handle all cases when both operands
7598 are constant. */
7599 /* Handle difference of two symbolic constants,
7600 for the sake of an initializer. */
7601 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7602 && really_constant_p (treeop0)
7603 && really_constant_p (treeop1))
7604 {
7605 expand_operands (treeop0, treeop1,
7606 NULL_RTX, &op0, &op1, modifier);
7607
7608 /* If the last operand is a CONST_INT, use plus_constant of
7609 the negated constant. Else make the MINUS. */
7610 if (CONST_INT_P (op1))
7611 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
7612 else
7613 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
7614 }
7615
7616 /* No sense saving up arithmetic to be done
7617 if it's all in the wrong mode to form part of an address.
7618 And force_operand won't know whether to sign-extend or
7619 zero-extend. */
7620 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7621 || mode != ptr_mode)
7622 goto binop;
7623
7624 expand_operands (treeop0, treeop1,
7625 subtarget, &op0, &op1, modifier);
7626
7627 /* Convert A - const to A + (-const). */
7628 if (CONST_INT_P (op1))
7629 {
7630 op1 = negate_rtx (mode, op1);
7631 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7632 }
7633
7634 goto binop2;
7635
7636 case WIDEN_MULT_PLUS_EXPR:
7637 case WIDEN_MULT_MINUS_EXPR:
7638 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
7639 op2 = expand_normal (ops->op2);
7640 target = expand_widen_pattern_expr (ops, op0, op1, op2,
7641 target, unsignedp);
7642 return target;
7643
7644 case WIDEN_MULT_EXPR:
7645 /* If first operand is constant, swap them.
7646 Thus the following special case checks need only
7647 check the second operand. */
7648 if (TREE_CODE (treeop0) == INTEGER_CST)
7649 {
7650 tree t1 = treeop0;
7651 treeop0 = treeop1;
7652 treeop1 = t1;
7653 }
7654
7655 /* First, check if we have a multiplication of one signed and one
7656 unsigned operand. */
7657 if (TREE_CODE (treeop1) != INTEGER_CST
7658 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
7659 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
7660 {
7661 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
7662 this_optab = usmul_widen_optab;
7663 if (mode == GET_MODE_2XWIDER_MODE (innermode))
7664 {
7665 if (optab_handler (this_optab, mode) != CODE_FOR_nothing)
7666 {
7667 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
7668 expand_operands (treeop0, treeop1, subtarget, &op0, &op1,
7669 EXPAND_NORMAL);
7670 else
7671 expand_operands (treeop0, treeop1, subtarget, &op1, &op0,
7672 EXPAND_NORMAL);
7673 goto binop3;
7674 }
7675 }
7676 }
7677 /* Check for a multiplication with matching signedness. */
7678 else if ((TREE_CODE (treeop1) == INTEGER_CST
7679 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
7680 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
7681 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
7682 {
7683 tree op0type = TREE_TYPE (treeop0);
7684 enum machine_mode innermode = TYPE_MODE (op0type);
7685 bool zextend_p = TYPE_UNSIGNED (op0type);
7686 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
7687 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
7688
7689 if (mode == GET_MODE_2XWIDER_MODE (innermode))
7690 {
7691 if (optab_handler (this_optab, mode) != CODE_FOR_nothing)
7692 {
7693 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
7694 EXPAND_NORMAL);
7695 temp = expand_widening_mult (mode, op0, op1, target,
7696 unsignedp, this_optab);
7697 return REDUCE_BIT_FIELD (temp);
7698 }
7699 if (optab_handler (other_optab, mode) != CODE_FOR_nothing
7700 && innermode == word_mode)
7701 {
7702 rtx htem, hipart;
7703 op0 = expand_normal (treeop0);
7704 if (TREE_CODE (treeop1) == INTEGER_CST)
7705 op1 = convert_modes (innermode, mode,
7706 expand_normal (treeop1), unsignedp);
7707 else
7708 op1 = expand_normal (treeop1);
7709 temp = expand_binop (mode, other_optab, op0, op1, target,
7710 unsignedp, OPTAB_LIB_WIDEN);
7711 hipart = gen_highpart (innermode, temp);
7712 htem = expand_mult_highpart_adjust (innermode, hipart,
7713 op0, op1, hipart,
7714 zextend_p);
7715 if (htem != hipart)
7716 emit_move_insn (hipart, htem);
7717 return REDUCE_BIT_FIELD (temp);
7718 }
7719 }
7720 }
7721 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
7722 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
7723 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
7724 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
7725
7726 case MULT_EXPR:
7727 /* If this is a fixed-point operation, then we cannot use the code
7728 below because "expand_mult" doesn't support sat/no-sat fixed-point
7729 multiplications. */
7730 if (ALL_FIXED_POINT_MODE_P (mode))
7731 goto binop;
7732
7733 /* If first operand is constant, swap them.
7734 Thus the following special case checks need only
7735 check the second operand. */
7736 if (TREE_CODE (treeop0) == INTEGER_CST)
7737 {
7738 tree t1 = treeop0;
7739 treeop0 = treeop1;
7740 treeop1 = t1;
7741 }
7742
7743 /* Attempt to return something suitable for generating an
7744 indexed address, for machines that support that. */
7745
7746 if (modifier == EXPAND_SUM && mode == ptr_mode
7747 && host_integerp (treeop1, 0))
7748 {
7749 tree exp1 = treeop1;
7750
7751 op0 = expand_expr (treeop0, subtarget, VOIDmode,
7752 EXPAND_SUM);
7753
7754 if (!REG_P (op0))
7755 op0 = force_operand (op0, NULL_RTX);
7756 if (!REG_P (op0))
7757 op0 = copy_to_mode_reg (mode, op0);
7758
7759 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
7760 gen_int_mode (tree_low_cst (exp1, 0),
7761 TYPE_MODE (TREE_TYPE (exp1)))));
7762 }
7763
7764 if (modifier == EXPAND_STACK_PARM)
7765 target = 0;
7766
7767 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
7768 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
7769
7770 case TRUNC_DIV_EXPR:
7771 case FLOOR_DIV_EXPR:
7772 case CEIL_DIV_EXPR:
7773 case ROUND_DIV_EXPR:
7774 case EXACT_DIV_EXPR:
7775 /* If this is a fixed-point operation, then we cannot use the code
7776 below because "expand_divmod" doesn't support sat/no-sat fixed-point
7777 divisions. */
7778 if (ALL_FIXED_POINT_MODE_P (mode))
7779 goto binop;
7780
7781 if (modifier == EXPAND_STACK_PARM)
7782 target = 0;
7783 /* Possible optimization: compute the dividend with EXPAND_SUM
7784 then if the divisor is constant can optimize the case
7785 where some terms of the dividend have coeffs divisible by it. */
7786 expand_operands (treeop0, treeop1,
7787 subtarget, &op0, &op1, EXPAND_NORMAL);
7788 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
7789
7790 case RDIV_EXPR:
7791 goto binop;
7792
7793 case TRUNC_MOD_EXPR:
7794 case FLOOR_MOD_EXPR:
7795 case CEIL_MOD_EXPR:
7796 case ROUND_MOD_EXPR:
7797 if (modifier == EXPAND_STACK_PARM)
7798 target = 0;
7799 expand_operands (treeop0, treeop1,
7800 subtarget, &op0, &op1, EXPAND_NORMAL);
7801 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
7802
7803 case FIXED_CONVERT_EXPR:
7804 op0 = expand_normal (treeop0);
7805 if (target == 0 || modifier == EXPAND_STACK_PARM)
7806 target = gen_reg_rtx (mode);
7807
7808 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
7809 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
7810 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
7811 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
7812 else
7813 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
7814 return target;
7815
7816 case FIX_TRUNC_EXPR:
7817 op0 = expand_normal (treeop0);
7818 if (target == 0 || modifier == EXPAND_STACK_PARM)
7819 target = gen_reg_rtx (mode);
7820 expand_fix (target, op0, unsignedp);
7821 return target;
7822
7823 case FLOAT_EXPR:
7824 op0 = expand_normal (treeop0);
7825 if (target == 0 || modifier == EXPAND_STACK_PARM)
7826 target = gen_reg_rtx (mode);
7827 /* expand_float can't figure out what to do if FROM has VOIDmode.
7828 So give it the correct mode. With -O, cse will optimize this. */
7829 if (GET_MODE (op0) == VOIDmode)
7830 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
7831 op0);
7832 expand_float (target, op0,
7833 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
7834 return target;
7835
7836 case NEGATE_EXPR:
7837 op0 = expand_expr (treeop0, subtarget,
7838 VOIDmode, EXPAND_NORMAL);
7839 if (modifier == EXPAND_STACK_PARM)
7840 target = 0;
7841 temp = expand_unop (mode,
7842 optab_for_tree_code (NEGATE_EXPR, type,
7843 optab_default),
7844 op0, target, 0);
7845 gcc_assert (temp);
7846 return REDUCE_BIT_FIELD (temp);
7847
7848 case ABS_EXPR:
7849 op0 = expand_expr (treeop0, subtarget,
7850 VOIDmode, EXPAND_NORMAL);
7851 if (modifier == EXPAND_STACK_PARM)
7852 target = 0;
7853
7854 /* ABS_EXPR is not valid for complex arguments. */
7855 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
7856 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
7857
7858 /* Unsigned abs is simply the operand. Testing here means we don't
7859 risk generating incorrect code below. */
7860 if (TYPE_UNSIGNED (type))
7861 return op0;
7862
7863 return expand_abs (mode, op0, target, unsignedp,
7864 safe_from_p (target, treeop0, 1));
7865
7866 case MAX_EXPR:
7867 case MIN_EXPR:
7868 target = original_target;
7869 if (target == 0
7870 || modifier == EXPAND_STACK_PARM
7871 || (MEM_P (target) && MEM_VOLATILE_P (target))
7872 || GET_MODE (target) != mode
7873 || (REG_P (target)
7874 && REGNO (target) < FIRST_PSEUDO_REGISTER))
7875 target = gen_reg_rtx (mode);
7876 expand_operands (treeop0, treeop1,
7877 target, &op0, &op1, EXPAND_NORMAL);
7878
7879 /* First try to do it with a special MIN or MAX instruction.
7880 If that does not win, use a conditional jump to select the proper
7881 value. */
7882 this_optab = optab_for_tree_code (code, type, optab_default);
7883 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
7884 OPTAB_WIDEN);
7885 if (temp != 0)
7886 return temp;
7887
7888 /* At this point, a MEM target is no longer useful; we will get better
7889 code without it. */
7890
7891 if (! REG_P (target))
7892 target = gen_reg_rtx (mode);
7893
7894 /* If op1 was placed in target, swap op0 and op1. */
7895 if (target != op0 && target == op1)
7896 {
7897 temp = op0;
7898 op0 = op1;
7899 op1 = temp;
7900 }
7901
7902 /* We generate better code and avoid problems with op1 mentioning
7903 target by forcing op1 into a pseudo if it isn't a constant. */
7904 if (! CONSTANT_P (op1))
7905 op1 = force_reg (mode, op1);
7906
7907 {
7908 enum rtx_code comparison_code;
7909 rtx cmpop1 = op1;
7910
7911 if (code == MAX_EXPR)
7912 comparison_code = unsignedp ? GEU : GE;
7913 else
7914 comparison_code = unsignedp ? LEU : LE;
7915
7916 /* Canonicalize to comparisons against 0. */
7917 if (op1 == const1_rtx)
7918 {
7919 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
7920 or (a != 0 ? a : 1) for unsigned.
7921 For MIN we are safe converting (a <= 1 ? a : 1)
7922 into (a <= 0 ? a : 1) */
7923 cmpop1 = const0_rtx;
7924 if (code == MAX_EXPR)
7925 comparison_code = unsignedp ? NE : GT;
7926 }
7927 if (op1 == constm1_rtx && !unsignedp)
7928 {
7929 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
7930 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
7931 cmpop1 = const0_rtx;
7932 if (code == MIN_EXPR)
7933 comparison_code = LT;
7934 }
7935 #ifdef HAVE_conditional_move
7936 /* Use a conditional move if possible. */
7937 if (can_conditionally_move_p (mode))
7938 {
7939 rtx insn;
7940
7941 /* ??? Same problem as in expmed.c: emit_conditional_move
7942 forces a stack adjustment via compare_from_rtx, and we
7943 lose the stack adjustment if the sequence we are about
7944 to create is discarded. */
7945 do_pending_stack_adjust ();
7946
7947 start_sequence ();
7948
7949 /* Try to emit the conditional move. */
7950 insn = emit_conditional_move (target, comparison_code,
7951 op0, cmpop1, mode,
7952 op0, op1, mode,
7953 unsignedp);
7954
7955 /* If we could do the conditional move, emit the sequence,
7956 and return. */
7957 if (insn)
7958 {
7959 rtx seq = get_insns ();
7960 end_sequence ();
7961 emit_insn (seq);
7962 return target;
7963 }
7964
7965 /* Otherwise discard the sequence and fall back to code with
7966 branches. */
7967 end_sequence ();
7968 }
7969 #endif
7970 if (target != op0)
7971 emit_move_insn (target, op0);
7972
7973 temp = gen_label_rtx ();
7974 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
7975 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
7976 -1);
7977 }
7978 emit_move_insn (target, op1);
7979 emit_label (temp);
7980 return target;
7981
7982 case BIT_NOT_EXPR:
7983 op0 = expand_expr (treeop0, subtarget,
7984 VOIDmode, EXPAND_NORMAL);
7985 if (modifier == EXPAND_STACK_PARM)
7986 target = 0;
7987 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
7988 gcc_assert (temp);
7989 return temp;
7990
7991 /* ??? Can optimize bitwise operations with one arg constant.
7992 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
7993 and (a bitwise1 b) bitwise2 b (etc)
7994 but that is probably not worth while. */
7995
7996 /* BIT_AND_EXPR is for bitwise anding. TRUTH_AND_EXPR is for anding two
7997 boolean values when we want in all cases to compute both of them. In
7998 general it is fastest to do TRUTH_AND_EXPR by computing both operands
7999 as actual zero-or-1 values and then bitwise anding. In cases where
8000 there cannot be any side effects, better code would be made by
8001 treating TRUTH_AND_EXPR like TRUTH_ANDIF_EXPR; but the question is
8002 how to recognize those cases. */
8003
8004 case TRUTH_AND_EXPR:
8005 code = BIT_AND_EXPR;
8006 case BIT_AND_EXPR:
8007 goto binop;
8008
8009 case TRUTH_OR_EXPR:
8010 code = BIT_IOR_EXPR;
8011 case BIT_IOR_EXPR:
8012 goto binop;
8013
8014 case TRUTH_XOR_EXPR:
8015 code = BIT_XOR_EXPR;
8016 case BIT_XOR_EXPR:
8017 goto binop;
8018
8019 case LROTATE_EXPR:
8020 case RROTATE_EXPR:
8021 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8022 || (GET_MODE_PRECISION (TYPE_MODE (type))
8023 == TYPE_PRECISION (type)));
8024 /* fall through */
8025
8026 case LSHIFT_EXPR:
8027 case RSHIFT_EXPR:
8028 /* If this is a fixed-point operation, then we cannot use the code
8029 below because "expand_shift" doesn't support sat/no-sat fixed-point
8030 shifts. */
8031 if (ALL_FIXED_POINT_MODE_P (mode))
8032 goto binop;
8033
8034 if (! safe_from_p (subtarget, treeop1, 1))
8035 subtarget = 0;
8036 if (modifier == EXPAND_STACK_PARM)
8037 target = 0;
8038 op0 = expand_expr (treeop0, subtarget,
8039 VOIDmode, EXPAND_NORMAL);
8040 temp = expand_shift (code, mode, op0, treeop1, target,
8041 unsignedp);
8042 if (code == LSHIFT_EXPR)
8043 temp = REDUCE_BIT_FIELD (temp);
8044 return temp;
8045
8046 /* Could determine the answer when only additive constants differ. Also,
8047 the addition of one can be handled by changing the condition. */
8048 case LT_EXPR:
8049 case LE_EXPR:
8050 case GT_EXPR:
8051 case GE_EXPR:
8052 case EQ_EXPR:
8053 case NE_EXPR:
8054 case UNORDERED_EXPR:
8055 case ORDERED_EXPR:
8056 case UNLT_EXPR:
8057 case UNLE_EXPR:
8058 case UNGT_EXPR:
8059 case UNGE_EXPR:
8060 case UNEQ_EXPR:
8061 case LTGT_EXPR:
8062 temp = do_store_flag (ops,
8063 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8064 tmode != VOIDmode ? tmode : mode);
8065 if (temp)
8066 return temp;
8067
8068 /* Use a compare and a jump for BLKmode comparisons, or for function
8069 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8070
8071 if ((target == 0
8072 || modifier == EXPAND_STACK_PARM
8073 || ! safe_from_p (target, treeop0, 1)
8074 || ! safe_from_p (target, treeop1, 1)
8075 /* Make sure we don't have a hard reg (such as function's return
8076 value) live across basic blocks, if not optimizing. */
8077 || (!optimize && REG_P (target)
8078 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8079 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8080
8081 emit_move_insn (target, const0_rtx);
8082
8083 op1 = gen_label_rtx ();
8084 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8085
8086 emit_move_insn (target, const1_rtx);
8087
8088 emit_label (op1);
8089 return target;
8090
8091 case TRUTH_NOT_EXPR:
8092 if (modifier == EXPAND_STACK_PARM)
8093 target = 0;
8094 op0 = expand_expr (treeop0, target,
8095 VOIDmode, EXPAND_NORMAL);
8096 /* The parser is careful to generate TRUTH_NOT_EXPR
8097 only with operands that are always zero or one. */
8098 temp = expand_binop (mode, xor_optab, op0, const1_rtx,
8099 target, 1, OPTAB_LIB_WIDEN);
8100 gcc_assert (temp);
8101 return temp;
8102
8103 case COMPLEX_EXPR:
8104 /* Get the rtx code of the operands. */
8105 op0 = expand_normal (treeop0);
8106 op1 = expand_normal (treeop1);
8107
8108 if (!target)
8109 target = gen_reg_rtx (TYPE_MODE (type));
8110
8111 /* Move the real (op0) and imaginary (op1) parts to their location. */
8112 write_complex_part (target, op0, false);
8113 write_complex_part (target, op1, true);
8114
8115 return target;
8116
8117 case WIDEN_SUM_EXPR:
8118 {
8119 tree oprnd0 = treeop0;
8120 tree oprnd1 = treeop1;
8121
8122 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8123 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8124 target, unsignedp);
8125 return target;
8126 }
8127
8128 case REDUC_MAX_EXPR:
8129 case REDUC_MIN_EXPR:
8130 case REDUC_PLUS_EXPR:
8131 {
8132 op0 = expand_normal (treeop0);
8133 this_optab = optab_for_tree_code (code, type, optab_default);
8134 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8135 gcc_assert (temp);
8136 return temp;
8137 }
8138
8139 case VEC_EXTRACT_EVEN_EXPR:
8140 case VEC_EXTRACT_ODD_EXPR:
8141 {
8142 expand_operands (treeop0, treeop1,
8143 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8144 this_optab = optab_for_tree_code (code, type, optab_default);
8145 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8146 OPTAB_WIDEN);
8147 gcc_assert (temp);
8148 return temp;
8149 }
8150
8151 case VEC_INTERLEAVE_HIGH_EXPR:
8152 case VEC_INTERLEAVE_LOW_EXPR:
8153 {
8154 expand_operands (treeop0, treeop1,
8155 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8156 this_optab = optab_for_tree_code (code, type, optab_default);
8157 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8158 OPTAB_WIDEN);
8159 gcc_assert (temp);
8160 return temp;
8161 }
8162
8163 case VEC_LSHIFT_EXPR:
8164 case VEC_RSHIFT_EXPR:
8165 {
8166 target = expand_vec_shift_expr (ops, target);
8167 return target;
8168 }
8169
8170 case VEC_UNPACK_HI_EXPR:
8171 case VEC_UNPACK_LO_EXPR:
8172 {
8173 op0 = expand_normal (treeop0);
8174 this_optab = optab_for_tree_code (code, type, optab_default);
8175 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8176 target, unsignedp);
8177 gcc_assert (temp);
8178 return temp;
8179 }
8180
8181 case VEC_UNPACK_FLOAT_HI_EXPR:
8182 case VEC_UNPACK_FLOAT_LO_EXPR:
8183 {
8184 op0 = expand_normal (treeop0);
8185 /* The signedness is determined from input operand. */
8186 this_optab = optab_for_tree_code (code,
8187 TREE_TYPE (treeop0),
8188 optab_default);
8189 temp = expand_widen_pattern_expr
8190 (ops, op0, NULL_RTX, NULL_RTX,
8191 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8192
8193 gcc_assert (temp);
8194 return temp;
8195 }
8196
8197 case VEC_WIDEN_MULT_HI_EXPR:
8198 case VEC_WIDEN_MULT_LO_EXPR:
8199 {
8200 tree oprnd0 = treeop0;
8201 tree oprnd1 = treeop1;
8202
8203 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8204 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
8205 target, unsignedp);
8206 gcc_assert (target);
8207 return target;
8208 }
8209
8210 case VEC_PACK_TRUNC_EXPR:
8211 case VEC_PACK_SAT_EXPR:
8212 case VEC_PACK_FIX_TRUNC_EXPR:
8213 mode = TYPE_MODE (TREE_TYPE (treeop0));
8214 goto binop;
8215
8216 default:
8217 gcc_unreachable ();
8218 }
8219
8220 /* Here to do an ordinary binary operator. */
8221 binop:
8222 expand_operands (treeop0, treeop1,
8223 subtarget, &op0, &op1, EXPAND_NORMAL);
8224 binop2:
8225 this_optab = optab_for_tree_code (code, type, optab_default);
8226 binop3:
8227 if (modifier == EXPAND_STACK_PARM)
8228 target = 0;
8229 temp = expand_binop (mode, this_optab, op0, op1, target,
8230 unsignedp, OPTAB_LIB_WIDEN);
8231 gcc_assert (temp);
8232 return REDUCE_BIT_FIELD (temp);
8233 }
8234 #undef REDUCE_BIT_FIELD
8235
8236 rtx
8237 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
8238 enum expand_modifier modifier, rtx *alt_rtl)
8239 {
8240 rtx op0, op1, temp, decl_rtl;
8241 tree type;
8242 int unsignedp;
8243 enum machine_mode mode;
8244 enum tree_code code = TREE_CODE (exp);
8245 optab this_optab;
8246 rtx subtarget, original_target;
8247 int ignore;
8248 tree context;
8249 bool reduce_bit_field;
8250 location_t loc = EXPR_LOCATION (exp);
8251 struct separate_ops ops;
8252 tree treeop0, treeop1, treeop2;
8253 tree ssa_name = NULL_TREE;
8254 gimple g;
8255
8256 type = TREE_TYPE (exp);
8257 mode = TYPE_MODE (type);
8258 unsignedp = TYPE_UNSIGNED (type);
8259
8260 treeop0 = treeop1 = treeop2 = NULL_TREE;
8261 if (!VL_EXP_CLASS_P (exp))
8262 switch (TREE_CODE_LENGTH (code))
8263 {
8264 default:
8265 case 3: treeop2 = TREE_OPERAND (exp, 2);
8266 case 2: treeop1 = TREE_OPERAND (exp, 1);
8267 case 1: treeop0 = TREE_OPERAND (exp, 0);
8268 case 0: break;
8269 }
8270 ops.code = code;
8271 ops.type = type;
8272 ops.op0 = treeop0;
8273 ops.op1 = treeop1;
8274 ops.op2 = treeop2;
8275 ops.location = loc;
8276
8277 ignore = (target == const0_rtx
8278 || ((CONVERT_EXPR_CODE_P (code)
8279 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8280 && TREE_CODE (type) == VOID_TYPE));
8281
8282 /* An operation in what may be a bit-field type needs the
8283 result to be reduced to the precision of the bit-field type,
8284 which is narrower than that of the type's mode. */
8285 reduce_bit_field = (!ignore
8286 && TREE_CODE (type) == INTEGER_TYPE
8287 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8288
8289 /* If we are going to ignore this result, we need only do something
8290 if there is a side-effect somewhere in the expression. If there
8291 is, short-circuit the most common cases here. Note that we must
8292 not call expand_expr with anything but const0_rtx in case this
8293 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
8294
8295 if (ignore)
8296 {
8297 if (! TREE_SIDE_EFFECTS (exp))
8298 return const0_rtx;
8299
8300 /* Ensure we reference a volatile object even if value is ignored, but
8301 don't do this if all we are doing is taking its address. */
8302 if (TREE_THIS_VOLATILE (exp)
8303 && TREE_CODE (exp) != FUNCTION_DECL
8304 && mode != VOIDmode && mode != BLKmode
8305 && modifier != EXPAND_CONST_ADDRESS)
8306 {
8307 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
8308 if (MEM_P (temp))
8309 temp = copy_to_reg (temp);
8310 return const0_rtx;
8311 }
8312
8313 if (TREE_CODE_CLASS (code) == tcc_unary
8314 || code == COMPONENT_REF || code == INDIRECT_REF)
8315 return expand_expr (treeop0, const0_rtx, VOIDmode,
8316 modifier);
8317
8318 else if (TREE_CODE_CLASS (code) == tcc_binary
8319 || TREE_CODE_CLASS (code) == tcc_comparison
8320 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
8321 {
8322 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8323 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8324 return const0_rtx;
8325 }
8326 else if (code == BIT_FIELD_REF)
8327 {
8328 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
8329 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
8330 expand_expr (treeop2, const0_rtx, VOIDmode, modifier);
8331 return const0_rtx;
8332 }
8333
8334 target = 0;
8335 }
8336
8337 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8338 target = 0;
8339
8340 /* Use subtarget as the target for operand 0 of a binary operation. */
8341 subtarget = get_subtarget (target);
8342 original_target = target;
8343
8344 switch (code)
8345 {
8346 case LABEL_DECL:
8347 {
8348 tree function = decl_function_context (exp);
8349
8350 temp = label_rtx (exp);
8351 temp = gen_rtx_LABEL_REF (Pmode, temp);
8352
8353 if (function != current_function_decl
8354 && function != 0)
8355 LABEL_REF_NONLOCAL_P (temp) = 1;
8356
8357 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
8358 return temp;
8359 }
8360
8361 case SSA_NAME:
8362 /* ??? ivopts calls expander, without any preparation from
8363 out-of-ssa. So fake instructions as if this was an access to the
8364 base variable. This unnecessarily allocates a pseudo, see how we can
8365 reuse it, if partition base vars have it set already. */
8366 if (!currently_expanding_to_rtl)
8367 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
8368 NULL);
8369
8370 g = get_gimple_for_ssa_name (exp);
8371 if (g)
8372 return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
8373 modifier, NULL);
8374
8375 ssa_name = exp;
8376 decl_rtl = get_rtx_for_ssa_name (ssa_name);
8377 exp = SSA_NAME_VAR (ssa_name);
8378 goto expand_decl_rtl;
8379
8380 case PARM_DECL:
8381 case VAR_DECL:
8382 /* If a static var's type was incomplete when the decl was written,
8383 but the type is complete now, lay out the decl now. */
8384 if (DECL_SIZE (exp) == 0
8385 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
8386 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
8387 layout_decl (exp, 0);
8388
8389 /* ... fall through ... */
8390
8391 case FUNCTION_DECL:
8392 case RESULT_DECL:
8393 decl_rtl = DECL_RTL (exp);
8394 expand_decl_rtl:
8395 gcc_assert (decl_rtl);
8396 decl_rtl = copy_rtx (decl_rtl);
8397 /* Record writes to register variables. */
8398 if (modifier == EXPAND_WRITE && REG_P (decl_rtl)
8399 && REGNO (decl_rtl) < FIRST_PSEUDO_REGISTER)
8400 {
8401 int i = REGNO (decl_rtl);
8402 int nregs = hard_regno_nregs[i][GET_MODE (decl_rtl)];
8403 while (nregs)
8404 {
8405 SET_HARD_REG_BIT (crtl->asm_clobbers, i);
8406 i++;
8407 nregs--;
8408 }
8409 }
8410
8411 /* Ensure variable marked as used even if it doesn't go through
8412 a parser. If it hasn't be used yet, write out an external
8413 definition. */
8414 if (! TREE_USED (exp))
8415 {
8416 assemble_external (exp);
8417 TREE_USED (exp) = 1;
8418 }
8419
8420 /* Show we haven't gotten RTL for this yet. */
8421 temp = 0;
8422
8423 /* Variables inherited from containing functions should have
8424 been lowered by this point. */
8425 context = decl_function_context (exp);
8426 gcc_assert (!context
8427 || context == current_function_decl
8428 || TREE_STATIC (exp)
8429 /* ??? C++ creates functions that are not TREE_STATIC. */
8430 || TREE_CODE (exp) == FUNCTION_DECL);
8431
8432 /* This is the case of an array whose size is to be determined
8433 from its initializer, while the initializer is still being parsed.
8434 See expand_decl. */
8435
8436 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
8437 temp = validize_mem (decl_rtl);
8438
8439 /* If DECL_RTL is memory, we are in the normal case and the
8440 address is not valid, get the address into a register. */
8441
8442 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
8443 {
8444 if (alt_rtl)
8445 *alt_rtl = decl_rtl;
8446 decl_rtl = use_anchored_address (decl_rtl);
8447 if (modifier != EXPAND_CONST_ADDRESS
8448 && modifier != EXPAND_SUM
8449 && !memory_address_addr_space_p (DECL_MODE (exp),
8450 XEXP (decl_rtl, 0),
8451 MEM_ADDR_SPACE (decl_rtl)))
8452 temp = replace_equiv_address (decl_rtl,
8453 copy_rtx (XEXP (decl_rtl, 0)));
8454 }
8455
8456 /* If we got something, return it. But first, set the alignment
8457 if the address is a register. */
8458 if (temp != 0)
8459 {
8460 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
8461 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
8462
8463 return temp;
8464 }
8465
8466 /* If the mode of DECL_RTL does not match that of the decl, it
8467 must be a promoted value. We return a SUBREG of the wanted mode,
8468 but mark it so that we know that it was already extended. */
8469 if (REG_P (decl_rtl) && GET_MODE (decl_rtl) != DECL_MODE (exp))
8470 {
8471 enum machine_mode pmode;
8472
8473 /* Get the signedness to be used for this variable. Ensure we get
8474 the same mode we got when the variable was declared. */
8475 if (code == SSA_NAME
8476 && (g = SSA_NAME_DEF_STMT (ssa_name))
8477 && gimple_code (g) == GIMPLE_CALL)
8478 pmode = promote_function_mode (type, mode, &unsignedp,
8479 TREE_TYPE
8480 (TREE_TYPE (gimple_call_fn (g))),
8481 2);
8482 else
8483 pmode = promote_decl_mode (exp, &unsignedp);
8484 gcc_assert (GET_MODE (decl_rtl) == pmode);
8485
8486 temp = gen_lowpart_SUBREG (mode, decl_rtl);
8487 SUBREG_PROMOTED_VAR_P (temp) = 1;
8488 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
8489 return temp;
8490 }
8491
8492 return decl_rtl;
8493
8494 case INTEGER_CST:
8495 temp = immed_double_const (TREE_INT_CST_LOW (exp),
8496 TREE_INT_CST_HIGH (exp), mode);
8497
8498 return temp;
8499
8500 case VECTOR_CST:
8501 {
8502 tree tmp = NULL_TREE;
8503 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
8504 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
8505 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
8506 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
8507 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
8508 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
8509 return const_vector_from_tree (exp);
8510 if (GET_MODE_CLASS (mode) == MODE_INT)
8511 {
8512 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
8513 if (type_for_mode)
8514 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
8515 }
8516 if (!tmp)
8517 tmp = build_constructor_from_list (type,
8518 TREE_VECTOR_CST_ELTS (exp));
8519 return expand_expr (tmp, ignore ? const0_rtx : target,
8520 tmode, modifier);
8521 }
8522
8523 case CONST_DECL:
8524 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
8525
8526 case REAL_CST:
8527 /* If optimized, generate immediate CONST_DOUBLE
8528 which will be turned into memory by reload if necessary.
8529
8530 We used to force a register so that loop.c could see it. But
8531 this does not allow gen_* patterns to perform optimizations with
8532 the constants. It also produces two insns in cases like "x = 1.0;".
8533 On most machines, floating-point constants are not permitted in
8534 many insns, so we'd end up copying it to a register in any case.
8535
8536 Now, we do the copying in expand_binop, if appropriate. */
8537 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
8538 TYPE_MODE (TREE_TYPE (exp)));
8539
8540 case FIXED_CST:
8541 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
8542 TYPE_MODE (TREE_TYPE (exp)));
8543
8544 case COMPLEX_CST:
8545 /* Handle evaluating a complex constant in a CONCAT target. */
8546 if (original_target && GET_CODE (original_target) == CONCAT)
8547 {
8548 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
8549 rtx rtarg, itarg;
8550
8551 rtarg = XEXP (original_target, 0);
8552 itarg = XEXP (original_target, 1);
8553
8554 /* Move the real and imaginary parts separately. */
8555 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
8556 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
8557
8558 if (op0 != rtarg)
8559 emit_move_insn (rtarg, op0);
8560 if (op1 != itarg)
8561 emit_move_insn (itarg, op1);
8562
8563 return original_target;
8564 }
8565
8566 /* ... fall through ... */
8567
8568 case STRING_CST:
8569 temp = expand_expr_constant (exp, 1, modifier);
8570
8571 /* temp contains a constant address.
8572 On RISC machines where a constant address isn't valid,
8573 make some insns to get that address into a register. */
8574 if (modifier != EXPAND_CONST_ADDRESS
8575 && modifier != EXPAND_INITIALIZER
8576 && modifier != EXPAND_SUM
8577 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
8578 MEM_ADDR_SPACE (temp)))
8579 return replace_equiv_address (temp,
8580 copy_rtx (XEXP (temp, 0)));
8581 return temp;
8582
8583 case SAVE_EXPR:
8584 {
8585 tree val = treeop0;
8586 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
8587
8588 if (!SAVE_EXPR_RESOLVED_P (exp))
8589 {
8590 /* We can indeed still hit this case, typically via builtin
8591 expanders calling save_expr immediately before expanding
8592 something. Assume this means that we only have to deal
8593 with non-BLKmode values. */
8594 gcc_assert (GET_MODE (ret) != BLKmode);
8595
8596 val = build_decl (EXPR_LOCATION (exp),
8597 VAR_DECL, NULL, TREE_TYPE (exp));
8598 DECL_ARTIFICIAL (val) = 1;
8599 DECL_IGNORED_P (val) = 1;
8600 treeop0 = val;
8601 TREE_OPERAND (exp, 0) = treeop0;
8602 SAVE_EXPR_RESOLVED_P (exp) = 1;
8603
8604 if (!CONSTANT_P (ret))
8605 ret = copy_to_reg (ret);
8606 SET_DECL_RTL (val, ret);
8607 }
8608
8609 return ret;
8610 }
8611
8612
8613 case CONSTRUCTOR:
8614 /* If we don't need the result, just ensure we evaluate any
8615 subexpressions. */
8616 if (ignore)
8617 {
8618 unsigned HOST_WIDE_INT idx;
8619 tree value;
8620
8621 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
8622 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
8623
8624 return const0_rtx;
8625 }
8626
8627 return expand_constructor (exp, target, modifier, false);
8628
8629 case TARGET_MEM_REF:
8630 {
8631 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
8632 struct mem_address addr;
8633 int icode, align;
8634
8635 get_address_description (exp, &addr);
8636 op0 = addr_for_mem_ref (&addr, as, true);
8637 op0 = memory_address_addr_space (mode, op0, as);
8638 temp = gen_rtx_MEM (mode, op0);
8639 set_mem_attributes (temp, exp, 0);
8640 set_mem_addr_space (temp, as);
8641 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)),
8642 get_object_alignment (exp, BIGGEST_ALIGNMENT));
8643 if (mode != BLKmode
8644 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
8645 /* If the target does not have special handling for unaligned
8646 loads of mode then it can use regular moves for them. */
8647 && ((icode = optab_handler (movmisalign_optab, mode))
8648 != CODE_FOR_nothing))
8649 {
8650 rtx reg, insn;
8651
8652 /* We've already validated the memory, and we're creating a
8653 new pseudo destination. The predicates really can't fail. */
8654 reg = gen_reg_rtx (mode);
8655
8656 /* Nor can the insn generator. */
8657 insn = GEN_FCN (icode) (reg, temp);
8658 emit_insn (insn);
8659
8660 return reg;
8661 }
8662 return temp;
8663 }
8664
8665 case MEM_REF:
8666 {
8667 addr_space_t as
8668 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1))));
8669 enum machine_mode address_mode;
8670 tree base = TREE_OPERAND (exp, 0);
8671 gimple def_stmt;
8672 int icode, align;
8673 /* Handle expansion of non-aliased memory with non-BLKmode. That
8674 might end up in a register. */
8675 if (TREE_CODE (base) == ADDR_EXPR)
8676 {
8677 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
8678 tree bit_offset;
8679 base = TREE_OPERAND (base, 0);
8680 if (!DECL_P (base))
8681 {
8682 HOST_WIDE_INT off;
8683 base = get_addr_base_and_unit_offset (base, &off);
8684 gcc_assert (base);
8685 offset += off;
8686 }
8687 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
8688 decl we must use bitfield operations. */
8689 if (DECL_P (base)
8690 && !TREE_ADDRESSABLE (base)
8691 && DECL_MODE (base) != BLKmode
8692 && DECL_RTL_SET_P (base)
8693 && !MEM_P (DECL_RTL (base)))
8694 {
8695 tree bftype;
8696 if (offset == 0
8697 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
8698 && (GET_MODE_BITSIZE (DECL_MODE (base))
8699 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
8700 return expand_expr (build1 (VIEW_CONVERT_EXPR,
8701 TREE_TYPE (exp), base),
8702 target, tmode, modifier);
8703 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
8704 bftype = TREE_TYPE (base);
8705 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
8706 bftype = TREE_TYPE (exp);
8707 return expand_expr (build3 (BIT_FIELD_REF, bftype,
8708 base,
8709 TYPE_SIZE (TREE_TYPE (exp)),
8710 bit_offset),
8711 target, tmode, modifier);
8712 }
8713 }
8714 address_mode = targetm.addr_space.address_mode (as);
8715 base = TREE_OPERAND (exp, 0);
8716 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
8717 {
8718 tree mask = gimple_assign_rhs2 (def_stmt);
8719 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
8720 gimple_assign_rhs1 (def_stmt), mask);
8721 TREE_OPERAND (exp, 0) = base;
8722 }
8723 align = MAX (TYPE_ALIGN (TREE_TYPE (exp)),
8724 get_object_alignment (exp, BIGGEST_ALIGNMENT));
8725 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL);
8726 op0 = convert_memory_address_addr_space (address_mode, op0, as);
8727 if (!integer_zerop (TREE_OPERAND (exp, 1)))
8728 {
8729 rtx off
8730 = immed_double_int_const (mem_ref_offset (exp), address_mode);
8731 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
8732 }
8733 op0 = memory_address_addr_space (mode, op0, as);
8734 temp = gen_rtx_MEM (mode, op0);
8735 set_mem_attributes (temp, exp, 0);
8736 set_mem_addr_space (temp, as);
8737 if (TREE_THIS_VOLATILE (exp))
8738 MEM_VOLATILE_P (temp) = 1;
8739 if (mode != BLKmode
8740 && (unsigned) align < GET_MODE_ALIGNMENT (mode)
8741 /* If the target does not have special handling for unaligned
8742 loads of mode then it can use regular moves for them. */
8743 && ((icode = optab_handler (movmisalign_optab, mode))
8744 != CODE_FOR_nothing))
8745 {
8746 rtx reg, insn;
8747
8748 /* We've already validated the memory, and we're creating a
8749 new pseudo destination. The predicates really can't fail. */
8750 reg = gen_reg_rtx (mode);
8751
8752 /* Nor can the insn generator. */
8753 insn = GEN_FCN (icode) (reg, temp);
8754 emit_insn (insn);
8755
8756 return reg;
8757 }
8758 return temp;
8759 }
8760
8761 case ARRAY_REF:
8762
8763 {
8764 tree array = treeop0;
8765 tree index = treeop1;
8766
8767 /* Fold an expression like: "foo"[2].
8768 This is not done in fold so it won't happen inside &.
8769 Don't fold if this is for wide characters since it's too
8770 difficult to do correctly and this is a very rare case. */
8771
8772 if (modifier != EXPAND_CONST_ADDRESS
8773 && modifier != EXPAND_INITIALIZER
8774 && modifier != EXPAND_MEMORY)
8775 {
8776 tree t = fold_read_from_constant_string (exp);
8777
8778 if (t)
8779 return expand_expr (t, target, tmode, modifier);
8780 }
8781
8782 /* If this is a constant index into a constant array,
8783 just get the value from the array. Handle both the cases when
8784 we have an explicit constructor and when our operand is a variable
8785 that was declared const. */
8786
8787 if (modifier != EXPAND_CONST_ADDRESS
8788 && modifier != EXPAND_INITIALIZER
8789 && modifier != EXPAND_MEMORY
8790 && TREE_CODE (array) == CONSTRUCTOR
8791 && ! TREE_SIDE_EFFECTS (array)
8792 && TREE_CODE (index) == INTEGER_CST)
8793 {
8794 unsigned HOST_WIDE_INT ix;
8795 tree field, value;
8796
8797 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
8798 field, value)
8799 if (tree_int_cst_equal (field, index))
8800 {
8801 if (!TREE_SIDE_EFFECTS (value))
8802 return expand_expr (fold (value), target, tmode, modifier);
8803 break;
8804 }
8805 }
8806
8807 else if (optimize >= 1
8808 && modifier != EXPAND_CONST_ADDRESS
8809 && modifier != EXPAND_INITIALIZER
8810 && modifier != EXPAND_MEMORY
8811 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
8812 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
8813 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
8814 && targetm.binds_local_p (array))
8815 {
8816 if (TREE_CODE (index) == INTEGER_CST)
8817 {
8818 tree init = DECL_INITIAL (array);
8819
8820 if (TREE_CODE (init) == CONSTRUCTOR)
8821 {
8822 unsigned HOST_WIDE_INT ix;
8823 tree field, value;
8824
8825 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
8826 field, value)
8827 if (tree_int_cst_equal (field, index))
8828 {
8829 if (TREE_SIDE_EFFECTS (value))
8830 break;
8831
8832 if (TREE_CODE (value) == CONSTRUCTOR)
8833 {
8834 /* If VALUE is a CONSTRUCTOR, this
8835 optimization is only useful if
8836 this doesn't store the CONSTRUCTOR
8837 into memory. If it does, it is more
8838 efficient to just load the data from
8839 the array directly. */
8840 rtx ret = expand_constructor (value, target,
8841 modifier, true);
8842 if (ret == NULL_RTX)
8843 break;
8844 }
8845
8846 return expand_expr (fold (value), target, tmode,
8847 modifier);
8848 }
8849 }
8850 else if(TREE_CODE (init) == STRING_CST)
8851 {
8852 tree index1 = index;
8853 tree low_bound = array_ref_low_bound (exp);
8854 index1 = fold_convert_loc (loc, sizetype,
8855 treeop1);
8856
8857 /* Optimize the special-case of a zero lower bound.
8858
8859 We convert the low_bound to sizetype to avoid some problems
8860 with constant folding. (E.g. suppose the lower bound is 1,
8861 and its mode is QI. Without the conversion,l (ARRAY
8862 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
8863 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
8864
8865 if (! integer_zerop (low_bound))
8866 index1 = size_diffop_loc (loc, index1,
8867 fold_convert_loc (loc, sizetype,
8868 low_bound));
8869
8870 if (0 > compare_tree_int (index1,
8871 TREE_STRING_LENGTH (init)))
8872 {
8873 tree type = TREE_TYPE (TREE_TYPE (init));
8874 enum machine_mode mode = TYPE_MODE (type);
8875
8876 if (GET_MODE_CLASS (mode) == MODE_INT
8877 && GET_MODE_SIZE (mode) == 1)
8878 return gen_int_mode (TREE_STRING_POINTER (init)
8879 [TREE_INT_CST_LOW (index1)],
8880 mode);
8881 }
8882 }
8883 }
8884 }
8885 }
8886 goto normal_inner_ref;
8887
8888 case COMPONENT_REF:
8889 /* If the operand is a CONSTRUCTOR, we can just extract the
8890 appropriate field if it is present. */
8891 if (TREE_CODE (treeop0) == CONSTRUCTOR)
8892 {
8893 unsigned HOST_WIDE_INT idx;
8894 tree field, value;
8895
8896 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
8897 idx, field, value)
8898 if (field == treeop1
8899 /* We can normally use the value of the field in the
8900 CONSTRUCTOR. However, if this is a bitfield in
8901 an integral mode that we can fit in a HOST_WIDE_INT,
8902 we must mask only the number of bits in the bitfield,
8903 since this is done implicitly by the constructor. If
8904 the bitfield does not meet either of those conditions,
8905 we can't do this optimization. */
8906 && (! DECL_BIT_FIELD (field)
8907 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
8908 && (GET_MODE_BITSIZE (DECL_MODE (field))
8909 <= HOST_BITS_PER_WIDE_INT))))
8910 {
8911 if (DECL_BIT_FIELD (field)
8912 && modifier == EXPAND_STACK_PARM)
8913 target = 0;
8914 op0 = expand_expr (value, target, tmode, modifier);
8915 if (DECL_BIT_FIELD (field))
8916 {
8917 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
8918 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
8919
8920 if (TYPE_UNSIGNED (TREE_TYPE (field)))
8921 {
8922 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
8923 op0 = expand_and (imode, op0, op1, target);
8924 }
8925 else
8926 {
8927 tree count
8928 = build_int_cst (NULL_TREE,
8929 GET_MODE_BITSIZE (imode) - bitsize);
8930
8931 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
8932 target, 0);
8933 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
8934 target, 0);
8935 }
8936 }
8937
8938 return op0;
8939 }
8940 }
8941 goto normal_inner_ref;
8942
8943 case BIT_FIELD_REF:
8944 case ARRAY_RANGE_REF:
8945 normal_inner_ref:
8946 {
8947 enum machine_mode mode1, mode2;
8948 HOST_WIDE_INT bitsize, bitpos;
8949 tree offset;
8950 int volatilep = 0, must_force_mem;
8951 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
8952 &mode1, &unsignedp, &volatilep, true);
8953 rtx orig_op0, memloc;
8954
8955 /* If we got back the original object, something is wrong. Perhaps
8956 we are evaluating an expression too early. In any event, don't
8957 infinitely recurse. */
8958 gcc_assert (tem != exp);
8959
8960 /* If TEM's type is a union of variable size, pass TARGET to the inner
8961 computation, since it will need a temporary and TARGET is known
8962 to have to do. This occurs in unchecked conversion in Ada. */
8963 orig_op0 = op0
8964 = expand_expr (tem,
8965 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
8966 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
8967 != INTEGER_CST)
8968 && modifier != EXPAND_STACK_PARM
8969 ? target : NULL_RTX),
8970 VOIDmode,
8971 (modifier == EXPAND_INITIALIZER
8972 || modifier == EXPAND_CONST_ADDRESS
8973 || modifier == EXPAND_STACK_PARM)
8974 ? modifier : EXPAND_NORMAL);
8975
8976
8977 /* If the bitfield is volatile, we want to access it in the
8978 field's mode, not the computed mode. */
8979 if (volatilep
8980 && GET_CODE (op0) == MEM
8981 && flag_strict_volatile_bitfields > 0)
8982 op0 = adjust_address (op0, mode1, 0);
8983
8984 mode2
8985 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
8986
8987 /* If we have either an offset, a BLKmode result, or a reference
8988 outside the underlying object, we must force it to memory.
8989 Such a case can occur in Ada if we have unchecked conversion
8990 of an expression from a scalar type to an aggregate type or
8991 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
8992 passed a partially uninitialized object or a view-conversion
8993 to a larger size. */
8994 must_force_mem = (offset
8995 || mode1 == BLKmode
8996 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
8997
8998 /* Handle CONCAT first. */
8999 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9000 {
9001 if (bitpos == 0
9002 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9003 return op0;
9004 if (bitpos == 0
9005 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9006 && bitsize)
9007 {
9008 op0 = XEXP (op0, 0);
9009 mode2 = GET_MODE (op0);
9010 }
9011 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9012 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9013 && bitpos
9014 && bitsize)
9015 {
9016 op0 = XEXP (op0, 1);
9017 bitpos = 0;
9018 mode2 = GET_MODE (op0);
9019 }
9020 else
9021 /* Otherwise force into memory. */
9022 must_force_mem = 1;
9023 }
9024
9025 /* If this is a constant, put it in a register if it is a legitimate
9026 constant and we don't need a memory reference. */
9027 if (CONSTANT_P (op0)
9028 && mode2 != BLKmode
9029 && LEGITIMATE_CONSTANT_P (op0)
9030 && !must_force_mem)
9031 op0 = force_reg (mode2, op0);
9032
9033 /* Otherwise, if this is a constant, try to force it to the constant
9034 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9035 is a legitimate constant. */
9036 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9037 op0 = validize_mem (memloc);
9038
9039 /* Otherwise, if this is a constant or the object is not in memory
9040 and need be, put it there. */
9041 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9042 {
9043 tree nt = build_qualified_type (TREE_TYPE (tem),
9044 (TYPE_QUALS (TREE_TYPE (tem))
9045 | TYPE_QUAL_CONST));
9046 memloc = assign_temp (nt, 1, 1, 1);
9047 emit_move_insn (memloc, op0);
9048 op0 = memloc;
9049 }
9050
9051 if (offset)
9052 {
9053 enum machine_mode address_mode;
9054 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
9055 EXPAND_SUM);
9056
9057 gcc_assert (MEM_P (op0));
9058
9059 address_mode
9060 = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0));
9061 if (GET_MODE (offset_rtx) != address_mode)
9062 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
9063
9064 if (GET_MODE (op0) == BLKmode
9065 /* A constant address in OP0 can have VOIDmode, we must
9066 not try to call force_reg in that case. */
9067 && GET_MODE (XEXP (op0, 0)) != VOIDmode
9068 && bitsize != 0
9069 && (bitpos % bitsize) == 0
9070 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
9071 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
9072 {
9073 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9074 bitpos = 0;
9075 }
9076
9077 op0 = offset_address (op0, offset_rtx,
9078 highest_pow2_factor (offset));
9079 }
9080
9081 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
9082 record its alignment as BIGGEST_ALIGNMENT. */
9083 if (MEM_P (op0) && bitpos == 0 && offset != 0
9084 && is_aligning_offset (offset, tem))
9085 set_mem_align (op0, BIGGEST_ALIGNMENT);
9086
9087 /* Don't forget about volatility even if this is a bitfield. */
9088 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
9089 {
9090 if (op0 == orig_op0)
9091 op0 = copy_rtx (op0);
9092
9093 MEM_VOLATILE_P (op0) = 1;
9094 }
9095
9096 /* In cases where an aligned union has an unaligned object
9097 as a field, we might be extracting a BLKmode value from
9098 an integer-mode (e.g., SImode) object. Handle this case
9099 by doing the extract into an object as wide as the field
9100 (which we know to be the width of a basic mode), then
9101 storing into memory, and changing the mode to BLKmode. */
9102 if (mode1 == VOIDmode
9103 || REG_P (op0) || GET_CODE (op0) == SUBREG
9104 || (mode1 != BLKmode && ! direct_load[(int) mode1]
9105 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9106 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
9107 && modifier != EXPAND_CONST_ADDRESS
9108 && modifier != EXPAND_INITIALIZER)
9109 /* If the field is volatile, we always want an aligned
9110 access. */
9111 || (volatilep && flag_strict_volatile_bitfields > 0)
9112 /* If the field isn't aligned enough to fetch as a memref,
9113 fetch it as a bit field. */
9114 || (mode1 != BLKmode
9115 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
9116 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
9117 || (MEM_P (op0)
9118 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
9119 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
9120 && ((modifier == EXPAND_CONST_ADDRESS
9121 || modifier == EXPAND_INITIALIZER)
9122 ? STRICT_ALIGNMENT
9123 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
9124 || (bitpos % BITS_PER_UNIT != 0)))
9125 /* If the type and the field are a constant size and the
9126 size of the type isn't the same size as the bitfield,
9127 we must use bitfield operations. */
9128 || (bitsize >= 0
9129 && TYPE_SIZE (TREE_TYPE (exp))
9130 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9131 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
9132 bitsize)))
9133 {
9134 enum machine_mode ext_mode = mode;
9135
9136 if (ext_mode == BLKmode
9137 && ! (target != 0 && MEM_P (op0)
9138 && MEM_P (target)
9139 && bitpos % BITS_PER_UNIT == 0))
9140 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
9141
9142 if (ext_mode == BLKmode)
9143 {
9144 if (target == 0)
9145 target = assign_temp (type, 0, 1, 1);
9146
9147 if (bitsize == 0)
9148 return target;
9149
9150 /* In this case, BITPOS must start at a byte boundary and
9151 TARGET, if specified, must be a MEM. */
9152 gcc_assert (MEM_P (op0)
9153 && (!target || MEM_P (target))
9154 && !(bitpos % BITS_PER_UNIT));
9155
9156 emit_block_move (target,
9157 adjust_address (op0, VOIDmode,
9158 bitpos / BITS_PER_UNIT),
9159 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
9160 / BITS_PER_UNIT),
9161 (modifier == EXPAND_STACK_PARM
9162 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9163
9164 return target;
9165 }
9166
9167 op0 = validize_mem (op0);
9168
9169 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
9170 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9171
9172 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
9173 (modifier == EXPAND_STACK_PARM
9174 ? NULL_RTX : target),
9175 ext_mode, ext_mode);
9176
9177 /* If the result is a record type and BITSIZE is narrower than
9178 the mode of OP0, an integral mode, and this is a big endian
9179 machine, we must put the field into the high-order bits. */
9180 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
9181 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
9182 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
9183 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
9184 size_int (GET_MODE_BITSIZE (GET_MODE (op0))
9185 - bitsize),
9186 op0, 1);
9187
9188 /* If the result type is BLKmode, store the data into a temporary
9189 of the appropriate type, but with the mode corresponding to the
9190 mode for the data we have (op0's mode). It's tempting to make
9191 this a constant type, since we know it's only being stored once,
9192 but that can cause problems if we are taking the address of this
9193 COMPONENT_REF because the MEM of any reference via that address
9194 will have flags corresponding to the type, which will not
9195 necessarily be constant. */
9196 if (mode == BLKmode)
9197 {
9198 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
9199 rtx new_rtx;
9200
9201 /* If the reference doesn't use the alias set of its type,
9202 we cannot create the temporary using that type. */
9203 if (component_uses_parent_alias_set (exp))
9204 {
9205 new_rtx = assign_stack_local (ext_mode, size, 0);
9206 set_mem_alias_set (new_rtx, get_alias_set (exp));
9207 }
9208 else
9209 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
9210
9211 emit_move_insn (new_rtx, op0);
9212 op0 = copy_rtx (new_rtx);
9213 PUT_MODE (op0, BLKmode);
9214 set_mem_attributes (op0, exp, 1);
9215 }
9216
9217 return op0;
9218 }
9219
9220 /* If the result is BLKmode, use that to access the object
9221 now as well. */
9222 if (mode == BLKmode)
9223 mode1 = BLKmode;
9224
9225 /* Get a reference to just this component. */
9226 if (modifier == EXPAND_CONST_ADDRESS
9227 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
9228 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
9229 else
9230 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
9231
9232 if (op0 == orig_op0)
9233 op0 = copy_rtx (op0);
9234
9235 set_mem_attributes (op0, exp, 0);
9236 if (REG_P (XEXP (op0, 0)))
9237 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9238
9239 MEM_VOLATILE_P (op0) |= volatilep;
9240 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
9241 || modifier == EXPAND_CONST_ADDRESS
9242 || modifier == EXPAND_INITIALIZER)
9243 return op0;
9244 else if (target == 0)
9245 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9246
9247 convert_move (target, op0, unsignedp);
9248 return target;
9249 }
9250
9251 case OBJ_TYPE_REF:
9252 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
9253
9254 case CALL_EXPR:
9255 /* All valid uses of __builtin_va_arg_pack () are removed during
9256 inlining. */
9257 if (CALL_EXPR_VA_ARG_PACK (exp))
9258 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
9259 {
9260 tree fndecl = get_callee_fndecl (exp), attr;
9261
9262 if (fndecl
9263 && (attr = lookup_attribute ("error",
9264 DECL_ATTRIBUTES (fndecl))) != NULL)
9265 error ("%Kcall to %qs declared with attribute error: %s",
9266 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9267 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9268 if (fndecl
9269 && (attr = lookup_attribute ("warning",
9270 DECL_ATTRIBUTES (fndecl))) != NULL)
9271 warning_at (tree_nonartificial_location (exp),
9272 0, "%Kcall to %qs declared with attribute warning: %s",
9273 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
9274 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
9275
9276 /* Check for a built-in function. */
9277 if (fndecl && DECL_BUILT_IN (fndecl))
9278 {
9279 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
9280 return expand_builtin (exp, target, subtarget, tmode, ignore);
9281 }
9282 }
9283 return expand_call (exp, target, ignore);
9284
9285 case VIEW_CONVERT_EXPR:
9286 op0 = NULL_RTX;
9287
9288 /* If we are converting to BLKmode, try to avoid an intermediate
9289 temporary by fetching an inner memory reference. */
9290 if (mode == BLKmode
9291 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
9292 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
9293 && handled_component_p (treeop0))
9294 {
9295 enum machine_mode mode1;
9296 HOST_WIDE_INT bitsize, bitpos;
9297 tree offset;
9298 int unsignedp;
9299 int volatilep = 0;
9300 tree tem
9301 = get_inner_reference (treeop0, &bitsize, &bitpos,
9302 &offset, &mode1, &unsignedp, &volatilep,
9303 true);
9304 rtx orig_op0;
9305
9306 /* ??? We should work harder and deal with non-zero offsets. */
9307 if (!offset
9308 && (bitpos % BITS_PER_UNIT) == 0
9309 && bitsize >= 0
9310 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
9311 {
9312 /* See the normal_inner_ref case for the rationale. */
9313 orig_op0
9314 = expand_expr (tem,
9315 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9316 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9317 != INTEGER_CST)
9318 && modifier != EXPAND_STACK_PARM
9319 ? target : NULL_RTX),
9320 VOIDmode,
9321 (modifier == EXPAND_INITIALIZER
9322 || modifier == EXPAND_CONST_ADDRESS
9323 || modifier == EXPAND_STACK_PARM)
9324 ? modifier : EXPAND_NORMAL);
9325
9326 if (MEM_P (orig_op0))
9327 {
9328 op0 = orig_op0;
9329
9330 /* Get a reference to just this component. */
9331 if (modifier == EXPAND_CONST_ADDRESS
9332 || modifier == EXPAND_SUM
9333 || modifier == EXPAND_INITIALIZER)
9334 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
9335 else
9336 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
9337
9338 if (op0 == orig_op0)
9339 op0 = copy_rtx (op0);
9340
9341 set_mem_attributes (op0, treeop0, 0);
9342 if (REG_P (XEXP (op0, 0)))
9343 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
9344
9345 MEM_VOLATILE_P (op0) |= volatilep;
9346 }
9347 }
9348 }
9349
9350 if (!op0)
9351 op0 = expand_expr (treeop0,
9352 NULL_RTX, VOIDmode, modifier);
9353
9354 /* If the input and output modes are both the same, we are done. */
9355 if (mode == GET_MODE (op0))
9356 ;
9357 /* If neither mode is BLKmode, and both modes are the same size
9358 then we can use gen_lowpart. */
9359 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
9360 && GET_MODE_SIZE (mode) == GET_MODE_SIZE (GET_MODE (op0))
9361 && !COMPLEX_MODE_P (GET_MODE (op0)))
9362 {
9363 if (GET_CODE (op0) == SUBREG)
9364 op0 = force_reg (GET_MODE (op0), op0);
9365 op0 = gen_lowpart (mode, op0);
9366 }
9367 /* If both types are integral, convert from one mode to the other. */
9368 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
9369 op0 = convert_modes (mode, GET_MODE (op0), op0,
9370 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9371 /* As a last resort, spill op0 to memory, and reload it in a
9372 different mode. */
9373 else if (!MEM_P (op0))
9374 {
9375 /* If the operand is not a MEM, force it into memory. Since we
9376 are going to be changing the mode of the MEM, don't call
9377 force_const_mem for constants because we don't allow pool
9378 constants to change mode. */
9379 tree inner_type = TREE_TYPE (treeop0);
9380
9381 gcc_assert (!TREE_ADDRESSABLE (exp));
9382
9383 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
9384 target
9385 = assign_stack_temp_for_type
9386 (TYPE_MODE (inner_type),
9387 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
9388
9389 emit_move_insn (target, op0);
9390 op0 = target;
9391 }
9392
9393 /* At this point, OP0 is in the correct mode. If the output type is
9394 such that the operand is known to be aligned, indicate that it is.
9395 Otherwise, we need only be concerned about alignment for non-BLKmode
9396 results. */
9397 if (MEM_P (op0))
9398 {
9399 op0 = copy_rtx (op0);
9400
9401 if (TYPE_ALIGN_OK (type))
9402 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
9403 else if (STRICT_ALIGNMENT
9404 && mode != BLKmode
9405 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
9406 {
9407 tree inner_type = TREE_TYPE (treeop0);
9408 HOST_WIDE_INT temp_size
9409 = MAX (int_size_in_bytes (inner_type),
9410 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
9411 rtx new_rtx
9412 = assign_stack_temp_for_type (mode, temp_size, 0, type);
9413 rtx new_with_op0_mode
9414 = adjust_address (new_rtx, GET_MODE (op0), 0);
9415
9416 gcc_assert (!TREE_ADDRESSABLE (exp));
9417
9418 if (GET_MODE (op0) == BLKmode)
9419 emit_block_move (new_with_op0_mode, op0,
9420 GEN_INT (GET_MODE_SIZE (mode)),
9421 (modifier == EXPAND_STACK_PARM
9422 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
9423 else
9424 emit_move_insn (new_with_op0_mode, op0);
9425
9426 op0 = new_rtx;
9427 }
9428
9429 op0 = adjust_address (op0, mode, 0);
9430 }
9431
9432 return op0;
9433
9434 /* Use a compare and a jump for BLKmode comparisons, or for function
9435 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
9436
9437 /* Although TRUTH_{AND,OR}IF_EXPR aren't present in GIMPLE, they
9438 are occassionally created by folding during expansion. */
9439 case TRUTH_ANDIF_EXPR:
9440 case TRUTH_ORIF_EXPR:
9441 if (! ignore
9442 && (target == 0
9443 || modifier == EXPAND_STACK_PARM
9444 || ! safe_from_p (target, treeop0, 1)
9445 || ! safe_from_p (target, treeop1, 1)
9446 /* Make sure we don't have a hard reg (such as function's return
9447 value) live across basic blocks, if not optimizing. */
9448 || (!optimize && REG_P (target)
9449 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
9450 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9451
9452 if (target)
9453 emit_move_insn (target, const0_rtx);
9454
9455 op1 = gen_label_rtx ();
9456 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
9457
9458 if (target)
9459 emit_move_insn (target, const1_rtx);
9460
9461 emit_label (op1);
9462 return ignore ? const0_rtx : target;
9463
9464 case STATEMENT_LIST:
9465 {
9466 tree_stmt_iterator iter;
9467
9468 gcc_assert (ignore);
9469
9470 for (iter = tsi_start (exp); !tsi_end_p (iter); tsi_next (&iter))
9471 expand_expr (tsi_stmt (iter), const0_rtx, VOIDmode, modifier);
9472 }
9473 return const0_rtx;
9474
9475 case COND_EXPR:
9476 /* A COND_EXPR with its type being VOID_TYPE represents a
9477 conditional jump and is handled in
9478 expand_gimple_cond_expr. */
9479 gcc_assert (!VOID_TYPE_P (type));
9480
9481 /* Note that COND_EXPRs whose type is a structure or union
9482 are required to be constructed to contain assignments of
9483 a temporary variable, so that we can evaluate them here
9484 for side effect only. If type is void, we must do likewise. */
9485
9486 gcc_assert (!TREE_ADDRESSABLE (type)
9487 && !ignore
9488 && TREE_TYPE (treeop1) != void_type_node
9489 && TREE_TYPE (treeop2) != void_type_node);
9490
9491 /* If we are not to produce a result, we have no target. Otherwise,
9492 if a target was specified use it; it will not be used as an
9493 intermediate target unless it is safe. If no target, use a
9494 temporary. */
9495
9496 if (modifier != EXPAND_STACK_PARM
9497 && original_target
9498 && safe_from_p (original_target, treeop0, 1)
9499 && GET_MODE (original_target) == mode
9500 #ifdef HAVE_conditional_move
9501 && (! can_conditionally_move_p (mode)
9502 || REG_P (original_target))
9503 #endif
9504 && !MEM_P (original_target))
9505 temp = original_target;
9506 else
9507 temp = assign_temp (type, 0, 0, 1);
9508
9509 do_pending_stack_adjust ();
9510 NO_DEFER_POP;
9511 op0 = gen_label_rtx ();
9512 op1 = gen_label_rtx ();
9513 jumpifnot (treeop0, op0, -1);
9514 store_expr (treeop1, temp,
9515 modifier == EXPAND_STACK_PARM,
9516 false);
9517
9518 emit_jump_insn (gen_jump (op1));
9519 emit_barrier ();
9520 emit_label (op0);
9521 store_expr (treeop2, temp,
9522 modifier == EXPAND_STACK_PARM,
9523 false);
9524
9525 emit_label (op1);
9526 OK_DEFER_POP;
9527 return temp;
9528
9529 case VEC_COND_EXPR:
9530 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9531 return target;
9532
9533 case MODIFY_EXPR:
9534 {
9535 tree lhs = treeop0;
9536 tree rhs = treeop1;
9537 gcc_assert (ignore);
9538
9539 /* Check for |= or &= of a bitfield of size one into another bitfield
9540 of size 1. In this case, (unless we need the result of the
9541 assignment) we can do this more efficiently with a
9542 test followed by an assignment, if necessary.
9543
9544 ??? At this point, we can't get a BIT_FIELD_REF here. But if
9545 things change so we do, this code should be enhanced to
9546 support it. */
9547 if (TREE_CODE (lhs) == COMPONENT_REF
9548 && (TREE_CODE (rhs) == BIT_IOR_EXPR
9549 || TREE_CODE (rhs) == BIT_AND_EXPR)
9550 && TREE_OPERAND (rhs, 0) == lhs
9551 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
9552 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
9553 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
9554 {
9555 rtx label = gen_label_rtx ();
9556 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
9557 do_jump (TREE_OPERAND (rhs, 1),
9558 value ? label : 0,
9559 value ? 0 : label, -1);
9560 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
9561 MOVE_NONTEMPORAL (exp));
9562 do_pending_stack_adjust ();
9563 emit_label (label);
9564 return const0_rtx;
9565 }
9566
9567 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
9568 return const0_rtx;
9569 }
9570
9571 case ADDR_EXPR:
9572 return expand_expr_addr_expr (exp, target, tmode, modifier);
9573
9574 case REALPART_EXPR:
9575 op0 = expand_normal (treeop0);
9576 return read_complex_part (op0, false);
9577
9578 case IMAGPART_EXPR:
9579 op0 = expand_normal (treeop0);
9580 return read_complex_part (op0, true);
9581
9582 case RETURN_EXPR:
9583 case LABEL_EXPR:
9584 case GOTO_EXPR:
9585 case SWITCH_EXPR:
9586 case ASM_EXPR:
9587 /* Expanded in cfgexpand.c. */
9588 gcc_unreachable ();
9589
9590 case TRY_CATCH_EXPR:
9591 case CATCH_EXPR:
9592 case EH_FILTER_EXPR:
9593 case TRY_FINALLY_EXPR:
9594 /* Lowered by tree-eh.c. */
9595 gcc_unreachable ();
9596
9597 case WITH_CLEANUP_EXPR:
9598 case CLEANUP_POINT_EXPR:
9599 case TARGET_EXPR:
9600 case CASE_LABEL_EXPR:
9601 case VA_ARG_EXPR:
9602 case BIND_EXPR:
9603 case INIT_EXPR:
9604 case CONJ_EXPR:
9605 case COMPOUND_EXPR:
9606 case PREINCREMENT_EXPR:
9607 case PREDECREMENT_EXPR:
9608 case POSTINCREMENT_EXPR:
9609 case POSTDECREMENT_EXPR:
9610 case LOOP_EXPR:
9611 case EXIT_EXPR:
9612 /* Lowered by gimplify.c. */
9613 gcc_unreachable ();
9614
9615 case FDESC_EXPR:
9616 /* Function descriptors are not valid except for as
9617 initialization constants, and should not be expanded. */
9618 gcc_unreachable ();
9619
9620 case WITH_SIZE_EXPR:
9621 /* WITH_SIZE_EXPR expands to its first argument. The caller should
9622 have pulled out the size to use in whatever context it needed. */
9623 return expand_expr_real (treeop0, original_target, tmode,
9624 modifier, alt_rtl);
9625
9626 case REALIGN_LOAD_EXPR:
9627 {
9628 tree oprnd0 = treeop0;
9629 tree oprnd1 = treeop1;
9630 tree oprnd2 = treeop2;
9631 rtx op2;
9632
9633 this_optab = optab_for_tree_code (code, type, optab_default);
9634 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9635 op2 = expand_normal (oprnd2);
9636 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9637 target, unsignedp);
9638 gcc_assert (temp);
9639 return temp;
9640 }
9641
9642 case DOT_PROD_EXPR:
9643 {
9644 tree oprnd0 = treeop0;
9645 tree oprnd1 = treeop1;
9646 tree oprnd2 = treeop2;
9647 rtx op2;
9648
9649 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9650 op2 = expand_normal (oprnd2);
9651 target = expand_widen_pattern_expr (&ops, op0, op1, op2,
9652 target, unsignedp);
9653 return target;
9654 }
9655
9656 case COMPOUND_LITERAL_EXPR:
9657 {
9658 /* Initialize the anonymous variable declared in the compound
9659 literal, then return the variable. */
9660 tree decl = COMPOUND_LITERAL_EXPR_DECL (exp);
9661
9662 /* Create RTL for this variable. */
9663 if (!DECL_RTL_SET_P (decl))
9664 {
9665 if (DECL_HARD_REGISTER (decl))
9666 /* The user specified an assembler name for this variable.
9667 Set that up now. */
9668 rest_of_decl_compilation (decl, 0, 0);
9669 else
9670 expand_decl (decl);
9671 }
9672
9673 return expand_expr_real (decl, original_target, tmode,
9674 modifier, alt_rtl);
9675 }
9676
9677 default:
9678 return expand_expr_real_2 (&ops, target, tmode, modifier);
9679 }
9680 }
9681 \f
9682 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
9683 signedness of TYPE), possibly returning the result in TARGET. */
9684 static rtx
9685 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
9686 {
9687 HOST_WIDE_INT prec = TYPE_PRECISION (type);
9688 if (target && GET_MODE (target) != GET_MODE (exp))
9689 target = 0;
9690 /* For constant values, reduce using build_int_cst_type. */
9691 if (CONST_INT_P (exp))
9692 {
9693 HOST_WIDE_INT value = INTVAL (exp);
9694 tree t = build_int_cst_type (type, value);
9695 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
9696 }
9697 else if (TYPE_UNSIGNED (type))
9698 {
9699 rtx mask = immed_double_int_const (double_int_mask (prec),
9700 GET_MODE (exp));
9701 return expand_and (GET_MODE (exp), exp, mask, target);
9702 }
9703 else
9704 {
9705 tree count = build_int_cst (NULL_TREE,
9706 GET_MODE_BITSIZE (GET_MODE (exp)) - prec);
9707 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0);
9708 return expand_shift (RSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0);
9709 }
9710 }
9711 \f
9712 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
9713 when applied to the address of EXP produces an address known to be
9714 aligned more than BIGGEST_ALIGNMENT. */
9715
9716 static int
9717 is_aligning_offset (const_tree offset, const_tree exp)
9718 {
9719 /* Strip off any conversions. */
9720 while (CONVERT_EXPR_P (offset))
9721 offset = TREE_OPERAND (offset, 0);
9722
9723 /* We must now have a BIT_AND_EXPR with a constant that is one less than
9724 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
9725 if (TREE_CODE (offset) != BIT_AND_EXPR
9726 || !host_integerp (TREE_OPERAND (offset, 1), 1)
9727 || compare_tree_int (TREE_OPERAND (offset, 1),
9728 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
9729 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
9730 return 0;
9731
9732 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
9733 It must be NEGATE_EXPR. Then strip any more conversions. */
9734 offset = TREE_OPERAND (offset, 0);
9735 while (CONVERT_EXPR_P (offset))
9736 offset = TREE_OPERAND (offset, 0);
9737
9738 if (TREE_CODE (offset) != NEGATE_EXPR)
9739 return 0;
9740
9741 offset = TREE_OPERAND (offset, 0);
9742 while (CONVERT_EXPR_P (offset))
9743 offset = TREE_OPERAND (offset, 0);
9744
9745 /* This must now be the address of EXP. */
9746 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
9747 }
9748 \f
9749 /* Return the tree node if an ARG corresponds to a string constant or zero
9750 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
9751 in bytes within the string that ARG is accessing. The type of the
9752 offset will be `sizetype'. */
9753
9754 tree
9755 string_constant (tree arg, tree *ptr_offset)
9756 {
9757 tree array, offset, lower_bound;
9758 STRIP_NOPS (arg);
9759
9760 if (TREE_CODE (arg) == ADDR_EXPR)
9761 {
9762 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
9763 {
9764 *ptr_offset = size_zero_node;
9765 return TREE_OPERAND (arg, 0);
9766 }
9767 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
9768 {
9769 array = TREE_OPERAND (arg, 0);
9770 offset = size_zero_node;
9771 }
9772 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
9773 {
9774 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
9775 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
9776 if (TREE_CODE (array) != STRING_CST
9777 && TREE_CODE (array) != VAR_DECL)
9778 return 0;
9779
9780 /* Check if the array has a nonzero lower bound. */
9781 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
9782 if (!integer_zerop (lower_bound))
9783 {
9784 /* If the offset and base aren't both constants, return 0. */
9785 if (TREE_CODE (lower_bound) != INTEGER_CST)
9786 return 0;
9787 if (TREE_CODE (offset) != INTEGER_CST)
9788 return 0;
9789 /* Adjust offset by the lower bound. */
9790 offset = size_diffop (fold_convert (sizetype, offset),
9791 fold_convert (sizetype, lower_bound));
9792 }
9793 }
9794 else
9795 return 0;
9796 }
9797 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
9798 {
9799 tree arg0 = TREE_OPERAND (arg, 0);
9800 tree arg1 = TREE_OPERAND (arg, 1);
9801
9802 STRIP_NOPS (arg0);
9803 STRIP_NOPS (arg1);
9804
9805 if (TREE_CODE (arg0) == ADDR_EXPR
9806 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
9807 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
9808 {
9809 array = TREE_OPERAND (arg0, 0);
9810 offset = arg1;
9811 }
9812 else if (TREE_CODE (arg1) == ADDR_EXPR
9813 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
9814 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
9815 {
9816 array = TREE_OPERAND (arg1, 0);
9817 offset = arg0;
9818 }
9819 else
9820 return 0;
9821 }
9822 else
9823 return 0;
9824
9825 if (TREE_CODE (array) == STRING_CST)
9826 {
9827 *ptr_offset = fold_convert (sizetype, offset);
9828 return array;
9829 }
9830 else if (TREE_CODE (array) == VAR_DECL)
9831 {
9832 int length;
9833
9834 /* Variables initialized to string literals can be handled too. */
9835 if (DECL_INITIAL (array) == NULL_TREE
9836 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
9837 return 0;
9838
9839 /* If they are read-only, non-volatile and bind locally. */
9840 if (! TREE_READONLY (array)
9841 || TREE_SIDE_EFFECTS (array)
9842 || ! targetm.binds_local_p (array))
9843 return 0;
9844
9845 /* Avoid const char foo[4] = "abcde"; */
9846 if (DECL_SIZE_UNIT (array) == NULL_TREE
9847 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
9848 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
9849 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
9850 return 0;
9851
9852 /* If variable is bigger than the string literal, OFFSET must be constant
9853 and inside of the bounds of the string literal. */
9854 offset = fold_convert (sizetype, offset);
9855 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
9856 && (! host_integerp (offset, 1)
9857 || compare_tree_int (offset, length) >= 0))
9858 return 0;
9859
9860 *ptr_offset = offset;
9861 return DECL_INITIAL (array);
9862 }
9863
9864 return 0;
9865 }
9866 \f
9867 /* Generate code to calculate OPS, and exploded expression
9868 using a store-flag instruction and return an rtx for the result.
9869 OPS reflects a comparison.
9870
9871 If TARGET is nonzero, store the result there if convenient.
9872
9873 Return zero if there is no suitable set-flag instruction
9874 available on this machine.
9875
9876 Once expand_expr has been called on the arguments of the comparison,
9877 we are committed to doing the store flag, since it is not safe to
9878 re-evaluate the expression. We emit the store-flag insn by calling
9879 emit_store_flag, but only expand the arguments if we have a reason
9880 to believe that emit_store_flag will be successful. If we think that
9881 it will, but it isn't, we have to simulate the store-flag with a
9882 set/jump/set sequence. */
9883
9884 static rtx
9885 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
9886 {
9887 enum rtx_code code;
9888 tree arg0, arg1, type;
9889 tree tem;
9890 enum machine_mode operand_mode;
9891 int unsignedp;
9892 rtx op0, op1;
9893 rtx subtarget = target;
9894 location_t loc = ops->location;
9895
9896 arg0 = ops->op0;
9897 arg1 = ops->op1;
9898
9899 /* Don't crash if the comparison was erroneous. */
9900 if (arg0 == error_mark_node || arg1 == error_mark_node)
9901 return const0_rtx;
9902
9903 type = TREE_TYPE (arg0);
9904 operand_mode = TYPE_MODE (type);
9905 unsignedp = TYPE_UNSIGNED (type);
9906
9907 /* We won't bother with BLKmode store-flag operations because it would mean
9908 passing a lot of information to emit_store_flag. */
9909 if (operand_mode == BLKmode)
9910 return 0;
9911
9912 /* We won't bother with store-flag operations involving function pointers
9913 when function pointers must be canonicalized before comparisons. */
9914 #ifdef HAVE_canonicalize_funcptr_for_compare
9915 if (HAVE_canonicalize_funcptr_for_compare
9916 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
9917 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
9918 == FUNCTION_TYPE))
9919 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
9920 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
9921 == FUNCTION_TYPE))))
9922 return 0;
9923 #endif
9924
9925 STRIP_NOPS (arg0);
9926 STRIP_NOPS (arg1);
9927
9928 /* Get the rtx comparison code to use. We know that EXP is a comparison
9929 operation of some type. Some comparisons against 1 and -1 can be
9930 converted to comparisons with zero. Do so here so that the tests
9931 below will be aware that we have a comparison with zero. These
9932 tests will not catch constants in the first operand, but constants
9933 are rarely passed as the first operand. */
9934
9935 switch (ops->code)
9936 {
9937 case EQ_EXPR:
9938 code = EQ;
9939 break;
9940 case NE_EXPR:
9941 code = NE;
9942 break;
9943 case LT_EXPR:
9944 if (integer_onep (arg1))
9945 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
9946 else
9947 code = unsignedp ? LTU : LT;
9948 break;
9949 case LE_EXPR:
9950 if (! unsignedp && integer_all_onesp (arg1))
9951 arg1 = integer_zero_node, code = LT;
9952 else
9953 code = unsignedp ? LEU : LE;
9954 break;
9955 case GT_EXPR:
9956 if (! unsignedp && integer_all_onesp (arg1))
9957 arg1 = integer_zero_node, code = GE;
9958 else
9959 code = unsignedp ? GTU : GT;
9960 break;
9961 case GE_EXPR:
9962 if (integer_onep (arg1))
9963 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
9964 else
9965 code = unsignedp ? GEU : GE;
9966 break;
9967
9968 case UNORDERED_EXPR:
9969 code = UNORDERED;
9970 break;
9971 case ORDERED_EXPR:
9972 code = ORDERED;
9973 break;
9974 case UNLT_EXPR:
9975 code = UNLT;
9976 break;
9977 case UNLE_EXPR:
9978 code = UNLE;
9979 break;
9980 case UNGT_EXPR:
9981 code = UNGT;
9982 break;
9983 case UNGE_EXPR:
9984 code = UNGE;
9985 break;
9986 case UNEQ_EXPR:
9987 code = UNEQ;
9988 break;
9989 case LTGT_EXPR:
9990 code = LTGT;
9991 break;
9992
9993 default:
9994 gcc_unreachable ();
9995 }
9996
9997 /* Put a constant second. */
9998 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
9999 || TREE_CODE (arg0) == FIXED_CST)
10000 {
10001 tem = arg0; arg0 = arg1; arg1 = tem;
10002 code = swap_condition (code);
10003 }
10004
10005 /* If this is an equality or inequality test of a single bit, we can
10006 do this by shifting the bit being tested to the low-order bit and
10007 masking the result with the constant 1. If the condition was EQ,
10008 we xor it with 1. This does not require an scc insn and is faster
10009 than an scc insn even if we have it.
10010
10011 The code to make this transformation was moved into fold_single_bit_test,
10012 so we just call into the folder and expand its result. */
10013
10014 if ((code == NE || code == EQ)
10015 && TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1)
10016 && integer_pow2p (TREE_OPERAND (arg0, 1)))
10017 {
10018 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10019 return expand_expr (fold_single_bit_test (loc,
10020 code == NE ? NE_EXPR : EQ_EXPR,
10021 arg0, arg1, type),
10022 target, VOIDmode, EXPAND_NORMAL);
10023 }
10024
10025 if (! get_subtarget (target)
10026 || GET_MODE (subtarget) != operand_mode)
10027 subtarget = 0;
10028
10029 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10030
10031 if (target == 0)
10032 target = gen_reg_rtx (mode);
10033
10034 /* Try a cstore if possible. */
10035 return emit_store_flag_force (target, code, op0, op1,
10036 operand_mode, unsignedp, 1);
10037 }
10038 \f
10039
10040 /* Stubs in case we haven't got a casesi insn. */
10041 #ifndef HAVE_casesi
10042 # define HAVE_casesi 0
10043 # define gen_casesi(a, b, c, d, e) (0)
10044 # define CODE_FOR_casesi CODE_FOR_nothing
10045 #endif
10046
10047 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10048 0 otherwise (i.e. if there is no casesi instruction). */
10049 int
10050 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10051 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
10052 rtx fallback_label ATTRIBUTE_UNUSED)
10053 {
10054 enum machine_mode index_mode = SImode;
10055 int index_bits = GET_MODE_BITSIZE (index_mode);
10056 rtx op1, op2, index;
10057 enum machine_mode op_mode;
10058
10059 if (! HAVE_casesi)
10060 return 0;
10061
10062 /* Convert the index to SImode. */
10063 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10064 {
10065 enum machine_mode omode = TYPE_MODE (index_type);
10066 rtx rangertx = expand_normal (range);
10067
10068 /* We must handle the endpoints in the original mode. */
10069 index_expr = build2 (MINUS_EXPR, index_type,
10070 index_expr, minval);
10071 minval = integer_zero_node;
10072 index = expand_normal (index_expr);
10073 if (default_label)
10074 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10075 omode, 1, default_label);
10076 /* Now we can safely truncate. */
10077 index = convert_to_mode (index_mode, index, 0);
10078 }
10079 else
10080 {
10081 if (TYPE_MODE (index_type) != index_mode)
10082 {
10083 index_type = lang_hooks.types.type_for_size (index_bits, 0);
10084 index_expr = fold_convert (index_type, index_expr);
10085 }
10086
10087 index = expand_normal (index_expr);
10088 }
10089
10090 do_pending_stack_adjust ();
10091
10092 op_mode = insn_data[(int) CODE_FOR_casesi].operand[0].mode;
10093 if (! (*insn_data[(int) CODE_FOR_casesi].operand[0].predicate)
10094 (index, op_mode))
10095 index = copy_to_mode_reg (op_mode, index);
10096
10097 op1 = expand_normal (minval);
10098
10099 op_mode = insn_data[(int) CODE_FOR_casesi].operand[1].mode;
10100 op1 = convert_modes (op_mode, TYPE_MODE (TREE_TYPE (minval)),
10101 op1, TYPE_UNSIGNED (TREE_TYPE (minval)));
10102 if (! (*insn_data[(int) CODE_FOR_casesi].operand[1].predicate)
10103 (op1, op_mode))
10104 op1 = copy_to_mode_reg (op_mode, op1);
10105
10106 op2 = expand_normal (range);
10107
10108 op_mode = insn_data[(int) CODE_FOR_casesi].operand[2].mode;
10109 op2 = convert_modes (op_mode, TYPE_MODE (TREE_TYPE (range)),
10110 op2, TYPE_UNSIGNED (TREE_TYPE (range)));
10111 if (! (*insn_data[(int) CODE_FOR_casesi].operand[2].predicate)
10112 (op2, op_mode))
10113 op2 = copy_to_mode_reg (op_mode, op2);
10114
10115 emit_jump_insn (gen_casesi (index, op1, op2,
10116 table_label, !default_label
10117 ? fallback_label : default_label));
10118 return 1;
10119 }
10120
10121 /* Attempt to generate a tablejump instruction; same concept. */
10122 #ifndef HAVE_tablejump
10123 #define HAVE_tablejump 0
10124 #define gen_tablejump(x, y) (0)
10125 #endif
10126
10127 /* Subroutine of the next function.
10128
10129 INDEX is the value being switched on, with the lowest value
10130 in the table already subtracted.
10131 MODE is its expected mode (needed if INDEX is constant).
10132 RANGE is the length of the jump table.
10133 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
10134
10135 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
10136 index value is out of range. */
10137
10138 static void
10139 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
10140 rtx default_label)
10141 {
10142 rtx temp, vector;
10143
10144 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10145 cfun->cfg->max_jumptable_ents = INTVAL (range);
10146
10147 /* Do an unsigned comparison (in the proper mode) between the index
10148 expression and the value which represents the length of the range.
10149 Since we just finished subtracting the lower bound of the range
10150 from the index expression, this comparison allows us to simultaneously
10151 check that the original index expression value is both greater than
10152 or equal to the minimum value of the range and less than or equal to
10153 the maximum value of the range. */
10154
10155 if (default_label)
10156 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10157 default_label);
10158
10159 /* If index is in range, it must fit in Pmode.
10160 Convert to Pmode so we can index with it. */
10161 if (mode != Pmode)
10162 index = convert_to_mode (Pmode, index, 1);
10163
10164 /* Don't let a MEM slip through, because then INDEX that comes
10165 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10166 and break_out_memory_refs will go to work on it and mess it up. */
10167 #ifdef PIC_CASE_VECTOR_ADDRESS
10168 if (flag_pic && !REG_P (index))
10169 index = copy_to_mode_reg (Pmode, index);
10170 #endif
10171
10172 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10173 GET_MODE_SIZE, because this indicates how large insns are. The other
10174 uses should all be Pmode, because they are addresses. This code
10175 could fail if addresses and insns are not the same size. */
10176 index = gen_rtx_PLUS (Pmode,
10177 gen_rtx_MULT (Pmode, index,
10178 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10179 gen_rtx_LABEL_REF (Pmode, table_label));
10180 #ifdef PIC_CASE_VECTOR_ADDRESS
10181 if (flag_pic)
10182 index = PIC_CASE_VECTOR_ADDRESS (index);
10183 else
10184 #endif
10185 index = memory_address (CASE_VECTOR_MODE, index);
10186 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10187 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10188 convert_move (temp, vector, 0);
10189
10190 emit_jump_insn (gen_tablejump (temp, table_label));
10191
10192 /* If we are generating PIC code or if the table is PC-relative, the
10193 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10194 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10195 emit_barrier ();
10196 }
10197
10198 int
10199 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10200 rtx table_label, rtx default_label)
10201 {
10202 rtx index;
10203
10204 if (! HAVE_tablejump)
10205 return 0;
10206
10207 index_expr = fold_build2 (MINUS_EXPR, index_type,
10208 fold_convert (index_type, index_expr),
10209 fold_convert (index_type, minval));
10210 index = expand_normal (index_expr);
10211 do_pending_stack_adjust ();
10212
10213 do_tablejump (index, TYPE_MODE (index_type),
10214 convert_modes (TYPE_MODE (index_type),
10215 TYPE_MODE (TREE_TYPE (range)),
10216 expand_normal (range),
10217 TYPE_UNSIGNED (TREE_TYPE (range))),
10218 table_label, default_label);
10219 return 1;
10220 }
10221
10222 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10223 static rtx
10224 const_vector_from_tree (tree exp)
10225 {
10226 rtvec v;
10227 int units, i;
10228 tree link, elt;
10229 enum machine_mode inner, mode;
10230
10231 mode = TYPE_MODE (TREE_TYPE (exp));
10232
10233 if (initializer_zerop (exp))
10234 return CONST0_RTX (mode);
10235
10236 units = GET_MODE_NUNITS (mode);
10237 inner = GET_MODE_INNER (mode);
10238
10239 v = rtvec_alloc (units);
10240
10241 link = TREE_VECTOR_CST_ELTS (exp);
10242 for (i = 0; link; link = TREE_CHAIN (link), ++i)
10243 {
10244 elt = TREE_VALUE (link);
10245
10246 if (TREE_CODE (elt) == REAL_CST)
10247 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10248 inner);
10249 else if (TREE_CODE (elt) == FIXED_CST)
10250 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10251 inner);
10252 else
10253 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
10254 inner);
10255 }
10256
10257 /* Initialize remaining elements to 0. */
10258 for (; i < units; ++i)
10259 RTVEC_ELT (v, i) = CONST0_RTX (inner);
10260
10261 return gen_rtx_CONST_VECTOR (mode, v);
10262 }
10263
10264
10265 /* Build a decl for a EH personality function named NAME. */
10266
10267 tree
10268 build_personality_function (const char *name)
10269 {
10270 tree decl, type;
10271
10272 type = build_function_type_list (integer_type_node, integer_type_node,
10273 long_long_unsigned_type_node,
10274 ptr_type_node, ptr_type_node, NULL_TREE);
10275 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
10276 get_identifier (name), type);
10277 DECL_ARTIFICIAL (decl) = 1;
10278 DECL_EXTERNAL (decl) = 1;
10279 TREE_PUBLIC (decl) = 1;
10280
10281 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
10282 are the flags assigned by targetm.encode_section_info. */
10283 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
10284
10285 return decl;
10286 }
10287
10288 /* Extracts the personality function of DECL and returns the corresponding
10289 libfunc. */
10290
10291 rtx
10292 get_personality_function (tree decl)
10293 {
10294 tree personality = DECL_FUNCTION_PERSONALITY (decl);
10295 enum eh_personality_kind pk;
10296
10297 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
10298 if (pk == eh_personality_none)
10299 return NULL;
10300
10301 if (!personality
10302 && pk == eh_personality_any)
10303 personality = lang_hooks.eh_personality ();
10304
10305 if (pk == eh_personality_lang)
10306 gcc_assert (personality != NULL_TREE);
10307
10308 return XEXP (DECL_RTL (personality), 0);
10309 }
10310
10311 #include "gt-expr.h"